1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Instruction Enum Values and Descriptors *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_INSTRINFO_ENUM
10#undef GET_INSTRINFO_ENUM
11namespace llvm {
12
13namespace PPC {
14 enum {
15 PHI = 0,
16 INLINEASM = 1,
17 INLINEASM_BR = 2,
18 CFI_INSTRUCTION = 3,
19 EH_LABEL = 4,
20 GC_LABEL = 5,
21 ANNOTATION_LABEL = 6,
22 KILL = 7,
23 EXTRACT_SUBREG = 8,
24 INSERT_SUBREG = 9,
25 IMPLICIT_DEF = 10,
26 SUBREG_TO_REG = 11,
27 COPY_TO_REGCLASS = 12,
28 DBG_VALUE = 13,
29 DBG_VALUE_LIST = 14,
30 DBG_INSTR_REF = 15,
31 DBG_PHI = 16,
32 DBG_LABEL = 17,
33 REG_SEQUENCE = 18,
34 COPY = 19,
35 BUNDLE = 20,
36 LIFETIME_START = 21,
37 LIFETIME_END = 22,
38 PSEUDO_PROBE = 23,
39 ARITH_FENCE = 24,
40 STACKMAP = 25,
41 FENTRY_CALL = 26,
42 PATCHPOINT = 27,
43 LOAD_STACK_GUARD = 28,
44 PREALLOCATED_SETUP = 29,
45 PREALLOCATED_ARG = 30,
46 STATEPOINT = 31,
47 LOCAL_ESCAPE = 32,
48 FAULTING_OP = 33,
49 PATCHABLE_OP = 34,
50 PATCHABLE_FUNCTION_ENTER = 35,
51 PATCHABLE_RET = 36,
52 PATCHABLE_FUNCTION_EXIT = 37,
53 PATCHABLE_TAIL_CALL = 38,
54 PATCHABLE_EVENT_CALL = 39,
55 PATCHABLE_TYPED_EVENT_CALL = 40,
56 ICALL_BRANCH_FUNNEL = 41,
57 MEMBARRIER = 42,
58 JUMP_TABLE_DEBUG_INFO = 43,
59 CONVERGENCECTRL_ENTRY = 44,
60 CONVERGENCECTRL_ANCHOR = 45,
61 CONVERGENCECTRL_LOOP = 46,
62 CONVERGENCECTRL_GLUE = 47,
63 G_ASSERT_SEXT = 48,
64 G_ASSERT_ZEXT = 49,
65 G_ASSERT_ALIGN = 50,
66 G_ADD = 51,
67 G_SUB = 52,
68 G_MUL = 53,
69 G_SDIV = 54,
70 G_UDIV = 55,
71 G_SREM = 56,
72 G_UREM = 57,
73 G_SDIVREM = 58,
74 G_UDIVREM = 59,
75 G_AND = 60,
76 G_OR = 61,
77 G_XOR = 62,
78 G_IMPLICIT_DEF = 63,
79 G_PHI = 64,
80 G_FRAME_INDEX = 65,
81 G_GLOBAL_VALUE = 66,
82 G_PTRAUTH_GLOBAL_VALUE = 67,
83 G_CONSTANT_POOL = 68,
84 G_EXTRACT = 69,
85 G_UNMERGE_VALUES = 70,
86 G_INSERT = 71,
87 G_MERGE_VALUES = 72,
88 G_BUILD_VECTOR = 73,
89 G_BUILD_VECTOR_TRUNC = 74,
90 G_CONCAT_VECTORS = 75,
91 G_PTRTOINT = 76,
92 G_INTTOPTR = 77,
93 G_BITCAST = 78,
94 G_FREEZE = 79,
95 G_CONSTANT_FOLD_BARRIER = 80,
96 G_INTRINSIC_FPTRUNC_ROUND = 81,
97 G_INTRINSIC_TRUNC = 82,
98 G_INTRINSIC_ROUND = 83,
99 G_INTRINSIC_LRINT = 84,
100 G_INTRINSIC_LLRINT = 85,
101 G_INTRINSIC_ROUNDEVEN = 86,
102 G_READCYCLECOUNTER = 87,
103 G_READSTEADYCOUNTER = 88,
104 G_LOAD = 89,
105 G_SEXTLOAD = 90,
106 G_ZEXTLOAD = 91,
107 G_INDEXED_LOAD = 92,
108 G_INDEXED_SEXTLOAD = 93,
109 G_INDEXED_ZEXTLOAD = 94,
110 G_STORE = 95,
111 G_INDEXED_STORE = 96,
112 G_ATOMIC_CMPXCHG_WITH_SUCCESS = 97,
113 G_ATOMIC_CMPXCHG = 98,
114 G_ATOMICRMW_XCHG = 99,
115 G_ATOMICRMW_ADD = 100,
116 G_ATOMICRMW_SUB = 101,
117 G_ATOMICRMW_AND = 102,
118 G_ATOMICRMW_NAND = 103,
119 G_ATOMICRMW_OR = 104,
120 G_ATOMICRMW_XOR = 105,
121 G_ATOMICRMW_MAX = 106,
122 G_ATOMICRMW_MIN = 107,
123 G_ATOMICRMW_UMAX = 108,
124 G_ATOMICRMW_UMIN = 109,
125 G_ATOMICRMW_FADD = 110,
126 G_ATOMICRMW_FSUB = 111,
127 G_ATOMICRMW_FMAX = 112,
128 G_ATOMICRMW_FMIN = 113,
129 G_ATOMICRMW_UINC_WRAP = 114,
130 G_ATOMICRMW_UDEC_WRAP = 115,
131 G_FENCE = 116,
132 G_PREFETCH = 117,
133 G_BRCOND = 118,
134 G_BRINDIRECT = 119,
135 G_INVOKE_REGION_START = 120,
136 G_INTRINSIC = 121,
137 G_INTRINSIC_W_SIDE_EFFECTS = 122,
138 G_INTRINSIC_CONVERGENT = 123,
139 G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 124,
140 G_ANYEXT = 125,
141 G_TRUNC = 126,
142 G_CONSTANT = 127,
143 G_FCONSTANT = 128,
144 G_VASTART = 129,
145 G_VAARG = 130,
146 G_SEXT = 131,
147 G_SEXT_INREG = 132,
148 G_ZEXT = 133,
149 G_SHL = 134,
150 G_LSHR = 135,
151 G_ASHR = 136,
152 G_FSHL = 137,
153 G_FSHR = 138,
154 G_ROTR = 139,
155 G_ROTL = 140,
156 G_ICMP = 141,
157 G_FCMP = 142,
158 G_SCMP = 143,
159 G_UCMP = 144,
160 G_SELECT = 145,
161 G_UADDO = 146,
162 G_UADDE = 147,
163 G_USUBO = 148,
164 G_USUBE = 149,
165 G_SADDO = 150,
166 G_SADDE = 151,
167 G_SSUBO = 152,
168 G_SSUBE = 153,
169 G_UMULO = 154,
170 G_SMULO = 155,
171 G_UMULH = 156,
172 G_SMULH = 157,
173 G_UADDSAT = 158,
174 G_SADDSAT = 159,
175 G_USUBSAT = 160,
176 G_SSUBSAT = 161,
177 G_USHLSAT = 162,
178 G_SSHLSAT = 163,
179 G_SMULFIX = 164,
180 G_UMULFIX = 165,
181 G_SMULFIXSAT = 166,
182 G_UMULFIXSAT = 167,
183 G_SDIVFIX = 168,
184 G_UDIVFIX = 169,
185 G_SDIVFIXSAT = 170,
186 G_UDIVFIXSAT = 171,
187 G_FADD = 172,
188 G_FSUB = 173,
189 G_FMUL = 174,
190 G_FMA = 175,
191 G_FMAD = 176,
192 G_FDIV = 177,
193 G_FREM = 178,
194 G_FPOW = 179,
195 G_FPOWI = 180,
196 G_FEXP = 181,
197 G_FEXP2 = 182,
198 G_FEXP10 = 183,
199 G_FLOG = 184,
200 G_FLOG2 = 185,
201 G_FLOG10 = 186,
202 G_FLDEXP = 187,
203 G_FFREXP = 188,
204 G_FNEG = 189,
205 G_FPEXT = 190,
206 G_FPTRUNC = 191,
207 G_FPTOSI = 192,
208 G_FPTOUI = 193,
209 G_SITOFP = 194,
210 G_UITOFP = 195,
211 G_FABS = 196,
212 G_FCOPYSIGN = 197,
213 G_IS_FPCLASS = 198,
214 G_FCANONICALIZE = 199,
215 G_FMINNUM = 200,
216 G_FMAXNUM = 201,
217 G_FMINNUM_IEEE = 202,
218 G_FMAXNUM_IEEE = 203,
219 G_FMINIMUM = 204,
220 G_FMAXIMUM = 205,
221 G_GET_FPENV = 206,
222 G_SET_FPENV = 207,
223 G_RESET_FPENV = 208,
224 G_GET_FPMODE = 209,
225 G_SET_FPMODE = 210,
226 G_RESET_FPMODE = 211,
227 G_PTR_ADD = 212,
228 G_PTRMASK = 213,
229 G_SMIN = 214,
230 G_SMAX = 215,
231 G_UMIN = 216,
232 G_UMAX = 217,
233 G_ABS = 218,
234 G_LROUND = 219,
235 G_LLROUND = 220,
236 G_BR = 221,
237 G_BRJT = 222,
238 G_VSCALE = 223,
239 G_INSERT_SUBVECTOR = 224,
240 G_EXTRACT_SUBVECTOR = 225,
241 G_INSERT_VECTOR_ELT = 226,
242 G_EXTRACT_VECTOR_ELT = 227,
243 G_SHUFFLE_VECTOR = 228,
244 G_SPLAT_VECTOR = 229,
245 G_VECTOR_COMPRESS = 230,
246 G_CTTZ = 231,
247 G_CTTZ_ZERO_UNDEF = 232,
248 G_CTLZ = 233,
249 G_CTLZ_ZERO_UNDEF = 234,
250 G_CTPOP = 235,
251 G_BSWAP = 236,
252 G_BITREVERSE = 237,
253 G_FCEIL = 238,
254 G_FCOS = 239,
255 G_FSIN = 240,
256 G_FTAN = 241,
257 G_FACOS = 242,
258 G_FASIN = 243,
259 G_FATAN = 244,
260 G_FCOSH = 245,
261 G_FSINH = 246,
262 G_FTANH = 247,
263 G_FSQRT = 248,
264 G_FFLOOR = 249,
265 G_FRINT = 250,
266 G_FNEARBYINT = 251,
267 G_ADDRSPACE_CAST = 252,
268 G_BLOCK_ADDR = 253,
269 G_JUMP_TABLE = 254,
270 G_DYN_STACKALLOC = 255,
271 G_STACKSAVE = 256,
272 G_STACKRESTORE = 257,
273 G_STRICT_FADD = 258,
274 G_STRICT_FSUB = 259,
275 G_STRICT_FMUL = 260,
276 G_STRICT_FDIV = 261,
277 G_STRICT_FREM = 262,
278 G_STRICT_FMA = 263,
279 G_STRICT_FSQRT = 264,
280 G_STRICT_FLDEXP = 265,
281 G_READ_REGISTER = 266,
282 G_WRITE_REGISTER = 267,
283 G_MEMCPY = 268,
284 G_MEMCPY_INLINE = 269,
285 G_MEMMOVE = 270,
286 G_MEMSET = 271,
287 G_BZERO = 272,
288 G_TRAP = 273,
289 G_DEBUGTRAP = 274,
290 G_UBSANTRAP = 275,
291 G_VECREDUCE_SEQ_FADD = 276,
292 G_VECREDUCE_SEQ_FMUL = 277,
293 G_VECREDUCE_FADD = 278,
294 G_VECREDUCE_FMUL = 279,
295 G_VECREDUCE_FMAX = 280,
296 G_VECREDUCE_FMIN = 281,
297 G_VECREDUCE_FMAXIMUM = 282,
298 G_VECREDUCE_FMINIMUM = 283,
299 G_VECREDUCE_ADD = 284,
300 G_VECREDUCE_MUL = 285,
301 G_VECREDUCE_AND = 286,
302 G_VECREDUCE_OR = 287,
303 G_VECREDUCE_XOR = 288,
304 G_VECREDUCE_SMAX = 289,
305 G_VECREDUCE_SMIN = 290,
306 G_VECREDUCE_UMAX = 291,
307 G_VECREDUCE_UMIN = 292,
308 G_SBFX = 293,
309 G_UBFX = 294,
310 ATOMIC_CMP_SWAP_I128 = 295,
311 ATOMIC_LOAD_ADD_I128 = 296,
312 ATOMIC_LOAD_AND_I128 = 297,
313 ATOMIC_LOAD_NAND_I128 = 298,
314 ATOMIC_LOAD_OR_I128 = 299,
315 ATOMIC_LOAD_SUB_I128 = 300,
316 ATOMIC_LOAD_XOR_I128 = 301,
317 ATOMIC_SWAP_I128 = 302,
318 BUILD_QUADWORD = 303,
319 BUILD_UACC = 304,
320 CFENCE = 305,
321 CFENCE8 = 306,
322 CLRLSLDI = 307,
323 CLRLSLDI_rec = 308,
324 CLRLSLWI = 309,
325 CLRLSLWI_rec = 310,
326 CLRRDI = 311,
327 CLRRDI_rec = 312,
328 CLRRWI = 313,
329 CLRRWI_rec = 314,
330 DCBFL = 315,
331 DCBFLP = 316,
332 DCBFPS = 317,
333 DCBFx = 318,
334 DCBSTPS = 319,
335 DCBTCT = 320,
336 DCBTDS = 321,
337 DCBTSTCT = 322,
338 DCBTSTDS = 323,
339 DCBTSTT = 324,
340 DCBTSTx = 325,
341 DCBTT = 326,
342 DCBTx = 327,
343 DFLOADf32 = 328,
344 DFLOADf64 = 329,
345 DFSTOREf32 = 330,
346 DFSTOREf64 = 331,
347 EXTLDI = 332,
348 EXTLDI_rec = 333,
349 EXTLWI = 334,
350 EXTLWI_rec = 335,
351 EXTRDI = 336,
352 EXTRDI_rec = 337,
353 EXTRWI = 338,
354 EXTRWI_rec = 339,
355 INSLWI = 340,
356 INSLWI_rec = 341,
357 INSRDI = 342,
358 INSRDI_rec = 343,
359 INSRWI = 344,
360 INSRWI_rec = 345,
361 KILL_PAIR = 346,
362 LAx = 347,
363 LIWAX = 348,
364 LIWZX = 349,
365 PPCLdFixedAddr = 350,
366 PSUBI = 351,
367 RLWIMIbm = 352,
368 RLWIMIbm_rec = 353,
369 RLWINMbm = 354,
370 RLWINMbm_rec = 355,
371 RLWNMbm = 356,
372 RLWNMbm_rec = 357,
373 ROTRDI = 358,
374 ROTRDI_rec = 359,
375 ROTRWI = 360,
376 ROTRWI_rec = 361,
377 SLDI = 362,
378 SLDI_rec = 363,
379 SLWI = 364,
380 SLWI_rec = 365,
381 SPILLTOVSR_LD = 366,
382 SPILLTOVSR_LDX = 367,
383 SPILLTOVSR_ST = 368,
384 SPILLTOVSR_STX = 369,
385 SRDI = 370,
386 SRDI_rec = 371,
387 SRWI = 372,
388 SRWI_rec = 373,
389 STIWX = 374,
390 SUBI = 375,
391 SUBIC = 376,
392 SUBIC_rec = 377,
393 SUBIS = 378,
394 SUBPCIS = 379,
395 XFLOADf32 = 380,
396 XFLOADf64 = 381,
397 XFSTOREf32 = 382,
398 XFSTOREf64 = 383,
399 ADD4 = 384,
400 ADD4O = 385,
401 ADD4O_rec = 386,
402 ADD4TLS = 387,
403 ADD4_rec = 388,
404 ADD8 = 389,
405 ADD8O = 390,
406 ADD8O_rec = 391,
407 ADD8TLS = 392,
408 ADD8TLS_ = 393,
409 ADD8_rec = 394,
410 ADDC = 395,
411 ADDC8 = 396,
412 ADDC8O = 397,
413 ADDC8O_rec = 398,
414 ADDC8_rec = 399,
415 ADDCO = 400,
416 ADDCO_rec = 401,
417 ADDC_rec = 402,
418 ADDE = 403,
419 ADDE8 = 404,
420 ADDE8O = 405,
421 ADDE8O_rec = 406,
422 ADDE8_rec = 407,
423 ADDEO = 408,
424 ADDEO_rec = 409,
425 ADDEX = 410,
426 ADDEX8 = 411,
427 ADDE_rec = 412,
428 ADDG6S = 413,
429 ADDG6S8 = 414,
430 ADDI = 415,
431 ADDI8 = 416,
432 ADDIC = 417,
433 ADDIC8 = 418,
434 ADDIC_rec = 419,
435 ADDIS = 420,
436 ADDIS8 = 421,
437 ADDISdtprelHA = 422,
438 ADDISdtprelHA32 = 423,
439 ADDISgotTprelHA = 424,
440 ADDIStlsgdHA = 425,
441 ADDIStlsldHA = 426,
442 ADDIStocHA = 427,
443 ADDIStocHA8 = 428,
444 ADDIdtprelL = 429,
445 ADDIdtprelL32 = 430,
446 ADDItlsgdL = 431,
447 ADDItlsgdL32 = 432,
448 ADDItlsgdLADDR = 433,
449 ADDItlsgdLADDR32 = 434,
450 ADDItlsldL = 435,
451 ADDItlsldL32 = 436,
452 ADDItlsldLADDR = 437,
453 ADDItlsldLADDR32 = 438,
454 ADDItoc = 439,
455 ADDItoc8 = 440,
456 ADDItocL = 441,
457 ADDItocL8 = 442,
458 ADDME = 443,
459 ADDME8 = 444,
460 ADDME8O = 445,
461 ADDME8O_rec = 446,
462 ADDME8_rec = 447,
463 ADDMEO = 448,
464 ADDMEO_rec = 449,
465 ADDME_rec = 450,
466 ADDPCIS = 451,
467 ADDZE = 452,
468 ADDZE8 = 453,
469 ADDZE8O = 454,
470 ADDZE8O_rec = 455,
471 ADDZE8_rec = 456,
472 ADDZEO = 457,
473 ADDZEO_rec = 458,
474 ADDZE_rec = 459,
475 ADJCALLSTACKDOWN = 460,
476 ADJCALLSTACKUP = 461,
477 AND = 462,
478 AND8 = 463,
479 AND8_rec = 464,
480 ANDC = 465,
481 ANDC8 = 466,
482 ANDC8_rec = 467,
483 ANDC_rec = 468,
484 ANDI8_rec = 469,
485 ANDIS8_rec = 470,
486 ANDIS_rec = 471,
487 ANDI_rec = 472,
488 ANDI_rec_1_EQ_BIT = 473,
489 ANDI_rec_1_EQ_BIT8 = 474,
490 ANDI_rec_1_GT_BIT = 475,
491 ANDI_rec_1_GT_BIT8 = 476,
492 AND_rec = 477,
493 ATOMIC_CMP_SWAP_I16 = 478,
494 ATOMIC_CMP_SWAP_I32 = 479,
495 ATOMIC_CMP_SWAP_I64 = 480,
496 ATOMIC_CMP_SWAP_I8 = 481,
497 ATOMIC_LOAD_ADD_I16 = 482,
498 ATOMIC_LOAD_ADD_I32 = 483,
499 ATOMIC_LOAD_ADD_I64 = 484,
500 ATOMIC_LOAD_ADD_I8 = 485,
501 ATOMIC_LOAD_AND_I16 = 486,
502 ATOMIC_LOAD_AND_I32 = 487,
503 ATOMIC_LOAD_AND_I64 = 488,
504 ATOMIC_LOAD_AND_I8 = 489,
505 ATOMIC_LOAD_MAX_I16 = 490,
506 ATOMIC_LOAD_MAX_I32 = 491,
507 ATOMIC_LOAD_MAX_I64 = 492,
508 ATOMIC_LOAD_MAX_I8 = 493,
509 ATOMIC_LOAD_MIN_I16 = 494,
510 ATOMIC_LOAD_MIN_I32 = 495,
511 ATOMIC_LOAD_MIN_I64 = 496,
512 ATOMIC_LOAD_MIN_I8 = 497,
513 ATOMIC_LOAD_NAND_I16 = 498,
514 ATOMIC_LOAD_NAND_I32 = 499,
515 ATOMIC_LOAD_NAND_I64 = 500,
516 ATOMIC_LOAD_NAND_I8 = 501,
517 ATOMIC_LOAD_OR_I16 = 502,
518 ATOMIC_LOAD_OR_I32 = 503,
519 ATOMIC_LOAD_OR_I64 = 504,
520 ATOMIC_LOAD_OR_I8 = 505,
521 ATOMIC_LOAD_SUB_I16 = 506,
522 ATOMIC_LOAD_SUB_I32 = 507,
523 ATOMIC_LOAD_SUB_I64 = 508,
524 ATOMIC_LOAD_SUB_I8 = 509,
525 ATOMIC_LOAD_UMAX_I16 = 510,
526 ATOMIC_LOAD_UMAX_I32 = 511,
527 ATOMIC_LOAD_UMAX_I64 = 512,
528 ATOMIC_LOAD_UMAX_I8 = 513,
529 ATOMIC_LOAD_UMIN_I16 = 514,
530 ATOMIC_LOAD_UMIN_I32 = 515,
531 ATOMIC_LOAD_UMIN_I64 = 516,
532 ATOMIC_LOAD_UMIN_I8 = 517,
533 ATOMIC_LOAD_XOR_I16 = 518,
534 ATOMIC_LOAD_XOR_I32 = 519,
535 ATOMIC_LOAD_XOR_I64 = 520,
536 ATOMIC_LOAD_XOR_I8 = 521,
537 ATOMIC_SWAP_I16 = 522,
538 ATOMIC_SWAP_I32 = 523,
539 ATOMIC_SWAP_I64 = 524,
540 ATOMIC_SWAP_I8 = 525,
541 ATTN = 526,
542 B = 527,
543 BA = 528,
544 BC = 529,
545 BCC = 530,
546 BCCA = 531,
547 BCCCTR = 532,
548 BCCCTR8 = 533,
549 BCCCTRL = 534,
550 BCCCTRL8 = 535,
551 BCCL = 536,
552 BCCLA = 537,
553 BCCLR = 538,
554 BCCLRL = 539,
555 BCCTR = 540,
556 BCCTR8 = 541,
557 BCCTR8n = 542,
558 BCCTRL = 543,
559 BCCTRL8 = 544,
560 BCCTRL8n = 545,
561 BCCTRLn = 546,
562 BCCTRn = 547,
563 BCDADD_rec = 548,
564 BCDCFN_rec = 549,
565 BCDCFSQ_rec = 550,
566 BCDCFZ_rec = 551,
567 BCDCPSGN_rec = 552,
568 BCDCTN_rec = 553,
569 BCDCTSQ_rec = 554,
570 BCDCTZ_rec = 555,
571 BCDSETSGN_rec = 556,
572 BCDSR_rec = 557,
573 BCDSUB_rec = 558,
574 BCDS_rec = 559,
575 BCDTRUNC_rec = 560,
576 BCDUS_rec = 561,
577 BCDUTRUNC_rec = 562,
578 BCL = 563,
579 BCLR = 564,
580 BCLRL = 565,
581 BCLRLn = 566,
582 BCLRn = 567,
583 BCLalways = 568,
584 BCLn = 569,
585 BCTR = 570,
586 BCTR8 = 571,
587 BCTRL = 572,
588 BCTRL8 = 573,
589 BCTRL8_LDinto_toc = 574,
590 BCTRL8_LDinto_toc_RM = 575,
591 BCTRL8_RM = 576,
592 BCTRL_LWZinto_toc = 577,
593 BCTRL_LWZinto_toc_RM = 578,
594 BCTRL_RM = 579,
595 BCn = 580,
596 BDNZ = 581,
597 BDNZ8 = 582,
598 BDNZA = 583,
599 BDNZAm = 584,
600 BDNZAp = 585,
601 BDNZL = 586,
602 BDNZLA = 587,
603 BDNZLAm = 588,
604 BDNZLAp = 589,
605 BDNZLR = 590,
606 BDNZLR8 = 591,
607 BDNZLRL = 592,
608 BDNZLRLm = 593,
609 BDNZLRLp = 594,
610 BDNZLRm = 595,
611 BDNZLRp = 596,
612 BDNZLm = 597,
613 BDNZLp = 598,
614 BDNZm = 599,
615 BDNZp = 600,
616 BDZ = 601,
617 BDZ8 = 602,
618 BDZA = 603,
619 BDZAm = 604,
620 BDZAp = 605,
621 BDZL = 606,
622 BDZLA = 607,
623 BDZLAm = 608,
624 BDZLAp = 609,
625 BDZLR = 610,
626 BDZLR8 = 611,
627 BDZLRL = 612,
628 BDZLRLm = 613,
629 BDZLRLp = 614,
630 BDZLRm = 615,
631 BDZLRp = 616,
632 BDZLm = 617,
633 BDZLp = 618,
634 BDZm = 619,
635 BDZp = 620,
636 BL = 621,
637 BL8 = 622,
638 BL8_NOP = 623,
639 BL8_NOP_RM = 624,
640 BL8_NOP_TLS = 625,
641 BL8_NOTOC = 626,
642 BL8_NOTOC_RM = 627,
643 BL8_NOTOC_TLS = 628,
644 BL8_RM = 629,
645 BL8_TLS = 630,
646 BL8_TLS_ = 631,
647 BLA = 632,
648 BLA8 = 633,
649 BLA8_NOP = 634,
650 BLA8_NOP_RM = 635,
651 BLA8_RM = 636,
652 BLA_RM = 637,
653 BLR = 638,
654 BLR8 = 639,
655 BLRL = 640,
656 BL_NOP = 641,
657 BL_NOP_RM = 642,
658 BL_RM = 643,
659 BL_TLS = 644,
660 BPERMD = 645,
661 BRD = 646,
662 BRH = 647,
663 BRH8 = 648,
664 BRINC = 649,
665 BRW = 650,
666 BRW8 = 651,
667 CBCDTD = 652,
668 CBCDTD8 = 653,
669 CDTBCD = 654,
670 CDTBCD8 = 655,
671 CFUGED = 656,
672 CLRBHRB = 657,
673 CMPB = 658,
674 CMPB8 = 659,
675 CMPD = 660,
676 CMPDI = 661,
677 CMPEQB = 662,
678 CMPLD = 663,
679 CMPLDI = 664,
680 CMPLW = 665,
681 CMPLWI = 666,
682 CMPRB = 667,
683 CMPRB8 = 668,
684 CMPW = 669,
685 CMPWI = 670,
686 CNTLZD = 671,
687 CNTLZDM = 672,
688 CNTLZD_rec = 673,
689 CNTLZW = 674,
690 CNTLZW8 = 675,
691 CNTLZW8_rec = 676,
692 CNTLZW_rec = 677,
693 CNTTZD = 678,
694 CNTTZDM = 679,
695 CNTTZD_rec = 680,
696 CNTTZW = 681,
697 CNTTZW8 = 682,
698 CNTTZW8_rec = 683,
699 CNTTZW_rec = 684,
700 CP_ABORT = 685,
701 CP_COPY = 686,
702 CP_COPY8 = 687,
703 CP_PASTE8_rec = 688,
704 CP_PASTE_rec = 689,
705 CR6SET = 690,
706 CR6UNSET = 691,
707 CRAND = 692,
708 CRANDC = 693,
709 CREQV = 694,
710 CRNAND = 695,
711 CRNOR = 696,
712 CRNOT = 697,
713 CROR = 698,
714 CRORC = 699,
715 CRSET = 700,
716 CRUNSET = 701,
717 CRXOR = 702,
718 CTRL_DEP = 703,
719 DADD = 704,
720 DADDQ = 705,
721 DADDQ_rec = 706,
722 DADD_rec = 707,
723 DARN = 708,
724 DCBA = 709,
725 DCBF = 710,
726 DCBFEP = 711,
727 DCBI = 712,
728 DCBST = 713,
729 DCBSTEP = 714,
730 DCBT = 715,
731 DCBTEP = 716,
732 DCBTST = 717,
733 DCBTSTEP = 718,
734 DCBZ = 719,
735 DCBZEP = 720,
736 DCBZL = 721,
737 DCBZLEP = 722,
738 DCCCI = 723,
739 DCFFIX = 724,
740 DCFFIXQ = 725,
741 DCFFIXQQ = 726,
742 DCFFIXQ_rec = 727,
743 DCFFIX_rec = 728,
744 DCMPO = 729,
745 DCMPOQ = 730,
746 DCMPU = 731,
747 DCMPUQ = 732,
748 DCTDP = 733,
749 DCTDP_rec = 734,
750 DCTFIX = 735,
751 DCTFIXQ = 736,
752 DCTFIXQQ = 737,
753 DCTFIXQ_rec = 738,
754 DCTFIX_rec = 739,
755 DCTQPQ = 740,
756 DCTQPQ_rec = 741,
757 DDEDPD = 742,
758 DDEDPDQ = 743,
759 DDEDPDQ_rec = 744,
760 DDEDPD_rec = 745,
761 DDIV = 746,
762 DDIVQ = 747,
763 DDIVQ_rec = 748,
764 DDIV_rec = 749,
765 DENBCD = 750,
766 DENBCDQ = 751,
767 DENBCDQ_rec = 752,
768 DENBCD_rec = 753,
769 DIEX = 754,
770 DIEXQ = 755,
771 DIEXQ_rec = 756,
772 DIEX_rec = 757,
773 DIVD = 758,
774 DIVDE = 759,
775 DIVDEO = 760,
776 DIVDEO_rec = 761,
777 DIVDEU = 762,
778 DIVDEUO = 763,
779 DIVDEUO_rec = 764,
780 DIVDEU_rec = 765,
781 DIVDE_rec = 766,
782 DIVDO = 767,
783 DIVDO_rec = 768,
784 DIVDU = 769,
785 DIVDUO = 770,
786 DIVDUO_rec = 771,
787 DIVDU_rec = 772,
788 DIVD_rec = 773,
789 DIVW = 774,
790 DIVWE = 775,
791 DIVWEO = 776,
792 DIVWEO_rec = 777,
793 DIVWEU = 778,
794 DIVWEUO = 779,
795 DIVWEUO_rec = 780,
796 DIVWEU_rec = 781,
797 DIVWE_rec = 782,
798 DIVWO = 783,
799 DIVWO_rec = 784,
800 DIVWU = 785,
801 DIVWUO = 786,
802 DIVWUO_rec = 787,
803 DIVWU_rec = 788,
804 DIVW_rec = 789,
805 DMMR = 790,
806 DMSETDMRZ = 791,
807 DMUL = 792,
808 DMULQ = 793,
809 DMULQ_rec = 794,
810 DMUL_rec = 795,
811 DMXOR = 796,
812 DMXXEXTFDMR256 = 797,
813 DMXXEXTFDMR512 = 798,
814 DMXXEXTFDMR512_HI = 799,
815 DMXXINSTFDMR256 = 800,
816 DMXXINSTFDMR512 = 801,
817 DMXXINSTFDMR512_HI = 802,
818 DQUA = 803,
819 DQUAI = 804,
820 DQUAIQ = 805,
821 DQUAIQ_rec = 806,
822 DQUAI_rec = 807,
823 DQUAQ = 808,
824 DQUAQ_rec = 809,
825 DQUA_rec = 810,
826 DRDPQ = 811,
827 DRDPQ_rec = 812,
828 DRINTN = 813,
829 DRINTNQ = 814,
830 DRINTNQ_rec = 815,
831 DRINTN_rec = 816,
832 DRINTX = 817,
833 DRINTXQ = 818,
834 DRINTXQ_rec = 819,
835 DRINTX_rec = 820,
836 DRRND = 821,
837 DRRNDQ = 822,
838 DRRNDQ_rec = 823,
839 DRRND_rec = 824,
840 DRSP = 825,
841 DRSP_rec = 826,
842 DSCLI = 827,
843 DSCLIQ = 828,
844 DSCLIQ_rec = 829,
845 DSCLI_rec = 830,
846 DSCRI = 831,
847 DSCRIQ = 832,
848 DSCRIQ_rec = 833,
849 DSCRI_rec = 834,
850 DSS = 835,
851 DSSALL = 836,
852 DST = 837,
853 DST64 = 838,
854 DSTST = 839,
855 DSTST64 = 840,
856 DSTSTT = 841,
857 DSTSTT64 = 842,
858 DSTT = 843,
859 DSTT64 = 844,
860 DSUB = 845,
861 DSUBQ = 846,
862 DSUBQ_rec = 847,
863 DSUB_rec = 848,
864 DTSTDC = 849,
865 DTSTDCQ = 850,
866 DTSTDG = 851,
867 DTSTDGQ = 852,
868 DTSTEX = 853,
869 DTSTEXQ = 854,
870 DTSTSF = 855,
871 DTSTSFI = 856,
872 DTSTSFIQ = 857,
873 DTSTSFQ = 858,
874 DXEX = 859,
875 DXEXQ = 860,
876 DXEXQ_rec = 861,
877 DXEX_rec = 862,
878 DYNALLOC = 863,
879 DYNALLOC8 = 864,
880 DYNAREAOFFSET = 865,
881 DYNAREAOFFSET8 = 866,
882 DecreaseCTR8loop = 867,
883 DecreaseCTRloop = 868,
884 EFDABS = 869,
885 EFDADD = 870,
886 EFDCFS = 871,
887 EFDCFSF = 872,
888 EFDCFSI = 873,
889 EFDCFSID = 874,
890 EFDCFUF = 875,
891 EFDCFUI = 876,
892 EFDCFUID = 877,
893 EFDCMPEQ = 878,
894 EFDCMPGT = 879,
895 EFDCMPLT = 880,
896 EFDCTSF = 881,
897 EFDCTSI = 882,
898 EFDCTSIDZ = 883,
899 EFDCTSIZ = 884,
900 EFDCTUF = 885,
901 EFDCTUI = 886,
902 EFDCTUIDZ = 887,
903 EFDCTUIZ = 888,
904 EFDDIV = 889,
905 EFDMUL = 890,
906 EFDNABS = 891,
907 EFDNEG = 892,
908 EFDSUB = 893,
909 EFDTSTEQ = 894,
910 EFDTSTGT = 895,
911 EFDTSTLT = 896,
912 EFSABS = 897,
913 EFSADD = 898,
914 EFSCFD = 899,
915 EFSCFSF = 900,
916 EFSCFSI = 901,
917 EFSCFUF = 902,
918 EFSCFUI = 903,
919 EFSCMPEQ = 904,
920 EFSCMPGT = 905,
921 EFSCMPLT = 906,
922 EFSCTSF = 907,
923 EFSCTSI = 908,
924 EFSCTSIZ = 909,
925 EFSCTUF = 910,
926 EFSCTUI = 911,
927 EFSCTUIZ = 912,
928 EFSDIV = 913,
929 EFSMUL = 914,
930 EFSNABS = 915,
931 EFSNEG = 916,
932 EFSSUB = 917,
933 EFSTSTEQ = 918,
934 EFSTSTGT = 919,
935 EFSTSTLT = 920,
936 EH_SjLj_LongJmp32 = 921,
937 EH_SjLj_LongJmp64 = 922,
938 EH_SjLj_SetJmp32 = 923,
939 EH_SjLj_SetJmp64 = 924,
940 EH_SjLj_Setup = 925,
941 EQV = 926,
942 EQV8 = 927,
943 EQV8_rec = 928,
944 EQV_rec = 929,
945 EVABS = 930,
946 EVADDIW = 931,
947 EVADDSMIAAW = 932,
948 EVADDSSIAAW = 933,
949 EVADDUMIAAW = 934,
950 EVADDUSIAAW = 935,
951 EVADDW = 936,
952 EVAND = 937,
953 EVANDC = 938,
954 EVCMPEQ = 939,
955 EVCMPGTS = 940,
956 EVCMPGTU = 941,
957 EVCMPLTS = 942,
958 EVCMPLTU = 943,
959 EVCNTLSW = 944,
960 EVCNTLZW = 945,
961 EVDIVWS = 946,
962 EVDIVWU = 947,
963 EVEQV = 948,
964 EVEXTSB = 949,
965 EVEXTSH = 950,
966 EVFSABS = 951,
967 EVFSADD = 952,
968 EVFSCFSF = 953,
969 EVFSCFSI = 954,
970 EVFSCFUF = 955,
971 EVFSCFUI = 956,
972 EVFSCMPEQ = 957,
973 EVFSCMPGT = 958,
974 EVFSCMPLT = 959,
975 EVFSCTSF = 960,
976 EVFSCTSI = 961,
977 EVFSCTSIZ = 962,
978 EVFSCTUF = 963,
979 EVFSCTUI = 964,
980 EVFSCTUIZ = 965,
981 EVFSDIV = 966,
982 EVFSMUL = 967,
983 EVFSNABS = 968,
984 EVFSNEG = 969,
985 EVFSSUB = 970,
986 EVFSTSTEQ = 971,
987 EVFSTSTGT = 972,
988 EVFSTSTLT = 973,
989 EVLDD = 974,
990 EVLDDX = 975,
991 EVLDH = 976,
992 EVLDHX = 977,
993 EVLDW = 978,
994 EVLDWX = 979,
995 EVLHHESPLAT = 980,
996 EVLHHESPLATX = 981,
997 EVLHHOSSPLAT = 982,
998 EVLHHOSSPLATX = 983,
999 EVLHHOUSPLAT = 984,
1000 EVLHHOUSPLATX = 985,
1001 EVLWHE = 986,
1002 EVLWHEX = 987,
1003 EVLWHOS = 988,
1004 EVLWHOSX = 989,
1005 EVLWHOU = 990,
1006 EVLWHOUX = 991,
1007 EVLWHSPLAT = 992,
1008 EVLWHSPLATX = 993,
1009 EVLWWSPLAT = 994,
1010 EVLWWSPLATX = 995,
1011 EVMERGEHI = 996,
1012 EVMERGEHILO = 997,
1013 EVMERGELO = 998,
1014 EVMERGELOHI = 999,
1015 EVMHEGSMFAA = 1000,
1016 EVMHEGSMFAN = 1001,
1017 EVMHEGSMIAA = 1002,
1018 EVMHEGSMIAN = 1003,
1019 EVMHEGUMIAA = 1004,
1020 EVMHEGUMIAN = 1005,
1021 EVMHESMF = 1006,
1022 EVMHESMFA = 1007,
1023 EVMHESMFAAW = 1008,
1024 EVMHESMFANW = 1009,
1025 EVMHESMI = 1010,
1026 EVMHESMIA = 1011,
1027 EVMHESMIAAW = 1012,
1028 EVMHESMIANW = 1013,
1029 EVMHESSF = 1014,
1030 EVMHESSFA = 1015,
1031 EVMHESSFAAW = 1016,
1032 EVMHESSFANW = 1017,
1033 EVMHESSIAAW = 1018,
1034 EVMHESSIANW = 1019,
1035 EVMHEUMI = 1020,
1036 EVMHEUMIA = 1021,
1037 EVMHEUMIAAW = 1022,
1038 EVMHEUMIANW = 1023,
1039 EVMHEUSIAAW = 1024,
1040 EVMHEUSIANW = 1025,
1041 EVMHOGSMFAA = 1026,
1042 EVMHOGSMFAN = 1027,
1043 EVMHOGSMIAA = 1028,
1044 EVMHOGSMIAN = 1029,
1045 EVMHOGUMIAA = 1030,
1046 EVMHOGUMIAN = 1031,
1047 EVMHOSMF = 1032,
1048 EVMHOSMFA = 1033,
1049 EVMHOSMFAAW = 1034,
1050 EVMHOSMFANW = 1035,
1051 EVMHOSMI = 1036,
1052 EVMHOSMIA = 1037,
1053 EVMHOSMIAAW = 1038,
1054 EVMHOSMIANW = 1039,
1055 EVMHOSSF = 1040,
1056 EVMHOSSFA = 1041,
1057 EVMHOSSFAAW = 1042,
1058 EVMHOSSFANW = 1043,
1059 EVMHOSSIAAW = 1044,
1060 EVMHOSSIANW = 1045,
1061 EVMHOUMI = 1046,
1062 EVMHOUMIA = 1047,
1063 EVMHOUMIAAW = 1048,
1064 EVMHOUMIANW = 1049,
1065 EVMHOUSIAAW = 1050,
1066 EVMHOUSIANW = 1051,
1067 EVMRA = 1052,
1068 EVMWHSMF = 1053,
1069 EVMWHSMFA = 1054,
1070 EVMWHSMI = 1055,
1071 EVMWHSMIA = 1056,
1072 EVMWHSSF = 1057,
1073 EVMWHSSFA = 1058,
1074 EVMWHUMI = 1059,
1075 EVMWHUMIA = 1060,
1076 EVMWLSMIAAW = 1061,
1077 EVMWLSMIANW = 1062,
1078 EVMWLSSIAAW = 1063,
1079 EVMWLSSIANW = 1064,
1080 EVMWLUMI = 1065,
1081 EVMWLUMIA = 1066,
1082 EVMWLUMIAAW = 1067,
1083 EVMWLUMIANW = 1068,
1084 EVMWLUSIAAW = 1069,
1085 EVMWLUSIANW = 1070,
1086 EVMWSMF = 1071,
1087 EVMWSMFA = 1072,
1088 EVMWSMFAA = 1073,
1089 EVMWSMFAN = 1074,
1090 EVMWSMI = 1075,
1091 EVMWSMIA = 1076,
1092 EVMWSMIAA = 1077,
1093 EVMWSMIAN = 1078,
1094 EVMWSSF = 1079,
1095 EVMWSSFA = 1080,
1096 EVMWSSFAA = 1081,
1097 EVMWSSFAN = 1082,
1098 EVMWUMI = 1083,
1099 EVMWUMIA = 1084,
1100 EVMWUMIAA = 1085,
1101 EVMWUMIAN = 1086,
1102 EVNAND = 1087,
1103 EVNEG = 1088,
1104 EVNOR = 1089,
1105 EVOR = 1090,
1106 EVORC = 1091,
1107 EVRLW = 1092,
1108 EVRLWI = 1093,
1109 EVRNDW = 1094,
1110 EVSEL = 1095,
1111 EVSLW = 1096,
1112 EVSLWI = 1097,
1113 EVSPLATFI = 1098,
1114 EVSPLATI = 1099,
1115 EVSRWIS = 1100,
1116 EVSRWIU = 1101,
1117 EVSRWS = 1102,
1118 EVSRWU = 1103,
1119 EVSTDD = 1104,
1120 EVSTDDX = 1105,
1121 EVSTDH = 1106,
1122 EVSTDHX = 1107,
1123 EVSTDW = 1108,
1124 EVSTDWX = 1109,
1125 EVSTWHE = 1110,
1126 EVSTWHEX = 1111,
1127 EVSTWHO = 1112,
1128 EVSTWHOX = 1113,
1129 EVSTWWE = 1114,
1130 EVSTWWEX = 1115,
1131 EVSTWWO = 1116,
1132 EVSTWWOX = 1117,
1133 EVSUBFSMIAAW = 1118,
1134 EVSUBFSSIAAW = 1119,
1135 EVSUBFUMIAAW = 1120,
1136 EVSUBFUSIAAW = 1121,
1137 EVSUBFW = 1122,
1138 EVSUBIFW = 1123,
1139 EVXOR = 1124,
1140 EXTSB = 1125,
1141 EXTSB8 = 1126,
1142 EXTSB8_32_64 = 1127,
1143 EXTSB8_rec = 1128,
1144 EXTSB_rec = 1129,
1145 EXTSH = 1130,
1146 EXTSH8 = 1131,
1147 EXTSH8_32_64 = 1132,
1148 EXTSH8_rec = 1133,
1149 EXTSH_rec = 1134,
1150 EXTSW = 1135,
1151 EXTSWSLI = 1136,
1152 EXTSWSLI_32_64 = 1137,
1153 EXTSWSLI_32_64_rec = 1138,
1154 EXTSWSLI_rec = 1139,
1155 EXTSW_32 = 1140,
1156 EXTSW_32_64 = 1141,
1157 EXTSW_32_64_rec = 1142,
1158 EXTSW_rec = 1143,
1159 EnforceIEIO = 1144,
1160 FABSD = 1145,
1161 FABSD_rec = 1146,
1162 FABSS = 1147,
1163 FABSS_rec = 1148,
1164 FADD = 1149,
1165 FADDS = 1150,
1166 FADDS_rec = 1151,
1167 FADD_rec = 1152,
1168 FADDrtz = 1153,
1169 FCFID = 1154,
1170 FCFIDS = 1155,
1171 FCFIDS_rec = 1156,
1172 FCFIDU = 1157,
1173 FCFIDUS = 1158,
1174 FCFIDUS_rec = 1159,
1175 FCFIDU_rec = 1160,
1176 FCFID_rec = 1161,
1177 FCMPOD = 1162,
1178 FCMPOS = 1163,
1179 FCMPUD = 1164,
1180 FCMPUS = 1165,
1181 FCPSGND = 1166,
1182 FCPSGND_rec = 1167,
1183 FCPSGNS = 1168,
1184 FCPSGNS_rec = 1169,
1185 FCTID = 1170,
1186 FCTIDU = 1171,
1187 FCTIDUZ = 1172,
1188 FCTIDUZ_rec = 1173,
1189 FCTIDU_rec = 1174,
1190 FCTIDZ = 1175,
1191 FCTIDZ_rec = 1176,
1192 FCTID_rec = 1177,
1193 FCTIW = 1178,
1194 FCTIWU = 1179,
1195 FCTIWUZ = 1180,
1196 FCTIWUZ_rec = 1181,
1197 FCTIWU_rec = 1182,
1198 FCTIWZ = 1183,
1199 FCTIWZ_rec = 1184,
1200 FCTIW_rec = 1185,
1201 FDIV = 1186,
1202 FDIVS = 1187,
1203 FDIVS_rec = 1188,
1204 FDIV_rec = 1189,
1205 FENCE = 1190,
1206 FMADD = 1191,
1207 FMADDS = 1192,
1208 FMADDS_rec = 1193,
1209 FMADD_rec = 1194,
1210 FMR = 1195,
1211 FMR_rec = 1196,
1212 FMSUB = 1197,
1213 FMSUBS = 1198,
1214 FMSUBS_rec = 1199,
1215 FMSUB_rec = 1200,
1216 FMUL = 1201,
1217 FMULS = 1202,
1218 FMULS_rec = 1203,
1219 FMUL_rec = 1204,
1220 FNABSD = 1205,
1221 FNABSD_rec = 1206,
1222 FNABSS = 1207,
1223 FNABSS_rec = 1208,
1224 FNEGD = 1209,
1225 FNEGD_rec = 1210,
1226 FNEGS = 1211,
1227 FNEGS_rec = 1212,
1228 FNMADD = 1213,
1229 FNMADDS = 1214,
1230 FNMADDS_rec = 1215,
1231 FNMADD_rec = 1216,
1232 FNMSUB = 1217,
1233 FNMSUBS = 1218,
1234 FNMSUBS_rec = 1219,
1235 FNMSUB_rec = 1220,
1236 FRE = 1221,
1237 FRES = 1222,
1238 FRES_rec = 1223,
1239 FRE_rec = 1224,
1240 FRIMD = 1225,
1241 FRIMD_rec = 1226,
1242 FRIMS = 1227,
1243 FRIMS_rec = 1228,
1244 FRIND = 1229,
1245 FRIND_rec = 1230,
1246 FRINS = 1231,
1247 FRINS_rec = 1232,
1248 FRIPD = 1233,
1249 FRIPD_rec = 1234,
1250 FRIPS = 1235,
1251 FRIPS_rec = 1236,
1252 FRIZD = 1237,
1253 FRIZD_rec = 1238,
1254 FRIZS = 1239,
1255 FRIZS_rec = 1240,
1256 FRSP = 1241,
1257 FRSP_rec = 1242,
1258 FRSQRTE = 1243,
1259 FRSQRTES = 1244,
1260 FRSQRTES_rec = 1245,
1261 FRSQRTE_rec = 1246,
1262 FSELD = 1247,
1263 FSELD_rec = 1248,
1264 FSELS = 1249,
1265 FSELS_rec = 1250,
1266 FSQRT = 1251,
1267 FSQRTS = 1252,
1268 FSQRTS_rec = 1253,
1269 FSQRT_rec = 1254,
1270 FSUB = 1255,
1271 FSUBS = 1256,
1272 FSUBS_rec = 1257,
1273 FSUB_rec = 1258,
1274 FTDIV = 1259,
1275 FTSQRT = 1260,
1276 GETtlsADDR = 1261,
1277 GETtlsADDR32 = 1262,
1278 GETtlsADDR32AIX = 1263,
1279 GETtlsADDR64AIX = 1264,
1280 GETtlsADDRPCREL = 1265,
1281 GETtlsMOD32AIX = 1266,
1282 GETtlsMOD64AIX = 1267,
1283 GETtlsTpointer32AIX = 1268,
1284 GETtlsldADDR = 1269,
1285 GETtlsldADDR32 = 1270,
1286 GETtlsldADDRPCREL = 1271,
1287 HASHCHK = 1272,
1288 HASHCHK8 = 1273,
1289 HASHCHKP = 1274,
1290 HASHCHKP8 = 1275,
1291 HASHST = 1276,
1292 HASHST8 = 1277,
1293 HASHSTP = 1278,
1294 HASHSTP8 = 1279,
1295 HRFID = 1280,
1296 ICBI = 1281,
1297 ICBIEP = 1282,
1298 ICBLC = 1283,
1299 ICBLQ = 1284,
1300 ICBT = 1285,
1301 ICBTLS = 1286,
1302 ICCCI = 1287,
1303 ISEL = 1288,
1304 ISEL8 = 1289,
1305 ISYNC = 1290,
1306 LA = 1291,
1307 LA8 = 1292,
1308 LBARX = 1293,
1309 LBARXL = 1294,
1310 LBEPX = 1295,
1311 LBZ = 1296,
1312 LBZ8 = 1297,
1313 LBZCIX = 1298,
1314 LBZU = 1299,
1315 LBZU8 = 1300,
1316 LBZUX = 1301,
1317 LBZUX8 = 1302,
1318 LBZX = 1303,
1319 LBZX8 = 1304,
1320 LBZXTLS = 1305,
1321 LBZXTLS_ = 1306,
1322 LBZXTLS_32 = 1307,
1323 LD = 1308,
1324 LDARX = 1309,
1325 LDARXL = 1310,
1326 LDAT = 1311,
1327 LDBRX = 1312,
1328 LDCIX = 1313,
1329 LDU = 1314,
1330 LDUX = 1315,
1331 LDX = 1316,
1332 LDXTLS = 1317,
1333 LDXTLS_ = 1318,
1334 LDgotTprelL = 1319,
1335 LDgotTprelL32 = 1320,
1336 LDtoc = 1321,
1337 LDtocBA = 1322,
1338 LDtocCPT = 1323,
1339 LDtocJTI = 1324,
1340 LDtocL = 1325,
1341 LFD = 1326,
1342 LFDEPX = 1327,
1343 LFDU = 1328,
1344 LFDUX = 1329,
1345 LFDX = 1330,
1346 LFDXTLS = 1331,
1347 LFDXTLS_ = 1332,
1348 LFIWAX = 1333,
1349 LFIWZX = 1334,
1350 LFS = 1335,
1351 LFSU = 1336,
1352 LFSUX = 1337,
1353 LFSX = 1338,
1354 LFSXTLS = 1339,
1355 LFSXTLS_ = 1340,
1356 LHA = 1341,
1357 LHA8 = 1342,
1358 LHARX = 1343,
1359 LHARXL = 1344,
1360 LHAU = 1345,
1361 LHAU8 = 1346,
1362 LHAUX = 1347,
1363 LHAUX8 = 1348,
1364 LHAX = 1349,
1365 LHAX8 = 1350,
1366 LHAXTLS = 1351,
1367 LHAXTLS_ = 1352,
1368 LHAXTLS_32 = 1353,
1369 LHBRX = 1354,
1370 LHBRX8 = 1355,
1371 LHEPX = 1356,
1372 LHZ = 1357,
1373 LHZ8 = 1358,
1374 LHZCIX = 1359,
1375 LHZU = 1360,
1376 LHZU8 = 1361,
1377 LHZUX = 1362,
1378 LHZUX8 = 1363,
1379 LHZX = 1364,
1380 LHZX8 = 1365,
1381 LHZXTLS = 1366,
1382 LHZXTLS_ = 1367,
1383 LHZXTLS_32 = 1368,
1384 LI = 1369,
1385 LI8 = 1370,
1386 LIS = 1371,
1387 LIS8 = 1372,
1388 LMW = 1373,
1389 LQ = 1374,
1390 LQARX = 1375,
1391 LQARXL = 1376,
1392 LQX_PSEUDO = 1377,
1393 LSWI = 1378,
1394 LVEBX = 1379,
1395 LVEHX = 1380,
1396 LVEWX = 1381,
1397 LVSL = 1382,
1398 LVSR = 1383,
1399 LVX = 1384,
1400 LVXL = 1385,
1401 LWA = 1386,
1402 LWARX = 1387,
1403 LWARXL = 1388,
1404 LWAT = 1389,
1405 LWAUX = 1390,
1406 LWAX = 1391,
1407 LWAXTLS = 1392,
1408 LWAXTLS_ = 1393,
1409 LWAXTLS_32 = 1394,
1410 LWAX_32 = 1395,
1411 LWA_32 = 1396,
1412 LWBRX = 1397,
1413 LWBRX8 = 1398,
1414 LWEPX = 1399,
1415 LWZ = 1400,
1416 LWZ8 = 1401,
1417 LWZCIX = 1402,
1418 LWZU = 1403,
1419 LWZU8 = 1404,
1420 LWZUX = 1405,
1421 LWZUX8 = 1406,
1422 LWZX = 1407,
1423 LWZX8 = 1408,
1424 LWZXTLS = 1409,
1425 LWZXTLS_ = 1410,
1426 LWZXTLS_32 = 1411,
1427 LWZtoc = 1412,
1428 LWZtocL = 1413,
1429 LXSD = 1414,
1430 LXSDX = 1415,
1431 LXSIBZX = 1416,
1432 LXSIHZX = 1417,
1433 LXSIWAX = 1418,
1434 LXSIWZX = 1419,
1435 LXSSP = 1420,
1436 LXSSPX = 1421,
1437 LXV = 1422,
1438 LXVB16X = 1423,
1439 LXVD2X = 1424,
1440 LXVDSX = 1425,
1441 LXVH8X = 1426,
1442 LXVKQ = 1427,
1443 LXVL = 1428,
1444 LXVLL = 1429,
1445 LXVP = 1430,
1446 LXVPRL = 1431,
1447 LXVPRLL = 1432,
1448 LXVPX = 1433,
1449 LXVRBX = 1434,
1450 LXVRDX = 1435,
1451 LXVRHX = 1436,
1452 LXVRL = 1437,
1453 LXVRLL = 1438,
1454 LXVRWX = 1439,
1455 LXVW4X = 1440,
1456 LXVWSX = 1441,
1457 LXVX = 1442,
1458 MADDHD = 1443,
1459 MADDHDU = 1444,
1460 MADDLD = 1445,
1461 MADDLD8 = 1446,
1462 MBAR = 1447,
1463 MCRF = 1448,
1464 MCRFS = 1449,
1465 MCRXRX = 1450,
1466 MFBHRBE = 1451,
1467 MFCR = 1452,
1468 MFCR8 = 1453,
1469 MFCTR = 1454,
1470 MFCTR8 = 1455,
1471 MFDCR = 1456,
1472 MFFS = 1457,
1473 MFFSCDRN = 1458,
1474 MFFSCDRNI = 1459,
1475 MFFSCE = 1460,
1476 MFFSCRN = 1461,
1477 MFFSCRNI = 1462,
1478 MFFSL = 1463,
1479 MFFS_rec = 1464,
1480 MFLR = 1465,
1481 MFLR8 = 1466,
1482 MFMSR = 1467,
1483 MFOCRF = 1468,
1484 MFOCRF8 = 1469,
1485 MFPMR = 1470,
1486 MFSPR = 1471,
1487 MFSPR8 = 1472,
1488 MFSR = 1473,
1489 MFSRIN = 1474,
1490 MFTB = 1475,
1491 MFTB8 = 1476,
1492 MFUDSCR = 1477,
1493 MFVRD = 1478,
1494 MFVRSAVE = 1479,
1495 MFVRSAVEv = 1480,
1496 MFVRWZ = 1481,
1497 MFVSCR = 1482,
1498 MFVSRD = 1483,
1499 MFVSRLD = 1484,
1500 MFVSRWZ = 1485,
1501 MODSD = 1486,
1502 MODSW = 1487,
1503 MODUD = 1488,
1504 MODUW = 1489,
1505 MSGSYNC = 1490,
1506 MSYNC = 1491,
1507 MTCRF = 1492,
1508 MTCRF8 = 1493,
1509 MTCTR = 1494,
1510 MTCTR8 = 1495,
1511 MTCTR8loop = 1496,
1512 MTCTRloop = 1497,
1513 MTDCR = 1498,
1514 MTFSB0 = 1499,
1515 MTFSB1 = 1500,
1516 MTFSF = 1501,
1517 MTFSFI = 1502,
1518 MTFSFI_rec = 1503,
1519 MTFSFIb = 1504,
1520 MTFSF_rec = 1505,
1521 MTFSFb = 1506,
1522 MTLR = 1507,
1523 MTLR8 = 1508,
1524 MTMSR = 1509,
1525 MTMSRD = 1510,
1526 MTOCRF = 1511,
1527 MTOCRF8 = 1512,
1528 MTPMR = 1513,
1529 MTSPR = 1514,
1530 MTSPR8 = 1515,
1531 MTSR = 1516,
1532 MTSRIN = 1517,
1533 MTUDSCR = 1518,
1534 MTVRD = 1519,
1535 MTVRSAVE = 1520,
1536 MTVRSAVEv = 1521,
1537 MTVRWA = 1522,
1538 MTVRWZ = 1523,
1539 MTVSCR = 1524,
1540 MTVSRBM = 1525,
1541 MTVSRBMI = 1526,
1542 MTVSRD = 1527,
1543 MTVSRDD = 1528,
1544 MTVSRDM = 1529,
1545 MTVSRHM = 1530,
1546 MTVSRQM = 1531,
1547 MTVSRWA = 1532,
1548 MTVSRWM = 1533,
1549 MTVSRWS = 1534,
1550 MTVSRWZ = 1535,
1551 MULHD = 1536,
1552 MULHDU = 1537,
1553 MULHDU_rec = 1538,
1554 MULHD_rec = 1539,
1555 MULHW = 1540,
1556 MULHWU = 1541,
1557 MULHWU_rec = 1542,
1558 MULHW_rec = 1543,
1559 MULLD = 1544,
1560 MULLDO = 1545,
1561 MULLDO_rec = 1546,
1562 MULLD_rec = 1547,
1563 MULLI = 1548,
1564 MULLI8 = 1549,
1565 MULLW = 1550,
1566 MULLWO = 1551,
1567 MULLWO_rec = 1552,
1568 MULLW_rec = 1553,
1569 MoveGOTtoLR = 1554,
1570 MovePCtoLR = 1555,
1571 MovePCtoLR8 = 1556,
1572 NAND = 1557,
1573 NAND8 = 1558,
1574 NAND8_rec = 1559,
1575 NAND_rec = 1560,
1576 NAP = 1561,
1577 NEG = 1562,
1578 NEG8 = 1563,
1579 NEG8O = 1564,
1580 NEG8O_rec = 1565,
1581 NEG8_rec = 1566,
1582 NEGO = 1567,
1583 NEGO_rec = 1568,
1584 NEG_rec = 1569,
1585 NOP = 1570,
1586 NOP_GT_PWR6 = 1571,
1587 NOP_GT_PWR7 = 1572,
1588 NOR = 1573,
1589 NOR8 = 1574,
1590 NOR8_rec = 1575,
1591 NOR_rec = 1576,
1592 OR = 1577,
1593 OR8 = 1578,
1594 OR8_rec = 1579,
1595 ORC = 1580,
1596 ORC8 = 1581,
1597 ORC8_rec = 1582,
1598 ORC_rec = 1583,
1599 ORI = 1584,
1600 ORI8 = 1585,
1601 ORIS = 1586,
1602 ORIS8 = 1587,
1603 OR_rec = 1588,
1604 PADDI = 1589,
1605 PADDI8 = 1590,
1606 PADDI8pc = 1591,
1607 PADDIdtprel = 1592,
1608 PADDIpc = 1593,
1609 PDEPD = 1594,
1610 PEXTD = 1595,
1611 PLA = 1596,
1612 PLA8 = 1597,
1613 PLA8pc = 1598,
1614 PLApc = 1599,
1615 PLBZ = 1600,
1616 PLBZ8 = 1601,
1617 PLBZ8nopc = 1602,
1618 PLBZ8onlypc = 1603,
1619 PLBZ8pc = 1604,
1620 PLBZnopc = 1605,
1621 PLBZonlypc = 1606,
1622 PLBZpc = 1607,
1623 PLD = 1608,
1624 PLDnopc = 1609,
1625 PLDonlypc = 1610,
1626 PLDpc = 1611,
1627 PLFD = 1612,
1628 PLFDnopc = 1613,
1629 PLFDonlypc = 1614,
1630 PLFDpc = 1615,
1631 PLFS = 1616,
1632 PLFSnopc = 1617,
1633 PLFSonlypc = 1618,
1634 PLFSpc = 1619,
1635 PLHA = 1620,
1636 PLHA8 = 1621,
1637 PLHA8nopc = 1622,
1638 PLHA8onlypc = 1623,
1639 PLHA8pc = 1624,
1640 PLHAnopc = 1625,
1641 PLHAonlypc = 1626,
1642 PLHApc = 1627,
1643 PLHZ = 1628,
1644 PLHZ8 = 1629,
1645 PLHZ8nopc = 1630,
1646 PLHZ8onlypc = 1631,
1647 PLHZ8pc = 1632,
1648 PLHZnopc = 1633,
1649 PLHZonlypc = 1634,
1650 PLHZpc = 1635,
1651 PLI = 1636,
1652 PLI8 = 1637,
1653 PLWA = 1638,
1654 PLWA8 = 1639,
1655 PLWA8nopc = 1640,
1656 PLWA8onlypc = 1641,
1657 PLWA8pc = 1642,
1658 PLWAnopc = 1643,
1659 PLWAonlypc = 1644,
1660 PLWApc = 1645,
1661 PLWZ = 1646,
1662 PLWZ8 = 1647,
1663 PLWZ8nopc = 1648,
1664 PLWZ8onlypc = 1649,
1665 PLWZ8pc = 1650,
1666 PLWZnopc = 1651,
1667 PLWZonlypc = 1652,
1668 PLWZpc = 1653,
1669 PLXSD = 1654,
1670 PLXSDnopc = 1655,
1671 PLXSDonlypc = 1656,
1672 PLXSDpc = 1657,
1673 PLXSSP = 1658,
1674 PLXSSPnopc = 1659,
1675 PLXSSPonlypc = 1660,
1676 PLXSSPpc = 1661,
1677 PLXV = 1662,
1678 PLXVP = 1663,
1679 PLXVPnopc = 1664,
1680 PLXVPonlypc = 1665,
1681 PLXVPpc = 1666,
1682 PLXVnopc = 1667,
1683 PLXVonlypc = 1668,
1684 PLXVpc = 1669,
1685 PMXVBF16GER2 = 1670,
1686 PMXVBF16GER2NN = 1671,
1687 PMXVBF16GER2NP = 1672,
1688 PMXVBF16GER2PN = 1673,
1689 PMXVBF16GER2PP = 1674,
1690 PMXVBF16GER2W = 1675,
1691 PMXVBF16GER2WNN = 1676,
1692 PMXVBF16GER2WNP = 1677,
1693 PMXVBF16GER2WPN = 1678,
1694 PMXVBF16GER2WPP = 1679,
1695 PMXVF16GER2 = 1680,
1696 PMXVF16GER2NN = 1681,
1697 PMXVF16GER2NP = 1682,
1698 PMXVF16GER2PN = 1683,
1699 PMXVF16GER2PP = 1684,
1700 PMXVF16GER2W = 1685,
1701 PMXVF16GER2WNN = 1686,
1702 PMXVF16GER2WNP = 1687,
1703 PMXVF16GER2WPN = 1688,
1704 PMXVF16GER2WPP = 1689,
1705 PMXVF32GER = 1690,
1706 PMXVF32GERNN = 1691,
1707 PMXVF32GERNP = 1692,
1708 PMXVF32GERPN = 1693,
1709 PMXVF32GERPP = 1694,
1710 PMXVF32GERW = 1695,
1711 PMXVF32GERWNN = 1696,
1712 PMXVF32GERWNP = 1697,
1713 PMXVF32GERWPN = 1698,
1714 PMXVF32GERWPP = 1699,
1715 PMXVF64GER = 1700,
1716 PMXVF64GERNN = 1701,
1717 PMXVF64GERNP = 1702,
1718 PMXVF64GERPN = 1703,
1719 PMXVF64GERPP = 1704,
1720 PMXVF64GERW = 1705,
1721 PMXVF64GERWNN = 1706,
1722 PMXVF64GERWNP = 1707,
1723 PMXVF64GERWPN = 1708,
1724 PMXVF64GERWPP = 1709,
1725 PMXVI16GER2 = 1710,
1726 PMXVI16GER2PP = 1711,
1727 PMXVI16GER2S = 1712,
1728 PMXVI16GER2SPP = 1713,
1729 PMXVI16GER2SW = 1714,
1730 PMXVI16GER2SWPP = 1715,
1731 PMXVI16GER2W = 1716,
1732 PMXVI16GER2WPP = 1717,
1733 PMXVI4GER8 = 1718,
1734 PMXVI4GER8PP = 1719,
1735 PMXVI4GER8W = 1720,
1736 PMXVI4GER8WPP = 1721,
1737 PMXVI8GER4 = 1722,
1738 PMXVI8GER4PP = 1723,
1739 PMXVI8GER4SPP = 1724,
1740 PMXVI8GER4W = 1725,
1741 PMXVI8GER4WPP = 1726,
1742 PMXVI8GER4WSPP = 1727,
1743 POPCNTB = 1728,
1744 POPCNTB8 = 1729,
1745 POPCNTD = 1730,
1746 POPCNTW = 1731,
1747 PPC32GOT = 1732,
1748 PPC32PICGOT = 1733,
1749 PREPARE_PROBED_ALLOCA_32 = 1734,
1750 PREPARE_PROBED_ALLOCA_64 = 1735,
1751 PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32 = 1736,
1752 PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64 = 1737,
1753 PROBED_ALLOCA_32 = 1738,
1754 PROBED_ALLOCA_64 = 1739,
1755 PROBED_STACKALLOC_32 = 1740,
1756 PROBED_STACKALLOC_64 = 1741,
1757 PSTB = 1742,
1758 PSTB8 = 1743,
1759 PSTB8nopc = 1744,
1760 PSTB8onlypc = 1745,
1761 PSTB8pc = 1746,
1762 PSTBnopc = 1747,
1763 PSTBonlypc = 1748,
1764 PSTBpc = 1749,
1765 PSTD = 1750,
1766 PSTDnopc = 1751,
1767 PSTDonlypc = 1752,
1768 PSTDpc = 1753,
1769 PSTFD = 1754,
1770 PSTFDnopc = 1755,
1771 PSTFDonlypc = 1756,
1772 PSTFDpc = 1757,
1773 PSTFS = 1758,
1774 PSTFSnopc = 1759,
1775 PSTFSonlypc = 1760,
1776 PSTFSpc = 1761,
1777 PSTH = 1762,
1778 PSTH8 = 1763,
1779 PSTH8nopc = 1764,
1780 PSTH8onlypc = 1765,
1781 PSTH8pc = 1766,
1782 PSTHnopc = 1767,
1783 PSTHonlypc = 1768,
1784 PSTHpc = 1769,
1785 PSTW = 1770,
1786 PSTW8 = 1771,
1787 PSTW8nopc = 1772,
1788 PSTW8onlypc = 1773,
1789 PSTW8pc = 1774,
1790 PSTWnopc = 1775,
1791 PSTWonlypc = 1776,
1792 PSTWpc = 1777,
1793 PSTXSD = 1778,
1794 PSTXSDnopc = 1779,
1795 PSTXSDonlypc = 1780,
1796 PSTXSDpc = 1781,
1797 PSTXSSP = 1782,
1798 PSTXSSPnopc = 1783,
1799 PSTXSSPonlypc = 1784,
1800 PSTXSSPpc = 1785,
1801 PSTXV = 1786,
1802 PSTXVP = 1787,
1803 PSTXVPnopc = 1788,
1804 PSTXVPonlypc = 1789,
1805 PSTXVPpc = 1790,
1806 PSTXVnopc = 1791,
1807 PSTXVonlypc = 1792,
1808 PSTXVpc = 1793,
1809 PseudoEIEIO = 1794,
1810 RESTORE_ACC = 1795,
1811 RESTORE_CR = 1796,
1812 RESTORE_CRBIT = 1797,
1813 RESTORE_QUADWORD = 1798,
1814 RESTORE_UACC = 1799,
1815 RESTORE_WACC = 1800,
1816 RFCI = 1801,
1817 RFDI = 1802,
1818 RFEBB = 1803,
1819 RFI = 1804,
1820 RFID = 1805,
1821 RFMCI = 1806,
1822 RLDCL = 1807,
1823 RLDCL_rec = 1808,
1824 RLDCR = 1809,
1825 RLDCR_rec = 1810,
1826 RLDIC = 1811,
1827 RLDICL = 1812,
1828 RLDICL_32 = 1813,
1829 RLDICL_32_64 = 1814,
1830 RLDICL_32_rec = 1815,
1831 RLDICL_rec = 1816,
1832 RLDICR = 1817,
1833 RLDICR_32 = 1818,
1834 RLDICR_rec = 1819,
1835 RLDIC_rec = 1820,
1836 RLDIMI = 1821,
1837 RLDIMI_rec = 1822,
1838 RLWIMI = 1823,
1839 RLWIMI8 = 1824,
1840 RLWIMI8_rec = 1825,
1841 RLWIMI_rec = 1826,
1842 RLWINM = 1827,
1843 RLWINM8 = 1828,
1844 RLWINM8_rec = 1829,
1845 RLWINM_rec = 1830,
1846 RLWNM = 1831,
1847 RLWNM8 = 1832,
1848 RLWNM8_rec = 1833,
1849 RLWNM_rec = 1834,
1850 ReadTB = 1835,
1851 SC = 1836,
1852 SCV = 1837,
1853 SELECT_CC_F16 = 1838,
1854 SELECT_CC_F4 = 1839,
1855 SELECT_CC_F8 = 1840,
1856 SELECT_CC_I4 = 1841,
1857 SELECT_CC_I8 = 1842,
1858 SELECT_CC_SPE = 1843,
1859 SELECT_CC_SPE4 = 1844,
1860 SELECT_CC_VRRC = 1845,
1861 SELECT_CC_VSFRC = 1846,
1862 SELECT_CC_VSRC = 1847,
1863 SELECT_CC_VSSRC = 1848,
1864 SELECT_F16 = 1849,
1865 SELECT_F4 = 1850,
1866 SELECT_F8 = 1851,
1867 SELECT_I4 = 1852,
1868 SELECT_I8 = 1853,
1869 SELECT_SPE = 1854,
1870 SELECT_SPE4 = 1855,
1871 SELECT_VRRC = 1856,
1872 SELECT_VSFRC = 1857,
1873 SELECT_VSRC = 1858,
1874 SELECT_VSSRC = 1859,
1875 SETB = 1860,
1876 SETB8 = 1861,
1877 SETBC = 1862,
1878 SETBC8 = 1863,
1879 SETBCR = 1864,
1880 SETBCR8 = 1865,
1881 SETFLM = 1866,
1882 SETNBC = 1867,
1883 SETNBC8 = 1868,
1884 SETNBCR = 1869,
1885 SETNBCR8 = 1870,
1886 SETRND = 1871,
1887 SETRNDi = 1872,
1888 SLBFEE_rec = 1873,
1889 SLBIA = 1874,
1890 SLBIE = 1875,
1891 SLBIEG = 1876,
1892 SLBMFEE = 1877,
1893 SLBMFEV = 1878,
1894 SLBMTE = 1879,
1895 SLBSYNC = 1880,
1896 SLD = 1881,
1897 SLD_rec = 1882,
1898 SLW = 1883,
1899 SLW8 = 1884,
1900 SLW8_rec = 1885,
1901 SLW_rec = 1886,
1902 SPELWZ = 1887,
1903 SPELWZX = 1888,
1904 SPESTW = 1889,
1905 SPESTWX = 1890,
1906 SPILL_ACC = 1891,
1907 SPILL_CR = 1892,
1908 SPILL_CRBIT = 1893,
1909 SPILL_QUADWORD = 1894,
1910 SPILL_UACC = 1895,
1911 SPILL_WACC = 1896,
1912 SPLIT_QUADWORD = 1897,
1913 SRAD = 1898,
1914 SRADI = 1899,
1915 SRADI_32 = 1900,
1916 SRADI_rec = 1901,
1917 SRAD_rec = 1902,
1918 SRAW = 1903,
1919 SRAWI = 1904,
1920 SRAWI_rec = 1905,
1921 SRAW_rec = 1906,
1922 SRD = 1907,
1923 SRD_rec = 1908,
1924 SRW = 1909,
1925 SRW8 = 1910,
1926 SRW8_rec = 1911,
1927 SRW_rec = 1912,
1928 STB = 1913,
1929 STB8 = 1914,
1930 STBCIX = 1915,
1931 STBCX = 1916,
1932 STBEPX = 1917,
1933 STBU = 1918,
1934 STBU8 = 1919,
1935 STBUX = 1920,
1936 STBUX8 = 1921,
1937 STBX = 1922,
1938 STBX8 = 1923,
1939 STBXTLS = 1924,
1940 STBXTLS_ = 1925,
1941 STBXTLS_32 = 1926,
1942 STD = 1927,
1943 STDAT = 1928,
1944 STDBRX = 1929,
1945 STDCIX = 1930,
1946 STDCX = 1931,
1947 STDU = 1932,
1948 STDUX = 1933,
1949 STDX = 1934,
1950 STDXTLS = 1935,
1951 STDXTLS_ = 1936,
1952 STFD = 1937,
1953 STFDEPX = 1938,
1954 STFDU = 1939,
1955 STFDUX = 1940,
1956 STFDX = 1941,
1957 STFDXTLS = 1942,
1958 STFDXTLS_ = 1943,
1959 STFIWX = 1944,
1960 STFS = 1945,
1961 STFSU = 1946,
1962 STFSUX = 1947,
1963 STFSX = 1948,
1964 STFSXTLS = 1949,
1965 STFSXTLS_ = 1950,
1966 STH = 1951,
1967 STH8 = 1952,
1968 STHBRX = 1953,
1969 STHCIX = 1954,
1970 STHCX = 1955,
1971 STHEPX = 1956,
1972 STHU = 1957,
1973 STHU8 = 1958,
1974 STHUX = 1959,
1975 STHUX8 = 1960,
1976 STHX = 1961,
1977 STHX8 = 1962,
1978 STHXTLS = 1963,
1979 STHXTLS_ = 1964,
1980 STHXTLS_32 = 1965,
1981 STMW = 1966,
1982 STOP = 1967,
1983 STQ = 1968,
1984 STQCX = 1969,
1985 STQX_PSEUDO = 1970,
1986 STSWI = 1971,
1987 STVEBX = 1972,
1988 STVEHX = 1973,
1989 STVEWX = 1974,
1990 STVX = 1975,
1991 STVXL = 1976,
1992 STW = 1977,
1993 STW8 = 1978,
1994 STWAT = 1979,
1995 STWBRX = 1980,
1996 STWCIX = 1981,
1997 STWCX = 1982,
1998 STWEPX = 1983,
1999 STWU = 1984,
2000 STWU8 = 1985,
2001 STWUX = 1986,
2002 STWUX8 = 1987,
2003 STWX = 1988,
2004 STWX8 = 1989,
2005 STWXTLS = 1990,
2006 STWXTLS_ = 1991,
2007 STWXTLS_32 = 1992,
2008 STXSD = 1993,
2009 STXSDX = 1994,
2010 STXSIBX = 1995,
2011 STXSIBXv = 1996,
2012 STXSIHX = 1997,
2013 STXSIHXv = 1998,
2014 STXSIWX = 1999,
2015 STXSSP = 2000,
2016 STXSSPX = 2001,
2017 STXV = 2002,
2018 STXVB16X = 2003,
2019 STXVD2X = 2004,
2020 STXVH8X = 2005,
2021 STXVL = 2006,
2022 STXVLL = 2007,
2023 STXVP = 2008,
2024 STXVPRL = 2009,
2025 STXVPRLL = 2010,
2026 STXVPX = 2011,
2027 STXVRBX = 2012,
2028 STXVRDX = 2013,
2029 STXVRHX = 2014,
2030 STXVRL = 2015,
2031 STXVRLL = 2016,
2032 STXVRWX = 2017,
2033 STXVW4X = 2018,
2034 STXVX = 2019,
2035 SUBF = 2020,
2036 SUBF8 = 2021,
2037 SUBF8O = 2022,
2038 SUBF8O_rec = 2023,
2039 SUBF8_rec = 2024,
2040 SUBFC = 2025,
2041 SUBFC8 = 2026,
2042 SUBFC8O = 2027,
2043 SUBFC8O_rec = 2028,
2044 SUBFC8_rec = 2029,
2045 SUBFCO = 2030,
2046 SUBFCO_rec = 2031,
2047 SUBFC_rec = 2032,
2048 SUBFE = 2033,
2049 SUBFE8 = 2034,
2050 SUBFE8O = 2035,
2051 SUBFE8O_rec = 2036,
2052 SUBFE8_rec = 2037,
2053 SUBFEO = 2038,
2054 SUBFEO_rec = 2039,
2055 SUBFE_rec = 2040,
2056 SUBFIC = 2041,
2057 SUBFIC8 = 2042,
2058 SUBFME = 2043,
2059 SUBFME8 = 2044,
2060 SUBFME8O = 2045,
2061 SUBFME8O_rec = 2046,
2062 SUBFME8_rec = 2047,
2063 SUBFMEO = 2048,
2064 SUBFMEO_rec = 2049,
2065 SUBFME_rec = 2050,
2066 SUBFO = 2051,
2067 SUBFO_rec = 2052,
2068 SUBFUS = 2053,
2069 SUBFUS_rec = 2054,
2070 SUBFZE = 2055,
2071 SUBFZE8 = 2056,
2072 SUBFZE8O = 2057,
2073 SUBFZE8O_rec = 2058,
2074 SUBFZE8_rec = 2059,
2075 SUBFZEO = 2060,
2076 SUBFZEO_rec = 2061,
2077 SUBFZE_rec = 2062,
2078 SUBF_rec = 2063,
2079 SYNC = 2064,
2080 SYNCP10 = 2065,
2081 TABORT = 2066,
2082 TABORTDC = 2067,
2083 TABORTDCI = 2068,
2084 TABORTWC = 2069,
2085 TABORTWCI = 2070,
2086 TAILB = 2071,
2087 TAILB8 = 2072,
2088 TAILBA = 2073,
2089 TAILBA8 = 2074,
2090 TAILBCTR = 2075,
2091 TAILBCTR8 = 2076,
2092 TBEGIN = 2077,
2093 TBEGIN_RET = 2078,
2094 TCHECK = 2079,
2095 TCHECK_RET = 2080,
2096 TCRETURNai = 2081,
2097 TCRETURNai8 = 2082,
2098 TCRETURNdi = 2083,
2099 TCRETURNdi8 = 2084,
2100 TCRETURNri = 2085,
2101 TCRETURNri8 = 2086,
2102 TD = 2087,
2103 TDI = 2088,
2104 TEND = 2089,
2105 TLBIA = 2090,
2106 TLBIE = 2091,
2107 TLBIEL = 2092,
2108 TLBILX = 2093,
2109 TLBIVAX = 2094,
2110 TLBLD = 2095,
2111 TLBLI = 2096,
2112 TLBRE = 2097,
2113 TLBRE2 = 2098,
2114 TLBSX = 2099,
2115 TLBSX2 = 2100,
2116 TLBSX2D = 2101,
2117 TLBSYNC = 2102,
2118 TLBWE = 2103,
2119 TLBWE2 = 2104,
2120 TLSGDAIX = 2105,
2121 TLSGDAIX8 = 2106,
2122 TLSLDAIX = 2107,
2123 TLSLDAIX8 = 2108,
2124 TRAP = 2109,
2125 TRECHKPT = 2110,
2126 TRECLAIM = 2111,
2127 TSR = 2112,
2128 TW = 2113,
2129 TWI = 2114,
2130 UNENCODED_NOP = 2115,
2131 UpdateGBR = 2116,
2132 VABSDUB = 2117,
2133 VABSDUH = 2118,
2134 VABSDUW = 2119,
2135 VADDCUQ = 2120,
2136 VADDCUW = 2121,
2137 VADDECUQ = 2122,
2138 VADDEUQM = 2123,
2139 VADDFP = 2124,
2140 VADDSBS = 2125,
2141 VADDSHS = 2126,
2142 VADDSWS = 2127,
2143 VADDUBM = 2128,
2144 VADDUBS = 2129,
2145 VADDUDM = 2130,
2146 VADDUHM = 2131,
2147 VADDUHS = 2132,
2148 VADDUQM = 2133,
2149 VADDUWM = 2134,
2150 VADDUWS = 2135,
2151 VAND = 2136,
2152 VANDC = 2137,
2153 VAVGSB = 2138,
2154 VAVGSH = 2139,
2155 VAVGSW = 2140,
2156 VAVGUB = 2141,
2157 VAVGUH = 2142,
2158 VAVGUW = 2143,
2159 VBPERMD = 2144,
2160 VBPERMQ = 2145,
2161 VCFSX = 2146,
2162 VCFSX_0 = 2147,
2163 VCFUGED = 2148,
2164 VCFUX = 2149,
2165 VCFUX_0 = 2150,
2166 VCIPHER = 2151,
2167 VCIPHERLAST = 2152,
2168 VCLRLB = 2153,
2169 VCLRRB = 2154,
2170 VCLZB = 2155,
2171 VCLZD = 2156,
2172 VCLZDM = 2157,
2173 VCLZH = 2158,
2174 VCLZLSBB = 2159,
2175 VCLZW = 2160,
2176 VCMPBFP = 2161,
2177 VCMPBFP_rec = 2162,
2178 VCMPEQFP = 2163,
2179 VCMPEQFP_rec = 2164,
2180 VCMPEQUB = 2165,
2181 VCMPEQUB_rec = 2166,
2182 VCMPEQUD = 2167,
2183 VCMPEQUD_rec = 2168,
2184 VCMPEQUH = 2169,
2185 VCMPEQUH_rec = 2170,
2186 VCMPEQUQ = 2171,
2187 VCMPEQUQ_rec = 2172,
2188 VCMPEQUW = 2173,
2189 VCMPEQUW_rec = 2174,
2190 VCMPGEFP = 2175,
2191 VCMPGEFP_rec = 2176,
2192 VCMPGTFP = 2177,
2193 VCMPGTFP_rec = 2178,
2194 VCMPGTSB = 2179,
2195 VCMPGTSB_rec = 2180,
2196 VCMPGTSD = 2181,
2197 VCMPGTSD_rec = 2182,
2198 VCMPGTSH = 2183,
2199 VCMPGTSH_rec = 2184,
2200 VCMPGTSQ = 2185,
2201 VCMPGTSQ_rec = 2186,
2202 VCMPGTSW = 2187,
2203 VCMPGTSW_rec = 2188,
2204 VCMPGTUB = 2189,
2205 VCMPGTUB_rec = 2190,
2206 VCMPGTUD = 2191,
2207 VCMPGTUD_rec = 2192,
2208 VCMPGTUH = 2193,
2209 VCMPGTUH_rec = 2194,
2210 VCMPGTUQ = 2195,
2211 VCMPGTUQ_rec = 2196,
2212 VCMPGTUW = 2197,
2213 VCMPGTUW_rec = 2198,
2214 VCMPNEB = 2199,
2215 VCMPNEB_rec = 2200,
2216 VCMPNEH = 2201,
2217 VCMPNEH_rec = 2202,
2218 VCMPNEW = 2203,
2219 VCMPNEW_rec = 2204,
2220 VCMPNEZB = 2205,
2221 VCMPNEZB_rec = 2206,
2222 VCMPNEZH = 2207,
2223 VCMPNEZH_rec = 2208,
2224 VCMPNEZW = 2209,
2225 VCMPNEZW_rec = 2210,
2226 VCMPSQ = 2211,
2227 VCMPUQ = 2212,
2228 VCNTMBB = 2213,
2229 VCNTMBD = 2214,
2230 VCNTMBH = 2215,
2231 VCNTMBW = 2216,
2232 VCTSXS = 2217,
2233 VCTSXS_0 = 2218,
2234 VCTUXS = 2219,
2235 VCTUXS_0 = 2220,
2236 VCTZB = 2221,
2237 VCTZD = 2222,
2238 VCTZDM = 2223,
2239 VCTZH = 2224,
2240 VCTZLSBB = 2225,
2241 VCTZW = 2226,
2242 VDIVESD = 2227,
2243 VDIVESQ = 2228,
2244 VDIVESW = 2229,
2245 VDIVEUD = 2230,
2246 VDIVEUQ = 2231,
2247 VDIVEUW = 2232,
2248 VDIVSD = 2233,
2249 VDIVSQ = 2234,
2250 VDIVSW = 2235,
2251 VDIVUD = 2236,
2252 VDIVUQ = 2237,
2253 VDIVUW = 2238,
2254 VEQV = 2239,
2255 VEXPANDBM = 2240,
2256 VEXPANDDM = 2241,
2257 VEXPANDHM = 2242,
2258 VEXPANDQM = 2243,
2259 VEXPANDWM = 2244,
2260 VEXPTEFP = 2245,
2261 VEXTDDVLX = 2246,
2262 VEXTDDVRX = 2247,
2263 VEXTDUBVLX = 2248,
2264 VEXTDUBVRX = 2249,
2265 VEXTDUHVLX = 2250,
2266 VEXTDUHVRX = 2251,
2267 VEXTDUWVLX = 2252,
2268 VEXTDUWVRX = 2253,
2269 VEXTRACTBM = 2254,
2270 VEXTRACTD = 2255,
2271 VEXTRACTDM = 2256,
2272 VEXTRACTHM = 2257,
2273 VEXTRACTQM = 2258,
2274 VEXTRACTUB = 2259,
2275 VEXTRACTUH = 2260,
2276 VEXTRACTUW = 2261,
2277 VEXTRACTWM = 2262,
2278 VEXTSB2D = 2263,
2279 VEXTSB2Ds = 2264,
2280 VEXTSB2W = 2265,
2281 VEXTSB2Ws = 2266,
2282 VEXTSD2Q = 2267,
2283 VEXTSH2D = 2268,
2284 VEXTSH2Ds = 2269,
2285 VEXTSH2W = 2270,
2286 VEXTSH2Ws = 2271,
2287 VEXTSW2D = 2272,
2288 VEXTSW2Ds = 2273,
2289 VEXTUBLX = 2274,
2290 VEXTUBRX = 2275,
2291 VEXTUHLX = 2276,
2292 VEXTUHRX = 2277,
2293 VEXTUWLX = 2278,
2294 VEXTUWRX = 2279,
2295 VGBBD = 2280,
2296 VGNB = 2281,
2297 VINSBLX = 2282,
2298 VINSBRX = 2283,
2299 VINSBVLX = 2284,
2300 VINSBVRX = 2285,
2301 VINSD = 2286,
2302 VINSDLX = 2287,
2303 VINSDRX = 2288,
2304 VINSERTB = 2289,
2305 VINSERTD = 2290,
2306 VINSERTH = 2291,
2307 VINSERTW = 2292,
2308 VINSHLX = 2293,
2309 VINSHRX = 2294,
2310 VINSHVLX = 2295,
2311 VINSHVRX = 2296,
2312 VINSW = 2297,
2313 VINSWLX = 2298,
2314 VINSWRX = 2299,
2315 VINSWVLX = 2300,
2316 VINSWVRX = 2301,
2317 VLOGEFP = 2302,
2318 VMADDFP = 2303,
2319 VMAXFP = 2304,
2320 VMAXSB = 2305,
2321 VMAXSD = 2306,
2322 VMAXSH = 2307,
2323 VMAXSW = 2308,
2324 VMAXUB = 2309,
2325 VMAXUD = 2310,
2326 VMAXUH = 2311,
2327 VMAXUW = 2312,
2328 VMHADDSHS = 2313,
2329 VMHRADDSHS = 2314,
2330 VMINFP = 2315,
2331 VMINSB = 2316,
2332 VMINSD = 2317,
2333 VMINSH = 2318,
2334 VMINSW = 2319,
2335 VMINUB = 2320,
2336 VMINUD = 2321,
2337 VMINUH = 2322,
2338 VMINUW = 2323,
2339 VMLADDUHM = 2324,
2340 VMODSD = 2325,
2341 VMODSQ = 2326,
2342 VMODSW = 2327,
2343 VMODUD = 2328,
2344 VMODUQ = 2329,
2345 VMODUW = 2330,
2346 VMRGEW = 2331,
2347 VMRGHB = 2332,
2348 VMRGHH = 2333,
2349 VMRGHW = 2334,
2350 VMRGLB = 2335,
2351 VMRGLH = 2336,
2352 VMRGLW = 2337,
2353 VMRGOW = 2338,
2354 VMSUMCUD = 2339,
2355 VMSUMMBM = 2340,
2356 VMSUMSHM = 2341,
2357 VMSUMSHS = 2342,
2358 VMSUMUBM = 2343,
2359 VMSUMUDM = 2344,
2360 VMSUMUHM = 2345,
2361 VMSUMUHS = 2346,
2362 VMUL10CUQ = 2347,
2363 VMUL10ECUQ = 2348,
2364 VMUL10EUQ = 2349,
2365 VMUL10UQ = 2350,
2366 VMULESB = 2351,
2367 VMULESD = 2352,
2368 VMULESH = 2353,
2369 VMULESW = 2354,
2370 VMULEUB = 2355,
2371 VMULEUD = 2356,
2372 VMULEUH = 2357,
2373 VMULEUW = 2358,
2374 VMULHSD = 2359,
2375 VMULHSW = 2360,
2376 VMULHUD = 2361,
2377 VMULHUW = 2362,
2378 VMULLD = 2363,
2379 VMULOSB = 2364,
2380 VMULOSD = 2365,
2381 VMULOSH = 2366,
2382 VMULOSW = 2367,
2383 VMULOUB = 2368,
2384 VMULOUD = 2369,
2385 VMULOUH = 2370,
2386 VMULOUW = 2371,
2387 VMULUWM = 2372,
2388 VNAND = 2373,
2389 VNCIPHER = 2374,
2390 VNCIPHERLAST = 2375,
2391 VNEGD = 2376,
2392 VNEGW = 2377,
2393 VNMSUBFP = 2378,
2394 VNOR = 2379,
2395 VOR = 2380,
2396 VORC = 2381,
2397 VPDEPD = 2382,
2398 VPERM = 2383,
2399 VPERMR = 2384,
2400 VPERMXOR = 2385,
2401 VPEXTD = 2386,
2402 VPKPX = 2387,
2403 VPKSDSS = 2388,
2404 VPKSDUS = 2389,
2405 VPKSHSS = 2390,
2406 VPKSHUS = 2391,
2407 VPKSWSS = 2392,
2408 VPKSWUS = 2393,
2409 VPKUDUM = 2394,
2410 VPKUDUS = 2395,
2411 VPKUHUM = 2396,
2412 VPKUHUS = 2397,
2413 VPKUWUM = 2398,
2414 VPKUWUS = 2399,
2415 VPMSUMB = 2400,
2416 VPMSUMD = 2401,
2417 VPMSUMH = 2402,
2418 VPMSUMW = 2403,
2419 VPOPCNTB = 2404,
2420 VPOPCNTD = 2405,
2421 VPOPCNTH = 2406,
2422 VPOPCNTW = 2407,
2423 VPRTYBD = 2408,
2424 VPRTYBQ = 2409,
2425 VPRTYBW = 2410,
2426 VREFP = 2411,
2427 VRFIM = 2412,
2428 VRFIN = 2413,
2429 VRFIP = 2414,
2430 VRFIZ = 2415,
2431 VRLB = 2416,
2432 VRLD = 2417,
2433 VRLDMI = 2418,
2434 VRLDNM = 2419,
2435 VRLH = 2420,
2436 VRLQ = 2421,
2437 VRLQMI = 2422,
2438 VRLQNM = 2423,
2439 VRLW = 2424,
2440 VRLWMI = 2425,
2441 VRLWNM = 2426,
2442 VRSQRTEFP = 2427,
2443 VSBOX = 2428,
2444 VSEL = 2429,
2445 VSHASIGMAD = 2430,
2446 VSHASIGMAW = 2431,
2447 VSL = 2432,
2448 VSLB = 2433,
2449 VSLD = 2434,
2450 VSLDBI = 2435,
2451 VSLDOI = 2436,
2452 VSLH = 2437,
2453 VSLO = 2438,
2454 VSLQ = 2439,
2455 VSLV = 2440,
2456 VSLW = 2441,
2457 VSPLTB = 2442,
2458 VSPLTBs = 2443,
2459 VSPLTH = 2444,
2460 VSPLTHs = 2445,
2461 VSPLTISB = 2446,
2462 VSPLTISH = 2447,
2463 VSPLTISW = 2448,
2464 VSPLTW = 2449,
2465 VSR = 2450,
2466 VSRAB = 2451,
2467 VSRAD = 2452,
2468 VSRAH = 2453,
2469 VSRAQ = 2454,
2470 VSRAW = 2455,
2471 VSRB = 2456,
2472 VSRD = 2457,
2473 VSRDBI = 2458,
2474 VSRH = 2459,
2475 VSRO = 2460,
2476 VSRQ = 2461,
2477 VSRV = 2462,
2478 VSRW = 2463,
2479 VSTRIBL = 2464,
2480 VSTRIBL_rec = 2465,
2481 VSTRIBR = 2466,
2482 VSTRIBR_rec = 2467,
2483 VSTRIHL = 2468,
2484 VSTRIHL_rec = 2469,
2485 VSTRIHR = 2470,
2486 VSTRIHR_rec = 2471,
2487 VSUBCUQ = 2472,
2488 VSUBCUW = 2473,
2489 VSUBECUQ = 2474,
2490 VSUBEUQM = 2475,
2491 VSUBFP = 2476,
2492 VSUBSBS = 2477,
2493 VSUBSHS = 2478,
2494 VSUBSWS = 2479,
2495 VSUBUBM = 2480,
2496 VSUBUBS = 2481,
2497 VSUBUDM = 2482,
2498 VSUBUHM = 2483,
2499 VSUBUHS = 2484,
2500 VSUBUQM = 2485,
2501 VSUBUWM = 2486,
2502 VSUBUWS = 2487,
2503 VSUM2SWS = 2488,
2504 VSUM4SBS = 2489,
2505 VSUM4SHS = 2490,
2506 VSUM4UBS = 2491,
2507 VSUMSWS = 2492,
2508 VUPKHPX = 2493,
2509 VUPKHSB = 2494,
2510 VUPKHSH = 2495,
2511 VUPKHSW = 2496,
2512 VUPKLPX = 2497,
2513 VUPKLSB = 2498,
2514 VUPKLSH = 2499,
2515 VUPKLSW = 2500,
2516 VXOR = 2501,
2517 V_SET0 = 2502,
2518 V_SET0B = 2503,
2519 V_SET0H = 2504,
2520 V_SETALLONES = 2505,
2521 V_SETALLONESB = 2506,
2522 V_SETALLONESH = 2507,
2523 WAIT = 2508,
2524 WAITP10 = 2509,
2525 WRTEE = 2510,
2526 WRTEEI = 2511,
2527 XOR = 2512,
2528 XOR8 = 2513,
2529 XOR8_rec = 2514,
2530 XORI = 2515,
2531 XORI8 = 2516,
2532 XORIS = 2517,
2533 XORIS8 = 2518,
2534 XOR_rec = 2519,
2535 XSABSDP = 2520,
2536 XSABSQP = 2521,
2537 XSADDDP = 2522,
2538 XSADDQP = 2523,
2539 XSADDQPO = 2524,
2540 XSADDSP = 2525,
2541 XSCMPEQDP = 2526,
2542 XSCMPEQQP = 2527,
2543 XSCMPEXPDP = 2528,
2544 XSCMPEXPQP = 2529,
2545 XSCMPGEDP = 2530,
2546 XSCMPGEQP = 2531,
2547 XSCMPGTDP = 2532,
2548 XSCMPGTQP = 2533,
2549 XSCMPODP = 2534,
2550 XSCMPOQP = 2535,
2551 XSCMPUDP = 2536,
2552 XSCMPUQP = 2537,
2553 XSCPSGNDP = 2538,
2554 XSCPSGNQP = 2539,
2555 XSCVDPHP = 2540,
2556 XSCVDPQP = 2541,
2557 XSCVDPSP = 2542,
2558 XSCVDPSPN = 2543,
2559 XSCVDPSXDS = 2544,
2560 XSCVDPSXDSs = 2545,
2561 XSCVDPSXWS = 2546,
2562 XSCVDPSXWSs = 2547,
2563 XSCVDPUXDS = 2548,
2564 XSCVDPUXDSs = 2549,
2565 XSCVDPUXWS = 2550,
2566 XSCVDPUXWSs = 2551,
2567 XSCVHPDP = 2552,
2568 XSCVQPDP = 2553,
2569 XSCVQPDPO = 2554,
2570 XSCVQPSDZ = 2555,
2571 XSCVQPSQZ = 2556,
2572 XSCVQPSWZ = 2557,
2573 XSCVQPUDZ = 2558,
2574 XSCVQPUQZ = 2559,
2575 XSCVQPUWZ = 2560,
2576 XSCVSDQP = 2561,
2577 XSCVSPDP = 2562,
2578 XSCVSPDPN = 2563,
2579 XSCVSQQP = 2564,
2580 XSCVSXDDP = 2565,
2581 XSCVSXDSP = 2566,
2582 XSCVUDQP = 2567,
2583 XSCVUQQP = 2568,
2584 XSCVUXDDP = 2569,
2585 XSCVUXDSP = 2570,
2586 XSDIVDP = 2571,
2587 XSDIVQP = 2572,
2588 XSDIVQPO = 2573,
2589 XSDIVSP = 2574,
2590 XSIEXPDP = 2575,
2591 XSIEXPQP = 2576,
2592 XSMADDADP = 2577,
2593 XSMADDASP = 2578,
2594 XSMADDMDP = 2579,
2595 XSMADDMSP = 2580,
2596 XSMADDQP = 2581,
2597 XSMADDQPO = 2582,
2598 XSMAXCDP = 2583,
2599 XSMAXCQP = 2584,
2600 XSMAXDP = 2585,
2601 XSMAXJDP = 2586,
2602 XSMINCDP = 2587,
2603 XSMINCQP = 2588,
2604 XSMINDP = 2589,
2605 XSMINJDP = 2590,
2606 XSMSUBADP = 2591,
2607 XSMSUBASP = 2592,
2608 XSMSUBMDP = 2593,
2609 XSMSUBMSP = 2594,
2610 XSMSUBQP = 2595,
2611 XSMSUBQPO = 2596,
2612 XSMULDP = 2597,
2613 XSMULQP = 2598,
2614 XSMULQPO = 2599,
2615 XSMULSP = 2600,
2616 XSNABSDP = 2601,
2617 XSNABSDPs = 2602,
2618 XSNABSQP = 2603,
2619 XSNEGDP = 2604,
2620 XSNEGQP = 2605,
2621 XSNMADDADP = 2606,
2622 XSNMADDASP = 2607,
2623 XSNMADDMDP = 2608,
2624 XSNMADDMSP = 2609,
2625 XSNMADDQP = 2610,
2626 XSNMADDQPO = 2611,
2627 XSNMSUBADP = 2612,
2628 XSNMSUBASP = 2613,
2629 XSNMSUBMDP = 2614,
2630 XSNMSUBMSP = 2615,
2631 XSNMSUBQP = 2616,
2632 XSNMSUBQPO = 2617,
2633 XSRDPI = 2618,
2634 XSRDPIC = 2619,
2635 XSRDPIM = 2620,
2636 XSRDPIP = 2621,
2637 XSRDPIZ = 2622,
2638 XSREDP = 2623,
2639 XSRESP = 2624,
2640 XSRQPI = 2625,
2641 XSRQPIX = 2626,
2642 XSRQPXP = 2627,
2643 XSRSP = 2628,
2644 XSRSQRTEDP = 2629,
2645 XSRSQRTESP = 2630,
2646 XSSQRTDP = 2631,
2647 XSSQRTQP = 2632,
2648 XSSQRTQPO = 2633,
2649 XSSQRTSP = 2634,
2650 XSSUBDP = 2635,
2651 XSSUBQP = 2636,
2652 XSSUBQPO = 2637,
2653 XSSUBSP = 2638,
2654 XSTDIVDP = 2639,
2655 XSTSQRTDP = 2640,
2656 XSTSTDCDP = 2641,
2657 XSTSTDCQP = 2642,
2658 XSTSTDCSP = 2643,
2659 XSXEXPDP = 2644,
2660 XSXEXPQP = 2645,
2661 XSXSIGDP = 2646,
2662 XSXSIGQP = 2647,
2663 XVABSDP = 2648,
2664 XVABSSP = 2649,
2665 XVADDDP = 2650,
2666 XVADDSP = 2651,
2667 XVBF16GER2 = 2652,
2668 XVBF16GER2NN = 2653,
2669 XVBF16GER2NP = 2654,
2670 XVBF16GER2PN = 2655,
2671 XVBF16GER2PP = 2656,
2672 XVBF16GER2W = 2657,
2673 XVBF16GER2WNN = 2658,
2674 XVBF16GER2WNP = 2659,
2675 XVBF16GER2WPN = 2660,
2676 XVBF16GER2WPP = 2661,
2677 XVCMPEQDP = 2662,
2678 XVCMPEQDP_rec = 2663,
2679 XVCMPEQSP = 2664,
2680 XVCMPEQSP_rec = 2665,
2681 XVCMPGEDP = 2666,
2682 XVCMPGEDP_rec = 2667,
2683 XVCMPGESP = 2668,
2684 XVCMPGESP_rec = 2669,
2685 XVCMPGTDP = 2670,
2686 XVCMPGTDP_rec = 2671,
2687 XVCMPGTSP = 2672,
2688 XVCMPGTSP_rec = 2673,
2689 XVCPSGNDP = 2674,
2690 XVCPSGNSP = 2675,
2691 XVCVBF16SPN = 2676,
2692 XVCVDPSP = 2677,
2693 XVCVDPSXDS = 2678,
2694 XVCVDPSXWS = 2679,
2695 XVCVDPUXDS = 2680,
2696 XVCVDPUXWS = 2681,
2697 XVCVHPSP = 2682,
2698 XVCVSPBF16 = 2683,
2699 XVCVSPDP = 2684,
2700 XVCVSPHP = 2685,
2701 XVCVSPSXDS = 2686,
2702 XVCVSPSXWS = 2687,
2703 XVCVSPUXDS = 2688,
2704 XVCVSPUXWS = 2689,
2705 XVCVSXDDP = 2690,
2706 XVCVSXDSP = 2691,
2707 XVCVSXWDP = 2692,
2708 XVCVSXWSP = 2693,
2709 XVCVUXDDP = 2694,
2710 XVCVUXDSP = 2695,
2711 XVCVUXWDP = 2696,
2712 XVCVUXWSP = 2697,
2713 XVDIVDP = 2698,
2714 XVDIVSP = 2699,
2715 XVF16GER2 = 2700,
2716 XVF16GER2NN = 2701,
2717 XVF16GER2NP = 2702,
2718 XVF16GER2PN = 2703,
2719 XVF16GER2PP = 2704,
2720 XVF16GER2W = 2705,
2721 XVF16GER2WNN = 2706,
2722 XVF16GER2WNP = 2707,
2723 XVF16GER2WPN = 2708,
2724 XVF16GER2WPP = 2709,
2725 XVF32GER = 2710,
2726 XVF32GERNN = 2711,
2727 XVF32GERNP = 2712,
2728 XVF32GERPN = 2713,
2729 XVF32GERPP = 2714,
2730 XVF32GERW = 2715,
2731 XVF32GERWNN = 2716,
2732 XVF32GERWNP = 2717,
2733 XVF32GERWPN = 2718,
2734 XVF32GERWPP = 2719,
2735 XVF64GER = 2720,
2736 XVF64GERNN = 2721,
2737 XVF64GERNP = 2722,
2738 XVF64GERPN = 2723,
2739 XVF64GERPP = 2724,
2740 XVF64GERW = 2725,
2741 XVF64GERWNN = 2726,
2742 XVF64GERWNP = 2727,
2743 XVF64GERWPN = 2728,
2744 XVF64GERWPP = 2729,
2745 XVI16GER2 = 2730,
2746 XVI16GER2PP = 2731,
2747 XVI16GER2S = 2732,
2748 XVI16GER2SPP = 2733,
2749 XVI16GER2SW = 2734,
2750 XVI16GER2SWPP = 2735,
2751 XVI16GER2W = 2736,
2752 XVI16GER2WPP = 2737,
2753 XVI4GER8 = 2738,
2754 XVI4GER8PP = 2739,
2755 XVI4GER8W = 2740,
2756 XVI4GER8WPP = 2741,
2757 XVI8GER4 = 2742,
2758 XVI8GER4PP = 2743,
2759 XVI8GER4SPP = 2744,
2760 XVI8GER4W = 2745,
2761 XVI8GER4WPP = 2746,
2762 XVI8GER4WSPP = 2747,
2763 XVIEXPDP = 2748,
2764 XVIEXPSP = 2749,
2765 XVMADDADP = 2750,
2766 XVMADDASP = 2751,
2767 XVMADDMDP = 2752,
2768 XVMADDMSP = 2753,
2769 XVMAXDP = 2754,
2770 XVMAXSP = 2755,
2771 XVMINDP = 2756,
2772 XVMINSP = 2757,
2773 XVMSUBADP = 2758,
2774 XVMSUBASP = 2759,
2775 XVMSUBMDP = 2760,
2776 XVMSUBMSP = 2761,
2777 XVMULDP = 2762,
2778 XVMULSP = 2763,
2779 XVNABSDP = 2764,
2780 XVNABSSP = 2765,
2781 XVNEGDP = 2766,
2782 XVNEGSP = 2767,
2783 XVNMADDADP = 2768,
2784 XVNMADDASP = 2769,
2785 XVNMADDMDP = 2770,
2786 XVNMADDMSP = 2771,
2787 XVNMSUBADP = 2772,
2788 XVNMSUBASP = 2773,
2789 XVNMSUBMDP = 2774,
2790 XVNMSUBMSP = 2775,
2791 XVRDPI = 2776,
2792 XVRDPIC = 2777,
2793 XVRDPIM = 2778,
2794 XVRDPIP = 2779,
2795 XVRDPIZ = 2780,
2796 XVREDP = 2781,
2797 XVRESP = 2782,
2798 XVRSPI = 2783,
2799 XVRSPIC = 2784,
2800 XVRSPIM = 2785,
2801 XVRSPIP = 2786,
2802 XVRSPIZ = 2787,
2803 XVRSQRTEDP = 2788,
2804 XVRSQRTESP = 2789,
2805 XVSQRTDP = 2790,
2806 XVSQRTSP = 2791,
2807 XVSUBDP = 2792,
2808 XVSUBSP = 2793,
2809 XVTDIVDP = 2794,
2810 XVTDIVSP = 2795,
2811 XVTLSBB = 2796,
2812 XVTSQRTDP = 2797,
2813 XVTSQRTSP = 2798,
2814 XVTSTDCDP = 2799,
2815 XVTSTDCSP = 2800,
2816 XVXEXPDP = 2801,
2817 XVXEXPSP = 2802,
2818 XVXSIGDP = 2803,
2819 XVXSIGSP = 2804,
2820 XXBLENDVB = 2805,
2821 XXBLENDVD = 2806,
2822 XXBLENDVH = 2807,
2823 XXBLENDVW = 2808,
2824 XXBRD = 2809,
2825 XXBRH = 2810,
2826 XXBRQ = 2811,
2827 XXBRW = 2812,
2828 XXEVAL = 2813,
2829 XXEXTRACTUW = 2814,
2830 XXGENPCVBM = 2815,
2831 XXGENPCVDM = 2816,
2832 XXGENPCVHM = 2817,
2833 XXGENPCVWM = 2818,
2834 XXINSERTW = 2819,
2835 XXLAND = 2820,
2836 XXLANDC = 2821,
2837 XXLEQV = 2822,
2838 XXLEQVOnes = 2823,
2839 XXLNAND = 2824,
2840 XXLNOR = 2825,
2841 XXLOR = 2826,
2842 XXLORC = 2827,
2843 XXLORf = 2828,
2844 XXLXOR = 2829,
2845 XXLXORdpz = 2830,
2846 XXLXORspz = 2831,
2847 XXLXORz = 2832,
2848 XXMFACC = 2833,
2849 XXMFACCW = 2834,
2850 XXMRGHW = 2835,
2851 XXMRGLW = 2836,
2852 XXMTACC = 2837,
2853 XXMTACCW = 2838,
2854 XXPERM = 2839,
2855 XXPERMDI = 2840,
2856 XXPERMDIs = 2841,
2857 XXPERMR = 2842,
2858 XXPERMX = 2843,
2859 XXSEL = 2844,
2860 XXSETACCZ = 2845,
2861 XXSETACCZW = 2846,
2862 XXSLDWI = 2847,
2863 XXSLDWIs = 2848,
2864 XXSPLTI32DX = 2849,
2865 XXSPLTIB = 2850,
2866 XXSPLTIDP = 2851,
2867 XXSPLTIW = 2852,
2868 XXSPLTW = 2853,
2869 XXSPLTWs = 2854,
2870 gBC = 2855,
2871 gBCA = 2856,
2872 gBCAat = 2857,
2873 gBCCTR = 2858,
2874 gBCCTRL = 2859,
2875 gBCL = 2860,
2876 gBCLA = 2861,
2877 gBCLAat = 2862,
2878 gBCLR = 2863,
2879 gBCLRL = 2864,
2880 gBCLat = 2865,
2881 gBCat = 2866,
2882 INSTRUCTION_LIST_END = 2867
2883 };
2884
2885} // end namespace PPC
2886} // end namespace llvm
2887#endif // GET_INSTRINFO_ENUM
2888
2889#ifdef GET_INSTRINFO_SCHED_ENUM
2890#undef GET_INSTRINFO_SCHED_ENUM
2891namespace llvm {
2892
2893namespace PPC {
2894namespace Sched {
2895 enum {
2896 NoInstrModel = 0,
2897 IIC_LdStSync = 1,
2898 IIC_IntSimple = 2,
2899 IIC_IntGeneral = 3,
2900 IIC_BrB = 4,
2901 IIC_VecFP = 5,
2902 IIC_IntRotate = 6,
2903 IIC_IntCompare = 7,
2904 IIC_SprABORT = 8,
2905 IIC_LdStCOPY = 9,
2906 IIC_LdStPASTE = 10,
2907 IIC_BrCR = 11,
2908 IIC_FPGeneral = 12,
2909 IIC_LdStLD = 13,
2910 IIC_LdStDCBF = 14,
2911 IIC_LdStLoad = 15,
2912 IIC_FPCompare = 16,
2913 IIC_IntDivD = 17,
2914 IIC_IntDivW = 18,
2915 IIC_FPDGeneral = 19,
2916 IIC_FPAddSub = 20,
2917 IIC_FPDivD = 21,
2918 IIC_FPSGeneral = 22,
2919 IIC_VecGeneral = 23,
2920 IIC_VecComplex = 24,
2921 IIC_LdStStore = 25,
2922 IIC_IntRotateDI = 26,
2923 IIC_FPDivS = 27,
2924 IIC_FPFused = 28,
2925 IIC_FPSqrtD = 29,
2926 IIC_FPSqrtS = 30,
2927 IIC_LdStICBI = 31,
2928 IIC_IntISEL = 32,
2929 IIC_SprISYNC = 33,
2930 IIC_LdStLWARX = 34,
2931 IIC_LdStLoadUpd = 35,
2932 IIC_LdStLoadUpdX = 36,
2933 IIC_LdStLDARX = 37,
2934 IIC_LdStLDU = 38,
2935 IIC_LdStLDUX = 39,
2936 IIC_LdStLFD = 40,
2937 IIC_LdStLFDU = 41,
2938 IIC_LdStLFDUX = 42,
2939 IIC_LdStLHA = 43,
2940 IIC_LdStLHAU = 44,
2941 IIC_LdStLHAUX = 45,
2942 IIC_LdStLMW = 46,
2943 IIC_LdStLQ = 47,
2944 IIC_LdStLQARX = 48,
2945 IIC_LdStLWA = 49,
2946 IIC_IntMulHD = 50,
2947 IIC_BrMCR = 51,
2948 IIC_BrMCRX = 52,
2949 IIC_SprMFCR = 53,
2950 IIC_SprMFSPR = 54,
2951 IIC_IntMFFS = 55,
2952 IIC_SprMFMSR = 56,
2953 IIC_SprMFCRF = 57,
2954 IIC_SprMFPMR = 58,
2955 IIC_SprMFSR = 59,
2956 IIC_SprMFTB = 60,
2957 IIC_SprMSGSYNC = 61,
2958 IIC_SprMTSPR = 62,
2959 IIC_IntMTFSB0 = 63,
2960 IIC_SprMTMSR = 64,
2961 IIC_SprMTMSRD = 65,
2962 IIC_SprMTPMR = 66,
2963 IIC_SprMTSR = 67,
2964 IIC_IntMulHW = 68,
2965 IIC_IntMulHWU = 69,
2966 IIC_IntMulLI = 70,
2967 IIC_SprRFI = 71,
2968 IIC_IntRFID = 72,
2969 IIC_IntRotateD = 73,
2970 IIC_SprSLBFEE = 74,
2971 IIC_SprSLBIA = 75,
2972 IIC_SprSLBIE = 76,
2973 IIC_SprSLBIEG = 77,
2974 IIC_SprSLBMFEE = 78,
2975 IIC_SprSLBMFEV = 79,
2976 IIC_SprSLBMTE = 80,
2977 IIC_SprSLBSYNC = 81,
2978 IIC_IntShift = 82,
2979 IIC_LdStSTWCX = 83,
2980 IIC_LdStSTU = 84,
2981 IIC_LdStSTUX = 85,
2982 IIC_LdStSTD = 86,
2983 IIC_LdStSTDCX = 87,
2984 IIC_LdStSTFD = 88,
2985 IIC_LdStSTFDU = 89,
2986 IIC_SprSTOP = 90,
2987 IIC_LdStSTQ = 91,
2988 IIC_LdStSTQCX = 92,
2989 IIC_IntTrapD = 93,
2990 IIC_SprTLBIA = 94,
2991 IIC_SprTLBIE = 95,
2992 IIC_SprTLBIEL = 96,
2993 IIC_SprTLBSYNC = 97,
2994 IIC_IntTrapW = 98,
2995 IIC_VecFPCompare = 99,
2996 IIC_VecPerm = 100,
2997 B_BA_BL_BL8_BL8_NOP_BL8_NOP_RM_BL8_NOP_TLS_BL8_NOTOC_BL8_NOTOC_RM_BL8_NOTOC_TLS_BL8_RM_BL8_TLS_BL8_TLS__BLA_BLA8_BLA8_NOP_BLA8_NOP_RM_BLA8_RM_BLA_RM_BL_NOP_BL_NOP_RM_BL_RM_BL_TLS = 101,
2998 BDZLRLp_BDZLRm_BDZLRp_BDZLm_BDZLp_BDZm_BDZp_BDNZ_BDNZ8_BDNZA_BDNZAm_BDNZAp_BDNZL_BDNZLA_BDNZLAm_BDNZLAp_BDNZLR_BDNZLR8_BDNZLRL_BDNZLRLm_BDNZLRLp_BDNZLRm_BDNZLRp_BDNZLm_BDNZLp_BDNZm_BDNZp_BDZ_BDZ8_BDZA_BDZAm_BDZAp_BDZL_BDZLA_BDZLAm_BDZLAp_BDZLR_BDZLR8_BDZLRL_BDZLRLm_BLR_BLR8_BLRL_BCL_BCLR_BCLRL_BCLRLn_BCLRn_BCLalways_BCLn_BCTR_BCTR8_BCTRL_BCTRL8_BCTRL8_LDinto_toc_BCTRL8_LDinto_toc_RM_BCTRL8_RM_BCTRL_LWZinto_toc_BCTRL_LWZinto_toc_RM_BCTRL_RM_BCn_BC_BCC_BCCA_BCCCTR_BCCCTR8_BCCCTRL_BCCCTRL8_BCCL_BCCLA_BCCLR_BCCLRL_BCCTR_BCCTR8_BCCTR8n_BCCTRL_BCCTRL8_BCCTRL8n_BCCTRLn_BCCTRn_gBC_gBCA_gBCAat_gBCCTR_gBCCTRL_gBCL_gBCLA_gBCLAat_gBCLR_gBCLRL_gBCLat_gBCat = 102,
2999 MFCTR_MFCTR8_MFLR_MFLR8 = 103,
3000 MTLR_MTLR8_MTCTR_MTCTR8_MTCTR8loop_MTCTRloop = 104,
3001 MFCR_MFCR8 = 105,
3002 MCRF = 106,
3003 CR6SET_CR6UNSET_CRSET_CRUNSET_CRAND_CRANDC_CREQV_CRNAND_CRNOR_CRNOT_CROR_CRORC = 107,
3004 LMW = 108,
3005 LWARX_LWARXL = 109,
3006 LDARX_LDARXL = 110,
3007 LHBRX_LHBRX8_LWBRX_LWBRX8 = 111,
3008 MFSR_MFSRIN = 112,
3009 LFS_LFSX_LFSXTLS_LFSXTLS__LFD_LFDX_LFDXTLS_LFDXTLS__LXSDX_LXVD2X_LXVW4X_LXVDSX = 113,
3010 LFSU_LFDU = 114,
3011 LFSUX_LFDUX = 115,
3012 STXSDX_STXVD2X_STXVW4X = 116,
3013 LBARX_LHARX = 117,
3014 LBZCIX_LDBRX_LDCIX_LHZCIX_LSWI_LVEBX_LVEHX_LVEWX_LVSL_LVSR_LVX_LVXL_LWZCIX_STHCIX_STSWI_STWCIX = 118,
3015 LFIWAX_LFIWZX = 119,
3016 STFD_STFDX_STFIWX_STFS_STFSX = 120,
3017 STFDU_STFDUX_STFSU_STFSUX = 121,
3018 STVEBX_STVEHX_STVEWX_STVX_STVXL = 122,
3019 LHA_LHA8_LHAX_LHAX8_LWAX_LWAX_32 = 123,
3020 LWA_LWA_32 = 124,
3021 LHAU_LHAU8 = 125,
3022 LHAUX_LHAUX8_LWAUX = 126,
3023 STB_STB8_STH_STH8_STW_STW8_STBX_STBX8_STHX_STHX8_STWX_STWX8_STHBRX_STWBRX = 127,
3024 STD_STDX = 128,
3025 STMW = 129,
3026 STWCX = 130,
3027 STDCX = 131,
3028 STDU_STHU_STHU8_STBU_STBU8_STWU_STWU8 = 132,
3029 STDUX_STWUX_STWUX8_STHUX_STHUX8_STBUX_STBUX8 = 133,
3030 LWZU_LWZU8_LHZU_LHZU8_LBZU_LBZU8 = 134,
3031 LDU = 135,
3032 LWZUX_LWZUX8_LHZUX_LHZUX8_LBZUX_LBZUX8 = 136,
3033 LDUX = 137,
3034 ADDI_ADDI8_ADDIS_ADDIS8_LI_LI8_LIS_LIS8_ADD4_ADD4TLS_ADD4_rec_ADD8_ADD8TLS_ADD8TLS__ADD8_rec_ORI_ORI8_ORIS_ORIS8_XORI_XORI8_XORIS_XORIS8_XOR_XOR8_XOR8_rec_XOR_rec_NEG_NEG8_NEG8_rec_NEG_rec_NEG8O_NEGO_AND_AND8_AND_rec_AND8_rec_NAND_NAND8_NAND_rec_NAND8_rec_NOR_NOR8_NOR_rec_NOR8_rec_EQV_EQV8_EQV_rec_EQV8_rec_ANDC_ANDC8_ANDC_rec_ANDC8_rec_ORC_ORC8_ORC_rec_ORC8_rec = 138,
3035 SUBF8_SUBF8_rec_ADDIC_ADDIC8_SUBFIC_SUBFIC8_SUBFZE_SUBFZE8_ADDE_ADDE8_ADDME_ADDME8_SUBFME_SUBFME8_ANDI_rec_ANDIS_rec = 139,
3036 CMPD_CMPDI_CMPLD_CMPLDI_CMPLW_CMPLWI_CMPW_CMPWI = 140,
3037 EXTSB8_32_64_EXTSB8_rec_EXTSH8_32_64_EXTSH8_rec_EXTSW_32_EXTSW_32_64_EXTSW_32_64_rec_ADD4O_ADD8O_ADD8O_rec_ADD4O_rec_NEG8O_rec_NEGO_rec_EXTSB_EXTSB8_EXTSB_rec_EXTSH_EXTSH8_EXTSH_rec_EXTSW_EXTSW_rec = 141,
3038 POPCNTB_POPCNTB8_POPCNTD_POPCNTW_ANDI8_rec_ANDIS8_rec_ADDC_ADDC8_SUBFO_SUBF8O_SUBFC_SUBFC8_ADDIC_rec_ADDE8_rec_ADDE_rec_SUBFE8_rec_SUBFE_rec_ADDME8_rec_ADDME_rec_SUBFME8_rec_SUBFME_rec_ADDZE8_rec_ADDZE_rec_SUBFZE_rec_SUBFZE8_rec_SUBFO_rec_SUBF8O_rec_ADDE8O_ADDEO_SUBFE8O_SUBFEO_ADDME8O_ADDMEO_SUBFME8O_SUBFMEO_ADDZE8O_ADDZEO_SUBFZE8O_SUBFZEO_ADDE8O_rec_ADDEO_rec_ADDMEO_rec_ADDME8O_rec_SUBFMEO_rec_SUBFME8O_rec_ADDZEO_rec_ADDZE8O_rec_SUBFZEO_rec_SUBFZE8O_rec_ADDC8_rec_ADDC_rec_ADDCO_ADDCO_rec_ADDC8O_ADDC8O_rec_SUBFC8_rec_SUBFC_rec_SUBFCO_SUBFC8O_SUBFCO_rec_SUBFC8O_rec_RLWINM_RLWINM8_RLWINM_rec_RLWNM_RLWNM8_RLWNM_rec_RLWINM8_rec_RLWNM8_rec_SLW_SLW8_SLW_rec_SLW8_rec_SRW_SRW8_SRW_rec_SRW8_rec_SUBFE_SUBFE8_SUBFE8O_rec_SUBFEO_rec = 142,
3039 ADDPCIS = 143,
3040 SUBFUS_SUBFUS_rec = 144,
3041 RLDICL_RLDICL_rec_RLDICR_RLDICR_rec_RLDIC_RLDIC_rec_RLDIMI_RLDIMI_rec_RLDICL_32_RLDICL_32_64_RLDICL_32_rec_RLDICR_32_SRADI_SRADI_rec_SRADI_32 = 145,
3042 RLDCL_RLDCL_rec_RLDCR_RLDCR_rec_SLD_SLD_rec_SRD_SRD_rec_SRAD_SRAD_rec = 146,
3043 SRAWI_SRAWI_rec_SRAW_SRAW_rec = 147,
3044 CNTLZD_CNTLZDM_CNTLZD_rec_CNTLZW_CNTLZW8_CNTLZW8_rec_CNTLZW_rec_CNTTZD_CNTTZDM_CNTTZD_rec_CNTTZW_CNTTZW8_CNTTZW8_rec_CNTTZW_rec = 148,
3045 MULLI_MULLI8 = 149,
3046 MULLW_MULHW_MULHD_MULLWO_MULLW_rec_MULHD_rec_MULHW_rec_MULLWO_rec = 150,
3047 MULHWU_MULHDU_MULHDU_rec_MULHWU_rec = 151,
3048 MULLD_MULLDO_MULLD_rec_MULLDO_rec = 152,
3049 DIVDE_DIVDEO_DIVDEO_rec_DIVDEU_DIVDEUO_DIVDEUO_rec_DIVDEU_rec_DIVDE_rec = 153,
3050 DIVWE_DIVWEO_DIVWEO_rec_DIVWEU_DIVWEUO_DIVWEUO_rec_DIVWEU_rec_DIVWE_rec_DIVW_DIVWU_DIVWU_rec_DIVWO_DIVWO_rec_DIVWUO_DIVWUO_rec_DIVW_rec = 154,
3051 DIVD_DIVDU_DIVDO_DIVDO_rec_DIVDUO_DIVDUO_rec_DIVDU_rec_DIVD_rec = 155,
3052 FABSD_FABSD_rec_FABSS_FABSS_rec_FADDS_FADDS_rec_FMADDS_FMADDS_rec_FMR_FMR_rec_FMSUBS_FMSUBS_rec_FMULS_FMULS_rec_FNABSD_FNABSD_rec_FNABSS_FNABSS_rec_FNEGD_FNEGD_rec_FNEGS_FNEGS_rec_FNMADDS_FNMADDS_rec_FNMSUBS_FNMSUBS_rec_FSUBS_FSUBS_rec_FCFID_FCFIDS_FCFIDS_rec_FCFIDU_FCFIDUS_FCFIDUS_rec_FCFIDU_rec_FCFID_rec_FCTID_FCTIDU_FCTIDUZ_FCTIDUZ_rec_FCTIDU_rec_FCTIDZ_FCTIDZ_rec_FCTID_rec_FCTIW_FCTIWU_FCTIWUZ_FCTIWUZ_rec_FCTIWU_rec_FCTIWZ_FCTIWZ_rec_FCTIW_rec_FRE_FRES_rec_FRE_rec_FRSP_rec_FRSP_FRES_FRSQRTE_FRSQRTES_FRSQRTES_rec_FRSQRTE_rec_FSELD_FSELS_FSELD_rec_FSELS_rec_FCPSGND_FCPSGND_rec_FCPSGNS_FCPSGNS_rec_FRIMD_FRIMD_rec_FRIMS_FRIMS_rec_FRIND_FRIND_rec_FRINS_FRINS_rec_FRIPD_FRIPD_rec_FRIPS_FRIPS_rec_FRIZD_FRIZD_rec_FRIZS_FRIZS_rec = 156,
3053 FADD_FADD_rec_FSUB_FSUB_rec = 157,
3054 FMADD_FMADD_rec_FMSUB_FMSUB_rec_FMUL_FMUL_rec_FNMADD_FNMADD_rec_FNMSUB_FNMSUB_rec = 158,
3055 XSMADDADP_XSMADDASP_XSMADDMDP_XSMADDMSP_XSMSUBADP_XSMSUBASP_XSMSUBMDP_XSMSUBMSP_XSNMADDADP_XSNMADDASP_XSNMADDMDP_XSNMADDMSP_XSNMSUBADP_XSNMSUBASP_XSNMSUBMDP_XSNMSUBMSP_XSABSDP_XSADDDP_XSADDSP_XSMULDP_XSMULSP_XSNABSDP_XSNABSDPs_XSNEGDP_XSSUBDP_XSSUBSP_XSCPSGNDP_XSCVDPSP_XSCVDPSXDS_XSCVDPSXDSs_XSCVDPSXWS_XSCVDPSXWSs_XSCVDPUXDS_XSCVDPUXDSs_XSCVDPUXWS_XSCVDPUXWSs_XSCVSPDP_XSCVSXDDP_XSCVUXDDP_XSMAXDP_XSMINDP_XSRDPI_XSRDPIC_XSRDPIM_XSRDPIP_XSRDPIZ_XSREDP_XSRSQRTEDP = 159,
3056 FTDIV_FTSQRT_XSTDIVDP_XSTSQRTDP_XSCMPODP_XSCMPUDP = 160,
3057 XVADDDP_XVADDSP_XVMADDADP_XVMADDASP_XVMADDMDP_XVMADDMSP_XVMSUBADP_XVMSUBASP_XVMSUBMDP_XVMSUBMSP_XVNMADDADP_XVNMADDASP_XVNMADDMDP_XVNMADDMSP_XVNMSUBADP_XVNMSUBASP_XVNMSUBMDP_XVNMSUBMSP_XVSUBDP_XVSUBSP_XVABSDP_XVABSSP_XVMAXDP_XVMAXSP_XVMINDP_XVMINSP_XVMULDP_XVMULSP_XVNABSDP_XVNABSSP_XVNEGDP_XVNEGSP_XVCPSGNDP_XVCVDPSXDS_XVCVDPSXWS_XVCVDPUXDS_XVCVDPUXWS_XVCVSPSXDS_XVCVSPSXWS_XVCVSPUXDS_XVCVSPUXWS_XVCVSXDDP_XVCVSXWDP_XVCVUXDDP_XVCVUXWDP_XVRDPI_XVRDPIC_XVRDPIM_XVRDPIP_XVRDPIZ_XVREDP_XVRSPI_XVRSPIC_XVRSPIM_XVRSPIP_XVRSPIZ_XVRSQRTEDP = 161,
3058 XVCMPEQDP_XVCMPEQDP_rec_XVCMPGEDP_XVCMPGEDP_rec_XVCMPGTDP_XVCMPGTDP_rec = 162,
3059 XVTDIVDP_XVTSQRTDP = 163,
3060 VPKSHSS_VPKSHUS_VPKSWSS_VPKSWUS_VPKUHUM_VPKUHUS_VPKUWUM_VPKUWUS_VUPKHPX_VUPKHSB_VUPKHSH_VUPKLPX_VUPKLSB_VUPKLSH_VPERM_VSEL_VPKPX = 164,
3061 XXMRGHW_XXMRGLW_XXPERMDI_XXPERMDIs_XXSLDWI_XXSLDWIs_VSPLTB_VSPLTBs_VSPLTH_VSPLTHs_VSPLTISB_VSPLTISH_VSPLTISW_VSPLTW_XXSPLTW_XXSPLTWs_XXSEL = 165,
3062 VADDSBS_VADDSHS_VADDSWS_VADDUBS_VADDUHS_VADDUWS_VMAXSB_VMAXSH_VMAXSW_VMAXUB_VMAXUH_VMAXUW_VMINSB_VMINSH_VMINSW_VMINUB_VMINUH_VMINUW_VMRGHB_VMRGHH_VMRGHW_VMRGLB_VMRGLH_VMRGLW_XVRSQRTESP_XVRESP_XVCVSXDSP_XVCVSXWSP_XVCVUXDSP_XVCVUXWSP_XVCPSGNSP_XVCVDPSP_VADDCUW_VADDFP_VAND_VANDC_VAVGSB_VAVGSH_VAVGSW_VAVGUB_VAVGUH_VAVGUW_VCFSX_VCFUX_VCTSXS_VCTUXS_VEXPTEFP_VLOGEFP_VNOR_VOR_VMADDFP_VMHADDSHS_VMHRADDSHS_VMLADDUHM_VNMSUBFP_VMAXFP_VMINFP_VMSUMMBM_VMSUMSHM_VMSUMSHS_VMSUMUBM_VMSUMUDM_VMSUMUHM_VMSUMUHS_VMULESB_VMULESH_VMULEUB_VMULEUH_VMULOSB_VMULOSH_VMULOUB_VMULOUH_VREFP_VRFIM_VRFIN_VRFIP_VRFIZ_VRLB_VRLH_VRLW_VRSQRTEFP_VSR_VSRAB_VSRAH_VSRAW_VSRB_VSRH_VSRO_VSRW_VSUBCUW_VSL_VSLB_VSLDOI_VSLH_VSLO_VSLW_VSUBSBS_VSUBSHS_VSUBSWS_VSUBUBS_VSUBUHS_VSUBUWS_VSUM2SWS_VSUM4SBS_VSUM4SHS_VSUM4UBS_VSUMSWS_VXOR = 166,
3063 VADDUBM_VADDUHM_VADDUWM_XXLORf_XXLXORdpz_XXLXORspz_XXLXORz_VSUBFP_VSUBUBM_VSUBUHM_VSUBUWM_XXLAND_XXLANDC_XXLNOR_XXLOR_XXLXOR = 167,
3064 XVTDIVSP_XVTSQRTSP = 168,
3065 XVCMPEQSP_XVCMPEQSP_rec_XVCMPGESP_XVCMPGESP_rec_XVCMPGTSP_XVCMPGTSP_rec_VCMPBFP_VCMPBFP_rec_VCMPEQFP_VCMPEQFP_rec_VCMPEQUB_VCMPEQUB_rec_VCMPEQUH_VCMPEQUH_rec_VCMPEQUW_VCMPEQUW_rec_VCMPGEFP_VCMPGEFP_rec_VCMPGTFP_VCMPGTFP_rec_VCMPGTSB_VCMPGTSB_rec_VCMPGTSH_VCMPGTSH_rec_VCMPGTSW_VCMPGTSW_rec_VCMPGTUB_VCMPGTUB_rec_VCMPGTUH_VCMPGTUH_rec_VCMPGTUW_VCMPGTUW_rec = 169,
3066 FCMPOD_FCMPOS_FCMPUD_FCMPUS = 170,
3067 FDIVS_FDIVS_rec = 171,
3068 XSDIVDP = 172,
3069 FSQRTS_XSSQRTSP_FSQRTS_rec = 173,
3070 FDIV_FDIV_rec = 174,
3071 XSSQRTDP = 175,
3072 FSQRT_FSQRT_rec = 176,
3073 XVDIVSP = 177,
3074 XVSQRTSP = 178,
3075 XVDIVDP = 179,
3076 XVSQRTDP = 180,
3077 MFOCRF_MFOCRF8 = 181,
3078 VCIPHER_VCIPHERLAST_VNCIPHER_VNCIPHERLAST_VPMSUMB_VPMSUMD_VPMSUMH_VPMSUMW_VSBOX = 182,
3079 XSDIVSP = 183,
3080 FSQRTS_FSQRTS_rec = 184,
3081 MTFSFI_rec_MTFSF_rec_MTFSFI_MTFSFIb_MTFSF = 185,
3082 MTFSFb_MTFSB0_MTFSB1 = 186,
3083 XSMADDADP_XSMADDASP_XSMADDMDP_XSMADDMSP_XSMSUBADP_XSMSUBASP_XSMSUBMDP_XSMSUBMSP_XSNMADDADP_XSNMADDASP_XSNMADDMDP_XSNMADDMSP_XSNMSUBADP_XSNMSUBASP_XSNMSUBMDP_XSNMSUBMSP_XSABSDP_XSADDDP_XSADDSP_XSCPSGNDP_XSMULDP_XSMULSP_XSNABSDP_XSNABSDPs_XSNEGDP_XSREDP_XSRSQRTEDP_XSSUBDP_XSSUBSP_XSCVDPSXDS_XSCVDPSXDSs_XSCVDPSXWS_XSCVDPSXWSs_XSCVDPUXDS_XSCVDPUXDSs_XSCVDPUXWS_XSCVDPUXWSs_XSCVSXDDP_XSCVUXDDP_XSCVDPSP_XSCVSPDP_XSRDPI_XSRDPIC_XSRDPIM_XSRDPIP_XSRDPIZ = 187,
3084 XSRESP_XSRSQRTESP_XSCVSXDSP_XSCVUXDSP_XSCVDPSPN_XSCVSPDPN_XSRSP = 188,
3085 XVMADDASP_XVMADDMSP_XVMSUBASP_XVMSUBMSP_XVNMADDASP_XVNMADDMSP_XVNMSUBASP_XVNMSUBMSP_XVSUBSP_XVMULSP_XVNABSSP_XVNEGSP_XVABSSP_XVADDSP = 189,
3086 VRFIM_VRFIN_VRFIP_VRFIZ_XVRSQRTESP_VADDFP_VEXPTEFP_VLOGEFP_VMADDFP_VNMSUBFP_VREFP_VRSQRTEFP_XVCVSXWSP_XVCVUXWSP_XVRESP_XVCVDPSP_XVCVSXDSP_XVCVUXDSP_XVCPSGNSP = 190,
3087 VSUBFP = 191,
3088 XVRDPI_XVRDPIC_XVRDPIM_XVRDPIP_XVRDPIZ_XVRSPI_XVRSPIC_XVRSPIM_XVRSPIP_XVRSPIZ_XVCVSXDDP_XVCVSXWDP_XVCVUXDDP_XVCVUXWDP_XVCVDPSXDS_XVCVDPSXWS_XVCVDPUXDS_XVCVDPUXWS_XVCVSPSXDS_XVCVSPSXWS_XVCVSPUXDS_XVCVSPUXWS_XVABSDP_XVADDDP_XVCPSGNDP_XVMADDADP_XVMADDMDP_XVMSUBADP_XVMSUBMDP_XVMULDP_XVNABSDP_XVNEGDP_XVNMADDADP_XVNMADDMDP_XVNMSUBADP_XVNMSUBMDP_XVREDP_XVRSQRTEDP_XVSUBDP = 192,
3089 XVCVSPDP = 193,
3090 TDI_TD = 194,
3091 TWI_TW = 195,
3092 MTCRF_MTCRF8_MTOCRF_MTOCRF8 = 196,
3093 RLWIMI_RLWIMI8 = 197,
3094 AND_AND8_AND8_rec_ANDC_ANDC8_ANDC8_rec_ANDC_rec_AND_rec_EQV_EQV8_EQV8_rec_EQV_rec_NAND_NAND8_NAND8_rec_NAND_rec_NOR_NOR8_NOR8_rec_NOR_rec_ORC_ORC8_ORC8_rec_ORC_rec_ORI_ORI8_ORIS_ORIS8_XOR_XOR8_XOR8_rec_XORI_XORI8_XORIS_XORIS8_XOR_rec_ADD4_rec_ADD8_rec_NEG8_rec_NEG_rec = 198,
3095 ANDI8_rec_ANDIS8_rec_RLWINM_RLWINM8_RLWINM8_rec_RLWINM_rec_RLWNM_RLWNM8_RLWNM8_rec_RLWNM_rec_SLW_SLW8_SLW8_rec_SLW_rec_SRW_SRW8_SRW8_rec_SRW_rec_ADDC8O_ADDC8O_rec_ADDCO_ADDCO_rec_ADDE8O_ADDE8O_rec_ADDEO_ADDEO_rec_ADDME8O_ADDME8O_rec_ADDMEO_ADDMEO_rec_ADDZE8O_ADDZE8O_rec_ADDZEO_ADDZEO_rec_SUBF8O_SUBF8O_rec_SUBFC8O_SUBFC8O_rec_SUBFCO_SUBFCO_rec_SUBFE8O_SUBFE8O_rec_SUBFEO_SUBFEO_rec_SUBFME8O_SUBFME8O_rec_SUBFMEO_SUBFMEO_rec_SUBFO_SUBFO_rec_SUBFZE8O_SUBFZE8O_rec_SUBFZEO_SUBFZEO_rec_ADDE8_rec_ADDE_rec_ADDME8_rec_ADDME_rec_ADDZE8_rec_ADDZE_rec_SUBFE8_rec_SUBFE_rec_SUBFME8_rec_SUBFME_rec_SUBFZE8_rec_SUBFZE_rec_ADDIC_rec_ADDC_ADDC8_SUBFC_SUBFC8_ADDC_rec_ADDC8_rec_SUBFC_rec_SUBFC8_rec = 199,
3096 ANDIS_rec_ANDI_rec_SUBF8_rec = 200,
3097 OR_OR8_OR8_rec_OR_rec_NOP = 201,
3098 SLDI_SLDI_rec_SLWI_SLWI_rec_SRDI_SRDI_rec_SRWI_SRWI_rec_COPY = 202,
3099 SUBF_rec_ADDG6S_ADDG6S8_ADDZE_ADDZE8 = 203,
3100 RLWIMI8_rec_RLWIMI_rec = 204,
3101 CNTLZD_CNTLZD_rec_CNTLZW_CNTLZW8_CNTLZW8_rec_CNTLZW_rec = 205,
3102 POPCNTB_POPCNTB8_POPCNTD_POPCNTW = 206,
3103 ISEL_ISEL8 = 207,
3104 MFTB_MFTB8 = 208,
3105 DIVW_DIVWU = 209,
3106 DIVD_DIVDU = 210,
3107 DIVWE_DIVWEU = 211,
3108 LVEBX_LVEHX_LVEWX_LVX_LVXL = 212,
3109 LXVB16X_LXSIWZX = 213,
3110 DFLOADf64_XFLOADf64_LIWZX = 214,
3111 LQ = 215,
3112 STFDEPX_STFDXTLS_STFDXTLS__STFSXTLS_STFSXTLS__STXSIWX_STXSSP_STXSSPX = 216,
3113 STBXTLS_STBXTLS__STBXTLS_32_STHXTLS_STHXTLS__STHXTLS_32_STWXTLS_STWXTLS__STWXTLS_32_STBEPX_STDBRX_STHEPX_STWEPX = 217,
3114 STDXTLS_STDXTLS_ = 218,
3115 STBCIX_STDCIX = 219,
3116 STBCX_STHCX = 220,
3117 STHCIX_STSWI_STWCIX = 221,
3118 LBZ_LBZ8_LBZX_LBZX8_LBZXTLS_LBZXTLS__LBZXTLS_32_LHAXTLS_LHAXTLS__LHAXTLS_32_LHZ_LHZ8_LHZX_LHZX8_LHZXTLS_LHZXTLS__LHZXTLS_32_LWAXTLS_LWAXTLS__LWAXTLS_32_LWZ_LWZ8_LWZX_LWZX8_LWZXTLS_LWZXTLS__LWZXTLS_32 = 222,
3119 LD_LDX_LDXTLS_LDXTLS_ = 223,
3120 LBARXL_LHARXL = 224,
3121 LBEPX_LHEPX_LWEPX = 225,
3122 LFDEPX_LXSIWAX = 226,
3123 ADDIdtprelL_ADDIdtprelL32_ADDItlsgdL_ADDItlsgdL32_ADDItlsgdLADDR_ADDItlsgdLADDR32_ADDItoc_ADDItoc8_ADDItocL_ADDItocL8_ADDISdtprelHA_ADDISdtprelHA32_ADDISgotTprelHA_ADDIStlsgdHA_ADDIStocHA_ADDIStocHA8 = 227,
3124 SUBF = 228,
3125 VPKSDSS_VPKSDUS_VPKUDUM_VPKUDUS_VUPKHSW_VUPKLSW_VMRGEW_VMRGOW_VPERMXOR_VBPERMQ_VGBBD = 229,
3126 VMRGHB_VMRGHH_VMRGHW_VMRGLB_VMRGLH_VMRGLW_VSL_VSLDOI_VSLO_VSR_VSRO = 230,
3127 VADDSBS_VADDSHS_VADDSWS_VADDUBS_VADDUHS_VADDUWS_VSUBSBS_VSUBSHS_VSUBSWS_VSUBUBS_VSUBUHS_VSUBUWS_VRLB_VRLH_VRLW_VSLB_VSLH_VSLW_VSRAB_VSRAH_VSRAW_VSRB_VSRH_VSRW_VAVGSB_VAVGSH_VAVGSW_VAVGUB_VAVGUH_VAVGUW_VMAXSB_VMAXSH_VMAXSW_VMAXUB_VMAXUH_VMAXUW_VMINSB_VMINSH_VMINSW_VMINUB_VMINUH_VMINUW_VAND_VANDC_VNOR_VOR_VXOR_VMAXFP_VMINFP_VSUBCUW_VADDCUW = 231,
3128 VADDUDM_VSUBUDM_VSLD_VSRAD_VSRD_VEQV_VNAND_VORC_XXLEQV_XXLNAND_XXLORC_VCLZB_VCLZD_VCLZH_VCLZW_VPOPCNTB_VPOPCNTH_VPOPCNTW = 232,
3129 VRLD_VMAXSD_VMAXUD_VMINSD_VMINUD_VSHASIGMAD_VSHASIGMAW = 233,
3130 VCMPEQUD_VCMPEQUD_rec_VCMPGTSD_VCMPGTSD_rec_VCMPGTUD_VCMPGTUD_rec = 234,
3131 MFVSCR = 235,
3132 MTVSCR = 236,
3133 VADDCUQ_VADDECUQ_VADDEUQM_VSUBCUQ_VSUBECUQ_VSUBEUQM = 237,
3134 VADDUQM_VSUBUQM_VPOPCNTD = 238,
3135 VMSUMMBM_VMSUMSHM_VMSUMSHS_VMSUMUBM_VMSUMUHM_VMSUMUHS_VSUM2SWS_VSUM4SBS_VSUM4SHS_VSUM4UBS_VSUMSWS_VMULESB_VMULESH_VMULEUB_VMULEUH_VMULOSB_VMULOSH_VMULOUB_VMULOUH_VMHADDSHS_VMHRADDSHS_VMLADDUHM = 239,
3136 VMULESW_VMULEUW_VMULOSW_VMULOUW = 240,
3137 VMULUWM = 241,
3138 B_BA_BL_BL8_BL8_RM_BLA_BLA8_BLA8_RM_BLA_RM_BL_RM_BL8_NOP_BL8_NOP_RM_BL8_NOP_TLS_BL8_TLS_BL8_TLS__BLA8_NOP_BLA8_NOP_RM_BL_NOP_BL_NOP_RM_BL_TLS = 242,
3139 DTSTDC_DTSTDCQ_DTSTDG_DTSTDGQ_DTSTSF_DTSTSFQ_DCMPO_DCMPU_DTSTEX = 243,
3140 DXEX_DXEXQ_DXEXQ_rec_DXEX_rec_DDEDPD_DDEDPD_rec_DENBCD_DENBCD_rec_DIEX_DIEX_rec_DQUA_DQUA_rec_DRINTN_DRINTN_rec_DRINTX_DRINTX_rec_DRRND_DRRND_rec_DSCLI_DSCLI_rec_DSCRI_DSCRI_rec_DQUAI = 244,
3141 DADD_DADD_rec_DCTDP_DCTDP_rec_DSUB_DSUB_rec = 245,
3142 BCDADD_rec_BCDSUB_rec = 246,
3143 DRINTNQ_DRINTNQ_rec_DRINTXQ_DRINTXQ_rec_DRRNDQ_DRRNDQ_rec_DIEXQ_DIEXQ_rec_DQUAIQ_DQUAIQ_rec_DDEDPDQ_DDEDPDQ_rec_DENBCDQ_DENBCDQ_rec_DSCLIQ_DSCLIQ_rec_DSCRIQ_DSCRIQ_rec = 247,
3144 DCMPOQ_DCMPUQ_DTSTEXQ = 248,
3145 DCTQPQ_DCTQPQ_rec = 249,
3146 DADDQ_DADDQ_rec_DSUBQ_DSUBQ_rec = 250,
3147 DQUAQ_DQUAQ_rec = 251,
3148 DRSP_DRSP_rec_DCTFIX_DCTFIX_rec = 252,
3149 DCFFIX_DCFFIX_rec = 253,
3150 DCFFIXQ_DCFFIXQ_rec = 254,
3151 DMUL_DMUL_rec = 255,
3152 DMULQ_DMULQ_rec = 256,
3153 DDIV_DDIV_rec = 257,
3154 DDIVQ_DDIVQ_rec = 258,
3155 MFVRD_MFVSRD_MFVRWZ_MFVSRWZ_MTVRD_MTVSRD_MTVRWA_MTVSRWA_MTVRWZ_MTVSRWZ = 259,
3156 VADDUDM_VSLD_VSRD_VSUBUDM_VPOPCNTB_VPOPCNTH_VSRAD_VEQV_VNAND_VORC_XXLEQV_XXLNAND_XXLORC = 260,
3157 VAND_VANDC_VSLB_VSLH_VSLW_VSRB_VSRH_VSRW_VRLB_VRLH_VRLW_VSRAB_VSRAH_VSRAW_VNOR_VOR_VXOR = 261,
3158 VEXTSB2D_VEXTSB2Ds_VEXTSB2W_VEXTSB2Ws_VEXTSH2D_VEXTSH2Ds_VEXTSH2W_VEXTSH2Ws_VEXTSW2D_VEXTSW2Ds_MTVSRDD_VNEGD_VNEGW_XXLEQVOnes = 262,
3159 V_SET0_V_SET0B_V_SET0H_XVIEXPDP_XVIEXPSP_XVXEXPDP_XVXEXPSP_VRLDMI_VRLDNM_VRLWMI_VRLWNM_XSABSQP_XSCPSGNQP_XSIEXPQP_XSNABSQP_XSNEGQP_XSXEXPQP = 263,
3160 VRLD = 264,
3161 XVABSDP_XVNABSDP_XVCPSGNDP_XVNEGDP = 265,
3162 XVABSSP_XVNABSSP_XVNEGSP = 266,
3163 XVCPSGNSP = 267,
3164 VMRGEW_VMRGOW = 268,
3165 VSEL = 269,
3166 XXSEL = 270,
3167 TABORTDC_TABORTDCI_TABORTWC_TABORTWCI = 271,
3168 MTFSB0_MTFSB1 = 272,
3169 MFFSCDRN_MFFSCDRNI_MFFSCRN_MFFSCRNI = 273,
3170 CMPRB_CMPRB8_CMPEQB = 274,
3171 XSTSTDCDP_XSTSTDCSP = 275,
3172 FTDIV_FTSQRT = 276,
3173 XSMAXCDP_XSMAXJDP_XSMINCDP_XSMINJDP_XSXSIGDP = 277,
3174 XSCMPEQDP_XSCMPEXPDP_XSCMPGEDP_XSCMPGTDP = 278,
3175 CNTTZD_CNTTZD_rec_CNTTZW_CNTTZW8_CNTTZW8_rec_CNTTZW_rec = 279,
3176 POPCNTD_POPCNTW = 280,
3177 CMPB_CMPB8_SETB_SETB8_BPERMD = 281,
3178 XSCVSPDPN = 282,
3179 SLD_SRD_SRAD = 283,
3180 SRADI_SRADI_32_RLDIC = 284,
3181 EXTSWSLI_32_64_EXTSWSLI = 285,
3182 SUBFC_SUBFC8_SUBFC8O_SUBFCO_ANDI8_rec_ANDIS8_rec_ADDC_ADDC8_ADDC8O_ADDCO_ADDIC_rec_ADDE8O_ADDE8O_rec_ADDE8_rec_ADDEO_ADDEO_rec_ADDE_rec_ADDME8O_ADDME8O_rec_ADDME8_rec_ADDMEO_ADDMEO_rec_ADDME_rec_ADDZE8O_ADDZE8O_rec_ADDZE8_rec_ADDZEO_ADDZEO_rec_ADDZE_rec_SUBF8O_SUBF8O_rec_SUBFE8O_SUBFE8O_rec_SUBFE8_rec_SUBFEO_SUBFEO_rec_SUBFE_rec_SUBFME8O_SUBFME8O_rec_SUBFME8_rec_SUBFMEO_SUBFMEO_rec_SUBFME_rec_SUBFO_SUBFO_rec_SUBFZE8O_SUBFZE8O_rec_SUBFZE8_rec_SUBFZEO_SUBFZEO_rec_SUBFZE_rec = 286,
3183 ADDZE_ADDZE8_SUBF_rec = 287,
3184 ADDIStocHA_ADDIStocHA8_ADDItocL_ADDItocL8 = 288,
3185 LA_LA8 = 289,
3186 COPY = 290,
3187 MCRXRX = 291,
3188 XSNABSDP_XSNABSDPs_XSABSDP_XSNEGDP_XSCPSGNDP = 292,
3189 XSXEXPDP = 293,
3190 RFEBB = 294,
3191 TBEGIN_TRECHKPT = 295,
3192 WAIT = 296,
3193 RLDCL_RLDCR = 297,
3194 RLDICL_RLDICL_32_RLDICL_32_64_RLDICR_RLDICR_32_RLDIMI = 298,
3195 MTOCRF_MTOCRF8 = 299,
3196 SLW_SLW8_SRW_SRW8_RLWINM_RLWINM8_RLWNM_RLWNM8 = 300,
3197 FABSD_FABSS_FNABSD_FNABSS_FNEGD_FNEGS_FCPSGND_FCPSGNS_FMR = 301,
3198 SRAW_SRAWI = 302,
3199 XSIEXPDP = 303,
3200 CRXOR = 304,
3201 TRECLAIM_TSR_TABORT = 305,
3202 VCMPNEZB_VCMPNEZH_VCMPNEZW_VCMPNEB_VCMPNEH_VCMPNEW_VCMPNEB_rec_VCMPNEH_rec_VCMPNEW_rec_VCMPNEZB_rec_VCMPNEZH_rec_VCMPNEZW_rec = 306,
3203 VABSDUB_VABSDUH_VABSDUW_VCTZB_VCTZD_VCTZH_VCTZW_VPRTYBD_VPRTYBW = 307,
3204 VBPERMD_XVTSTDCDP_XVTSTDCSP_XVXSIGDP_XVXSIGSP = 308,
3205 VPOPCNTD = 309,
3206 VCTSXS_0_VCTUXS_0_XVCVHPSP_XVCVSPHP_VCFSX_0_VCFUX_0 = 310,
3207 MADDHD_MADDHDU_MADDLD_MADDLD8 = 311,
3208 MULHD_MULHW_MULLW_MULLWO = 312,
3209 MULHDU_MULHWU = 313,
3210 MULLD_MULLDO = 314,
3211 FRSP_FRIMD_FRIMS_FRIND_FRINS_FRIPD_FRIPS_FRIZD_FRIZS_FRE_FRES_FADDS_FMSUBS_FMADDS_FSUBS_FCFID_FCFIDS_FCFIDU_FCFIDUS_FCTID_FCTIDU_FCTIDUZ_FCTIDZ_FCTIW_FCTIWU_FCTIWUZ_FCTIWZ_FRSQRTE_FRSQRTES_FNMADDS_FNMSUBS_FSELD_FSELS_FMULS = 315,
3212 FADD_FSUB = 316,
3213 FMSUB_FMADD_FNMADD_FNMSUB_FMUL = 317,
3214 XSMADDADP_XSMADDASP_XSMADDMDP_XSMADDMSP_XSMSUBADP_XSMSUBASP_XSMSUBMDP_XSMSUBMSP_XSMULDP_XSMULSP_XSNMADDADP_XSNMADDASP_XSNMADDMDP_XSNMADDMSP_XSNMSUBADP_XSNMSUBASP_XSNMSUBMDP_XSNMSUBMSP = 318,
3215 FSELD_rec_FSELS_rec = 319,
3216 FRIMD_rec_FRIMS_rec_FRIND_rec_FRINS_rec_FRIPD_rec_FRIPS_rec_FRIZD_rec_FRIZS_rec_FRES_rec_FRE_rec_FADDS_rec_FSUBS_rec_FMSUBS_rec_FNMSUBS_rec_FMADDS_rec_FNMADDS_rec_FCFIDS_rec_FCFIDUS_rec_FCFIDU_rec_FCFID_rec_FCTIDUZ_rec_FCTIDU_rec_FCTIDZ_rec_FCTID_rec_FCTIWUZ_rec_FCTIWU_rec_FCTIWZ_rec_FCTIW_rec_FMULS_rec_FRSQRTES_rec_FRSQRTE_rec_FRSP_rec = 320,
3217 XSCVDPHP_XSCVHPDP = 321,
3218 LVSL_LVSR = 322,
3219 V_SETALLONES_V_SETALLONESB_V_SETALLONESH_VPERMR_VSLV_VSRV_XXBRD_XXBRH_XXBRQ_XXBRW_XXEXTRACTUW_XXINSERTW_VMUL10CUQ_VMUL10ECUQ_VMUL10EUQ_VMUL10UQ_XSTSTDCQP_XSXSIGQP_BCDCFN_rec_BCDCFZ_rec_BCDCPSGN_rec_BCDCTN_rec_BCDCTZ_rec_BCDSETSGN_rec_BCDS_rec_BCDTRUNC_rec_BCDUS_rec_BCDUTRUNC_rec = 323,
3220 VEXTRACTUB_VEXTRACTUH_VEXTRACTUW_VINSERTB_VINSERTD_VINSERTH_VINSERTW_MFVSRLD_MTVSRWS_VCLZLSBB_VCTZLSBB_VEXTRACTD_VEXTUBLX_VEXTUBRX_VEXTUHLX_VEXTUHRX_VEXTUWLX_VEXTUWRX_VPRTYBQ = 324,
3221 XXPERM_XXPERMR_XXSPLTIB = 325,
3222 XSCMPEXPQP_XSCMPOQP_XSCMPUQP = 326,
3223 BCDSR_rec_XSADDQP_XSADDQPO_XSCVDPQP_XSCVQPDP_XSCVQPDPO_XSCVQPSDZ_XSCVQPSWZ_XSCVQPUDZ_XSCVQPUWZ_XSCVSDQP_XSCVUDQP_XSRQPI_XSRQPIX_XSRQPXP_XSSUBQP_XSSUBQPO = 327,
3224 BCDCTSQ_rec = 328,
3225 XSMADDQP_XSMADDQPO_XSMSUBQP_XSMSUBQPO_XSMULQP_XSMULQPO_XSNMADDQP_XSNMADDQPO_XSNMSUBQP_XSNMSUBQPO = 329,
3226 BCDCFSQ_rec = 330,
3227 XSDIVQP_XSDIVQPO = 331,
3228 XSSQRTQP_XSSQRTQPO = 332,
3229 LXVL_LXVLL = 333,
3230 LXSIBZX_LXSIHZX_LXVWSX_LXV_LXVX_LXSD = 334,
3231 LXSDX_LXVD2X = 335,
3232 DCBF_DCBFEP_DCBST_DCBSTEP_DCBT_DCBTEP_DCBZ_DCBZEP_DCBZL_DCBZLEP_DCBTST_DCBTSTEP = 336,
3233 CP_COPY_CP_COPY8 = 337,
3234 ICBI_ICBIEP = 338,
3235 ICBT_ICBTLS_EnforceIEIO = 339,
3236 LBZ_LBZ8_LBZX_LBZX8_LBZXTLS_LBZXTLS__LBZXTLS_32_LHZ_LHZ8_LHZX_LHZX8_LHZXTLS_LHZXTLS__LHZXTLS_32_LWZ_LWZ8_LWZX_LWZX8_LWZXTLS_LWZXTLS__LWZXTLS_32 = 340,
3237 CP_ABORT = 341,
3238 DARN = 342,
3239 ISYNC = 343,
3240 MSGSYNC = 344,
3241 TLBSYNC = 345,
3242 SYNC = 346,
3243 LFIWZX = 347,
3244 LFDX_LFDXTLS_LFDXTLS__LFD = 348,
3245 SLBIA = 349,
3246 SLBIE = 350,
3247 SLBMFEE = 351,
3248 SLBMFEV = 352,
3249 SLBMTE = 353,
3250 TLBIEL = 354,
3251 LHZU_LHZU8_LWZU_LWZU8 = 355,
3252 LHZUX_LHZUX8_LWZUX_LWZUX8 = 356,
3253 TEND = 357,
3254 CP_PASTE8_rec_CP_PASTE_rec = 358,
3255 TCHECK = 359,
3256 LXSIWAX = 360,
3257 LIWAX = 361,
3258 LFSX_LFSXTLS_LFSXTLS__LFS = 362,
3259 LXSSP_LXSSPX = 363,
3260 XFLOADf32_DFLOADf32 = 364,
3261 LXVH8X = 365,
3262 STFDXTLS_STFDXTLS__STFSXTLS_STFSXTLS__STXSIWX_STXSSP_STXSSPX = 366,
3263 STXSD_STXSIBX_STXSIBXv_STXSIHX_STXSIHXv = 367,
3264 STXSDX = 368,
3265 DFSTOREf32_DFSTOREf64_XFSTOREf32_XFSTOREf64_STIWX = 369,
3266 STDBRX_STBXTLS_STBXTLS__STBXTLS_32_STHXTLS_STHXTLS__STHXTLS_32_STWXTLS_STWXTLS__STWXTLS_32 = 370,
3267 SLBIEG = 371,
3268 TLBIE = 372,
3269 STXV_STXVB16X_STXVH8X_STXVX = 373,
3270 STXVL_STXVLL = 374,
3271 MFVRSAVE_MFVRSAVEv_MTVRSAVE_MTVRSAVEv = 375,
3272 MFPMR = 376,
3273 MTPMR = 377,
3274 MFSPR_MFSPR8_MFUDSCR = 378,
3275 MFMSR = 379,
3276 MTMSR = 380,
3277 MTMSRD = 381,
3278 MTUDSCR_MTSPR_MTSPR8 = 382,
3279 DIVWO_DIVWUO = 383,
3280 MODSW = 384,
3281 DIVWEO_DIVWEUO = 385,
3282 DIVDO_DIVDUO = 386,
3283 MODSD_MODUD_MODUW = 387,
3284 DIVDE_DIVDEO_DIVDEU_DIVDEUO = 388,
3285 DIVWO_rec_DIVWUO_rec_DIVWU_rec_DIVW_rec = 389,
3286 ADDC8O_rec_ADDC8_rec_ADDCO_rec_ADDC_rec_SUBFC8O_rec_SUBFC8_rec_SUBFCO_rec_SUBFC_rec = 390,
3287 MCRFS = 391,
3288 RLDCL_rec_RLDCR_rec = 392,
3289 RLDICL_rec_RLDICR_rec_RLDICL_32_rec_RLDIMI_rec = 393,
3290 MFFS_MFFSCE_MFFSL_MFFS_rec = 394,
3291 EXTSWSLI_32_64_rec_EXTSWSLI_rec = 395,
3292 FDIV = 396,
3293 FSQRT = 397,
3294 FSQRTS = 398,
3295 FDIVS = 399,
3296 LFSU = 400,
3297 LFSUX = 401,
3298 TAILB_TAILB8_TAILBA_TAILBA8_TAILBCTR_TAILBCTR8_CTRL_DEP = 402,
3299 LDAT_LWAT = 403,
3300 STDAT_STWAT = 404,
3301 BRINC = 405,
3302 EVABS_EVEQV_EVNAND_EVNEG_EVADDIW_EVADDW_EVAND_EVANDC_EVCMPEQ_EVCMPGTS_EVCMPGTU_EVCMPLTS_EVCMPLTU_EVCNTLSW_EVCNTLZW_EVEXTSB_EVEXTSH_EVMERGEHI_EVMERGEHILO_EVMERGELO_EVMERGELOHI_EVNOR_EVOR_EVORC_EVXOR_EVRLW_EVRLWI_EVRNDW_EVSLW_EVSLWI_EVSPLATFI_EVSPLATI_EVSRWIS_EVSRWIU_EVSRWS_EVSRWU_EVSUBFW_EVSUBIFW = 406,
3303 EVMRA_EVADDSMIAAW_EVADDSSIAAW_EVADDUMIAAW_EVADDUSIAAW_EVDIVWS_EVDIVWU_EVMHEGSMFAA_EVMHEGSMFAN_EVMHEGSMIAA_EVMHEGSMIAN_EVMHEGUMIAA_EVMHEGUMIAN_EVMHESMF_EVMHESMFA_EVMHESMFAAW_EVMHESMFANW_EVMHESMI_EVMHESMIA_EVMHESMIAAW_EVMHESMIANW_EVMHESSF_EVMHESSFA_EVMHESSFAAW_EVMHESSFANW_EVMHESSIAAW_EVMHESSIANW_EVMHEUMI_EVMHEUMIA_EVMHEUMIAAW_EVMHEUMIANW_EVMHEUSIAAW_EVMHEUSIANW_EVMHOGSMFAA_EVMHOGSMFAN_EVMHOGSMIAA_EVMHOGSMIAN_EVMHOGUMIAA_EVMHOGUMIAN_EVMHOSMF_EVMHOSMFA_EVMHOSMFAAW_EVMHOSMFANW_EVMHOSMI_EVMHOSMIA_EVMHOSMIAAW_EVMHOSMIANW_EVMHOSSF_EVMHOSSFA_EVMHOSSFAAW_EVMHOSSFANW_EVMHOSSIAAW_EVMHOSSIANW_EVMHOUMI_EVMHOUMIA_EVMHOUMIAAW_EVMHOUMIANW_EVMHOUSIAAW_EVMHOUSIANW_EVMWHSMF_EVMWHSMFA_EVMWHSMI_EVMWHSMIA_EVMWHSSF_EVMWHSSFA_EVMWHUMI_EVMWHUMIA_EVMWLSMIAAW_EVMWLSMIANW_EVMWLSSIAAW_EVMWLSSIANW_EVMWLUMI_EVMWLUMIA_EVMWLUMIAAW_EVMWLUMIANW_EVMWLUSIAAW_EVMWLUSIANW_EVMWSMF_EVMWSMFA_EVMWSMFAA_EVMWSMFAN_EVMWSMI_EVMWSMIA_EVMWSMIAA_EVMWSMIAN_EVMWSSF_EVMWSSFA_EVMWSSFAA_EVMWSSFAN_EVMWUMI_EVMWUMIA_EVMWUMIAA_EVMWUMIAN_EVSUBFSMIAAW_EVSUBFSSIAAW_EVSUBFUMIAAW_EVSUBFUSIAAW = 407,
3304 EVLDD_EVLDDX_EVLDH_EVLDHX_EVLDW_EVLDWX_EVLHHESPLAT_EVLHHESPLATX_EVLHHOSSPLAT_EVLHHOSSPLATX_EVLHHOUSPLAT_EVLHHOUSPLATX_EVLWHE_EVLWHEX_EVLWHOS_EVLWHOSX_EVLWHOU_EVLWHOUX_EVLWHSPLAT_EVLWHSPLATX_EVLWWSPLAT_EVLWWSPLATX = 408,
3305 EVSTDD_EVSTDDX_EVSTDH_EVSTDHX_EVSTDW_EVSTDWX_EVSTWHE_EVSTWHEX_EVSTWHO_EVSTWHOX_EVSTWWE_EVSTWWEX_EVSTWWO_EVSTWWOX = 409,
3306 HRFID_ATTN_CLRBHRB_MFBHRBE_NAP_RFCI_RFDI_RFMCI_SC = 410,
3307 RFI = 411,
3308 RFID = 412,
3309 DSS_DSSALL_DST_DST64_DSTST_DSTST64_DSTSTT_DSTSTT64_DSTT_DSTT64_ICBLQ_TLBIVAX_TLBLD_TLBLI_TLBRE_TLBRE2_TLBSX_TLBSX2_TLBSX2D_TLBWE_TLBWE2_MBAR_TRAP_DCCCI_ICCCI = 413,
3310 ICBLC = 414,
3311 MTSR_MTSRIN = 415,
3312 MFDCR = 416,
3313 MTDCR = 417,
3314 NOP_GT_PWR6_NOP_GT_PWR7 = 418,
3315 TLBIA = 419,
3316 WRTEE_WRTEEI = 420,
3317 HASHCHK_HASHCHK8_HASHCHKP_HASHCHKP8_HASHST_HASHST8_HASHSTP_HASHSTP8_ADDEX_ADDEX8_CDTBCD_CDTBCD8_CBCDTD_CBCDTD8 = 421,
3318 MSYNC = 422,
3319 SLBSYNC = 423,
3320 SLBFEE_rec = 424,
3321 STOP = 425,
3322 DCBA_DCBI = 426,
3323 FCFID_FCFIDS_FCFIDU_FCFIDUS_FCTID_FCTIDU_FCTIDUZ_FCTIDZ_FCTIW_FCTIWU_FCTIWUZ_FCTIWZ_FRE_FRES_FRIMD_FRIMS_FRIND_FRINS_FRIPD_FRIPS_FRIZD_FRIZS_FRSP_FRSQRTE_FRSQRTES = 427,
3324 VCFSX_VCFUX_VCTSXS_VCTUXS = 428,
3325 VCFSX_0_VCFUX_0_VCTSXS_0_VCTUXS_0_XVCVSPHP = 429,
3326 VLOGEFP_VREFP_VRFIM_VRFIN_VRFIP_VRFIZ_VRSQRTEFP_XVCVDPSP_XVCVSXDSP_XVCVSXWSP_XVCVUXDSP_XVCVUXWSP_XVRESP_XVRSQRTESP = 430,
3327 XSCVDPHP = 431,
3328 XSCVDPSP_XSCVDPSXDS_XSCVDPSXDSs_XSCVDPSXWS_XSCVDPSXWSs_XSCVDPUXDS_XSCVDPUXDSs_XSCVDPUXWS_XSCVDPUXWSs_XSCVSPDP_XSCVSXDDP_XSCVUXDDP_XSRDPI_XSRDPIC_XSRDPIM_XSRDPIP_XSRDPIZ_XSREDP_XSRSQRTEDP = 432,
3329 XVCVDPSXDS_XVCVDPSXWS_XVCVDPUXDS_XVCVDPUXWS_XVCVSPSXDS_XVCVSPSXWS_XVCVSPUXDS_XVCVSPUXWS_XVCVSXDDP_XVCVSXWDP_XVCVUXDDP_XVCVUXWDP_XVRDPI_XVRDPIC_XVRDPIM_XVRDPIP_XVRDPIZ_XVREDP_XVRSPI_XVRSPIC_XVRSPIM_XVRSPIP_XVRSPIZ_XVRSQRTEDP = 433,
3330 XVCVSPBF16 = 434,
3331 FADDS_FMULS_FSUBS = 435,
3332 FMUL = 436,
3333 VADDFP = 437,
3334 XSMULDP_XSMULSP = 438,
3335 XVADDDP_XVMULDP_XVSUBDP = 439,
3336 XVADDSP_XVMULSP_XVSUBSP = 440,
3337 VMADDFP_VNMSUBFP = 441,
3338 FADDS_rec_FMULS_rec_FSUBS_rec = 442,
3339 FMUL_rec = 443,
3340 FCFID_rec_FCFIDS_rec_FCFIDU_rec_FCFIDUS_rec_FCTID_rec_FCTIDU_rec_FCTIDUZ_rec_FCTIDZ_rec_FCTIW_rec_FCTIWU_rec_FCTIWUZ_rec_FCTIWZ_rec_FRE_rec_FRES_rec_FRIMD_rec_FRIMS_rec_FRIND_rec_FRINS_rec_FRIPD_rec_FRIPS_rec_FRIZD_rec_FRIZS_rec_FRSP_rec_FRSQRTE_rec_FRSQRTES_rec = 444,
3341 BCC_BCCA_BCCCTR_BCCCTR8_BCCCTRL_BCCCTRL8_BCCL_BCCLA_BCCLR_BCCLRL_BCCTR_BCCTR8_BCCTR8n_BCCTRn_gBCCTR_BCCTRL_BCCTRL8_BCCTRL8n_BCCTRLn_gBCCTRL_BCLR_BCLRn_BDNZLR_BDNZLR8_BDNZLRm_BDNZLRp_BDZLR_BDZLR8_BDZLRm_BDZLRp_gBCLR_BCLRL_BCLRLn_BDNZLRL_BDNZLRLm_BDNZLRLp_BDZLRL_BDZLRLm_BDZLRLp_gBCLRL_BLR_BLR8_BLRL = 445,
3342 CTRL_DEP_TAILB_TAILB8_TAILBA_TAILBA8 = 446,
3343 VGNB = 447,
3344 VSBOX = 448,
3345 CFUGED_PDEPD_PEXTD = 449,
3346 VCFUGED_VCLZDM_VCTZDM_VPDEPD_VPEXTD = 450,
3347 XSCVDPQP_XSCVQPDP_XSCVQPDPO_XSCVQPSDZ_XSCVQPSWZ_XSCVQPUDZ_XSCVQPUWZ_XSCVSDQP_XSCVUDQP_XSRQPI_XSRQPIX_XSRQPXP = 451,
3348 XSCVQPSQZ_XSCVQPUQZ_XSCVSQQP_XSCVUQQP = 452,
3349 HASHST_HASHST8_HASHSTP_HASHSTP8 = 453,
3350 XSMULQP_XSMULQPO = 454,
3351 VDIVESQ_VDIVEUQ_VDIVSQ_VDIVUQ = 455,
3352 VMODSQ_VMODUQ = 456,
3353 VDIVSD_VDIVUD = 457,
3354 VMODSD_VMODUD = 458,
3355 VDIVSW_VDIVUW = 459,
3356 VMODSW_VMODUW = 460,
3357 VDIVESD_VDIVEUD = 461,
3358 VDIVESW_VDIVEUW = 462,
3359 BCDCFN_rec_BCDCFZ_rec_BCDCTN_rec_BCDCTZ_rec_BCDSETSGN_rec_VMUL10CUQ_VMUL10UQ_XSTSTDCQP_XSXSIGQP = 463,
3360 XXGENPCVBM = 464,
3361 BCDCPSGN_rec_BCDS_rec_BCDTRUNC_rec_BCDUS_rec_BCDUTRUNC_rec_VMUL10ECUQ_VMUL10EUQ = 465,
3362 VADDCUQ_VSUBCUQ = 466,
3363 XSCMPEQQP_XSCMPGEQP_XSCMPGTQP_XSMAXCQP_XSMINCQP = 467,
3364 MTVSRBMI = 468,
3365 CBCDTD_CBCDTD8_CDTBCD_CDTBCD8 = 469,
3366 FTSQRT = 470,
3367 MTVSRBM_MTVSRDM_MTVSRHM_MTVSRQM_MTVSRWM_VCNTMBB_VCNTMBD_VCNTMBH_VCNTMBW_VEXPANDBM_VEXPANDDM_VEXPANDHM_VEXPANDQM_VEXPANDWM_VEXTRACTBM_VEXTRACTDM_VEXTRACTHM_VEXTRACTQM_VEXTRACTWM_XVTLSBB = 471,
3368 RLDIC_rec = 472,
3369 RLDICL_32_rec_RLDICL_rec_RLDICR_rec = 473,
3370 RLWINM8_rec_RLWINM_rec = 474,
3371 VCTZB_VCTZD_VCTZH_VCTZW_VPRTYBD_VPRTYBW = 475,
3372 VPOPCNTB_VPOPCNTH = 476,
3373 VSHASIGMAD_VSHASIGMAW = 477,
3374 XSTSQRTDP = 478,
3375 XVTSQRTDP = 479,
3376 XVTSQRTSP = 480,
3377 XVTSTDCDP_XVTSTDCSP = 481,
3378 SLD_rec_SRD_rec = 482,
3379 TDI = 483,
3380 TWI = 484,
3381 VADDCUW_VADDSBS_VADDSHS_VADDSWS_VADDUBS_VADDUHS_VADDUWS_VAVGSB_VAVGSH_VAVGSW_VAVGUB_VAVGUH_VAVGUW_VMAXFP_VMINFP_VSUBCUW_VSUBSBS_VSUBSHS_VSUBSWS_VSUBUBS_VSUBUHS_VSUBUWS = 485,
3382 VCMPBFP_VCMPBFP_rec_VCMPEQFP_VCMPEQFP_rec_VCMPEQUB_rec_VCMPEQUH_rec_VCMPEQUW_rec_VCMPGEFP_VCMPGEFP_rec_VCMPGTFP_VCMPGTFP_rec_VCMPGTSB_rec_VCMPGTSH_rec_VCMPGTSW_rec_VCMPGTUB_rec_VCMPGTUH_rec_VCMPGTUW_rec_XVCMPEQSP_XVCMPEQSP_rec_XVCMPGESP_XVCMPGESP_rec_XVCMPGTSP_XVCMPGTSP_rec = 486,
3383 VCMPEQUD_rec_VCMPGTSD_rec_VCMPGTUD_rec = 487,
3384 VCMPEQUQ_VCMPEQUQ_rec_VCMPGTSQ_VCMPGTSQ_rec_VCMPGTUQ_VCMPGTUQ_rec = 488,
3385 VCMPNEB_rec_VCMPNEH_rec_VCMPNEW_rec_VCMPNEZB_rec_VCMPNEZH_rec_VCMPNEZW_rec = 489,
3386 VCMPSQ_VCMPUQ = 490,
3387 XSMAXCDP_XSMAXJDP_XSMINCDP_XSMINJDP = 491,
3388 TRAP = 492,
3389 SRAWI_rec = 493,
3390 VRLQ_VRLQNM_VSLQ_VSRAQ_VSRQ = 494,
3391 VRLQMI = 495,
3392 DSS_DSSALL = 496,
3393 WAITP10 = 497,
3394 ADDI_ADDI8_LI_LI8_ADDIS_ADDIS8_LIS_LIS8_NEG_NEG8_NEG8O_NEGO = 498,
3395 ADDIdtprelL32_ADDISdtprelHA32 = 499,
3396 ADDItlsldLADDR32 = 500,
3397 ADDIC_ADDIC8_ADDME_ADDME8_SUBFIC_SUBFIC8_SUBFME_SUBFME8_SUBFZE_SUBFZE8 = 501,
3398 ADDME8O_ADDMEO_ADDZE8O_ADDZEO_ANDI8_rec_ANDIS8_rec_SUBFME8O_SUBFMEO_SUBFZE8O_SUBFZEO = 502,
3399 ADDZE_ADDZE8 = 503,
3400 ANDI_rec_ANDIS_rec = 504,
3401 CMPDI_CMPWI_CMPLDI_CMPLWI = 505,
3402 EXTSB_EXTSB8_EXTSB8_32_64_EXTSB8_rec_EXTSB_rec_EXTSH_EXTSH8_EXTSH8_32_64_EXTSH8_rec_EXTSH_rec_EXTSW_EXTSW_32_EXTSW_32_64_EXTSW_32_64_rec_EXTSW_rec = 506,
3403 FABSD_FABSS_FMR_FNABSD_FNABSS_FNEGD_FNEGS = 507,
3404 NEG8_rec_NEG_rec_ORI_ORI8_ORIS_ORIS8_XORI_XORI8_XORIS_XORIS8 = 508,
3405 NOP = 509,
3406 RLDICL_RLDICL_32_RLDICL_32_64_RLDICR_RLDICR_32 = 510,
3407 RLWINM_RLWINM8 = 511,
3408 SETB_SETB8 = 512,
3409 SETBC_SETBC8_SETBCR_SETBCR8_SETNBC_SETNBC8_SETNBCR_SETNBCR8 = 513,
3410 SRAWI = 514,
3411 VEXTSB2D_VEXTSB2Ds_VEXTSB2W_VEXTSB2Ws_VEXTSH2D_VEXTSH2Ds_VEXTSH2W_VEXTSH2Ws_VEXTSW2D_VEXTSW2Ds_VNEGD_VNEGW = 515,
3412 VEXTSD2Q = 516,
3413 XSABSDP_XSNABSDP_XSNABSDPs_XSNEGDP = 517,
3414 XSABSQP_XSNABSQP_XSNEGQP_XSXEXPQP_XVXEXPDP_XVXEXPSP = 518,
3415 XVABSDP_XVNABSDP_XVNEGDP = 519,
3416 XVXSIGDP_XVXSIGSP = 520,
3417 ADDE8O_ADDEO_SUBFE8O_SUBFEO_SUBF8O_SUBFO = 521,
3418 ADDEX_ADDEX8 = 522,
3419 ADD4O_ADD8O = 523,
3420 CMPB_CMPB8 = 524,
3421 CRAND_CRANDC_CR6SET_CREQV_CRSET_CRNAND_CRNOR_CROR_CRORC_CR6UNSET_CRUNSET = 525,
3422 DST_DST64_DSTT_DSTT64_DSTST_DSTST64_DSTSTT_DSTSTT64 = 526,
3423 VRLDNM_VRLWNM_V_SET0_V_SET0B_V_SET0H_XSCPSGNQP_XSIEXPQP_XVIEXPDP_XVIEXPSP = 527,
3424 XXLEQVOnes = 528,
3425 MFFS_MFFS_rec_MFFSL = 529,
3426 MFFSCDRNI_MFFSCRNI = 530,
3427 MTFSB0 = 531,
3428 ADDIC_rec_ADDME8_rec_ADDME_rec_ADDME8O_rec_ADDMEO_rec_ADDZE8_rec_ADDZE_rec_ADDZE8O_rec_ADDZEO_rec_SUBFME8_rec_SUBFME_rec_SUBFME8O_rec_SUBFMEO_rec_SUBFZE8_rec_SUBFZE_rec_SUBFZE8O_rec_SUBFZEO_rec = 532,
3429 NEG8O_rec_NEGO_rec = 533,
3430 ADDE8_rec_ADDE_rec_ADDE8O_rec_ADDEO_rec_SUBFE8_rec_SUBFE_rec_SUBFE8O_rec_SUBFEO_rec_SUBF8O_rec_SUBFO_rec = 534,
3431 HRFID_SC = 535,
3432 MTFSFI_MTFSFIb_MTFSFI_rec = 536,
3433 FABSD_rec_FABSS_rec_FMR_rec_FNABSD_rec_FNABSS_rec_FNEGD_rec_FNEGS_rec = 537,
3434 ADDC8_rec_ADDC_rec_SUBFC8_rec_SUBFC_rec = 538,
3435 VSTRIBL_rec_VSTRIBR_rec_VSTRIHL_rec_VSTRIHR_rec = 539,
3436 LBZ_LBZ8_LHZ_LHZ8_LWZ_LWZ8 = 540,
3437 LD = 541,
3438 LDtoc_LDtocBA_LDtocCPT_LDtocJTI_LDtocL_SPILLTOVSR_LD_LWZtoc_LWZtocL = 542,
3439 DFLOADf32 = 543,
3440 DFLOADf64 = 544,
3441 LFD = 545,
3442 LHA_LHA8 = 546,
3443 LXSD_LXV = 547,
3444 DCBT_DCBTST = 548,
3445 ICBT = 549,
3446 LDBRX = 550,
3447 SPILLTOVSR_LDX = 551,
3448 LXVRBX_LXVRDX_LXVRHX_LXVRWX = 552,
3449 MTSR = 553,
3450 MTVRSAVE_MTVRSAVEv = 554,
3451 LBZCIX_LDCIX_LHZCIX_LWZCIX = 555,
3452 PLBZ_PLBZ8_PLBZ8pc_PLBZpc_PLD_PLDpc_PLFD_PLFDpc_PLFS_PLFSpc_PLHA_PLHA8_PLHA8pc_PLHApc_PLHZ_PLHZ8_PLHZ8pc_PLHZpc_PLWA_PLWA8_PLWA8pc_PLWApc_PLWZ_PLWZ8_PLWZ8pc_PLWZpc_PLXSD_PLXSDpc_PLXSSP_PLXSSPpc_PLXV_PLXVpc_PLXVP_PLXVPpc = 556,
3453 LFS = 557,
3454 LXSSP = 558,
3455 LXVP = 559,
3456 LXVPX = 560,
3457 MFSR = 561,
3458 MFTB8 = 562,
3459 XXSETACCZ = 563,
3460 XVBF16GER2_XVF16GER2_XVF32GER_XVF64GER_XVI16GER2_XVI16GER2S_XVI4GER8_XVI8GER4 = 564,
3461 XVBF16GER2NN_XVBF16GER2NP_XVBF16GER2PN_XVBF16GER2PP_XVF16GER2NN_XVF16GER2NP_XVF16GER2PN_XVF16GER2PP_XVF32GERNN_XVF32GERNP_XVF32GERPN_XVF32GERPP_XVF64GERNN_XVF64GERNP_XVF64GERPN_XVF64GERPP_XVI16GER2PP_XVI16GER2SPP_XVI4GER8PP_XVI8GER4PP = 565,
3462 XVI8GER4SPP = 566,
3463 PMXVBF16GER2_PMXVF16GER2_PMXVF32GER_PMXVF64GER_PMXVI16GER2_PMXVI16GER2S_PMXVI4GER8_PMXVI8GER4 = 567,
3464 PMXVBF16GER2NN_PMXVBF16GER2NP_PMXVBF16GER2PN_PMXVBF16GER2PP_PMXVF16GER2NN_PMXVF16GER2NP_PMXVF16GER2PN_PMXVF16GER2PP_PMXVF32GERNN_PMXVF32GERNP_PMXVF32GERPN_PMXVF32GERPP_PMXVF64GERNN_PMXVF64GERNP_PMXVF64GERPN_PMXVF64GERPP_PMXVI16GER2PP_PMXVI16GER2SPP_PMXVI4GER8PP_PMXVI8GER4PP = 568,
3465 PMXVI8GER4SPP = 569,
3466 XXMTACC = 570,
3467 XXMFACC = 571,
3468 VMULHSD_VMULHUD_VMULLD = 572,
3469 LXVKQ = 573,
3470 VSPLTISB_VSPLTISH_VSPLTISW = 574,
3471 V_SETALLONES_V_SETALLONESB_V_SETALLONESH = 575,
3472 XXSPLTIB = 576,
3473 BRD_BRH_BRH8_BRW_BRW8 = 577,
3474 MFVSRLD_MTVSRWS_VCLZLSBB_VCTZLSBB_VEXTRACTD_VEXTRACTUB_VEXTRACTUH_VEXTRACTUW_VINSERTD_VINSERTW_VPRTYBQ = 578,
3475 VGBBD_VUPKHSW_VUPKLSW = 579,
3476 VSPLTB_VSPLTBs_VSPLTH_VSPLTHs_VSPLTW_XXSPLTW_XXSPLTWs = 580,
3477 VSTRIBL_VSTRIBR_VSTRIHL_VSTRIHR_XXGENPCVDM_XXGENPCVHM_XXGENPCVWM = 581,
3478 VUPKHPX_VUPKHSB_VUPKHSH_VUPKLPX_VUPKLSB_VUPKLSH = 582,
3479 XVCVBF16SPN = 583,
3480 XXBRD_XXBRH_XXBRQ_XXBRW_XXEXTRACTUW = 584,
3481 VBPERMQ_VPKSDSS_VPKSDUS_VPKUDUM_VPKUDUS = 585,
3482 VCLRLB_VCLRRB_VINSD_VINSW_VSLDBI_VSRDBI = 586,
3483 VPKPX_VPKSHSS_VPKSHUS_VPKSWSS_VPKSWUS_VPKUHUM_VPKUHUS_VPKUWUM_VPKUWUS = 587,
3484 VSLV_VSRV_XXINSERTW = 588,
3485 VEXTDDVLX_VEXTDDVRX_VEXTDUBVLX_VEXTDUBVRX_VEXTDUHVLX_VEXTDUHVRX_VEXTDUWVLX_VEXTDUWVRX_VINSBLX_VINSBRX_VINSBVLX_VINSBVRX_VINSDLX_VINSDRX_VINSHLX_VINSHRX_VINSHVLX_VINSHVRX_VINSWLX_VINSWRX_VINSWVLX_VINSWVRX = 589,
3486 VSUMSWS = 590,
3487 XXSPLTIDP_XXSPLTIW = 591,
3488 XXSPLTI32DX = 592,
3489 XXBLENDVB_XXBLENDVD_XXBLENDVH_XXBLENDVW_XXEVAL = 593,
3490 XXPERMX = 594,
3491 PSTXVP_PSTXVPpc = 595,
3492 STB_STB8_STH_STH8_STW_STW8 = 596,
3493 SPILLTOVSR_ST = 597,
3494 STD = 598,
3495 DFSTOREf32_DFSTOREf64 = 599,
3496 STFD_STFS = 600,
3497 STFDU_STFSU = 601,
3498 STXSD = 602,
3499 STXSSP = 603,
3500 STXV = 604,
3501 DCBF_DCBST_DCBZ = 605,
3502 ICBI = 606,
3503 SPILLTOVSR_STX = 607,
3504 STIWX = 608,
3505 STXVRBX_STXVRDX_STXVRHX_STXVRWX = 609,
3506 EnforceIEIO = 610,
3507 STHCIX_STWCIX = 611,
3508 SYNCP10 = 612,
3509 PSTB_PSTB8_PSTB8pc_PSTBpc_PSTD_PSTDpc_PSTFD_PSTFDpc_PSTFS_PSTFSpc_PSTH_PSTH8_PSTH8pc_PSTHpc_PSTW_PSTW8_PSTW8pc_PSTWpc_PSTXSD_PSTXSDpc_PSTXSSP_PSTXSSPpc_PSTXV_PSTXVpc = 613,
3510 STXVP = 614,
3511 STXVPX = 615,
3512 ATTN_NAP = 616,
3513 DCBZL = 617,
3514 DCCCI_ICBLQ_ICCCI_TLBLD_TLBLI_TLBRE2_TLBSX2_TLBSX2D_TLBWE2 = 618,
3515 CLRBHRB_MFBHRBE = 619,
3516 PADDI_PADDI8_PADDI8pc_PADDIpc = 620,
3517 PLI_PLI8 = 621,
3518 VMULESB_VMULESH_VMULEUB_VMULEUH_VMULOSB_VMULOSH_VMULOUB_VMULOUH_VSUM2SWS_VSUM4SBS_VSUM4SHS_VSUM4UBS = 622,
3519 VMULESD_VMULEUD_VMULHSW_VMULHUW_VMULOSD_VMULOUD = 623,
3520 VMSUMCUD = 624,
3521 SCHED_LIST_END = 625
3522 };
3523} // end namespace Sched
3524} // end namespace PPC
3525} // end namespace llvm
3526#endif // GET_INSTRINFO_SCHED_ENUM
3527
3528#if defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
3529namespace llvm {
3530
3531struct PPCInstrTable {
3532 MCInstrDesc Insts[2867];
3533 static_assert(alignof(MCInstrDesc) >= alignof(MCOperandInfo), "Unwanted padding between Insts and OperandInfo");
3534 MCOperandInfo OperandInfo[1287];
3535 static_assert(alignof(MCOperandInfo) >= alignof(MCPhysReg), "Unwanted padding between OperandInfo and ImplicitOps");
3536 MCPhysReg ImplicitOps[222];
3537};
3538
3539} // end namespace llvm
3540#endif // defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
3541
3542#ifdef GET_INSTRINFO_MC_DESC
3543#undef GET_INSTRINFO_MC_DESC
3544namespace llvm {
3545
3546static_assert(sizeof(MCOperandInfo) % sizeof(MCPhysReg) == 0);
3547static constexpr unsigned PPCImpOpBase = sizeof PPCInstrTable::OperandInfo / (sizeof(MCPhysReg));
3548
3549extern const PPCInstrTable PPCDescs = {
3550 {
3551 { 2866, 4, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 1283, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2866 = gBCat
3552 { 2865, 4, 0, 4, 102, 2, 2, PPCImpOpBase + 218, 1283, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2865 = gBCLat
3553 { 2864, 3, 0, 4, 445, 3, 2, PPCImpOpBase + 213, 1280, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2864 = gBCLRL
3554 { 2863, 3, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1280, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2863 = gBCLR
3555 { 2862, 4, 0, 4, 102, 2, 2, PPCImpOpBase + 218, 1276, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2862 = gBCLAat
3556 { 2861, 3, 0, 4, 102, 2, 2, PPCImpOpBase + 218, 1273, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2861 = gBCLA
3557 { 2860, 3, 0, 4, 102, 2, 2, PPCImpOpBase + 218, 1270, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2860 = gBCL
3558 { 2859, 3, 0, 4, 445, 3, 2, PPCImpOpBase + 213, 1280, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2859 = gBCCTRL
3559 { 2858, 3, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1280, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2858 = gBCCTR
3560 { 2857, 4, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 1276, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2857 = gBCAat
3561 { 2856, 3, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 1273, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2856 = gBCA
3562 { 2855, 3, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 1270, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #2855 = gBC
3563 { 2854, 3, 1, 4, 580, 0, 0, PPCImpOpBase + 0, 1258, 0, 0x0ULL }, // Inst #2854 = XXSPLTWs
3564 { 2853, 3, 1, 4, 580, 0, 0, PPCImpOpBase + 0, 1267, 0, 0x0ULL }, // Inst #2853 = XXSPLTW
3565 { 2852, 2, 1, 8, 591, 0, 0, PPCImpOpBase + 0, 630, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x80ULL }, // Inst #2852 = XXSPLTIW
3566 { 2851, 2, 1, 8, 591, 0, 0, PPCImpOpBase + 0, 630, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x80ULL }, // Inst #2851 = XXSPLTIDP
3567 { 2850, 2, 1, 4, 576, 0, 0, PPCImpOpBase + 0, 630, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2850 = XXSPLTIB
3568 { 2849, 4, 1, 8, 592, 0, 0, PPCImpOpBase + 0, 1263, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x80ULL }, // Inst #2849 = XXSPLTI32DX
3569 { 2848, 3, 1, 4, 165, 0, 0, PPCImpOpBase + 0, 1258, 0, 0x0ULL }, // Inst #2848 = XXSLDWIs
3570 { 2847, 4, 1, 4, 165, 0, 0, PPCImpOpBase + 0, 1254, 0, 0x0ULL }, // Inst #2847 = XXSLDWI
3571 { 2846, 1, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 1262, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2846 = XXSETACCZW
3572 { 2845, 1, 1, 4, 563, 0, 0, PPCImpOpBase + 0, 1261, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2845 = XXSETACCZ
3573 { 2844, 4, 1, 4, 270, 0, 0, PPCImpOpBase + 0, 1224, 0, 0x0ULL }, // Inst #2844 = XXSEL
3574 { 2843, 5, 1, 8, 594, 0, 0, PPCImpOpBase + 0, 1228, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2843 = XXPERMX
3575 { 2842, 4, 1, 4, 325, 0, 0, PPCImpOpBase + 0, 1250, 0, 0x0ULL }, // Inst #2842 = XXPERMR
3576 { 2841, 3, 1, 4, 165, 0, 0, PPCImpOpBase + 0, 1258, 0, 0x0ULL }, // Inst #2841 = XXPERMDIs
3577 { 2840, 4, 1, 4, 165, 0, 0, PPCImpOpBase + 0, 1254, 0, 0x0ULL }, // Inst #2840 = XXPERMDI
3578 { 2839, 4, 1, 4, 325, 0, 0, PPCImpOpBase + 0, 1250, 0, 0x0ULL }, // Inst #2839 = XXPERM
3579 { 2838, 2, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 1248, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2838 = XXMTACCW
3580 { 2837, 2, 1, 4, 570, 0, 0, PPCImpOpBase + 0, 1246, 0, 0x0ULL }, // Inst #2837 = XXMTACC
3581 { 2836, 3, 1, 4, 165, 0, 0, PPCImpOpBase + 0, 1181, 0, 0x0ULL }, // Inst #2836 = XXMRGLW
3582 { 2835, 3, 1, 4, 165, 0, 0, PPCImpOpBase + 0, 1181, 0, 0x0ULL }, // Inst #2835 = XXMRGHW
3583 { 2834, 2, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 1248, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2834 = XXMFACCW
3584 { 2833, 2, 1, 4, 571, 0, 0, PPCImpOpBase + 0, 1246, 0, 0x0ULL }, // Inst #2833 = XXMFACC
3585 { 2832, 1, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1243, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2832 = XXLXORz
3586 { 2831, 1, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1245, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2831 = XXLXORspz
3587 { 2830, 1, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1244, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2830 = XXLXORdpz
3588 { 2829, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1181, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2829 = XXLXOR
3589 { 2828, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1122, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2828 = XXLORf
3590 { 2827, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 1181, 0, 0x0ULL }, // Inst #2827 = XXLORC
3591 { 2826, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1181, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2826 = XXLOR
3592 { 2825, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1181, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2825 = XXLNOR
3593 { 2824, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 1181, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2824 = XXLNAND
3594 { 2823, 1, 1, 4, 528, 0, 0, PPCImpOpBase + 0, 1243, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Bitcast)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2823 = XXLEQVOnes
3595 { 2822, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 1181, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2822 = XXLEQV
3596 { 2821, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1181, 0, 0x0ULL }, // Inst #2821 = XXLANDC
3597 { 2820, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 1181, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2820 = XXLAND
3598 { 2819, 4, 1, 4, 588, 0, 0, PPCImpOpBase + 0, 1239, 0, 0x0ULL }, // Inst #2819 = XXINSERTW
3599 { 2818, 3, 1, 4, 581, 0, 0, PPCImpOpBase + 0, 1236, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2818 = XXGENPCVWM
3600 { 2817, 3, 1, 4, 581, 0, 0, PPCImpOpBase + 0, 1236, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2817 = XXGENPCVHM
3601 { 2816, 3, 1, 4, 581, 0, 0, PPCImpOpBase + 0, 1236, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2816 = XXGENPCVDM
3602 { 2815, 3, 1, 4, 464, 0, 0, PPCImpOpBase + 0, 1236, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2815 = XXGENPCVBM
3603 { 2814, 3, 1, 4, 584, 0, 0, PPCImpOpBase + 0, 1233, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2814 = XXEXTRACTUW
3604 { 2813, 5, 1, 8, 593, 0, 0, PPCImpOpBase + 0, 1228, 0, 0x80ULL }, // Inst #2813 = XXEVAL
3605 { 2812, 2, 1, 4, 584, 0, 0, PPCImpOpBase + 0, 1179, 0, 0x0ULL }, // Inst #2812 = XXBRW
3606 { 2811, 2, 1, 4, 584, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2811 = XXBRQ
3607 { 2810, 2, 1, 4, 584, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2810 = XXBRH
3608 { 2809, 2, 1, 4, 584, 0, 0, PPCImpOpBase + 0, 1179, 0, 0x0ULL }, // Inst #2809 = XXBRD
3609 { 2808, 4, 1, 8, 593, 0, 0, PPCImpOpBase + 0, 1224, 0, 0x80ULL }, // Inst #2808 = XXBLENDVW
3610 { 2807, 4, 1, 8, 593, 0, 0, PPCImpOpBase + 0, 1224, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2807 = XXBLENDVH
3611 { 2806, 4, 1, 8, 593, 0, 0, PPCImpOpBase + 0, 1224, 0, 0x80ULL }, // Inst #2806 = XXBLENDVD
3612 { 2805, 4, 1, 8, 593, 0, 0, PPCImpOpBase + 0, 1224, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2805 = XXBLENDVB
3613 { 2804, 2, 1, 4, 520, 0, 0, PPCImpOpBase + 0, 1179, 0, 0x0ULL }, // Inst #2804 = XVXSIGSP
3614 { 2803, 2, 1, 4, 520, 0, 0, PPCImpOpBase + 0, 1179, 0, 0x0ULL }, // Inst #2803 = XVXSIGDP
3615 { 2802, 2, 1, 4, 518, 0, 0, PPCImpOpBase + 0, 1179, 0, 0x0ULL }, // Inst #2802 = XVXEXPSP
3616 { 2801, 2, 1, 4, 518, 0, 0, PPCImpOpBase + 0, 1179, 0, 0x0ULL }, // Inst #2801 = XVXEXPDP
3617 { 2800, 3, 1, 4, 481, 0, 0, PPCImpOpBase + 0, 1221, 0, 0x0ULL }, // Inst #2800 = XVTSTDCSP
3618 { 2799, 3, 1, 4, 481, 0, 0, PPCImpOpBase + 0, 1221, 0, 0x0ULL }, // Inst #2799 = XVTSTDCDP
3619 { 2798, 2, 1, 4, 480, 1, 0, PPCImpOpBase + 134, 1219, 0, 0x0ULL }, // Inst #2798 = XVTSQRTSP
3620 { 2797, 2, 1, 4, 479, 1, 0, PPCImpOpBase + 134, 1219, 0, 0x0ULL }, // Inst #2797 = XVTSQRTDP
3621 { 2796, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1219, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2796 = XVTLSBB
3622 { 2795, 3, 1, 4, 168, 1, 0, PPCImpOpBase + 134, 1216, 0, 0x0ULL }, // Inst #2795 = XVTDIVSP
3623 { 2794, 3, 1, 4, 163, 1, 0, PPCImpOpBase + 134, 1216, 0, 0x0ULL }, // Inst #2794 = XVTDIVDP
3624 { 2793, 3, 1, 4, 440, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2793 = XVSUBSP
3625 { 2792, 3, 1, 4, 439, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2792 = XVSUBDP
3626 { 2791, 2, 1, 4, 178, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2791 = XVSQRTSP
3627 { 2790, 2, 1, 4, 180, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2790 = XVSQRTDP
3628 { 2789, 2, 1, 4, 430, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2789 = XVRSQRTESP
3629 { 2788, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2788 = XVRSQRTEDP
3630 { 2787, 2, 1, 4, 433, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2787 = XVRSPIZ
3631 { 2786, 2, 1, 4, 433, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2786 = XVRSPIP
3632 { 2785, 2, 1, 4, 433, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2785 = XVRSPIM
3633 { 2784, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2784 = XVRSPIC
3634 { 2783, 2, 1, 4, 433, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2783 = XVRSPI
3635 { 2782, 2, 1, 4, 430, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2782 = XVRESP
3636 { 2781, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2781 = XVREDP
3637 { 2780, 2, 1, 4, 433, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2780 = XVRDPIZ
3638 { 2779, 2, 1, 4, 433, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2779 = XVRDPIP
3639 { 2778, 2, 1, 4, 433, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2778 = XVRDPIM
3640 { 2777, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2777 = XVRDPIC
3641 { 2776, 2, 1, 4, 433, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2776 = XVRDPI
3642 { 2775, 4, 1, 4, 189, 1, 0, PPCImpOpBase + 134, 1212, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2775 = XVNMSUBMSP
3643 { 2774, 4, 1, 4, 192, 1, 0, PPCImpOpBase + 134, 1212, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2774 = XVNMSUBMDP
3644 { 2773, 4, 1, 4, 189, 1, 0, PPCImpOpBase + 134, 1212, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2773 = XVNMSUBASP
3645 { 2772, 4, 1, 4, 192, 1, 0, PPCImpOpBase + 134, 1212, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2772 = XVNMSUBADP
3646 { 2771, 4, 1, 4, 189, 1, 0, PPCImpOpBase + 134, 1212, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2771 = XVNMADDMSP
3647 { 2770, 4, 1, 4, 192, 1, 0, PPCImpOpBase + 134, 1212, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2770 = XVNMADDMDP
3648 { 2769, 4, 1, 4, 189, 1, 0, PPCImpOpBase + 134, 1212, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2769 = XVNMADDASP
3649 { 2768, 4, 1, 4, 192, 1, 0, PPCImpOpBase + 134, 1212, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2768 = XVNMADDADP
3650 { 2767, 2, 1, 4, 266, 1, 0, PPCImpOpBase + 134, 1179, 0, 0x0ULL }, // Inst #2767 = XVNEGSP
3651 { 2766, 2, 1, 4, 519, 1, 0, PPCImpOpBase + 134, 1179, 0, 0x0ULL }, // Inst #2766 = XVNEGDP
3652 { 2765, 2, 1, 4, 266, 1, 0, PPCImpOpBase + 134, 1179, 0, 0x0ULL }, // Inst #2765 = XVNABSSP
3653 { 2764, 2, 1, 4, 519, 1, 0, PPCImpOpBase + 134, 1179, 0, 0x0ULL }, // Inst #2764 = XVNABSDP
3654 { 2763, 3, 1, 4, 440, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2763 = XVMULSP
3655 { 2762, 3, 1, 4, 439, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2762 = XVMULDP
3656 { 2761, 4, 1, 4, 189, 1, 0, PPCImpOpBase + 134, 1212, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2761 = XVMSUBMSP
3657 { 2760, 4, 1, 4, 192, 1, 0, PPCImpOpBase + 134, 1212, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2760 = XVMSUBMDP
3658 { 2759, 4, 1, 4, 189, 1, 0, PPCImpOpBase + 134, 1212, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2759 = XVMSUBASP
3659 { 2758, 4, 1, 4, 192, 1, 0, PPCImpOpBase + 134, 1212, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2758 = XVMSUBADP
3660 { 2757, 3, 1, 4, 161, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2757 = XVMINSP
3661 { 2756, 3, 1, 4, 161, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2756 = XVMINDP
3662 { 2755, 3, 1, 4, 161, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2755 = XVMAXSP
3663 { 2754, 3, 1, 4, 161, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2754 = XVMAXDP
3664 { 2753, 4, 1, 4, 189, 1, 0, PPCImpOpBase + 134, 1212, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2753 = XVMADDMSP
3665 { 2752, 4, 1, 4, 192, 1, 0, PPCImpOpBase + 134, 1212, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2752 = XVMADDMDP
3666 { 2751, 4, 1, 4, 189, 1, 0, PPCImpOpBase + 134, 1212, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2751 = XVMADDASP
3667 { 2750, 4, 1, 4, 192, 1, 0, PPCImpOpBase + 134, 1212, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2750 = XVMADDADP
3668 { 2749, 3, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 1181, 0, 0x0ULL }, // Inst #2749 = XVIEXPSP
3669 { 2748, 3, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 1181, 0, 0x0ULL }, // Inst #2748 = XVIEXPDP
3670 { 2747, 4, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 1194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2747 = XVI8GER4WSPP
3671 { 2746, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2746 = XVI8GER4WPP
3672 { 2745, 3, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1191, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2745 = XVI8GER4W
3673 { 2744, 4, 1, 4, 566, 0, 0, PPCImpOpBase + 0, 1187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2744 = XVI8GER4SPP
3674 { 2743, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2743 = XVI8GER4PP
3675 { 2742, 3, 1, 4, 564, 0, 0, PPCImpOpBase + 0, 1184, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2742 = XVI8GER4
3676 { 2741, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2741 = XVI4GER8WPP
3677 { 2740, 3, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1191, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2740 = XVI4GER8W
3678 { 2739, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2739 = XVI4GER8PP
3679 { 2738, 3, 1, 4, 564, 0, 0, PPCImpOpBase + 0, 1184, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2738 = XVI4GER8
3680 { 2737, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2737 = XVI16GER2WPP
3681 { 2736, 3, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1191, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2736 = XVI16GER2W
3682 { 2735, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2735 = XVI16GER2SWPP
3683 { 2734, 3, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1191, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2734 = XVI16GER2SW
3684 { 2733, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2733 = XVI16GER2SPP
3685 { 2732, 3, 1, 4, 564, 0, 0, PPCImpOpBase + 0, 1184, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2732 = XVI16GER2S
3686 { 2731, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2731 = XVI16GER2PP
3687 { 2730, 3, 1, 4, 564, 0, 0, PPCImpOpBase + 0, 1184, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2730 = XVI16GER2
3688 { 2729, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2729 = XVF64GERWPP
3689 { 2728, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2728 = XVF64GERWPN
3690 { 2727, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2727 = XVF64GERWNP
3691 { 2726, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2726 = XVF64GERWNN
3692 { 2725, 3, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1205, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2725 = XVF64GERW
3693 { 2724, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1201, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2724 = XVF64GERPP
3694 { 2723, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1201, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2723 = XVF64GERPN
3695 { 2722, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1201, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2722 = XVF64GERNP
3696 { 2721, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1201, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2721 = XVF64GERNN
3697 { 2720, 3, 1, 4, 564, 0, 0, PPCImpOpBase + 0, 1198, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2720 = XVF64GER
3698 { 2719, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2719 = XVF32GERWPP
3699 { 2718, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2718 = XVF32GERWPN
3700 { 2717, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2717 = XVF32GERWNP
3701 { 2716, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2716 = XVF32GERWNN
3702 { 2715, 3, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1191, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2715 = XVF32GERW
3703 { 2714, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2714 = XVF32GERPP
3704 { 2713, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2713 = XVF32GERPN
3705 { 2712, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2712 = XVF32GERNP
3706 { 2711, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2711 = XVF32GERNN
3707 { 2710, 3, 1, 4, 564, 0, 0, PPCImpOpBase + 0, 1184, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2710 = XVF32GER
3708 { 2709, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2709 = XVF16GER2WPP
3709 { 2708, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2708 = XVF16GER2WPN
3710 { 2707, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2707 = XVF16GER2WNP
3711 { 2706, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2706 = XVF16GER2WNN
3712 { 2705, 3, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1191, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2705 = XVF16GER2W
3713 { 2704, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2704 = XVF16GER2PP
3714 { 2703, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2703 = XVF16GER2PN
3715 { 2702, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2702 = XVF16GER2NP
3716 { 2701, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2701 = XVF16GER2NN
3717 { 2700, 3, 1, 4, 564, 0, 0, PPCImpOpBase + 0, 1184, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2700 = XVF16GER2
3718 { 2699, 3, 1, 4, 177, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2699 = XVDIVSP
3719 { 2698, 3, 1, 4, 179, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2698 = XVDIVDP
3720 { 2697, 2, 1, 4, 430, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2697 = XVCVUXWSP
3721 { 2696, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1179, 0, 0x0ULL }, // Inst #2696 = XVCVUXWDP
3722 { 2695, 2, 1, 4, 430, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2695 = XVCVUXDSP
3723 { 2694, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2694 = XVCVUXDDP
3724 { 2693, 2, 1, 4, 430, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2693 = XVCVSXWSP
3725 { 2692, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1179, 0, 0x0ULL }, // Inst #2692 = XVCVSXWDP
3726 { 2691, 2, 1, 4, 430, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2691 = XVCVSXDSP
3727 { 2690, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2690 = XVCVSXDDP
3728 { 2689, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2689 = XVCVSPUXWS
3729 { 2688, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2688 = XVCVSPUXDS
3730 { 2687, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2687 = XVCVSPSXWS
3731 { 2686, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2686 = XVCVSPSXDS
3732 { 2685, 2, 1, 4, 429, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2685 = XVCVSPHP
3733 { 2684, 2, 1, 4, 193, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2684 = XVCVSPDP
3734 { 2683, 2, 1, 4, 434, 0, 0, PPCImpOpBase + 0, 1179, 0, 0x0ULL }, // Inst #2683 = XVCVSPBF16
3735 { 2682, 2, 1, 4, 310, 0, 0, PPCImpOpBase + 0, 1179, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2682 = XVCVHPSP
3736 { 2681, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2681 = XVCVDPUXWS
3737 { 2680, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2680 = XVCVDPUXDS
3738 { 2679, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2679 = XVCVDPSXWS
3739 { 2678, 2, 1, 4, 433, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2678 = XVCVDPSXDS
3740 { 2677, 2, 1, 4, 430, 1, 0, PPCImpOpBase + 134, 1179, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2677 = XVCVDPSP
3741 { 2676, 2, 1, 4, 583, 0, 0, PPCImpOpBase + 0, 1179, 0, 0x0ULL }, // Inst #2676 = XVCVBF16SPN
3742 { 2675, 3, 1, 4, 267, 1, 0, PPCImpOpBase + 134, 1181, 0, 0x0ULL }, // Inst #2675 = XVCPSGNSP
3743 { 2674, 3, 1, 4, 265, 1, 0, PPCImpOpBase + 134, 1181, 0, 0x0ULL }, // Inst #2674 = XVCPSGNDP
3744 { 2673, 3, 1, 4, 486, 1, 1, PPCImpOpBase + 211, 1181, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2673 = XVCMPGTSP_rec
3745 { 2672, 3, 1, 4, 486, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2672 = XVCMPGTSP
3746 { 2671, 3, 1, 4, 162, 1, 1, PPCImpOpBase + 211, 1181, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2671 = XVCMPGTDP_rec
3747 { 2670, 3, 1, 4, 162, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2670 = XVCMPGTDP
3748 { 2669, 3, 1, 4, 486, 1, 1, PPCImpOpBase + 211, 1181, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2669 = XVCMPGESP_rec
3749 { 2668, 3, 1, 4, 486, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2668 = XVCMPGESP
3750 { 2667, 3, 1, 4, 162, 1, 1, PPCImpOpBase + 211, 1181, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2667 = XVCMPGEDP_rec
3751 { 2666, 3, 1, 4, 162, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2666 = XVCMPGEDP
3752 { 2665, 3, 1, 4, 486, 1, 1, PPCImpOpBase + 211, 1181, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2665 = XVCMPEQSP_rec
3753 { 2664, 3, 1, 4, 486, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2664 = XVCMPEQSP
3754 { 2663, 3, 1, 4, 162, 1, 1, PPCImpOpBase + 211, 1181, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2663 = XVCMPEQDP_rec
3755 { 2662, 3, 1, 4, 162, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2662 = XVCMPEQDP
3756 { 2661, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2661 = XVBF16GER2WPP
3757 { 2660, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2660 = XVBF16GER2WPN
3758 { 2659, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2659 = XVBF16GER2WNP
3759 { 2658, 4, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1194, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2658 = XVBF16GER2WNN
3760 { 2657, 3, 1, 4, 5, 0, 0, PPCImpOpBase + 0, 1191, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2657 = XVBF16GER2W
3761 { 2656, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2656 = XVBF16GER2PP
3762 { 2655, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2655 = XVBF16GER2PN
3763 { 2654, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2654 = XVBF16GER2NP
3764 { 2653, 4, 1, 4, 565, 0, 0, PPCImpOpBase + 0, 1187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2653 = XVBF16GER2NN
3765 { 2652, 3, 1, 4, 564, 0, 0, PPCImpOpBase + 0, 1184, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2652 = XVBF16GER2
3766 { 2651, 3, 1, 4, 440, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2651 = XVADDSP
3767 { 2650, 3, 1, 4, 439, 1, 0, PPCImpOpBase + 134, 1181, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2650 = XVADDDP
3768 { 2649, 2, 1, 4, 266, 1, 0, PPCImpOpBase + 134, 1179, 0, 0x0ULL }, // Inst #2649 = XVABSSP
3769 { 2648, 2, 1, 4, 519, 1, 0, PPCImpOpBase + 134, 1179, 0, 0x0ULL }, // Inst #2648 = XVABSDP
3770 { 2647, 2, 1, 4, 463, 0, 0, PPCImpOpBase + 0, 307, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2647 = XSXSIGQP
3771 { 2646, 2, 1, 4, 277, 0, 0, PPCImpOpBase + 0, 672, 0, 0x0ULL }, // Inst #2646 = XSXSIGDP
3772 { 2645, 2, 1, 4, 518, 0, 0, PPCImpOpBase + 0, 307, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2645 = XSXEXPQP
3773 { 2644, 2, 1, 4, 293, 0, 0, PPCImpOpBase + 0, 672, 0, 0x0ULL }, // Inst #2644 = XSXEXPDP
3774 { 2643, 3, 1, 4, 275, 0, 0, PPCImpOpBase + 0, 1176, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2643 = XSTSTDCSP
3775 { 2642, 3, 1, 4, 463, 0, 0, PPCImpOpBase + 0, 1173, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2642 = XSTSTDCQP
3776 { 2641, 3, 1, 4, 275, 0, 0, PPCImpOpBase + 0, 1170, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2641 = XSTSTDCDP
3777 { 2640, 2, 1, 4, 478, 1, 0, PPCImpOpBase + 134, 1168, 0, 0x0ULL }, // Inst #2640 = XSTSQRTDP
3778 { 2639, 3, 1, 4, 160, 1, 0, PPCImpOpBase + 134, 1131, 0, 0x0ULL }, // Inst #2639 = XSTDIVDP
3779 { 2638, 3, 1, 4, 187, 0, 0, PPCImpOpBase + 0, 1125, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2638 = XSSUBSP
3780 { 2637, 3, 1, 4, 327, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2637 = XSSUBQPO
3781 { 2636, 3, 1, 4, 327, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2636 = XSSUBQP
3782 { 2635, 3, 1, 4, 187, 1, 0, PPCImpOpBase + 134, 1122, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2635 = XSSUBDP
3783 { 2634, 2, 1, 4, 173, 0, 0, PPCImpOpBase + 0, 1138, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2634 = XSSQRTSP
3784 { 2633, 2, 1, 4, 332, 0, 0, PPCImpOpBase + 0, 307, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2633 = XSSQRTQPO
3785 { 2632, 2, 1, 4, 332, 0, 0, PPCImpOpBase + 0, 307, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2632 = XSSQRTQP
3786 { 2631, 2, 1, 4, 175, 1, 0, PPCImpOpBase + 134, 1120, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2631 = XSSQRTDP
3787 { 2630, 2, 1, 4, 188, 0, 0, PPCImpOpBase + 0, 1138, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2630 = XSRSQRTESP
3788 { 2629, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1120, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2629 = XSRSQRTEDP
3789 { 2628, 2, 1, 4, 188, 0, 0, PPCImpOpBase + 0, 1144, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2628 = XSRSP
3790 { 2627, 4, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 1164, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2627 = XSRQPXP
3791 { 2626, 4, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2626 = XSRQPIX
3792 { 2625, 4, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 1164, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2625 = XSRQPI
3793 { 2624, 2, 1, 4, 188, 0, 0, PPCImpOpBase + 0, 1138, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2624 = XSRESP
3794 { 2623, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1120, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2623 = XSREDP
3795 { 2622, 2, 1, 4, 432, 0, 0, PPCImpOpBase + 0, 1120, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2622 = XSRDPIZ
3796 { 2621, 2, 1, 4, 432, 0, 0, PPCImpOpBase + 0, 1120, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2621 = XSRDPIP
3797 { 2620, 2, 1, 4, 432, 0, 0, PPCImpOpBase + 0, 1120, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2620 = XSRDPIM
3798 { 2619, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1120, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2619 = XSRDPIC
3799 { 2618, 2, 1, 4, 432, 0, 0, PPCImpOpBase + 0, 1120, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2618 = XSRDPI
3800 { 2617, 4, 1, 4, 329, 0, 0, PPCImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2617 = XSNMSUBQPO
3801 { 2616, 4, 1, 4, 329, 0, 0, PPCImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2616 = XSNMSUBQP
3802 { 2615, 4, 1, 4, 318, 0, 0, PPCImpOpBase + 0, 1156, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2615 = XSNMSUBMSP
3803 { 2614, 4, 1, 4, 318, 1, 0, PPCImpOpBase + 134, 1152, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2614 = XSNMSUBMDP
3804 { 2613, 4, 1, 4, 318, 0, 0, PPCImpOpBase + 0, 1156, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2613 = XSNMSUBASP
3805 { 2612, 4, 1, 4, 318, 1, 0, PPCImpOpBase + 134, 1152, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2612 = XSNMSUBADP
3806 { 2611, 4, 1, 4, 329, 0, 0, PPCImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2611 = XSNMADDQPO
3807 { 2610, 4, 1, 4, 329, 0, 0, PPCImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2610 = XSNMADDQP
3808 { 2609, 4, 1, 4, 318, 0, 0, PPCImpOpBase + 0, 1156, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2609 = XSNMADDMSP
3809 { 2608, 4, 1, 4, 318, 1, 0, PPCImpOpBase + 134, 1152, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2608 = XSNMADDMDP
3810 { 2607, 4, 1, 4, 318, 0, 0, PPCImpOpBase + 0, 1156, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2607 = XSNMADDASP
3811 { 2606, 4, 1, 4, 318, 1, 0, PPCImpOpBase + 134, 1152, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2606 = XSNMADDADP
3812 { 2605, 2, 1, 4, 518, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2605 = XSNEGQP
3813 { 2604, 2, 1, 4, 517, 1, 0, PPCImpOpBase + 134, 1120, 0, 0x0ULL }, // Inst #2604 = XSNEGDP
3814 { 2603, 2, 1, 4, 518, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2603 = XSNABSQP
3815 { 2602, 2, 1, 4, 517, 1, 0, PPCImpOpBase + 134, 1138, 0, 0x0ULL }, // Inst #2602 = XSNABSDPs
3816 { 2601, 2, 1, 4, 517, 1, 0, PPCImpOpBase + 134, 1120, 0, 0x0ULL }, // Inst #2601 = XSNABSDP
3817 { 2600, 3, 1, 4, 438, 0, 0, PPCImpOpBase + 0, 1125, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2600 = XSMULSP
3818 { 2599, 3, 1, 4, 454, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2599 = XSMULQPO
3819 { 2598, 3, 1, 4, 454, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2598 = XSMULQP
3820 { 2597, 3, 1, 4, 438, 1, 0, PPCImpOpBase + 134, 1122, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2597 = XSMULDP
3821 { 2596, 4, 1, 4, 329, 0, 0, PPCImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2596 = XSMSUBQPO
3822 { 2595, 4, 1, 4, 329, 0, 0, PPCImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2595 = XSMSUBQP
3823 { 2594, 4, 1, 4, 318, 0, 0, PPCImpOpBase + 0, 1156, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2594 = XSMSUBMSP
3824 { 2593, 4, 1, 4, 318, 1, 0, PPCImpOpBase + 134, 1152, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2593 = XSMSUBMDP
3825 { 2592, 4, 1, 4, 318, 0, 0, PPCImpOpBase + 0, 1156, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2592 = XSMSUBASP
3826 { 2591, 4, 1, 4, 318, 1, 0, PPCImpOpBase + 134, 1152, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2591 = XSMSUBADP
3827 { 2590, 3, 1, 4, 491, 0, 0, PPCImpOpBase + 0, 1128, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2590 = XSMINJDP
3828 { 2589, 3, 1, 4, 159, 1, 0, PPCImpOpBase + 134, 1122, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2589 = XSMINDP
3829 { 2588, 3, 1, 4, 467, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2588 = XSMINCQP
3830 { 2587, 3, 1, 4, 491, 0, 0, PPCImpOpBase + 0, 1122, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2587 = XSMINCDP
3831 { 2586, 3, 1, 4, 491, 0, 0, PPCImpOpBase + 0, 1128, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2586 = XSMAXJDP
3832 { 2585, 3, 1, 4, 159, 1, 0, PPCImpOpBase + 134, 1122, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2585 = XSMAXDP
3833 { 2584, 3, 1, 4, 467, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2584 = XSMAXCQP
3834 { 2583, 3, 1, 4, 491, 0, 0, PPCImpOpBase + 0, 1122, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2583 = XSMAXCDP
3835 { 2582, 4, 1, 4, 329, 0, 0, PPCImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2582 = XSMADDQPO
3836 { 2581, 4, 1, 4, 329, 0, 0, PPCImpOpBase + 0, 1160, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2581 = XSMADDQP
3837 { 2580, 4, 1, 4, 318, 0, 0, PPCImpOpBase + 0, 1156, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2580 = XSMADDMSP
3838 { 2579, 4, 1, 4, 318, 1, 0, PPCImpOpBase + 134, 1152, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2579 = XSMADDMDP
3839 { 2578, 4, 1, 4, 318, 0, 0, PPCImpOpBase + 0, 1156, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2578 = XSMADDASP
3840 { 2577, 4, 1, 4, 318, 1, 0, PPCImpOpBase + 134, 1152, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2577 = XSMADDADP
3841 { 2576, 3, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 1149, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2576 = XSIEXPQP
3842 { 2575, 3, 1, 4, 303, 0, 0, PPCImpOpBase + 0, 1146, 0, 0x0ULL }, // Inst #2575 = XSIEXPDP
3843 { 2574, 3, 1, 4, 183, 0, 0, PPCImpOpBase + 0, 1125, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2574 = XSDIVSP
3844 { 2573, 3, 1, 4, 331, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2573 = XSDIVQPO
3845 { 2572, 3, 1, 4, 331, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2572 = XSDIVQP
3846 { 2571, 3, 1, 4, 172, 1, 0, PPCImpOpBase + 134, 1122, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2571 = XSDIVDP
3847 { 2570, 2, 1, 4, 188, 0, 0, PPCImpOpBase + 0, 1144, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2570 = XSCVUXDSP
3848 { 2569, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1120, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2569 = XSCVUXDDP
3849 { 2568, 2, 1, 4, 452, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2568 = XSCVUQQP
3850 { 2567, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 1134, 0, 0x0ULL }, // Inst #2567 = XSCVUDQP
3851 { 2566, 2, 1, 4, 188, 0, 0, PPCImpOpBase + 0, 1144, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2566 = XSCVSXDSP
3852 { 2565, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1120, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2565 = XSCVSXDDP
3853 { 2564, 2, 1, 4, 452, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2564 = XSCVSQQP
3854 { 2563, 2, 1, 4, 282, 0, 0, PPCImpOpBase + 0, 1142, 0, 0x0ULL }, // Inst #2563 = XSCVSPDPN
3855 { 2562, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1120, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2562 = XSCVSPDP
3856 { 2561, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 1134, 0, 0x0ULL }, // Inst #2561 = XSCVSDQP
3857 { 2560, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 307, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2560 = XSCVQPUWZ
3858 { 2559, 2, 1, 4, 452, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2559 = XSCVQPUQZ
3859 { 2558, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 307, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2558 = XSCVQPUDZ
3860 { 2557, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 307, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2557 = XSCVQPSWZ
3861 { 2556, 2, 1, 4, 452, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2556 = XSCVQPSQZ
3862 { 2555, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 307, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2555 = XSCVQPSDZ
3863 { 2554, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 1140, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2554 = XSCVQPDPO
3864 { 2553, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 1140, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2553 = XSCVQPDP
3865 { 2552, 2, 1, 4, 321, 0, 0, PPCImpOpBase + 0, 1120, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2552 = XSCVHPDP
3866 { 2551, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1138, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2551 = XSCVDPUXWSs
3867 { 2550, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1120, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2550 = XSCVDPUXWS
3868 { 2549, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1138, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2549 = XSCVDPUXDSs
3869 { 2548, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1120, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2548 = XSCVDPUXDS
3870 { 2547, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1138, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2547 = XSCVDPSXWSs
3871 { 2546, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1120, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2546 = XSCVDPSXWS
3872 { 2545, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1138, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2545 = XSCVDPSXDSs
3873 { 2544, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1120, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2544 = XSCVDPSXDS
3874 { 2543, 2, 1, 4, 188, 0, 0, PPCImpOpBase + 0, 1136, 0, 0x0ULL }, // Inst #2543 = XSCVDPSPN
3875 { 2542, 2, 1, 4, 432, 1, 0, PPCImpOpBase + 134, 1120, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2542 = XSCVDPSP
3876 { 2541, 2, 1, 4, 451, 0, 0, PPCImpOpBase + 0, 1134, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2541 = XSCVDPQP
3877 { 2540, 2, 1, 4, 431, 0, 0, PPCImpOpBase + 0, 1120, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2540 = XSCVDPHP
3878 { 2539, 3, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2539 = XSCPSGNQP
3879 { 2538, 3, 1, 4, 292, 1, 0, PPCImpOpBase + 134, 1122, 0, 0x0ULL }, // Inst #2538 = XSCPSGNDP
3880 { 2537, 3, 1, 4, 326, 0, 0, PPCImpOpBase + 0, 1070, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2537 = XSCMPUQP
3881 { 2536, 3, 1, 4, 160, 1, 0, PPCImpOpBase + 134, 1131, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2536 = XSCMPUDP
3882 { 2535, 3, 1, 4, 326, 0, 0, PPCImpOpBase + 0, 1070, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2535 = XSCMPOQP
3883 { 2534, 3, 1, 4, 160, 1, 0, PPCImpOpBase + 134, 1131, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2534 = XSCMPODP
3884 { 2533, 3, 1, 4, 467, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2533 = XSCMPGTQP
3885 { 2532, 3, 1, 4, 278, 0, 0, PPCImpOpBase + 0, 1128, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2532 = XSCMPGTDP
3886 { 2531, 3, 1, 4, 467, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2531 = XSCMPGEQP
3887 { 2530, 3, 1, 4, 278, 0, 0, PPCImpOpBase + 0, 1128, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2530 = XSCMPGEDP
3888 { 2529, 3, 1, 4, 326, 0, 0, PPCImpOpBase + 0, 1070, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2529 = XSCMPEXPQP
3889 { 2528, 3, 1, 4, 278, 0, 0, PPCImpOpBase + 0, 1131, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2528 = XSCMPEXPDP
3890 { 2527, 3, 1, 4, 467, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2527 = XSCMPEQQP
3891 { 2526, 3, 1, 4, 278, 0, 0, PPCImpOpBase + 0, 1128, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2526 = XSCMPEQDP
3892 { 2525, 3, 1, 4, 187, 0, 0, PPCImpOpBase + 0, 1125, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2525 = XSADDSP
3893 { 2524, 3, 1, 4, 327, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2524 = XSADDQPO
3894 { 2523, 3, 1, 4, 327, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2523 = XSADDQP
3895 { 2522, 3, 1, 4, 187, 1, 0, PPCImpOpBase + 134, 1122, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2522 = XSADDDP
3896 { 2521, 2, 1, 4, 518, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2521 = XSABSQP
3897 { 2520, 2, 1, 4, 517, 1, 0, PPCImpOpBase + 134, 1120, 0, 0x0ULL }, // Inst #2520 = XSABSDP
3898 { 2519, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #2519 = XOR_rec
3899 { 2518, 3, 1, 4, 508, 0, 0, PPCImpOpBase + 0, 181, 0, 0x8ULL }, // Inst #2518 = XORIS8
3900 { 2517, 3, 1, 4, 508, 0, 0, PPCImpOpBase + 0, 184, 0, 0x8ULL }, // Inst #2517 = XORIS
3901 { 2516, 3, 1, 4, 508, 0, 0, PPCImpOpBase + 0, 181, 0, 0x8ULL }, // Inst #2516 = XORI8
3902 { 2515, 3, 1, 4, 508, 0, 0, PPCImpOpBase + 0, 184, 0, 0x8ULL }, // Inst #2515 = XORI
3903 { 2514, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #2514 = XOR8_rec
3904 { 2513, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #2513 = XOR8
3905 { 2512, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #2512 = XOR
3906 { 2511, 1, 0, 4, 420, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2511 = WRTEEI
3907 { 2510, 1, 0, 4, 420, 0, 0, PPCImpOpBase + 0, 171, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2510 = WRTEE
3908 { 2509, 2, 0, 4, 497, 0, 0, PPCImpOpBase + 0, 21, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2509 = WAITP10
3909 { 2508, 1, 0, 4, 296, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2508 = WAIT
3910 { 2507, 1, 1, 4, 575, 0, 0, PPCImpOpBase + 0, 671, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL }, // Inst #2507 = V_SETALLONESH
3911 { 2506, 1, 1, 4, 575, 0, 0, PPCImpOpBase + 0, 671, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL }, // Inst #2506 = V_SETALLONESB
3912 { 2505, 1, 1, 4, 575, 0, 0, PPCImpOpBase + 0, 671, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL }, // Inst #2505 = V_SETALLONES
3913 { 2504, 1, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 671, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL }, // Inst #2504 = V_SET0H
3914 { 2503, 1, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 671, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL }, // Inst #2503 = V_SET0B
3915 { 2502, 1, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 671, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x28ULL }, // Inst #2502 = V_SET0
3916 { 2501, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2501 = VXOR
3917 { 2500, 2, 1, 4, 579, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2500 = VUPKLSW
3918 { 2499, 2, 1, 4, 582, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2499 = VUPKLSH
3919 { 2498, 2, 1, 4, 582, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2498 = VUPKLSB
3920 { 2497, 2, 1, 4, 582, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2497 = VUPKLPX
3921 { 2496, 2, 1, 4, 579, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2496 = VUPKHSW
3922 { 2495, 2, 1, 4, 582, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2495 = VUPKHSH
3923 { 2494, 2, 1, 4, 582, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2494 = VUPKHSB
3924 { 2493, 2, 1, 4, 582, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2493 = VUPKHPX
3925 { 2492, 3, 1, 4, 590, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2492 = VSUMSWS
3926 { 2491, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2491 = VSUM4UBS
3927 { 2490, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2490 = VSUM4SHS
3928 { 2489, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2489 = VSUM4SBS
3929 { 2488, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2488 = VSUM2SWS
3930 { 2487, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2487 = VSUBUWS
3931 { 2486, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2486 = VSUBUWM
3932 { 2485, 3, 1, 4, 238, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2485 = VSUBUQM
3933 { 2484, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2484 = VSUBUHS
3934 { 2483, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2483 = VSUBUHM
3935 { 2482, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2482 = VSUBUDM
3936 { 2481, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2481 = VSUBUBS
3937 { 2480, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2480 = VSUBUBM
3938 { 2479, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2479 = VSUBSWS
3939 { 2478, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2478 = VSUBSHS
3940 { 2477, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2477 = VSUBSBS
3941 { 2476, 3, 1, 4, 191, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2476 = VSUBFP
3942 { 2475, 4, 1, 4, 237, 0, 0, PPCImpOpBase + 0, 1058, 0, 0x0ULL }, // Inst #2475 = VSUBEUQM
3943 { 2474, 4, 1, 4, 237, 0, 0, PPCImpOpBase + 0, 1058, 0, 0x0ULL }, // Inst #2474 = VSUBECUQ
3944 { 2473, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2473 = VSUBCUW
3945 { 2472, 3, 1, 4, 466, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2472 = VSUBCUQ
3946 { 2471, 2, 1, 4, 539, 0, 1, PPCImpOpBase + 78, 307, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2471 = VSTRIHR_rec
3947 { 2470, 2, 1, 4, 581, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2470 = VSTRIHR
3948 { 2469, 2, 1, 4, 539, 0, 1, PPCImpOpBase + 78, 307, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2469 = VSTRIHL_rec
3949 { 2468, 2, 1, 4, 581, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2468 = VSTRIHL
3950 { 2467, 2, 1, 4, 539, 0, 1, PPCImpOpBase + 78, 307, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2467 = VSTRIBR_rec
3951 { 2466, 2, 1, 4, 581, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2466 = VSTRIBR
3952 { 2465, 2, 1, 4, 539, 0, 1, PPCImpOpBase + 78, 307, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2465 = VSTRIBL_rec
3953 { 2464, 2, 1, 4, 581, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2464 = VSTRIBL
3954 { 2463, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2463 = VSRW
3955 { 2462, 3, 1, 4, 588, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2462 = VSRV
3956 { 2461, 3, 1, 4, 494, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2461 = VSRQ
3957 { 2460, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2460 = VSRO
3958 { 2459, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2459 = VSRH
3959 { 2458, 4, 1, 4, 586, 0, 0, PPCImpOpBase + 0, 297, 0, 0x0ULL }, // Inst #2458 = VSRDBI
3960 { 2457, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2457 = VSRD
3961 { 2456, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2456 = VSRB
3962 { 2455, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2455 = VSRAW
3963 { 2454, 3, 1, 4, 494, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2454 = VSRAQ
3964 { 2453, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2453 = VSRAH
3965 { 2452, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2452 = VSRAD
3966 { 2451, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2451 = VSRAB
3967 { 2450, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2450 = VSR
3968 { 2449, 3, 1, 4, 580, 0, 0, PPCImpOpBase + 0, 1062, 0, 0x28ULL }, // Inst #2449 = VSPLTW
3969 { 2448, 2, 1, 4, 574, 0, 0, PPCImpOpBase + 0, 701, 0, 0x28ULL }, // Inst #2448 = VSPLTISW
3970 { 2447, 2, 1, 4, 574, 0, 0, PPCImpOpBase + 0, 701, 0, 0x28ULL }, // Inst #2447 = VSPLTISH
3971 { 2446, 2, 1, 4, 574, 0, 0, PPCImpOpBase + 0, 701, 0, 0x28ULL }, // Inst #2446 = VSPLTISB
3972 { 2445, 3, 1, 4, 580, 0, 0, PPCImpOpBase + 0, 1117, 0, 0x28ULL }, // Inst #2445 = VSPLTHs
3973 { 2444, 3, 1, 4, 580, 0, 0, PPCImpOpBase + 0, 1062, 0, 0x28ULL }, // Inst #2444 = VSPLTH
3974 { 2443, 3, 1, 4, 580, 0, 0, PPCImpOpBase + 0, 1117, 0, 0x28ULL }, // Inst #2443 = VSPLTBs
3975 { 2442, 3, 1, 4, 580, 0, 0, PPCImpOpBase + 0, 1062, 0, 0x28ULL }, // Inst #2442 = VSPLTB
3976 { 2441, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2441 = VSLW
3977 { 2440, 3, 1, 4, 588, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2440 = VSLV
3978 { 2439, 3, 1, 4, 494, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2439 = VSLQ
3979 { 2438, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2438 = VSLO
3980 { 2437, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2437 = VSLH
3981 { 2436, 4, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 297, 0, 0x28ULL }, // Inst #2436 = VSLDOI
3982 { 2435, 4, 1, 4, 586, 0, 0, PPCImpOpBase + 0, 297, 0, 0x0ULL }, // Inst #2435 = VSLDBI
3983 { 2434, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2434 = VSLD
3984 { 2433, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2433 = VSLB
3985 { 2432, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2432 = VSL
3986 { 2431, 4, 1, 4, 477, 0, 0, PPCImpOpBase + 0, 1113, 0, 0x0ULL }, // Inst #2431 = VSHASIGMAW
3987 { 2430, 4, 1, 4, 477, 0, 0, PPCImpOpBase + 0, 1113, 0, 0x0ULL }, // Inst #2430 = VSHASIGMAD
3988 { 2429, 4, 1, 4, 269, 0, 0, PPCImpOpBase + 0, 1058, 0, 0x28ULL }, // Inst #2429 = VSEL
3989 { 2428, 2, 1, 4, 448, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2428 = VSBOX
3990 { 2427, 2, 1, 4, 430, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2427 = VRSQRTEFP
3991 { 2426, 3, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2426 = VRLWNM
3992 { 2425, 4, 1, 4, 263, 0, 0, PPCImpOpBase + 0, 1109, 0, 0x0ULL }, // Inst #2425 = VRLWMI
3993 { 2424, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2424 = VRLW
3994 { 2423, 3, 1, 4, 494, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2423 = VRLQNM
3995 { 2422, 4, 1, 4, 495, 0, 0, PPCImpOpBase + 0, 1109, 0, 0x0ULL }, // Inst #2422 = VRLQMI
3996 { 2421, 3, 1, 4, 494, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2421 = VRLQ
3997 { 2420, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2420 = VRLH
3998 { 2419, 3, 1, 4, 527, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2419 = VRLDNM
3999 { 2418, 4, 1, 4, 263, 0, 0, PPCImpOpBase + 0, 1109, 0, 0x0ULL }, // Inst #2418 = VRLDMI
4000 { 2417, 3, 1, 4, 264, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2417 = VRLD
4001 { 2416, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2416 = VRLB
4002 { 2415, 2, 1, 4, 430, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2415 = VRFIZ
4003 { 2414, 2, 1, 4, 430, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2414 = VRFIP
4004 { 2413, 2, 1, 4, 430, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2413 = VRFIN
4005 { 2412, 2, 1, 4, 430, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2412 = VRFIM
4006 { 2411, 2, 1, 4, 430, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2411 = VREFP
4007 { 2410, 2, 1, 4, 475, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2410 = VPRTYBW
4008 { 2409, 2, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2409 = VPRTYBQ
4009 { 2408, 2, 1, 4, 475, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2408 = VPRTYBD
4010 { 2407, 2, 1, 4, 232, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2407 = VPOPCNTW
4011 { 2406, 2, 1, 4, 476, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2406 = VPOPCNTH
4012 { 2405, 2, 1, 4, 309, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2405 = VPOPCNTD
4013 { 2404, 2, 1, 4, 476, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2404 = VPOPCNTB
4014 { 2403, 3, 1, 4, 182, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2403 = VPMSUMW
4015 { 2402, 3, 1, 4, 182, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2402 = VPMSUMH
4016 { 2401, 3, 1, 4, 182, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2401 = VPMSUMD
4017 { 2400, 3, 1, 4, 182, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2400 = VPMSUMB
4018 { 2399, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2399 = VPKUWUS
4019 { 2398, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2398 = VPKUWUM
4020 { 2397, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2397 = VPKUHUS
4021 { 2396, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2396 = VPKUHUM
4022 { 2395, 3, 1, 4, 585, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2395 = VPKUDUS
4023 { 2394, 3, 1, 4, 585, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2394 = VPKUDUM
4024 { 2393, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2393 = VPKSWUS
4025 { 2392, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2392 = VPKSWSS
4026 { 2391, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2391 = VPKSHUS
4027 { 2390, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2390 = VPKSHSS
4028 { 2389, 3, 1, 4, 585, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2389 = VPKSDUS
4029 { 2388, 3, 1, 4, 585, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2388 = VPKSDSS
4030 { 2387, 3, 1, 4, 587, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2387 = VPKPX
4031 { 2386, 3, 1, 4, 450, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2386 = VPEXTD
4032 { 2385, 4, 1, 4, 229, 0, 0, PPCImpOpBase + 0, 1058, 0, 0x0ULL }, // Inst #2385 = VPERMXOR
4033 { 2384, 4, 1, 4, 323, 0, 0, PPCImpOpBase + 0, 1058, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2384 = VPERMR
4034 { 2383, 4, 1, 4, 164, 0, 0, PPCImpOpBase + 0, 1058, 0, 0x28ULL }, // Inst #2383 = VPERM
4035 { 2382, 3, 1, 4, 450, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2382 = VPDEPD
4036 { 2381, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2381 = VORC
4037 { 2380, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2380 = VOR
4038 { 2379, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2379 = VNOR
4039 { 2378, 4, 1, 4, 441, 0, 0, PPCImpOpBase + 0, 1058, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2378 = VNMSUBFP
4040 { 2377, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2377 = VNEGW
4041 { 2376, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2376 = VNEGD
4042 { 2375, 3, 1, 4, 182, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2375 = VNCIPHERLAST
4043 { 2374, 3, 1, 4, 182, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2374 = VNCIPHER
4044 { 2373, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2373 = VNAND
4045 { 2372, 3, 1, 4, 241, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2372 = VMULUWM
4046 { 2371, 3, 1, 4, 240, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2371 = VMULOUW
4047 { 2370, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2370 = VMULOUH
4048 { 2369, 3, 1, 4, 623, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2369 = VMULOUD
4049 { 2368, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2368 = VMULOUB
4050 { 2367, 3, 1, 4, 240, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2367 = VMULOSW
4051 { 2366, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2366 = VMULOSH
4052 { 2365, 3, 1, 4, 623, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2365 = VMULOSD
4053 { 2364, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2364 = VMULOSB
4054 { 2363, 3, 1, 4, 572, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2363 = VMULLD
4055 { 2362, 3, 1, 4, 623, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2362 = VMULHUW
4056 { 2361, 3, 1, 4, 572, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2361 = VMULHUD
4057 { 2360, 3, 1, 4, 623, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2360 = VMULHSW
4058 { 2359, 3, 1, 4, 572, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2359 = VMULHSD
4059 { 2358, 3, 1, 4, 240, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2358 = VMULEUW
4060 { 2357, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2357 = VMULEUH
4061 { 2356, 3, 1, 4, 623, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2356 = VMULEUD
4062 { 2355, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2355 = VMULEUB
4063 { 2354, 3, 1, 4, 240, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2354 = VMULESW
4064 { 2353, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2353 = VMULESH
4065 { 2352, 3, 1, 4, 623, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2352 = VMULESD
4066 { 2351, 3, 1, 4, 622, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2351 = VMULESB
4067 { 2350, 2, 1, 4, 463, 0, 0, PPCImpOpBase + 0, 307, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2350 = VMUL10UQ
4068 { 2349, 3, 1, 4, 465, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2349 = VMUL10EUQ
4069 { 2348, 3, 1, 4, 465, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2348 = VMUL10ECUQ
4070 { 2347, 2, 1, 4, 463, 0, 0, PPCImpOpBase + 0, 307, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2347 = VMUL10CUQ
4071 { 2346, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1058, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2346 = VMSUMUHS
4072 { 2345, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1058, 0, 0x28ULL }, // Inst #2345 = VMSUMUHM
4073 { 2344, 4, 1, 4, 166, 0, 0, PPCImpOpBase + 0, 1058, 0, 0x0ULL }, // Inst #2344 = VMSUMUDM
4074 { 2343, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1058, 0, 0x28ULL }, // Inst #2343 = VMSUMUBM
4075 { 2342, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1058, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2342 = VMSUMSHS
4076 { 2341, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1058, 0, 0x28ULL }, // Inst #2341 = VMSUMSHM
4077 { 2340, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1058, 0, 0x28ULL }, // Inst #2340 = VMSUMMBM
4078 { 2339, 4, 1, 4, 624, 0, 0, PPCImpOpBase + 0, 1058, 0, 0x0ULL }, // Inst #2339 = VMSUMCUD
4079 { 2338, 3, 1, 4, 268, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2338 = VMRGOW
4080 { 2337, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2337 = VMRGLW
4081 { 2336, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2336 = VMRGLH
4082 { 2335, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2335 = VMRGLB
4083 { 2334, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2334 = VMRGHW
4084 { 2333, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2333 = VMRGHH
4085 { 2332, 3, 1, 4, 230, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2332 = VMRGHB
4086 { 2331, 3, 1, 4, 268, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2331 = VMRGEW
4087 { 2330, 3, 1, 4, 460, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2330 = VMODUW
4088 { 2329, 3, 1, 4, 456, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2329 = VMODUQ
4089 { 2328, 3, 1, 4, 458, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2328 = VMODUD
4090 { 2327, 3, 1, 4, 460, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2327 = VMODSW
4091 { 2326, 3, 1, 4, 456, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2326 = VMODSQ
4092 { 2325, 3, 1, 4, 458, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2325 = VMODSD
4093 { 2324, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1058, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2324 = VMLADDUHM
4094 { 2323, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2323 = VMINUW
4095 { 2322, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2322 = VMINUH
4096 { 2321, 3, 1, 4, 233, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2321 = VMINUD
4097 { 2320, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2320 = VMINUB
4098 { 2319, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2319 = VMINSW
4099 { 2318, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2318 = VMINSH
4100 { 2317, 3, 1, 4, 233, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2317 = VMINSD
4101 { 2316, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2316 = VMINSB
4102 { 2315, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2315 = VMINFP
4103 { 2314, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1058, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2314 = VMHRADDSHS
4104 { 2313, 4, 1, 4, 239, 0, 0, PPCImpOpBase + 0, 1058, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL }, // Inst #2313 = VMHADDSHS
4105 { 2312, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2312 = VMAXUW
4106 { 2311, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2311 = VMAXUH
4107 { 2310, 3, 1, 4, 233, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2310 = VMAXUD
4108 { 2309, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2309 = VMAXUB
4109 { 2308, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2308 = VMAXSW
4110 { 2307, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2307 = VMAXSH
4111 { 2306, 3, 1, 4, 233, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2306 = VMAXSD
4112 { 2305, 3, 1, 4, 231, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2305 = VMAXSB
4113 { 2304, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2304 = VMAXFP
4114 { 2303, 4, 1, 4, 441, 0, 0, PPCImpOpBase + 0, 1058, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2303 = VMADDFP
4115 { 2302, 2, 1, 4, 430, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2302 = VLOGEFP
4116 { 2301, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1089, 0, 0x0ULL }, // Inst #2301 = VINSWVRX
4117 { 2300, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1089, 0, 0x0ULL }, // Inst #2300 = VINSWVLX
4118 { 2299, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1085, 0, 0x0ULL }, // Inst #2299 = VINSWRX
4119 { 2298, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1085, 0, 0x0ULL }, // Inst #2298 = VINSWLX
4120 { 2297, 4, 1, 4, 586, 0, 0, PPCImpOpBase + 0, 1105, 0, 0x0ULL }, // Inst #2297 = VINSW
4121 { 2296, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1089, 0, 0x0ULL }, // Inst #2296 = VINSHVRX
4122 { 2295, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1089, 0, 0x0ULL }, // Inst #2295 = VINSHVLX
4123 { 2294, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1085, 0, 0x0ULL }, // Inst #2294 = VINSHRX
4124 { 2293, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1085, 0, 0x0ULL }, // Inst #2293 = VINSHLX
4125 { 2292, 3, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 1062, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2292 = VINSERTW
4126 { 2291, 4, 1, 4, 324, 0, 0, PPCImpOpBase + 0, 1101, 0, 0x0ULL }, // Inst #2291 = VINSERTH
4127 { 2290, 3, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 1062, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2290 = VINSERTD
4128 { 2289, 4, 1, 4, 324, 0, 0, PPCImpOpBase + 0, 1101, 0, 0x0ULL }, // Inst #2289 = VINSERTB
4129 { 2288, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1097, 0, 0x0ULL }, // Inst #2288 = VINSDRX
4130 { 2287, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1097, 0, 0x0ULL }, // Inst #2287 = VINSDLX
4131 { 2286, 4, 1, 4, 586, 0, 0, PPCImpOpBase + 0, 1093, 0, 0x0ULL }, // Inst #2286 = VINSD
4132 { 2285, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1089, 0, 0x0ULL }, // Inst #2285 = VINSBVRX
4133 { 2284, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1089, 0, 0x0ULL }, // Inst #2284 = VINSBVLX
4134 { 2283, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1085, 0, 0x0ULL }, // Inst #2283 = VINSBRX
4135 { 2282, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1085, 0, 0x0ULL }, // Inst #2282 = VINSBLX
4136 { 2281, 3, 1, 4, 447, 0, 0, PPCImpOpBase + 0, 1073, 0, 0x0ULL }, // Inst #2281 = VGNB
4137 { 2280, 2, 1, 4, 579, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2280 = VGBBD
4138 { 2279, 3, 1, 4, 324, 0, 0, PPCImpOpBase + 0, 1082, 0, 0x200ULL }, // Inst #2279 = VEXTUWRX
4139 { 2278, 3, 1, 4, 324, 0, 0, PPCImpOpBase + 0, 1082, 0, 0x200ULL }, // Inst #2278 = VEXTUWLX
4140 { 2277, 3, 1, 4, 324, 0, 0, PPCImpOpBase + 0, 1082, 0, 0x200ULL }, // Inst #2277 = VEXTUHRX
4141 { 2276, 3, 1, 4, 324, 0, 0, PPCImpOpBase + 0, 1082, 0, 0x200ULL }, // Inst #2276 = VEXTUHLX
4142 { 2275, 3, 1, 4, 324, 0, 0, PPCImpOpBase + 0, 1082, 0, 0x200ULL }, // Inst #2275 = VEXTUBRX
4143 { 2274, 3, 1, 4, 324, 0, 0, PPCImpOpBase + 0, 1082, 0, 0x200ULL }, // Inst #2274 = VEXTUBLX
4144 { 2273, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 1080, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2273 = VEXTSW2Ds
4145 { 2272, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2272 = VEXTSW2D
4146 { 2271, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 1080, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2271 = VEXTSH2Ws
4147 { 2270, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2270 = VEXTSH2W
4148 { 2269, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 1080, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2269 = VEXTSH2Ds
4149 { 2268, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2268 = VEXTSH2D
4150 { 2267, 2, 1, 4, 516, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2267 = VEXTSD2Q
4151 { 2266, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 1080, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2266 = VEXTSB2Ws
4152 { 2265, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2265 = VEXTSB2W
4153 { 2264, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 1080, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2264 = VEXTSB2Ds
4154 { 2263, 2, 1, 4, 515, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2263 = VEXTSB2D
4155 { 2262, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1068, 0, 0x200ULL }, // Inst #2262 = VEXTRACTWM
4156 { 2261, 3, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 1062, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2261 = VEXTRACTUW
4157 { 2260, 3, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 1062, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2260 = VEXTRACTUH
4158 { 2259, 3, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 1062, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2259 = VEXTRACTUB
4159 { 2258, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1068, 0, 0x0ULL }, // Inst #2258 = VEXTRACTQM
4160 { 2257, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1068, 0, 0x200ULL }, // Inst #2257 = VEXTRACTHM
4161 { 2256, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1068, 0, 0x200ULL }, // Inst #2256 = VEXTRACTDM
4162 { 2255, 3, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 1062, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2255 = VEXTRACTD
4163 { 2254, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1068, 0, 0x200ULL }, // Inst #2254 = VEXTRACTBM
4164 { 2253, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1076, 0, 0x0ULL }, // Inst #2253 = VEXTDUWVRX
4165 { 2252, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1076, 0, 0x0ULL }, // Inst #2252 = VEXTDUWVLX
4166 { 2251, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1076, 0, 0x0ULL }, // Inst #2251 = VEXTDUHVRX
4167 { 2250, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1076, 0, 0x0ULL }, // Inst #2250 = VEXTDUHVLX
4168 { 2249, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1076, 0, 0x0ULL }, // Inst #2249 = VEXTDUBVRX
4169 { 2248, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1076, 0, 0x0ULL }, // Inst #2248 = VEXTDUBVLX
4170 { 2247, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1076, 0, 0x0ULL }, // Inst #2247 = VEXTDDVRX
4171 { 2246, 4, 1, 4, 589, 0, 0, PPCImpOpBase + 0, 1076, 0, 0x0ULL }, // Inst #2246 = VEXTDDVLX
4172 { 2245, 2, 1, 4, 190, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2245 = VEXPTEFP
4173 { 2244, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2244 = VEXPANDWM
4174 { 2243, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2243 = VEXPANDQM
4175 { 2242, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2242 = VEXPANDHM
4176 { 2241, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2241 = VEXPANDDM
4177 { 2240, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2240 = VEXPANDBM
4178 { 2239, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2239 = VEQV
4179 { 2238, 3, 1, 4, 459, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2238 = VDIVUW
4180 { 2237, 3, 1, 4, 455, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2237 = VDIVUQ
4181 { 2236, 3, 1, 4, 457, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2236 = VDIVUD
4182 { 2235, 3, 1, 4, 459, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2235 = VDIVSW
4183 { 2234, 3, 1, 4, 455, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2234 = VDIVSQ
4184 { 2233, 3, 1, 4, 457, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2233 = VDIVSD
4185 { 2232, 3, 1, 4, 462, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2232 = VDIVEUW
4186 { 2231, 3, 1, 4, 455, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2231 = VDIVEUQ
4187 { 2230, 3, 1, 4, 461, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2230 = VDIVEUD
4188 { 2229, 3, 1, 4, 462, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2229 = VDIVESW
4189 { 2228, 3, 1, 4, 455, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2228 = VDIVESQ
4190 { 2227, 3, 1, 4, 461, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2227 = VDIVESD
4191 { 2226, 2, 1, 4, 475, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2226 = VCTZW
4192 { 2225, 2, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 1068, 0, 0x0ULL }, // Inst #2225 = VCTZLSBB
4193 { 2224, 2, 1, 4, 475, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2224 = VCTZH
4194 { 2223, 3, 1, 4, 450, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2223 = VCTZDM
4195 { 2222, 2, 1, 4, 475, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2222 = VCTZD
4196 { 2221, 2, 1, 4, 475, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2221 = VCTZB
4197 { 2220, 2, 1, 4, 429, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2220 = VCTUXS_0
4198 { 2219, 3, 1, 4, 428, 0, 0, PPCImpOpBase + 0, 1062, 0, 0x28ULL }, // Inst #2219 = VCTUXS
4199 { 2218, 2, 1, 4, 429, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2218 = VCTSXS_0
4200 { 2217, 3, 1, 4, 428, 0, 0, PPCImpOpBase + 0, 1062, 0, 0x28ULL }, // Inst #2217 = VCTSXS
4201 { 2216, 3, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1073, 0, 0x0ULL }, // Inst #2216 = VCNTMBW
4202 { 2215, 3, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1073, 0, 0x0ULL }, // Inst #2215 = VCNTMBH
4203 { 2214, 3, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1073, 0, 0x0ULL }, // Inst #2214 = VCNTMBD
4204 { 2213, 3, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 1073, 0, 0x0ULL }, // Inst #2213 = VCNTMBB
4205 { 2212, 3, 1, 4, 490, 0, 0, PPCImpOpBase + 0, 1070, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2212 = VCMPUQ
4206 { 2211, 3, 1, 4, 490, 0, 0, PPCImpOpBase + 0, 1070, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2211 = VCMPSQ
4207 { 2210, 3, 1, 4, 489, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2210 = VCMPNEZW_rec
4208 { 2209, 3, 1, 4, 306, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2209 = VCMPNEZW
4209 { 2208, 3, 1, 4, 489, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2208 = VCMPNEZH_rec
4210 { 2207, 3, 1, 4, 306, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2207 = VCMPNEZH
4211 { 2206, 3, 1, 4, 489, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2206 = VCMPNEZB_rec
4212 { 2205, 3, 1, 4, 306, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2205 = VCMPNEZB
4213 { 2204, 3, 1, 4, 489, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2204 = VCMPNEW_rec
4214 { 2203, 3, 1, 4, 306, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2203 = VCMPNEW
4215 { 2202, 3, 1, 4, 489, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2202 = VCMPNEH_rec
4216 { 2201, 3, 1, 4, 306, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2201 = VCMPNEH
4217 { 2200, 3, 1, 4, 489, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2200 = VCMPNEB_rec
4218 { 2199, 3, 1, 4, 306, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2199 = VCMPNEB
4219 { 2198, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2198 = VCMPGTUW_rec
4220 { 2197, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2197 = VCMPGTUW
4221 { 2196, 3, 1, 4, 488, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2196 = VCMPGTUQ_rec
4222 { 2195, 3, 1, 4, 488, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2195 = VCMPGTUQ
4223 { 2194, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2194 = VCMPGTUH_rec
4224 { 2193, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2193 = VCMPGTUH
4225 { 2192, 3, 1, 4, 487, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2192 = VCMPGTUD_rec
4226 { 2191, 3, 1, 4, 234, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2191 = VCMPGTUD
4227 { 2190, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2190 = VCMPGTUB_rec
4228 { 2189, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2189 = VCMPGTUB
4229 { 2188, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2188 = VCMPGTSW_rec
4230 { 2187, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2187 = VCMPGTSW
4231 { 2186, 3, 1, 4, 488, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2186 = VCMPGTSQ_rec
4232 { 2185, 3, 1, 4, 488, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2185 = VCMPGTSQ
4233 { 2184, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2184 = VCMPGTSH_rec
4234 { 2183, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2183 = VCMPGTSH
4235 { 2182, 3, 1, 4, 487, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2182 = VCMPGTSD_rec
4236 { 2181, 3, 1, 4, 234, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2181 = VCMPGTSD
4237 { 2180, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2180 = VCMPGTSB_rec
4238 { 2179, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2179 = VCMPGTSB
4239 { 2178, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2178 = VCMPGTFP_rec
4240 { 2177, 3, 1, 4, 486, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2177 = VCMPGTFP
4241 { 2176, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2176 = VCMPGEFP_rec
4242 { 2175, 3, 1, 4, 486, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2175 = VCMPGEFP
4243 { 2174, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2174 = VCMPEQUW_rec
4244 { 2173, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2173 = VCMPEQUW
4245 { 2172, 3, 1, 4, 488, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2172 = VCMPEQUQ_rec
4246 { 2171, 3, 1, 4, 488, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2171 = VCMPEQUQ
4247 { 2170, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2170 = VCMPEQUH_rec
4248 { 2169, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2169 = VCMPEQUH
4249 { 2168, 3, 1, 4, 487, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2168 = VCMPEQUD_rec
4250 { 2167, 3, 1, 4, 234, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2167 = VCMPEQUD
4251 { 2166, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2166 = VCMPEQUB_rec
4252 { 2165, 3, 1, 4, 169, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2165 = VCMPEQUB
4253 { 2164, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2164 = VCMPEQFP_rec
4254 { 2163, 3, 1, 4, 486, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2163 = VCMPEQFP
4255 { 2162, 3, 1, 4, 486, 0, 1, PPCImpOpBase + 78, 304, 0, 0x28ULL }, // Inst #2162 = VCMPBFP_rec
4256 { 2161, 3, 1, 4, 486, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2161 = VCMPBFP
4257 { 2160, 2, 1, 4, 232, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2160 = VCLZW
4258 { 2159, 2, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 1068, 0, 0x0ULL }, // Inst #2159 = VCLZLSBB
4259 { 2158, 2, 1, 4, 232, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2158 = VCLZH
4260 { 2157, 3, 1, 4, 450, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2157 = VCLZDM
4261 { 2156, 2, 1, 4, 232, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2156 = VCLZD
4262 { 2155, 2, 1, 4, 232, 0, 0, PPCImpOpBase + 0, 307, 0, 0x0ULL }, // Inst #2155 = VCLZB
4263 { 2154, 3, 1, 4, 586, 0, 0, PPCImpOpBase + 0, 1065, 0, 0x0ULL }, // Inst #2154 = VCLRRB
4264 { 2153, 3, 1, 4, 586, 0, 0, PPCImpOpBase + 0, 1065, 0, 0x0ULL }, // Inst #2153 = VCLRLB
4265 { 2152, 3, 1, 4, 182, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2152 = VCIPHERLAST
4266 { 2151, 3, 1, 4, 182, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2151 = VCIPHER
4267 { 2150, 2, 1, 4, 429, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2150 = VCFUX_0
4268 { 2149, 3, 1, 4, 428, 0, 0, PPCImpOpBase + 0, 1062, 0, 0x28ULL }, // Inst #2149 = VCFUX
4269 { 2148, 3, 1, 4, 450, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2148 = VCFUGED
4270 { 2147, 2, 1, 4, 429, 0, 0, PPCImpOpBase + 0, 307, 0, 0x28ULL }, // Inst #2147 = VCFSX_0
4271 { 2146, 3, 1, 4, 428, 0, 0, PPCImpOpBase + 0, 1062, 0, 0x28ULL }, // Inst #2146 = VCFSX
4272 { 2145, 3, 1, 4, 585, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2145 = VBPERMQ
4273 { 2144, 3, 1, 4, 308, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2144 = VBPERMD
4274 { 2143, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2143 = VAVGUW
4275 { 2142, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2142 = VAVGUH
4276 { 2141, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2141 = VAVGUB
4277 { 2140, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2140 = VAVGSW
4278 { 2139, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2139 = VAVGSH
4279 { 2138, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2138 = VAVGSB
4280 { 2137, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 304, 0, 0x28ULL }, // Inst #2137 = VANDC
4281 { 2136, 3, 1, 4, 261, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2136 = VAND
4282 { 2135, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2135 = VADDUWS
4283 { 2134, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2134 = VADDUWM
4284 { 2133, 3, 1, 4, 238, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2133 = VADDUQM
4285 { 2132, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2132 = VADDUHS
4286 { 2131, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2131 = VADDUHM
4287 { 2130, 3, 1, 4, 260, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2130 = VADDUDM
4288 { 2129, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2129 = VADDUBS
4289 { 2128, 3, 1, 4, 167, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2128 = VADDUBM
4290 { 2127, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2127 = VADDSWS
4291 { 2126, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2126 = VADDSHS
4292 { 2125, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2125 = VADDSBS
4293 { 2124, 3, 1, 4, 437, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2124 = VADDFP
4294 { 2123, 4, 1, 4, 237, 0, 0, PPCImpOpBase + 0, 1058, 0, 0x0ULL }, // Inst #2123 = VADDEUQM
4295 { 2122, 4, 1, 4, 237, 0, 0, PPCImpOpBase + 0, 1058, 0, 0x0ULL }, // Inst #2122 = VADDECUQ
4296 { 2121, 3, 1, 4, 485, 0, 0, PPCImpOpBase + 0, 304, 0|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #2121 = VADDCUW
4297 { 2120, 3, 1, 4, 466, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2120 = VADDCUQ
4298 { 2119, 3, 1, 4, 307, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2119 = VABSDUW
4299 { 2118, 3, 1, 4, 307, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2118 = VABSDUH
4300 { 2117, 3, 1, 4, 307, 0, 0, PPCImpOpBase + 0, 304, 0, 0x0ULL }, // Inst #2117 = VABSDUB
4301 { 2116, 3, 2, 4, 0, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2116 = UpdateGBR
4302 { 2115, 0, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2115 = UNENCODED_NOP
4303 { 2114, 3, 0, 4, 484, 0, 0, PPCImpOpBase + 0, 1041, 0|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2114 = TWI
4304 { 2113, 3, 0, 4, 195, 0, 0, PPCImpOpBase + 0, 422, 0|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2113 = TW
4305 { 2112, 1, 0, 4, 305, 0, 1, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2112 = TSR
4306 { 2111, 1, 0, 4, 305, 0, 1, PPCImpOpBase + 0, 171, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2111 = TRECLAIM
4307 { 2110, 0, 0, 4, 295, 0, 1, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2110 = TRECHKPT
4308 { 2109, 0, 0, 4, 492, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Trap)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2109 = TRAP
4309 { 2108, 2, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 261, 0, 0x0ULL }, // Inst #2108 = TLSLDAIX8
4310 { 2107, 2, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 259, 0, 0x0ULL }, // Inst #2107 = TLSLDAIX
4311 { 2106, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 228, 0, 0x0ULL }, // Inst #2106 = TLSGDAIX8
4312 { 2105, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 222, 0, 0x0ULL }, // Inst #2105 = TLSGDAIX
4313 { 2104, 3, 0, 4, 618, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2104 = TLBWE2
4314 { 2103, 0, 0, 4, 413, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2103 = TLBWE
4315 { 2102, 0, 0, 4, 345, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2102 = TLBSYNC
4316 { 2101, 3, 0, 4, 618, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2101 = TLBSX2D
4317 { 2100, 3, 0, 4, 618, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2100 = TLBSX2
4318 { 2099, 2, 0, 4, 413, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2099 = TLBSX
4319 { 2098, 3, 1, 4, 618, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2098 = TLBRE2
4320 { 2097, 0, 0, 4, 413, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2097 = TLBRE
4321 { 2096, 1, 0, 4, 618, 0, 0, PPCImpOpBase + 0, 171, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2096 = TLBLI
4322 { 2095, 1, 0, 4, 618, 0, 0, PPCImpOpBase + 0, 171, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2095 = TLBLD
4323 { 2094, 2, 0, 4, 413, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2094 = TLBIVAX
4324 { 2093, 3, 0, 4, 15, 0, 0, PPCImpOpBase + 0, 422, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2093 = TLBILX
4325 { 2092, 1, 0, 4, 354, 0, 0, PPCImpOpBase + 0, 171, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2092 = TLBIEL
4326 { 2091, 2, 0, 4, 372, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2091 = TLBIE
4327 { 2090, 0, 0, 4, 419, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2090 = TLBIA
4328 { 2089, 1, 0, 4, 357, 0, 1, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2089 = TEND
4329 { 2088, 3, 0, 4, 483, 0, 0, PPCImpOpBase + 0, 1055, 0|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2088 = TDI
4330 { 2087, 3, 0, 4, 194, 0, 0, PPCImpOpBase + 0, 1052, 0|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2087 = TD
4331 { 2086, 2, 0, 4, 0, 1, 0, PPCImpOpBase + 134, 1050, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #2086 = TCRETURNri8
4332 { 2085, 2, 0, 4, 0, 1, 0, PPCImpOpBase + 134, 1048, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #2085 = TCRETURNri
4333 { 2084, 2, 0, 4, 0, 1, 0, PPCImpOpBase + 134, 1046, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #2084 = TCRETURNdi8
4334 { 2083, 2, 0, 4, 0, 1, 0, PPCImpOpBase + 134, 1046, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #2083 = TCRETURNdi
4335 { 2082, 2, 0, 4, 0, 1, 0, PPCImpOpBase + 134, 1044, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #2082 = TCRETURNai8
4336 { 2081, 2, 0, 4, 0, 1, 0, PPCImpOpBase + 134, 1044, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #2081 = TCRETURNai
4337 { 2080, 1, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 171, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2080 = TCHECK_RET
4338 { 2079, 1, 1, 4, 359, 0, 0, PPCImpOpBase + 0, 654, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2079 = TCHECK
4339 { 2078, 2, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2078 = TBEGIN_RET
4340 { 2077, 1, 0, 4, 295, 0, 1, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2077 = TBEGIN
4341 { 2076, 0, 0, 4, 402, 2, 0, PPCImpOpBase + 209, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #2076 = TAILBCTR8
4342 { 2075, 0, 0, 4, 402, 2, 0, PPCImpOpBase + 207, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #2075 = TAILBCTR
4343 { 2074, 1, 0, 4, 446, 1, 0, PPCImpOpBase + 134, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #2074 = TAILBA8
4344 { 2073, 1, 0, 4, 446, 1, 0, PPCImpOpBase + 134, 0, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #2073 = TAILBA
4345 { 2072, 1, 0, 4, 446, 1, 0, PPCImpOpBase + 134, 285, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #2072 = TAILB8
4346 { 2071, 1, 0, 4, 446, 1, 0, PPCImpOpBase + 134, 285, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #2071 = TAILB
4347 { 2070, 3, 0, 4, 271, 0, 1, PPCImpOpBase + 0, 1041, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2070 = TABORTWCI
4348 { 2069, 3, 0, 4, 271, 0, 1, PPCImpOpBase + 0, 422, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2069 = TABORTWC
4349 { 2068, 3, 0, 4, 271, 0, 1, PPCImpOpBase + 0, 1041, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2068 = TABORTDCI
4350 { 2067, 3, 0, 4, 271, 0, 1, PPCImpOpBase + 0, 422, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2067 = TABORTDC
4351 { 2066, 1, 0, 4, 305, 0, 1, PPCImpOpBase + 0, 171, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2066 = TABORT
4352 { 2065, 2, 0, 4, 612, 0, 0, PPCImpOpBase + 0, 21, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2065 = SYNCP10
4353 { 2064, 1, 0, 4, 346, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2064 = SYNC
4354 { 2063, 3, 1, 4, 287, 0, 1, PPCImpOpBase + 0, 222, 0, 0x8ULL }, // Inst #2063 = SUBF_rec
4355 { 2062, 2, 1, 4, 532, 1, 2, PPCImpOpBase + 22, 259, 0, 0x8ULL }, // Inst #2062 = SUBFZE_rec
4356 { 2061, 2, 1, 4, 532, 1, 3, PPCImpOpBase + 18, 259, 0, 0x8ULL }, // Inst #2061 = SUBFZEO_rec
4357 { 2060, 2, 1, 4, 502, 1, 2, PPCImpOpBase + 15, 259, 0, 0x8ULL }, // Inst #2060 = SUBFZEO
4358 { 2059, 2, 1, 4, 532, 1, 2, PPCImpOpBase + 22, 261, 0, 0x8ULL }, // Inst #2059 = SUBFZE8_rec
4359 { 2058, 2, 1, 4, 532, 1, 3, PPCImpOpBase + 18, 261, 0, 0x8ULL }, // Inst #2058 = SUBFZE8O_rec
4360 { 2057, 2, 1, 4, 502, 1, 2, PPCImpOpBase + 15, 261, 0, 0x8ULL }, // Inst #2057 = SUBFZE8O
4361 { 2056, 2, 1, 4, 501, 1, 1, PPCImpOpBase + 13, 261, 0, 0x8ULL }, // Inst #2056 = SUBFZE8
4362 { 2055, 2, 1, 4, 501, 1, 1, PPCImpOpBase + 13, 259, 0, 0x8ULL }, // Inst #2055 = SUBFZE
4363 { 2054, 4, 1, 4, 144, 0, 1, PPCImpOpBase + 0, 241, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2054 = SUBFUS_rec
4364 { 2053, 4, 1, 4, 144, 0, 0, PPCImpOpBase + 0, 241, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2053 = SUBFUS
4365 { 2052, 3, 1, 4, 534, 0, 2, PPCImpOpBase + 3, 222, 0, 0x8ULL }, // Inst #2052 = SUBFO_rec
4366 { 2051, 3, 1, 4, 521, 0, 1, PPCImpOpBase + 2, 222, 0, 0x8ULL }, // Inst #2051 = SUBFO
4367 { 2050, 2, 1, 4, 532, 1, 2, PPCImpOpBase + 22, 259, 0, 0x8ULL }, // Inst #2050 = SUBFME_rec
4368 { 2049, 2, 1, 4, 532, 1, 3, PPCImpOpBase + 18, 259, 0, 0x8ULL }, // Inst #2049 = SUBFMEO_rec
4369 { 2048, 2, 1, 4, 502, 1, 2, PPCImpOpBase + 15, 259, 0, 0x8ULL }, // Inst #2048 = SUBFMEO
4370 { 2047, 2, 1, 4, 532, 1, 2, PPCImpOpBase + 22, 261, 0, 0x8ULL }, // Inst #2047 = SUBFME8_rec
4371 { 2046, 2, 1, 4, 532, 1, 3, PPCImpOpBase + 18, 261, 0, 0x8ULL }, // Inst #2046 = SUBFME8O_rec
4372 { 2045, 2, 1, 4, 502, 1, 2, PPCImpOpBase + 15, 261, 0, 0x8ULL }, // Inst #2045 = SUBFME8O
4373 { 2044, 2, 1, 4, 501, 1, 1, PPCImpOpBase + 13, 261, 0, 0x8ULL }, // Inst #2044 = SUBFME8
4374 { 2043, 2, 1, 4, 501, 1, 1, PPCImpOpBase + 13, 259, 0, 0x8ULL }, // Inst #2043 = SUBFME
4375 { 2042, 3, 1, 4, 501, 0, 1, PPCImpOpBase + 5, 181, 0, 0x8ULL }, // Inst #2042 = SUBFIC8
4376 { 2041, 3, 1, 4, 501, 0, 1, PPCImpOpBase + 5, 184, 0, 0x8ULL }, // Inst #2041 = SUBFIC
4377 { 2040, 3, 1, 4, 534, 1, 2, PPCImpOpBase + 22, 222, 0, 0x8ULL }, // Inst #2040 = SUBFE_rec
4378 { 2039, 3, 1, 4, 534, 1, 3, PPCImpOpBase + 18, 222, 0, 0x8ULL }, // Inst #2039 = SUBFEO_rec
4379 { 2038, 3, 1, 4, 521, 1, 2, PPCImpOpBase + 15, 222, 0, 0x8ULL }, // Inst #2038 = SUBFEO
4380 { 2037, 3, 1, 4, 534, 1, 2, PPCImpOpBase + 22, 228, 0, 0x8ULL }, // Inst #2037 = SUBFE8_rec
4381 { 2036, 3, 1, 4, 534, 1, 3, PPCImpOpBase + 18, 228, 0, 0x8ULL }, // Inst #2036 = SUBFE8O_rec
4382 { 2035, 3, 1, 4, 521, 1, 2, PPCImpOpBase + 15, 228, 0, 0x8ULL }, // Inst #2035 = SUBFE8O
4383 { 2034, 3, 1, 4, 142, 1, 1, PPCImpOpBase + 13, 228, 0, 0x8ULL }, // Inst #2034 = SUBFE8
4384 { 2033, 3, 1, 4, 142, 1, 1, PPCImpOpBase + 13, 222, 0, 0x8ULL }, // Inst #2033 = SUBFE
4385 { 2032, 3, 1, 4, 538, 0, 2, PPCImpOpBase + 11, 222, 0, 0xcULL }, // Inst #2032 = SUBFC_rec
4386 { 2031, 3, 1, 4, 390, 0, 3, PPCImpOpBase + 8, 222, 0, 0xcULL }, // Inst #2031 = SUBFCO_rec
4387 { 2030, 3, 1, 4, 286, 0, 2, PPCImpOpBase + 6, 222, 0, 0xcULL }, // Inst #2030 = SUBFCO
4388 { 2029, 3, 1, 4, 538, 0, 2, PPCImpOpBase + 11, 228, 0, 0xcULL }, // Inst #2029 = SUBFC8_rec
4389 { 2028, 3, 1, 4, 390, 0, 3, PPCImpOpBase + 8, 228, 0, 0xcULL }, // Inst #2028 = SUBFC8O_rec
4390 { 2027, 3, 1, 4, 286, 0, 2, PPCImpOpBase + 6, 228, 0, 0xcULL }, // Inst #2027 = SUBFC8O
4391 { 2026, 3, 1, 4, 286, 0, 1, PPCImpOpBase + 5, 228, 0, 0xcULL }, // Inst #2026 = SUBFC8
4392 { 2025, 3, 1, 4, 286, 0, 1, PPCImpOpBase + 5, 222, 0, 0xcULL }, // Inst #2025 = SUBFC
4393 { 2024, 3, 1, 4, 200, 0, 1, PPCImpOpBase + 0, 228, 0, 0x8ULL }, // Inst #2024 = SUBF8_rec
4394 { 2023, 3, 1, 4, 534, 0, 2, PPCImpOpBase + 3, 228, 0, 0x8ULL }, // Inst #2023 = SUBF8O_rec
4395 { 2022, 3, 1, 4, 521, 0, 1, PPCImpOpBase + 2, 228, 0, 0x8ULL }, // Inst #2022 = SUBF8O
4396 { 2021, 3, 1, 4, 139, 0, 0, PPCImpOpBase + 0, 228, 0, 0x8ULL }, // Inst #2021 = SUBF8
4397 { 2020, 3, 1, 4, 228, 0, 0, PPCImpOpBase + 0, 222, 0, 0x8ULL }, // Inst #2020 = SUBF
4398 { 2019, 3, 0, 4, 373, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #2019 = STXVX
4399 { 2018, 3, 0, 4, 116, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #2018 = STXVW4X
4400 { 2017, 3, 0, 4, 609, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #2017 = STXVRWX
4401 { 2016, 3, 0, 4, 15, 0, 0, PPCImpOpBase + 0, 632, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #2016 = STXVRLL
4402 { 2015, 3, 0, 4, 15, 0, 0, PPCImpOpBase + 0, 632, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #2015 = STXVRL
4403 { 2014, 3, 0, 4, 609, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #2014 = STXVRHX
4404 { 2013, 3, 0, 4, 609, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #2013 = STXVRDX
4405 { 2012, 3, 0, 4, 609, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #2012 = STXVRBX
4406 { 2011, 3, 0, 4, 615, 0, 0, PPCImpOpBase + 0, 641, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #2011 = STXVPX
4407 { 2010, 3, 0, 4, 40, 0, 0, PPCImpOpBase + 0, 638, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #2010 = STXVPRLL
4408 { 2009, 3, 0, 4, 40, 0, 0, PPCImpOpBase + 0, 638, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #2009 = STXVPRL
4409 { 2008, 3, 0, 4, 614, 0, 0, PPCImpOpBase + 0, 635, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2008 = STXVP
4410 { 2007, 3, 0, 4, 374, 0, 0, PPCImpOpBase + 0, 632, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #2007 = STXVLL
4411 { 2006, 3, 0, 4, 374, 0, 0, PPCImpOpBase + 0, 632, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #2006 = STXVL
4412 { 2005, 3, 0, 4, 373, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #2005 = STXVH8X
4413 { 2004, 3, 0, 4, 116, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #2004 = STXVD2X
4414 { 2003, 3, 0, 4, 373, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #2003 = STXVB16X
4415 { 2002, 3, 0, 4, 604, 0, 0, PPCImpOpBase + 0, 624, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2002 = STXV
4416 { 2001, 3, 0, 4, 366, 0, 0, PPCImpOpBase + 0, 219, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #2001 = STXSSPX
4417 { 2000, 3, 0, 4, 603, 0, 0, PPCImpOpBase + 0, 621, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2000 = STXSSP
4418 { 1999, 3, 0, 4, 366, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1999 = STXSIWX
4419 { 1998, 3, 0, 4, 367, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1998 = STXSIHXv
4420 { 1997, 3, 0, 4, 367, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1997 = STXSIHX
4421 { 1996, 3, 0, 4, 367, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1996 = STXSIBXv
4422 { 1995, 3, 0, 4, 367, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1995 = STXSIBX
4423 { 1994, 3, 0, 4, 368, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1994 = STXSDX
4424 { 1993, 3, 0, 4, 602, 0, 0, PPCImpOpBase + 0, 621, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1993 = STXSD
4425 { 1992, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 557, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1992 = STWXTLS_32
4426 { 1991, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1991 = STWXTLS_
4427 { 1990, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1990 = STWXTLS
4428 { 1989, 3, 0, 4, 127, 0, 0, PPCImpOpBase + 0, 551, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1989 = STWX8
4429 { 1988, 3, 0, 4, 127, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1988 = STWX
4430 { 1987, 4, 1, 4, 133, 0, 0, PPCImpOpBase + 0, 1021, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1987 = STWUX8
4431 { 1986, 4, 1, 4, 133, 0, 0, PPCImpOpBase + 0, 1017, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1986 = STWUX
4432 { 1985, 4, 1, 4, 132, 0, 0, PPCImpOpBase + 0, 1013, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1985 = STWU8
4433 { 1984, 4, 1, 4, 132, 0, 0, PPCImpOpBase + 0, 1009, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1984 = STWU
4434 { 1983, 3, 0, 4, 217, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1983 = STWEPX
4435 { 1982, 3, 0, 4, 130, 0, 1, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1982 = STWCX
4436 { 1981, 3, 0, 4, 611, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1981 = STWCIX
4437 { 1980, 3, 0, 4, 127, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1980 = STWBRX
4438 { 1979, 3, 0, 4, 404, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1979 = STWAT
4439 { 1978, 3, 0, 4, 596, 0, 0, PPCImpOpBase + 0, 521, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1978 = STW8
4440 { 1977, 3, 0, 4, 596, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1977 = STW
4441 { 1976, 3, 0, 4, 122, 0, 0, PPCImpOpBase + 0, 612, 0|(1ULL<<MCID::MayStore), 0x50ULL }, // Inst #1976 = STVXL
4442 { 1975, 3, 0, 4, 122, 0, 0, PPCImpOpBase + 0, 612, 0|(1ULL<<MCID::MayStore), 0x50ULL }, // Inst #1975 = STVX
4443 { 1974, 3, 0, 4, 122, 0, 0, PPCImpOpBase + 0, 612, 0|(1ULL<<MCID::MayStore), 0x50ULL }, // Inst #1974 = STVEWX
4444 { 1973, 3, 0, 4, 122, 0, 0, PPCImpOpBase + 0, 612, 0|(1ULL<<MCID::MayStore), 0x50ULL }, // Inst #1973 = STVEHX
4445 { 1972, 3, 0, 4, 122, 0, 0, PPCImpOpBase + 0, 612, 0|(1ULL<<MCID::MayStore), 0x50ULL }, // Inst #1972 = STVEBX
4446 { 1971, 3, 0, 4, 221, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1971 = STSWI
4447 { 1970, 3, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 609, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL }, // Inst #1970 = STQX_PSEUDO
4448 { 1969, 3, 0, 4, 92, 0, 1, PPCImpOpBase + 0, 609, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1969 = STQCX
4449 { 1968, 3, 0, 4, 91, 0, 0, PPCImpOpBase + 0, 867, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL }, // Inst #1968 = STQ
4450 { 1967, 0, 0, 4, 425, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1967 = STOP
4451 { 1966, 3, 0, 4, 129, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1966 = STMW
4452 { 1965, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 557, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1965 = STHXTLS_32
4453 { 1964, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1964 = STHXTLS_
4454 { 1963, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1963 = STHXTLS
4455 { 1962, 3, 0, 4, 127, 0, 0, PPCImpOpBase + 0, 551, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1962 = STHX8
4456 { 1961, 3, 0, 4, 127, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1961 = STHX
4457 { 1960, 4, 1, 4, 133, 0, 0, PPCImpOpBase + 0, 1021, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1960 = STHUX8
4458 { 1959, 4, 1, 4, 133, 0, 0, PPCImpOpBase + 0, 1017, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1959 = STHUX
4459 { 1958, 4, 1, 4, 132, 0, 0, PPCImpOpBase + 0, 1013, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1958 = STHU8
4460 { 1957, 4, 1, 4, 132, 0, 0, PPCImpOpBase + 0, 1009, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1957 = STHU
4461 { 1956, 3, 0, 4, 217, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1956 = STHEPX
4462 { 1955, 3, 0, 4, 220, 0, 1, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1955 = STHCX
4463 { 1954, 3, 0, 4, 611, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1954 = STHCIX
4464 { 1953, 3, 0, 4, 127, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1953 = STHBRX
4465 { 1952, 3, 0, 4, 596, 0, 0, PPCImpOpBase + 0, 521, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1952 = STH8
4466 { 1951, 3, 0, 4, 596, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1951 = STH
4467 { 1950, 3, 0, 4, 366, 0, 0, PPCImpOpBase + 0, 603, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1950 = STFSXTLS_
4468 { 1949, 3, 0, 4, 366, 0, 0, PPCImpOpBase + 0, 603, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1949 = STFSXTLS
4469 { 1948, 3, 0, 4, 120, 0, 0, PPCImpOpBase + 0, 600, 0|(1ULL<<MCID::MayStore), 0x50ULL }, // Inst #1948 = STFSX
4470 { 1947, 4, 1, 4, 121, 0, 0, PPCImpOpBase + 0, 1037, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1947 = STFSUX
4471 { 1946, 4, 1, 4, 601, 0, 0, PPCImpOpBase + 0, 1033, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1946 = STFSU
4472 { 1945, 3, 0, 4, 600, 0, 0, PPCImpOpBase + 0, 589, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1945 = STFS
4473 { 1944, 3, 0, 4, 120, 0, 0, PPCImpOpBase + 0, 575, 0|(1ULL<<MCID::MayStore), 0x50ULL }, // Inst #1944 = STFIWX
4474 { 1943, 3, 0, 4, 366, 0, 0, PPCImpOpBase + 0, 586, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1943 = STFDXTLS_
4475 { 1942, 3, 0, 4, 366, 0, 0, PPCImpOpBase + 0, 586, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1942 = STFDXTLS
4476 { 1941, 3, 0, 4, 120, 0, 0, PPCImpOpBase + 0, 575, 0|(1ULL<<MCID::MayStore), 0x50ULL }, // Inst #1941 = STFDX
4477 { 1940, 4, 1, 4, 121, 0, 0, PPCImpOpBase + 0, 1029, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1940 = STFDUX
4478 { 1939, 4, 1, 4, 601, 0, 0, PPCImpOpBase + 0, 1025, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1939 = STFDU
4479 { 1938, 3, 0, 4, 216, 0, 0, PPCImpOpBase + 0, 575, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1938 = STFDEPX
4480 { 1937, 3, 0, 4, 600, 0, 0, PPCImpOpBase + 0, 572, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1937 = STFD
4481 { 1936, 3, 0, 4, 218, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1936 = STDXTLS_
4482 { 1935, 3, 0, 4, 218, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1935 = STDXTLS
4483 { 1934, 3, 0, 4, 128, 0, 0, PPCImpOpBase + 0, 551, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1934 = STDX
4484 { 1933, 4, 1, 4, 133, 0, 0, PPCImpOpBase + 0, 1021, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1933 = STDUX
4485 { 1932, 4, 1, 4, 132, 0, 0, PPCImpOpBase + 0, 1013, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1932 = STDU
4486 { 1931, 3, 0, 4, 131, 0, 1, PPCImpOpBase + 0, 551, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1931 = STDCX
4487 { 1930, 3, 0, 4, 219, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1930 = STDCIX
4488 { 1929, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 551, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1929 = STDBRX
4489 { 1928, 3, 0, 4, 404, 0, 0, PPCImpOpBase + 0, 181, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1928 = STDAT
4490 { 1927, 3, 0, 4, 598, 0, 0, PPCImpOpBase + 0, 521, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1927 = STD
4491 { 1926, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 557, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1926 = STBXTLS_32
4492 { 1925, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1925 = STBXTLS_
4493 { 1924, 3, 0, 4, 370, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1924 = STBXTLS
4494 { 1923, 3, 0, 4, 127, 0, 0, PPCImpOpBase + 0, 551, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1923 = STBX8
4495 { 1922, 3, 0, 4, 127, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1922 = STBX
4496 { 1921, 4, 1, 4, 133, 0, 0, PPCImpOpBase + 0, 1021, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1921 = STBUX8
4497 { 1920, 4, 1, 4, 133, 0, 0, PPCImpOpBase + 0, 1017, 0|(1ULL<<MCID::MayStore), 0x54ULL }, // Inst #1920 = STBUX
4498 { 1919, 4, 1, 4, 132, 0, 0, PPCImpOpBase + 0, 1013, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1919 = STBU8
4499 { 1918, 4, 1, 4, 132, 0, 0, PPCImpOpBase + 0, 1009, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1918 = STBU
4500 { 1917, 3, 0, 4, 217, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1917 = STBEPX
4501 { 1916, 3, 0, 4, 220, 0, 1, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #1916 = STBCX
4502 { 1915, 3, 0, 4, 219, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1915 = STBCIX
4503 { 1914, 3, 0, 4, 596, 0, 0, PPCImpOpBase + 0, 521, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1914 = STB8
4504 { 1913, 3, 0, 4, 596, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::MayStore), 0x10ULL }, // Inst #1913 = STB
4505 { 1912, 3, 1, 4, 199, 0, 1, PPCImpOpBase + 0, 222, 0, 0x208ULL }, // Inst #1912 = SRW_rec
4506 { 1911, 3, 1, 4, 199, 0, 1, PPCImpOpBase + 0, 228, 0, 0x208ULL }, // Inst #1911 = SRW8_rec
4507 { 1910, 3, 1, 4, 300, 0, 0, PPCImpOpBase + 0, 228, 0, 0x208ULL }, // Inst #1910 = SRW8
4508 { 1909, 3, 1, 4, 300, 0, 0, PPCImpOpBase + 0, 222, 0, 0x208ULL }, // Inst #1909 = SRW
4509 { 1908, 3, 1, 4, 482, 0, 1, PPCImpOpBase + 0, 1003, 0, 0x8ULL }, // Inst #1908 = SRD_rec
4510 { 1907, 3, 1, 4, 283, 0, 0, PPCImpOpBase + 0, 1003, 0, 0x8ULL }, // Inst #1907 = SRD
4511 { 1906, 3, 1, 4, 147, 0, 2, PPCImpOpBase + 11, 222, 0, 0x108ULL }, // Inst #1906 = SRAW_rec
4512 { 1905, 3, 1, 4, 493, 0, 2, PPCImpOpBase + 11, 184, 0, 0x108ULL }, // Inst #1905 = SRAWI_rec
4513 { 1904, 3, 1, 4, 514, 0, 1, PPCImpOpBase + 5, 184, 0, 0x108ULL }, // Inst #1904 = SRAWI
4514 { 1903, 3, 1, 4, 302, 0, 1, PPCImpOpBase + 5, 222, 0, 0x108ULL }, // Inst #1903 = SRAW
4515 { 1902, 3, 1, 4, 146, 0, 2, PPCImpOpBase + 11, 1003, 0, 0x8ULL }, // Inst #1902 = SRAD_rec
4516 { 1901, 3, 1, 4, 145, 0, 2, PPCImpOpBase + 11, 181, 0, 0x8ULL }, // Inst #1901 = SRADI_rec
4517 { 1900, 3, 1, 4, 284, 0, 1, PPCImpOpBase + 5, 184, 0, 0x8ULL }, // Inst #1900 = SRADI_32
4518 { 1899, 3, 1, 4, 284, 0, 1, PPCImpOpBase + 5, 181, 0, 0x8ULL }, // Inst #1899 = SRADI
4519 { 1898, 3, 1, 4, 283, 0, 1, PPCImpOpBase + 5, 1003, 0, 0x8ULL }, // Inst #1898 = SRAD
4520 { 1897, 3, 2, 4, 0, 0, 0, PPCImpOpBase + 0, 1006, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1897 = SPLIT_QUADWORD
4521 { 1896, 3, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 873, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1896 = SPILL_WACC
4522 { 1895, 3, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 870, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1895 = SPILL_UACC
4523 { 1894, 3, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 867, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL }, // Inst #1894 = SPILL_QUADWORD
4524 { 1893, 3, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 864, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1893 = SPILL_CRBIT
4525 { 1892, 3, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 861, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1892 = SPILL_CR
4526 { 1891, 3, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 858, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1891 = SPILL_ACC
4527 { 1890, 3, 0, 4, 25, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1890 = SPESTWX
4528 { 1889, 3, 0, 4, 25, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1889 = SPESTW
4529 { 1888, 3, 1, 4, 15, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1888 = SPELWZX
4530 { 1887, 3, 1, 4, 15, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1887 = SPELWZ
4531 { 1886, 3, 1, 4, 199, 0, 1, PPCImpOpBase + 0, 222, 0, 0x208ULL }, // Inst #1886 = SLW_rec
4532 { 1885, 3, 1, 4, 199, 0, 1, PPCImpOpBase + 0, 228, 0, 0x208ULL }, // Inst #1885 = SLW8_rec
4533 { 1884, 3, 1, 4, 300, 0, 0, PPCImpOpBase + 0, 228, 0, 0x208ULL }, // Inst #1884 = SLW8
4534 { 1883, 3, 1, 4, 300, 0, 0, PPCImpOpBase + 0, 222, 0, 0x208ULL }, // Inst #1883 = SLW
4535 { 1882, 3, 1, 4, 482, 0, 1, PPCImpOpBase + 0, 1003, 0, 0x8ULL }, // Inst #1882 = SLD_rec
4536 { 1881, 3, 1, 4, 283, 0, 0, PPCImpOpBase + 0, 1003, 0, 0x8ULL }, // Inst #1881 = SLD
4537 { 1880, 0, 0, 4, 423, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1880 = SLBSYNC
4538 { 1879, 2, 0, 4, 353, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1879 = SLBMTE
4539 { 1878, 2, 1, 4, 352, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1878 = SLBMFEV
4540 { 1877, 2, 1, 4, 351, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1877 = SLBMFEE
4541 { 1876, 2, 0, 4, 371, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1876 = SLBIEG
4542 { 1875, 1, 0, 4, 350, 0, 0, PPCImpOpBase + 0, 171, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1875 = SLBIE
4543 { 1874, 0, 0, 4, 349, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1874 = SLBIA
4544 { 1873, 2, 1, 4, 424, 0, 1, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1873 = SLBFEE_rec
4545 { 1872, 2, 1, 4, 0, 1, 1, PPCImpOpBase + 205, 659, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1872 = SETRNDi
4546 { 1871, 2, 1, 4, 0, 1, 1, PPCImpOpBase + 205, 1001, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1871 = SETRND
4547 { 1870, 2, 1, 4, 513, 0, 0, PPCImpOpBase + 0, 999, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1870 = SETNBCR8
4548 { 1869, 2, 1, 4, 513, 0, 0, PPCImpOpBase + 0, 997, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1869 = SETNBCR
4549 { 1868, 2, 1, 4, 513, 0, 0, PPCImpOpBase + 0, 999, 0, 0x100ULL }, // Inst #1868 = SETNBC8
4550 { 1867, 2, 1, 4, 513, 0, 0, PPCImpOpBase + 0, 997, 0, 0x100ULL }, // Inst #1867 = SETNBC
4551 { 1866, 2, 1, 4, 0, 1, 1, PPCImpOpBase + 205, 345, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1866 = SETFLM
4552 { 1865, 2, 1, 4, 513, 0, 0, PPCImpOpBase + 0, 999, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300ULL }, // Inst #1865 = SETBCR8
4553 { 1864, 2, 1, 4, 513, 0, 0, PPCImpOpBase + 0, 997, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300ULL }, // Inst #1864 = SETBCR
4554 { 1863, 2, 1, 4, 513, 0, 0, PPCImpOpBase + 0, 999, 0, 0x300ULL }, // Inst #1863 = SETBC8
4555 { 1862, 2, 1, 4, 513, 0, 0, PPCImpOpBase + 0, 997, 0, 0x300ULL }, // Inst #1862 = SETBC
4556 { 1861, 2, 1, 4, 512, 0, 0, PPCImpOpBase + 0, 995, 0, 0x108ULL }, // Inst #1861 = SETB8
4557 { 1860, 2, 1, 4, 512, 0, 0, PPCImpOpBase + 0, 993, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1860 = SETB
4558 { 1859, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 965, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1859 = SELECT_VSSRC
4559 { 1858, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 989, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1858 = SELECT_VSRC
4560 { 1857, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 969, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1857 = SELECT_VSFRC
4561 { 1856, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 961, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1856 = SELECT_VRRC
4562 { 1855, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 985, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1855 = SELECT_SPE4
4563 { 1854, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 981, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1854 = SELECT_SPE
4564 { 1853, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 977, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1853 = SELECT_I8
4565 { 1852, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 973, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1852 = SELECT_I4
4566 { 1851, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 969, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1851 = SELECT_F8
4567 { 1850, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 965, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1850 = SELECT_F4
4568 { 1849, 4, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 961, 0|(1ULL<<MCID::UsesCustomInserter), 0x2ULL }, // Inst #1849 = SELECT_F16
4569 { 1848, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 926, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1848 = SELECT_CC_VSSRC
4570 { 1847, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 956, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1847 = SELECT_CC_VSRC
4571 { 1846, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 931, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1846 = SELECT_CC_VSFRC
4572 { 1845, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 921, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1845 = SELECT_CC_VRRC
4573 { 1844, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 951, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1844 = SELECT_CC_SPE4
4574 { 1843, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 946, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1843 = SELECT_CC_SPE
4575 { 1842, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 941, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1842 = SELECT_CC_I8
4576 { 1841, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 936, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1841 = SELECT_CC_I4
4577 { 1840, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 931, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1840 = SELECT_CC_F8
4578 { 1839, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 926, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1839 = SELECT_CC_F4
4579 { 1838, 5, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 921, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1838 = SELECT_CC_F16
4580 { 1837, 1, 0, 4, 4, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1837 = SCV
4581 { 1836, 1, 0, 4, 535, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #1836 = SC
4582 { 1835, 2, 2, 4, 0, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1835 = ReadTB
4583 { 1834, 5, 1, 4, 199, 0, 1, PPCImpOpBase + 0, 911, 0, 0x8ULL }, // Inst #1834 = RLWNM_rec
4584 { 1833, 5, 1, 4, 199, 0, 1, PPCImpOpBase + 0, 916, 0, 0x8ULL }, // Inst #1833 = RLWNM8_rec
4585 { 1832, 5, 1, 4, 300, 0, 0, PPCImpOpBase + 0, 916, 0, 0x8ULL }, // Inst #1832 = RLWNM8
4586 { 1831, 5, 1, 4, 300, 0, 0, PPCImpOpBase + 0, 911, 0, 0x8ULL }, // Inst #1831 = RLWNM
4587 { 1830, 5, 1, 4, 474, 0, 1, PPCImpOpBase + 0, 901, 0, 0xcULL }, // Inst #1830 = RLWINM_rec
4588 { 1829, 5, 1, 4, 474, 0, 1, PPCImpOpBase + 0, 906, 0, 0x8ULL }, // Inst #1829 = RLWINM8_rec
4589 { 1828, 5, 1, 4, 511, 0, 0, PPCImpOpBase + 0, 906, 0, 0x8ULL }, // Inst #1828 = RLWINM8
4590 { 1827, 5, 1, 4, 511, 0, 0, PPCImpOpBase + 0, 901, 0, 0x8ULL }, // Inst #1827 = RLWINM
4591 { 1826, 6, 1, 4, 204, 0, 1, PPCImpOpBase + 0, 889, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #1826 = RLWIMI_rec
4592 { 1825, 6, 1, 4, 204, 0, 1, PPCImpOpBase + 0, 895, 0, 0xcULL }, // Inst #1825 = RLWIMI8_rec
4593 { 1824, 6, 1, 4, 197, 0, 0, PPCImpOpBase + 0, 895, 0, 0xcULL }, // Inst #1824 = RLWIMI8
4594 { 1823, 6, 1, 4, 197, 0, 0, PPCImpOpBase + 0, 889, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #1823 = RLWIMI
4595 { 1822, 5, 1, 4, 393, 0, 1, PPCImpOpBase + 0, 884, 0, 0x8ULL }, // Inst #1822 = RLDIMI_rec
4596 { 1821, 5, 1, 4, 298, 0, 0, PPCImpOpBase + 0, 884, 0, 0x8ULL }, // Inst #1821 = RLDIMI
4597 { 1820, 4, 1, 4, 472, 0, 1, PPCImpOpBase + 0, 173, 0, 0x8ULL }, // Inst #1820 = RLDIC_rec
4598 { 1819, 4, 1, 4, 473, 0, 1, PPCImpOpBase + 0, 173, 0, 0x8ULL }, // Inst #1819 = RLDICR_rec
4599 { 1818, 4, 1, 4, 510, 0, 0, PPCImpOpBase + 0, 177, 0, 0x8ULL }, // Inst #1818 = RLDICR_32
4600 { 1817, 4, 1, 4, 510, 0, 0, PPCImpOpBase + 0, 173, 0, 0x8ULL }, // Inst #1817 = RLDICR
4601 { 1816, 4, 1, 4, 473, 0, 1, PPCImpOpBase + 0, 173, 0, 0x8ULL }, // Inst #1816 = RLDICL_rec
4602 { 1815, 4, 1, 4, 473, 0, 1, PPCImpOpBase + 0, 177, 0, 0x8ULL }, // Inst #1815 = RLDICL_32_rec
4603 { 1814, 4, 1, 4, 510, 0, 0, PPCImpOpBase + 0, 880, 0, 0x8ULL }, // Inst #1814 = RLDICL_32_64
4604 { 1813, 4, 1, 4, 510, 0, 0, PPCImpOpBase + 0, 177, 0, 0x8ULL }, // Inst #1813 = RLDICL_32
4605 { 1812, 4, 1, 4, 510, 0, 0, PPCImpOpBase + 0, 173, 0, 0x8ULL }, // Inst #1812 = RLDICL
4606 { 1811, 4, 1, 4, 284, 0, 0, PPCImpOpBase + 0, 173, 0, 0x8ULL }, // Inst #1811 = RLDIC
4607 { 1810, 4, 1, 4, 392, 0, 1, PPCImpOpBase + 0, 876, 0, 0x8ULL }, // Inst #1810 = RLDCR_rec
4608 { 1809, 4, 1, 4, 297, 0, 0, PPCImpOpBase + 0, 876, 0, 0x8ULL }, // Inst #1809 = RLDCR
4609 { 1808, 4, 1, 4, 392, 0, 1, PPCImpOpBase + 0, 876, 0, 0x8ULL }, // Inst #1808 = RLDCL_rec
4610 { 1807, 4, 1, 4, 297, 0, 0, PPCImpOpBase + 0, 876, 0, 0x8ULL }, // Inst #1807 = RLDCL
4611 { 1806, 0, 0, 4, 410, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1806 = RFMCI
4612 { 1805, 0, 0, 4, 412, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1805 = RFID
4613 { 1804, 0, 0, 4, 411, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1804 = RFI
4614 { 1803, 1, 0, 4, 294, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #1803 = RFEBB
4615 { 1802, 0, 0, 4, 410, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1802 = RFDI
4616 { 1801, 0, 0, 4, 410, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1801 = RFCI
4617 { 1800, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 873, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1800 = RESTORE_WACC
4618 { 1799, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 870, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1799 = RESTORE_UACC
4619 { 1798, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 867, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL }, // Inst #1798 = RESTORE_QUADWORD
4620 { 1797, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 864, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1797 = RESTORE_CRBIT
4621 { 1796, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 861, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1796 = RESTORE_CR
4622 { 1795, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 858, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1795 = RESTORE_ACC
4623 { 1794, 0, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1794 = PseudoEIEIO
4624 { 1793, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 758, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1793 = PSTXVpc
4625 { 1792, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 630, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1792 = PSTXVonlypc
4626 { 1791, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 747, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1791 = PSTXVnopc
4627 { 1790, 3, 0, 8, 595, 0, 0, PPCImpOpBase + 0, 755, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1790 = PSTXVPpc
4628 { 1789, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 753, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1789 = PSTXVPonlypc
4629 { 1788, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 750, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1788 = PSTXVPnopc
4630 { 1787, 3, 0, 8, 595, 0, 0, PPCImpOpBase + 0, 750, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1787 = PSTXVP
4631 { 1786, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 747, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1786 = PSTXV
4632 { 1785, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 744, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1785 = PSTXSSPpc
4633 { 1784, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 742, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1784 = PSTXSSPonlypc
4634 { 1783, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 739, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1783 = PSTXSSPnopc
4635 { 1782, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 739, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1782 = PSTXSSP
4636 { 1781, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 744, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1781 = PSTXSDpc
4637 { 1780, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 742, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1780 = PSTXSDonlypc
4638 { 1779, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 739, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1779 = PSTXSDnopc
4639 { 1778, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 739, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1778 = PSTXSD
4640 { 1777, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 722, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1777 = PSTWpc
4641 { 1776, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1776 = PSTWonlypc
4642 { 1775, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1775 = PSTWnopc
4643 { 1774, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 719, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1774 = PSTW8pc
4644 { 1773, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1773 = PSTW8onlypc
4645 { 1772, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1772 = PSTW8nopc
4646 { 1771, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1771 = PSTW8
4647 { 1770, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1770 = PSTW
4648 { 1769, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 722, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1769 = PSTHpc
4649 { 1768, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1768 = PSTHonlypc
4650 { 1767, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1767 = PSTHnopc
4651 { 1766, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 719, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1766 = PSTH8pc
4652 { 1765, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1765 = PSTH8onlypc
4653 { 1764, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1764 = PSTH8nopc
4654 { 1763, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1763 = PSTH8
4655 { 1762, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1762 = PSTH
4656 { 1761, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 736, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1761 = PSTFSpc
4657 { 1760, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 734, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1760 = PSTFSonlypc
4658 { 1759, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 731, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1759 = PSTFSnopc
4659 { 1758, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 731, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1758 = PSTFS
4660 { 1757, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 728, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1757 = PSTFDpc
4661 { 1756, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 659, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1756 = PSTFDonlypc
4662 { 1755, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 725, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1755 = PSTFDnopc
4663 { 1754, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 725, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1754 = PSTFD
4664 { 1753, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 719, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1753 = PSTDpc
4665 { 1752, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1752 = PSTDonlypc
4666 { 1751, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1751 = PSTDnopc
4667 { 1750, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1750 = PSTD
4668 { 1749, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 722, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1749 = PSTBpc
4669 { 1748, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1748 = PSTBonlypc
4670 { 1747, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1747 = PSTBnopc
4671 { 1746, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 719, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1746 = PSTB8pc
4672 { 1745, 2, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1745 = PSTB8onlypc
4673 { 1744, 3, 0, 8, 40, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1744 = PSTB8nopc
4674 { 1743, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1743 = PSTB8
4675 { 1742, 3, 0, 8, 613, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #1742 = PSTB
4676 { 1741, 3, 2, 4, 0, 1, 1, PPCImpOpBase + 132, 181, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1741 = PROBED_STACKALLOC_64
4677 { 1740, 3, 2, 4, 0, 1, 1, PPCImpOpBase + 61, 184, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1740 = PROBED_STACKALLOC_32
4678 { 1739, 4, 1, 4, 0, 1, 1, PPCImpOpBase + 132, 447, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1739 = PROBED_ALLOCA_64
4679 { 1738, 4, 1, 4, 0, 1, 1, PPCImpOpBase + 61, 443, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1738 = PROBED_ALLOCA_32
4680 { 1737, 5, 2, 4, 0, 1, 1, PPCImpOpBase + 132, 853, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1737 = PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64
4681 { 1736, 5, 2, 4, 0, 1, 1, PPCImpOpBase + 61, 848, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1736 = PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32
4682 { 1735, 5, 2, 4, 0, 1, 1, PPCImpOpBase + 132, 843, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1735 = PREPARE_PROBED_ALLOCA_64
4683 { 1734, 5, 2, 4, 0, 1, 1, PPCImpOpBase + 61, 838, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1734 = PREPARE_PROBED_ALLOCA_32
4684 { 1733, 2, 2, 4, 0, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1733 = PPC32PICGOT
4685 { 1732, 1, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 171, 0, 0x0ULL }, // Inst #1732 = PPC32GOT
4686 { 1731, 2, 1, 4, 280, 0, 0, PPCImpOpBase + 0, 259, 0, 0x8ULL }, // Inst #1731 = POPCNTW
4687 { 1730, 2, 1, 4, 280, 0, 0, PPCImpOpBase + 0, 261, 0, 0x308ULL }, // Inst #1730 = POPCNTD
4688 { 1729, 2, 1, 4, 206, 0, 0, PPCImpOpBase + 0, 261, 0, 0x8ULL }, // Inst #1729 = POPCNTB8
4689 { 1728, 2, 1, 4, 206, 0, 0, PPCImpOpBase + 0, 259, 0, 0x0ULL }, // Inst #1728 = POPCNTB
4690 { 1727, 7, 1, 8, 23, 0, 0, PPCImpOpBase + 0, 780, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1727 = PMXVI8GER4WSPP
4691 { 1726, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 780, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1726 = PMXVI8GER4WPP
4692 { 1725, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 774, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1725 = PMXVI8GER4W
4693 { 1724, 7, 1, 8, 569, 0, 0, PPCImpOpBase + 0, 767, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1724 = PMXVI8GER4SPP
4694 { 1723, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 767, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1723 = PMXVI8GER4PP
4695 { 1722, 6, 1, 8, 567, 0, 0, PPCImpOpBase + 0, 761, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1722 = PMXVI8GER4
4696 { 1721, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 780, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1721 = PMXVI4GER8WPP
4697 { 1720, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 774, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1720 = PMXVI4GER8W
4698 { 1719, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 767, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1719 = PMXVI4GER8PP
4699 { 1718, 6, 1, 8, 567, 0, 0, PPCImpOpBase + 0, 761, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1718 = PMXVI4GER8
4700 { 1717, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 831, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1717 = PMXVI16GER2WPP
4701 { 1716, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 774, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1716 = PMXVI16GER2W
4702 { 1715, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 780, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1715 = PMXVI16GER2SWPP
4703 { 1714, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 774, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1714 = PMXVI16GER2SW
4704 { 1713, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 767, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1713 = PMXVI16GER2SPP
4705 { 1712, 6, 1, 8, 567, 0, 0, PPCImpOpBase + 0, 761, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1712 = PMXVI16GER2S
4706 { 1711, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 767, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1711 = PMXVI16GER2PP
4707 { 1710, 6, 1, 8, 567, 0, 0, PPCImpOpBase + 0, 761, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1710 = PMXVI16GER2
4708 { 1709, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 825, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1709 = PMXVF64GERWPP
4709 { 1708, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 825, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1708 = PMXVF64GERWPN
4710 { 1707, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 825, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1707 = PMXVF64GERWNP
4711 { 1706, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 825, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1706 = PMXVF64GERWNN
4712 { 1705, 5, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 820, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1705 = PMXVF64GERW
4713 { 1704, 6, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 814, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1704 = PMXVF64GERPP
4714 { 1703, 6, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 814, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1703 = PMXVF64GERPN
4715 { 1702, 6, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 814, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1702 = PMXVF64GERNP
4716 { 1701, 6, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 814, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1701 = PMXVF64GERNN
4717 { 1700, 5, 1, 8, 567, 0, 0, PPCImpOpBase + 0, 809, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1700 = PMXVF64GER
4718 { 1699, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1699 = PMXVF32GERWPP
4719 { 1698, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1698 = PMXVF32GERWPN
4720 { 1697, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1697 = PMXVF32GERWNP
4721 { 1696, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 803, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1696 = PMXVF32GERWNN
4722 { 1695, 5, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 798, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1695 = PMXVF32GERW
4723 { 1694, 6, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 792, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1694 = PMXVF32GERPP
4724 { 1693, 6, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 792, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1693 = PMXVF32GERPN
4725 { 1692, 6, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 792, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1692 = PMXVF32GERNP
4726 { 1691, 6, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 792, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1691 = PMXVF32GERNN
4727 { 1690, 5, 1, 8, 567, 0, 0, PPCImpOpBase + 0, 787, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1690 = PMXVF32GER
4728 { 1689, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 780, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1689 = PMXVF16GER2WPP
4729 { 1688, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 780, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1688 = PMXVF16GER2WPN
4730 { 1687, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 780, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1687 = PMXVF16GER2WNP
4731 { 1686, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 780, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1686 = PMXVF16GER2WNN
4732 { 1685, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 774, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1685 = PMXVF16GER2W
4733 { 1684, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 767, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1684 = PMXVF16GER2PP
4734 { 1683, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 767, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1683 = PMXVF16GER2PN
4735 { 1682, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 767, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1682 = PMXVF16GER2NP
4736 { 1681, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 767, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1681 = PMXVF16GER2NN
4737 { 1680, 6, 1, 8, 567, 0, 0, PPCImpOpBase + 0, 761, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1680 = PMXVF16GER2
4738 { 1679, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 780, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1679 = PMXVBF16GER2WPP
4739 { 1678, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 780, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1678 = PMXVBF16GER2WPN
4740 { 1677, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 780, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1677 = PMXVBF16GER2WNP
4741 { 1676, 7, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 780, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1676 = PMXVBF16GER2WNN
4742 { 1675, 6, 1, 8, 5, 0, 0, PPCImpOpBase + 0, 774, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1675 = PMXVBF16GER2W
4743 { 1674, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 767, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1674 = PMXVBF16GER2PP
4744 { 1673, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 767, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1673 = PMXVBF16GER2PN
4745 { 1672, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 767, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1672 = PMXVBF16GER2NP
4746 { 1671, 7, 1, 8, 568, 0, 0, PPCImpOpBase + 0, 767, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1671 = PMXVBF16GER2NN
4747 { 1670, 6, 1, 8, 567, 0, 0, PPCImpOpBase + 0, 761, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1670 = PMXVBF16GER2
4748 { 1669, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 758, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1669 = PLXVpc
4749 { 1668, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 630, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1668 = PLXVonlypc
4750 { 1667, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 747, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1667 = PLXVnopc
4751 { 1666, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 755, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1666 = PLXVPpc
4752 { 1665, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 753, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1665 = PLXVPonlypc
4753 { 1664, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 750, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1664 = PLXVPnopc
4754 { 1663, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 750, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1663 = PLXVP
4755 { 1662, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 747, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1662 = PLXV
4756 { 1661, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 744, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1661 = PLXSSPpc
4757 { 1660, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 742, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1660 = PLXSSPonlypc
4758 { 1659, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 739, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1659 = PLXSSPnopc
4759 { 1658, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 739, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1658 = PLXSSP
4760 { 1657, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 744, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1657 = PLXSDpc
4761 { 1656, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 742, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1656 = PLXSDonlypc
4762 { 1655, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 739, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1655 = PLXSDnopc
4763 { 1654, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 739, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1654 = PLXSD
4764 { 1653, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 722, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1653 = PLWZpc
4765 { 1652, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1652 = PLWZonlypc
4766 { 1651, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1651 = PLWZnopc
4767 { 1650, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 719, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1650 = PLWZ8pc
4768 { 1649, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1649 = PLWZ8onlypc
4769 { 1648, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1648 = PLWZ8nopc
4770 { 1647, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1647 = PLWZ8
4771 { 1646, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1646 = PLWZ
4772 { 1645, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 722, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1645 = PLWApc
4773 { 1644, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1644 = PLWAonlypc
4774 { 1643, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1643 = PLWAnopc
4775 { 1642, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 719, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1642 = PLWA8pc
4776 { 1641, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1641 = PLWA8onlypc
4777 { 1640, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1640 = PLWA8nopc
4778 { 1639, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1639 = PLWA8
4779 { 1638, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1638 = PLWA
4780 { 1637, 2, 1, 8, 621, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x80ULL }, // Inst #1637 = PLI8
4781 { 1636, 2, 1, 8, 621, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x80ULL }, // Inst #1636 = PLI
4782 { 1635, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 722, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1635 = PLHZpc
4783 { 1634, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1634 = PLHZonlypc
4784 { 1633, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1633 = PLHZnopc
4785 { 1632, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 719, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1632 = PLHZ8pc
4786 { 1631, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1631 = PLHZ8onlypc
4787 { 1630, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1630 = PLHZ8nopc
4788 { 1629, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1629 = PLHZ8
4789 { 1628, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1628 = PLHZ
4790 { 1627, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 722, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1627 = PLHApc
4791 { 1626, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1626 = PLHAonlypc
4792 { 1625, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1625 = PLHAnopc
4793 { 1624, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 719, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1624 = PLHA8pc
4794 { 1623, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1623 = PLHA8onlypc
4795 { 1622, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1622 = PLHA8nopc
4796 { 1621, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1621 = PLHA8
4797 { 1620, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1620 = PLHA
4798 { 1619, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 736, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1619 = PLFSpc
4799 { 1618, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1618 = PLFSonlypc
4800 { 1617, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 731, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1617 = PLFSnopc
4801 { 1616, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 731, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1616 = PLFS
4802 { 1615, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 728, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1615 = PLFDpc
4803 { 1614, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 659, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1614 = PLFDonlypc
4804 { 1613, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 725, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1613 = PLFDnopc
4805 { 1612, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 725, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1612 = PLFD
4806 { 1611, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 719, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1611 = PLDpc
4807 { 1610, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1610 = PLDonlypc
4808 { 1609, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1609 = PLDnopc
4809 { 1608, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1608 = PLD
4810 { 1607, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 722, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1607 = PLBZpc
4811 { 1606, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1606 = PLBZonlypc
4812 { 1605, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1605 = PLBZnopc
4813 { 1604, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 719, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1604 = PLBZ8pc
4814 { 1603, 2, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1603 = PLBZ8onlypc
4815 { 1602, 3, 1, 8, 40, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1602 = PLBZ8nopc
4816 { 1601, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 716, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1601 = PLBZ8
4817 { 1600, 3, 1, 8, 556, 0, 0, PPCImpOpBase + 0, 713, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #1600 = PLBZ
4818 { 1599, 2, 1, 8, 2, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1599 = PLApc
4819 { 1598, 2, 1, 8, 2, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1598 = PLA8pc
4820 { 1597, 3, 1, 8, 2, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1597 = PLA8
4821 { 1596, 3, 1, 8, 2, 0, 0, PPCImpOpBase + 0, 245, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1596 = PLA
4822 { 1595, 3, 1, 4, 449, 0, 0, PPCImpOpBase + 0, 228, 0, 0x0ULL }, // Inst #1595 = PEXTD
4823 { 1594, 3, 1, 4, 449, 0, 0, PPCImpOpBase + 0, 228, 0, 0x0ULL }, // Inst #1594 = PDEPD
4824 { 1593, 3, 1, 8, 620, 0, 0, PPCImpOpBase + 0, 655, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1593 = PADDIpc
4825 { 1592, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 208, 0, 0x0ULL }, // Inst #1592 = PADDIdtprel
4826 { 1591, 3, 1, 8, 620, 0, 0, PPCImpOpBase + 0, 710, 0, 0x80ULL }, // Inst #1591 = PADDI8pc
4827 { 1590, 3, 1, 8, 620, 0, 0, PPCImpOpBase + 0, 208, 0, 0x80ULL }, // Inst #1590 = PADDI8
4828 { 1589, 3, 1, 8, 620, 0, 0, PPCImpOpBase + 0, 245, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1589 = PADDI
4829 { 1588, 3, 1, 4, 201, 0, 1, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1588 = OR_rec
4830 { 1587, 3, 1, 4, 508, 0, 0, PPCImpOpBase + 0, 181, 0, 0x8ULL }, // Inst #1587 = ORIS8
4831 { 1586, 3, 1, 4, 508, 0, 0, PPCImpOpBase + 0, 184, 0, 0x8ULL }, // Inst #1586 = ORIS
4832 { 1585, 3, 1, 4, 508, 0, 0, PPCImpOpBase + 0, 181, 0, 0x8ULL }, // Inst #1585 = ORI8
4833 { 1584, 3, 1, 4, 508, 0, 0, PPCImpOpBase + 0, 184, 0, 0x8ULL }, // Inst #1584 = ORI
4834 { 1583, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 222, 0, 0x8ULL }, // Inst #1583 = ORC_rec
4835 { 1582, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 228, 0, 0x8ULL }, // Inst #1582 = ORC8_rec
4836 { 1581, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 228, 0, 0x8ULL }, // Inst #1581 = ORC8
4837 { 1580, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 222, 0, 0x8ULL }, // Inst #1580 = ORC
4838 { 1579, 3, 1, 4, 201, 0, 1, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1579 = OR8_rec
4839 { 1578, 3, 1, 4, 201, 0, 0, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1578 = OR8
4840 { 1577, 3, 1, 4, 201, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1577 = OR
4841 { 1576, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1576 = NOR_rec
4842 { 1575, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1575 = NOR8_rec
4843 { 1574, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1574 = NOR8
4844 { 1573, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1573 = NOR
4845 { 1572, 0, 0, 4, 418, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1572 = NOP_GT_PWR7
4846 { 1571, 0, 0, 4, 418, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1571 = NOP_GT_PWR6
4847 { 1570, 0, 0, 4, 509, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1570 = NOP
4848 { 1569, 2, 1, 4, 508, 0, 1, PPCImpOpBase + 0, 259, 0, 0x8ULL }, // Inst #1569 = NEG_rec
4849 { 1568, 2, 1, 4, 533, 0, 2, PPCImpOpBase + 3, 259, 0, 0x8ULL }, // Inst #1568 = NEGO_rec
4850 { 1567, 2, 1, 4, 498, 0, 1, PPCImpOpBase + 2, 259, 0, 0x8ULL }, // Inst #1567 = NEGO
4851 { 1566, 2, 1, 4, 508, 0, 1, PPCImpOpBase + 0, 261, 0, 0x8ULL }, // Inst #1566 = NEG8_rec
4852 { 1565, 2, 1, 4, 533, 0, 2, PPCImpOpBase + 3, 261, 0, 0x8ULL }, // Inst #1565 = NEG8O_rec
4853 { 1564, 2, 1, 4, 498, 0, 1, PPCImpOpBase + 2, 261, 0, 0x8ULL }, // Inst #1564 = NEG8O
4854 { 1563, 2, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 261, 0, 0x8ULL }, // Inst #1563 = NEG8
4855 { 1562, 2, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 259, 0, 0x8ULL }, // Inst #1562 = NEG
4856 { 1561, 0, 0, 4, 616, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1561 = NAP
4857 { 1560, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1560 = NAND_rec
4858 { 1559, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1559 = NAND8_rec
4859 { 1558, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1558 = NAND8
4860 { 1557, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1557 = NAND
4861 { 1556, 0, 0, 4, 0, 0, 1, PPCImpOpBase + 204, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #1556 = MovePCtoLR8
4862 { 1555, 0, 0, 4, 0, 0, 1, PPCImpOpBase + 203, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #1555 = MovePCtoLR
4863 { 1554, 0, 0, 4, 0, 0, 1, PPCImpOpBase + 203, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #1554 = MoveGOTtoLR
4864 { 1553, 3, 1, 4, 150, 0, 1, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1553 = MULLW_rec
4865 { 1552, 3, 1, 4, 150, 0, 2, PPCImpOpBase + 3, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1552 = MULLWO_rec
4866 { 1551, 3, 1, 4, 312, 0, 1, PPCImpOpBase + 2, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1551 = MULLWO
4867 { 1550, 3, 1, 4, 312, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1550 = MULLW
4868 { 1549, 3, 1, 4, 149, 0, 0, PPCImpOpBase + 0, 181, 0, 0x8ULL }, // Inst #1549 = MULLI8
4869 { 1548, 3, 1, 4, 149, 0, 0, PPCImpOpBase + 0, 184, 0, 0x8ULL }, // Inst #1548 = MULLI
4870 { 1547, 3, 1, 4, 152, 0, 1, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1547 = MULLD_rec
4871 { 1546, 3, 1, 4, 152, 0, 2, PPCImpOpBase + 3, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1546 = MULLDO_rec
4872 { 1545, 3, 1, 4, 314, 0, 1, PPCImpOpBase + 2, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1545 = MULLDO
4873 { 1544, 3, 1, 4, 314, 0, 0, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1544 = MULLD
4874 { 1543, 3, 1, 4, 150, 0, 1, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1543 = MULHW_rec
4875 { 1542, 3, 1, 4, 151, 0, 1, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1542 = MULHWU_rec
4876 { 1541, 3, 1, 4, 313, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1541 = MULHWU
4877 { 1540, 3, 1, 4, 312, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1540 = MULHW
4878 { 1539, 3, 1, 4, 150, 0, 1, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1539 = MULHD_rec
4879 { 1538, 3, 1, 4, 151, 0, 1, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1538 = MULHDU_rec
4880 { 1537, 3, 1, 4, 313, 0, 0, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1537 = MULHDU
4881 { 1536, 3, 1, 4, 312, 0, 0, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #1536 = MULHD
4882 { 1535, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 708, 0, 0x0ULL }, // Inst #1535 = MTVSRWZ
4883 { 1534, 2, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 697, 0, 0x0ULL }, // Inst #1534 = MTVSRWS
4884 { 1533, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 699, 0, 0x0ULL }, // Inst #1533 = MTVSRWM
4885 { 1532, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 708, 0, 0x0ULL }, // Inst #1532 = MTVSRWA
4886 { 1531, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 699, 0, 0x0ULL }, // Inst #1531 = MTVSRQM
4887 { 1530, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 699, 0, 0x0ULL }, // Inst #1530 = MTVSRHM
4888 { 1529, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 699, 0, 0x0ULL }, // Inst #1529 = MTVSRDM
4889 { 1528, 3, 1, 4, 262, 0, 0, PPCImpOpBase + 0, 705, 0, 0x0ULL }, // Inst #1528 = MTVSRDD
4890 { 1527, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 703, 0, 0x0ULL }, // Inst #1527 = MTVSRD
4891 { 1526, 2, 1, 4, 468, 0, 0, PPCImpOpBase + 0, 701, 0, 0x0ULL }, // Inst #1526 = MTVSRBMI
4892 { 1525, 2, 1, 4, 471, 0, 0, PPCImpOpBase + 0, 699, 0, 0x0ULL }, // Inst #1525 = MTVSRBM
4893 { 1524, 1, 0, 4, 236, 0, 0, PPCImpOpBase + 0, 671, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1524 = MTVSCR
4894 { 1523, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 697, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1523 = MTVRWZ
4895 { 1522, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 697, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1522 = MTVRWA
4896 { 1521, 2, 1, 4, 554, 0, 0, PPCImpOpBase + 0, 695, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xaULL }, // Inst #1521 = MTVRSAVEv
4897 { 1520, 1, 0, 4, 554, 0, 0, PPCImpOpBase + 0, 171, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xaULL }, // Inst #1520 = MTVRSAVE
4898 { 1519, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 693, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1519 = MTVRD
4899 { 1518, 1, 0, 4, 382, 0, 0, PPCImpOpBase + 0, 171, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xaULL }, // Inst #1518 = MTUDSCR
4900 { 1517, 2, 0, 4, 415, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1517 = MTSRIN
4901 { 1516, 2, 0, 4, 553, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1516 = MTSR
4902 { 1515, 2, 0, 4, 382, 0, 0, PPCImpOpBase + 0, 678, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1515 = MTSPR8
4903 { 1514, 2, 0, 4, 382, 0, 0, PPCImpOpBase + 0, 676, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1514 = MTSPR
4904 { 1513, 2, 0, 4, 377, 0, 0, PPCImpOpBase + 0, 676, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1513 = MTPMR
4905 { 1512, 2, 1, 4, 299, 0, 0, PPCImpOpBase + 0, 691, 0|(1ULL<<MCID::ExtraDefRegAllocReq), 0x21ULL }, // Inst #1512 = MTOCRF8
4906 { 1511, 2, 1, 4, 299, 0, 0, PPCImpOpBase + 0, 689, 0|(1ULL<<MCID::ExtraDefRegAllocReq), 0x21ULL }, // Inst #1511 = MTOCRF
4907 { 1510, 2, 0, 4, 381, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1510 = MTMSRD
4908 { 1509, 2, 0, 4, 380, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1509 = MTMSR
4909 { 1508, 1, 0, 4, 104, 0, 1, PPCImpOpBase + 204, 172, 0, 0x9ULL }, // Inst #1508 = MTLR8
4910 { 1507, 1, 0, 4, 104, 0, 1, PPCImpOpBase + 203, 171, 0, 0x9ULL }, // Inst #1507 = MTLR
4911 { 1506, 2, 0, 4, 186, 0, 1, PPCImpOpBase + 134, 687, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1506 = MTFSFb
4912 { 1505, 4, 0, 4, 185, 0, 1, PPCImpOpBase + 131, 680, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1505 = MTFSF_rec
4913 { 1504, 2, 0, 4, 536, 0, 1, PPCImpOpBase + 134, 21, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1504 = MTFSFIb
4914 { 1503, 3, 0, 4, 536, 0, 1, PPCImpOpBase + 131, 684, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1503 = MTFSFI_rec
4915 { 1502, 3, 0, 4, 536, 0, 1, PPCImpOpBase + 134, 684, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1502 = MTFSFI
4916 { 1501, 4, 0, 4, 185, 0, 1, PPCImpOpBase + 134, 680, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1501 = MTFSF
4917 { 1500, 1, 0, 4, 272, 0, 1, PPCImpOpBase + 134, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1500 = MTFSB1
4918 { 1499, 1, 0, 4, 531, 0, 1, PPCImpOpBase + 134, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1499 = MTFSB0
4919 { 1498, 2, 0, 4, 417, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1498 = MTDCR
4920 { 1497, 1, 0, 4, 104, 0, 1, PPCImpOpBase + 63, 171, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL }, // Inst #1497 = MTCTRloop
4921 { 1496, 1, 0, 4, 104, 0, 1, PPCImpOpBase + 64, 172, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL }, // Inst #1496 = MTCTR8loop
4922 { 1495, 1, 0, 4, 104, 0, 1, PPCImpOpBase + 64, 172, 0, 0x9ULL }, // Inst #1495 = MTCTR8
4923 { 1494, 1, 0, 4, 104, 0, 1, PPCImpOpBase + 63, 171, 0, 0x9ULL }, // Inst #1494 = MTCTR
4924 { 1493, 2, 0, 4, 196, 0, 0, PPCImpOpBase + 0, 678, 0|(1ULL<<MCID::ExtraDefRegAllocReq), 0x20ULL }, // Inst #1493 = MTCRF8
4925 { 1492, 2, 0, 4, 196, 0, 0, PPCImpOpBase + 0, 676, 0|(1ULL<<MCID::ExtraDefRegAllocReq), 0x20ULL }, // Inst #1492 = MTCRF
4926 { 1491, 0, 0, 4, 422, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1491 = MSYNC
4927 { 1490, 0, 0, 4, 344, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1490 = MSGSYNC
4928 { 1489, 3, 1, 4, 387, 0, 0, PPCImpOpBase + 0, 222, 0, 0x0ULL }, // Inst #1489 = MODUW
4929 { 1488, 3, 1, 4, 387, 0, 0, PPCImpOpBase + 0, 228, 0, 0x8ULL }, // Inst #1488 = MODUD
4930 { 1487, 3, 1, 4, 384, 0, 0, PPCImpOpBase + 0, 222, 0, 0x0ULL }, // Inst #1487 = MODSW
4931 { 1486, 3, 1, 4, 387, 0, 0, PPCImpOpBase + 0, 228, 0, 0x8ULL }, // Inst #1486 = MODSD
4932 { 1485, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 674, 0, 0x200ULL }, // Inst #1485 = MFVSRWZ
4933 { 1484, 2, 1, 4, 578, 0, 0, PPCImpOpBase + 0, 665, 0, 0x0ULL }, // Inst #1484 = MFVSRLD
4934 { 1483, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 672, 0, 0x0ULL }, // Inst #1483 = MFVSRD
4935 { 1482, 1, 1, 4, 235, 0, 0, PPCImpOpBase + 0, 671, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1482 = MFVSCR
4936 { 1481, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 669, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1481 = MFVRWZ
4937 { 1480, 2, 1, 4, 375, 0, 0, PPCImpOpBase + 0, 667, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL }, // Inst #1480 = MFVRSAVEv
4938 { 1479, 1, 1, 4, 375, 0, 0, PPCImpOpBase + 0, 171, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL }, // Inst #1479 = MFVRSAVE
4939 { 1478, 2, 1, 4, 259, 0, 0, PPCImpOpBase + 0, 665, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1478 = MFVRD
4940 { 1477, 1, 1, 4, 378, 0, 0, PPCImpOpBase + 0, 171, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL }, // Inst #1477 = MFUDSCR
4941 { 1476, 1, 1, 4, 562, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL }, // Inst #1476 = MFTB8
4942 { 1475, 2, 1, 4, 208, 0, 0, PPCImpOpBase + 0, 206, 0, 0x0ULL }, // Inst #1475 = MFTB
4943 { 1474, 2, 1, 4, 112, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1474 = MFSRIN
4944 { 1473, 2, 1, 4, 561, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1473 = MFSR
4945 { 1472, 2, 1, 4, 378, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1472 = MFSPR8
4946 { 1471, 2, 1, 4, 378, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1471 = MFSPR
4947 { 1470, 2, 1, 4, 376, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1470 = MFPMR
4948 { 1469, 2, 1, 4, 181, 0, 0, PPCImpOpBase + 0, 663, 0|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x21ULL }, // Inst #1469 = MFOCRF8
4949 { 1468, 2, 1, 4, 181, 0, 0, PPCImpOpBase + 0, 661, 0|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x21ULL }, // Inst #1468 = MFOCRF
4950 { 1467, 1, 1, 4, 379, 0, 0, PPCImpOpBase + 0, 171, 0, 0x0ULL }, // Inst #1467 = MFMSR
4951 { 1466, 1, 1, 4, 103, 1, 0, PPCImpOpBase + 204, 172, 0, 0x9ULL }, // Inst #1466 = MFLR8
4952 { 1465, 1, 1, 4, 103, 1, 0, PPCImpOpBase + 203, 171, 0, 0x9ULL }, // Inst #1465 = MFLR
4953 { 1464, 1, 1, 4, 529, 1, 1, PPCImpOpBase + 135, 658, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1464 = MFFS_rec
4954 { 1463, 1, 1, 4, 529, 1, 0, PPCImpOpBase + 134, 658, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1463 = MFFSL
4955 { 1462, 2, 1, 4, 530, 1, 0, PPCImpOpBase + 134, 659, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1462 = MFFSCRNI
4956 { 1461, 2, 1, 4, 273, 1, 0, PPCImpOpBase + 134, 345, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1461 = MFFSCRN
4957 { 1460, 1, 1, 4, 394, 1, 0, PPCImpOpBase + 134, 658, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1460 = MFFSCE
4958 { 1459, 2, 1, 4, 530, 1, 0, PPCImpOpBase + 134, 659, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1459 = MFFSCDRNI
4959 { 1458, 2, 1, 4, 273, 1, 0, PPCImpOpBase + 134, 345, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1458 = MFFSCDRN
4960 { 1457, 1, 1, 4, 529, 1, 0, PPCImpOpBase + 134, 658, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1aULL }, // Inst #1457 = MFFS
4961 { 1456, 2, 1, 4, 416, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1456 = MFDCR
4962 { 1455, 1, 1, 4, 103, 1, 0, PPCImpOpBase + 64, 172, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL }, // Inst #1455 = MFCTR8
4963 { 1454, 1, 1, 4, 103, 1, 0, PPCImpOpBase + 63, 171, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9ULL }, // Inst #1454 = MFCTR
4964 { 1453, 1, 1, 4, 105, 0, 0, PPCImpOpBase + 0, 172, 0|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x20ULL }, // Inst #1453 = MFCR8
4965 { 1452, 1, 1, 4, 105, 0, 0, PPCImpOpBase + 0, 171, 0|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x20ULL }, // Inst #1452 = MFCR
4966 { 1451, 3, 1, 4, 619, 0, 0, PPCImpOpBase + 0, 655, 0, 0x1ULL }, // Inst #1451 = MFBHRBE
4967 { 1450, 1, 1, 4, 291, 0, 0, PPCImpOpBase + 0, 654, 0, 0x0ULL }, // Inst #1450 = MCRXRX
4968 { 1449, 2, 1, 4, 391, 0, 0, PPCImpOpBase + 0, 652, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1449 = MCRFS
4969 { 1448, 2, 1, 4, 106, 0, 0, PPCImpOpBase + 0, 652, 0, 0x21ULL }, // Inst #1448 = MCRF
4970 { 1447, 1, 0, 4, 413, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1447 = MBAR
4971 { 1446, 4, 1, 4, 311, 0, 0, PPCImpOpBase + 0, 644, 0, 0x8ULL }, // Inst #1446 = MADDLD8
4972 { 1445, 4, 1, 4, 311, 0, 0, PPCImpOpBase + 0, 648, 0, 0x8ULL }, // Inst #1445 = MADDLD
4973 { 1444, 4, 1, 4, 311, 0, 0, PPCImpOpBase + 0, 644, 0, 0x8ULL }, // Inst #1444 = MADDHDU
4974 { 1443, 4, 1, 4, 311, 0, 0, PPCImpOpBase + 0, 644, 0, 0x8ULL }, // Inst #1443 = MADDHD
4975 { 1442, 3, 1, 4, 334, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1442 = LXVX
4976 { 1441, 3, 1, 4, 334, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1441 = LXVWSX
4977 { 1440, 3, 1, 4, 113, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1440 = LXVW4X
4978 { 1439, 3, 1, 4, 552, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1439 = LXVRWX
4979 { 1438, 3, 1, 4, 15, 0, 0, PPCImpOpBase + 0, 632, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1438 = LXVRLL
4980 { 1437, 3, 1, 4, 15, 0, 0, PPCImpOpBase + 0, 632, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1437 = LXVRL
4981 { 1436, 3, 1, 4, 552, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1436 = LXVRHX
4982 { 1435, 3, 1, 4, 552, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1435 = LXVRDX
4983 { 1434, 3, 1, 4, 552, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1434 = LXVRBX
4984 { 1433, 3, 1, 4, 560, 0, 0, PPCImpOpBase + 0, 641, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1433 = LXVPX
4985 { 1432, 3, 1, 4, 40, 0, 0, PPCImpOpBase + 0, 638, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1432 = LXVPRLL
4986 { 1431, 3, 1, 4, 40, 0, 0, PPCImpOpBase + 0, 638, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1431 = LXVPRL
4987 { 1430, 3, 1, 4, 559, 0, 0, PPCImpOpBase + 0, 635, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1430 = LXVP
4988 { 1429, 3, 1, 4, 333, 0, 0, PPCImpOpBase + 0, 632, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1429 = LXVLL
4989 { 1428, 3, 1, 4, 333, 0, 0, PPCImpOpBase + 0, 632, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1428 = LXVL
4990 { 1427, 2, 1, 4, 573, 0, 0, PPCImpOpBase + 0, 630, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1427 = LXVKQ
4991 { 1426, 3, 1, 4, 365, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1426 = LXVH8X
4992 { 1425, 3, 1, 4, 113, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1425 = LXVDSX
4993 { 1424, 3, 1, 4, 335, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1424 = LXVD2X
4994 { 1423, 3, 1, 4, 213, 0, 0, PPCImpOpBase + 0, 627, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1423 = LXVB16X
4995 { 1422, 3, 1, 4, 547, 0, 0, PPCImpOpBase + 0, 624, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1422 = LXV
4996 { 1421, 3, 1, 4, 363, 0, 0, PPCImpOpBase + 0, 219, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1421 = LXSSPX
4997 { 1420, 3, 1, 4, 558, 0, 0, PPCImpOpBase + 0, 621, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1420 = LXSSP
4998 { 1419, 3, 1, 4, 213, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1419 = LXSIWZX
4999 { 1418, 3, 1, 4, 360, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1418 = LXSIWAX
5000 { 1417, 3, 1, 4, 334, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1417 = LXSIHZX
5001 { 1416, 3, 1, 4, 334, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1416 = LXSIBZX
5002 { 1415, 3, 1, 4, 335, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1415 = LXSDX
5003 { 1414, 3, 1, 4, 547, 0, 0, PPCImpOpBase + 0, 621, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1414 = LXSD
5004 { 1413, 3, 1, 4, 542, 0, 0, PPCImpOpBase + 0, 618, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1413 = LWZtocL
5005 { 1412, 3, 1, 4, 542, 0, 0, PPCImpOpBase + 0, 615, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1412 = LWZtoc
5006 { 1411, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 557, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1411 = LWZXTLS_32
5007 { 1410, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1410 = LWZXTLS_
5008 { 1409, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1409 = LWZXTLS
5009 { 1408, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 551, 0|(1ULL<<MCID::MayLoad), 0x250ULL }, // Inst #1408 = LWZX8
5010 { 1407, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad), 0x250ULL }, // Inst #1407 = LWZX
5011 { 1406, 4, 2, 4, 356, 0, 0, PPCImpOpBase + 0, 547, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1406 = LWZUX8
5012 { 1405, 4, 2, 4, 356, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1405 = LWZUX
5013 { 1404, 4, 2, 4, 355, 0, 0, PPCImpOpBase + 0, 539, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1404 = LWZU8
5014 { 1403, 4, 2, 4, 355, 0, 0, PPCImpOpBase + 0, 535, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1403 = LWZU
5015 { 1402, 3, 1, 4, 555, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1402 = LWZCIX
5016 { 1401, 3, 1, 4, 540, 0, 0, PPCImpOpBase + 0, 521, 0|(1ULL<<MCID::MayLoad), 0x210ULL }, // Inst #1401 = LWZ8
5017 { 1400, 3, 1, 4, 540, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::MayLoad), 0x210ULL }, // Inst #1400 = LWZ
5018 { 1399, 3, 1, 4, 225, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1399 = LWEPX
5019 { 1398, 3, 1, 4, 111, 0, 0, PPCImpOpBase + 0, 551, 0|(1ULL<<MCID::MayLoad), 0x250ULL }, // Inst #1398 = LWBRX8
5020 { 1397, 3, 1, 4, 111, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad), 0x250ULL }, // Inst #1397 = LWBRX
5021 { 1396, 3, 1, 4, 124, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::MayLoad), 0x114ULL }, // Inst #1396 = LWA_32
5022 { 1395, 3, 1, 4, 123, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad), 0x154ULL }, // Inst #1395 = LWAX_32
5023 { 1394, 3, 1, 4, 222, 0, 0, PPCImpOpBase + 0, 557, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1394 = LWAXTLS_32
5024 { 1393, 3, 1, 4, 222, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1393 = LWAXTLS_
5025 { 1392, 3, 1, 4, 222, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1392 = LWAXTLS
5026 { 1391, 3, 1, 4, 123, 0, 0, PPCImpOpBase + 0, 551, 0|(1ULL<<MCID::MayLoad), 0x154ULL }, // Inst #1391 = LWAX
5027 { 1390, 4, 2, 4, 126, 0, 0, PPCImpOpBase + 0, 547, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1390 = LWAUX
5028 { 1389, 3, 1, 4, 403, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x40ULL }, // Inst #1389 = LWAT
5029 { 1388, 3, 1, 4, 109, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1388 = LWARXL
5030 { 1387, 3, 1, 4, 109, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1387 = LWARX
5031 { 1386, 3, 1, 4, 124, 0, 0, PPCImpOpBase + 0, 521, 0|(1ULL<<MCID::MayLoad), 0x114ULL }, // Inst #1386 = LWA
5032 { 1385, 3, 1, 4, 212, 0, 0, PPCImpOpBase + 0, 612, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1385 = LVXL
5033 { 1384, 3, 1, 4, 212, 0, 0, PPCImpOpBase + 0, 612, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1384 = LVX
5034 { 1383, 3, 1, 4, 322, 0, 0, PPCImpOpBase + 0, 612, 0, 0x50ULL }, // Inst #1383 = LVSR
5035 { 1382, 3, 1, 4, 322, 0, 0, PPCImpOpBase + 0, 612, 0, 0x50ULL }, // Inst #1382 = LVSL
5036 { 1381, 3, 1, 4, 212, 0, 0, PPCImpOpBase + 0, 612, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1381 = LVEWX
5037 { 1380, 3, 1, 4, 212, 0, 0, PPCImpOpBase + 0, 612, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1380 = LVEHX
5038 { 1379, 3, 1, 4, 212, 0, 0, PPCImpOpBase + 0, 612, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1379 = LVEBX
5039 { 1378, 3, 1, 4, 118, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1378 = LSWI
5040 { 1377, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 609, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL }, // Inst #1377 = LQX_PSEUDO
5041 { 1376, 3, 1, 4, 48, 0, 0, PPCImpOpBase + 0, 609, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1376 = LQARXL
5042 { 1375, 3, 1, 4, 48, 0, 0, PPCImpOpBase + 0, 609, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1375 = LQARX
5043 { 1374, 3, 1, 4, 215, 0, 0, PPCImpOpBase + 0, 606, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10ULL }, // Inst #1374 = LQ
5044 { 1373, 3, 1, 4, 108, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1373 = LMW
5045 { 1372, 2, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x108ULL }, // Inst #1372 = LIS8
5046 { 1371, 2, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x108ULL }, // Inst #1371 = LIS
5047 { 1370, 2, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x108ULL }, // Inst #1370 = LI8
5048 { 1369, 2, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x108ULL }, // Inst #1369 = LI
5049 { 1368, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 557, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1368 = LHZXTLS_32
5050 { 1367, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1367 = LHZXTLS_
5051 { 1366, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1366 = LHZXTLS
5052 { 1365, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 551, 0|(1ULL<<MCID::MayLoad), 0x350ULL }, // Inst #1365 = LHZX8
5053 { 1364, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad), 0x350ULL }, // Inst #1364 = LHZX
5054 { 1363, 4, 2, 4, 356, 0, 0, PPCImpOpBase + 0, 547, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1363 = LHZUX8
5055 { 1362, 4, 2, 4, 356, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1362 = LHZUX
5056 { 1361, 4, 2, 4, 355, 0, 0, PPCImpOpBase + 0, 539, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1361 = LHZU8
5057 { 1360, 4, 2, 4, 355, 0, 0, PPCImpOpBase + 0, 535, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1360 = LHZU
5058 { 1359, 3, 1, 4, 555, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1359 = LHZCIX
5059 { 1358, 3, 1, 4, 540, 0, 0, PPCImpOpBase + 0, 521, 0|(1ULL<<MCID::MayLoad), 0x310ULL }, // Inst #1358 = LHZ8
5060 { 1357, 3, 1, 4, 540, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::MayLoad), 0x310ULL }, // Inst #1357 = LHZ
5061 { 1356, 3, 1, 4, 225, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1356 = LHEPX
5062 { 1355, 3, 1, 4, 111, 0, 0, PPCImpOpBase + 0, 551, 0|(1ULL<<MCID::MayLoad), 0x250ULL }, // Inst #1355 = LHBRX8
5063 { 1354, 3, 1, 4, 111, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad), 0x250ULL }, // Inst #1354 = LHBRX
5064 { 1353, 3, 1, 4, 222, 0, 0, PPCImpOpBase + 0, 557, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1353 = LHAXTLS_32
5065 { 1352, 3, 1, 4, 222, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1352 = LHAXTLS_
5066 { 1351, 3, 1, 4, 222, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1351 = LHAXTLS
5067 { 1350, 3, 1, 4, 123, 0, 0, PPCImpOpBase + 0, 551, 0|(1ULL<<MCID::MayLoad), 0x154ULL }, // Inst #1350 = LHAX8
5068 { 1349, 3, 1, 4, 123, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad), 0x154ULL }, // Inst #1349 = LHAX
5069 { 1348, 4, 2, 4, 126, 0, 0, PPCImpOpBase + 0, 547, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1348 = LHAUX8
5070 { 1347, 4, 2, 4, 126, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1347 = LHAUX
5071 { 1346, 4, 2, 4, 125, 0, 0, PPCImpOpBase + 0, 539, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1346 = LHAU8
5072 { 1345, 4, 2, 4, 125, 0, 0, PPCImpOpBase + 0, 535, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1345 = LHAU
5073 { 1344, 3, 1, 4, 224, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1344 = LHARXL
5074 { 1343, 3, 1, 4, 117, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1343 = LHARX
5075 { 1342, 3, 1, 4, 546, 0, 0, PPCImpOpBase + 0, 521, 0|(1ULL<<MCID::MayLoad), 0x114ULL }, // Inst #1342 = LHA8
5076 { 1341, 3, 1, 4, 546, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::MayLoad), 0x114ULL }, // Inst #1341 = LHA
5077 { 1340, 3, 1, 4, 362, 0, 0, PPCImpOpBase + 0, 603, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1340 = LFSXTLS_
5078 { 1339, 3, 1, 4, 362, 0, 0, PPCImpOpBase + 0, 603, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1339 = LFSXTLS
5079 { 1338, 3, 1, 4, 362, 0, 0, PPCImpOpBase + 0, 600, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1338 = LFSX
5080 { 1337, 4, 2, 4, 401, 0, 0, PPCImpOpBase + 0, 596, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1337 = LFSUX
5081 { 1336, 4, 2, 4, 400, 0, 0, PPCImpOpBase + 0, 592, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1336 = LFSU
5082 { 1335, 3, 1, 4, 557, 0, 0, PPCImpOpBase + 0, 589, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1335 = LFS
5083 { 1334, 3, 1, 4, 347, 0, 0, PPCImpOpBase + 0, 575, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1334 = LFIWZX
5084 { 1333, 3, 1, 4, 119, 0, 0, PPCImpOpBase + 0, 575, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1333 = LFIWAX
5085 { 1332, 3, 1, 4, 348, 0, 0, PPCImpOpBase + 0, 586, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1332 = LFDXTLS_
5086 { 1331, 3, 1, 4, 348, 0, 0, PPCImpOpBase + 0, 586, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1331 = LFDXTLS
5087 { 1330, 3, 1, 4, 348, 0, 0, PPCImpOpBase + 0, 575, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1330 = LFDX
5088 { 1329, 4, 2, 4, 115, 0, 0, PPCImpOpBase + 0, 582, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1329 = LFDUX
5089 { 1328, 4, 2, 4, 114, 0, 0, PPCImpOpBase + 0, 578, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1328 = LFDU
5090 { 1327, 3, 1, 4, 226, 0, 0, PPCImpOpBase + 0, 575, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1327 = LFDEPX
5091 { 1326, 3, 1, 4, 545, 0, 0, PPCImpOpBase + 0, 572, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1326 = LFD
5092 { 1325, 3, 1, 4, 542, 0, 0, PPCImpOpBase + 0, 569, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1325 = LDtocL
5093 { 1324, 3, 1, 4, 542, 0, 0, PPCImpOpBase + 0, 566, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1324 = LDtocJTI
5094 { 1323, 3, 1, 4, 542, 0, 0, PPCImpOpBase + 0, 566, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1323 = LDtocCPT
5095 { 1322, 3, 1, 4, 542, 0, 0, PPCImpOpBase + 0, 566, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1322 = LDtocBA
5096 { 1321, 3, 1, 4, 542, 0, 0, PPCImpOpBase + 0, 566, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1321 = LDtoc
5097 { 1320, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 563, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1320 = LDgotTprelL32
5098 { 1319, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 560, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1319 = LDgotTprelL
5099 { 1318, 3, 1, 4, 223, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1318 = LDXTLS_
5100 { 1317, 3, 1, 4, 223, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1317 = LDXTLS
5101 { 1316, 3, 1, 4, 223, 0, 0, PPCImpOpBase + 0, 551, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1316 = LDX
5102 { 1315, 4, 2, 4, 137, 0, 0, PPCImpOpBase + 0, 547, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1315 = LDUX
5103 { 1314, 4, 2, 4, 135, 0, 0, PPCImpOpBase + 0, 539, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1314 = LDU
5104 { 1313, 3, 1, 4, 555, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1313 = LDCIX
5105 { 1312, 3, 1, 4, 550, 0, 0, PPCImpOpBase + 0, 551, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1312 = LDBRX
5106 { 1311, 3, 1, 4, 403, 0, 0, PPCImpOpBase + 0, 181, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x40ULL }, // Inst #1311 = LDAT
5107 { 1310, 3, 1, 4, 110, 0, 0, PPCImpOpBase + 0, 551, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1310 = LDARXL
5108 { 1309, 3, 1, 4, 110, 0, 0, PPCImpOpBase + 0, 551, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1309 = LDARX
5109 { 1308, 3, 1, 4, 541, 0, 0, PPCImpOpBase + 0, 521, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1308 = LD
5110 { 1307, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 557, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1307 = LBZXTLS_32
5111 { 1306, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1306 = LBZXTLS_
5112 { 1305, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 554, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #1305 = LBZXTLS
5113 { 1304, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 551, 0|(1ULL<<MCID::MayLoad), 0x350ULL }, // Inst #1304 = LBZX8
5114 { 1303, 3, 1, 4, 340, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad), 0x350ULL }, // Inst #1303 = LBZX
5115 { 1302, 4, 2, 4, 136, 0, 0, PPCImpOpBase + 0, 547, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1302 = LBZUX8
5116 { 1301, 4, 2, 4, 136, 0, 0, PPCImpOpBase + 0, 543, 0|(1ULL<<MCID::MayLoad), 0x50ULL }, // Inst #1301 = LBZUX
5117 { 1300, 4, 2, 4, 134, 0, 0, PPCImpOpBase + 0, 539, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1300 = LBZU8
5118 { 1299, 4, 2, 4, 134, 0, 0, PPCImpOpBase + 0, 535, 0|(1ULL<<MCID::MayLoad), 0x10ULL }, // Inst #1299 = LBZU
5119 { 1298, 3, 1, 4, 555, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #1298 = LBZCIX
5120 { 1297, 3, 1, 4, 540, 0, 0, PPCImpOpBase + 0, 521, 0|(1ULL<<MCID::MayLoad), 0x310ULL }, // Inst #1297 = LBZ8
5121 { 1296, 3, 1, 4, 540, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::MayLoad), 0x310ULL }, // Inst #1296 = LBZ
5122 { 1295, 3, 1, 4, 225, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1295 = LBEPX
5123 { 1294, 3, 1, 4, 224, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1294 = LBARXL
5124 { 1293, 3, 1, 4, 117, 0, 0, PPCImpOpBase + 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #1293 = LBARX
5125 { 1292, 3, 1, 4, 289, 0, 0, PPCImpOpBase + 0, 208, 0, 0x8ULL }, // Inst #1292 = LA8
5126 { 1291, 3, 1, 4, 289, 0, 0, PPCImpOpBase + 0, 245, 0, 0x8ULL }, // Inst #1291 = LA
5127 { 1290, 0, 0, 4, 343, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1290 = ISYNC
5128 { 1289, 4, 1, 4, 207, 0, 0, PPCImpOpBase + 0, 528, 0|(1ULL<<MCID::Select), 0x8ULL }, // Inst #1289 = ISEL8
5129 { 1288, 4, 1, 4, 207, 0, 0, PPCImpOpBase + 0, 524, 0|(1ULL<<MCID::Select), 0x8ULL }, // Inst #1288 = ISEL
5130 { 1287, 2, 0, 4, 618, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1287 = ICCCI
5131 { 1286, 3, 0, 4, 339, 0, 0, PPCImpOpBase + 0, 342, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1286 = ICBTLS
5132 { 1285, 3, 0, 4, 549, 0, 0, PPCImpOpBase + 0, 342, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1285 = ICBT
5133 { 1284, 3, 0, 4, 618, 0, 0, PPCImpOpBase + 0, 342, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1284 = ICBLQ
5134 { 1283, 3, 0, 4, 414, 0, 0, PPCImpOpBase + 0, 342, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1283 = ICBLC
5135 { 1282, 2, 0, 4, 338, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1282 = ICBIEP
5136 { 1281, 2, 0, 4, 606, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1281 = ICBI
5137 { 1280, 0, 0, 4, 535, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1280 = HRFID
5138 { 1279, 3, 0, 4, 453, 0, 0, PPCImpOpBase + 0, 521, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1279 = HASHSTP8
5139 { 1278, 3, 0, 4, 453, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1278 = HASHSTP
5140 { 1277, 3, 0, 4, 453, 0, 0, PPCImpOpBase + 0, 521, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1277 = HASHST8
5141 { 1276, 3, 0, 4, 453, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1276 = HASHST
5142 { 1275, 3, 0, 4, 421, 0, 0, PPCImpOpBase + 0, 521, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1275 = HASHCHKP8
5143 { 1274, 3, 0, 4, 421, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1274 = HASHCHKP
5144 { 1273, 3, 0, 4, 421, 0, 0, PPCImpOpBase + 0, 521, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1273 = HASHCHK8
5145 { 1272, 3, 0, 4, 421, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1272 = HASHCHK
5146 { 1271, 3, 1, 4, 0, 0, 18, PPCImpOpBase + 183, 234, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1271 = GETtlsldADDRPCREL
5147 { 1270, 3, 1, 4, 0, 0, 17, PPCImpOpBase + 154, 225, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1270 = GETtlsldADDR32
5148 { 1269, 3, 1, 4, 0, 0, 17, PPCImpOpBase + 137, 234, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1269 = GETtlsldADDR
5149 { 1268, 1, 1, 4, 0, 0, 2, PPCImpOpBase + 201, 171, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1268 = GETtlsTpointer32AIX
5150 { 1267, 2, 1, 4, 0, 0, 6, PPCImpOpBase + 177, 261, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1267 = GETtlsMOD64AIX
5151 { 1266, 2, 1, 4, 0, 0, 6, PPCImpOpBase + 171, 259, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1266 = GETtlsMOD32AIX
5152 { 1265, 3, 1, 8, 0, 0, 18, PPCImpOpBase + 183, 234, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1265 = GETtlsADDRPCREL
5153 { 1264, 3, 1, 4, 0, 0, 6, PPCImpOpBase + 177, 228, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1264 = GETtlsADDR64AIX
5154 { 1263, 3, 1, 4, 0, 0, 6, PPCImpOpBase + 171, 222, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1263 = GETtlsADDR32AIX
5155 { 1262, 3, 1, 4, 0, 0, 17, PPCImpOpBase + 154, 225, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1262 = GETtlsADDR32
5156 { 1261, 3, 1, 8, 0, 0, 17, PPCImpOpBase + 137, 234, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #1261 = GETtlsADDR
5157 { 1260, 2, 1, 4, 470, 0, 0, PPCImpOpBase + 0, 519, 0, 0x18ULL }, // Inst #1260 = FTSQRT
5158 { 1259, 3, 1, 4, 276, 0, 0, PPCImpOpBase + 0, 351, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x18ULL }, // Inst #1259 = FTDIV
5159 { 1258, 3, 1, 4, 157, 1, 1, PPCImpOpBase + 135, 336, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1258 = FSUB_rec
5160 { 1257, 3, 1, 4, 442, 1, 1, PPCImpOpBase + 135, 499, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1257 = FSUBS_rec
5161 { 1256, 3, 1, 4, 435, 1, 0, PPCImpOpBase + 134, 499, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1256 = FSUBS
5162 { 1255, 3, 1, 4, 316, 1, 0, PPCImpOpBase + 134, 336, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1255 = FSUB
5163 { 1254, 2, 1, 4, 176, 1, 1, PPCImpOpBase + 135, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1254 = FSQRT_rec
5164 { 1253, 2, 1, 4, 184, 1, 1, PPCImpOpBase + 135, 497, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1253 = FSQRTS_rec
5165 { 1252, 2, 1, 4, 398, 1, 0, PPCImpOpBase + 134, 497, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1252 = FSQRTS
5166 { 1251, 2, 1, 4, 397, 1, 0, PPCImpOpBase + 134, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1251 = FSQRT
5167 { 1250, 4, 1, 4, 319, 0, 1, PPCImpOpBase + 131, 515, 0, 0x18ULL }, // Inst #1250 = FSELS_rec
5168 { 1249, 4, 1, 4, 315, 0, 0, PPCImpOpBase + 0, 515, 0, 0x18ULL }, // Inst #1249 = FSELS
5169 { 1248, 4, 1, 4, 319, 0, 1, PPCImpOpBase + 131, 507, 0, 0x18ULL }, // Inst #1248 = FSELD_rec
5170 { 1247, 4, 1, 4, 315, 0, 0, PPCImpOpBase + 0, 507, 0, 0x18ULL }, // Inst #1247 = FSELD
5171 { 1246, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1246 = FRSQRTE_rec
5172 { 1245, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 497, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1245 = FRSQRTES_rec
5173 { 1244, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 497, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1244 = FRSQRTES
5174 { 1243, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1243 = FRSQRTE
5175 { 1242, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 502, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1242 = FRSP_rec
5176 { 1241, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 502, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1241 = FRSP
5177 { 1240, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 497, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1240 = FRIZS_rec
5178 { 1239, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 497, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1239 = FRIZS
5179 { 1238, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1238 = FRIZD_rec
5180 { 1237, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1237 = FRIZD
5181 { 1236, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 497, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1236 = FRIPS_rec
5182 { 1235, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 497, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1235 = FRIPS
5183 { 1234, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1234 = FRIPD_rec
5184 { 1233, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1233 = FRIPD
5185 { 1232, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 497, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1232 = FRINS_rec
5186 { 1231, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 497, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1231 = FRINS
5187 { 1230, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1230 = FRIND_rec
5188 { 1229, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1229 = FRIND
5189 { 1228, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 497, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1228 = FRIMS_rec
5190 { 1227, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 497, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1227 = FRIMS
5191 { 1226, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1226 = FRIMD_rec
5192 { 1225, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1225 = FRIMD
5193 { 1224, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1224 = FRE_rec
5194 { 1223, 2, 1, 4, 444, 0, 1, PPCImpOpBase + 131, 497, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1223 = FRES_rec
5195 { 1222, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 497, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1222 = FRES
5196 { 1221, 2, 1, 4, 427, 0, 0, PPCImpOpBase + 0, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1221 = FRE
5197 { 1220, 4, 1, 4, 158, 1, 1, PPCImpOpBase + 135, 507, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1220 = FNMSUB_rec
5198 { 1219, 4, 1, 4, 320, 1, 1, PPCImpOpBase + 135, 511, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1219 = FNMSUBS_rec
5199 { 1218, 4, 1, 4, 315, 1, 0, PPCImpOpBase + 134, 511, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1218 = FNMSUBS
5200 { 1217, 4, 1, 4, 317, 1, 0, PPCImpOpBase + 134, 507, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1217 = FNMSUB
5201 { 1216, 4, 1, 4, 158, 1, 1, PPCImpOpBase + 135, 507, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1216 = FNMADD_rec
5202 { 1215, 4, 1, 4, 320, 1, 1, PPCImpOpBase + 135, 511, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1215 = FNMADDS_rec
5203 { 1214, 4, 1, 4, 315, 1, 0, PPCImpOpBase + 134, 511, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1214 = FNMADDS
5204 { 1213, 4, 1, 4, 317, 1, 0, PPCImpOpBase + 134, 507, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1213 = FNMADD
5205 { 1212, 2, 1, 4, 537, 0, 1, PPCImpOpBase + 131, 497, 0, 0x18ULL }, // Inst #1212 = FNEGS_rec
5206 { 1211, 2, 1, 4, 507, 0, 0, PPCImpOpBase + 0, 497, 0, 0x18ULL }, // Inst #1211 = FNEGS
5207 { 1210, 2, 1, 4, 537, 0, 1, PPCImpOpBase + 131, 345, 0, 0x18ULL }, // Inst #1210 = FNEGD_rec
5208 { 1209, 2, 1, 4, 507, 0, 0, PPCImpOpBase + 0, 345, 0, 0x18ULL }, // Inst #1209 = FNEGD
5209 { 1208, 2, 1, 4, 537, 0, 1, PPCImpOpBase + 131, 497, 0, 0x18ULL }, // Inst #1208 = FNABSS_rec
5210 { 1207, 2, 1, 4, 507, 0, 0, PPCImpOpBase + 0, 497, 0, 0x18ULL }, // Inst #1207 = FNABSS
5211 { 1206, 2, 1, 4, 537, 0, 1, PPCImpOpBase + 131, 345, 0, 0x18ULL }, // Inst #1206 = FNABSD_rec
5212 { 1205, 2, 1, 4, 507, 0, 0, PPCImpOpBase + 0, 345, 0, 0x18ULL }, // Inst #1205 = FNABSD
5213 { 1204, 3, 1, 4, 443, 1, 1, PPCImpOpBase + 135, 336, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1204 = FMUL_rec
5214 { 1203, 3, 1, 4, 442, 1, 1, PPCImpOpBase + 135, 499, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1203 = FMULS_rec
5215 { 1202, 3, 1, 4, 435, 1, 0, PPCImpOpBase + 134, 499, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1202 = FMULS
5216 { 1201, 3, 1, 4, 436, 1, 0, PPCImpOpBase + 134, 336, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1201 = FMUL
5217 { 1200, 4, 1, 4, 158, 1, 1, PPCImpOpBase + 135, 507, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1200 = FMSUB_rec
5218 { 1199, 4, 1, 4, 320, 1, 1, PPCImpOpBase + 135, 511, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1199 = FMSUBS_rec
5219 { 1198, 4, 1, 4, 315, 1, 0, PPCImpOpBase + 134, 511, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1198 = FMSUBS
5220 { 1197, 4, 1, 4, 317, 1, 0, PPCImpOpBase + 134, 507, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1197 = FMSUB
5221 { 1196, 2, 1, 4, 537, 0, 1, PPCImpOpBase + 131, 497, 0, 0x0ULL }, // Inst #1196 = FMR_rec
5222 { 1195, 2, 1, 4, 507, 0, 0, PPCImpOpBase + 0, 497, 0, 0x0ULL }, // Inst #1195 = FMR
5223 { 1194, 4, 1, 4, 158, 1, 1, PPCImpOpBase + 135, 507, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1194 = FMADD_rec
5224 { 1193, 4, 1, 4, 320, 1, 1, PPCImpOpBase + 135, 511, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1193 = FMADDS_rec
5225 { 1192, 4, 1, 4, 315, 1, 0, PPCImpOpBase + 134, 511, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1192 = FMADDS
5226 { 1191, 4, 1, 4, 317, 1, 0, PPCImpOpBase + 134, 507, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1191 = FMADD
5227 { 1190, 0, 0, 4, 0, 0, 1, PPCImpOpBase + 134, 1, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1190 = FENCE
5228 { 1189, 3, 1, 4, 174, 1, 1, PPCImpOpBase + 135, 336, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1189 = FDIV_rec
5229 { 1188, 3, 1, 4, 171, 1, 1, PPCImpOpBase + 135, 499, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1188 = FDIVS_rec
5230 { 1187, 3, 1, 4, 399, 1, 0, PPCImpOpBase + 134, 499, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1187 = FDIVS
5231 { 1186, 3, 1, 4, 396, 1, 0, PPCImpOpBase + 134, 336, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1186 = FDIV
5232 { 1185, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1185 = FCTIW_rec
5233 { 1184, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1184 = FCTIWZ_rec
5234 { 1183, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1183 = FCTIWZ
5235 { 1182, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1182 = FCTIWU_rec
5236 { 1181, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1181 = FCTIWUZ_rec
5237 { 1180, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1180 = FCTIWUZ
5238 { 1179, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1179 = FCTIWU
5239 { 1178, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1178 = FCTIW
5240 { 1177, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1177 = FCTID_rec
5241 { 1176, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1176 = FCTIDZ_rec
5242 { 1175, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1175 = FCTIDZ
5243 { 1174, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1174 = FCTIDU_rec
5244 { 1173, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1173 = FCTIDUZ_rec
5245 { 1172, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1172 = FCTIDUZ
5246 { 1171, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1171 = FCTIDU
5247 { 1170, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1170 = FCTID
5248 { 1169, 3, 1, 4, 156, 0, 1, PPCImpOpBase + 131, 499, 0, 0x18ULL }, // Inst #1169 = FCPSGNS_rec
5249 { 1168, 3, 1, 4, 301, 0, 0, PPCImpOpBase + 0, 499, 0, 0x18ULL }, // Inst #1168 = FCPSGNS
5250 { 1167, 3, 1, 4, 156, 0, 1, PPCImpOpBase + 131, 336, 0, 0x18ULL }, // Inst #1167 = FCPSGND_rec
5251 { 1166, 3, 1, 4, 301, 0, 0, PPCImpOpBase + 0, 336, 0, 0x18ULL }, // Inst #1166 = FCPSGND
5252 { 1165, 3, 1, 4, 170, 0, 0, PPCImpOpBase + 0, 504, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1165 = FCMPUS
5253 { 1164, 3, 1, 4, 170, 0, 0, PPCImpOpBase + 0, 351, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1164 = FCMPUD
5254 { 1163, 3, 1, 4, 170, 0, 0, PPCImpOpBase + 0, 504, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1163 = FCMPOS
5255 { 1162, 3, 1, 4, 170, 0, 0, PPCImpOpBase + 0, 351, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1162 = FCMPOD
5256 { 1161, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1161 = FCFID_rec
5257 { 1160, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1160 = FCFIDU_rec
5258 { 1159, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 502, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1159 = FCFIDUS_rec
5259 { 1158, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 502, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1158 = FCFIDUS
5260 { 1157, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1157 = FCFIDU
5261 { 1156, 2, 1, 4, 444, 1, 1, PPCImpOpBase + 135, 502, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1156 = FCFIDS_rec
5262 { 1155, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 502, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1155 = FCFIDS
5263 { 1154, 2, 1, 4, 427, 1, 0, PPCImpOpBase + 134, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x18ULL }, // Inst #1154 = FCFID
5264 { 1153, 3, 1, 4, 0, 1, 0, PPCImpOpBase + 134, 336, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1153 = FADDrtz
5265 { 1152, 3, 1, 4, 157, 1, 1, PPCImpOpBase + 135, 336, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1152 = FADD_rec
5266 { 1151, 3, 1, 4, 442, 1, 1, PPCImpOpBase + 135, 499, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1151 = FADDS_rec
5267 { 1150, 3, 1, 4, 435, 1, 0, PPCImpOpBase + 134, 499, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1150 = FADDS
5268 { 1149, 3, 1, 4, 316, 1, 0, PPCImpOpBase + 134, 336, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x18ULL }, // Inst #1149 = FADD
5269 { 1148, 2, 1, 4, 537, 0, 1, PPCImpOpBase + 131, 497, 0, 0x18ULL }, // Inst #1148 = FABSS_rec
5270 { 1147, 2, 1, 4, 507, 0, 0, PPCImpOpBase + 0, 497, 0, 0x18ULL }, // Inst #1147 = FABSS
5271 { 1146, 2, 1, 4, 537, 0, 1, PPCImpOpBase + 131, 345, 0, 0x18ULL }, // Inst #1146 = FABSD_rec
5272 { 1145, 2, 1, 4, 507, 0, 0, PPCImpOpBase + 0, 345, 0, 0x18ULL }, // Inst #1145 = FABSD
5273 { 1144, 0, 0, 4, 610, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1144 = EnforceIEIO
5274 { 1143, 2, 1, 4, 506, 0, 1, PPCImpOpBase + 0, 261, 0, 0x108ULL }, // Inst #1143 = EXTSW_rec
5275 { 1142, 2, 1, 4, 506, 0, 1, PPCImpOpBase + 0, 492, 0, 0x108ULL }, // Inst #1142 = EXTSW_32_64_rec
5276 { 1141, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 492, 0, 0x108ULL }, // Inst #1141 = EXTSW_32_64
5277 { 1140, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 259, 0, 0x8ULL }, // Inst #1140 = EXTSW_32
5278 { 1139, 3, 1, 4, 395, 0, 2, PPCImpOpBase + 11, 181, 0, 0x8ULL }, // Inst #1139 = EXTSWSLI_rec
5279 { 1138, 3, 1, 4, 395, 0, 1, PPCImpOpBase + 0, 494, 0, 0x8ULL }, // Inst #1138 = EXTSWSLI_32_64_rec
5280 { 1137, 3, 1, 4, 285, 0, 0, PPCImpOpBase + 0, 494, 0, 0x8ULL }, // Inst #1137 = EXTSWSLI_32_64
5281 { 1136, 3, 1, 4, 285, 0, 1, PPCImpOpBase + 5, 181, 0, 0x8ULL }, // Inst #1136 = EXTSWSLI
5282 { 1135, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 261, 0, 0x108ULL }, // Inst #1135 = EXTSW
5283 { 1134, 2, 1, 4, 506, 0, 1, PPCImpOpBase + 0, 259, 0, 0x108ULL }, // Inst #1134 = EXTSH_rec
5284 { 1133, 2, 1, 4, 506, 0, 1, PPCImpOpBase + 0, 261, 0, 0x108ULL }, // Inst #1133 = EXTSH8_rec
5285 { 1132, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 492, 0, 0x108ULL }, // Inst #1132 = EXTSH8_32_64
5286 { 1131, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 261, 0, 0x108ULL }, // Inst #1131 = EXTSH8
5287 { 1130, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 259, 0, 0x108ULL }, // Inst #1130 = EXTSH
5288 { 1129, 2, 1, 4, 506, 0, 1, PPCImpOpBase + 0, 259, 0, 0x108ULL }, // Inst #1129 = EXTSB_rec
5289 { 1128, 2, 1, 4, 506, 0, 1, PPCImpOpBase + 0, 261, 0, 0x108ULL }, // Inst #1128 = EXTSB8_rec
5290 { 1127, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 492, 0, 0x108ULL }, // Inst #1127 = EXTSB8_32_64
5291 { 1126, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 261, 0, 0x108ULL }, // Inst #1126 = EXTSB8
5292 { 1125, 2, 1, 4, 506, 0, 0, PPCImpOpBase + 0, 259, 0, 0x108ULL }, // Inst #1125 = EXTSB
5293 { 1124, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1124 = EVXOR
5294 { 1123, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 489, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1123 = EVSUBIFW
5295 { 1122, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1122 = EVSUBFW
5296 { 1121, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1121 = EVSUBFUSIAAW
5297 { 1120, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1120 = EVSUBFUMIAAW
5298 { 1119, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1119 = EVSUBFSSIAAW
5299 { 1118, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1118 = EVSUBFSMIAAW
5300 { 1117, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1117 = EVSTWWOX
5301 { 1116, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1116 = EVSTWWO
5302 { 1115, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1115 = EVSTWWEX
5303 { 1114, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1114 = EVSTWWE
5304 { 1113, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1113 = EVSTWHOX
5305 { 1112, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1112 = EVSTWHO
5306 { 1111, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1111 = EVSTWHEX
5307 { 1110, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1110 = EVSTWHE
5308 { 1109, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1109 = EVSTDWX
5309 { 1108, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1108 = EVSTDW
5310 { 1107, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1107 = EVSTDHX
5311 { 1106, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1106 = EVSTDH
5312 { 1105, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1105 = EVSTDDX
5313 { 1104, 3, 0, 4, 409, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1104 = EVSTDD
5314 { 1103, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1103 = EVSRWU
5315 { 1102, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1102 = EVSRWS
5316 { 1101, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 471, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1101 = EVSRWIU
5317 { 1100, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 471, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1100 = EVSRWIS
5318 { 1099, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 487, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1099 = EVSPLATI
5319 { 1098, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 487, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1098 = EVSPLATFI
5320 { 1097, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 471, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1097 = EVSLWI
5321 { 1096, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1096 = EVSLW
5322 { 1095, 4, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 483, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1095 = EVSEL
5323 { 1094, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1094 = EVRNDW
5324 { 1093, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 471, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1093 = EVRLWI
5325 { 1092, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1092 = EVRLW
5326 { 1091, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1091 = EVORC
5327 { 1090, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1090 = EVOR
5328 { 1089, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1089 = EVNOR
5329 { 1088, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1088 = EVNEG
5330 { 1087, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1087 = EVNAND
5331 { 1086, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1086 = EVMWUMIAN
5332 { 1085, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1085 = EVMWUMIAA
5333 { 1084, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1084 = EVMWUMIA
5334 { 1083, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1083 = EVMWUMI
5335 { 1082, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1082 = EVMWSSFAN
5336 { 1081, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1081 = EVMWSSFAA
5337 { 1080, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1080 = EVMWSSFA
5338 { 1079, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1079 = EVMWSSF
5339 { 1078, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1078 = EVMWSMIAN
5340 { 1077, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1077 = EVMWSMIAA
5341 { 1076, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1076 = EVMWSMIA
5342 { 1075, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1075 = EVMWSMI
5343 { 1074, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1074 = EVMWSMFAN
5344 { 1073, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1073 = EVMWSMFAA
5345 { 1072, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1072 = EVMWSMFA
5346 { 1071, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1071 = EVMWSMF
5347 { 1070, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1070 = EVMWLUSIANW
5348 { 1069, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1069 = EVMWLUSIAAW
5349 { 1068, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1068 = EVMWLUMIANW
5350 { 1067, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1067 = EVMWLUMIAAW
5351 { 1066, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1066 = EVMWLUMIA
5352 { 1065, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1065 = EVMWLUMI
5353 { 1064, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1064 = EVMWLSSIANW
5354 { 1063, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1063 = EVMWLSSIAAW
5355 { 1062, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1062 = EVMWLSMIANW
5356 { 1061, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1061 = EVMWLSMIAAW
5357 { 1060, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1060 = EVMWHUMIA
5358 { 1059, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1059 = EVMWHUMI
5359 { 1058, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1058 = EVMWHSSFA
5360 { 1057, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1057 = EVMWHSSF
5361 { 1056, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1056 = EVMWHSMIA
5362 { 1055, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1055 = EVMWHSMI
5363 { 1054, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1054 = EVMWHSMFA
5364 { 1053, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1053 = EVMWHSMF
5365 { 1052, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1052 = EVMRA
5366 { 1051, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1051 = EVMHOUSIANW
5367 { 1050, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1050 = EVMHOUSIAAW
5368 { 1049, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1049 = EVMHOUMIANW
5369 { 1048, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1048 = EVMHOUMIAAW
5370 { 1047, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1047 = EVMHOUMIA
5371 { 1046, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1046 = EVMHOUMI
5372 { 1045, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1045 = EVMHOSSIANW
5373 { 1044, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1044 = EVMHOSSIAAW
5374 { 1043, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1043 = EVMHOSSFANW
5375 { 1042, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1042 = EVMHOSSFAAW
5376 { 1041, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1041 = EVMHOSSFA
5377 { 1040, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1040 = EVMHOSSF
5378 { 1039, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1039 = EVMHOSMIANW
5379 { 1038, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1038 = EVMHOSMIAAW
5380 { 1037, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1037 = EVMHOSMIA
5381 { 1036, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1036 = EVMHOSMI
5382 { 1035, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1035 = EVMHOSMFANW
5383 { 1034, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1034 = EVMHOSMFAAW
5384 { 1033, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1033 = EVMHOSMFA
5385 { 1032, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1032 = EVMHOSMF
5386 { 1031, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1031 = EVMHOGUMIAN
5387 { 1030, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1030 = EVMHOGUMIAA
5388 { 1029, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1029 = EVMHOGSMIAN
5389 { 1028, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1028 = EVMHOGSMIAA
5390 { 1027, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1027 = EVMHOGSMFAN
5391 { 1026, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1026 = EVMHOGSMFAA
5392 { 1025, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1025 = EVMHEUSIANW
5393 { 1024, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1024 = EVMHEUSIAAW
5394 { 1023, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1023 = EVMHEUMIANW
5395 { 1022, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1022 = EVMHEUMIAAW
5396 { 1021, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1021 = EVMHEUMIA
5397 { 1020, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1020 = EVMHEUMI
5398 { 1019, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1019 = EVMHESSIANW
5399 { 1018, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1018 = EVMHESSIAAW
5400 { 1017, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1017 = EVMHESSFANW
5401 { 1016, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1016 = EVMHESSFAAW
5402 { 1015, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1015 = EVMHESSFA
5403 { 1014, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1014 = EVMHESSF
5404 { 1013, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1013 = EVMHESMIANW
5405 { 1012, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1012 = EVMHESMIAAW
5406 { 1011, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1011 = EVMHESMIA
5407 { 1010, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1010 = EVMHESMI
5408 { 1009, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1009 = EVMHESMFANW
5409 { 1008, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1008 = EVMHESMFAAW
5410 { 1007, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1007 = EVMHESMFA
5411 { 1006, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1006 = EVMHESMF
5412 { 1005, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1005 = EVMHEGUMIAN
5413 { 1004, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1004 = EVMHEGUMIAA
5414 { 1003, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1003 = EVMHEGSMIAN
5415 { 1002, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1002 = EVMHEGSMIAA
5416 { 1001, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1001 = EVMHEGSMFAN
5417 { 1000, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1000 = EVMHEGSMFAA
5418 { 999, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #999 = EVMERGELOHI
5419 { 998, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 480, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #998 = EVMERGELO
5420 { 997, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #997 = EVMERGEHILO
5421 { 996, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #996 = EVMERGEHI
5422 { 995, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #995 = EVLWWSPLATX
5423 { 994, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #994 = EVLWWSPLAT
5424 { 993, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #993 = EVLWHSPLATX
5425 { 992, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #992 = EVLWHSPLAT
5426 { 991, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #991 = EVLWHOUX
5427 { 990, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #990 = EVLWHOU
5428 { 989, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #989 = EVLWHOSX
5429 { 988, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #988 = EVLWHOS
5430 { 987, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #987 = EVLWHEX
5431 { 986, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #986 = EVLWHE
5432 { 985, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #985 = EVLHHOUSPLATX
5433 { 984, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #984 = EVLHHOUSPLAT
5434 { 983, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #983 = EVLHHOSSPLATX
5435 { 982, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #982 = EVLHHOSSPLAT
5436 { 981, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #981 = EVLHHESPLATX
5437 { 980, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #980 = EVLHHESPLAT
5438 { 979, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #979 = EVLDWX
5439 { 978, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #978 = EVLDW
5440 { 977, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #977 = EVLDHX
5441 { 976, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #976 = EVLDH
5442 { 975, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 477, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #975 = EVLDDX
5443 { 974, 3, 1, 4, 408, 0, 0, PPCImpOpBase + 0, 474, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #974 = EVLDD
5444 { 973, 3, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #973 = EVFSTSTLT
5445 { 972, 3, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #972 = EVFSTSTGT
5446 { 971, 3, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #971 = EVFSTSTEQ
5447 { 970, 3, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #970 = EVFSSUB
5448 { 969, 2, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #969 = EVFSNEG
5449 { 968, 2, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #968 = EVFSNABS
5450 { 967, 3, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #967 = EVFSMUL
5451 { 966, 3, 1, 4, 21, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #966 = EVFSDIV
5452 { 965, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #965 = EVFSCTUIZ
5453 { 964, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #964 = EVFSCTUI
5454 { 963, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #963 = EVFSCTUF
5455 { 962, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #962 = EVFSCTSIZ
5456 { 961, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #961 = EVFSCTSI
5457 { 960, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #960 = EVFSCTSF
5458 { 959, 3, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #959 = EVFSCMPLT
5459 { 958, 3, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #958 = EVFSCMPGT
5460 { 957, 3, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #957 = EVFSCMPEQ
5461 { 956, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #956 = EVFSCFUI
5462 { 955, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #955 = EVFSCFUF
5463 { 954, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #954 = EVFSCFSI
5464 { 953, 2, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #953 = EVFSCFSF
5465 { 952, 3, 1, 4, 24, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #952 = EVFSADD
5466 { 951, 2, 1, 4, 23, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #951 = EVFSABS
5467 { 950, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #950 = EVEXTSH
5468 { 949, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #949 = EVEXTSB
5469 { 948, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #948 = EVEQV
5470 { 947, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #947 = EVDIVWU
5471 { 946, 3, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #946 = EVDIVWS
5472 { 945, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #945 = EVCNTLZW
5473 { 944, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #944 = EVCNTLSW
5474 { 943, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #943 = EVCMPLTU
5475 { 942, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #942 = EVCMPLTS
5476 { 941, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #941 = EVCMPGTU
5477 { 940, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #940 = EVCMPGTS
5478 { 939, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #939 = EVCMPEQ
5479 { 938, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #938 = EVANDC
5480 { 937, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #937 = EVAND
5481 { 936, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 458, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #936 = EVADDW
5482 { 935, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #935 = EVADDUSIAAW
5483 { 934, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #934 = EVADDUMIAAW
5484 { 933, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #933 = EVADDSSIAAW
5485 { 932, 2, 1, 4, 407, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #932 = EVADDSMIAAW
5486 { 931, 3, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 471, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #931 = EVADDIW
5487 { 930, 2, 1, 4, 406, 0, 0, PPCImpOpBase + 0, 456, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #930 = EVABS
5488 { 929, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #929 = EQV_rec
5489 { 928, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #928 = EQV8_rec
5490 { 927, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #927 = EQV8
5491 { 926, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #926 = EQV
5492 { 925, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 285, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #925 = EH_SjLj_Setup
5493 { 924, 2, 1, 4, 0, 0, 1, PPCImpOpBase + 64, 469, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #924 = EH_SjLj_SetJmp64
5494 { 923, 2, 1, 4, 0, 0, 1, PPCImpOpBase + 63, 469, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #923 = EH_SjLj_SetJmp32
5495 { 922, 1, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 468, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #922 = EH_SjLj_LongJmp64
5496 { 921, 1, 0, 4, 0, 0, 0, PPCImpOpBase + 0, 468, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #921 = EH_SjLj_LongJmp32
5497 { 920, 3, 1, 4, 16, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #920 = EFSTSTLT
5498 { 919, 3, 1, 4, 16, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #919 = EFSTSTGT
5499 { 918, 3, 1, 4, 16, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #918 = EFSTSTEQ
5500 { 917, 3, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 222, 0, 0x0ULL }, // Inst #917 = EFSSUB
5501 { 916, 2, 1, 4, 12, 0, 0, PPCImpOpBase + 0, 259, 0, 0x0ULL }, // Inst #916 = EFSNEG
5502 { 915, 2, 1, 4, 12, 0, 0, PPCImpOpBase + 0, 259, 0, 0x0ULL }, // Inst #915 = EFSNABS
5503 { 914, 3, 1, 4, 12, 0, 0, PPCImpOpBase + 0, 222, 0, 0x0ULL }, // Inst #914 = EFSMUL
5504 { 913, 3, 1, 4, 21, 0, 0, PPCImpOpBase + 0, 222, 0, 0x0ULL }, // Inst #913 = EFSDIV
5505 { 912, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 259, 0, 0x0ULL }, // Inst #912 = EFSCTUIZ
5506 { 911, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #911 = EFSCTUI
5507 { 910, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 461, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #910 = EFSCTUF
5508 { 909, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 259, 0, 0x0ULL }, // Inst #909 = EFSCTSIZ
5509 { 908, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #908 = EFSCTSI
5510 { 907, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #907 = EFSCTSF
5511 { 906, 3, 1, 4, 16, 0, 0, PPCImpOpBase + 0, 317, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #906 = EFSCMPLT
5512 { 905, 3, 1, 4, 16, 0, 0, PPCImpOpBase + 0, 317, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #905 = EFSCMPGT
5513 { 904, 3, 1, 4, 16, 0, 0, PPCImpOpBase + 0, 317, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #904 = EFSCMPEQ
5514 { 903, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 259, 0, 0x0ULL }, // Inst #903 = EFSCFUI
5515 { 902, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #902 = EFSCFUF
5516 { 901, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 259, 0, 0x0ULL }, // Inst #901 = EFSCFSI
5517 { 900, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #900 = EFSCFSF
5518 { 899, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 466, 0, 0x0ULL }, // Inst #899 = EFSCFD
5519 { 898, 3, 1, 4, 20, 0, 0, PPCImpOpBase + 0, 222, 0, 0x0ULL }, // Inst #898 = EFSADD
5520 { 897, 2, 1, 4, 22, 0, 0, PPCImpOpBase + 0, 259, 0, 0x0ULL }, // Inst #897 = EFSABS
5521 { 896, 3, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #896 = EFDTSTLT
5522 { 895, 3, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #895 = EFDTSTGT
5523 { 894, 3, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #894 = EFDTSTEQ
5524 { 893, 3, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 458, 0, 0x0ULL }, // Inst #893 = EFDSUB
5525 { 892, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 456, 0, 0x0ULL }, // Inst #892 = EFDNEG
5526 { 891, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 456, 0, 0x0ULL }, // Inst #891 = EFDNABS
5527 { 890, 3, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 458, 0, 0x0ULL }, // Inst #890 = EFDMUL
5528 { 889, 3, 1, 4, 21, 0, 0, PPCImpOpBase + 0, 458, 0, 0x0ULL }, // Inst #889 = EFDDIV
5529 { 888, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 466, 0, 0x0ULL }, // Inst #888 = EFDCTUIZ
5530 { 887, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #887 = EFDCTUIDZ
5531 { 886, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #886 = EFDCTUI
5532 { 885, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 461, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #885 = EFDCTUF
5533 { 884, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 466, 0, 0x0ULL }, // Inst #884 = EFDCTSIZ
5534 { 883, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #883 = EFDCTSIDZ
5535 { 882, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 466, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #882 = EFDCTSI
5536 { 881, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 461, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #881 = EFDCTSF
5537 { 880, 3, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #880 = EFDCMPLT
5538 { 879, 3, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #879 = EFDCMPGT
5539 { 878, 3, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 463, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #878 = EFDCMPEQ
5540 { 877, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 461, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #877 = EFDCFUID
5541 { 876, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 461, 0, 0x0ULL }, // Inst #876 = EFDCFUI
5542 { 875, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 461, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #875 = EFDCFUF
5543 { 874, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 461, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #874 = EFDCFSID
5544 { 873, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 461, 0, 0x0ULL }, // Inst #873 = EFDCFSI
5545 { 872, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 461, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #872 = EFDCFSF
5546 { 871, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 461, 0, 0x0ULL }, // Inst #871 = EFDCFS
5547 { 870, 3, 1, 4, 20, 0, 0, PPCImpOpBase + 0, 458, 0, 0x0ULL }, // Inst #870 = EFDADD
5548 { 869, 2, 1, 4, 19, 0, 0, PPCImpOpBase + 0, 456, 0, 0x0ULL }, // Inst #869 = EFDABS
5549 { 868, 2, 1, 4, 0, 1, 1, PPCImpOpBase + 105, 454, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #868 = DecreaseCTRloop
5550 { 867, 2, 1, 4, 0, 1, 1, PPCImpOpBase + 107, 454, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #867 = DecreaseCTR8loop
5551 { 866, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 451, 0, 0x0ULL }, // Inst #866 = DYNAREAOFFSET8
5552 { 865, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 451, 0, 0x0ULL }, // Inst #865 = DYNAREAOFFSET
5553 { 864, 4, 1, 4, 0, 1, 1, PPCImpOpBase + 132, 447, 0, 0x0ULL }, // Inst #864 = DYNALLOC8
5554 { 863, 4, 1, 4, 0, 1, 1, PPCImpOpBase + 61, 443, 0, 0x0ULL }, // Inst #863 = DYNALLOC
5555 { 862, 2, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 345, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #862 = DXEX_rec
5556 { 861, 2, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 357, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #861 = DXEXQ_rec
5557 { 860, 2, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 357, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #860 = DXEXQ
5558 { 859, 2, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 345, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #859 = DXEX
5559 { 858, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 440, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #858 = DTSTSFQ
5560 { 857, 3, 1, 4, 16, 0, 0, PPCImpOpBase + 0, 437, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #857 = DTSTSFIQ
5561 { 856, 3, 1, 4, 16, 0, 0, PPCImpOpBase + 0, 434, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #856 = DTSTSFI
5562 { 855, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 351, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #855 = DTSTSF
5563 { 854, 3, 1, 4, 248, 0, 0, PPCImpOpBase + 0, 354, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #854 = DTSTEXQ
5564 { 853, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 351, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #853 = DTSTEX
5565 { 852, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 431, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #852 = DTSTDGQ
5566 { 851, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 428, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #851 = DTSTDG
5567 { 850, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 431, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #850 = DTSTDCQ
5568 { 849, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 428, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #849 = DTSTDC
5569 { 848, 3, 1, 4, 245, 0, 1, PPCImpOpBase + 131, 336, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #848 = DSUB_rec
5570 { 847, 3, 1, 4, 250, 0, 1, PPCImpOpBase + 131, 339, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #847 = DSUBQ_rec
5571 { 846, 3, 1, 4, 250, 0, 0, PPCImpOpBase + 0, 339, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #846 = DSUBQ
5572 { 845, 3, 1, 4, 245, 0, 0, PPCImpOpBase + 0, 336, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #845 = DSUB
5573 { 844, 3, 0, 4, 526, 0, 0, PPCImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #844 = DSTT64
5574 { 843, 3, 0, 4, 526, 0, 0, PPCImpOpBase + 0, 422, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #843 = DSTT
5575 { 842, 3, 0, 4, 526, 0, 0, PPCImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #842 = DSTSTT64
5576 { 841, 3, 0, 4, 526, 0, 0, PPCImpOpBase + 0, 422, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #841 = DSTSTT
5577 { 840, 3, 0, 4, 526, 0, 0, PPCImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #840 = DSTST64
5578 { 839, 3, 0, 4, 526, 0, 0, PPCImpOpBase + 0, 422, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #839 = DSTST
5579 { 838, 3, 0, 4, 526, 0, 0, PPCImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #838 = DST64
5580 { 837, 3, 0, 4, 526, 0, 0, PPCImpOpBase + 0, 422, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #837 = DST
5581 { 836, 0, 0, 4, 496, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #836 = DSSALL
5582 { 835, 1, 0, 4, 496, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #835 = DSS
5583 { 834, 3, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 416, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #834 = DSCRI_rec
5584 { 833, 3, 1, 4, 247, 0, 1, PPCImpOpBase + 131, 419, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #833 = DSCRIQ_rec
5585 { 832, 3, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 419, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #832 = DSCRIQ
5586 { 831, 3, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 416, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #831 = DSCRI
5587 { 830, 3, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 416, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #830 = DSCLI_rec
5588 { 829, 3, 1, 4, 247, 0, 1, PPCImpOpBase + 131, 419, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #829 = DSCLIQ_rec
5589 { 828, 3, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 419, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #828 = DSCLIQ
5590 { 827, 3, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 416, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #827 = DSCLI
5591 { 826, 2, 1, 4, 252, 0, 1, PPCImpOpBase + 131, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #826 = DRSP_rec
5592 { 825, 2, 1, 4, 252, 0, 0, PPCImpOpBase + 0, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #825 = DRSP
5593 { 824, 4, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 394, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #824 = DRRND_rec
5594 { 823, 4, 1, 4, 247, 0, 1, PPCImpOpBase + 131, 412, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #823 = DRRNDQ_rec
5595 { 822, 4, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 412, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #822 = DRRNDQ
5596 { 821, 4, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 394, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #821 = DRRND
5597 { 820, 4, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 398, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #820 = DRINTX_rec
5598 { 819, 4, 1, 4, 247, 0, 1, PPCImpOpBase + 131, 402, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #819 = DRINTXQ_rec
5599 { 818, 4, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 402, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #818 = DRINTXQ
5600 { 817, 4, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 398, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #817 = DRINTX
5601 { 816, 4, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 398, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #816 = DRINTN_rec
5602 { 815, 4, 1, 4, 247, 0, 1, PPCImpOpBase + 131, 402, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #815 = DRINTNQ_rec
5603 { 814, 4, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 402, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #814 = DRINTNQ
5604 { 813, 4, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 398, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #813 = DRINTN
5605 { 812, 2, 1, 4, 12, 0, 1, PPCImpOpBase + 131, 410, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #812 = DRDPQ_rec
5606 { 811, 2, 1, 4, 12, 0, 0, PPCImpOpBase + 0, 410, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #811 = DRDPQ
5607 { 810, 4, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 394, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #810 = DQUA_rec
5608 { 809, 4, 1, 4, 251, 0, 1, PPCImpOpBase + 131, 406, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #809 = DQUAQ_rec
5609 { 808, 4, 1, 4, 251, 0, 0, PPCImpOpBase + 0, 406, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #808 = DQUAQ
5610 { 807, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 398, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #807 = DQUAI_rec
5611 { 806, 4, 1, 4, 247, 0, 1, PPCImpOpBase + 0, 402, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #806 = DQUAIQ_rec
5612 { 805, 4, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 402, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #805 = DQUAIQ
5613 { 804, 4, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 398, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #804 = DQUAI
5614 { 803, 4, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 394, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #803 = DQUA
5615 { 802, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 391, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #802 = DMXXINSTFDMR512_HI
5616 { 801, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 388, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #801 = DMXXINSTFDMR512
5617 { 800, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 385, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #800 = DMXXINSTFDMR256
5618 { 799, 3, 2, 4, 0, 0, 0, PPCImpOpBase + 0, 382, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #799 = DMXXEXTFDMR512_HI
5619 { 798, 3, 2, 4, 0, 0, 0, PPCImpOpBase + 0, 379, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #798 = DMXXEXTFDMR512
5620 { 797, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 376, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #797 = DMXXEXTFDMR256
5621 { 796, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 373, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #796 = DMXOR
5622 { 795, 3, 1, 4, 255, 0, 1, PPCImpOpBase + 131, 336, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #795 = DMUL_rec
5623 { 794, 3, 1, 4, 256, 0, 1, PPCImpOpBase + 131, 339, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #794 = DMULQ_rec
5624 { 793, 3, 1, 4, 256, 0, 0, PPCImpOpBase + 0, 339, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #793 = DMULQ
5625 { 792, 3, 1, 4, 255, 0, 0, PPCImpOpBase + 0, 336, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #792 = DMUL
5626 { 791, 1, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 372, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #791 = DMSETDMRZ
5627 { 790, 2, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 370, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #790 = DMMR
5628 { 789, 3, 1, 4, 389, 0, 1, PPCImpOpBase + 0, 222, 0, 0xdULL }, // Inst #789 = DIVW_rec
5629 { 788, 3, 1, 4, 389, 0, 1, PPCImpOpBase + 0, 222, 0, 0xdULL }, // Inst #788 = DIVWU_rec
5630 { 787, 3, 1, 4, 389, 0, 2, PPCImpOpBase + 3, 222, 0, 0x8ULL }, // Inst #787 = DIVWUO_rec
5631 { 786, 3, 1, 4, 383, 0, 1, PPCImpOpBase + 2, 222, 0, 0x8ULL }, // Inst #786 = DIVWUO
5632 { 785, 3, 1, 4, 209, 0, 0, PPCImpOpBase + 0, 222, 0, 0x8ULL }, // Inst #785 = DIVWU
5633 { 784, 3, 1, 4, 389, 0, 2, PPCImpOpBase + 3, 222, 0, 0x8ULL }, // Inst #784 = DIVWO_rec
5634 { 783, 3, 1, 4, 383, 0, 1, PPCImpOpBase + 2, 222, 0, 0x8ULL }, // Inst #783 = DIVWO
5635 { 782, 3, 1, 4, 154, 0, 1, PPCImpOpBase + 0, 222, 0, 0xdULL }, // Inst #782 = DIVWE_rec
5636 { 781, 3, 1, 4, 154, 0, 1, PPCImpOpBase + 0, 222, 0, 0xdULL }, // Inst #781 = DIVWEU_rec
5637 { 780, 3, 1, 4, 154, 0, 2, PPCImpOpBase + 3, 222, 0, 0x8ULL }, // Inst #780 = DIVWEUO_rec
5638 { 779, 3, 1, 4, 385, 0, 1, PPCImpOpBase + 2, 222, 0, 0x8ULL }, // Inst #779 = DIVWEUO
5639 { 778, 3, 1, 4, 211, 0, 0, PPCImpOpBase + 0, 222, 0, 0x8ULL }, // Inst #778 = DIVWEU
5640 { 777, 3, 1, 4, 154, 0, 2, PPCImpOpBase + 3, 222, 0, 0x8ULL }, // Inst #777 = DIVWEO_rec
5641 { 776, 3, 1, 4, 385, 0, 1, PPCImpOpBase + 2, 222, 0, 0x8ULL }, // Inst #776 = DIVWEO
5642 { 775, 3, 1, 4, 211, 0, 0, PPCImpOpBase + 0, 222, 0, 0x8ULL }, // Inst #775 = DIVWE
5643 { 774, 3, 1, 4, 209, 0, 0, PPCImpOpBase + 0, 222, 0, 0x8ULL }, // Inst #774 = DIVW
5644 { 773, 3, 1, 4, 155, 0, 1, PPCImpOpBase + 0, 228, 0, 0xdULL }, // Inst #773 = DIVD_rec
5645 { 772, 3, 1, 4, 155, 0, 1, PPCImpOpBase + 0, 228, 0, 0xdULL }, // Inst #772 = DIVDU_rec
5646 { 771, 3, 1, 4, 155, 0, 2, PPCImpOpBase + 3, 228, 0, 0x8ULL }, // Inst #771 = DIVDUO_rec
5647 { 770, 3, 1, 4, 386, 0, 1, PPCImpOpBase + 2, 228, 0, 0x8ULL }, // Inst #770 = DIVDUO
5648 { 769, 3, 1, 4, 210, 0, 0, PPCImpOpBase + 0, 228, 0, 0x8ULL }, // Inst #769 = DIVDU
5649 { 768, 3, 1, 4, 155, 0, 2, PPCImpOpBase + 3, 228, 0, 0x8ULL }, // Inst #768 = DIVDO_rec
5650 { 767, 3, 1, 4, 386, 0, 1, PPCImpOpBase + 2, 228, 0, 0x8ULL }, // Inst #767 = DIVDO
5651 { 766, 3, 1, 4, 153, 0, 1, PPCImpOpBase + 0, 228, 0, 0xdULL }, // Inst #766 = DIVDE_rec
5652 { 765, 3, 1, 4, 153, 0, 1, PPCImpOpBase + 0, 228, 0, 0xdULL }, // Inst #765 = DIVDEU_rec
5653 { 764, 3, 1, 4, 153, 0, 2, PPCImpOpBase + 3, 228, 0, 0x8ULL }, // Inst #764 = DIVDEUO_rec
5654 { 763, 3, 1, 4, 388, 0, 1, PPCImpOpBase + 2, 228, 0, 0x8ULL }, // Inst #763 = DIVDEUO
5655 { 762, 3, 1, 4, 388, 0, 0, PPCImpOpBase + 0, 228, 0, 0x8ULL }, // Inst #762 = DIVDEU
5656 { 761, 3, 1, 4, 153, 0, 2, PPCImpOpBase + 3, 228, 0, 0x8ULL }, // Inst #761 = DIVDEO_rec
5657 { 760, 3, 1, 4, 388, 0, 1, PPCImpOpBase + 2, 228, 0, 0x8ULL }, // Inst #760 = DIVDEO
5658 { 759, 3, 1, 4, 388, 0, 0, PPCImpOpBase + 0, 228, 0, 0x8ULL }, // Inst #759 = DIVDE
5659 { 758, 3, 1, 4, 210, 0, 0, PPCImpOpBase + 0, 228, 0, 0x8ULL }, // Inst #758 = DIVD
5660 { 757, 3, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 336, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #757 = DIEX_rec
5661 { 756, 3, 1, 4, 247, 0, 1, PPCImpOpBase + 131, 367, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #756 = DIEXQ_rec
5662 { 755, 3, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 367, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #755 = DIEXQ
5663 { 754, 3, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 336, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #754 = DIEX
5664 { 753, 3, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 361, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #753 = DENBCD_rec
5665 { 752, 3, 1, 4, 247, 0, 1, PPCImpOpBase + 131, 364, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #752 = DENBCDQ_rec
5666 { 751, 3, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 364, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #751 = DENBCDQ
5667 { 750, 3, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 361, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #750 = DENBCD
5668 { 749, 3, 1, 4, 257, 0, 1, PPCImpOpBase + 131, 336, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #749 = DDIV_rec
5669 { 748, 3, 1, 4, 258, 0, 1, PPCImpOpBase + 131, 339, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #748 = DDIVQ_rec
5670 { 747, 3, 1, 4, 258, 0, 0, PPCImpOpBase + 0, 339, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #747 = DDIVQ
5671 { 746, 3, 1, 4, 257, 0, 0, PPCImpOpBase + 0, 336, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #746 = DDIV
5672 { 745, 3, 1, 4, 244, 0, 1, PPCImpOpBase + 131, 361, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #745 = DDEDPD_rec
5673 { 744, 3, 1, 4, 247, 0, 1, PPCImpOpBase + 131, 364, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #744 = DDEDPDQ_rec
5674 { 743, 3, 1, 4, 247, 0, 0, PPCImpOpBase + 0, 364, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #743 = DDEDPDQ
5675 { 742, 3, 1, 4, 244, 0, 0, PPCImpOpBase + 0, 361, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #742 = DDEDPD
5676 { 741, 2, 1, 4, 249, 0, 1, PPCImpOpBase + 131, 347, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #741 = DCTQPQ_rec
5677 { 740, 2, 1, 4, 249, 0, 0, PPCImpOpBase + 0, 347, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #740 = DCTQPQ
5678 { 739, 2, 1, 4, 252, 0, 1, PPCImpOpBase + 131, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #739 = DCTFIX_rec
5679 { 738, 2, 1, 4, 12, 0, 1, PPCImpOpBase + 131, 357, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #738 = DCTFIXQ_rec
5680 { 737, 2, 1, 4, 12, 0, 0, PPCImpOpBase + 0, 359, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #737 = DCTFIXQQ
5681 { 736, 2, 1, 4, 12, 0, 0, PPCImpOpBase + 0, 357, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #736 = DCTFIXQ
5682 { 735, 2, 1, 4, 252, 0, 0, PPCImpOpBase + 0, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #735 = DCTFIX
5683 { 734, 2, 1, 4, 245, 0, 1, PPCImpOpBase + 131, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #734 = DCTDP_rec
5684 { 733, 2, 1, 4, 245, 0, 0, PPCImpOpBase + 0, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #733 = DCTDP
5685 { 732, 3, 1, 4, 248, 0, 0, PPCImpOpBase + 0, 354, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #732 = DCMPUQ
5686 { 731, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 351, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #731 = DCMPU
5687 { 730, 3, 1, 4, 248, 0, 0, PPCImpOpBase + 0, 354, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #730 = DCMPOQ
5688 { 729, 3, 1, 4, 243, 0, 0, PPCImpOpBase + 0, 351, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #729 = DCMPO
5689 { 728, 2, 1, 4, 253, 0, 1, PPCImpOpBase + 131, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #728 = DCFFIX_rec
5690 { 727, 2, 1, 4, 254, 0, 1, PPCImpOpBase + 131, 347, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #727 = DCFFIXQ_rec
5691 { 726, 2, 1, 4, 12, 0, 0, PPCImpOpBase + 0, 349, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #726 = DCFFIXQQ
5692 { 725, 2, 1, 4, 254, 0, 0, PPCImpOpBase + 0, 347, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #725 = DCFFIXQ
5693 { 724, 2, 1, 4, 253, 0, 0, PPCImpOpBase + 0, 345, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #724 = DCFFIX
5694 { 723, 2, 0, 4, 618, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #723 = DCCCI
5695 { 722, 2, 0, 4, 336, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #722 = DCBZLEP
5696 { 721, 2, 0, 4, 617, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #721 = DCBZL
5697 { 720, 2, 0, 4, 336, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #720 = DCBZEP
5698 { 719, 2, 0, 4, 605, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #719 = DCBZ
5699 { 718, 3, 0, 4, 336, 0, 0, PPCImpOpBase + 0, 189, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #718 = DCBTSTEP
5700 { 717, 3, 0, 4, 548, 0, 0, PPCImpOpBase + 0, 342, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2ULL }, // Inst #717 = DCBTST
5701 { 716, 3, 0, 4, 336, 0, 0, PPCImpOpBase + 0, 189, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #716 = DCBTEP
5702 { 715, 3, 0, 4, 548, 0, 0, PPCImpOpBase + 0, 342, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2ULL }, // Inst #715 = DCBT
5703 { 714, 2, 0, 4, 336, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #714 = DCBSTEP
5704 { 713, 2, 0, 4, 605, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #713 = DCBST
5705 { 712, 2, 0, 4, 426, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #712 = DCBI
5706 { 711, 2, 0, 4, 336, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #711 = DCBFEP
5707 { 710, 3, 0, 4, 605, 0, 0, PPCImpOpBase + 0, 342, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2ULL }, // Inst #710 = DCBF
5708 { 709, 2, 0, 4, 426, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #709 = DCBA
5709 { 708, 2, 1, 4, 342, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #708 = DARN
5710 { 707, 3, 1, 4, 245, 0, 1, PPCImpOpBase + 131, 336, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #707 = DADD_rec
5711 { 706, 3, 1, 4, 250, 0, 1, PPCImpOpBase + 131, 339, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #706 = DADDQ_rec
5712 { 705, 3, 1, 4, 250, 0, 0, PPCImpOpBase + 0, 339, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #705 = DADDQ
5713 { 704, 3, 1, 4, 245, 0, 0, PPCImpOpBase + 0, 336, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #704 = DADD
5714 { 703, 3, 0, 4, 446, 0, 0, PPCImpOpBase + 0, 288, 0|(1ULL<<MCID::Branch), 0x38ULL }, // Inst #703 = CTRL_DEP
5715 { 702, 3, 1, 4, 304, 0, 0, PPCImpOpBase + 0, 331, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #702 = CRXOR
5716 { 701, 1, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #701 = CRUNSET
5717 { 700, 1, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 296, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #700 = CRSET
5718 { 699, 3, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 331, 0, 0x0ULL }, // Inst #699 = CRORC
5719 { 698, 3, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 331, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #698 = CROR
5720 { 697, 2, 1, 4, 107, 0, 0, PPCImpOpBase + 0, 334, 0, 0x0ULL }, // Inst #697 = CRNOT
5721 { 696, 3, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 331, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #696 = CRNOR
5722 { 695, 3, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 331, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #695 = CRNAND
5723 { 694, 3, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 331, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #694 = CREQV
5724 { 693, 3, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 331, 0, 0x0ULL }, // Inst #693 = CRANDC
5725 { 692, 3, 1, 4, 525, 0, 0, PPCImpOpBase + 0, 331, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #692 = CRAND
5726 { 691, 0, 0, 4, 525, 0, 1, PPCImpOpBase + 130, 1, 0, 0x0ULL }, // Inst #691 = CR6UNSET
5727 { 690, 0, 0, 4, 525, 0, 1, PPCImpOpBase + 130, 1, 0, 0x0ULL }, // Inst #690 = CR6SET
5728 { 689, 3, 0, 4, 358, 0, 1, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #689 = CP_PASTE_rec
5729 { 688, 3, 0, 4, 358, 0, 0, PPCImpOpBase + 0, 181, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #688 = CP_PASTE8_rec
5730 { 687, 3, 0, 4, 337, 0, 0, PPCImpOpBase + 0, 181, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #687 = CP_COPY8
5731 { 686, 3, 0, 4, 337, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #686 = CP_COPY
5732 { 685, 0, 0, 4, 341, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #685 = CP_ABORT
5733 { 684, 2, 1, 4, 279, 0, 1, PPCImpOpBase + 0, 259, 0, 0x208ULL }, // Inst #684 = CNTTZW_rec
5734 { 683, 2, 1, 4, 279, 0, 1, PPCImpOpBase + 0, 261, 0, 0x308ULL }, // Inst #683 = CNTTZW8_rec
5735 { 682, 2, 1, 4, 279, 0, 0, PPCImpOpBase + 0, 261, 0, 0x308ULL }, // Inst #682 = CNTTZW8
5736 { 681, 2, 1, 4, 279, 0, 0, PPCImpOpBase + 0, 259, 0, 0x208ULL }, // Inst #681 = CNTTZW
5737 { 680, 2, 1, 4, 279, 0, 1, PPCImpOpBase + 0, 261, 0, 0x308ULL }, // Inst #680 = CNTTZD_rec
5738 { 679, 3, 1, 4, 148, 0, 0, PPCImpOpBase + 0, 228, 0, 0x0ULL }, // Inst #679 = CNTTZDM
5739 { 678, 2, 1, 4, 279, 0, 0, PPCImpOpBase + 0, 261, 0, 0x308ULL }, // Inst #678 = CNTTZD
5740 { 677, 2, 1, 4, 205, 0, 1, PPCImpOpBase + 0, 259, 0, 0x208ULL }, // Inst #677 = CNTLZW_rec
5741 { 676, 2, 1, 4, 205, 0, 1, PPCImpOpBase + 0, 261, 0, 0x308ULL }, // Inst #676 = CNTLZW8_rec
5742 { 675, 2, 1, 4, 205, 0, 0, PPCImpOpBase + 0, 261, 0, 0x308ULL }, // Inst #675 = CNTLZW8
5743 { 674, 2, 1, 4, 205, 0, 0, PPCImpOpBase + 0, 259, 0, 0x208ULL }, // Inst #674 = CNTLZW
5744 { 673, 2, 1, 4, 205, 0, 1, PPCImpOpBase + 0, 261, 0, 0x308ULL }, // Inst #673 = CNTLZD_rec
5745 { 672, 3, 1, 4, 148, 0, 0, PPCImpOpBase + 0, 228, 0, 0x0ULL }, // Inst #672 = CNTLZDM
5746 { 671, 2, 1, 4, 205, 0, 0, PPCImpOpBase + 0, 261, 0, 0x308ULL }, // Inst #671 = CNTLZD
5747 { 670, 3, 1, 4, 505, 0, 0, PPCImpOpBase + 0, 320, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #670 = CMPWI
5748 { 669, 3, 1, 4, 140, 0, 0, PPCImpOpBase + 0, 317, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #669 = CMPW
5749 { 668, 4, 1, 4, 274, 0, 0, PPCImpOpBase + 0, 327, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #668 = CMPRB8
5750 { 667, 4, 1, 4, 274, 0, 0, PPCImpOpBase + 0, 323, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #667 = CMPRB
5751 { 666, 3, 1, 4, 505, 0, 0, PPCImpOpBase + 0, 320, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #666 = CMPLWI
5752 { 665, 3, 1, 4, 140, 0, 0, PPCImpOpBase + 0, 317, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #665 = CMPLW
5753 { 664, 3, 1, 4, 505, 0, 0, PPCImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #664 = CMPLDI
5754 { 663, 3, 1, 4, 140, 0, 0, PPCImpOpBase + 0, 311, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #663 = CMPLD
5755 { 662, 3, 1, 4, 274, 0, 0, PPCImpOpBase + 0, 311, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #662 = CMPEQB
5756 { 661, 3, 1, 4, 505, 0, 0, PPCImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #661 = CMPDI
5757 { 660, 3, 1, 4, 140, 0, 0, PPCImpOpBase + 0, 311, 0|(1ULL<<MCID::Compare), 0x8ULL }, // Inst #660 = CMPD
5758 { 659, 3, 1, 4, 524, 0, 0, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #659 = CMPB8
5759 { 658, 3, 1, 4, 524, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #658 = CMPB
5760 { 657, 0, 0, 4, 619, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2ULL }, // Inst #657 = CLRBHRB
5761 { 656, 3, 1, 4, 449, 0, 0, PPCImpOpBase + 0, 228, 0, 0x0ULL }, // Inst #656 = CFUGED
5762 { 655, 2, 1, 4, 469, 0, 0, PPCImpOpBase + 0, 261, 0, 0x8ULL }, // Inst #655 = CDTBCD8
5763 { 654, 2, 1, 4, 469, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #654 = CDTBCD
5764 { 653, 2, 1, 4, 469, 0, 0, PPCImpOpBase + 0, 261, 0, 0x8ULL }, // Inst #653 = CBCDTD8
5765 { 652, 2, 1, 4, 469, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #652 = CBCDTD
5766 { 651, 2, 1, 4, 577, 0, 0, PPCImpOpBase + 0, 261, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #651 = BRW8
5767 { 650, 2, 1, 4, 577, 0, 0, PPCImpOpBase + 0, 259, 0, 0x0ULL }, // Inst #650 = BRW
5768 { 649, 3, 1, 4, 405, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #649 = BRINC
5769 { 648, 2, 1, 4, 577, 0, 0, PPCImpOpBase + 0, 261, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #648 = BRH8
5770 { 647, 2, 1, 4, 577, 0, 0, PPCImpOpBase + 0, 259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #647 = BRH
5771 { 646, 2, 1, 4, 577, 0, 0, PPCImpOpBase + 0, 261, 0, 0x0ULL }, // Inst #646 = BRD
5772 { 645, 3, 1, 4, 281, 0, 0, PPCImpOpBase + 0, 228, 0, 0x8ULL }, // Inst #645 = BPERMD
5773 { 644, 2, 0, 4, 242, 1, 1, PPCImpOpBase + 71, 13, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #644 = BL_TLS
5774 { 643, 1, 0, 4, 242, 1, 2, PPCImpOpBase + 125, 285, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #643 = BL_RM
5775 { 642, 1, 0, 8, 242, 1, 2, PPCImpOpBase + 125, 285, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #642 = BL_NOP_RM
5776 { 641, 1, 0, 8, 242, 1, 1, PPCImpOpBase + 71, 285, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #641 = BL_NOP
5777 { 640, 0, 0, 4, 445, 2, 1, PPCImpOpBase + 75, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #640 = BLRL
5778 { 639, 0, 0, 4, 445, 2, 0, PPCImpOpBase + 128, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #639 = BLR8
5779 { 638, 0, 0, 4, 445, 2, 0, PPCImpOpBase + 73, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #638 = BLR
5780 { 637, 1, 0, 4, 242, 1, 2, PPCImpOpBase + 125, 0, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #637 = BLA_RM
5781 { 636, 1, 0, 4, 242, 1, 2, PPCImpOpBase + 122, 0, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #636 = BLA8_RM
5782 { 635, 1, 0, 8, 242, 1, 2, PPCImpOpBase + 122, 0, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #635 = BLA8_NOP_RM
5783 { 634, 1, 0, 8, 242, 1, 1, PPCImpOpBase + 120, 0, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #634 = BLA8_NOP
5784 { 633, 1, 0, 4, 242, 1, 1, PPCImpOpBase + 120, 0, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #633 = BLA8
5785 { 632, 1, 0, 4, 242, 1, 1, PPCImpOpBase + 71, 0, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #632 = BLA
5786 { 631, 2, 0, 4, 242, 1, 1, PPCImpOpBase + 120, 13, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #631 = BL8_TLS_
5787 { 630, 2, 0, 4, 242, 1, 1, PPCImpOpBase + 120, 13, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #630 = BL8_TLS
5788 { 629, 1, 0, 4, 242, 1, 2, PPCImpOpBase + 122, 285, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #629 = BL8_RM
5789 { 628, 2, 0, 4, 101, 1, 1, PPCImpOpBase + 120, 13, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #628 = BL8_NOTOC_TLS
5790 { 627, 1, 0, 4, 101, 1, 2, PPCImpOpBase + 122, 285, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #627 = BL8_NOTOC_RM
5791 { 626, 1, 0, 4, 101, 1, 1, PPCImpOpBase + 120, 285, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #626 = BL8_NOTOC
5792 { 625, 2, 0, 8, 242, 1, 1, PPCImpOpBase + 120, 13, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #625 = BL8_NOP_TLS
5793 { 624, 1, 0, 8, 242, 1, 2, PPCImpOpBase + 122, 285, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #624 = BL8_NOP_RM
5794 { 623, 1, 0, 8, 242, 1, 1, PPCImpOpBase + 120, 285, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #623 = BL8_NOP
5795 { 622, 1, 0, 4, 242, 1, 1, PPCImpOpBase + 120, 285, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #622 = BL8
5796 { 621, 1, 0, 4, 242, 1, 1, PPCImpOpBase + 71, 285, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #621 = BL
5797 { 620, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 285, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #620 = BDZp
5798 { 619, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 285, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #619 = BDZm
5799 { 618, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 285, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #618 = BDZLp
5800 { 617, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 285, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #617 = BDZLm
5801 { 616, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #616 = BDZLRp
5802 { 615, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #615 = BDZLRm
5803 { 614, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #614 = BDZLRLp
5804 { 613, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #613 = BDZLRLm
5805 { 612, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #612 = BDZLRL
5806 { 611, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 116, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #611 = BDZLR8
5807 { 610, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #610 = BDZLR
5808 { 609, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #609 = BDZLAp
5809 { 608, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #608 = BDZLAm
5810 { 607, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #607 = BDZLA
5811 { 606, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 285, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #606 = BDZL
5812 { 605, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #605 = BDZAp
5813 { 604, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #604 = BDZAm
5814 { 603, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #603 = BDZA
5815 { 602, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 107, 285, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #602 = BDZ8
5816 { 601, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 285, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #601 = BDZ
5817 { 600, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 285, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #600 = BDNZp
5818 { 599, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 285, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #599 = BDNZm
5819 { 598, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 285, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #598 = BDNZLp
5820 { 597, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 285, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #597 = BDNZLm
5821 { 596, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #596 = BDNZLRp
5822 { 595, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #595 = BDNZLRm
5823 { 594, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #594 = BDNZLRLp
5824 { 593, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #593 = BDNZLRLm
5825 { 592, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #592 = BDNZLRL
5826 { 591, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 116, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #591 = BDNZLR8
5827 { 590, 0, 0, 4, 445, 3, 1, PPCImpOpBase + 112, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #590 = BDNZLR
5828 { 589, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #589 = BDNZLAp
5829 { 588, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #588 = BDNZLAm
5830 { 587, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 0, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #587 = BDNZLA
5831 { 586, 1, 0, 4, 102, 2, 1, PPCImpOpBase + 109, 285, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #586 = BDNZL
5832 { 585, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #585 = BDNZAp
5833 { 584, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #584 = BDNZAm
5834 { 583, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #583 = BDNZA
5835 { 582, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 107, 285, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #582 = BDNZ8
5836 { 581, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 105, 285, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #581 = BDNZ
5837 { 580, 2, 0, 4, 102, 0, 0, PPCImpOpBase + 0, 286, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #580 = BCn
5838 { 579, 0, 0, 4, 102, 2, 2, PPCImpOpBase + 101, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::Predicable), 0x38ULL }, // Inst #579 = BCTRL_RM
5839 { 578, 2, 0, 8, 102, 2, 3, PPCImpOpBase + 96, 309, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #578 = BCTRL_LWZinto_toc_RM
5840 { 577, 2, 0, 8, 102, 2, 2, PPCImpOpBase + 92, 309, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #577 = BCTRL_LWZinto_toc
5841 { 576, 0, 0, 4, 102, 2, 2, PPCImpOpBase + 88, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::Predicable), 0x38ULL }, // Inst #576 = BCTRL8_RM
5842 { 575, 2, 0, 8, 102, 2, 3, PPCImpOpBase + 83, 309, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #575 = BCTRL8_LDinto_toc_RM
5843 { 574, 2, 0, 8, 102, 2, 2, PPCImpOpBase + 79, 309, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #574 = BCTRL8_LDinto_toc
5844 { 573, 0, 0, 4, 102, 2, 1, PPCImpOpBase + 68, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::Predicable), 0x38ULL }, // Inst #573 = BCTRL8
5845 { 572, 0, 0, 4, 102, 2, 1, PPCImpOpBase + 65, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::Predicable), 0x38ULL }, // Inst #572 = BCTRL
5846 { 571, 0, 0, 4, 102, 1, 0, PPCImpOpBase + 64, 1, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #571 = BCTR8
5847 { 570, 0, 0, 4, 102, 1, 0, PPCImpOpBase + 63, 1, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #570 = BCTR
5848 { 569, 2, 0, 4, 102, 1, 1, PPCImpOpBase + 71, 286, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #569 = BCLn
5849 { 568, 1, 0, 4, 102, 1, 1, PPCImpOpBase + 71, 285, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #568 = BCLalways
5850 { 567, 1, 0, 4, 445, 2, 0, PPCImpOpBase + 73, 296, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #567 = BCLRn
5851 { 566, 1, 0, 4, 445, 2, 1, PPCImpOpBase + 75, 296, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #566 = BCLRLn
5852 { 565, 1, 0, 4, 445, 2, 1, PPCImpOpBase + 75, 296, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #565 = BCLRL
5853 { 564, 1, 0, 4, 445, 2, 0, PPCImpOpBase + 73, 296, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #564 = BCLR
5854 { 563, 2, 0, 4, 102, 1, 1, PPCImpOpBase + 71, 286, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #563 = BCL
5855 { 562, 3, 1, 4, 465, 0, 1, PPCImpOpBase + 78, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #562 = BCDUTRUNC_rec
5856 { 561, 3, 1, 4, 465, 0, 1, PPCImpOpBase + 78, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #561 = BCDUS_rec
5857 { 560, 4, 1, 4, 465, 0, 1, PPCImpOpBase + 78, 297, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #560 = BCDTRUNC_rec
5858 { 559, 4, 1, 4, 465, 0, 1, PPCImpOpBase + 78, 297, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #559 = BCDS_rec
5859 { 558, 4, 1, 4, 246, 0, 1, PPCImpOpBase + 78, 297, 0, 0x0ULL }, // Inst #558 = BCDSUB_rec
5860 { 557, 4, 1, 4, 327, 0, 1, PPCImpOpBase + 78, 297, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #557 = BCDSR_rec
5861 { 556, 3, 1, 4, 463, 0, 1, PPCImpOpBase + 78, 301, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #556 = BCDSETSGN_rec
5862 { 555, 3, 1, 4, 463, 0, 1, PPCImpOpBase + 78, 301, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #555 = BCDCTZ_rec
5863 { 554, 2, 1, 4, 328, 0, 1, PPCImpOpBase + 78, 307, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #554 = BCDCTSQ_rec
5864 { 553, 2, 1, 4, 463, 0, 1, PPCImpOpBase + 78, 307, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #553 = BCDCTN_rec
5865 { 552, 3, 1, 4, 465, 0, 1, PPCImpOpBase + 78, 304, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #552 = BCDCPSGN_rec
5866 { 551, 3, 1, 4, 463, 0, 1, PPCImpOpBase + 78, 301, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #551 = BCDCFZ_rec
5867 { 550, 3, 1, 4, 330, 0, 1, PPCImpOpBase + 78, 301, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #550 = BCDCFSQ_rec
5868 { 549, 3, 1, 4, 463, 0, 1, PPCImpOpBase + 78, 301, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #549 = BCDCFN_rec
5869 { 548, 4, 1, 4, 246, 0, 1, PPCImpOpBase + 78, 297, 0, 0x0ULL }, // Inst #548 = BCDADD_rec
5870 { 547, 1, 0, 4, 445, 1, 0, PPCImpOpBase + 63, 296, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #547 = BCCTRn
5871 { 546, 1, 0, 4, 445, 2, 1, PPCImpOpBase + 65, 296, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #546 = BCCTRLn
5872 { 545, 1, 0, 4, 445, 2, 1, PPCImpOpBase + 68, 296, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #545 = BCCTRL8n
5873 { 544, 1, 0, 4, 445, 2, 1, PPCImpOpBase + 68, 296, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #544 = BCCTRL8
5874 { 543, 1, 0, 4, 445, 2, 1, PPCImpOpBase + 65, 296, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #543 = BCCTRL
5875 { 542, 1, 0, 4, 445, 1, 0, PPCImpOpBase + 64, 296, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #542 = BCCTR8n
5876 { 541, 1, 0, 4, 445, 1, 0, PPCImpOpBase + 64, 296, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #541 = BCCTR8
5877 { 540, 1, 0, 4, 445, 1, 0, PPCImpOpBase + 63, 296, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #540 = BCCTR
5878 { 539, 2, 0, 4, 445, 2, 1, PPCImpOpBase + 75, 294, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #539 = BCCLRL
5879 { 538, 2, 0, 4, 445, 2, 0, PPCImpOpBase + 73, 294, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #538 = BCCLR
5880 { 537, 3, 0, 4, 445, 1, 1, PPCImpOpBase + 71, 291, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #537 = BCCLA
5881 { 536, 3, 0, 4, 445, 1, 1, PPCImpOpBase + 71, 288, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #536 = BCCL
5882 { 535, 2, 0, 4, 445, 2, 1, PPCImpOpBase + 68, 294, 0|(1ULL<<MCID::Call), 0x38ULL }, // Inst #535 = BCCCTRL8
5883 { 534, 2, 0, 4, 445, 2, 1, PPCImpOpBase + 65, 294, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x38ULL }, // Inst #534 = BCCCTRL
5884 { 533, 2, 0, 4, 445, 1, 0, PPCImpOpBase + 64, 294, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #533 = BCCCTR8
5885 { 532, 2, 0, 4, 445, 1, 0, PPCImpOpBase + 63, 294, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #532 = BCCCTR
5886 { 531, 3, 0, 4, 445, 0, 0, PPCImpOpBase + 0, 291, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #531 = BCCA
5887 { 530, 3, 0, 4, 445, 0, 0, PPCImpOpBase + 0, 288, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #530 = BCC
5888 { 529, 2, 0, 4, 102, 0, 0, PPCImpOpBase + 0, 286, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #529 = BC
5889 { 528, 1, 0, 4, 242, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #528 = BA
5890 { 527, 1, 0, 4, 242, 0, 0, PPCImpOpBase + 0, 285, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x38ULL }, // Inst #527 = B
5891 { 526, 0, 0, 4, 616, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #526 = ATTN
5892 { 525, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #525 = ATOMIC_SWAP_I8
5893 { 524, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 281, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #524 = ATOMIC_SWAP_I64
5894 { 523, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #523 = ATOMIC_SWAP_I32
5895 { 522, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #522 = ATOMIC_SWAP_I16
5896 { 521, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #521 = ATOMIC_LOAD_XOR_I8
5897 { 520, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 281, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #520 = ATOMIC_LOAD_XOR_I64
5898 { 519, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #519 = ATOMIC_LOAD_XOR_I32
5899 { 518, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #518 = ATOMIC_LOAD_XOR_I16
5900 { 517, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #517 = ATOMIC_LOAD_UMIN_I8
5901 { 516, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 281, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #516 = ATOMIC_LOAD_UMIN_I64
5902 { 515, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #515 = ATOMIC_LOAD_UMIN_I32
5903 { 514, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #514 = ATOMIC_LOAD_UMIN_I16
5904 { 513, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #513 = ATOMIC_LOAD_UMAX_I8
5905 { 512, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 281, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #512 = ATOMIC_LOAD_UMAX_I64
5906 { 511, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #511 = ATOMIC_LOAD_UMAX_I32
5907 { 510, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #510 = ATOMIC_LOAD_UMAX_I16
5908 { 509, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #509 = ATOMIC_LOAD_SUB_I8
5909 { 508, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 281, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #508 = ATOMIC_LOAD_SUB_I64
5910 { 507, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #507 = ATOMIC_LOAD_SUB_I32
5911 { 506, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #506 = ATOMIC_LOAD_SUB_I16
5912 { 505, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #505 = ATOMIC_LOAD_OR_I8
5913 { 504, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 281, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #504 = ATOMIC_LOAD_OR_I64
5914 { 503, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #503 = ATOMIC_LOAD_OR_I32
5915 { 502, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #502 = ATOMIC_LOAD_OR_I16
5916 { 501, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #501 = ATOMIC_LOAD_NAND_I8
5917 { 500, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 281, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #500 = ATOMIC_LOAD_NAND_I64
5918 { 499, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #499 = ATOMIC_LOAD_NAND_I32
5919 { 498, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #498 = ATOMIC_LOAD_NAND_I16
5920 { 497, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #497 = ATOMIC_LOAD_MIN_I8
5921 { 496, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 281, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #496 = ATOMIC_LOAD_MIN_I64
5922 { 495, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #495 = ATOMIC_LOAD_MIN_I32
5923 { 494, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #494 = ATOMIC_LOAD_MIN_I16
5924 { 493, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #493 = ATOMIC_LOAD_MAX_I8
5925 { 492, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 281, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #492 = ATOMIC_LOAD_MAX_I64
5926 { 491, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #491 = ATOMIC_LOAD_MAX_I32
5927 { 490, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #490 = ATOMIC_LOAD_MAX_I16
5928 { 489, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #489 = ATOMIC_LOAD_AND_I8
5929 { 488, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 281, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #488 = ATOMIC_LOAD_AND_I64
5930 { 487, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #487 = ATOMIC_LOAD_AND_I32
5931 { 486, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #486 = ATOMIC_LOAD_AND_I16
5932 { 485, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #485 = ATOMIC_LOAD_ADD_I8
5933 { 484, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 281, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #484 = ATOMIC_LOAD_ADD_I64
5934 { 483, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #483 = ATOMIC_LOAD_ADD_I32
5935 { 482, 4, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 277, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #482 = ATOMIC_LOAD_ADD_I16
5936 { 481, 5, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 267, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #481 = ATOMIC_CMP_SWAP_I8
5937 { 480, 5, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 272, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #480 = ATOMIC_CMP_SWAP_I64
5938 { 479, 5, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 267, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #479 = ATOMIC_CMP_SWAP_I32
5939 { 478, 5, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 267, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #478 = ATOMIC_CMP_SWAP_I16
5940 { 477, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #477 = AND_rec
5941 { 476, 2, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 265, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #476 = ANDI_rec_1_GT_BIT8
5942 { 475, 2, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 263, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #475 = ANDI_rec_1_GT_BIT
5943 { 474, 2, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 265, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #474 = ANDI_rec_1_EQ_BIT8
5944 { 473, 2, 1, 4, 0, 0, 1, PPCImpOpBase + 0, 263, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #473 = ANDI_rec_1_EQ_BIT
5945 { 472, 3, 1, 4, 504, 0, 1, PPCImpOpBase + 0, 184, 0, 0x308ULL }, // Inst #472 = ANDI_rec
5946 { 471, 3, 1, 4, 504, 0, 1, PPCImpOpBase + 0, 184, 0, 0x208ULL }, // Inst #471 = ANDIS_rec
5947 { 470, 3, 1, 4, 502, 0, 1, PPCImpOpBase + 0, 181, 0, 0x208ULL }, // Inst #470 = ANDIS8_rec
5948 { 469, 3, 1, 4, 502, 0, 1, PPCImpOpBase + 0, 181, 0, 0x308ULL }, // Inst #469 = ANDI8_rec
5949 { 468, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 222, 0, 0x8ULL }, // Inst #468 = ANDC_rec
5950 { 467, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 228, 0, 0x8ULL }, // Inst #467 = ANDC8_rec
5951 { 466, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 228, 0, 0x8ULL }, // Inst #466 = ANDC8
5952 { 465, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 222, 0, 0x8ULL }, // Inst #465 = ANDC
5953 { 464, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #464 = AND8_rec
5954 { 463, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #463 = AND8
5955 { 462, 3, 1, 4, 198, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #462 = AND
5956 { 461, 2, 0, 4, 0, 1, 1, PPCImpOpBase + 61, 21, 0, 0x0ULL }, // Inst #461 = ADJCALLSTACKUP
5957 { 460, 2, 0, 4, 0, 1, 1, PPCImpOpBase + 61, 21, 0, 0x0ULL }, // Inst #460 = ADJCALLSTACKDOWN
5958 { 459, 2, 1, 4, 532, 1, 2, PPCImpOpBase + 22, 259, 0, 0x8ULL }, // Inst #459 = ADDZE_rec
5959 { 458, 2, 1, 4, 532, 1, 3, PPCImpOpBase + 18, 259, 0, 0x8ULL }, // Inst #458 = ADDZEO_rec
5960 { 457, 2, 1, 4, 502, 1, 2, PPCImpOpBase + 15, 259, 0, 0x8ULL }, // Inst #457 = ADDZEO
5961 { 456, 2, 1, 4, 532, 1, 2, PPCImpOpBase + 22, 261, 0, 0x8ULL }, // Inst #456 = ADDZE8_rec
5962 { 455, 2, 1, 4, 532, 1, 3, PPCImpOpBase + 18, 261, 0, 0x8ULL }, // Inst #455 = ADDZE8O_rec
5963 { 454, 2, 1, 4, 502, 1, 2, PPCImpOpBase + 15, 261, 0, 0x8ULL }, // Inst #454 = ADDZE8O
5964 { 453, 2, 1, 4, 503, 1, 1, PPCImpOpBase + 13, 261, 0, 0x8ULL }, // Inst #453 = ADDZE8
5965 { 452, 2, 1, 4, 503, 1, 1, PPCImpOpBase + 13, 259, 0, 0x8ULL }, // Inst #452 = ADDZE
5966 { 451, 2, 1, 4, 143, 0, 0, PPCImpOpBase + 0, 217, 0, 0x8ULL }, // Inst #451 = ADDPCIS
5967 { 450, 2, 1, 4, 532, 1, 2, PPCImpOpBase + 22, 259, 0, 0x8ULL }, // Inst #450 = ADDME_rec
5968 { 449, 2, 1, 4, 532, 1, 3, PPCImpOpBase + 18, 259, 0, 0x8ULL }, // Inst #449 = ADDMEO_rec
5969 { 448, 2, 1, 4, 502, 1, 2, PPCImpOpBase + 15, 259, 0, 0x8ULL }, // Inst #448 = ADDMEO
5970 { 447, 2, 1, 4, 532, 1, 2, PPCImpOpBase + 22, 261, 0, 0x8ULL }, // Inst #447 = ADDME8_rec
5971 { 446, 2, 1, 4, 532, 1, 3, PPCImpOpBase + 18, 261, 0, 0x8ULL }, // Inst #446 = ADDME8O_rec
5972 { 445, 2, 1, 4, 502, 1, 2, PPCImpOpBase + 15, 261, 0, 0x8ULL }, // Inst #445 = ADDME8O
5973 { 444, 2, 1, 4, 501, 1, 1, PPCImpOpBase + 13, 261, 0, 0x8ULL }, // Inst #444 = ADDME8
5974 { 443, 2, 1, 4, 501, 1, 1, PPCImpOpBase + 13, 259, 0, 0x8ULL }, // Inst #443 = ADDME
5975 { 442, 3, 1, 4, 288, 0, 0, PPCImpOpBase + 0, 231, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #442 = ADDItocL8
5976 { 441, 3, 1, 4, 288, 0, 0, PPCImpOpBase + 0, 248, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #441 = ADDItocL
5977 { 440, 3, 1, 4, 227, 0, 0, PPCImpOpBase + 0, 231, 0, 0x0ULL }, // Inst #440 = ADDItoc8
5978 { 439, 3, 1, 4, 227, 0, 0, PPCImpOpBase + 0, 225, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #439 = ADDItoc
5979 { 438, 4, 1, 4, 500, 0, 18, PPCImpOpBase + 43, 255, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #438 = ADDItlsldLADDR32
5980 { 437, 4, 1, 4, 0, 0, 18, PPCImpOpBase + 25, 251, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #437 = ADDItlsldLADDR
5981 { 436, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 245, 0, 0x0ULL }, // Inst #436 = ADDItlsldL32
5982 { 435, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 208, 0, 0x0ULL }, // Inst #435 = ADDItlsldL
5983 { 434, 4, 1, 4, 227, 0, 18, PPCImpOpBase + 43, 255, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #434 = ADDItlsgdLADDR32
5984 { 433, 4, 1, 4, 227, 0, 18, PPCImpOpBase + 25, 251, 0|(1ULL<<MCID::ExtraSrcRegAllocReq)|(1ULL<<MCID::ExtraDefRegAllocReq), 0x0ULL }, // Inst #433 = ADDItlsgdLADDR
5985 { 432, 3, 1, 4, 227, 0, 0, PPCImpOpBase + 0, 245, 0, 0x0ULL }, // Inst #432 = ADDItlsgdL32
5986 { 431, 3, 1, 4, 227, 0, 0, PPCImpOpBase + 0, 208, 0, 0x0ULL }, // Inst #431 = ADDItlsgdL
5987 { 430, 3, 1, 4, 499, 0, 0, PPCImpOpBase + 0, 245, 0, 0x0ULL }, // Inst #430 = ADDIdtprelL32
5988 { 429, 3, 1, 4, 227, 0, 0, PPCImpOpBase + 0, 208, 0, 0x0ULL }, // Inst #429 = ADDIdtprelL
5989 { 428, 3, 1, 4, 288, 0, 0, PPCImpOpBase + 0, 231, 0|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #428 = ADDIStocHA8
5990 { 427, 3, 1, 4, 288, 0, 0, PPCImpOpBase + 0, 248, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #427 = ADDIStocHA
5991 { 426, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 208, 0, 0x0ULL }, // Inst #426 = ADDIStlsldHA
5992 { 425, 3, 1, 4, 227, 0, 0, PPCImpOpBase + 0, 208, 0, 0x0ULL }, // Inst #425 = ADDIStlsgdHA
5993 { 424, 3, 1, 4, 227, 0, 0, PPCImpOpBase + 0, 208, 0, 0x0ULL }, // Inst #424 = ADDISgotTprelHA
5994 { 423, 3, 1, 4, 499, 0, 0, PPCImpOpBase + 0, 245, 0, 0x0ULL }, // Inst #423 = ADDISdtprelHA32
5995 { 422, 3, 1, 4, 227, 0, 0, PPCImpOpBase + 0, 208, 0, 0x0ULL }, // Inst #422 = ADDISdtprelHA
5996 { 421, 3, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 208, 0, 0x8ULL }, // Inst #421 = ADDIS8
5997 { 420, 3, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 245, 0, 0x8ULL }, // Inst #420 = ADDIS
5998 { 419, 3, 1, 4, 532, 0, 2, PPCImpOpBase + 11, 184, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #419 = ADDIC_rec
5999 { 418, 3, 1, 4, 501, 0, 1, PPCImpOpBase + 5, 181, 0, 0x8ULL }, // Inst #418 = ADDIC8
6000 { 417, 3, 1, 4, 501, 0, 1, PPCImpOpBase + 5, 184, 0, 0xcULL }, // Inst #417 = ADDIC
6001 { 416, 3, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 208, 0, 0x8ULL }, // Inst #416 = ADDI8
6002 { 415, 3, 1, 4, 498, 0, 0, PPCImpOpBase + 0, 245, 0, 0x8ULL }, // Inst #415 = ADDI
6003 { 414, 3, 1, 4, 203, 0, 0, PPCImpOpBase + 0, 228, 0, 0x8ULL }, // Inst #414 = ADDG6S8
6004 { 413, 3, 1, 4, 203, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #413 = ADDG6S
6005 { 412, 3, 1, 4, 534, 1, 2, PPCImpOpBase + 22, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #412 = ADDE_rec
6006 { 411, 4, 1, 4, 522, 0, 0, PPCImpOpBase + 0, 241, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #411 = ADDEX8
6007 { 410, 4, 1, 4, 522, 0, 0, PPCImpOpBase + 0, 237, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #410 = ADDEX
6008 { 409, 3, 1, 4, 534, 1, 3, PPCImpOpBase + 18, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #409 = ADDEO_rec
6009 { 408, 3, 1, 4, 521, 1, 2, PPCImpOpBase + 15, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #408 = ADDEO
6010 { 407, 3, 1, 4, 534, 1, 2, PPCImpOpBase + 22, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #407 = ADDE8_rec
6011 { 406, 3, 1, 4, 534, 1, 3, PPCImpOpBase + 18, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #406 = ADDE8O_rec
6012 { 405, 3, 1, 4, 521, 1, 2, PPCImpOpBase + 15, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #405 = ADDE8O
6013 { 404, 3, 1, 4, 139, 1, 1, PPCImpOpBase + 13, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #404 = ADDE8
6014 { 403, 3, 1, 4, 139, 1, 1, PPCImpOpBase + 13, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #403 = ADDE
6015 { 402, 3, 1, 4, 538, 0, 2, PPCImpOpBase + 11, 222, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #402 = ADDC_rec
6016 { 401, 3, 1, 4, 390, 0, 3, PPCImpOpBase + 8, 222, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #401 = ADDCO_rec
6017 { 400, 3, 1, 4, 286, 0, 2, PPCImpOpBase + 6, 222, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #400 = ADDCO
6018 { 399, 3, 1, 4, 538, 0, 2, PPCImpOpBase + 11, 228, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #399 = ADDC8_rec
6019 { 398, 3, 1, 4, 390, 0, 3, PPCImpOpBase + 8, 228, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #398 = ADDC8O_rec
6020 { 397, 3, 1, 4, 286, 0, 2, PPCImpOpBase + 6, 228, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #397 = ADDC8O
6021 { 396, 3, 1, 4, 286, 0, 1, PPCImpOpBase + 5, 228, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #396 = ADDC8
6022 { 395, 3, 1, 4, 286, 0, 1, PPCImpOpBase + 5, 222, 0|(1ULL<<MCID::Commutable), 0xcULL }, // Inst #395 = ADDC
6023 { 394, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #394 = ADD8_rec
6024 { 393, 3, 1, 4, 138, 0, 0, PPCImpOpBase + 0, 234, 0, 0x8ULL }, // Inst #393 = ADD8TLS_
6025 { 392, 3, 1, 4, 138, 0, 0, PPCImpOpBase + 0, 231, 0, 0x8ULL }, // Inst #392 = ADD8TLS
6026 { 391, 3, 1, 4, 141, 0, 2, PPCImpOpBase + 3, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #391 = ADD8O_rec
6027 { 390, 3, 1, 4, 523, 0, 1, PPCImpOpBase + 2, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #390 = ADD8O
6028 { 389, 3, 1, 4, 138, 0, 0, PPCImpOpBase + 0, 228, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #389 = ADD8
6029 { 388, 3, 1, 4, 198, 0, 1, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #388 = ADD4_rec
6030 { 387, 3, 1, 4, 138, 0, 0, PPCImpOpBase + 0, 225, 0, 0x8ULL }, // Inst #387 = ADD4TLS
6031 { 386, 3, 1, 4, 141, 0, 2, PPCImpOpBase + 3, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #386 = ADD4O_rec
6032 { 385, 3, 1, 4, 523, 0, 1, PPCImpOpBase + 2, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #385 = ADD4O
6033 { 384, 3, 1, 4, 138, 0, 0, PPCImpOpBase + 0, 222, 0|(1ULL<<MCID::Commutable), 0x8ULL }, // Inst #384 = ADD4
6034 { 383, 3, 0, 4, 369, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #383 = XFSTOREf64
6035 { 382, 3, 0, 4, 369, 0, 0, PPCImpOpBase + 0, 219, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #382 = XFSTOREf32
6036 { 381, 3, 1, 4, 214, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #381 = XFLOADf64
6037 { 380, 3, 1, 4, 364, 0, 0, PPCImpOpBase + 0, 219, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #380 = XFLOADf32
6038 { 379, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 217, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #379 = SUBPCIS
6039 { 378, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #378 = SUBIS
6040 { 377, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #377 = SUBIC_rec
6041 { 376, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #376 = SUBIC
6042 { 375, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #375 = SUBI
6043 { 374, 3, 0, 4, 608, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #374 = STIWX
6044 { 373, 3, 0, 0, 202, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #373 = SRWI_rec
6045 { 372, 3, 0, 0, 202, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #372 = SRWI
6046 { 371, 3, 0, 0, 202, 0, 0, PPCImpOpBase + 0, 181, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #371 = SRDI_rec
6047 { 370, 3, 0, 0, 202, 0, 0, PPCImpOpBase + 0, 181, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #370 = SRDI
6048 { 369, 3, 0, 4, 607, 0, 0, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #369 = SPILLTOVSR_STX
6049 { 368, 3, 0, 4, 597, 0, 0, PPCImpOpBase + 0, 211, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #368 = SPILLTOVSR_ST
6050 { 367, 3, 1, 4, 551, 0, 0, PPCImpOpBase + 0, 214, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #367 = SPILLTOVSR_LDX
6051 { 366, 3, 1, 4, 542, 0, 0, PPCImpOpBase + 0, 211, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #366 = SPILLTOVSR_LD
6052 { 365, 3, 0, 0, 202, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #365 = SLWI_rec
6053 { 364, 3, 0, 0, 202, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #364 = SLWI
6054 { 363, 3, 0, 0, 202, 0, 0, PPCImpOpBase + 0, 181, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #363 = SLDI_rec
6055 { 362, 3, 0, 0, 202, 0, 0, PPCImpOpBase + 0, 181, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #362 = SLDI
6056 { 361, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #361 = ROTRWI_rec
6057 { 360, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #360 = ROTRWI
6058 { 359, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 181, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #359 = ROTRDI_rec
6059 { 358, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 181, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #358 = ROTRDI
6060 { 357, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 173, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #357 = RLWNMbm_rec
6061 { 356, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 173, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #356 = RLWNMbm
6062 { 355, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 173, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #355 = RLWINMbm_rec
6063 { 354, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 173, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #354 = RLWINMbm
6064 { 353, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 173, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #353 = RLWIMIbm_rec
6065 { 352, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 173, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #352 = RLWIMIbm
6066 { 351, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 208, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #351 = PSUBI
6067 { 350, 2, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 206, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #350 = PPCLdFixedAddr
6068 { 349, 3, 1, 4, 214, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #349 = LIWZX
6069 { 348, 3, 1, 4, 361, 0, 0, PPCImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #348 = LIWAX
6070 { 347, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 200, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #347 = LAx
6071 { 346, 2, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 198, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #346 = KILL_PAIR
6072 { 345, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 177, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #345 = INSRWI_rec
6073 { 344, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 177, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #344 = INSRWI
6074 { 343, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 173, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #343 = INSRDI_rec
6075 { 342, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 173, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #342 = INSRDI
6076 { 341, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 177, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #341 = INSLWI_rec
6077 { 340, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 177, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #340 = INSLWI
6078 { 339, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 177, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #339 = EXTRWI_rec
6079 { 338, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 177, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #338 = EXTRWI
6080 { 337, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 173, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #337 = EXTRDI_rec
6081 { 336, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 173, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #336 = EXTRDI
6082 { 335, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 177, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #335 = EXTLWI_rec
6083 { 334, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 177, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #334 = EXTLWI
6084 { 333, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 173, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #333 = EXTLDI_rec
6085 { 332, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 173, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #332 = EXTLDI
6086 { 331, 3, 0, 4, 599, 0, 0, PPCImpOpBase + 0, 195, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #331 = DFSTOREf64
6087 { 330, 3, 0, 4, 599, 0, 0, PPCImpOpBase + 0, 192, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #330 = DFSTOREf32
6088 { 329, 3, 1, 4, 544, 0, 0, PPCImpOpBase + 0, 195, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #329 = DFLOADf64
6089 { 328, 3, 1, 4, 543, 0, 0, PPCImpOpBase + 0, 192, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #328 = DFLOADf32
6090 { 327, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #327 = DCBTx
6091 { 326, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #326 = DCBTT
6092 { 325, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #325 = DCBTSTx
6093 { 324, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #324 = DCBTSTT
6094 { 323, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 189, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #323 = DCBTSTDS
6095 { 322, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 189, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #322 = DCBTSTCT
6096 { 321, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 189, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #321 = DCBTDS
6097 { 320, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 189, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #320 = DCBTCT
6098 { 319, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #319 = DCBSTPS
6099 { 318, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #318 = DCBFx
6100 { 317, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #317 = DCBFPS
6101 { 316, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #316 = DCBFLP
6102 { 315, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 187, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #315 = DCBFL
6103 { 314, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #314 = CLRRWI_rec
6104 { 313, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #313 = CLRRWI
6105 { 312, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 181, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #312 = CLRRDI_rec
6106 { 311, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 181, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #311 = CLRRDI
6107 { 310, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 177, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #310 = CLRLSLWI_rec
6108 { 309, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 177, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #309 = CLRLSLWI
6109 { 308, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 173, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #308 = CLRLSLDI_rec
6110 { 307, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 173, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #307 = CLRLSLDI
6111 { 306, 1, 0, 4, 1, 0, 1, PPCImpOpBase + 1, 172, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #306 = CFENCE8
6112 { 305, 1, 0, 4, 1, 0, 1, PPCImpOpBase + 1, 171, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #305 = CFENCE
6113 { 304, 2, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 169, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #304 = BUILD_UACC
6114 { 303, 3, 1, 4, 0, 0, 0, PPCImpOpBase + 0, 166, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #303 = BUILD_QUADWORD
6115 { 302, 6, 2, 4, 0, 0, 1, PPCImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #302 = ATOMIC_SWAP_I128
6116 { 301, 6, 2, 4, 0, 0, 1, PPCImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #301 = ATOMIC_LOAD_XOR_I128
6117 { 300, 6, 2, 4, 0, 0, 1, PPCImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #300 = ATOMIC_LOAD_SUB_I128
6118 { 299, 6, 2, 4, 0, 0, 1, PPCImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #299 = ATOMIC_LOAD_OR_I128
6119 { 298, 6, 2, 4, 0, 0, 1, PPCImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #298 = ATOMIC_LOAD_NAND_I128
6120 { 297, 6, 2, 4, 0, 0, 1, PPCImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #297 = ATOMIC_LOAD_AND_I128
6121 { 296, 6, 2, 4, 0, 0, 1, PPCImpOpBase + 0, 160, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #296 = ATOMIC_LOAD_ADD_I128
6122 { 295, 8, 2, 4, 0, 0, 1, PPCImpOpBase + 0, 152, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #295 = ATOMIC_CMP_SWAP_I128
6123 { 294, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 148, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #294 = G_UBFX
6124 { 293, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 148, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #293 = G_SBFX
6125 { 292, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #292 = G_VECREDUCE_UMIN
6126 { 291, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #291 = G_VECREDUCE_UMAX
6127 { 290, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #290 = G_VECREDUCE_SMIN
6128 { 289, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #289 = G_VECREDUCE_SMAX
6129 { 288, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #288 = G_VECREDUCE_XOR
6130 { 287, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #287 = G_VECREDUCE_OR
6131 { 286, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #286 = G_VECREDUCE_AND
6132 { 285, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #285 = G_VECREDUCE_MUL
6133 { 284, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #284 = G_VECREDUCE_ADD
6134 { 283, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #283 = G_VECREDUCE_FMINIMUM
6135 { 282, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #282 = G_VECREDUCE_FMAXIMUM
6136 { 281, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #281 = G_VECREDUCE_FMIN
6137 { 280, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #280 = G_VECREDUCE_FMAX
6138 { 279, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #279 = G_VECREDUCE_FMUL
6139 { 278, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #278 = G_VECREDUCE_FADD
6140 { 277, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 131, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #277 = G_VECREDUCE_SEQ_FMUL
6141 { 276, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 131, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #276 = G_VECREDUCE_SEQ_FADD
6142 { 275, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #275 = G_UBSANTRAP
6143 { 274, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #274 = G_DEBUGTRAP
6144 { 273, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #273 = G_TRAP
6145 { 272, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 58, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #272 = G_BZERO
6146 { 271, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 144, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #271 = G_MEMSET
6147 { 270, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 144, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #270 = G_MEMMOVE
6148 { 269, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 131, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #269 = G_MEMCPY_INLINE
6149 { 268, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 144, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #268 = G_MEMCPY
6150 { 267, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 142, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #267 = G_WRITE_REGISTER
6151 { 266, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #266 = G_READ_REGISTER
6152 { 265, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #265 = G_STRICT_FLDEXP
6153 { 264, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #264 = G_STRICT_FSQRT
6154 { 263, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #263 = G_STRICT_FMA
6155 { 262, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #262 = G_STRICT_FREM
6156 { 261, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #261 = G_STRICT_FDIV
6157 { 260, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #260 = G_STRICT_FMUL
6158 { 259, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #259 = G_STRICT_FSUB
6159 { 258, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #258 = G_STRICT_FADD
6160 { 257, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #257 = G_STACKRESTORE
6161 { 256, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #256 = G_STACKSAVE
6162 { 255, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 69, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #255 = G_DYN_STACKALLOC
6163 { 254, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #254 = G_JUMP_TABLE
6164 { 253, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #253 = G_BLOCK_ADDR
6165 { 252, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #252 = G_ADDRSPACE_CAST
6166 { 251, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #251 = G_FNEARBYINT
6167 { 250, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #250 = G_FRINT
6168 { 249, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #249 = G_FFLOOR
6169 { 248, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #248 = G_FSQRT
6170 { 247, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #247 = G_FTANH
6171 { 246, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #246 = G_FSINH
6172 { 245, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #245 = G_FCOSH
6173 { 244, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #244 = G_FATAN
6174 { 243, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #243 = G_FASIN
6175 { 242, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #242 = G_FACOS
6176 { 241, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #241 = G_FTAN
6177 { 240, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #240 = G_FSIN
6178 { 239, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #239 = G_FCOS
6179 { 238, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #238 = G_FCEIL
6180 { 237, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #237 = G_BITREVERSE
6181 { 236, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #236 = G_BSWAP
6182 { 235, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #235 = G_CTPOP
6183 { 234, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #234 = G_CTLZ_ZERO_UNDEF
6184 { 233, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #233 = G_CTLZ
6185 { 232, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #232 = G_CTTZ_ZERO_UNDEF
6186 { 231, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #231 = G_CTTZ
6187 { 230, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 138, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #230 = G_VECTOR_COMPRESS
6188 { 229, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #229 = G_SPLAT_VECTOR
6189 { 228, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 134, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #228 = G_SHUFFLE_VECTOR
6190 { 227, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 131, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #227 = G_EXTRACT_VECTOR_ELT
6191 { 226, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 127, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #226 = G_INSERT_VECTOR_ELT
6192 { 225, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #225 = G_EXTRACT_SUBVECTOR
6193 { 224, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 63, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #224 = G_INSERT_SUBVECTOR
6194 { 223, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #223 = G_VSCALE
6195 { 222, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 124, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #222 = G_BRJT
6196 { 221, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #221 = G_BR
6197 { 220, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #220 = G_LLROUND
6198 { 219, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #219 = G_LROUND
6199 { 218, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #218 = G_ABS
6200 { 217, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #217 = G_UMAX
6201 { 216, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #216 = G_UMIN
6202 { 215, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #215 = G_SMAX
6203 { 214, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #214 = G_SMIN
6204 { 213, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #213 = G_PTRMASK
6205 { 212, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #212 = G_PTR_ADD
6206 { 211, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #211 = G_RESET_FPMODE
6207 { 210, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #210 = G_SET_FPMODE
6208 { 209, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #209 = G_GET_FPMODE
6209 { 208, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #208 = G_RESET_FPENV
6210 { 207, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #207 = G_SET_FPENV
6211 { 206, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #206 = G_GET_FPENV
6212 { 205, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #205 = G_FMAXIMUM
6213 { 204, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #204 = G_FMINIMUM
6214 { 203, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #203 = G_FMAXNUM_IEEE
6215 { 202, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #202 = G_FMINNUM_IEEE
6216 { 201, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #201 = G_FMAXNUM
6217 { 200, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #200 = G_FMINNUM
6218 { 199, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #199 = G_FCANONICALIZE
6219 { 198, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 98, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #198 = G_IS_FPCLASS
6220 { 197, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #197 = G_FCOPYSIGN
6221 { 196, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #196 = G_FABS
6222 { 195, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #195 = G_UITOFP
6223 { 194, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #194 = G_SITOFP
6224 { 193, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #193 = G_FPTOUI
6225 { 192, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #192 = G_FPTOSI
6226 { 191, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #191 = G_FPTRUNC
6227 { 190, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #190 = G_FPEXT
6228 { 189, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #189 = G_FNEG
6229 { 188, 3, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #188 = G_FFREXP
6230 { 187, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #187 = G_FLDEXP
6231 { 186, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #186 = G_FLOG10
6232 { 185, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #185 = G_FLOG2
6233 { 184, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #184 = G_FLOG
6234 { 183, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #183 = G_FEXP10
6235 { 182, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #182 = G_FEXP2
6236 { 181, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #181 = G_FEXP
6237 { 180, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #180 = G_FPOWI
6238 { 179, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #179 = G_FPOW
6239 { 178, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #178 = G_FREM
6240 { 177, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #177 = G_FDIV
6241 { 176, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #176 = G_FMAD
6242 { 175, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #175 = G_FMA
6243 { 174, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #174 = G_FMUL
6244 { 173, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #173 = G_FSUB
6245 { 172, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #172 = G_FADD
6246 { 171, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #171 = G_UDIVFIXSAT
6247 { 170, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #170 = G_SDIVFIXSAT
6248 { 169, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #169 = G_UDIVFIX
6249 { 168, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #168 = G_SDIVFIX
6250 { 167, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #167 = G_UMULFIXSAT
6251 { 166, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #166 = G_SMULFIXSAT
6252 { 165, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #165 = G_UMULFIX
6253 { 164, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #164 = G_SMULFIX
6254 { 163, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #163 = G_SSHLSAT
6255 { 162, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #162 = G_USHLSAT
6256 { 161, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #161 = G_SSUBSAT
6257 { 160, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #160 = G_USUBSAT
6258 { 159, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #159 = G_SADDSAT
6259 { 158, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #158 = G_UADDSAT
6260 { 157, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #157 = G_SMULH
6261 { 156, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #156 = G_UMULH
6262 { 155, 4, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #155 = G_SMULO
6263 { 154, 4, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #154 = G_UMULO
6264 { 153, 5, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 115, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #153 = G_SSUBE
6265 { 152, 4, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #152 = G_SSUBO
6266 { 151, 5, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 115, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #151 = G_SADDE
6267 { 150, 4, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #150 = G_SADDO
6268 { 149, 5, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 115, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #149 = G_USUBE
6269 { 148, 4, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #148 = G_USUBO
6270 { 147, 5, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 115, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #147 = G_UADDE
6271 { 146, 4, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #146 = G_UADDO
6272 { 145, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #145 = G_SELECT
6273 { 144, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #144 = G_UCMP
6274 { 143, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #143 = G_SCMP
6275 { 142, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 108, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #142 = G_FCMP
6276 { 141, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 108, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #141 = G_ICMP
6277 { 140, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #140 = G_ROTL
6278 { 139, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #139 = G_ROTR
6279 { 138, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 104, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #138 = G_FSHR
6280 { 137, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 104, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #137 = G_FSHL
6281 { 136, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #136 = G_ASHR
6282 { 135, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #135 = G_LSHR
6283 { 134, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #134 = G_SHL
6284 { 133, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #133 = G_ZEXT
6285 { 132, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #132 = G_SEXT_INREG
6286 { 131, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #131 = G_SEXT
6287 { 130, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 98, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #130 = G_VAARG
6288 { 129, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #129 = G_VASTART
6289 { 128, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #128 = G_FCONSTANT
6290 { 127, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #127 = G_CONSTANT
6291 { 126, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #126 = G_TRUNC
6292 { 125, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #125 = G_ANYEXT
6293 { 124, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #124 = G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
6294 { 123, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #123 = G_INTRINSIC_CONVERGENT
6295 { 122, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #122 = G_INTRINSIC_W_SIDE_EFFECTS
6296 { 121, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #121 = G_INTRINSIC
6297 { 120, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #120 = G_INVOKE_REGION_START
6298 { 119, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #119 = G_BRINDIRECT
6299 { 118, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #118 = G_BRCOND
6300 { 117, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 94, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #117 = G_PREFETCH
6301 { 116, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 21, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #116 = G_FENCE
6302 { 115, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #115 = G_ATOMICRMW_UDEC_WRAP
6303 { 114, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #114 = G_ATOMICRMW_UINC_WRAP
6304 { 113, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #113 = G_ATOMICRMW_FMIN
6305 { 112, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #112 = G_ATOMICRMW_FMAX
6306 { 111, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #111 = G_ATOMICRMW_FSUB
6307 { 110, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #110 = G_ATOMICRMW_FADD
6308 { 109, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #109 = G_ATOMICRMW_UMIN
6309 { 108, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #108 = G_ATOMICRMW_UMAX
6310 { 107, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #107 = G_ATOMICRMW_MIN
6311 { 106, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #106 = G_ATOMICRMW_MAX
6312 { 105, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #105 = G_ATOMICRMW_XOR
6313 { 104, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #104 = G_ATOMICRMW_OR
6314 { 103, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #103 = G_ATOMICRMW_NAND
6315 { 102, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #102 = G_ATOMICRMW_AND
6316 { 101, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #101 = G_ATOMICRMW_SUB
6317 { 100, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #100 = G_ATOMICRMW_ADD
6318 { 99, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #99 = G_ATOMICRMW_XCHG
6319 { 98, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #98 = G_ATOMIC_CMPXCHG
6320 { 97, 5, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #97 = G_ATOMIC_CMPXCHG_WITH_SUCCESS
6321 { 96, 5, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 77, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #96 = G_INDEXED_STORE
6322 { 95, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #95 = G_STORE
6323 { 94, 5, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 72, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #94 = G_INDEXED_ZEXTLOAD
6324 { 93, 5, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 72, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #93 = G_INDEXED_SEXTLOAD
6325 { 92, 5, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 72, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #92 = G_INDEXED_LOAD
6326 { 91, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #91 = G_ZEXTLOAD
6327 { 90, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #90 = G_SEXTLOAD
6328 { 89, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #89 = G_LOAD
6329 { 88, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #88 = G_READSTEADYCOUNTER
6330 { 87, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #87 = G_READCYCLECOUNTER
6331 { 86, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #86 = G_INTRINSIC_ROUNDEVEN
6332 { 85, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #85 = G_INTRINSIC_LLRINT
6333 { 84, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #84 = G_INTRINSIC_LRINT
6334 { 83, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #83 = G_INTRINSIC_ROUND
6335 { 82, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #82 = G_INTRINSIC_TRUNC
6336 { 81, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 69, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #81 = G_INTRINSIC_FPTRUNC_ROUND
6337 { 80, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #80 = G_CONSTANT_FOLD_BARRIER
6338 { 79, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #79 = G_FREEZE
6339 { 78, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #78 = G_BITCAST
6340 { 77, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #77 = G_INTTOPTR
6341 { 76, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #76 = G_PTRTOINT
6342 { 75, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #75 = G_CONCAT_VECTORS
6343 { 74, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #74 = G_BUILD_VECTOR_TRUNC
6344 { 73, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #73 = G_BUILD_VECTOR
6345 { 72, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #72 = G_MERGE_VALUES
6346 { 71, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 63, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #71 = G_INSERT
6347 { 70, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #70 = G_UNMERGE_VALUES
6348 { 69, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 58, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #69 = G_EXTRACT
6349 { 68, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #68 = G_CONSTANT_POOL
6350 { 67, 5, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 53, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #67 = G_PTRAUTH_GLOBAL_VALUE
6351 { 66, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #66 = G_GLOBAL_VALUE
6352 { 65, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #65 = G_FRAME_INDEX
6353 { 64, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #64 = G_PHI
6354 { 63, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #63 = G_IMPLICIT_DEF
6355 { 62, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #62 = G_XOR
6356 { 61, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #61 = G_OR
6357 { 60, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #60 = G_AND
6358 { 59, 4, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #59 = G_UDIVREM
6359 { 58, 4, 2, 0, 0, 0, 0, PPCImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #58 = G_SDIVREM
6360 { 57, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #57 = G_UREM
6361 { 56, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #56 = G_SREM
6362 { 55, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #55 = G_UDIV
6363 { 54, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #54 = G_SDIV
6364 { 53, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #53 = G_MUL
6365 { 52, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #52 = G_SUB
6366 { 51, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #51 = G_ADD
6367 { 50, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #50 = G_ASSERT_ALIGN
6368 { 49, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #49 = G_ASSERT_ZEXT
6369 { 48, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #48 = G_ASSERT_SEXT
6370 { 47, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #47 = CONVERGENCECTRL_GLUE
6371 { 46, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #46 = CONVERGENCECTRL_LOOP
6372 { 45, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #45 = CONVERGENCECTRL_ANCHOR
6373 { 44, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #44 = CONVERGENCECTRL_ENTRY
6374 { 43, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #43 = JUMP_TABLE_DEBUG_INFO
6375 { 42, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #42 = MEMBARRIER
6376 { 41, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #41 = ICALL_BRANCH_FUNNEL
6377 { 40, 3, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 37, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #40 = PATCHABLE_TYPED_EVENT_CALL
6378 { 39, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 35, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #39 = PATCHABLE_EVENT_CALL
6379 { 38, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #38 = PATCHABLE_TAIL_CALL
6380 { 37, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #37 = PATCHABLE_FUNCTION_EXIT
6381 { 36, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #36 = PATCHABLE_RET
6382 { 35, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #35 = PATCHABLE_FUNCTION_ENTER
6383 { 34, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #34 = PATCHABLE_OP
6384 { 33, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #33 = FAULTING_OP
6385 { 32, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 33, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #32 = LOCAL_ESCAPE
6386 { 31, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #31 = STATEPOINT
6387 { 30, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 30, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #30 = PREALLOCATED_ARG
6388 { 29, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #29 = PREALLOCATED_SETUP
6389 { 28, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 29, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #28 = LOAD_STACK_GUARD
6390 { 27, 6, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 23, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #27 = PATCHPOINT
6391 { 26, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #26 = FENTRY_CALL
6392 { 25, 2, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #25 = STACKMAP
6393 { 24, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 19, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #24 = ARITH_FENCE
6394 { 23, 4, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 15, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #23 = PSEUDO_PROBE
6395 { 22, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #22 = LIFETIME_END
6396 { 21, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #21 = LIFETIME_START
6397 { 20, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #20 = BUNDLE
6398 { 19, 2, 1, 0, 290, 0, 0, PPCImpOpBase + 0, 13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #19 = COPY
6399 { 18, 2, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #18 = REG_SEQUENCE
6400 { 17, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #17 = DBG_LABEL
6401 { 16, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #16 = DBG_PHI
6402 { 15, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #15 = DBG_INSTR_REF
6403 { 14, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #14 = DBG_VALUE_LIST
6404 { 13, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #13 = DBG_VALUE
6405 { 12, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #12 = COPY_TO_REGCLASS
6406 { 11, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 9, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #11 = SUBREG_TO_REG
6407 { 10, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #10 = IMPLICIT_DEF
6408 { 9, 4, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 5, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #9 = INSERT_SUBREG
6409 { 8, 3, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 2, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #8 = EXTRACT_SUBREG
6410 { 7, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #7 = KILL
6411 { 6, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #6 = ANNOTATION_LABEL
6412 { 5, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #5 = GC_LABEL
6413 { 4, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #4 = EH_LABEL
6414 { 3, 1, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #3 = CFI_INSTRUCTION
6415 { 2, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2 = INLINEASM_BR
6416 { 1, 0, 0, 0, 0, 0, 0, PPCImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #1 = INLINEASM
6417 { 0, 1, 1, 0, 0, 0, 0, PPCImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #0 = PHI
6418 }, {
6419 /* 0 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6420 /* 1 */
6421 /* 1 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6422 /* 2 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6423 /* 5 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6424 /* 9 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6425 /* 13 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6426 /* 15 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6427 /* 19 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) },
6428 /* 21 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6429 /* 23 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6430 /* 29 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 },
6431 /* 30 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6432 /* 33 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6433 /* 35 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6434 /* 37 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6435 /* 40 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
6436 /* 43 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
6437 /* 46 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
6438 /* 50 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
6439 /* 51 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6440 /* 53 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6441 /* 58 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
6442 /* 61 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
6443 /* 63 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
6444 /* 67 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
6445 /* 69 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6446 /* 72 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6447 /* 77 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6448 /* 82 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
6449 /* 87 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
6450 /* 91 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
6451 /* 94 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6452 /* 98 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6453 /* 101 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
6454 /* 104 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
6455 /* 108 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
6456 /* 112 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
6457 /* 115 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
6458 /* 120 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
6459 /* 124 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
6460 /* 127 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 },
6461 /* 131 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 },
6462 /* 134 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6463 /* 138 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
6464 /* 142 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
6465 /* 144 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
6466 /* 148 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
6467 /* 152 */ { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6468 /* 160 */ { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6469 /* 166 */ { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6470 /* 169 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::UACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6471 /* 171 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6472 /* 172 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6473 /* 173 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6474 /* 177 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6475 /* 181 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6476 /* 184 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6477 /* 187 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6478 /* 189 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6479 /* 192 */ { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6480 /* 195 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6481 /* 198 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
6482 /* 200 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6483 /* 203 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6484 /* 206 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6485 /* 208 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6486 /* 211 */ { PPC::SPILLTOVSRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6487 /* 214 */ { PPC::SPILLTOVSRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6488 /* 217 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6489 /* 219 */ { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6490 /* 222 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6491 /* 225 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6492 /* 228 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6493 /* 231 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6494 /* 234 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6495 /* 237 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6496 /* 241 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6497 /* 245 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6498 /* 248 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6499 /* 251 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6500 /* 255 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6501 /* 259 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6502 /* 261 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6503 /* 263 */ { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6504 /* 265 */ { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6505 /* 267 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6506 /* 272 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6507 /* 277 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6508 /* 281 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6509 /* 285 */ { -1, 0, MCOI::OPERAND_PCREL, 0 },
6510 /* 286 */ { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
6511 /* 288 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
6512 /* 291 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6513 /* 294 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 },
6514 /* 296 */ { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6515 /* 297 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6516 /* 301 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6517 /* 304 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6518 /* 307 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6519 /* 309 */ { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6520 /* 311 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6521 /* 314 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6522 /* 317 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6523 /* 320 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6524 /* 323 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6525 /* 327 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6526 /* 331 */ { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6527 /* 334 */ { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6528 /* 336 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6529 /* 339 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6530 /* 342 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6531 /* 345 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6532 /* 347 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6533 /* 349 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6534 /* 351 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6535 /* 354 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6536 /* 357 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6537 /* 359 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6538 /* 361 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6539 /* 364 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6540 /* 367 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6541 /* 370 */ { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6542 /* 372 */ { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6543 /* 373 */ { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::DMRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6544 /* 376 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::DMRROWpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6545 /* 379 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6546 /* 382 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACC_HIRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6547 /* 385 */ { PPC::DMRROWpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6548 /* 388 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6549 /* 391 */ { PPC::WACC_HIRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6550 /* 394 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6551 /* 398 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6552 /* 402 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6553 /* 406 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6554 /* 410 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6555 /* 412 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6556 /* 416 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6557 /* 419 */ { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6558 /* 422 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6559 /* 425 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6560 /* 428 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6561 /* 431 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6562 /* 434 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6563 /* 437 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6564 /* 440 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::FpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6565 /* 443 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6566 /* 447 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6567 /* 451 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6568 /* 454 */ { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6569 /* 456 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6570 /* 458 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6571 /* 461 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6572 /* 463 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6573 /* 466 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6574 /* 468 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6575 /* 469 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6576 /* 471 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6577 /* 474 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6578 /* 477 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6579 /* 480 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6580 /* 483 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6581 /* 487 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6582 /* 489 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6583 /* 492 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6584 /* 494 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6585 /* 497 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6586 /* 499 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6587 /* 502 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6588 /* 504 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6589 /* 507 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6590 /* 511 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6591 /* 515 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6592 /* 519 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6593 /* 521 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6594 /* 524 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6595 /* 528 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6596 /* 532 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6597 /* 535 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) },
6598 /* 539 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) },
6599 /* 543 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6600 /* 547 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6601 /* 551 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6602 /* 554 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6603 /* 557 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6604 /* 560 */ { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6605 /* 563 */ { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6606 /* 566 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6607 /* 569 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6608 /* 572 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6609 /* 575 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6610 /* 578 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) },
6611 /* 582 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6612 /* 586 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6613 /* 589 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6614 /* 592 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) },
6615 /* 596 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6616 /* 600 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6617 /* 603 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6618 /* 606 */ { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6619 /* 609 */ { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6620 /* 612 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6621 /* 615 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6622 /* 618 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6623 /* 621 */ { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6624 /* 624 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6625 /* 627 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6626 /* 630 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6627 /* 632 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6628 /* 635 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6629 /* 638 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6630 /* 641 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6631 /* 644 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6632 /* 648 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6633 /* 652 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6634 /* 654 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6635 /* 655 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6636 /* 658 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6637 /* 659 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6638 /* 661 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6639 /* 663 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6640 /* 665 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6641 /* 667 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRSAVERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6642 /* 669 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6643 /* 671 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6644 /* 672 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6645 /* 674 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6646 /* 676 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6647 /* 678 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6648 /* 680 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6649 /* 684 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6650 /* 687 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6651 /* 689 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6652 /* 691 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6653 /* 693 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6654 /* 695 */ { PPC::VRSAVERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6655 /* 697 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6656 /* 699 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6657 /* 701 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6658 /* 703 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6659 /* 705 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6660 /* 708 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6661 /* 710 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6662 /* 713 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 },
6663 /* 716 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 },
6664 /* 719 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6665 /* 722 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6666 /* 725 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 },
6667 /* 728 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6668 /* 731 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 },
6669 /* 734 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6670 /* 736 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6671 /* 739 */ { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 },
6672 /* 742 */ { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6673 /* 744 */ { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6674 /* 747 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 },
6675 /* 750 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 },
6676 /* 753 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6677 /* 755 */ { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6678 /* 758 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6679 /* 761 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6680 /* 767 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6681 /* 774 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6682 /* 780 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6683 /* 787 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6684 /* 792 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6685 /* 798 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6686 /* 803 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6687 /* 809 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6688 /* 814 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6689 /* 820 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6690 /* 825 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6691 /* 831 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6692 /* 838 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6693 /* 843 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6694 /* 848 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6695 /* 853 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6696 /* 858 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6697 /* 861 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6698 /* 864 */ { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6699 /* 867 */ { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6700 /* 870 */ { PPC::UACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6701 /* 873 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6702 /* 876 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6703 /* 880 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6704 /* 884 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6705 /* 889 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6706 /* 895 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6707 /* 901 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6708 /* 906 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6709 /* 911 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6710 /* 916 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6711 /* 921 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6712 /* 926 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6713 /* 931 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6714 /* 936 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6715 /* 941 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6716 /* 946 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6717 /* 951 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6718 /* 956 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6719 /* 961 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6720 /* 965 */ { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6721 /* 969 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6722 /* 973 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRC_NOR0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6723 /* 977 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RC_NOX0RegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6724 /* 981 */ { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::SPERCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6725 /* 985 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6726 /* 989 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6727 /* 993 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6728 /* 995 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6729 /* 997 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6730 /* 999 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6731 /* 1001 */ { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6732 /* 1003 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6733 /* 1006 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8pRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6734 /* 1009 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) },
6735 /* 1013 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) },
6736 /* 1017 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6737 /* 1021 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6738 /* 1025 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) },
6739 /* 1029 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::F8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6740 /* 1033 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) },
6741 /* 1037 */ { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { PPC::F4RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 },
6742 /* 1041 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6743 /* 1044 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6744 /* 1046 */ { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6745 /* 1048 */ { PPC::CTRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6746 /* 1050 */ { PPC::CTRRC8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6747 /* 1052 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6748 /* 1055 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6749 /* 1058 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6750 /* 1062 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6751 /* 1065 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6752 /* 1068 */ { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6753 /* 1070 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6754 /* 1073 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6755 /* 1076 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6756 /* 1080 */ { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6757 /* 1082 */ { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6758 /* 1085 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6759 /* 1089 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6760 /* 1093 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6761 /* 1097 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6762 /* 1101 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6763 /* 1105 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::GPRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6764 /* 1109 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
6765 /* 1113 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6766 /* 1117 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6767 /* 1120 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6768 /* 1122 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6769 /* 1125 */ { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6770 /* 1128 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6771 /* 1131 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6772 /* 1134 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6773 /* 1136 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6774 /* 1138 */ { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6775 /* 1140 */ { PPC::VFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6776 /* 1142 */ { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6777 /* 1144 */ { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6778 /* 1146 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::G8RCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6779 /* 1149 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6780 /* 1152 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6781 /* 1156 */ { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6782 /* 1160 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6783 /* 1164 */ { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6784 /* 1168 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6785 /* 1170 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6786 /* 1173 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6787 /* 1176 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6788 /* 1179 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6789 /* 1181 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6790 /* 1184 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6791 /* 1187 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6792 /* 1191 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6793 /* 1194 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6794 /* 1198 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6795 /* 1201 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6796 /* 1205 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6797 /* 1208 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRpRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6798 /* 1212 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6799 /* 1216 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6800 /* 1219 */ { PPC::CRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6801 /* 1221 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6802 /* 1224 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6803 /* 1228 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6804 /* 1233 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6805 /* 1236 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VRRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6806 /* 1239 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6807 /* 1243 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6808 /* 1244 */ { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6809 /* 1245 */ { PPC::VSSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6810 /* 1246 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
6811 /* 1248 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
6812 /* 1250 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6813 /* 1254 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6814 /* 1258 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSFRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6815 /* 1261 */ { PPC::ACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6816 /* 1262 */ { PPC::WACCRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
6817 /* 1263 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6818 /* 1267 */ { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { PPC::VSRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6819 /* 1270 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
6820 /* 1273 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6821 /* 1276 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
6822 /* 1280 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
6823 /* 1283 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { PPC::CRBITRCRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
6824 }, {
6825 /* 0 */
6826 /* 0 */ PPC::CR0,
6827 /* 1 */ PPC::CR7,
6828 /* 2 */ PPC::XER,
6829 /* 3 */ PPC::XER, PPC::CR0,
6830 /* 5 */ PPC::CARRY,
6831 /* 6 */ PPC::CARRY, PPC::XER,
6832 /* 8 */ PPC::CARRY, PPC::XER, PPC::CR0,
6833 /* 11 */ PPC::CARRY, PPC::CR0,
6834 /* 13 */ PPC::CARRY, PPC::CARRY,
6835 /* 15 */ PPC::CARRY, PPC::CARRY, PPC::XER,
6836 /* 18 */ PPC::CARRY, PPC::CARRY, PPC::XER, PPC::CR0,
6837 /* 22 */ PPC::CARRY, PPC::CARRY, PPC::CR0,
6838 /* 25 */ PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::LR8, PPC::CTR8, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7,
6839 /* 43 */ PPC::R0, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::LR, PPC::CTR, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7,
6840 /* 61 */ PPC::R1, PPC::R1,
6841 /* 63 */ PPC::CTR,
6842 /* 64 */ PPC::CTR8,
6843 /* 65 */ PPC::CTR, PPC::RM, PPC::LR,
6844 /* 68 */ PPC::CTR8, PPC::RM, PPC::LR8,
6845 /* 71 */ PPC::RM, PPC::LR,
6846 /* 73 */ PPC::LR, PPC::RM,
6847 /* 75 */ PPC::LR, PPC::RM, PPC::LR,
6848 /* 78 */ PPC::CR6,
6849 /* 79 */ PPC::CTR8, PPC::RM, PPC::LR8, PPC::X2,
6850 /* 83 */ PPC::CTR8, PPC::RM, PPC::LR8, PPC::X2, PPC::RM,
6851 /* 88 */ PPC::CTR8, PPC::RM, PPC::LR8, PPC::RM,
6852 /* 92 */ PPC::CTR, PPC::RM, PPC::LR, PPC::R2,
6853 /* 96 */ PPC::CTR, PPC::RM, PPC::LR, PPC::R2, PPC::RM,
6854 /* 101 */ PPC::CTR, PPC::RM, PPC::LR, PPC::RM,
6855 /* 105 */ PPC::CTR, PPC::CTR,
6856 /* 107 */ PPC::CTR8, PPC::CTR8,
6857 /* 109 */ PPC::CTR, PPC::RM, PPC::CTR,
6858 /* 112 */ PPC::CTR, PPC::LR, PPC::RM, PPC::CTR,
6859 /* 116 */ PPC::CTR8, PPC::LR8, PPC::RM, PPC::CTR8,
6860 /* 120 */ PPC::RM, PPC::LR8,
6861 /* 122 */ PPC::RM, PPC::LR8, PPC::RM,
6862 /* 125 */ PPC::RM, PPC::LR, PPC::RM,
6863 /* 128 */ PPC::LR8, PPC::RM,
6864 /* 130 */ PPC::CR1EQ,
6865 /* 131 */ PPC::CR1,
6866 /* 132 */ PPC::X1, PPC::X1,
6867 /* 134 */ PPC::RM,
6868 /* 135 */ PPC::RM, PPC::CR1,
6869 /* 137 */ PPC::X0, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::LR8, PPC::CTR8, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7,
6870 /* 154 */ PPC::R0, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::LR, PPC::CTR, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7,
6871 /* 171 */ PPC::R0, PPC::R4, PPC::R5, PPC::R11, PPC::LR, PPC::CR0,
6872 /* 177 */ PPC::X0, PPC::X4, PPC::X5, PPC::X11, PPC::LR8, PPC::CR0,
6873 /* 183 */ PPC::X0, PPC::X2, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::LR8, PPC::CTR8, PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7,
6874 /* 201 */ PPC::R3, PPC::LR,
6875 /* 203 */ PPC::LR,
6876 /* 204 */ PPC::LR8,
6877 /* 205 */ PPC::RM, PPC::RM,
6878 /* 207 */ PPC::CTR, PPC::RM,
6879 /* 209 */ PPC::CTR8, PPC::RM,
6880 /* 211 */ PPC::RM, PPC::CR6,
6881 /* 213 */ PPC::CTR, PPC::LR, PPC::RM, PPC::LR, PPC::CTR,
6882 /* 218 */ PPC::CTR, PPC::RM, PPC::LR, PPC::CTR,
6883 }
6884};
6885
6886
6887#ifdef __GNUC__
6888#pragma GCC diagnostic push
6889#pragma GCC diagnostic ignored "-Woverlength-strings"
6890#endif
6891extern const char PPCInstrNameData[] = {
6892 /* 0 */ "G_FLOG10\0"
6893 /* 9 */ "SYNCP10\0"
6894 /* 17 */ "WAITP10\0"
6895 /* 25 */ "G_FEXP10\0"
6896 /* 34 */ "MTFSB0\0"
6897 /* 41 */ "V_SET0\0"
6898 /* 48 */ "VCTSXS_0\0"
6899 /* 57 */ "VCTUXS_0\0"
6900 /* 66 */ "VCFSX_0\0"
6901 /* 74 */ "VCFUX_0\0"
6902 /* 82 */ "MTFSB1\0"
6903 /* 89 */ "DMXXINSTFDMR512\0"
6904 /* 105 */ "DMXXEXTFDMR512\0"
6905 /* 120 */ "ADDISdtprelHA32\0"
6906 /* 136 */ "ATOMIC_LOAD_SUB_I32\0"
6907 /* 156 */ "ATOMIC_LOAD_ADD_I32\0"
6908 /* 176 */ "ATOMIC_LOAD_NAND_I32\0"
6909 /* 197 */ "ATOMIC_LOAD_AND_I32\0"
6910 /* 217 */ "ATOMIC_LOAD_UMIN_I32\0"
6911 /* 238 */ "ATOMIC_LOAD_MIN_I32\0"
6912 /* 258 */ "ATOMIC_SWAP_I32\0"
6913 /* 274 */ "ATOMIC_CMP_SWAP_I32\0"
6914 /* 294 */ "ATOMIC_LOAD_XOR_I32\0"
6915 /* 314 */ "ATOMIC_LOAD_OR_I32\0"
6916 /* 333 */ "ATOMIC_LOAD_UMAX_I32\0"
6917 /* 354 */ "ATOMIC_LOAD_MAX_I32\0"
6918 /* 374 */ "ADDItlsgdL32\0"
6919 /* 387 */ "ADDItlsldL32\0"
6920 /* 400 */ "LDgotTprelL32\0"
6921 /* 414 */ "ADDIdtprelL32\0"
6922 /* 428 */ "ADDItlsgdLADDR32\0"
6923 /* 445 */ "ADDItlsldLADDR32\0"
6924 /* 462 */ "GETtlsldADDR32\0"
6925 /* 477 */ "GETtlsADDR32\0"
6926 /* 490 */ "PREPARE_PROBED_ALLOCA_32\0"
6927 /* 515 */ "LWA_32\0"
6928 /* 522 */ "PROBED_STACKALLOC_32\0"
6929 /* 543 */ "PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32\0"
6930 /* 585 */ "SRADI_32\0"
6931 /* 594 */ "RLDICL_32\0"
6932 /* 604 */ "RLDICR_32\0"
6933 /* 614 */ "LHAXTLS_32\0"
6934 /* 625 */ "LWAXTLS_32\0"
6935 /* 636 */ "STBXTLS_32\0"
6936 /* 647 */ "STHXTLS_32\0"
6937 /* 658 */ "STWXTLS_32\0"
6938 /* 669 */ "LBZXTLS_32\0"
6939 /* 680 */ "LHZXTLS_32\0"
6940 /* 691 */ "LWZXTLS_32\0"
6941 /* 702 */ "EXTSW_32\0"
6942 /* 711 */ "LWAX_32\0"
6943 /* 719 */ "DFLOADf32\0"
6944 /* 729 */ "XFLOADf32\0"
6945 /* 739 */ "DFSTOREf32\0"
6946 /* 750 */ "XFSTOREf32\0"
6947 /* 761 */ "EH_SjLj_LongJmp32\0"
6948 /* 779 */ "EH_SjLj_SetJmp32\0"
6949 /* 796 */ "TLBRE2\0"
6950 /* 803 */ "TLBWE2\0"
6951 /* 810 */ "G_FLOG2\0"
6952 /* 818 */ "G_FEXP2\0"
6953 /* 826 */ "PMXVBF16GER2\0"
6954 /* 839 */ "PMXVF16GER2\0"
6955 /* 851 */ "PMXVI16GER2\0"
6956 /* 863 */ "TLBSX2\0"
6957 /* 870 */ "ATOMIC_LOAD_SUB_I64\0"
6958 /* 890 */ "ATOMIC_LOAD_ADD_I64\0"
6959 /* 910 */ "ATOMIC_LOAD_NAND_I64\0"
6960 /* 931 */ "ATOMIC_LOAD_AND_I64\0"
6961 /* 951 */ "ATOMIC_LOAD_UMIN_I64\0"
6962 /* 972 */ "ATOMIC_LOAD_MIN_I64\0"
6963 /* 992 */ "ATOMIC_SWAP_I64\0"
6964 /* 1008 */ "ATOMIC_CMP_SWAP_I64\0"
6965 /* 1028 */ "ATOMIC_LOAD_XOR_I64\0"
6966 /* 1048 */ "ATOMIC_LOAD_OR_I64\0"
6967 /* 1067 */ "ATOMIC_LOAD_UMAX_I64\0"
6968 /* 1088 */ "ATOMIC_LOAD_MAX_I64\0"
6969 /* 1108 */ "DST64\0"
6970 /* 1114 */ "DSTST64\0"
6971 /* 1122 */ "DSTT64\0"
6972 /* 1129 */ "DSTSTT64\0"
6973 /* 1138 */ "EXTSB8_32_64\0"
6974 /* 1151 */ "EXTSH8_32_64\0"
6975 /* 1164 */ "EXTSWSLI_32_64\0"
6976 /* 1179 */ "RLDICL_32_64\0"
6977 /* 1192 */ "EXTSW_32_64\0"
6978 /* 1204 */ "PREPARE_PROBED_ALLOCA_64\0"
6979 /* 1229 */ "PROBED_STACKALLOC_64\0"
6980 /* 1250 */ "PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64\0"
6981 /* 1292 */ "DFLOADf64\0"
6982 /* 1302 */ "XFLOADf64\0"
6983 /* 1312 */ "DFSTOREf64\0"
6984 /* 1323 */ "XFSTOREf64\0"
6985 /* 1334 */ "EH_SjLj_LongJmp64\0"
6986 /* 1352 */ "EH_SjLj_SetJmp64\0"
6987 /* 1369 */ "ADD4\0"
6988 /* 1374 */ "SELECT_CC_SPE4\0"
6989 /* 1389 */ "SELECT_SPE4\0"
6990 /* 1401 */ "SELECT_CC_F4\0"
6991 /* 1414 */ "SELECT_F4\0"
6992 /* 1424 */ "SELECT_CC_I4\0"
6993 /* 1437 */ "SELECT_I4\0"
6994 /* 1447 */ "PMXVI8GER4\0"
6995 /* 1458 */ "XVCVSPBF16\0"
6996 /* 1469 */ "SELECT_CC_F16\0"
6997 /* 1483 */ "SELECT_F16\0"
6998 /* 1494 */ "ATOMIC_LOAD_SUB_I16\0"
6999 /* 1514 */ "ATOMIC_LOAD_ADD_I16\0"
7000 /* 1534 */ "ATOMIC_LOAD_NAND_I16\0"
7001 /* 1555 */ "ATOMIC_LOAD_AND_I16\0"
7002 /* 1575 */ "ATOMIC_LOAD_UMIN_I16\0"
7003 /* 1596 */ "ATOMIC_LOAD_MIN_I16\0"
7004 /* 1616 */ "ATOMIC_SWAP_I16\0"
7005 /* 1632 */ "ATOMIC_CMP_SWAP_I16\0"
7006 /* 1652 */ "ATOMIC_LOAD_XOR_I16\0"
7007 /* 1672 */ "ATOMIC_LOAD_OR_I16\0"
7008 /* 1691 */ "ATOMIC_LOAD_UMAX_I16\0"
7009 /* 1712 */ "ATOMIC_LOAD_MAX_I16\0"
7010 /* 1732 */ "DMXXINSTFDMR256\0"
7011 /* 1748 */ "DMXXEXTFDMR256\0"
7012 /* 1763 */ "NOP_GT_PWR6\0"
7013 /* 1775 */ "NOP_GT_PWR7\0"
7014 /* 1787 */ "ATOMIC_LOAD_SUB_I128\0"
7015 /* 1808 */ "ATOMIC_LOAD_ADD_I128\0"
7016 /* 1829 */ "ATOMIC_LOAD_NAND_I128\0"
7017 /* 1851 */ "ATOMIC_LOAD_AND_I128\0"
7018 /* 1872 */ "ATOMIC_SWAP_I128\0"
7019 /* 1889 */ "ATOMIC_CMP_SWAP_I128\0"
7020 /* 1910 */ "ATOMIC_LOAD_XOR_I128\0"
7021 /* 1931 */ "ATOMIC_LOAD_OR_I128\0"
7022 /* 1951 */ "TAILBA8\0"
7023 /* 1959 */ "PLHA8\0"
7024 /* 1965 */ "ADDIStocHA8\0"
7025 /* 1977 */ "BLA8\0"
7026 /* 1982 */ "PLA8\0"
7027 /* 1987 */ "PLWA8\0"
7028 /* 1993 */ "TAILB8\0"
7029 /* 2000 */ "CMPB8\0"
7030 /* 2006 */ "CMPRB8\0"
7031 /* 2013 */ "EXTSB8\0"
7032 /* 2020 */ "SETB8\0"
7033 /* 2026 */ "MFTB8\0"
7034 /* 2032 */ "POPCNTB8\0"
7035 /* 2041 */ "PSTB8\0"
7036 /* 2047 */ "SETNBC8\0"
7037 /* 2055 */ "SETBC8\0"
7038 /* 2062 */ "ADDC8\0"
7039 /* 2068 */ "ANDC8\0"
7040 /* 2074 */ "SUBFC8\0"
7041 /* 2081 */ "ADDIC8\0"
7042 /* 2088 */ "SUBFIC8\0"
7043 /* 2096 */ "DYNALLOC8\0"
7044 /* 2106 */ "ORC8\0"
7045 /* 2111 */ "CDTBCD8\0"
7046 /* 2119 */ "ADD8\0"
7047 /* 2124 */ "MADDLD8\0"
7048 /* 2132 */ "NAND8\0"
7049 /* 2138 */ "CBCDTD8\0"
7050 /* 2146 */ "CFENCE8\0"
7051 /* 2154 */ "ADDE8\0"
7052 /* 2160 */ "SUBFE8\0"
7053 /* 2167 */ "ADDME8\0"
7054 /* 2174 */ "SUBFME8\0"
7055 /* 2182 */ "ADDZE8\0"
7056 /* 2189 */ "SUBFZE8\0"
7057 /* 2197 */ "SUBF8\0"
7058 /* 2203 */ "MFOCRF8\0"
7059 /* 2211 */ "MTOCRF8\0"
7060 /* 2219 */ "MTCRF8\0"
7061 /* 2226 */ "SELECT_CC_F8\0"
7062 /* 2239 */ "SELECT_F8\0"
7063 /* 2249 */ "NEG8\0"
7064 /* 2254 */ "BRH8\0"
7065 /* 2259 */ "EXTSH8\0"
7066 /* 2266 */ "PSTH8\0"
7067 /* 2272 */ "PADDI8\0"
7068 /* 2279 */ "MULLI8\0"
7069 /* 2286 */ "PLI8\0"
7070 /* 2291 */ "RLWIMI8\0"
7071 /* 2299 */ "XORI8\0"
7072 /* 2305 */ "ATOMIC_LOAD_SUB_I8\0"
7073 /* 2324 */ "SELECT_CC_I8\0"
7074 /* 2337 */ "ATOMIC_LOAD_ADD_I8\0"
7075 /* 2356 */ "ATOMIC_LOAD_NAND_I8\0"
7076 /* 2376 */ "ATOMIC_LOAD_AND_I8\0"
7077 /* 2395 */ "ATOMIC_LOAD_UMIN_I8\0"
7078 /* 2415 */ "ATOMIC_LOAD_MIN_I8\0"
7079 /* 2434 */ "ATOMIC_SWAP_I8\0"
7080 /* 2449 */ "ATOMIC_CMP_SWAP_I8\0"
7081 /* 2468 */ "ATOMIC_LOAD_XOR_I8\0"
7082 /* 2487 */ "ATOMIC_LOAD_OR_I8\0"
7083 /* 2505 */ "SELECT_I8\0"
7084 /* 2515 */ "ATOMIC_LOAD_UMAX_I8\0"
7085 /* 2535 */ "ATOMIC_LOAD_MAX_I8\0"
7086 /* 2554 */ "HASHCHK8\0"
7087 /* 2563 */ "BL8\0"
7088 /* 2567 */ "ISEL8\0"
7089 /* 2573 */ "BCTRL8\0"
7090 /* 2580 */ "BCCTRL8\0"
7091 /* 2588 */ "BCCCTRL8\0"
7092 /* 2597 */ "ADDItocL8\0"
7093 /* 2607 */ "RLWINM8\0"
7094 /* 2615 */ "RLWNM8\0"
7095 /* 2622 */ "HASHCHKP8\0"
7096 /* 2632 */ "HASHSTP8\0"
7097 /* 2641 */ "SETNBCR8\0"
7098 /* 2650 */ "SETBCR8\0"
7099 /* 2658 */ "MFCR8\0"
7100 /* 2664 */ "PMXVI4GER8\0"
7101 /* 2675 */ "BLR8\0"
7102 /* 2680 */ "MFLR8\0"
7103 /* 2686 */ "MTLR8\0"
7104 /* 2692 */ "BDZLR8\0"
7105 /* 2699 */ "BDNZLR8\0"
7106 /* 2707 */ "MovePCtoLR8\0"
7107 /* 2719 */ "NOR8\0"
7108 /* 2724 */ "XOR8\0"
7109 /* 2729 */ "MFSPR8\0"
7110 /* 2736 */ "MTSPR8\0"
7111 /* 2743 */ "TAILBCTR8\0"
7112 /* 2753 */ "BCCTR8\0"
7113 /* 2760 */ "BCCCTR8\0"
7114 /* 2768 */ "MFCTR8\0"
7115 /* 2775 */ "MTCTR8\0"
7116 /* 2782 */ "ADDG6S8\0"
7117 /* 2790 */ "ADDIS8\0"
7118 /* 2797 */ "LIS8\0"
7119 /* 2802 */ "XORIS8\0"
7120 /* 2809 */ "DYNAREAOFFSET8\0"
7121 /* 2824 */ "ANDI_rec_1_EQ_BIT8\0"
7122 /* 2843 */ "ANDI_rec_1_GT_BIT8\0"
7123 /* 2862 */ "HASHST8\0"
7124 /* 2870 */ "LHAU8\0"
7125 /* 2876 */ "STBU8\0"
7126 /* 2882 */ "STHU8\0"
7127 /* 2888 */ "STWU8\0"
7128 /* 2894 */ "LBZU8\0"
7129 /* 2900 */ "LHZU8\0"
7130 /* 2906 */ "LWZU8\0"
7131 /* 2912 */ "EQV8\0"
7132 /* 2917 */ "SLW8\0"
7133 /* 2922 */ "BRW8\0"
7134 /* 2927 */ "SRW8\0"
7135 /* 2932 */ "PSTW8\0"
7136 /* 2938 */ "CNTLZW8\0"
7137 /* 2946 */ "CNTTZW8\0"
7138 /* 2954 */ "LHAX8\0"
7139 /* 2960 */ "STBX8\0"
7140 /* 2966 */ "ADDEX8\0"
7141 /* 2973 */ "STHX8\0"
7142 /* 2979 */ "TLSGDAIX8\0"
7143 /* 2989 */ "TLSLDAIX8\0"
7144 /* 2999 */ "LHBRX8\0"
7145 /* 3006 */ "LWBRX8\0"
7146 /* 3013 */ "LHAUX8\0"
7147 /* 3020 */ "STBUX8\0"
7148 /* 3027 */ "STHUX8\0"
7149 /* 3034 */ "STWUX8\0"
7150 /* 3041 */ "LBZUX8\0"
7151 /* 3048 */ "LHZUX8\0"
7152 /* 3055 */ "LWZUX8\0"
7153 /* 3062 */ "STWX8\0"
7154 /* 3068 */ "LBZX8\0"
7155 /* 3074 */ "LHZX8\0"
7156 /* 3080 */ "LWZX8\0"
7157 /* 3086 */ "CP_COPY8\0"
7158 /* 3095 */ "PLBZ8\0"
7159 /* 3101 */ "BDZ8\0"
7160 /* 3106 */ "PLHZ8\0"
7161 /* 3112 */ "BDNZ8\0"
7162 /* 3118 */ "PLWZ8\0"
7163 /* 3124 */ "ADDItoc8\0"
7164 /* 3133 */ "TCRETURNai8\0"
7165 /* 3145 */ "TCRETURNdi8\0"
7166 /* 3157 */ "TCRETURNri8\0"
7167 /* 3169 */ "EVMHEGSMFAA\0"
7168 /* 3181 */ "EVMHOGSMFAA\0"
7169 /* 3193 */ "EVMWSMFAA\0"
7170 /* 3203 */ "EVMWSSFAA\0"
7171 /* 3213 */ "EVMHEGSMIAA\0"
7172 /* 3225 */ "EVMHOGSMIAA\0"
7173 /* 3237 */ "EVMWSMIAA\0"
7174 /* 3247 */ "EVMHEGUMIAA\0"
7175 /* 3259 */ "EVMHOGUMIAA\0"
7176 /* 3271 */ "EVMWUMIAA\0"
7177 /* 3281 */ "DCBA\0"
7178 /* 3286 */ "TAILBA\0"
7179 /* 3293 */ "LDtocBA\0"
7180 /* 3301 */ "gBCA\0"
7181 /* 3306 */ "BCCA\0"
7182 /* 3311 */ "EVMHESMFA\0"
7183 /* 3321 */ "EVMWHSMFA\0"
7184 /* 3331 */ "EVMHOSMFA\0"
7185 /* 3341 */ "EVMWSMFA\0"
7186 /* 3350 */ "EVMHESSFA\0"
7187 /* 3360 */ "EVMWHSSFA\0"
7188 /* 3370 */ "EVMHOSSFA\0"
7189 /* 3380 */ "EVMWSSFA\0"
7190 /* 3389 */ "PLHA\0"
7191 /* 3394 */ "ADDIStocHA\0"
7192 /* 3405 */ "ADDIStlsgdHA\0"
7193 /* 3418 */ "ADDIStlsldHA\0"
7194 /* 3431 */ "ADDISgotTprelHA\0"
7195 /* 3447 */ "ADDISdtprelHA\0"
7196 /* 3461 */ "SLBIA\0"
7197 /* 3467 */ "TLBIA\0"
7198 /* 3473 */ "EVMHESMIA\0"
7199 /* 3483 */ "EVMWHSMIA\0"
7200 /* 3493 */ "EVMHOSMIA\0"
7201 /* 3503 */ "EVMWSMIA\0"
7202 /* 3512 */ "EVMHEUMIA\0"
7203 /* 3522 */ "EVMWHUMIA\0"
7204 /* 3532 */ "EVMWLUMIA\0"
7205 /* 3542 */ "EVMHOUMIA\0"
7206 /* 3552 */ "EVMWUMIA\0"
7207 /* 3561 */ "BLA\0"
7208 /* 3565 */ "gBCLA\0"
7209 /* 3571 */ "BCCLA\0"
7210 /* 3577 */ "PLA\0"
7211 /* 3581 */ "BDZLA\0"
7212 /* 3587 */ "BDNZLA\0"
7213 /* 3594 */ "G_FMA\0"
7214 /* 3600 */ "G_STRICT_FMA\0"
7215 /* 3613 */ "EVMRA\0"
7216 /* 3619 */ "DQUA\0"
7217 /* 3624 */ "PLWA\0"
7218 /* 3629 */ "MTVSRWA\0"
7219 /* 3637 */ "MTVRWA\0"
7220 /* 3644 */ "BDZA\0"
7221 /* 3649 */ "BDNZA\0"
7222 /* 3655 */ "V_SET0B\0"
7223 /* 3663 */ "VSRAB\0"
7224 /* 3669 */ "RFEBB\0"
7225 /* 3675 */ "VCNTMBB\0"
7226 /* 3683 */ "XVTLSBB\0"
7227 /* 3691 */ "VCLZLSBB\0"
7228 /* 3700 */ "VCTZLSBB\0"
7229 /* 3709 */ "VCMPNEB\0"
7230 /* 3717 */ "VMRGHB\0"
7231 /* 3724 */ "XXSPLTIB\0"
7232 /* 3733 */ "VMRGLB\0"
7233 /* 3740 */ "TAILB\0"
7234 /* 3746 */ "VCLRLB\0"
7235 /* 3753 */ "VRLB\0"
7236 /* 3758 */ "VSLB\0"
7237 /* 3763 */ "VPMSUMB\0"
7238 /* 3771 */ "VGNB\0"
7239 /* 3776 */ "CMPB\0"
7240 /* 3781 */ "CMPEQB\0"
7241 /* 3788 */ "CLRBHRB\0"
7242 /* 3796 */ "CMPRB\0"
7243 /* 3802 */ "VCLRRB\0"
7244 /* 3809 */ "VSRB\0"
7245 /* 3814 */ "VMULESB\0"
7246 /* 3822 */ "V_SETALLONESB\0"
7247 /* 3836 */ "VAVGSB\0"
7248 /* 3843 */ "VUPKHSB\0"
7249 /* 3851 */ "VSPLTISB\0"
7250 /* 3860 */ "VUPKLSB\0"
7251 /* 3868 */ "VMINSB\0"
7252 /* 3875 */ "VMULOSB\0"
7253 /* 3883 */ "VCMPGTSB\0"
7254 /* 3892 */ "EVEXTSB\0"
7255 /* 3900 */ "VMAXSB\0"
7256 /* 3907 */ "SETB\0"
7257 /* 3912 */ "MFTB\0"
7258 /* 3917 */ "VSPLTB\0"
7259 /* 3924 */ "VPOPCNTB\0"
7260 /* 3933 */ "VINSERTB\0"
7261 /* 3942 */ "PSTB\0"
7262 /* 3947 */ "ReadTB\0"
7263 /* 3954 */ "VABSDUB\0"
7264 /* 3962 */ "VMULEUB\0"
7265 /* 3970 */ "VAVGUB\0"
7266 /* 3977 */ "VMINUB\0"
7267 /* 3984 */ "VMULOUB\0"
7268 /* 3992 */ "VCMPEQUB\0"
7269 /* 4001 */ "EFDSUB\0"
7270 /* 4008 */ "G_FSUB\0"
7271 /* 4015 */ "G_STRICT_FSUB\0"
7272 /* 4029 */ "G_ATOMICRMW_FSUB\0"
7273 /* 4046 */ "FMSUB\0"
7274 /* 4052 */ "FNMSUB\0"
7275 /* 4059 */ "EFSSUB\0"
7276 /* 4066 */ "EVFSSUB\0"
7277 /* 4074 */ "G_SUB\0"
7278 /* 4080 */ "G_ATOMICRMW_SUB\0"
7279 /* 4096 */ "VEXTRACTUB\0"
7280 /* 4107 */ "VCMPGTUB\0"
7281 /* 4116 */ "VMAXUB\0"
7282 /* 4123 */ "XXBLENDVB\0"
7283 /* 4133 */ "VCMPNEZB\0"
7284 /* 4142 */ "VCLZB\0"
7285 /* 4148 */ "VCTZB\0"
7286 /* 4154 */ "SETNBC\0"
7287 /* 4161 */ "SETBC\0"
7288 /* 4167 */ "gBC\0"
7289 /* 4171 */ "XXMFACC\0"
7290 /* 4179 */ "XXMTACC\0"
7291 /* 4187 */ "BUILD_UACC\0"
7292 /* 4198 */ "RESTORE_UACC\0"
7293 /* 4211 */ "SPILL_UACC\0"
7294 /* 4222 */ "RESTORE_WACC\0"
7295 /* 4235 */ "SPILL_WACC\0"
7296 /* 4246 */ "RESTORE_ACC\0"
7297 /* 4258 */ "SPILL_ACC\0"
7298 /* 4268 */ "BCC\0"
7299 /* 4272 */ "ADDC\0"
7300 /* 4277 */ "XXLANDC\0"
7301 /* 4285 */ "CRANDC\0"
7302 /* 4292 */ "EVANDC\0"
7303 /* 4299 */ "TABORTDC\0"
7304 /* 4308 */ "DTSTDC\0"
7305 /* 4315 */ "SUBFC\0"
7306 /* 4321 */ "SUBIC\0"
7307 /* 4327 */ "ADDIC\0"
7308 /* 4333 */ "RLDIC\0"
7309 /* 4339 */ "SUBFIC\0"
7310 /* 4346 */ "XSRDPIC\0"
7311 /* 4354 */ "XVRDPIC\0"
7312 /* 4362 */ "XVRSPIC\0"
7313 /* 4370 */ "G_INTRINSIC\0"
7314 /* 4382 */ "ICBLC\0"
7315 /* 4388 */ "BRINC\0"
7316 /* 4394 */ "G_FPTRUNC\0"
7317 /* 4404 */ "G_INTRINSIC_TRUNC\0"
7318 /* 4422 */ "G_TRUNC\0"
7319 /* 4430 */ "G_BUILD_VECTOR_TRUNC\0"
7320 /* 4451 */ "SLBSYNC\0"
7321 /* 4459 */ "TLBSYNC\0"
7322 /* 4467 */ "MSGSYNC\0"
7323 /* 4475 */ "ISYNC\0"
7324 /* 4481 */ "MSYNC\0"
7325 /* 4487 */ "G_DYN_STACKALLOC\0"
7326 /* 4504 */ "DYNALLOC\0"
7327 /* 4513 */ "BL8_NOTOC\0"
7328 /* 4523 */ "SELECT_CC_VSFRC\0"
7329 /* 4539 */ "SELECT_VSFRC\0"
7330 /* 4552 */ "XXLORC\0"
7331 /* 4559 */ "CRORC\0"
7332 /* 4565 */ "EVORC\0"
7333 /* 4571 */ "SELECT_CC_VRRC\0"
7334 /* 4586 */ "SELECT_VRRC\0"
7335 /* 4598 */ "SELECT_CC_VSSRC\0"
7336 /* 4614 */ "SELECT_VSSRC\0"
7337 /* 4627 */ "SELECT_CC_VSRC\0"
7338 /* 4642 */ "SELECT_VSRC\0"
7339 /* 4654 */ "SC\0"
7340 /* 4657 */ "TABORTWC\0"
7341 /* 4666 */ "VEXTSB2D\0"
7342 /* 4675 */ "VEXTSH2D\0"
7343 /* 4684 */ "VEXTSW2D\0"
7344 /* 4693 */ "TLBSX2D\0"
7345 /* 4701 */ "G_FMAD\0"
7346 /* 4708 */ "VSHASIGMAD\0"
7347 /* 4719 */ "G_INDEXED_SEXTLOAD\0"
7348 /* 4738 */ "G_SEXTLOAD\0"
7349 /* 4749 */ "G_INDEXED_ZEXTLOAD\0"
7350 /* 4768 */ "G_ZEXTLOAD\0"
7351 /* 4779 */ "G_INDEXED_LOAD\0"
7352 /* 4794 */ "G_LOAD\0"
7353 /* 4801 */ "VSRAD\0"
7354 /* 4807 */ "VGBBD\0"
7355 /* 4813 */ "VCNTMBD\0"
7356 /* 4821 */ "VPRTYBD\0"
7357 /* 4829 */ "DENBCD\0"
7358 /* 4836 */ "CDTBCD\0"
7359 /* 4843 */ "EFDADD\0"
7360 /* 4850 */ "G_VECREDUCE_FADD\0"
7361 /* 4867 */ "G_FADD\0"
7362 /* 4874 */ "G_VECREDUCE_SEQ_FADD\0"
7363 /* 4895 */ "G_STRICT_FADD\0"
7364 /* 4909 */ "G_ATOMICRMW_FADD\0"
7365 /* 4926 */ "FMADD\0"
7366 /* 4932 */ "FNMADD\0"
7367 /* 4939 */ "EFSADD\0"
7368 /* 4946 */ "EVFSADD\0"
7369 /* 4954 */ "G_VECREDUCE_ADD\0"
7370 /* 4970 */ "G_ADD\0"
7371 /* 4976 */ "G_PTR_ADD\0"
7372 /* 4986 */ "G_ATOMICRMW_ADD\0"
7373 /* 5002 */ "EVLDD\0"
7374 /* 5008 */ "MTVSRDD\0"
7375 /* 5016 */ "EVSTDD\0"
7376 /* 5023 */ "VCFUGED\0"
7377 /* 5031 */ "EFSCFD\0"
7378 /* 5038 */ "PLFD\0"
7379 /* 5043 */ "PSTFD\0"
7380 /* 5049 */ "FNEGD\0"
7381 /* 5055 */ "VNEGD\0"
7382 /* 5061 */ "MADDHD\0"
7383 /* 5068 */ "MULHD\0"
7384 /* 5074 */ "FCFID\0"
7385 /* 5080 */ "HRFID\0"
7386 /* 5086 */ "EFDCFSID\0"
7387 /* 5095 */ "FCTID\0"
7388 /* 5101 */ "EFDCFUID\0"
7389 /* 5110 */ "TLBLD\0"
7390 /* 5116 */ "MADDLD\0"
7391 /* 5123 */ "FSELD\0"
7392 /* 5129 */ "VMULLD\0"
7393 /* 5136 */ "CMPLD\0"
7394 /* 5142 */ "MFVSRLD\0"
7395 /* 5150 */ "VRLD\0"
7396 /* 5155 */ "VSLD\0"
7397 /* 5160 */ "SPILLTOVSR_LD\0"
7398 /* 5174 */ "FRIMD\0"
7399 /* 5180 */ "VBPERMD\0"
7400 /* 5188 */ "VPMSUMD\0"
7401 /* 5196 */ "XXLAND\0"
7402 /* 5203 */ "XXLNAND\0"
7403 /* 5211 */ "CRNAND\0"
7404 /* 5218 */ "EVNAND\0"
7405 /* 5225 */ "G_ATOMICRMW_NAND\0"
7406 /* 5242 */ "CRAND\0"
7407 /* 5248 */ "EVAND\0"
7408 /* 5254 */ "G_VECREDUCE_AND\0"
7409 /* 5270 */ "G_AND\0"
7410 /* 5276 */ "G_ATOMICRMW_AND\0"
7411 /* 5292 */ "TEND\0"
7412 /* 5297 */ "LIFETIME_END\0"
7413 /* 5310 */ "FCPSGND\0"
7414 /* 5318 */ "FRIND\0"
7415 /* 5324 */ "G_BRCOND\0"
7416 /* 5333 */ "DRRND\0"
7417 /* 5339 */ "SETRND\0"
7418 /* 5346 */ "G_LLROUND\0"
7419 /* 5356 */ "G_LROUND\0"
7420 /* 5365 */ "G_INTRINSIC_ROUND\0"
7421 /* 5383 */ "G_INTRINSIC_FPTRUNC_ROUND\0"
7422 /* 5409 */ "FCMPOD\0"
7423 /* 5416 */ "DDEDPD\0"
7424 /* 5423 */ "VPDEPD\0"
7425 /* 5430 */ "FRIPD\0"
7426 /* 5436 */ "CMPD\0"
7427 /* 5441 */ "LOAD_STACK_GUARD\0"
7428 /* 5458 */ "XXBRD\0"
7429 /* 5464 */ "BUILD_QUADWORD\0"
7430 /* 5479 */ "RESTORE_QUADWORD\0"
7431 /* 5496 */ "SPILL_QUADWORD\0"
7432 /* 5511 */ "SPLIT_QUADWORD\0"
7433 /* 5526 */ "MTMSRD\0"
7434 /* 5533 */ "MFVSRD\0"
7435 /* 5540 */ "MTVSRD\0"
7436 /* 5547 */ "MFVRD\0"
7437 /* 5553 */ "MTVRD\0"
7438 /* 5559 */ "FABSD\0"
7439 /* 5565 */ "FNABSD\0"
7440 /* 5572 */ "VMODSD\0"
7441 /* 5579 */ "VMULESD\0"
7442 /* 5587 */ "VDIVESD\0"
7443 /* 5595 */ "VMULHSD\0"
7444 /* 5603 */ "VMINSD\0"
7445 /* 5610 */ "VINSD\0"
7446 /* 5616 */ "VMULOSD\0"
7447 /* 5624 */ "VCMPGTSD\0"
7448 /* 5633 */ "VDIVSD\0"
7449 /* 5640 */ "VMAXSD\0"
7450 /* 5647 */ "PLXSD\0"
7451 /* 5653 */ "PSTXSD\0"
7452 /* 5660 */ "VEXTRACTD\0"
7453 /* 5670 */ "CBCDTD\0"
7454 /* 5677 */ "VPOPCNTD\0"
7455 /* 5686 */ "VINSERTD\0"
7456 /* 5695 */ "PSTD\0"
7457 /* 5700 */ "VPEXTD\0"
7458 /* 5707 */ "VMSUMCUD\0"
7459 /* 5716 */ "VMODUD\0"
7460 /* 5723 */ "VMULEUD\0"
7461 /* 5731 */ "VDIVEUD\0"
7462 /* 5739 */ "VMULHUD\0"
7463 /* 5747 */ "VMINUD\0"
7464 /* 5754 */ "VMULOUD\0"
7465 /* 5762 */ "FCMPUD\0"
7466 /* 5769 */ "VCMPEQUD\0"
7467 /* 5778 */ "VCMPGTUD\0"
7468 /* 5787 */ "VDIVUD\0"
7469 /* 5794 */ "VMAXUD\0"
7470 /* 5801 */ "XXBLENDVD\0"
7471 /* 5811 */ "DIVD\0"
7472 /* 5816 */ "FRIZD\0"
7473 /* 5822 */ "VCLZD\0"
7474 /* 5828 */ "CNTLZD\0"
7475 /* 5835 */ "VCTZD\0"
7476 /* 5841 */ "CNTTZD\0"
7477 /* 5848 */ "PSEUDO_PROBE\0"
7478 /* 5861 */ "MFBHRBE\0"
7479 /* 5869 */ "G_SSUBE\0"
7480 /* 5877 */ "G_USUBE\0"
7481 /* 5885 */ "CFENCE\0"
7482 /* 5892 */ "G_FENCE\0"
7483 /* 5900 */ "ARITH_FENCE\0"
7484 /* 5912 */ "REG_SEQUENCE\0"
7485 /* 5925 */ "MFFSCE\0"
7486 /* 5932 */ "G_SADDE\0"
7487 /* 5940 */ "G_UADDE\0"
7488 /* 5948 */ "G_GET_FPMODE\0"
7489 /* 5961 */ "G_RESET_FPMODE\0"
7490 /* 5976 */ "G_SET_FPMODE\0"
7491 /* 5989 */ "DIVDE\0"
7492 /* 5995 */ "G_FMINNUM_IEEE\0"
7493 /* 6010 */ "G_FMAXNUM_IEEE\0"
7494 /* 6025 */ "SLBMFEE\0"
7495 /* 6033 */ "WRTEE\0"
7496 /* 6039 */ "SUBFE\0"
7497 /* 6045 */ "EVLWHE\0"
7498 /* 6052 */ "EVSTWHE\0"
7499 /* 6060 */ "SLBIE\0"
7500 /* 6066 */ "TLBIE\0"
7501 /* 6072 */ "G_VSCALE\0"
7502 /* 6081 */ "G_JUMP_TABLE\0"
7503 /* 6094 */ "BUNDLE\0"
7504 /* 6101 */ "ADDME\0"
7505 /* 6107 */ "SUBFME\0"
7506 /* 6114 */ "G_MEMCPY_INLINE\0"
7507 /* 6130 */ "LOCAL_ESCAPE\0"
7508 /* 6143 */ "SELECT_CC_SPE\0"
7509 /* 6157 */ "SELECT_SPE\0"
7510 /* 6168 */ "TLBRE\0"
7511 /* 6174 */ "FRE\0"
7512 /* 6178 */ "G_STACKRESTORE\0"
7513 /* 6193 */ "G_INDEXED_STORE\0"
7514 /* 6209 */ "G_STORE\0"
7515 /* 6217 */ "G_BITREVERSE\0"
7516 /* 6230 */ "SLBMTE\0"
7517 /* 6237 */ "FRSQRTE\0"
7518 /* 6245 */ "DBG_VALUE\0"
7519 /* 6255 */ "G_GLOBAL_VALUE\0"
7520 /* 6270 */ "G_PTRAUTH_GLOBAL_VALUE\0"
7521 /* 6293 */ "CONVERGENCECTRL_GLUE\0"
7522 /* 6314 */ "G_STACKSAVE\0"
7523 /* 6326 */ "MFVRSAVE\0"
7524 /* 6335 */ "MTVRSAVE\0"
7525 /* 6344 */ "G_MEMMOVE\0"
7526 /* 6354 */ "TLBWE\0"
7527 /* 6360 */ "DIVWE\0"
7528 /* 6366 */ "EVSTWWE\0"
7529 /* 6374 */ "ADDZE\0"
7530 /* 6380 */ "G_FREEZE\0"
7531 /* 6389 */ "SUBFZE\0"
7532 /* 6396 */ "G_FCANONICALIZE\0"
7533 /* 6412 */ "DCBF\0"
7534 /* 6417 */ "SUBF\0"
7535 /* 6422 */ "G_CTLZ_ZERO_UNDEF\0"
7536 /* 6440 */ "G_CTTZ_ZERO_UNDEF\0"
7537 /* 6458 */ "G_IMPLICIT_DEF\0"
7538 /* 6473 */ "DBG_INSTR_REF\0"
7539 /* 6487 */ "EVMHESMF\0"
7540 /* 6496 */ "EVMWHSMF\0"
7541 /* 6505 */ "EVMHOSMF\0"
7542 /* 6514 */ "EVMWSMF\0"
7543 /* 6522 */ "MCRF\0"
7544 /* 6527 */ "MFOCRF\0"
7545 /* 6534 */ "MTOCRF\0"
7546 /* 6541 */ "MTCRF\0"
7547 /* 6547 */ "EFDCFSF\0"
7548 /* 6555 */ "EFSCFSF\0"
7549 /* 6563 */ "EVFSCFSF\0"
7550 /* 6572 */ "MTFSF\0"
7551 /* 6578 */ "EVMHESSF\0"
7552 /* 6587 */ "EVMWHSSF\0"
7553 /* 6596 */ "EVMHOSSF\0"
7554 /* 6605 */ "EVMWSSF\0"
7555 /* 6613 */ "EFDCTSF\0"
7556 /* 6621 */ "EFSCTSF\0"
7557 /* 6629 */ "EVFSCTSF\0"
7558 /* 6638 */ "DTSTSF\0"
7559 /* 6645 */ "EFDCFUF\0"
7560 /* 6653 */ "EFSCFUF\0"
7561 /* 6661 */ "EVFSCFUF\0"
7562 /* 6670 */ "EFDCTUF\0"
7563 /* 6678 */ "EFSCTUF\0"
7564 /* 6686 */ "EVFSCTUF\0"
7565 /* 6695 */ "DTSTDG\0"
7566 /* 6702 */ "SLBIEG\0"
7567 /* 6709 */ "EFDNEG\0"
7568 /* 6716 */ "G_FNEG\0"
7569 /* 6723 */ "EFSNEG\0"
7570 /* 6730 */ "EVFSNEG\0"
7571 /* 6738 */ "EVNEG\0"
7572 /* 6744 */ "EXTRACT_SUBREG\0"
7573 /* 6759 */ "INSERT_SUBREG\0"
7574 /* 6773 */ "G_SEXT_INREG\0"
7575 /* 6786 */ "SUBREG_TO_REG\0"
7576 /* 6800 */ "G_ATOMIC_CMPXCHG\0"
7577 /* 6817 */ "G_ATOMICRMW_XCHG\0"
7578 /* 6834 */ "G_FLOG\0"
7579 /* 6841 */ "G_VAARG\0"
7580 /* 6849 */ "PREALLOCATED_ARG\0"
7581 /* 6866 */ "V_SET0H\0"
7582 /* 6874 */ "VSRAH\0"
7583 /* 6880 */ "VCNTMBH\0"
7584 /* 6888 */ "G_PREFETCH\0"
7585 /* 6899 */ "EVLDH\0"
7586 /* 6905 */ "EVSTDH\0"
7587 /* 6912 */ "VCMPNEH\0"
7588 /* 6920 */ "VMRGHH\0"
7589 /* 6927 */ "VMRGLH\0"
7590 /* 6934 */ "VRLH\0"
7591 /* 6939 */ "VSLH\0"
7592 /* 6944 */ "G_SMULH\0"
7593 /* 6952 */ "G_UMULH\0"
7594 /* 6960 */ "VPMSUMH\0"
7595 /* 6968 */ "G_FTANH\0"
7596 /* 6976 */ "G_FSINH\0"
7597 /* 6984 */ "XXBRH\0"
7598 /* 6990 */ "VSRH\0"
7599 /* 6995 */ "VMULESH\0"
7600 /* 7003 */ "V_SETALLONESH\0"
7601 /* 7017 */ "VAVGSH\0"
7602 /* 7024 */ "VUPKHSH\0"
7603 /* 7032 */ "VSPLTISH\0"
7604 /* 7041 */ "VUPKLSH\0"
7605 /* 7049 */ "VMINSH\0"
7606 /* 7056 */ "G_FCOSH\0"
7607 /* 7064 */ "VMULOSH\0"
7608 /* 7072 */ "VCMPGTSH\0"
7609 /* 7081 */ "EVEXTSH\0"
7610 /* 7089 */ "VMAXSH\0"
7611 /* 7096 */ "VSPLTH\0"
7612 /* 7103 */ "VPOPCNTH\0"
7613 /* 7112 */ "VINSERTH\0"
7614 /* 7121 */ "PSTH\0"
7615 /* 7126 */ "VABSDUH\0"
7616 /* 7134 */ "VMULEUH\0"
7617 /* 7142 */ "VAVGUH\0"
7618 /* 7149 */ "VMINUH\0"
7619 /* 7156 */ "VMULOUH\0"
7620 /* 7164 */ "VCMPEQUH\0"
7621 /* 7173 */ "VEXTRACTUH\0"
7622 /* 7184 */ "VCMPGTUH\0"
7623 /* 7193 */ "VMAXUH\0"
7624 /* 7200 */ "XXBLENDVH\0"
7625 /* 7210 */ "VCMPNEZH\0"
7626 /* 7219 */ "VCLZH\0"
7627 /* 7225 */ "VCTZH\0"
7628 /* 7231 */ "DQUAI\0"
7629 /* 7237 */ "DCBI\0"
7630 /* 7242 */ "ICBI\0"
7631 /* 7247 */ "VSLDBI\0"
7632 /* 7254 */ "VSRDBI\0"
7633 /* 7261 */ "PSUBI\0"
7634 /* 7267 */ "DCCCI\0"
7635 /* 7273 */ "ICCCI\0"
7636 /* 7279 */ "TABORTDCI\0"
7637 /* 7289 */ "RFCI\0"
7638 /* 7294 */ "RFMCI\0"
7639 /* 7300 */ "TABORTWCI\0"
7640 /* 7310 */ "SRADI\0"
7641 /* 7316 */ "PADDI\0"
7642 /* 7322 */ "RFDI\0"
7643 /* 7327 */ "CMPLDI\0"
7644 /* 7334 */ "CLRLSLDI\0"
7645 /* 7343 */ "EXTLDI\0"
7646 /* 7350 */ "XXPERMDI\0"
7647 /* 7359 */ "CMPDI\0"
7648 /* 7365 */ "CLRRDI\0"
7649 /* 7372 */ "INSRDI\0"
7650 /* 7379 */ "ROTRDI\0"
7651 /* 7386 */ "EXTRDI\0"
7652 /* 7393 */ "TDI\0"
7653 /* 7397 */ "WRTEEI\0"
7654 /* 7404 */ "RFI\0"
7655 /* 7408 */ "MTFSFI\0"
7656 /* 7415 */ "DTSTSFI\0"
7657 /* 7423 */ "EVSPLATFI\0"
7658 /* 7433 */ "EVMERGEHI\0"
7659 /* 7443 */ "EVMERGELOHI\0"
7660 /* 7455 */ "DBG_PHI\0"
7661 /* 7463 */ "DMXXINSTFDMR512_HI\0"
7662 /* 7482 */ "DMXXEXTFDMR512_HI\0"
7663 /* 7500 */ "TLBLI\0"
7664 /* 7506 */ "DSCLI\0"
7665 /* 7512 */ "MULLI\0"
7666 /* 7518 */ "PLI\0"
7667 /* 7522 */ "EXTSWSLI\0"
7668 /* 7531 */ "MTVSRBMI\0"
7669 /* 7540 */ "VRLDMI\0"
7670 /* 7547 */ "RLDIMI\0"
7671 /* 7554 */ "RLWIMI\0"
7672 /* 7561 */ "VRLQMI\0"
7673 /* 7568 */ "EVMHESMI\0"
7674 /* 7577 */ "EVMWHSMI\0"
7675 /* 7586 */ "EVMHOSMI\0"
7676 /* 7595 */ "EVMWSMI\0"
7677 /* 7603 */ "EVMHEUMI\0"
7678 /* 7612 */ "EVMWHUMI\0"
7679 /* 7621 */ "EVMWLUMI\0"
7680 /* 7630 */ "EVMHOUMI\0"
7681 /* 7639 */ "EVMWUMI\0"
7682 /* 7647 */ "VRLWMI\0"
7683 /* 7654 */ "MFFSCRNI\0"
7684 /* 7663 */ "MFFSCDRNI\0"
7685 /* 7673 */ "VSLDOI\0"
7686 /* 7680 */ "XSRDPI\0"
7687 /* 7687 */ "XVRDPI\0"
7688 /* 7694 */ "XSRQPI\0"
7689 /* 7701 */ "XVRSPI\0"
7690 /* 7708 */ "DSCRI\0"
7691 /* 7714 */ "XORI\0"
7692 /* 7719 */ "EFDCFSI\0"
7693 /* 7727 */ "EFSCFSI\0"
7694 /* 7735 */ "EVFSCFSI\0"
7695 /* 7744 */ "G_FPTOSI\0"
7696 /* 7753 */ "EFDCTSI\0"
7697 /* 7761 */ "EFSCTSI\0"
7698 /* 7769 */ "EVFSCTSI\0"
7699 /* 7778 */ "EVSPLATI\0"
7700 /* 7787 */ "LDtocJTI\0"
7701 /* 7796 */ "EFDCFUI\0"
7702 /* 7804 */ "EFSCFUI\0"
7703 /* 7812 */ "EVFSCFUI\0"
7704 /* 7821 */ "G_FPTOUI\0"
7705 /* 7830 */ "EFDCTUI\0"
7706 /* 7838 */ "EFSCTUI\0"
7707 /* 7846 */ "EVFSCTUI\0"
7708 /* 7855 */ "SRAWI\0"
7709 /* 7861 */ "XXSLDWI\0"
7710 /* 7869 */ "CMPLWI\0"
7711 /* 7876 */ "EVRLWI\0"
7712 /* 7883 */ "CLRLSLWI\0"
7713 /* 7892 */ "INSLWI\0"
7714 /* 7899 */ "EVSLWI\0"
7715 /* 7906 */ "EXTLWI\0"
7716 /* 7913 */ "G_FPOWI\0"
7717 /* 7921 */ "CMPWI\0"
7718 /* 7927 */ "CLRRWI\0"
7719 /* 7934 */ "INSRWI\0"
7720 /* 7941 */ "ROTRWI\0"
7721 /* 7948 */ "EXTRWI\0"
7722 /* 7955 */ "LSWI\0"
7723 /* 7960 */ "STSWI\0"
7724 /* 7966 */ "TWI\0"
7725 /* 7970 */ "TCHECK\0"
7726 /* 7977 */ "HASHCHK\0"
7727 /* 7985 */ "G_PTRMASK\0"
7728 /* 7995 */ "XXEVAL\0"
7729 /* 8002 */ "VSTRIBL\0"
7730 /* 8010 */ "gBCL\0"
7731 /* 8015 */ "BCCL\0"
7732 /* 8020 */ "RLDCL\0"
7733 /* 8026 */ "RLDICL\0"
7734 /* 8033 */ "GC_LABEL\0"
7735 /* 8042 */ "DBG_LABEL\0"
7736 /* 8052 */ "EH_LABEL\0"
7737 /* 8061 */ "ANNOTATION_LABEL\0"
7738 /* 8078 */ "TLBIEL\0"
7739 /* 8085 */ "ICALL_BRANCH_FUNNEL\0"
7740 /* 8105 */ "GETtlsldADDRPCREL\0"
7741 /* 8123 */ "GETtlsADDRPCREL\0"
7742 /* 8139 */ "ISEL\0"
7743 /* 8144 */ "EVSEL\0"
7744 /* 8150 */ "XXSEL\0"
7745 /* 8156 */ "DCBFL\0"
7746 /* 8162 */ "VSTRIHL\0"
7747 /* 8170 */ "G_FSHL\0"
7748 /* 8177 */ "G_SHL\0"
7749 /* 8183 */ "G_FCEIL\0"
7750 /* 8191 */ "PATCHABLE_TAIL_CALL\0"
7751 /* 8211 */ "PATCHABLE_TYPED_EVENT_CALL\0"
7752 /* 8238 */ "PATCHABLE_EVENT_CALL\0"
7753 /* 8259 */ "FENTRY_CALL\0"
7754 /* 8271 */ "DSSALL\0"
7755 /* 8278 */ "KILL\0"
7756 /* 8283 */ "LXVPRLL\0"
7757 /* 8291 */ "STXVPRLL\0"
7758 /* 8300 */ "LXVRLL\0"
7759 /* 8307 */ "STXVRLL\0"
7760 /* 8315 */ "LXVLL\0"
7761 /* 8321 */ "STXVLL\0"
7762 /* 8328 */ "G_CONSTANT_POOL\0"
7763 /* 8344 */ "BLRL\0"
7764 /* 8349 */ "gBCLRL\0"
7765 /* 8356 */ "BCCLRL\0"
7766 /* 8363 */ "BDZLRL\0"
7767 /* 8370 */ "BDNZLRL\0"
7768 /* 8378 */ "LXVPRL\0"
7769 /* 8385 */ "STXVPRL\0"
7770 /* 8393 */ "BCTRL\0"
7771 /* 8399 */ "gBCCTRL\0"
7772 /* 8407 */ "BCCCTRL\0"
7773 /* 8415 */ "LXVRL\0"
7774 /* 8421 */ "STXVRL\0"
7775 /* 8428 */ "MFFSL\0"
7776 /* 8434 */ "LVSL\0"
7777 /* 8439 */ "G_ROTL\0"
7778 /* 8446 */ "EFDMUL\0"
7779 /* 8453 */ "G_VECREDUCE_FMUL\0"
7780 /* 8470 */ "G_FMUL\0"
7781 /* 8477 */ "G_VECREDUCE_SEQ_FMUL\0"
7782 /* 8498 */ "G_STRICT_FMUL\0"
7783 /* 8512 */ "EFSMUL\0"
7784 /* 8519 */ "EVFSMUL\0"
7785 /* 8527 */ "G_VECREDUCE_MUL\0"
7786 /* 8543 */ "G_MUL\0"
7787 /* 8549 */ "LXVL\0"
7788 /* 8554 */ "STXVL\0"
7789 /* 8560 */ "LBARXL\0"
7790 /* 8567 */ "LDARXL\0"
7791 /* 8574 */ "LHARXL\0"
7792 /* 8581 */ "LQARXL\0"
7793 /* 8588 */ "LWARXL\0"
7794 /* 8595 */ "LVXL\0"
7795 /* 8600 */ "STVXL\0"
7796 /* 8606 */ "DCBZL\0"
7797 /* 8612 */ "BDZL\0"
7798 /* 8617 */ "BDNZL\0"
7799 /* 8623 */ "LDtocL\0"
7800 /* 8630 */ "ADDItocL\0"
7801 /* 8639 */ "LWZtocL\0"
7802 /* 8647 */ "ADDItlsgdL\0"
7803 /* 8658 */ "ADDItlsldL\0"
7804 /* 8669 */ "LDgotTprelL\0"
7805 /* 8681 */ "ADDIdtprelL\0"
7806 /* 8693 */ "VEXPANDBM\0"
7807 /* 8703 */ "VMSUMMBM\0"
7808 /* 8712 */ "MTVSRBM\0"
7809 /* 8720 */ "VEXTRACTBM\0"
7810 /* 8731 */ "VSUBUBM\0"
7811 /* 8739 */ "VADDUBM\0"
7812 /* 8747 */ "VMSUMUBM\0"
7813 /* 8756 */ "XXGENPCVBM\0"
7814 /* 8767 */ "VEXPANDDM\0"
7815 /* 8777 */ "MTVSRDM\0"
7816 /* 8785 */ "VEXTRACTDM\0"
7817 /* 8796 */ "VSUBUDM\0"
7818 /* 8804 */ "VADDUDM\0"
7819 /* 8812 */ "VMSUMUDM\0"
7820 /* 8821 */ "XXGENPCVDM\0"
7821 /* 8832 */ "VCLZDM\0"
7822 /* 8839 */ "CNTLZDM\0"
7823 /* 8847 */ "VCTZDM\0"
7824 /* 8854 */ "CNTTZDM\0"
7825 /* 8862 */ "G_FREM\0"
7826 /* 8869 */ "G_STRICT_FREM\0"
7827 /* 8883 */ "G_SREM\0"
7828 /* 8890 */ "G_UREM\0"
7829 /* 8897 */ "G_SDIVREM\0"
7830 /* 8907 */ "G_UDIVREM\0"
7831 /* 8917 */ "VEXPANDHM\0"
7832 /* 8927 */ "MTVSRHM\0"
7833 /* 8935 */ "VMSUMSHM\0"
7834 /* 8944 */ "VEXTRACTHM\0"
7835 /* 8955 */ "VSUBUHM\0"
7836 /* 8963 */ "VMLADDUHM\0"
7837 /* 8973 */ "VADDUHM\0"
7838 /* 8981 */ "VMSUMUHM\0"
7839 /* 8990 */ "XXGENPCVHM\0"
7840 /* 9001 */ "TRECLAIM\0"
7841 /* 9010 */ "VRFIM\0"
7842 /* 9016 */ "XSRDPIM\0"
7843 /* 9024 */ "XVRDPIM\0"
7844 /* 9032 */ "XVRSPIM\0"
7845 /* 9040 */ "SETFLM\0"
7846 /* 9047 */ "VRLDNM\0"
7847 /* 9054 */ "RLWINM\0"
7848 /* 9061 */ "VRLQNM\0"
7849 /* 9068 */ "VRLWNM\0"
7850 /* 9075 */ "VEXPANDQM\0"
7851 /* 9085 */ "MTVSRQM\0"
7852 /* 9093 */ "VEXTRACTQM\0"
7853 /* 9104 */ "VSUBUQM\0"
7854 /* 9112 */ "VADDUQM\0"
7855 /* 9120 */ "VSUBEUQM\0"
7856 /* 9129 */ "VADDEUQM\0"
7857 /* 9138 */ "VPERM\0"
7858 /* 9144 */ "XXPERM\0"
7859 /* 9151 */ "BLA8_RM\0"
7860 /* 9159 */ "BL8_RM\0"
7861 /* 9166 */ "BCTRL8_RM\0"
7862 /* 9176 */ "BLA_RM\0"
7863 /* 9183 */ "BL8_NOTOC_RM\0"
7864 /* 9196 */ "BL_RM\0"
7865 /* 9202 */ "BCTRL_RM\0"
7866 /* 9211 */ "BLA8_NOP_RM\0"
7867 /* 9223 */ "BL8_NOP_RM\0"
7868 /* 9234 */ "BL_NOP_RM\0"
7869 /* 9244 */ "BCTRL8_LDinto_toc_RM\0"
7870 /* 9265 */ "BCTRL_LWZinto_toc_RM\0"
7871 /* 9286 */ "INLINEASM\0"
7872 /* 9296 */ "VPKUDUM\0"
7873 /* 9304 */ "VPKUHUM\0"
7874 /* 9312 */ "G_VECREDUCE_FMINIMUM\0"
7875 /* 9333 */ "G_FMINIMUM\0"
7876 /* 9344 */ "G_VECREDUCE_FMAXIMUM\0"
7877 /* 9365 */ "G_FMAXIMUM\0"
7878 /* 9376 */ "G_FMINNUM\0"
7879 /* 9386 */ "G_FMAXNUM\0"
7880 /* 9396 */ "VPKUWUM\0"
7881 /* 9404 */ "VEXPANDWM\0"
7882 /* 9414 */ "MTVSRWM\0"
7883 /* 9422 */ "VEXTRACTWM\0"
7884 /* 9433 */ "VSUBUWM\0"
7885 /* 9441 */ "VADDUWM\0"
7886 /* 9449 */ "VMULUWM\0"
7887 /* 9457 */ "XXGENPCVWM\0"
7888 /* 9468 */ "EVMHEGSMFAN\0"
7889 /* 9480 */ "EVMHOGSMFAN\0"
7890 /* 9492 */ "EVMWSMFAN\0"
7891 /* 9502 */ "EVMWSSFAN\0"
7892 /* 9512 */ "EVMHEGSMIAN\0"
7893 /* 9524 */ "EVMHOGSMIAN\0"
7894 /* 9536 */ "EVMWSMIAN\0"
7895 /* 9546 */ "EVMHEGUMIAN\0"
7896 /* 9558 */ "EVMHOGUMIAN\0"
7897 /* 9570 */ "EVMWUMIAN\0"
7898 /* 9580 */ "G_FATAN\0"
7899 /* 9588 */ "G_FTAN\0"
7900 /* 9595 */ "G_INTRINSIC_ROUNDEVEN\0"
7901 /* 9617 */ "G_ASSERT_ALIGN\0"
7902 /* 9632 */ "G_FCOPYSIGN\0"
7903 /* 9644 */ "VRFIN\0"
7904 /* 9650 */ "TBEGIN\0"
7905 /* 9657 */ "G_VECREDUCE_FMIN\0"
7906 /* 9674 */ "G_ATOMICRMW_FMIN\0"
7907 /* 9691 */ "G_VECREDUCE_SMIN\0"
7908 /* 9708 */ "G_SMIN\0"
7909 /* 9715 */ "G_VECREDUCE_UMIN\0"
7910 /* 9732 */ "G_UMIN\0"
7911 /* 9739 */ "G_ATOMICRMW_UMIN\0"
7912 /* 9756 */ "G_ATOMICRMW_MIN\0"
7913 /* 9772 */ "MFSRIN\0"
7914 /* 9779 */ "MTSRIN\0"
7915 /* 9786 */ "G_FASIN\0"
7916 /* 9794 */ "G_FSIN\0"
7917 /* 9801 */ "PMXVBF16GER2NN\0"
7918 /* 9816 */ "PMXVF16GER2NN\0"
7919 /* 9830 */ "PMXVF32GERNN\0"
7920 /* 9843 */ "PMXVF64GERNN\0"
7921 /* 9856 */ "PMXVBF16GER2WNN\0"
7922 /* 9872 */ "PMXVF16GER2WNN\0"
7923 /* 9887 */ "PMXVF32GERWNN\0"
7924 /* 9901 */ "PMXVF64GERWNN\0"
7925 /* 9915 */ "CFI_INSTRUCTION\0"
7926 /* 9931 */ "PMXVBF16GER2PN\0"
7927 /* 9946 */ "PMXVF16GER2PN\0"
7928 /* 9960 */ "XSCVSPDPN\0"
7929 /* 9970 */ "PMXVF32GERPN\0"
7930 /* 9983 */ "PMXVF64GERPN\0"
7931 /* 9996 */ "XVCVBF16SPN\0"
7932 /* 10008 */ "XSCVDPSPN\0"
7933 /* 10018 */ "PMXVBF16GER2WPN\0"
7934 /* 10034 */ "PMXVF16GER2WPN\0"
7935 /* 10049 */ "PMXVF32GERWPN\0"
7936 /* 10063 */ "PMXVF64GERWPN\0"
7937 /* 10077 */ "DARN\0"
7938 /* 10082 */ "MFFSCRN\0"
7939 /* 10090 */ "MFFSCDRN\0"
7940 /* 10099 */ "DRINTN\0"
7941 /* 10106 */ "ATTN\0"
7942 /* 10111 */ "ADJCALLSTACKDOWN\0"
7943 /* 10128 */ "ADD4O\0"
7944 /* 10134 */ "ADDC8O\0"
7945 /* 10141 */ "SUBFC8O\0"
7946 /* 10149 */ "ADD8O\0"
7947 /* 10155 */ "ADDE8O\0"
7948 /* 10162 */ "SUBFE8O\0"
7949 /* 10170 */ "ADDME8O\0"
7950 /* 10178 */ "SUBFME8O\0"
7951 /* 10187 */ "ADDZE8O\0"
7952 /* 10195 */ "SUBFZE8O\0"
7953 /* 10204 */ "SUBF8O\0"
7954 /* 10211 */ "NEG8O\0"
7955 /* 10217 */ "G_SSUBO\0"
7956 /* 10225 */ "G_USUBO\0"
7957 /* 10233 */ "ADDCO\0"
7958 /* 10239 */ "SUBFCO\0"
7959 /* 10246 */ "G_SADDO\0"
7960 /* 10254 */ "G_UADDO\0"
7961 /* 10262 */ "MULLDO\0"
7962 /* 10269 */ "LQX_PSEUDO\0"
7963 /* 10280 */ "STQX_PSEUDO\0"
7964 /* 10292 */ "DIVDO\0"
7965 /* 10298 */ "ADDEO\0"
7966 /* 10304 */ "DIVDEO\0"
7967 /* 10311 */ "SUBFEO\0"
7968 /* 10318 */ "ADDMEO\0"
7969 /* 10325 */ "SUBFMEO\0"
7970 /* 10333 */ "DIVWEO\0"
7971 /* 10340 */ "ADDZEO\0"
7972 /* 10347 */ "SUBFZEO\0"
7973 /* 10355 */ "SUBFO\0"
7974 /* 10361 */ "JUMP_TABLE_DEBUG_INFO\0"
7975 /* 10383 */ "NEGO\0"
7976 /* 10388 */ "EVSTWHO\0"
7977 /* 10396 */ "PseudoEIEIO\0"
7978 /* 10408 */ "EnforceIEIO\0"
7979 /* 10420 */ "EVMERGELO\0"
7980 /* 10430 */ "EVMERGEHILO\0"
7981 /* 10442 */ "VSLO\0"
7982 /* 10447 */ "G_SMULO\0"
7983 /* 10455 */ "G_UMULO\0"
7984 /* 10463 */ "XSCVQPDPO\0"
7985 /* 10473 */ "DCMPO\0"
7986 /* 10479 */ "XSNMSUBQPO\0"
7987 /* 10490 */ "XSMSUBQPO\0"
7988 /* 10500 */ "XSSUBQPO\0"
7989 /* 10509 */ "XSNMADDQPO\0"
7990 /* 10520 */ "XSMADDQPO\0"
7991 /* 10530 */ "XSADDQPO\0"
7992 /* 10539 */ "XSMULQPO\0"
7993 /* 10548 */ "XSSQRTQPO\0"
7994 /* 10558 */ "XSDIVQPO\0"
7995 /* 10567 */ "G_BZERO\0"
7996 /* 10575 */ "VSRO\0"
7997 /* 10580 */ "DIVDUO\0"
7998 /* 10587 */ "DIVDEUO\0"
7999 /* 10595 */ "DIVWEUO\0"
8000 /* 10603 */ "DIVWUO\0"
8001 /* 10610 */ "MULLWO\0"
8002 /* 10617 */ "DIVWO\0"
8003 /* 10623 */ "EVSTWWO\0"
8004 /* 10631 */ "STACKMAP\0"
8005 /* 10640 */ "NAP\0"
8006 /* 10644 */ "G_DEBUGTRAP\0"
8007 /* 10656 */ "G_UBSANTRAP\0"
8008 /* 10668 */ "G_TRAP\0"
8009 /* 10675 */ "G_ATOMICRMW_UDEC_WRAP\0"
8010 /* 10697 */ "G_ATOMICRMW_UINC_WRAP\0"
8011 /* 10719 */ "G_BSWAP\0"
8012 /* 10727 */ "XSNMSUBADP\0"
8013 /* 10738 */ "XVNMSUBADP\0"
8014 /* 10749 */ "XSMSUBADP\0"
8015 /* 10759 */ "XVMSUBADP\0"
8016 /* 10769 */ "XSNMADDADP\0"
8017 /* 10780 */ "XVNMADDADP\0"
8018 /* 10791 */ "XSMADDADP\0"
8019 /* 10801 */ "XVMADDADP\0"
8020 /* 10811 */ "XSSUBDP\0"
8021 /* 10819 */ "XVSUBDP\0"
8022 /* 10827 */ "XSTSTDCDP\0"
8023 /* 10837 */ "XVTSTDCDP\0"
8024 /* 10847 */ "XSMINCDP\0"
8025 /* 10856 */ "XSMAXCDP\0"
8026 /* 10865 */ "XSADDDP\0"
8027 /* 10873 */ "XVADDDP\0"
8028 /* 10881 */ "XSCVSXDDP\0"
8029 /* 10891 */ "XVCVSXDDP\0"
8030 /* 10901 */ "XSCVUXDDP\0"
8031 /* 10911 */ "XVCVUXDDP\0"
8032 /* 10921 */ "XSCMPGEDP\0"
8033 /* 10931 */ "XVCMPGEDP\0"
8034 /* 10941 */ "XSREDP\0"
8035 /* 10948 */ "XVREDP\0"
8036 /* 10955 */ "XSRSQRTEDP\0"
8037 /* 10966 */ "XVRSQRTEDP\0"
8038 /* 10977 */ "XSNEGDP\0"
8039 /* 10985 */ "XVNEGDP\0"
8040 /* 10993 */ "XSXSIGDP\0"
8041 /* 11002 */ "XVXSIGDP\0"
8042 /* 11011 */ "XXSPLTIDP\0"
8043 /* 11021 */ "XSMINJDP\0"
8044 /* 11030 */ "XSMAXJDP\0"
8045 /* 11039 */ "XSMULDP\0"
8046 /* 11047 */ "XVMULDP\0"
8047 /* 11055 */ "XSNMSUBMDP\0"
8048 /* 11066 */ "XVNMSUBMDP\0"
8049 /* 11077 */ "XSMSUBMDP\0"
8050 /* 11087 */ "XVMSUBMDP\0"
8051 /* 11097 */ "XSNMADDMDP\0"
8052 /* 11108 */ "XVNMADDMDP\0"
8053 /* 11119 */ "XSMADDMDP\0"
8054 /* 11129 */ "XVMADDMDP\0"
8055 /* 11139 */ "XSCPSGNDP\0"
8056 /* 11149 */ "XVCPSGNDP\0"
8057 /* 11159 */ "XSMINDP\0"
8058 /* 11167 */ "XVMINDP\0"
8059 /* 11175 */ "XSCMPODP\0"
8060 /* 11184 */ "XSCVHPDP\0"
8061 /* 11193 */ "XSCVQPDP\0"
8062 /* 11202 */ "XSCVSPDP\0"
8063 /* 11211 */ "XVCVSPDP\0"
8064 /* 11220 */ "XSIEXPDP\0"
8065 /* 11229 */ "XVIEXPDP\0"
8066 /* 11238 */ "XSCMPEXPDP\0"
8067 /* 11249 */ "XSXEXPDP\0"
8068 /* 11258 */ "XVXEXPDP\0"
8069 /* 11267 */ "XSCMPEQDP\0"
8070 /* 11277 */ "XVCMPEQDP\0"
8071 /* 11287 */ "XSNABSDP\0"
8072 /* 11296 */ "XVNABSDP\0"
8073 /* 11305 */ "XSABSDP\0"
8074 /* 11313 */ "XVABSDP\0"
8075 /* 11321 */ "DCTDP\0"
8076 /* 11327 */ "XSCMPGTDP\0"
8077 /* 11337 */ "XVCMPGTDP\0"
8078 /* 11347 */ "XSSQRTDP\0"
8079 /* 11356 */ "XSTSQRTDP\0"
8080 /* 11366 */ "XVTSQRTDP\0"
8081 /* 11376 */ "XVSQRTDP\0"
8082 /* 11385 */ "XSCMPUDP\0"
8083 /* 11394 */ "XSDIVDP\0"
8084 /* 11402 */ "XSTDIVDP\0"
8085 /* 11411 */ "XVTDIVDP\0"
8086 /* 11420 */ "XVDIVDP\0"
8087 /* 11428 */ "XVCVSXWDP\0"
8088 /* 11438 */ "XVCVUXWDP\0"
8089 /* 11448 */ "XSMAXDP\0"
8090 /* 11456 */ "XVMAXDP\0"
8091 /* 11464 */ "CTRL_DEP\0"
8092 /* 11473 */ "DCBFEP\0"
8093 /* 11480 */ "ICBIEP\0"
8094 /* 11487 */ "DCBZLEP\0"
8095 /* 11495 */ "DCBTEP\0"
8096 /* 11502 */ "DCBSTEP\0"
8097 /* 11510 */ "DCBTSTEP\0"
8098 /* 11519 */ "DCBZEP\0"
8099 /* 11526 */ "VCMPBFP\0"
8100 /* 11534 */ "VNMSUBFP\0"
8101 /* 11543 */ "VSUBFP\0"
8102 /* 11550 */ "VMADDFP\0"
8103 /* 11558 */ "VADDFP\0"
8104 /* 11565 */ "VLOGEFP\0"
8105 /* 11573 */ "VCMPGEFP\0"
8106 /* 11582 */ "VREFP\0"
8107 /* 11588 */ "VEXPTEFP\0"
8108 /* 11597 */ "VRSQRTEFP\0"
8109 /* 11607 */ "VMINFP\0"
8110 /* 11614 */ "G_SITOFP\0"
8111 /* 11623 */ "G_UITOFP\0"
8112 /* 11632 */ "VCMPEQFP\0"
8113 /* 11641 */ "VCMPGTFP\0"
8114 /* 11650 */ "VMAXFP\0"
8115 /* 11657 */ "XSCVDPHP\0"
8116 /* 11666 */ "XVCVSPHP\0"
8117 /* 11675 */ "VRFIP\0"
8118 /* 11681 */ "XSRDPIP\0"
8119 /* 11689 */ "XVRDPIP\0"
8120 /* 11697 */ "XVRSPIP\0"
8121 /* 11705 */ "HASHCHKP\0"
8122 /* 11714 */ "DCBFLP\0"
8123 /* 11721 */ "G_FCMP\0"
8124 /* 11728 */ "G_ICMP\0"
8125 /* 11735 */ "G_SCMP\0"
8126 /* 11742 */ "G_UCMP\0"
8127 /* 11749 */ "PMXVBF16GER2NP\0"
8128 /* 11764 */ "PMXVF16GER2NP\0"
8129 /* 11778 */ "PMXVF32GERNP\0"
8130 /* 11791 */ "PMXVF64GERNP\0"
8131 /* 11804 */ "PMXVBF16GER2WNP\0"
8132 /* 11820 */ "PMXVF16GER2WNP\0"
8133 /* 11835 */ "PMXVF32GERWNP\0"
8134 /* 11849 */ "PMXVF64GERWNP\0"
8135 /* 11863 */ "BLA8_NOP\0"
8136 /* 11872 */ "BL8_NOP\0"
8137 /* 11880 */ "UNENCODED_NOP\0"
8138 /* 11894 */ "BL_NOP\0"
8139 /* 11901 */ "CONVERGENCECTRL_LOOP\0"
8140 /* 11922 */ "G_CTPOP\0"
8141 /* 11930 */ "STOP\0"
8142 /* 11935 */ "PATCHABLE_OP\0"
8143 /* 11948 */ "FAULTING_OP\0"
8144 /* 11960 */ "PMXVBF16GER2PP\0"
8145 /* 11975 */ "PMXVF16GER2PP\0"
8146 /* 11989 */ "PMXVI16GER2PP\0"
8147 /* 12003 */ "PMXVI8GER4PP\0"
8148 /* 12016 */ "PMXVI4GER8PP\0"
8149 /* 12029 */ "PMXVF32GERPP\0"
8150 /* 12042 */ "PMXVF64GERPP\0"
8151 /* 12055 */ "PMXVI16GER2SPP\0"
8152 /* 12070 */ "PMXVI8GER4SPP\0"
8153 /* 12084 */ "PMXVI8GER4WSPP\0"
8154 /* 12099 */ "PMXVBF16GER2WPP\0"
8155 /* 12115 */ "PMXVF16GER2WPP\0"
8156 /* 12130 */ "PMXVI16GER2WPP\0"
8157 /* 12145 */ "PMXVI8GER4WPP\0"
8158 /* 12159 */ "PMXVI4GER8WPP\0"
8159 /* 12173 */ "PMXVF32GERWPP\0"
8160 /* 12187 */ "PMXVF64GERWPP\0"
8161 /* 12201 */ "PMXVI16GER2SWPP\0"
8162 /* 12217 */ "XSNMSUBQP\0"
8163 /* 12227 */ "XSMSUBQP\0"
8164 /* 12236 */ "XSSUBQP\0"
8165 /* 12244 */ "XSTSTDCQP\0"
8166 /* 12254 */ "XSMINCQP\0"
8167 /* 12263 */ "XSMAXCQP\0"
8168 /* 12272 */ "XSNMADDQP\0"
8169 /* 12282 */ "XSMADDQP\0"
8170 /* 12291 */ "XSADDQP\0"
8171 /* 12299 */ "XSCVSDQP\0"
8172 /* 12308 */ "XSCVUDQP\0"
8173 /* 12317 */ "XSCMPGEQP\0"
8174 /* 12327 */ "XSNEGQP\0"
8175 /* 12335 */ "XSXSIGQP\0"
8176 /* 12344 */ "XSMULQP\0"
8177 /* 12352 */ "XSCPSGNQP\0"
8178 /* 12362 */ "XSCMPOQP\0"
8179 /* 12371 */ "XSCVDPQP\0"
8180 /* 12380 */ "XSIEXPQP\0"
8181 /* 12389 */ "XSCMPEXPQP\0"
8182 /* 12400 */ "XSXEXPQP\0"
8183 /* 12409 */ "XSCMPEQQP\0"
8184 /* 12419 */ "XSCVSQQP\0"
8185 /* 12428 */ "XSCVUQQP\0"
8186 /* 12437 */ "XSNABSQP\0"
8187 /* 12446 */ "XSABSQP\0"
8188 /* 12454 */ "XSCMPGTQP\0"
8189 /* 12464 */ "XSSQRTQP\0"
8190 /* 12473 */ "XSCMPUQP\0"
8191 /* 12482 */ "XSDIVQP\0"
8192 /* 12490 */ "XSNMSUBASP\0"
8193 /* 12501 */ "XVNMSUBASP\0"
8194 /* 12512 */ "XSMSUBASP\0"
8195 /* 12522 */ "XVMSUBASP\0"
8196 /* 12532 */ "XSNMADDASP\0"
8197 /* 12543 */ "XVNMADDASP\0"
8198 /* 12554 */ "XSMADDASP\0"
8199 /* 12564 */ "XVMADDASP\0"
8200 /* 12574 */ "XSSUBSP\0"
8201 /* 12582 */ "XVSUBSP\0"
8202 /* 12590 */ "XSTSTDCSP\0"
8203 /* 12600 */ "XVTSTDCSP\0"
8204 /* 12610 */ "XSADDSP\0"
8205 /* 12618 */ "XVADDSP\0"
8206 /* 12626 */ "XSCVSXDSP\0"
8207 /* 12636 */ "XVCVSXDSP\0"
8208 /* 12646 */ "XSCVUXDSP\0"
8209 /* 12656 */ "XVCVUXDSP\0"
8210 /* 12666 */ "XVCMPGESP\0"
8211 /* 12676 */ "XSRESP\0"
8212 /* 12683 */ "XVRESP\0"
8213 /* 12690 */ "XSRSQRTESP\0"
8214 /* 12701 */ "XVRSQRTESP\0"
8215 /* 12712 */ "XVNEGSP\0"
8216 /* 12720 */ "XVXSIGSP\0"
8217 /* 12729 */ "XSMULSP\0"
8218 /* 12737 */ "XVMULSP\0"
8219 /* 12745 */ "XSNMSUBMSP\0"
8220 /* 12756 */ "XVNMSUBMSP\0"
8221 /* 12767 */ "XSMSUBMSP\0"
8222 /* 12777 */ "XVMSUBMSP\0"
8223 /* 12787 */ "XSNMADDMSP\0"
8224 /* 12798 */ "XVNMADDMSP\0"
8225 /* 12809 */ "XSMADDMSP\0"
8226 /* 12819 */ "XVMADDMSP\0"
8227 /* 12829 */ "XVCPSGNSP\0"
8228 /* 12839 */ "XVMINSP\0"
8229 /* 12847 */ "XSCVDPSP\0"
8230 /* 12856 */ "XVCVDPSP\0"
8231 /* 12865 */ "XVCVHPSP\0"
8232 /* 12874 */ "XVIEXPSP\0"
8233 /* 12883 */ "XVXEXPSP\0"
8234 /* 12892 */ "XVCMPEQSP\0"
8235 /* 12902 */ "DRSP\0"
8236 /* 12907 */ "FRSP\0"
8237 /* 12912 */ "XSRSP\0"
8238 /* 12918 */ "XVNABSSP\0"
8239 /* 12927 */ "XVABSSP\0"
8240 /* 12935 */ "PLXSSP\0"
8241 /* 12942 */ "PSTXSSP\0"
8242 /* 12950 */ "XVCMPGTSP\0"
8243 /* 12960 */ "XSSQRTSP\0"
8244 /* 12969 */ "XVTSQRTSP\0"
8245 /* 12979 */ "XVSQRTSP\0"
8246 /* 12988 */ "XSDIVSP\0"
8247 /* 12996 */ "XVTDIVSP\0"
8248 /* 13005 */ "XVDIVSP\0"
8249 /* 13013 */ "XVCVSXWSP\0"
8250 /* 13023 */ "XVCVUXWSP\0"
8251 /* 13033 */ "XVMAXSP\0"
8252 /* 13041 */ "HASHSTP\0"
8253 /* 13049 */ "ADJCALLSTACKUP\0"
8254 /* 13064 */ "PREALLOCATED_SETUP\0"
8255 /* 13083 */ "PLXVP\0"
8256 /* 13089 */ "PSTXVP\0"
8257 /* 13096 */ "G_FLDEXP\0"
8258 /* 13105 */ "G_STRICT_FLDEXP\0"
8259 /* 13121 */ "G_FEXP\0"
8260 /* 13128 */ "G_FFREXP\0"
8261 /* 13137 */ "XSRQPXP\0"
8262 /* 13145 */ "VEXTSD2Q\0"
8263 /* 13154 */ "VSRAQ\0"
8264 /* 13160 */ "DQUAQ\0"
8265 /* 13166 */ "DSUBQ\0"
8266 /* 13172 */ "VPRTYBQ\0"
8267 /* 13180 */ "DTSTDCQ\0"
8268 /* 13188 */ "DENBCDQ\0"
8269 /* 13196 */ "DADDQ\0"
8270 /* 13202 */ "DRRNDQ\0"
8271 /* 13209 */ "DDEDPDQ\0"
8272 /* 13217 */ "EFDCMPEQ\0"
8273 /* 13226 */ "EFSCMPEQ\0"
8274 /* 13235 */ "EVFSCMPEQ\0"
8275 /* 13245 */ "EVCMPEQ\0"
8276 /* 13253 */ "EFDTSTEQ\0"
8277 /* 13262 */ "EFSTSTEQ\0"
8278 /* 13271 */ "EVFSTSTEQ\0"
8279 /* 13281 */ "DTSTSFQ\0"
8280 /* 13289 */ "DTSTDGQ\0"
8281 /* 13297 */ "DQUAIQ\0"
8282 /* 13304 */ "DTSTSFIQ\0"
8283 /* 13313 */ "DSCLIQ\0"
8284 /* 13320 */ "DSCRIQ\0"
8285 /* 13327 */ "LXVKQ\0"
8286 /* 13333 */ "ICBLQ\0"
8287 /* 13339 */ "VRLQ\0"
8288 /* 13344 */ "VSLQ\0"
8289 /* 13349 */ "DMULQ\0"
8290 /* 13355 */ "VBPERMQ\0"
8291 /* 13363 */ "DRINTNQ\0"
8292 /* 13371 */ "DCMPOQ\0"
8293 /* 13378 */ "DRDPQ\0"
8294 /* 13384 */ "DCTQPQ\0"
8295 /* 13391 */ "DCFFIXQQ\0"
8296 /* 13400 */ "DCTFIXQQ\0"
8297 /* 13409 */ "XXBRQ\0"
8298 /* 13415 */ "VSRQ\0"
8299 /* 13420 */ "VMODSQ\0"
8300 /* 13427 */ "VDIVESQ\0"
8301 /* 13435 */ "VCMPSQ\0"
8302 /* 13442 */ "VCMPGTSQ\0"
8303 /* 13451 */ "VDIVSQ\0"
8304 /* 13458 */ "STQ\0"
8305 /* 13462 */ "VMUL10UQ\0"
8306 /* 13471 */ "VMUL10CUQ\0"
8307 /* 13481 */ "VSUBCUQ\0"
8308 /* 13489 */ "VADDCUQ\0"
8309 /* 13497 */ "VMUL10ECUQ\0"
8310 /* 13508 */ "VSUBECUQ\0"
8311 /* 13517 */ "VADDECUQ\0"
8312 /* 13526 */ "VMODUQ\0"
8313 /* 13533 */ "VMUL10EUQ\0"
8314 /* 13543 */ "VDIVEUQ\0"
8315 /* 13551 */ "DCMPUQ\0"
8316 /* 13558 */ "VCMPUQ\0"
8317 /* 13565 */ "VCMPEQUQ\0"
8318 /* 13574 */ "VCMPGTUQ\0"
8319 /* 13583 */ "VDIVUQ\0"
8320 /* 13590 */ "DDIVQ\0"
8321 /* 13596 */ "DIEXQ\0"
8322 /* 13602 */ "DTSTEXQ\0"
8323 /* 13610 */ "DXEXQ\0"
8324 /* 13616 */ "DCFFIXQ\0"
8325 /* 13624 */ "DCTFIXQ\0"
8326 /* 13632 */ "DRINTXQ\0"
8327 /* 13640 */ "MBAR\0"
8328 /* 13645 */ "UpdateGBR\0"
8329 /* 13655 */ "VSTRIBR\0"
8330 /* 13663 */ "G_BR\0"
8331 /* 13668 */ "INLINEASM_BR\0"
8332 /* 13681 */ "SETNBCR\0"
8333 /* 13689 */ "SETBCR\0"
8334 /* 13696 */ "MFDCR\0"
8335 /* 13702 */ "RLDCR\0"
8336 /* 13708 */ "MTDCR\0"
8337 /* 13714 */ "MFCR\0"
8338 /* 13719 */ "RLDICR\0"
8339 /* 13726 */ "MFUDSCR\0"
8340 /* 13734 */ "MTUDSCR\0"
8341 /* 13742 */ "MFVSCR\0"
8342 /* 13749 */ "MTVSCR\0"
8343 /* 13756 */ "RESTORE_CR\0"
8344 /* 13767 */ "SPILL_CR\0"
8345 /* 13776 */ "ADDItlsgdLADDR\0"
8346 /* 13791 */ "ADDItlsldLADDR\0"
8347 /* 13806 */ "G_BLOCK_ADDR\0"
8348 /* 13819 */ "GETtlsldADDR\0"
8349 /* 13832 */ "GETtlsADDR\0"
8350 /* 13843 */ "PMXVF32GER\0"
8351 /* 13854 */ "PMXVF64GER\0"
8352 /* 13865 */ "VNCIPHER\0"
8353 /* 13874 */ "VCIPHER\0"
8354 /* 13882 */ "MEMBARRIER\0"
8355 /* 13893 */ "G_CONSTANT_FOLD_BARRIER\0"
8356 /* 13917 */ "PATCHABLE_FUNCTION_ENTER\0"
8357 /* 13942 */ "G_READCYCLECOUNTER\0"
8358 /* 13961 */ "G_READSTEADYCOUNTER\0"
8359 /* 13981 */ "G_READ_REGISTER\0"
8360 /* 13997 */ "G_WRITE_REGISTER\0"
8361 /* 14014 */ "VSTRIHR\0"
8362 /* 14022 */ "G_ASHR\0"
8363 /* 14029 */ "G_FSHR\0"
8364 /* 14036 */ "G_LSHR\0"
8365 /* 14043 */ "KILL_PAIR\0"
8366 /* 14053 */ "BLR\0"
8367 /* 14057 */ "gBCLR\0"
8368 /* 14063 */ "BCCLR\0"
8369 /* 14069 */ "MFLR\0"
8370 /* 14074 */ "MTLR\0"
8371 /* 14079 */ "BDZLR\0"
8372 /* 14085 */ "BDNZLR\0"
8373 /* 14092 */ "MovePCtoLR\0"
8374 /* 14103 */ "MoveGOTtoLR\0"
8375 /* 14115 */ "FMR\0"
8376 /* 14119 */ "DMMR\0"
8377 /* 14124 */ "MFPMR\0"
8378 /* 14130 */ "MTPMR\0"
8379 /* 14136 */ "VPERMR\0"
8380 /* 14143 */ "XXPERMR\0"
8381 /* 14151 */ "CONVERGENCECTRL_ANCHOR\0"
8382 /* 14174 */ "XXLOR\0"
8383 /* 14180 */ "XXLNOR\0"
8384 /* 14187 */ "CRNOR\0"
8385 /* 14193 */ "EVNOR\0"
8386 /* 14199 */ "G_FFLOOR\0"
8387 /* 14208 */ "CROR\0"
8388 /* 14213 */ "G_EXTRACT_SUBVECTOR\0"
8389 /* 14233 */ "G_INSERT_SUBVECTOR\0"
8390 /* 14252 */ "G_BUILD_VECTOR\0"
8391 /* 14267 */ "G_SHUFFLE_VECTOR\0"
8392 /* 14284 */ "G_SPLAT_VECTOR\0"
8393 /* 14299 */ "EVOR\0"
8394 /* 14304 */ "XXLXOR\0"
8395 /* 14311 */ "DMXOR\0"
8396 /* 14317 */ "VPERMXOR\0"
8397 /* 14326 */ "CRXOR\0"
8398 /* 14332 */ "EVXOR\0"
8399 /* 14338 */ "G_VECREDUCE_XOR\0"
8400 /* 14354 */ "G_XOR\0"
8401 /* 14360 */ "G_ATOMICRMW_XOR\0"
8402 /* 14376 */ "G_VECREDUCE_OR\0"
8403 /* 14391 */ "G_OR\0"
8404 /* 14396 */ "G_ATOMICRMW_OR\0"
8405 /* 14411 */ "MFSPR\0"
8406 /* 14417 */ "MTSPR\0"
8407 /* 14423 */ "MFSR\0"
8408 /* 14428 */ "MFMSR\0"
8409 /* 14434 */ "MTMSR\0"
8410 /* 14440 */ "MTSR\0"
8411 /* 14445 */ "LVSR\0"
8412 /* 14450 */ "TAILBCTR\0"
8413 /* 14459 */ "gBCCTR\0"
8414 /* 14466 */ "BCCCTR\0"
8415 /* 14473 */ "MFCTR\0"
8416 /* 14479 */ "MTCTR\0"
8417 /* 14485 */ "G_ROTR\0"
8418 /* 14492 */ "G_INTTOPTR\0"
8419 /* 14503 */ "PMXVI16GER2S\0"
8420 /* 14516 */ "ADDG6S\0"
8421 /* 14523 */ "EFDABS\0"
8422 /* 14530 */ "G_FABS\0"
8423 /* 14537 */ "EFDNABS\0"
8424 /* 14545 */ "EFSNABS\0"
8425 /* 14553 */ "EVFSNABS\0"
8426 /* 14562 */ "EFSABS\0"
8427 /* 14569 */ "EVFSABS\0"
8428 /* 14577 */ "EVABS\0"
8429 /* 14583 */ "G_ABS\0"
8430 /* 14589 */ "VSUM4SBS\0"
8431 /* 14598 */ "VSUBSBS\0"
8432 /* 14606 */ "VADDSBS\0"
8433 /* 14614 */ "VSUM4UBS\0"
8434 /* 14623 */ "VSUBUBS\0"
8435 /* 14631 */ "VADDUBS\0"
8436 /* 14639 */ "FSUBS\0"
8437 /* 14645 */ "FMSUBS\0"
8438 /* 14652 */ "FNMSUBS\0"
8439 /* 14660 */ "FADDS\0"
8440 /* 14666 */ "FMADDS\0"
8441 /* 14673 */ "FNMADDS\0"
8442 /* 14681 */ "FCFIDS\0"
8443 /* 14688 */ "DCBTDS\0"
8444 /* 14695 */ "DCBTSTDS\0"
8445 /* 14704 */ "XSCVDPSXDS\0"
8446 /* 14715 */ "XVCVDPSXDS\0"
8447 /* 14726 */ "XVCVSPSXDS\0"
8448 /* 14737 */ "XSCVDPUXDS\0"
8449 /* 14748 */ "XVCVDPUXDS\0"
8450 /* 14759 */ "XVCVSPUXDS\0"
8451 /* 14770 */ "V_SETALLONES\0"
8452 /* 14783 */ "FRES\0"
8453 /* 14788 */ "FRSQRTES\0"
8454 /* 14797 */ "G_UNMERGE_VALUES\0"
8455 /* 14814 */ "G_MERGE_VALUES\0"
8456 /* 14829 */ "EFDCFS\0"
8457 /* 14836 */ "MFFS\0"
8458 /* 14841 */ "PLFS\0"
8459 /* 14846 */ "MCRFS\0"
8460 /* 14852 */ "PSTFS\0"
8461 /* 14858 */ "FNEGS\0"
8462 /* 14864 */ "VSUM4SHS\0"
8463 /* 14873 */ "VSUBSHS\0"
8464 /* 14881 */ "VMHADDSHS\0"
8465 /* 14891 */ "VMHRADDSHS\0"
8466 /* 14902 */ "VADDSHS\0"
8467 /* 14910 */ "VMSUMSHS\0"
8468 /* 14919 */ "VSUBUHS\0"
8469 /* 14927 */ "VADDUHS\0"
8470 /* 14935 */ "VMSUMUHS\0"
8471 /* 14944 */ "SUBIS\0"
8472 /* 14950 */ "SUBPCIS\0"
8473 /* 14958 */ "ADDPCIS\0"
8474 /* 14966 */ "ADDIS\0"
8475 /* 14972 */ "LIS\0"
8476 /* 14976 */ "XORIS\0"
8477 /* 14982 */ "EVSRWIS\0"
8478 /* 14990 */ "FSELS\0"
8479 /* 14996 */ "ADD4TLS\0"
8480 /* 15004 */ "ADD8TLS\0"
8481 /* 15012 */ "ICBTLS\0"
8482 /* 15019 */ "LHAXTLS\0"
8483 /* 15027 */ "LWAXTLS\0"
8484 /* 15035 */ "STBXTLS\0"
8485 /* 15043 */ "LFDXTLS\0"
8486 /* 15051 */ "STFDXTLS\0"
8487 /* 15060 */ "LDXTLS\0"
8488 /* 15067 */ "STDXTLS\0"
8489 /* 15075 */ "STHXTLS\0"
8490 /* 15083 */ "LFSXTLS\0"
8491 /* 15091 */ "STFSXTLS\0"
8492 /* 15100 */ "STWXTLS\0"
8493 /* 15108 */ "LBZXTLS\0"
8494 /* 15116 */ "LHZXTLS\0"
8495 /* 15124 */ "LWZXTLS\0"
8496 /* 15132 */ "BL8_TLS\0"
8497 /* 15140 */ "BL8_NOTOC_TLS\0"
8498 /* 15154 */ "BL_TLS\0"
8499 /* 15161 */ "BL8_NOP_TLS\0"
8500 /* 15173 */ "FMULS\0"
8501 /* 15179 */ "FRIMS\0"
8502 /* 15185 */ "FCPSGNS\0"
8503 /* 15193 */ "FRINS\0"
8504 /* 15199 */ "G_FACOS\0"
8505 /* 15207 */ "G_FCOS\0"
8506 /* 15214 */ "EVLWHOS\0"
8507 /* 15222 */ "FCMPOS\0"
8508 /* 15229 */ "DCBFPS\0"
8509 /* 15236 */ "FRIPS\0"
8510 /* 15242 */ "DCBSTPS\0"
8511 /* 15250 */ "G_CONCAT_VECTORS\0"
8512 /* 15267 */ "COPY_TO_REGCLASS\0"
8513 /* 15284 */ "G_IS_FPCLASS\0"
8514 /* 15297 */ "FABSS\0"
8515 /* 15303 */ "FNABSS\0"
8516 /* 15310 */ "VPKSDSS\0"
8517 /* 15318 */ "G_ATOMIC_CMPXCHG_WITH_SUCCESS\0"
8518 /* 15348 */ "G_VECTOR_COMPRESS\0"
8519 /* 15366 */ "VPKSHSS\0"
8520 /* 15374 */ "VPKSWSS\0"
8521 /* 15382 */ "G_INTRINSIC_W_SIDE_EFFECTS\0"
8522 /* 15409 */ "G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS\0"
8523 /* 15447 */ "EVCMPGTS\0"
8524 /* 15456 */ "EVCMPLTS\0"
8525 /* 15465 */ "FSQRTS\0"
8526 /* 15472 */ "FCFIDUS\0"
8527 /* 15480 */ "VPKSDUS\0"
8528 /* 15488 */ "VPKUDUS\0"
8529 /* 15496 */ "SUBFUS\0"
8530 /* 15503 */ "VPKSHUS\0"
8531 /* 15511 */ "VPKUHUS\0"
8532 /* 15519 */ "FCMPUS\0"
8533 /* 15526 */ "VPKSWUS\0"
8534 /* 15534 */ "VPKUWUS\0"
8535 /* 15542 */ "FDIVS\0"
8536 /* 15548 */ "EVSRWS\0"
8537 /* 15555 */ "MTVSRWS\0"
8538 /* 15563 */ "VSUM2SWS\0"
8539 /* 15572 */ "VSUBSWS\0"
8540 /* 15580 */ "VADDSWS\0"
8541 /* 15588 */ "VSUMSWS\0"
8542 /* 15596 */ "VSUBUWS\0"
8543 /* 15604 */ "VADDUWS\0"
8544 /* 15612 */ "EVDIVWS\0"
8545 /* 15620 */ "XSCVDPSXWS\0"
8546 /* 15631 */ "XVCVDPSXWS\0"
8547 /* 15642 */ "XVCVSPSXWS\0"
8548 /* 15653 */ "XSCVDPUXWS\0"
8549 /* 15664 */ "XVCVDPUXWS\0"
8550 /* 15675 */ "XVCVSPUXWS\0"
8551 /* 15686 */ "VCTSXS\0"
8552 /* 15693 */ "VCTUXS\0"
8553 /* 15700 */ "FRIZS\0"
8554 /* 15706 */ "LDAT\0"
8555 /* 15711 */ "STDAT\0"
8556 /* 15717 */ "EVLHHESPLAT\0"
8557 /* 15729 */ "EVLWHSPLAT\0"
8558 /* 15740 */ "EVLHHOSSPLAT\0"
8559 /* 15753 */ "EVLHHOUSPLAT\0"
8560 /* 15766 */ "EVLWWSPLAT\0"
8561 /* 15777 */ "G_SSUBSAT\0"
8562 /* 15787 */ "G_USUBSAT\0"
8563 /* 15797 */ "G_SADDSAT\0"
8564 /* 15807 */ "G_UADDSAT\0"
8565 /* 15817 */ "G_SSHLSAT\0"
8566 /* 15827 */ "G_USHLSAT\0"
8567 /* 15837 */ "G_SMULFIXSAT\0"
8568 /* 15850 */ "G_UMULFIXSAT\0"
8569 /* 15863 */ "G_SDIVFIXSAT\0"
8570 /* 15876 */ "G_UDIVFIXSAT\0"
8571 /* 15889 */ "LWAT\0"
8572 /* 15894 */ "STWAT\0"
8573 /* 15900 */ "DCBT\0"
8574 /* 15905 */ "ICBT\0"
8575 /* 15910 */ "G_EXTRACT\0"
8576 /* 15920 */ "G_SELECT\0"
8577 /* 15929 */ "G_BRINDIRECT\0"
8578 /* 15942 */ "DCBTCT\0"
8579 /* 15949 */ "DCBTSTCT\0"
8580 /* 15958 */ "PATCHABLE_RET\0"
8581 /* 15972 */ "TCHECK_RET\0"
8582 /* 15983 */ "TBEGIN_RET\0"
8583 /* 15994 */ "CR6SET\0"
8584 /* 16001 */ "DYNAREAOFFSET\0"
8585 /* 16015 */ "G_MEMSET\0"
8586 /* 16024 */ "CR6UNSET\0"
8587 /* 16033 */ "CRUNSET\0"
8588 /* 16041 */ "CRSET\0"
8589 /* 16047 */ "EFDCMPGT\0"
8590 /* 16056 */ "EFSCMPGT\0"
8591 /* 16065 */ "EVFSCMPGT\0"
8592 /* 16075 */ "EFDTSTGT\0"
8593 /* 16084 */ "EFSTSTGT\0"
8594 /* 16093 */ "EVFSTSTGT\0"
8595 /* 16103 */ "WAIT\0"
8596 /* 16108 */ "RESTORE_CRBIT\0"
8597 /* 16122 */ "SPILL_CRBIT\0"
8598 /* 16134 */ "ANDI_rec_1_EQ_BIT\0"
8599 /* 16152 */ "ANDI_rec_1_GT_BIT\0"
8600 /* 16170 */ "PATCHABLE_FUNCTION_EXIT\0"
8601 /* 16194 */ "G_BRJT\0"
8602 /* 16201 */ "G_EXTRACT_VECTOR_ELT\0"
8603 /* 16222 */ "G_INSERT_VECTOR_ELT\0"
8604 /* 16242 */ "EFDCMPLT\0"
8605 /* 16251 */ "EFSCMPLT\0"
8606 /* 16260 */ "EVFSCMPLT\0"
8607 /* 16270 */ "EFDTSTLT\0"
8608 /* 16279 */ "EFSTSTLT\0"
8609 /* 16288 */ "EVFSTSTLT\0"
8610 /* 16298 */ "G_FCONSTANT\0"
8611 /* 16310 */ "G_CONSTANT\0"
8612 /* 16321 */ "G_INTRINSIC_CONVERGENT\0"
8613 /* 16344 */ "STATEPOINT\0"
8614 /* 16355 */ "PATCHPOINT\0"
8615 /* 16366 */ "G_PTRTOINT\0"
8616 /* 16377 */ "G_FRINT\0"
8617 /* 16385 */ "G_INTRINSIC_LLRINT\0"
8618 /* 16404 */ "G_INTRINSIC_LRINT\0"
8619 /* 16422 */ "G_FNEARBYINT\0"
8620 /* 16435 */ "PPC32GOT\0"
8621 /* 16444 */ "PPC32PICGOT\0"
8622 /* 16456 */ "CRNOT\0"
8623 /* 16462 */ "LDtocCPT\0"
8624 /* 16471 */ "TRECHKPT\0"
8625 /* 16480 */ "G_VASTART\0"
8626 /* 16490 */ "LIFETIME_START\0"
8627 /* 16505 */ "G_INVOKE_REGION_START\0"
8628 /* 16527 */ "G_INSERT\0"
8629 /* 16536 */ "TABORT\0"
8630 /* 16543 */ "CP_ABORT\0"
8631 /* 16552 */ "G_FSQRT\0"
8632 /* 16560 */ "G_STRICT_FSQRT\0"
8633 /* 16575 */ "FTSQRT\0"
8634 /* 16582 */ "G_BITCAST\0"
8635 /* 16592 */ "G_ADDRSPACE_CAST\0"
8636 /* 16609 */ "VNCIPHERLAST\0"
8637 /* 16622 */ "VCIPHERLAST\0"
8638 /* 16634 */ "DCBST\0"
8639 /* 16640 */ "DST\0"
8640 /* 16644 */ "HASHST\0"
8641 /* 16651 */ "DBG_VALUE_LIST\0"
8642 /* 16666 */ "DCBTST\0"
8643 /* 16673 */ "DSTST\0"
8644 /* 16679 */ "SPILLTOVSR_ST\0"
8645 /* 16693 */ "DCBTT\0"
8646 /* 16699 */ "DSTT\0"
8647 /* 16704 */ "DCBTSTT\0"
8648 /* 16712 */ "DSTSTT\0"
8649 /* 16719 */ "G_FPEXT\0"
8650 /* 16727 */ "G_SEXT\0"
8651 /* 16734 */ "G_ASSERT_SEXT\0"
8652 /* 16748 */ "G_ANYEXT\0"
8653 /* 16757 */ "G_ZEXT\0"
8654 /* 16764 */ "G_ASSERT_ZEXT\0"
8655 /* 16778 */ "LHAU\0"
8656 /* 16783 */ "STBU\0"
8657 /* 16788 */ "LFDU\0"
8658 /* 16793 */ "STFDU\0"
8659 /* 16799 */ "MADDHDU\0"
8660 /* 16807 */ "MULHDU\0"
8661 /* 16814 */ "FCFIDU\0"
8662 /* 16821 */ "FCTIDU\0"
8663 /* 16828 */ "LDU\0"
8664 /* 16832 */ "STDU\0"
8665 /* 16837 */ "DIVDU\0"
8666 /* 16843 */ "DIVDEU\0"
8667 /* 16850 */ "DIVWEU\0"
8668 /* 16857 */ "STHU\0"
8669 /* 16862 */ "EVSRWIU\0"
8670 /* 16870 */ "EVLWHOU\0"
8671 /* 16878 */ "DCMPU\0"
8672 /* 16884 */ "LFSU\0"
8673 /* 16889 */ "STFSU\0"
8674 /* 16895 */ "EVCMPGTU\0"
8675 /* 16904 */ "EVCMPLTU\0"
8676 /* 16913 */ "MULHWU\0"
8677 /* 16920 */ "FCTIWU\0"
8678 /* 16927 */ "EVSRWU\0"
8679 /* 16934 */ "STWU\0"
8680 /* 16939 */ "EVDIVWU\0"
8681 /* 16947 */ "LBZU\0"
8682 /* 16952 */ "LHZU\0"
8683 /* 16957 */ "LWZU\0"
8684 /* 16962 */ "SCV\0"
8685 /* 16966 */ "SLBMFEV\0"
8686 /* 16974 */ "EFDDIV\0"
8687 /* 16981 */ "G_FDIV\0"
8688 /* 16988 */ "G_STRICT_FDIV\0"
8689 /* 17002 */ "EFSDIV\0"
8690 /* 17009 */ "EVFSDIV\0"
8691 /* 17017 */ "G_SDIV\0"
8692 /* 17024 */ "FTDIV\0"
8693 /* 17030 */ "G_UDIV\0"
8694 /* 17037 */ "VSLV\0"
8695 /* 17042 */ "G_GET_FPENV\0"
8696 /* 17054 */ "G_RESET_FPENV\0"
8697 /* 17068 */ "G_SET_FPENV\0"
8698 /* 17080 */ "XXLEQV\0"
8699 /* 17087 */ "CREQV\0"
8700 /* 17093 */ "EVEQV\0"
8701 /* 17099 */ "VSRV\0"
8702 /* 17104 */ "PLXV\0"
8703 /* 17109 */ "PSTXV\0"
8704 /* 17115 */ "VEXTSB2W\0"
8705 /* 17124 */ "VEXTSH2W\0"
8706 /* 17133 */ "PMXVBF16GER2W\0"
8707 /* 17147 */ "PMXVF16GER2W\0"
8708 /* 17160 */ "PMXVI16GER2W\0"
8709 /* 17173 */ "PMXVI8GER4W\0"
8710 /* 17185 */ "PMXVI4GER8W\0"
8711 /* 17197 */ "EVMHESMFAAW\0"
8712 /* 17209 */ "EVMHOSMFAAW\0"
8713 /* 17221 */ "EVMHESSFAAW\0"
8714 /* 17233 */ "EVMHOSSFAAW\0"
8715 /* 17245 */ "EVADDSMIAAW\0"
8716 /* 17257 */ "EVMHESMIAAW\0"
8717 /* 17269 */ "EVSUBFSMIAAW\0"
8718 /* 17282 */ "EVMWLSMIAAW\0"
8719 /* 17294 */ "EVMHOSMIAAW\0"
8720 /* 17306 */ "EVADDUMIAAW\0"
8721 /* 17318 */ "EVMHEUMIAAW\0"
8722 /* 17330 */ "EVSUBFUMIAAW\0"
8723 /* 17343 */ "EVMWLUMIAAW\0"
8724 /* 17355 */ "EVMHOUMIAAW\0"
8725 /* 17367 */ "EVADDSSIAAW\0"
8726 /* 17379 */ "EVMHESSIAAW\0"
8727 /* 17391 */ "EVSUBFSSIAAW\0"
8728 /* 17404 */ "EVMWLSSIAAW\0"
8729 /* 17416 */ "EVMHOSSIAAW\0"
8730 /* 17428 */ "EVADDUSIAAW\0"
8731 /* 17440 */ "EVMHEUSIAAW\0"
8732 /* 17452 */ "EVSUBFUSIAAW\0"
8733 /* 17465 */ "EVMWLUSIAAW\0"
8734 /* 17477 */ "EVMHOUSIAAW\0"
8735 /* 17489 */ "VSHASIGMAW\0"
8736 /* 17500 */ "VSRAW\0"
8737 /* 17506 */ "VCNTMBW\0"
8738 /* 17514 */ "VPRTYBW\0"
8739 /* 17522 */ "XXMFACCW\0"
8740 /* 17531 */ "XXMTACCW\0"
8741 /* 17540 */ "EVADDW\0"
8742 /* 17547 */ "EVLDW\0"
8743 /* 17553 */ "EVRNDW\0"
8744 /* 17560 */ "EVSTDW\0"
8745 /* 17567 */ "VMRGEW\0"
8746 /* 17574 */ "VCMPNEW\0"
8747 /* 17582 */ "EVSUBFW\0"
8748 /* 17590 */ "EVSUBIFW\0"
8749 /* 17599 */ "VNEGW\0"
8750 /* 17605 */ "VMRGHW\0"
8751 /* 17612 */ "XXMRGHW\0"
8752 /* 17620 */ "MULHW\0"
8753 /* 17626 */ "EVADDIW\0"
8754 /* 17634 */ "FCTIW\0"
8755 /* 17640 */ "XXSPLTIW\0"
8756 /* 17649 */ "VMRGLW\0"
8757 /* 17656 */ "XXMRGLW\0"
8758 /* 17664 */ "MULLW\0"
8759 /* 17670 */ "CMPLW\0"
8760 /* 17676 */ "EVRLW\0"
8761 /* 17682 */ "EVSLW\0"
8762 /* 17688 */ "LMW\0"
8763 /* 17692 */ "STMW\0"
8764 /* 17697 */ "VPMSUMW\0"
8765 /* 17705 */ "EVMHESMFANW\0"
8766 /* 17717 */ "EVMHOSMFANW\0"
8767 /* 17729 */ "EVMHESSFANW\0"
8768 /* 17741 */ "EVMHOSSFANW\0"
8769 /* 17753 */ "EVMHESMIANW\0"
8770 /* 17765 */ "EVMWLSMIANW\0"
8771 /* 17777 */ "EVMHOSMIANW\0"
8772 /* 17789 */ "EVMHEUMIANW\0"
8773 /* 17801 */ "EVMWLUMIANW\0"
8774 /* 17813 */ "EVMHOUMIANW\0"
8775 /* 17825 */ "EVMHESSIANW\0"
8776 /* 17837 */ "EVMWLSSIANW\0"
8777 /* 17849 */ "EVMHOSSIANW\0"
8778 /* 17861 */ "EVMHEUSIANW\0"
8779 /* 17873 */ "EVMWLUSIANW\0"
8780 /* 17885 */ "EVMHOUSIANW\0"
8781 /* 17897 */ "VMRGOW\0"
8782 /* 17904 */ "G_FPOW\0"
8783 /* 17911 */ "CMPW\0"
8784 /* 17916 */ "XXBRW\0"
8785 /* 17922 */ "PMXVF32GERW\0"
8786 /* 17934 */ "PMXVF64GERW\0"
8787 /* 17946 */ "VSRW\0"
8788 /* 17951 */ "PMXVI16GER2SW\0"
8789 /* 17965 */ "VMODSW\0"
8790 /* 17972 */ "VMULESW\0"
8791 /* 17980 */ "VDIVESW\0"
8792 /* 17988 */ "VAVGSW\0"
8793 /* 17995 */ "VUPKHSW\0"
8794 /* 18003 */ "VMULHSW\0"
8795 /* 18011 */ "VSPLTISW\0"
8796 /* 18020 */ "VUPKLSW\0"
8797 /* 18028 */ "EVCNTLSW\0"
8798 /* 18037 */ "VMINSW\0"
8799 /* 18044 */ "VINSW\0"
8800 /* 18050 */ "VMULOSW\0"
8801 /* 18058 */ "VCMPGTSW\0"
8802 /* 18067 */ "EXTSW\0"
8803 /* 18073 */ "VDIVSW\0"
8804 /* 18080 */ "VMAXSW\0"
8805 /* 18087 */ "VSPLTW\0"
8806 /* 18094 */ "XXSPLTW\0"
8807 /* 18102 */ "VPOPCNTW\0"
8808 /* 18111 */ "VINSERTW\0"
8809 /* 18120 */ "XXINSERTW\0"
8810 /* 18130 */ "SPESTW\0"
8811 /* 18137 */ "PSTW\0"
8812 /* 18142 */ "VSUBCUW\0"
8813 /* 18150 */ "VADDCUW\0"
8814 /* 18158 */ "VMODUW\0"
8815 /* 18165 */ "VABSDUW\0"
8816 /* 18173 */ "VMULEUW\0"
8817 /* 18181 */ "VDIVEUW\0"
8818 /* 18189 */ "VAVGUW\0"
8819 /* 18196 */ "VMULHUW\0"
8820 /* 18204 */ "VMINUW\0"
8821 /* 18211 */ "VMULOUW\0"
8822 /* 18219 */ "VCMPEQUW\0"
8823 /* 18228 */ "VEXTRACTUW\0"
8824 /* 18239 */ "XXEXTRACTUW\0"
8825 /* 18251 */ "VCMPGTUW\0"
8826 /* 18260 */ "VDIVUW\0"
8827 /* 18267 */ "VMAXUW\0"
8828 /* 18274 */ "XXBLENDVW\0"
8829 /* 18284 */ "DIVW\0"
8830 /* 18289 */ "XXSETACCZW\0"
8831 /* 18300 */ "VCMPNEZW\0"
8832 /* 18309 */ "VCLZW\0"
8833 /* 18315 */ "EVCNTLZW\0"
8834 /* 18324 */ "VCTZW\0"
8835 /* 18330 */ "CNTTZW\0"
8836 /* 18337 */ "LXVD2X\0"
8837 /* 18344 */ "STXVD2X\0"
8838 /* 18352 */ "LXVW4X\0"
8839 /* 18359 */ "STXVW4X\0"
8840 /* 18367 */ "LXVB16X\0"
8841 /* 18375 */ "STXVB16X\0"
8842 /* 18384 */ "LXVH8X\0"
8843 /* 18391 */ "STXVH8X\0"
8844 /* 18399 */ "LHAX\0"
8845 /* 18404 */ "G_VECREDUCE_FMAX\0"
8846 /* 18421 */ "G_ATOMICRMW_FMAX\0"
8847 /* 18438 */ "G_VECREDUCE_SMAX\0"
8848 /* 18455 */ "G_SMAX\0"
8849 /* 18462 */ "G_VECREDUCE_UMAX\0"
8850 /* 18479 */ "G_UMAX\0"
8851 /* 18486 */ "G_ATOMICRMW_UMAX\0"
8852 /* 18503 */ "G_ATOMICRMW_MAX\0"
8853 /* 18519 */ "TLBIVAX\0"
8854 /* 18527 */ "LFIWAX\0"
8855 /* 18534 */ "LIWAX\0"
8856 /* 18540 */ "LXSIWAX\0"
8857 /* 18548 */ "LWAX\0"
8858 /* 18553 */ "LVEBX\0"
8859 /* 18559 */ "STVEBX\0"
8860 /* 18566 */ "STXSIBX\0"
8861 /* 18574 */ "LXVRBX\0"
8862 /* 18581 */ "STXVRBX\0"
8863 /* 18589 */ "STBX\0"
8864 /* 18594 */ "STBCX\0"
8865 /* 18600 */ "STDCX\0"
8866 /* 18606 */ "STHCX\0"
8867 /* 18612 */ "STQCX\0"
8868 /* 18618 */ "STWCX\0"
8869 /* 18624 */ "XXSPLTI32DX\0"
8870 /* 18636 */ "EVLDDX\0"
8871 /* 18643 */ "EVSTDDX\0"
8872 /* 18651 */ "LFDX\0"
8873 /* 18656 */ "STFDX\0"
8874 /* 18662 */ "SPILLTOVSR_LDX\0"
8875 /* 18677 */ "LXVRDX\0"
8876 /* 18684 */ "STXVRDX\0"
8877 /* 18692 */ "LXSDX\0"
8878 /* 18698 */ "STXSDX\0"
8879 /* 18705 */ "STDX\0"
8880 /* 18710 */ "ADDEX\0"
8881 /* 18716 */ "G_FRAME_INDEX\0"
8882 /* 18730 */ "EVLWHEX\0"
8883 /* 18738 */ "EVSTWHEX\0"
8884 /* 18747 */ "DIEX\0"
8885 /* 18752 */ "DTSTEX\0"
8886 /* 18759 */ "EVSTWWEX\0"
8887 /* 18768 */ "DXEX\0"
8888 /* 18773 */ "G_SBFX\0"
8889 /* 18780 */ "G_UBFX\0"
8890 /* 18787 */ "EVLDHX\0"
8891 /* 18794 */ "EVSTDHX\0"
8892 /* 18802 */ "LVEHX\0"
8893 /* 18808 */ "STVEHX\0"
8894 /* 18815 */ "STXSIHX\0"
8895 /* 18823 */ "LXVRHX\0"
8896 /* 18830 */ "STXVRHX\0"
8897 /* 18838 */ "STHX\0"
8898 /* 18843 */ "GETtlsMOD32AIX\0"
8899 /* 18858 */ "GETtlsADDR32AIX\0"
8900 /* 18874 */ "GETtlsTpointer32AIX\0"
8901 /* 18894 */ "GETtlsMOD64AIX\0"
8902 /* 18909 */ "GETtlsADDR64AIX\0"
8903 /* 18925 */ "TLSGDAIX\0"
8904 /* 18934 */ "TLSLDAIX\0"
8905 /* 18943 */ "STBCIX\0"
8906 /* 18950 */ "LDCIX\0"
8907 /* 18956 */ "STDCIX\0"
8908 /* 18963 */ "STHCIX\0"
8909 /* 18970 */ "STWCIX\0"
8910 /* 18977 */ "LBZCIX\0"
8911 /* 18984 */ "LHZCIX\0"
8912 /* 18991 */ "LWZCIX\0"
8913 /* 18998 */ "DCFFIX\0"
8914 /* 19005 */ "G_SMULFIX\0"
8915 /* 19015 */ "G_UMULFIX\0"
8916 /* 19025 */ "DCTFIX\0"
8917 /* 19032 */ "G_SDIVFIX\0"
8918 /* 19042 */ "G_UDIVFIX\0"
8919 /* 19052 */ "XSRQPIX\0"
8920 /* 19060 */ "VINSBLX\0"
8921 /* 19068 */ "VEXTUBLX\0"
8922 /* 19077 */ "VINSDLX\0"
8923 /* 19085 */ "VINSHLX\0"
8924 /* 19093 */ "VEXTUHLX\0"
8925 /* 19102 */ "TLBILX\0"
8926 /* 19109 */ "VINSBVLX\0"
8927 /* 19118 */ "VEXTDUBVLX\0"
8928 /* 19129 */ "VEXTDDVLX\0"
8929 /* 19139 */ "VINSHVLX\0"
8930 /* 19148 */ "VEXTDUHVLX\0"
8931 /* 19159 */ "VINSWVLX\0"
8932 /* 19168 */ "VEXTDUWVLX\0"
8933 /* 19179 */ "VINSWLX\0"
8934 /* 19187 */ "VEXTUWLX\0"
8935 /* 19196 */ "XXPERMX\0"
8936 /* 19204 */ "VSBOX\0"
8937 /* 19210 */ "EVSTWHOX\0"
8938 /* 19219 */ "EVSTWWOX\0"
8939 /* 19228 */ "LBEPX\0"
8940 /* 19234 */ "STBEPX\0"
8941 /* 19241 */ "LFDEPX\0"
8942 /* 19248 */ "STFDEPX\0"
8943 /* 19256 */ "LHEPX\0"
8944 /* 19262 */ "STHEPX\0"
8945 /* 19269 */ "LWEPX\0"
8946 /* 19275 */ "STWEPX\0"
8947 /* 19282 */ "VUPKHPX\0"
8948 /* 19290 */ "VPKPX\0"
8949 /* 19296 */ "VUPKLPX\0"
8950 /* 19304 */ "LXSSPX\0"
8951 /* 19311 */ "STXSSPX\0"
8952 /* 19319 */ "LXVPX\0"
8953 /* 19325 */ "STXVPX\0"
8954 /* 19332 */ "LBARX\0"
8955 /* 19338 */ "LDARX\0"
8956 /* 19344 */ "LHARX\0"
8957 /* 19350 */ "LQARX\0"
8958 /* 19356 */ "LWARX\0"
8959 /* 19362 */ "LDBRX\0"
8960 /* 19368 */ "STDBRX\0"
8961 /* 19375 */ "LHBRX\0"
8962 /* 19381 */ "STHBRX\0"
8963 /* 19388 */ "VINSBRX\0"
8964 /* 19396 */ "VEXTUBRX\0"
8965 /* 19405 */ "LWBRX\0"
8966 /* 19411 */ "STWBRX\0"
8967 /* 19418 */ "VINSDRX\0"
8968 /* 19426 */ "VINSHRX\0"
8969 /* 19434 */ "VEXTUHRX\0"
8970 /* 19443 */ "VINSBVRX\0"
8971 /* 19452 */ "VEXTDUBVRX\0"
8972 /* 19463 */ "VEXTDDVRX\0"
8973 /* 19473 */ "VINSHVRX\0"
8974 /* 19482 */ "VEXTDUHVRX\0"
8975 /* 19493 */ "VINSWVRX\0"
8976 /* 19502 */ "VEXTDUWVRX\0"
8977 /* 19513 */ "VINSWRX\0"
8978 /* 19521 */ "VEXTUWRX\0"
8979 /* 19530 */ "MCRXRX\0"
8980 /* 19537 */ "TLBSX\0"
8981 /* 19543 */ "LXVDSX\0"
8982 /* 19550 */ "VCFSX\0"
8983 /* 19556 */ "LFSX\0"
8984 /* 19561 */ "STFSX\0"
8985 /* 19567 */ "EVLWHOSX\0"
8986 /* 19576 */ "LXVWSX\0"
8987 /* 19583 */ "EVLHHESPLATX\0"
8988 /* 19596 */ "EVLWHSPLATX\0"
8989 /* 19608 */ "EVLHHOSSPLATX\0"
8990 /* 19622 */ "EVLHHOUSPLATX\0"
8991 /* 19636 */ "EVLWWSPLATX\0"
8992 /* 19648 */ "DRINTX\0"
8993 /* 19655 */ "SPILLTOVSR_STX\0"
8994 /* 19670 */ "LHAUX\0"
8995 /* 19676 */ "LWAUX\0"
8996 /* 19682 */ "STBUX\0"
8997 /* 19688 */ "LFDUX\0"
8998 /* 19694 */ "STFDUX\0"
8999 /* 19701 */ "LDUX\0"
9000 /* 19706 */ "STDUX\0"
9001 /* 19712 */ "VCFUX\0"
9002 /* 19718 */ "STHUX\0"
9003 /* 19724 */ "EVLWHOUX\0"
9004 /* 19733 */ "LFSUX\0"
9005 /* 19739 */ "STFSUX\0"
9006 /* 19746 */ "STWUX\0"
9007 /* 19752 */ "LBZUX\0"
9008 /* 19758 */ "LHZUX\0"
9009 /* 19764 */ "LWZUX\0"
9010 /* 19770 */ "LVX\0"
9011 /* 19774 */ "STVX\0"
9012 /* 19779 */ "LXVX\0"
9013 /* 19784 */ "STXVX\0"
9014 /* 19790 */ "EVLDWX\0"
9015 /* 19797 */ "EVSTDWX\0"
9016 /* 19805 */ "LVEWX\0"
9017 /* 19811 */ "STVEWX\0"
9018 /* 19818 */ "STFIWX\0"
9019 /* 19825 */ "STXSIWX\0"
9020 /* 19833 */ "STIWX\0"
9021 /* 19839 */ "LXVRWX\0"
9022 /* 19846 */ "STXVRWX\0"
9023 /* 19854 */ "SPESTWX\0"
9024 /* 19862 */ "LXSIBZX\0"
9025 /* 19870 */ "LBZX\0"
9026 /* 19875 */ "LXSIHZX\0"
9027 /* 19883 */ "LHZX\0"
9028 /* 19888 */ "LFIWZX\0"
9029 /* 19895 */ "LIWZX\0"
9030 /* 19901 */ "LXSIWZX\0"
9031 /* 19909 */ "SPELWZX\0"
9032 /* 19917 */ "G_MEMCPY\0"
9033 /* 19926 */ "CP_COPY\0"
9034 /* 19934 */ "CONVERGENCECTRL_ENTRY\0"
9035 /* 19956 */ "DCBZ\0"
9036 /* 19961 */ "PLBZ\0"
9037 /* 19966 */ "XXSETACCZ\0"
9038 /* 19976 */ "BDZ\0"
9039 /* 19980 */ "EFDCTSIDZ\0"
9040 /* 19990 */ "FCTIDZ\0"
9041 /* 19997 */ "EFDCTUIDZ\0"
9042 /* 20007 */ "XSCVQPSDZ\0"
9043 /* 20017 */ "XSCVQPUDZ\0"
9044 /* 20027 */ "PLHZ\0"
9045 /* 20032 */ "VRFIZ\0"
9046 /* 20038 */ "XSRDPIZ\0"
9047 /* 20046 */ "XVRDPIZ\0"
9048 /* 20054 */ "XVRSPIZ\0"
9049 /* 20062 */ "EFDCTSIZ\0"
9050 /* 20071 */ "EFSCTSIZ\0"
9051 /* 20080 */ "EVFSCTSIZ\0"
9052 /* 20090 */ "EFDCTUIZ\0"
9053 /* 20099 */ "EFSCTUIZ\0"
9054 /* 20108 */ "EVFSCTUIZ\0"
9055 /* 20118 */ "G_CTLZ\0"
9056 /* 20125 */ "BDNZ\0"
9057 /* 20130 */ "XSCVQPSQZ\0"
9058 /* 20140 */ "XSCVQPUQZ\0"
9059 /* 20150 */ "DMSETDMRZ\0"
9060 /* 20160 */ "G_CTTZ\0"
9061 /* 20167 */ "FCTIDUZ\0"
9062 /* 20175 */ "FCTIWUZ\0"
9063 /* 20183 */ "FCTIWZ\0"
9064 /* 20190 */ "SPELWZ\0"
9065 /* 20197 */ "PLWZ\0"
9066 /* 20202 */ "MFVSRWZ\0"
9067 /* 20210 */ "MTVSRWZ\0"
9068 /* 20218 */ "MFVRWZ\0"
9069 /* 20225 */ "MTVRWZ\0"
9070 /* 20232 */ "XSCVQPSWZ\0"
9071 /* 20242 */ "XSCVQPUWZ\0"
9072 /* 20252 */ "ADD8TLS_\0"
9073 /* 20261 */ "LHAXTLS_\0"
9074 /* 20270 */ "LWAXTLS_\0"
9075 /* 20279 */ "STBXTLS_\0"
9076 /* 20288 */ "LFDXTLS_\0"
9077 /* 20297 */ "STFDXTLS_\0"
9078 /* 20307 */ "LDXTLS_\0"
9079 /* 20315 */ "STDXTLS_\0"
9080 /* 20324 */ "STHXTLS_\0"
9081 /* 20333 */ "LFSXTLS_\0"
9082 /* 20342 */ "STFSXTLS_\0"
9083 /* 20352 */ "STWXTLS_\0"
9084 /* 20361 */ "LBZXTLS_\0"
9085 /* 20370 */ "LHZXTLS_\0"
9086 /* 20379 */ "LWZXTLS_\0"
9087 /* 20388 */ "BL8_TLS_\0"
9088 /* 20397 */ "MTFSFb\0"
9089 /* 20404 */ "MTFSFIb\0"
9090 /* 20412 */ "RLDICL_32_rec\0"
9091 /* 20426 */ "EXTSWSLI_32_64_rec\0"
9092 /* 20445 */ "EXTSW_32_64_rec\0"
9093 /* 20461 */ "ADD4_rec\0"
9094 /* 20470 */ "EXTSB8_rec\0"
9095 /* 20481 */ "ADDC8_rec\0"
9096 /* 20491 */ "ANDC8_rec\0"
9097 /* 20501 */ "SUBFC8_rec\0"
9098 /* 20512 */ "ORC8_rec\0"
9099 /* 20521 */ "ADD8_rec\0"
9100 /* 20530 */ "NAND8_rec\0"
9101 /* 20540 */ "ADDE8_rec\0"
9102 /* 20550 */ "SUBFE8_rec\0"
9103 /* 20561 */ "ADDME8_rec\0"
9104 /* 20572 */ "SUBFME8_rec\0"
9105 /* 20584 */ "CP_PASTE8_rec\0"
9106 /* 20598 */ "ADDZE8_rec\0"
9107 /* 20609 */ "SUBFZE8_rec\0"
9108 /* 20621 */ "SUBF8_rec\0"
9109 /* 20631 */ "NEG8_rec\0"
9110 /* 20640 */ "EXTSH8_rec\0"
9111 /* 20651 */ "ANDI8_rec\0"
9112 /* 20661 */ "RLWIMI8_rec\0"
9113 /* 20673 */ "RLWINM8_rec\0"
9114 /* 20685 */ "RLWNM8_rec\0"
9115 /* 20696 */ "NOR8_rec\0"
9116 /* 20705 */ "XOR8_rec\0"
9117 /* 20714 */ "ANDIS8_rec\0"
9118 /* 20725 */ "EQV8_rec\0"
9119 /* 20734 */ "SLW8_rec\0"
9120 /* 20743 */ "SRW8_rec\0"
9121 /* 20752 */ "CNTLZW8_rec\0"
9122 /* 20764 */ "CNTTZW8_rec\0"
9123 /* 20776 */ "DQUA_rec\0"
9124 /* 20785 */ "VCMPNEB_rec\0"
9125 /* 20797 */ "VCMPGTSB_rec\0"
9126 /* 20810 */ "EXTSB_rec\0"
9127 /* 20820 */ "VCMPEQUB_rec\0"
9128 /* 20833 */ "BCDSUB_rec\0"
9129 /* 20844 */ "FSUB_rec\0"
9130 /* 20853 */ "FMSUB_rec\0"
9131 /* 20863 */ "FNMSUB_rec\0"
9132 /* 20874 */ "VCMPGTUB_rec\0"
9133 /* 20887 */ "VCMPNEZB_rec\0"
9134 /* 20900 */ "ADDC_rec\0"
9135 /* 20909 */ "ANDC_rec\0"
9136 /* 20918 */ "SUBFC_rec\0"
9137 /* 20928 */ "SUBIC_rec\0"
9138 /* 20938 */ "ADDIC_rec\0"
9139 /* 20948 */ "RLDIC_rec\0"
9140 /* 20958 */ "BCDTRUNC_rec\0"
9141 /* 20971 */ "BCDUTRUNC_rec\0"
9142 /* 20985 */ "ORC_rec\0"
9143 /* 20993 */ "SRAD_rec\0"
9144 /* 21002 */ "DENBCD_rec\0"
9145 /* 21013 */ "BCDADD_rec\0"
9146 /* 21024 */ "FADD_rec\0"
9147 /* 21033 */ "FMADD_rec\0"
9148 /* 21043 */ "FNMADD_rec\0"
9149 /* 21054 */ "FNEGD_rec\0"
9150 /* 21064 */ "MULHD_rec\0"
9151 /* 21074 */ "FCFID_rec\0"
9152 /* 21084 */ "FCTID_rec\0"
9153 /* 21094 */ "FSELD_rec\0"
9154 /* 21104 */ "MULLD_rec\0"
9155 /* 21114 */ "SLD_rec\0"
9156 /* 21122 */ "FRIMD_rec\0"
9157 /* 21132 */ "NAND_rec\0"
9158 /* 21141 */ "FCPSGND_rec\0"
9159 /* 21153 */ "FRIND_rec\0"
9160 /* 21163 */ "DRRND_rec\0"
9161 /* 21173 */ "DDEDPD_rec\0"
9162 /* 21184 */ "FRIPD_rec\0"
9163 /* 21194 */ "SRD_rec\0"
9164 /* 21202 */ "FABSD_rec\0"
9165 /* 21212 */ "FNABSD_rec\0"
9166 /* 21223 */ "VCMPGTSD_rec\0"
9167 /* 21236 */ "VCMPEQUD_rec\0"
9168 /* 21249 */ "VCMPGTUD_rec\0"
9169 /* 21262 */ "DIVD_rec\0"
9170 /* 21271 */ "FRIZD_rec\0"
9171 /* 21281 */ "CNTLZD_rec\0"
9172 /* 21292 */ "CNTTZD_rec\0"
9173 /* 21303 */ "ADDE_rec\0"
9174 /* 21312 */ "DIVDE_rec\0"
9175 /* 21322 */ "SLBFEE_rec\0"
9176 /* 21333 */ "SUBFE_rec\0"
9177 /* 21343 */ "ADDME_rec\0"
9178 /* 21353 */ "SUBFME_rec\0"
9179 /* 21364 */ "FRE_rec\0"
9180 /* 21372 */ "FRSQRTE_rec\0"
9181 /* 21384 */ "CP_PASTE_rec\0"
9182 /* 21397 */ "DIVWE_rec\0"
9183 /* 21407 */ "ADDZE_rec\0"
9184 /* 21417 */ "SUBFZE_rec\0"
9185 /* 21428 */ "SUBF_rec\0"
9186 /* 21437 */ "MTFSF_rec\0"
9187 /* 21447 */ "NEG_rec\0"
9188 /* 21455 */ "VCMPNEH_rec\0"
9189 /* 21467 */ "VCMPGTSH_rec\0"
9190 /* 21480 */ "EXTSH_rec\0"
9191 /* 21490 */ "VCMPEQUH_rec\0"
9192 /* 21503 */ "VCMPGTUH_rec\0"
9193 /* 21516 */ "VCMPNEZH_rec\0"
9194 /* 21529 */ "DQUAI_rec\0"
9195 /* 21539 */ "SRADI_rec\0"
9196 /* 21549 */ "CLRLSLDI_rec\0"
9197 /* 21562 */ "EXTLDI_rec\0"
9198 /* 21573 */ "ANDI_rec\0"
9199 /* 21582 */ "CLRRDI_rec\0"
9200 /* 21593 */ "INSRDI_rec\0"
9201 /* 21604 */ "ROTRDI_rec\0"
9202 /* 21615 */ "EXTRDI_rec\0"
9203 /* 21626 */ "MTFSFI_rec\0"
9204 /* 21637 */ "DSCLI_rec\0"
9205 /* 21647 */ "EXTSWSLI_rec\0"
9206 /* 21660 */ "RLDIMI_rec\0"
9207 /* 21671 */ "RLWIMI_rec\0"
9208 /* 21682 */ "DSCRI_rec\0"
9209 /* 21692 */ "SRAWI_rec\0"
9210 /* 21702 */ "CLRLSLWI_rec\0"
9211 /* 21715 */ "INSLWI_rec\0"
9212 /* 21726 */ "EXTLWI_rec\0"
9213 /* 21737 */ "CLRRWI_rec\0"
9214 /* 21748 */ "INSRWI_rec\0"
9215 /* 21759 */ "ROTRWI_rec\0"
9216 /* 21770 */ "EXTRWI_rec\0"
9217 /* 21781 */ "VSTRIBL_rec\0"
9218 /* 21793 */ "RLDCL_rec\0"
9219 /* 21803 */ "RLDICL_rec\0"
9220 /* 21814 */ "VSTRIHL_rec\0"
9221 /* 21826 */ "DMUL_rec\0"
9222 /* 21835 */ "FMUL_rec\0"
9223 /* 21844 */ "RLWINM_rec\0"
9224 /* 21855 */ "RLWNM_rec\0"
9225 /* 21865 */ "BCDCFN_rec\0"
9226 /* 21876 */ "BCDCPSGN_rec\0"
9227 /* 21889 */ "BCDSETSGN_rec\0"
9228 /* 21903 */ "BCDCTN_rec\0"
9229 /* 21914 */ "DRINTN_rec\0"
9230 /* 21925 */ "ADD4O_rec\0"
9231 /* 21935 */ "ADDC8O_rec\0"
9232 /* 21946 */ "SUBFC8O_rec\0"
9233 /* 21958 */ "ADD8O_rec\0"
9234 /* 21968 */ "ADDE8O_rec\0"
9235 /* 21979 */ "SUBFE8O_rec\0"
9236 /* 21991 */ "ADDME8O_rec\0"
9237 /* 22003 */ "SUBFME8O_rec\0"
9238 /* 22016 */ "ADDZE8O_rec\0"
9239 /* 22028 */ "SUBFZE8O_rec\0"
9240 /* 22041 */ "SUBF8O_rec\0"
9241 /* 22052 */ "NEG8O_rec\0"
9242 /* 22062 */ "ADDCO_rec\0"
9243 /* 22072 */ "SUBFCO_rec\0"
9244 /* 22083 */ "MULLDO_rec\0"
9245 /* 22094 */ "DIVDO_rec\0"
9246 /* 22104 */ "ADDEO_rec\0"
9247 /* 22114 */ "DIVDEO_rec\0"
9248 /* 22125 */ "SUBFEO_rec\0"
9249 /* 22136 */ "ADDMEO_rec\0"
9250 /* 22147 */ "SUBFMEO_rec\0"
9251 /* 22159 */ "DIVWEO_rec\0"
9252 /* 22170 */ "ADDZEO_rec\0"
9253 /* 22181 */ "SUBFZEO_rec\0"
9254 /* 22193 */ "SUBFO_rec\0"
9255 /* 22203 */ "NEGO_rec\0"
9256 /* 22212 */ "DIVDUO_rec\0"
9257 /* 22223 */ "DIVDEUO_rec\0"
9258 /* 22235 */ "DIVWEUO_rec\0"
9259 /* 22247 */ "DIVWUO_rec\0"
9260 /* 22258 */ "MULLWO_rec\0"
9261 /* 22269 */ "DIVWO_rec\0"
9262 /* 22279 */ "XVCMPGEDP_rec\0"
9263 /* 22293 */ "XVCMPEQDP_rec\0"
9264 /* 22307 */ "DCTDP_rec\0"
9265 /* 22317 */ "XVCMPGTDP_rec\0"
9266 /* 22331 */ "VCMPBFP_rec\0"
9267 /* 22343 */ "VCMPGEFP_rec\0"
9268 /* 22356 */ "VCMPEQFP_rec\0"
9269 /* 22369 */ "VCMPGTFP_rec\0"
9270 /* 22382 */ "XVCMPGESP_rec\0"
9271 /* 22396 */ "XVCMPEQSP_rec\0"
9272 /* 22410 */ "DRSP_rec\0"
9273 /* 22419 */ "FRSP_rec\0"
9274 /* 22428 */ "XVCMPGTSP_rec\0"
9275 /* 22442 */ "DQUAQ_rec\0"
9276 /* 22452 */ "DSUBQ_rec\0"
9277 /* 22462 */ "DENBCDQ_rec\0"
9278 /* 22474 */ "DADDQ_rec\0"
9279 /* 22484 */ "DRRNDQ_rec\0"
9280 /* 22495 */ "DDEDPDQ_rec\0"
9281 /* 22507 */ "DQUAIQ_rec\0"
9282 /* 22518 */ "DSCLIQ_rec\0"
9283 /* 22529 */ "DSCRIQ_rec\0"
9284 /* 22540 */ "DMULQ_rec\0"
9285 /* 22550 */ "DRINTNQ_rec\0"
9286 /* 22562 */ "DRDPQ_rec\0"
9287 /* 22572 */ "DCTQPQ_rec\0"
9288 /* 22583 */ "BCDCFSQ_rec\0"
9289 /* 22595 */ "BCDCTSQ_rec\0"
9290 /* 22607 */ "VCMPGTSQ_rec\0"
9291 /* 22620 */ "VCMPEQUQ_rec\0"
9292 /* 22633 */ "VCMPGTUQ_rec\0"
9293 /* 22646 */ "DDIVQ_rec\0"
9294 /* 22656 */ "DIEXQ_rec\0"
9295 /* 22666 */ "DXEXQ_rec\0"
9296 /* 22676 */ "DCFFIXQ_rec\0"
9297 /* 22688 */ "DCTFIXQ_rec\0"
9298 /* 22700 */ "DRINTXQ_rec\0"
9299 /* 22712 */ "VSTRIBR_rec\0"
9300 /* 22724 */ "RLDCR_rec\0"
9301 /* 22734 */ "RLDICR_rec\0"
9302 /* 22745 */ "VSTRIHR_rec\0"
9303 /* 22757 */ "FMR_rec\0"
9304 /* 22765 */ "NOR_rec\0"
9305 /* 22773 */ "XOR_rec\0"
9306 /* 22781 */ "BCDSR_rec\0"
9307 /* 22791 */ "FSUBS_rec\0"
9308 /* 22801 */ "FMSUBS_rec\0"
9309 /* 22812 */ "FNMSUBS_rec\0"
9310 /* 22824 */ "BCDS_rec\0"
9311 /* 22833 */ "FADDS_rec\0"
9312 /* 22843 */ "FMADDS_rec\0"
9313 /* 22854 */ "FNMADDS_rec\0"
9314 /* 22866 */ "FCFIDS_rec\0"
9315 /* 22877 */ "FRES_rec\0"
9316 /* 22886 */ "FRSQRTES_rec\0"
9317 /* 22899 */ "MFFS_rec\0"
9318 /* 22908 */ "FNEGS_rec\0"
9319 /* 22918 */ "ANDIS_rec\0"
9320 /* 22928 */ "FSELS_rec\0"
9321 /* 22938 */ "FMULS_rec\0"
9322 /* 22948 */ "FRIMS_rec\0"
9323 /* 22958 */ "FCPSGNS_rec\0"
9324 /* 22970 */ "FRINS_rec\0"
9325 /* 22980 */ "FRIPS_rec\0"
9326 /* 22990 */ "FABSS_rec\0"
9327 /* 23000 */ "FNABSS_rec\0"
9328 /* 23011 */ "FSQRTS_rec\0"
9329 /* 23022 */ "BCDUS_rec\0"
9330 /* 23032 */ "FCFIDUS_rec\0"
9331 /* 23044 */ "SUBFUS_rec\0"
9332 /* 23055 */ "FDIVS_rec\0"
9333 /* 23065 */ "FRIZS_rec\0"
9334 /* 23075 */ "FSQRT_rec\0"
9335 /* 23085 */ "MULHDU_rec\0"
9336 /* 23096 */ "FCFIDU_rec\0"
9337 /* 23107 */ "FCTIDU_rec\0"
9338 /* 23118 */ "DIVDU_rec\0"
9339 /* 23128 */ "DIVDEU_rec\0"
9340 /* 23139 */ "DIVWEU_rec\0"
9341 /* 23150 */ "MULHWU_rec\0"
9342 /* 23161 */ "FCTIWU_rec\0"
9343 /* 23172 */ "DIVWU_rec\0"
9344 /* 23182 */ "DDIV_rec\0"
9345 /* 23191 */ "FDIV_rec\0"
9346 /* 23200 */ "EQV_rec\0"
9347 /* 23208 */ "SRAW_rec\0"
9348 /* 23217 */ "VCMPNEW_rec\0"
9349 /* 23229 */ "MULHW_rec\0"
9350 /* 23239 */ "FCTIW_rec\0"
9351 /* 23249 */ "MULLW_rec\0"
9352 /* 23259 */ "SLW_rec\0"
9353 /* 23267 */ "SRW_rec\0"
9354 /* 23275 */ "VCMPGTSW_rec\0"
9355 /* 23288 */ "EXTSW_rec\0"
9356 /* 23298 */ "VCMPEQUW_rec\0"
9357 /* 23311 */ "VCMPGTUW_rec\0"
9358 /* 23324 */ "DIVW_rec\0"
9359 /* 23333 */ "VCMPNEZW_rec\0"
9360 /* 23346 */ "CNTLZW_rec\0"
9361 /* 23357 */ "CNTTZW_rec\0"
9362 /* 23368 */ "DIEX_rec\0"
9363 /* 23377 */ "DXEX_rec\0"
9364 /* 23386 */ "DCFFIX_rec\0"
9365 /* 23397 */ "DCTFIX_rec\0"
9366 /* 23408 */ "DRINTX_rec\0"
9367 /* 23419 */ "FCTIDZ_rec\0"
9368 /* 23430 */ "BCDCFZ_rec\0"
9369 /* 23441 */ "BCDCTZ_rec\0"
9370 /* 23452 */ "FCTIDUZ_rec\0"
9371 /* 23464 */ "FCTIWUZ_rec\0"
9372 /* 23476 */ "FCTIWZ_rec\0"
9373 /* 23487 */ "RLWIMIbm_rec\0"
9374 /* 23500 */ "RLWINMbm_rec\0"
9375 /* 23513 */ "RLWNMbm_rec\0"
9376 /* 23525 */ "LDtoc\0"
9377 /* 23531 */ "ADDItoc\0"
9378 /* 23539 */ "LWZtoc\0"
9379 /* 23546 */ "BCTRL8_LDinto_toc\0"
9380 /* 23564 */ "BCTRL_LWZinto_toc\0"
9381 /* 23582 */ "PLHA8pc\0"
9382 /* 23590 */ "PLA8pc\0"
9383 /* 23597 */ "PLWA8pc\0"
9384 /* 23605 */ "PSTB8pc\0"
9385 /* 23613 */ "PSTH8pc\0"
9386 /* 23621 */ "PADDI8pc\0"
9387 /* 23630 */ "PSTW8pc\0"
9388 /* 23638 */ "PLBZ8pc\0"
9389 /* 23646 */ "PLHZ8pc\0"
9390 /* 23654 */ "PLWZ8pc\0"
9391 /* 23662 */ "PLHApc\0"
9392 /* 23669 */ "PLApc\0"
9393 /* 23675 */ "PLWApc\0"
9394 /* 23682 */ "PSTBpc\0"
9395 /* 23689 */ "PLFDpc\0"
9396 /* 23696 */ "PSTFDpc\0"
9397 /* 23704 */ "PLDpc\0"
9398 /* 23710 */ "PLXSDpc\0"
9399 /* 23718 */ "PSTXSDpc\0"
9400 /* 23727 */ "PSTDpc\0"
9401 /* 23734 */ "PSTHpc\0"
9402 /* 23741 */ "PADDIpc\0"
9403 /* 23749 */ "PLXSSPpc\0"
9404 /* 23758 */ "PSTXSSPpc\0"
9405 /* 23768 */ "PLXVPpc\0"
9406 /* 23776 */ "PSTXVPpc\0"
9407 /* 23785 */ "PLFSpc\0"
9408 /* 23792 */ "PSTFSpc\0"
9409 /* 23800 */ "PLXVpc\0"
9410 /* 23807 */ "PSTXVpc\0"
9411 /* 23815 */ "PSTWpc\0"
9412 /* 23822 */ "PLBZpc\0"
9413 /* 23829 */ "PLHZpc\0"
9414 /* 23836 */ "PLWZpc\0"
9415 /* 23843 */ "PLHA8nopc\0"
9416 /* 23853 */ "PLWA8nopc\0"
9417 /* 23863 */ "PSTB8nopc\0"
9418 /* 23873 */ "PSTH8nopc\0"
9419 /* 23883 */ "PSTW8nopc\0"
9420 /* 23893 */ "PLBZ8nopc\0"
9421 /* 23903 */ "PLHZ8nopc\0"
9422 /* 23913 */ "PLWZ8nopc\0"
9423 /* 23923 */ "PLHAnopc\0"
9424 /* 23932 */ "PLWAnopc\0"
9425 /* 23941 */ "PSTBnopc\0"
9426 /* 23950 */ "PLFDnopc\0"
9427 /* 23959 */ "PSTFDnopc\0"
9428 /* 23969 */ "PLDnopc\0"
9429 /* 23977 */ "PLXSDnopc\0"
9430 /* 23987 */ "PSTXSDnopc\0"
9431 /* 23998 */ "PSTDnopc\0"
9432 /* 24007 */ "PSTHnopc\0"
9433 /* 24016 */ "PLXSSPnopc\0"
9434 /* 24027 */ "PSTXSSPnopc\0"
9435 /* 24039 */ "PLXVPnopc\0"
9436 /* 24049 */ "PSTXVPnopc\0"
9437 /* 24060 */ "PLFSnopc\0"
9438 /* 24069 */ "PSTFSnopc\0"
9439 /* 24079 */ "PLXVnopc\0"
9440 /* 24088 */ "PSTXVnopc\0"
9441 /* 24098 */ "PSTWnopc\0"
9442 /* 24107 */ "PLBZnopc\0"
9443 /* 24116 */ "PLHZnopc\0"
9444 /* 24125 */ "PLWZnopc\0"
9445 /* 24134 */ "PLHA8onlypc\0"
9446 /* 24146 */ "PLWA8onlypc\0"
9447 /* 24158 */ "PSTB8onlypc\0"
9448 /* 24170 */ "PSTH8onlypc\0"
9449 /* 24182 */ "PSTW8onlypc\0"
9450 /* 24194 */ "PLBZ8onlypc\0"
9451 /* 24206 */ "PLHZ8onlypc\0"
9452 /* 24218 */ "PLWZ8onlypc\0"
9453 /* 24230 */ "PLHAonlypc\0"
9454 /* 24241 */ "PLWAonlypc\0"
9455 /* 24252 */ "PSTBonlypc\0"
9456 /* 24263 */ "PLFDonlypc\0"
9457 /* 24274 */ "PSTFDonlypc\0"
9458 /* 24286 */ "PLDonlypc\0"
9459 /* 24296 */ "PLXSDonlypc\0"
9460 /* 24308 */ "PSTXSDonlypc\0"
9461 /* 24321 */ "PSTDonlypc\0"
9462 /* 24332 */ "PSTHonlypc\0"
9463 /* 24343 */ "PLXSSPonlypc\0"
9464 /* 24356 */ "PSTXSSPonlypc\0"
9465 /* 24370 */ "PLXVPonlypc\0"
9466 /* 24382 */ "PSTXVPonlypc\0"
9467 /* 24395 */ "PLFSonlypc\0"
9468 /* 24406 */ "PSTFSonlypc\0"
9469 /* 24418 */ "PLXVonlypc\0"
9470 /* 24429 */ "PSTXVonlypc\0"
9471 /* 24441 */ "PSTWonlypc\0"
9472 /* 24452 */ "PLBZonlypc\0"
9473 /* 24463 */ "PLHZonlypc\0"
9474 /* 24474 */ "PLWZonlypc\0"
9475 /* 24485 */ "XXLORf\0"
9476 /* 24492 */ "SETRNDi\0"
9477 /* 24500 */ "TCRETURNai\0"
9478 /* 24511 */ "TCRETURNdi\0"
9479 /* 24522 */ "TCRETURNri\0"
9480 /* 24533 */ "PADDIdtprel\0"
9481 /* 24545 */ "BDZLAm\0"
9482 /* 24552 */ "BDNZLAm\0"
9483 /* 24560 */ "BDZAm\0"
9484 /* 24566 */ "BDNZAm\0"
9485 /* 24573 */ "BDZLRLm\0"
9486 /* 24581 */ "BDNZLRLm\0"
9487 /* 24590 */ "BDZLm\0"
9488 /* 24596 */ "BDNZLm\0"
9489 /* 24603 */ "BDZLRm\0"
9490 /* 24610 */ "BDNZLRm\0"
9491 /* 24618 */ "BDZm\0"
9492 /* 24623 */ "BDNZm\0"
9493 /* 24629 */ "RLWIMIbm\0"
9494 /* 24638 */ "RLWINMbm\0"
9495 /* 24647 */ "RLWNMbm\0"
9496 /* 24655 */ "BCCTRL8n\0"
9497 /* 24664 */ "BCCTR8n\0"
9498 /* 24672 */ "BCn\0"
9499 /* 24676 */ "BCLn\0"
9500 /* 24681 */ "BCLRLn\0"
9501 /* 24688 */ "BCCTRLn\0"
9502 /* 24696 */ "BCLRn\0"
9503 /* 24702 */ "BCCTRn\0"
9504 /* 24709 */ "BDZLAp\0"
9505 /* 24716 */ "BDNZLAp\0"
9506 /* 24724 */ "BDZAp\0"
9507 /* 24730 */ "BDNZAp\0"
9508 /* 24737 */ "BDZLRLp\0"
9509 /* 24745 */ "BDNZLRLp\0"
9510 /* 24754 */ "BDZLp\0"
9511 /* 24760 */ "BDNZLp\0"
9512 /* 24767 */ "BDZLRp\0"
9513 /* 24774 */ "BDNZLRp\0"
9514 /* 24782 */ "BDZp\0"
9515 /* 24787 */ "BDNZp\0"
9516 /* 24793 */ "MTCTR8loop\0"
9517 /* 24804 */ "DecreaseCTR8loop\0"
9518 /* 24821 */ "MTCTRloop\0"
9519 /* 24831 */ "DecreaseCTRloop\0"
9520 /* 24847 */ "EH_SjLj_Setup\0"
9521 /* 24861 */ "PPCLdFixedAddr\0"
9522 /* 24876 */ "VSPLTBs\0"
9523 /* 24884 */ "VEXTSB2Ds\0"
9524 /* 24894 */ "VEXTSH2Ds\0"
9525 /* 24904 */ "VEXTSW2Ds\0"
9526 /* 24914 */ "VSPLTHs\0"
9527 /* 24922 */ "XXPERMDIs\0"
9528 /* 24932 */ "XXSLDWIs\0"
9529 /* 24941 */ "XSNABSDPs\0"
9530 /* 24951 */ "XSCVDPSXDSs\0"
9531 /* 24963 */ "XSCVDPUXDSs\0"
9532 /* 24975 */ "XSCVDPSXWSs\0"
9533 /* 24987 */ "XSCVDPUXWSs\0"
9534 /* 24999 */ "VEXTSB2Ws\0"
9535 /* 25009 */ "VEXTSH2Ws\0"
9536 /* 25019 */ "XXSPLTWs\0"
9537 /* 25028 */ "XXLEQVOnes\0"
9538 /* 25039 */ "BCLalways\0"
9539 /* 25049 */ "gBCAat\0"
9540 /* 25056 */ "gBCLAat\0"
9541 /* 25064 */ "gBCat\0"
9542 /* 25070 */ "gBCLat\0"
9543 /* 25077 */ "MFVRSAVEv\0"
9544 /* 25087 */ "MTVRSAVEv\0"
9545 /* 25097 */ "STXSIBXv\0"
9546 /* 25106 */ "STXSIHXv\0"
9547 /* 25115 */ "LAx\0"
9548 /* 25119 */ "DCBFx\0"
9549 /* 25125 */ "DCBTx\0"
9550 /* 25131 */ "DCBTSTx\0"
9551 /* 25139 */ "XXLXORz\0"
9552 /* 25147 */ "XXLXORdpz\0"
9553 /* 25157 */ "XXLXORspz\0"
9554 /* 25167 */ "FADDrtz\0"
9555};
9556#ifdef __GNUC__
9557#pragma GCC diagnostic pop
9558#endif
9559
9560extern const unsigned PPCInstrNameIndices[] = {
9561 7459U, 9286U, 13668U, 9915U, 8052U, 8033U, 8061U, 8278U,
9562 6744U, 6759U, 6460U, 6786U, 15267U, 6245U, 16651U, 6473U,
9563 7455U, 8042U, 5912U, 19929U, 6094U, 16490U, 5297U, 5848U,
9564 5900U, 10631U, 8259U, 16355U, 5441U, 13064U, 6849U, 16344U,
9565 6130U, 11948U, 11935U, 13917U, 15958U, 16170U, 8191U, 8238U,
9566 8211U, 8085U, 13882U, 10361U, 19934U, 14151U, 11901U, 6293U,
9567 16734U, 16764U, 9617U, 4970U, 4074U, 8543U, 17017U, 17030U,
9568 8883U, 8890U, 8897U, 8907U, 5270U, 14391U, 14354U, 6458U,
9569 7457U, 18716U, 6255U, 6270U, 8328U, 15910U, 14797U, 16527U,
9570 14814U, 14252U, 4430U, 15250U, 16366U, 14492U, 16582U, 6380U,
9571 13893U, 5383U, 4404U, 5365U, 16404U, 16385U, 9595U, 13942U,
9572 13961U, 4794U, 4738U, 4768U, 4779U, 4719U, 4749U, 6209U,
9573 6193U, 15318U, 6800U, 6817U, 4986U, 4080U, 5276U, 5225U,
9574 14396U, 14360U, 18503U, 9756U, 18486U, 9739U, 4909U, 4029U,
9575 18421U, 9674U, 10697U, 10675U, 5892U, 6888U, 5324U, 15929U,
9576 16505U, 4370U, 15382U, 16321U, 15409U, 16748U, 4422U, 16310U,
9577 16298U, 16480U, 6841U, 16727U, 6773U, 16757U, 8177U, 14036U,
9578 14022U, 8170U, 14029U, 14485U, 8439U, 11728U, 11721U, 11735U,
9579 11742U, 15920U, 10254U, 5940U, 10225U, 5877U, 10246U, 5932U,
9580 10217U, 5869U, 10455U, 10447U, 6952U, 6944U, 15807U, 15797U,
9581 15787U, 15777U, 15827U, 15817U, 19005U, 19015U, 15837U, 15850U,
9582 19032U, 19042U, 15863U, 15876U, 4867U, 4008U, 8470U, 3594U,
9583 4701U, 16981U, 8862U, 17904U, 7913U, 13121U, 818U, 25U,
9584 6834U, 810U, 0U, 13096U, 13128U, 6716U, 16719U, 4394U,
9585 7744U, 7821U, 11614U, 11623U, 14530U, 9632U, 15284U, 6396U,
9586 9376U, 9386U, 5995U, 6010U, 9333U, 9365U, 17042U, 17068U,
9587 17054U, 5948U, 5976U, 5961U, 4976U, 7985U, 9708U, 18455U,
9588 9732U, 18479U, 14583U, 5356U, 5346U, 13663U, 16194U, 6072U,
9589 14233U, 14213U, 16222U, 16201U, 14267U, 14284U, 15348U, 20160U,
9590 6440U, 20118U, 6422U, 11922U, 10719U, 6217U, 8183U, 15207U,
9591 9794U, 9588U, 15199U, 9786U, 9580U, 7056U, 6976U, 6968U,
9592 16552U, 14199U, 16377U, 16422U, 16592U, 13806U, 6081U, 4487U,
9593 6314U, 6178U, 4895U, 4015U, 8498U, 16988U, 8869U, 3600U,
9594 16560U, 13105U, 13981U, 13997U, 19917U, 6114U, 6344U, 16015U,
9595 10567U, 10668U, 10644U, 10656U, 4874U, 8477U, 4850U, 8453U,
9596 18404U, 9657U, 9344U, 9312U, 4954U, 8527U, 5254U, 14376U,
9597 14338U, 18438U, 9691U, 18462U, 9715U, 18773U, 18780U, 1889U,
9598 1808U, 1851U, 1829U, 1931U, 1787U, 1910U, 1872U, 5464U,
9599 4187U, 5885U, 2146U, 7334U, 21549U, 7883U, 21702U, 7365U,
9600 21582U, 7927U, 21737U, 8156U, 11714U, 15229U, 25119U, 15242U,
9601 15942U, 14688U, 15949U, 14695U, 16704U, 25131U, 16693U, 25125U,
9602 719U, 1292U, 739U, 1312U, 7343U, 21562U, 7906U, 21726U,
9603 7386U, 21615U, 7948U, 21770U, 7892U, 21715U, 7372U, 21593U,
9604 7934U, 21748U, 14043U, 25115U, 18534U, 19895U, 24861U, 7261U,
9605 24629U, 23487U, 24638U, 23500U, 24647U, 23513U, 7379U, 21604U,
9606 7941U, 21759U, 7338U, 21553U, 7887U, 21706U, 5160U, 18662U,
9607 16679U, 19655U, 7374U, 21595U, 7936U, 21750U, 19833U, 7262U,
9608 4321U, 20928U, 14944U, 14950U, 729U, 1302U, 750U, 1323U,
9609 1369U, 10128U, 21925U, 14996U, 20461U, 2119U, 10149U, 21958U,
9610 15004U, 20252U, 20521U, 4272U, 2062U, 10134U, 21935U, 20481U,
9611 10233U, 22062U, 20900U, 5935U, 2154U, 10155U, 21968U, 20540U,
9612 10298U, 22104U, 18710U, 2966U, 21303U, 14516U, 2782U, 7317U,
9613 2273U, 4327U, 2081U, 20938U, 14966U, 2790U, 3447U, 120U,
9614 3431U, 3405U, 3418U, 3394U, 1965U, 8681U, 414U, 8647U,
9615 374U, 13776U, 428U, 8658U, 387U, 13791U, 445U, 23531U,
9616 3124U, 8630U, 2597U, 6101U, 2167U, 10170U, 21991U, 20561U,
9617 10318U, 22136U, 21343U, 14958U, 6374U, 2182U, 10187U, 22016U,
9618 20598U, 10340U, 22170U, 21407U, 10111U, 13049U, 5199U, 2133U,
9619 20531U, 4280U, 2068U, 20491U, 20909U, 20651U, 20714U, 22918U,
9620 21573U, 16134U, 2824U, 16152U, 2843U, 21133U, 1632U, 274U,
9621 1008U, 2449U, 1514U, 156U, 890U, 2337U, 1555U, 197U,
9622 931U, 2376U, 1712U, 354U, 1088U, 2535U, 1596U, 238U,
9623 972U, 2415U, 1534U, 176U, 910U, 2356U, 1672U, 314U,
9624 1048U, 2487U, 1494U, 136U, 870U, 2305U, 1691U, 333U,
9625 1067U, 2515U, 1575U, 217U, 951U, 2395U, 1652U, 294U,
9626 1028U, 2468U, 1616U, 258U, 992U, 2434U, 10106U, 3661U,
9627 3283U, 4158U, 4268U, 3306U, 14466U, 2760U, 8407U, 2588U,
9628 8015U, 3571U, 14063U, 8356U, 14460U, 2753U, 24664U, 8400U,
9629 2580U, 24655U, 24688U, 24702U, 21013U, 21865U, 22583U, 23430U,
9630 21876U, 21903U, 22595U, 23441U, 21889U, 22781U, 20833U, 22824U,
9631 20958U, 23022U, 20971U, 8011U, 14058U, 8350U, 24681U, 24696U,
9632 25039U, 24676U, 14454U, 2747U, 8393U, 2573U, 23546U, 9244U,
9633 9166U, 23564U, 9265U, 9202U, 24672U, 20125U, 3112U, 3649U,
9634 24566U, 24730U, 8617U, 3587U, 24552U, 24716U, 14085U, 2699U,
9635 8370U, 24581U, 24745U, 24610U, 24774U, 24596U, 24760U, 24623U,
9636 24787U, 19976U, 3101U, 3644U, 24560U, 24724U, 8612U, 3581U,
9637 24545U, 24709U, 14079U, 2692U, 8363U, 24573U, 24737U, 24603U,
9638 24767U, 24590U, 24754U, 24618U, 24782U, 8007U, 2563U, 11872U,
9639 9223U, 15161U, 4513U, 9183U, 15140U, 9159U, 15132U, 20388U,
9640 3561U, 1977U, 11863U, 9211U, 9151U, 9176U, 14053U, 2675U,
9641 8344U, 11894U, 9234U, 9196U, 15154U, 5181U, 5460U, 6986U,
9642 2254U, 4388U, 17918U, 2922U, 5670U, 2138U, 4836U, 2111U,
9643 5024U, 3788U, 3776U, 2000U, 5436U, 7359U, 3781U, 5136U,
9644 7327U, 17670U, 7869U, 3796U, 2006U, 17911U, 7921U, 5828U,
9645 8839U, 21281U, 18317U, 2938U, 20752U, 23346U, 5841U, 8854U,
9646 21292U, 18330U, 2946U, 20764U, 23357U, 16543U, 19926U, 3086U,
9647 20584U, 21384U, 15994U, 16024U, 5242U, 4285U, 17087U, 5211U,
9648 14187U, 16456U, 14208U, 4559U, 16041U, 16033U, 14326U, 11464U,
9649 4845U, 13196U, 22474U, 21015U, 10077U, 3281U, 6412U, 11473U,
9650 7237U, 16634U, 11502U, 15900U, 11495U, 16666U, 11510U, 19956U,
9651 11519U, 8606U, 11487U, 7267U, 18998U, 13616U, 13391U, 22676U,
9652 23386U, 10473U, 13371U, 16878U, 13551U, 11321U, 22307U, 19025U,
9653 13624U, 13400U, 22688U, 23397U, 13384U, 22572U, 5416U, 13209U,
9654 22495U, 21173U, 16976U, 13590U, 22646U, 23182U, 4829U, 13188U,
9655 22462U, 21002U, 18747U, 13596U, 22656U, 23368U, 5811U, 5989U,
9656 10304U, 22114U, 16843U, 10587U, 22223U, 23128U, 21312U, 10292U,
9657 22094U, 16837U, 10580U, 22212U, 23118U, 21262U, 18284U, 6360U,
9658 10333U, 22159U, 16850U, 10595U, 22235U, 23139U, 21397U, 10617U,
9659 22269U, 16941U, 10603U, 22247U, 23172U, 23324U, 14119U, 20150U,
9660 8448U, 13349U, 22540U, 21826U, 14311U, 1748U, 105U, 7482U,
9661 1732U, 89U, 7463U, 3619U, 7231U, 13297U, 22507U, 21529U,
9662 13160U, 22442U, 20776U, 13378U, 22562U, 10099U, 13363U, 22550U,
9663 21914U, 19648U, 13632U, 22700U, 23408U, 5333U, 13202U, 22484U,
9664 21163U, 12902U, 22410U, 7506U, 13313U, 22518U, 21637U, 7708U,
9665 13320U, 22529U, 21682U, 15314U, 8271U, 16640U, 1108U, 16673U,
9666 1114U, 16712U, 1129U, 16699U, 1122U, 4003U, 13166U, 22452U,
9667 20835U, 4308U, 13180U, 6695U, 13289U, 18752U, 13602U, 6638U,
9668 7415U, 13304U, 13281U, 18768U, 13610U, 22666U, 23377U, 4504U,
9669 2096U, 16001U, 2809U, 24804U, 24831U, 14523U, 4843U, 14829U,
9670 6547U, 7719U, 5086U, 6645U, 7796U, 5101U, 13217U, 16047U,
9671 16242U, 6613U, 7753U, 19980U, 20062U, 6670U, 7830U, 19997U,
9672 20090U, 16974U, 8446U, 14537U, 6709U, 4001U, 13253U, 16075U,
9673 16270U, 14562U, 4939U, 5031U, 6555U, 7727U, 6653U, 7804U,
9674 13226U, 16056U, 16251U, 6621U, 7761U, 20071U, 6678U, 7838U,
9675 20099U, 17002U, 8512U, 14545U, 6723U, 4059U, 13262U, 16084U,
9676 16279U, 761U, 1334U, 779U, 1352U, 24847U, 17083U, 2912U,
9677 20725U, 23200U, 14577U, 17626U, 17245U, 17367U, 17306U, 17428U,
9678 17540U, 5248U, 4292U, 13245U, 15447U, 16895U, 15456U, 16904U,
9679 18028U, 18315U, 15612U, 16939U, 17093U, 3892U, 7081U, 14569U,
9680 4946U, 6563U, 7735U, 6661U, 7812U, 13235U, 16065U, 16260U,
9681 6629U, 7769U, 20080U, 6686U, 7846U, 20108U, 17009U, 8519U,
9682 14553U, 6730U, 4066U, 13271U, 16093U, 16288U, 5002U, 18636U,
9683 6899U, 18787U, 17547U, 19790U, 15717U, 19583U, 15740U, 19608U,
9684 15753U, 19622U, 6045U, 18730U, 15214U, 19567U, 16870U, 19724U,
9685 15729U, 19596U, 15766U, 19636U, 7433U, 10430U, 10420U, 7443U,
9686 3169U, 9468U, 3213U, 9512U, 3247U, 9546U, 6487U, 3311U,
9687 17197U, 17705U, 7568U, 3473U, 17257U, 17753U, 6578U, 3350U,
9688 17221U, 17729U, 17379U, 17825U, 7603U, 3512U, 17318U, 17789U,
9689 17440U, 17861U, 3181U, 9480U, 3225U, 9524U, 3259U, 9558U,
9690 6505U, 3331U, 17209U, 17717U, 7586U, 3493U, 17294U, 17777U,
9691 6596U, 3370U, 17233U, 17741U, 17416U, 17849U, 7630U, 3542U,
9692 17355U, 17813U, 17477U, 17885U, 3613U, 6496U, 3321U, 7577U,
9693 3483U, 6587U, 3360U, 7612U, 3522U, 17282U, 17765U, 17404U,
9694 17837U, 7621U, 3532U, 17343U, 17801U, 17465U, 17873U, 6514U,
9695 3341U, 3193U, 9492U, 7595U, 3503U, 3237U, 9536U, 6605U,
9696 3380U, 3203U, 9502U, 7639U, 3552U, 3271U, 9570U, 5218U,
9697 6738U, 14193U, 14299U, 4565U, 17676U, 7876U, 17553U, 8144U,
9698 17682U, 7899U, 7423U, 7778U, 14982U, 16862U, 15548U, 16927U,
9699 5016U, 18643U, 6905U, 18794U, 17560U, 19797U, 6052U, 18738U,
9700 10388U, 19210U, 6366U, 18759U, 10623U, 19219U, 17269U, 17391U,
9701 17330U, 17452U, 17582U, 17590U, 14332U, 3894U, 2013U, 1138U,
9702 20470U, 20810U, 7083U, 2259U, 1151U, 20640U, 21480U, 18067U,
9703 7522U, 1164U, 20426U, 21647U, 702U, 1192U, 20445U, 23288U,
9704 10408U, 5559U, 21202U, 15297U, 22990U, 4862U, 14660U, 22833U,
9705 21024U, 25167U, 5074U, 14681U, 22866U, 16814U, 15472U, 23032U,
9706 23096U, 21074U, 5409U, 15222U, 5762U, 15519U, 5310U, 21141U,
9707 15185U, 22958U, 5095U, 16821U, 20167U, 23452U, 23107U, 19990U,
9708 23419U, 21084U, 17634U, 16920U, 20175U, 23464U, 23161U, 20183U,
9709 23476U, 23239U, 16983U, 15542U, 23055U, 23191U, 5886U, 4926U,
9710 14666U, 22843U, 21033U, 14115U, 22757U, 4046U, 14645U, 22801U,
9711 20853U, 8465U, 15173U, 22938U, 21835U, 5565U, 21212U, 15303U,
9712 23000U, 5049U, 21054U, 14858U, 22908U, 4932U, 14673U, 22854U,
9713 21043U, 4052U, 14652U, 22812U, 20863U, 6174U, 14783U, 22877U,
9714 21364U, 5174U, 21122U, 15179U, 22948U, 5318U, 21153U, 15193U,
9715 22970U, 5430U, 21184U, 15236U, 22980U, 5816U, 21271U, 15700U,
9716 23065U, 12907U, 22419U, 6237U, 14788U, 22886U, 21372U, 5123U,
9717 21094U, 14990U, 22928U, 16554U, 15465U, 23011U, 23075U, 4010U,
9718 14639U, 22791U, 20844U, 17024U, 16575U, 13832U, 477U, 18858U,
9719 18909U, 8123U, 18843U, 18894U, 18874U, 13819U, 462U, 8105U,
9720 7977U, 2554U, 11705U, 2622U, 16644U, 2862U, 13041U, 2632U,
9721 5080U, 7242U, 11480U, 4382U, 13333U, 15905U, 15012U, 7273U,
9722 8139U, 2567U, 4475U, 3562U, 1978U, 19332U, 8560U, 19228U,
9723 19962U, 3096U, 18977U, 16947U, 2894U, 19752U, 3041U, 19870U,
9724 3068U, 15108U, 20361U, 669U, 5113U, 19338U, 8567U, 15706U,
9725 19362U, 18950U, 16828U, 19701U, 18673U, 15060U, 20307U, 8669U,
9726 400U, 23525U, 3293U, 16462U, 7787U, 8623U, 5039U, 19241U,
9727 16788U, 19688U, 18651U, 15043U, 20288U, 18527U, 19888U, 14842U,
9728 16884U, 19733U, 19556U, 15083U, 20333U, 3390U, 1960U, 19344U,
9729 8574U, 16778U, 2870U, 19670U, 3013U, 18399U, 2954U, 15019U,
9730 20261U, 614U, 19375U, 2999U, 19256U, 20028U, 3107U, 18984U,
9731 16952U, 2900U, 19758U, 3048U, 19883U, 3074U, 15116U, 20370U,
9732 680U, 7503U, 2282U, 14972U, 2797U, 17688U, 13336U, 19350U,
9733 8581U, 10269U, 7955U, 18553U, 18802U, 19805U, 8434U, 14445U,
9734 19770U, 8595U, 3625U, 19356U, 8588U, 15889U, 19676U, 18548U,
9735 15027U, 20270U, 625U, 711U, 515U, 19405U, 3006U, 19269U,
9736 20193U, 3119U, 18991U, 16957U, 2906U, 19764U, 3055U, 19912U,
9737 3080U, 15124U, 20379U, 691U, 23539U, 8639U, 5648U, 18692U,
9738 19862U, 19875U, 18540U, 19901U, 12936U, 19304U, 17105U, 18367U,
9739 18337U, 19543U, 18384U, 13327U, 8549U, 8315U, 13084U, 8378U,
9740 8283U, 19319U, 18574U, 18677U, 18823U, 8415U, 8300U, 19839U,
9741 18352U, 19576U, 19779U, 5061U, 16799U, 5116U, 2124U, 13640U,
9742 6522U, 14846U, 19530U, 5861U, 13714U, 2658U, 14473U, 2768U,
9743 13696U, 14836U, 10090U, 7663U, 5925U, 10082U, 7654U, 8428U,
9744 22899U, 14069U, 2680U, 14428U, 6527U, 2203U, 14124U, 14411U,
9745 2729U, 14423U, 9772U, 3912U, 2026U, 13726U, 5547U, 6326U,
9746 25077U, 20218U, 13742U, 5533U, 5142U, 20202U, 5573U, 17966U,
9747 5717U, 18159U, 4467U, 4481U, 6541U, 2219U, 14479U, 2775U,
9748 24793U, 24821U, 13708U, 34U, 82U, 6572U, 7408U, 21626U,
9749 20404U, 21437U, 20397U, 14074U, 2686U, 14434U, 5526U, 6534U,
9750 2211U, 14130U, 14417U, 2736U, 14440U, 9779U, 13734U, 5553U,
9751 6335U, 25087U, 3637U, 20225U, 13749U, 8712U, 7531U, 5540U,
9752 5008U, 8777U, 8927U, 9085U, 3629U, 9414U, 15555U, 20210U,
9753 5068U, 16807U, 23085U, 21064U, 17620U, 16913U, 23150U, 23229U,
9754 5130U, 10262U, 22083U, 21104U, 7512U, 2279U, 17664U, 10610U,
9755 22258U, 23249U, 14103U, 14092U, 2707U, 5206U, 2132U, 20530U,
9756 21132U, 10640U, 6712U, 2249U, 10211U, 22052U, 20631U, 10383U,
9757 22203U, 21447U, 11868U, 1763U, 1775U, 14183U, 2719U, 20696U,
9758 22765U, 14171U, 2720U, 20697U, 4555U, 2106U, 20512U, 20985U,
9759 7715U, 2300U, 14977U, 2803U, 22766U, 7316U, 2272U, 23621U,
9760 24533U, 23741U, 5424U, 5701U, 3577U, 1982U, 23590U, 23669U,
9761 19961U, 3095U, 23893U, 24194U, 23638U, 24107U, 24452U, 23822U,
9762 5138U, 23969U, 24286U, 23704U, 5038U, 23950U, 24263U, 23689U,
9763 14841U, 24060U, 24395U, 23785U, 3389U, 1959U, 23843U, 24134U,
9764 23582U, 23923U, 24230U, 23662U, 20027U, 3106U, 23903U, 24206U,
9765 23646U, 24116U, 24463U, 23829U, 7518U, 2286U, 3624U, 1987U,
9766 23853U, 24146U, 23597U, 23932U, 24241U, 23675U, 20197U, 3118U,
9767 23913U, 24218U, 23654U, 24125U, 24474U, 23836U, 5647U, 23977U,
9768 24296U, 23710U, 12935U, 24016U, 24343U, 23749U, 17104U, 13083U,
9769 24039U, 24370U, 23768U, 24079U, 24418U, 23800U, 826U, 9801U,
9770 11749U, 9931U, 11960U, 17133U, 9856U, 11804U, 10018U, 12099U,
9771 839U, 9816U, 11764U, 9946U, 11975U, 17147U, 9872U, 11820U,
9772 10034U, 12115U, 13843U, 9830U, 11778U, 9970U, 12029U, 17922U,
9773 9887U, 11835U, 10049U, 12173U, 13854U, 9843U, 11791U, 9983U,
9774 12042U, 17934U, 9901U, 11849U, 10063U, 12187U, 851U, 11989U,
9775 14503U, 12055U, 17951U, 12201U, 17160U, 12130U, 2664U, 12016U,
9776 17185U, 12159U, 1447U, 12003U, 12070U, 17173U, 12145U, 12084U,
9777 3925U, 2032U, 5678U, 18103U, 16435U, 16444U, 490U, 1204U,
9778 543U, 1250U, 498U, 1212U, 522U, 1229U, 3942U, 2041U,
9779 23863U, 24158U, 23605U, 23941U, 24252U, 23682U, 5695U, 23998U,
9780 24321U, 23727U, 5043U, 23959U, 24274U, 23696U, 14852U, 24069U,
9781 24406U, 23792U, 7121U, 2266U, 23873U, 24170U, 23613U, 24007U,
9782 24332U, 23734U, 18137U, 2932U, 23883U, 24182U, 23630U, 24098U,
9783 24441U, 23815U, 5653U, 23987U, 24308U, 23718U, 12942U, 24027U,
9784 24356U, 23758U, 17109U, 13089U, 24049U, 24382U, 23776U, 24088U,
9785 24429U, 23807U, 10396U, 4246U, 13756U, 16108U, 5479U, 4198U,
9786 4222U, 7289U, 7322U, 3669U, 7404U, 5081U, 7294U, 8020U,
9787 21793U, 13702U, 22724U, 4333U, 8026U, 594U, 1179U, 20412U,
9788 21803U, 13719U, 604U, 22734U, 20948U, 7547U, 21660U, 7554U,
9789 2291U, 20661U, 21671U, 9054U, 2607U, 20673U, 21844U, 9069U,
9790 2615U, 20685U, 21855U, 3947U, 4654U, 16962U, 1469U, 1401U,
9791 2226U, 1424U, 2324U, 6143U, 1374U, 4571U, 4523U, 4627U,
9792 4598U, 1483U, 1414U, 2239U, 1437U, 2505U, 6157U, 1389U,
9793 4586U, 4539U, 4642U, 4614U, 3907U, 2020U, 4161U, 2055U,
9794 13689U, 2650U, 9040U, 4154U, 2047U, 13681U, 2641U, 5339U,
9795 24492U, 21322U, 3461U, 6060U, 6702U, 6025U, 16966U, 6230U,
9796 4451U, 5156U, 21114U, 17684U, 2917U, 20734U, 23259U, 20190U,
9797 19909U, 18130U, 19854U, 4258U, 13767U, 16122U, 5496U, 4211U,
9798 4235U, 5511U, 4802U, 7310U, 585U, 21539U, 20993U, 17501U,
9799 7855U, 21692U, 23208U, 5529U, 21194U, 17947U, 2927U, 20743U,
9800 23267U, 3943U, 2042U, 18943U, 18594U, 19234U, 16783U, 2876U,
9801 19682U, 3020U, 18589U, 2960U, 15035U, 20279U, 636U, 5696U,
9802 15711U, 19368U, 18956U, 18600U, 16832U, 19706U, 18705U, 15067U,
9803 20315U, 5044U, 19248U, 16793U, 19694U, 18656U, 15051U, 20297U,
9804 19818U, 14853U, 16889U, 19739U, 19561U, 15091U, 20342U, 7122U,
9805 2267U, 19381U, 18963U, 18606U, 19262U, 16857U, 2882U, 19718U,
9806 3027U, 18838U, 2973U, 15075U, 20324U, 647U, 17692U, 11930U,
9807 13458U, 18612U, 10280U, 7960U, 18559U, 18808U, 19811U, 19774U,
9808 8600U, 18133U, 2933U, 15894U, 19411U, 18970U, 18618U, 19275U,
9809 16934U, 2888U, 19746U, 3034U, 19857U, 3062U, 15100U, 20352U,
9810 658U, 5654U, 18698U, 18566U, 25097U, 18815U, 25106U, 19825U,
9811 12943U, 19311U, 17110U, 18375U, 18344U, 18391U, 8554U, 8321U,
9812 13090U, 8385U, 8291U, 19325U, 18581U, 18684U, 18830U, 8421U,
9813 8307U, 19846U, 18359U, 19784U, 6417U, 2197U, 10204U, 22041U,
9814 20621U, 4315U, 2074U, 10141U, 21946U, 20501U, 10239U, 22072U,
9815 20918U, 6039U, 2160U, 10162U, 21979U, 20550U, 10311U, 22125U,
9816 21333U, 4339U, 2088U, 6107U, 2174U, 10178U, 22003U, 20572U,
9817 10325U, 22147U, 21353U, 10355U, 22193U, 15496U, 23044U, 6389U,
9818 2189U, 10195U, 22028U, 20609U, 10347U, 22181U, 21417U, 21428U,
9819 4454U, 9U, 16536U, 4299U, 7279U, 4657U, 7300U, 3740U,
9820 1993U, 3286U, 1951U, 14450U, 2743U, 9650U, 15983U, 7970U,
9821 15972U, 24500U, 3133U, 24511U, 3145U, 24522U, 3157U, 5667U,
9822 7393U, 5292U, 3467U, 6066U, 8078U, 19102U, 18519U, 5110U,
9823 7500U, 6168U, 796U, 19537U, 863U, 4693U, 4459U, 6354U,
9824 803U, 18925U, 2979U, 18934U, 2989U, 10651U, 16471U, 9001U,
9825 14441U, 18091U, 7966U, 11880U, 13645U, 3954U, 7126U, 18165U,
9826 13489U, 18150U, 13517U, 9129U, 11558U, 14606U, 14902U, 15580U,
9827 8739U, 14631U, 8804U, 8973U, 14927U, 9112U, 9441U, 15604U,
9828 5249U, 4293U, 3836U, 7017U, 17988U, 3970U, 7142U, 18189U,
9829 5180U, 13355U, 19550U, 66U, 5023U, 19712U, 74U, 13874U,
9830 16622U, 3746U, 3802U, 4142U, 5822U, 8832U, 7219U, 3691U,
9831 18309U, 11526U, 22331U, 11632U, 22356U, 3992U, 20820U, 5769U,
9832 21236U, 7164U, 21490U, 13565U, 22620U, 18219U, 23298U, 11573U,
9833 22343U, 11641U, 22369U, 3883U, 20797U, 5624U, 21223U, 7072U,
9834 21467U, 13442U, 22607U, 18058U, 23275U, 4107U, 20874U, 5778U,
9835 21249U, 7184U, 21503U, 13574U, 22633U, 18251U, 23311U, 3709U,
9836 20785U, 6912U, 21455U, 17574U, 23217U, 4133U, 20887U, 7210U,
9837 21516U, 18300U, 23333U, 13435U, 13558U, 3675U, 4813U, 6880U,
9838 17506U, 15686U, 48U, 15693U, 57U, 4148U, 5835U, 8847U,
9839 7225U, 3700U, 18324U, 5587U, 13427U, 17980U, 5731U, 13543U,
9840 18181U, 5633U, 13451U, 18073U, 5787U, 13583U, 18260U, 17094U,
9841 8693U, 8767U, 8917U, 9075U, 9404U, 11588U, 19129U, 19463U,
9842 19118U, 19452U, 19148U, 19482U, 19168U, 19502U, 8720U, 5660U,
9843 8785U, 8944U, 9093U, 4096U, 7173U, 18228U, 9422U, 4666U,
9844 24884U, 17115U, 24999U, 13145U, 4675U, 24894U, 17124U, 25009U,
9845 4684U, 24904U, 19068U, 19396U, 19093U, 19434U, 19187U, 19521U,
9846 4807U, 3771U, 19060U, 19388U, 19109U, 19443U, 5610U, 19077U,
9847 19418U, 3933U, 5686U, 7112U, 18111U, 19085U, 19426U, 19139U,
9848 19473U, 18044U, 19179U, 19513U, 19159U, 19493U, 11565U, 11550U,
9849 11650U, 3900U, 5640U, 7089U, 18080U, 4116U, 5794U, 7193U,
9850 18267U, 14881U, 14891U, 11607U, 3868U, 5603U, 7049U, 18037U,
9851 3977U, 5747U, 7149U, 18204U, 8963U, 5572U, 13420U, 17965U,
9852 5716U, 13526U, 18158U, 17567U, 3717U, 6920U, 17605U, 3733U,
9853 6927U, 17649U, 17897U, 5707U, 8703U, 8935U, 14910U, 8747U,
9854 8812U, 8981U, 14935U, 13471U, 13497U, 13533U, 13462U, 3814U,
9855 5579U, 6995U, 17972U, 3962U, 5723U, 7134U, 18173U, 5595U,
9856 18003U, 5739U, 18196U, 5129U, 3875U, 5616U, 7064U, 18050U,
9857 3984U, 5754U, 7156U, 18211U, 9449U, 5219U, 13865U, 16609U,
9858 5055U, 17599U, 11534U, 14194U, 14300U, 4566U, 5423U, 9138U,
9859 14136U, 14317U, 5700U, 19290U, 15310U, 15480U, 15366U, 15503U,
9860 15374U, 15526U, 9296U, 15488U, 9304U, 15511U, 9396U, 15534U,
9861 3763U, 5188U, 6960U, 17697U, 3924U, 5677U, 7103U, 18102U,
9862 4821U, 13172U, 17514U, 11582U, 9010U, 9644U, 11675U, 20032U,
9863 3753U, 5150U, 7540U, 9047U, 6934U, 13339U, 7561U, 9061U,
9864 17677U, 7647U, 9068U, 11597U, 19204U, 8145U, 4708U, 17489U,
9865 8435U, 3758U, 5155U, 7247U, 7673U, 6939U, 10442U, 13344U,
9866 17037U, 17683U, 3917U, 24876U, 7096U, 24914U, 3851U, 7032U,
9867 18011U, 18087U, 14446U, 3663U, 4801U, 6874U, 13154U, 17500U,
9868 3809U, 5535U, 7254U, 6990U, 10575U, 13415U, 17099U, 17946U,
9869 8002U, 21781U, 13655U, 22712U, 8162U, 21814U, 14014U, 22745U,
9870 13481U, 18142U, 13508U, 9120U, 11543U, 14598U, 14873U, 15572U,
9871 8731U, 14623U, 8796U, 8955U, 14919U, 9104U, 9433U, 15596U,
9872 15563U, 14589U, 14864U, 14614U, 15588U, 19282U, 3843U, 7024U,
9873 17995U, 19296U, 3860U, 7041U, 18020U, 14333U, 41U, 3655U,
9874 6866U, 14770U, 3822U, 7003U, 16103U, 17U, 6033U, 7397U,
9875 14307U, 2724U, 20705U, 7714U, 2299U, 14976U, 2802U, 22773U,
9876 11305U, 12446U, 10865U, 12291U, 10530U, 12610U, 11267U, 12409U,
9877 11238U, 12389U, 10921U, 12317U, 11327U, 12454U, 11175U, 12362U,
9878 11385U, 12473U, 11139U, 12352U, 11657U, 12371U, 12847U, 10008U,
9879 14704U, 24951U, 15620U, 24975U, 14737U, 24963U, 15653U, 24987U,
9880 11184U, 11193U, 10463U, 20007U, 20130U, 20232U, 20017U, 20140U,
9881 20242U, 12299U, 11202U, 9960U, 12419U, 10881U, 12626U, 12308U,
9882 12428U, 10901U, 12646U, 11394U, 12482U, 10558U, 12988U, 11220U,
9883 12380U, 10791U, 12554U, 11119U, 12809U, 12282U, 10520U, 10856U,
9884 12263U, 11448U, 11030U, 10847U, 12254U, 11159U, 11021U, 10749U,
9885 12512U, 11077U, 12767U, 12227U, 10490U, 11039U, 12344U, 10539U,
9886 12729U, 11287U, 24941U, 12437U, 10977U, 12327U, 10769U, 12532U,
9887 11097U, 12787U, 12272U, 10509U, 10727U, 12490U, 11055U, 12745U,
9888 12217U, 10479U, 7680U, 4346U, 9016U, 11681U, 20038U, 10941U,
9889 12676U, 7694U, 19052U, 13137U, 12912U, 10955U, 12690U, 11347U,
9890 12464U, 10548U, 12960U, 10811U, 12236U, 10500U, 12574U, 11402U,
9891 11356U, 10827U, 12244U, 12590U, 11249U, 12400U, 10993U, 12335U,
9892 11313U, 12927U, 10873U, 12618U, 828U, 9803U, 11751U, 9933U,
9893 11962U, 17135U, 9858U, 11806U, 10020U, 12101U, 11277U, 22293U,
9894 12892U, 22396U, 10931U, 22279U, 12666U, 22382U, 11337U, 22317U,
9895 12950U, 22428U, 11149U, 12829U, 9996U, 12856U, 14715U, 15631U,
9896 14748U, 15664U, 12865U, 1458U, 11211U, 11666U, 14726U, 15642U,
9897 14759U, 15675U, 10891U, 12636U, 11428U, 13013U, 10911U, 12656U,
9898 11438U, 13023U, 11420U, 13005U, 841U, 9818U, 11766U, 9948U,
9899 11977U, 17149U, 9874U, 11822U, 10036U, 12117U, 13845U, 9832U,
9900 11780U, 9972U, 12031U, 17924U, 9889U, 11837U, 10051U, 12175U,
9901 13856U, 9845U, 11793U, 9985U, 12044U, 17936U, 9903U, 11851U,
9902 10065U, 12189U, 853U, 11991U, 14505U, 12057U, 17953U, 12203U,
9903 17162U, 12132U, 2666U, 12018U, 17187U, 12161U, 1449U, 12005U,
9904 12072U, 17175U, 12147U, 12086U, 11229U, 12874U, 10801U, 12564U,
9905 11129U, 12819U, 11456U, 13033U, 11167U, 12839U, 10759U, 12522U,
9906 11087U, 12777U, 11047U, 12737U, 11296U, 12918U, 10985U, 12712U,
9907 10780U, 12543U, 11108U, 12798U, 10738U, 12501U, 11066U, 12756U,
9908 7687U, 4354U, 9024U, 11689U, 20046U, 10948U, 12683U, 7701U,
9909 4362U, 9032U, 11697U, 20054U, 10966U, 12701U, 11376U, 12979U,
9910 10819U, 12582U, 11411U, 12996U, 3683U, 11366U, 12969U, 10837U,
9911 12600U, 11258U, 12883U, 11002U, 12720U, 4123U, 5801U, 7200U,
9912 18274U, 5458U, 6984U, 13409U, 17916U, 7995U, 18239U, 8756U,
9913 8821U, 8990U, 9457U, 18120U, 5196U, 4277U, 17080U, 25028U,
9914 5203U, 14180U, 14174U, 4552U, 24485U, 14304U, 25147U, 25157U,
9915 25139U, 4171U, 17522U, 17612U, 17656U, 4179U, 17531U, 9144U,
9916 7350U, 24922U, 14143U, 19196U, 8150U, 19966U, 18289U, 7861U,
9917 24932U, 18624U, 3724U, 11011U, 17640U, 18094U, 25019U, 4167U,
9918 3301U, 25049U, 14459U, 8399U, 8010U, 3565U, 25056U, 14057U,
9919 8349U, 25070U, 25064U,
9920};
9921
9922extern const uint8_t PPCInstrDeprecationFeatures[] = {
9923 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9924 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9925 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9926 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9927 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9928 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9929 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9930 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9931 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9932 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9933 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9934 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9935 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9936 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9937 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9938 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9939 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9940 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9941 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9942 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9943 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9944 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9945 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9946 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9947 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9948 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9949 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9950 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9951 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9952 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9953 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9954 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9955 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9956 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9957 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9958 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9959 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9960 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9961 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9962 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9963 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9964 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9965 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9966 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9967 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9968 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9969 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9970 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9971 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9972 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9973 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9974 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9975 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9976 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9977 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9978 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9979 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9980 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9981 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9982 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9983 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9984 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9985 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9986 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9987 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9988 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9989 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9990 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9991 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9992 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9993 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9994 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9995 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9996 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9997 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9998 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
9999 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10000 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10001 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10002 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10003 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10004 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10005 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10006 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10007 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10008 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10009 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10010 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10011 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10012 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10013 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10014 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10015 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10016 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10017 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10018 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10019 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10020 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10021 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10022 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10023 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10024 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10025 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10026 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10027 uint8_t(-1), uint8_t(-1), uint8_t(-1), PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST,
10028 PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST, PPC::DeprecatedDST, uint8_t(-1), uint8_t(-1), uint8_t(-1),
10029 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10030 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10031 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10032 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10033 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10034 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10035 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10036 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10037 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10038 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10039 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10040 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10041 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10042 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10043 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10044 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10045 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10046 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10047 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10048 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10049 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10050 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10051 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10052 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10053 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10054 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10055 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10056 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10057 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10058 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10059 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10060 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10061 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10062 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10063 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10064 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10065 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10066 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10067 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10068 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10069 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10070 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10071 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10072 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10073 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10074 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10075 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10076 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10077 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10078 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10079 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10080 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10081 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10082 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10083 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10084 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10085 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10086 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10087 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10088 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10089 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10090 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10091 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10092 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10093 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10094 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10095 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10096 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10097 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10098 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10099 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10100 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10101 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10102 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10103 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10104 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10105 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10106 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10107 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10108 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10109 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10110 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10111 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10112 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10113 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10114 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10115 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10116 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10117 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10118 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10119 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10120 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10121 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10122 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10123 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10124 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10125 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10126 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10127 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10128 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10129 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10130 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10131 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10132 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10133 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10134 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10135 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10136 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10137 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10138 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10139 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10140 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10141 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10142 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10143 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10144 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10145 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10146 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10147 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10148 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10149 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10150 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10151 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10152 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10153 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10154 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10155 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10156 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10157 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10158 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10159 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10160 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10161 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10162 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10163 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10164 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10165 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10166 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10167 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10168 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10169 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10170 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10171 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10172 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10173 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10174 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10175 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10176 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10177 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10178 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10179 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10180 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10181 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10182 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10183 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10184 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10185 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10186 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10187 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10188 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10189 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10190 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10191 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10192 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10193 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10194 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10195 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10196 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10197 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10198 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10199 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10200 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10201 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10202 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10203 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10204 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10205 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10206 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10207 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10208 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10209 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10210 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10211 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10212 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10213 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10214 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10215 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10216 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10217 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10218 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10219 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10220 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10221 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10222 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10223 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10224 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10225 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10226 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10227 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10228 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10229 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10230 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10231 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10232 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10233 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10234 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10235 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10236 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10237 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10238 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10239 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10240 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10241 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10242 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10243 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10244 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10245 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10246 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10247 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10248 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10249 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10250 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10251 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10252 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10253 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10254 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10255 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10256 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10257 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10258 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10259 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10260 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10261 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10262 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10263 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10264 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10265 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10266 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10267 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10268 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10269 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10270 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10271 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10272 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10273 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10274 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10275 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10276 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10277 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10278 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10279 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10280 uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1), uint8_t(-1),
10281 uint8_t(-1), uint8_t(-1), uint8_t(-1),
10282};
10283
10284static inline void InitPPCMCInstrInfo(MCInstrInfo *II) {
10285 II->InitMCInstrInfo(PPCDescs.Insts, PPCInstrNameIndices, PPCInstrNameData, PPCInstrDeprecationFeatures, nullptr, 2867);
10286}
10287
10288} // end namespace llvm
10289#endif // GET_INSTRINFO_MC_DESC
10290
10291#ifdef GET_INSTRINFO_HEADER
10292#undef GET_INSTRINFO_HEADER
10293namespace llvm {
10294struct PPCGenInstrInfo : public TargetInstrInfo {
10295 explicit PPCGenInstrInfo(unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u, unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u);
10296 ~PPCGenInstrInfo() override = default;
10297
10298};
10299} // end namespace llvm
10300#endif // GET_INSTRINFO_HEADER
10301
10302#ifdef GET_INSTRINFO_HELPER_DECLS
10303#undef GET_INSTRINFO_HELPER_DECLS
10304
10305
10306#endif // GET_INSTRINFO_HELPER_DECLS
10307
10308#ifdef GET_INSTRINFO_HELPERS
10309#undef GET_INSTRINFO_HELPERS
10310
10311#endif // GET_INSTRINFO_HELPERS
10312
10313#ifdef GET_INSTRINFO_CTOR_DTOR
10314#undef GET_INSTRINFO_CTOR_DTOR
10315namespace llvm {
10316extern const PPCInstrTable PPCDescs;
10317extern const unsigned PPCInstrNameIndices[];
10318extern const char PPCInstrNameData[];
10319extern const uint8_t PPCInstrDeprecationFeatures[];
10320PPCGenInstrInfo::PPCGenInstrInfo(unsigned CFSetupOpcode, unsigned CFDestroyOpcode, unsigned CatchRetOpcode, unsigned ReturnOpcode)
10321 : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) {
10322 InitMCInstrInfo(PPCDescs.Insts, PPCInstrNameIndices, PPCInstrNameData, PPCInstrDeprecationFeatures, nullptr, 2867);
10323}
10324} // end namespace llvm
10325#endif // GET_INSTRINFO_CTOR_DTOR
10326
10327#ifdef GET_INSTRINFO_OPERAND_ENUM
10328#undef GET_INSTRINFO_OPERAND_ENUM
10329namespace llvm {
10330namespace PPC {
10331namespace OpName {
10332enum {
10333 OPERAND_LAST
10334};
10335} // end namespace OpName
10336} // end namespace PPC
10337} // end namespace llvm
10338#endif //GET_INSTRINFO_OPERAND_ENUM
10339
10340#ifdef GET_INSTRINFO_NAMED_OPS
10341#undef GET_INSTRINFO_NAMED_OPS
10342namespace llvm {
10343namespace PPC {
10344LLVM_READONLY
10345int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) {
10346 return -1;
10347}
10348} // end namespace PPC
10349} // end namespace llvm
10350#endif //GET_INSTRINFO_NAMED_OPS
10351
10352#ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM
10353#undef GET_INSTRINFO_OPERAND_TYPES_ENUM
10354namespace llvm {
10355namespace PPC {
10356namespace OpTypes {
10357enum OperandType {
10358 abscalltarget = 0,
10359 abscondbrtarget = 1,
10360 absdirectbrtarget = 2,
10361 atimm = 3,
10362 calltarget = 4,
10363 condbrtarget = 5,
10364 crbitm = 6,
10365 directbrtarget = 7,
10366 dispRI = 8,
10367 dispRI34 = 9,
10368 dispRI34_pcrel = 10,
10369 dispRIHash = 11,
10370 dispRIX = 12,
10371 dispRIX16 = 13,
10372 dispSPE2 = 14,
10373 dispSPE4 = 15,
10374 dispSPE8 = 16,
10375 f32imm = 17,
10376 f64imm = 18,
10377 i1imm = 19,
10378 i8imm = 20,
10379 i16imm = 21,
10380 i32imm = 22,
10381 i64imm = 23,
10382 imm32SExt16 = 24,
10383 imm64SExt16 = 25,
10384 imm64ZExt32 = 26,
10385 immZero = 27,
10386 memr = 28,
10387 memri = 29,
10388 memri34 = 30,
10389 memri34_pcrel = 31,
10390 memrihash = 32,
10391 memrix = 33,
10392 memrix16 = 34,
10393 memrr = 35,
10394 pred = 36,
10395 ptr_rc_idx = 37,
10396 ptr_rc_nor0 = 38,
10397 ptype0 = 39,
10398 ptype1 = 40,
10399 ptype2 = 41,
10400 ptype3 = 42,
10401 ptype4 = 43,
10402 ptype5 = 44,
10403 s5imm = 45,
10404 s16imm = 46,
10405 s16imm64 = 47,
10406 s17imm = 48,
10407 s17imm64 = 49,
10408 s34imm = 50,
10409 s34imm_pcrel = 51,
10410 spe2dis = 52,
10411 spe4dis = 53,
10412 spe8dis = 54,
10413 tlscall = 55,
10414 tlscall32 = 56,
10415 tlsgd = 57,
10416 tlsgd32 = 58,
10417 tlsreg = 59,
10418 tlsreg32 = 60,
10419 tocentry = 61,
10420 tocentry32 = 62,
10421 type0 = 63,
10422 type1 = 64,
10423 type2 = 65,
10424 type3 = 66,
10425 type4 = 67,
10426 type5 = 68,
10427 u1imm = 69,
10428 u2imm = 70,
10429 u3imm = 71,
10430 u4imm = 72,
10431 u5imm = 73,
10432 u6imm = 74,
10433 u7imm = 75,
10434 u8imm = 76,
10435 u10imm = 77,
10436 u12imm = 78,
10437 u16imm = 79,
10438 u16imm64 = 80,
10439 untyped_imm_0 = 81,
10440 acc = 82,
10441 crbitrc = 83,
10442 crrc = 84,
10443 dmr = 85,
10444 dmrp = 86,
10445 dmrrow = 87,
10446 dmrrowp = 88,
10447 f4rc = 89,
10448 f8rc = 90,
10449 fpairrc = 91,
10450 g8prc = 92,
10451 g8rc = 93,
10452 g8rc_nox0 = 94,
10453 gprc = 95,
10454 gprc_nor0 = 96,
10455 spe4rc = 97,
10456 sperc = 98,
10457 spilltovsrrc = 99,
10458 uacc = 100,
10459 vfrc = 101,
10460 vrrc = 102,
10461 vsfrc = 103,
10462 vsrc = 104,
10463 vsrpevenrc = 105,
10464 vsrprc = 106,
10465 vssrc = 107,
10466 wacc = 108,
10467 wacc_hi = 109,
10468 ACCRC = 110,
10469 CARRYRC = 111,
10470 CRBITRC = 112,
10471 CRRC = 113,
10472 CTRRC = 114,
10473 CTRRC8 = 115,
10474 DMRRC = 116,
10475 DMRROWRC = 117,
10476 DMRROWpRC = 118,
10477 DMRpRC = 119,
10478 F4RC = 120,
10479 F8RC = 121,
10480 FHRC = 122,
10481 FpRC = 123,
10482 G8RC = 124,
10483 G8RC_NOX0 = 125,
10484 G8pRC = 126,
10485 GPRC = 127,
10486 GPRC32 = 128,
10487 GPRC_NOR0 = 129,
10488 LR8RC = 130,
10489 LRRC = 131,
10490 SPERC = 132,
10491 SPILLTOVSRRC = 133,
10492 UACCRC = 134,
10493 VFHRC = 135,
10494 VFRC = 136,
10495 VRRC = 137,
10496 VRSAVERC = 138,
10497 VSFRC = 139,
10498 VSLRC = 140,
10499 VSRC = 141,
10500 VSRpRC = 142,
10501 VSSRC = 143,
10502 WACCRC = 144,
10503 WACC_HIRC = 145,
10504 OPERAND_TYPE_LIST_END
10505};
10506} // end namespace OpTypes
10507} // end namespace PPC
10508} // end namespace llvm
10509#endif // GET_INSTRINFO_OPERAND_TYPES_ENUM
10510
10511#ifdef GET_INSTRINFO_OPERAND_TYPE
10512#undef GET_INSTRINFO_OPERAND_TYPE
10513namespace llvm {
10514namespace PPC {
10515LLVM_READONLY
10516static int getOperandType(uint16_t Opcode, uint16_t OpIdx) {
10517 static const uint16_t Offsets[] = {
10518 /* PHI */
10519 0,
10520 /* INLINEASM */
10521 1,
10522 /* INLINEASM_BR */
10523 1,
10524 /* CFI_INSTRUCTION */
10525 1,
10526 /* EH_LABEL */
10527 2,
10528 /* GC_LABEL */
10529 3,
10530 /* ANNOTATION_LABEL */
10531 4,
10532 /* KILL */
10533 5,
10534 /* EXTRACT_SUBREG */
10535 5,
10536 /* INSERT_SUBREG */
10537 8,
10538 /* IMPLICIT_DEF */
10539 12,
10540 /* SUBREG_TO_REG */
10541 13,
10542 /* COPY_TO_REGCLASS */
10543 17,
10544 /* DBG_VALUE */
10545 20,
10546 /* DBG_VALUE_LIST */
10547 20,
10548 /* DBG_INSTR_REF */
10549 20,
10550 /* DBG_PHI */
10551 20,
10552 /* DBG_LABEL */
10553 20,
10554 /* REG_SEQUENCE */
10555 21,
10556 /* COPY */
10557 23,
10558 /* BUNDLE */
10559 25,
10560 /* LIFETIME_START */
10561 25,
10562 /* LIFETIME_END */
10563 26,
10564 /* PSEUDO_PROBE */
10565 27,
10566 /* ARITH_FENCE */
10567 31,
10568 /* STACKMAP */
10569 33,
10570 /* FENTRY_CALL */
10571 35,
10572 /* PATCHPOINT */
10573 35,
10574 /* LOAD_STACK_GUARD */
10575 41,
10576 /* PREALLOCATED_SETUP */
10577 42,
10578 /* PREALLOCATED_ARG */
10579 43,
10580 /* STATEPOINT */
10581 46,
10582 /* LOCAL_ESCAPE */
10583 46,
10584 /* FAULTING_OP */
10585 48,
10586 /* PATCHABLE_OP */
10587 49,
10588 /* PATCHABLE_FUNCTION_ENTER */
10589 49,
10590 /* PATCHABLE_RET */
10591 49,
10592 /* PATCHABLE_FUNCTION_EXIT */
10593 49,
10594 /* PATCHABLE_TAIL_CALL */
10595 49,
10596 /* PATCHABLE_EVENT_CALL */
10597 49,
10598 /* PATCHABLE_TYPED_EVENT_CALL */
10599 51,
10600 /* ICALL_BRANCH_FUNNEL */
10601 54,
10602 /* MEMBARRIER */
10603 54,
10604 /* JUMP_TABLE_DEBUG_INFO */
10605 54,
10606 /* CONVERGENCECTRL_ENTRY */
10607 55,
10608 /* CONVERGENCECTRL_ANCHOR */
10609 56,
10610 /* CONVERGENCECTRL_LOOP */
10611 57,
10612 /* CONVERGENCECTRL_GLUE */
10613 59,
10614 /* G_ASSERT_SEXT */
10615 60,
10616 /* G_ASSERT_ZEXT */
10617 63,
10618 /* G_ASSERT_ALIGN */
10619 66,
10620 /* G_ADD */
10621 69,
10622 /* G_SUB */
10623 72,
10624 /* G_MUL */
10625 75,
10626 /* G_SDIV */
10627 78,
10628 /* G_UDIV */
10629 81,
10630 /* G_SREM */
10631 84,
10632 /* G_UREM */
10633 87,
10634 /* G_SDIVREM */
10635 90,
10636 /* G_UDIVREM */
10637 94,
10638 /* G_AND */
10639 98,
10640 /* G_OR */
10641 101,
10642 /* G_XOR */
10643 104,
10644 /* G_IMPLICIT_DEF */
10645 107,
10646 /* G_PHI */
10647 108,
10648 /* G_FRAME_INDEX */
10649 109,
10650 /* G_GLOBAL_VALUE */
10651 111,
10652 /* G_PTRAUTH_GLOBAL_VALUE */
10653 113,
10654 /* G_CONSTANT_POOL */
10655 118,
10656 /* G_EXTRACT */
10657 120,
10658 /* G_UNMERGE_VALUES */
10659 123,
10660 /* G_INSERT */
10661 125,
10662 /* G_MERGE_VALUES */
10663 129,
10664 /* G_BUILD_VECTOR */
10665 131,
10666 /* G_BUILD_VECTOR_TRUNC */
10667 133,
10668 /* G_CONCAT_VECTORS */
10669 135,
10670 /* G_PTRTOINT */
10671 137,
10672 /* G_INTTOPTR */
10673 139,
10674 /* G_BITCAST */
10675 141,
10676 /* G_FREEZE */
10677 143,
10678 /* G_CONSTANT_FOLD_BARRIER */
10679 145,
10680 /* G_INTRINSIC_FPTRUNC_ROUND */
10681 147,
10682 /* G_INTRINSIC_TRUNC */
10683 150,
10684 /* G_INTRINSIC_ROUND */
10685 152,
10686 /* G_INTRINSIC_LRINT */
10687 154,
10688 /* G_INTRINSIC_LLRINT */
10689 156,
10690 /* G_INTRINSIC_ROUNDEVEN */
10691 158,
10692 /* G_READCYCLECOUNTER */
10693 160,
10694 /* G_READSTEADYCOUNTER */
10695 161,
10696 /* G_LOAD */
10697 162,
10698 /* G_SEXTLOAD */
10699 164,
10700 /* G_ZEXTLOAD */
10701 166,
10702 /* G_INDEXED_LOAD */
10703 168,
10704 /* G_INDEXED_SEXTLOAD */
10705 173,
10706 /* G_INDEXED_ZEXTLOAD */
10707 178,
10708 /* G_STORE */
10709 183,
10710 /* G_INDEXED_STORE */
10711 185,
10712 /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */
10713 190,
10714 /* G_ATOMIC_CMPXCHG */
10715 195,
10716 /* G_ATOMICRMW_XCHG */
10717 199,
10718 /* G_ATOMICRMW_ADD */
10719 202,
10720 /* G_ATOMICRMW_SUB */
10721 205,
10722 /* G_ATOMICRMW_AND */
10723 208,
10724 /* G_ATOMICRMW_NAND */
10725 211,
10726 /* G_ATOMICRMW_OR */
10727 214,
10728 /* G_ATOMICRMW_XOR */
10729 217,
10730 /* G_ATOMICRMW_MAX */
10731 220,
10732 /* G_ATOMICRMW_MIN */
10733 223,
10734 /* G_ATOMICRMW_UMAX */
10735 226,
10736 /* G_ATOMICRMW_UMIN */
10737 229,
10738 /* G_ATOMICRMW_FADD */
10739 232,
10740 /* G_ATOMICRMW_FSUB */
10741 235,
10742 /* G_ATOMICRMW_FMAX */
10743 238,
10744 /* G_ATOMICRMW_FMIN */
10745 241,
10746 /* G_ATOMICRMW_UINC_WRAP */
10747 244,
10748 /* G_ATOMICRMW_UDEC_WRAP */
10749 247,
10750 /* G_FENCE */
10751 250,
10752 /* G_PREFETCH */
10753 252,
10754 /* G_BRCOND */
10755 256,
10756 /* G_BRINDIRECT */
10757 258,
10758 /* G_INVOKE_REGION_START */
10759 259,
10760 /* G_INTRINSIC */
10761 259,
10762 /* G_INTRINSIC_W_SIDE_EFFECTS */
10763 260,
10764 /* G_INTRINSIC_CONVERGENT */
10765 261,
10766 /* G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS */
10767 262,
10768 /* G_ANYEXT */
10769 263,
10770 /* G_TRUNC */
10771 265,
10772 /* G_CONSTANT */
10773 267,
10774 /* G_FCONSTANT */
10775 269,
10776 /* G_VASTART */
10777 271,
10778 /* G_VAARG */
10779 272,
10780 /* G_SEXT */
10781 275,
10782 /* G_SEXT_INREG */
10783 277,
10784 /* G_ZEXT */
10785 280,
10786 /* G_SHL */
10787 282,
10788 /* G_LSHR */
10789 285,
10790 /* G_ASHR */
10791 288,
10792 /* G_FSHL */
10793 291,
10794 /* G_FSHR */
10795 295,
10796 /* G_ROTR */
10797 299,
10798 /* G_ROTL */
10799 302,
10800 /* G_ICMP */
10801 305,
10802 /* G_FCMP */
10803 309,
10804 /* G_SCMP */
10805 313,
10806 /* G_UCMP */
10807 316,
10808 /* G_SELECT */
10809 319,
10810 /* G_UADDO */
10811 323,
10812 /* G_UADDE */
10813 327,
10814 /* G_USUBO */
10815 332,
10816 /* G_USUBE */
10817 336,
10818 /* G_SADDO */
10819 341,
10820 /* G_SADDE */
10821 345,
10822 /* G_SSUBO */
10823 350,
10824 /* G_SSUBE */
10825 354,
10826 /* G_UMULO */
10827 359,
10828 /* G_SMULO */
10829 363,
10830 /* G_UMULH */
10831 367,
10832 /* G_SMULH */
10833 370,
10834 /* G_UADDSAT */
10835 373,
10836 /* G_SADDSAT */
10837 376,
10838 /* G_USUBSAT */
10839 379,
10840 /* G_SSUBSAT */
10841 382,
10842 /* G_USHLSAT */
10843 385,
10844 /* G_SSHLSAT */
10845 388,
10846 /* G_SMULFIX */
10847 391,
10848 /* G_UMULFIX */
10849 395,
10850 /* G_SMULFIXSAT */
10851 399,
10852 /* G_UMULFIXSAT */
10853 403,
10854 /* G_SDIVFIX */
10855 407,
10856 /* G_UDIVFIX */
10857 411,
10858 /* G_SDIVFIXSAT */
10859 415,
10860 /* G_UDIVFIXSAT */
10861 419,
10862 /* G_FADD */
10863 423,
10864 /* G_FSUB */
10865 426,
10866 /* G_FMUL */
10867 429,
10868 /* G_FMA */
10869 432,
10870 /* G_FMAD */
10871 436,
10872 /* G_FDIV */
10873 440,
10874 /* G_FREM */
10875 443,
10876 /* G_FPOW */
10877 446,
10878 /* G_FPOWI */
10879 449,
10880 /* G_FEXP */
10881 452,
10882 /* G_FEXP2 */
10883 454,
10884 /* G_FEXP10 */
10885 456,
10886 /* G_FLOG */
10887 458,
10888 /* G_FLOG2 */
10889 460,
10890 /* G_FLOG10 */
10891 462,
10892 /* G_FLDEXP */
10893 464,
10894 /* G_FFREXP */
10895 467,
10896 /* G_FNEG */
10897 470,
10898 /* G_FPEXT */
10899 472,
10900 /* G_FPTRUNC */
10901 474,
10902 /* G_FPTOSI */
10903 476,
10904 /* G_FPTOUI */
10905 478,
10906 /* G_SITOFP */
10907 480,
10908 /* G_UITOFP */
10909 482,
10910 /* G_FABS */
10911 484,
10912 /* G_FCOPYSIGN */
10913 486,
10914 /* G_IS_FPCLASS */
10915 489,
10916 /* G_FCANONICALIZE */
10917 492,
10918 /* G_FMINNUM */
10919 494,
10920 /* G_FMAXNUM */
10921 497,
10922 /* G_FMINNUM_IEEE */
10923 500,
10924 /* G_FMAXNUM_IEEE */
10925 503,
10926 /* G_FMINIMUM */
10927 506,
10928 /* G_FMAXIMUM */
10929 509,
10930 /* G_GET_FPENV */
10931 512,
10932 /* G_SET_FPENV */
10933 513,
10934 /* G_RESET_FPENV */
10935 514,
10936 /* G_GET_FPMODE */
10937 514,
10938 /* G_SET_FPMODE */
10939 515,
10940 /* G_RESET_FPMODE */
10941 516,
10942 /* G_PTR_ADD */
10943 516,
10944 /* G_PTRMASK */
10945 519,
10946 /* G_SMIN */
10947 522,
10948 /* G_SMAX */
10949 525,
10950 /* G_UMIN */
10951 528,
10952 /* G_UMAX */
10953 531,
10954 /* G_ABS */
10955 534,
10956 /* G_LROUND */
10957 536,
10958 /* G_LLROUND */
10959 538,
10960 /* G_BR */
10961 540,
10962 /* G_BRJT */
10963 541,
10964 /* G_VSCALE */
10965 544,
10966 /* G_INSERT_SUBVECTOR */
10967 546,
10968 /* G_EXTRACT_SUBVECTOR */
10969 550,
10970 /* G_INSERT_VECTOR_ELT */
10971 553,
10972 /* G_EXTRACT_VECTOR_ELT */
10973 557,
10974 /* G_SHUFFLE_VECTOR */
10975 560,
10976 /* G_SPLAT_VECTOR */
10977 564,
10978 /* G_VECTOR_COMPRESS */
10979 566,
10980 /* G_CTTZ */
10981 570,
10982 /* G_CTTZ_ZERO_UNDEF */
10983 572,
10984 /* G_CTLZ */
10985 574,
10986 /* G_CTLZ_ZERO_UNDEF */
10987 576,
10988 /* G_CTPOP */
10989 578,
10990 /* G_BSWAP */
10991 580,
10992 /* G_BITREVERSE */
10993 582,
10994 /* G_FCEIL */
10995 584,
10996 /* G_FCOS */
10997 586,
10998 /* G_FSIN */
10999 588,
11000 /* G_FTAN */
11001 590,
11002 /* G_FACOS */
11003 592,
11004 /* G_FASIN */
11005 594,
11006 /* G_FATAN */
11007 596,
11008 /* G_FCOSH */
11009 598,
11010 /* G_FSINH */
11011 600,
11012 /* G_FTANH */
11013 602,
11014 /* G_FSQRT */
11015 604,
11016 /* G_FFLOOR */
11017 606,
11018 /* G_FRINT */
11019 608,
11020 /* G_FNEARBYINT */
11021 610,
11022 /* G_ADDRSPACE_CAST */
11023 612,
11024 /* G_BLOCK_ADDR */
11025 614,
11026 /* G_JUMP_TABLE */
11027 616,
11028 /* G_DYN_STACKALLOC */
11029 618,
11030 /* G_STACKSAVE */
11031 621,
11032 /* G_STACKRESTORE */
11033 622,
11034 /* G_STRICT_FADD */
11035 623,
11036 /* G_STRICT_FSUB */
11037 626,
11038 /* G_STRICT_FMUL */
11039 629,
11040 /* G_STRICT_FDIV */
11041 632,
11042 /* G_STRICT_FREM */
11043 635,
11044 /* G_STRICT_FMA */
11045 638,
11046 /* G_STRICT_FSQRT */
11047 642,
11048 /* G_STRICT_FLDEXP */
11049 644,
11050 /* G_READ_REGISTER */
11051 647,
11052 /* G_WRITE_REGISTER */
11053 649,
11054 /* G_MEMCPY */
11055 651,
11056 /* G_MEMCPY_INLINE */
11057 655,
11058 /* G_MEMMOVE */
11059 658,
11060 /* G_MEMSET */
11061 662,
11062 /* G_BZERO */
11063 666,
11064 /* G_TRAP */
11065 669,
11066 /* G_DEBUGTRAP */
11067 669,
11068 /* G_UBSANTRAP */
11069 669,
11070 /* G_VECREDUCE_SEQ_FADD */
11071 670,
11072 /* G_VECREDUCE_SEQ_FMUL */
11073 673,
11074 /* G_VECREDUCE_FADD */
11075 676,
11076 /* G_VECREDUCE_FMUL */
11077 678,
11078 /* G_VECREDUCE_FMAX */
11079 680,
11080 /* G_VECREDUCE_FMIN */
11081 682,
11082 /* G_VECREDUCE_FMAXIMUM */
11083 684,
11084 /* G_VECREDUCE_FMINIMUM */
11085 686,
11086 /* G_VECREDUCE_ADD */
11087 688,
11088 /* G_VECREDUCE_MUL */
11089 690,
11090 /* G_VECREDUCE_AND */
11091 692,
11092 /* G_VECREDUCE_OR */
11093 694,
11094 /* G_VECREDUCE_XOR */
11095 696,
11096 /* G_VECREDUCE_SMAX */
11097 698,
11098 /* G_VECREDUCE_SMIN */
11099 700,
11100 /* G_VECREDUCE_UMAX */
11101 702,
11102 /* G_VECREDUCE_UMIN */
11103 704,
11104 /* G_SBFX */
11105 706,
11106 /* G_UBFX */
11107 710,
11108 /* ATOMIC_CMP_SWAP_I128 */
11109 714,
11110 /* ATOMIC_LOAD_ADD_I128 */
11111 722,
11112 /* ATOMIC_LOAD_AND_I128 */
11113 728,
11114 /* ATOMIC_LOAD_NAND_I128 */
11115 734,
11116 /* ATOMIC_LOAD_OR_I128 */
11117 740,
11118 /* ATOMIC_LOAD_SUB_I128 */
11119 746,
11120 /* ATOMIC_LOAD_XOR_I128 */
11121 752,
11122 /* ATOMIC_SWAP_I128 */
11123 758,
11124 /* BUILD_QUADWORD */
11125 764,
11126 /* BUILD_UACC */
11127 767,
11128 /* CFENCE */
11129 769,
11130 /* CFENCE8 */
11131 770,
11132 /* CLRLSLDI */
11133 771,
11134 /* CLRLSLDI_rec */
11135 775,
11136 /* CLRLSLWI */
11137 779,
11138 /* CLRLSLWI_rec */
11139 783,
11140 /* CLRRDI */
11141 787,
11142 /* CLRRDI_rec */
11143 790,
11144 /* CLRRWI */
11145 793,
11146 /* CLRRWI_rec */
11147 796,
11148 /* DCBFL */
11149 799,
11150 /* DCBFLP */
11151 801,
11152 /* DCBFPS */
11153 803,
11154 /* DCBFx */
11155 805,
11156 /* DCBSTPS */
11157 807,
11158 /* DCBTCT */
11159 809,
11160 /* DCBTDS */
11161 812,
11162 /* DCBTSTCT */
11163 815,
11164 /* DCBTSTDS */
11165 818,
11166 /* DCBTSTT */
11167 821,
11168 /* DCBTSTx */
11169 823,
11170 /* DCBTT */
11171 825,
11172 /* DCBTx */
11173 827,
11174 /* DFLOADf32 */
11175 829,
11176 /* DFLOADf64 */
11177 832,
11178 /* DFSTOREf32 */
11179 835,
11180 /* DFSTOREf64 */
11181 838,
11182 /* EXTLDI */
11183 841,
11184 /* EXTLDI_rec */
11185 845,
11186 /* EXTLWI */
11187 849,
11188 /* EXTLWI_rec */
11189 853,
11190 /* EXTRDI */
11191 857,
11192 /* EXTRDI_rec */
11193 861,
11194 /* EXTRWI */
11195 865,
11196 /* EXTRWI_rec */
11197 869,
11198 /* INSLWI */
11199 873,
11200 /* INSLWI_rec */
11201 877,
11202 /* INSRDI */
11203 881,
11204 /* INSRDI_rec */
11205 885,
11206 /* INSRWI */
11207 889,
11208 /* INSRWI_rec */
11209 893,
11210 /* KILL_PAIR */
11211 897,
11212 /* LAx */
11213 899,
11214 /* LIWAX */
11215 902,
11216 /* LIWZX */
11217 905,
11218 /* PPCLdFixedAddr */
11219 908,
11220 /* PSUBI */
11221 910,
11222 /* RLWIMIbm */
11223 913,
11224 /* RLWIMIbm_rec */
11225 917,
11226 /* RLWINMbm */
11227 921,
11228 /* RLWINMbm_rec */
11229 925,
11230 /* RLWNMbm */
11231 929,
11232 /* RLWNMbm_rec */
11233 933,
11234 /* ROTRDI */
11235 937,
11236 /* ROTRDI_rec */
11237 940,
11238 /* ROTRWI */
11239 943,
11240 /* ROTRWI_rec */
11241 946,
11242 /* SLDI */
11243 949,
11244 /* SLDI_rec */
11245 952,
11246 /* SLWI */
11247 955,
11248 /* SLWI_rec */
11249 958,
11250 /* SPILLTOVSR_LD */
11251 961,
11252 /* SPILLTOVSR_LDX */
11253 964,
11254 /* SPILLTOVSR_ST */
11255 967,
11256 /* SPILLTOVSR_STX */
11257 970,
11258 /* SRDI */
11259 973,
11260 /* SRDI_rec */
11261 976,
11262 /* SRWI */
11263 979,
11264 /* SRWI_rec */
11265 982,
11266 /* STIWX */
11267 985,
11268 /* SUBI */
11269 988,
11270 /* SUBIC */
11271 991,
11272 /* SUBIC_rec */
11273 994,
11274 /* SUBIS */
11275 997,
11276 /* SUBPCIS */
11277 1000,
11278 /* XFLOADf32 */
11279 1002,
11280 /* XFLOADf64 */
11281 1005,
11282 /* XFSTOREf32 */
11283 1008,
11284 /* XFSTOREf64 */
11285 1011,
11286 /* ADD4 */
11287 1014,
11288 /* ADD4O */
11289 1017,
11290 /* ADD4O_rec */
11291 1020,
11292 /* ADD4TLS */
11293 1023,
11294 /* ADD4_rec */
11295 1026,
11296 /* ADD8 */
11297 1029,
11298 /* ADD8O */
11299 1032,
11300 /* ADD8O_rec */
11301 1035,
11302 /* ADD8TLS */
11303 1038,
11304 /* ADD8TLS_ */
11305 1041,
11306 /* ADD8_rec */
11307 1044,
11308 /* ADDC */
11309 1047,
11310 /* ADDC8 */
11311 1050,
11312 /* ADDC8O */
11313 1053,
11314 /* ADDC8O_rec */
11315 1056,
11316 /* ADDC8_rec */
11317 1059,
11318 /* ADDCO */
11319 1062,
11320 /* ADDCO_rec */
11321 1065,
11322 /* ADDC_rec */
11323 1068,
11324 /* ADDE */
11325 1071,
11326 /* ADDE8 */
11327 1074,
11328 /* ADDE8O */
11329 1077,
11330 /* ADDE8O_rec */
11331 1080,
11332 /* ADDE8_rec */
11333 1083,
11334 /* ADDEO */
11335 1086,
11336 /* ADDEO_rec */
11337 1089,
11338 /* ADDEX */
11339 1092,
11340 /* ADDEX8 */
11341 1096,
11342 /* ADDE_rec */
11343 1100,
11344 /* ADDG6S */
11345 1103,
11346 /* ADDG6S8 */
11347 1106,
11348 /* ADDI */
11349 1109,
11350 /* ADDI8 */
11351 1112,
11352 /* ADDIC */
11353 1115,
11354 /* ADDIC8 */
11355 1118,
11356 /* ADDIC_rec */
11357 1121,
11358 /* ADDIS */
11359 1124,
11360 /* ADDIS8 */
11361 1127,
11362 /* ADDISdtprelHA */
11363 1130,
11364 /* ADDISdtprelHA32 */
11365 1133,
11366 /* ADDISgotTprelHA */
11367 1136,
11368 /* ADDIStlsgdHA */
11369 1139,
11370 /* ADDIStlsldHA */
11371 1142,
11372 /* ADDIStocHA */
11373 1145,
11374 /* ADDIStocHA8 */
11375 1148,
11376 /* ADDIdtprelL */
11377 1151,
11378 /* ADDIdtprelL32 */
11379 1154,
11380 /* ADDItlsgdL */
11381 1157,
11382 /* ADDItlsgdL32 */
11383 1160,
11384 /* ADDItlsgdLADDR */
11385 1163,
11386 /* ADDItlsgdLADDR32 */
11387 1167,
11388 /* ADDItlsldL */
11389 1171,
11390 /* ADDItlsldL32 */
11391 1174,
11392 /* ADDItlsldLADDR */
11393 1177,
11394 /* ADDItlsldLADDR32 */
11395 1181,
11396 /* ADDItoc */
11397 1185,
11398 /* ADDItoc8 */
11399 1188,
11400 /* ADDItocL */
11401 1191,
11402 /* ADDItocL8 */
11403 1194,
11404 /* ADDME */
11405 1197,
11406 /* ADDME8 */
11407 1199,
11408 /* ADDME8O */
11409 1201,
11410 /* ADDME8O_rec */
11411 1203,
11412 /* ADDME8_rec */
11413 1205,
11414 /* ADDMEO */
11415 1207,
11416 /* ADDMEO_rec */
11417 1209,
11418 /* ADDME_rec */
11419 1211,
11420 /* ADDPCIS */
11421 1213,
11422 /* ADDZE */
11423 1215,
11424 /* ADDZE8 */
11425 1217,
11426 /* ADDZE8O */
11427 1219,
11428 /* ADDZE8O_rec */
11429 1221,
11430 /* ADDZE8_rec */
11431 1223,
11432 /* ADDZEO */
11433 1225,
11434 /* ADDZEO_rec */
11435 1227,
11436 /* ADDZE_rec */
11437 1229,
11438 /* ADJCALLSTACKDOWN */
11439 1231,
11440 /* ADJCALLSTACKUP */
11441 1233,
11442 /* AND */
11443 1235,
11444 /* AND8 */
11445 1238,
11446 /* AND8_rec */
11447 1241,
11448 /* ANDC */
11449 1244,
11450 /* ANDC8 */
11451 1247,
11452 /* ANDC8_rec */
11453 1250,
11454 /* ANDC_rec */
11455 1253,
11456 /* ANDI8_rec */
11457 1256,
11458 /* ANDIS8_rec */
11459 1259,
11460 /* ANDIS_rec */
11461 1262,
11462 /* ANDI_rec */
11463 1265,
11464 /* ANDI_rec_1_EQ_BIT */
11465 1268,
11466 /* ANDI_rec_1_EQ_BIT8 */
11467 1270,
11468 /* ANDI_rec_1_GT_BIT */
11469 1272,
11470 /* ANDI_rec_1_GT_BIT8 */
11471 1274,
11472 /* AND_rec */
11473 1276,
11474 /* ATOMIC_CMP_SWAP_I16 */
11475 1279,
11476 /* ATOMIC_CMP_SWAP_I32 */
11477 1284,
11478 /* ATOMIC_CMP_SWAP_I64 */
11479 1289,
11480 /* ATOMIC_CMP_SWAP_I8 */
11481 1294,
11482 /* ATOMIC_LOAD_ADD_I16 */
11483 1299,
11484 /* ATOMIC_LOAD_ADD_I32 */
11485 1303,
11486 /* ATOMIC_LOAD_ADD_I64 */
11487 1307,
11488 /* ATOMIC_LOAD_ADD_I8 */
11489 1311,
11490 /* ATOMIC_LOAD_AND_I16 */
11491 1315,
11492 /* ATOMIC_LOAD_AND_I32 */
11493 1319,
11494 /* ATOMIC_LOAD_AND_I64 */
11495 1323,
11496 /* ATOMIC_LOAD_AND_I8 */
11497 1327,
11498 /* ATOMIC_LOAD_MAX_I16 */
11499 1331,
11500 /* ATOMIC_LOAD_MAX_I32 */
11501 1335,
11502 /* ATOMIC_LOAD_MAX_I64 */
11503 1339,
11504 /* ATOMIC_LOAD_MAX_I8 */
11505 1343,
11506 /* ATOMIC_LOAD_MIN_I16 */
11507 1347,
11508 /* ATOMIC_LOAD_MIN_I32 */
11509 1351,
11510 /* ATOMIC_LOAD_MIN_I64 */
11511 1355,
11512 /* ATOMIC_LOAD_MIN_I8 */
11513 1359,
11514 /* ATOMIC_LOAD_NAND_I16 */
11515 1363,
11516 /* ATOMIC_LOAD_NAND_I32 */
11517 1367,
11518 /* ATOMIC_LOAD_NAND_I64 */
11519 1371,
11520 /* ATOMIC_LOAD_NAND_I8 */
11521 1375,
11522 /* ATOMIC_LOAD_OR_I16 */
11523 1379,
11524 /* ATOMIC_LOAD_OR_I32 */
11525 1383,
11526 /* ATOMIC_LOAD_OR_I64 */
11527 1387,
11528 /* ATOMIC_LOAD_OR_I8 */
11529 1391,
11530 /* ATOMIC_LOAD_SUB_I16 */
11531 1395,
11532 /* ATOMIC_LOAD_SUB_I32 */
11533 1399,
11534 /* ATOMIC_LOAD_SUB_I64 */
11535 1403,
11536 /* ATOMIC_LOAD_SUB_I8 */
11537 1407,
11538 /* ATOMIC_LOAD_UMAX_I16 */
11539 1411,
11540 /* ATOMIC_LOAD_UMAX_I32 */
11541 1415,
11542 /* ATOMIC_LOAD_UMAX_I64 */
11543 1419,
11544 /* ATOMIC_LOAD_UMAX_I8 */
11545 1423,
11546 /* ATOMIC_LOAD_UMIN_I16 */
11547 1427,
11548 /* ATOMIC_LOAD_UMIN_I32 */
11549 1431,
11550 /* ATOMIC_LOAD_UMIN_I64 */
11551 1435,
11552 /* ATOMIC_LOAD_UMIN_I8 */
11553 1439,
11554 /* ATOMIC_LOAD_XOR_I16 */
11555 1443,
11556 /* ATOMIC_LOAD_XOR_I32 */
11557 1447,
11558 /* ATOMIC_LOAD_XOR_I64 */
11559 1451,
11560 /* ATOMIC_LOAD_XOR_I8 */
11561 1455,
11562 /* ATOMIC_SWAP_I16 */
11563 1459,
11564 /* ATOMIC_SWAP_I32 */
11565 1463,
11566 /* ATOMIC_SWAP_I64 */
11567 1467,
11568 /* ATOMIC_SWAP_I8 */
11569 1471,
11570 /* ATTN */
11571 1475,
11572 /* B */
11573 1475,
11574 /* BA */
11575 1476,
11576 /* BC */
11577 1477,
11578 /* BCC */
11579 1479,
11580 /* BCCA */
11581 1482,
11582 /* BCCCTR */
11583 1485,
11584 /* BCCCTR8 */
11585 1487,
11586 /* BCCCTRL */
11587 1489,
11588 /* BCCCTRL8 */
11589 1491,
11590 /* BCCL */
11591 1493,
11592 /* BCCLA */
11593 1496,
11594 /* BCCLR */
11595 1499,
11596 /* BCCLRL */
11597 1501,
11598 /* BCCTR */
11599 1503,
11600 /* BCCTR8 */
11601 1504,
11602 /* BCCTR8n */
11603 1505,
11604 /* BCCTRL */
11605 1506,
11606 /* BCCTRL8 */
11607 1507,
11608 /* BCCTRL8n */
11609 1508,
11610 /* BCCTRLn */
11611 1509,
11612 /* BCCTRn */
11613 1510,
11614 /* BCDADD_rec */
11615 1511,
11616 /* BCDCFN_rec */
11617 1515,
11618 /* BCDCFSQ_rec */
11619 1518,
11620 /* BCDCFZ_rec */
11621 1521,
11622 /* BCDCPSGN_rec */
11623 1524,
11624 /* BCDCTN_rec */
11625 1527,
11626 /* BCDCTSQ_rec */
11627 1529,
11628 /* BCDCTZ_rec */
11629 1531,
11630 /* BCDSETSGN_rec */
11631 1534,
11632 /* BCDSR_rec */
11633 1537,
11634 /* BCDSUB_rec */
11635 1541,
11636 /* BCDS_rec */
11637 1545,
11638 /* BCDTRUNC_rec */
11639 1549,
11640 /* BCDUS_rec */
11641 1553,
11642 /* BCDUTRUNC_rec */
11643 1556,
11644 /* BCL */
11645 1559,
11646 /* BCLR */
11647 1561,
11648 /* BCLRL */
11649 1562,
11650 /* BCLRLn */
11651 1563,
11652 /* BCLRn */
11653 1564,
11654 /* BCLalways */
11655 1565,
11656 /* BCLn */
11657 1566,
11658 /* BCTR */
11659 1568,
11660 /* BCTR8 */
11661 1568,
11662 /* BCTRL */
11663 1568,
11664 /* BCTRL8 */
11665 1568,
11666 /* BCTRL8_LDinto_toc */
11667 1568,
11668 /* BCTRL8_LDinto_toc_RM */
11669 1570,
11670 /* BCTRL8_RM */
11671 1572,
11672 /* BCTRL_LWZinto_toc */
11673 1572,
11674 /* BCTRL_LWZinto_toc_RM */
11675 1574,
11676 /* BCTRL_RM */
11677 1576,
11678 /* BCn */
11679 1576,
11680 /* BDNZ */
11681 1578,
11682 /* BDNZ8 */
11683 1579,
11684 /* BDNZA */
11685 1580,
11686 /* BDNZAm */
11687 1581,
11688 /* BDNZAp */
11689 1582,
11690 /* BDNZL */
11691 1583,
11692 /* BDNZLA */
11693 1584,
11694 /* BDNZLAm */
11695 1585,
11696 /* BDNZLAp */
11697 1586,
11698 /* BDNZLR */
11699 1587,
11700 /* BDNZLR8 */
11701 1587,
11702 /* BDNZLRL */
11703 1587,
11704 /* BDNZLRLm */
11705 1587,
11706 /* BDNZLRLp */
11707 1587,
11708 /* BDNZLRm */
11709 1587,
11710 /* BDNZLRp */
11711 1587,
11712 /* BDNZLm */
11713 1587,
11714 /* BDNZLp */
11715 1588,
11716 /* BDNZm */
11717 1589,
11718 /* BDNZp */
11719 1590,
11720 /* BDZ */
11721 1591,
11722 /* BDZ8 */
11723 1592,
11724 /* BDZA */
11725 1593,
11726 /* BDZAm */
11727 1594,
11728 /* BDZAp */
11729 1595,
11730 /* BDZL */
11731 1596,
11732 /* BDZLA */
11733 1597,
11734 /* BDZLAm */
11735 1598,
11736 /* BDZLAp */
11737 1599,
11738 /* BDZLR */
11739 1600,
11740 /* BDZLR8 */
11741 1600,
11742 /* BDZLRL */
11743 1600,
11744 /* BDZLRLm */
11745 1600,
11746 /* BDZLRLp */
11747 1600,
11748 /* BDZLRm */
11749 1600,
11750 /* BDZLRp */
11751 1600,
11752 /* BDZLm */
11753 1600,
11754 /* BDZLp */
11755 1601,
11756 /* BDZm */
11757 1602,
11758 /* BDZp */
11759 1603,
11760 /* BL */
11761 1604,
11762 /* BL8 */
11763 1605,
11764 /* BL8_NOP */
11765 1606,
11766 /* BL8_NOP_RM */
11767 1607,
11768 /* BL8_NOP_TLS */
11769 1608,
11770 /* BL8_NOTOC */
11771 1610,
11772 /* BL8_NOTOC_RM */
11773 1611,
11774 /* BL8_NOTOC_TLS */
11775 1612,
11776 /* BL8_RM */
11777 1614,
11778 /* BL8_TLS */
11779 1615,
11780 /* BL8_TLS_ */
11781 1617,
11782 /* BLA */
11783 1619,
11784 /* BLA8 */
11785 1620,
11786 /* BLA8_NOP */
11787 1621,
11788 /* BLA8_NOP_RM */
11789 1622,
11790 /* BLA8_RM */
11791 1623,
11792 /* BLA_RM */
11793 1624,
11794 /* BLR */
11795 1625,
11796 /* BLR8 */
11797 1625,
11798 /* BLRL */
11799 1625,
11800 /* BL_NOP */
11801 1625,
11802 /* BL_NOP_RM */
11803 1626,
11804 /* BL_RM */
11805 1627,
11806 /* BL_TLS */
11807 1628,
11808 /* BPERMD */
11809 1630,
11810 /* BRD */
11811 1633,
11812 /* BRH */
11813 1635,
11814 /* BRH8 */
11815 1637,
11816 /* BRINC */
11817 1639,
11818 /* BRW */
11819 1642,
11820 /* BRW8 */
11821 1644,
11822 /* CBCDTD */
11823 1646,
11824 /* CBCDTD8 */
11825 1648,
11826 /* CDTBCD */
11827 1650,
11828 /* CDTBCD8 */
11829 1652,
11830 /* CFUGED */
11831 1654,
11832 /* CLRBHRB */
11833 1657,
11834 /* CMPB */
11835 1657,
11836 /* CMPB8 */
11837 1660,
11838 /* CMPD */
11839 1663,
11840 /* CMPDI */
11841 1666,
11842 /* CMPEQB */
11843 1669,
11844 /* CMPLD */
11845 1672,
11846 /* CMPLDI */
11847 1675,
11848 /* CMPLW */
11849 1678,
11850 /* CMPLWI */
11851 1681,
11852 /* CMPRB */
11853 1684,
11854 /* CMPRB8 */
11855 1688,
11856 /* CMPW */
11857 1692,
11858 /* CMPWI */
11859 1695,
11860 /* CNTLZD */
11861 1698,
11862 /* CNTLZDM */
11863 1700,
11864 /* CNTLZD_rec */
11865 1703,
11866 /* CNTLZW */
11867 1705,
11868 /* CNTLZW8 */
11869 1707,
11870 /* CNTLZW8_rec */
11871 1709,
11872 /* CNTLZW_rec */
11873 1711,
11874 /* CNTTZD */
11875 1713,
11876 /* CNTTZDM */
11877 1715,
11878 /* CNTTZD_rec */
11879 1718,
11880 /* CNTTZW */
11881 1720,
11882 /* CNTTZW8 */
11883 1722,
11884 /* CNTTZW8_rec */
11885 1724,
11886 /* CNTTZW_rec */
11887 1726,
11888 /* CP_ABORT */
11889 1728,
11890 /* CP_COPY */
11891 1728,
11892 /* CP_COPY8 */
11893 1731,
11894 /* CP_PASTE8_rec */
11895 1734,
11896 /* CP_PASTE_rec */
11897 1737,
11898 /* CR6SET */
11899 1740,
11900 /* CR6UNSET */
11901 1740,
11902 /* CRAND */
11903 1740,
11904 /* CRANDC */
11905 1743,
11906 /* CREQV */
11907 1746,
11908 /* CRNAND */
11909 1749,
11910 /* CRNOR */
11911 1752,
11912 /* CRNOT */
11913 1755,
11914 /* CROR */
11915 1757,
11916 /* CRORC */
11917 1760,
11918 /* CRSET */
11919 1763,
11920 /* CRUNSET */
11921 1764,
11922 /* CRXOR */
11923 1765,
11924 /* CTRL_DEP */
11925 1768,
11926 /* DADD */
11927 1771,
11928 /* DADDQ */
11929 1774,
11930 /* DADDQ_rec */
11931 1777,
11932 /* DADD_rec */
11933 1780,
11934 /* DARN */
11935 1783,
11936 /* DCBA */
11937 1785,
11938 /* DCBF */
11939 1787,
11940 /* DCBFEP */
11941 1790,
11942 /* DCBI */
11943 1792,
11944 /* DCBST */
11945 1794,
11946 /* DCBSTEP */
11947 1796,
11948 /* DCBT */
11949 1798,
11950 /* DCBTEP */
11951 1801,
11952 /* DCBTST */
11953 1804,
11954 /* DCBTSTEP */
11955 1807,
11956 /* DCBZ */
11957 1810,
11958 /* DCBZEP */
11959 1812,
11960 /* DCBZL */
11961 1814,
11962 /* DCBZLEP */
11963 1816,
11964 /* DCCCI */
11965 1818,
11966 /* DCFFIX */
11967 1820,
11968 /* DCFFIXQ */
11969 1822,
11970 /* DCFFIXQQ */
11971 1824,
11972 /* DCFFIXQ_rec */
11973 1826,
11974 /* DCFFIX_rec */
11975 1828,
11976 /* DCMPO */
11977 1830,
11978 /* DCMPOQ */
11979 1833,
11980 /* DCMPU */
11981 1836,
11982 /* DCMPUQ */
11983 1839,
11984 /* DCTDP */
11985 1842,
11986 /* DCTDP_rec */
11987 1844,
11988 /* DCTFIX */
11989 1846,
11990 /* DCTFIXQ */
11991 1848,
11992 /* DCTFIXQQ */
11993 1850,
11994 /* DCTFIXQ_rec */
11995 1852,
11996 /* DCTFIX_rec */
11997 1854,
11998 /* DCTQPQ */
11999 1856,
12000 /* DCTQPQ_rec */
12001 1858,
12002 /* DDEDPD */
12003 1860,
12004 /* DDEDPDQ */
12005 1863,
12006 /* DDEDPDQ_rec */
12007 1866,
12008 /* DDEDPD_rec */
12009 1869,
12010 /* DDIV */
12011 1872,
12012 /* DDIVQ */
12013 1875,
12014 /* DDIVQ_rec */
12015 1878,
12016 /* DDIV_rec */
12017 1881,
12018 /* DENBCD */
12019 1884,
12020 /* DENBCDQ */
12021 1887,
12022 /* DENBCDQ_rec */
12023 1890,
12024 /* DENBCD_rec */
12025 1893,
12026 /* DIEX */
12027 1896,
12028 /* DIEXQ */
12029 1899,
12030 /* DIEXQ_rec */
12031 1902,
12032 /* DIEX_rec */
12033 1905,
12034 /* DIVD */
12035 1908,
12036 /* DIVDE */
12037 1911,
12038 /* DIVDEO */
12039 1914,
12040 /* DIVDEO_rec */
12041 1917,
12042 /* DIVDEU */
12043 1920,
12044 /* DIVDEUO */
12045 1923,
12046 /* DIVDEUO_rec */
12047 1926,
12048 /* DIVDEU_rec */
12049 1929,
12050 /* DIVDE_rec */
12051 1932,
12052 /* DIVDO */
12053 1935,
12054 /* DIVDO_rec */
12055 1938,
12056 /* DIVDU */
12057 1941,
12058 /* DIVDUO */
12059 1944,
12060 /* DIVDUO_rec */
12061 1947,
12062 /* DIVDU_rec */
12063 1950,
12064 /* DIVD_rec */
12065 1953,
12066 /* DIVW */
12067 1956,
12068 /* DIVWE */
12069 1959,
12070 /* DIVWEO */
12071 1962,
12072 /* DIVWEO_rec */
12073 1965,
12074 /* DIVWEU */
12075 1968,
12076 /* DIVWEUO */
12077 1971,
12078 /* DIVWEUO_rec */
12079 1974,
12080 /* DIVWEU_rec */
12081 1977,
12082 /* DIVWE_rec */
12083 1980,
12084 /* DIVWO */
12085 1983,
12086 /* DIVWO_rec */
12087 1986,
12088 /* DIVWU */
12089 1989,
12090 /* DIVWUO */
12091 1992,
12092 /* DIVWUO_rec */
12093 1995,
12094 /* DIVWU_rec */
12095 1998,
12096 /* DIVW_rec */
12097 2001,
12098 /* DMMR */
12099 2004,
12100 /* DMSETDMRZ */
12101 2006,
12102 /* DMUL */
12103 2007,
12104 /* DMULQ */
12105 2010,
12106 /* DMULQ_rec */
12107 2013,
12108 /* DMUL_rec */
12109 2016,
12110 /* DMXOR */
12111 2019,
12112 /* DMXXEXTFDMR256 */
12113 2022,
12114 /* DMXXEXTFDMR512 */
12115 2025,
12116 /* DMXXEXTFDMR512_HI */
12117 2028,
12118 /* DMXXINSTFDMR256 */
12119 2031,
12120 /* DMXXINSTFDMR512 */
12121 2034,
12122 /* DMXXINSTFDMR512_HI */
12123 2037,
12124 /* DQUA */
12125 2040,
12126 /* DQUAI */
12127 2044,
12128 /* DQUAIQ */
12129 2048,
12130 /* DQUAIQ_rec */
12131 2052,
12132 /* DQUAI_rec */
12133 2056,
12134 /* DQUAQ */
12135 2060,
12136 /* DQUAQ_rec */
12137 2064,
12138 /* DQUA_rec */
12139 2068,
12140 /* DRDPQ */
12141 2072,
12142 /* DRDPQ_rec */
12143 2074,
12144 /* DRINTN */
12145 2076,
12146 /* DRINTNQ */
12147 2080,
12148 /* DRINTNQ_rec */
12149 2084,
12150 /* DRINTN_rec */
12151 2088,
12152 /* DRINTX */
12153 2092,
12154 /* DRINTXQ */
12155 2096,
12156 /* DRINTXQ_rec */
12157 2100,
12158 /* DRINTX_rec */
12159 2104,
12160 /* DRRND */
12161 2108,
12162 /* DRRNDQ */
12163 2112,
12164 /* DRRNDQ_rec */
12165 2116,
12166 /* DRRND_rec */
12167 2120,
12168 /* DRSP */
12169 2124,
12170 /* DRSP_rec */
12171 2126,
12172 /* DSCLI */
12173 2128,
12174 /* DSCLIQ */
12175 2131,
12176 /* DSCLIQ_rec */
12177 2134,
12178 /* DSCLI_rec */
12179 2137,
12180 /* DSCRI */
12181 2140,
12182 /* DSCRIQ */
12183 2143,
12184 /* DSCRIQ_rec */
12185 2146,
12186 /* DSCRI_rec */
12187 2149,
12188 /* DSS */
12189 2152,
12190 /* DSSALL */
12191 2153,
12192 /* DST */
12193 2153,
12194 /* DST64 */
12195 2156,
12196 /* DSTST */
12197 2159,
12198 /* DSTST64 */
12199 2162,
12200 /* DSTSTT */
12201 2165,
12202 /* DSTSTT64 */
12203 2168,
12204 /* DSTT */
12205 2171,
12206 /* DSTT64 */
12207 2174,
12208 /* DSUB */
12209 2177,
12210 /* DSUBQ */
12211 2180,
12212 /* DSUBQ_rec */
12213 2183,
12214 /* DSUB_rec */
12215 2186,
12216 /* DTSTDC */
12217 2189,
12218 /* DTSTDCQ */
12219 2192,
12220 /* DTSTDG */
12221 2195,
12222 /* DTSTDGQ */
12223 2198,
12224 /* DTSTEX */
12225 2201,
12226 /* DTSTEXQ */
12227 2204,
12228 /* DTSTSF */
12229 2207,
12230 /* DTSTSFI */
12231 2210,
12232 /* DTSTSFIQ */
12233 2213,
12234 /* DTSTSFQ */
12235 2216,
12236 /* DXEX */
12237 2219,
12238 /* DXEXQ */
12239 2221,
12240 /* DXEXQ_rec */
12241 2223,
12242 /* DXEX_rec */
12243 2225,
12244 /* DYNALLOC */
12245 2227,
12246 /* DYNALLOC8 */
12247 2231,
12248 /* DYNAREAOFFSET */
12249 2235,
12250 /* DYNAREAOFFSET8 */
12251 2238,
12252 /* DecreaseCTR8loop */
12253 2241,
12254 /* DecreaseCTRloop */
12255 2243,
12256 /* EFDABS */
12257 2245,
12258 /* EFDADD */
12259 2247,
12260 /* EFDCFS */
12261 2250,
12262 /* EFDCFSF */
12263 2252,
12264 /* EFDCFSI */
12265 2254,
12266 /* EFDCFSID */
12267 2256,
12268 /* EFDCFUF */
12269 2258,
12270 /* EFDCFUI */
12271 2260,
12272 /* EFDCFUID */
12273 2262,
12274 /* EFDCMPEQ */
12275 2264,
12276 /* EFDCMPGT */
12277 2267,
12278 /* EFDCMPLT */
12279 2270,
12280 /* EFDCTSF */
12281 2273,
12282 /* EFDCTSI */
12283 2275,
12284 /* EFDCTSIDZ */
12285 2277,
12286 /* EFDCTSIZ */
12287 2279,
12288 /* EFDCTUF */
12289 2281,
12290 /* EFDCTUI */
12291 2283,
12292 /* EFDCTUIDZ */
12293 2285,
12294 /* EFDCTUIZ */
12295 2287,
12296 /* EFDDIV */
12297 2289,
12298 /* EFDMUL */
12299 2292,
12300 /* EFDNABS */
12301 2295,
12302 /* EFDNEG */
12303 2297,
12304 /* EFDSUB */
12305 2299,
12306 /* EFDTSTEQ */
12307 2302,
12308 /* EFDTSTGT */
12309 2305,
12310 /* EFDTSTLT */
12311 2308,
12312 /* EFSABS */
12313 2311,
12314 /* EFSADD */
12315 2313,
12316 /* EFSCFD */
12317 2316,
12318 /* EFSCFSF */
12319 2318,
12320 /* EFSCFSI */
12321 2320,
12322 /* EFSCFUF */
12323 2322,
12324 /* EFSCFUI */
12325 2324,
12326 /* EFSCMPEQ */
12327 2326,
12328 /* EFSCMPGT */
12329 2329,
12330 /* EFSCMPLT */
12331 2332,
12332 /* EFSCTSF */
12333 2335,
12334 /* EFSCTSI */
12335 2337,
12336 /* EFSCTSIZ */
12337 2339,
12338 /* EFSCTUF */
12339 2341,
12340 /* EFSCTUI */
12341 2343,
12342 /* EFSCTUIZ */
12343 2345,
12344 /* EFSDIV */
12345 2347,
12346 /* EFSMUL */
12347 2350,
12348 /* EFSNABS */
12349 2353,
12350 /* EFSNEG */
12351 2355,
12352 /* EFSSUB */
12353 2357,
12354 /* EFSTSTEQ */
12355 2360,
12356 /* EFSTSTGT */
12357 2363,
12358 /* EFSTSTLT */
12359 2366,
12360 /* EH_SjLj_LongJmp32 */
12361 2369,
12362 /* EH_SjLj_LongJmp64 */
12363 2370,
12364 /* EH_SjLj_SetJmp32 */
12365 2371,
12366 /* EH_SjLj_SetJmp64 */
12367 2373,
12368 /* EH_SjLj_Setup */
12369 2375,
12370 /* EQV */
12371 2376,
12372 /* EQV8 */
12373 2379,
12374 /* EQV8_rec */
12375 2382,
12376 /* EQV_rec */
12377 2385,
12378 /* EVABS */
12379 2388,
12380 /* EVADDIW */
12381 2390,
12382 /* EVADDSMIAAW */
12383 2393,
12384 /* EVADDSSIAAW */
12385 2395,
12386 /* EVADDUMIAAW */
12387 2397,
12388 /* EVADDUSIAAW */
12389 2399,
12390 /* EVADDW */
12391 2401,
12392 /* EVAND */
12393 2404,
12394 /* EVANDC */
12395 2407,
12396 /* EVCMPEQ */
12397 2410,
12398 /* EVCMPGTS */
12399 2413,
12400 /* EVCMPGTU */
12401 2416,
12402 /* EVCMPLTS */
12403 2419,
12404 /* EVCMPLTU */
12405 2422,
12406 /* EVCNTLSW */
12407 2425,
12408 /* EVCNTLZW */
12409 2427,
12410 /* EVDIVWS */
12411 2429,
12412 /* EVDIVWU */
12413 2432,
12414 /* EVEQV */
12415 2435,
12416 /* EVEXTSB */
12417 2438,
12418 /* EVEXTSH */
12419 2440,
12420 /* EVFSABS */
12421 2442,
12422 /* EVFSADD */
12423 2444,
12424 /* EVFSCFSF */
12425 2447,
12426 /* EVFSCFSI */
12427 2449,
12428 /* EVFSCFUF */
12429 2451,
12430 /* EVFSCFUI */
12431 2453,
12432 /* EVFSCMPEQ */
12433 2455,
12434 /* EVFSCMPGT */
12435 2458,
12436 /* EVFSCMPLT */
12437 2461,
12438 /* EVFSCTSF */
12439 2464,
12440 /* EVFSCTSI */
12441 2466,
12442 /* EVFSCTSIZ */
12443 2468,
12444 /* EVFSCTUF */
12445 2470,
12446 /* EVFSCTUI */
12447 2472,
12448 /* EVFSCTUIZ */
12449 2474,
12450 /* EVFSDIV */
12451 2476,
12452 /* EVFSMUL */
12453 2479,
12454 /* EVFSNABS */
12455 2482,
12456 /* EVFSNEG */
12457 2484,
12458 /* EVFSSUB */
12459 2486,
12460 /* EVFSTSTEQ */
12461 2489,
12462 /* EVFSTSTGT */
12463 2492,
12464 /* EVFSTSTLT */
12465 2495,
12466 /* EVLDD */
12467 2498,
12468 /* EVLDDX */
12469 2501,
12470 /* EVLDH */
12471 2504,
12472 /* EVLDHX */
12473 2507,
12474 /* EVLDW */
12475 2510,
12476 /* EVLDWX */
12477 2513,
12478 /* EVLHHESPLAT */
12479 2516,
12480 /* EVLHHESPLATX */
12481 2519,
12482 /* EVLHHOSSPLAT */
12483 2522,
12484 /* EVLHHOSSPLATX */
12485 2525,
12486 /* EVLHHOUSPLAT */
12487 2528,
12488 /* EVLHHOUSPLATX */
12489 2531,
12490 /* EVLWHE */
12491 2534,
12492 /* EVLWHEX */
12493 2537,
12494 /* EVLWHOS */
12495 2540,
12496 /* EVLWHOSX */
12497 2543,
12498 /* EVLWHOU */
12499 2546,
12500 /* EVLWHOUX */
12501 2549,
12502 /* EVLWHSPLAT */
12503 2552,
12504 /* EVLWHSPLATX */
12505 2555,
12506 /* EVLWWSPLAT */
12507 2558,
12508 /* EVLWWSPLATX */
12509 2561,
12510 /* EVMERGEHI */
12511 2564,
12512 /* EVMERGEHILO */
12513 2567,
12514 /* EVMERGELO */
12515 2570,
12516 /* EVMERGELOHI */
12517 2573,
12518 /* EVMHEGSMFAA */
12519 2576,
12520 /* EVMHEGSMFAN */
12521 2579,
12522 /* EVMHEGSMIAA */
12523 2582,
12524 /* EVMHEGSMIAN */
12525 2585,
12526 /* EVMHEGUMIAA */
12527 2588,
12528 /* EVMHEGUMIAN */
12529 2591,
12530 /* EVMHESMF */
12531 2594,
12532 /* EVMHESMFA */
12533 2597,
12534 /* EVMHESMFAAW */
12535 2600,
12536 /* EVMHESMFANW */
12537 2603,
12538 /* EVMHESMI */
12539 2606,
12540 /* EVMHESMIA */
12541 2609,
12542 /* EVMHESMIAAW */
12543 2612,
12544 /* EVMHESMIANW */
12545 2615,
12546 /* EVMHESSF */
12547 2618,
12548 /* EVMHESSFA */
12549 2621,
12550 /* EVMHESSFAAW */
12551 2624,
12552 /* EVMHESSFANW */
12553 2627,
12554 /* EVMHESSIAAW */
12555 2630,
12556 /* EVMHESSIANW */
12557 2633,
12558 /* EVMHEUMI */
12559 2636,
12560 /* EVMHEUMIA */
12561 2639,
12562 /* EVMHEUMIAAW */
12563 2642,
12564 /* EVMHEUMIANW */
12565 2645,
12566 /* EVMHEUSIAAW */
12567 2648,
12568 /* EVMHEUSIANW */
12569 2651,
12570 /* EVMHOGSMFAA */
12571 2654,
12572 /* EVMHOGSMFAN */
12573 2657,
12574 /* EVMHOGSMIAA */
12575 2660,
12576 /* EVMHOGSMIAN */
12577 2663,
12578 /* EVMHOGUMIAA */
12579 2666,
12580 /* EVMHOGUMIAN */
12581 2669,
12582 /* EVMHOSMF */
12583 2672,
12584 /* EVMHOSMFA */
12585 2675,
12586 /* EVMHOSMFAAW */
12587 2678,
12588 /* EVMHOSMFANW */
12589 2681,
12590 /* EVMHOSMI */
12591 2684,
12592 /* EVMHOSMIA */
12593 2687,
12594 /* EVMHOSMIAAW */
12595 2690,
12596 /* EVMHOSMIANW */
12597 2693,
12598 /* EVMHOSSF */
12599 2696,
12600 /* EVMHOSSFA */
12601 2699,
12602 /* EVMHOSSFAAW */
12603 2702,
12604 /* EVMHOSSFANW */
12605 2705,
12606 /* EVMHOSSIAAW */
12607 2708,
12608 /* EVMHOSSIANW */
12609 2711,
12610 /* EVMHOUMI */
12611 2714,
12612 /* EVMHOUMIA */
12613 2717,
12614 /* EVMHOUMIAAW */
12615 2720,
12616 /* EVMHOUMIANW */
12617 2723,
12618 /* EVMHOUSIAAW */
12619 2726,
12620 /* EVMHOUSIANW */
12621 2729,
12622 /* EVMRA */
12623 2732,
12624 /* EVMWHSMF */
12625 2734,
12626 /* EVMWHSMFA */
12627 2737,
12628 /* EVMWHSMI */
12629 2740,
12630 /* EVMWHSMIA */
12631 2743,
12632 /* EVMWHSSF */
12633 2746,
12634 /* EVMWHSSFA */
12635 2749,
12636 /* EVMWHUMI */
12637 2752,
12638 /* EVMWHUMIA */
12639 2755,
12640 /* EVMWLSMIAAW */
12641 2758,
12642 /* EVMWLSMIANW */
12643 2761,
12644 /* EVMWLSSIAAW */
12645 2764,
12646 /* EVMWLSSIANW */
12647 2767,
12648 /* EVMWLUMI */
12649 2770,
12650 /* EVMWLUMIA */
12651 2773,
12652 /* EVMWLUMIAAW */
12653 2776,
12654 /* EVMWLUMIANW */
12655 2779,
12656 /* EVMWLUSIAAW */
12657 2782,
12658 /* EVMWLUSIANW */
12659 2785,
12660 /* EVMWSMF */
12661 2788,
12662 /* EVMWSMFA */
12663 2791,
12664 /* EVMWSMFAA */
12665 2794,
12666 /* EVMWSMFAN */
12667 2797,
12668 /* EVMWSMI */
12669 2800,
12670 /* EVMWSMIA */
12671 2803,
12672 /* EVMWSMIAA */
12673 2806,
12674 /* EVMWSMIAN */
12675 2809,
12676 /* EVMWSSF */
12677 2812,
12678 /* EVMWSSFA */
12679 2815,
12680 /* EVMWSSFAA */
12681 2818,
12682 /* EVMWSSFAN */
12683 2821,
12684 /* EVMWUMI */
12685 2824,
12686 /* EVMWUMIA */
12687 2827,
12688 /* EVMWUMIAA */
12689 2830,
12690 /* EVMWUMIAN */
12691 2833,
12692 /* EVNAND */
12693 2836,
12694 /* EVNEG */
12695 2839,
12696 /* EVNOR */
12697 2841,
12698 /* EVOR */
12699 2844,
12700 /* EVORC */
12701 2847,
12702 /* EVRLW */
12703 2850,
12704 /* EVRLWI */
12705 2853,
12706 /* EVRNDW */
12707 2856,
12708 /* EVSEL */
12709 2858,
12710 /* EVSLW */
12711 2862,
12712 /* EVSLWI */
12713 2865,
12714 /* EVSPLATFI */
12715 2868,
12716 /* EVSPLATI */
12717 2870,
12718 /* EVSRWIS */
12719 2872,
12720 /* EVSRWIU */
12721 2875,
12722 /* EVSRWS */
12723 2878,
12724 /* EVSRWU */
12725 2881,
12726 /* EVSTDD */
12727 2884,
12728 /* EVSTDDX */
12729 2887,
12730 /* EVSTDH */
12731 2890,
12732 /* EVSTDHX */
12733 2893,
12734 /* EVSTDW */
12735 2896,
12736 /* EVSTDWX */
12737 2899,
12738 /* EVSTWHE */
12739 2902,
12740 /* EVSTWHEX */
12741 2905,
12742 /* EVSTWHO */
12743 2908,
12744 /* EVSTWHOX */
12745 2911,
12746 /* EVSTWWE */
12747 2914,
12748 /* EVSTWWEX */
12749 2917,
12750 /* EVSTWWO */
12751 2920,
12752 /* EVSTWWOX */
12753 2923,
12754 /* EVSUBFSMIAAW */
12755 2926,
12756 /* EVSUBFSSIAAW */
12757 2928,
12758 /* EVSUBFUMIAAW */
12759 2930,
12760 /* EVSUBFUSIAAW */
12761 2932,
12762 /* EVSUBFW */
12763 2934,
12764 /* EVSUBIFW */
12765 2937,
12766 /* EVXOR */
12767 2940,
12768 /* EXTSB */
12769 2943,
12770 /* EXTSB8 */
12771 2945,
12772 /* EXTSB8_32_64 */
12773 2947,
12774 /* EXTSB8_rec */
12775 2949,
12776 /* EXTSB_rec */
12777 2951,
12778 /* EXTSH */
12779 2953,
12780 /* EXTSH8 */
12781 2955,
12782 /* EXTSH8_32_64 */
12783 2957,
12784 /* EXTSH8_rec */
12785 2959,
12786 /* EXTSH_rec */
12787 2961,
12788 /* EXTSW */
12789 2963,
12790 /* EXTSWSLI */
12791 2965,
12792 /* EXTSWSLI_32_64 */
12793 2968,
12794 /* EXTSWSLI_32_64_rec */
12795 2971,
12796 /* EXTSWSLI_rec */
12797 2974,
12798 /* EXTSW_32 */
12799 2977,
12800 /* EXTSW_32_64 */
12801 2979,
12802 /* EXTSW_32_64_rec */
12803 2981,
12804 /* EXTSW_rec */
12805 2983,
12806 /* EnforceIEIO */
12807 2985,
12808 /* FABSD */
12809 2985,
12810 /* FABSD_rec */
12811 2987,
12812 /* FABSS */
12813 2989,
12814 /* FABSS_rec */
12815 2991,
12816 /* FADD */
12817 2993,
12818 /* FADDS */
12819 2996,
12820 /* FADDS_rec */
12821 2999,
12822 /* FADD_rec */
12823 3002,
12824 /* FADDrtz */
12825 3005,
12826 /* FCFID */
12827 3008,
12828 /* FCFIDS */
12829 3010,
12830 /* FCFIDS_rec */
12831 3012,
12832 /* FCFIDU */
12833 3014,
12834 /* FCFIDUS */
12835 3016,
12836 /* FCFIDUS_rec */
12837 3018,
12838 /* FCFIDU_rec */
12839 3020,
12840 /* FCFID_rec */
12841 3022,
12842 /* FCMPOD */
12843 3024,
12844 /* FCMPOS */
12845 3027,
12846 /* FCMPUD */
12847 3030,
12848 /* FCMPUS */
12849 3033,
12850 /* FCPSGND */
12851 3036,
12852 /* FCPSGND_rec */
12853 3039,
12854 /* FCPSGNS */
12855 3042,
12856 /* FCPSGNS_rec */
12857 3045,
12858 /* FCTID */
12859 3048,
12860 /* FCTIDU */
12861 3050,
12862 /* FCTIDUZ */
12863 3052,
12864 /* FCTIDUZ_rec */
12865 3054,
12866 /* FCTIDU_rec */
12867 3056,
12868 /* FCTIDZ */
12869 3058,
12870 /* FCTIDZ_rec */
12871 3060,
12872 /* FCTID_rec */
12873 3062,
12874 /* FCTIW */
12875 3064,
12876 /* FCTIWU */
12877 3066,
12878 /* FCTIWUZ */
12879 3068,
12880 /* FCTIWUZ_rec */
12881 3070,
12882 /* FCTIWU_rec */
12883 3072,
12884 /* FCTIWZ */
12885 3074,
12886 /* FCTIWZ_rec */
12887 3076,
12888 /* FCTIW_rec */
12889 3078,
12890 /* FDIV */
12891 3080,
12892 /* FDIVS */
12893 3083,
12894 /* FDIVS_rec */
12895 3086,
12896 /* FDIV_rec */
12897 3089,
12898 /* FENCE */
12899 3092,
12900 /* FMADD */
12901 3092,
12902 /* FMADDS */
12903 3096,
12904 /* FMADDS_rec */
12905 3100,
12906 /* FMADD_rec */
12907 3104,
12908 /* FMR */
12909 3108,
12910 /* FMR_rec */
12911 3110,
12912 /* FMSUB */
12913 3112,
12914 /* FMSUBS */
12915 3116,
12916 /* FMSUBS_rec */
12917 3120,
12918 /* FMSUB_rec */
12919 3124,
12920 /* FMUL */
12921 3128,
12922 /* FMULS */
12923 3131,
12924 /* FMULS_rec */
12925 3134,
12926 /* FMUL_rec */
12927 3137,
12928 /* FNABSD */
12929 3140,
12930 /* FNABSD_rec */
12931 3142,
12932 /* FNABSS */
12933 3144,
12934 /* FNABSS_rec */
12935 3146,
12936 /* FNEGD */
12937 3148,
12938 /* FNEGD_rec */
12939 3150,
12940 /* FNEGS */
12941 3152,
12942 /* FNEGS_rec */
12943 3154,
12944 /* FNMADD */
12945 3156,
12946 /* FNMADDS */
12947 3160,
12948 /* FNMADDS_rec */
12949 3164,
12950 /* FNMADD_rec */
12951 3168,
12952 /* FNMSUB */
12953 3172,
12954 /* FNMSUBS */
12955 3176,
12956 /* FNMSUBS_rec */
12957 3180,
12958 /* FNMSUB_rec */
12959 3184,
12960 /* FRE */
12961 3188,
12962 /* FRES */
12963 3190,
12964 /* FRES_rec */
12965 3192,
12966 /* FRE_rec */
12967 3194,
12968 /* FRIMD */
12969 3196,
12970 /* FRIMD_rec */
12971 3198,
12972 /* FRIMS */
12973 3200,
12974 /* FRIMS_rec */
12975 3202,
12976 /* FRIND */
12977 3204,
12978 /* FRIND_rec */
12979 3206,
12980 /* FRINS */
12981 3208,
12982 /* FRINS_rec */
12983 3210,
12984 /* FRIPD */
12985 3212,
12986 /* FRIPD_rec */
12987 3214,
12988 /* FRIPS */
12989 3216,
12990 /* FRIPS_rec */
12991 3218,
12992 /* FRIZD */
12993 3220,
12994 /* FRIZD_rec */
12995 3222,
12996 /* FRIZS */
12997 3224,
12998 /* FRIZS_rec */
12999 3226,
13000 /* FRSP */
13001 3228,
13002 /* FRSP_rec */
13003 3230,
13004 /* FRSQRTE */
13005 3232,
13006 /* FRSQRTES */
13007 3234,
13008 /* FRSQRTES_rec */
13009 3236,
13010 /* FRSQRTE_rec */
13011 3238,
13012 /* FSELD */
13013 3240,
13014 /* FSELD_rec */
13015 3244,
13016 /* FSELS */
13017 3248,
13018 /* FSELS_rec */
13019 3252,
13020 /* FSQRT */
13021 3256,
13022 /* FSQRTS */
13023 3258,
13024 /* FSQRTS_rec */
13025 3260,
13026 /* FSQRT_rec */
13027 3262,
13028 /* FSUB */
13029 3264,
13030 /* FSUBS */
13031 3267,
13032 /* FSUBS_rec */
13033 3270,
13034 /* FSUB_rec */
13035 3273,
13036 /* FTDIV */
13037 3276,
13038 /* FTSQRT */
13039 3279,
13040 /* GETtlsADDR */
13041 3281,
13042 /* GETtlsADDR32 */
13043 3284,
13044 /* GETtlsADDR32AIX */
13045 3287,
13046 /* GETtlsADDR64AIX */
13047 3290,
13048 /* GETtlsADDRPCREL */
13049 3293,
13050 /* GETtlsMOD32AIX */
13051 3296,
13052 /* GETtlsMOD64AIX */
13053 3298,
13054 /* GETtlsTpointer32AIX */
13055 3300,
13056 /* GETtlsldADDR */
13057 3301,
13058 /* GETtlsldADDR32 */
13059 3304,
13060 /* GETtlsldADDRPCREL */
13061 3307,
13062 /* HASHCHK */
13063 3310,
13064 /* HASHCHK8 */
13065 3313,
13066 /* HASHCHKP */
13067 3316,
13068 /* HASHCHKP8 */
13069 3319,
13070 /* HASHST */
13071 3322,
13072 /* HASHST8 */
13073 3325,
13074 /* HASHSTP */
13075 3328,
13076 /* HASHSTP8 */
13077 3331,
13078 /* HRFID */
13079 3334,
13080 /* ICBI */
13081 3334,
13082 /* ICBIEP */
13083 3336,
13084 /* ICBLC */
13085 3338,
13086 /* ICBLQ */
13087 3341,
13088 /* ICBT */
13089 3344,
13090 /* ICBTLS */
13091 3347,
13092 /* ICCCI */
13093 3350,
13094 /* ISEL */
13095 3352,
13096 /* ISEL8 */
13097 3356,
13098 /* ISYNC */
13099 3360,
13100 /* LA */
13101 3360,
13102 /* LA8 */
13103 3363,
13104 /* LBARX */
13105 3366,
13106 /* LBARXL */
13107 3369,
13108 /* LBEPX */
13109 3372,
13110 /* LBZ */
13111 3375,
13112 /* LBZ8 */
13113 3378,
13114 /* LBZCIX */
13115 3381,
13116 /* LBZU */
13117 3384,
13118 /* LBZU8 */
13119 3388,
13120 /* LBZUX */
13121 3392,
13122 /* LBZUX8 */
13123 3396,
13124 /* LBZX */
13125 3400,
13126 /* LBZX8 */
13127 3403,
13128 /* LBZXTLS */
13129 3406,
13130 /* LBZXTLS_ */
13131 3409,
13132 /* LBZXTLS_32 */
13133 3412,
13134 /* LD */
13135 3415,
13136 /* LDARX */
13137 3418,
13138 /* LDARXL */
13139 3421,
13140 /* LDAT */
13141 3424,
13142 /* LDBRX */
13143 3427,
13144 /* LDCIX */
13145 3430,
13146 /* LDU */
13147 3433,
13148 /* LDUX */
13149 3437,
13150 /* LDX */
13151 3441,
13152 /* LDXTLS */
13153 3444,
13154 /* LDXTLS_ */
13155 3447,
13156 /* LDgotTprelL */
13157 3450,
13158 /* LDgotTprelL32 */
13159 3453,
13160 /* LDtoc */
13161 3456,
13162 /* LDtocBA */
13163 3459,
13164 /* LDtocCPT */
13165 3462,
13166 /* LDtocJTI */
13167 3465,
13168 /* LDtocL */
13169 3468,
13170 /* LFD */
13171 3471,
13172 /* LFDEPX */
13173 3474,
13174 /* LFDU */
13175 3477,
13176 /* LFDUX */
13177 3481,
13178 /* LFDX */
13179 3485,
13180 /* LFDXTLS */
13181 3488,
13182 /* LFDXTLS_ */
13183 3491,
13184 /* LFIWAX */
13185 3494,
13186 /* LFIWZX */
13187 3497,
13188 /* LFS */
13189 3500,
13190 /* LFSU */
13191 3503,
13192 /* LFSUX */
13193 3507,
13194 /* LFSX */
13195 3511,
13196 /* LFSXTLS */
13197 3514,
13198 /* LFSXTLS_ */
13199 3517,
13200 /* LHA */
13201 3520,
13202 /* LHA8 */
13203 3523,
13204 /* LHARX */
13205 3526,
13206 /* LHARXL */
13207 3529,
13208 /* LHAU */
13209 3532,
13210 /* LHAU8 */
13211 3536,
13212 /* LHAUX */
13213 3540,
13214 /* LHAUX8 */
13215 3544,
13216 /* LHAX */
13217 3548,
13218 /* LHAX8 */
13219 3551,
13220 /* LHAXTLS */
13221 3554,
13222 /* LHAXTLS_ */
13223 3557,
13224 /* LHAXTLS_32 */
13225 3560,
13226 /* LHBRX */
13227 3563,
13228 /* LHBRX8 */
13229 3566,
13230 /* LHEPX */
13231 3569,
13232 /* LHZ */
13233 3572,
13234 /* LHZ8 */
13235 3575,
13236 /* LHZCIX */
13237 3578,
13238 /* LHZU */
13239 3581,
13240 /* LHZU8 */
13241 3585,
13242 /* LHZUX */
13243 3589,
13244 /* LHZUX8 */
13245 3593,
13246 /* LHZX */
13247 3597,
13248 /* LHZX8 */
13249 3600,
13250 /* LHZXTLS */
13251 3603,
13252 /* LHZXTLS_ */
13253 3606,
13254 /* LHZXTLS_32 */
13255 3609,
13256 /* LI */
13257 3612,
13258 /* LI8 */
13259 3614,
13260 /* LIS */
13261 3616,
13262 /* LIS8 */
13263 3618,
13264 /* LMW */
13265 3620,
13266 /* LQ */
13267 3623,
13268 /* LQARX */
13269 3626,
13270 /* LQARXL */
13271 3629,
13272 /* LQX_PSEUDO */
13273 3632,
13274 /* LSWI */
13275 3635,
13276 /* LVEBX */
13277 3638,
13278 /* LVEHX */
13279 3641,
13280 /* LVEWX */
13281 3644,
13282 /* LVSL */
13283 3647,
13284 /* LVSR */
13285 3650,
13286 /* LVX */
13287 3653,
13288 /* LVXL */
13289 3656,
13290 /* LWA */
13291 3659,
13292 /* LWARX */
13293 3662,
13294 /* LWARXL */
13295 3665,
13296 /* LWAT */
13297 3668,
13298 /* LWAUX */
13299 3671,
13300 /* LWAX */
13301 3675,
13302 /* LWAXTLS */
13303 3678,
13304 /* LWAXTLS_ */
13305 3681,
13306 /* LWAXTLS_32 */
13307 3684,
13308 /* LWAX_32 */
13309 3687,
13310 /* LWA_32 */
13311 3690,
13312 /* LWBRX */
13313 3693,
13314 /* LWBRX8 */
13315 3696,
13316 /* LWEPX */
13317 3699,
13318 /* LWZ */
13319 3702,
13320 /* LWZ8 */
13321 3705,
13322 /* LWZCIX */
13323 3708,
13324 /* LWZU */
13325 3711,
13326 /* LWZU8 */
13327 3715,
13328 /* LWZUX */
13329 3719,
13330 /* LWZUX8 */
13331 3723,
13332 /* LWZX */
13333 3727,
13334 /* LWZX8 */
13335 3730,
13336 /* LWZXTLS */
13337 3733,
13338 /* LWZXTLS_ */
13339 3736,
13340 /* LWZXTLS_32 */
13341 3739,
13342 /* LWZtoc */
13343 3742,
13344 /* LWZtocL */
13345 3745,
13346 /* LXSD */
13347 3748,
13348 /* LXSDX */
13349 3751,
13350 /* LXSIBZX */
13351 3754,
13352 /* LXSIHZX */
13353 3757,
13354 /* LXSIWAX */
13355 3760,
13356 /* LXSIWZX */
13357 3763,
13358 /* LXSSP */
13359 3766,
13360 /* LXSSPX */
13361 3769,
13362 /* LXV */
13363 3772,
13364 /* LXVB16X */
13365 3775,
13366 /* LXVD2X */
13367 3778,
13368 /* LXVDSX */
13369 3781,
13370 /* LXVH8X */
13371 3784,
13372 /* LXVKQ */
13373 3787,
13374 /* LXVL */
13375 3789,
13376 /* LXVLL */
13377 3792,
13378 /* LXVP */
13379 3795,
13380 /* LXVPRL */
13381 3798,
13382 /* LXVPRLL */
13383 3801,
13384 /* LXVPX */
13385 3804,
13386 /* LXVRBX */
13387 3807,
13388 /* LXVRDX */
13389 3810,
13390 /* LXVRHX */
13391 3813,
13392 /* LXVRL */
13393 3816,
13394 /* LXVRLL */
13395 3819,
13396 /* LXVRWX */
13397 3822,
13398 /* LXVW4X */
13399 3825,
13400 /* LXVWSX */
13401 3828,
13402 /* LXVX */
13403 3831,
13404 /* MADDHD */
13405 3834,
13406 /* MADDHDU */
13407 3838,
13408 /* MADDLD */
13409 3842,
13410 /* MADDLD8 */
13411 3846,
13412 /* MBAR */
13413 3850,
13414 /* MCRF */
13415 3851,
13416 /* MCRFS */
13417 3853,
13418 /* MCRXRX */
13419 3855,
13420 /* MFBHRBE */
13421 3856,
13422 /* MFCR */
13423 3859,
13424 /* MFCR8 */
13425 3860,
13426 /* MFCTR */
13427 3861,
13428 /* MFCTR8 */
13429 3862,
13430 /* MFDCR */
13431 3863,
13432 /* MFFS */
13433 3865,
13434 /* MFFSCDRN */
13435 3866,
13436 /* MFFSCDRNI */
13437 3868,
13438 /* MFFSCE */
13439 3870,
13440 /* MFFSCRN */
13441 3871,
13442 /* MFFSCRNI */
13443 3873,
13444 /* MFFSL */
13445 3875,
13446 /* MFFS_rec */
13447 3876,
13448 /* MFLR */
13449 3877,
13450 /* MFLR8 */
13451 3878,
13452 /* MFMSR */
13453 3879,
13454 /* MFOCRF */
13455 3880,
13456 /* MFOCRF8 */
13457 3882,
13458 /* MFPMR */
13459 3884,
13460 /* MFSPR */
13461 3886,
13462 /* MFSPR8 */
13463 3888,
13464 /* MFSR */
13465 3890,
13466 /* MFSRIN */
13467 3892,
13468 /* MFTB */
13469 3894,
13470 /* MFTB8 */
13471 3896,
13472 /* MFUDSCR */
13473 3897,
13474 /* MFVRD */
13475 3898,
13476 /* MFVRSAVE */
13477 3900,
13478 /* MFVRSAVEv */
13479 3901,
13480 /* MFVRWZ */
13481 3903,
13482 /* MFVSCR */
13483 3905,
13484 /* MFVSRD */
13485 3906,
13486 /* MFVSRLD */
13487 3908,
13488 /* MFVSRWZ */
13489 3910,
13490 /* MODSD */
13491 3912,
13492 /* MODSW */
13493 3915,
13494 /* MODUD */
13495 3918,
13496 /* MODUW */
13497 3921,
13498 /* MSGSYNC */
13499 3924,
13500 /* MSYNC */
13501 3924,
13502 /* MTCRF */
13503 3924,
13504 /* MTCRF8 */
13505 3926,
13506 /* MTCTR */
13507 3928,
13508 /* MTCTR8 */
13509 3929,
13510 /* MTCTR8loop */
13511 3930,
13512 /* MTCTRloop */
13513 3931,
13514 /* MTDCR */
13515 3932,
13516 /* MTFSB0 */
13517 3934,
13518 /* MTFSB1 */
13519 3935,
13520 /* MTFSF */
13521 3936,
13522 /* MTFSFI */
13523 3940,
13524 /* MTFSFI_rec */
13525 3943,
13526 /* MTFSFIb */
13527 3946,
13528 /* MTFSF_rec */
13529 3948,
13530 /* MTFSFb */
13531 3952,
13532 /* MTLR */
13533 3954,
13534 /* MTLR8 */
13535 3955,
13536 /* MTMSR */
13537 3956,
13538 /* MTMSRD */
13539 3958,
13540 /* MTOCRF */
13541 3960,
13542 /* MTOCRF8 */
13543 3962,
13544 /* MTPMR */
13545 3964,
13546 /* MTSPR */
13547 3966,
13548 /* MTSPR8 */
13549 3968,
13550 /* MTSR */
13551 3970,
13552 /* MTSRIN */
13553 3972,
13554 /* MTUDSCR */
13555 3974,
13556 /* MTVRD */
13557 3975,
13558 /* MTVRSAVE */
13559 3977,
13560 /* MTVRSAVEv */
13561 3978,
13562 /* MTVRWA */
13563 3980,
13564 /* MTVRWZ */
13565 3982,
13566 /* MTVSCR */
13567 3984,
13568 /* MTVSRBM */
13569 3985,
13570 /* MTVSRBMI */
13571 3987,
13572 /* MTVSRD */
13573 3989,
13574 /* MTVSRDD */
13575 3991,
13576 /* MTVSRDM */
13577 3994,
13578 /* MTVSRHM */
13579 3996,
13580 /* MTVSRQM */
13581 3998,
13582 /* MTVSRWA */
13583 4000,
13584 /* MTVSRWM */
13585 4002,
13586 /* MTVSRWS */
13587 4004,
13588 /* MTVSRWZ */
13589 4006,
13590 /* MULHD */
13591 4008,
13592 /* MULHDU */
13593 4011,
13594 /* MULHDU_rec */
13595 4014,
13596 /* MULHD_rec */
13597 4017,
13598 /* MULHW */
13599 4020,
13600 /* MULHWU */
13601 4023,
13602 /* MULHWU_rec */
13603 4026,
13604 /* MULHW_rec */
13605 4029,
13606 /* MULLD */
13607 4032,
13608 /* MULLDO */
13609 4035,
13610 /* MULLDO_rec */
13611 4038,
13612 /* MULLD_rec */
13613 4041,
13614 /* MULLI */
13615 4044,
13616 /* MULLI8 */
13617 4047,
13618 /* MULLW */
13619 4050,
13620 /* MULLWO */
13621 4053,
13622 /* MULLWO_rec */
13623 4056,
13624 /* MULLW_rec */
13625 4059,
13626 /* MoveGOTtoLR */
13627 4062,
13628 /* MovePCtoLR */
13629 4062,
13630 /* MovePCtoLR8 */
13631 4062,
13632 /* NAND */
13633 4062,
13634 /* NAND8 */
13635 4065,
13636 /* NAND8_rec */
13637 4068,
13638 /* NAND_rec */
13639 4071,
13640 /* NAP */
13641 4074,
13642 /* NEG */
13643 4074,
13644 /* NEG8 */
13645 4076,
13646 /* NEG8O */
13647 4078,
13648 /* NEG8O_rec */
13649 4080,
13650 /* NEG8_rec */
13651 4082,
13652 /* NEGO */
13653 4084,
13654 /* NEGO_rec */
13655 4086,
13656 /* NEG_rec */
13657 4088,
13658 /* NOP */
13659 4090,
13660 /* NOP_GT_PWR6 */
13661 4090,
13662 /* NOP_GT_PWR7 */
13663 4090,
13664 /* NOR */
13665 4090,
13666 /* NOR8 */
13667 4093,
13668 /* NOR8_rec */
13669 4096,
13670 /* NOR_rec */
13671 4099,
13672 /* OR */
13673 4102,
13674 /* OR8 */
13675 4105,
13676 /* OR8_rec */
13677 4108,
13678 /* ORC */
13679 4111,
13680 /* ORC8 */
13681 4114,
13682 /* ORC8_rec */
13683 4117,
13684 /* ORC_rec */
13685 4120,
13686 /* ORI */
13687 4123,
13688 /* ORI8 */
13689 4126,
13690 /* ORIS */
13691 4129,
13692 /* ORIS8 */
13693 4132,
13694 /* OR_rec */
13695 4135,
13696 /* PADDI */
13697 4138,
13698 /* PADDI8 */
13699 4141,
13700 /* PADDI8pc */
13701 4144,
13702 /* PADDIdtprel */
13703 4147,
13704 /* PADDIpc */
13705 4150,
13706 /* PDEPD */
13707 4153,
13708 /* PEXTD */
13709 4156,
13710 /* PLA */
13711 4159,
13712 /* PLA8 */
13713 4162,
13714 /* PLA8pc */
13715 4165,
13716 /* PLApc */
13717 4167,
13718 /* PLBZ */
13719 4169,
13720 /* PLBZ8 */
13721 4172,
13722 /* PLBZ8nopc */
13723 4175,
13724 /* PLBZ8onlypc */
13725 4178,
13726 /* PLBZ8pc */
13727 4180,
13728 /* PLBZnopc */
13729 4183,
13730 /* PLBZonlypc */
13731 4186,
13732 /* PLBZpc */
13733 4188,
13734 /* PLD */
13735 4191,
13736 /* PLDnopc */
13737 4194,
13738 /* PLDonlypc */
13739 4197,
13740 /* PLDpc */
13741 4199,
13742 /* PLFD */
13743 4202,
13744 /* PLFDnopc */
13745 4205,
13746 /* PLFDonlypc */
13747 4208,
13748 /* PLFDpc */
13749 4210,
13750 /* PLFS */
13751 4213,
13752 /* PLFSnopc */
13753 4216,
13754 /* PLFSonlypc */
13755 4219,
13756 /* PLFSpc */
13757 4221,
13758 /* PLHA */
13759 4224,
13760 /* PLHA8 */
13761 4227,
13762 /* PLHA8nopc */
13763 4230,
13764 /* PLHA8onlypc */
13765 4233,
13766 /* PLHA8pc */
13767 4235,
13768 /* PLHAnopc */
13769 4238,
13770 /* PLHAonlypc */
13771 4241,
13772 /* PLHApc */
13773 4243,
13774 /* PLHZ */
13775 4246,
13776 /* PLHZ8 */
13777 4249,
13778 /* PLHZ8nopc */
13779 4252,
13780 /* PLHZ8onlypc */
13781 4255,
13782 /* PLHZ8pc */
13783 4257,
13784 /* PLHZnopc */
13785 4260,
13786 /* PLHZonlypc */
13787 4263,
13788 /* PLHZpc */
13789 4265,
13790 /* PLI */
13791 4268,
13792 /* PLI8 */
13793 4270,
13794 /* PLWA */
13795 4272,
13796 /* PLWA8 */
13797 4275,
13798 /* PLWA8nopc */
13799 4278,
13800 /* PLWA8onlypc */
13801 4281,
13802 /* PLWA8pc */
13803 4283,
13804 /* PLWAnopc */
13805 4286,
13806 /* PLWAonlypc */
13807 4289,
13808 /* PLWApc */
13809 4291,
13810 /* PLWZ */
13811 4294,
13812 /* PLWZ8 */
13813 4297,
13814 /* PLWZ8nopc */
13815 4300,
13816 /* PLWZ8onlypc */
13817 4303,
13818 /* PLWZ8pc */
13819 4305,
13820 /* PLWZnopc */
13821 4308,
13822 /* PLWZonlypc */
13823 4311,
13824 /* PLWZpc */
13825 4313,
13826 /* PLXSD */
13827 4316,
13828 /* PLXSDnopc */
13829 4319,
13830 /* PLXSDonlypc */
13831 4322,
13832 /* PLXSDpc */
13833 4324,
13834 /* PLXSSP */
13835 4327,
13836 /* PLXSSPnopc */
13837 4330,
13838 /* PLXSSPonlypc */
13839 4333,
13840 /* PLXSSPpc */
13841 4335,
13842 /* PLXV */
13843 4338,
13844 /* PLXVP */
13845 4341,
13846 /* PLXVPnopc */
13847 4344,
13848 /* PLXVPonlypc */
13849 4347,
13850 /* PLXVPpc */
13851 4349,
13852 /* PLXVnopc */
13853 4352,
13854 /* PLXVonlypc */
13855 4355,
13856 /* PLXVpc */
13857 4357,
13858 /* PMXVBF16GER2 */
13859 4360,
13860 /* PMXVBF16GER2NN */
13861 4366,
13862 /* PMXVBF16GER2NP */
13863 4373,
13864 /* PMXVBF16GER2PN */
13865 4380,
13866 /* PMXVBF16GER2PP */
13867 4387,
13868 /* PMXVBF16GER2W */
13869 4394,
13870 /* PMXVBF16GER2WNN */
13871 4400,
13872 /* PMXVBF16GER2WNP */
13873 4407,
13874 /* PMXVBF16GER2WPN */
13875 4414,
13876 /* PMXVBF16GER2WPP */
13877 4421,
13878 /* PMXVF16GER2 */
13879 4428,
13880 /* PMXVF16GER2NN */
13881 4434,
13882 /* PMXVF16GER2NP */
13883 4441,
13884 /* PMXVF16GER2PN */
13885 4448,
13886 /* PMXVF16GER2PP */
13887 4455,
13888 /* PMXVF16GER2W */
13889 4462,
13890 /* PMXVF16GER2WNN */
13891 4468,
13892 /* PMXVF16GER2WNP */
13893 4475,
13894 /* PMXVF16GER2WPN */
13895 4482,
13896 /* PMXVF16GER2WPP */
13897 4489,
13898 /* PMXVF32GER */
13899 4496,
13900 /* PMXVF32GERNN */
13901 4501,
13902 /* PMXVF32GERNP */
13903 4507,
13904 /* PMXVF32GERPN */
13905 4513,
13906 /* PMXVF32GERPP */
13907 4519,
13908 /* PMXVF32GERW */
13909 4525,
13910 /* PMXVF32GERWNN */
13911 4530,
13912 /* PMXVF32GERWNP */
13913 4536,
13914 /* PMXVF32GERWPN */
13915 4542,
13916 /* PMXVF32GERWPP */
13917 4548,
13918 /* PMXVF64GER */
13919 4554,
13920 /* PMXVF64GERNN */
13921 4559,
13922 /* PMXVF64GERNP */
13923 4565,
13924 /* PMXVF64GERPN */
13925 4571,
13926 /* PMXVF64GERPP */
13927 4577,
13928 /* PMXVF64GERW */
13929 4583,
13930 /* PMXVF64GERWNN */
13931 4588,
13932 /* PMXVF64GERWNP */
13933 4594,
13934 /* PMXVF64GERWPN */
13935 4600,
13936 /* PMXVF64GERWPP */
13937 4606,
13938 /* PMXVI16GER2 */
13939 4612,
13940 /* PMXVI16GER2PP */
13941 4618,
13942 /* PMXVI16GER2S */
13943 4625,
13944 /* PMXVI16GER2SPP */
13945 4631,
13946 /* PMXVI16GER2SW */
13947 4638,
13948 /* PMXVI16GER2SWPP */
13949 4644,
13950 /* PMXVI16GER2W */
13951 4651,
13952 /* PMXVI16GER2WPP */
13953 4657,
13954 /* PMXVI4GER8 */
13955 4664,
13956 /* PMXVI4GER8PP */
13957 4670,
13958 /* PMXVI4GER8W */
13959 4677,
13960 /* PMXVI4GER8WPP */
13961 4683,
13962 /* PMXVI8GER4 */
13963 4690,
13964 /* PMXVI8GER4PP */
13965 4696,
13966 /* PMXVI8GER4SPP */
13967 4703,
13968 /* PMXVI8GER4W */
13969 4710,
13970 /* PMXVI8GER4WPP */
13971 4716,
13972 /* PMXVI8GER4WSPP */
13973 4723,
13974 /* POPCNTB */
13975 4730,
13976 /* POPCNTB8 */
13977 4732,
13978 /* POPCNTD */
13979 4734,
13980 /* POPCNTW */
13981 4736,
13982 /* PPC32GOT */
13983 4738,
13984 /* PPC32PICGOT */
13985 4739,
13986 /* PREPARE_PROBED_ALLOCA_32 */
13987 4741,
13988 /* PREPARE_PROBED_ALLOCA_64 */
13989 4746,
13990 /* PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32 */
13991 4751,
13992 /* PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64 */
13993 4756,
13994 /* PROBED_ALLOCA_32 */
13995 4761,
13996 /* PROBED_ALLOCA_64 */
13997 4765,
13998 /* PROBED_STACKALLOC_32 */
13999 4769,
14000 /* PROBED_STACKALLOC_64 */
14001 4772,
14002 /* PSTB */
14003 4775,
14004 /* PSTB8 */
14005 4778,
14006 /* PSTB8nopc */
14007 4781,
14008 /* PSTB8onlypc */
14009 4784,
14010 /* PSTB8pc */
14011 4786,
14012 /* PSTBnopc */
14013 4789,
14014 /* PSTBonlypc */
14015 4792,
14016 /* PSTBpc */
14017 4794,
14018 /* PSTD */
14019 4797,
14020 /* PSTDnopc */
14021 4800,
14022 /* PSTDonlypc */
14023 4803,
14024 /* PSTDpc */
14025 4805,
14026 /* PSTFD */
14027 4808,
14028 /* PSTFDnopc */
14029 4811,
14030 /* PSTFDonlypc */
14031 4814,
14032 /* PSTFDpc */
14033 4816,
14034 /* PSTFS */
14035 4819,
14036 /* PSTFSnopc */
14037 4822,
14038 /* PSTFSonlypc */
14039 4825,
14040 /* PSTFSpc */
14041 4827,
14042 /* PSTH */
14043 4830,
14044 /* PSTH8 */
14045 4833,
14046 /* PSTH8nopc */
14047 4836,
14048 /* PSTH8onlypc */
14049 4839,
14050 /* PSTH8pc */
14051 4841,
14052 /* PSTHnopc */
14053 4844,
14054 /* PSTHonlypc */
14055 4847,
14056 /* PSTHpc */
14057 4849,
14058 /* PSTW */
14059 4852,
14060 /* PSTW8 */
14061 4855,
14062 /* PSTW8nopc */
14063 4858,
14064 /* PSTW8onlypc */
14065 4861,
14066 /* PSTW8pc */
14067 4863,
14068 /* PSTWnopc */
14069 4866,
14070 /* PSTWonlypc */
14071 4869,
14072 /* PSTWpc */
14073 4871,
14074 /* PSTXSD */
14075 4874,
14076 /* PSTXSDnopc */
14077 4877,
14078 /* PSTXSDonlypc */
14079 4880,
14080 /* PSTXSDpc */
14081 4882,
14082 /* PSTXSSP */
14083 4885,
14084 /* PSTXSSPnopc */
14085 4888,
14086 /* PSTXSSPonlypc */
14087 4891,
14088 /* PSTXSSPpc */
14089 4893,
14090 /* PSTXV */
14091 4896,
14092 /* PSTXVP */
14093 4899,
14094 /* PSTXVPnopc */
14095 4902,
14096 /* PSTXVPonlypc */
14097 4905,
14098 /* PSTXVPpc */
14099 4907,
14100 /* PSTXVnopc */
14101 4910,
14102 /* PSTXVonlypc */
14103 4913,
14104 /* PSTXVpc */
14105 4915,
14106 /* PseudoEIEIO */
14107 4918,
14108 /* RESTORE_ACC */
14109 4918,
14110 /* RESTORE_CR */
14111 4921,
14112 /* RESTORE_CRBIT */
14113 4924,
14114 /* RESTORE_QUADWORD */
14115 4927,
14116 /* RESTORE_UACC */
14117 4930,
14118 /* RESTORE_WACC */
14119 4933,
14120 /* RFCI */
14121 4936,
14122 /* RFDI */
14123 4936,
14124 /* RFEBB */
14125 4936,
14126 /* RFI */
14127 4937,
14128 /* RFID */
14129 4937,
14130 /* RFMCI */
14131 4937,
14132 /* RLDCL */
14133 4937,
14134 /* RLDCL_rec */
14135 4941,
14136 /* RLDCR */
14137 4945,
14138 /* RLDCR_rec */
14139 4949,
14140 /* RLDIC */
14141 4953,
14142 /* RLDICL */
14143 4957,
14144 /* RLDICL_32 */
14145 4961,
14146 /* RLDICL_32_64 */
14147 4965,
14148 /* RLDICL_32_rec */
14149 4969,
14150 /* RLDICL_rec */
14151 4973,
14152 /* RLDICR */
14153 4977,
14154 /* RLDICR_32 */
14155 4981,
14156 /* RLDICR_rec */
14157 4985,
14158 /* RLDIC_rec */
14159 4989,
14160 /* RLDIMI */
14161 4993,
14162 /* RLDIMI_rec */
14163 4998,
14164 /* RLWIMI */
14165 5003,
14166 /* RLWIMI8 */
14167 5009,
14168 /* RLWIMI8_rec */
14169 5015,
14170 /* RLWIMI_rec */
14171 5021,
14172 /* RLWINM */
14173 5027,
14174 /* RLWINM8 */
14175 5032,
14176 /* RLWINM8_rec */
14177 5037,
14178 /* RLWINM_rec */
14179 5042,
14180 /* RLWNM */
14181 5047,
14182 /* RLWNM8 */
14183 5052,
14184 /* RLWNM8_rec */
14185 5057,
14186 /* RLWNM_rec */
14187 5062,
14188 /* ReadTB */
14189 5067,
14190 /* SC */
14191 5069,
14192 /* SCV */
14193 5070,
14194 /* SELECT_CC_F16 */
14195 5071,
14196 /* SELECT_CC_F4 */
14197 5076,
14198 /* SELECT_CC_F8 */
14199 5081,
14200 /* SELECT_CC_I4 */
14201 5086,
14202 /* SELECT_CC_I8 */
14203 5091,
14204 /* SELECT_CC_SPE */
14205 5096,
14206 /* SELECT_CC_SPE4 */
14207 5101,
14208 /* SELECT_CC_VRRC */
14209 5106,
14210 /* SELECT_CC_VSFRC */
14211 5111,
14212 /* SELECT_CC_VSRC */
14213 5116,
14214 /* SELECT_CC_VSSRC */
14215 5121,
14216 /* SELECT_F16 */
14217 5126,
14218 /* SELECT_F4 */
14219 5130,
14220 /* SELECT_F8 */
14221 5134,
14222 /* SELECT_I4 */
14223 5138,
14224 /* SELECT_I8 */
14225 5142,
14226 /* SELECT_SPE */
14227 5146,
14228 /* SELECT_SPE4 */
14229 5150,
14230 /* SELECT_VRRC */
14231 5154,
14232 /* SELECT_VSFRC */
14233 5158,
14234 /* SELECT_VSRC */
14235 5162,
14236 /* SELECT_VSSRC */
14237 5166,
14238 /* SETB */
14239 5170,
14240 /* SETB8 */
14241 5172,
14242 /* SETBC */
14243 5174,
14244 /* SETBC8 */
14245 5176,
14246 /* SETBCR */
14247 5178,
14248 /* SETBCR8 */
14249 5180,
14250 /* SETFLM */
14251 5182,
14252 /* SETNBC */
14253 5184,
14254 /* SETNBC8 */
14255 5186,
14256 /* SETNBCR */
14257 5188,
14258 /* SETNBCR8 */
14259 5190,
14260 /* SETRND */
14261 5192,
14262 /* SETRNDi */
14263 5194,
14264 /* SLBFEE_rec */
14265 5196,
14266 /* SLBIA */
14267 5198,
14268 /* SLBIE */
14269 5198,
14270 /* SLBIEG */
14271 5199,
14272 /* SLBMFEE */
14273 5201,
14274 /* SLBMFEV */
14275 5203,
14276 /* SLBMTE */
14277 5205,
14278 /* SLBSYNC */
14279 5207,
14280 /* SLD */
14281 5207,
14282 /* SLD_rec */
14283 5210,
14284 /* SLW */
14285 5213,
14286 /* SLW8 */
14287 5216,
14288 /* SLW8_rec */
14289 5219,
14290 /* SLW_rec */
14291 5222,
14292 /* SPELWZ */
14293 5225,
14294 /* SPELWZX */
14295 5228,
14296 /* SPESTW */
14297 5231,
14298 /* SPESTWX */
14299 5234,
14300 /* SPILL_ACC */
14301 5237,
14302 /* SPILL_CR */
14303 5240,
14304 /* SPILL_CRBIT */
14305 5243,
14306 /* SPILL_QUADWORD */
14307 5246,
14308 /* SPILL_UACC */
14309 5249,
14310 /* SPILL_WACC */
14311 5252,
14312 /* SPLIT_QUADWORD */
14313 5255,
14314 /* SRAD */
14315 5258,
14316 /* SRADI */
14317 5261,
14318 /* SRADI_32 */
14319 5264,
14320 /* SRADI_rec */
14321 5267,
14322 /* SRAD_rec */
14323 5270,
14324 /* SRAW */
14325 5273,
14326 /* SRAWI */
14327 5276,
14328 /* SRAWI_rec */
14329 5279,
14330 /* SRAW_rec */
14331 5282,
14332 /* SRD */
14333 5285,
14334 /* SRD_rec */
14335 5288,
14336 /* SRW */
14337 5291,
14338 /* SRW8 */
14339 5294,
14340 /* SRW8_rec */
14341 5297,
14342 /* SRW_rec */
14343 5300,
14344 /* STB */
14345 5303,
14346 /* STB8 */
14347 5306,
14348 /* STBCIX */
14349 5309,
14350 /* STBCX */
14351 5312,
14352 /* STBEPX */
14353 5315,
14354 /* STBU */
14355 5318,
14356 /* STBU8 */
14357 5322,
14358 /* STBUX */
14359 5326,
14360 /* STBUX8 */
14361 5330,
14362 /* STBX */
14363 5334,
14364 /* STBX8 */
14365 5337,
14366 /* STBXTLS */
14367 5340,
14368 /* STBXTLS_ */
14369 5343,
14370 /* STBXTLS_32 */
14371 5346,
14372 /* STD */
14373 5349,
14374 /* STDAT */
14375 5352,
14376 /* STDBRX */
14377 5355,
14378 /* STDCIX */
14379 5358,
14380 /* STDCX */
14381 5361,
14382 /* STDU */
14383 5364,
14384 /* STDUX */
14385 5368,
14386 /* STDX */
14387 5372,
14388 /* STDXTLS */
14389 5375,
14390 /* STDXTLS_ */
14391 5378,
14392 /* STFD */
14393 5381,
14394 /* STFDEPX */
14395 5384,
14396 /* STFDU */
14397 5387,
14398 /* STFDUX */
14399 5391,
14400 /* STFDX */
14401 5395,
14402 /* STFDXTLS */
14403 5398,
14404 /* STFDXTLS_ */
14405 5401,
14406 /* STFIWX */
14407 5404,
14408 /* STFS */
14409 5407,
14410 /* STFSU */
14411 5410,
14412 /* STFSUX */
14413 5414,
14414 /* STFSX */
14415 5418,
14416 /* STFSXTLS */
14417 5421,
14418 /* STFSXTLS_ */
14419 5424,
14420 /* STH */
14421 5427,
14422 /* STH8 */
14423 5430,
14424 /* STHBRX */
14425 5433,
14426 /* STHCIX */
14427 5436,
14428 /* STHCX */
14429 5439,
14430 /* STHEPX */
14431 5442,
14432 /* STHU */
14433 5445,
14434 /* STHU8 */
14435 5449,
14436 /* STHUX */
14437 5453,
14438 /* STHUX8 */
14439 5457,
14440 /* STHX */
14441 5461,
14442 /* STHX8 */
14443 5464,
14444 /* STHXTLS */
14445 5467,
14446 /* STHXTLS_ */
14447 5470,
14448 /* STHXTLS_32 */
14449 5473,
14450 /* STMW */
14451 5476,
14452 /* STOP */
14453 5479,
14454 /* STQ */
14455 5479,
14456 /* STQCX */
14457 5482,
14458 /* STQX_PSEUDO */
14459 5485,
14460 /* STSWI */
14461 5488,
14462 /* STVEBX */
14463 5491,
14464 /* STVEHX */
14465 5494,
14466 /* STVEWX */
14467 5497,
14468 /* STVX */
14469 5500,
14470 /* STVXL */
14471 5503,
14472 /* STW */
14473 5506,
14474 /* STW8 */
14475 5509,
14476 /* STWAT */
14477 5512,
14478 /* STWBRX */
14479 5515,
14480 /* STWCIX */
14481 5518,
14482 /* STWCX */
14483 5521,
14484 /* STWEPX */
14485 5524,
14486 /* STWU */
14487 5527,
14488 /* STWU8 */
14489 5531,
14490 /* STWUX */
14491 5535,
14492 /* STWUX8 */
14493 5539,
14494 /* STWX */
14495 5543,
14496 /* STWX8 */
14497 5546,
14498 /* STWXTLS */
14499 5549,
14500 /* STWXTLS_ */
14501 5552,
14502 /* STWXTLS_32 */
14503 5555,
14504 /* STXSD */
14505 5558,
14506 /* STXSDX */
14507 5561,
14508 /* STXSIBX */
14509 5564,
14510 /* STXSIBXv */
14511 5567,
14512 /* STXSIHX */
14513 5570,
14514 /* STXSIHXv */
14515 5573,
14516 /* STXSIWX */
14517 5576,
14518 /* STXSSP */
14519 5579,
14520 /* STXSSPX */
14521 5582,
14522 /* STXV */
14523 5585,
14524 /* STXVB16X */
14525 5588,
14526 /* STXVD2X */
14527 5591,
14528 /* STXVH8X */
14529 5594,
14530 /* STXVL */
14531 5597,
14532 /* STXVLL */
14533 5600,
14534 /* STXVP */
14535 5603,
14536 /* STXVPRL */
14537 5606,
14538 /* STXVPRLL */
14539 5609,
14540 /* STXVPX */
14541 5612,
14542 /* STXVRBX */
14543 5615,
14544 /* STXVRDX */
14545 5618,
14546 /* STXVRHX */
14547 5621,
14548 /* STXVRL */
14549 5624,
14550 /* STXVRLL */
14551 5627,
14552 /* STXVRWX */
14553 5630,
14554 /* STXVW4X */
14555 5633,
14556 /* STXVX */
14557 5636,
14558 /* SUBF */
14559 5639,
14560 /* SUBF8 */
14561 5642,
14562 /* SUBF8O */
14563 5645,
14564 /* SUBF8O_rec */
14565 5648,
14566 /* SUBF8_rec */
14567 5651,
14568 /* SUBFC */
14569 5654,
14570 /* SUBFC8 */
14571 5657,
14572 /* SUBFC8O */
14573 5660,
14574 /* SUBFC8O_rec */
14575 5663,
14576 /* SUBFC8_rec */
14577 5666,
14578 /* SUBFCO */
14579 5669,
14580 /* SUBFCO_rec */
14581 5672,
14582 /* SUBFC_rec */
14583 5675,
14584 /* SUBFE */
14585 5678,
14586 /* SUBFE8 */
14587 5681,
14588 /* SUBFE8O */
14589 5684,
14590 /* SUBFE8O_rec */
14591 5687,
14592 /* SUBFE8_rec */
14593 5690,
14594 /* SUBFEO */
14595 5693,
14596 /* SUBFEO_rec */
14597 5696,
14598 /* SUBFE_rec */
14599 5699,
14600 /* SUBFIC */
14601 5702,
14602 /* SUBFIC8 */
14603 5705,
14604 /* SUBFME */
14605 5708,
14606 /* SUBFME8 */
14607 5710,
14608 /* SUBFME8O */
14609 5712,
14610 /* SUBFME8O_rec */
14611 5714,
14612 /* SUBFME8_rec */
14613 5716,
14614 /* SUBFMEO */
14615 5718,
14616 /* SUBFMEO_rec */
14617 5720,
14618 /* SUBFME_rec */
14619 5722,
14620 /* SUBFO */
14621 5724,
14622 /* SUBFO_rec */
14623 5727,
14624 /* SUBFUS */
14625 5730,
14626 /* SUBFUS_rec */
14627 5734,
14628 /* SUBFZE */
14629 5738,
14630 /* SUBFZE8 */
14631 5740,
14632 /* SUBFZE8O */
14633 5742,
14634 /* SUBFZE8O_rec */
14635 5744,
14636 /* SUBFZE8_rec */
14637 5746,
14638 /* SUBFZEO */
14639 5748,
14640 /* SUBFZEO_rec */
14641 5750,
14642 /* SUBFZE_rec */
14643 5752,
14644 /* SUBF_rec */
14645 5754,
14646 /* SYNC */
14647 5757,
14648 /* SYNCP10 */
14649 5758,
14650 /* TABORT */
14651 5760,
14652 /* TABORTDC */
14653 5761,
14654 /* TABORTDCI */
14655 5764,
14656 /* TABORTWC */
14657 5767,
14658 /* TABORTWCI */
14659 5770,
14660 /* TAILB */
14661 5773,
14662 /* TAILB8 */
14663 5774,
14664 /* TAILBA */
14665 5775,
14666 /* TAILBA8 */
14667 5776,
14668 /* TAILBCTR */
14669 5777,
14670 /* TAILBCTR8 */
14671 5777,
14672 /* TBEGIN */
14673 5777,
14674 /* TBEGIN_RET */
14675 5778,
14676 /* TCHECK */
14677 5780,
14678 /* TCHECK_RET */
14679 5781,
14680 /* TCRETURNai */
14681 5782,
14682 /* TCRETURNai8 */
14683 5784,
14684 /* TCRETURNdi */
14685 5786,
14686 /* TCRETURNdi8 */
14687 5788,
14688 /* TCRETURNri */
14689 5790,
14690 /* TCRETURNri8 */
14691 5792,
14692 /* TD */
14693 5794,
14694 /* TDI */
14695 5797,
14696 /* TEND */
14697 5800,
14698 /* TLBIA */
14699 5801,
14700 /* TLBIE */
14701 5801,
14702 /* TLBIEL */
14703 5803,
14704 /* TLBILX */
14705 5804,
14706 /* TLBIVAX */
14707 5807,
14708 /* TLBLD */
14709 5809,
14710 /* TLBLI */
14711 5810,
14712 /* TLBRE */
14713 5811,
14714 /* TLBRE2 */
14715 5811,
14716 /* TLBSX */
14717 5814,
14718 /* TLBSX2 */
14719 5816,
14720 /* TLBSX2D */
14721 5819,
14722 /* TLBSYNC */
14723 5822,
14724 /* TLBWE */
14725 5822,
14726 /* TLBWE2 */
14727 5822,
14728 /* TLSGDAIX */
14729 5825,
14730 /* TLSGDAIX8 */
14731 5828,
14732 /* TLSLDAIX */
14733 5831,
14734 /* TLSLDAIX8 */
14735 5833,
14736 /* TRAP */
14737 5835,
14738 /* TRECHKPT */
14739 5835,
14740 /* TRECLAIM */
14741 5835,
14742 /* TSR */
14743 5836,
14744 /* TW */
14745 5837,
14746 /* TWI */
14747 5840,
14748 /* UNENCODED_NOP */
14749 5843,
14750 /* UpdateGBR */
14751 5843,
14752 /* VABSDUB */
14753 5846,
14754 /* VABSDUH */
14755 5849,
14756 /* VABSDUW */
14757 5852,
14758 /* VADDCUQ */
14759 5855,
14760 /* VADDCUW */
14761 5858,
14762 /* VADDECUQ */
14763 5861,
14764 /* VADDEUQM */
14765 5865,
14766 /* VADDFP */
14767 5869,
14768 /* VADDSBS */
14769 5872,
14770 /* VADDSHS */
14771 5875,
14772 /* VADDSWS */
14773 5878,
14774 /* VADDUBM */
14775 5881,
14776 /* VADDUBS */
14777 5884,
14778 /* VADDUDM */
14779 5887,
14780 /* VADDUHM */
14781 5890,
14782 /* VADDUHS */
14783 5893,
14784 /* VADDUQM */
14785 5896,
14786 /* VADDUWM */
14787 5899,
14788 /* VADDUWS */
14789 5902,
14790 /* VAND */
14791 5905,
14792 /* VANDC */
14793 5908,
14794 /* VAVGSB */
14795 5911,
14796 /* VAVGSH */
14797 5914,
14798 /* VAVGSW */
14799 5917,
14800 /* VAVGUB */
14801 5920,
14802 /* VAVGUH */
14803 5923,
14804 /* VAVGUW */
14805 5926,
14806 /* VBPERMD */
14807 5929,
14808 /* VBPERMQ */
14809 5932,
14810 /* VCFSX */
14811 5935,
14812 /* VCFSX_0 */
14813 5938,
14814 /* VCFUGED */
14815 5940,
14816 /* VCFUX */
14817 5943,
14818 /* VCFUX_0 */
14819 5946,
14820 /* VCIPHER */
14821 5948,
14822 /* VCIPHERLAST */
14823 5951,
14824 /* VCLRLB */
14825 5954,
14826 /* VCLRRB */
14827 5957,
14828 /* VCLZB */
14829 5960,
14830 /* VCLZD */
14831 5962,
14832 /* VCLZDM */
14833 5964,
14834 /* VCLZH */
14835 5967,
14836 /* VCLZLSBB */
14837 5969,
14838 /* VCLZW */
14839 5971,
14840 /* VCMPBFP */
14841 5973,
14842 /* VCMPBFP_rec */
14843 5976,
14844 /* VCMPEQFP */
14845 5979,
14846 /* VCMPEQFP_rec */
14847 5982,
14848 /* VCMPEQUB */
14849 5985,
14850 /* VCMPEQUB_rec */
14851 5988,
14852 /* VCMPEQUD */
14853 5991,
14854 /* VCMPEQUD_rec */
14855 5994,
14856 /* VCMPEQUH */
14857 5997,
14858 /* VCMPEQUH_rec */
14859 6000,
14860 /* VCMPEQUQ */
14861 6003,
14862 /* VCMPEQUQ_rec */
14863 6006,
14864 /* VCMPEQUW */
14865 6009,
14866 /* VCMPEQUW_rec */
14867 6012,
14868 /* VCMPGEFP */
14869 6015,
14870 /* VCMPGEFP_rec */
14871 6018,
14872 /* VCMPGTFP */
14873 6021,
14874 /* VCMPGTFP_rec */
14875 6024,
14876 /* VCMPGTSB */
14877 6027,
14878 /* VCMPGTSB_rec */
14879 6030,
14880 /* VCMPGTSD */
14881 6033,
14882 /* VCMPGTSD_rec */
14883 6036,
14884 /* VCMPGTSH */
14885 6039,
14886 /* VCMPGTSH_rec */
14887 6042,
14888 /* VCMPGTSQ */
14889 6045,
14890 /* VCMPGTSQ_rec */
14891 6048,
14892 /* VCMPGTSW */
14893 6051,
14894 /* VCMPGTSW_rec */
14895 6054,
14896 /* VCMPGTUB */
14897 6057,
14898 /* VCMPGTUB_rec */
14899 6060,
14900 /* VCMPGTUD */
14901 6063,
14902 /* VCMPGTUD_rec */
14903 6066,
14904 /* VCMPGTUH */
14905 6069,
14906 /* VCMPGTUH_rec */
14907 6072,
14908 /* VCMPGTUQ */
14909 6075,
14910 /* VCMPGTUQ_rec */
14911 6078,
14912 /* VCMPGTUW */
14913 6081,
14914 /* VCMPGTUW_rec */
14915 6084,
14916 /* VCMPNEB */
14917 6087,
14918 /* VCMPNEB_rec */
14919 6090,
14920 /* VCMPNEH */
14921 6093,
14922 /* VCMPNEH_rec */
14923 6096,
14924 /* VCMPNEW */
14925 6099,
14926 /* VCMPNEW_rec */
14927 6102,
14928 /* VCMPNEZB */
14929 6105,
14930 /* VCMPNEZB_rec */
14931 6108,
14932 /* VCMPNEZH */
14933 6111,
14934 /* VCMPNEZH_rec */
14935 6114,
14936 /* VCMPNEZW */
14937 6117,
14938 /* VCMPNEZW_rec */
14939 6120,
14940 /* VCMPSQ */
14941 6123,
14942 /* VCMPUQ */
14943 6126,
14944 /* VCNTMBB */
14945 6129,
14946 /* VCNTMBD */
14947 6132,
14948 /* VCNTMBH */
14949 6135,
14950 /* VCNTMBW */
14951 6138,
14952 /* VCTSXS */
14953 6141,
14954 /* VCTSXS_0 */
14955 6144,
14956 /* VCTUXS */
14957 6146,
14958 /* VCTUXS_0 */
14959 6149,
14960 /* VCTZB */
14961 6151,
14962 /* VCTZD */
14963 6153,
14964 /* VCTZDM */
14965 6155,
14966 /* VCTZH */
14967 6158,
14968 /* VCTZLSBB */
14969 6160,
14970 /* VCTZW */
14971 6162,
14972 /* VDIVESD */
14973 6164,
14974 /* VDIVESQ */
14975 6167,
14976 /* VDIVESW */
14977 6170,
14978 /* VDIVEUD */
14979 6173,
14980 /* VDIVEUQ */
14981 6176,
14982 /* VDIVEUW */
14983 6179,
14984 /* VDIVSD */
14985 6182,
14986 /* VDIVSQ */
14987 6185,
14988 /* VDIVSW */
14989 6188,
14990 /* VDIVUD */
14991 6191,
14992 /* VDIVUQ */
14993 6194,
14994 /* VDIVUW */
14995 6197,
14996 /* VEQV */
14997 6200,
14998 /* VEXPANDBM */
14999 6203,
15000 /* VEXPANDDM */
15001 6205,
15002 /* VEXPANDHM */
15003 6207,
15004 /* VEXPANDQM */
15005 6209,
15006 /* VEXPANDWM */
15007 6211,
15008 /* VEXPTEFP */
15009 6213,
15010 /* VEXTDDVLX */
15011 6215,
15012 /* VEXTDDVRX */
15013 6219,
15014 /* VEXTDUBVLX */
15015 6223,
15016 /* VEXTDUBVRX */
15017 6227,
15018 /* VEXTDUHVLX */
15019 6231,
15020 /* VEXTDUHVRX */
15021 6235,
15022 /* VEXTDUWVLX */
15023 6239,
15024 /* VEXTDUWVRX */
15025 6243,
15026 /* VEXTRACTBM */
15027 6247,
15028 /* VEXTRACTD */
15029 6249,
15030 /* VEXTRACTDM */
15031 6252,
15032 /* VEXTRACTHM */
15033 6254,
15034 /* VEXTRACTQM */
15035 6256,
15036 /* VEXTRACTUB */
15037 6258,
15038 /* VEXTRACTUH */
15039 6261,
15040 /* VEXTRACTUW */
15041 6264,
15042 /* VEXTRACTWM */
15043 6267,
15044 /* VEXTSB2D */
15045 6269,
15046 /* VEXTSB2Ds */
15047 6271,
15048 /* VEXTSB2W */
15049 6273,
15050 /* VEXTSB2Ws */
15051 6275,
15052 /* VEXTSD2Q */
15053 6277,
15054 /* VEXTSH2D */
15055 6279,
15056 /* VEXTSH2Ds */
15057 6281,
15058 /* VEXTSH2W */
15059 6283,
15060 /* VEXTSH2Ws */
15061 6285,
15062 /* VEXTSW2D */
15063 6287,
15064 /* VEXTSW2Ds */
15065 6289,
15066 /* VEXTUBLX */
15067 6291,
15068 /* VEXTUBRX */
15069 6294,
15070 /* VEXTUHLX */
15071 6297,
15072 /* VEXTUHRX */
15073 6300,
15074 /* VEXTUWLX */
15075 6303,
15076 /* VEXTUWRX */
15077 6306,
15078 /* VGBBD */
15079 6309,
15080 /* VGNB */
15081 6311,
15082 /* VINSBLX */
15083 6314,
15084 /* VINSBRX */
15085 6318,
15086 /* VINSBVLX */
15087 6322,
15088 /* VINSBVRX */
15089 6326,
15090 /* VINSD */
15091 6330,
15092 /* VINSDLX */
15093 6334,
15094 /* VINSDRX */
15095 6338,
15096 /* VINSERTB */
15097 6342,
15098 /* VINSERTD */
15099 6346,
15100 /* VINSERTH */
15101 6349,
15102 /* VINSERTW */
15103 6353,
15104 /* VINSHLX */
15105 6356,
15106 /* VINSHRX */
15107 6360,
15108 /* VINSHVLX */
15109 6364,
15110 /* VINSHVRX */
15111 6368,
15112 /* VINSW */
15113 6372,
15114 /* VINSWLX */
15115 6376,
15116 /* VINSWRX */
15117 6380,
15118 /* VINSWVLX */
15119 6384,
15120 /* VINSWVRX */
15121 6388,
15122 /* VLOGEFP */
15123 6392,
15124 /* VMADDFP */
15125 6394,
15126 /* VMAXFP */
15127 6398,
15128 /* VMAXSB */
15129 6401,
15130 /* VMAXSD */
15131 6404,
15132 /* VMAXSH */
15133 6407,
15134 /* VMAXSW */
15135 6410,
15136 /* VMAXUB */
15137 6413,
15138 /* VMAXUD */
15139 6416,
15140 /* VMAXUH */
15141 6419,
15142 /* VMAXUW */
15143 6422,
15144 /* VMHADDSHS */
15145 6425,
15146 /* VMHRADDSHS */
15147 6429,
15148 /* VMINFP */
15149 6433,
15150 /* VMINSB */
15151 6436,
15152 /* VMINSD */
15153 6439,
15154 /* VMINSH */
15155 6442,
15156 /* VMINSW */
15157 6445,
15158 /* VMINUB */
15159 6448,
15160 /* VMINUD */
15161 6451,
15162 /* VMINUH */
15163 6454,
15164 /* VMINUW */
15165 6457,
15166 /* VMLADDUHM */
15167 6460,
15168 /* VMODSD */
15169 6464,
15170 /* VMODSQ */
15171 6467,
15172 /* VMODSW */
15173 6470,
15174 /* VMODUD */
15175 6473,
15176 /* VMODUQ */
15177 6476,
15178 /* VMODUW */
15179 6479,
15180 /* VMRGEW */
15181 6482,
15182 /* VMRGHB */
15183 6485,
15184 /* VMRGHH */
15185 6488,
15186 /* VMRGHW */
15187 6491,
15188 /* VMRGLB */
15189 6494,
15190 /* VMRGLH */
15191 6497,
15192 /* VMRGLW */
15193 6500,
15194 /* VMRGOW */
15195 6503,
15196 /* VMSUMCUD */
15197 6506,
15198 /* VMSUMMBM */
15199 6510,
15200 /* VMSUMSHM */
15201 6514,
15202 /* VMSUMSHS */
15203 6518,
15204 /* VMSUMUBM */
15205 6522,
15206 /* VMSUMUDM */
15207 6526,
15208 /* VMSUMUHM */
15209 6530,
15210 /* VMSUMUHS */
15211 6534,
15212 /* VMUL10CUQ */
15213 6538,
15214 /* VMUL10ECUQ */
15215 6540,
15216 /* VMUL10EUQ */
15217 6543,
15218 /* VMUL10UQ */
15219 6546,
15220 /* VMULESB */
15221 6548,
15222 /* VMULESD */
15223 6551,
15224 /* VMULESH */
15225 6554,
15226 /* VMULESW */
15227 6557,
15228 /* VMULEUB */
15229 6560,
15230 /* VMULEUD */
15231 6563,
15232 /* VMULEUH */
15233 6566,
15234 /* VMULEUW */
15235 6569,
15236 /* VMULHSD */
15237 6572,
15238 /* VMULHSW */
15239 6575,
15240 /* VMULHUD */
15241 6578,
15242 /* VMULHUW */
15243 6581,
15244 /* VMULLD */
15245 6584,
15246 /* VMULOSB */
15247 6587,
15248 /* VMULOSD */
15249 6590,
15250 /* VMULOSH */
15251 6593,
15252 /* VMULOSW */
15253 6596,
15254 /* VMULOUB */
15255 6599,
15256 /* VMULOUD */
15257 6602,
15258 /* VMULOUH */
15259 6605,
15260 /* VMULOUW */
15261 6608,
15262 /* VMULUWM */
15263 6611,
15264 /* VNAND */
15265 6614,
15266 /* VNCIPHER */
15267 6617,
15268 /* VNCIPHERLAST */
15269 6620,
15270 /* VNEGD */
15271 6623,
15272 /* VNEGW */
15273 6625,
15274 /* VNMSUBFP */
15275 6627,
15276 /* VNOR */
15277 6631,
15278 /* VOR */
15279 6634,
15280 /* VORC */
15281 6637,
15282 /* VPDEPD */
15283 6640,
15284 /* VPERM */
15285 6643,
15286 /* VPERMR */
15287 6647,
15288 /* VPERMXOR */
15289 6651,
15290 /* VPEXTD */
15291 6655,
15292 /* VPKPX */
15293 6658,
15294 /* VPKSDSS */
15295 6661,
15296 /* VPKSDUS */
15297 6664,
15298 /* VPKSHSS */
15299 6667,
15300 /* VPKSHUS */
15301 6670,
15302 /* VPKSWSS */
15303 6673,
15304 /* VPKSWUS */
15305 6676,
15306 /* VPKUDUM */
15307 6679,
15308 /* VPKUDUS */
15309 6682,
15310 /* VPKUHUM */
15311 6685,
15312 /* VPKUHUS */
15313 6688,
15314 /* VPKUWUM */
15315 6691,
15316 /* VPKUWUS */
15317 6694,
15318 /* VPMSUMB */
15319 6697,
15320 /* VPMSUMD */
15321 6700,
15322 /* VPMSUMH */
15323 6703,
15324 /* VPMSUMW */
15325 6706,
15326 /* VPOPCNTB */
15327 6709,
15328 /* VPOPCNTD */
15329 6711,
15330 /* VPOPCNTH */
15331 6713,
15332 /* VPOPCNTW */
15333 6715,
15334 /* VPRTYBD */
15335 6717,
15336 /* VPRTYBQ */
15337 6719,
15338 /* VPRTYBW */
15339 6721,
15340 /* VREFP */
15341 6723,
15342 /* VRFIM */
15343 6725,
15344 /* VRFIN */
15345 6727,
15346 /* VRFIP */
15347 6729,
15348 /* VRFIZ */
15349 6731,
15350 /* VRLB */
15351 6733,
15352 /* VRLD */
15353 6736,
15354 /* VRLDMI */
15355 6739,
15356 /* VRLDNM */
15357 6743,
15358 /* VRLH */
15359 6746,
15360 /* VRLQ */
15361 6749,
15362 /* VRLQMI */
15363 6752,
15364 /* VRLQNM */
15365 6756,
15366 /* VRLW */
15367 6759,
15368 /* VRLWMI */
15369 6762,
15370 /* VRLWNM */
15371 6766,
15372 /* VRSQRTEFP */
15373 6769,
15374 /* VSBOX */
15375 6771,
15376 /* VSEL */
15377 6773,
15378 /* VSHASIGMAD */
15379 6777,
15380 /* VSHASIGMAW */
15381 6781,
15382 /* VSL */
15383 6785,
15384 /* VSLB */
15385 6788,
15386 /* VSLD */
15387 6791,
15388 /* VSLDBI */
15389 6794,
15390 /* VSLDOI */
15391 6798,
15392 /* VSLH */
15393 6802,
15394 /* VSLO */
15395 6805,
15396 /* VSLQ */
15397 6808,
15398 /* VSLV */
15399 6811,
15400 /* VSLW */
15401 6814,
15402 /* VSPLTB */
15403 6817,
15404 /* VSPLTBs */
15405 6820,
15406 /* VSPLTH */
15407 6823,
15408 /* VSPLTHs */
15409 6826,
15410 /* VSPLTISB */
15411 6829,
15412 /* VSPLTISH */
15413 6831,
15414 /* VSPLTISW */
15415 6833,
15416 /* VSPLTW */
15417 6835,
15418 /* VSR */
15419 6838,
15420 /* VSRAB */
15421 6841,
15422 /* VSRAD */
15423 6844,
15424 /* VSRAH */
15425 6847,
15426 /* VSRAQ */
15427 6850,
15428 /* VSRAW */
15429 6853,
15430 /* VSRB */
15431 6856,
15432 /* VSRD */
15433 6859,
15434 /* VSRDBI */
15435 6862,
15436 /* VSRH */
15437 6866,
15438 /* VSRO */
15439 6869,
15440 /* VSRQ */
15441 6872,
15442 /* VSRV */
15443 6875,
15444 /* VSRW */
15445 6878,
15446 /* VSTRIBL */
15447 6881,
15448 /* VSTRIBL_rec */
15449 6883,
15450 /* VSTRIBR */
15451 6885,
15452 /* VSTRIBR_rec */
15453 6887,
15454 /* VSTRIHL */
15455 6889,
15456 /* VSTRIHL_rec */
15457 6891,
15458 /* VSTRIHR */
15459 6893,
15460 /* VSTRIHR_rec */
15461 6895,
15462 /* VSUBCUQ */
15463 6897,
15464 /* VSUBCUW */
15465 6900,
15466 /* VSUBECUQ */
15467 6903,
15468 /* VSUBEUQM */
15469 6907,
15470 /* VSUBFP */
15471 6911,
15472 /* VSUBSBS */
15473 6914,
15474 /* VSUBSHS */
15475 6917,
15476 /* VSUBSWS */
15477 6920,
15478 /* VSUBUBM */
15479 6923,
15480 /* VSUBUBS */
15481 6926,
15482 /* VSUBUDM */
15483 6929,
15484 /* VSUBUHM */
15485 6932,
15486 /* VSUBUHS */
15487 6935,
15488 /* VSUBUQM */
15489 6938,
15490 /* VSUBUWM */
15491 6941,
15492 /* VSUBUWS */
15493 6944,
15494 /* VSUM2SWS */
15495 6947,
15496 /* VSUM4SBS */
15497 6950,
15498 /* VSUM4SHS */
15499 6953,
15500 /* VSUM4UBS */
15501 6956,
15502 /* VSUMSWS */
15503 6959,
15504 /* VUPKHPX */
15505 6962,
15506 /* VUPKHSB */
15507 6964,
15508 /* VUPKHSH */
15509 6966,
15510 /* VUPKHSW */
15511 6968,
15512 /* VUPKLPX */
15513 6970,
15514 /* VUPKLSB */
15515 6972,
15516 /* VUPKLSH */
15517 6974,
15518 /* VUPKLSW */
15519 6976,
15520 /* VXOR */
15521 6978,
15522 /* V_SET0 */
15523 6981,
15524 /* V_SET0B */
15525 6982,
15526 /* V_SET0H */
15527 6983,
15528 /* V_SETALLONES */
15529 6984,
15530 /* V_SETALLONESB */
15531 6985,
15532 /* V_SETALLONESH */
15533 6986,
15534 /* WAIT */
15535 6987,
15536 /* WAITP10 */
15537 6988,
15538 /* WRTEE */
15539 6990,
15540 /* WRTEEI */
15541 6991,
15542 /* XOR */
15543 6992,
15544 /* XOR8 */
15545 6995,
15546 /* XOR8_rec */
15547 6998,
15548 /* XORI */
15549 7001,
15550 /* XORI8 */
15551 7004,
15552 /* XORIS */
15553 7007,
15554 /* XORIS8 */
15555 7010,
15556 /* XOR_rec */
15557 7013,
15558 /* XSABSDP */
15559 7016,
15560 /* XSABSQP */
15561 7018,
15562 /* XSADDDP */
15563 7020,
15564 /* XSADDQP */
15565 7023,
15566 /* XSADDQPO */
15567 7026,
15568 /* XSADDSP */
15569 7029,
15570 /* XSCMPEQDP */
15571 7032,
15572 /* XSCMPEQQP */
15573 7035,
15574 /* XSCMPEXPDP */
15575 7038,
15576 /* XSCMPEXPQP */
15577 7041,
15578 /* XSCMPGEDP */
15579 7044,
15580 /* XSCMPGEQP */
15581 7047,
15582 /* XSCMPGTDP */
15583 7050,
15584 /* XSCMPGTQP */
15585 7053,
15586 /* XSCMPODP */
15587 7056,
15588 /* XSCMPOQP */
15589 7059,
15590 /* XSCMPUDP */
15591 7062,
15592 /* XSCMPUQP */
15593 7065,
15594 /* XSCPSGNDP */
15595 7068,
15596 /* XSCPSGNQP */
15597 7071,
15598 /* XSCVDPHP */
15599 7074,
15600 /* XSCVDPQP */
15601 7076,
15602 /* XSCVDPSP */
15603 7078,
15604 /* XSCVDPSPN */
15605 7080,
15606 /* XSCVDPSXDS */
15607 7082,
15608 /* XSCVDPSXDSs */
15609 7084,
15610 /* XSCVDPSXWS */
15611 7086,
15612 /* XSCVDPSXWSs */
15613 7088,
15614 /* XSCVDPUXDS */
15615 7090,
15616 /* XSCVDPUXDSs */
15617 7092,
15618 /* XSCVDPUXWS */
15619 7094,
15620 /* XSCVDPUXWSs */
15621 7096,
15622 /* XSCVHPDP */
15623 7098,
15624 /* XSCVQPDP */
15625 7100,
15626 /* XSCVQPDPO */
15627 7102,
15628 /* XSCVQPSDZ */
15629 7104,
15630 /* XSCVQPSQZ */
15631 7106,
15632 /* XSCVQPSWZ */
15633 7108,
15634 /* XSCVQPUDZ */
15635 7110,
15636 /* XSCVQPUQZ */
15637 7112,
15638 /* XSCVQPUWZ */
15639 7114,
15640 /* XSCVSDQP */
15641 7116,
15642 /* XSCVSPDP */
15643 7118,
15644 /* XSCVSPDPN */
15645 7120,
15646 /* XSCVSQQP */
15647 7122,
15648 /* XSCVSXDDP */
15649 7124,
15650 /* XSCVSXDSP */
15651 7126,
15652 /* XSCVUDQP */
15653 7128,
15654 /* XSCVUQQP */
15655 7130,
15656 /* XSCVUXDDP */
15657 7132,
15658 /* XSCVUXDSP */
15659 7134,
15660 /* XSDIVDP */
15661 7136,
15662 /* XSDIVQP */
15663 7139,
15664 /* XSDIVQPO */
15665 7142,
15666 /* XSDIVSP */
15667 7145,
15668 /* XSIEXPDP */
15669 7148,
15670 /* XSIEXPQP */
15671 7151,
15672 /* XSMADDADP */
15673 7154,
15674 /* XSMADDASP */
15675 7158,
15676 /* XSMADDMDP */
15677 7162,
15678 /* XSMADDMSP */
15679 7166,
15680 /* XSMADDQP */
15681 7170,
15682 /* XSMADDQPO */
15683 7174,
15684 /* XSMAXCDP */
15685 7178,
15686 /* XSMAXCQP */
15687 7181,
15688 /* XSMAXDP */
15689 7184,
15690 /* XSMAXJDP */
15691 7187,
15692 /* XSMINCDP */
15693 7190,
15694 /* XSMINCQP */
15695 7193,
15696 /* XSMINDP */
15697 7196,
15698 /* XSMINJDP */
15699 7199,
15700 /* XSMSUBADP */
15701 7202,
15702 /* XSMSUBASP */
15703 7206,
15704 /* XSMSUBMDP */
15705 7210,
15706 /* XSMSUBMSP */
15707 7214,
15708 /* XSMSUBQP */
15709 7218,
15710 /* XSMSUBQPO */
15711 7222,
15712 /* XSMULDP */
15713 7226,
15714 /* XSMULQP */
15715 7229,
15716 /* XSMULQPO */
15717 7232,
15718 /* XSMULSP */
15719 7235,
15720 /* XSNABSDP */
15721 7238,
15722 /* XSNABSDPs */
15723 7240,
15724 /* XSNABSQP */
15725 7242,
15726 /* XSNEGDP */
15727 7244,
15728 /* XSNEGQP */
15729 7246,
15730 /* XSNMADDADP */
15731 7248,
15732 /* XSNMADDASP */
15733 7252,
15734 /* XSNMADDMDP */
15735 7256,
15736 /* XSNMADDMSP */
15737 7260,
15738 /* XSNMADDQP */
15739 7264,
15740 /* XSNMADDQPO */
15741 7268,
15742 /* XSNMSUBADP */
15743 7272,
15744 /* XSNMSUBASP */
15745 7276,
15746 /* XSNMSUBMDP */
15747 7280,
15748 /* XSNMSUBMSP */
15749 7284,
15750 /* XSNMSUBQP */
15751 7288,
15752 /* XSNMSUBQPO */
15753 7292,
15754 /* XSRDPI */
15755 7296,
15756 /* XSRDPIC */
15757 7298,
15758 /* XSRDPIM */
15759 7300,
15760 /* XSRDPIP */
15761 7302,
15762 /* XSRDPIZ */
15763 7304,
15764 /* XSREDP */
15765 7306,
15766 /* XSRESP */
15767 7308,
15768 /* XSRQPI */
15769 7310,
15770 /* XSRQPIX */
15771 7314,
15772 /* XSRQPXP */
15773 7318,
15774 /* XSRSP */
15775 7322,
15776 /* XSRSQRTEDP */
15777 7324,
15778 /* XSRSQRTESP */
15779 7326,
15780 /* XSSQRTDP */
15781 7328,
15782 /* XSSQRTQP */
15783 7330,
15784 /* XSSQRTQPO */
15785 7332,
15786 /* XSSQRTSP */
15787 7334,
15788 /* XSSUBDP */
15789 7336,
15790 /* XSSUBQP */
15791 7339,
15792 /* XSSUBQPO */
15793 7342,
15794 /* XSSUBSP */
15795 7345,
15796 /* XSTDIVDP */
15797 7348,
15798 /* XSTSQRTDP */
15799 7351,
15800 /* XSTSTDCDP */
15801 7353,
15802 /* XSTSTDCQP */
15803 7356,
15804 /* XSTSTDCSP */
15805 7359,
15806 /* XSXEXPDP */
15807 7362,
15808 /* XSXEXPQP */
15809 7364,
15810 /* XSXSIGDP */
15811 7366,
15812 /* XSXSIGQP */
15813 7368,
15814 /* XVABSDP */
15815 7370,
15816 /* XVABSSP */
15817 7372,
15818 /* XVADDDP */
15819 7374,
15820 /* XVADDSP */
15821 7377,
15822 /* XVBF16GER2 */
15823 7380,
15824 /* XVBF16GER2NN */
15825 7383,
15826 /* XVBF16GER2NP */
15827 7387,
15828 /* XVBF16GER2PN */
15829 7391,
15830 /* XVBF16GER2PP */
15831 7395,
15832 /* XVBF16GER2W */
15833 7399,
15834 /* XVBF16GER2WNN */
15835 7402,
15836 /* XVBF16GER2WNP */
15837 7406,
15838 /* XVBF16GER2WPN */
15839 7410,
15840 /* XVBF16GER2WPP */
15841 7414,
15842 /* XVCMPEQDP */
15843 7418,
15844 /* XVCMPEQDP_rec */
15845 7421,
15846 /* XVCMPEQSP */
15847 7424,
15848 /* XVCMPEQSP_rec */
15849 7427,
15850 /* XVCMPGEDP */
15851 7430,
15852 /* XVCMPGEDP_rec */
15853 7433,
15854 /* XVCMPGESP */
15855 7436,
15856 /* XVCMPGESP_rec */
15857 7439,
15858 /* XVCMPGTDP */
15859 7442,
15860 /* XVCMPGTDP_rec */
15861 7445,
15862 /* XVCMPGTSP */
15863 7448,
15864 /* XVCMPGTSP_rec */
15865 7451,
15866 /* XVCPSGNDP */
15867 7454,
15868 /* XVCPSGNSP */
15869 7457,
15870 /* XVCVBF16SPN */
15871 7460,
15872 /* XVCVDPSP */
15873 7462,
15874 /* XVCVDPSXDS */
15875 7464,
15876 /* XVCVDPSXWS */
15877 7466,
15878 /* XVCVDPUXDS */
15879 7468,
15880 /* XVCVDPUXWS */
15881 7470,
15882 /* XVCVHPSP */
15883 7472,
15884 /* XVCVSPBF16 */
15885 7474,
15886 /* XVCVSPDP */
15887 7476,
15888 /* XVCVSPHP */
15889 7478,
15890 /* XVCVSPSXDS */
15891 7480,
15892 /* XVCVSPSXWS */
15893 7482,
15894 /* XVCVSPUXDS */
15895 7484,
15896 /* XVCVSPUXWS */
15897 7486,
15898 /* XVCVSXDDP */
15899 7488,
15900 /* XVCVSXDSP */
15901 7490,
15902 /* XVCVSXWDP */
15903 7492,
15904 /* XVCVSXWSP */
15905 7494,
15906 /* XVCVUXDDP */
15907 7496,
15908 /* XVCVUXDSP */
15909 7498,
15910 /* XVCVUXWDP */
15911 7500,
15912 /* XVCVUXWSP */
15913 7502,
15914 /* XVDIVDP */
15915 7504,
15916 /* XVDIVSP */
15917 7507,
15918 /* XVF16GER2 */
15919 7510,
15920 /* XVF16GER2NN */
15921 7513,
15922 /* XVF16GER2NP */
15923 7517,
15924 /* XVF16GER2PN */
15925 7521,
15926 /* XVF16GER2PP */
15927 7525,
15928 /* XVF16GER2W */
15929 7529,
15930 /* XVF16GER2WNN */
15931 7532,
15932 /* XVF16GER2WNP */
15933 7536,
15934 /* XVF16GER2WPN */
15935 7540,
15936 /* XVF16GER2WPP */
15937 7544,
15938 /* XVF32GER */
15939 7548,
15940 /* XVF32GERNN */
15941 7551,
15942 /* XVF32GERNP */
15943 7555,
15944 /* XVF32GERPN */
15945 7559,
15946 /* XVF32GERPP */
15947 7563,
15948 /* XVF32GERW */
15949 7567,
15950 /* XVF32GERWNN */
15951 7570,
15952 /* XVF32GERWNP */
15953 7574,
15954 /* XVF32GERWPN */
15955 7578,
15956 /* XVF32GERWPP */
15957 7582,
15958 /* XVF64GER */
15959 7586,
15960 /* XVF64GERNN */
15961 7589,
15962 /* XVF64GERNP */
15963 7593,
15964 /* XVF64GERPN */
15965 7597,
15966 /* XVF64GERPP */
15967 7601,
15968 /* XVF64GERW */
15969 7605,
15970 /* XVF64GERWNN */
15971 7608,
15972 /* XVF64GERWNP */
15973 7612,
15974 /* XVF64GERWPN */
15975 7616,
15976 /* XVF64GERWPP */
15977 7620,
15978 /* XVI16GER2 */
15979 7624,
15980 /* XVI16GER2PP */
15981 7627,
15982 /* XVI16GER2S */
15983 7631,
15984 /* XVI16GER2SPP */
15985 7634,
15986 /* XVI16GER2SW */
15987 7638,
15988 /* XVI16GER2SWPP */
15989 7641,
15990 /* XVI16GER2W */
15991 7645,
15992 /* XVI16GER2WPP */
15993 7648,
15994 /* XVI4GER8 */
15995 7652,
15996 /* XVI4GER8PP */
15997 7655,
15998 /* XVI4GER8W */
15999 7659,
16000 /* XVI4GER8WPP */
16001 7662,
16002 /* XVI8GER4 */
16003 7666,
16004 /* XVI8GER4PP */
16005 7669,
16006 /* XVI8GER4SPP */
16007 7673,
16008 /* XVI8GER4W */
16009 7677,
16010 /* XVI8GER4WPP */
16011 7680,
16012 /* XVI8GER4WSPP */
16013 7684,
16014 /* XVIEXPDP */
16015 7688,
16016 /* XVIEXPSP */
16017 7691,
16018 /* XVMADDADP */
16019 7694,
16020 /* XVMADDASP */
16021 7698,
16022 /* XVMADDMDP */
16023 7702,
16024 /* XVMADDMSP */
16025 7706,
16026 /* XVMAXDP */
16027 7710,
16028 /* XVMAXSP */
16029 7713,
16030 /* XVMINDP */
16031 7716,
16032 /* XVMINSP */
16033 7719,
16034 /* XVMSUBADP */
16035 7722,
16036 /* XVMSUBASP */
16037 7726,
16038 /* XVMSUBMDP */
16039 7730,
16040 /* XVMSUBMSP */
16041 7734,
16042 /* XVMULDP */
16043 7738,
16044 /* XVMULSP */
16045 7741,
16046 /* XVNABSDP */
16047 7744,
16048 /* XVNABSSP */
16049 7746,
16050 /* XVNEGDP */
16051 7748,
16052 /* XVNEGSP */
16053 7750,
16054 /* XVNMADDADP */
16055 7752,
16056 /* XVNMADDASP */
16057 7756,
16058 /* XVNMADDMDP */
16059 7760,
16060 /* XVNMADDMSP */
16061 7764,
16062 /* XVNMSUBADP */
16063 7768,
16064 /* XVNMSUBASP */
16065 7772,
16066 /* XVNMSUBMDP */
16067 7776,
16068 /* XVNMSUBMSP */
16069 7780,
16070 /* XVRDPI */
16071 7784,
16072 /* XVRDPIC */
16073 7786,
16074 /* XVRDPIM */
16075 7788,
16076 /* XVRDPIP */
16077 7790,
16078 /* XVRDPIZ */
16079 7792,
16080 /* XVREDP */
16081 7794,
16082 /* XVRESP */
16083 7796,
16084 /* XVRSPI */
16085 7798,
16086 /* XVRSPIC */
16087 7800,
16088 /* XVRSPIM */
16089 7802,
16090 /* XVRSPIP */
16091 7804,
16092 /* XVRSPIZ */
16093 7806,
16094 /* XVRSQRTEDP */
16095 7808,
16096 /* XVRSQRTESP */
16097 7810,
16098 /* XVSQRTDP */
16099 7812,
16100 /* XVSQRTSP */
16101 7814,
16102 /* XVSUBDP */
16103 7816,
16104 /* XVSUBSP */
16105 7819,
16106 /* XVTDIVDP */
16107 7822,
16108 /* XVTDIVSP */
16109 7825,
16110 /* XVTLSBB */
16111 7828,
16112 /* XVTSQRTDP */
16113 7830,
16114 /* XVTSQRTSP */
16115 7832,
16116 /* XVTSTDCDP */
16117 7834,
16118 /* XVTSTDCSP */
16119 7837,
16120 /* XVXEXPDP */
16121 7840,
16122 /* XVXEXPSP */
16123 7842,
16124 /* XVXSIGDP */
16125 7844,
16126 /* XVXSIGSP */
16127 7846,
16128 /* XXBLENDVB */
16129 7848,
16130 /* XXBLENDVD */
16131 7852,
16132 /* XXBLENDVH */
16133 7856,
16134 /* XXBLENDVW */
16135 7860,
16136 /* XXBRD */
16137 7864,
16138 /* XXBRH */
16139 7866,
16140 /* XXBRQ */
16141 7868,
16142 /* XXBRW */
16143 7870,
16144 /* XXEVAL */
16145 7872,
16146 /* XXEXTRACTUW */
16147 7877,
16148 /* XXGENPCVBM */
16149 7880,
16150 /* XXGENPCVDM */
16151 7883,
16152 /* XXGENPCVHM */
16153 7886,
16154 /* XXGENPCVWM */
16155 7889,
16156 /* XXINSERTW */
16157 7892,
16158 /* XXLAND */
16159 7896,
16160 /* XXLANDC */
16161 7899,
16162 /* XXLEQV */
16163 7902,
16164 /* XXLEQVOnes */
16165 7905,
16166 /* XXLNAND */
16167 7906,
16168 /* XXLNOR */
16169 7909,
16170 /* XXLOR */
16171 7912,
16172 /* XXLORC */
16173 7915,
16174 /* XXLORf */
16175 7918,
16176 /* XXLXOR */
16177 7921,
16178 /* XXLXORdpz */
16179 7924,
16180 /* XXLXORspz */
16181 7925,
16182 /* XXLXORz */
16183 7926,
16184 /* XXMFACC */
16185 7927,
16186 /* XXMFACCW */
16187 7929,
16188 /* XXMRGHW */
16189 7931,
16190 /* XXMRGLW */
16191 7934,
16192 /* XXMTACC */
16193 7937,
16194 /* XXMTACCW */
16195 7939,
16196 /* XXPERM */
16197 7941,
16198 /* XXPERMDI */
16199 7945,
16200 /* XXPERMDIs */
16201 7949,
16202 /* XXPERMR */
16203 7952,
16204 /* XXPERMX */
16205 7956,
16206 /* XXSEL */
16207 7961,
16208 /* XXSETACCZ */
16209 7965,
16210 /* XXSETACCZW */
16211 7966,
16212 /* XXSLDWI */
16213 7967,
16214 /* XXSLDWIs */
16215 7971,
16216 /* XXSPLTI32DX */
16217 7974,
16218 /* XXSPLTIB */
16219 7978,
16220 /* XXSPLTIDP */
16221 7980,
16222 /* XXSPLTIW */
16223 7982,
16224 /* XXSPLTW */
16225 7984,
16226 /* XXSPLTWs */
16227 7987,
16228 /* gBC */
16229 7990,
16230 /* gBCA */
16231 7993,
16232 /* gBCAat */
16233 7996,
16234 /* gBCCTR */
16235 8000,
16236 /* gBCCTRL */
16237 8003,
16238 /* gBCL */
16239 8006,
16240 /* gBCLA */
16241 8009,
16242 /* gBCLAat */
16243 8012,
16244 /* gBCLR */
16245 8016,
16246 /* gBCLRL */
16247 8019,
16248 /* gBCLat */
16249 8022,
16250 /* gBCat */
16251 8026,
16252 };
16253
16254 using namespace OpTypes;
16255 static const int16_t OpcodeOperandTypes[] = {
16256
16257 /* PHI */
16258 -1,
16259 /* INLINEASM */
16260 /* INLINEASM_BR */
16261 /* CFI_INSTRUCTION */
16262 i32imm,
16263 /* EH_LABEL */
16264 i32imm,
16265 /* GC_LABEL */
16266 i32imm,
16267 /* ANNOTATION_LABEL */
16268 i32imm,
16269 /* KILL */
16270 /* EXTRACT_SUBREG */
16271 -1, -1, i32imm,
16272 /* INSERT_SUBREG */
16273 -1, -1, -1, i32imm,
16274 /* IMPLICIT_DEF */
16275 -1,
16276 /* SUBREG_TO_REG */
16277 -1, -1, -1, i32imm,
16278 /* COPY_TO_REGCLASS */
16279 -1, -1, i32imm,
16280 /* DBG_VALUE */
16281 /* DBG_VALUE_LIST */
16282 /* DBG_INSTR_REF */
16283 /* DBG_PHI */
16284 /* DBG_LABEL */
16285 -1,
16286 /* REG_SEQUENCE */
16287 -1, -1,
16288 /* COPY */
16289 -1, -1,
16290 /* BUNDLE */
16291 /* LIFETIME_START */
16292 i32imm,
16293 /* LIFETIME_END */
16294 i32imm,
16295 /* PSEUDO_PROBE */
16296 i64imm, i64imm, i8imm, i32imm,
16297 /* ARITH_FENCE */
16298 -1, -1,
16299 /* STACKMAP */
16300 i64imm, i32imm,
16301 /* FENTRY_CALL */
16302 /* PATCHPOINT */
16303 -1, i64imm, i32imm, -1, i32imm, i32imm,
16304 /* LOAD_STACK_GUARD */
16305 -1,
16306 /* PREALLOCATED_SETUP */
16307 i32imm,
16308 /* PREALLOCATED_ARG */
16309 -1, i32imm, i32imm,
16310 /* STATEPOINT */
16311 /* LOCAL_ESCAPE */
16312 -1, i32imm,
16313 /* FAULTING_OP */
16314 -1,
16315 /* PATCHABLE_OP */
16316 /* PATCHABLE_FUNCTION_ENTER */
16317 /* PATCHABLE_RET */
16318 /* PATCHABLE_FUNCTION_EXIT */
16319 /* PATCHABLE_TAIL_CALL */
16320 /* PATCHABLE_EVENT_CALL */
16321 -1, -1,
16322 /* PATCHABLE_TYPED_EVENT_CALL */
16323 -1, -1, -1,
16324 /* ICALL_BRANCH_FUNNEL */
16325 /* MEMBARRIER */
16326 /* JUMP_TABLE_DEBUG_INFO */
16327 i64imm,
16328 /* CONVERGENCECTRL_ENTRY */
16329 -1,
16330 /* CONVERGENCECTRL_ANCHOR */
16331 -1,
16332 /* CONVERGENCECTRL_LOOP */
16333 -1, -1,
16334 /* CONVERGENCECTRL_GLUE */
16335 -1,
16336 /* G_ASSERT_SEXT */
16337 type0, type0, untyped_imm_0,
16338 /* G_ASSERT_ZEXT */
16339 type0, type0, untyped_imm_0,
16340 /* G_ASSERT_ALIGN */
16341 type0, type0, untyped_imm_0,
16342 /* G_ADD */
16343 type0, type0, type0,
16344 /* G_SUB */
16345 type0, type0, type0,
16346 /* G_MUL */
16347 type0, type0, type0,
16348 /* G_SDIV */
16349 type0, type0, type0,
16350 /* G_UDIV */
16351 type0, type0, type0,
16352 /* G_SREM */
16353 type0, type0, type0,
16354 /* G_UREM */
16355 type0, type0, type0,
16356 /* G_SDIVREM */
16357 type0, type0, type0, type0,
16358 /* G_UDIVREM */
16359 type0, type0, type0, type0,
16360 /* G_AND */
16361 type0, type0, type0,
16362 /* G_OR */
16363 type0, type0, type0,
16364 /* G_XOR */
16365 type0, type0, type0,
16366 /* G_IMPLICIT_DEF */
16367 type0,
16368 /* G_PHI */
16369 type0,
16370 /* G_FRAME_INDEX */
16371 type0, -1,
16372 /* G_GLOBAL_VALUE */
16373 type0, -1,
16374 /* G_PTRAUTH_GLOBAL_VALUE */
16375 type0, -1, i32imm, type1, i64imm,
16376 /* G_CONSTANT_POOL */
16377 type0, -1,
16378 /* G_EXTRACT */
16379 type0, type1, untyped_imm_0,
16380 /* G_UNMERGE_VALUES */
16381 type0, type1,
16382 /* G_INSERT */
16383 type0, type0, type1, untyped_imm_0,
16384 /* G_MERGE_VALUES */
16385 type0, type1,
16386 /* G_BUILD_VECTOR */
16387 type0, type1,
16388 /* G_BUILD_VECTOR_TRUNC */
16389 type0, type1,
16390 /* G_CONCAT_VECTORS */
16391 type0, type1,
16392 /* G_PTRTOINT */
16393 type0, type1,
16394 /* G_INTTOPTR */
16395 type0, type1,
16396 /* G_BITCAST */
16397 type0, type1,
16398 /* G_FREEZE */
16399 type0, type0,
16400 /* G_CONSTANT_FOLD_BARRIER */
16401 type0, type0,
16402 /* G_INTRINSIC_FPTRUNC_ROUND */
16403 type0, type1, i32imm,
16404 /* G_INTRINSIC_TRUNC */
16405 type0, type0,
16406 /* G_INTRINSIC_ROUND */
16407 type0, type0,
16408 /* G_INTRINSIC_LRINT */
16409 type0, type1,
16410 /* G_INTRINSIC_LLRINT */
16411 type0, type1,
16412 /* G_INTRINSIC_ROUNDEVEN */
16413 type0, type0,
16414 /* G_READCYCLECOUNTER */
16415 type0,
16416 /* G_READSTEADYCOUNTER */
16417 type0,
16418 /* G_LOAD */
16419 type0, ptype1,
16420 /* G_SEXTLOAD */
16421 type0, ptype1,
16422 /* G_ZEXTLOAD */
16423 type0, ptype1,
16424 /* G_INDEXED_LOAD */
16425 type0, ptype1, ptype1, type2, -1,
16426 /* G_INDEXED_SEXTLOAD */
16427 type0, ptype1, ptype1, type2, -1,
16428 /* G_INDEXED_ZEXTLOAD */
16429 type0, ptype1, ptype1, type2, -1,
16430 /* G_STORE */
16431 type0, ptype1,
16432 /* G_INDEXED_STORE */
16433 ptype0, type1, ptype0, ptype2, -1,
16434 /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */
16435 type0, type1, type2, type0, type0,
16436 /* G_ATOMIC_CMPXCHG */
16437 type0, ptype1, type0, type0,
16438 /* G_ATOMICRMW_XCHG */
16439 type0, ptype1, type0,
16440 /* G_ATOMICRMW_ADD */
16441 type0, ptype1, type0,
16442 /* G_ATOMICRMW_SUB */
16443 type0, ptype1, type0,
16444 /* G_ATOMICRMW_AND */
16445 type0, ptype1, type0,
16446 /* G_ATOMICRMW_NAND */
16447 type0, ptype1, type0,
16448 /* G_ATOMICRMW_OR */
16449 type0, ptype1, type0,
16450 /* G_ATOMICRMW_XOR */
16451 type0, ptype1, type0,
16452 /* G_ATOMICRMW_MAX */
16453 type0, ptype1, type0,
16454 /* G_ATOMICRMW_MIN */
16455 type0, ptype1, type0,
16456 /* G_ATOMICRMW_UMAX */
16457 type0, ptype1, type0,
16458 /* G_ATOMICRMW_UMIN */
16459 type0, ptype1, type0,
16460 /* G_ATOMICRMW_FADD */
16461 type0, ptype1, type0,
16462 /* G_ATOMICRMW_FSUB */
16463 type0, ptype1, type0,
16464 /* G_ATOMICRMW_FMAX */
16465 type0, ptype1, type0,
16466 /* G_ATOMICRMW_FMIN */
16467 type0, ptype1, type0,
16468 /* G_ATOMICRMW_UINC_WRAP */
16469 type0, ptype1, type0,
16470 /* G_ATOMICRMW_UDEC_WRAP */
16471 type0, ptype1, type0,
16472 /* G_FENCE */
16473 i32imm, i32imm,
16474 /* G_PREFETCH */
16475 ptype0, i32imm, i32imm, i32imm,
16476 /* G_BRCOND */
16477 type0, -1,
16478 /* G_BRINDIRECT */
16479 type0,
16480 /* G_INVOKE_REGION_START */
16481 /* G_INTRINSIC */
16482 -1,
16483 /* G_INTRINSIC_W_SIDE_EFFECTS */
16484 -1,
16485 /* G_INTRINSIC_CONVERGENT */
16486 -1,
16487 /* G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS */
16488 -1,
16489 /* G_ANYEXT */
16490 type0, type1,
16491 /* G_TRUNC */
16492 type0, type1,
16493 /* G_CONSTANT */
16494 type0, -1,
16495 /* G_FCONSTANT */
16496 type0, -1,
16497 /* G_VASTART */
16498 type0,
16499 /* G_VAARG */
16500 type0, type1, -1,
16501 /* G_SEXT */
16502 type0, type1,
16503 /* G_SEXT_INREG */
16504 type0, type0, untyped_imm_0,
16505 /* G_ZEXT */
16506 type0, type1,
16507 /* G_SHL */
16508 type0, type0, type1,
16509 /* G_LSHR */
16510 type0, type0, type1,
16511 /* G_ASHR */
16512 type0, type0, type1,
16513 /* G_FSHL */
16514 type0, type0, type0, type1,
16515 /* G_FSHR */
16516 type0, type0, type0, type1,
16517 /* G_ROTR */
16518 type0, type0, type1,
16519 /* G_ROTL */
16520 type0, type0, type1,
16521 /* G_ICMP */
16522 type0, -1, type1, type1,
16523 /* G_FCMP */
16524 type0, -1, type1, type1,
16525 /* G_SCMP */
16526 type0, type1, type1,
16527 /* G_UCMP */
16528 type0, type1, type1,
16529 /* G_SELECT */
16530 type0, type1, type0, type0,
16531 /* G_UADDO */
16532 type0, type1, type0, type0,
16533 /* G_UADDE */
16534 type0, type1, type0, type0, type1,
16535 /* G_USUBO */
16536 type0, type1, type0, type0,
16537 /* G_USUBE */
16538 type0, type1, type0, type0, type1,
16539 /* G_SADDO */
16540 type0, type1, type0, type0,
16541 /* G_SADDE */
16542 type0, type1, type0, type0, type1,
16543 /* G_SSUBO */
16544 type0, type1, type0, type0,
16545 /* G_SSUBE */
16546 type0, type1, type0, type0, type1,
16547 /* G_UMULO */
16548 type0, type1, type0, type0,
16549 /* G_SMULO */
16550 type0, type1, type0, type0,
16551 /* G_UMULH */
16552 type0, type0, type0,
16553 /* G_SMULH */
16554 type0, type0, type0,
16555 /* G_UADDSAT */
16556 type0, type0, type0,
16557 /* G_SADDSAT */
16558 type0, type0, type0,
16559 /* G_USUBSAT */
16560 type0, type0, type0,
16561 /* G_SSUBSAT */
16562 type0, type0, type0,
16563 /* G_USHLSAT */
16564 type0, type0, type1,
16565 /* G_SSHLSAT */
16566 type0, type0, type1,
16567 /* G_SMULFIX */
16568 type0, type0, type0, untyped_imm_0,
16569 /* G_UMULFIX */
16570 type0, type0, type0, untyped_imm_0,
16571 /* G_SMULFIXSAT */
16572 type0, type0, type0, untyped_imm_0,
16573 /* G_UMULFIXSAT */
16574 type0, type0, type0, untyped_imm_0,
16575 /* G_SDIVFIX */
16576 type0, type0, type0, untyped_imm_0,
16577 /* G_UDIVFIX */
16578 type0, type0, type0, untyped_imm_0,
16579 /* G_SDIVFIXSAT */
16580 type0, type0, type0, untyped_imm_0,
16581 /* G_UDIVFIXSAT */
16582 type0, type0, type0, untyped_imm_0,
16583 /* G_FADD */
16584 type0, type0, type0,
16585 /* G_FSUB */
16586 type0, type0, type0,
16587 /* G_FMUL */
16588 type0, type0, type0,
16589 /* G_FMA */
16590 type0, type0, type0, type0,
16591 /* G_FMAD */
16592 type0, type0, type0, type0,
16593 /* G_FDIV */
16594 type0, type0, type0,
16595 /* G_FREM */
16596 type0, type0, type0,
16597 /* G_FPOW */
16598 type0, type0, type0,
16599 /* G_FPOWI */
16600 type0, type0, type1,
16601 /* G_FEXP */
16602 type0, type0,
16603 /* G_FEXP2 */
16604 type0, type0,
16605 /* G_FEXP10 */
16606 type0, type0,
16607 /* G_FLOG */
16608 type0, type0,
16609 /* G_FLOG2 */
16610 type0, type0,
16611 /* G_FLOG10 */
16612 type0, type0,
16613 /* G_FLDEXP */
16614 type0, type0, type1,
16615 /* G_FFREXP */
16616 type0, type1, type0,
16617 /* G_FNEG */
16618 type0, type0,
16619 /* G_FPEXT */
16620 type0, type1,
16621 /* G_FPTRUNC */
16622 type0, type1,
16623 /* G_FPTOSI */
16624 type0, type1,
16625 /* G_FPTOUI */
16626 type0, type1,
16627 /* G_SITOFP */
16628 type0, type1,
16629 /* G_UITOFP */
16630 type0, type1,
16631 /* G_FABS */
16632 type0, type0,
16633 /* G_FCOPYSIGN */
16634 type0, type0, type1,
16635 /* G_IS_FPCLASS */
16636 type0, type1, -1,
16637 /* G_FCANONICALIZE */
16638 type0, type0,
16639 /* G_FMINNUM */
16640 type0, type0, type0,
16641 /* G_FMAXNUM */
16642 type0, type0, type0,
16643 /* G_FMINNUM_IEEE */
16644 type0, type0, type0,
16645 /* G_FMAXNUM_IEEE */
16646 type0, type0, type0,
16647 /* G_FMINIMUM */
16648 type0, type0, type0,
16649 /* G_FMAXIMUM */
16650 type0, type0, type0,
16651 /* G_GET_FPENV */
16652 type0,
16653 /* G_SET_FPENV */
16654 type0,
16655 /* G_RESET_FPENV */
16656 /* G_GET_FPMODE */
16657 type0,
16658 /* G_SET_FPMODE */
16659 type0,
16660 /* G_RESET_FPMODE */
16661 /* G_PTR_ADD */
16662 ptype0, ptype0, type1,
16663 /* G_PTRMASK */
16664 ptype0, ptype0, type1,
16665 /* G_SMIN */
16666 type0, type0, type0,
16667 /* G_SMAX */
16668 type0, type0, type0,
16669 /* G_UMIN */
16670 type0, type0, type0,
16671 /* G_UMAX */
16672 type0, type0, type0,
16673 /* G_ABS */
16674 type0, type0,
16675 /* G_LROUND */
16676 type0, type1,
16677 /* G_LLROUND */
16678 type0, type1,
16679 /* G_BR */
16680 -1,
16681 /* G_BRJT */
16682 ptype0, -1, type1,
16683 /* G_VSCALE */
16684 type0, -1,
16685 /* G_INSERT_SUBVECTOR */
16686 type0, type0, type1, untyped_imm_0,
16687 /* G_EXTRACT_SUBVECTOR */
16688 type0, type0, untyped_imm_0,
16689 /* G_INSERT_VECTOR_ELT */
16690 type0, type0, type1, type2,
16691 /* G_EXTRACT_VECTOR_ELT */
16692 type0, type1, type2,
16693 /* G_SHUFFLE_VECTOR */
16694 type0, type1, type1, -1,
16695 /* G_SPLAT_VECTOR */
16696 type0, type1,
16697 /* G_VECTOR_COMPRESS */
16698 type0, type0, type1, type0,
16699 /* G_CTTZ */
16700 type0, type1,
16701 /* G_CTTZ_ZERO_UNDEF */
16702 type0, type1,
16703 /* G_CTLZ */
16704 type0, type1,
16705 /* G_CTLZ_ZERO_UNDEF */
16706 type0, type1,
16707 /* G_CTPOP */
16708 type0, type1,
16709 /* G_BSWAP */
16710 type0, type0,
16711 /* G_BITREVERSE */
16712 type0, type0,
16713 /* G_FCEIL */
16714 type0, type0,
16715 /* G_FCOS */
16716 type0, type0,
16717 /* G_FSIN */
16718 type0, type0,
16719 /* G_FTAN */
16720 type0, type0,
16721 /* G_FACOS */
16722 type0, type0,
16723 /* G_FASIN */
16724 type0, type0,
16725 /* G_FATAN */
16726 type0, type0,
16727 /* G_FCOSH */
16728 type0, type0,
16729 /* G_FSINH */
16730 type0, type0,
16731 /* G_FTANH */
16732 type0, type0,
16733 /* G_FSQRT */
16734 type0, type0,
16735 /* G_FFLOOR */
16736 type0, type0,
16737 /* G_FRINT */
16738 type0, type0,
16739 /* G_FNEARBYINT */
16740 type0, type0,
16741 /* G_ADDRSPACE_CAST */
16742 type0, type1,
16743 /* G_BLOCK_ADDR */
16744 type0, -1,
16745 /* G_JUMP_TABLE */
16746 type0, -1,
16747 /* G_DYN_STACKALLOC */
16748 ptype0, type1, i32imm,
16749 /* G_STACKSAVE */
16750 ptype0,
16751 /* G_STACKRESTORE */
16752 ptype0,
16753 /* G_STRICT_FADD */
16754 type0, type0, type0,
16755 /* G_STRICT_FSUB */
16756 type0, type0, type0,
16757 /* G_STRICT_FMUL */
16758 type0, type0, type0,
16759 /* G_STRICT_FDIV */
16760 type0, type0, type0,
16761 /* G_STRICT_FREM */
16762 type0, type0, type0,
16763 /* G_STRICT_FMA */
16764 type0, type0, type0, type0,
16765 /* G_STRICT_FSQRT */
16766 type0, type0,
16767 /* G_STRICT_FLDEXP */
16768 type0, type0, type1,
16769 /* G_READ_REGISTER */
16770 type0, -1,
16771 /* G_WRITE_REGISTER */
16772 -1, type0,
16773 /* G_MEMCPY */
16774 ptype0, ptype1, type2, untyped_imm_0,
16775 /* G_MEMCPY_INLINE */
16776 ptype0, ptype1, type2,
16777 /* G_MEMMOVE */
16778 ptype0, ptype1, type2, untyped_imm_0,
16779 /* G_MEMSET */
16780 ptype0, type1, type2, untyped_imm_0,
16781 /* G_BZERO */
16782 ptype0, type1, untyped_imm_0,
16783 /* G_TRAP */
16784 /* G_DEBUGTRAP */
16785 /* G_UBSANTRAP */
16786 i8imm,
16787 /* G_VECREDUCE_SEQ_FADD */
16788 type0, type1, type2,
16789 /* G_VECREDUCE_SEQ_FMUL */
16790 type0, type1, type2,
16791 /* G_VECREDUCE_FADD */
16792 type0, type1,
16793 /* G_VECREDUCE_FMUL */
16794 type0, type1,
16795 /* G_VECREDUCE_FMAX */
16796 type0, type1,
16797 /* G_VECREDUCE_FMIN */
16798 type0, type1,
16799 /* G_VECREDUCE_FMAXIMUM */
16800 type0, type1,
16801 /* G_VECREDUCE_FMINIMUM */
16802 type0, type1,
16803 /* G_VECREDUCE_ADD */
16804 type0, type1,
16805 /* G_VECREDUCE_MUL */
16806 type0, type1,
16807 /* G_VECREDUCE_AND */
16808 type0, type1,
16809 /* G_VECREDUCE_OR */
16810 type0, type1,
16811 /* G_VECREDUCE_XOR */
16812 type0, type1,
16813 /* G_VECREDUCE_SMAX */
16814 type0, type1,
16815 /* G_VECREDUCE_SMIN */
16816 type0, type1,
16817 /* G_VECREDUCE_UMAX */
16818 type0, type1,
16819 /* G_VECREDUCE_UMIN */
16820 type0, type1,
16821 /* G_SBFX */
16822 type0, type0, type1, type1,
16823 /* G_UBFX */
16824 type0, type0, type1, type1,
16825 /* ATOMIC_CMP_SWAP_I128 */
16826 g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc, g8rc, g8rc,
16827 /* ATOMIC_LOAD_ADD_I128 */
16828 g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc,
16829 /* ATOMIC_LOAD_AND_I128 */
16830 g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc,
16831 /* ATOMIC_LOAD_NAND_I128 */
16832 g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc,
16833 /* ATOMIC_LOAD_OR_I128 */
16834 g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc,
16835 /* ATOMIC_LOAD_SUB_I128 */
16836 g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc,
16837 /* ATOMIC_LOAD_XOR_I128 */
16838 g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc,
16839 /* ATOMIC_SWAP_I128 */
16840 g8prc, g8prc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc,
16841 /* BUILD_QUADWORD */
16842 g8prc, g8rc, g8rc,
16843 /* BUILD_UACC */
16844 acc, uacc,
16845 /* CFENCE */
16846 gprc,
16847 /* CFENCE8 */
16848 g8rc,
16849 /* CLRLSLDI */
16850 g8rc, g8rc, u6imm, u6imm,
16851 /* CLRLSLDI_rec */
16852 g8rc, g8rc, u6imm, u6imm,
16853 /* CLRLSLWI */
16854 gprc, gprc, u5imm, u5imm,
16855 /* CLRLSLWI_rec */
16856 gprc, gprc, u5imm, u5imm,
16857 /* CLRRDI */
16858 g8rc, g8rc, u6imm,
16859 /* CLRRDI_rec */
16860 g8rc, g8rc, u6imm,
16861 /* CLRRWI */
16862 gprc, gprc, u5imm,
16863 /* CLRRWI_rec */
16864 gprc, gprc, u5imm,
16865 /* DCBFL */
16866 ptr_rc_nor0, ptr_rc_idx,
16867 /* DCBFLP */
16868 ptr_rc_nor0, ptr_rc_idx,
16869 /* DCBFPS */
16870 ptr_rc_nor0, ptr_rc_idx,
16871 /* DCBFx */
16872 ptr_rc_nor0, ptr_rc_idx,
16873 /* DCBSTPS */
16874 ptr_rc_nor0, ptr_rc_idx,
16875 /* DCBTCT */
16876 ptr_rc_nor0, ptr_rc_idx, u5imm,
16877 /* DCBTDS */
16878 ptr_rc_nor0, ptr_rc_idx, u5imm,
16879 /* DCBTSTCT */
16880 ptr_rc_nor0, ptr_rc_idx, u5imm,
16881 /* DCBTSTDS */
16882 ptr_rc_nor0, ptr_rc_idx, u5imm,
16883 /* DCBTSTT */
16884 ptr_rc_nor0, ptr_rc_idx,
16885 /* DCBTSTx */
16886 ptr_rc_nor0, ptr_rc_idx,
16887 /* DCBTT */
16888 ptr_rc_nor0, ptr_rc_idx,
16889 /* DCBTx */
16890 ptr_rc_nor0, ptr_rc_idx,
16891 /* DFLOADf32 */
16892 vssrc, dispRIX, ptr_rc_nor0,
16893 /* DFLOADf64 */
16894 vsfrc, dispRIX, ptr_rc_nor0,
16895 /* DFSTOREf32 */
16896 vssrc, dispRIX, ptr_rc_nor0,
16897 /* DFSTOREf64 */
16898 vsfrc, dispRIX, ptr_rc_nor0,
16899 /* EXTLDI */
16900 g8rc, g8rc, u6imm, u6imm,
16901 /* EXTLDI_rec */
16902 g8rc, g8rc, u6imm, u6imm,
16903 /* EXTLWI */
16904 gprc, gprc, u5imm, u5imm,
16905 /* EXTLWI_rec */
16906 gprc, gprc, u5imm, u5imm,
16907 /* EXTRDI */
16908 g8rc, g8rc, u6imm, u6imm,
16909 /* EXTRDI_rec */
16910 g8rc, g8rc, u6imm, u6imm,
16911 /* EXTRWI */
16912 gprc, gprc, u5imm, u5imm,
16913 /* EXTRWI_rec */
16914 gprc, gprc, u5imm, u5imm,
16915 /* INSLWI */
16916 gprc, gprc, u5imm, u5imm,
16917 /* INSLWI_rec */
16918 gprc, gprc, u5imm, u5imm,
16919 /* INSRDI */
16920 g8rc, g8rc, u6imm, u6imm,
16921 /* INSRDI_rec */
16922 g8rc, g8rc, u6imm, u6imm,
16923 /* INSRWI */
16924 gprc, gprc, u5imm, u5imm,
16925 /* INSRWI_rec */
16926 gprc, gprc, u5imm, u5imm,
16927 /* KILL_PAIR */
16928 vsrprc, vsrprc,
16929 /* LAx */
16930 gprc, dispRI, ptr_rc_nor0,
16931 /* LIWAX */
16932 vsfrc, ptr_rc_nor0, ptr_rc_idx,
16933 /* LIWZX */
16934 vsfrc, ptr_rc_nor0, ptr_rc_idx,
16935 /* PPCLdFixedAddr */
16936 gprc, i32imm,
16937 /* PSUBI */
16938 g8rc, g8rc_nox0, s34imm,
16939 /* RLWIMIbm */
16940 g8rc, g8rc, u5imm, i32imm,
16941 /* RLWIMIbm_rec */
16942 g8rc, g8rc, u5imm, i32imm,
16943 /* RLWINMbm */
16944 g8rc, g8rc, u5imm, i32imm,
16945 /* RLWINMbm_rec */
16946 g8rc, g8rc, u5imm, i32imm,
16947 /* RLWNMbm */
16948 g8rc, g8rc, u5imm, i32imm,
16949 /* RLWNMbm_rec */
16950 g8rc, g8rc, u5imm, i32imm,
16951 /* ROTRDI */
16952 g8rc, g8rc, u6imm,
16953 /* ROTRDI_rec */
16954 g8rc, g8rc, u6imm,
16955 /* ROTRWI */
16956 gprc, gprc, u5imm,
16957 /* ROTRWI_rec */
16958 gprc, gprc, u5imm,
16959 /* SLDI */
16960 g8rc, g8rc, u6imm,
16961 /* SLDI_rec */
16962 g8rc, g8rc, u6imm,
16963 /* SLWI */
16964 gprc, gprc, u5imm,
16965 /* SLWI_rec */
16966 gprc, gprc, u5imm,
16967 /* SPILLTOVSR_LD */
16968 spilltovsrrc, dispRIX, ptr_rc_nor0,
16969 /* SPILLTOVSR_LDX */
16970 spilltovsrrc, ptr_rc_nor0, ptr_rc_idx,
16971 /* SPILLTOVSR_ST */
16972 spilltovsrrc, dispRIX, ptr_rc_nor0,
16973 /* SPILLTOVSR_STX */
16974 spilltovsrrc, ptr_rc_nor0, ptr_rc_idx,
16975 /* SRDI */
16976 g8rc, g8rc, u6imm,
16977 /* SRDI_rec */
16978 g8rc, g8rc, u6imm,
16979 /* SRWI */
16980 gprc, gprc, u5imm,
16981 /* SRWI_rec */
16982 gprc, gprc, u5imm,
16983 /* STIWX */
16984 vsfrc, ptr_rc_nor0, ptr_rc_idx,
16985 /* SUBI */
16986 gprc, gprc, s16imm,
16987 /* SUBIC */
16988 gprc, gprc, s16imm,
16989 /* SUBIC_rec */
16990 gprc, gprc, s16imm,
16991 /* SUBIS */
16992 gprc, gprc, s16imm,
16993 /* SUBPCIS */
16994 g8rc, s16imm,
16995 /* XFLOADf32 */
16996 vssrc, ptr_rc_nor0, ptr_rc_idx,
16997 /* XFLOADf64 */
16998 vsfrc, ptr_rc_nor0, ptr_rc_idx,
16999 /* XFSTOREf32 */
17000 vssrc, ptr_rc_nor0, ptr_rc_idx,
17001 /* XFSTOREf64 */
17002 vsfrc, ptr_rc_nor0, ptr_rc_idx,
17003 /* ADD4 */
17004 gprc, gprc, gprc,
17005 /* ADD4O */
17006 gprc, gprc, gprc,
17007 /* ADD4O_rec */
17008 gprc, gprc, gprc,
17009 /* ADD4TLS */
17010 gprc, gprc, tlsreg32,
17011 /* ADD4_rec */
17012 gprc, gprc, gprc,
17013 /* ADD8 */
17014 g8rc, g8rc, g8rc,
17015 /* ADD8O */
17016 g8rc, g8rc, g8rc,
17017 /* ADD8O_rec */
17018 g8rc, g8rc, g8rc,
17019 /* ADD8TLS */
17020 g8rc, g8rc_nox0, tlsreg,
17021 /* ADD8TLS_ */
17022 g8rc, g8rc, tlsreg,
17023 /* ADD8_rec */
17024 g8rc, g8rc, g8rc,
17025 /* ADDC */
17026 gprc, gprc, gprc,
17027 /* ADDC8 */
17028 g8rc, g8rc, g8rc,
17029 /* ADDC8O */
17030 g8rc, g8rc, g8rc,
17031 /* ADDC8O_rec */
17032 g8rc, g8rc, g8rc,
17033 /* ADDC8_rec */
17034 g8rc, g8rc, g8rc,
17035 /* ADDCO */
17036 gprc, gprc, gprc,
17037 /* ADDCO_rec */
17038 gprc, gprc, gprc,
17039 /* ADDC_rec */
17040 gprc, gprc, gprc,
17041 /* ADDE */
17042 gprc, gprc, gprc,
17043 /* ADDE8 */
17044 g8rc, g8rc, g8rc,
17045 /* ADDE8O */
17046 g8rc, g8rc, g8rc,
17047 /* ADDE8O_rec */
17048 g8rc, g8rc, g8rc,
17049 /* ADDE8_rec */
17050 g8rc, g8rc, g8rc,
17051 /* ADDEO */
17052 gprc, gprc, gprc,
17053 /* ADDEO_rec */
17054 gprc, gprc, gprc,
17055 /* ADDEX */
17056 gprc, gprc, gprc, u2imm,
17057 /* ADDEX8 */
17058 g8rc, g8rc, g8rc, u2imm,
17059 /* ADDE_rec */
17060 gprc, gprc, gprc,
17061 /* ADDG6S */
17062 gprc, gprc, gprc,
17063 /* ADDG6S8 */
17064 g8rc, g8rc, g8rc,
17065 /* ADDI */
17066 gprc, gprc_nor0, s16imm,
17067 /* ADDI8 */
17068 g8rc, g8rc_nox0, s16imm64,
17069 /* ADDIC */
17070 gprc, gprc, s16imm,
17071 /* ADDIC8 */
17072 g8rc, g8rc, s16imm64,
17073 /* ADDIC_rec */
17074 gprc, gprc, s16imm,
17075 /* ADDIS */
17076 gprc, gprc_nor0, s17imm,
17077 /* ADDIS8 */
17078 g8rc, g8rc_nox0, s17imm64,
17079 /* ADDISdtprelHA */
17080 g8rc, g8rc_nox0, s16imm64,
17081 /* ADDISdtprelHA32 */
17082 gprc, gprc_nor0, s16imm,
17083 /* ADDISgotTprelHA */
17084 g8rc, g8rc_nox0, s16imm64,
17085 /* ADDIStlsgdHA */
17086 g8rc, g8rc_nox0, s16imm64,
17087 /* ADDIStlsldHA */
17088 g8rc, g8rc_nox0, s16imm64,
17089 /* ADDIStocHA */
17090 gprc, gprc_nor0, i32imm,
17091 /* ADDIStocHA8 */
17092 g8rc, g8rc_nox0, i64imm,
17093 /* ADDIdtprelL */
17094 g8rc, g8rc_nox0, s16imm64,
17095 /* ADDIdtprelL32 */
17096 gprc, gprc_nor0, s16imm,
17097 /* ADDItlsgdL */
17098 g8rc, g8rc_nox0, s16imm64,
17099 /* ADDItlsgdL32 */
17100 gprc, gprc_nor0, s16imm,
17101 /* ADDItlsgdLADDR */
17102 g8rc, g8rc_nox0, s16imm64, tlsgd,
17103 /* ADDItlsgdLADDR32 */
17104 gprc, gprc_nor0, s16imm, tlsgd32,
17105 /* ADDItlsldL */
17106 g8rc, g8rc_nox0, s16imm64,
17107 /* ADDItlsldL32 */
17108 gprc, gprc_nor0, s16imm,
17109 /* ADDItlsldLADDR */
17110 g8rc, g8rc_nox0, s16imm64, tlsgd,
17111 /* ADDItlsldLADDR32 */
17112 gprc, gprc_nor0, s16imm, tlsgd32,
17113 /* ADDItoc */
17114 gprc, gprc, i32imm,
17115 /* ADDItoc8 */
17116 g8rc, g8rc_nox0, i64imm,
17117 /* ADDItocL */
17118 gprc, gprc_nor0, i32imm,
17119 /* ADDItocL8 */
17120 g8rc, g8rc_nox0, i64imm,
17121 /* ADDME */
17122 gprc, gprc,
17123 /* ADDME8 */
17124 g8rc, g8rc,
17125 /* ADDME8O */
17126 g8rc, g8rc,
17127 /* ADDME8O_rec */
17128 g8rc, g8rc,
17129 /* ADDME8_rec */
17130 g8rc, g8rc,
17131 /* ADDMEO */
17132 gprc, gprc,
17133 /* ADDMEO_rec */
17134 gprc, gprc,
17135 /* ADDME_rec */
17136 gprc, gprc,
17137 /* ADDPCIS */
17138 g8rc, i32imm,
17139 /* ADDZE */
17140 gprc, gprc,
17141 /* ADDZE8 */
17142 g8rc, g8rc,
17143 /* ADDZE8O */
17144 g8rc, g8rc,
17145 /* ADDZE8O_rec */
17146 g8rc, g8rc,
17147 /* ADDZE8_rec */
17148 g8rc, g8rc,
17149 /* ADDZEO */
17150 gprc, gprc,
17151 /* ADDZEO_rec */
17152 gprc, gprc,
17153 /* ADDZE_rec */
17154 gprc, gprc,
17155 /* ADJCALLSTACKDOWN */
17156 u16imm, u16imm,
17157 /* ADJCALLSTACKUP */
17158 u16imm, u16imm,
17159 /* AND */
17160 gprc, gprc, gprc,
17161 /* AND8 */
17162 g8rc, g8rc, g8rc,
17163 /* AND8_rec */
17164 g8rc, g8rc, g8rc,
17165 /* ANDC */
17166 gprc, gprc, gprc,
17167 /* ANDC8 */
17168 g8rc, g8rc, g8rc,
17169 /* ANDC8_rec */
17170 g8rc, g8rc, g8rc,
17171 /* ANDC_rec */
17172 gprc, gprc, gprc,
17173 /* ANDI8_rec */
17174 g8rc, g8rc, u16imm64,
17175 /* ANDIS8_rec */
17176 g8rc, g8rc, u16imm64,
17177 /* ANDIS_rec */
17178 gprc, gprc, u16imm,
17179 /* ANDI_rec */
17180 gprc, gprc, u16imm,
17181 /* ANDI_rec_1_EQ_BIT */
17182 crbitrc, gprc,
17183 /* ANDI_rec_1_EQ_BIT8 */
17184 crbitrc, g8rc,
17185 /* ANDI_rec_1_GT_BIT */
17186 crbitrc, gprc,
17187 /* ANDI_rec_1_GT_BIT8 */
17188 crbitrc, g8rc,
17189 /* AND_rec */
17190 gprc, gprc, gprc,
17191 /* ATOMIC_CMP_SWAP_I16 */
17192 gprc, ptr_rc_nor0, ptr_rc_idx, gprc, gprc,
17193 /* ATOMIC_CMP_SWAP_I32 */
17194 gprc, ptr_rc_nor0, ptr_rc_idx, gprc, gprc,
17195 /* ATOMIC_CMP_SWAP_I64 */
17196 g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc, g8rc,
17197 /* ATOMIC_CMP_SWAP_I8 */
17198 gprc, ptr_rc_nor0, ptr_rc_idx, gprc, gprc,
17199 /* ATOMIC_LOAD_ADD_I16 */
17200 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17201 /* ATOMIC_LOAD_ADD_I32 */
17202 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17203 /* ATOMIC_LOAD_ADD_I64 */
17204 g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
17205 /* ATOMIC_LOAD_ADD_I8 */
17206 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17207 /* ATOMIC_LOAD_AND_I16 */
17208 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17209 /* ATOMIC_LOAD_AND_I32 */
17210 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17211 /* ATOMIC_LOAD_AND_I64 */
17212 g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
17213 /* ATOMIC_LOAD_AND_I8 */
17214 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17215 /* ATOMIC_LOAD_MAX_I16 */
17216 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17217 /* ATOMIC_LOAD_MAX_I32 */
17218 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17219 /* ATOMIC_LOAD_MAX_I64 */
17220 g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
17221 /* ATOMIC_LOAD_MAX_I8 */
17222 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17223 /* ATOMIC_LOAD_MIN_I16 */
17224 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17225 /* ATOMIC_LOAD_MIN_I32 */
17226 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17227 /* ATOMIC_LOAD_MIN_I64 */
17228 g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
17229 /* ATOMIC_LOAD_MIN_I8 */
17230 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17231 /* ATOMIC_LOAD_NAND_I16 */
17232 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17233 /* ATOMIC_LOAD_NAND_I32 */
17234 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17235 /* ATOMIC_LOAD_NAND_I64 */
17236 g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
17237 /* ATOMIC_LOAD_NAND_I8 */
17238 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17239 /* ATOMIC_LOAD_OR_I16 */
17240 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17241 /* ATOMIC_LOAD_OR_I32 */
17242 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17243 /* ATOMIC_LOAD_OR_I64 */
17244 g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
17245 /* ATOMIC_LOAD_OR_I8 */
17246 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17247 /* ATOMIC_LOAD_SUB_I16 */
17248 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17249 /* ATOMIC_LOAD_SUB_I32 */
17250 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17251 /* ATOMIC_LOAD_SUB_I64 */
17252 g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
17253 /* ATOMIC_LOAD_SUB_I8 */
17254 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17255 /* ATOMIC_LOAD_UMAX_I16 */
17256 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17257 /* ATOMIC_LOAD_UMAX_I32 */
17258 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17259 /* ATOMIC_LOAD_UMAX_I64 */
17260 g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
17261 /* ATOMIC_LOAD_UMAX_I8 */
17262 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17263 /* ATOMIC_LOAD_UMIN_I16 */
17264 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17265 /* ATOMIC_LOAD_UMIN_I32 */
17266 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17267 /* ATOMIC_LOAD_UMIN_I64 */
17268 g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
17269 /* ATOMIC_LOAD_UMIN_I8 */
17270 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17271 /* ATOMIC_LOAD_XOR_I16 */
17272 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17273 /* ATOMIC_LOAD_XOR_I32 */
17274 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17275 /* ATOMIC_LOAD_XOR_I64 */
17276 g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
17277 /* ATOMIC_LOAD_XOR_I8 */
17278 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17279 /* ATOMIC_SWAP_I16 */
17280 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17281 /* ATOMIC_SWAP_I32 */
17282 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17283 /* ATOMIC_SWAP_I64 */
17284 g8rc, ptr_rc_nor0, ptr_rc_idx, g8rc,
17285 /* ATOMIC_SWAP_I8 */
17286 gprc, ptr_rc_nor0, ptr_rc_idx, gprc,
17287 /* ATTN */
17288 /* B */
17289 directbrtarget,
17290 /* BA */
17291 absdirectbrtarget,
17292 /* BC */
17293 crbitrc, condbrtarget,
17294 /* BCC */
17295 i32imm, crrc, condbrtarget,
17296 /* BCCA */
17297 i32imm, crrc, abscondbrtarget,
17298 /* BCCCTR */
17299 i32imm, crrc,
17300 /* BCCCTR8 */
17301 i32imm, crrc,
17302 /* BCCCTRL */
17303 i32imm, crrc,
17304 /* BCCCTRL8 */
17305 i32imm, crrc,
17306 /* BCCL */
17307 i32imm, crrc, condbrtarget,
17308 /* BCCLA */
17309 i32imm, crrc, abscondbrtarget,
17310 /* BCCLR */
17311 i32imm, crrc,
17312 /* BCCLRL */
17313 i32imm, crrc,
17314 /* BCCTR */
17315 crbitrc,
17316 /* BCCTR8 */
17317 crbitrc,
17318 /* BCCTR8n */
17319 crbitrc,
17320 /* BCCTRL */
17321 crbitrc,
17322 /* BCCTRL8 */
17323 crbitrc,
17324 /* BCCTRL8n */
17325 crbitrc,
17326 /* BCCTRLn */
17327 crbitrc,
17328 /* BCCTRn */
17329 crbitrc,
17330 /* BCDADD_rec */
17331 vrrc, vrrc, vrrc, u1imm,
17332 /* BCDCFN_rec */
17333 vrrc, vrrc, u1imm,
17334 /* BCDCFSQ_rec */
17335 vrrc, vrrc, u1imm,
17336 /* BCDCFZ_rec */
17337 vrrc, vrrc, u1imm,
17338 /* BCDCPSGN_rec */
17339 vrrc, vrrc, vrrc,
17340 /* BCDCTN_rec */
17341 vrrc, vrrc,
17342 /* BCDCTSQ_rec */
17343 vrrc, vrrc,
17344 /* BCDCTZ_rec */
17345 vrrc, vrrc, u1imm,
17346 /* BCDSETSGN_rec */
17347 vrrc, vrrc, u1imm,
17348 /* BCDSR_rec */
17349 vrrc, vrrc, vrrc, u1imm,
17350 /* BCDSUB_rec */
17351 vrrc, vrrc, vrrc, u1imm,
17352 /* BCDS_rec */
17353 vrrc, vrrc, vrrc, u1imm,
17354 /* BCDTRUNC_rec */
17355 vrrc, vrrc, vrrc, u1imm,
17356 /* BCDUS_rec */
17357 vrrc, vrrc, vrrc,
17358 /* BCDUTRUNC_rec */
17359 vrrc, vrrc, vrrc,
17360 /* BCL */
17361 crbitrc, condbrtarget,
17362 /* BCLR */
17363 crbitrc,
17364 /* BCLRL */
17365 crbitrc,
17366 /* BCLRLn */
17367 crbitrc,
17368 /* BCLRn */
17369 crbitrc,
17370 /* BCLalways */
17371 condbrtarget,
17372 /* BCLn */
17373 crbitrc, condbrtarget,
17374 /* BCTR */
17375 /* BCTR8 */
17376 /* BCTRL */
17377 /* BCTRL8 */
17378 /* BCTRL8_LDinto_toc */
17379 dispRIX, ptr_rc_nor0,
17380 /* BCTRL8_LDinto_toc_RM */
17381 dispRIX, ptr_rc_nor0,
17382 /* BCTRL8_RM */
17383 /* BCTRL_LWZinto_toc */
17384 dispRI, ptr_rc_nor0,
17385 /* BCTRL_LWZinto_toc_RM */
17386 dispRI, ptr_rc_nor0,
17387 /* BCTRL_RM */
17388 /* BCn */
17389 crbitrc, condbrtarget,
17390 /* BDNZ */
17391 condbrtarget,
17392 /* BDNZ8 */
17393 condbrtarget,
17394 /* BDNZA */
17395 abscondbrtarget,
17396 /* BDNZAm */
17397 abscondbrtarget,
17398 /* BDNZAp */
17399 abscondbrtarget,
17400 /* BDNZL */
17401 condbrtarget,
17402 /* BDNZLA */
17403 abscondbrtarget,
17404 /* BDNZLAm */
17405 abscondbrtarget,
17406 /* BDNZLAp */
17407 abscondbrtarget,
17408 /* BDNZLR */
17409 /* BDNZLR8 */
17410 /* BDNZLRL */
17411 /* BDNZLRLm */
17412 /* BDNZLRLp */
17413 /* BDNZLRm */
17414 /* BDNZLRp */
17415 /* BDNZLm */
17416 condbrtarget,
17417 /* BDNZLp */
17418 condbrtarget,
17419 /* BDNZm */
17420 condbrtarget,
17421 /* BDNZp */
17422 condbrtarget,
17423 /* BDZ */
17424 condbrtarget,
17425 /* BDZ8 */
17426 condbrtarget,
17427 /* BDZA */
17428 abscondbrtarget,
17429 /* BDZAm */
17430 abscondbrtarget,
17431 /* BDZAp */
17432 abscondbrtarget,
17433 /* BDZL */
17434 condbrtarget,
17435 /* BDZLA */
17436 abscondbrtarget,
17437 /* BDZLAm */
17438 abscondbrtarget,
17439 /* BDZLAp */
17440 abscondbrtarget,
17441 /* BDZLR */
17442 /* BDZLR8 */
17443 /* BDZLRL */
17444 /* BDZLRLm */
17445 /* BDZLRLp */
17446 /* BDZLRm */
17447 /* BDZLRp */
17448 /* BDZLm */
17449 condbrtarget,
17450 /* BDZLp */
17451 condbrtarget,
17452 /* BDZm */
17453 condbrtarget,
17454 /* BDZp */
17455 condbrtarget,
17456 /* BL */
17457 calltarget,
17458 /* BL8 */
17459 calltarget,
17460 /* BL8_NOP */
17461 calltarget,
17462 /* BL8_NOP_RM */
17463 calltarget,
17464 /* BL8_NOP_TLS */
17465 calltarget, tlsgd,
17466 /* BL8_NOTOC */
17467 calltarget,
17468 /* BL8_NOTOC_RM */
17469 calltarget,
17470 /* BL8_NOTOC_TLS */
17471 calltarget, tlsgd,
17472 /* BL8_RM */
17473 calltarget,
17474 /* BL8_TLS */
17475 calltarget, tlsgd,
17476 /* BL8_TLS_ */
17477 calltarget, tlsgd,
17478 /* BLA */
17479 abscalltarget,
17480 /* BLA8 */
17481 abscalltarget,
17482 /* BLA8_NOP */
17483 abscalltarget,
17484 /* BLA8_NOP_RM */
17485 abscalltarget,
17486 /* BLA8_RM */
17487 abscalltarget,
17488 /* BLA_RM */
17489 abscalltarget,
17490 /* BLR */
17491 /* BLR8 */
17492 /* BLRL */
17493 /* BL_NOP */
17494 calltarget,
17495 /* BL_NOP_RM */
17496 calltarget,
17497 /* BL_RM */
17498 calltarget,
17499 /* BL_TLS */
17500 calltarget, tlsgd32,
17501 /* BPERMD */
17502 g8rc, g8rc, g8rc,
17503 /* BRD */
17504 g8rc, g8rc,
17505 /* BRH */
17506 gprc, gprc,
17507 /* BRH8 */
17508 g8rc, g8rc,
17509 /* BRINC */
17510 gprc, gprc, gprc,
17511 /* BRW */
17512 gprc, gprc,
17513 /* BRW8 */
17514 g8rc, g8rc,
17515 /* CBCDTD */
17516 gprc, gprc,
17517 /* CBCDTD8 */
17518 g8rc, g8rc,
17519 /* CDTBCD */
17520 gprc, gprc,
17521 /* CDTBCD8 */
17522 g8rc, g8rc,
17523 /* CFUGED */
17524 g8rc, g8rc, g8rc,
17525 /* CLRBHRB */
17526 /* CMPB */
17527 gprc, gprc, gprc,
17528 /* CMPB8 */
17529 g8rc, g8rc, g8rc,
17530 /* CMPD */
17531 crrc, g8rc, g8rc,
17532 /* CMPDI */
17533 crrc, g8rc, s16imm64,
17534 /* CMPEQB */
17535 crrc, g8rc, g8rc,
17536 /* CMPLD */
17537 crrc, g8rc, g8rc,
17538 /* CMPLDI */
17539 crrc, g8rc, u16imm64,
17540 /* CMPLW */
17541 crrc, gprc, gprc,
17542 /* CMPLWI */
17543 crrc, gprc, u16imm,
17544 /* CMPRB */
17545 crrc, u1imm, gprc, gprc,
17546 /* CMPRB8 */
17547 crrc, u1imm, g8rc, g8rc,
17548 /* CMPW */
17549 crrc, gprc, gprc,
17550 /* CMPWI */
17551 crrc, gprc, s16imm,
17552 /* CNTLZD */
17553 g8rc, g8rc,
17554 /* CNTLZDM */
17555 g8rc, g8rc, g8rc,
17556 /* CNTLZD_rec */
17557 g8rc, g8rc,
17558 /* CNTLZW */
17559 gprc, gprc,
17560 /* CNTLZW8 */
17561 g8rc, g8rc,
17562 /* CNTLZW8_rec */
17563 g8rc, g8rc,
17564 /* CNTLZW_rec */
17565 gprc, gprc,
17566 /* CNTTZD */
17567 g8rc, g8rc,
17568 /* CNTTZDM */
17569 g8rc, g8rc, g8rc,
17570 /* CNTTZD_rec */
17571 g8rc, g8rc,
17572 /* CNTTZW */
17573 gprc, gprc,
17574 /* CNTTZW8 */
17575 g8rc, g8rc,
17576 /* CNTTZW8_rec */
17577 g8rc, g8rc,
17578 /* CNTTZW_rec */
17579 gprc, gprc,
17580 /* CP_ABORT */
17581 /* CP_COPY */
17582 gprc, gprc, u1imm,
17583 /* CP_COPY8 */
17584 g8rc, g8rc, u1imm,
17585 /* CP_PASTE8_rec */
17586 g8rc, g8rc, u1imm,
17587 /* CP_PASTE_rec */
17588 gprc, gprc, u1imm,
17589 /* CR6SET */
17590 /* CR6UNSET */
17591 /* CRAND */
17592 crbitrc, crbitrc, crbitrc,
17593 /* CRANDC */
17594 crbitrc, crbitrc, crbitrc,
17595 /* CREQV */
17596 crbitrc, crbitrc, crbitrc,
17597 /* CRNAND */
17598 crbitrc, crbitrc, crbitrc,
17599 /* CRNOR */
17600 crbitrc, crbitrc, crbitrc,
17601 /* CRNOT */
17602 crbitrc, crbitrc,
17603 /* CROR */
17604 crbitrc, crbitrc, crbitrc,
17605 /* CRORC */
17606 crbitrc, crbitrc, crbitrc,
17607 /* CRSET */
17608 crbitrc,
17609 /* CRUNSET */
17610 crbitrc,
17611 /* CRXOR */
17612 crbitrc, crbitrc, crbitrc,
17613 /* CTRL_DEP */
17614 i32imm, crrc, condbrtarget,
17615 /* DADD */
17616 f8rc, f8rc, f8rc,
17617 /* DADDQ */
17618 fpairrc, fpairrc, fpairrc,
17619 /* DADDQ_rec */
17620 fpairrc, fpairrc, fpairrc,
17621 /* DADD_rec */
17622 f8rc, f8rc, f8rc,
17623 /* DARN */
17624 g8rc, u2imm,
17625 /* DCBA */
17626 ptr_rc_nor0, ptr_rc_idx,
17627 /* DCBF */
17628 u3imm, ptr_rc_nor0, ptr_rc_idx,
17629 /* DCBFEP */
17630 ptr_rc_nor0, ptr_rc_idx,
17631 /* DCBI */
17632 ptr_rc_nor0, ptr_rc_idx,
17633 /* DCBST */
17634 ptr_rc_nor0, ptr_rc_idx,
17635 /* DCBSTEP */
17636 ptr_rc_nor0, ptr_rc_idx,
17637 /* DCBT */
17638 u5imm, ptr_rc_nor0, ptr_rc_idx,
17639 /* DCBTEP */
17640 ptr_rc_nor0, ptr_rc_idx, u5imm,
17641 /* DCBTST */
17642 u5imm, ptr_rc_nor0, ptr_rc_idx,
17643 /* DCBTSTEP */
17644 ptr_rc_nor0, ptr_rc_idx, u5imm,
17645 /* DCBZ */
17646 ptr_rc_nor0, ptr_rc_idx,
17647 /* DCBZEP */
17648 ptr_rc_nor0, ptr_rc_idx,
17649 /* DCBZL */
17650 ptr_rc_nor0, ptr_rc_idx,
17651 /* DCBZLEP */
17652 ptr_rc_nor0, ptr_rc_idx,
17653 /* DCCCI */
17654 gprc, gprc,
17655 /* DCFFIX */
17656 f8rc, f8rc,
17657 /* DCFFIXQ */
17658 fpairrc, f8rc,
17659 /* DCFFIXQQ */
17660 fpairrc, vrrc,
17661 /* DCFFIXQ_rec */
17662 fpairrc, f8rc,
17663 /* DCFFIX_rec */
17664 f8rc, f8rc,
17665 /* DCMPO */
17666 crrc, f8rc, f8rc,
17667 /* DCMPOQ */
17668 crrc, fpairrc, fpairrc,
17669 /* DCMPU */
17670 crrc, f8rc, f8rc,
17671 /* DCMPUQ */
17672 crrc, fpairrc, fpairrc,
17673 /* DCTDP */
17674 f8rc, f8rc,
17675 /* DCTDP_rec */
17676 f8rc, f8rc,
17677 /* DCTFIX */
17678 f8rc, f8rc,
17679 /* DCTFIXQ */
17680 f8rc, fpairrc,
17681 /* DCTFIXQQ */
17682 vrrc, fpairrc,
17683 /* DCTFIXQ_rec */
17684 f8rc, fpairrc,
17685 /* DCTFIX_rec */
17686 f8rc, f8rc,
17687 /* DCTQPQ */
17688 fpairrc, f8rc,
17689 /* DCTQPQ_rec */
17690 fpairrc, f8rc,
17691 /* DDEDPD */
17692 f8rc, u2imm, f8rc,
17693 /* DDEDPDQ */
17694 fpairrc, u2imm, fpairrc,
17695 /* DDEDPDQ_rec */
17696 fpairrc, u2imm, fpairrc,
17697 /* DDEDPD_rec */
17698 f8rc, u2imm, f8rc,
17699 /* DDIV */
17700 f8rc, f8rc, f8rc,
17701 /* DDIVQ */
17702 fpairrc, fpairrc, fpairrc,
17703 /* DDIVQ_rec */
17704 fpairrc, fpairrc, fpairrc,
17705 /* DDIV_rec */
17706 f8rc, f8rc, f8rc,
17707 /* DENBCD */
17708 f8rc, u1imm, f8rc,
17709 /* DENBCDQ */
17710 fpairrc, u1imm, fpairrc,
17711 /* DENBCDQ_rec */
17712 fpairrc, u1imm, fpairrc,
17713 /* DENBCD_rec */
17714 f8rc, u1imm, f8rc,
17715 /* DIEX */
17716 f8rc, f8rc, f8rc,
17717 /* DIEXQ */
17718 fpairrc, f8rc, fpairrc,
17719 /* DIEXQ_rec */
17720 fpairrc, f8rc, fpairrc,
17721 /* DIEX_rec */
17722 f8rc, f8rc, f8rc,
17723 /* DIVD */
17724 g8rc, g8rc, g8rc,
17725 /* DIVDE */
17726 g8rc, g8rc, g8rc,
17727 /* DIVDEO */
17728 g8rc, g8rc, g8rc,
17729 /* DIVDEO_rec */
17730 g8rc, g8rc, g8rc,
17731 /* DIVDEU */
17732 g8rc, g8rc, g8rc,
17733 /* DIVDEUO */
17734 g8rc, g8rc, g8rc,
17735 /* DIVDEUO_rec */
17736 g8rc, g8rc, g8rc,
17737 /* DIVDEU_rec */
17738 g8rc, g8rc, g8rc,
17739 /* DIVDE_rec */
17740 g8rc, g8rc, g8rc,
17741 /* DIVDO */
17742 g8rc, g8rc, g8rc,
17743 /* DIVDO_rec */
17744 g8rc, g8rc, g8rc,
17745 /* DIVDU */
17746 g8rc, g8rc, g8rc,
17747 /* DIVDUO */
17748 g8rc, g8rc, g8rc,
17749 /* DIVDUO_rec */
17750 g8rc, g8rc, g8rc,
17751 /* DIVDU_rec */
17752 g8rc, g8rc, g8rc,
17753 /* DIVD_rec */
17754 g8rc, g8rc, g8rc,
17755 /* DIVW */
17756 gprc, gprc, gprc,
17757 /* DIVWE */
17758 gprc, gprc, gprc,
17759 /* DIVWEO */
17760 gprc, gprc, gprc,
17761 /* DIVWEO_rec */
17762 gprc, gprc, gprc,
17763 /* DIVWEU */
17764 gprc, gprc, gprc,
17765 /* DIVWEUO */
17766 gprc, gprc, gprc,
17767 /* DIVWEUO_rec */
17768 gprc, gprc, gprc,
17769 /* DIVWEU_rec */
17770 gprc, gprc, gprc,
17771 /* DIVWE_rec */
17772 gprc, gprc, gprc,
17773 /* DIVWO */
17774 gprc, gprc, gprc,
17775 /* DIVWO_rec */
17776 gprc, gprc, gprc,
17777 /* DIVWU */
17778 gprc, gprc, gprc,
17779 /* DIVWUO */
17780 gprc, gprc, gprc,
17781 /* DIVWUO_rec */
17782 gprc, gprc, gprc,
17783 /* DIVWU_rec */
17784 gprc, gprc, gprc,
17785 /* DIVW_rec */
17786 gprc, gprc, gprc,
17787 /* DMMR */
17788 dmr, dmr,
17789 /* DMSETDMRZ */
17790 dmr,
17791 /* DMUL */
17792 f8rc, f8rc, f8rc,
17793 /* DMULQ */
17794 fpairrc, fpairrc, fpairrc,
17795 /* DMULQ_rec */
17796 fpairrc, fpairrc, fpairrc,
17797 /* DMUL_rec */
17798 f8rc, f8rc, f8rc,
17799 /* DMXOR */
17800 dmr, dmr, dmr,
17801 /* DMXXEXTFDMR256 */
17802 vsrprc, dmrrowp, u2imm,
17803 /* DMXXEXTFDMR512 */
17804 vsrprc, vsrprc, wacc,
17805 /* DMXXEXTFDMR512_HI */
17806 vsrprc, vsrprc, wacc_hi,
17807 /* DMXXINSTFDMR256 */
17808 dmrrowp, vsrprc, u2imm,
17809 /* DMXXINSTFDMR512 */
17810 wacc, vsrprc, vsrprc,
17811 /* DMXXINSTFDMR512_HI */
17812 wacc_hi, vsrprc, vsrprc,
17813 /* DQUA */
17814 f8rc, f8rc, f8rc, u2imm,
17815 /* DQUAI */
17816 f8rc, s5imm, f8rc, u2imm,
17817 /* DQUAIQ */
17818 fpairrc, s5imm, fpairrc, u2imm,
17819 /* DQUAIQ_rec */
17820 fpairrc, s5imm, fpairrc, u2imm,
17821 /* DQUAI_rec */
17822 f8rc, s5imm, f8rc, u2imm,
17823 /* DQUAQ */
17824 fpairrc, fpairrc, fpairrc, u2imm,
17825 /* DQUAQ_rec */
17826 fpairrc, fpairrc, fpairrc, u2imm,
17827 /* DQUA_rec */
17828 f8rc, f8rc, f8rc, u2imm,
17829 /* DRDPQ */
17830 fpairrc, fpairrc,
17831 /* DRDPQ_rec */
17832 fpairrc, fpairrc,
17833 /* DRINTN */
17834 f8rc, u1imm, f8rc, u2imm,
17835 /* DRINTNQ */
17836 fpairrc, u1imm, fpairrc, u2imm,
17837 /* DRINTNQ_rec */
17838 fpairrc, u1imm, fpairrc, u2imm,
17839 /* DRINTN_rec */
17840 f8rc, u1imm, f8rc, u2imm,
17841 /* DRINTX */
17842 f8rc, u1imm, f8rc, u2imm,
17843 /* DRINTXQ */
17844 fpairrc, u1imm, fpairrc, u2imm,
17845 /* DRINTXQ_rec */
17846 fpairrc, u1imm, fpairrc, u2imm,
17847 /* DRINTX_rec */
17848 f8rc, u1imm, f8rc, u2imm,
17849 /* DRRND */
17850 f8rc, f8rc, f8rc, u2imm,
17851 /* DRRNDQ */
17852 fpairrc, f8rc, fpairrc, u2imm,
17853 /* DRRNDQ_rec */
17854 fpairrc, f8rc, fpairrc, u2imm,
17855 /* DRRND_rec */
17856 f8rc, f8rc, f8rc, u2imm,
17857 /* DRSP */
17858 f8rc, f8rc,
17859 /* DRSP_rec */
17860 f8rc, f8rc,
17861 /* DSCLI */
17862 f8rc, f8rc, u6imm,
17863 /* DSCLIQ */
17864 fpairrc, fpairrc, u6imm,
17865 /* DSCLIQ_rec */
17866 fpairrc, fpairrc, u6imm,
17867 /* DSCLI_rec */
17868 f8rc, f8rc, u6imm,
17869 /* DSCRI */
17870 f8rc, f8rc, u6imm,
17871 /* DSCRIQ */
17872 fpairrc, fpairrc, u6imm,
17873 /* DSCRIQ_rec */
17874 fpairrc, fpairrc, u6imm,
17875 /* DSCRI_rec */
17876 f8rc, f8rc, u6imm,
17877 /* DSS */
17878 u5imm,
17879 /* DSSALL */
17880 /* DST */
17881 u5imm, gprc, gprc,
17882 /* DST64 */
17883 u5imm, g8rc, gprc,
17884 /* DSTST */
17885 u5imm, gprc, gprc,
17886 /* DSTST64 */
17887 u5imm, g8rc, gprc,
17888 /* DSTSTT */
17889 u5imm, gprc, gprc,
17890 /* DSTSTT64 */
17891 u5imm, g8rc, gprc,
17892 /* DSTT */
17893 u5imm, gprc, gprc,
17894 /* DSTT64 */
17895 u5imm, g8rc, gprc,
17896 /* DSUB */
17897 f8rc, f8rc, f8rc,
17898 /* DSUBQ */
17899 fpairrc, fpairrc, fpairrc,
17900 /* DSUBQ_rec */
17901 fpairrc, fpairrc, fpairrc,
17902 /* DSUB_rec */
17903 f8rc, f8rc, f8rc,
17904 /* DTSTDC */
17905 crrc, f8rc, u6imm,
17906 /* DTSTDCQ */
17907 crrc, fpairrc, u6imm,
17908 /* DTSTDG */
17909 crrc, f8rc, u6imm,
17910 /* DTSTDGQ */
17911 crrc, fpairrc, u6imm,
17912 /* DTSTEX */
17913 crrc, f8rc, f8rc,
17914 /* DTSTEXQ */
17915 crrc, fpairrc, fpairrc,
17916 /* DTSTSF */
17917 crrc, f8rc, f8rc,
17918 /* DTSTSFI */
17919 crrc, u6imm, f8rc,
17920 /* DTSTSFIQ */
17921 crrc, u6imm, fpairrc,
17922 /* DTSTSFQ */
17923 crrc, f8rc, fpairrc,
17924 /* DXEX */
17925 f8rc, f8rc,
17926 /* DXEXQ */
17927 f8rc, fpairrc,
17928 /* DXEXQ_rec */
17929 f8rc, fpairrc,
17930 /* DXEX_rec */
17931 f8rc, f8rc,
17932 /* DYNALLOC */
17933 gprc, gprc, dispRI, ptr_rc_nor0,
17934 /* DYNALLOC8 */
17935 g8rc, g8rc, dispRI, ptr_rc_nor0,
17936 /* DYNAREAOFFSET */
17937 i32imm, dispRI, ptr_rc_nor0,
17938 /* DYNAREAOFFSET8 */
17939 i64imm, dispRI, ptr_rc_nor0,
17940 /* DecreaseCTR8loop */
17941 crbitrc, i64imm,
17942 /* DecreaseCTRloop */
17943 crbitrc, i32imm,
17944 /* EFDABS */
17945 sperc, sperc,
17946 /* EFDADD */
17947 sperc, sperc, sperc,
17948 /* EFDCFS */
17949 sperc, spe4rc,
17950 /* EFDCFSF */
17951 sperc, spe4rc,
17952 /* EFDCFSI */
17953 sperc, gprc,
17954 /* EFDCFSID */
17955 sperc, gprc,
17956 /* EFDCFUF */
17957 sperc, spe4rc,
17958 /* EFDCFUI */
17959 sperc, gprc,
17960 /* EFDCFUID */
17961 sperc, gprc,
17962 /* EFDCMPEQ */
17963 crrc, sperc, sperc,
17964 /* EFDCMPGT */
17965 crrc, sperc, sperc,
17966 /* EFDCMPLT */
17967 crrc, sperc, sperc,
17968 /* EFDCTSF */
17969 sperc, spe4rc,
17970 /* EFDCTSI */
17971 gprc, sperc,
17972 /* EFDCTSIDZ */
17973 gprc, sperc,
17974 /* EFDCTSIZ */
17975 gprc, sperc,
17976 /* EFDCTUF */
17977 sperc, spe4rc,
17978 /* EFDCTUI */
17979 gprc, sperc,
17980 /* EFDCTUIDZ */
17981 gprc, sperc,
17982 /* EFDCTUIZ */
17983 gprc, sperc,
17984 /* EFDDIV */
17985 sperc, sperc, sperc,
17986 /* EFDMUL */
17987 sperc, sperc, sperc,
17988 /* EFDNABS */
17989 sperc, sperc,
17990 /* EFDNEG */
17991 sperc, sperc,
17992 /* EFDSUB */
17993 sperc, sperc, sperc,
17994 /* EFDTSTEQ */
17995 crrc, sperc, sperc,
17996 /* EFDTSTGT */
17997 crrc, sperc, sperc,
17998 /* EFDTSTLT */
17999 crrc, sperc, sperc,
18000 /* EFSABS */
18001 spe4rc, spe4rc,
18002 /* EFSADD */
18003 spe4rc, spe4rc, spe4rc,
18004 /* EFSCFD */
18005 spe4rc, sperc,
18006 /* EFSCFSF */
18007 spe4rc, spe4rc,
18008 /* EFSCFSI */
18009 spe4rc, gprc,
18010 /* EFSCFUF */
18011 spe4rc, spe4rc,
18012 /* EFSCFUI */
18013 spe4rc, gprc,
18014 /* EFSCMPEQ */
18015 crrc, spe4rc, spe4rc,
18016 /* EFSCMPGT */
18017 crrc, spe4rc, spe4rc,
18018 /* EFSCMPLT */
18019 crrc, spe4rc, spe4rc,
18020 /* EFSCTSF */
18021 spe4rc, spe4rc,
18022 /* EFSCTSI */
18023 gprc, spe4rc,
18024 /* EFSCTSIZ */
18025 gprc, spe4rc,
18026 /* EFSCTUF */
18027 sperc, spe4rc,
18028 /* EFSCTUI */
18029 gprc, spe4rc,
18030 /* EFSCTUIZ */
18031 gprc, spe4rc,
18032 /* EFSDIV */
18033 spe4rc, spe4rc, spe4rc,
18034 /* EFSMUL */
18035 spe4rc, spe4rc, spe4rc,
18036 /* EFSNABS */
18037 spe4rc, spe4rc,
18038 /* EFSNEG */
18039 spe4rc, spe4rc,
18040 /* EFSSUB */
18041 spe4rc, spe4rc, spe4rc,
18042 /* EFSTSTEQ */
18043 crrc, sperc, sperc,
18044 /* EFSTSTGT */
18045 crrc, sperc, sperc,
18046 /* EFSTSTLT */
18047 crrc, sperc, sperc,
18048 /* EH_SjLj_LongJmp32 */
18049 ptr_rc_nor0,
18050 /* EH_SjLj_LongJmp64 */
18051 ptr_rc_nor0,
18052 /* EH_SjLj_SetJmp32 */
18053 gprc, ptr_rc_nor0,
18054 /* EH_SjLj_SetJmp64 */
18055 gprc, ptr_rc_nor0,
18056 /* EH_SjLj_Setup */
18057 directbrtarget,
18058 /* EQV */
18059 gprc, gprc, gprc,
18060 /* EQV8 */
18061 g8rc, g8rc, g8rc,
18062 /* EQV8_rec */
18063 g8rc, g8rc, g8rc,
18064 /* EQV_rec */
18065 gprc, gprc, gprc,
18066 /* EVABS */
18067 sperc, sperc,
18068 /* EVADDIW */
18069 sperc, sperc, u5imm,
18070 /* EVADDSMIAAW */
18071 sperc, sperc,
18072 /* EVADDSSIAAW */
18073 sperc, sperc,
18074 /* EVADDUMIAAW */
18075 sperc, sperc,
18076 /* EVADDUSIAAW */
18077 sperc, sperc,
18078 /* EVADDW */
18079 sperc, sperc, sperc,
18080 /* EVAND */
18081 sperc, sperc, sperc,
18082 /* EVANDC */
18083 sperc, sperc, sperc,
18084 /* EVCMPEQ */
18085 crrc, sperc, sperc,
18086 /* EVCMPGTS */
18087 crrc, sperc, sperc,
18088 /* EVCMPGTU */
18089 crrc, sperc, sperc,
18090 /* EVCMPLTS */
18091 crrc, sperc, sperc,
18092 /* EVCMPLTU */
18093 crrc, sperc, sperc,
18094 /* EVCNTLSW */
18095 sperc, sperc,
18096 /* EVCNTLZW */
18097 sperc, sperc,
18098 /* EVDIVWS */
18099 sperc, sperc, sperc,
18100 /* EVDIVWU */
18101 sperc, sperc, sperc,
18102 /* EVEQV */
18103 sperc, sperc, sperc,
18104 /* EVEXTSB */
18105 sperc, sperc,
18106 /* EVEXTSH */
18107 sperc, sperc,
18108 /* EVFSABS */
18109 sperc, sperc,
18110 /* EVFSADD */
18111 sperc, sperc, sperc,
18112 /* EVFSCFSF */
18113 sperc, sperc,
18114 /* EVFSCFSI */
18115 sperc, sperc,
18116 /* EVFSCFUF */
18117 sperc, sperc,
18118 /* EVFSCFUI */
18119 sperc, sperc,
18120 /* EVFSCMPEQ */
18121 crrc, sperc, sperc,
18122 /* EVFSCMPGT */
18123 crrc, sperc, sperc,
18124 /* EVFSCMPLT */
18125 crrc, sperc, sperc,
18126 /* EVFSCTSF */
18127 sperc, sperc,
18128 /* EVFSCTSI */
18129 sperc, sperc,
18130 /* EVFSCTSIZ */
18131 sperc, sperc,
18132 /* EVFSCTUF */
18133 sperc, sperc,
18134 /* EVFSCTUI */
18135 sperc, sperc,
18136 /* EVFSCTUIZ */
18137 sperc, sperc,
18138 /* EVFSDIV */
18139 sperc, sperc, sperc,
18140 /* EVFSMUL */
18141 sperc, sperc, sperc,
18142 /* EVFSNABS */
18143 sperc, sperc,
18144 /* EVFSNEG */
18145 sperc, sperc,
18146 /* EVFSSUB */
18147 sperc, sperc, sperc,
18148 /* EVFSTSTEQ */
18149 crrc, sperc, sperc,
18150 /* EVFSTSTGT */
18151 crrc, sperc, sperc,
18152 /* EVFSTSTLT */
18153 crrc, sperc, sperc,
18154 /* EVLDD */
18155 sperc, dispSPE8, ptr_rc_nor0,
18156 /* EVLDDX */
18157 sperc, ptr_rc_nor0, ptr_rc_idx,
18158 /* EVLDH */
18159 sperc, dispSPE8, ptr_rc_nor0,
18160 /* EVLDHX */
18161 sperc, ptr_rc_nor0, ptr_rc_idx,
18162 /* EVLDW */
18163 sperc, dispSPE8, ptr_rc_nor0,
18164 /* EVLDWX */
18165 sperc, ptr_rc_nor0, ptr_rc_idx,
18166 /* EVLHHESPLAT */
18167 sperc, dispSPE2, ptr_rc_nor0,
18168 /* EVLHHESPLATX */
18169 sperc, ptr_rc_nor0, ptr_rc_idx,
18170 /* EVLHHOSSPLAT */
18171 sperc, dispSPE2, ptr_rc_nor0,
18172 /* EVLHHOSSPLATX */
18173 sperc, ptr_rc_nor0, ptr_rc_idx,
18174 /* EVLHHOUSPLAT */
18175 sperc, dispSPE2, ptr_rc_nor0,
18176 /* EVLHHOUSPLATX */
18177 sperc, ptr_rc_nor0, ptr_rc_idx,
18178 /* EVLWHE */
18179 sperc, dispSPE4, ptr_rc_nor0,
18180 /* EVLWHEX */
18181 sperc, ptr_rc_nor0, ptr_rc_idx,
18182 /* EVLWHOS */
18183 sperc, dispSPE4, ptr_rc_nor0,
18184 /* EVLWHOSX */
18185 sperc, ptr_rc_nor0, ptr_rc_idx,
18186 /* EVLWHOU */
18187 sperc, dispSPE4, ptr_rc_nor0,
18188 /* EVLWHOUX */
18189 sperc, ptr_rc_nor0, ptr_rc_idx,
18190 /* EVLWHSPLAT */
18191 sperc, dispSPE4, ptr_rc_nor0,
18192 /* EVLWHSPLATX */
18193 sperc, ptr_rc_nor0, ptr_rc_idx,
18194 /* EVLWWSPLAT */
18195 sperc, dispSPE4, ptr_rc_nor0,
18196 /* EVLWWSPLATX */
18197 sperc, ptr_rc_nor0, ptr_rc_idx,
18198 /* EVMERGEHI */
18199 sperc, sperc, sperc,
18200 /* EVMERGEHILO */
18201 sperc, sperc, sperc,
18202 /* EVMERGELO */
18203 sperc, gprc, gprc,
18204 /* EVMERGELOHI */
18205 sperc, sperc, sperc,
18206 /* EVMHEGSMFAA */
18207 sperc, sperc, sperc,
18208 /* EVMHEGSMFAN */
18209 sperc, sperc, sperc,
18210 /* EVMHEGSMIAA */
18211 sperc, sperc, sperc,
18212 /* EVMHEGSMIAN */
18213 sperc, sperc, sperc,
18214 /* EVMHEGUMIAA */
18215 sperc, sperc, sperc,
18216 /* EVMHEGUMIAN */
18217 sperc, sperc, sperc,
18218 /* EVMHESMF */
18219 sperc, sperc, sperc,
18220 /* EVMHESMFA */
18221 sperc, sperc, sperc,
18222 /* EVMHESMFAAW */
18223 sperc, sperc, sperc,
18224 /* EVMHESMFANW */
18225 sperc, sperc, sperc,
18226 /* EVMHESMI */
18227 sperc, sperc, sperc,
18228 /* EVMHESMIA */
18229 sperc, sperc, sperc,
18230 /* EVMHESMIAAW */
18231 sperc, sperc, sperc,
18232 /* EVMHESMIANW */
18233 sperc, sperc, sperc,
18234 /* EVMHESSF */
18235 sperc, sperc, sperc,
18236 /* EVMHESSFA */
18237 sperc, sperc, sperc,
18238 /* EVMHESSFAAW */
18239 sperc, sperc, sperc,
18240 /* EVMHESSFANW */
18241 sperc, sperc, sperc,
18242 /* EVMHESSIAAW */
18243 sperc, sperc, sperc,
18244 /* EVMHESSIANW */
18245 sperc, sperc, sperc,
18246 /* EVMHEUMI */
18247 sperc, sperc, sperc,
18248 /* EVMHEUMIA */
18249 sperc, sperc, sperc,
18250 /* EVMHEUMIAAW */
18251 sperc, sperc, sperc,
18252 /* EVMHEUMIANW */
18253 sperc, sperc, sperc,
18254 /* EVMHEUSIAAW */
18255 sperc, sperc, sperc,
18256 /* EVMHEUSIANW */
18257 sperc, sperc, sperc,
18258 /* EVMHOGSMFAA */
18259 sperc, sperc, sperc,
18260 /* EVMHOGSMFAN */
18261 sperc, sperc, sperc,
18262 /* EVMHOGSMIAA */
18263 sperc, sperc, sperc,
18264 /* EVMHOGSMIAN */
18265 sperc, sperc, sperc,
18266 /* EVMHOGUMIAA */
18267 sperc, sperc, sperc,
18268 /* EVMHOGUMIAN */
18269 sperc, sperc, sperc,
18270 /* EVMHOSMF */
18271 sperc, sperc, sperc,
18272 /* EVMHOSMFA */
18273 sperc, sperc, sperc,
18274 /* EVMHOSMFAAW */
18275 sperc, sperc, sperc,
18276 /* EVMHOSMFANW */
18277 sperc, sperc, sperc,
18278 /* EVMHOSMI */
18279 sperc, sperc, sperc,
18280 /* EVMHOSMIA */
18281 sperc, sperc, sperc,
18282 /* EVMHOSMIAAW */
18283 sperc, sperc, sperc,
18284 /* EVMHOSMIANW */
18285 sperc, sperc, sperc,
18286 /* EVMHOSSF */
18287 sperc, sperc, sperc,
18288 /* EVMHOSSFA */
18289 sperc, sperc, sperc,
18290 /* EVMHOSSFAAW */
18291 sperc, sperc, sperc,
18292 /* EVMHOSSFANW */
18293 sperc, sperc, sperc,
18294 /* EVMHOSSIAAW */
18295 sperc, sperc, sperc,
18296 /* EVMHOSSIANW */
18297 sperc, sperc, sperc,
18298 /* EVMHOUMI */
18299 sperc, sperc, sperc,
18300 /* EVMHOUMIA */
18301 sperc, sperc, sperc,
18302 /* EVMHOUMIAAW */
18303 sperc, sperc, sperc,
18304 /* EVMHOUMIANW */
18305 sperc, sperc, sperc,
18306 /* EVMHOUSIAAW */
18307 sperc, sperc, sperc,
18308 /* EVMHOUSIANW */
18309 sperc, sperc, sperc,
18310 /* EVMRA */
18311 sperc, sperc,
18312 /* EVMWHSMF */
18313 sperc, sperc, sperc,
18314 /* EVMWHSMFA */
18315 sperc, sperc, sperc,
18316 /* EVMWHSMI */
18317 sperc, sperc, sperc,
18318 /* EVMWHSMIA */
18319 sperc, sperc, sperc,
18320 /* EVMWHSSF */
18321 sperc, sperc, sperc,
18322 /* EVMWHSSFA */
18323 sperc, sperc, sperc,
18324 /* EVMWHUMI */
18325 sperc, sperc, sperc,
18326 /* EVMWHUMIA */
18327 sperc, sperc, sperc,
18328 /* EVMWLSMIAAW */
18329 sperc, sperc, sperc,
18330 /* EVMWLSMIANW */
18331 sperc, sperc, sperc,
18332 /* EVMWLSSIAAW */
18333 sperc, sperc, sperc,
18334 /* EVMWLSSIANW */
18335 sperc, sperc, sperc,
18336 /* EVMWLUMI */
18337 sperc, sperc, sperc,
18338 /* EVMWLUMIA */
18339 sperc, sperc, sperc,
18340 /* EVMWLUMIAAW */
18341 sperc, sperc, sperc,
18342 /* EVMWLUMIANW */
18343 sperc, sperc, sperc,
18344 /* EVMWLUSIAAW */
18345 sperc, sperc, sperc,
18346 /* EVMWLUSIANW */
18347 sperc, sperc, sperc,
18348 /* EVMWSMF */
18349 sperc, sperc, sperc,
18350 /* EVMWSMFA */
18351 sperc, sperc, sperc,
18352 /* EVMWSMFAA */
18353 sperc, sperc, sperc,
18354 /* EVMWSMFAN */
18355 sperc, sperc, sperc,
18356 /* EVMWSMI */
18357 sperc, sperc, sperc,
18358 /* EVMWSMIA */
18359 sperc, sperc, sperc,
18360 /* EVMWSMIAA */
18361 sperc, sperc, sperc,
18362 /* EVMWSMIAN */
18363 sperc, sperc, sperc,
18364 /* EVMWSSF */
18365 sperc, sperc, sperc,
18366 /* EVMWSSFA */
18367 sperc, sperc, sperc,
18368 /* EVMWSSFAA */
18369 sperc, sperc, sperc,
18370 /* EVMWSSFAN */
18371 sperc, sperc, sperc,
18372 /* EVMWUMI */
18373 sperc, sperc, sperc,
18374 /* EVMWUMIA */
18375 sperc, sperc, sperc,
18376 /* EVMWUMIAA */
18377 sperc, sperc, sperc,
18378 /* EVMWUMIAN */
18379 sperc, sperc, sperc,
18380 /* EVNAND */
18381 sperc, sperc, sperc,
18382 /* EVNEG */
18383 sperc, sperc,
18384 /* EVNOR */
18385 sperc, sperc, sperc,
18386 /* EVOR */
18387 sperc, sperc, sperc,
18388 /* EVORC */
18389 sperc, sperc, sperc,
18390 /* EVRLW */
18391 sperc, sperc, sperc,
18392 /* EVRLWI */
18393 sperc, sperc, u5imm,
18394 /* EVRNDW */
18395 sperc, sperc,
18396 /* EVSEL */
18397 sperc, sperc, sperc, crrc,
18398 /* EVSLW */
18399 sperc, sperc, sperc,
18400 /* EVSLWI */
18401 sperc, sperc, u5imm,
18402 /* EVSPLATFI */
18403 sperc, s5imm,
18404 /* EVSPLATI */
18405 sperc, s5imm,
18406 /* EVSRWIS */
18407 sperc, sperc, u5imm,
18408 /* EVSRWIU */
18409 sperc, sperc, u5imm,
18410 /* EVSRWS */
18411 sperc, sperc, sperc,
18412 /* EVSRWU */
18413 sperc, sperc, sperc,
18414 /* EVSTDD */
18415 sperc, dispSPE8, ptr_rc_nor0,
18416 /* EVSTDDX */
18417 sperc, ptr_rc_nor0, ptr_rc_idx,
18418 /* EVSTDH */
18419 sperc, dispSPE8, ptr_rc_nor0,
18420 /* EVSTDHX */
18421 sperc, ptr_rc_nor0, ptr_rc_idx,
18422 /* EVSTDW */
18423 sperc, dispSPE8, ptr_rc_nor0,
18424 /* EVSTDWX */
18425 sperc, ptr_rc_nor0, ptr_rc_idx,
18426 /* EVSTWHE */
18427 sperc, dispSPE4, ptr_rc_nor0,
18428 /* EVSTWHEX */
18429 sperc, ptr_rc_nor0, ptr_rc_idx,
18430 /* EVSTWHO */
18431 sperc, dispSPE4, ptr_rc_nor0,
18432 /* EVSTWHOX */
18433 sperc, ptr_rc_nor0, ptr_rc_idx,
18434 /* EVSTWWE */
18435 sperc, dispSPE4, ptr_rc_nor0,
18436 /* EVSTWWEX */
18437 sperc, ptr_rc_nor0, ptr_rc_idx,
18438 /* EVSTWWO */
18439 sperc, dispSPE4, ptr_rc_nor0,
18440 /* EVSTWWOX */
18441 sperc, ptr_rc_nor0, ptr_rc_idx,
18442 /* EVSUBFSMIAAW */
18443 sperc, sperc,
18444 /* EVSUBFSSIAAW */
18445 sperc, sperc,
18446 /* EVSUBFUMIAAW */
18447 sperc, sperc,
18448 /* EVSUBFUSIAAW */
18449 sperc, sperc,
18450 /* EVSUBFW */
18451 sperc, sperc, sperc,
18452 /* EVSUBIFW */
18453 sperc, u5imm, sperc,
18454 /* EVXOR */
18455 sperc, sperc, sperc,
18456 /* EXTSB */
18457 gprc, gprc,
18458 /* EXTSB8 */
18459 g8rc, g8rc,
18460 /* EXTSB8_32_64 */
18461 g8rc, gprc,
18462 /* EXTSB8_rec */
18463 g8rc, g8rc,
18464 /* EXTSB_rec */
18465 gprc, gprc,
18466 /* EXTSH */
18467 gprc, gprc,
18468 /* EXTSH8 */
18469 g8rc, g8rc,
18470 /* EXTSH8_32_64 */
18471 g8rc, gprc,
18472 /* EXTSH8_rec */
18473 g8rc, g8rc,
18474 /* EXTSH_rec */
18475 gprc, gprc,
18476 /* EXTSW */
18477 g8rc, g8rc,
18478 /* EXTSWSLI */
18479 g8rc, g8rc, u6imm,
18480 /* EXTSWSLI_32_64 */
18481 g8rc, gprc, u6imm,
18482 /* EXTSWSLI_32_64_rec */
18483 g8rc, gprc, u6imm,
18484 /* EXTSWSLI_rec */
18485 g8rc, g8rc, u6imm,
18486 /* EXTSW_32 */
18487 gprc, gprc,
18488 /* EXTSW_32_64 */
18489 g8rc, gprc,
18490 /* EXTSW_32_64_rec */
18491 g8rc, gprc,
18492 /* EXTSW_rec */
18493 g8rc, g8rc,
18494 /* EnforceIEIO */
18495 /* FABSD */
18496 f8rc, f8rc,
18497 /* FABSD_rec */
18498 f8rc, f8rc,
18499 /* FABSS */
18500 f4rc, f4rc,
18501 /* FABSS_rec */
18502 f4rc, f4rc,
18503 /* FADD */
18504 f8rc, f8rc, f8rc,
18505 /* FADDS */
18506 f4rc, f4rc, f4rc,
18507 /* FADDS_rec */
18508 f4rc, f4rc, f4rc,
18509 /* FADD_rec */
18510 f8rc, f8rc, f8rc,
18511 /* FADDrtz */
18512 f8rc, f8rc, f8rc,
18513 /* FCFID */
18514 f8rc, f8rc,
18515 /* FCFIDS */
18516 f4rc, f8rc,
18517 /* FCFIDS_rec */
18518 f4rc, f8rc,
18519 /* FCFIDU */
18520 f8rc, f8rc,
18521 /* FCFIDUS */
18522 f4rc, f8rc,
18523 /* FCFIDUS_rec */
18524 f4rc, f8rc,
18525 /* FCFIDU_rec */
18526 f8rc, f8rc,
18527 /* FCFID_rec */
18528 f8rc, f8rc,
18529 /* FCMPOD */
18530 crrc, f8rc, f8rc,
18531 /* FCMPOS */
18532 crrc, f4rc, f4rc,
18533 /* FCMPUD */
18534 crrc, f8rc, f8rc,
18535 /* FCMPUS */
18536 crrc, f4rc, f4rc,
18537 /* FCPSGND */
18538 f8rc, f8rc, f8rc,
18539 /* FCPSGND_rec */
18540 f8rc, f8rc, f8rc,
18541 /* FCPSGNS */
18542 f4rc, f4rc, f4rc,
18543 /* FCPSGNS_rec */
18544 f4rc, f4rc, f4rc,
18545 /* FCTID */
18546 f8rc, f8rc,
18547 /* FCTIDU */
18548 f8rc, f8rc,
18549 /* FCTIDUZ */
18550 f8rc, f8rc,
18551 /* FCTIDUZ_rec */
18552 f8rc, f8rc,
18553 /* FCTIDU_rec */
18554 f8rc, f8rc,
18555 /* FCTIDZ */
18556 f8rc, f8rc,
18557 /* FCTIDZ_rec */
18558 f8rc, f8rc,
18559 /* FCTID_rec */
18560 f8rc, f8rc,
18561 /* FCTIW */
18562 f8rc, f8rc,
18563 /* FCTIWU */
18564 f8rc, f8rc,
18565 /* FCTIWUZ */
18566 f8rc, f8rc,
18567 /* FCTIWUZ_rec */
18568 f8rc, f8rc,
18569 /* FCTIWU_rec */
18570 f8rc, f8rc,
18571 /* FCTIWZ */
18572 f8rc, f8rc,
18573 /* FCTIWZ_rec */
18574 f8rc, f8rc,
18575 /* FCTIW_rec */
18576 f8rc, f8rc,
18577 /* FDIV */
18578 f8rc, f8rc, f8rc,
18579 /* FDIVS */
18580 f4rc, f4rc, f4rc,
18581 /* FDIVS_rec */
18582 f4rc, f4rc, f4rc,
18583 /* FDIV_rec */
18584 f8rc, f8rc, f8rc,
18585 /* FENCE */
18586 /* FMADD */
18587 f8rc, f8rc, f8rc, f8rc,
18588 /* FMADDS */
18589 f4rc, f4rc, f4rc, f4rc,
18590 /* FMADDS_rec */
18591 f4rc, f4rc, f4rc, f4rc,
18592 /* FMADD_rec */
18593 f8rc, f8rc, f8rc, f8rc,
18594 /* FMR */
18595 f4rc, f4rc,
18596 /* FMR_rec */
18597 f4rc, f4rc,
18598 /* FMSUB */
18599 f8rc, f8rc, f8rc, f8rc,
18600 /* FMSUBS */
18601 f4rc, f4rc, f4rc, f4rc,
18602 /* FMSUBS_rec */
18603 f4rc, f4rc, f4rc, f4rc,
18604 /* FMSUB_rec */
18605 f8rc, f8rc, f8rc, f8rc,
18606 /* FMUL */
18607 f8rc, f8rc, f8rc,
18608 /* FMULS */
18609 f4rc, f4rc, f4rc,
18610 /* FMULS_rec */
18611 f4rc, f4rc, f4rc,
18612 /* FMUL_rec */
18613 f8rc, f8rc, f8rc,
18614 /* FNABSD */
18615 f8rc, f8rc,
18616 /* FNABSD_rec */
18617 f8rc, f8rc,
18618 /* FNABSS */
18619 f4rc, f4rc,
18620 /* FNABSS_rec */
18621 f4rc, f4rc,
18622 /* FNEGD */
18623 f8rc, f8rc,
18624 /* FNEGD_rec */
18625 f8rc, f8rc,
18626 /* FNEGS */
18627 f4rc, f4rc,
18628 /* FNEGS_rec */
18629 f4rc, f4rc,
18630 /* FNMADD */
18631 f8rc, f8rc, f8rc, f8rc,
18632 /* FNMADDS */
18633 f4rc, f4rc, f4rc, f4rc,
18634 /* FNMADDS_rec */
18635 f4rc, f4rc, f4rc, f4rc,
18636 /* FNMADD_rec */
18637 f8rc, f8rc, f8rc, f8rc,
18638 /* FNMSUB */
18639 f8rc, f8rc, f8rc, f8rc,
18640 /* FNMSUBS */
18641 f4rc, f4rc, f4rc, f4rc,
18642 /* FNMSUBS_rec */
18643 f4rc, f4rc, f4rc, f4rc,
18644 /* FNMSUB_rec */
18645 f8rc, f8rc, f8rc, f8rc,
18646 /* FRE */
18647 f8rc, f8rc,
18648 /* FRES */
18649 f4rc, f4rc,
18650 /* FRES_rec */
18651 f4rc, f4rc,
18652 /* FRE_rec */
18653 f8rc, f8rc,
18654 /* FRIMD */
18655 f8rc, f8rc,
18656 /* FRIMD_rec */
18657 f8rc, f8rc,
18658 /* FRIMS */
18659 f4rc, f4rc,
18660 /* FRIMS_rec */
18661 f4rc, f4rc,
18662 /* FRIND */
18663 f8rc, f8rc,
18664 /* FRIND_rec */
18665 f8rc, f8rc,
18666 /* FRINS */
18667 f4rc, f4rc,
18668 /* FRINS_rec */
18669 f4rc, f4rc,
18670 /* FRIPD */
18671 f8rc, f8rc,
18672 /* FRIPD_rec */
18673 f8rc, f8rc,
18674 /* FRIPS */
18675 f4rc, f4rc,
18676 /* FRIPS_rec */
18677 f4rc, f4rc,
18678 /* FRIZD */
18679 f8rc, f8rc,
18680 /* FRIZD_rec */
18681 f8rc, f8rc,
18682 /* FRIZS */
18683 f4rc, f4rc,
18684 /* FRIZS_rec */
18685 f4rc, f4rc,
18686 /* FRSP */
18687 f4rc, f8rc,
18688 /* FRSP_rec */
18689 f4rc, f8rc,
18690 /* FRSQRTE */
18691 f8rc, f8rc,
18692 /* FRSQRTES */
18693 f4rc, f4rc,
18694 /* FRSQRTES_rec */
18695 f4rc, f4rc,
18696 /* FRSQRTE_rec */
18697 f8rc, f8rc,
18698 /* FSELD */
18699 f8rc, f8rc, f8rc, f8rc,
18700 /* FSELD_rec */
18701 f8rc, f8rc, f8rc, f8rc,
18702 /* FSELS */
18703 f4rc, f8rc, f4rc, f4rc,
18704 /* FSELS_rec */
18705 f4rc, f8rc, f4rc, f4rc,
18706 /* FSQRT */
18707 f8rc, f8rc,
18708 /* FSQRTS */
18709 f4rc, f4rc,
18710 /* FSQRTS_rec */
18711 f4rc, f4rc,
18712 /* FSQRT_rec */
18713 f8rc, f8rc,
18714 /* FSUB */
18715 f8rc, f8rc, f8rc,
18716 /* FSUBS */
18717 f4rc, f4rc, f4rc,
18718 /* FSUBS_rec */
18719 f4rc, f4rc, f4rc,
18720 /* FSUB_rec */
18721 f8rc, f8rc, f8rc,
18722 /* FTDIV */
18723 crrc, f8rc, f8rc,
18724 /* FTSQRT */
18725 crrc, f8rc,
18726 /* GETtlsADDR */
18727 g8rc, g8rc, tlsgd,
18728 /* GETtlsADDR32 */
18729 gprc, gprc, tlsgd32,
18730 /* GETtlsADDR32AIX */
18731 gprc, gprc, gprc,
18732 /* GETtlsADDR64AIX */
18733 g8rc, g8rc, g8rc,
18734 /* GETtlsADDRPCREL */
18735 g8rc, g8rc, tlsgd,
18736 /* GETtlsMOD32AIX */
18737 gprc, gprc,
18738 /* GETtlsMOD64AIX */
18739 g8rc, g8rc,
18740 /* GETtlsTpointer32AIX */
18741 gprc,
18742 /* GETtlsldADDR */
18743 g8rc, g8rc, tlsgd,
18744 /* GETtlsldADDR32 */
18745 gprc, gprc, tlsgd32,
18746 /* GETtlsldADDRPCREL */
18747 g8rc, g8rc, tlsgd,
18748 /* HASHCHK */
18749 gprc, dispRIHash, ptr_rc_nor0,
18750 /* HASHCHK8 */
18751 g8rc, dispRIHash, ptr_rc_nor0,
18752 /* HASHCHKP */
18753 gprc, dispRIHash, ptr_rc_nor0,
18754 /* HASHCHKP8 */
18755 g8rc, dispRIHash, ptr_rc_nor0,
18756 /* HASHST */
18757 gprc, dispRIHash, ptr_rc_nor0,
18758 /* HASHST8 */
18759 g8rc, dispRIHash, ptr_rc_nor0,
18760 /* HASHSTP */
18761 gprc, dispRIHash, ptr_rc_nor0,
18762 /* HASHSTP8 */
18763 g8rc, dispRIHash, ptr_rc_nor0,
18764 /* HRFID */
18765 /* ICBI */
18766 ptr_rc_nor0, ptr_rc_idx,
18767 /* ICBIEP */
18768 ptr_rc_nor0, ptr_rc_idx,
18769 /* ICBLC */
18770 u4imm, ptr_rc_nor0, ptr_rc_idx,
18771 /* ICBLQ */
18772 u4imm, ptr_rc_nor0, ptr_rc_idx,
18773 /* ICBT */
18774 u4imm, ptr_rc_nor0, ptr_rc_idx,
18775 /* ICBTLS */
18776 u4imm, ptr_rc_nor0, ptr_rc_idx,
18777 /* ICCCI */
18778 gprc, gprc,
18779 /* ISEL */
18780 gprc, gprc_nor0, gprc, crbitrc,
18781 /* ISEL8 */
18782 g8rc, g8rc_nox0, g8rc, crbitrc,
18783 /* ISYNC */
18784 /* LA */
18785 gprc, gprc_nor0, s16imm,
18786 /* LA8 */
18787 g8rc, g8rc_nox0, s16imm64,
18788 /* LBARX */
18789 gprc, ptr_rc_nor0, ptr_rc_idx,
18790 /* LBARXL */
18791 gprc, ptr_rc_nor0, ptr_rc_idx,
18792 /* LBEPX */
18793 gprc, ptr_rc_nor0, ptr_rc_idx,
18794 /* LBZ */
18795 gprc, dispRI, ptr_rc_nor0,
18796 /* LBZ8 */
18797 g8rc, dispRI, ptr_rc_nor0,
18798 /* LBZCIX */
18799 gprc, gprc, gprc,
18800 /* LBZU */
18801 gprc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
18802 /* LBZU8 */
18803 g8rc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
18804 /* LBZUX */
18805 gprc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
18806 /* LBZUX8 */
18807 g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
18808 /* LBZX */
18809 gprc, ptr_rc_nor0, ptr_rc_idx,
18810 /* LBZX8 */
18811 g8rc, ptr_rc_nor0, ptr_rc_idx,
18812 /* LBZXTLS */
18813 g8rc, ptr_rc_nor0, tlsreg,
18814 /* LBZXTLS_ */
18815 g8rc, ptr_rc_nor0, tlsreg,
18816 /* LBZXTLS_32 */
18817 gprc, ptr_rc_nor0, tlsreg,
18818 /* LD */
18819 g8rc, dispRIX, ptr_rc_nor0,
18820 /* LDARX */
18821 g8rc, ptr_rc_nor0, ptr_rc_idx,
18822 /* LDARXL */
18823 g8rc, ptr_rc_nor0, ptr_rc_idx,
18824 /* LDAT */
18825 g8rc, g8rc, u5imm,
18826 /* LDBRX */
18827 g8rc, ptr_rc_nor0, ptr_rc_idx,
18828 /* LDCIX */
18829 gprc, gprc, gprc,
18830 /* LDU */
18831 g8rc, ptr_rc_nor0, dispRIX, ptr_rc_nor0,
18832 /* LDUX */
18833 g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
18834 /* LDX */
18835 g8rc, ptr_rc_nor0, ptr_rc_idx,
18836 /* LDXTLS */
18837 g8rc, ptr_rc_nor0, tlsreg,
18838 /* LDXTLS_ */
18839 g8rc, ptr_rc_nor0, tlsreg,
18840 /* LDgotTprelL */
18841 g8rc_nox0, s16imm64, g8rc_nox0,
18842 /* LDgotTprelL32 */
18843 gprc_nor0, s16imm, gprc_nor0,
18844 /* LDtoc */
18845 g8rc, i64imm, g8rc,
18846 /* LDtocBA */
18847 g8rc, i64imm, g8rc,
18848 /* LDtocCPT */
18849 g8rc, i64imm, g8rc,
18850 /* LDtocJTI */
18851 g8rc, i64imm, g8rc,
18852 /* LDtocL */
18853 g8rc, i64imm, g8rc_nox0,
18854 /* LFD */
18855 f8rc, dispRI, ptr_rc_nor0,
18856 /* LFDEPX */
18857 f8rc, ptr_rc_nor0, ptr_rc_idx,
18858 /* LFDU */
18859 f8rc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
18860 /* LFDUX */
18861 f8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
18862 /* LFDX */
18863 f8rc, ptr_rc_nor0, ptr_rc_idx,
18864 /* LFDXTLS */
18865 f8rc, ptr_rc_nor0, tlsreg,
18866 /* LFDXTLS_ */
18867 f8rc, ptr_rc_nor0, tlsreg,
18868 /* LFIWAX */
18869 f8rc, ptr_rc_nor0, ptr_rc_idx,
18870 /* LFIWZX */
18871 f8rc, ptr_rc_nor0, ptr_rc_idx,
18872 /* LFS */
18873 f4rc, dispRI, ptr_rc_nor0,
18874 /* LFSU */
18875 f4rc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
18876 /* LFSUX */
18877 f4rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
18878 /* LFSX */
18879 f4rc, ptr_rc_nor0, ptr_rc_idx,
18880 /* LFSXTLS */
18881 f4rc, ptr_rc_nor0, tlsreg,
18882 /* LFSXTLS_ */
18883 f4rc, ptr_rc_nor0, tlsreg,
18884 /* LHA */
18885 gprc, dispRI, ptr_rc_nor0,
18886 /* LHA8 */
18887 g8rc, dispRI, ptr_rc_nor0,
18888 /* LHARX */
18889 gprc, ptr_rc_nor0, ptr_rc_idx,
18890 /* LHARXL */
18891 gprc, ptr_rc_nor0, ptr_rc_idx,
18892 /* LHAU */
18893 gprc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
18894 /* LHAU8 */
18895 g8rc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
18896 /* LHAUX */
18897 gprc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
18898 /* LHAUX8 */
18899 g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
18900 /* LHAX */
18901 gprc, ptr_rc_nor0, ptr_rc_idx,
18902 /* LHAX8 */
18903 g8rc, ptr_rc_nor0, ptr_rc_idx,
18904 /* LHAXTLS */
18905 g8rc, ptr_rc_nor0, tlsreg,
18906 /* LHAXTLS_ */
18907 g8rc, ptr_rc_nor0, tlsreg,
18908 /* LHAXTLS_32 */
18909 gprc, ptr_rc_nor0, tlsreg,
18910 /* LHBRX */
18911 gprc, ptr_rc_nor0, ptr_rc_idx,
18912 /* LHBRX8 */
18913 g8rc, ptr_rc_nor0, ptr_rc_idx,
18914 /* LHEPX */
18915 gprc, ptr_rc_nor0, ptr_rc_idx,
18916 /* LHZ */
18917 gprc, dispRI, ptr_rc_nor0,
18918 /* LHZ8 */
18919 g8rc, dispRI, ptr_rc_nor0,
18920 /* LHZCIX */
18921 gprc, gprc, gprc,
18922 /* LHZU */
18923 gprc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
18924 /* LHZU8 */
18925 g8rc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
18926 /* LHZUX */
18927 gprc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
18928 /* LHZUX8 */
18929 g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
18930 /* LHZX */
18931 gprc, ptr_rc_nor0, ptr_rc_idx,
18932 /* LHZX8 */
18933 g8rc, ptr_rc_nor0, ptr_rc_idx,
18934 /* LHZXTLS */
18935 g8rc, ptr_rc_nor0, tlsreg,
18936 /* LHZXTLS_ */
18937 g8rc, ptr_rc_nor0, tlsreg,
18938 /* LHZXTLS_32 */
18939 gprc, ptr_rc_nor0, tlsreg,
18940 /* LI */
18941 gprc, s16imm,
18942 /* LI8 */
18943 g8rc, s16imm64,
18944 /* LIS */
18945 gprc, s17imm,
18946 /* LIS8 */
18947 g8rc, s17imm64,
18948 /* LMW */
18949 gprc, dispRI, ptr_rc_nor0,
18950 /* LQ */
18951 g8prc, dispRIX16, ptr_rc_nor0,
18952 /* LQARX */
18953 g8prc, ptr_rc_nor0, ptr_rc_idx,
18954 /* LQARXL */
18955 g8prc, ptr_rc_nor0, ptr_rc_idx,
18956 /* LQX_PSEUDO */
18957 g8prc, ptr_rc_nor0, ptr_rc_idx,
18958 /* LSWI */
18959 gprc, gprc, u5imm,
18960 /* LVEBX */
18961 vrrc, ptr_rc_nor0, ptr_rc_idx,
18962 /* LVEHX */
18963 vrrc, ptr_rc_nor0, ptr_rc_idx,
18964 /* LVEWX */
18965 vrrc, ptr_rc_nor0, ptr_rc_idx,
18966 /* LVSL */
18967 vrrc, ptr_rc_nor0, ptr_rc_idx,
18968 /* LVSR */
18969 vrrc, ptr_rc_nor0, ptr_rc_idx,
18970 /* LVX */
18971 vrrc, ptr_rc_nor0, ptr_rc_idx,
18972 /* LVXL */
18973 vrrc, ptr_rc_nor0, ptr_rc_idx,
18974 /* LWA */
18975 g8rc, dispRIX, ptr_rc_nor0,
18976 /* LWARX */
18977 gprc, ptr_rc_nor0, ptr_rc_idx,
18978 /* LWARXL */
18979 gprc, ptr_rc_nor0, ptr_rc_idx,
18980 /* LWAT */
18981 gprc, gprc, u5imm,
18982 /* LWAUX */
18983 g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
18984 /* LWAX */
18985 g8rc, ptr_rc_nor0, ptr_rc_idx,
18986 /* LWAXTLS */
18987 g8rc, ptr_rc_nor0, tlsreg,
18988 /* LWAXTLS_ */
18989 g8rc, ptr_rc_nor0, tlsreg,
18990 /* LWAXTLS_32 */
18991 gprc, ptr_rc_nor0, tlsreg,
18992 /* LWAX_32 */
18993 gprc, ptr_rc_nor0, ptr_rc_idx,
18994 /* LWA_32 */
18995 gprc, dispRIX, ptr_rc_nor0,
18996 /* LWBRX */
18997 gprc, ptr_rc_nor0, ptr_rc_idx,
18998 /* LWBRX8 */
18999 g8rc, ptr_rc_nor0, ptr_rc_idx,
19000 /* LWEPX */
19001 gprc, ptr_rc_nor0, ptr_rc_idx,
19002 /* LWZ */
19003 gprc, dispRI, ptr_rc_nor0,
19004 /* LWZ8 */
19005 g8rc, dispRI, ptr_rc_nor0,
19006 /* LWZCIX */
19007 gprc, gprc, gprc,
19008 /* LWZU */
19009 gprc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
19010 /* LWZU8 */
19011 g8rc, ptr_rc_nor0, dispRI, ptr_rc_nor0,
19012 /* LWZUX */
19013 gprc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
19014 /* LWZUX8 */
19015 g8rc, ptr_rc_nor0, ptr_rc_nor0, ptr_rc_idx,
19016 /* LWZX */
19017 gprc, ptr_rc_nor0, ptr_rc_idx,
19018 /* LWZX8 */
19019 g8rc, ptr_rc_nor0, ptr_rc_idx,
19020 /* LWZXTLS */
19021 g8rc, ptr_rc_nor0, tlsreg,
19022 /* LWZXTLS_ */
19023 g8rc, ptr_rc_nor0, tlsreg,
19024 /* LWZXTLS_32 */
19025 gprc, ptr_rc_nor0, tlsreg,
19026 /* LWZtoc */
19027 gprc, i32imm, gprc,
19028 /* LWZtocL */
19029 gprc, i32imm, gprc_nor0,
19030 /* LXSD */
19031 vfrc, dispRIX, ptr_rc_nor0,
19032 /* LXSDX */
19033 vsfrc, ptr_rc_nor0, ptr_rc_idx,
19034 /* LXSIBZX */
19035 vsfrc, ptr_rc_nor0, ptr_rc_idx,
19036 /* LXSIHZX */
19037 vsfrc, ptr_rc_nor0, ptr_rc_idx,
19038 /* LXSIWAX */
19039 vsfrc, ptr_rc_nor0, ptr_rc_idx,
19040 /* LXSIWZX */
19041 vsfrc, ptr_rc_nor0, ptr_rc_idx,
19042 /* LXSSP */
19043 vfrc, dispRIX, ptr_rc_nor0,
19044 /* LXSSPX */
19045 vssrc, ptr_rc_nor0, ptr_rc_idx,
19046 /* LXV */
19047 vsrc, dispRIX16, ptr_rc_nor0,
19048 /* LXVB16X */
19049 vsrc, ptr_rc_nor0, ptr_rc_idx,
19050 /* LXVD2X */
19051 vsrc, ptr_rc_nor0, ptr_rc_idx,
19052 /* LXVDSX */
19053 vsrc, ptr_rc_nor0, ptr_rc_idx,
19054 /* LXVH8X */
19055 vsrc, ptr_rc_nor0, ptr_rc_idx,
19056 /* LXVKQ */
19057 vsrc, u5imm,
19058 /* LXVL */
19059 vsrc, ptr_rc_nor0, g8rc,
19060 /* LXVLL */
19061 vsrc, ptr_rc_nor0, g8rc,
19062 /* LXVP */
19063 vsrprc, dispRIX16, ptr_rc_nor0,
19064 /* LXVPRL */
19065 vsrprc, ptr_rc_nor0, g8rc,
19066 /* LXVPRLL */
19067 vsrprc, ptr_rc_nor0, g8rc,
19068 /* LXVPX */
19069 vsrprc, ptr_rc_nor0, ptr_rc_idx,
19070 /* LXVRBX */
19071 vsrc, ptr_rc_nor0, ptr_rc_idx,
19072 /* LXVRDX */
19073 vsrc, ptr_rc_nor0, ptr_rc_idx,
19074 /* LXVRHX */
19075 vsrc, ptr_rc_nor0, ptr_rc_idx,
19076 /* LXVRL */
19077 vsrc, ptr_rc_nor0, g8rc,
19078 /* LXVRLL */
19079 vsrc, ptr_rc_nor0, g8rc,
19080 /* LXVRWX */
19081 vsrc, ptr_rc_nor0, ptr_rc_idx,
19082 /* LXVW4X */
19083 vsrc, ptr_rc_nor0, ptr_rc_idx,
19084 /* LXVWSX */
19085 vsrc, ptr_rc_nor0, ptr_rc_idx,
19086 /* LXVX */
19087 vsrc, ptr_rc_nor0, ptr_rc_idx,
19088 /* MADDHD */
19089 g8rc, g8rc, g8rc, g8rc,
19090 /* MADDHDU */
19091 g8rc, g8rc, g8rc, g8rc,
19092 /* MADDLD */
19093 gprc, gprc, gprc, gprc,
19094 /* MADDLD8 */
19095 g8rc, g8rc, g8rc, g8rc,
19096 /* MBAR */
19097 u5imm,
19098 /* MCRF */
19099 crrc, crrc,
19100 /* MCRFS */
19101 crrc, crrc,
19102 /* MCRXRX */
19103 crrc,
19104 /* MFBHRBE */
19105 gprc, u10imm, u10imm,
19106 /* MFCR */
19107 gprc,
19108 /* MFCR8 */
19109 g8rc,
19110 /* MFCTR */
19111 gprc,
19112 /* MFCTR8 */
19113 g8rc,
19114 /* MFDCR */
19115 gprc, i32imm,
19116 /* MFFS */
19117 f8rc,
19118 /* MFFSCDRN */
19119 f8rc, f8rc,
19120 /* MFFSCDRNI */
19121 f8rc, u3imm,
19122 /* MFFSCE */
19123 f8rc,
19124 /* MFFSCRN */
19125 f8rc, f8rc,
19126 /* MFFSCRNI */
19127 f8rc, u2imm,
19128 /* MFFSL */
19129 f8rc,
19130 /* MFFS_rec */
19131 f8rc,
19132 /* MFLR */
19133 gprc,
19134 /* MFLR8 */
19135 g8rc,
19136 /* MFMSR */
19137 gprc,
19138 /* MFOCRF */
19139 gprc, crbitm,
19140 /* MFOCRF8 */
19141 g8rc, crbitm,
19142 /* MFPMR */
19143 gprc, i32imm,
19144 /* MFSPR */
19145 gprc, i32imm,
19146 /* MFSPR8 */
19147 g8rc, i32imm,
19148 /* MFSR */
19149 gprc, u4imm,
19150 /* MFSRIN */
19151 gprc, gprc,
19152 /* MFTB */
19153 gprc, i32imm,
19154 /* MFTB8 */
19155 g8rc,
19156 /* MFUDSCR */
19157 gprc,
19158 /* MFVRD */
19159 g8rc, vsrc,
19160 /* MFVRSAVE */
19161 gprc,
19162 /* MFVRSAVEv */
19163 gprc, VRSAVERC,
19164 /* MFVRWZ */
19165 gprc, vsrc,
19166 /* MFVSCR */
19167 vrrc,
19168 /* MFVSRD */
19169 g8rc, vsfrc,
19170 /* MFVSRLD */
19171 g8rc, vsrc,
19172 /* MFVSRWZ */
19173 gprc, vsfrc,
19174 /* MODSD */
19175 g8rc, g8rc, g8rc,
19176 /* MODSW */
19177 gprc, gprc, gprc,
19178 /* MODUD */
19179 g8rc, g8rc, g8rc,
19180 /* MODUW */
19181 gprc, gprc, gprc,
19182 /* MSGSYNC */
19183 /* MSYNC */
19184 /* MTCRF */
19185 i32imm, gprc,
19186 /* MTCRF8 */
19187 i32imm, g8rc,
19188 /* MTCTR */
19189 gprc,
19190 /* MTCTR8 */
19191 g8rc,
19192 /* MTCTR8loop */
19193 g8rc,
19194 /* MTCTRloop */
19195 gprc,
19196 /* MTDCR */
19197 gprc, i32imm,
19198 /* MTFSB0 */
19199 u5imm,
19200 /* MTFSB1 */
19201 u5imm,
19202 /* MTFSF */
19203 i32imm, f8rc, u1imm, i32imm,
19204 /* MTFSFI */
19205 u3imm, u4imm, i32imm,
19206 /* MTFSFI_rec */
19207 u3imm, u4imm, u1imm,
19208 /* MTFSFIb */
19209 u3imm, u4imm,
19210 /* MTFSF_rec */
19211 i32imm, f8rc, u1imm, i32imm,
19212 /* MTFSFb */
19213 i32imm, f8rc,
19214 /* MTLR */
19215 gprc,
19216 /* MTLR8 */
19217 g8rc,
19218 /* MTMSR */
19219 gprc, u1imm,
19220 /* MTMSRD */
19221 gprc, u1imm,
19222 /* MTOCRF */
19223 crbitm, gprc,
19224 /* MTOCRF8 */
19225 crbitm, g8rc,
19226 /* MTPMR */
19227 i32imm, gprc,
19228 /* MTSPR */
19229 i32imm, gprc,
19230 /* MTSPR8 */
19231 i32imm, g8rc,
19232 /* MTSR */
19233 gprc, u4imm,
19234 /* MTSRIN */
19235 gprc, gprc,
19236 /* MTUDSCR */
19237 gprc,
19238 /* MTVRD */
19239 vsrc, g8rc,
19240 /* MTVRSAVE */
19241 gprc,
19242 /* MTVRSAVEv */
19243 VRSAVERC, gprc,
19244 /* MTVRWA */
19245 vsrc, gprc,
19246 /* MTVRWZ */
19247 vsrc, gprc,
19248 /* MTVSCR */
19249 vrrc,
19250 /* MTVSRBM */
19251 vrrc, g8rc,
19252 /* MTVSRBMI */
19253 vrrc, u16imm64,
19254 /* MTVSRD */
19255 vsfrc, g8rc,
19256 /* MTVSRDD */
19257 vsrc, g8rc_nox0, g8rc,
19258 /* MTVSRDM */
19259 vrrc, g8rc,
19260 /* MTVSRHM */
19261 vrrc, g8rc,
19262 /* MTVSRQM */
19263 vrrc, g8rc,
19264 /* MTVSRWA */
19265 vsfrc, gprc,
19266 /* MTVSRWM */
19267 vrrc, g8rc,
19268 /* MTVSRWS */
19269 vsrc, gprc,
19270 /* MTVSRWZ */
19271 vsfrc, gprc,
19272 /* MULHD */
19273 g8rc, g8rc, g8rc,
19274 /* MULHDU */
19275 g8rc, g8rc, g8rc,
19276 /* MULHDU_rec */
19277 g8rc, g8rc, g8rc,
19278 /* MULHD_rec */
19279 g8rc, g8rc, g8rc,
19280 /* MULHW */
19281 gprc, gprc, gprc,
19282 /* MULHWU */
19283 gprc, gprc, gprc,
19284 /* MULHWU_rec */
19285 gprc, gprc, gprc,
19286 /* MULHW_rec */
19287 gprc, gprc, gprc,
19288 /* MULLD */
19289 g8rc, g8rc, g8rc,
19290 /* MULLDO */
19291 g8rc, g8rc, g8rc,
19292 /* MULLDO_rec */
19293 g8rc, g8rc, g8rc,
19294 /* MULLD_rec */
19295 g8rc, g8rc, g8rc,
19296 /* MULLI */
19297 gprc, gprc, s16imm,
19298 /* MULLI8 */
19299 g8rc, g8rc, s16imm64,
19300 /* MULLW */
19301 gprc, gprc, gprc,
19302 /* MULLWO */
19303 gprc, gprc, gprc,
19304 /* MULLWO_rec */
19305 gprc, gprc, gprc,
19306 /* MULLW_rec */
19307 gprc, gprc, gprc,
19308 /* MoveGOTtoLR */
19309 /* MovePCtoLR */
19310 /* MovePCtoLR8 */
19311 /* NAND */
19312 gprc, gprc, gprc,
19313 /* NAND8 */
19314 g8rc, g8rc, g8rc,
19315 /* NAND8_rec */
19316 g8rc, g8rc, g8rc,
19317 /* NAND_rec */
19318 gprc, gprc, gprc,
19319 /* NAP */
19320 /* NEG */
19321 gprc, gprc,
19322 /* NEG8 */
19323 g8rc, g8rc,
19324 /* NEG8O */
19325 g8rc, g8rc,
19326 /* NEG8O_rec */
19327 g8rc, g8rc,
19328 /* NEG8_rec */
19329 g8rc, g8rc,
19330 /* NEGO */
19331 gprc, gprc,
19332 /* NEGO_rec */
19333 gprc, gprc,
19334 /* NEG_rec */
19335 gprc, gprc,
19336 /* NOP */
19337 /* NOP_GT_PWR6 */
19338 /* NOP_GT_PWR7 */
19339 /* NOR */
19340 gprc, gprc, gprc,
19341 /* NOR8 */
19342 g8rc, g8rc, g8rc,
19343 /* NOR8_rec */
19344 g8rc, g8rc, g8rc,
19345 /* NOR_rec */
19346 gprc, gprc, gprc,
19347 /* OR */
19348 gprc, gprc, gprc,
19349 /* OR8 */
19350 g8rc, g8rc, g8rc,
19351 /* OR8_rec */
19352 g8rc, g8rc, g8rc,
19353 /* ORC */
19354 gprc, gprc, gprc,
19355 /* ORC8 */
19356 g8rc, g8rc, g8rc,
19357 /* ORC8_rec */
19358 g8rc, g8rc, g8rc,
19359 /* ORC_rec */
19360 gprc, gprc, gprc,
19361 /* ORI */
19362 gprc, gprc, u16imm,
19363 /* ORI8 */
19364 g8rc, g8rc, u16imm64,
19365 /* ORIS */
19366 gprc, gprc, u16imm,
19367 /* ORIS8 */
19368 g8rc, g8rc, u16imm64,
19369 /* OR_rec */
19370 gprc, gprc, gprc,
19371 /* PADDI */
19372 gprc, gprc_nor0, s34imm,
19373 /* PADDI8 */
19374 g8rc, g8rc_nox0, s34imm,
19375 /* PADDI8pc */
19376 g8rc, immZero, s34imm_pcrel,
19377 /* PADDIdtprel */
19378 g8rc, g8rc_nox0, s16imm64,
19379 /* PADDIpc */
19380 gprc, immZero, s34imm_pcrel,
19381 /* PDEPD */
19382 g8rc, g8rc, g8rc,
19383 /* PEXTD */
19384 g8rc, g8rc, g8rc,
19385 /* PLA */
19386 gprc, gprc_nor0, s34imm,
19387 /* PLA8 */
19388 g8rc, g8rc_nox0, s34imm,
19389 /* PLA8pc */
19390 g8rc, s34imm_pcrel,
19391 /* PLApc */
19392 gprc, s34imm_pcrel,
19393 /* PLBZ */
19394 gprc, dispRI34, ptr_rc_nor0,
19395 /* PLBZ8 */
19396 g8rc, dispRI34, ptr_rc_nor0,
19397 /* PLBZ8nopc */
19398 g8rc, dispRI34, ptr_rc_nor0,
19399 /* PLBZ8onlypc */
19400 g8rc, s34imm_pcrel,
19401 /* PLBZ8pc */
19402 g8rc, dispRI34_pcrel, immZero,
19403 /* PLBZnopc */
19404 gprc, dispRI34, ptr_rc_nor0,
19405 /* PLBZonlypc */
19406 gprc, s34imm_pcrel,
19407 /* PLBZpc */
19408 gprc, dispRI34_pcrel, immZero,
19409 /* PLD */
19410 g8rc, dispRI34, ptr_rc_nor0,
19411 /* PLDnopc */
19412 g8rc, dispRI34, ptr_rc_nor0,
19413 /* PLDonlypc */
19414 g8rc, s34imm_pcrel,
19415 /* PLDpc */
19416 g8rc, dispRI34_pcrel, immZero,
19417 /* PLFD */
19418 f8rc, dispRI34, ptr_rc_nor0,
19419 /* PLFDnopc */
19420 f8rc, dispRI34, ptr_rc_nor0,
19421 /* PLFDonlypc */
19422 f8rc, s34imm_pcrel,
19423 /* PLFDpc */
19424 f8rc, dispRI34_pcrel, immZero,
19425 /* PLFS */
19426 f4rc, dispRI34, ptr_rc_nor0,
19427 /* PLFSnopc */
19428 f4rc, dispRI34, ptr_rc_nor0,
19429 /* PLFSonlypc */
19430 f4rc, s34imm_pcrel,
19431 /* PLFSpc */
19432 f4rc, dispRI34_pcrel, immZero,
19433 /* PLHA */
19434 gprc, dispRI34, ptr_rc_nor0,
19435 /* PLHA8 */
19436 g8rc, dispRI34, ptr_rc_nor0,
19437 /* PLHA8nopc */
19438 g8rc, dispRI34, ptr_rc_nor0,
19439 /* PLHA8onlypc */
19440 g8rc, s34imm_pcrel,
19441 /* PLHA8pc */
19442 g8rc, dispRI34_pcrel, immZero,
19443 /* PLHAnopc */
19444 gprc, dispRI34, ptr_rc_nor0,
19445 /* PLHAonlypc */
19446 gprc, s34imm_pcrel,
19447 /* PLHApc */
19448 gprc, dispRI34_pcrel, immZero,
19449 /* PLHZ */
19450 gprc, dispRI34, ptr_rc_nor0,
19451 /* PLHZ8 */
19452 g8rc, dispRI34, ptr_rc_nor0,
19453 /* PLHZ8nopc */
19454 g8rc, dispRI34, ptr_rc_nor0,
19455 /* PLHZ8onlypc */
19456 g8rc, s34imm_pcrel,
19457 /* PLHZ8pc */
19458 g8rc, dispRI34_pcrel, immZero,
19459 /* PLHZnopc */
19460 gprc, dispRI34, ptr_rc_nor0,
19461 /* PLHZonlypc */
19462 gprc, s34imm_pcrel,
19463 /* PLHZpc */
19464 gprc, dispRI34_pcrel, immZero,
19465 /* PLI */
19466 gprc, s34imm,
19467 /* PLI8 */
19468 g8rc, s34imm,
19469 /* PLWA */
19470 gprc, dispRI34, ptr_rc_nor0,
19471 /* PLWA8 */
19472 g8rc, dispRI34, ptr_rc_nor0,
19473 /* PLWA8nopc */
19474 g8rc, dispRI34, ptr_rc_nor0,
19475 /* PLWA8onlypc */
19476 g8rc, s34imm_pcrel,
19477 /* PLWA8pc */
19478 g8rc, dispRI34_pcrel, immZero,
19479 /* PLWAnopc */
19480 gprc, dispRI34, ptr_rc_nor0,
19481 /* PLWAonlypc */
19482 gprc, s34imm_pcrel,
19483 /* PLWApc */
19484 gprc, dispRI34_pcrel, immZero,
19485 /* PLWZ */
19486 gprc, dispRI34, ptr_rc_nor0,
19487 /* PLWZ8 */
19488 g8rc, dispRI34, ptr_rc_nor0,
19489 /* PLWZ8nopc */
19490 g8rc, dispRI34, ptr_rc_nor0,
19491 /* PLWZ8onlypc */
19492 g8rc, s34imm_pcrel,
19493 /* PLWZ8pc */
19494 g8rc, dispRI34_pcrel, immZero,
19495 /* PLWZnopc */
19496 gprc, dispRI34, ptr_rc_nor0,
19497 /* PLWZonlypc */
19498 gprc, s34imm_pcrel,
19499 /* PLWZpc */
19500 gprc, dispRI34_pcrel, immZero,
19501 /* PLXSD */
19502 vfrc, dispRI34, ptr_rc_nor0,
19503 /* PLXSDnopc */
19504 vfrc, dispRI34, ptr_rc_nor0,
19505 /* PLXSDonlypc */
19506 vfrc, s34imm_pcrel,
19507 /* PLXSDpc */
19508 vfrc, dispRI34_pcrel, immZero,
19509 /* PLXSSP */
19510 vfrc, dispRI34, ptr_rc_nor0,
19511 /* PLXSSPnopc */
19512 vfrc, dispRI34, ptr_rc_nor0,
19513 /* PLXSSPonlypc */
19514 vfrc, s34imm_pcrel,
19515 /* PLXSSPpc */
19516 vfrc, dispRI34_pcrel, immZero,
19517 /* PLXV */
19518 vsrc, dispRI34, ptr_rc_nor0,
19519 /* PLXVP */
19520 vsrprc, dispRI34, ptr_rc_nor0,
19521 /* PLXVPnopc */
19522 vsrprc, dispRI34, ptr_rc_nor0,
19523 /* PLXVPonlypc */
19524 vsrprc, s34imm_pcrel,
19525 /* PLXVPpc */
19526 vsrprc, dispRI34_pcrel, immZero,
19527 /* PLXVnopc */
19528 vsrc, dispRI34, ptr_rc_nor0,
19529 /* PLXVonlypc */
19530 vsrc, s34imm_pcrel,
19531 /* PLXVpc */
19532 vsrc, dispRI34_pcrel, immZero,
19533 /* PMXVBF16GER2 */
19534 acc, vsrc, vsrc, u4imm, u4imm, u2imm,
19535 /* PMXVBF16GER2NN */
19536 acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
19537 /* PMXVBF16GER2NP */
19538 acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
19539 /* PMXVBF16GER2PN */
19540 acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
19541 /* PMXVBF16GER2PP */
19542 acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
19543 /* PMXVBF16GER2W */
19544 wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
19545 /* PMXVBF16GER2WNN */
19546 wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
19547 /* PMXVBF16GER2WNP */
19548 wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
19549 /* PMXVBF16GER2WPN */
19550 wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
19551 /* PMXVBF16GER2WPP */
19552 wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
19553 /* PMXVF16GER2 */
19554 acc, vsrc, vsrc, u4imm, u4imm, u2imm,
19555 /* PMXVF16GER2NN */
19556 acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
19557 /* PMXVF16GER2NP */
19558 acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
19559 /* PMXVF16GER2PN */
19560 acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
19561 /* PMXVF16GER2PP */
19562 acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
19563 /* PMXVF16GER2W */
19564 wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
19565 /* PMXVF16GER2WNN */
19566 wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
19567 /* PMXVF16GER2WNP */
19568 wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
19569 /* PMXVF16GER2WPN */
19570 wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
19571 /* PMXVF16GER2WPP */
19572 wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
19573 /* PMXVF32GER */
19574 acc, vsrc, vsrc, u4imm, u4imm,
19575 /* PMXVF32GERNN */
19576 acc, acc, vsrc, vsrc, u4imm, u4imm,
19577 /* PMXVF32GERNP */
19578 acc, acc, vsrc, vsrc, u4imm, u4imm,
19579 /* PMXVF32GERPN */
19580 acc, acc, vsrc, vsrc, u4imm, u4imm,
19581 /* PMXVF32GERPP */
19582 acc, acc, vsrc, vsrc, u4imm, u4imm,
19583 /* PMXVF32GERW */
19584 wacc, vsrc, vsrc, u4imm, u4imm,
19585 /* PMXVF32GERWNN */
19586 wacc, wacc, vsrc, vsrc, u4imm, u4imm,
19587 /* PMXVF32GERWNP */
19588 wacc, wacc, vsrc, vsrc, u4imm, u4imm,
19589 /* PMXVF32GERWPN */
19590 wacc, wacc, vsrc, vsrc, u4imm, u4imm,
19591 /* PMXVF32GERWPP */
19592 wacc, wacc, vsrc, vsrc, u4imm, u4imm,
19593 /* PMXVF64GER */
19594 acc, vsrpevenrc, vsrc, u4imm, u2imm,
19595 /* PMXVF64GERNN */
19596 acc, acc, vsrpevenrc, vsrc, u4imm, u2imm,
19597 /* PMXVF64GERNP */
19598 acc, acc, vsrpevenrc, vsrc, u4imm, u2imm,
19599 /* PMXVF64GERPN */
19600 acc, acc, vsrpevenrc, vsrc, u4imm, u2imm,
19601 /* PMXVF64GERPP */
19602 acc, acc, vsrpevenrc, vsrc, u4imm, u2imm,
19603 /* PMXVF64GERW */
19604 wacc, vsrpevenrc, vsrc, u4imm, u2imm,
19605 /* PMXVF64GERWNN */
19606 wacc, wacc, vsrpevenrc, vsrc, u4imm, u2imm,
19607 /* PMXVF64GERWNP */
19608 wacc, wacc, vsrpevenrc, vsrc, u4imm, u2imm,
19609 /* PMXVF64GERWPN */
19610 wacc, wacc, vsrpevenrc, vsrc, u4imm, u2imm,
19611 /* PMXVF64GERWPP */
19612 wacc, wacc, vsrpevenrc, vsrc, u4imm, u2imm,
19613 /* PMXVI16GER2 */
19614 acc, vsrc, vsrc, u4imm, u4imm, u2imm,
19615 /* PMXVI16GER2PP */
19616 acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
19617 /* PMXVI16GER2S */
19618 acc, vsrc, vsrc, u4imm, u4imm, u2imm,
19619 /* PMXVI16GER2SPP */
19620 acc, acc, vsrc, vsrc, u4imm, u4imm, u2imm,
19621 /* PMXVI16GER2SW */
19622 wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
19623 /* PMXVI16GER2SWPP */
19624 wacc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
19625 /* PMXVI16GER2W */
19626 wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
19627 /* PMXVI16GER2WPP */
19628 acc, wacc, vsrc, vsrc, u4imm, u4imm, u2imm,
19629 /* PMXVI4GER8 */
19630 acc, vsrc, vsrc, u4imm, u4imm, u8imm,
19631 /* PMXVI4GER8PP */
19632 acc, acc, vsrc, vsrc, u4imm, u4imm, u8imm,
19633 /* PMXVI4GER8W */
19634 wacc, vsrc, vsrc, u4imm, u4imm, u8imm,
19635 /* PMXVI4GER8WPP */
19636 wacc, wacc, vsrc, vsrc, u4imm, u4imm, u8imm,
19637 /* PMXVI8GER4 */
19638 acc, vsrc, vsrc, u4imm, u4imm, u4imm,
19639 /* PMXVI8GER4PP */
19640 acc, acc, vsrc, vsrc, u4imm, u4imm, u4imm,
19641 /* PMXVI8GER4SPP */
19642 acc, acc, vsrc, vsrc, u4imm, u4imm, u4imm,
19643 /* PMXVI8GER4W */
19644 wacc, vsrc, vsrc, u4imm, u4imm, u4imm,
19645 /* PMXVI8GER4WPP */
19646 wacc, wacc, vsrc, vsrc, u4imm, u4imm, u4imm,
19647 /* PMXVI8GER4WSPP */
19648 wacc, wacc, vsrc, vsrc, u4imm, u4imm, u4imm,
19649 /* POPCNTB */
19650 gprc, gprc,
19651 /* POPCNTB8 */
19652 g8rc, g8rc,
19653 /* POPCNTD */
19654 g8rc, g8rc,
19655 /* POPCNTW */
19656 gprc, gprc,
19657 /* PPC32GOT */
19658 gprc,
19659 /* PPC32PICGOT */
19660 gprc, gprc,
19661 /* PREPARE_PROBED_ALLOCA_32 */
19662 gprc, gprc, gprc, dispRI, ptr_rc_nor0,
19663 /* PREPARE_PROBED_ALLOCA_64 */
19664 g8rc, g8rc, g8rc, dispRI, ptr_rc_nor0,
19665 /* PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32 */
19666 gprc, gprc, gprc, dispRI, ptr_rc_nor0,
19667 /* PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64 */
19668 g8rc, g8rc, g8rc, dispRI, ptr_rc_nor0,
19669 /* PROBED_ALLOCA_32 */
19670 gprc, gprc, dispRI, ptr_rc_nor0,
19671 /* PROBED_ALLOCA_64 */
19672 g8rc, g8rc, dispRI, ptr_rc_nor0,
19673 /* PROBED_STACKALLOC_32 */
19674 gprc, gprc, i64imm,
19675 /* PROBED_STACKALLOC_64 */
19676 g8rc, g8rc, i64imm,
19677 /* PSTB */
19678 gprc, dispRI34, ptr_rc_nor0,
19679 /* PSTB8 */
19680 g8rc, dispRI34, ptr_rc_nor0,
19681 /* PSTB8nopc */
19682 g8rc, dispRI34, ptr_rc_nor0,
19683 /* PSTB8onlypc */
19684 g8rc, s34imm_pcrel,
19685 /* PSTB8pc */
19686 g8rc, dispRI34_pcrel, immZero,
19687 /* PSTBnopc */
19688 gprc, dispRI34, ptr_rc_nor0,
19689 /* PSTBonlypc */
19690 gprc, s34imm_pcrel,
19691 /* PSTBpc */
19692 gprc, dispRI34_pcrel, immZero,
19693 /* PSTD */
19694 g8rc, dispRI34, ptr_rc_nor0,
19695 /* PSTDnopc */
19696 g8rc, dispRI34, ptr_rc_nor0,
19697 /* PSTDonlypc */
19698 g8rc, s34imm_pcrel,
19699 /* PSTDpc */
19700 g8rc, dispRI34_pcrel, immZero,
19701 /* PSTFD */
19702 f8rc, dispRI34, ptr_rc_nor0,
19703 /* PSTFDnopc */
19704 f8rc, dispRI34, ptr_rc_nor0,
19705 /* PSTFDonlypc */
19706 f8rc, s34imm_pcrel,
19707 /* PSTFDpc */
19708 f8rc, dispRI34_pcrel, immZero,
19709 /* PSTFS */
19710 f4rc, dispRI34, ptr_rc_nor0,
19711 /* PSTFSnopc */
19712 f4rc, dispRI34, ptr_rc_nor0,
19713 /* PSTFSonlypc */
19714 f4rc, s34imm_pcrel,
19715 /* PSTFSpc */
19716 f4rc, dispRI34_pcrel, immZero,
19717 /* PSTH */
19718 gprc, dispRI34, ptr_rc_nor0,
19719 /* PSTH8 */
19720 g8rc, dispRI34, ptr_rc_nor0,
19721 /* PSTH8nopc */
19722 g8rc, dispRI34, ptr_rc_nor0,
19723 /* PSTH8onlypc */
19724 g8rc, s34imm_pcrel,
19725 /* PSTH8pc */
19726 g8rc, dispRI34_pcrel, immZero,
19727 /* PSTHnopc */
19728 gprc, dispRI34, ptr_rc_nor0,
19729 /* PSTHonlypc */
19730 gprc, s34imm_pcrel,
19731 /* PSTHpc */
19732 gprc, dispRI34_pcrel, immZero,
19733 /* PSTW */
19734 gprc, dispRI34, ptr_rc_nor0,
19735 /* PSTW8 */
19736 g8rc, dispRI34, ptr_rc_nor0,
19737 /* PSTW8nopc */
19738 g8rc, dispRI34, ptr_rc_nor0,
19739 /* PSTW8onlypc */
19740 g8rc, s34imm_pcrel,
19741 /* PSTW8pc */
19742 g8rc, dispRI34_pcrel, immZero,
19743 /* PSTWnopc */
19744 gprc, dispRI34, ptr_rc_nor0,
19745 /* PSTWonlypc */
19746 gprc, s34imm_pcrel,
19747 /* PSTWpc */
19748 gprc, dispRI34_pcrel, immZero,
19749 /* PSTXSD */
19750 vfrc, dispRI34, ptr_rc_nor0,
19751 /* PSTXSDnopc */
19752 vfrc, dispRI34, ptr_rc_nor0,
19753 /* PSTXSDonlypc */
19754 vfrc, s34imm_pcrel,
19755 /* PSTXSDpc */
19756 vfrc, dispRI34_pcrel, immZero,
19757 /* PSTXSSP */
19758 vfrc, dispRI34, ptr_rc_nor0,
19759 /* PSTXSSPnopc */
19760 vfrc, dispRI34, ptr_rc_nor0,
19761 /* PSTXSSPonlypc */
19762 vfrc, s34imm_pcrel,
19763 /* PSTXSSPpc */
19764 vfrc, dispRI34_pcrel, immZero,
19765 /* PSTXV */
19766 vsrc, dispRI34, ptr_rc_nor0,
19767 /* PSTXVP */
19768 vsrprc, dispRI34, ptr_rc_nor0,
19769 /* PSTXVPnopc */
19770 vsrprc, dispRI34, ptr_rc_nor0,
19771 /* PSTXVPonlypc */
19772 vsrprc, s34imm_pcrel,
19773 /* PSTXVPpc */
19774 vsrprc, dispRI34_pcrel, immZero,
19775 /* PSTXVnopc */
19776 vsrc, dispRI34, ptr_rc_nor0,
19777 /* PSTXVonlypc */
19778 vsrc, s34imm_pcrel,
19779 /* PSTXVpc */
19780 vsrc, dispRI34_pcrel, immZero,
19781 /* PseudoEIEIO */
19782 /* RESTORE_ACC */
19783 acc, dispRIX16, ptr_rc_nor0,
19784 /* RESTORE_CR */
19785 crrc, dispRI, ptr_rc_nor0,
19786 /* RESTORE_CRBIT */
19787 crbitrc, dispRI, ptr_rc_nor0,
19788 /* RESTORE_QUADWORD */
19789 g8prc, dispRIX, ptr_rc_nor0,
19790 /* RESTORE_UACC */
19791 uacc, dispRIX16, ptr_rc_nor0,
19792 /* RESTORE_WACC */
19793 wacc, dispRIX16, ptr_rc_nor0,
19794 /* RFCI */
19795 /* RFDI */
19796 /* RFEBB */
19797 u1imm,
19798 /* RFI */
19799 /* RFID */
19800 /* RFMCI */
19801 /* RLDCL */
19802 g8rc, g8rc, gprc, u6imm,
19803 /* RLDCL_rec */
19804 g8rc, g8rc, gprc, u6imm,
19805 /* RLDCR */
19806 g8rc, g8rc, gprc, u6imm,
19807 /* RLDCR_rec */
19808 g8rc, g8rc, gprc, u6imm,
19809 /* RLDIC */
19810 g8rc, g8rc, u6imm, u6imm,
19811 /* RLDICL */
19812 g8rc, g8rc, u6imm, u6imm,
19813 /* RLDICL_32 */
19814 gprc, gprc, u6imm, u6imm,
19815 /* RLDICL_32_64 */
19816 g8rc, gprc, u6imm, u6imm,
19817 /* RLDICL_32_rec */
19818 gprc, gprc, u6imm, u6imm,
19819 /* RLDICL_rec */
19820 g8rc, g8rc, u6imm, u6imm,
19821 /* RLDICR */
19822 g8rc, g8rc, u6imm, u6imm,
19823 /* RLDICR_32 */
19824 gprc, gprc, u6imm, u6imm,
19825 /* RLDICR_rec */
19826 g8rc, g8rc, u6imm, u6imm,
19827 /* RLDIC_rec */
19828 g8rc, g8rc, u6imm, u6imm,
19829 /* RLDIMI */
19830 g8rc, g8rc, g8rc, u6imm, u6imm,
19831 /* RLDIMI_rec */
19832 g8rc, g8rc, g8rc, u6imm, u6imm,
19833 /* RLWIMI */
19834 gprc, gprc, gprc, u5imm, u5imm, u5imm,
19835 /* RLWIMI8 */
19836 g8rc, g8rc, g8rc, u5imm, u5imm, u5imm,
19837 /* RLWIMI8_rec */
19838 g8rc, g8rc, g8rc, u5imm, u5imm, u5imm,
19839 /* RLWIMI_rec */
19840 gprc, gprc, gprc, u5imm, u5imm, u5imm,
19841 /* RLWINM */
19842 gprc, gprc, u5imm, u5imm, u5imm,
19843 /* RLWINM8 */
19844 g8rc, g8rc, u5imm, u5imm, u5imm,
19845 /* RLWINM8_rec */
19846 g8rc, g8rc, u5imm, u5imm, u5imm,
19847 /* RLWINM_rec */
19848 gprc, gprc, u5imm, u5imm, u5imm,
19849 /* RLWNM */
19850 gprc, gprc, gprc, u5imm, u5imm,
19851 /* RLWNM8 */
19852 g8rc, g8rc, g8rc, u5imm, u5imm,
19853 /* RLWNM8_rec */
19854 g8rc, g8rc, g8rc, u5imm, u5imm,
19855 /* RLWNM_rec */
19856 gprc, gprc, gprc, u5imm, u5imm,
19857 /* ReadTB */
19858 gprc, gprc,
19859 /* SC */
19860 i32imm,
19861 /* SCV */
19862 i32imm,
19863 /* SELECT_CC_F16 */
19864 vrrc, crrc, vrrc, vrrc, i32imm,
19865 /* SELECT_CC_F4 */
19866 f4rc, crrc, f4rc, f4rc, i32imm,
19867 /* SELECT_CC_F8 */
19868 f8rc, crrc, f8rc, f8rc, i32imm,
19869 /* SELECT_CC_I4 */
19870 gprc, crrc, gprc_nor0, gprc_nor0, i32imm,
19871 /* SELECT_CC_I8 */
19872 g8rc, crrc, g8rc_nox0, g8rc_nox0, i32imm,
19873 /* SELECT_CC_SPE */
19874 sperc, crrc, sperc, sperc, i32imm,
19875 /* SELECT_CC_SPE4 */
19876 spe4rc, crrc, spe4rc, spe4rc, i32imm,
19877 /* SELECT_CC_VRRC */
19878 vrrc, crrc, vrrc, vrrc, i32imm,
19879 /* SELECT_CC_VSFRC */
19880 f8rc, crrc, f8rc, f8rc, i32imm,
19881 /* SELECT_CC_VSRC */
19882 vsrc, crrc, vsrc, vsrc, i32imm,
19883 /* SELECT_CC_VSSRC */
19884 f4rc, crrc, f4rc, f4rc, i32imm,
19885 /* SELECT_F16 */
19886 vrrc, crbitrc, vrrc, vrrc,
19887 /* SELECT_F4 */
19888 f4rc, crbitrc, f4rc, f4rc,
19889 /* SELECT_F8 */
19890 f8rc, crbitrc, f8rc, f8rc,
19891 /* SELECT_I4 */
19892 gprc, crbitrc, gprc_nor0, gprc_nor0,
19893 /* SELECT_I8 */
19894 g8rc, crbitrc, g8rc_nox0, g8rc_nox0,
19895 /* SELECT_SPE */
19896 sperc, crbitrc, sperc, sperc,
19897 /* SELECT_SPE4 */
19898 spe4rc, crbitrc, spe4rc, spe4rc,
19899 /* SELECT_VRRC */
19900 vrrc, crbitrc, vrrc, vrrc,
19901 /* SELECT_VSFRC */
19902 f8rc, crbitrc, f8rc, f8rc,
19903 /* SELECT_VSRC */
19904 vsrc, crbitrc, vsrc, vsrc,
19905 /* SELECT_VSSRC */
19906 f4rc, crbitrc, f4rc, f4rc,
19907 /* SETB */
19908 gprc, crrc,
19909 /* SETB8 */
19910 g8rc, crrc,
19911 /* SETBC */
19912 gprc, crbitrc,
19913 /* SETBC8 */
19914 g8rc, crbitrc,
19915 /* SETBCR */
19916 gprc, crbitrc,
19917 /* SETBCR8 */
19918 g8rc, crbitrc,
19919 /* SETFLM */
19920 f8rc, f8rc,
19921 /* SETNBC */
19922 gprc, crbitrc,
19923 /* SETNBC8 */
19924 g8rc, crbitrc,
19925 /* SETNBCR */
19926 gprc, crbitrc,
19927 /* SETNBCR8 */
19928 g8rc, crbitrc,
19929 /* SETRND */
19930 f8rc, gprc,
19931 /* SETRNDi */
19932 f8rc, u2imm,
19933 /* SLBFEE_rec */
19934 gprc, gprc,
19935 /* SLBIA */
19936 /* SLBIE */
19937 gprc,
19938 /* SLBIEG */
19939 gprc, gprc,
19940 /* SLBMFEE */
19941 gprc, gprc,
19942 /* SLBMFEV */
19943 gprc, gprc,
19944 /* SLBMTE */
19945 gprc, gprc,
19946 /* SLBSYNC */
19947 /* SLD */
19948 g8rc, g8rc, gprc,
19949 /* SLD_rec */
19950 g8rc, g8rc, gprc,
19951 /* SLW */
19952 gprc, gprc, gprc,
19953 /* SLW8 */
19954 g8rc, g8rc, g8rc,
19955 /* SLW8_rec */
19956 g8rc, g8rc, g8rc,
19957 /* SLW_rec */
19958 gprc, gprc, gprc,
19959 /* SPELWZ */
19960 spe4rc, dispRI, ptr_rc_nor0,
19961 /* SPELWZX */
19962 spe4rc, ptr_rc_nor0, ptr_rc_idx,
19963 /* SPESTW */
19964 spe4rc, dispRI, ptr_rc_nor0,
19965 /* SPESTWX */
19966 spe4rc, ptr_rc_nor0, ptr_rc_idx,
19967 /* SPILL_ACC */
19968 acc, dispRIX16, ptr_rc_nor0,
19969 /* SPILL_CR */
19970 crrc, dispRI, ptr_rc_nor0,
19971 /* SPILL_CRBIT */
19972 crbitrc, dispRI, ptr_rc_nor0,
19973 /* SPILL_QUADWORD */
19974 g8prc, dispRIX, ptr_rc_nor0,
19975 /* SPILL_UACC */
19976 uacc, dispRIX16, ptr_rc_nor0,
19977 /* SPILL_WACC */
19978 wacc, dispRIX16, ptr_rc_nor0,
19979 /* SPLIT_QUADWORD */
19980 g8rc, g8rc, g8prc,
19981 /* SRAD */
19982 g8rc, g8rc, gprc,
19983 /* SRADI */
19984 g8rc, g8rc, u6imm,
19985 /* SRADI_32 */
19986 gprc, gprc, u6imm,
19987 /* SRADI_rec */
19988 g8rc, g8rc, u6imm,
19989 /* SRAD_rec */
19990 g8rc, g8rc, gprc,
19991 /* SRAW */
19992 gprc, gprc, gprc,
19993 /* SRAWI */
19994 gprc, gprc, u5imm,
19995 /* SRAWI_rec */
19996 gprc, gprc, u5imm,
19997 /* SRAW_rec */
19998 gprc, gprc, gprc,
19999 /* SRD */
20000 g8rc, g8rc, gprc,
20001 /* SRD_rec */
20002 g8rc, g8rc, gprc,
20003 /* SRW */
20004 gprc, gprc, gprc,
20005 /* SRW8 */
20006 g8rc, g8rc, g8rc,
20007 /* SRW8_rec */
20008 g8rc, g8rc, g8rc,
20009 /* SRW_rec */
20010 gprc, gprc, gprc,
20011 /* STB */
20012 gprc, dispRI, ptr_rc_nor0,
20013 /* STB8 */
20014 g8rc, dispRI, ptr_rc_nor0,
20015 /* STBCIX */
20016 gprc, gprc, gprc,
20017 /* STBCX */
20018 gprc, ptr_rc_nor0, ptr_rc_idx,
20019 /* STBEPX */
20020 gprc, ptr_rc_nor0, ptr_rc_idx,
20021 /* STBU */
20022 ptr_rc_nor0, gprc, dispRI, ptr_rc_nor0,
20023 /* STBU8 */
20024 ptr_rc_nor0, g8rc, dispRI, ptr_rc_nor0,
20025 /* STBUX */
20026 ptr_rc_nor0, gprc, ptr_rc_nor0, ptr_rc_idx,
20027 /* STBUX8 */
20028 ptr_rc_nor0, g8rc, ptr_rc_nor0, ptr_rc_idx,
20029 /* STBX */
20030 gprc, ptr_rc_nor0, ptr_rc_idx,
20031 /* STBX8 */
20032 g8rc, ptr_rc_nor0, ptr_rc_idx,
20033 /* STBXTLS */
20034 g8rc, ptr_rc_nor0, tlsreg,
20035 /* STBXTLS_ */
20036 g8rc, ptr_rc_nor0, tlsreg,
20037 /* STBXTLS_32 */
20038 gprc, ptr_rc_nor0, tlsreg,
20039 /* STD */
20040 g8rc, dispRIX, ptr_rc_nor0,
20041 /* STDAT */
20042 g8rc, g8rc, u5imm,
20043 /* STDBRX */
20044 g8rc, ptr_rc_nor0, ptr_rc_idx,
20045 /* STDCIX */
20046 gprc, gprc, gprc,
20047 /* STDCX */
20048 g8rc, ptr_rc_nor0, ptr_rc_idx,
20049 /* STDU */
20050 ptr_rc_nor0, g8rc, dispRIX, ptr_rc_nor0,
20051 /* STDUX */
20052 ptr_rc_nor0, g8rc, ptr_rc_nor0, ptr_rc_idx,
20053 /* STDX */
20054 g8rc, ptr_rc_nor0, ptr_rc_idx,
20055 /* STDXTLS */
20056 g8rc, ptr_rc_nor0, tlsreg,
20057 /* STDXTLS_ */
20058 g8rc, ptr_rc_nor0, tlsreg,
20059 /* STFD */
20060 f8rc, dispRI, ptr_rc_nor0,
20061 /* STFDEPX */
20062 f8rc, ptr_rc_nor0, ptr_rc_idx,
20063 /* STFDU */
20064 ptr_rc_nor0, f8rc, dispRI, ptr_rc_nor0,
20065 /* STFDUX */
20066 ptr_rc_nor0, f8rc, ptr_rc_nor0, ptr_rc_idx,
20067 /* STFDX */
20068 f8rc, ptr_rc_nor0, ptr_rc_idx,
20069 /* STFDXTLS */
20070 f8rc, ptr_rc_nor0, tlsreg,
20071 /* STFDXTLS_ */
20072 f8rc, ptr_rc_nor0, tlsreg,
20073 /* STFIWX */
20074 f8rc, ptr_rc_nor0, ptr_rc_idx,
20075 /* STFS */
20076 f4rc, dispRI, ptr_rc_nor0,
20077 /* STFSU */
20078 ptr_rc_nor0, f4rc, dispRI, ptr_rc_nor0,
20079 /* STFSUX */
20080 ptr_rc_nor0, f4rc, ptr_rc_nor0, ptr_rc_idx,
20081 /* STFSX */
20082 f4rc, ptr_rc_nor0, ptr_rc_idx,
20083 /* STFSXTLS */
20084 f4rc, ptr_rc_nor0, tlsreg,
20085 /* STFSXTLS_ */
20086 f4rc, ptr_rc_nor0, tlsreg,
20087 /* STH */
20088 gprc, dispRI, ptr_rc_nor0,
20089 /* STH8 */
20090 g8rc, dispRI, ptr_rc_nor0,
20091 /* STHBRX */
20092 gprc, ptr_rc_nor0, ptr_rc_idx,
20093 /* STHCIX */
20094 gprc, gprc, gprc,
20095 /* STHCX */
20096 gprc, ptr_rc_nor0, ptr_rc_idx,
20097 /* STHEPX */
20098 gprc, ptr_rc_nor0, ptr_rc_idx,
20099 /* STHU */
20100 ptr_rc_nor0, gprc, dispRI, ptr_rc_nor0,
20101 /* STHU8 */
20102 ptr_rc_nor0, g8rc, dispRI, ptr_rc_nor0,
20103 /* STHUX */
20104 ptr_rc_nor0, gprc, ptr_rc_nor0, ptr_rc_idx,
20105 /* STHUX8 */
20106 ptr_rc_nor0, g8rc, ptr_rc_nor0, ptr_rc_idx,
20107 /* STHX */
20108 gprc, ptr_rc_nor0, ptr_rc_idx,
20109 /* STHX8 */
20110 g8rc, ptr_rc_nor0, ptr_rc_idx,
20111 /* STHXTLS */
20112 g8rc, ptr_rc_nor0, tlsreg,
20113 /* STHXTLS_ */
20114 g8rc, ptr_rc_nor0, tlsreg,
20115 /* STHXTLS_32 */
20116 gprc, ptr_rc_nor0, tlsreg,
20117 /* STMW */
20118 gprc, dispRI, ptr_rc_nor0,
20119 /* STOP */
20120 /* STQ */
20121 g8prc, dispRIX, ptr_rc_nor0,
20122 /* STQCX */
20123 g8prc, ptr_rc_nor0, ptr_rc_idx,
20124 /* STQX_PSEUDO */
20125 g8prc, ptr_rc_nor0, ptr_rc_idx,
20126 /* STSWI */
20127 gprc, gprc, u5imm,
20128 /* STVEBX */
20129 vrrc, ptr_rc_nor0, ptr_rc_idx,
20130 /* STVEHX */
20131 vrrc, ptr_rc_nor0, ptr_rc_idx,
20132 /* STVEWX */
20133 vrrc, ptr_rc_nor0, ptr_rc_idx,
20134 /* STVX */
20135 vrrc, ptr_rc_nor0, ptr_rc_idx,
20136 /* STVXL */
20137 vrrc, ptr_rc_nor0, ptr_rc_idx,
20138 /* STW */
20139 gprc, dispRI, ptr_rc_nor0,
20140 /* STW8 */
20141 g8rc, dispRI, ptr_rc_nor0,
20142 /* STWAT */
20143 gprc, gprc, u5imm,
20144 /* STWBRX */
20145 gprc, ptr_rc_nor0, ptr_rc_idx,
20146 /* STWCIX */
20147 gprc, gprc, gprc,
20148 /* STWCX */
20149 gprc, ptr_rc_nor0, ptr_rc_idx,
20150 /* STWEPX */
20151 gprc, ptr_rc_nor0, ptr_rc_idx,
20152 /* STWU */
20153 ptr_rc_nor0, gprc, dispRI, ptr_rc_nor0,
20154 /* STWU8 */
20155 ptr_rc_nor0, g8rc, dispRI, ptr_rc_nor0,
20156 /* STWUX */
20157 ptr_rc_nor0, gprc, ptr_rc_nor0, ptr_rc_idx,
20158 /* STWUX8 */
20159 ptr_rc_nor0, g8rc, ptr_rc_nor0, ptr_rc_idx,
20160 /* STWX */
20161 gprc, ptr_rc_nor0, ptr_rc_idx,
20162 /* STWX8 */
20163 g8rc, ptr_rc_nor0, ptr_rc_idx,
20164 /* STWXTLS */
20165 g8rc, ptr_rc_nor0, tlsreg,
20166 /* STWXTLS_ */
20167 g8rc, ptr_rc_nor0, tlsreg,
20168 /* STWXTLS_32 */
20169 gprc, ptr_rc_nor0, tlsreg,
20170 /* STXSD */
20171 vfrc, dispRIX, ptr_rc_nor0,
20172 /* STXSDX */
20173 vsfrc, ptr_rc_nor0, ptr_rc_idx,
20174 /* STXSIBX */
20175 vsfrc, ptr_rc_nor0, ptr_rc_idx,
20176 /* STXSIBXv */
20177 vsrc, ptr_rc_nor0, ptr_rc_idx,
20178 /* STXSIHX */
20179 vsfrc, ptr_rc_nor0, ptr_rc_idx,
20180 /* STXSIHXv */
20181 vsrc, ptr_rc_nor0, ptr_rc_idx,
20182 /* STXSIWX */
20183 vsfrc, ptr_rc_nor0, ptr_rc_idx,
20184 /* STXSSP */
20185 vfrc, dispRIX, ptr_rc_nor0,
20186 /* STXSSPX */
20187 vssrc, ptr_rc_nor0, ptr_rc_idx,
20188 /* STXV */
20189 vsrc, dispRIX16, ptr_rc_nor0,
20190 /* STXVB16X */
20191 vsrc, ptr_rc_nor0, ptr_rc_idx,
20192 /* STXVD2X */
20193 vsrc, ptr_rc_nor0, ptr_rc_idx,
20194 /* STXVH8X */
20195 vsrc, ptr_rc_nor0, ptr_rc_idx,
20196 /* STXVL */
20197 vsrc, ptr_rc_nor0, g8rc,
20198 /* STXVLL */
20199 vsrc, ptr_rc_nor0, g8rc,
20200 /* STXVP */
20201 vsrprc, dispRIX16, ptr_rc_nor0,
20202 /* STXVPRL */
20203 vsrprc, ptr_rc_nor0, g8rc,
20204 /* STXVPRLL */
20205 vsrprc, ptr_rc_nor0, g8rc,
20206 /* STXVPX */
20207 vsrprc, ptr_rc_nor0, ptr_rc_idx,
20208 /* STXVRBX */
20209 vsrc, ptr_rc_nor0, ptr_rc_idx,
20210 /* STXVRDX */
20211 vsrc, ptr_rc_nor0, ptr_rc_idx,
20212 /* STXVRHX */
20213 vsrc, ptr_rc_nor0, ptr_rc_idx,
20214 /* STXVRL */
20215 vsrc, ptr_rc_nor0, g8rc,
20216 /* STXVRLL */
20217 vsrc, ptr_rc_nor0, g8rc,
20218 /* STXVRWX */
20219 vsrc, ptr_rc_nor0, ptr_rc_idx,
20220 /* STXVW4X */
20221 vsrc, ptr_rc_nor0, ptr_rc_idx,
20222 /* STXVX */
20223 vsrc, ptr_rc_nor0, ptr_rc_idx,
20224 /* SUBF */
20225 gprc, gprc, gprc,
20226 /* SUBF8 */
20227 g8rc, g8rc, g8rc,
20228 /* SUBF8O */
20229 g8rc, g8rc, g8rc,
20230 /* SUBF8O_rec */
20231 g8rc, g8rc, g8rc,
20232 /* SUBF8_rec */
20233 g8rc, g8rc, g8rc,
20234 /* SUBFC */
20235 gprc, gprc, gprc,
20236 /* SUBFC8 */
20237 g8rc, g8rc, g8rc,
20238 /* SUBFC8O */
20239 g8rc, g8rc, g8rc,
20240 /* SUBFC8O_rec */
20241 g8rc, g8rc, g8rc,
20242 /* SUBFC8_rec */
20243 g8rc, g8rc, g8rc,
20244 /* SUBFCO */
20245 gprc, gprc, gprc,
20246 /* SUBFCO_rec */
20247 gprc, gprc, gprc,
20248 /* SUBFC_rec */
20249 gprc, gprc, gprc,
20250 /* SUBFE */
20251 gprc, gprc, gprc,
20252 /* SUBFE8 */
20253 g8rc, g8rc, g8rc,
20254 /* SUBFE8O */
20255 g8rc, g8rc, g8rc,
20256 /* SUBFE8O_rec */
20257 g8rc, g8rc, g8rc,
20258 /* SUBFE8_rec */
20259 g8rc, g8rc, g8rc,
20260 /* SUBFEO */
20261 gprc, gprc, gprc,
20262 /* SUBFEO_rec */
20263 gprc, gprc, gprc,
20264 /* SUBFE_rec */
20265 gprc, gprc, gprc,
20266 /* SUBFIC */
20267 gprc, gprc, s16imm,
20268 /* SUBFIC8 */
20269 g8rc, g8rc, s16imm64,
20270 /* SUBFME */
20271 gprc, gprc,
20272 /* SUBFME8 */
20273 g8rc, g8rc,
20274 /* SUBFME8O */
20275 g8rc, g8rc,
20276 /* SUBFME8O_rec */
20277 g8rc, g8rc,
20278 /* SUBFME8_rec */
20279 g8rc, g8rc,
20280 /* SUBFMEO */
20281 gprc, gprc,
20282 /* SUBFMEO_rec */
20283 gprc, gprc,
20284 /* SUBFME_rec */
20285 gprc, gprc,
20286 /* SUBFO */
20287 gprc, gprc, gprc,
20288 /* SUBFO_rec */
20289 gprc, gprc, gprc,
20290 /* SUBFUS */
20291 g8rc, g8rc, g8rc, u1imm,
20292 /* SUBFUS_rec */
20293 g8rc, g8rc, g8rc, u1imm,
20294 /* SUBFZE */
20295 gprc, gprc,
20296 /* SUBFZE8 */
20297 g8rc, g8rc,
20298 /* SUBFZE8O */
20299 g8rc, g8rc,
20300 /* SUBFZE8O_rec */
20301 g8rc, g8rc,
20302 /* SUBFZE8_rec */
20303 g8rc, g8rc,
20304 /* SUBFZEO */
20305 gprc, gprc,
20306 /* SUBFZEO_rec */
20307 gprc, gprc,
20308 /* SUBFZE_rec */
20309 gprc, gprc,
20310 /* SUBF_rec */
20311 gprc, gprc, gprc,
20312 /* SYNC */
20313 u2imm,
20314 /* SYNCP10 */
20315 u3imm, u2imm,
20316 /* TABORT */
20317 gprc,
20318 /* TABORTDC */
20319 u5imm, gprc, gprc,
20320 /* TABORTDCI */
20321 u5imm, gprc, u5imm,
20322 /* TABORTWC */
20323 u5imm, gprc, gprc,
20324 /* TABORTWCI */
20325 u5imm, gprc, u5imm,
20326 /* TAILB */
20327 calltarget,
20328 /* TAILB8 */
20329 calltarget,
20330 /* TAILBA */
20331 abscalltarget,
20332 /* TAILBA8 */
20333 abscalltarget,
20334 /* TAILBCTR */
20335 /* TAILBCTR8 */
20336 /* TBEGIN */
20337 u1imm,
20338 /* TBEGIN_RET */
20339 gprc, u1imm,
20340 /* TCHECK */
20341 crrc,
20342 /* TCHECK_RET */
20343 gprc,
20344 /* TCRETURNai */
20345 abscalltarget, i32imm,
20346 /* TCRETURNai8 */
20347 abscalltarget, i32imm,
20348 /* TCRETURNdi */
20349 calltarget, i32imm,
20350 /* TCRETURNdi8 */
20351 calltarget, i32imm,
20352 /* TCRETURNri */
20353 CTRRC, i32imm,
20354 /* TCRETURNri8 */
20355 CTRRC8, i32imm,
20356 /* TD */
20357 u5imm, g8rc, g8rc,
20358 /* TDI */
20359 u5imm, g8rc, s16imm,
20360 /* TEND */
20361 u1imm,
20362 /* TLBIA */
20363 /* TLBIE */
20364 gprc, gprc,
20365 /* TLBIEL */
20366 gprc,
20367 /* TLBILX */
20368 u2imm, gprc, gprc,
20369 /* TLBIVAX */
20370 gprc, gprc,
20371 /* TLBLD */
20372 gprc,
20373 /* TLBLI */
20374 gprc,
20375 /* TLBRE */
20376 /* TLBRE2 */
20377 gprc, gprc, i1imm,
20378 /* TLBSX */
20379 gprc, gprc,
20380 /* TLBSX2 */
20381 gprc, gprc, gprc,
20382 /* TLBSX2D */
20383 gprc, gprc, gprc,
20384 /* TLBSYNC */
20385 /* TLBWE */
20386 /* TLBWE2 */
20387 gprc, gprc, i1imm,
20388 /* TLSGDAIX */
20389 gprc, gprc, gprc,
20390 /* TLSGDAIX8 */
20391 g8rc, g8rc, g8rc,
20392 /* TLSLDAIX */
20393 gprc, gprc,
20394 /* TLSLDAIX8 */
20395 g8rc, g8rc,
20396 /* TRAP */
20397 /* TRECHKPT */
20398 /* TRECLAIM */
20399 gprc,
20400 /* TSR */
20401 u1imm,
20402 /* TW */
20403 u5imm, gprc, gprc,
20404 /* TWI */
20405 u5imm, gprc, s16imm,
20406 /* UNENCODED_NOP */
20407 /* UpdateGBR */
20408 gprc, gprc, gprc,
20409 /* VABSDUB */
20410 vrrc, vrrc, vrrc,
20411 /* VABSDUH */
20412 vrrc, vrrc, vrrc,
20413 /* VABSDUW */
20414 vrrc, vrrc, vrrc,
20415 /* VADDCUQ */
20416 vrrc, vrrc, vrrc,
20417 /* VADDCUW */
20418 vrrc, vrrc, vrrc,
20419 /* VADDECUQ */
20420 vrrc, vrrc, vrrc, vrrc,
20421 /* VADDEUQM */
20422 vrrc, vrrc, vrrc, vrrc,
20423 /* VADDFP */
20424 vrrc, vrrc, vrrc,
20425 /* VADDSBS */
20426 vrrc, vrrc, vrrc,
20427 /* VADDSHS */
20428 vrrc, vrrc, vrrc,
20429 /* VADDSWS */
20430 vrrc, vrrc, vrrc,
20431 /* VADDUBM */
20432 vrrc, vrrc, vrrc,
20433 /* VADDUBS */
20434 vrrc, vrrc, vrrc,
20435 /* VADDUDM */
20436 vrrc, vrrc, vrrc,
20437 /* VADDUHM */
20438 vrrc, vrrc, vrrc,
20439 /* VADDUHS */
20440 vrrc, vrrc, vrrc,
20441 /* VADDUQM */
20442 vrrc, vrrc, vrrc,
20443 /* VADDUWM */
20444 vrrc, vrrc, vrrc,
20445 /* VADDUWS */
20446 vrrc, vrrc, vrrc,
20447 /* VAND */
20448 vrrc, vrrc, vrrc,
20449 /* VANDC */
20450 vrrc, vrrc, vrrc,
20451 /* VAVGSB */
20452 vrrc, vrrc, vrrc,
20453 /* VAVGSH */
20454 vrrc, vrrc, vrrc,
20455 /* VAVGSW */
20456 vrrc, vrrc, vrrc,
20457 /* VAVGUB */
20458 vrrc, vrrc, vrrc,
20459 /* VAVGUH */
20460 vrrc, vrrc, vrrc,
20461 /* VAVGUW */
20462 vrrc, vrrc, vrrc,
20463 /* VBPERMD */
20464 vrrc, vrrc, vrrc,
20465 /* VBPERMQ */
20466 vrrc, vrrc, vrrc,
20467 /* VCFSX */
20468 vrrc, u5imm, vrrc,
20469 /* VCFSX_0 */
20470 vrrc, vrrc,
20471 /* VCFUGED */
20472 vrrc, vrrc, vrrc,
20473 /* VCFUX */
20474 vrrc, u5imm, vrrc,
20475 /* VCFUX_0 */
20476 vrrc, vrrc,
20477 /* VCIPHER */
20478 vrrc, vrrc, vrrc,
20479 /* VCIPHERLAST */
20480 vrrc, vrrc, vrrc,
20481 /* VCLRLB */
20482 vrrc, vrrc, gprc,
20483 /* VCLRRB */
20484 vrrc, vrrc, gprc,
20485 /* VCLZB */
20486 vrrc, vrrc,
20487 /* VCLZD */
20488 vrrc, vrrc,
20489 /* VCLZDM */
20490 vrrc, vrrc, vrrc,
20491 /* VCLZH */
20492 vrrc, vrrc,
20493 /* VCLZLSBB */
20494 gprc, vrrc,
20495 /* VCLZW */
20496 vrrc, vrrc,
20497 /* VCMPBFP */
20498 vrrc, vrrc, vrrc,
20499 /* VCMPBFP_rec */
20500 vrrc, vrrc, vrrc,
20501 /* VCMPEQFP */
20502 vrrc, vrrc, vrrc,
20503 /* VCMPEQFP_rec */
20504 vrrc, vrrc, vrrc,
20505 /* VCMPEQUB */
20506 vrrc, vrrc, vrrc,
20507 /* VCMPEQUB_rec */
20508 vrrc, vrrc, vrrc,
20509 /* VCMPEQUD */
20510 vrrc, vrrc, vrrc,
20511 /* VCMPEQUD_rec */
20512 vrrc, vrrc, vrrc,
20513 /* VCMPEQUH */
20514 vrrc, vrrc, vrrc,
20515 /* VCMPEQUH_rec */
20516 vrrc, vrrc, vrrc,
20517 /* VCMPEQUQ */
20518 vrrc, vrrc, vrrc,
20519 /* VCMPEQUQ_rec */
20520 vrrc, vrrc, vrrc,
20521 /* VCMPEQUW */
20522 vrrc, vrrc, vrrc,
20523 /* VCMPEQUW_rec */
20524 vrrc, vrrc, vrrc,
20525 /* VCMPGEFP */
20526 vrrc, vrrc, vrrc,
20527 /* VCMPGEFP_rec */
20528 vrrc, vrrc, vrrc,
20529 /* VCMPGTFP */
20530 vrrc, vrrc, vrrc,
20531 /* VCMPGTFP_rec */
20532 vrrc, vrrc, vrrc,
20533 /* VCMPGTSB */
20534 vrrc, vrrc, vrrc,
20535 /* VCMPGTSB_rec */
20536 vrrc, vrrc, vrrc,
20537 /* VCMPGTSD */
20538 vrrc, vrrc, vrrc,
20539 /* VCMPGTSD_rec */
20540 vrrc, vrrc, vrrc,
20541 /* VCMPGTSH */
20542 vrrc, vrrc, vrrc,
20543 /* VCMPGTSH_rec */
20544 vrrc, vrrc, vrrc,
20545 /* VCMPGTSQ */
20546 vrrc, vrrc, vrrc,
20547 /* VCMPGTSQ_rec */
20548 vrrc, vrrc, vrrc,
20549 /* VCMPGTSW */
20550 vrrc, vrrc, vrrc,
20551 /* VCMPGTSW_rec */
20552 vrrc, vrrc, vrrc,
20553 /* VCMPGTUB */
20554 vrrc, vrrc, vrrc,
20555 /* VCMPGTUB_rec */
20556 vrrc, vrrc, vrrc,
20557 /* VCMPGTUD */
20558 vrrc, vrrc, vrrc,
20559 /* VCMPGTUD_rec */
20560 vrrc, vrrc, vrrc,
20561 /* VCMPGTUH */
20562 vrrc, vrrc, vrrc,
20563 /* VCMPGTUH_rec */
20564 vrrc, vrrc, vrrc,
20565 /* VCMPGTUQ */
20566 vrrc, vrrc, vrrc,
20567 /* VCMPGTUQ_rec */
20568 vrrc, vrrc, vrrc,
20569 /* VCMPGTUW */
20570 vrrc, vrrc, vrrc,
20571 /* VCMPGTUW_rec */
20572 vrrc, vrrc, vrrc,
20573 /* VCMPNEB */
20574 vrrc, vrrc, vrrc,
20575 /* VCMPNEB_rec */
20576 vrrc, vrrc, vrrc,
20577 /* VCMPNEH */
20578 vrrc, vrrc, vrrc,
20579 /* VCMPNEH_rec */
20580 vrrc, vrrc, vrrc,
20581 /* VCMPNEW */
20582 vrrc, vrrc, vrrc,
20583 /* VCMPNEW_rec */
20584 vrrc, vrrc, vrrc,
20585 /* VCMPNEZB */
20586 vrrc, vrrc, vrrc,
20587 /* VCMPNEZB_rec */
20588 vrrc, vrrc, vrrc,
20589 /* VCMPNEZH */
20590 vrrc, vrrc, vrrc,
20591 /* VCMPNEZH_rec */
20592 vrrc, vrrc, vrrc,
20593 /* VCMPNEZW */
20594 vrrc, vrrc, vrrc,
20595 /* VCMPNEZW_rec */
20596 vrrc, vrrc, vrrc,
20597 /* VCMPSQ */
20598 crrc, vrrc, vrrc,
20599 /* VCMPUQ */
20600 crrc, vrrc, vrrc,
20601 /* VCNTMBB */
20602 g8rc, vrrc, u1imm,
20603 /* VCNTMBD */
20604 g8rc, vrrc, u1imm,
20605 /* VCNTMBH */
20606 g8rc, vrrc, u1imm,
20607 /* VCNTMBW */
20608 g8rc, vrrc, u1imm,
20609 /* VCTSXS */
20610 vrrc, u5imm, vrrc,
20611 /* VCTSXS_0 */
20612 vrrc, vrrc,
20613 /* VCTUXS */
20614 vrrc, u5imm, vrrc,
20615 /* VCTUXS_0 */
20616 vrrc, vrrc,
20617 /* VCTZB */
20618 vrrc, vrrc,
20619 /* VCTZD */
20620 vrrc, vrrc,
20621 /* VCTZDM */
20622 vrrc, vrrc, vrrc,
20623 /* VCTZH */
20624 vrrc, vrrc,
20625 /* VCTZLSBB */
20626 gprc, vrrc,
20627 /* VCTZW */
20628 vrrc, vrrc,
20629 /* VDIVESD */
20630 vrrc, vrrc, vrrc,
20631 /* VDIVESQ */
20632 vrrc, vrrc, vrrc,
20633 /* VDIVESW */
20634 vrrc, vrrc, vrrc,
20635 /* VDIVEUD */
20636 vrrc, vrrc, vrrc,
20637 /* VDIVEUQ */
20638 vrrc, vrrc, vrrc,
20639 /* VDIVEUW */
20640 vrrc, vrrc, vrrc,
20641 /* VDIVSD */
20642 vrrc, vrrc, vrrc,
20643 /* VDIVSQ */
20644 vrrc, vrrc, vrrc,
20645 /* VDIVSW */
20646 vrrc, vrrc, vrrc,
20647 /* VDIVUD */
20648 vrrc, vrrc, vrrc,
20649 /* VDIVUQ */
20650 vrrc, vrrc, vrrc,
20651 /* VDIVUW */
20652 vrrc, vrrc, vrrc,
20653 /* VEQV */
20654 vrrc, vrrc, vrrc,
20655 /* VEXPANDBM */
20656 vrrc, vrrc,
20657 /* VEXPANDDM */
20658 vrrc, vrrc,
20659 /* VEXPANDHM */
20660 vrrc, vrrc,
20661 /* VEXPANDQM */
20662 vrrc, vrrc,
20663 /* VEXPANDWM */
20664 vrrc, vrrc,
20665 /* VEXPTEFP */
20666 vrrc, vrrc,
20667 /* VEXTDDVLX */
20668 vrrc, vrrc, vrrc, gprc,
20669 /* VEXTDDVRX */
20670 vrrc, vrrc, vrrc, gprc,
20671 /* VEXTDUBVLX */
20672 vrrc, vrrc, vrrc, gprc,
20673 /* VEXTDUBVRX */
20674 vrrc, vrrc, vrrc, gprc,
20675 /* VEXTDUHVLX */
20676 vrrc, vrrc, vrrc, gprc,
20677 /* VEXTDUHVRX */
20678 vrrc, vrrc, vrrc, gprc,
20679 /* VEXTDUWVLX */
20680 vrrc, vrrc, vrrc, gprc,
20681 /* VEXTDUWVRX */
20682 vrrc, vrrc, vrrc, gprc,
20683 /* VEXTRACTBM */
20684 gprc, vrrc,
20685 /* VEXTRACTD */
20686 vrrc, u4imm, vrrc,
20687 /* VEXTRACTDM */
20688 gprc, vrrc,
20689 /* VEXTRACTHM */
20690 gprc, vrrc,
20691 /* VEXTRACTQM */
20692 gprc, vrrc,
20693 /* VEXTRACTUB */
20694 vrrc, u4imm, vrrc,
20695 /* VEXTRACTUH */
20696 vrrc, u4imm, vrrc,
20697 /* VEXTRACTUW */
20698 vrrc, u4imm, vrrc,
20699 /* VEXTRACTWM */
20700 gprc, vrrc,
20701 /* VEXTSB2D */
20702 vrrc, vrrc,
20703 /* VEXTSB2Ds */
20704 vfrc, vfrc,
20705 /* VEXTSB2W */
20706 vrrc, vrrc,
20707 /* VEXTSB2Ws */
20708 vfrc, vfrc,
20709 /* VEXTSD2Q */
20710 vrrc, vrrc,
20711 /* VEXTSH2D */
20712 vrrc, vrrc,
20713 /* VEXTSH2Ds */
20714 vfrc, vfrc,
20715 /* VEXTSH2W */
20716 vrrc, vrrc,
20717 /* VEXTSH2Ws */
20718 vfrc, vfrc,
20719 /* VEXTSW2D */
20720 vrrc, vrrc,
20721 /* VEXTSW2Ds */
20722 vfrc, vfrc,
20723 /* VEXTUBLX */
20724 g8rc, g8rc, vrrc,
20725 /* VEXTUBRX */
20726 g8rc, g8rc, vrrc,
20727 /* VEXTUHLX */
20728 g8rc, g8rc, vrrc,
20729 /* VEXTUHRX */
20730 g8rc, g8rc, vrrc,
20731 /* VEXTUWLX */
20732 g8rc, g8rc, vrrc,
20733 /* VEXTUWRX */
20734 g8rc, g8rc, vrrc,
20735 /* VGBBD */
20736 vrrc, vrrc,
20737 /* VGNB */
20738 g8rc, vrrc, u3imm,
20739 /* VINSBLX */
20740 vrrc, vrrc, gprc, gprc,
20741 /* VINSBRX */
20742 vrrc, vrrc, gprc, gprc,
20743 /* VINSBVLX */
20744 vrrc, vrrc, gprc, vrrc,
20745 /* VINSBVRX */
20746 vrrc, vrrc, gprc, vrrc,
20747 /* VINSD */
20748 vrrc, vrrc, u4imm, g8rc,
20749 /* VINSDLX */
20750 vrrc, vrrc, g8rc, g8rc,
20751 /* VINSDRX */
20752 vrrc, vrrc, g8rc, g8rc,
20753 /* VINSERTB */
20754 vrrc, vrrc, u4imm, vrrc,
20755 /* VINSERTD */
20756 vrrc, u4imm, vrrc,
20757 /* VINSERTH */
20758 vrrc, vrrc, u4imm, vrrc,
20759 /* VINSERTW */
20760 vrrc, u4imm, vrrc,
20761 /* VINSHLX */
20762 vrrc, vrrc, gprc, gprc,
20763 /* VINSHRX */
20764 vrrc, vrrc, gprc, gprc,
20765 /* VINSHVLX */
20766 vrrc, vrrc, gprc, vrrc,
20767 /* VINSHVRX */
20768 vrrc, vrrc, gprc, vrrc,
20769 /* VINSW */
20770 vrrc, vrrc, u4imm, gprc,
20771 /* VINSWLX */
20772 vrrc, vrrc, gprc, gprc,
20773 /* VINSWRX */
20774 vrrc, vrrc, gprc, gprc,
20775 /* VINSWVLX */
20776 vrrc, vrrc, gprc, vrrc,
20777 /* VINSWVRX */
20778 vrrc, vrrc, gprc, vrrc,
20779 /* VLOGEFP */
20780 vrrc, vrrc,
20781 /* VMADDFP */
20782 vrrc, vrrc, vrrc, vrrc,
20783 /* VMAXFP */
20784 vrrc, vrrc, vrrc,
20785 /* VMAXSB */
20786 vrrc, vrrc, vrrc,
20787 /* VMAXSD */
20788 vrrc, vrrc, vrrc,
20789 /* VMAXSH */
20790 vrrc, vrrc, vrrc,
20791 /* VMAXSW */
20792 vrrc, vrrc, vrrc,
20793 /* VMAXUB */
20794 vrrc, vrrc, vrrc,
20795 /* VMAXUD */
20796 vrrc, vrrc, vrrc,
20797 /* VMAXUH */
20798 vrrc, vrrc, vrrc,
20799 /* VMAXUW */
20800 vrrc, vrrc, vrrc,
20801 /* VMHADDSHS */
20802 vrrc, vrrc, vrrc, vrrc,
20803 /* VMHRADDSHS */
20804 vrrc, vrrc, vrrc, vrrc,
20805 /* VMINFP */
20806 vrrc, vrrc, vrrc,
20807 /* VMINSB */
20808 vrrc, vrrc, vrrc,
20809 /* VMINSD */
20810 vrrc, vrrc, vrrc,
20811 /* VMINSH */
20812 vrrc, vrrc, vrrc,
20813 /* VMINSW */
20814 vrrc, vrrc, vrrc,
20815 /* VMINUB */
20816 vrrc, vrrc, vrrc,
20817 /* VMINUD */
20818 vrrc, vrrc, vrrc,
20819 /* VMINUH */
20820 vrrc, vrrc, vrrc,
20821 /* VMINUW */
20822 vrrc, vrrc, vrrc,
20823 /* VMLADDUHM */
20824 vrrc, vrrc, vrrc, vrrc,
20825 /* VMODSD */
20826 vrrc, vrrc, vrrc,
20827 /* VMODSQ */
20828 vrrc, vrrc, vrrc,
20829 /* VMODSW */
20830 vrrc, vrrc, vrrc,
20831 /* VMODUD */
20832 vrrc, vrrc, vrrc,
20833 /* VMODUQ */
20834 vrrc, vrrc, vrrc,
20835 /* VMODUW */
20836 vrrc, vrrc, vrrc,
20837 /* VMRGEW */
20838 vrrc, vrrc, vrrc,
20839 /* VMRGHB */
20840 vrrc, vrrc, vrrc,
20841 /* VMRGHH */
20842 vrrc, vrrc, vrrc,
20843 /* VMRGHW */
20844 vrrc, vrrc, vrrc,
20845 /* VMRGLB */
20846 vrrc, vrrc, vrrc,
20847 /* VMRGLH */
20848 vrrc, vrrc, vrrc,
20849 /* VMRGLW */
20850 vrrc, vrrc, vrrc,
20851 /* VMRGOW */
20852 vrrc, vrrc, vrrc,
20853 /* VMSUMCUD */
20854 vrrc, vrrc, vrrc, vrrc,
20855 /* VMSUMMBM */
20856 vrrc, vrrc, vrrc, vrrc,
20857 /* VMSUMSHM */
20858 vrrc, vrrc, vrrc, vrrc,
20859 /* VMSUMSHS */
20860 vrrc, vrrc, vrrc, vrrc,
20861 /* VMSUMUBM */
20862 vrrc, vrrc, vrrc, vrrc,
20863 /* VMSUMUDM */
20864 vrrc, vrrc, vrrc, vrrc,
20865 /* VMSUMUHM */
20866 vrrc, vrrc, vrrc, vrrc,
20867 /* VMSUMUHS */
20868 vrrc, vrrc, vrrc, vrrc,
20869 /* VMUL10CUQ */
20870 vrrc, vrrc,
20871 /* VMUL10ECUQ */
20872 vrrc, vrrc, vrrc,
20873 /* VMUL10EUQ */
20874 vrrc, vrrc, vrrc,
20875 /* VMUL10UQ */
20876 vrrc, vrrc,
20877 /* VMULESB */
20878 vrrc, vrrc, vrrc,
20879 /* VMULESD */
20880 vrrc, vrrc, vrrc,
20881 /* VMULESH */
20882 vrrc, vrrc, vrrc,
20883 /* VMULESW */
20884 vrrc, vrrc, vrrc,
20885 /* VMULEUB */
20886 vrrc, vrrc, vrrc,
20887 /* VMULEUD */
20888 vrrc, vrrc, vrrc,
20889 /* VMULEUH */
20890 vrrc, vrrc, vrrc,
20891 /* VMULEUW */
20892 vrrc, vrrc, vrrc,
20893 /* VMULHSD */
20894 vrrc, vrrc, vrrc,
20895 /* VMULHSW */
20896 vrrc, vrrc, vrrc,
20897 /* VMULHUD */
20898 vrrc, vrrc, vrrc,
20899 /* VMULHUW */
20900 vrrc, vrrc, vrrc,
20901 /* VMULLD */
20902 vrrc, vrrc, vrrc,
20903 /* VMULOSB */
20904 vrrc, vrrc, vrrc,
20905 /* VMULOSD */
20906 vrrc, vrrc, vrrc,
20907 /* VMULOSH */
20908 vrrc, vrrc, vrrc,
20909 /* VMULOSW */
20910 vrrc, vrrc, vrrc,
20911 /* VMULOUB */
20912 vrrc, vrrc, vrrc,
20913 /* VMULOUD */
20914 vrrc, vrrc, vrrc,
20915 /* VMULOUH */
20916 vrrc, vrrc, vrrc,
20917 /* VMULOUW */
20918 vrrc, vrrc, vrrc,
20919 /* VMULUWM */
20920 vrrc, vrrc, vrrc,
20921 /* VNAND */
20922 vrrc, vrrc, vrrc,
20923 /* VNCIPHER */
20924 vrrc, vrrc, vrrc,
20925 /* VNCIPHERLAST */
20926 vrrc, vrrc, vrrc,
20927 /* VNEGD */
20928 vrrc, vrrc,
20929 /* VNEGW */
20930 vrrc, vrrc,
20931 /* VNMSUBFP */
20932 vrrc, vrrc, vrrc, vrrc,
20933 /* VNOR */
20934 vrrc, vrrc, vrrc,
20935 /* VOR */
20936 vrrc, vrrc, vrrc,
20937 /* VORC */
20938 vrrc, vrrc, vrrc,
20939 /* VPDEPD */
20940 vrrc, vrrc, vrrc,
20941 /* VPERM */
20942 vrrc, vrrc, vrrc, vrrc,
20943 /* VPERMR */
20944 vrrc, vrrc, vrrc, vrrc,
20945 /* VPERMXOR */
20946 vrrc, vrrc, vrrc, vrrc,
20947 /* VPEXTD */
20948 vrrc, vrrc, vrrc,
20949 /* VPKPX */
20950 vrrc, vrrc, vrrc,
20951 /* VPKSDSS */
20952 vrrc, vrrc, vrrc,
20953 /* VPKSDUS */
20954 vrrc, vrrc, vrrc,
20955 /* VPKSHSS */
20956 vrrc, vrrc, vrrc,
20957 /* VPKSHUS */
20958 vrrc, vrrc, vrrc,
20959 /* VPKSWSS */
20960 vrrc, vrrc, vrrc,
20961 /* VPKSWUS */
20962 vrrc, vrrc, vrrc,
20963 /* VPKUDUM */
20964 vrrc, vrrc, vrrc,
20965 /* VPKUDUS */
20966 vrrc, vrrc, vrrc,
20967 /* VPKUHUM */
20968 vrrc, vrrc, vrrc,
20969 /* VPKUHUS */
20970 vrrc, vrrc, vrrc,
20971 /* VPKUWUM */
20972 vrrc, vrrc, vrrc,
20973 /* VPKUWUS */
20974 vrrc, vrrc, vrrc,
20975 /* VPMSUMB */
20976 vrrc, vrrc, vrrc,
20977 /* VPMSUMD */
20978 vrrc, vrrc, vrrc,
20979 /* VPMSUMH */
20980 vrrc, vrrc, vrrc,
20981 /* VPMSUMW */
20982 vrrc, vrrc, vrrc,
20983 /* VPOPCNTB */
20984 vrrc, vrrc,
20985 /* VPOPCNTD */
20986 vrrc, vrrc,
20987 /* VPOPCNTH */
20988 vrrc, vrrc,
20989 /* VPOPCNTW */
20990 vrrc, vrrc,
20991 /* VPRTYBD */
20992 vrrc, vrrc,
20993 /* VPRTYBQ */
20994 vrrc, vrrc,
20995 /* VPRTYBW */
20996 vrrc, vrrc,
20997 /* VREFP */
20998 vrrc, vrrc,
20999 /* VRFIM */
21000 vrrc, vrrc,
21001 /* VRFIN */
21002 vrrc, vrrc,
21003 /* VRFIP */
21004 vrrc, vrrc,
21005 /* VRFIZ */
21006 vrrc, vrrc,
21007 /* VRLB */
21008 vrrc, vrrc, vrrc,
21009 /* VRLD */
21010 vrrc, vrrc, vrrc,
21011 /* VRLDMI */
21012 vrrc, vrrc, vrrc, vrrc,
21013 /* VRLDNM */
21014 vrrc, vrrc, vrrc,
21015 /* VRLH */
21016 vrrc, vrrc, vrrc,
21017 /* VRLQ */
21018 vrrc, vrrc, vrrc,
21019 /* VRLQMI */
21020 vrrc, vrrc, vrrc, vrrc,
21021 /* VRLQNM */
21022 vrrc, vrrc, vrrc,
21023 /* VRLW */
21024 vrrc, vrrc, vrrc,
21025 /* VRLWMI */
21026 vrrc, vrrc, vrrc, vrrc,
21027 /* VRLWNM */
21028 vrrc, vrrc, vrrc,
21029 /* VRSQRTEFP */
21030 vrrc, vrrc,
21031 /* VSBOX */
21032 vrrc, vrrc,
21033 /* VSEL */
21034 vrrc, vrrc, vrrc, vrrc,
21035 /* VSHASIGMAD */
21036 vrrc, vrrc, u1imm, u4imm,
21037 /* VSHASIGMAW */
21038 vrrc, vrrc, u1imm, u4imm,
21039 /* VSL */
21040 vrrc, vrrc, vrrc,
21041 /* VSLB */
21042 vrrc, vrrc, vrrc,
21043 /* VSLD */
21044 vrrc, vrrc, vrrc,
21045 /* VSLDBI */
21046 vrrc, vrrc, vrrc, u3imm,
21047 /* VSLDOI */
21048 vrrc, vrrc, vrrc, u4imm,
21049 /* VSLH */
21050 vrrc, vrrc, vrrc,
21051 /* VSLO */
21052 vrrc, vrrc, vrrc,
21053 /* VSLQ */
21054 vrrc, vrrc, vrrc,
21055 /* VSLV */
21056 vrrc, vrrc, vrrc,
21057 /* VSLW */
21058 vrrc, vrrc, vrrc,
21059 /* VSPLTB */
21060 vrrc, u5imm, vrrc,
21061 /* VSPLTBs */
21062 vrrc, u5imm, vfrc,
21063 /* VSPLTH */
21064 vrrc, u5imm, vrrc,
21065 /* VSPLTHs */
21066 vrrc, u5imm, vfrc,
21067 /* VSPLTISB */
21068 vrrc, s5imm,
21069 /* VSPLTISH */
21070 vrrc, s5imm,
21071 /* VSPLTISW */
21072 vrrc, s5imm,
21073 /* VSPLTW */
21074 vrrc, u5imm, vrrc,
21075 /* VSR */
21076 vrrc, vrrc, vrrc,
21077 /* VSRAB */
21078 vrrc, vrrc, vrrc,
21079 /* VSRAD */
21080 vrrc, vrrc, vrrc,
21081 /* VSRAH */
21082 vrrc, vrrc, vrrc,
21083 /* VSRAQ */
21084 vrrc, vrrc, vrrc,
21085 /* VSRAW */
21086 vrrc, vrrc, vrrc,
21087 /* VSRB */
21088 vrrc, vrrc, vrrc,
21089 /* VSRD */
21090 vrrc, vrrc, vrrc,
21091 /* VSRDBI */
21092 vrrc, vrrc, vrrc, u3imm,
21093 /* VSRH */
21094 vrrc, vrrc, vrrc,
21095 /* VSRO */
21096 vrrc, vrrc, vrrc,
21097 /* VSRQ */
21098 vrrc, vrrc, vrrc,
21099 /* VSRV */
21100 vrrc, vrrc, vrrc,
21101 /* VSRW */
21102 vrrc, vrrc, vrrc,
21103 /* VSTRIBL */
21104 vrrc, vrrc,
21105 /* VSTRIBL_rec */
21106 vrrc, vrrc,
21107 /* VSTRIBR */
21108 vrrc, vrrc,
21109 /* VSTRIBR_rec */
21110 vrrc, vrrc,
21111 /* VSTRIHL */
21112 vrrc, vrrc,
21113 /* VSTRIHL_rec */
21114 vrrc, vrrc,
21115 /* VSTRIHR */
21116 vrrc, vrrc,
21117 /* VSTRIHR_rec */
21118 vrrc, vrrc,
21119 /* VSUBCUQ */
21120 vrrc, vrrc, vrrc,
21121 /* VSUBCUW */
21122 vrrc, vrrc, vrrc,
21123 /* VSUBECUQ */
21124 vrrc, vrrc, vrrc, vrrc,
21125 /* VSUBEUQM */
21126 vrrc, vrrc, vrrc, vrrc,
21127 /* VSUBFP */
21128 vrrc, vrrc, vrrc,
21129 /* VSUBSBS */
21130 vrrc, vrrc, vrrc,
21131 /* VSUBSHS */
21132 vrrc, vrrc, vrrc,
21133 /* VSUBSWS */
21134 vrrc, vrrc, vrrc,
21135 /* VSUBUBM */
21136 vrrc, vrrc, vrrc,
21137 /* VSUBUBS */
21138 vrrc, vrrc, vrrc,
21139 /* VSUBUDM */
21140 vrrc, vrrc, vrrc,
21141 /* VSUBUHM */
21142 vrrc, vrrc, vrrc,
21143 /* VSUBUHS */
21144 vrrc, vrrc, vrrc,
21145 /* VSUBUQM */
21146 vrrc, vrrc, vrrc,
21147 /* VSUBUWM */
21148 vrrc, vrrc, vrrc,
21149 /* VSUBUWS */
21150 vrrc, vrrc, vrrc,
21151 /* VSUM2SWS */
21152 vrrc, vrrc, vrrc,
21153 /* VSUM4SBS */
21154 vrrc, vrrc, vrrc,
21155 /* VSUM4SHS */
21156 vrrc, vrrc, vrrc,
21157 /* VSUM4UBS */
21158 vrrc, vrrc, vrrc,
21159 /* VSUMSWS */
21160 vrrc, vrrc, vrrc,
21161 /* VUPKHPX */
21162 vrrc, vrrc,
21163 /* VUPKHSB */
21164 vrrc, vrrc,
21165 /* VUPKHSH */
21166 vrrc, vrrc,
21167 /* VUPKHSW */
21168 vrrc, vrrc,
21169 /* VUPKLPX */
21170 vrrc, vrrc,
21171 /* VUPKLSB */
21172 vrrc, vrrc,
21173 /* VUPKLSH */
21174 vrrc, vrrc,
21175 /* VUPKLSW */
21176 vrrc, vrrc,
21177 /* VXOR */
21178 vrrc, vrrc, vrrc,
21179 /* V_SET0 */
21180 vrrc,
21181 /* V_SET0B */
21182 vrrc,
21183 /* V_SET0H */
21184 vrrc,
21185 /* V_SETALLONES */
21186 vrrc,
21187 /* V_SETALLONESB */
21188 vrrc,
21189 /* V_SETALLONESH */
21190 vrrc,
21191 /* WAIT */
21192 u2imm,
21193 /* WAITP10 */
21194 u2imm, u2imm,
21195 /* WRTEE */
21196 gprc,
21197 /* WRTEEI */
21198 i1imm,
21199 /* XOR */
21200 gprc, gprc, gprc,
21201 /* XOR8 */
21202 g8rc, g8rc, g8rc,
21203 /* XOR8_rec */
21204 g8rc, g8rc, g8rc,
21205 /* XORI */
21206 gprc, gprc, u16imm,
21207 /* XORI8 */
21208 g8rc, g8rc, u16imm64,
21209 /* XORIS */
21210 gprc, gprc, u16imm,
21211 /* XORIS8 */
21212 g8rc, g8rc, u16imm64,
21213 /* XOR_rec */
21214 gprc, gprc, gprc,
21215 /* XSABSDP */
21216 vsfrc, vsfrc,
21217 /* XSABSQP */
21218 vrrc, vrrc,
21219 /* XSADDDP */
21220 vsfrc, vsfrc, vsfrc,
21221 /* XSADDQP */
21222 vrrc, vrrc, vrrc,
21223 /* XSADDQPO */
21224 vrrc, vrrc, vrrc,
21225 /* XSADDSP */
21226 vssrc, vssrc, vssrc,
21227 /* XSCMPEQDP */
21228 vsrc, vsfrc, vsfrc,
21229 /* XSCMPEQQP */
21230 vrrc, vrrc, vrrc,
21231 /* XSCMPEXPDP */
21232 crrc, vsfrc, vsfrc,
21233 /* XSCMPEXPQP */
21234 crrc, vrrc, vrrc,
21235 /* XSCMPGEDP */
21236 vsrc, vsfrc, vsfrc,
21237 /* XSCMPGEQP */
21238 vrrc, vrrc, vrrc,
21239 /* XSCMPGTDP */
21240 vsrc, vsfrc, vsfrc,
21241 /* XSCMPGTQP */
21242 vrrc, vrrc, vrrc,
21243 /* XSCMPODP */
21244 crrc, vsfrc, vsfrc,
21245 /* XSCMPOQP */
21246 crrc, vrrc, vrrc,
21247 /* XSCMPUDP */
21248 crrc, vsfrc, vsfrc,
21249 /* XSCMPUQP */
21250 crrc, vrrc, vrrc,
21251 /* XSCPSGNDP */
21252 vsfrc, vsfrc, vsfrc,
21253 /* XSCPSGNQP */
21254 vrrc, vrrc, vrrc,
21255 /* XSCVDPHP */
21256 vsfrc, vsfrc,
21257 /* XSCVDPQP */
21258 vrrc, vfrc,
21259 /* XSCVDPSP */
21260 vsfrc, vsfrc,
21261 /* XSCVDPSPN */
21262 vsrc, vssrc,
21263 /* XSCVDPSXDS */
21264 vsfrc, vsfrc,
21265 /* XSCVDPSXDSs */
21266 vssrc, vssrc,
21267 /* XSCVDPSXWS */
21268 vsfrc, vsfrc,
21269 /* XSCVDPSXWSs */
21270 vssrc, vssrc,
21271 /* XSCVDPUXDS */
21272 vsfrc, vsfrc,
21273 /* XSCVDPUXDSs */
21274 vssrc, vssrc,
21275 /* XSCVDPUXWS */
21276 vsfrc, vsfrc,
21277 /* XSCVDPUXWSs */
21278 vssrc, vssrc,
21279 /* XSCVHPDP */
21280 vsfrc, vsfrc,
21281 /* XSCVQPDP */
21282 vfrc, vrrc,
21283 /* XSCVQPDPO */
21284 vfrc, vrrc,
21285 /* XSCVQPSDZ */
21286 vrrc, vrrc,
21287 /* XSCVQPSQZ */
21288 vrrc, vrrc,
21289 /* XSCVQPSWZ */
21290 vrrc, vrrc,
21291 /* XSCVQPUDZ */
21292 vrrc, vrrc,
21293 /* XSCVQPUQZ */
21294 vrrc, vrrc,
21295 /* XSCVQPUWZ */
21296 vrrc, vrrc,
21297 /* XSCVSDQP */
21298 vrrc, vfrc,
21299 /* XSCVSPDP */
21300 vsfrc, vsfrc,
21301 /* XSCVSPDPN */
21302 vssrc, vsrc,
21303 /* XSCVSQQP */
21304 vrrc, vrrc,
21305 /* XSCVSXDDP */
21306 vsfrc, vsfrc,
21307 /* XSCVSXDSP */
21308 vssrc, vsfrc,
21309 /* XSCVUDQP */
21310 vrrc, vfrc,
21311 /* XSCVUQQP */
21312 vrrc, vrrc,
21313 /* XSCVUXDDP */
21314 vsfrc, vsfrc,
21315 /* XSCVUXDSP */
21316 vssrc, vsfrc,
21317 /* XSDIVDP */
21318 vsfrc, vsfrc, vsfrc,
21319 /* XSDIVQP */
21320 vrrc, vrrc, vrrc,
21321 /* XSDIVQPO */
21322 vrrc, vrrc, vrrc,
21323 /* XSDIVSP */
21324 vssrc, vssrc, vssrc,
21325 /* XSIEXPDP */
21326 vsrc, g8rc, g8rc,
21327 /* XSIEXPQP */
21328 vrrc, vrrc, vsfrc,
21329 /* XSMADDADP */
21330 vsfrc, vsfrc, vsfrc, vsfrc,
21331 /* XSMADDASP */
21332 vssrc, vssrc, vssrc, vssrc,
21333 /* XSMADDMDP */
21334 vsfrc, vsfrc, vsfrc, vsfrc,
21335 /* XSMADDMSP */
21336 vssrc, vssrc, vssrc, vssrc,
21337 /* XSMADDQP */
21338 vrrc, vrrc, vrrc, vrrc,
21339 /* XSMADDQPO */
21340 vrrc, vrrc, vrrc, vrrc,
21341 /* XSMAXCDP */
21342 vsfrc, vsfrc, vsfrc,
21343 /* XSMAXCQP */
21344 vrrc, vrrc, vrrc,
21345 /* XSMAXDP */
21346 vsfrc, vsfrc, vsfrc,
21347 /* XSMAXJDP */
21348 vsrc, vsfrc, vsfrc,
21349 /* XSMINCDP */
21350 vsfrc, vsfrc, vsfrc,
21351 /* XSMINCQP */
21352 vrrc, vrrc, vrrc,
21353 /* XSMINDP */
21354 vsfrc, vsfrc, vsfrc,
21355 /* XSMINJDP */
21356 vsrc, vsfrc, vsfrc,
21357 /* XSMSUBADP */
21358 vsfrc, vsfrc, vsfrc, vsfrc,
21359 /* XSMSUBASP */
21360 vssrc, vssrc, vssrc, vssrc,
21361 /* XSMSUBMDP */
21362 vsfrc, vsfrc, vsfrc, vsfrc,
21363 /* XSMSUBMSP */
21364 vssrc, vssrc, vssrc, vssrc,
21365 /* XSMSUBQP */
21366 vrrc, vrrc, vrrc, vrrc,
21367 /* XSMSUBQPO */
21368 vrrc, vrrc, vrrc, vrrc,
21369 /* XSMULDP */
21370 vsfrc, vsfrc, vsfrc,
21371 /* XSMULQP */
21372 vrrc, vrrc, vrrc,
21373 /* XSMULQPO */
21374 vrrc, vrrc, vrrc,
21375 /* XSMULSP */
21376 vssrc, vssrc, vssrc,
21377 /* XSNABSDP */
21378 vsfrc, vsfrc,
21379 /* XSNABSDPs */
21380 vssrc, vssrc,
21381 /* XSNABSQP */
21382 vrrc, vrrc,
21383 /* XSNEGDP */
21384 vsfrc, vsfrc,
21385 /* XSNEGQP */
21386 vrrc, vrrc,
21387 /* XSNMADDADP */
21388 vsfrc, vsfrc, vsfrc, vsfrc,
21389 /* XSNMADDASP */
21390 vssrc, vssrc, vssrc, vssrc,
21391 /* XSNMADDMDP */
21392 vsfrc, vsfrc, vsfrc, vsfrc,
21393 /* XSNMADDMSP */
21394 vssrc, vssrc, vssrc, vssrc,
21395 /* XSNMADDQP */
21396 vrrc, vrrc, vrrc, vrrc,
21397 /* XSNMADDQPO */
21398 vrrc, vrrc, vrrc, vrrc,
21399 /* XSNMSUBADP */
21400 vsfrc, vsfrc, vsfrc, vsfrc,
21401 /* XSNMSUBASP */
21402 vssrc, vssrc, vssrc, vssrc,
21403 /* XSNMSUBMDP */
21404 vsfrc, vsfrc, vsfrc, vsfrc,
21405 /* XSNMSUBMSP */
21406 vssrc, vssrc, vssrc, vssrc,
21407 /* XSNMSUBQP */
21408 vrrc, vrrc, vrrc, vrrc,
21409 /* XSNMSUBQPO */
21410 vrrc, vrrc, vrrc, vrrc,
21411 /* XSRDPI */
21412 vsfrc, vsfrc,
21413 /* XSRDPIC */
21414 vsfrc, vsfrc,
21415 /* XSRDPIM */
21416 vsfrc, vsfrc,
21417 /* XSRDPIP */
21418 vsfrc, vsfrc,
21419 /* XSRDPIZ */
21420 vsfrc, vsfrc,
21421 /* XSREDP */
21422 vsfrc, vsfrc,
21423 /* XSRESP */
21424 vssrc, vssrc,
21425 /* XSRQPI */
21426 vrrc, u1imm, vrrc, u2imm,
21427 /* XSRQPIX */
21428 vrrc, u1imm, vrrc, u2imm,
21429 /* XSRQPXP */
21430 vrrc, u1imm, vrrc, u2imm,
21431 /* XSRSP */
21432 vssrc, vsfrc,
21433 /* XSRSQRTEDP */
21434 vsfrc, vsfrc,
21435 /* XSRSQRTESP */
21436 vssrc, vssrc,
21437 /* XSSQRTDP */
21438 vsfrc, vsfrc,
21439 /* XSSQRTQP */
21440 vrrc, vrrc,
21441 /* XSSQRTQPO */
21442 vrrc, vrrc,
21443 /* XSSQRTSP */
21444 vssrc, vssrc,
21445 /* XSSUBDP */
21446 vsfrc, vsfrc, vsfrc,
21447 /* XSSUBQP */
21448 vrrc, vrrc, vrrc,
21449 /* XSSUBQPO */
21450 vrrc, vrrc, vrrc,
21451 /* XSSUBSP */
21452 vssrc, vssrc, vssrc,
21453 /* XSTDIVDP */
21454 crrc, vsfrc, vsfrc,
21455 /* XSTSQRTDP */
21456 crrc, vsfrc,
21457 /* XSTSTDCDP */
21458 crrc, u7imm, vsfrc,
21459 /* XSTSTDCQP */
21460 crrc, u7imm, vrrc,
21461 /* XSTSTDCSP */
21462 crrc, u7imm, vssrc,
21463 /* XSXEXPDP */
21464 g8rc, vsfrc,
21465 /* XSXEXPQP */
21466 vrrc, vrrc,
21467 /* XSXSIGDP */
21468 g8rc, vsfrc,
21469 /* XSXSIGQP */
21470 vrrc, vrrc,
21471 /* XVABSDP */
21472 vsrc, vsrc,
21473 /* XVABSSP */
21474 vsrc, vsrc,
21475 /* XVADDDP */
21476 vsrc, vsrc, vsrc,
21477 /* XVADDSP */
21478 vsrc, vsrc, vsrc,
21479 /* XVBF16GER2 */
21480 acc, vsrc, vsrc,
21481 /* XVBF16GER2NN */
21482 acc, acc, vsrc, vsrc,
21483 /* XVBF16GER2NP */
21484 acc, acc, vsrc, vsrc,
21485 /* XVBF16GER2PN */
21486 acc, acc, vsrc, vsrc,
21487 /* XVBF16GER2PP */
21488 acc, acc, vsrc, vsrc,
21489 /* XVBF16GER2W */
21490 wacc, vsrc, vsrc,
21491 /* XVBF16GER2WNN */
21492 wacc, wacc, vsrc, vsrc,
21493 /* XVBF16GER2WNP */
21494 wacc, wacc, vsrc, vsrc,
21495 /* XVBF16GER2WPN */
21496 wacc, wacc, vsrc, vsrc,
21497 /* XVBF16GER2WPP */
21498 wacc, wacc, vsrc, vsrc,
21499 /* XVCMPEQDP */
21500 vsrc, vsrc, vsrc,
21501 /* XVCMPEQDP_rec */
21502 vsrc, vsrc, vsrc,
21503 /* XVCMPEQSP */
21504 vsrc, vsrc, vsrc,
21505 /* XVCMPEQSP_rec */
21506 vsrc, vsrc, vsrc,
21507 /* XVCMPGEDP */
21508 vsrc, vsrc, vsrc,
21509 /* XVCMPGEDP_rec */
21510 vsrc, vsrc, vsrc,
21511 /* XVCMPGESP */
21512 vsrc, vsrc, vsrc,
21513 /* XVCMPGESP_rec */
21514 vsrc, vsrc, vsrc,
21515 /* XVCMPGTDP */
21516 vsrc, vsrc, vsrc,
21517 /* XVCMPGTDP_rec */
21518 vsrc, vsrc, vsrc,
21519 /* XVCMPGTSP */
21520 vsrc, vsrc, vsrc,
21521 /* XVCMPGTSP_rec */
21522 vsrc, vsrc, vsrc,
21523 /* XVCPSGNDP */
21524 vsrc, vsrc, vsrc,
21525 /* XVCPSGNSP */
21526 vsrc, vsrc, vsrc,
21527 /* XVCVBF16SPN */
21528 vsrc, vsrc,
21529 /* XVCVDPSP */
21530 vsrc, vsrc,
21531 /* XVCVDPSXDS */
21532 vsrc, vsrc,
21533 /* XVCVDPSXWS */
21534 vsrc, vsrc,
21535 /* XVCVDPUXDS */
21536 vsrc, vsrc,
21537 /* XVCVDPUXWS */
21538 vsrc, vsrc,
21539 /* XVCVHPSP */
21540 vsrc, vsrc,
21541 /* XVCVSPBF16 */
21542 vsrc, vsrc,
21543 /* XVCVSPDP */
21544 vsrc, vsrc,
21545 /* XVCVSPHP */
21546 vsrc, vsrc,
21547 /* XVCVSPSXDS */
21548 vsrc, vsrc,
21549 /* XVCVSPSXWS */
21550 vsrc, vsrc,
21551 /* XVCVSPUXDS */
21552 vsrc, vsrc,
21553 /* XVCVSPUXWS */
21554 vsrc, vsrc,
21555 /* XVCVSXDDP */
21556 vsrc, vsrc,
21557 /* XVCVSXDSP */
21558 vsrc, vsrc,
21559 /* XVCVSXWDP */
21560 vsrc, vsrc,
21561 /* XVCVSXWSP */
21562 vsrc, vsrc,
21563 /* XVCVUXDDP */
21564 vsrc, vsrc,
21565 /* XVCVUXDSP */
21566 vsrc, vsrc,
21567 /* XVCVUXWDP */
21568 vsrc, vsrc,
21569 /* XVCVUXWSP */
21570 vsrc, vsrc,
21571 /* XVDIVDP */
21572 vsrc, vsrc, vsrc,
21573 /* XVDIVSP */
21574 vsrc, vsrc, vsrc,
21575 /* XVF16GER2 */
21576 acc, vsrc, vsrc,
21577 /* XVF16GER2NN */
21578 acc, acc, vsrc, vsrc,
21579 /* XVF16GER2NP */
21580 acc, acc, vsrc, vsrc,
21581 /* XVF16GER2PN */
21582 acc, acc, vsrc, vsrc,
21583 /* XVF16GER2PP */
21584 acc, acc, vsrc, vsrc,
21585 /* XVF16GER2W */
21586 wacc, vsrc, vsrc,
21587 /* XVF16GER2WNN */
21588 wacc, wacc, vsrc, vsrc,
21589 /* XVF16GER2WNP */
21590 wacc, wacc, vsrc, vsrc,
21591 /* XVF16GER2WPN */
21592 wacc, wacc, vsrc, vsrc,
21593 /* XVF16GER2WPP */
21594 wacc, wacc, vsrc, vsrc,
21595 /* XVF32GER */
21596 acc, vsrc, vsrc,
21597 /* XVF32GERNN */
21598 acc, acc, vsrc, vsrc,
21599 /* XVF32GERNP */
21600 acc, acc, vsrc, vsrc,
21601 /* XVF32GERPN */
21602 acc, acc, vsrc, vsrc,
21603 /* XVF32GERPP */
21604 acc, acc, vsrc, vsrc,
21605 /* XVF32GERW */
21606 wacc, vsrc, vsrc,
21607 /* XVF32GERWNN */
21608 wacc, wacc, vsrc, vsrc,
21609 /* XVF32GERWNP */
21610 wacc, wacc, vsrc, vsrc,
21611 /* XVF32GERWPN */
21612 wacc, wacc, vsrc, vsrc,
21613 /* XVF32GERWPP */
21614 wacc, wacc, vsrc, vsrc,
21615 /* XVF64GER */
21616 acc, vsrpevenrc, vsrc,
21617 /* XVF64GERNN */
21618 acc, acc, vsrpevenrc, vsrc,
21619 /* XVF64GERNP */
21620 acc, acc, vsrpevenrc, vsrc,
21621 /* XVF64GERPN */
21622 acc, acc, vsrpevenrc, vsrc,
21623 /* XVF64GERPP */
21624 acc, acc, vsrpevenrc, vsrc,
21625 /* XVF64GERW */
21626 wacc, vsrpevenrc, vsrc,
21627 /* XVF64GERWNN */
21628 wacc, wacc, vsrpevenrc, vsrc,
21629 /* XVF64GERWNP */
21630 wacc, wacc, vsrpevenrc, vsrc,
21631 /* XVF64GERWPN */
21632 wacc, wacc, vsrpevenrc, vsrc,
21633 /* XVF64GERWPP */
21634 wacc, wacc, vsrpevenrc, vsrc,
21635 /* XVI16GER2 */
21636 acc, vsrc, vsrc,
21637 /* XVI16GER2PP */
21638 acc, acc, vsrc, vsrc,
21639 /* XVI16GER2S */
21640 acc, vsrc, vsrc,
21641 /* XVI16GER2SPP */
21642 acc, acc, vsrc, vsrc,
21643 /* XVI16GER2SW */
21644 wacc, vsrc, vsrc,
21645 /* XVI16GER2SWPP */
21646 wacc, wacc, vsrc, vsrc,
21647 /* XVI16GER2W */
21648 wacc, vsrc, vsrc,
21649 /* XVI16GER2WPP */
21650 wacc, wacc, vsrc, vsrc,
21651 /* XVI4GER8 */
21652 acc, vsrc, vsrc,
21653 /* XVI4GER8PP */
21654 acc, acc, vsrc, vsrc,
21655 /* XVI4GER8W */
21656 wacc, vsrc, vsrc,
21657 /* XVI4GER8WPP */
21658 wacc, wacc, vsrc, vsrc,
21659 /* XVI8GER4 */
21660 acc, vsrc, vsrc,
21661 /* XVI8GER4PP */
21662 acc, acc, vsrc, vsrc,
21663 /* XVI8GER4SPP */
21664 acc, acc, vsrc, vsrc,
21665 /* XVI8GER4W */
21666 wacc, vsrc, vsrc,
21667 /* XVI8GER4WPP */
21668 wacc, wacc, vsrc, vsrc,
21669 /* XVI8GER4WSPP */
21670 wacc, wacc, vsrc, vsrc,
21671 /* XVIEXPDP */
21672 vsrc, vsrc, vsrc,
21673 /* XVIEXPSP */
21674 vsrc, vsrc, vsrc,
21675 /* XVMADDADP */
21676 vsrc, vsrc, vsrc, vsrc,
21677 /* XVMADDASP */
21678 vsrc, vsrc, vsrc, vsrc,
21679 /* XVMADDMDP */
21680 vsrc, vsrc, vsrc, vsrc,
21681 /* XVMADDMSP */
21682 vsrc, vsrc, vsrc, vsrc,
21683 /* XVMAXDP */
21684 vsrc, vsrc, vsrc,
21685 /* XVMAXSP */
21686 vsrc, vsrc, vsrc,
21687 /* XVMINDP */
21688 vsrc, vsrc, vsrc,
21689 /* XVMINSP */
21690 vsrc, vsrc, vsrc,
21691 /* XVMSUBADP */
21692 vsrc, vsrc, vsrc, vsrc,
21693 /* XVMSUBASP */
21694 vsrc, vsrc, vsrc, vsrc,
21695 /* XVMSUBMDP */
21696 vsrc, vsrc, vsrc, vsrc,
21697 /* XVMSUBMSP */
21698 vsrc, vsrc, vsrc, vsrc,
21699 /* XVMULDP */
21700 vsrc, vsrc, vsrc,
21701 /* XVMULSP */
21702 vsrc, vsrc, vsrc,
21703 /* XVNABSDP */
21704 vsrc, vsrc,
21705 /* XVNABSSP */
21706 vsrc, vsrc,
21707 /* XVNEGDP */
21708 vsrc, vsrc,
21709 /* XVNEGSP */
21710 vsrc, vsrc,
21711 /* XVNMADDADP */
21712 vsrc, vsrc, vsrc, vsrc,
21713 /* XVNMADDASP */
21714 vsrc, vsrc, vsrc, vsrc,
21715 /* XVNMADDMDP */
21716 vsrc, vsrc, vsrc, vsrc,
21717 /* XVNMADDMSP */
21718 vsrc, vsrc, vsrc, vsrc,
21719 /* XVNMSUBADP */
21720 vsrc, vsrc, vsrc, vsrc,
21721 /* XVNMSUBASP */
21722 vsrc, vsrc, vsrc, vsrc,
21723 /* XVNMSUBMDP */
21724 vsrc, vsrc, vsrc, vsrc,
21725 /* XVNMSUBMSP */
21726 vsrc, vsrc, vsrc, vsrc,
21727 /* XVRDPI */
21728 vsrc, vsrc,
21729 /* XVRDPIC */
21730 vsrc, vsrc,
21731 /* XVRDPIM */
21732 vsrc, vsrc,
21733 /* XVRDPIP */
21734 vsrc, vsrc,
21735 /* XVRDPIZ */
21736 vsrc, vsrc,
21737 /* XVREDP */
21738 vsrc, vsrc,
21739 /* XVRESP */
21740 vsrc, vsrc,
21741 /* XVRSPI */
21742 vsrc, vsrc,
21743 /* XVRSPIC */
21744 vsrc, vsrc,
21745 /* XVRSPIM */
21746 vsrc, vsrc,
21747 /* XVRSPIP */
21748 vsrc, vsrc,
21749 /* XVRSPIZ */
21750 vsrc, vsrc,
21751 /* XVRSQRTEDP */
21752 vsrc, vsrc,
21753 /* XVRSQRTESP */
21754 vsrc, vsrc,
21755 /* XVSQRTDP */
21756 vsrc, vsrc,
21757 /* XVSQRTSP */
21758 vsrc, vsrc,
21759 /* XVSUBDP */
21760 vsrc, vsrc, vsrc,
21761 /* XVSUBSP */
21762 vsrc, vsrc, vsrc,
21763 /* XVTDIVDP */
21764 crrc, vsrc, vsrc,
21765 /* XVTDIVSP */
21766 crrc, vsrc, vsrc,
21767 /* XVTLSBB */
21768 crrc, vsrc,
21769 /* XVTSQRTDP */
21770 crrc, vsrc,
21771 /* XVTSQRTSP */
21772 crrc, vsrc,
21773 /* XVTSTDCDP */
21774 vsrc, u7imm, vsrc,
21775 /* XVTSTDCSP */
21776 vsrc, u7imm, vsrc,
21777 /* XVXEXPDP */
21778 vsrc, vsrc,
21779 /* XVXEXPSP */
21780 vsrc, vsrc,
21781 /* XVXSIGDP */
21782 vsrc, vsrc,
21783 /* XVXSIGSP */
21784 vsrc, vsrc,
21785 /* XXBLENDVB */
21786 vsrc, vsrc, vsrc, vsrc,
21787 /* XXBLENDVD */
21788 vsrc, vsrc, vsrc, vsrc,
21789 /* XXBLENDVH */
21790 vsrc, vsrc, vsrc, vsrc,
21791 /* XXBLENDVW */
21792 vsrc, vsrc, vsrc, vsrc,
21793 /* XXBRD */
21794 vsrc, vsrc,
21795 /* XXBRH */
21796 vsrc, vsrc,
21797 /* XXBRQ */
21798 vsrc, vsrc,
21799 /* XXBRW */
21800 vsrc, vsrc,
21801 /* XXEVAL */
21802 vsrc, vsrc, vsrc, vsrc, u8imm,
21803 /* XXEXTRACTUW */
21804 vsfrc, vsrc, u4imm,
21805 /* XXGENPCVBM */
21806 vsrc, vrrc, s5imm,
21807 /* XXGENPCVDM */
21808 vsrc, vrrc, s5imm,
21809 /* XXGENPCVHM */
21810 vsrc, vrrc, s5imm,
21811 /* XXGENPCVWM */
21812 vsrc, vrrc, s5imm,
21813 /* XXINSERTW */
21814 vsrc, vsrc, vsrc, u4imm,
21815 /* XXLAND */
21816 vsrc, vsrc, vsrc,
21817 /* XXLANDC */
21818 vsrc, vsrc, vsrc,
21819 /* XXLEQV */
21820 vsrc, vsrc, vsrc,
21821 /* XXLEQVOnes */
21822 vsrc,
21823 /* XXLNAND */
21824 vsrc, vsrc, vsrc,
21825 /* XXLNOR */
21826 vsrc, vsrc, vsrc,
21827 /* XXLOR */
21828 vsrc, vsrc, vsrc,
21829 /* XXLORC */
21830 vsrc, vsrc, vsrc,
21831 /* XXLORf */
21832 vsfrc, vsfrc, vsfrc,
21833 /* XXLXOR */
21834 vsrc, vsrc, vsrc,
21835 /* XXLXORdpz */
21836 vsfrc,
21837 /* XXLXORspz */
21838 vssrc,
21839 /* XXLXORz */
21840 vsrc,
21841 /* XXMFACC */
21842 acc, acc,
21843 /* XXMFACCW */
21844 wacc, wacc,
21845 /* XXMRGHW */
21846 vsrc, vsrc, vsrc,
21847 /* XXMRGLW */
21848 vsrc, vsrc, vsrc,
21849 /* XXMTACC */
21850 acc, acc,
21851 /* XXMTACCW */
21852 wacc, wacc,
21853 /* XXPERM */
21854 vsrc, vsrc, vsrc, vsrc,
21855 /* XXPERMDI */
21856 vsrc, vsrc, vsrc, u2imm,
21857 /* XXPERMDIs */
21858 vsrc, vsfrc, u2imm,
21859 /* XXPERMR */
21860 vsrc, vsrc, vsrc, vsrc,
21861 /* XXPERMX */
21862 vsrc, vsrc, vsrc, vsrc, u3imm,
21863 /* XXSEL */
21864 vsrc, vsrc, vsrc, vsrc,
21865 /* XXSETACCZ */
21866 acc,
21867 /* XXSETACCZW */
21868 wacc,
21869 /* XXSLDWI */
21870 vsrc, vsrc, vsrc, u2imm,
21871 /* XXSLDWIs */
21872 vsrc, vsfrc, u2imm,
21873 /* XXSPLTI32DX */
21874 vsrc, vsrc, u1imm, i32imm,
21875 /* XXSPLTIB */
21876 vsrc, u8imm,
21877 /* XXSPLTIDP */
21878 vsrc, i32imm,
21879 /* XXSPLTIW */
21880 vsrc, i32imm,
21881 /* XXSPLTW */
21882 vsrc, vsrc, u2imm,
21883 /* XXSPLTWs */
21884 vsrc, vsfrc, u2imm,
21885 /* gBC */
21886 u5imm, crbitrc, condbrtarget,
21887 /* gBCA */
21888 u5imm, crbitrc, abscondbrtarget,
21889 /* gBCAat */
21890 u5imm, atimm, crbitrc, abscondbrtarget,
21891 /* gBCCTR */
21892 u5imm, crbitrc, i32imm,
21893 /* gBCCTRL */
21894 u5imm, crbitrc, i32imm,
21895 /* gBCL */
21896 u5imm, crbitrc, condbrtarget,
21897 /* gBCLA */
21898 u5imm, crbitrc, abscondbrtarget,
21899 /* gBCLAat */
21900 u5imm, atimm, crbitrc, abscondbrtarget,
21901 /* gBCLR */
21902 u5imm, crbitrc, i32imm,
21903 /* gBCLRL */
21904 u5imm, crbitrc, i32imm,
21905 /* gBCLat */
21906 u5imm, atimm, crbitrc, condbrtarget,
21907 /* gBCat */
21908 u5imm, atimm, crbitrc, condbrtarget,
21909 };
21910 return OpcodeOperandTypes[Offsets[Opcode] + OpIdx];
21911}
21912} // end namespace PPC
21913} // end namespace llvm
21914#endif // GET_INSTRINFO_OPERAND_TYPE
21915
21916#ifdef GET_INSTRINFO_MEM_OPERAND_SIZE
21917#undef GET_INSTRINFO_MEM_OPERAND_SIZE
21918namespace llvm {
21919namespace PPC {
21920LLVM_READONLY
21921static int getMemOperandSize(int OpType) {
21922 switch (OpType) {
21923 default: return 0;
21924 }
21925}
21926} // end namespace PPC
21927} // end namespace llvm
21928#endif // GET_INSTRINFO_MEM_OPERAND_SIZE
21929
21930#ifdef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP
21931#undef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP
21932namespace llvm {
21933namespace PPC {
21934LLVM_READONLY static unsigned
21935getLogicalOperandSize(uint16_t Opcode, uint16_t LogicalOpIdx) {
21936 return LogicalOpIdx;
21937}
21938LLVM_READONLY static inline unsigned
21939getLogicalOperandIdx(uint16_t Opcode, uint16_t LogicalOpIdx) {
21940 auto S = 0U;
21941 for (auto i = 0U; i < LogicalOpIdx; ++i)
21942 S += getLogicalOperandSize(Opcode, i);
21943 return S;
21944}
21945} // end namespace PPC
21946} // end namespace llvm
21947#endif // GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP
21948
21949#ifdef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP
21950#undef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP
21951namespace llvm {
21952namespace PPC {
21953LLVM_READONLY static int
21954getLogicalOperandType(uint16_t Opcode, uint16_t LogicalOpIdx) {
21955 return -1;
21956}
21957} // end namespace PPC
21958} // end namespace llvm
21959#endif // GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP
21960
21961#ifdef GET_INSTRINFO_MC_HELPER_DECLS
21962#undef GET_INSTRINFO_MC_HELPER_DECLS
21963
21964namespace llvm {
21965class MCInst;
21966class FeatureBitset;
21967
21968namespace PPC_MC {
21969
21970void verifyInstructionPredicates(unsigned Opcode, const FeatureBitset &Features);
21971
21972} // end namespace PPC_MC
21973} // end namespace llvm
21974
21975#endif // GET_INSTRINFO_MC_HELPER_DECLS
21976
21977#ifdef GET_INSTRINFO_MC_HELPERS
21978#undef GET_INSTRINFO_MC_HELPERS
21979
21980namespace llvm {
21981namespace PPC_MC {
21982
21983} // end namespace PPC_MC
21984} // end namespace llvm
21985
21986#endif // GET_GENISTRINFO_MC_HELPERS
21987
21988#if (defined(ENABLE_INSTR_PREDICATE_VERIFIER) && !defined(NDEBUG)) ||\
21989 defined(GET_AVAILABLE_OPCODE_CHECKER)
21990#define GET_COMPUTE_FEATURES
21991#endif
21992#ifdef GET_COMPUTE_FEATURES
21993#undef GET_COMPUTE_FEATURES
21994namespace llvm {
21995namespace PPC_MC {
21996
21997// Bits for subtarget features that participate in instruction matching.
21998enum SubtargetFeatureBits : uint8_t {
21999 Feature_ModernAsBit = 0,
22000};
22001
22002inline FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) {
22003 FeatureBitset Features;
22004 if (!FB[PPC::AIXOS] || FB[PPC::FeatureModernAIXAs])
22005 Features.set(Feature_ModernAsBit);
22006 return Features;
22007}
22008
22009inline FeatureBitset computeRequiredFeatures(unsigned Opcode) {
22010 enum : uint8_t {
22011 CEFBS_None,
22012 };
22013
22014 static constexpr FeatureBitset FeatureBitsets[] = {
22015 {}, // CEFBS_None
22016 };
22017 static constexpr uint8_t RequiredFeaturesRefs[] = {
22018 CEFBS_None, // PHI = 0
22019 CEFBS_None, // INLINEASM = 1
22020 CEFBS_None, // INLINEASM_BR = 2
22021 CEFBS_None, // CFI_INSTRUCTION = 3
22022 CEFBS_None, // EH_LABEL = 4
22023 CEFBS_None, // GC_LABEL = 5
22024 CEFBS_None, // ANNOTATION_LABEL = 6
22025 CEFBS_None, // KILL = 7
22026 CEFBS_None, // EXTRACT_SUBREG = 8
22027 CEFBS_None, // INSERT_SUBREG = 9
22028 CEFBS_None, // IMPLICIT_DEF = 10
22029 CEFBS_None, // SUBREG_TO_REG = 11
22030 CEFBS_None, // COPY_TO_REGCLASS = 12
22031 CEFBS_None, // DBG_VALUE = 13
22032 CEFBS_None, // DBG_VALUE_LIST = 14
22033 CEFBS_None, // DBG_INSTR_REF = 15
22034 CEFBS_None, // DBG_PHI = 16
22035 CEFBS_None, // DBG_LABEL = 17
22036 CEFBS_None, // REG_SEQUENCE = 18
22037 CEFBS_None, // COPY = 19
22038 CEFBS_None, // BUNDLE = 20
22039 CEFBS_None, // LIFETIME_START = 21
22040 CEFBS_None, // LIFETIME_END = 22
22041 CEFBS_None, // PSEUDO_PROBE = 23
22042 CEFBS_None, // ARITH_FENCE = 24
22043 CEFBS_None, // STACKMAP = 25
22044 CEFBS_None, // FENTRY_CALL = 26
22045 CEFBS_None, // PATCHPOINT = 27
22046 CEFBS_None, // LOAD_STACK_GUARD = 28
22047 CEFBS_None, // PREALLOCATED_SETUP = 29
22048 CEFBS_None, // PREALLOCATED_ARG = 30
22049 CEFBS_None, // STATEPOINT = 31
22050 CEFBS_None, // LOCAL_ESCAPE = 32
22051 CEFBS_None, // FAULTING_OP = 33
22052 CEFBS_None, // PATCHABLE_OP = 34
22053 CEFBS_None, // PATCHABLE_FUNCTION_ENTER = 35
22054 CEFBS_None, // PATCHABLE_RET = 36
22055 CEFBS_None, // PATCHABLE_FUNCTION_EXIT = 37
22056 CEFBS_None, // PATCHABLE_TAIL_CALL = 38
22057 CEFBS_None, // PATCHABLE_EVENT_CALL = 39
22058 CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL = 40
22059 CEFBS_None, // ICALL_BRANCH_FUNNEL = 41
22060 CEFBS_None, // MEMBARRIER = 42
22061 CEFBS_None, // JUMP_TABLE_DEBUG_INFO = 43
22062 CEFBS_None, // CONVERGENCECTRL_ENTRY = 44
22063 CEFBS_None, // CONVERGENCECTRL_ANCHOR = 45
22064 CEFBS_None, // CONVERGENCECTRL_LOOP = 46
22065 CEFBS_None, // CONVERGENCECTRL_GLUE = 47
22066 CEFBS_None, // G_ASSERT_SEXT = 48
22067 CEFBS_None, // G_ASSERT_ZEXT = 49
22068 CEFBS_None, // G_ASSERT_ALIGN = 50
22069 CEFBS_None, // G_ADD = 51
22070 CEFBS_None, // G_SUB = 52
22071 CEFBS_None, // G_MUL = 53
22072 CEFBS_None, // G_SDIV = 54
22073 CEFBS_None, // G_UDIV = 55
22074 CEFBS_None, // G_SREM = 56
22075 CEFBS_None, // G_UREM = 57
22076 CEFBS_None, // G_SDIVREM = 58
22077 CEFBS_None, // G_UDIVREM = 59
22078 CEFBS_None, // G_AND = 60
22079 CEFBS_None, // G_OR = 61
22080 CEFBS_None, // G_XOR = 62
22081 CEFBS_None, // G_IMPLICIT_DEF = 63
22082 CEFBS_None, // G_PHI = 64
22083 CEFBS_None, // G_FRAME_INDEX = 65
22084 CEFBS_None, // G_GLOBAL_VALUE = 66
22085 CEFBS_None, // G_PTRAUTH_GLOBAL_VALUE = 67
22086 CEFBS_None, // G_CONSTANT_POOL = 68
22087 CEFBS_None, // G_EXTRACT = 69
22088 CEFBS_None, // G_UNMERGE_VALUES = 70
22089 CEFBS_None, // G_INSERT = 71
22090 CEFBS_None, // G_MERGE_VALUES = 72
22091 CEFBS_None, // G_BUILD_VECTOR = 73
22092 CEFBS_None, // G_BUILD_VECTOR_TRUNC = 74
22093 CEFBS_None, // G_CONCAT_VECTORS = 75
22094 CEFBS_None, // G_PTRTOINT = 76
22095 CEFBS_None, // G_INTTOPTR = 77
22096 CEFBS_None, // G_BITCAST = 78
22097 CEFBS_None, // G_FREEZE = 79
22098 CEFBS_None, // G_CONSTANT_FOLD_BARRIER = 80
22099 CEFBS_None, // G_INTRINSIC_FPTRUNC_ROUND = 81
22100 CEFBS_None, // G_INTRINSIC_TRUNC = 82
22101 CEFBS_None, // G_INTRINSIC_ROUND = 83
22102 CEFBS_None, // G_INTRINSIC_LRINT = 84
22103 CEFBS_None, // G_INTRINSIC_LLRINT = 85
22104 CEFBS_None, // G_INTRINSIC_ROUNDEVEN = 86
22105 CEFBS_None, // G_READCYCLECOUNTER = 87
22106 CEFBS_None, // G_READSTEADYCOUNTER = 88
22107 CEFBS_None, // G_LOAD = 89
22108 CEFBS_None, // G_SEXTLOAD = 90
22109 CEFBS_None, // G_ZEXTLOAD = 91
22110 CEFBS_None, // G_INDEXED_LOAD = 92
22111 CEFBS_None, // G_INDEXED_SEXTLOAD = 93
22112 CEFBS_None, // G_INDEXED_ZEXTLOAD = 94
22113 CEFBS_None, // G_STORE = 95
22114 CEFBS_None, // G_INDEXED_STORE = 96
22115 CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 97
22116 CEFBS_None, // G_ATOMIC_CMPXCHG = 98
22117 CEFBS_None, // G_ATOMICRMW_XCHG = 99
22118 CEFBS_None, // G_ATOMICRMW_ADD = 100
22119 CEFBS_None, // G_ATOMICRMW_SUB = 101
22120 CEFBS_None, // G_ATOMICRMW_AND = 102
22121 CEFBS_None, // G_ATOMICRMW_NAND = 103
22122 CEFBS_None, // G_ATOMICRMW_OR = 104
22123 CEFBS_None, // G_ATOMICRMW_XOR = 105
22124 CEFBS_None, // G_ATOMICRMW_MAX = 106
22125 CEFBS_None, // G_ATOMICRMW_MIN = 107
22126 CEFBS_None, // G_ATOMICRMW_UMAX = 108
22127 CEFBS_None, // G_ATOMICRMW_UMIN = 109
22128 CEFBS_None, // G_ATOMICRMW_FADD = 110
22129 CEFBS_None, // G_ATOMICRMW_FSUB = 111
22130 CEFBS_None, // G_ATOMICRMW_FMAX = 112
22131 CEFBS_None, // G_ATOMICRMW_FMIN = 113
22132 CEFBS_None, // G_ATOMICRMW_UINC_WRAP = 114
22133 CEFBS_None, // G_ATOMICRMW_UDEC_WRAP = 115
22134 CEFBS_None, // G_FENCE = 116
22135 CEFBS_None, // G_PREFETCH = 117
22136 CEFBS_None, // G_BRCOND = 118
22137 CEFBS_None, // G_BRINDIRECT = 119
22138 CEFBS_None, // G_INVOKE_REGION_START = 120
22139 CEFBS_None, // G_INTRINSIC = 121
22140 CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS = 122
22141 CEFBS_None, // G_INTRINSIC_CONVERGENT = 123
22142 CEFBS_None, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 124
22143 CEFBS_None, // G_ANYEXT = 125
22144 CEFBS_None, // G_TRUNC = 126
22145 CEFBS_None, // G_CONSTANT = 127
22146 CEFBS_None, // G_FCONSTANT = 128
22147 CEFBS_None, // G_VASTART = 129
22148 CEFBS_None, // G_VAARG = 130
22149 CEFBS_None, // G_SEXT = 131
22150 CEFBS_None, // G_SEXT_INREG = 132
22151 CEFBS_None, // G_ZEXT = 133
22152 CEFBS_None, // G_SHL = 134
22153 CEFBS_None, // G_LSHR = 135
22154 CEFBS_None, // G_ASHR = 136
22155 CEFBS_None, // G_FSHL = 137
22156 CEFBS_None, // G_FSHR = 138
22157 CEFBS_None, // G_ROTR = 139
22158 CEFBS_None, // G_ROTL = 140
22159 CEFBS_None, // G_ICMP = 141
22160 CEFBS_None, // G_FCMP = 142
22161 CEFBS_None, // G_SCMP = 143
22162 CEFBS_None, // G_UCMP = 144
22163 CEFBS_None, // G_SELECT = 145
22164 CEFBS_None, // G_UADDO = 146
22165 CEFBS_None, // G_UADDE = 147
22166 CEFBS_None, // G_USUBO = 148
22167 CEFBS_None, // G_USUBE = 149
22168 CEFBS_None, // G_SADDO = 150
22169 CEFBS_None, // G_SADDE = 151
22170 CEFBS_None, // G_SSUBO = 152
22171 CEFBS_None, // G_SSUBE = 153
22172 CEFBS_None, // G_UMULO = 154
22173 CEFBS_None, // G_SMULO = 155
22174 CEFBS_None, // G_UMULH = 156
22175 CEFBS_None, // G_SMULH = 157
22176 CEFBS_None, // G_UADDSAT = 158
22177 CEFBS_None, // G_SADDSAT = 159
22178 CEFBS_None, // G_USUBSAT = 160
22179 CEFBS_None, // G_SSUBSAT = 161
22180 CEFBS_None, // G_USHLSAT = 162
22181 CEFBS_None, // G_SSHLSAT = 163
22182 CEFBS_None, // G_SMULFIX = 164
22183 CEFBS_None, // G_UMULFIX = 165
22184 CEFBS_None, // G_SMULFIXSAT = 166
22185 CEFBS_None, // G_UMULFIXSAT = 167
22186 CEFBS_None, // G_SDIVFIX = 168
22187 CEFBS_None, // G_UDIVFIX = 169
22188 CEFBS_None, // G_SDIVFIXSAT = 170
22189 CEFBS_None, // G_UDIVFIXSAT = 171
22190 CEFBS_None, // G_FADD = 172
22191 CEFBS_None, // G_FSUB = 173
22192 CEFBS_None, // G_FMUL = 174
22193 CEFBS_None, // G_FMA = 175
22194 CEFBS_None, // G_FMAD = 176
22195 CEFBS_None, // G_FDIV = 177
22196 CEFBS_None, // G_FREM = 178
22197 CEFBS_None, // G_FPOW = 179
22198 CEFBS_None, // G_FPOWI = 180
22199 CEFBS_None, // G_FEXP = 181
22200 CEFBS_None, // G_FEXP2 = 182
22201 CEFBS_None, // G_FEXP10 = 183
22202 CEFBS_None, // G_FLOG = 184
22203 CEFBS_None, // G_FLOG2 = 185
22204 CEFBS_None, // G_FLOG10 = 186
22205 CEFBS_None, // G_FLDEXP = 187
22206 CEFBS_None, // G_FFREXP = 188
22207 CEFBS_None, // G_FNEG = 189
22208 CEFBS_None, // G_FPEXT = 190
22209 CEFBS_None, // G_FPTRUNC = 191
22210 CEFBS_None, // G_FPTOSI = 192
22211 CEFBS_None, // G_FPTOUI = 193
22212 CEFBS_None, // G_SITOFP = 194
22213 CEFBS_None, // G_UITOFP = 195
22214 CEFBS_None, // G_FABS = 196
22215 CEFBS_None, // G_FCOPYSIGN = 197
22216 CEFBS_None, // G_IS_FPCLASS = 198
22217 CEFBS_None, // G_FCANONICALIZE = 199
22218 CEFBS_None, // G_FMINNUM = 200
22219 CEFBS_None, // G_FMAXNUM = 201
22220 CEFBS_None, // G_FMINNUM_IEEE = 202
22221 CEFBS_None, // G_FMAXNUM_IEEE = 203
22222 CEFBS_None, // G_FMINIMUM = 204
22223 CEFBS_None, // G_FMAXIMUM = 205
22224 CEFBS_None, // G_GET_FPENV = 206
22225 CEFBS_None, // G_SET_FPENV = 207
22226 CEFBS_None, // G_RESET_FPENV = 208
22227 CEFBS_None, // G_GET_FPMODE = 209
22228 CEFBS_None, // G_SET_FPMODE = 210
22229 CEFBS_None, // G_RESET_FPMODE = 211
22230 CEFBS_None, // G_PTR_ADD = 212
22231 CEFBS_None, // G_PTRMASK = 213
22232 CEFBS_None, // G_SMIN = 214
22233 CEFBS_None, // G_SMAX = 215
22234 CEFBS_None, // G_UMIN = 216
22235 CEFBS_None, // G_UMAX = 217
22236 CEFBS_None, // G_ABS = 218
22237 CEFBS_None, // G_LROUND = 219
22238 CEFBS_None, // G_LLROUND = 220
22239 CEFBS_None, // G_BR = 221
22240 CEFBS_None, // G_BRJT = 222
22241 CEFBS_None, // G_VSCALE = 223
22242 CEFBS_None, // G_INSERT_SUBVECTOR = 224
22243 CEFBS_None, // G_EXTRACT_SUBVECTOR = 225
22244 CEFBS_None, // G_INSERT_VECTOR_ELT = 226
22245 CEFBS_None, // G_EXTRACT_VECTOR_ELT = 227
22246 CEFBS_None, // G_SHUFFLE_VECTOR = 228
22247 CEFBS_None, // G_SPLAT_VECTOR = 229
22248 CEFBS_None, // G_VECTOR_COMPRESS = 230
22249 CEFBS_None, // G_CTTZ = 231
22250 CEFBS_None, // G_CTTZ_ZERO_UNDEF = 232
22251 CEFBS_None, // G_CTLZ = 233
22252 CEFBS_None, // G_CTLZ_ZERO_UNDEF = 234
22253 CEFBS_None, // G_CTPOP = 235
22254 CEFBS_None, // G_BSWAP = 236
22255 CEFBS_None, // G_BITREVERSE = 237
22256 CEFBS_None, // G_FCEIL = 238
22257 CEFBS_None, // G_FCOS = 239
22258 CEFBS_None, // G_FSIN = 240
22259 CEFBS_None, // G_FTAN = 241
22260 CEFBS_None, // G_FACOS = 242
22261 CEFBS_None, // G_FASIN = 243
22262 CEFBS_None, // G_FATAN = 244
22263 CEFBS_None, // G_FCOSH = 245
22264 CEFBS_None, // G_FSINH = 246
22265 CEFBS_None, // G_FTANH = 247
22266 CEFBS_None, // G_FSQRT = 248
22267 CEFBS_None, // G_FFLOOR = 249
22268 CEFBS_None, // G_FRINT = 250
22269 CEFBS_None, // G_FNEARBYINT = 251
22270 CEFBS_None, // G_ADDRSPACE_CAST = 252
22271 CEFBS_None, // G_BLOCK_ADDR = 253
22272 CEFBS_None, // G_JUMP_TABLE = 254
22273 CEFBS_None, // G_DYN_STACKALLOC = 255
22274 CEFBS_None, // G_STACKSAVE = 256
22275 CEFBS_None, // G_STACKRESTORE = 257
22276 CEFBS_None, // G_STRICT_FADD = 258
22277 CEFBS_None, // G_STRICT_FSUB = 259
22278 CEFBS_None, // G_STRICT_FMUL = 260
22279 CEFBS_None, // G_STRICT_FDIV = 261
22280 CEFBS_None, // G_STRICT_FREM = 262
22281 CEFBS_None, // G_STRICT_FMA = 263
22282 CEFBS_None, // G_STRICT_FSQRT = 264
22283 CEFBS_None, // G_STRICT_FLDEXP = 265
22284 CEFBS_None, // G_READ_REGISTER = 266
22285 CEFBS_None, // G_WRITE_REGISTER = 267
22286 CEFBS_None, // G_MEMCPY = 268
22287 CEFBS_None, // G_MEMCPY_INLINE = 269
22288 CEFBS_None, // G_MEMMOVE = 270
22289 CEFBS_None, // G_MEMSET = 271
22290 CEFBS_None, // G_BZERO = 272
22291 CEFBS_None, // G_TRAP = 273
22292 CEFBS_None, // G_DEBUGTRAP = 274
22293 CEFBS_None, // G_UBSANTRAP = 275
22294 CEFBS_None, // G_VECREDUCE_SEQ_FADD = 276
22295 CEFBS_None, // G_VECREDUCE_SEQ_FMUL = 277
22296 CEFBS_None, // G_VECREDUCE_FADD = 278
22297 CEFBS_None, // G_VECREDUCE_FMUL = 279
22298 CEFBS_None, // G_VECREDUCE_FMAX = 280
22299 CEFBS_None, // G_VECREDUCE_FMIN = 281
22300 CEFBS_None, // G_VECREDUCE_FMAXIMUM = 282
22301 CEFBS_None, // G_VECREDUCE_FMINIMUM = 283
22302 CEFBS_None, // G_VECREDUCE_ADD = 284
22303 CEFBS_None, // G_VECREDUCE_MUL = 285
22304 CEFBS_None, // G_VECREDUCE_AND = 286
22305 CEFBS_None, // G_VECREDUCE_OR = 287
22306 CEFBS_None, // G_VECREDUCE_XOR = 288
22307 CEFBS_None, // G_VECREDUCE_SMAX = 289
22308 CEFBS_None, // G_VECREDUCE_SMIN = 290
22309 CEFBS_None, // G_VECREDUCE_UMAX = 291
22310 CEFBS_None, // G_VECREDUCE_UMIN = 292
22311 CEFBS_None, // G_SBFX = 293
22312 CEFBS_None, // G_UBFX = 294
22313 CEFBS_None, // ATOMIC_CMP_SWAP_I128 = 295
22314 CEFBS_None, // ATOMIC_LOAD_ADD_I128 = 296
22315 CEFBS_None, // ATOMIC_LOAD_AND_I128 = 297
22316 CEFBS_None, // ATOMIC_LOAD_NAND_I128 = 298
22317 CEFBS_None, // ATOMIC_LOAD_OR_I128 = 299
22318 CEFBS_None, // ATOMIC_LOAD_SUB_I128 = 300
22319 CEFBS_None, // ATOMIC_LOAD_XOR_I128 = 301
22320 CEFBS_None, // ATOMIC_SWAP_I128 = 302
22321 CEFBS_None, // BUILD_QUADWORD = 303
22322 CEFBS_None, // BUILD_UACC = 304
22323 CEFBS_None, // CFENCE = 305
22324 CEFBS_None, // CFENCE8 = 306
22325 CEFBS_None, // CLRLSLDI = 307
22326 CEFBS_None, // CLRLSLDI_rec = 308
22327 CEFBS_None, // CLRLSLWI = 309
22328 CEFBS_None, // CLRLSLWI_rec = 310
22329 CEFBS_None, // CLRRDI = 311
22330 CEFBS_None, // CLRRDI_rec = 312
22331 CEFBS_None, // CLRRWI = 313
22332 CEFBS_None, // CLRRWI_rec = 314
22333 CEFBS_None, // DCBFL = 315
22334 CEFBS_None, // DCBFLP = 316
22335 CEFBS_None, // DCBFPS = 317
22336 CEFBS_None, // DCBFx = 318
22337 CEFBS_None, // DCBSTPS = 319
22338 CEFBS_None, // DCBTCT = 320
22339 CEFBS_None, // DCBTDS = 321
22340 CEFBS_None, // DCBTSTCT = 322
22341 CEFBS_None, // DCBTSTDS = 323
22342 CEFBS_None, // DCBTSTT = 324
22343 CEFBS_None, // DCBTSTx = 325
22344 CEFBS_None, // DCBTT = 326
22345 CEFBS_None, // DCBTx = 327
22346 CEFBS_None, // DFLOADf32 = 328
22347 CEFBS_None, // DFLOADf64 = 329
22348 CEFBS_None, // DFSTOREf32 = 330
22349 CEFBS_None, // DFSTOREf64 = 331
22350 CEFBS_None, // EXTLDI = 332
22351 CEFBS_None, // EXTLDI_rec = 333
22352 CEFBS_None, // EXTLWI = 334
22353 CEFBS_None, // EXTLWI_rec = 335
22354 CEFBS_None, // EXTRDI = 336
22355 CEFBS_None, // EXTRDI_rec = 337
22356 CEFBS_None, // EXTRWI = 338
22357 CEFBS_None, // EXTRWI_rec = 339
22358 CEFBS_None, // INSLWI = 340
22359 CEFBS_None, // INSLWI_rec = 341
22360 CEFBS_None, // INSRDI = 342
22361 CEFBS_None, // INSRDI_rec = 343
22362 CEFBS_None, // INSRWI = 344
22363 CEFBS_None, // INSRWI_rec = 345
22364 CEFBS_None, // KILL_PAIR = 346
22365 CEFBS_None, // LAx = 347
22366 CEFBS_None, // LIWAX = 348
22367 CEFBS_None, // LIWZX = 349
22368 CEFBS_None, // PPCLdFixedAddr = 350
22369 CEFBS_None, // PSUBI = 351
22370 CEFBS_None, // RLWIMIbm = 352
22371 CEFBS_None, // RLWIMIbm_rec = 353
22372 CEFBS_None, // RLWINMbm = 354
22373 CEFBS_None, // RLWINMbm_rec = 355
22374 CEFBS_None, // RLWNMbm = 356
22375 CEFBS_None, // RLWNMbm_rec = 357
22376 CEFBS_None, // ROTRDI = 358
22377 CEFBS_None, // ROTRDI_rec = 359
22378 CEFBS_None, // ROTRWI = 360
22379 CEFBS_None, // ROTRWI_rec = 361
22380 CEFBS_None, // SLDI = 362
22381 CEFBS_None, // SLDI_rec = 363
22382 CEFBS_None, // SLWI = 364
22383 CEFBS_None, // SLWI_rec = 365
22384 CEFBS_None, // SPILLTOVSR_LD = 366
22385 CEFBS_None, // SPILLTOVSR_LDX = 367
22386 CEFBS_None, // SPILLTOVSR_ST = 368
22387 CEFBS_None, // SPILLTOVSR_STX = 369
22388 CEFBS_None, // SRDI = 370
22389 CEFBS_None, // SRDI_rec = 371
22390 CEFBS_None, // SRWI = 372
22391 CEFBS_None, // SRWI_rec = 373
22392 CEFBS_None, // STIWX = 374
22393 CEFBS_None, // SUBI = 375
22394 CEFBS_None, // SUBIC = 376
22395 CEFBS_None, // SUBIC_rec = 377
22396 CEFBS_None, // SUBIS = 378
22397 CEFBS_None, // SUBPCIS = 379
22398 CEFBS_None, // XFLOADf32 = 380
22399 CEFBS_None, // XFLOADf64 = 381
22400 CEFBS_None, // XFSTOREf32 = 382
22401 CEFBS_None, // XFSTOREf64 = 383
22402 CEFBS_None, // ADD4 = 384
22403 CEFBS_None, // ADD4O = 385
22404 CEFBS_None, // ADD4O_rec = 386
22405 CEFBS_None, // ADD4TLS = 387
22406 CEFBS_None, // ADD4_rec = 388
22407 CEFBS_None, // ADD8 = 389
22408 CEFBS_None, // ADD8O = 390
22409 CEFBS_None, // ADD8O_rec = 391
22410 CEFBS_None, // ADD8TLS = 392
22411 CEFBS_None, // ADD8TLS_ = 393
22412 CEFBS_None, // ADD8_rec = 394
22413 CEFBS_None, // ADDC = 395
22414 CEFBS_None, // ADDC8 = 396
22415 CEFBS_None, // ADDC8O = 397
22416 CEFBS_None, // ADDC8O_rec = 398
22417 CEFBS_None, // ADDC8_rec = 399
22418 CEFBS_None, // ADDCO = 400
22419 CEFBS_None, // ADDCO_rec = 401
22420 CEFBS_None, // ADDC_rec = 402
22421 CEFBS_None, // ADDE = 403
22422 CEFBS_None, // ADDE8 = 404
22423 CEFBS_None, // ADDE8O = 405
22424 CEFBS_None, // ADDE8O_rec = 406
22425 CEFBS_None, // ADDE8_rec = 407
22426 CEFBS_None, // ADDEO = 408
22427 CEFBS_None, // ADDEO_rec = 409
22428 CEFBS_None, // ADDEX = 410
22429 CEFBS_None, // ADDEX8 = 411
22430 CEFBS_None, // ADDE_rec = 412
22431 CEFBS_None, // ADDG6S = 413
22432 CEFBS_None, // ADDG6S8 = 414
22433 CEFBS_None, // ADDI = 415
22434 CEFBS_None, // ADDI8 = 416
22435 CEFBS_None, // ADDIC = 417
22436 CEFBS_None, // ADDIC8 = 418
22437 CEFBS_None, // ADDIC_rec = 419
22438 CEFBS_None, // ADDIS = 420
22439 CEFBS_None, // ADDIS8 = 421
22440 CEFBS_None, // ADDISdtprelHA = 422
22441 CEFBS_None, // ADDISdtprelHA32 = 423
22442 CEFBS_None, // ADDISgotTprelHA = 424
22443 CEFBS_None, // ADDIStlsgdHA = 425
22444 CEFBS_None, // ADDIStlsldHA = 426
22445 CEFBS_None, // ADDIStocHA = 427
22446 CEFBS_None, // ADDIStocHA8 = 428
22447 CEFBS_None, // ADDIdtprelL = 429
22448 CEFBS_None, // ADDIdtprelL32 = 430
22449 CEFBS_None, // ADDItlsgdL = 431
22450 CEFBS_None, // ADDItlsgdL32 = 432
22451 CEFBS_None, // ADDItlsgdLADDR = 433
22452 CEFBS_None, // ADDItlsgdLADDR32 = 434
22453 CEFBS_None, // ADDItlsldL = 435
22454 CEFBS_None, // ADDItlsldL32 = 436
22455 CEFBS_None, // ADDItlsldLADDR = 437
22456 CEFBS_None, // ADDItlsldLADDR32 = 438
22457 CEFBS_None, // ADDItoc = 439
22458 CEFBS_None, // ADDItoc8 = 440
22459 CEFBS_None, // ADDItocL = 441
22460 CEFBS_None, // ADDItocL8 = 442
22461 CEFBS_None, // ADDME = 443
22462 CEFBS_None, // ADDME8 = 444
22463 CEFBS_None, // ADDME8O = 445
22464 CEFBS_None, // ADDME8O_rec = 446
22465 CEFBS_None, // ADDME8_rec = 447
22466 CEFBS_None, // ADDMEO = 448
22467 CEFBS_None, // ADDMEO_rec = 449
22468 CEFBS_None, // ADDME_rec = 450
22469 CEFBS_None, // ADDPCIS = 451
22470 CEFBS_None, // ADDZE = 452
22471 CEFBS_None, // ADDZE8 = 453
22472 CEFBS_None, // ADDZE8O = 454
22473 CEFBS_None, // ADDZE8O_rec = 455
22474 CEFBS_None, // ADDZE8_rec = 456
22475 CEFBS_None, // ADDZEO = 457
22476 CEFBS_None, // ADDZEO_rec = 458
22477 CEFBS_None, // ADDZE_rec = 459
22478 CEFBS_None, // ADJCALLSTACKDOWN = 460
22479 CEFBS_None, // ADJCALLSTACKUP = 461
22480 CEFBS_None, // AND = 462
22481 CEFBS_None, // AND8 = 463
22482 CEFBS_None, // AND8_rec = 464
22483 CEFBS_None, // ANDC = 465
22484 CEFBS_None, // ANDC8 = 466
22485 CEFBS_None, // ANDC8_rec = 467
22486 CEFBS_None, // ANDC_rec = 468
22487 CEFBS_None, // ANDI8_rec = 469
22488 CEFBS_None, // ANDIS8_rec = 470
22489 CEFBS_None, // ANDIS_rec = 471
22490 CEFBS_None, // ANDI_rec = 472
22491 CEFBS_None, // ANDI_rec_1_EQ_BIT = 473
22492 CEFBS_None, // ANDI_rec_1_EQ_BIT8 = 474
22493 CEFBS_None, // ANDI_rec_1_GT_BIT = 475
22494 CEFBS_None, // ANDI_rec_1_GT_BIT8 = 476
22495 CEFBS_None, // AND_rec = 477
22496 CEFBS_None, // ATOMIC_CMP_SWAP_I16 = 478
22497 CEFBS_None, // ATOMIC_CMP_SWAP_I32 = 479
22498 CEFBS_None, // ATOMIC_CMP_SWAP_I64 = 480
22499 CEFBS_None, // ATOMIC_CMP_SWAP_I8 = 481
22500 CEFBS_None, // ATOMIC_LOAD_ADD_I16 = 482
22501 CEFBS_None, // ATOMIC_LOAD_ADD_I32 = 483
22502 CEFBS_None, // ATOMIC_LOAD_ADD_I64 = 484
22503 CEFBS_None, // ATOMIC_LOAD_ADD_I8 = 485
22504 CEFBS_None, // ATOMIC_LOAD_AND_I16 = 486
22505 CEFBS_None, // ATOMIC_LOAD_AND_I32 = 487
22506 CEFBS_None, // ATOMIC_LOAD_AND_I64 = 488
22507 CEFBS_None, // ATOMIC_LOAD_AND_I8 = 489
22508 CEFBS_None, // ATOMIC_LOAD_MAX_I16 = 490
22509 CEFBS_None, // ATOMIC_LOAD_MAX_I32 = 491
22510 CEFBS_None, // ATOMIC_LOAD_MAX_I64 = 492
22511 CEFBS_None, // ATOMIC_LOAD_MAX_I8 = 493
22512 CEFBS_None, // ATOMIC_LOAD_MIN_I16 = 494
22513 CEFBS_None, // ATOMIC_LOAD_MIN_I32 = 495
22514 CEFBS_None, // ATOMIC_LOAD_MIN_I64 = 496
22515 CEFBS_None, // ATOMIC_LOAD_MIN_I8 = 497
22516 CEFBS_None, // ATOMIC_LOAD_NAND_I16 = 498
22517 CEFBS_None, // ATOMIC_LOAD_NAND_I32 = 499
22518 CEFBS_None, // ATOMIC_LOAD_NAND_I64 = 500
22519 CEFBS_None, // ATOMIC_LOAD_NAND_I8 = 501
22520 CEFBS_None, // ATOMIC_LOAD_OR_I16 = 502
22521 CEFBS_None, // ATOMIC_LOAD_OR_I32 = 503
22522 CEFBS_None, // ATOMIC_LOAD_OR_I64 = 504
22523 CEFBS_None, // ATOMIC_LOAD_OR_I8 = 505
22524 CEFBS_None, // ATOMIC_LOAD_SUB_I16 = 506
22525 CEFBS_None, // ATOMIC_LOAD_SUB_I32 = 507
22526 CEFBS_None, // ATOMIC_LOAD_SUB_I64 = 508
22527 CEFBS_None, // ATOMIC_LOAD_SUB_I8 = 509
22528 CEFBS_None, // ATOMIC_LOAD_UMAX_I16 = 510
22529 CEFBS_None, // ATOMIC_LOAD_UMAX_I32 = 511
22530 CEFBS_None, // ATOMIC_LOAD_UMAX_I64 = 512
22531 CEFBS_None, // ATOMIC_LOAD_UMAX_I8 = 513
22532 CEFBS_None, // ATOMIC_LOAD_UMIN_I16 = 514
22533 CEFBS_None, // ATOMIC_LOAD_UMIN_I32 = 515
22534 CEFBS_None, // ATOMIC_LOAD_UMIN_I64 = 516
22535 CEFBS_None, // ATOMIC_LOAD_UMIN_I8 = 517
22536 CEFBS_None, // ATOMIC_LOAD_XOR_I16 = 518
22537 CEFBS_None, // ATOMIC_LOAD_XOR_I32 = 519
22538 CEFBS_None, // ATOMIC_LOAD_XOR_I64 = 520
22539 CEFBS_None, // ATOMIC_LOAD_XOR_I8 = 521
22540 CEFBS_None, // ATOMIC_SWAP_I16 = 522
22541 CEFBS_None, // ATOMIC_SWAP_I32 = 523
22542 CEFBS_None, // ATOMIC_SWAP_I64 = 524
22543 CEFBS_None, // ATOMIC_SWAP_I8 = 525
22544 CEFBS_None, // ATTN = 526
22545 CEFBS_None, // B = 527
22546 CEFBS_None, // BA = 528
22547 CEFBS_None, // BC = 529
22548 CEFBS_None, // BCC = 530
22549 CEFBS_None, // BCCA = 531
22550 CEFBS_None, // BCCCTR = 532
22551 CEFBS_None, // BCCCTR8 = 533
22552 CEFBS_None, // BCCCTRL = 534
22553 CEFBS_None, // BCCCTRL8 = 535
22554 CEFBS_None, // BCCL = 536
22555 CEFBS_None, // BCCLA = 537
22556 CEFBS_None, // BCCLR = 538
22557 CEFBS_None, // BCCLRL = 539
22558 CEFBS_None, // BCCTR = 540
22559 CEFBS_None, // BCCTR8 = 541
22560 CEFBS_None, // BCCTR8n = 542
22561 CEFBS_None, // BCCTRL = 543
22562 CEFBS_None, // BCCTRL8 = 544
22563 CEFBS_None, // BCCTRL8n = 545
22564 CEFBS_None, // BCCTRLn = 546
22565 CEFBS_None, // BCCTRn = 547
22566 CEFBS_None, // BCDADD_rec = 548
22567 CEFBS_None, // BCDCFN_rec = 549
22568 CEFBS_None, // BCDCFSQ_rec = 550
22569 CEFBS_None, // BCDCFZ_rec = 551
22570 CEFBS_None, // BCDCPSGN_rec = 552
22571 CEFBS_None, // BCDCTN_rec = 553
22572 CEFBS_None, // BCDCTSQ_rec = 554
22573 CEFBS_None, // BCDCTZ_rec = 555
22574 CEFBS_None, // BCDSETSGN_rec = 556
22575 CEFBS_None, // BCDSR_rec = 557
22576 CEFBS_None, // BCDSUB_rec = 558
22577 CEFBS_None, // BCDS_rec = 559
22578 CEFBS_None, // BCDTRUNC_rec = 560
22579 CEFBS_None, // BCDUS_rec = 561
22580 CEFBS_None, // BCDUTRUNC_rec = 562
22581 CEFBS_None, // BCL = 563
22582 CEFBS_None, // BCLR = 564
22583 CEFBS_None, // BCLRL = 565
22584 CEFBS_None, // BCLRLn = 566
22585 CEFBS_None, // BCLRn = 567
22586 CEFBS_None, // BCLalways = 568
22587 CEFBS_None, // BCLn = 569
22588 CEFBS_None, // BCTR = 570
22589 CEFBS_None, // BCTR8 = 571
22590 CEFBS_None, // BCTRL = 572
22591 CEFBS_None, // BCTRL8 = 573
22592 CEFBS_None, // BCTRL8_LDinto_toc = 574
22593 CEFBS_None, // BCTRL8_LDinto_toc_RM = 575
22594 CEFBS_None, // BCTRL8_RM = 576
22595 CEFBS_None, // BCTRL_LWZinto_toc = 577
22596 CEFBS_None, // BCTRL_LWZinto_toc_RM = 578
22597 CEFBS_None, // BCTRL_RM = 579
22598 CEFBS_None, // BCn = 580
22599 CEFBS_None, // BDNZ = 581
22600 CEFBS_None, // BDNZ8 = 582
22601 CEFBS_None, // BDNZA = 583
22602 CEFBS_None, // BDNZAm = 584
22603 CEFBS_None, // BDNZAp = 585
22604 CEFBS_None, // BDNZL = 586
22605 CEFBS_None, // BDNZLA = 587
22606 CEFBS_None, // BDNZLAm = 588
22607 CEFBS_None, // BDNZLAp = 589
22608 CEFBS_None, // BDNZLR = 590
22609 CEFBS_None, // BDNZLR8 = 591
22610 CEFBS_None, // BDNZLRL = 592
22611 CEFBS_None, // BDNZLRLm = 593
22612 CEFBS_None, // BDNZLRLp = 594
22613 CEFBS_None, // BDNZLRm = 595
22614 CEFBS_None, // BDNZLRp = 596
22615 CEFBS_None, // BDNZLm = 597
22616 CEFBS_None, // BDNZLp = 598
22617 CEFBS_None, // BDNZm = 599
22618 CEFBS_None, // BDNZp = 600
22619 CEFBS_None, // BDZ = 601
22620 CEFBS_None, // BDZ8 = 602
22621 CEFBS_None, // BDZA = 603
22622 CEFBS_None, // BDZAm = 604
22623 CEFBS_None, // BDZAp = 605
22624 CEFBS_None, // BDZL = 606
22625 CEFBS_None, // BDZLA = 607
22626 CEFBS_None, // BDZLAm = 608
22627 CEFBS_None, // BDZLAp = 609
22628 CEFBS_None, // BDZLR = 610
22629 CEFBS_None, // BDZLR8 = 611
22630 CEFBS_None, // BDZLRL = 612
22631 CEFBS_None, // BDZLRLm = 613
22632 CEFBS_None, // BDZLRLp = 614
22633 CEFBS_None, // BDZLRm = 615
22634 CEFBS_None, // BDZLRp = 616
22635 CEFBS_None, // BDZLm = 617
22636 CEFBS_None, // BDZLp = 618
22637 CEFBS_None, // BDZm = 619
22638 CEFBS_None, // BDZp = 620
22639 CEFBS_None, // BL = 621
22640 CEFBS_None, // BL8 = 622
22641 CEFBS_None, // BL8_NOP = 623
22642 CEFBS_None, // BL8_NOP_RM = 624
22643 CEFBS_None, // BL8_NOP_TLS = 625
22644 CEFBS_None, // BL8_NOTOC = 626
22645 CEFBS_None, // BL8_NOTOC_RM = 627
22646 CEFBS_None, // BL8_NOTOC_TLS = 628
22647 CEFBS_None, // BL8_RM = 629
22648 CEFBS_None, // BL8_TLS = 630
22649 CEFBS_None, // BL8_TLS_ = 631
22650 CEFBS_None, // BLA = 632
22651 CEFBS_None, // BLA8 = 633
22652 CEFBS_None, // BLA8_NOP = 634
22653 CEFBS_None, // BLA8_NOP_RM = 635
22654 CEFBS_None, // BLA8_RM = 636
22655 CEFBS_None, // BLA_RM = 637
22656 CEFBS_None, // BLR = 638
22657 CEFBS_None, // BLR8 = 639
22658 CEFBS_None, // BLRL = 640
22659 CEFBS_None, // BL_NOP = 641
22660 CEFBS_None, // BL_NOP_RM = 642
22661 CEFBS_None, // BL_RM = 643
22662 CEFBS_None, // BL_TLS = 644
22663 CEFBS_None, // BPERMD = 645
22664 CEFBS_None, // BRD = 646
22665 CEFBS_None, // BRH = 647
22666 CEFBS_None, // BRH8 = 648
22667 CEFBS_None, // BRINC = 649
22668 CEFBS_None, // BRW = 650
22669 CEFBS_None, // BRW8 = 651
22670 CEFBS_None, // CBCDTD = 652
22671 CEFBS_None, // CBCDTD8 = 653
22672 CEFBS_None, // CDTBCD = 654
22673 CEFBS_None, // CDTBCD8 = 655
22674 CEFBS_None, // CFUGED = 656
22675 CEFBS_None, // CLRBHRB = 657
22676 CEFBS_None, // CMPB = 658
22677 CEFBS_None, // CMPB8 = 659
22678 CEFBS_None, // CMPD = 660
22679 CEFBS_None, // CMPDI = 661
22680 CEFBS_None, // CMPEQB = 662
22681 CEFBS_None, // CMPLD = 663
22682 CEFBS_None, // CMPLDI = 664
22683 CEFBS_None, // CMPLW = 665
22684 CEFBS_None, // CMPLWI = 666
22685 CEFBS_None, // CMPRB = 667
22686 CEFBS_None, // CMPRB8 = 668
22687 CEFBS_None, // CMPW = 669
22688 CEFBS_None, // CMPWI = 670
22689 CEFBS_None, // CNTLZD = 671
22690 CEFBS_None, // CNTLZDM = 672
22691 CEFBS_None, // CNTLZD_rec = 673
22692 CEFBS_None, // CNTLZW = 674
22693 CEFBS_None, // CNTLZW8 = 675
22694 CEFBS_None, // CNTLZW8_rec = 676
22695 CEFBS_None, // CNTLZW_rec = 677
22696 CEFBS_None, // CNTTZD = 678
22697 CEFBS_None, // CNTTZDM = 679
22698 CEFBS_None, // CNTTZD_rec = 680
22699 CEFBS_None, // CNTTZW = 681
22700 CEFBS_None, // CNTTZW8 = 682
22701 CEFBS_None, // CNTTZW8_rec = 683
22702 CEFBS_None, // CNTTZW_rec = 684
22703 CEFBS_None, // CP_ABORT = 685
22704 CEFBS_None, // CP_COPY = 686
22705 CEFBS_None, // CP_COPY8 = 687
22706 CEFBS_None, // CP_PASTE8_rec = 688
22707 CEFBS_None, // CP_PASTE_rec = 689
22708 CEFBS_None, // CR6SET = 690
22709 CEFBS_None, // CR6UNSET = 691
22710 CEFBS_None, // CRAND = 692
22711 CEFBS_None, // CRANDC = 693
22712 CEFBS_None, // CREQV = 694
22713 CEFBS_None, // CRNAND = 695
22714 CEFBS_None, // CRNOR = 696
22715 CEFBS_None, // CRNOT = 697
22716 CEFBS_None, // CROR = 698
22717 CEFBS_None, // CRORC = 699
22718 CEFBS_None, // CRSET = 700
22719 CEFBS_None, // CRUNSET = 701
22720 CEFBS_None, // CRXOR = 702
22721 CEFBS_None, // CTRL_DEP = 703
22722 CEFBS_None, // DADD = 704
22723 CEFBS_None, // DADDQ = 705
22724 CEFBS_None, // DADDQ_rec = 706
22725 CEFBS_None, // DADD_rec = 707
22726 CEFBS_None, // DARN = 708
22727 CEFBS_None, // DCBA = 709
22728 CEFBS_None, // DCBF = 710
22729 CEFBS_None, // DCBFEP = 711
22730 CEFBS_None, // DCBI = 712
22731 CEFBS_None, // DCBST = 713
22732 CEFBS_None, // DCBSTEP = 714
22733 CEFBS_None, // DCBT = 715
22734 CEFBS_None, // DCBTEP = 716
22735 CEFBS_None, // DCBTST = 717
22736 CEFBS_None, // DCBTSTEP = 718
22737 CEFBS_None, // DCBZ = 719
22738 CEFBS_None, // DCBZEP = 720
22739 CEFBS_None, // DCBZL = 721
22740 CEFBS_None, // DCBZLEP = 722
22741 CEFBS_None, // DCCCI = 723
22742 CEFBS_None, // DCFFIX = 724
22743 CEFBS_None, // DCFFIXQ = 725
22744 CEFBS_None, // DCFFIXQQ = 726
22745 CEFBS_None, // DCFFIXQ_rec = 727
22746 CEFBS_None, // DCFFIX_rec = 728
22747 CEFBS_None, // DCMPO = 729
22748 CEFBS_None, // DCMPOQ = 730
22749 CEFBS_None, // DCMPU = 731
22750 CEFBS_None, // DCMPUQ = 732
22751 CEFBS_None, // DCTDP = 733
22752 CEFBS_None, // DCTDP_rec = 734
22753 CEFBS_None, // DCTFIX = 735
22754 CEFBS_None, // DCTFIXQ = 736
22755 CEFBS_None, // DCTFIXQQ = 737
22756 CEFBS_None, // DCTFIXQ_rec = 738
22757 CEFBS_None, // DCTFIX_rec = 739
22758 CEFBS_None, // DCTQPQ = 740
22759 CEFBS_None, // DCTQPQ_rec = 741
22760 CEFBS_None, // DDEDPD = 742
22761 CEFBS_None, // DDEDPDQ = 743
22762 CEFBS_None, // DDEDPDQ_rec = 744
22763 CEFBS_None, // DDEDPD_rec = 745
22764 CEFBS_None, // DDIV = 746
22765 CEFBS_None, // DDIVQ = 747
22766 CEFBS_None, // DDIVQ_rec = 748
22767 CEFBS_None, // DDIV_rec = 749
22768 CEFBS_None, // DENBCD = 750
22769 CEFBS_None, // DENBCDQ = 751
22770 CEFBS_None, // DENBCDQ_rec = 752
22771 CEFBS_None, // DENBCD_rec = 753
22772 CEFBS_None, // DIEX = 754
22773 CEFBS_None, // DIEXQ = 755
22774 CEFBS_None, // DIEXQ_rec = 756
22775 CEFBS_None, // DIEX_rec = 757
22776 CEFBS_None, // DIVD = 758
22777 CEFBS_None, // DIVDE = 759
22778 CEFBS_None, // DIVDEO = 760
22779 CEFBS_None, // DIVDEO_rec = 761
22780 CEFBS_None, // DIVDEU = 762
22781 CEFBS_None, // DIVDEUO = 763
22782 CEFBS_None, // DIVDEUO_rec = 764
22783 CEFBS_None, // DIVDEU_rec = 765
22784 CEFBS_None, // DIVDE_rec = 766
22785 CEFBS_None, // DIVDO = 767
22786 CEFBS_None, // DIVDO_rec = 768
22787 CEFBS_None, // DIVDU = 769
22788 CEFBS_None, // DIVDUO = 770
22789 CEFBS_None, // DIVDUO_rec = 771
22790 CEFBS_None, // DIVDU_rec = 772
22791 CEFBS_None, // DIVD_rec = 773
22792 CEFBS_None, // DIVW = 774
22793 CEFBS_None, // DIVWE = 775
22794 CEFBS_None, // DIVWEO = 776
22795 CEFBS_None, // DIVWEO_rec = 777
22796 CEFBS_None, // DIVWEU = 778
22797 CEFBS_None, // DIVWEUO = 779
22798 CEFBS_None, // DIVWEUO_rec = 780
22799 CEFBS_None, // DIVWEU_rec = 781
22800 CEFBS_None, // DIVWE_rec = 782
22801 CEFBS_None, // DIVWO = 783
22802 CEFBS_None, // DIVWO_rec = 784
22803 CEFBS_None, // DIVWU = 785
22804 CEFBS_None, // DIVWUO = 786
22805 CEFBS_None, // DIVWUO_rec = 787
22806 CEFBS_None, // DIVWU_rec = 788
22807 CEFBS_None, // DIVW_rec = 789
22808 CEFBS_None, // DMMR = 790
22809 CEFBS_None, // DMSETDMRZ = 791
22810 CEFBS_None, // DMUL = 792
22811 CEFBS_None, // DMULQ = 793
22812 CEFBS_None, // DMULQ_rec = 794
22813 CEFBS_None, // DMUL_rec = 795
22814 CEFBS_None, // DMXOR = 796
22815 CEFBS_None, // DMXXEXTFDMR256 = 797
22816 CEFBS_None, // DMXXEXTFDMR512 = 798
22817 CEFBS_None, // DMXXEXTFDMR512_HI = 799
22818 CEFBS_None, // DMXXINSTFDMR256 = 800
22819 CEFBS_None, // DMXXINSTFDMR512 = 801
22820 CEFBS_None, // DMXXINSTFDMR512_HI = 802
22821 CEFBS_None, // DQUA = 803
22822 CEFBS_None, // DQUAI = 804
22823 CEFBS_None, // DQUAIQ = 805
22824 CEFBS_None, // DQUAIQ_rec = 806
22825 CEFBS_None, // DQUAI_rec = 807
22826 CEFBS_None, // DQUAQ = 808
22827 CEFBS_None, // DQUAQ_rec = 809
22828 CEFBS_None, // DQUA_rec = 810
22829 CEFBS_None, // DRDPQ = 811
22830 CEFBS_None, // DRDPQ_rec = 812
22831 CEFBS_None, // DRINTN = 813
22832 CEFBS_None, // DRINTNQ = 814
22833 CEFBS_None, // DRINTNQ_rec = 815
22834 CEFBS_None, // DRINTN_rec = 816
22835 CEFBS_None, // DRINTX = 817
22836 CEFBS_None, // DRINTXQ = 818
22837 CEFBS_None, // DRINTXQ_rec = 819
22838 CEFBS_None, // DRINTX_rec = 820
22839 CEFBS_None, // DRRND = 821
22840 CEFBS_None, // DRRNDQ = 822
22841 CEFBS_None, // DRRNDQ_rec = 823
22842 CEFBS_None, // DRRND_rec = 824
22843 CEFBS_None, // DRSP = 825
22844 CEFBS_None, // DRSP_rec = 826
22845 CEFBS_None, // DSCLI = 827
22846 CEFBS_None, // DSCLIQ = 828
22847 CEFBS_None, // DSCLIQ_rec = 829
22848 CEFBS_None, // DSCLI_rec = 830
22849 CEFBS_None, // DSCRI = 831
22850 CEFBS_None, // DSCRIQ = 832
22851 CEFBS_None, // DSCRIQ_rec = 833
22852 CEFBS_None, // DSCRI_rec = 834
22853 CEFBS_None, // DSS = 835
22854 CEFBS_None, // DSSALL = 836
22855 CEFBS_None, // DST = 837
22856 CEFBS_None, // DST64 = 838
22857 CEFBS_None, // DSTST = 839
22858 CEFBS_None, // DSTST64 = 840
22859 CEFBS_None, // DSTSTT = 841
22860 CEFBS_None, // DSTSTT64 = 842
22861 CEFBS_None, // DSTT = 843
22862 CEFBS_None, // DSTT64 = 844
22863 CEFBS_None, // DSUB = 845
22864 CEFBS_None, // DSUBQ = 846
22865 CEFBS_None, // DSUBQ_rec = 847
22866 CEFBS_None, // DSUB_rec = 848
22867 CEFBS_None, // DTSTDC = 849
22868 CEFBS_None, // DTSTDCQ = 850
22869 CEFBS_None, // DTSTDG = 851
22870 CEFBS_None, // DTSTDGQ = 852
22871 CEFBS_None, // DTSTEX = 853
22872 CEFBS_None, // DTSTEXQ = 854
22873 CEFBS_None, // DTSTSF = 855
22874 CEFBS_None, // DTSTSFI = 856
22875 CEFBS_None, // DTSTSFIQ = 857
22876 CEFBS_None, // DTSTSFQ = 858
22877 CEFBS_None, // DXEX = 859
22878 CEFBS_None, // DXEXQ = 860
22879 CEFBS_None, // DXEXQ_rec = 861
22880 CEFBS_None, // DXEX_rec = 862
22881 CEFBS_None, // DYNALLOC = 863
22882 CEFBS_None, // DYNALLOC8 = 864
22883 CEFBS_None, // DYNAREAOFFSET = 865
22884 CEFBS_None, // DYNAREAOFFSET8 = 866
22885 CEFBS_None, // DecreaseCTR8loop = 867
22886 CEFBS_None, // DecreaseCTRloop = 868
22887 CEFBS_None, // EFDABS = 869
22888 CEFBS_None, // EFDADD = 870
22889 CEFBS_None, // EFDCFS = 871
22890 CEFBS_None, // EFDCFSF = 872
22891 CEFBS_None, // EFDCFSI = 873
22892 CEFBS_None, // EFDCFSID = 874
22893 CEFBS_None, // EFDCFUF = 875
22894 CEFBS_None, // EFDCFUI = 876
22895 CEFBS_None, // EFDCFUID = 877
22896 CEFBS_None, // EFDCMPEQ = 878
22897 CEFBS_None, // EFDCMPGT = 879
22898 CEFBS_None, // EFDCMPLT = 880
22899 CEFBS_None, // EFDCTSF = 881
22900 CEFBS_None, // EFDCTSI = 882
22901 CEFBS_None, // EFDCTSIDZ = 883
22902 CEFBS_None, // EFDCTSIZ = 884
22903 CEFBS_None, // EFDCTUF = 885
22904 CEFBS_None, // EFDCTUI = 886
22905 CEFBS_None, // EFDCTUIDZ = 887
22906 CEFBS_None, // EFDCTUIZ = 888
22907 CEFBS_None, // EFDDIV = 889
22908 CEFBS_None, // EFDMUL = 890
22909 CEFBS_None, // EFDNABS = 891
22910 CEFBS_None, // EFDNEG = 892
22911 CEFBS_None, // EFDSUB = 893
22912 CEFBS_None, // EFDTSTEQ = 894
22913 CEFBS_None, // EFDTSTGT = 895
22914 CEFBS_None, // EFDTSTLT = 896
22915 CEFBS_None, // EFSABS = 897
22916 CEFBS_None, // EFSADD = 898
22917 CEFBS_None, // EFSCFD = 899
22918 CEFBS_None, // EFSCFSF = 900
22919 CEFBS_None, // EFSCFSI = 901
22920 CEFBS_None, // EFSCFUF = 902
22921 CEFBS_None, // EFSCFUI = 903
22922 CEFBS_None, // EFSCMPEQ = 904
22923 CEFBS_None, // EFSCMPGT = 905
22924 CEFBS_None, // EFSCMPLT = 906
22925 CEFBS_None, // EFSCTSF = 907
22926 CEFBS_None, // EFSCTSI = 908
22927 CEFBS_None, // EFSCTSIZ = 909
22928 CEFBS_None, // EFSCTUF = 910
22929 CEFBS_None, // EFSCTUI = 911
22930 CEFBS_None, // EFSCTUIZ = 912
22931 CEFBS_None, // EFSDIV = 913
22932 CEFBS_None, // EFSMUL = 914
22933 CEFBS_None, // EFSNABS = 915
22934 CEFBS_None, // EFSNEG = 916
22935 CEFBS_None, // EFSSUB = 917
22936 CEFBS_None, // EFSTSTEQ = 918
22937 CEFBS_None, // EFSTSTGT = 919
22938 CEFBS_None, // EFSTSTLT = 920
22939 CEFBS_None, // EH_SjLj_LongJmp32 = 921
22940 CEFBS_None, // EH_SjLj_LongJmp64 = 922
22941 CEFBS_None, // EH_SjLj_SetJmp32 = 923
22942 CEFBS_None, // EH_SjLj_SetJmp64 = 924
22943 CEFBS_None, // EH_SjLj_Setup = 925
22944 CEFBS_None, // EQV = 926
22945 CEFBS_None, // EQV8 = 927
22946 CEFBS_None, // EQV8_rec = 928
22947 CEFBS_None, // EQV_rec = 929
22948 CEFBS_None, // EVABS = 930
22949 CEFBS_None, // EVADDIW = 931
22950 CEFBS_None, // EVADDSMIAAW = 932
22951 CEFBS_None, // EVADDSSIAAW = 933
22952 CEFBS_None, // EVADDUMIAAW = 934
22953 CEFBS_None, // EVADDUSIAAW = 935
22954 CEFBS_None, // EVADDW = 936
22955 CEFBS_None, // EVAND = 937
22956 CEFBS_None, // EVANDC = 938
22957 CEFBS_None, // EVCMPEQ = 939
22958 CEFBS_None, // EVCMPGTS = 940
22959 CEFBS_None, // EVCMPGTU = 941
22960 CEFBS_None, // EVCMPLTS = 942
22961 CEFBS_None, // EVCMPLTU = 943
22962 CEFBS_None, // EVCNTLSW = 944
22963 CEFBS_None, // EVCNTLZW = 945
22964 CEFBS_None, // EVDIVWS = 946
22965 CEFBS_None, // EVDIVWU = 947
22966 CEFBS_None, // EVEQV = 948
22967 CEFBS_None, // EVEXTSB = 949
22968 CEFBS_None, // EVEXTSH = 950
22969 CEFBS_None, // EVFSABS = 951
22970 CEFBS_None, // EVFSADD = 952
22971 CEFBS_None, // EVFSCFSF = 953
22972 CEFBS_None, // EVFSCFSI = 954
22973 CEFBS_None, // EVFSCFUF = 955
22974 CEFBS_None, // EVFSCFUI = 956
22975 CEFBS_None, // EVFSCMPEQ = 957
22976 CEFBS_None, // EVFSCMPGT = 958
22977 CEFBS_None, // EVFSCMPLT = 959
22978 CEFBS_None, // EVFSCTSF = 960
22979 CEFBS_None, // EVFSCTSI = 961
22980 CEFBS_None, // EVFSCTSIZ = 962
22981 CEFBS_None, // EVFSCTUF = 963
22982 CEFBS_None, // EVFSCTUI = 964
22983 CEFBS_None, // EVFSCTUIZ = 965
22984 CEFBS_None, // EVFSDIV = 966
22985 CEFBS_None, // EVFSMUL = 967
22986 CEFBS_None, // EVFSNABS = 968
22987 CEFBS_None, // EVFSNEG = 969
22988 CEFBS_None, // EVFSSUB = 970
22989 CEFBS_None, // EVFSTSTEQ = 971
22990 CEFBS_None, // EVFSTSTGT = 972
22991 CEFBS_None, // EVFSTSTLT = 973
22992 CEFBS_None, // EVLDD = 974
22993 CEFBS_None, // EVLDDX = 975
22994 CEFBS_None, // EVLDH = 976
22995 CEFBS_None, // EVLDHX = 977
22996 CEFBS_None, // EVLDW = 978
22997 CEFBS_None, // EVLDWX = 979
22998 CEFBS_None, // EVLHHESPLAT = 980
22999 CEFBS_None, // EVLHHESPLATX = 981
23000 CEFBS_None, // EVLHHOSSPLAT = 982
23001 CEFBS_None, // EVLHHOSSPLATX = 983
23002 CEFBS_None, // EVLHHOUSPLAT = 984
23003 CEFBS_None, // EVLHHOUSPLATX = 985
23004 CEFBS_None, // EVLWHE = 986
23005 CEFBS_None, // EVLWHEX = 987
23006 CEFBS_None, // EVLWHOS = 988
23007 CEFBS_None, // EVLWHOSX = 989
23008 CEFBS_None, // EVLWHOU = 990
23009 CEFBS_None, // EVLWHOUX = 991
23010 CEFBS_None, // EVLWHSPLAT = 992
23011 CEFBS_None, // EVLWHSPLATX = 993
23012 CEFBS_None, // EVLWWSPLAT = 994
23013 CEFBS_None, // EVLWWSPLATX = 995
23014 CEFBS_None, // EVMERGEHI = 996
23015 CEFBS_None, // EVMERGEHILO = 997
23016 CEFBS_None, // EVMERGELO = 998
23017 CEFBS_None, // EVMERGELOHI = 999
23018 CEFBS_None, // EVMHEGSMFAA = 1000
23019 CEFBS_None, // EVMHEGSMFAN = 1001
23020 CEFBS_None, // EVMHEGSMIAA = 1002
23021 CEFBS_None, // EVMHEGSMIAN = 1003
23022 CEFBS_None, // EVMHEGUMIAA = 1004
23023 CEFBS_None, // EVMHEGUMIAN = 1005
23024 CEFBS_None, // EVMHESMF = 1006
23025 CEFBS_None, // EVMHESMFA = 1007
23026 CEFBS_None, // EVMHESMFAAW = 1008
23027 CEFBS_None, // EVMHESMFANW = 1009
23028 CEFBS_None, // EVMHESMI = 1010
23029 CEFBS_None, // EVMHESMIA = 1011
23030 CEFBS_None, // EVMHESMIAAW = 1012
23031 CEFBS_None, // EVMHESMIANW = 1013
23032 CEFBS_None, // EVMHESSF = 1014
23033 CEFBS_None, // EVMHESSFA = 1015
23034 CEFBS_None, // EVMHESSFAAW = 1016
23035 CEFBS_None, // EVMHESSFANW = 1017
23036 CEFBS_None, // EVMHESSIAAW = 1018
23037 CEFBS_None, // EVMHESSIANW = 1019
23038 CEFBS_None, // EVMHEUMI = 1020
23039 CEFBS_None, // EVMHEUMIA = 1021
23040 CEFBS_None, // EVMHEUMIAAW = 1022
23041 CEFBS_None, // EVMHEUMIANW = 1023
23042 CEFBS_None, // EVMHEUSIAAW = 1024
23043 CEFBS_None, // EVMHEUSIANW = 1025
23044 CEFBS_None, // EVMHOGSMFAA = 1026
23045 CEFBS_None, // EVMHOGSMFAN = 1027
23046 CEFBS_None, // EVMHOGSMIAA = 1028
23047 CEFBS_None, // EVMHOGSMIAN = 1029
23048 CEFBS_None, // EVMHOGUMIAA = 1030
23049 CEFBS_None, // EVMHOGUMIAN = 1031
23050 CEFBS_None, // EVMHOSMF = 1032
23051 CEFBS_None, // EVMHOSMFA = 1033
23052 CEFBS_None, // EVMHOSMFAAW = 1034
23053 CEFBS_None, // EVMHOSMFANW = 1035
23054 CEFBS_None, // EVMHOSMI = 1036
23055 CEFBS_None, // EVMHOSMIA = 1037
23056 CEFBS_None, // EVMHOSMIAAW = 1038
23057 CEFBS_None, // EVMHOSMIANW = 1039
23058 CEFBS_None, // EVMHOSSF = 1040
23059 CEFBS_None, // EVMHOSSFA = 1041
23060 CEFBS_None, // EVMHOSSFAAW = 1042
23061 CEFBS_None, // EVMHOSSFANW = 1043
23062 CEFBS_None, // EVMHOSSIAAW = 1044
23063 CEFBS_None, // EVMHOSSIANW = 1045
23064 CEFBS_None, // EVMHOUMI = 1046
23065 CEFBS_None, // EVMHOUMIA = 1047
23066 CEFBS_None, // EVMHOUMIAAW = 1048
23067 CEFBS_None, // EVMHOUMIANW = 1049
23068 CEFBS_None, // EVMHOUSIAAW = 1050
23069 CEFBS_None, // EVMHOUSIANW = 1051
23070 CEFBS_None, // EVMRA = 1052
23071 CEFBS_None, // EVMWHSMF = 1053
23072 CEFBS_None, // EVMWHSMFA = 1054
23073 CEFBS_None, // EVMWHSMI = 1055
23074 CEFBS_None, // EVMWHSMIA = 1056
23075 CEFBS_None, // EVMWHSSF = 1057
23076 CEFBS_None, // EVMWHSSFA = 1058
23077 CEFBS_None, // EVMWHUMI = 1059
23078 CEFBS_None, // EVMWHUMIA = 1060
23079 CEFBS_None, // EVMWLSMIAAW = 1061
23080 CEFBS_None, // EVMWLSMIANW = 1062
23081 CEFBS_None, // EVMWLSSIAAW = 1063
23082 CEFBS_None, // EVMWLSSIANW = 1064
23083 CEFBS_None, // EVMWLUMI = 1065
23084 CEFBS_None, // EVMWLUMIA = 1066
23085 CEFBS_None, // EVMWLUMIAAW = 1067
23086 CEFBS_None, // EVMWLUMIANW = 1068
23087 CEFBS_None, // EVMWLUSIAAW = 1069
23088 CEFBS_None, // EVMWLUSIANW = 1070
23089 CEFBS_None, // EVMWSMF = 1071
23090 CEFBS_None, // EVMWSMFA = 1072
23091 CEFBS_None, // EVMWSMFAA = 1073
23092 CEFBS_None, // EVMWSMFAN = 1074
23093 CEFBS_None, // EVMWSMI = 1075
23094 CEFBS_None, // EVMWSMIA = 1076
23095 CEFBS_None, // EVMWSMIAA = 1077
23096 CEFBS_None, // EVMWSMIAN = 1078
23097 CEFBS_None, // EVMWSSF = 1079
23098 CEFBS_None, // EVMWSSFA = 1080
23099 CEFBS_None, // EVMWSSFAA = 1081
23100 CEFBS_None, // EVMWSSFAN = 1082
23101 CEFBS_None, // EVMWUMI = 1083
23102 CEFBS_None, // EVMWUMIA = 1084
23103 CEFBS_None, // EVMWUMIAA = 1085
23104 CEFBS_None, // EVMWUMIAN = 1086
23105 CEFBS_None, // EVNAND = 1087
23106 CEFBS_None, // EVNEG = 1088
23107 CEFBS_None, // EVNOR = 1089
23108 CEFBS_None, // EVOR = 1090
23109 CEFBS_None, // EVORC = 1091
23110 CEFBS_None, // EVRLW = 1092
23111 CEFBS_None, // EVRLWI = 1093
23112 CEFBS_None, // EVRNDW = 1094
23113 CEFBS_None, // EVSEL = 1095
23114 CEFBS_None, // EVSLW = 1096
23115 CEFBS_None, // EVSLWI = 1097
23116 CEFBS_None, // EVSPLATFI = 1098
23117 CEFBS_None, // EVSPLATI = 1099
23118 CEFBS_None, // EVSRWIS = 1100
23119 CEFBS_None, // EVSRWIU = 1101
23120 CEFBS_None, // EVSRWS = 1102
23121 CEFBS_None, // EVSRWU = 1103
23122 CEFBS_None, // EVSTDD = 1104
23123 CEFBS_None, // EVSTDDX = 1105
23124 CEFBS_None, // EVSTDH = 1106
23125 CEFBS_None, // EVSTDHX = 1107
23126 CEFBS_None, // EVSTDW = 1108
23127 CEFBS_None, // EVSTDWX = 1109
23128 CEFBS_None, // EVSTWHE = 1110
23129 CEFBS_None, // EVSTWHEX = 1111
23130 CEFBS_None, // EVSTWHO = 1112
23131 CEFBS_None, // EVSTWHOX = 1113
23132 CEFBS_None, // EVSTWWE = 1114
23133 CEFBS_None, // EVSTWWEX = 1115
23134 CEFBS_None, // EVSTWWO = 1116
23135 CEFBS_None, // EVSTWWOX = 1117
23136 CEFBS_None, // EVSUBFSMIAAW = 1118
23137 CEFBS_None, // EVSUBFSSIAAW = 1119
23138 CEFBS_None, // EVSUBFUMIAAW = 1120
23139 CEFBS_None, // EVSUBFUSIAAW = 1121
23140 CEFBS_None, // EVSUBFW = 1122
23141 CEFBS_None, // EVSUBIFW = 1123
23142 CEFBS_None, // EVXOR = 1124
23143 CEFBS_None, // EXTSB = 1125
23144 CEFBS_None, // EXTSB8 = 1126
23145 CEFBS_None, // EXTSB8_32_64 = 1127
23146 CEFBS_None, // EXTSB8_rec = 1128
23147 CEFBS_None, // EXTSB_rec = 1129
23148 CEFBS_None, // EXTSH = 1130
23149 CEFBS_None, // EXTSH8 = 1131
23150 CEFBS_None, // EXTSH8_32_64 = 1132
23151 CEFBS_None, // EXTSH8_rec = 1133
23152 CEFBS_None, // EXTSH_rec = 1134
23153 CEFBS_None, // EXTSW = 1135
23154 CEFBS_None, // EXTSWSLI = 1136
23155 CEFBS_None, // EXTSWSLI_32_64 = 1137
23156 CEFBS_None, // EXTSWSLI_32_64_rec = 1138
23157 CEFBS_None, // EXTSWSLI_rec = 1139
23158 CEFBS_None, // EXTSW_32 = 1140
23159 CEFBS_None, // EXTSW_32_64 = 1141
23160 CEFBS_None, // EXTSW_32_64_rec = 1142
23161 CEFBS_None, // EXTSW_rec = 1143
23162 CEFBS_None, // EnforceIEIO = 1144
23163 CEFBS_None, // FABSD = 1145
23164 CEFBS_None, // FABSD_rec = 1146
23165 CEFBS_None, // FABSS = 1147
23166 CEFBS_None, // FABSS_rec = 1148
23167 CEFBS_None, // FADD = 1149
23168 CEFBS_None, // FADDS = 1150
23169 CEFBS_None, // FADDS_rec = 1151
23170 CEFBS_None, // FADD_rec = 1152
23171 CEFBS_None, // FADDrtz = 1153
23172 CEFBS_None, // FCFID = 1154
23173 CEFBS_None, // FCFIDS = 1155
23174 CEFBS_None, // FCFIDS_rec = 1156
23175 CEFBS_None, // FCFIDU = 1157
23176 CEFBS_None, // FCFIDUS = 1158
23177 CEFBS_None, // FCFIDUS_rec = 1159
23178 CEFBS_None, // FCFIDU_rec = 1160
23179 CEFBS_None, // FCFID_rec = 1161
23180 CEFBS_None, // FCMPOD = 1162
23181 CEFBS_None, // FCMPOS = 1163
23182 CEFBS_None, // FCMPUD = 1164
23183 CEFBS_None, // FCMPUS = 1165
23184 CEFBS_None, // FCPSGND = 1166
23185 CEFBS_None, // FCPSGND_rec = 1167
23186 CEFBS_None, // FCPSGNS = 1168
23187 CEFBS_None, // FCPSGNS_rec = 1169
23188 CEFBS_None, // FCTID = 1170
23189 CEFBS_None, // FCTIDU = 1171
23190 CEFBS_None, // FCTIDUZ = 1172
23191 CEFBS_None, // FCTIDUZ_rec = 1173
23192 CEFBS_None, // FCTIDU_rec = 1174
23193 CEFBS_None, // FCTIDZ = 1175
23194 CEFBS_None, // FCTIDZ_rec = 1176
23195 CEFBS_None, // FCTID_rec = 1177
23196 CEFBS_None, // FCTIW = 1178
23197 CEFBS_None, // FCTIWU = 1179
23198 CEFBS_None, // FCTIWUZ = 1180
23199 CEFBS_None, // FCTIWUZ_rec = 1181
23200 CEFBS_None, // FCTIWU_rec = 1182
23201 CEFBS_None, // FCTIWZ = 1183
23202 CEFBS_None, // FCTIWZ_rec = 1184
23203 CEFBS_None, // FCTIW_rec = 1185
23204 CEFBS_None, // FDIV = 1186
23205 CEFBS_None, // FDIVS = 1187
23206 CEFBS_None, // FDIVS_rec = 1188
23207 CEFBS_None, // FDIV_rec = 1189
23208 CEFBS_None, // FENCE = 1190
23209 CEFBS_None, // FMADD = 1191
23210 CEFBS_None, // FMADDS = 1192
23211 CEFBS_None, // FMADDS_rec = 1193
23212 CEFBS_None, // FMADD_rec = 1194
23213 CEFBS_None, // FMR = 1195
23214 CEFBS_None, // FMR_rec = 1196
23215 CEFBS_None, // FMSUB = 1197
23216 CEFBS_None, // FMSUBS = 1198
23217 CEFBS_None, // FMSUBS_rec = 1199
23218 CEFBS_None, // FMSUB_rec = 1200
23219 CEFBS_None, // FMUL = 1201
23220 CEFBS_None, // FMULS = 1202
23221 CEFBS_None, // FMULS_rec = 1203
23222 CEFBS_None, // FMUL_rec = 1204
23223 CEFBS_None, // FNABSD = 1205
23224 CEFBS_None, // FNABSD_rec = 1206
23225 CEFBS_None, // FNABSS = 1207
23226 CEFBS_None, // FNABSS_rec = 1208
23227 CEFBS_None, // FNEGD = 1209
23228 CEFBS_None, // FNEGD_rec = 1210
23229 CEFBS_None, // FNEGS = 1211
23230 CEFBS_None, // FNEGS_rec = 1212
23231 CEFBS_None, // FNMADD = 1213
23232 CEFBS_None, // FNMADDS = 1214
23233 CEFBS_None, // FNMADDS_rec = 1215
23234 CEFBS_None, // FNMADD_rec = 1216
23235 CEFBS_None, // FNMSUB = 1217
23236 CEFBS_None, // FNMSUBS = 1218
23237 CEFBS_None, // FNMSUBS_rec = 1219
23238 CEFBS_None, // FNMSUB_rec = 1220
23239 CEFBS_None, // FRE = 1221
23240 CEFBS_None, // FRES = 1222
23241 CEFBS_None, // FRES_rec = 1223
23242 CEFBS_None, // FRE_rec = 1224
23243 CEFBS_None, // FRIMD = 1225
23244 CEFBS_None, // FRIMD_rec = 1226
23245 CEFBS_None, // FRIMS = 1227
23246 CEFBS_None, // FRIMS_rec = 1228
23247 CEFBS_None, // FRIND = 1229
23248 CEFBS_None, // FRIND_rec = 1230
23249 CEFBS_None, // FRINS = 1231
23250 CEFBS_None, // FRINS_rec = 1232
23251 CEFBS_None, // FRIPD = 1233
23252 CEFBS_None, // FRIPD_rec = 1234
23253 CEFBS_None, // FRIPS = 1235
23254 CEFBS_None, // FRIPS_rec = 1236
23255 CEFBS_None, // FRIZD = 1237
23256 CEFBS_None, // FRIZD_rec = 1238
23257 CEFBS_None, // FRIZS = 1239
23258 CEFBS_None, // FRIZS_rec = 1240
23259 CEFBS_None, // FRSP = 1241
23260 CEFBS_None, // FRSP_rec = 1242
23261 CEFBS_None, // FRSQRTE = 1243
23262 CEFBS_None, // FRSQRTES = 1244
23263 CEFBS_None, // FRSQRTES_rec = 1245
23264 CEFBS_None, // FRSQRTE_rec = 1246
23265 CEFBS_None, // FSELD = 1247
23266 CEFBS_None, // FSELD_rec = 1248
23267 CEFBS_None, // FSELS = 1249
23268 CEFBS_None, // FSELS_rec = 1250
23269 CEFBS_None, // FSQRT = 1251
23270 CEFBS_None, // FSQRTS = 1252
23271 CEFBS_None, // FSQRTS_rec = 1253
23272 CEFBS_None, // FSQRT_rec = 1254
23273 CEFBS_None, // FSUB = 1255
23274 CEFBS_None, // FSUBS = 1256
23275 CEFBS_None, // FSUBS_rec = 1257
23276 CEFBS_None, // FSUB_rec = 1258
23277 CEFBS_None, // FTDIV = 1259
23278 CEFBS_None, // FTSQRT = 1260
23279 CEFBS_None, // GETtlsADDR = 1261
23280 CEFBS_None, // GETtlsADDR32 = 1262
23281 CEFBS_None, // GETtlsADDR32AIX = 1263
23282 CEFBS_None, // GETtlsADDR64AIX = 1264
23283 CEFBS_None, // GETtlsADDRPCREL = 1265
23284 CEFBS_None, // GETtlsMOD32AIX = 1266
23285 CEFBS_None, // GETtlsMOD64AIX = 1267
23286 CEFBS_None, // GETtlsTpointer32AIX = 1268
23287 CEFBS_None, // GETtlsldADDR = 1269
23288 CEFBS_None, // GETtlsldADDR32 = 1270
23289 CEFBS_None, // GETtlsldADDRPCREL = 1271
23290 CEFBS_None, // HASHCHK = 1272
23291 CEFBS_None, // HASHCHK8 = 1273
23292 CEFBS_None, // HASHCHKP = 1274
23293 CEFBS_None, // HASHCHKP8 = 1275
23294 CEFBS_None, // HASHST = 1276
23295 CEFBS_None, // HASHST8 = 1277
23296 CEFBS_None, // HASHSTP = 1278
23297 CEFBS_None, // HASHSTP8 = 1279
23298 CEFBS_None, // HRFID = 1280
23299 CEFBS_None, // ICBI = 1281
23300 CEFBS_None, // ICBIEP = 1282
23301 CEFBS_None, // ICBLC = 1283
23302 CEFBS_None, // ICBLQ = 1284
23303 CEFBS_None, // ICBT = 1285
23304 CEFBS_None, // ICBTLS = 1286
23305 CEFBS_None, // ICCCI = 1287
23306 CEFBS_None, // ISEL = 1288
23307 CEFBS_None, // ISEL8 = 1289
23308 CEFBS_None, // ISYNC = 1290
23309 CEFBS_None, // LA = 1291
23310 CEFBS_None, // LA8 = 1292
23311 CEFBS_None, // LBARX = 1293
23312 CEFBS_None, // LBARXL = 1294
23313 CEFBS_None, // LBEPX = 1295
23314 CEFBS_None, // LBZ = 1296
23315 CEFBS_None, // LBZ8 = 1297
23316 CEFBS_None, // LBZCIX = 1298
23317 CEFBS_None, // LBZU = 1299
23318 CEFBS_None, // LBZU8 = 1300
23319 CEFBS_None, // LBZUX = 1301
23320 CEFBS_None, // LBZUX8 = 1302
23321 CEFBS_None, // LBZX = 1303
23322 CEFBS_None, // LBZX8 = 1304
23323 CEFBS_None, // LBZXTLS = 1305
23324 CEFBS_None, // LBZXTLS_ = 1306
23325 CEFBS_None, // LBZXTLS_32 = 1307
23326 CEFBS_None, // LD = 1308
23327 CEFBS_None, // LDARX = 1309
23328 CEFBS_None, // LDARXL = 1310
23329 CEFBS_None, // LDAT = 1311
23330 CEFBS_None, // LDBRX = 1312
23331 CEFBS_None, // LDCIX = 1313
23332 CEFBS_None, // LDU = 1314
23333 CEFBS_None, // LDUX = 1315
23334 CEFBS_None, // LDX = 1316
23335 CEFBS_None, // LDXTLS = 1317
23336 CEFBS_None, // LDXTLS_ = 1318
23337 CEFBS_None, // LDgotTprelL = 1319
23338 CEFBS_None, // LDgotTprelL32 = 1320
23339 CEFBS_None, // LDtoc = 1321
23340 CEFBS_None, // LDtocBA = 1322
23341 CEFBS_None, // LDtocCPT = 1323
23342 CEFBS_None, // LDtocJTI = 1324
23343 CEFBS_None, // LDtocL = 1325
23344 CEFBS_None, // LFD = 1326
23345 CEFBS_None, // LFDEPX = 1327
23346 CEFBS_None, // LFDU = 1328
23347 CEFBS_None, // LFDUX = 1329
23348 CEFBS_None, // LFDX = 1330
23349 CEFBS_None, // LFDXTLS = 1331
23350 CEFBS_None, // LFDXTLS_ = 1332
23351 CEFBS_None, // LFIWAX = 1333
23352 CEFBS_None, // LFIWZX = 1334
23353 CEFBS_None, // LFS = 1335
23354 CEFBS_None, // LFSU = 1336
23355 CEFBS_None, // LFSUX = 1337
23356 CEFBS_None, // LFSX = 1338
23357 CEFBS_None, // LFSXTLS = 1339
23358 CEFBS_None, // LFSXTLS_ = 1340
23359 CEFBS_None, // LHA = 1341
23360 CEFBS_None, // LHA8 = 1342
23361 CEFBS_None, // LHARX = 1343
23362 CEFBS_None, // LHARXL = 1344
23363 CEFBS_None, // LHAU = 1345
23364 CEFBS_None, // LHAU8 = 1346
23365 CEFBS_None, // LHAUX = 1347
23366 CEFBS_None, // LHAUX8 = 1348
23367 CEFBS_None, // LHAX = 1349
23368 CEFBS_None, // LHAX8 = 1350
23369 CEFBS_None, // LHAXTLS = 1351
23370 CEFBS_None, // LHAXTLS_ = 1352
23371 CEFBS_None, // LHAXTLS_32 = 1353
23372 CEFBS_None, // LHBRX = 1354
23373 CEFBS_None, // LHBRX8 = 1355
23374 CEFBS_None, // LHEPX = 1356
23375 CEFBS_None, // LHZ = 1357
23376 CEFBS_None, // LHZ8 = 1358
23377 CEFBS_None, // LHZCIX = 1359
23378 CEFBS_None, // LHZU = 1360
23379 CEFBS_None, // LHZU8 = 1361
23380 CEFBS_None, // LHZUX = 1362
23381 CEFBS_None, // LHZUX8 = 1363
23382 CEFBS_None, // LHZX = 1364
23383 CEFBS_None, // LHZX8 = 1365
23384 CEFBS_None, // LHZXTLS = 1366
23385 CEFBS_None, // LHZXTLS_ = 1367
23386 CEFBS_None, // LHZXTLS_32 = 1368
23387 CEFBS_None, // LI = 1369
23388 CEFBS_None, // LI8 = 1370
23389 CEFBS_None, // LIS = 1371
23390 CEFBS_None, // LIS8 = 1372
23391 CEFBS_None, // LMW = 1373
23392 CEFBS_None, // LQ = 1374
23393 CEFBS_None, // LQARX = 1375
23394 CEFBS_None, // LQARXL = 1376
23395 CEFBS_None, // LQX_PSEUDO = 1377
23396 CEFBS_None, // LSWI = 1378
23397 CEFBS_None, // LVEBX = 1379
23398 CEFBS_None, // LVEHX = 1380
23399 CEFBS_None, // LVEWX = 1381
23400 CEFBS_None, // LVSL = 1382
23401 CEFBS_None, // LVSR = 1383
23402 CEFBS_None, // LVX = 1384
23403 CEFBS_None, // LVXL = 1385
23404 CEFBS_None, // LWA = 1386
23405 CEFBS_None, // LWARX = 1387
23406 CEFBS_None, // LWARXL = 1388
23407 CEFBS_None, // LWAT = 1389
23408 CEFBS_None, // LWAUX = 1390
23409 CEFBS_None, // LWAX = 1391
23410 CEFBS_None, // LWAXTLS = 1392
23411 CEFBS_None, // LWAXTLS_ = 1393
23412 CEFBS_None, // LWAXTLS_32 = 1394
23413 CEFBS_None, // LWAX_32 = 1395
23414 CEFBS_None, // LWA_32 = 1396
23415 CEFBS_None, // LWBRX = 1397
23416 CEFBS_None, // LWBRX8 = 1398
23417 CEFBS_None, // LWEPX = 1399
23418 CEFBS_None, // LWZ = 1400
23419 CEFBS_None, // LWZ8 = 1401
23420 CEFBS_None, // LWZCIX = 1402
23421 CEFBS_None, // LWZU = 1403
23422 CEFBS_None, // LWZU8 = 1404
23423 CEFBS_None, // LWZUX = 1405
23424 CEFBS_None, // LWZUX8 = 1406
23425 CEFBS_None, // LWZX = 1407
23426 CEFBS_None, // LWZX8 = 1408
23427 CEFBS_None, // LWZXTLS = 1409
23428 CEFBS_None, // LWZXTLS_ = 1410
23429 CEFBS_None, // LWZXTLS_32 = 1411
23430 CEFBS_None, // LWZtoc = 1412
23431 CEFBS_None, // LWZtocL = 1413
23432 CEFBS_None, // LXSD = 1414
23433 CEFBS_None, // LXSDX = 1415
23434 CEFBS_None, // LXSIBZX = 1416
23435 CEFBS_None, // LXSIHZX = 1417
23436 CEFBS_None, // LXSIWAX = 1418
23437 CEFBS_None, // LXSIWZX = 1419
23438 CEFBS_None, // LXSSP = 1420
23439 CEFBS_None, // LXSSPX = 1421
23440 CEFBS_None, // LXV = 1422
23441 CEFBS_None, // LXVB16X = 1423
23442 CEFBS_None, // LXVD2X = 1424
23443 CEFBS_None, // LXVDSX = 1425
23444 CEFBS_None, // LXVH8X = 1426
23445 CEFBS_None, // LXVKQ = 1427
23446 CEFBS_None, // LXVL = 1428
23447 CEFBS_None, // LXVLL = 1429
23448 CEFBS_None, // LXVP = 1430
23449 CEFBS_None, // LXVPRL = 1431
23450 CEFBS_None, // LXVPRLL = 1432
23451 CEFBS_None, // LXVPX = 1433
23452 CEFBS_None, // LXVRBX = 1434
23453 CEFBS_None, // LXVRDX = 1435
23454 CEFBS_None, // LXVRHX = 1436
23455 CEFBS_None, // LXVRL = 1437
23456 CEFBS_None, // LXVRLL = 1438
23457 CEFBS_None, // LXVRWX = 1439
23458 CEFBS_None, // LXVW4X = 1440
23459 CEFBS_None, // LXVWSX = 1441
23460 CEFBS_None, // LXVX = 1442
23461 CEFBS_None, // MADDHD = 1443
23462 CEFBS_None, // MADDHDU = 1444
23463 CEFBS_None, // MADDLD = 1445
23464 CEFBS_None, // MADDLD8 = 1446
23465 CEFBS_None, // MBAR = 1447
23466 CEFBS_None, // MCRF = 1448
23467 CEFBS_None, // MCRFS = 1449
23468 CEFBS_None, // MCRXRX = 1450
23469 CEFBS_None, // MFBHRBE = 1451
23470 CEFBS_None, // MFCR = 1452
23471 CEFBS_None, // MFCR8 = 1453
23472 CEFBS_None, // MFCTR = 1454
23473 CEFBS_None, // MFCTR8 = 1455
23474 CEFBS_None, // MFDCR = 1456
23475 CEFBS_None, // MFFS = 1457
23476 CEFBS_None, // MFFSCDRN = 1458
23477 CEFBS_None, // MFFSCDRNI = 1459
23478 CEFBS_None, // MFFSCE = 1460
23479 CEFBS_None, // MFFSCRN = 1461
23480 CEFBS_None, // MFFSCRNI = 1462
23481 CEFBS_None, // MFFSL = 1463
23482 CEFBS_None, // MFFS_rec = 1464
23483 CEFBS_None, // MFLR = 1465
23484 CEFBS_None, // MFLR8 = 1466
23485 CEFBS_None, // MFMSR = 1467
23486 CEFBS_None, // MFOCRF = 1468
23487 CEFBS_None, // MFOCRF8 = 1469
23488 CEFBS_None, // MFPMR = 1470
23489 CEFBS_None, // MFSPR = 1471
23490 CEFBS_None, // MFSPR8 = 1472
23491 CEFBS_None, // MFSR = 1473
23492 CEFBS_None, // MFSRIN = 1474
23493 CEFBS_None, // MFTB = 1475
23494 CEFBS_None, // MFTB8 = 1476
23495 CEFBS_None, // MFUDSCR = 1477
23496 CEFBS_None, // MFVRD = 1478
23497 CEFBS_None, // MFVRSAVE = 1479
23498 CEFBS_None, // MFVRSAVEv = 1480
23499 CEFBS_None, // MFVRWZ = 1481
23500 CEFBS_None, // MFVSCR = 1482
23501 CEFBS_None, // MFVSRD = 1483
23502 CEFBS_None, // MFVSRLD = 1484
23503 CEFBS_None, // MFVSRWZ = 1485
23504 CEFBS_None, // MODSD = 1486
23505 CEFBS_None, // MODSW = 1487
23506 CEFBS_None, // MODUD = 1488
23507 CEFBS_None, // MODUW = 1489
23508 CEFBS_None, // MSGSYNC = 1490
23509 CEFBS_None, // MSYNC = 1491
23510 CEFBS_None, // MTCRF = 1492
23511 CEFBS_None, // MTCRF8 = 1493
23512 CEFBS_None, // MTCTR = 1494
23513 CEFBS_None, // MTCTR8 = 1495
23514 CEFBS_None, // MTCTR8loop = 1496
23515 CEFBS_None, // MTCTRloop = 1497
23516 CEFBS_None, // MTDCR = 1498
23517 CEFBS_None, // MTFSB0 = 1499
23518 CEFBS_None, // MTFSB1 = 1500
23519 CEFBS_None, // MTFSF = 1501
23520 CEFBS_None, // MTFSFI = 1502
23521 CEFBS_None, // MTFSFI_rec = 1503
23522 CEFBS_None, // MTFSFIb = 1504
23523 CEFBS_None, // MTFSF_rec = 1505
23524 CEFBS_None, // MTFSFb = 1506
23525 CEFBS_None, // MTLR = 1507
23526 CEFBS_None, // MTLR8 = 1508
23527 CEFBS_None, // MTMSR = 1509
23528 CEFBS_None, // MTMSRD = 1510
23529 CEFBS_None, // MTOCRF = 1511
23530 CEFBS_None, // MTOCRF8 = 1512
23531 CEFBS_None, // MTPMR = 1513
23532 CEFBS_None, // MTSPR = 1514
23533 CEFBS_None, // MTSPR8 = 1515
23534 CEFBS_None, // MTSR = 1516
23535 CEFBS_None, // MTSRIN = 1517
23536 CEFBS_None, // MTUDSCR = 1518
23537 CEFBS_None, // MTVRD = 1519
23538 CEFBS_None, // MTVRSAVE = 1520
23539 CEFBS_None, // MTVRSAVEv = 1521
23540 CEFBS_None, // MTVRWA = 1522
23541 CEFBS_None, // MTVRWZ = 1523
23542 CEFBS_None, // MTVSCR = 1524
23543 CEFBS_None, // MTVSRBM = 1525
23544 CEFBS_None, // MTVSRBMI = 1526
23545 CEFBS_None, // MTVSRD = 1527
23546 CEFBS_None, // MTVSRDD = 1528
23547 CEFBS_None, // MTVSRDM = 1529
23548 CEFBS_None, // MTVSRHM = 1530
23549 CEFBS_None, // MTVSRQM = 1531
23550 CEFBS_None, // MTVSRWA = 1532
23551 CEFBS_None, // MTVSRWM = 1533
23552 CEFBS_None, // MTVSRWS = 1534
23553 CEFBS_None, // MTVSRWZ = 1535
23554 CEFBS_None, // MULHD = 1536
23555 CEFBS_None, // MULHDU = 1537
23556 CEFBS_None, // MULHDU_rec = 1538
23557 CEFBS_None, // MULHD_rec = 1539
23558 CEFBS_None, // MULHW = 1540
23559 CEFBS_None, // MULHWU = 1541
23560 CEFBS_None, // MULHWU_rec = 1542
23561 CEFBS_None, // MULHW_rec = 1543
23562 CEFBS_None, // MULLD = 1544
23563 CEFBS_None, // MULLDO = 1545
23564 CEFBS_None, // MULLDO_rec = 1546
23565 CEFBS_None, // MULLD_rec = 1547
23566 CEFBS_None, // MULLI = 1548
23567 CEFBS_None, // MULLI8 = 1549
23568 CEFBS_None, // MULLW = 1550
23569 CEFBS_None, // MULLWO = 1551
23570 CEFBS_None, // MULLWO_rec = 1552
23571 CEFBS_None, // MULLW_rec = 1553
23572 CEFBS_None, // MoveGOTtoLR = 1554
23573 CEFBS_None, // MovePCtoLR = 1555
23574 CEFBS_None, // MovePCtoLR8 = 1556
23575 CEFBS_None, // NAND = 1557
23576 CEFBS_None, // NAND8 = 1558
23577 CEFBS_None, // NAND8_rec = 1559
23578 CEFBS_None, // NAND_rec = 1560
23579 CEFBS_None, // NAP = 1561
23580 CEFBS_None, // NEG = 1562
23581 CEFBS_None, // NEG8 = 1563
23582 CEFBS_None, // NEG8O = 1564
23583 CEFBS_None, // NEG8O_rec = 1565
23584 CEFBS_None, // NEG8_rec = 1566
23585 CEFBS_None, // NEGO = 1567
23586 CEFBS_None, // NEGO_rec = 1568
23587 CEFBS_None, // NEG_rec = 1569
23588 CEFBS_None, // NOP = 1570
23589 CEFBS_None, // NOP_GT_PWR6 = 1571
23590 CEFBS_None, // NOP_GT_PWR7 = 1572
23591 CEFBS_None, // NOR = 1573
23592 CEFBS_None, // NOR8 = 1574
23593 CEFBS_None, // NOR8_rec = 1575
23594 CEFBS_None, // NOR_rec = 1576
23595 CEFBS_None, // OR = 1577
23596 CEFBS_None, // OR8 = 1578
23597 CEFBS_None, // OR8_rec = 1579
23598 CEFBS_None, // ORC = 1580
23599 CEFBS_None, // ORC8 = 1581
23600 CEFBS_None, // ORC8_rec = 1582
23601 CEFBS_None, // ORC_rec = 1583
23602 CEFBS_None, // ORI = 1584
23603 CEFBS_None, // ORI8 = 1585
23604 CEFBS_None, // ORIS = 1586
23605 CEFBS_None, // ORIS8 = 1587
23606 CEFBS_None, // OR_rec = 1588
23607 CEFBS_None, // PADDI = 1589
23608 CEFBS_None, // PADDI8 = 1590
23609 CEFBS_None, // PADDI8pc = 1591
23610 CEFBS_None, // PADDIdtprel = 1592
23611 CEFBS_None, // PADDIpc = 1593
23612 CEFBS_None, // PDEPD = 1594
23613 CEFBS_None, // PEXTD = 1595
23614 CEFBS_None, // PLA = 1596
23615 CEFBS_None, // PLA8 = 1597
23616 CEFBS_None, // PLA8pc = 1598
23617 CEFBS_None, // PLApc = 1599
23618 CEFBS_None, // PLBZ = 1600
23619 CEFBS_None, // PLBZ8 = 1601
23620 CEFBS_None, // PLBZ8nopc = 1602
23621 CEFBS_None, // PLBZ8onlypc = 1603
23622 CEFBS_None, // PLBZ8pc = 1604
23623 CEFBS_None, // PLBZnopc = 1605
23624 CEFBS_None, // PLBZonlypc = 1606
23625 CEFBS_None, // PLBZpc = 1607
23626 CEFBS_None, // PLD = 1608
23627 CEFBS_None, // PLDnopc = 1609
23628 CEFBS_None, // PLDonlypc = 1610
23629 CEFBS_None, // PLDpc = 1611
23630 CEFBS_None, // PLFD = 1612
23631 CEFBS_None, // PLFDnopc = 1613
23632 CEFBS_None, // PLFDonlypc = 1614
23633 CEFBS_None, // PLFDpc = 1615
23634 CEFBS_None, // PLFS = 1616
23635 CEFBS_None, // PLFSnopc = 1617
23636 CEFBS_None, // PLFSonlypc = 1618
23637 CEFBS_None, // PLFSpc = 1619
23638 CEFBS_None, // PLHA = 1620
23639 CEFBS_None, // PLHA8 = 1621
23640 CEFBS_None, // PLHA8nopc = 1622
23641 CEFBS_None, // PLHA8onlypc = 1623
23642 CEFBS_None, // PLHA8pc = 1624
23643 CEFBS_None, // PLHAnopc = 1625
23644 CEFBS_None, // PLHAonlypc = 1626
23645 CEFBS_None, // PLHApc = 1627
23646 CEFBS_None, // PLHZ = 1628
23647 CEFBS_None, // PLHZ8 = 1629
23648 CEFBS_None, // PLHZ8nopc = 1630
23649 CEFBS_None, // PLHZ8onlypc = 1631
23650 CEFBS_None, // PLHZ8pc = 1632
23651 CEFBS_None, // PLHZnopc = 1633
23652 CEFBS_None, // PLHZonlypc = 1634
23653 CEFBS_None, // PLHZpc = 1635
23654 CEFBS_None, // PLI = 1636
23655 CEFBS_None, // PLI8 = 1637
23656 CEFBS_None, // PLWA = 1638
23657 CEFBS_None, // PLWA8 = 1639
23658 CEFBS_None, // PLWA8nopc = 1640
23659 CEFBS_None, // PLWA8onlypc = 1641
23660 CEFBS_None, // PLWA8pc = 1642
23661 CEFBS_None, // PLWAnopc = 1643
23662 CEFBS_None, // PLWAonlypc = 1644
23663 CEFBS_None, // PLWApc = 1645
23664 CEFBS_None, // PLWZ = 1646
23665 CEFBS_None, // PLWZ8 = 1647
23666 CEFBS_None, // PLWZ8nopc = 1648
23667 CEFBS_None, // PLWZ8onlypc = 1649
23668 CEFBS_None, // PLWZ8pc = 1650
23669 CEFBS_None, // PLWZnopc = 1651
23670 CEFBS_None, // PLWZonlypc = 1652
23671 CEFBS_None, // PLWZpc = 1653
23672 CEFBS_None, // PLXSD = 1654
23673 CEFBS_None, // PLXSDnopc = 1655
23674 CEFBS_None, // PLXSDonlypc = 1656
23675 CEFBS_None, // PLXSDpc = 1657
23676 CEFBS_None, // PLXSSP = 1658
23677 CEFBS_None, // PLXSSPnopc = 1659
23678 CEFBS_None, // PLXSSPonlypc = 1660
23679 CEFBS_None, // PLXSSPpc = 1661
23680 CEFBS_None, // PLXV = 1662
23681 CEFBS_None, // PLXVP = 1663
23682 CEFBS_None, // PLXVPnopc = 1664
23683 CEFBS_None, // PLXVPonlypc = 1665
23684 CEFBS_None, // PLXVPpc = 1666
23685 CEFBS_None, // PLXVnopc = 1667
23686 CEFBS_None, // PLXVonlypc = 1668
23687 CEFBS_None, // PLXVpc = 1669
23688 CEFBS_None, // PMXVBF16GER2 = 1670
23689 CEFBS_None, // PMXVBF16GER2NN = 1671
23690 CEFBS_None, // PMXVBF16GER2NP = 1672
23691 CEFBS_None, // PMXVBF16GER2PN = 1673
23692 CEFBS_None, // PMXVBF16GER2PP = 1674
23693 CEFBS_None, // PMXVBF16GER2W = 1675
23694 CEFBS_None, // PMXVBF16GER2WNN = 1676
23695 CEFBS_None, // PMXVBF16GER2WNP = 1677
23696 CEFBS_None, // PMXVBF16GER2WPN = 1678
23697 CEFBS_None, // PMXVBF16GER2WPP = 1679
23698 CEFBS_None, // PMXVF16GER2 = 1680
23699 CEFBS_None, // PMXVF16GER2NN = 1681
23700 CEFBS_None, // PMXVF16GER2NP = 1682
23701 CEFBS_None, // PMXVF16GER2PN = 1683
23702 CEFBS_None, // PMXVF16GER2PP = 1684
23703 CEFBS_None, // PMXVF16GER2W = 1685
23704 CEFBS_None, // PMXVF16GER2WNN = 1686
23705 CEFBS_None, // PMXVF16GER2WNP = 1687
23706 CEFBS_None, // PMXVF16GER2WPN = 1688
23707 CEFBS_None, // PMXVF16GER2WPP = 1689
23708 CEFBS_None, // PMXVF32GER = 1690
23709 CEFBS_None, // PMXVF32GERNN = 1691
23710 CEFBS_None, // PMXVF32GERNP = 1692
23711 CEFBS_None, // PMXVF32GERPN = 1693
23712 CEFBS_None, // PMXVF32GERPP = 1694
23713 CEFBS_None, // PMXVF32GERW = 1695
23714 CEFBS_None, // PMXVF32GERWNN = 1696
23715 CEFBS_None, // PMXVF32GERWNP = 1697
23716 CEFBS_None, // PMXVF32GERWPN = 1698
23717 CEFBS_None, // PMXVF32GERWPP = 1699
23718 CEFBS_None, // PMXVF64GER = 1700
23719 CEFBS_None, // PMXVF64GERNN = 1701
23720 CEFBS_None, // PMXVF64GERNP = 1702
23721 CEFBS_None, // PMXVF64GERPN = 1703
23722 CEFBS_None, // PMXVF64GERPP = 1704
23723 CEFBS_None, // PMXVF64GERW = 1705
23724 CEFBS_None, // PMXVF64GERWNN = 1706
23725 CEFBS_None, // PMXVF64GERWNP = 1707
23726 CEFBS_None, // PMXVF64GERWPN = 1708
23727 CEFBS_None, // PMXVF64GERWPP = 1709
23728 CEFBS_None, // PMXVI16GER2 = 1710
23729 CEFBS_None, // PMXVI16GER2PP = 1711
23730 CEFBS_None, // PMXVI16GER2S = 1712
23731 CEFBS_None, // PMXVI16GER2SPP = 1713
23732 CEFBS_None, // PMXVI16GER2SW = 1714
23733 CEFBS_None, // PMXVI16GER2SWPP = 1715
23734 CEFBS_None, // PMXVI16GER2W = 1716
23735 CEFBS_None, // PMXVI16GER2WPP = 1717
23736 CEFBS_None, // PMXVI4GER8 = 1718
23737 CEFBS_None, // PMXVI4GER8PP = 1719
23738 CEFBS_None, // PMXVI4GER8W = 1720
23739 CEFBS_None, // PMXVI4GER8WPP = 1721
23740 CEFBS_None, // PMXVI8GER4 = 1722
23741 CEFBS_None, // PMXVI8GER4PP = 1723
23742 CEFBS_None, // PMXVI8GER4SPP = 1724
23743 CEFBS_None, // PMXVI8GER4W = 1725
23744 CEFBS_None, // PMXVI8GER4WPP = 1726
23745 CEFBS_None, // PMXVI8GER4WSPP = 1727
23746 CEFBS_None, // POPCNTB = 1728
23747 CEFBS_None, // POPCNTB8 = 1729
23748 CEFBS_None, // POPCNTD = 1730
23749 CEFBS_None, // POPCNTW = 1731
23750 CEFBS_None, // PPC32GOT = 1732
23751 CEFBS_None, // PPC32PICGOT = 1733
23752 CEFBS_None, // PREPARE_PROBED_ALLOCA_32 = 1734
23753 CEFBS_None, // PREPARE_PROBED_ALLOCA_64 = 1735
23754 CEFBS_None, // PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_32 = 1736
23755 CEFBS_None, // PREPARE_PROBED_ALLOCA_NEGSIZE_SAME_REG_64 = 1737
23756 CEFBS_None, // PROBED_ALLOCA_32 = 1738
23757 CEFBS_None, // PROBED_ALLOCA_64 = 1739
23758 CEFBS_None, // PROBED_STACKALLOC_32 = 1740
23759 CEFBS_None, // PROBED_STACKALLOC_64 = 1741
23760 CEFBS_None, // PSTB = 1742
23761 CEFBS_None, // PSTB8 = 1743
23762 CEFBS_None, // PSTB8nopc = 1744
23763 CEFBS_None, // PSTB8onlypc = 1745
23764 CEFBS_None, // PSTB8pc = 1746
23765 CEFBS_None, // PSTBnopc = 1747
23766 CEFBS_None, // PSTBonlypc = 1748
23767 CEFBS_None, // PSTBpc = 1749
23768 CEFBS_None, // PSTD = 1750
23769 CEFBS_None, // PSTDnopc = 1751
23770 CEFBS_None, // PSTDonlypc = 1752
23771 CEFBS_None, // PSTDpc = 1753
23772 CEFBS_None, // PSTFD = 1754
23773 CEFBS_None, // PSTFDnopc = 1755
23774 CEFBS_None, // PSTFDonlypc = 1756
23775 CEFBS_None, // PSTFDpc = 1757
23776 CEFBS_None, // PSTFS = 1758
23777 CEFBS_None, // PSTFSnopc = 1759
23778 CEFBS_None, // PSTFSonlypc = 1760
23779 CEFBS_None, // PSTFSpc = 1761
23780 CEFBS_None, // PSTH = 1762
23781 CEFBS_None, // PSTH8 = 1763
23782 CEFBS_None, // PSTH8nopc = 1764
23783 CEFBS_None, // PSTH8onlypc = 1765
23784 CEFBS_None, // PSTH8pc = 1766
23785 CEFBS_None, // PSTHnopc = 1767
23786 CEFBS_None, // PSTHonlypc = 1768
23787 CEFBS_None, // PSTHpc = 1769
23788 CEFBS_None, // PSTW = 1770
23789 CEFBS_None, // PSTW8 = 1771
23790 CEFBS_None, // PSTW8nopc = 1772
23791 CEFBS_None, // PSTW8onlypc = 1773
23792 CEFBS_None, // PSTW8pc = 1774
23793 CEFBS_None, // PSTWnopc = 1775
23794 CEFBS_None, // PSTWonlypc = 1776
23795 CEFBS_None, // PSTWpc = 1777
23796 CEFBS_None, // PSTXSD = 1778
23797 CEFBS_None, // PSTXSDnopc = 1779
23798 CEFBS_None, // PSTXSDonlypc = 1780
23799 CEFBS_None, // PSTXSDpc = 1781
23800 CEFBS_None, // PSTXSSP = 1782
23801 CEFBS_None, // PSTXSSPnopc = 1783
23802 CEFBS_None, // PSTXSSPonlypc = 1784
23803 CEFBS_None, // PSTXSSPpc = 1785
23804 CEFBS_None, // PSTXV = 1786
23805 CEFBS_None, // PSTXVP = 1787
23806 CEFBS_None, // PSTXVPnopc = 1788
23807 CEFBS_None, // PSTXVPonlypc = 1789
23808 CEFBS_None, // PSTXVPpc = 1790
23809 CEFBS_None, // PSTXVnopc = 1791
23810 CEFBS_None, // PSTXVonlypc = 1792
23811 CEFBS_None, // PSTXVpc = 1793
23812 CEFBS_None, // PseudoEIEIO = 1794
23813 CEFBS_None, // RESTORE_ACC = 1795
23814 CEFBS_None, // RESTORE_CR = 1796
23815 CEFBS_None, // RESTORE_CRBIT = 1797
23816 CEFBS_None, // RESTORE_QUADWORD = 1798
23817 CEFBS_None, // RESTORE_UACC = 1799
23818 CEFBS_None, // RESTORE_WACC = 1800
23819 CEFBS_None, // RFCI = 1801
23820 CEFBS_None, // RFDI = 1802
23821 CEFBS_None, // RFEBB = 1803
23822 CEFBS_None, // RFI = 1804
23823 CEFBS_None, // RFID = 1805
23824 CEFBS_None, // RFMCI = 1806
23825 CEFBS_None, // RLDCL = 1807
23826 CEFBS_None, // RLDCL_rec = 1808
23827 CEFBS_None, // RLDCR = 1809
23828 CEFBS_None, // RLDCR_rec = 1810
23829 CEFBS_None, // RLDIC = 1811
23830 CEFBS_None, // RLDICL = 1812
23831 CEFBS_None, // RLDICL_32 = 1813
23832 CEFBS_None, // RLDICL_32_64 = 1814
23833 CEFBS_None, // RLDICL_32_rec = 1815
23834 CEFBS_None, // RLDICL_rec = 1816
23835 CEFBS_None, // RLDICR = 1817
23836 CEFBS_None, // RLDICR_32 = 1818
23837 CEFBS_None, // RLDICR_rec = 1819
23838 CEFBS_None, // RLDIC_rec = 1820
23839 CEFBS_None, // RLDIMI = 1821
23840 CEFBS_None, // RLDIMI_rec = 1822
23841 CEFBS_None, // RLWIMI = 1823
23842 CEFBS_None, // RLWIMI8 = 1824
23843 CEFBS_None, // RLWIMI8_rec = 1825
23844 CEFBS_None, // RLWIMI_rec = 1826
23845 CEFBS_None, // RLWINM = 1827
23846 CEFBS_None, // RLWINM8 = 1828
23847 CEFBS_None, // RLWINM8_rec = 1829
23848 CEFBS_None, // RLWINM_rec = 1830
23849 CEFBS_None, // RLWNM = 1831
23850 CEFBS_None, // RLWNM8 = 1832
23851 CEFBS_None, // RLWNM8_rec = 1833
23852 CEFBS_None, // RLWNM_rec = 1834
23853 CEFBS_None, // ReadTB = 1835
23854 CEFBS_None, // SC = 1836
23855 CEFBS_None, // SCV = 1837
23856 CEFBS_None, // SELECT_CC_F16 = 1838
23857 CEFBS_None, // SELECT_CC_F4 = 1839
23858 CEFBS_None, // SELECT_CC_F8 = 1840
23859 CEFBS_None, // SELECT_CC_I4 = 1841
23860 CEFBS_None, // SELECT_CC_I8 = 1842
23861 CEFBS_None, // SELECT_CC_SPE = 1843
23862 CEFBS_None, // SELECT_CC_SPE4 = 1844
23863 CEFBS_None, // SELECT_CC_VRRC = 1845
23864 CEFBS_None, // SELECT_CC_VSFRC = 1846
23865 CEFBS_None, // SELECT_CC_VSRC = 1847
23866 CEFBS_None, // SELECT_CC_VSSRC = 1848
23867 CEFBS_None, // SELECT_F16 = 1849
23868 CEFBS_None, // SELECT_F4 = 1850
23869 CEFBS_None, // SELECT_F8 = 1851
23870 CEFBS_None, // SELECT_I4 = 1852
23871 CEFBS_None, // SELECT_I8 = 1853
23872 CEFBS_None, // SELECT_SPE = 1854
23873 CEFBS_None, // SELECT_SPE4 = 1855
23874 CEFBS_None, // SELECT_VRRC = 1856
23875 CEFBS_None, // SELECT_VSFRC = 1857
23876 CEFBS_None, // SELECT_VSRC = 1858
23877 CEFBS_None, // SELECT_VSSRC = 1859
23878 CEFBS_None, // SETB = 1860
23879 CEFBS_None, // SETB8 = 1861
23880 CEFBS_None, // SETBC = 1862
23881 CEFBS_None, // SETBC8 = 1863
23882 CEFBS_None, // SETBCR = 1864
23883 CEFBS_None, // SETBCR8 = 1865
23884 CEFBS_None, // SETFLM = 1866
23885 CEFBS_None, // SETNBC = 1867
23886 CEFBS_None, // SETNBC8 = 1868
23887 CEFBS_None, // SETNBCR = 1869
23888 CEFBS_None, // SETNBCR8 = 1870
23889 CEFBS_None, // SETRND = 1871
23890 CEFBS_None, // SETRNDi = 1872
23891 CEFBS_None, // SLBFEE_rec = 1873
23892 CEFBS_None, // SLBIA = 1874
23893 CEFBS_None, // SLBIE = 1875
23894 CEFBS_None, // SLBIEG = 1876
23895 CEFBS_None, // SLBMFEE = 1877
23896 CEFBS_None, // SLBMFEV = 1878
23897 CEFBS_None, // SLBMTE = 1879
23898 CEFBS_None, // SLBSYNC = 1880
23899 CEFBS_None, // SLD = 1881
23900 CEFBS_None, // SLD_rec = 1882
23901 CEFBS_None, // SLW = 1883
23902 CEFBS_None, // SLW8 = 1884
23903 CEFBS_None, // SLW8_rec = 1885
23904 CEFBS_None, // SLW_rec = 1886
23905 CEFBS_None, // SPELWZ = 1887
23906 CEFBS_None, // SPELWZX = 1888
23907 CEFBS_None, // SPESTW = 1889
23908 CEFBS_None, // SPESTWX = 1890
23909 CEFBS_None, // SPILL_ACC = 1891
23910 CEFBS_None, // SPILL_CR = 1892
23911 CEFBS_None, // SPILL_CRBIT = 1893
23912 CEFBS_None, // SPILL_QUADWORD = 1894
23913 CEFBS_None, // SPILL_UACC = 1895
23914 CEFBS_None, // SPILL_WACC = 1896
23915 CEFBS_None, // SPLIT_QUADWORD = 1897
23916 CEFBS_None, // SRAD = 1898
23917 CEFBS_None, // SRADI = 1899
23918 CEFBS_None, // SRADI_32 = 1900
23919 CEFBS_None, // SRADI_rec = 1901
23920 CEFBS_None, // SRAD_rec = 1902
23921 CEFBS_None, // SRAW = 1903
23922 CEFBS_None, // SRAWI = 1904
23923 CEFBS_None, // SRAWI_rec = 1905
23924 CEFBS_None, // SRAW_rec = 1906
23925 CEFBS_None, // SRD = 1907
23926 CEFBS_None, // SRD_rec = 1908
23927 CEFBS_None, // SRW = 1909
23928 CEFBS_None, // SRW8 = 1910
23929 CEFBS_None, // SRW8_rec = 1911
23930 CEFBS_None, // SRW_rec = 1912
23931 CEFBS_None, // STB = 1913
23932 CEFBS_None, // STB8 = 1914
23933 CEFBS_None, // STBCIX = 1915
23934 CEFBS_None, // STBCX = 1916
23935 CEFBS_None, // STBEPX = 1917
23936 CEFBS_None, // STBU = 1918
23937 CEFBS_None, // STBU8 = 1919
23938 CEFBS_None, // STBUX = 1920
23939 CEFBS_None, // STBUX8 = 1921
23940 CEFBS_None, // STBX = 1922
23941 CEFBS_None, // STBX8 = 1923
23942 CEFBS_None, // STBXTLS = 1924
23943 CEFBS_None, // STBXTLS_ = 1925
23944 CEFBS_None, // STBXTLS_32 = 1926
23945 CEFBS_None, // STD = 1927
23946 CEFBS_None, // STDAT = 1928
23947 CEFBS_None, // STDBRX = 1929
23948 CEFBS_None, // STDCIX = 1930
23949 CEFBS_None, // STDCX = 1931
23950 CEFBS_None, // STDU = 1932
23951 CEFBS_None, // STDUX = 1933
23952 CEFBS_None, // STDX = 1934
23953 CEFBS_None, // STDXTLS = 1935
23954 CEFBS_None, // STDXTLS_ = 1936
23955 CEFBS_None, // STFD = 1937
23956 CEFBS_None, // STFDEPX = 1938
23957 CEFBS_None, // STFDU = 1939
23958 CEFBS_None, // STFDUX = 1940
23959 CEFBS_None, // STFDX = 1941
23960 CEFBS_None, // STFDXTLS = 1942
23961 CEFBS_None, // STFDXTLS_ = 1943
23962 CEFBS_None, // STFIWX = 1944
23963 CEFBS_None, // STFS = 1945
23964 CEFBS_None, // STFSU = 1946
23965 CEFBS_None, // STFSUX = 1947
23966 CEFBS_None, // STFSX = 1948
23967 CEFBS_None, // STFSXTLS = 1949
23968 CEFBS_None, // STFSXTLS_ = 1950
23969 CEFBS_None, // STH = 1951
23970 CEFBS_None, // STH8 = 1952
23971 CEFBS_None, // STHBRX = 1953
23972 CEFBS_None, // STHCIX = 1954
23973 CEFBS_None, // STHCX = 1955
23974 CEFBS_None, // STHEPX = 1956
23975 CEFBS_None, // STHU = 1957
23976 CEFBS_None, // STHU8 = 1958
23977 CEFBS_None, // STHUX = 1959
23978 CEFBS_None, // STHUX8 = 1960
23979 CEFBS_None, // STHX = 1961
23980 CEFBS_None, // STHX8 = 1962
23981 CEFBS_None, // STHXTLS = 1963
23982 CEFBS_None, // STHXTLS_ = 1964
23983 CEFBS_None, // STHXTLS_32 = 1965
23984 CEFBS_None, // STMW = 1966
23985 CEFBS_None, // STOP = 1967
23986 CEFBS_None, // STQ = 1968
23987 CEFBS_None, // STQCX = 1969
23988 CEFBS_None, // STQX_PSEUDO = 1970
23989 CEFBS_None, // STSWI = 1971
23990 CEFBS_None, // STVEBX = 1972
23991 CEFBS_None, // STVEHX = 1973
23992 CEFBS_None, // STVEWX = 1974
23993 CEFBS_None, // STVX = 1975
23994 CEFBS_None, // STVXL = 1976
23995 CEFBS_None, // STW = 1977
23996 CEFBS_None, // STW8 = 1978
23997 CEFBS_None, // STWAT = 1979
23998 CEFBS_None, // STWBRX = 1980
23999 CEFBS_None, // STWCIX = 1981
24000 CEFBS_None, // STWCX = 1982
24001 CEFBS_None, // STWEPX = 1983
24002 CEFBS_None, // STWU = 1984
24003 CEFBS_None, // STWU8 = 1985
24004 CEFBS_None, // STWUX = 1986
24005 CEFBS_None, // STWUX8 = 1987
24006 CEFBS_None, // STWX = 1988
24007 CEFBS_None, // STWX8 = 1989
24008 CEFBS_None, // STWXTLS = 1990
24009 CEFBS_None, // STWXTLS_ = 1991
24010 CEFBS_None, // STWXTLS_32 = 1992
24011 CEFBS_None, // STXSD = 1993
24012 CEFBS_None, // STXSDX = 1994
24013 CEFBS_None, // STXSIBX = 1995
24014 CEFBS_None, // STXSIBXv = 1996
24015 CEFBS_None, // STXSIHX = 1997
24016 CEFBS_None, // STXSIHXv = 1998
24017 CEFBS_None, // STXSIWX = 1999
24018 CEFBS_None, // STXSSP = 2000
24019 CEFBS_None, // STXSSPX = 2001
24020 CEFBS_None, // STXV = 2002
24021 CEFBS_None, // STXVB16X = 2003
24022 CEFBS_None, // STXVD2X = 2004
24023 CEFBS_None, // STXVH8X = 2005
24024 CEFBS_None, // STXVL = 2006
24025 CEFBS_None, // STXVLL = 2007
24026 CEFBS_None, // STXVP = 2008
24027 CEFBS_None, // STXVPRL = 2009
24028 CEFBS_None, // STXVPRLL = 2010
24029 CEFBS_None, // STXVPX = 2011
24030 CEFBS_None, // STXVRBX = 2012
24031 CEFBS_None, // STXVRDX = 2013
24032 CEFBS_None, // STXVRHX = 2014
24033 CEFBS_None, // STXVRL = 2015
24034 CEFBS_None, // STXVRLL = 2016
24035 CEFBS_None, // STXVRWX = 2017
24036 CEFBS_None, // STXVW4X = 2018
24037 CEFBS_None, // STXVX = 2019
24038 CEFBS_None, // SUBF = 2020
24039 CEFBS_None, // SUBF8 = 2021
24040 CEFBS_None, // SUBF8O = 2022
24041 CEFBS_None, // SUBF8O_rec = 2023
24042 CEFBS_None, // SUBF8_rec = 2024
24043 CEFBS_None, // SUBFC = 2025
24044 CEFBS_None, // SUBFC8 = 2026
24045 CEFBS_None, // SUBFC8O = 2027
24046 CEFBS_None, // SUBFC8O_rec = 2028
24047 CEFBS_None, // SUBFC8_rec = 2029
24048 CEFBS_None, // SUBFCO = 2030
24049 CEFBS_None, // SUBFCO_rec = 2031
24050 CEFBS_None, // SUBFC_rec = 2032
24051 CEFBS_None, // SUBFE = 2033
24052 CEFBS_None, // SUBFE8 = 2034
24053 CEFBS_None, // SUBFE8O = 2035
24054 CEFBS_None, // SUBFE8O_rec = 2036
24055 CEFBS_None, // SUBFE8_rec = 2037
24056 CEFBS_None, // SUBFEO = 2038
24057 CEFBS_None, // SUBFEO_rec = 2039
24058 CEFBS_None, // SUBFE_rec = 2040
24059 CEFBS_None, // SUBFIC = 2041
24060 CEFBS_None, // SUBFIC8 = 2042
24061 CEFBS_None, // SUBFME = 2043
24062 CEFBS_None, // SUBFME8 = 2044
24063 CEFBS_None, // SUBFME8O = 2045
24064 CEFBS_None, // SUBFME8O_rec = 2046
24065 CEFBS_None, // SUBFME8_rec = 2047
24066 CEFBS_None, // SUBFMEO = 2048
24067 CEFBS_None, // SUBFMEO_rec = 2049
24068 CEFBS_None, // SUBFME_rec = 2050
24069 CEFBS_None, // SUBFO = 2051
24070 CEFBS_None, // SUBFO_rec = 2052
24071 CEFBS_None, // SUBFUS = 2053
24072 CEFBS_None, // SUBFUS_rec = 2054
24073 CEFBS_None, // SUBFZE = 2055
24074 CEFBS_None, // SUBFZE8 = 2056
24075 CEFBS_None, // SUBFZE8O = 2057
24076 CEFBS_None, // SUBFZE8O_rec = 2058
24077 CEFBS_None, // SUBFZE8_rec = 2059
24078 CEFBS_None, // SUBFZEO = 2060
24079 CEFBS_None, // SUBFZEO_rec = 2061
24080 CEFBS_None, // SUBFZE_rec = 2062
24081 CEFBS_None, // SUBF_rec = 2063
24082 CEFBS_None, // SYNC = 2064
24083 CEFBS_None, // SYNCP10 = 2065
24084 CEFBS_None, // TABORT = 2066
24085 CEFBS_None, // TABORTDC = 2067
24086 CEFBS_None, // TABORTDCI = 2068
24087 CEFBS_None, // TABORTWC = 2069
24088 CEFBS_None, // TABORTWCI = 2070
24089 CEFBS_None, // TAILB = 2071
24090 CEFBS_None, // TAILB8 = 2072
24091 CEFBS_None, // TAILBA = 2073
24092 CEFBS_None, // TAILBA8 = 2074
24093 CEFBS_None, // TAILBCTR = 2075
24094 CEFBS_None, // TAILBCTR8 = 2076
24095 CEFBS_None, // TBEGIN = 2077
24096 CEFBS_None, // TBEGIN_RET = 2078
24097 CEFBS_None, // TCHECK = 2079
24098 CEFBS_None, // TCHECK_RET = 2080
24099 CEFBS_None, // TCRETURNai = 2081
24100 CEFBS_None, // TCRETURNai8 = 2082
24101 CEFBS_None, // TCRETURNdi = 2083
24102 CEFBS_None, // TCRETURNdi8 = 2084
24103 CEFBS_None, // TCRETURNri = 2085
24104 CEFBS_None, // TCRETURNri8 = 2086
24105 CEFBS_None, // TD = 2087
24106 CEFBS_None, // TDI = 2088
24107 CEFBS_None, // TEND = 2089
24108 CEFBS_None, // TLBIA = 2090
24109 CEFBS_None, // TLBIE = 2091
24110 CEFBS_None, // TLBIEL = 2092
24111 CEFBS_None, // TLBILX = 2093
24112 CEFBS_None, // TLBIVAX = 2094
24113 CEFBS_None, // TLBLD = 2095
24114 CEFBS_None, // TLBLI = 2096
24115 CEFBS_None, // TLBRE = 2097
24116 CEFBS_None, // TLBRE2 = 2098
24117 CEFBS_None, // TLBSX = 2099
24118 CEFBS_None, // TLBSX2 = 2100
24119 CEFBS_None, // TLBSX2D = 2101
24120 CEFBS_None, // TLBSYNC = 2102
24121 CEFBS_None, // TLBWE = 2103
24122 CEFBS_None, // TLBWE2 = 2104
24123 CEFBS_None, // TLSGDAIX = 2105
24124 CEFBS_None, // TLSGDAIX8 = 2106
24125 CEFBS_None, // TLSLDAIX = 2107
24126 CEFBS_None, // TLSLDAIX8 = 2108
24127 CEFBS_None, // TRAP = 2109
24128 CEFBS_None, // TRECHKPT = 2110
24129 CEFBS_None, // TRECLAIM = 2111
24130 CEFBS_None, // TSR = 2112
24131 CEFBS_None, // TW = 2113
24132 CEFBS_None, // TWI = 2114
24133 CEFBS_None, // UNENCODED_NOP = 2115
24134 CEFBS_None, // UpdateGBR = 2116
24135 CEFBS_None, // VABSDUB = 2117
24136 CEFBS_None, // VABSDUH = 2118
24137 CEFBS_None, // VABSDUW = 2119
24138 CEFBS_None, // VADDCUQ = 2120
24139 CEFBS_None, // VADDCUW = 2121
24140 CEFBS_None, // VADDECUQ = 2122
24141 CEFBS_None, // VADDEUQM = 2123
24142 CEFBS_None, // VADDFP = 2124
24143 CEFBS_None, // VADDSBS = 2125
24144 CEFBS_None, // VADDSHS = 2126
24145 CEFBS_None, // VADDSWS = 2127
24146 CEFBS_None, // VADDUBM = 2128
24147 CEFBS_None, // VADDUBS = 2129
24148 CEFBS_None, // VADDUDM = 2130
24149 CEFBS_None, // VADDUHM = 2131
24150 CEFBS_None, // VADDUHS = 2132
24151 CEFBS_None, // VADDUQM = 2133
24152 CEFBS_None, // VADDUWM = 2134
24153 CEFBS_None, // VADDUWS = 2135
24154 CEFBS_None, // VAND = 2136
24155 CEFBS_None, // VANDC = 2137
24156 CEFBS_None, // VAVGSB = 2138
24157 CEFBS_None, // VAVGSH = 2139
24158 CEFBS_None, // VAVGSW = 2140
24159 CEFBS_None, // VAVGUB = 2141
24160 CEFBS_None, // VAVGUH = 2142
24161 CEFBS_None, // VAVGUW = 2143
24162 CEFBS_None, // VBPERMD = 2144
24163 CEFBS_None, // VBPERMQ = 2145
24164 CEFBS_None, // VCFSX = 2146
24165 CEFBS_None, // VCFSX_0 = 2147
24166 CEFBS_None, // VCFUGED = 2148
24167 CEFBS_None, // VCFUX = 2149
24168 CEFBS_None, // VCFUX_0 = 2150
24169 CEFBS_None, // VCIPHER = 2151
24170 CEFBS_None, // VCIPHERLAST = 2152
24171 CEFBS_None, // VCLRLB = 2153
24172 CEFBS_None, // VCLRRB = 2154
24173 CEFBS_None, // VCLZB = 2155
24174 CEFBS_None, // VCLZD = 2156
24175 CEFBS_None, // VCLZDM = 2157
24176 CEFBS_None, // VCLZH = 2158
24177 CEFBS_None, // VCLZLSBB = 2159
24178 CEFBS_None, // VCLZW = 2160
24179 CEFBS_None, // VCMPBFP = 2161
24180 CEFBS_None, // VCMPBFP_rec = 2162
24181 CEFBS_None, // VCMPEQFP = 2163
24182 CEFBS_None, // VCMPEQFP_rec = 2164
24183 CEFBS_None, // VCMPEQUB = 2165
24184 CEFBS_None, // VCMPEQUB_rec = 2166
24185 CEFBS_None, // VCMPEQUD = 2167
24186 CEFBS_None, // VCMPEQUD_rec = 2168
24187 CEFBS_None, // VCMPEQUH = 2169
24188 CEFBS_None, // VCMPEQUH_rec = 2170
24189 CEFBS_None, // VCMPEQUQ = 2171
24190 CEFBS_None, // VCMPEQUQ_rec = 2172
24191 CEFBS_None, // VCMPEQUW = 2173
24192 CEFBS_None, // VCMPEQUW_rec = 2174
24193 CEFBS_None, // VCMPGEFP = 2175
24194 CEFBS_None, // VCMPGEFP_rec = 2176
24195 CEFBS_None, // VCMPGTFP = 2177
24196 CEFBS_None, // VCMPGTFP_rec = 2178
24197 CEFBS_None, // VCMPGTSB = 2179
24198 CEFBS_None, // VCMPGTSB_rec = 2180
24199 CEFBS_None, // VCMPGTSD = 2181
24200 CEFBS_None, // VCMPGTSD_rec = 2182
24201 CEFBS_None, // VCMPGTSH = 2183
24202 CEFBS_None, // VCMPGTSH_rec = 2184
24203 CEFBS_None, // VCMPGTSQ = 2185
24204 CEFBS_None, // VCMPGTSQ_rec = 2186
24205 CEFBS_None, // VCMPGTSW = 2187
24206 CEFBS_None, // VCMPGTSW_rec = 2188
24207 CEFBS_None, // VCMPGTUB = 2189
24208 CEFBS_None, // VCMPGTUB_rec = 2190
24209 CEFBS_None, // VCMPGTUD = 2191
24210 CEFBS_None, // VCMPGTUD_rec = 2192
24211 CEFBS_None, // VCMPGTUH = 2193
24212 CEFBS_None, // VCMPGTUH_rec = 2194
24213 CEFBS_None, // VCMPGTUQ = 2195
24214 CEFBS_None, // VCMPGTUQ_rec = 2196
24215 CEFBS_None, // VCMPGTUW = 2197
24216 CEFBS_None, // VCMPGTUW_rec = 2198
24217 CEFBS_None, // VCMPNEB = 2199
24218 CEFBS_None, // VCMPNEB_rec = 2200
24219 CEFBS_None, // VCMPNEH = 2201
24220 CEFBS_None, // VCMPNEH_rec = 2202
24221 CEFBS_None, // VCMPNEW = 2203
24222 CEFBS_None, // VCMPNEW_rec = 2204
24223 CEFBS_None, // VCMPNEZB = 2205
24224 CEFBS_None, // VCMPNEZB_rec = 2206
24225 CEFBS_None, // VCMPNEZH = 2207
24226 CEFBS_None, // VCMPNEZH_rec = 2208
24227 CEFBS_None, // VCMPNEZW = 2209
24228 CEFBS_None, // VCMPNEZW_rec = 2210
24229 CEFBS_None, // VCMPSQ = 2211
24230 CEFBS_None, // VCMPUQ = 2212
24231 CEFBS_None, // VCNTMBB = 2213
24232 CEFBS_None, // VCNTMBD = 2214
24233 CEFBS_None, // VCNTMBH = 2215
24234 CEFBS_None, // VCNTMBW = 2216
24235 CEFBS_None, // VCTSXS = 2217
24236 CEFBS_None, // VCTSXS_0 = 2218
24237 CEFBS_None, // VCTUXS = 2219
24238 CEFBS_None, // VCTUXS_0 = 2220
24239 CEFBS_None, // VCTZB = 2221
24240 CEFBS_None, // VCTZD = 2222
24241 CEFBS_None, // VCTZDM = 2223
24242 CEFBS_None, // VCTZH = 2224
24243 CEFBS_None, // VCTZLSBB = 2225
24244 CEFBS_None, // VCTZW = 2226
24245 CEFBS_None, // VDIVESD = 2227
24246 CEFBS_None, // VDIVESQ = 2228
24247 CEFBS_None, // VDIVESW = 2229
24248 CEFBS_None, // VDIVEUD = 2230
24249 CEFBS_None, // VDIVEUQ = 2231
24250 CEFBS_None, // VDIVEUW = 2232
24251 CEFBS_None, // VDIVSD = 2233
24252 CEFBS_None, // VDIVSQ = 2234
24253 CEFBS_None, // VDIVSW = 2235
24254 CEFBS_None, // VDIVUD = 2236
24255 CEFBS_None, // VDIVUQ = 2237
24256 CEFBS_None, // VDIVUW = 2238
24257 CEFBS_None, // VEQV = 2239
24258 CEFBS_None, // VEXPANDBM = 2240
24259 CEFBS_None, // VEXPANDDM = 2241
24260 CEFBS_None, // VEXPANDHM = 2242
24261 CEFBS_None, // VEXPANDQM = 2243
24262 CEFBS_None, // VEXPANDWM = 2244
24263 CEFBS_None, // VEXPTEFP = 2245
24264 CEFBS_None, // VEXTDDVLX = 2246
24265 CEFBS_None, // VEXTDDVRX = 2247
24266 CEFBS_None, // VEXTDUBVLX = 2248
24267 CEFBS_None, // VEXTDUBVRX = 2249
24268 CEFBS_None, // VEXTDUHVLX = 2250
24269 CEFBS_None, // VEXTDUHVRX = 2251
24270 CEFBS_None, // VEXTDUWVLX = 2252
24271 CEFBS_None, // VEXTDUWVRX = 2253
24272 CEFBS_None, // VEXTRACTBM = 2254
24273 CEFBS_None, // VEXTRACTD = 2255
24274 CEFBS_None, // VEXTRACTDM = 2256
24275 CEFBS_None, // VEXTRACTHM = 2257
24276 CEFBS_None, // VEXTRACTQM = 2258
24277 CEFBS_None, // VEXTRACTUB = 2259
24278 CEFBS_None, // VEXTRACTUH = 2260
24279 CEFBS_None, // VEXTRACTUW = 2261
24280 CEFBS_None, // VEXTRACTWM = 2262
24281 CEFBS_None, // VEXTSB2D = 2263
24282 CEFBS_None, // VEXTSB2Ds = 2264
24283 CEFBS_None, // VEXTSB2W = 2265
24284 CEFBS_None, // VEXTSB2Ws = 2266
24285 CEFBS_None, // VEXTSD2Q = 2267
24286 CEFBS_None, // VEXTSH2D = 2268
24287 CEFBS_None, // VEXTSH2Ds = 2269
24288 CEFBS_None, // VEXTSH2W = 2270
24289 CEFBS_None, // VEXTSH2Ws = 2271
24290 CEFBS_None, // VEXTSW2D = 2272
24291 CEFBS_None, // VEXTSW2Ds = 2273
24292 CEFBS_None, // VEXTUBLX = 2274
24293 CEFBS_None, // VEXTUBRX = 2275
24294 CEFBS_None, // VEXTUHLX = 2276
24295 CEFBS_None, // VEXTUHRX = 2277
24296 CEFBS_None, // VEXTUWLX = 2278
24297 CEFBS_None, // VEXTUWRX = 2279
24298 CEFBS_None, // VGBBD = 2280
24299 CEFBS_None, // VGNB = 2281
24300 CEFBS_None, // VINSBLX = 2282
24301 CEFBS_None, // VINSBRX = 2283
24302 CEFBS_None, // VINSBVLX = 2284
24303 CEFBS_None, // VINSBVRX = 2285
24304 CEFBS_None, // VINSD = 2286
24305 CEFBS_None, // VINSDLX = 2287
24306 CEFBS_None, // VINSDRX = 2288
24307 CEFBS_None, // VINSERTB = 2289
24308 CEFBS_None, // VINSERTD = 2290
24309 CEFBS_None, // VINSERTH = 2291
24310 CEFBS_None, // VINSERTW = 2292
24311 CEFBS_None, // VINSHLX = 2293
24312 CEFBS_None, // VINSHRX = 2294
24313 CEFBS_None, // VINSHVLX = 2295
24314 CEFBS_None, // VINSHVRX = 2296
24315 CEFBS_None, // VINSW = 2297
24316 CEFBS_None, // VINSWLX = 2298
24317 CEFBS_None, // VINSWRX = 2299
24318 CEFBS_None, // VINSWVLX = 2300
24319 CEFBS_None, // VINSWVRX = 2301
24320 CEFBS_None, // VLOGEFP = 2302
24321 CEFBS_None, // VMADDFP = 2303
24322 CEFBS_None, // VMAXFP = 2304
24323 CEFBS_None, // VMAXSB = 2305
24324 CEFBS_None, // VMAXSD = 2306
24325 CEFBS_None, // VMAXSH = 2307
24326 CEFBS_None, // VMAXSW = 2308
24327 CEFBS_None, // VMAXUB = 2309
24328 CEFBS_None, // VMAXUD = 2310
24329 CEFBS_None, // VMAXUH = 2311
24330 CEFBS_None, // VMAXUW = 2312
24331 CEFBS_None, // VMHADDSHS = 2313
24332 CEFBS_None, // VMHRADDSHS = 2314
24333 CEFBS_None, // VMINFP = 2315
24334 CEFBS_None, // VMINSB = 2316
24335 CEFBS_None, // VMINSD = 2317
24336 CEFBS_None, // VMINSH = 2318
24337 CEFBS_None, // VMINSW = 2319
24338 CEFBS_None, // VMINUB = 2320
24339 CEFBS_None, // VMINUD = 2321
24340 CEFBS_None, // VMINUH = 2322
24341 CEFBS_None, // VMINUW = 2323
24342 CEFBS_None, // VMLADDUHM = 2324
24343 CEFBS_None, // VMODSD = 2325
24344 CEFBS_None, // VMODSQ = 2326
24345 CEFBS_None, // VMODSW = 2327
24346 CEFBS_None, // VMODUD = 2328
24347 CEFBS_None, // VMODUQ = 2329
24348 CEFBS_None, // VMODUW = 2330
24349 CEFBS_None, // VMRGEW = 2331
24350 CEFBS_None, // VMRGHB = 2332
24351 CEFBS_None, // VMRGHH = 2333
24352 CEFBS_None, // VMRGHW = 2334
24353 CEFBS_None, // VMRGLB = 2335
24354 CEFBS_None, // VMRGLH = 2336
24355 CEFBS_None, // VMRGLW = 2337
24356 CEFBS_None, // VMRGOW = 2338
24357 CEFBS_None, // VMSUMCUD = 2339
24358 CEFBS_None, // VMSUMMBM = 2340
24359 CEFBS_None, // VMSUMSHM = 2341
24360 CEFBS_None, // VMSUMSHS = 2342
24361 CEFBS_None, // VMSUMUBM = 2343
24362 CEFBS_None, // VMSUMUDM = 2344
24363 CEFBS_None, // VMSUMUHM = 2345
24364 CEFBS_None, // VMSUMUHS = 2346
24365 CEFBS_None, // VMUL10CUQ = 2347
24366 CEFBS_None, // VMUL10ECUQ = 2348
24367 CEFBS_None, // VMUL10EUQ = 2349
24368 CEFBS_None, // VMUL10UQ = 2350
24369 CEFBS_None, // VMULESB = 2351
24370 CEFBS_None, // VMULESD = 2352
24371 CEFBS_None, // VMULESH = 2353
24372 CEFBS_None, // VMULESW = 2354
24373 CEFBS_None, // VMULEUB = 2355
24374 CEFBS_None, // VMULEUD = 2356
24375 CEFBS_None, // VMULEUH = 2357
24376 CEFBS_None, // VMULEUW = 2358
24377 CEFBS_None, // VMULHSD = 2359
24378 CEFBS_None, // VMULHSW = 2360
24379 CEFBS_None, // VMULHUD = 2361
24380 CEFBS_None, // VMULHUW = 2362
24381 CEFBS_None, // VMULLD = 2363
24382 CEFBS_None, // VMULOSB = 2364
24383 CEFBS_None, // VMULOSD = 2365
24384 CEFBS_None, // VMULOSH = 2366
24385 CEFBS_None, // VMULOSW = 2367
24386 CEFBS_None, // VMULOUB = 2368
24387 CEFBS_None, // VMULOUD = 2369
24388 CEFBS_None, // VMULOUH = 2370
24389 CEFBS_None, // VMULOUW = 2371
24390 CEFBS_None, // VMULUWM = 2372
24391 CEFBS_None, // VNAND = 2373
24392 CEFBS_None, // VNCIPHER = 2374
24393 CEFBS_None, // VNCIPHERLAST = 2375
24394 CEFBS_None, // VNEGD = 2376
24395 CEFBS_None, // VNEGW = 2377
24396 CEFBS_None, // VNMSUBFP = 2378
24397 CEFBS_None, // VNOR = 2379
24398 CEFBS_None, // VOR = 2380
24399 CEFBS_None, // VORC = 2381
24400 CEFBS_None, // VPDEPD = 2382
24401 CEFBS_None, // VPERM = 2383
24402 CEFBS_None, // VPERMR = 2384
24403 CEFBS_None, // VPERMXOR = 2385
24404 CEFBS_None, // VPEXTD = 2386
24405 CEFBS_None, // VPKPX = 2387
24406 CEFBS_None, // VPKSDSS = 2388
24407 CEFBS_None, // VPKSDUS = 2389
24408 CEFBS_None, // VPKSHSS = 2390
24409 CEFBS_None, // VPKSHUS = 2391
24410 CEFBS_None, // VPKSWSS = 2392
24411 CEFBS_None, // VPKSWUS = 2393
24412 CEFBS_None, // VPKUDUM = 2394
24413 CEFBS_None, // VPKUDUS = 2395
24414 CEFBS_None, // VPKUHUM = 2396
24415 CEFBS_None, // VPKUHUS = 2397
24416 CEFBS_None, // VPKUWUM = 2398
24417 CEFBS_None, // VPKUWUS = 2399
24418 CEFBS_None, // VPMSUMB = 2400
24419 CEFBS_None, // VPMSUMD = 2401
24420 CEFBS_None, // VPMSUMH = 2402
24421 CEFBS_None, // VPMSUMW = 2403
24422 CEFBS_None, // VPOPCNTB = 2404
24423 CEFBS_None, // VPOPCNTD = 2405
24424 CEFBS_None, // VPOPCNTH = 2406
24425 CEFBS_None, // VPOPCNTW = 2407
24426 CEFBS_None, // VPRTYBD = 2408
24427 CEFBS_None, // VPRTYBQ = 2409
24428 CEFBS_None, // VPRTYBW = 2410
24429 CEFBS_None, // VREFP = 2411
24430 CEFBS_None, // VRFIM = 2412
24431 CEFBS_None, // VRFIN = 2413
24432 CEFBS_None, // VRFIP = 2414
24433 CEFBS_None, // VRFIZ = 2415
24434 CEFBS_None, // VRLB = 2416
24435 CEFBS_None, // VRLD = 2417
24436 CEFBS_None, // VRLDMI = 2418
24437 CEFBS_None, // VRLDNM = 2419
24438 CEFBS_None, // VRLH = 2420
24439 CEFBS_None, // VRLQ = 2421
24440 CEFBS_None, // VRLQMI = 2422
24441 CEFBS_None, // VRLQNM = 2423
24442 CEFBS_None, // VRLW = 2424
24443 CEFBS_None, // VRLWMI = 2425
24444 CEFBS_None, // VRLWNM = 2426
24445 CEFBS_None, // VRSQRTEFP = 2427
24446 CEFBS_None, // VSBOX = 2428
24447 CEFBS_None, // VSEL = 2429
24448 CEFBS_None, // VSHASIGMAD = 2430
24449 CEFBS_None, // VSHASIGMAW = 2431
24450 CEFBS_None, // VSL = 2432
24451 CEFBS_None, // VSLB = 2433
24452 CEFBS_None, // VSLD = 2434
24453 CEFBS_None, // VSLDBI = 2435
24454 CEFBS_None, // VSLDOI = 2436
24455 CEFBS_None, // VSLH = 2437
24456 CEFBS_None, // VSLO = 2438
24457 CEFBS_None, // VSLQ = 2439
24458 CEFBS_None, // VSLV = 2440
24459 CEFBS_None, // VSLW = 2441
24460 CEFBS_None, // VSPLTB = 2442
24461 CEFBS_None, // VSPLTBs = 2443
24462 CEFBS_None, // VSPLTH = 2444
24463 CEFBS_None, // VSPLTHs = 2445
24464 CEFBS_None, // VSPLTISB = 2446
24465 CEFBS_None, // VSPLTISH = 2447
24466 CEFBS_None, // VSPLTISW = 2448
24467 CEFBS_None, // VSPLTW = 2449
24468 CEFBS_None, // VSR = 2450
24469 CEFBS_None, // VSRAB = 2451
24470 CEFBS_None, // VSRAD = 2452
24471 CEFBS_None, // VSRAH = 2453
24472 CEFBS_None, // VSRAQ = 2454
24473 CEFBS_None, // VSRAW = 2455
24474 CEFBS_None, // VSRB = 2456
24475 CEFBS_None, // VSRD = 2457
24476 CEFBS_None, // VSRDBI = 2458
24477 CEFBS_None, // VSRH = 2459
24478 CEFBS_None, // VSRO = 2460
24479 CEFBS_None, // VSRQ = 2461
24480 CEFBS_None, // VSRV = 2462
24481 CEFBS_None, // VSRW = 2463
24482 CEFBS_None, // VSTRIBL = 2464
24483 CEFBS_None, // VSTRIBL_rec = 2465
24484 CEFBS_None, // VSTRIBR = 2466
24485 CEFBS_None, // VSTRIBR_rec = 2467
24486 CEFBS_None, // VSTRIHL = 2468
24487 CEFBS_None, // VSTRIHL_rec = 2469
24488 CEFBS_None, // VSTRIHR = 2470
24489 CEFBS_None, // VSTRIHR_rec = 2471
24490 CEFBS_None, // VSUBCUQ = 2472
24491 CEFBS_None, // VSUBCUW = 2473
24492 CEFBS_None, // VSUBECUQ = 2474
24493 CEFBS_None, // VSUBEUQM = 2475
24494 CEFBS_None, // VSUBFP = 2476
24495 CEFBS_None, // VSUBSBS = 2477
24496 CEFBS_None, // VSUBSHS = 2478
24497 CEFBS_None, // VSUBSWS = 2479
24498 CEFBS_None, // VSUBUBM = 2480
24499 CEFBS_None, // VSUBUBS = 2481
24500 CEFBS_None, // VSUBUDM = 2482
24501 CEFBS_None, // VSUBUHM = 2483
24502 CEFBS_None, // VSUBUHS = 2484
24503 CEFBS_None, // VSUBUQM = 2485
24504 CEFBS_None, // VSUBUWM = 2486
24505 CEFBS_None, // VSUBUWS = 2487
24506 CEFBS_None, // VSUM2SWS = 2488
24507 CEFBS_None, // VSUM4SBS = 2489
24508 CEFBS_None, // VSUM4SHS = 2490
24509 CEFBS_None, // VSUM4UBS = 2491
24510 CEFBS_None, // VSUMSWS = 2492
24511 CEFBS_None, // VUPKHPX = 2493
24512 CEFBS_None, // VUPKHSB = 2494
24513 CEFBS_None, // VUPKHSH = 2495
24514 CEFBS_None, // VUPKHSW = 2496
24515 CEFBS_None, // VUPKLPX = 2497
24516 CEFBS_None, // VUPKLSB = 2498
24517 CEFBS_None, // VUPKLSH = 2499
24518 CEFBS_None, // VUPKLSW = 2500
24519 CEFBS_None, // VXOR = 2501
24520 CEFBS_None, // V_SET0 = 2502
24521 CEFBS_None, // V_SET0B = 2503
24522 CEFBS_None, // V_SET0H = 2504
24523 CEFBS_None, // V_SETALLONES = 2505
24524 CEFBS_None, // V_SETALLONESB = 2506
24525 CEFBS_None, // V_SETALLONESH = 2507
24526 CEFBS_None, // WAIT = 2508
24527 CEFBS_None, // WAITP10 = 2509
24528 CEFBS_None, // WRTEE = 2510
24529 CEFBS_None, // WRTEEI = 2511
24530 CEFBS_None, // XOR = 2512
24531 CEFBS_None, // XOR8 = 2513
24532 CEFBS_None, // XOR8_rec = 2514
24533 CEFBS_None, // XORI = 2515
24534 CEFBS_None, // XORI8 = 2516
24535 CEFBS_None, // XORIS = 2517
24536 CEFBS_None, // XORIS8 = 2518
24537 CEFBS_None, // XOR_rec = 2519
24538 CEFBS_None, // XSABSDP = 2520
24539 CEFBS_None, // XSABSQP = 2521
24540 CEFBS_None, // XSADDDP = 2522
24541 CEFBS_None, // XSADDQP = 2523
24542 CEFBS_None, // XSADDQPO = 2524
24543 CEFBS_None, // XSADDSP = 2525
24544 CEFBS_None, // XSCMPEQDP = 2526
24545 CEFBS_None, // XSCMPEQQP = 2527
24546 CEFBS_None, // XSCMPEXPDP = 2528
24547 CEFBS_None, // XSCMPEXPQP = 2529
24548 CEFBS_None, // XSCMPGEDP = 2530
24549 CEFBS_None, // XSCMPGEQP = 2531
24550 CEFBS_None, // XSCMPGTDP = 2532
24551 CEFBS_None, // XSCMPGTQP = 2533
24552 CEFBS_None, // XSCMPODP = 2534
24553 CEFBS_None, // XSCMPOQP = 2535
24554 CEFBS_None, // XSCMPUDP = 2536
24555 CEFBS_None, // XSCMPUQP = 2537
24556 CEFBS_None, // XSCPSGNDP = 2538
24557 CEFBS_None, // XSCPSGNQP = 2539
24558 CEFBS_None, // XSCVDPHP = 2540
24559 CEFBS_None, // XSCVDPQP = 2541
24560 CEFBS_None, // XSCVDPSP = 2542
24561 CEFBS_None, // XSCVDPSPN = 2543
24562 CEFBS_None, // XSCVDPSXDS = 2544
24563 CEFBS_None, // XSCVDPSXDSs = 2545
24564 CEFBS_None, // XSCVDPSXWS = 2546
24565 CEFBS_None, // XSCVDPSXWSs = 2547
24566 CEFBS_None, // XSCVDPUXDS = 2548
24567 CEFBS_None, // XSCVDPUXDSs = 2549
24568 CEFBS_None, // XSCVDPUXWS = 2550
24569 CEFBS_None, // XSCVDPUXWSs = 2551
24570 CEFBS_None, // XSCVHPDP = 2552
24571 CEFBS_None, // XSCVQPDP = 2553
24572 CEFBS_None, // XSCVQPDPO = 2554
24573 CEFBS_None, // XSCVQPSDZ = 2555
24574 CEFBS_None, // XSCVQPSQZ = 2556
24575 CEFBS_None, // XSCVQPSWZ = 2557
24576 CEFBS_None, // XSCVQPUDZ = 2558
24577 CEFBS_None, // XSCVQPUQZ = 2559
24578 CEFBS_None, // XSCVQPUWZ = 2560
24579 CEFBS_None, // XSCVSDQP = 2561
24580 CEFBS_None, // XSCVSPDP = 2562
24581 CEFBS_None, // XSCVSPDPN = 2563
24582 CEFBS_None, // XSCVSQQP = 2564
24583 CEFBS_None, // XSCVSXDDP = 2565
24584 CEFBS_None, // XSCVSXDSP = 2566
24585 CEFBS_None, // XSCVUDQP = 2567
24586 CEFBS_None, // XSCVUQQP = 2568
24587 CEFBS_None, // XSCVUXDDP = 2569
24588 CEFBS_None, // XSCVUXDSP = 2570
24589 CEFBS_None, // XSDIVDP = 2571
24590 CEFBS_None, // XSDIVQP = 2572
24591 CEFBS_None, // XSDIVQPO = 2573
24592 CEFBS_None, // XSDIVSP = 2574
24593 CEFBS_None, // XSIEXPDP = 2575
24594 CEFBS_None, // XSIEXPQP = 2576
24595 CEFBS_None, // XSMADDADP = 2577
24596 CEFBS_None, // XSMADDASP = 2578
24597 CEFBS_None, // XSMADDMDP = 2579
24598 CEFBS_None, // XSMADDMSP = 2580
24599 CEFBS_None, // XSMADDQP = 2581
24600 CEFBS_None, // XSMADDQPO = 2582
24601 CEFBS_None, // XSMAXCDP = 2583
24602 CEFBS_None, // XSMAXCQP = 2584
24603 CEFBS_None, // XSMAXDP = 2585
24604 CEFBS_None, // XSMAXJDP = 2586
24605 CEFBS_None, // XSMINCDP = 2587
24606 CEFBS_None, // XSMINCQP = 2588
24607 CEFBS_None, // XSMINDP = 2589
24608 CEFBS_None, // XSMINJDP = 2590
24609 CEFBS_None, // XSMSUBADP = 2591
24610 CEFBS_None, // XSMSUBASP = 2592
24611 CEFBS_None, // XSMSUBMDP = 2593
24612 CEFBS_None, // XSMSUBMSP = 2594
24613 CEFBS_None, // XSMSUBQP = 2595
24614 CEFBS_None, // XSMSUBQPO = 2596
24615 CEFBS_None, // XSMULDP = 2597
24616 CEFBS_None, // XSMULQP = 2598
24617 CEFBS_None, // XSMULQPO = 2599
24618 CEFBS_None, // XSMULSP = 2600
24619 CEFBS_None, // XSNABSDP = 2601
24620 CEFBS_None, // XSNABSDPs = 2602
24621 CEFBS_None, // XSNABSQP = 2603
24622 CEFBS_None, // XSNEGDP = 2604
24623 CEFBS_None, // XSNEGQP = 2605
24624 CEFBS_None, // XSNMADDADP = 2606
24625 CEFBS_None, // XSNMADDASP = 2607
24626 CEFBS_None, // XSNMADDMDP = 2608
24627 CEFBS_None, // XSNMADDMSP = 2609
24628 CEFBS_None, // XSNMADDQP = 2610
24629 CEFBS_None, // XSNMADDQPO = 2611
24630 CEFBS_None, // XSNMSUBADP = 2612
24631 CEFBS_None, // XSNMSUBASP = 2613
24632 CEFBS_None, // XSNMSUBMDP = 2614
24633 CEFBS_None, // XSNMSUBMSP = 2615
24634 CEFBS_None, // XSNMSUBQP = 2616
24635 CEFBS_None, // XSNMSUBQPO = 2617
24636 CEFBS_None, // XSRDPI = 2618
24637 CEFBS_None, // XSRDPIC = 2619
24638 CEFBS_None, // XSRDPIM = 2620
24639 CEFBS_None, // XSRDPIP = 2621
24640 CEFBS_None, // XSRDPIZ = 2622
24641 CEFBS_None, // XSREDP = 2623
24642 CEFBS_None, // XSRESP = 2624
24643 CEFBS_None, // XSRQPI = 2625
24644 CEFBS_None, // XSRQPIX = 2626
24645 CEFBS_None, // XSRQPXP = 2627
24646 CEFBS_None, // XSRSP = 2628
24647 CEFBS_None, // XSRSQRTEDP = 2629
24648 CEFBS_None, // XSRSQRTESP = 2630
24649 CEFBS_None, // XSSQRTDP = 2631
24650 CEFBS_None, // XSSQRTQP = 2632
24651 CEFBS_None, // XSSQRTQPO = 2633
24652 CEFBS_None, // XSSQRTSP = 2634
24653 CEFBS_None, // XSSUBDP = 2635
24654 CEFBS_None, // XSSUBQP = 2636
24655 CEFBS_None, // XSSUBQPO = 2637
24656 CEFBS_None, // XSSUBSP = 2638
24657 CEFBS_None, // XSTDIVDP = 2639
24658 CEFBS_None, // XSTSQRTDP = 2640
24659 CEFBS_None, // XSTSTDCDP = 2641
24660 CEFBS_None, // XSTSTDCQP = 2642
24661 CEFBS_None, // XSTSTDCSP = 2643
24662 CEFBS_None, // XSXEXPDP = 2644
24663 CEFBS_None, // XSXEXPQP = 2645
24664 CEFBS_None, // XSXSIGDP = 2646
24665 CEFBS_None, // XSXSIGQP = 2647
24666 CEFBS_None, // XVABSDP = 2648
24667 CEFBS_None, // XVABSSP = 2649
24668 CEFBS_None, // XVADDDP = 2650
24669 CEFBS_None, // XVADDSP = 2651
24670 CEFBS_None, // XVBF16GER2 = 2652
24671 CEFBS_None, // XVBF16GER2NN = 2653
24672 CEFBS_None, // XVBF16GER2NP = 2654
24673 CEFBS_None, // XVBF16GER2PN = 2655
24674 CEFBS_None, // XVBF16GER2PP = 2656
24675 CEFBS_None, // XVBF16GER2W = 2657
24676 CEFBS_None, // XVBF16GER2WNN = 2658
24677 CEFBS_None, // XVBF16GER2WNP = 2659
24678 CEFBS_None, // XVBF16GER2WPN = 2660
24679 CEFBS_None, // XVBF16GER2WPP = 2661
24680 CEFBS_None, // XVCMPEQDP = 2662
24681 CEFBS_None, // XVCMPEQDP_rec = 2663
24682 CEFBS_None, // XVCMPEQSP = 2664
24683 CEFBS_None, // XVCMPEQSP_rec = 2665
24684 CEFBS_None, // XVCMPGEDP = 2666
24685 CEFBS_None, // XVCMPGEDP_rec = 2667
24686 CEFBS_None, // XVCMPGESP = 2668
24687 CEFBS_None, // XVCMPGESP_rec = 2669
24688 CEFBS_None, // XVCMPGTDP = 2670
24689 CEFBS_None, // XVCMPGTDP_rec = 2671
24690 CEFBS_None, // XVCMPGTSP = 2672
24691 CEFBS_None, // XVCMPGTSP_rec = 2673
24692 CEFBS_None, // XVCPSGNDP = 2674
24693 CEFBS_None, // XVCPSGNSP = 2675
24694 CEFBS_None, // XVCVBF16SPN = 2676
24695 CEFBS_None, // XVCVDPSP = 2677
24696 CEFBS_None, // XVCVDPSXDS = 2678
24697 CEFBS_None, // XVCVDPSXWS = 2679
24698 CEFBS_None, // XVCVDPUXDS = 2680
24699 CEFBS_None, // XVCVDPUXWS = 2681
24700 CEFBS_None, // XVCVHPSP = 2682
24701 CEFBS_None, // XVCVSPBF16 = 2683
24702 CEFBS_None, // XVCVSPDP = 2684
24703 CEFBS_None, // XVCVSPHP = 2685
24704 CEFBS_None, // XVCVSPSXDS = 2686
24705 CEFBS_None, // XVCVSPSXWS = 2687
24706 CEFBS_None, // XVCVSPUXDS = 2688
24707 CEFBS_None, // XVCVSPUXWS = 2689
24708 CEFBS_None, // XVCVSXDDP = 2690
24709 CEFBS_None, // XVCVSXDSP = 2691
24710 CEFBS_None, // XVCVSXWDP = 2692
24711 CEFBS_None, // XVCVSXWSP = 2693
24712 CEFBS_None, // XVCVUXDDP = 2694
24713 CEFBS_None, // XVCVUXDSP = 2695
24714 CEFBS_None, // XVCVUXWDP = 2696
24715 CEFBS_None, // XVCVUXWSP = 2697
24716 CEFBS_None, // XVDIVDP = 2698
24717 CEFBS_None, // XVDIVSP = 2699
24718 CEFBS_None, // XVF16GER2 = 2700
24719 CEFBS_None, // XVF16GER2NN = 2701
24720 CEFBS_None, // XVF16GER2NP = 2702
24721 CEFBS_None, // XVF16GER2PN = 2703
24722 CEFBS_None, // XVF16GER2PP = 2704
24723 CEFBS_None, // XVF16GER2W = 2705
24724 CEFBS_None, // XVF16GER2WNN = 2706
24725 CEFBS_None, // XVF16GER2WNP = 2707
24726 CEFBS_None, // XVF16GER2WPN = 2708
24727 CEFBS_None, // XVF16GER2WPP = 2709
24728 CEFBS_None, // XVF32GER = 2710
24729 CEFBS_None, // XVF32GERNN = 2711
24730 CEFBS_None, // XVF32GERNP = 2712
24731 CEFBS_None, // XVF32GERPN = 2713
24732 CEFBS_None, // XVF32GERPP = 2714
24733 CEFBS_None, // XVF32GERW = 2715
24734 CEFBS_None, // XVF32GERWNN = 2716
24735 CEFBS_None, // XVF32GERWNP = 2717
24736 CEFBS_None, // XVF32GERWPN = 2718
24737 CEFBS_None, // XVF32GERWPP = 2719
24738 CEFBS_None, // XVF64GER = 2720
24739 CEFBS_None, // XVF64GERNN = 2721
24740 CEFBS_None, // XVF64GERNP = 2722
24741 CEFBS_None, // XVF64GERPN = 2723
24742 CEFBS_None, // XVF64GERPP = 2724
24743 CEFBS_None, // XVF64GERW = 2725
24744 CEFBS_None, // XVF64GERWNN = 2726
24745 CEFBS_None, // XVF64GERWNP = 2727
24746 CEFBS_None, // XVF64GERWPN = 2728
24747 CEFBS_None, // XVF64GERWPP = 2729
24748 CEFBS_None, // XVI16GER2 = 2730
24749 CEFBS_None, // XVI16GER2PP = 2731
24750 CEFBS_None, // XVI16GER2S = 2732
24751 CEFBS_None, // XVI16GER2SPP = 2733
24752 CEFBS_None, // XVI16GER2SW = 2734
24753 CEFBS_None, // XVI16GER2SWPP = 2735
24754 CEFBS_None, // XVI16GER2W = 2736
24755 CEFBS_None, // XVI16GER2WPP = 2737
24756 CEFBS_None, // XVI4GER8 = 2738
24757 CEFBS_None, // XVI4GER8PP = 2739
24758 CEFBS_None, // XVI4GER8W = 2740
24759 CEFBS_None, // XVI4GER8WPP = 2741
24760 CEFBS_None, // XVI8GER4 = 2742
24761 CEFBS_None, // XVI8GER4PP = 2743
24762 CEFBS_None, // XVI8GER4SPP = 2744
24763 CEFBS_None, // XVI8GER4W = 2745
24764 CEFBS_None, // XVI8GER4WPP = 2746
24765 CEFBS_None, // XVI8GER4WSPP = 2747
24766 CEFBS_None, // XVIEXPDP = 2748
24767 CEFBS_None, // XVIEXPSP = 2749
24768 CEFBS_None, // XVMADDADP = 2750
24769 CEFBS_None, // XVMADDASP = 2751
24770 CEFBS_None, // XVMADDMDP = 2752
24771 CEFBS_None, // XVMADDMSP = 2753
24772 CEFBS_None, // XVMAXDP = 2754
24773 CEFBS_None, // XVMAXSP = 2755
24774 CEFBS_None, // XVMINDP = 2756
24775 CEFBS_None, // XVMINSP = 2757
24776 CEFBS_None, // XVMSUBADP = 2758
24777 CEFBS_None, // XVMSUBASP = 2759
24778 CEFBS_None, // XVMSUBMDP = 2760
24779 CEFBS_None, // XVMSUBMSP = 2761
24780 CEFBS_None, // XVMULDP = 2762
24781 CEFBS_None, // XVMULSP = 2763
24782 CEFBS_None, // XVNABSDP = 2764
24783 CEFBS_None, // XVNABSSP = 2765
24784 CEFBS_None, // XVNEGDP = 2766
24785 CEFBS_None, // XVNEGSP = 2767
24786 CEFBS_None, // XVNMADDADP = 2768
24787 CEFBS_None, // XVNMADDASP = 2769
24788 CEFBS_None, // XVNMADDMDP = 2770
24789 CEFBS_None, // XVNMADDMSP = 2771
24790 CEFBS_None, // XVNMSUBADP = 2772
24791 CEFBS_None, // XVNMSUBASP = 2773
24792 CEFBS_None, // XVNMSUBMDP = 2774
24793 CEFBS_None, // XVNMSUBMSP = 2775
24794 CEFBS_None, // XVRDPI = 2776
24795 CEFBS_None, // XVRDPIC = 2777
24796 CEFBS_None, // XVRDPIM = 2778
24797 CEFBS_None, // XVRDPIP = 2779
24798 CEFBS_None, // XVRDPIZ = 2780
24799 CEFBS_None, // XVREDP = 2781
24800 CEFBS_None, // XVRESP = 2782
24801 CEFBS_None, // XVRSPI = 2783
24802 CEFBS_None, // XVRSPIC = 2784
24803 CEFBS_None, // XVRSPIM = 2785
24804 CEFBS_None, // XVRSPIP = 2786
24805 CEFBS_None, // XVRSPIZ = 2787
24806 CEFBS_None, // XVRSQRTEDP = 2788
24807 CEFBS_None, // XVRSQRTESP = 2789
24808 CEFBS_None, // XVSQRTDP = 2790
24809 CEFBS_None, // XVSQRTSP = 2791
24810 CEFBS_None, // XVSUBDP = 2792
24811 CEFBS_None, // XVSUBSP = 2793
24812 CEFBS_None, // XVTDIVDP = 2794
24813 CEFBS_None, // XVTDIVSP = 2795
24814 CEFBS_None, // XVTLSBB = 2796
24815 CEFBS_None, // XVTSQRTDP = 2797
24816 CEFBS_None, // XVTSQRTSP = 2798
24817 CEFBS_None, // XVTSTDCDP = 2799
24818 CEFBS_None, // XVTSTDCSP = 2800
24819 CEFBS_None, // XVXEXPDP = 2801
24820 CEFBS_None, // XVXEXPSP = 2802
24821 CEFBS_None, // XVXSIGDP = 2803
24822 CEFBS_None, // XVXSIGSP = 2804
24823 CEFBS_None, // XXBLENDVB = 2805
24824 CEFBS_None, // XXBLENDVD = 2806
24825 CEFBS_None, // XXBLENDVH = 2807
24826 CEFBS_None, // XXBLENDVW = 2808
24827 CEFBS_None, // XXBRD = 2809
24828 CEFBS_None, // XXBRH = 2810
24829 CEFBS_None, // XXBRQ = 2811
24830 CEFBS_None, // XXBRW = 2812
24831 CEFBS_None, // XXEVAL = 2813
24832 CEFBS_None, // XXEXTRACTUW = 2814
24833 CEFBS_None, // XXGENPCVBM = 2815
24834 CEFBS_None, // XXGENPCVDM = 2816
24835 CEFBS_None, // XXGENPCVHM = 2817
24836 CEFBS_None, // XXGENPCVWM = 2818
24837 CEFBS_None, // XXINSERTW = 2819
24838 CEFBS_None, // XXLAND = 2820
24839 CEFBS_None, // XXLANDC = 2821
24840 CEFBS_None, // XXLEQV = 2822
24841 CEFBS_None, // XXLEQVOnes = 2823
24842 CEFBS_None, // XXLNAND = 2824
24843 CEFBS_None, // XXLNOR = 2825
24844 CEFBS_None, // XXLOR = 2826
24845 CEFBS_None, // XXLORC = 2827
24846 CEFBS_None, // XXLORf = 2828
24847 CEFBS_None, // XXLXOR = 2829
24848 CEFBS_None, // XXLXORdpz = 2830
24849 CEFBS_None, // XXLXORspz = 2831
24850 CEFBS_None, // XXLXORz = 2832
24851 CEFBS_None, // XXMFACC = 2833
24852 CEFBS_None, // XXMFACCW = 2834
24853 CEFBS_None, // XXMRGHW = 2835
24854 CEFBS_None, // XXMRGLW = 2836
24855 CEFBS_None, // XXMTACC = 2837
24856 CEFBS_None, // XXMTACCW = 2838
24857 CEFBS_None, // XXPERM = 2839
24858 CEFBS_None, // XXPERMDI = 2840
24859 CEFBS_None, // XXPERMDIs = 2841
24860 CEFBS_None, // XXPERMR = 2842
24861 CEFBS_None, // XXPERMX = 2843
24862 CEFBS_None, // XXSEL = 2844
24863 CEFBS_None, // XXSETACCZ = 2845
24864 CEFBS_None, // XXSETACCZW = 2846
24865 CEFBS_None, // XXSLDWI = 2847
24866 CEFBS_None, // XXSLDWIs = 2848
24867 CEFBS_None, // XXSPLTI32DX = 2849
24868 CEFBS_None, // XXSPLTIB = 2850
24869 CEFBS_None, // XXSPLTIDP = 2851
24870 CEFBS_None, // XXSPLTIW = 2852
24871 CEFBS_None, // XXSPLTW = 2853
24872 CEFBS_None, // XXSPLTWs = 2854
24873 CEFBS_None, // gBC = 2855
24874 CEFBS_None, // gBCA = 2856
24875 CEFBS_None, // gBCAat = 2857
24876 CEFBS_None, // gBCCTR = 2858
24877 CEFBS_None, // gBCCTRL = 2859
24878 CEFBS_None, // gBCL = 2860
24879 CEFBS_None, // gBCLA = 2861
24880 CEFBS_None, // gBCLAat = 2862
24881 CEFBS_None, // gBCLR = 2863
24882 CEFBS_None, // gBCLRL = 2864
24883 CEFBS_None, // gBCLat = 2865
24884 CEFBS_None, // gBCat = 2866
24885 };
24886
24887 assert(Opcode < 2867);
24888 return FeatureBitsets[RequiredFeaturesRefs[Opcode]];
24889}
24890
24891} // end namespace PPC_MC
24892} // end namespace llvm
24893#endif // GET_COMPUTE_FEATURES
24894
24895#ifdef GET_AVAILABLE_OPCODE_CHECKER
24896#undef GET_AVAILABLE_OPCODE_CHECKER
24897namespace llvm {
24898namespace PPC_MC {
24899bool isOpcodeAvailable(unsigned Opcode, const FeatureBitset &Features) {
24900 FeatureBitset AvailableFeatures = computeAvailableFeatures(Features);
24901 FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode);
24902 FeatureBitset MissingFeatures =
24903 (AvailableFeatures & RequiredFeatures) ^
24904 RequiredFeatures;
24905 return !MissingFeatures.any();
24906}
24907} // end namespace PPC_MC
24908} // end namespace llvm
24909#endif // GET_AVAILABLE_OPCODE_CHECKER
24910
24911#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
24912#undef ENABLE_INSTR_PREDICATE_VERIFIER
24913#include <sstream>
24914
24915namespace llvm {
24916namespace PPC_MC {
24917
24918#ifndef NDEBUG
24919static const char *SubtargetFeatureNames[] = {
24920 "Feature_ModernAs",
24921 nullptr
24922};
24923
24924#endif // NDEBUG
24925
24926void verifyInstructionPredicates(
24927 unsigned Opcode, const FeatureBitset &Features) {
24928#ifndef NDEBUG
24929 FeatureBitset AvailableFeatures = computeAvailableFeatures(Features);
24930 FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode);
24931 FeatureBitset MissingFeatures =
24932 (AvailableFeatures & RequiredFeatures) ^
24933 RequiredFeatures;
24934 if (MissingFeatures.any()) {
24935 std::ostringstream Msg;
24936 Msg << "Attempting to emit " << &PPCInstrNameData[PPCInstrNameIndices[Opcode]]
24937 << " instruction but the ";
24938 for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i)
24939 if (MissingFeatures.test(i))
24940 Msg << SubtargetFeatureNames[i] << " ";
24941 Msg << "predicate(s) are not met";
24942 report_fatal_error(Msg.str().c_str());
24943 }
24944#endif // NDEBUG
24945}
24946} // end namespace PPC_MC
24947} // end namespace llvm
24948#endif // ENABLE_INSTR_PREDICATE_VERIFIER
24949
24950#ifdef GET_INSTRMAP_INFO
24951#undef GET_INSTRMAP_INFO
24952namespace llvm {
24953
24954namespace PPC {
24955
24956enum IsVSXFMAAlt {
24957 IsVSXFMAAlt_1
24958};
24959
24960enum RC {
24961 RC_0,
24962 RC_1
24963};
24964
24965// getAltVSXFMAOpcode
24966LLVM_READONLY
24967int getAltVSXFMAOpcode(uint16_t Opcode) {
24968static const uint16_t getAltVSXFMAOpcodeTable[][2] = {
24969 { PPC::XSMADDADP, PPC::XSMADDMDP },
24970 { PPC::XSMADDASP, PPC::XSMADDMSP },
24971 { PPC::XSMSUBADP, PPC::XSMSUBMDP },
24972 { PPC::XSMSUBASP, PPC::XSMSUBMSP },
24973 { PPC::XSNMADDADP, PPC::XSNMADDMDP },
24974 { PPC::XSNMADDASP, PPC::XSNMADDMSP },
24975 { PPC::XSNMSUBADP, PPC::XSNMSUBMDP },
24976 { PPC::XSNMSUBASP, PPC::XSNMSUBMSP },
24977 { PPC::XVMADDADP, PPC::XVMADDMDP },
24978 { PPC::XVMADDASP, PPC::XVMADDMSP },
24979 { PPC::XVMSUBADP, PPC::XVMSUBMDP },
24980 { PPC::XVMSUBASP, PPC::XVMSUBMSP },
24981 { PPC::XVNMADDADP, PPC::XVNMADDMDP },
24982 { PPC::XVNMADDASP, PPC::XVNMADDMSP },
24983 { PPC::XVNMSUBADP, PPC::XVNMSUBMDP },
24984 { PPC::XVNMSUBASP, PPC::XVNMSUBMSP },
24985}; // End of getAltVSXFMAOpcodeTable
24986
24987 unsigned mid;
24988 unsigned start = 0;
24989 unsigned end = 16;
24990 while (start < end) {
24991 mid = start + (end - start) / 2;
24992 if (Opcode == getAltVSXFMAOpcodeTable[mid][0]) {
24993 break;
24994 }
24995 if (Opcode < getAltVSXFMAOpcodeTable[mid][0])
24996 end = mid;
24997 else
24998 start = mid + 1;
24999 }
25000 if (start == end)
25001 return -1; // Instruction doesn't exist in this table.
25002
25003 return getAltVSXFMAOpcodeTable[mid][1];
25004}
25005
25006// getNonRecordFormOpcode
25007LLVM_READONLY
25008int getNonRecordFormOpcode(uint16_t Opcode) {
25009static const uint16_t getNonRecordFormOpcodeTable[][2] = {
25010 { PPC::ADD4O_rec, PPC::ADD4O },
25011 { PPC::ADD4_rec, PPC::ADD4 },
25012 { PPC::ADD8O_rec, PPC::ADD8O },
25013 { PPC::ADD8_rec, PPC::ADD8 },
25014 { PPC::ADDC8O_rec, PPC::ADDC8O },
25015 { PPC::ADDC8_rec, PPC::ADDC8 },
25016 { PPC::ADDCO_rec, PPC::ADDCO },
25017 { PPC::ADDC_rec, PPC::ADDC },
25018 { PPC::ADDE8O_rec, PPC::ADDE8O },
25019 { PPC::ADDE8_rec, PPC::ADDE8 },
25020 { PPC::ADDEO_rec, PPC::ADDEO },
25021 { PPC::ADDE_rec, PPC::ADDE },
25022 { PPC::ADDIC_rec, PPC::ADDIC },
25023 { PPC::ADDME8O_rec, PPC::ADDME8O },
25024 { PPC::ADDME8_rec, PPC::ADDME8 },
25025 { PPC::ADDMEO_rec, PPC::ADDMEO },
25026 { PPC::ADDME_rec, PPC::ADDME },
25027 { PPC::ADDZE8O_rec, PPC::ADDZE8O },
25028 { PPC::ADDZE8_rec, PPC::ADDZE8 },
25029 { PPC::ADDZEO_rec, PPC::ADDZEO },
25030 { PPC::ADDZE_rec, PPC::ADDZE },
25031 { PPC::AND8_rec, PPC::AND8 },
25032 { PPC::ANDC8_rec, PPC::ANDC8 },
25033 { PPC::ANDC_rec, PPC::ANDC },
25034 { PPC::AND_rec, PPC::AND },
25035 { PPC::CNTLZD_rec, PPC::CNTLZD },
25036 { PPC::CNTLZW8_rec, PPC::CNTLZW8 },
25037 { PPC::CNTLZW_rec, PPC::CNTLZW },
25038 { PPC::CNTTZD_rec, PPC::CNTTZD },
25039 { PPC::CNTTZW8_rec, PPC::CNTTZW8 },
25040 { PPC::CNTTZW_rec, PPC::CNTTZW },
25041 { PPC::DADDQ_rec, PPC::DADDQ },
25042 { PPC::DADD_rec, PPC::DADD },
25043 { PPC::DCFFIXQ_rec, PPC::DCFFIXQ },
25044 { PPC::DCFFIX_rec, PPC::DCFFIX },
25045 { PPC::DCTDP_rec, PPC::DCTDP },
25046 { PPC::DCTFIXQ_rec, PPC::DCTFIXQ },
25047 { PPC::DCTFIX_rec, PPC::DCTFIX },
25048 { PPC::DCTQPQ_rec, PPC::DCTQPQ },
25049 { PPC::DDEDPDQ_rec, PPC::DDEDPDQ },
25050 { PPC::DDEDPD_rec, PPC::DDEDPD },
25051 { PPC::DDIVQ_rec, PPC::DDIVQ },
25052 { PPC::DDIV_rec, PPC::DDIV },
25053 { PPC::DENBCDQ_rec, PPC::DENBCDQ },
25054 { PPC::DENBCD_rec, PPC::DENBCD },
25055 { PPC::DIEXQ_rec, PPC::DIEXQ },
25056 { PPC::DIEX_rec, PPC::DIEX },
25057 { PPC::DIVDEO_rec, PPC::DIVDEO },
25058 { PPC::DIVDEUO_rec, PPC::DIVDEUO },
25059 { PPC::DIVDEU_rec, PPC::DIVDEU },
25060 { PPC::DIVDE_rec, PPC::DIVDE },
25061 { PPC::DIVDO_rec, PPC::DIVDO },
25062 { PPC::DIVDUO_rec, PPC::DIVDUO },
25063 { PPC::DIVDU_rec, PPC::DIVDU },
25064 { PPC::DIVD_rec, PPC::DIVD },
25065 { PPC::DIVWEO_rec, PPC::DIVWEO },
25066 { PPC::DIVWEUO_rec, PPC::DIVWEUO },
25067 { PPC::DIVWEU_rec, PPC::DIVWEU },
25068 { PPC::DIVWE_rec, PPC::DIVWE },
25069 { PPC::DIVWO_rec, PPC::DIVWO },
25070 { PPC::DIVWUO_rec, PPC::DIVWUO },
25071 { PPC::DIVWU_rec, PPC::DIVWU },
25072 { PPC::DIVW_rec, PPC::DIVW },
25073 { PPC::DMULQ_rec, PPC::DMULQ },
25074 { PPC::DMUL_rec, PPC::DMUL },
25075 { PPC::DQUAIQ_rec, PPC::DQUAIQ },
25076 { PPC::DQUAI_rec, PPC::DQUAI },
25077 { PPC::DQUAQ_rec, PPC::DQUAQ },
25078 { PPC::DQUA_rec, PPC::DQUA },
25079 { PPC::DRDPQ_rec, PPC::DRDPQ },
25080 { PPC::DRINTNQ_rec, PPC::DRINTNQ },
25081 { PPC::DRINTN_rec, PPC::DRINTN },
25082 { PPC::DRINTXQ_rec, PPC::DRINTXQ },
25083 { PPC::DRINTX_rec, PPC::DRINTX },
25084 { PPC::DRRNDQ_rec, PPC::DRRNDQ },
25085 { PPC::DRRND_rec, PPC::DRRND },
25086 { PPC::DRSP_rec, PPC::DRSP },
25087 { PPC::DSCLIQ_rec, PPC::DSCLIQ },
25088 { PPC::DSCLI_rec, PPC::DSCLI },
25089 { PPC::DSCRIQ_rec, PPC::DSCRIQ },
25090 { PPC::DSCRI_rec, PPC::DSCRI },
25091 { PPC::DSUBQ_rec, PPC::DSUBQ },
25092 { PPC::DSUB_rec, PPC::DSUB },
25093 { PPC::DXEXQ_rec, PPC::DXEXQ },
25094 { PPC::DXEX_rec, PPC::DXEX },
25095 { PPC::EQV8_rec, PPC::EQV8 },
25096 { PPC::EQV_rec, PPC::EQV },
25097 { PPC::EXTSB8_rec, PPC::EXTSB8 },
25098 { PPC::EXTSB_rec, PPC::EXTSB },
25099 { PPC::EXTSH8_rec, PPC::EXTSH8 },
25100 { PPC::EXTSH_rec, PPC::EXTSH },
25101 { PPC::EXTSWSLI_32_64_rec, PPC::EXTSWSLI_32_64 },
25102 { PPC::EXTSWSLI_rec, PPC::EXTSWSLI },
25103 { PPC::EXTSW_32_64_rec, PPC::EXTSW_32_64 },
25104 { PPC::EXTSW_rec, PPC::EXTSW },
25105 { PPC::FABSD_rec, PPC::FABSD },
25106 { PPC::FABSS_rec, PPC::FABSS },
25107 { PPC::FADDS_rec, PPC::FADDS },
25108 { PPC::FADD_rec, PPC::FADD },
25109 { PPC::FCFIDS_rec, PPC::FCFIDS },
25110 { PPC::FCFIDUS_rec, PPC::FCFIDUS },
25111 { PPC::FCFIDU_rec, PPC::FCFIDU },
25112 { PPC::FCFID_rec, PPC::FCFID },
25113 { PPC::FCPSGND_rec, PPC::FCPSGND },
25114 { PPC::FCPSGNS_rec, PPC::FCPSGNS },
25115 { PPC::FCTIDUZ_rec, PPC::FCTIDUZ },
25116 { PPC::FCTIDU_rec, PPC::FCTIDU },
25117 { PPC::FCTIDZ_rec, PPC::FCTIDZ },
25118 { PPC::FCTID_rec, PPC::FCTID },
25119 { PPC::FCTIWUZ_rec, PPC::FCTIWUZ },
25120 { PPC::FCTIWU_rec, PPC::FCTIWU },
25121 { PPC::FCTIWZ_rec, PPC::FCTIWZ },
25122 { PPC::FCTIW_rec, PPC::FCTIW },
25123 { PPC::FDIVS_rec, PPC::FDIVS },
25124 { PPC::FDIV_rec, PPC::FDIV },
25125 { PPC::FMADDS_rec, PPC::FMADDS },
25126 { PPC::FMADD_rec, PPC::FMADD },
25127 { PPC::FMR_rec, PPC::FMR },
25128 { PPC::FMSUBS_rec, PPC::FMSUBS },
25129 { PPC::FMSUB_rec, PPC::FMSUB },
25130 { PPC::FMULS_rec, PPC::FMULS },
25131 { PPC::FMUL_rec, PPC::FMUL },
25132 { PPC::FNABSD_rec, PPC::FNABSD },
25133 { PPC::FNABSS_rec, PPC::FNABSS },
25134 { PPC::FNEGD_rec, PPC::FNEGD },
25135 { PPC::FNEGS_rec, PPC::FNEGS },
25136 { PPC::FNMADDS_rec, PPC::FNMADDS },
25137 { PPC::FNMADD_rec, PPC::FNMADD },
25138 { PPC::FNMSUBS_rec, PPC::FNMSUBS },
25139 { PPC::FNMSUB_rec, PPC::FNMSUB },
25140 { PPC::FRES_rec, PPC::FRES },
25141 { PPC::FRE_rec, PPC::FRE },
25142 { PPC::FRIMD_rec, PPC::FRIMD },
25143 { PPC::FRIMS_rec, PPC::FRIMS },
25144 { PPC::FRIND_rec, PPC::FRIND },
25145 { PPC::FRINS_rec, PPC::FRINS },
25146 { PPC::FRIPD_rec, PPC::FRIPD },
25147 { PPC::FRIPS_rec, PPC::FRIPS },
25148 { PPC::FRIZD_rec, PPC::FRIZD },
25149 { PPC::FRIZS_rec, PPC::FRIZS },
25150 { PPC::FRSP_rec, PPC::FRSP },
25151 { PPC::FRSQRTES_rec, PPC::FRSQRTES },
25152 { PPC::FRSQRTE_rec, PPC::FRSQRTE },
25153 { PPC::FSELD_rec, PPC::FSELD },
25154 { PPC::FSELS_rec, PPC::FSELS },
25155 { PPC::FSQRTS_rec, PPC::FSQRTS },
25156 { PPC::FSQRT_rec, PPC::FSQRT },
25157 { PPC::FSUBS_rec, PPC::FSUBS },
25158 { PPC::FSUB_rec, PPC::FSUB },
25159 { PPC::MULHDU_rec, PPC::MULHDU },
25160 { PPC::MULHD_rec, PPC::MULHD },
25161 { PPC::MULHWU_rec, PPC::MULHWU },
25162 { PPC::MULHW_rec, PPC::MULHW },
25163 { PPC::MULLDO_rec, PPC::MULLDO },
25164 { PPC::MULLD_rec, PPC::MULLD },
25165 { PPC::MULLWO_rec, PPC::MULLWO },
25166 { PPC::MULLW_rec, PPC::MULLW },
25167 { PPC::NAND8_rec, PPC::NAND8 },
25168 { PPC::NAND_rec, PPC::NAND },
25169 { PPC::NEG8O_rec, PPC::NEG8O },
25170 { PPC::NEG8_rec, PPC::NEG8 },
25171 { PPC::NEGO_rec, PPC::NEGO },
25172 { PPC::NEG_rec, PPC::NEG },
25173 { PPC::NOR8_rec, PPC::NOR8 },
25174 { PPC::NOR_rec, PPC::NOR },
25175 { PPC::OR8_rec, PPC::OR8 },
25176 { PPC::ORC8_rec, PPC::ORC8 },
25177 { PPC::ORC_rec, PPC::ORC },
25178 { PPC::OR_rec, PPC::OR },
25179 { PPC::RLDCL_rec, PPC::RLDCL },
25180 { PPC::RLDCR_rec, PPC::RLDCR },
25181 { PPC::RLDICL_32_rec, PPC::RLDICL_32 },
25182 { PPC::RLDICL_rec, PPC::RLDICL },
25183 { PPC::RLDICR_rec, PPC::RLDICR },
25184 { PPC::RLDIC_rec, PPC::RLDIC },
25185 { PPC::RLDIMI_rec, PPC::RLDIMI },
25186 { PPC::RLWIMI8_rec, PPC::RLWIMI8 },
25187 { PPC::RLWIMI_rec, PPC::RLWIMI },
25188 { PPC::RLWINM8_rec, PPC::RLWINM8 },
25189 { PPC::RLWINM_rec, PPC::RLWINM },
25190 { PPC::RLWNM8_rec, PPC::RLWNM8 },
25191 { PPC::RLWNM_rec, PPC::RLWNM },
25192 { PPC::SLD_rec, PPC::SLD },
25193 { PPC::SLW8_rec, PPC::SLW8 },
25194 { PPC::SLW_rec, PPC::SLW },
25195 { PPC::SRADI_rec, PPC::SRADI },
25196 { PPC::SRAD_rec, PPC::SRAD },
25197 { PPC::SRAWI_rec, PPC::SRAWI },
25198 { PPC::SRAW_rec, PPC::SRAW },
25199 { PPC::SRD_rec, PPC::SRD },
25200 { PPC::SRW8_rec, PPC::SRW8 },
25201 { PPC::SRW_rec, PPC::SRW },
25202 { PPC::SUBF8O_rec, PPC::SUBF8O },
25203 { PPC::SUBF8_rec, PPC::SUBF8 },
25204 { PPC::SUBFC8O_rec, PPC::SUBFC8O },
25205 { PPC::SUBFC8_rec, PPC::SUBFC8 },
25206 { PPC::SUBFCO_rec, PPC::SUBFCO },
25207 { PPC::SUBFC_rec, PPC::SUBFC },
25208 { PPC::SUBFE8O_rec, PPC::SUBFE8O },
25209 { PPC::SUBFE8_rec, PPC::SUBFE8 },
25210 { PPC::SUBFEO_rec, PPC::SUBFEO },
25211 { PPC::SUBFE_rec, PPC::SUBFE },
25212 { PPC::SUBFME8O_rec, PPC::SUBFME8O },
25213 { PPC::SUBFME8_rec, PPC::SUBFME8 },
25214 { PPC::SUBFMEO_rec, PPC::SUBFMEO },
25215 { PPC::SUBFME_rec, PPC::SUBFME },
25216 { PPC::SUBFO_rec, PPC::SUBFO },
25217 { PPC::SUBFUS_rec, PPC::SUBFUS },
25218 { PPC::SUBFZE8O_rec, PPC::SUBFZE8O },
25219 { PPC::SUBFZE8_rec, PPC::SUBFZE8 },
25220 { PPC::SUBFZEO_rec, PPC::SUBFZEO },
25221 { PPC::SUBFZE_rec, PPC::SUBFZE },
25222 { PPC::SUBF_rec, PPC::SUBF },
25223 { PPC::VSTRIBL_rec, PPC::VSTRIBL },
25224 { PPC::VSTRIBR_rec, PPC::VSTRIBR },
25225 { PPC::VSTRIHL_rec, PPC::VSTRIHL },
25226 { PPC::VSTRIHR_rec, PPC::VSTRIHR },
25227 { PPC::XOR8_rec, PPC::XOR8 },
25228 { PPC::XOR_rec, PPC::XOR },
25229}; // End of getNonRecordFormOpcodeTable
25230
25231 unsigned mid;
25232 unsigned start = 0;
25233 unsigned end = 219;
25234 while (start < end) {
25235 mid = start + (end - start) / 2;
25236 if (Opcode == getNonRecordFormOpcodeTable[mid][0]) {
25237 break;
25238 }
25239 if (Opcode < getNonRecordFormOpcodeTable[mid][0])
25240 end = mid;
25241 else
25242 start = mid + 1;
25243 }
25244 if (start == end)
25245 return -1; // Instruction doesn't exist in this table.
25246
25247 return getNonRecordFormOpcodeTable[mid][1];
25248}
25249
25250// getRecordFormOpcode
25251LLVM_READONLY
25252int getRecordFormOpcode(uint16_t Opcode) {
25253static const uint16_t getRecordFormOpcodeTable[][2] = {
25254 { PPC::ADD4, PPC::ADD4_rec },
25255 { PPC::ADD4O, PPC::ADD4O_rec },
25256 { PPC::ADD8, PPC::ADD8_rec },
25257 { PPC::ADD8O, PPC::ADD8O_rec },
25258 { PPC::ADDC, PPC::ADDC_rec },
25259 { PPC::ADDC8, PPC::ADDC8_rec },
25260 { PPC::ADDC8O, PPC::ADDC8O_rec },
25261 { PPC::ADDCO, PPC::ADDCO_rec },
25262 { PPC::ADDE, PPC::ADDE_rec },
25263 { PPC::ADDE8, PPC::ADDE8_rec },
25264 { PPC::ADDE8O, PPC::ADDE8O_rec },
25265 { PPC::ADDEO, PPC::ADDEO_rec },
25266 { PPC::ADDIC, PPC::ADDIC_rec },
25267 { PPC::ADDME, PPC::ADDME_rec },
25268 { PPC::ADDME8, PPC::ADDME8_rec },
25269 { PPC::ADDME8O, PPC::ADDME8O_rec },
25270 { PPC::ADDMEO, PPC::ADDMEO_rec },
25271 { PPC::ADDZE, PPC::ADDZE_rec },
25272 { PPC::ADDZE8, PPC::ADDZE8_rec },
25273 { PPC::ADDZE8O, PPC::ADDZE8O_rec },
25274 { PPC::ADDZEO, PPC::ADDZEO_rec },
25275 { PPC::AND, PPC::AND_rec },
25276 { PPC::AND8, PPC::AND8_rec },
25277 { PPC::ANDC, PPC::ANDC_rec },
25278 { PPC::ANDC8, PPC::ANDC8_rec },
25279 { PPC::CNTLZD, PPC::CNTLZD_rec },
25280 { PPC::CNTLZW, PPC::CNTLZW_rec },
25281 { PPC::CNTLZW8, PPC::CNTLZW8_rec },
25282 { PPC::CNTTZD, PPC::CNTTZD_rec },
25283 { PPC::CNTTZW, PPC::CNTTZW_rec },
25284 { PPC::CNTTZW8, PPC::CNTTZW8_rec },
25285 { PPC::DADD, PPC::DADD_rec },
25286 { PPC::DADDQ, PPC::DADDQ_rec },
25287 { PPC::DCFFIX, PPC::DCFFIX_rec },
25288 { PPC::DCFFIXQ, PPC::DCFFIXQ_rec },
25289 { PPC::DCTDP, PPC::DCTDP_rec },
25290 { PPC::DCTFIX, PPC::DCTFIX_rec },
25291 { PPC::DCTFIXQ, PPC::DCTFIXQ_rec },
25292 { PPC::DCTQPQ, PPC::DCTQPQ_rec },
25293 { PPC::DDEDPD, PPC::DDEDPD_rec },
25294 { PPC::DDEDPDQ, PPC::DDEDPDQ_rec },
25295 { PPC::DDIV, PPC::DDIV_rec },
25296 { PPC::DDIVQ, PPC::DDIVQ_rec },
25297 { PPC::DENBCD, PPC::DENBCD_rec },
25298 { PPC::DENBCDQ, PPC::DENBCDQ_rec },
25299 { PPC::DIEX, PPC::DIEX_rec },
25300 { PPC::DIEXQ, PPC::DIEXQ_rec },
25301 { PPC::DIVD, PPC::DIVD_rec },
25302 { PPC::DIVDE, PPC::DIVDE_rec },
25303 { PPC::DIVDEO, PPC::DIVDEO_rec },
25304 { PPC::DIVDEU, PPC::DIVDEU_rec },
25305 { PPC::DIVDEUO, PPC::DIVDEUO_rec },
25306 { PPC::DIVDO, PPC::DIVDO_rec },
25307 { PPC::DIVDU, PPC::DIVDU_rec },
25308 { PPC::DIVDUO, PPC::DIVDUO_rec },
25309 { PPC::DIVW, PPC::DIVW_rec },
25310 { PPC::DIVWE, PPC::DIVWE_rec },
25311 { PPC::DIVWEO, PPC::DIVWEO_rec },
25312 { PPC::DIVWEU, PPC::DIVWEU_rec },
25313 { PPC::DIVWEUO, PPC::DIVWEUO_rec },
25314 { PPC::DIVWO, PPC::DIVWO_rec },
25315 { PPC::DIVWU, PPC::DIVWU_rec },
25316 { PPC::DIVWUO, PPC::DIVWUO_rec },
25317 { PPC::DMUL, PPC::DMUL_rec },
25318 { PPC::DMULQ, PPC::DMULQ_rec },
25319 { PPC::DQUA, PPC::DQUA_rec },
25320 { PPC::DQUAI, PPC::DQUAI_rec },
25321 { PPC::DQUAIQ, PPC::DQUAIQ_rec },
25322 { PPC::DQUAQ, PPC::DQUAQ_rec },
25323 { PPC::DRDPQ, PPC::DRDPQ_rec },
25324 { PPC::DRINTN, PPC::DRINTN_rec },
25325 { PPC::DRINTNQ, PPC::DRINTNQ_rec },
25326 { PPC::DRINTX, PPC::DRINTX_rec },
25327 { PPC::DRINTXQ, PPC::DRINTXQ_rec },
25328 { PPC::DRRND, PPC::DRRND_rec },
25329 { PPC::DRRNDQ, PPC::DRRNDQ_rec },
25330 { PPC::DRSP, PPC::DRSP_rec },
25331 { PPC::DSCLI, PPC::DSCLI_rec },
25332 { PPC::DSCLIQ, PPC::DSCLIQ_rec },
25333 { PPC::DSCRI, PPC::DSCRI_rec },
25334 { PPC::DSCRIQ, PPC::DSCRIQ_rec },
25335 { PPC::DSUB, PPC::DSUB_rec },
25336 { PPC::DSUBQ, PPC::DSUBQ_rec },
25337 { PPC::DXEX, PPC::DXEX_rec },
25338 { PPC::DXEXQ, PPC::DXEXQ_rec },
25339 { PPC::EQV, PPC::EQV_rec },
25340 { PPC::EQV8, PPC::EQV8_rec },
25341 { PPC::EXTSB, PPC::EXTSB_rec },
25342 { PPC::EXTSB8, PPC::EXTSB8_rec },
25343 { PPC::EXTSH, PPC::EXTSH_rec },
25344 { PPC::EXTSH8, PPC::EXTSH8_rec },
25345 { PPC::EXTSW, PPC::EXTSW_rec },
25346 { PPC::EXTSWSLI, PPC::EXTSWSLI_rec },
25347 { PPC::EXTSWSLI_32_64, PPC::EXTSWSLI_32_64_rec },
25348 { PPC::EXTSW_32_64, PPC::EXTSW_32_64_rec },
25349 { PPC::FABSD, PPC::FABSD_rec },
25350 { PPC::FABSS, PPC::FABSS_rec },
25351 { PPC::FADD, PPC::FADD_rec },
25352 { PPC::FADDS, PPC::FADDS_rec },
25353 { PPC::FCFID, PPC::FCFID_rec },
25354 { PPC::FCFIDS, PPC::FCFIDS_rec },
25355 { PPC::FCFIDU, PPC::FCFIDU_rec },
25356 { PPC::FCFIDUS, PPC::FCFIDUS_rec },
25357 { PPC::FCPSGND, PPC::FCPSGND_rec },
25358 { PPC::FCPSGNS, PPC::FCPSGNS_rec },
25359 { PPC::FCTID, PPC::FCTID_rec },
25360 { PPC::FCTIDU, PPC::FCTIDU_rec },
25361 { PPC::FCTIDUZ, PPC::FCTIDUZ_rec },
25362 { PPC::FCTIDZ, PPC::FCTIDZ_rec },
25363 { PPC::FCTIW, PPC::FCTIW_rec },
25364 { PPC::FCTIWU, PPC::FCTIWU_rec },
25365 { PPC::FCTIWUZ, PPC::FCTIWUZ_rec },
25366 { PPC::FCTIWZ, PPC::FCTIWZ_rec },
25367 { PPC::FDIV, PPC::FDIV_rec },
25368 { PPC::FDIVS, PPC::FDIVS_rec },
25369 { PPC::FMADD, PPC::FMADD_rec },
25370 { PPC::FMADDS, PPC::FMADDS_rec },
25371 { PPC::FMR, PPC::FMR_rec },
25372 { PPC::FMSUB, PPC::FMSUB_rec },
25373 { PPC::FMSUBS, PPC::FMSUBS_rec },
25374 { PPC::FMUL, PPC::FMUL_rec },
25375 { PPC::FMULS, PPC::FMULS_rec },
25376 { PPC::FNABSD, PPC::FNABSD_rec },
25377 { PPC::FNABSS, PPC::FNABSS_rec },
25378 { PPC::FNEGD, PPC::FNEGD_rec },
25379 { PPC::FNEGS, PPC::FNEGS_rec },
25380 { PPC::FNMADD, PPC::FNMADD_rec },
25381 { PPC::FNMADDS, PPC::FNMADDS_rec },
25382 { PPC::FNMSUB, PPC::FNMSUB_rec },
25383 { PPC::FNMSUBS, PPC::FNMSUBS_rec },
25384 { PPC::FRE, PPC::FRE_rec },
25385 { PPC::FRES, PPC::FRES_rec },
25386 { PPC::FRIMD, PPC::FRIMD_rec },
25387 { PPC::FRIMS, PPC::FRIMS_rec },
25388 { PPC::FRIND, PPC::FRIND_rec },
25389 { PPC::FRINS, PPC::FRINS_rec },
25390 { PPC::FRIPD, PPC::FRIPD_rec },
25391 { PPC::FRIPS, PPC::FRIPS_rec },
25392 { PPC::FRIZD, PPC::FRIZD_rec },
25393 { PPC::FRIZS, PPC::FRIZS_rec },
25394 { PPC::FRSP, PPC::FRSP_rec },
25395 { PPC::FRSQRTE, PPC::FRSQRTE_rec },
25396 { PPC::FRSQRTES, PPC::FRSQRTES_rec },
25397 { PPC::FSELD, PPC::FSELD_rec },
25398 { PPC::FSELS, PPC::FSELS_rec },
25399 { PPC::FSQRT, PPC::FSQRT_rec },
25400 { PPC::FSQRTS, PPC::FSQRTS_rec },
25401 { PPC::FSUB, PPC::FSUB_rec },
25402 { PPC::FSUBS, PPC::FSUBS_rec },
25403 { PPC::MULHD, PPC::MULHD_rec },
25404 { PPC::MULHDU, PPC::MULHDU_rec },
25405 { PPC::MULHW, PPC::MULHW_rec },
25406 { PPC::MULHWU, PPC::MULHWU_rec },
25407 { PPC::MULLD, PPC::MULLD_rec },
25408 { PPC::MULLDO, PPC::MULLDO_rec },
25409 { PPC::MULLW, PPC::MULLW_rec },
25410 { PPC::MULLWO, PPC::MULLWO_rec },
25411 { PPC::NAND, PPC::NAND_rec },
25412 { PPC::NAND8, PPC::NAND8_rec },
25413 { PPC::NEG, PPC::NEG_rec },
25414 { PPC::NEG8, PPC::NEG8_rec },
25415 { PPC::NEG8O, PPC::NEG8O_rec },
25416 { PPC::NEGO, PPC::NEGO_rec },
25417 { PPC::NOR, PPC::NOR_rec },
25418 { PPC::NOR8, PPC::NOR8_rec },
25419 { PPC::OR, PPC::OR_rec },
25420 { PPC::OR8, PPC::OR8_rec },
25421 { PPC::ORC, PPC::ORC_rec },
25422 { PPC::ORC8, PPC::ORC8_rec },
25423 { PPC::RLDCL, PPC::RLDCL_rec },
25424 { PPC::RLDCR, PPC::RLDCR_rec },
25425 { PPC::RLDIC, PPC::RLDIC_rec },
25426 { PPC::RLDICL, PPC::RLDICL_rec },
25427 { PPC::RLDICL_32, PPC::RLDICL_32_rec },
25428 { PPC::RLDICR, PPC::RLDICR_rec },
25429 { PPC::RLDIMI, PPC::RLDIMI_rec },
25430 { PPC::RLWIMI, PPC::RLWIMI_rec },
25431 { PPC::RLWIMI8, PPC::RLWIMI8_rec },
25432 { PPC::RLWINM, PPC::RLWINM_rec },
25433 { PPC::RLWINM8, PPC::RLWINM8_rec },
25434 { PPC::RLWNM, PPC::RLWNM_rec },
25435 { PPC::RLWNM8, PPC::RLWNM8_rec },
25436 { PPC::SLD, PPC::SLD_rec },
25437 { PPC::SLW, PPC::SLW_rec },
25438 { PPC::SLW8, PPC::SLW8_rec },
25439 { PPC::SRAD, PPC::SRAD_rec },
25440 { PPC::SRADI, PPC::SRADI_rec },
25441 { PPC::SRAW, PPC::SRAW_rec },
25442 { PPC::SRAWI, PPC::SRAWI_rec },
25443 { PPC::SRD, PPC::SRD_rec },
25444 { PPC::SRW, PPC::SRW_rec },
25445 { PPC::SRW8, PPC::SRW8_rec },
25446 { PPC::SUBF, PPC::SUBF_rec },
25447 { PPC::SUBF8, PPC::SUBF8_rec },
25448 { PPC::SUBF8O, PPC::SUBF8O_rec },
25449 { PPC::SUBFC, PPC::SUBFC_rec },
25450 { PPC::SUBFC8, PPC::SUBFC8_rec },
25451 { PPC::SUBFC8O, PPC::SUBFC8O_rec },
25452 { PPC::SUBFCO, PPC::SUBFCO_rec },
25453 { PPC::SUBFE, PPC::SUBFE_rec },
25454 { PPC::SUBFE8, PPC::SUBFE8_rec },
25455 { PPC::SUBFE8O, PPC::SUBFE8O_rec },
25456 { PPC::SUBFEO, PPC::SUBFEO_rec },
25457 { PPC::SUBFME, PPC::SUBFME_rec },
25458 { PPC::SUBFME8, PPC::SUBFME8_rec },
25459 { PPC::SUBFME8O, PPC::SUBFME8O_rec },
25460 { PPC::SUBFMEO, PPC::SUBFMEO_rec },
25461 { PPC::SUBFO, PPC::SUBFO_rec },
25462 { PPC::SUBFUS, PPC::SUBFUS_rec },
25463 { PPC::SUBFZE, PPC::SUBFZE_rec },
25464 { PPC::SUBFZE8, PPC::SUBFZE8_rec },
25465 { PPC::SUBFZE8O, PPC::SUBFZE8O_rec },
25466 { PPC::SUBFZEO, PPC::SUBFZEO_rec },
25467 { PPC::VSTRIBL, PPC::VSTRIBL_rec },
25468 { PPC::VSTRIBR, PPC::VSTRIBR_rec },
25469 { PPC::VSTRIHL, PPC::VSTRIHL_rec },
25470 { PPC::VSTRIHR, PPC::VSTRIHR_rec },
25471 { PPC::XOR, PPC::XOR_rec },
25472 { PPC::XOR8, PPC::XOR8_rec },
25473}; // End of getRecordFormOpcodeTable
25474
25475 unsigned mid;
25476 unsigned start = 0;
25477 unsigned end = 219;
25478 while (start < end) {
25479 mid = start + (end - start) / 2;
25480 if (Opcode == getRecordFormOpcodeTable[mid][0]) {
25481 break;
25482 }
25483 if (Opcode < getRecordFormOpcodeTable[mid][0])
25484 end = mid;
25485 else
25486 start = mid + 1;
25487 }
25488 if (start == end)
25489 return -1; // Instruction doesn't exist in this table.
25490
25491 return getRecordFormOpcodeTable[mid][1];
25492}
25493
25494} // end namespace PPC
25495} // end namespace llvm
25496#endif // GET_INSTRMAP_INFO
25497
25498