1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Calling Convention Implementation Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifndef GET_CC_REGISTER_LISTS
10
11static bool CC_SystemZ(unsigned ValNo, MVT ValVT,
12 MVT LocVT, CCValAssign::LocInfo LocInfo,
13 ISD::ArgFlagsTy ArgFlags, CCState &State);
14static bool CC_SystemZ_ELF(unsigned ValNo, MVT ValVT,
15 MVT LocVT, CCValAssign::LocInfo LocInfo,
16 ISD::ArgFlagsTy ArgFlags, CCState &State);
17static bool CC_SystemZ_GHC(unsigned ValNo, MVT ValVT,
18 MVT LocVT, CCValAssign::LocInfo LocInfo,
19 ISD::ArgFlagsTy ArgFlags, CCState &State);
20static bool CC_SystemZ_XPLINK64(unsigned ValNo, MVT ValVT,
21 MVT LocVT, CCValAssign::LocInfo LocInfo,
22 ISD::ArgFlagsTy ArgFlags, CCState &State);
23static bool RetCC_SystemZ(unsigned ValNo, MVT ValVT,
24 MVT LocVT, CCValAssign::LocInfo LocInfo,
25 ISD::ArgFlagsTy ArgFlags, CCState &State);
26static bool RetCC_SystemZ_ELF(unsigned ValNo, MVT ValVT,
27 MVT LocVT, CCValAssign::LocInfo LocInfo,
28 ISD::ArgFlagsTy ArgFlags, CCState &State);
29static bool RetCC_SystemZ_XPLINK64(unsigned ValNo, MVT ValVT,
30 MVT LocVT, CCValAssign::LocInfo LocInfo,
31 ISD::ArgFlagsTy ArgFlags, CCState &State);
32
33
34static bool CC_SystemZ(unsigned ValNo, MVT ValVT,
35 MVT LocVT, CCValAssign::LocInfo LocInfo,
36 ISD::ArgFlagsTy ArgFlags, CCState &State) {
37
38 if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).isTargetXPLINK64()) {
39 if (!CC_SystemZ_XPLINK64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
40 return false;
41 }
42
43 if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).isTargetELF()) {
44 if (!CC_SystemZ_ELF(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
45 return false;
46 }
47
48 return true; // CC didn't match.
49}
50
51
52static bool CC_SystemZ_ELF(unsigned ValNo, MVT ValVT,
53 MVT LocVT, CCValAssign::LocInfo LocInfo,
54 ISD::ArgFlagsTy ArgFlags, CCState &State) {
55
56 if (State.getCallingConv() == CallingConv::GHC) {
57 if (!CC_SystemZ_GHC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
58 return false;
59 }
60
61 if (LocVT == MVT::i32) {
62 if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
63 LocVT = MVT::i64;
64 if (ArgFlags.isSExt())
65 LocInfo = CCValAssign::SExt;
66 else if (ArgFlags.isZExt())
67 LocInfo = CCValAssign::ZExt;
68 else
69 LocInfo = CCValAssign::AExt;
70 }
71 }
72
73 if (ArgFlags.isSwiftSelf()) {
74 if (LocVT == MVT::i64) {
75 if (unsigned Reg = State.AllocateReg(Reg: SystemZ::R10D)) {
76 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
77 return false;
78 }
79 }
80 }
81
82 if (ArgFlags.isSwiftError()) {
83 if (LocVT == MVT::i64) {
84 if (unsigned Reg = State.AllocateReg(Reg: SystemZ::R9D)) {
85 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
86 return false;
87 }
88 }
89 }
90
91 if (LocVT == MVT::i128 ||
92 LocVT == MVT::f128) {
93 LocVT = MVT::i64;
94 LocInfo = CCValAssign::Indirect;
95 }
96
97 if (LocVT == MVT::i64) {
98 if (CC_SystemZ_I128Indirect(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
99 return false;
100 }
101
102 if (LocVT == MVT::i32) {
103 static const MCPhysReg RegList1[] = {
104 SystemZ::R2L, SystemZ::R3L, SystemZ::R4L, SystemZ::R5L, SystemZ::R6L
105 };
106 if (unsigned Reg = State.AllocateReg(Regs: RegList1)) {
107 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
108 return false;
109 }
110 }
111
112 if (LocVT == MVT::i64) {
113 static const MCPhysReg RegList2[] = {
114 SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::R6D
115 };
116 if (unsigned Reg = State.AllocateReg(Regs: RegList2)) {
117 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
118 return false;
119 }
120 }
121
122 if (LocVT == MVT::f32) {
123 static const MCPhysReg RegList3[] = {
124 SystemZ::F0S, SystemZ::F2S, SystemZ::F4S, SystemZ::F6S
125 };
126 if (unsigned Reg = State.AllocateReg(Regs: RegList3)) {
127 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
128 return false;
129 }
130 }
131
132 if (LocVT == MVT::f64) {
133 static const MCPhysReg RegList4[] = {
134 SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D
135 };
136 if (unsigned Reg = State.AllocateReg(Regs: RegList4)) {
137 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
138 return false;
139 }
140 }
141
142 if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).hasVector()) {
143 if (LocVT == MVT::v16i8 ||
144 LocVT == MVT::v8i16 ||
145 LocVT == MVT::v4i32 ||
146 LocVT == MVT::v2i64 ||
147 LocVT == MVT::v4f32 ||
148 LocVT == MVT::v2f64) {
149 if (static_cast<SystemZCCState *>(&State)->IsFixed(ValNo)) {
150 static const MCPhysReg RegList5[] = {
151 SystemZ::V24, SystemZ::V26, SystemZ::V28, SystemZ::V30, SystemZ::V25, SystemZ::V27, SystemZ::V29, SystemZ::V31
152 };
153 if (unsigned Reg = State.AllocateReg(Regs: RegList5)) {
154 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
155 return false;
156 }
157 }
158 }
159 }
160
161 if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).hasVector()) {
162 if (LocVT == MVT::v16i8 ||
163 LocVT == MVT::v8i16 ||
164 LocVT == MVT::v4i32 ||
165 LocVT == MVT::v2i64 ||
166 LocVT == MVT::v4f32 ||
167 LocVT == MVT::v2f64) {
168 if (static_cast<SystemZCCState *>(&State)->IsShortVector(ValNo)) {
169 LocVT = MVT::i64;
170 LocInfo = CCValAssign::BCvt;
171 }
172 }
173 }
174
175 if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).hasVector()) {
176 if (LocVT == MVT::v16i8 ||
177 LocVT == MVT::v8i16 ||
178 LocVT == MVT::v4i32 ||
179 LocVT == MVT::v2i64 ||
180 LocVT == MVT::v4f32 ||
181 LocVT == MVT::v2f64) {
182 int64_t Offset6 = State.AllocateStack(Size: 16, Alignment: Align(8));
183 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset6, LocVT, HTP: LocInfo));
184 return false;
185 }
186 }
187
188 if (LocVT == MVT::i32 ||
189 LocVT == MVT::i64 ||
190 LocVT == MVT::f32 ||
191 LocVT == MVT::f64) {
192 int64_t Offset7 = State.AllocateStack(Size: 8, Alignment: Align(8));
193 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset7, LocVT, HTP: LocInfo));
194 return false;
195 }
196
197 return true; // CC didn't match.
198}
199
200
201static bool CC_SystemZ_GHC(unsigned ValNo, MVT ValVT,
202 MVT LocVT, CCValAssign::LocInfo LocInfo,
203 ISD::ArgFlagsTy ArgFlags, CCState &State) {
204
205 if (LocVT == MVT::i64) {
206 static const MCPhysReg RegList1[] = {
207 SystemZ::R7D, SystemZ::R8D, SystemZ::R10D, SystemZ::R11D, SystemZ::R12D, SystemZ::R13D, SystemZ::R6D, SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::R9D
208 };
209 if (unsigned Reg = State.AllocateReg(Regs: RegList1)) {
210 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
211 return false;
212 }
213 }
214
215 if (LocVT == MVT::f32) {
216 static const MCPhysReg RegList2[] = {
217 SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S, SystemZ::F0S, SystemZ::F1S
218 };
219 if (unsigned Reg = State.AllocateReg(Regs: RegList2)) {
220 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
221 return false;
222 }
223 }
224
225 if (LocVT == MVT::f64) {
226 static const MCPhysReg RegList3[] = {
227 SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D, SystemZ::F2D, SystemZ::F3D
228 };
229 if (unsigned Reg = State.AllocateReg(Regs: RegList3)) {
230 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
231 return false;
232 }
233 }
234
235 if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).hasVector()) {
236 if (LocVT == MVT::v16i8 ||
237 LocVT == MVT::v8i16 ||
238 LocVT == MVT::v4i32 ||
239 LocVT == MVT::v2i64 ||
240 LocVT == MVT::v4f32 ||
241 LocVT == MVT::v2f64) {
242 if (static_cast<SystemZCCState *>(&State)->IsFixed(ValNo)) {
243 static const MCPhysReg RegList4[] = {
244 SystemZ::V16, SystemZ::V17, SystemZ::V18, SystemZ::V19, SystemZ::V20, SystemZ::V21
245 };
246 if (unsigned Reg = State.AllocateReg(Regs: RegList4)) {
247 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
248 return false;
249 }
250 }
251 }
252 }
253
254 if (CC_SystemZ_GHC_Error(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
255 return false;
256
257 return true; // CC didn't match.
258}
259
260
261static bool CC_SystemZ_XPLINK64(unsigned ValNo, MVT ValVT,
262 MVT LocVT, CCValAssign::LocInfo LocInfo,
263 ISD::ArgFlagsTy ArgFlags, CCState &State) {
264
265 if (LocVT == MVT::i32) {
266 if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
267 LocVT = MVT::i64;
268 if (ArgFlags.isSExt())
269 LocInfo = CCValAssign::SExt;
270 else if (ArgFlags.isZExt())
271 LocInfo = CCValAssign::ZExt;
272 else
273 LocInfo = CCValAssign::AExt;
274 }
275 }
276
277 if (LocVT == MVT::f32 ||
278 LocVT == MVT::f64) {
279 if (!(static_cast<SystemZCCState *>(&State)->IsFixed(ValNo))) {
280 LocVT = MVT::i64;
281 LocInfo = CCValAssign::BCvt;
282 }
283 }
284
285 if (LocVT == MVT::f128) {
286 if (!(static_cast<SystemZCCState *>(&State)->IsFixed(ValNo))) {
287 if (CC_XPLINK64_Allocate128BitVararg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
288 return false;
289 }
290 }
291
292 if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).hasVector()) {
293 if (LocVT == MVT::v16i8 ||
294 LocVT == MVT::v8i16 ||
295 LocVT == MVT::v4i32 ||
296 LocVT == MVT::v2i64 ||
297 LocVT == MVT::v4f32 ||
298 LocVT == MVT::v2f64) {
299 if (!(static_cast<SystemZCCState *>(&State)->IsFixed(ValNo))) {
300 if (CC_XPLINK64_Allocate128BitVararg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
301 return false;
302 }
303 }
304 }
305
306 if (ArgFlags.isSwiftSelf()) {
307 if (LocVT == MVT::i64) {
308 if (unsigned Reg = State.AllocateReg(Reg: SystemZ::R10D)) {
309 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
310 return false;
311 }
312 }
313 }
314
315 if (ArgFlags.isSwiftError()) {
316 if (LocVT == MVT::i64) {
317 if (unsigned Reg = State.AllocateReg(Reg: SystemZ::R0D)) {
318 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
319 return false;
320 }
321 }
322 }
323
324 if (LocVT == MVT::i128) {
325 LocVT = MVT::i64;
326 LocInfo = CCValAssign::Indirect;
327 }
328
329 if (LocVT == MVT::i64) {
330 if (CC_SystemZ_I128Indirect(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
331 return false;
332 }
333
334 if (LocVT == MVT::i64) {
335 static const MCPhysReg RegList1[] = {
336 SystemZ::R1D, SystemZ::R2D, SystemZ::R3D
337 };
338 if (unsigned Reg = State.AllocateReg(Regs: RegList1)) {
339 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
340 (void)State.AllocateStack(Size: 8, Alignment: Align(8));
341 return false;
342 }
343 }
344
345 if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).hasVector()) {
346 if (LocVT == MVT::v16i8 ||
347 LocVT == MVT::v8i16 ||
348 LocVT == MVT::v4i32 ||
349 LocVT == MVT::v2i64 ||
350 LocVT == MVT::v4f32 ||
351 LocVT == MVT::v2f64) {
352 if (static_cast<SystemZCCState *>(&State)->IsFixed(ValNo)) {
353 if (CC_XPLINK64_Shadow_Reg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
354 return false;
355 }
356 }
357 }
358
359 if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).hasVector()) {
360 if (LocVT == MVT::v16i8 ||
361 LocVT == MVT::v8i16 ||
362 LocVT == MVT::v4i32 ||
363 LocVT == MVT::v2i64 ||
364 LocVT == MVT::v4f32 ||
365 LocVT == MVT::v2f64) {
366 if (static_cast<SystemZCCState *>(&State)->IsFixed(ValNo)) {
367 static const MCPhysReg RegList2[] = {
368 SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31
369 };
370 if (unsigned Reg = State.AllocateReg(Regs: RegList2)) {
371 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
372 (void)State.AllocateStack(Size: 16, Alignment: Align(8));
373 return false;
374 }
375 }
376 }
377 }
378
379 if (LocVT == MVT::f32 ||
380 LocVT == MVT::f64) {
381 if (static_cast<SystemZCCState *>(&State)->IsFixed(ValNo)) {
382 if (CC_XPLINK64_Shadow_Reg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
383 return false;
384 }
385 }
386
387 if (LocVT == MVT::f32) {
388 if (static_cast<SystemZCCState *>(&State)->IsFixed(ValNo)) {
389 static const MCPhysReg RegList3[] = {
390 SystemZ::F0S, SystemZ::F2S, SystemZ::F4S, SystemZ::F6S
391 };
392 if (unsigned Reg = State.AllocateReg(Regs: RegList3)) {
393 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
394 (void)State.AllocateStack(Size: 4, Alignment: Align(8));
395 return false;
396 }
397 }
398 }
399
400 if (LocVT == MVT::f64) {
401 if (static_cast<SystemZCCState *>(&State)->IsFixed(ValNo)) {
402 static const MCPhysReg RegList4[] = {
403 SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D
404 };
405 if (unsigned Reg = State.AllocateReg(Regs: RegList4)) {
406 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
407 (void)State.AllocateStack(Size: 8, Alignment: Align(8));
408 return false;
409 }
410 }
411 }
412
413 if (LocVT == MVT::f128) {
414 if (static_cast<SystemZCCState *>(&State)->IsFixed(ValNo)) {
415 if (CC_XPLINK64_Shadow_Reg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
416 return false;
417 }
418 }
419
420 if (LocVT == MVT::f128) {
421 if (static_cast<SystemZCCState *>(&State)->IsFixed(ValNo)) {
422 static const MCPhysReg RegList5[] = {
423 SystemZ::F0Q, SystemZ::F4Q
424 };
425 if (unsigned Reg = State.AllocateReg(Regs: RegList5)) {
426 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
427 (void)State.AllocateStack(Size: 16, Alignment: Align(8));
428 return false;
429 }
430 }
431 }
432
433 if (LocVT == MVT::i32 ||
434 LocVT == MVT::i64 ||
435 LocVT == MVT::f32 ||
436 LocVT == MVT::f64) {
437 int64_t Offset6 = State.AllocateStack(Size: 8, Alignment: Align(8));
438 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset6, LocVT, HTP: LocInfo));
439 return false;
440 }
441
442 if (LocVT == MVT::f128) {
443 int64_t Offset7 = State.AllocateStack(Size: 16, Alignment: Align(8));
444 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset7, LocVT, HTP: LocInfo));
445 return false;
446 }
447
448 if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).hasVector()) {
449 if (LocVT == MVT::v16i8 ||
450 LocVT == MVT::v8i16 ||
451 LocVT == MVT::v4i32 ||
452 LocVT == MVT::v2i64 ||
453 LocVT == MVT::v4f32 ||
454 LocVT == MVT::v2f64) {
455 int64_t Offset8 = State.AllocateStack(Size: 16, Alignment: Align(8));
456 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset8, LocVT, HTP: LocInfo));
457 return false;
458 }
459 }
460
461 return true; // CC didn't match.
462}
463
464
465static bool RetCC_SystemZ(unsigned ValNo, MVT ValVT,
466 MVT LocVT, CCValAssign::LocInfo LocInfo,
467 ISD::ArgFlagsTy ArgFlags, CCState &State) {
468
469 if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).isTargetXPLINK64()) {
470 if (!RetCC_SystemZ_XPLINK64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
471 return false;
472 }
473
474 if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).isTargetELF()) {
475 if (!RetCC_SystemZ_ELF(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
476 return false;
477 }
478
479 return true; // CC didn't match.
480}
481
482
483static bool RetCC_SystemZ_ELF(unsigned ValNo, MVT ValVT,
484 MVT LocVT, CCValAssign::LocInfo LocInfo,
485 ISD::ArgFlagsTy ArgFlags, CCState &State) {
486
487 if (LocVT == MVT::i32) {
488 if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
489 LocVT = MVT::i64;
490 if (ArgFlags.isSExt())
491 LocInfo = CCValAssign::SExt;
492 else if (ArgFlags.isZExt())
493 LocInfo = CCValAssign::ZExt;
494 else
495 LocInfo = CCValAssign::AExt;
496 }
497 }
498
499 if (ArgFlags.isSwiftError()) {
500 if (LocVT == MVT::i64) {
501 if (unsigned Reg = State.AllocateReg(Reg: SystemZ::R9D)) {
502 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
503 return false;
504 }
505 }
506 }
507
508 if (LocVT == MVT::i32) {
509 static const MCPhysReg RegList1[] = {
510 SystemZ::R2L, SystemZ::R3L, SystemZ::R4L, SystemZ::R5L
511 };
512 if (unsigned Reg = State.AllocateReg(Regs: RegList1)) {
513 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
514 return false;
515 }
516 }
517
518 if (LocVT == MVT::i64) {
519 static const MCPhysReg RegList2[] = {
520 SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D
521 };
522 if (unsigned Reg = State.AllocateReg(Regs: RegList2)) {
523 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
524 return false;
525 }
526 }
527
528 if (LocVT == MVT::f32) {
529 static const MCPhysReg RegList3[] = {
530 SystemZ::F0S, SystemZ::F2S, SystemZ::F4S, SystemZ::F6S
531 };
532 if (unsigned Reg = State.AllocateReg(Regs: RegList3)) {
533 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
534 return false;
535 }
536 }
537
538 if (LocVT == MVT::f64) {
539 static const MCPhysReg RegList4[] = {
540 SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D
541 };
542 if (unsigned Reg = State.AllocateReg(Regs: RegList4)) {
543 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
544 return false;
545 }
546 }
547
548 if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).hasVector()) {
549 if (LocVT == MVT::v16i8 ||
550 LocVT == MVT::v8i16 ||
551 LocVT == MVT::v4i32 ||
552 LocVT == MVT::v2i64 ||
553 LocVT == MVT::v4f32 ||
554 LocVT == MVT::v2f64) {
555 static const MCPhysReg RegList5[] = {
556 SystemZ::V24, SystemZ::V26, SystemZ::V28, SystemZ::V30, SystemZ::V25, SystemZ::V27, SystemZ::V29, SystemZ::V31
557 };
558 if (unsigned Reg = State.AllocateReg(Regs: RegList5)) {
559 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
560 return false;
561 }
562 }
563 }
564
565 return true; // CC didn't match.
566}
567
568
569static bool RetCC_SystemZ_XPLINK64(unsigned ValNo, MVT ValVT,
570 MVT LocVT, CCValAssign::LocInfo LocInfo,
571 ISD::ArgFlagsTy ArgFlags, CCState &State) {
572
573 if (LocVT == MVT::i32) {
574 LocVT = MVT::i64;
575 if (ArgFlags.isSExt())
576 LocInfo = CCValAssign::SExt;
577 else if (ArgFlags.isZExt())
578 LocInfo = CCValAssign::ZExt;
579 else
580 LocInfo = CCValAssign::AExt;
581 }
582
583 if (LocVT == MVT::i64) {
584 if (ArgFlags.isInReg()) {
585 static const MCPhysReg RegList1[] = {
586 SystemZ::R1D, SystemZ::R2D, SystemZ::R3D
587 };
588 if (unsigned Reg = State.AllocateReg(Regs: RegList1)) {
589 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
590 return false;
591 }
592 }
593 }
594
595 if (LocVT == MVT::i64) {
596 static const MCPhysReg RegList2[] = {
597 SystemZ::R3D, SystemZ::R2D, SystemZ::R1D
598 };
599 if (unsigned Reg = State.AllocateReg(Regs: RegList2)) {
600 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
601 return false;
602 }
603 }
604
605 if (LocVT == MVT::f32) {
606 static const MCPhysReg RegList3[] = {
607 SystemZ::F0S, SystemZ::F2S, SystemZ::F4S, SystemZ::F6S
608 };
609 if (unsigned Reg = State.AllocateReg(Regs: RegList3)) {
610 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
611 return false;
612 }
613 }
614
615 if (LocVT == MVT::f64) {
616 static const MCPhysReg RegList4[] = {
617 SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D
618 };
619 if (unsigned Reg = State.AllocateReg(Regs: RegList4)) {
620 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
621 return false;
622 }
623 }
624
625 if (LocVT == MVT::f128) {
626 static const MCPhysReg RegList5[] = {
627 SystemZ::F0Q, SystemZ::F4Q
628 };
629 if (unsigned Reg = State.AllocateReg(Regs: RegList5)) {
630 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
631 return false;
632 }
633 }
634
635 if (static_cast<const SystemZSubtarget&>(State.getMachineFunction().getSubtarget()).hasVector()) {
636 if (LocVT == MVT::v16i8 ||
637 LocVT == MVT::v8i16 ||
638 LocVT == MVT::v4i32 ||
639 LocVT == MVT::v2i64 ||
640 LocVT == MVT::v4f32 ||
641 LocVT == MVT::v2f64) {
642 static const MCPhysReg RegList6[] = {
643 SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31
644 };
645 if (unsigned Reg = State.AllocateReg(Regs: RegList6)) {
646 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, RegNo: Reg, LocVT, HTP: LocInfo));
647 return false;
648 }
649 }
650 }
651
652 return true; // CC didn't match.
653}
654
655#else
656
657const MCRegister CC_SystemZ_ArgRegs[] = { 0 };
658const MCRegister CC_SystemZ_ELF_ArgRegs[] = { SystemZ::F0D, SystemZ::F0S, SystemZ::F2D, SystemZ::F2S, SystemZ::F4D, SystemZ::F4S, SystemZ::F6D, SystemZ::F6S, SystemZ::R2D, SystemZ::R2L, SystemZ::R3D, SystemZ::R3L, SystemZ::R4D, SystemZ::R4L, SystemZ::R5D, SystemZ::R5L, SystemZ::R6D, SystemZ::R6L, SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31 };
659const MCRegister CC_SystemZ_GHC_ArgRegs[] = { SystemZ::F0S, SystemZ::F10S, SystemZ::F11S, SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D, SystemZ::F1S, SystemZ::F2D, SystemZ::F3D, SystemZ::F8S, SystemZ::F9S, SystemZ::R10D, SystemZ::R11D, SystemZ::R12D, SystemZ::R13D, SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::R6D, SystemZ::R7D, SystemZ::R8D, SystemZ::R9D, SystemZ::V16, SystemZ::V17, SystemZ::V18, SystemZ::V19, SystemZ::V20, SystemZ::V21 };
660const MCRegister CC_SystemZ_XPLINK64_ArgRegs[] = { SystemZ::F0D, SystemZ::F0Q, SystemZ::F0S, SystemZ::F2D, SystemZ::F2S, SystemZ::F4D, SystemZ::F4Q, SystemZ::F4S, SystemZ::F6D, SystemZ::F6S, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31 };
661const MCRegister RetCC_SystemZ_ArgRegs[] = { 0 };
662const MCRegister RetCC_SystemZ_ELF_ArgRegs[] = { SystemZ::F0D, SystemZ::F0S, SystemZ::F2D, SystemZ::F2S, SystemZ::F4D, SystemZ::F4S, SystemZ::F6D, SystemZ::F6S, SystemZ::R2D, SystemZ::R2L, SystemZ::R3D, SystemZ::R3L, SystemZ::R4D, SystemZ::R4L, SystemZ::R5D, SystemZ::R5L, SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31 };
663const MCRegister RetCC_SystemZ_XPLINK64_ArgRegs[] = { SystemZ::F0D, SystemZ::F0Q, SystemZ::F0S, SystemZ::F2D, SystemZ::F2S, SystemZ::F4D, SystemZ::F4Q, SystemZ::F4S, SystemZ::F6D, SystemZ::F6S, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31 };
664
665// Registers used by Swift.
666const MCRegister CC_SystemZ_ELF_Swift_ArgRegs[] = { SystemZ::R10D, SystemZ::R9D };
667const MCRegister CC_SystemZ_XPLINK64_Swift_ArgRegs[] = { SystemZ::R0D, SystemZ::R10D };
668const MCRegister RetCC_SystemZ_ELF_Swift_ArgRegs[] = { SystemZ::R9D };
669
670#endif // CC_REGISTER_LIST
671