1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Instruction Enum Values and Descriptors *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_INSTRINFO_ENUM
10#undef GET_INSTRINFO_ENUM
11namespace llvm {
12
13namespace SystemZ {
14 enum {
15 PHI = 0,
16 INLINEASM = 1,
17 INLINEASM_BR = 2,
18 CFI_INSTRUCTION = 3,
19 EH_LABEL = 4,
20 GC_LABEL = 5,
21 ANNOTATION_LABEL = 6,
22 KILL = 7,
23 EXTRACT_SUBREG = 8,
24 INSERT_SUBREG = 9,
25 IMPLICIT_DEF = 10,
26 SUBREG_TO_REG = 11,
27 COPY_TO_REGCLASS = 12,
28 DBG_VALUE = 13,
29 DBG_VALUE_LIST = 14,
30 DBG_INSTR_REF = 15,
31 DBG_PHI = 16,
32 DBG_LABEL = 17,
33 REG_SEQUENCE = 18,
34 COPY = 19,
35 BUNDLE = 20,
36 LIFETIME_START = 21,
37 LIFETIME_END = 22,
38 PSEUDO_PROBE = 23,
39 ARITH_FENCE = 24,
40 STACKMAP = 25,
41 FENTRY_CALL = 26,
42 PATCHPOINT = 27,
43 LOAD_STACK_GUARD = 28,
44 PREALLOCATED_SETUP = 29,
45 PREALLOCATED_ARG = 30,
46 STATEPOINT = 31,
47 LOCAL_ESCAPE = 32,
48 FAULTING_OP = 33,
49 PATCHABLE_OP = 34,
50 PATCHABLE_FUNCTION_ENTER = 35,
51 PATCHABLE_RET = 36,
52 PATCHABLE_FUNCTION_EXIT = 37,
53 PATCHABLE_TAIL_CALL = 38,
54 PATCHABLE_EVENT_CALL = 39,
55 PATCHABLE_TYPED_EVENT_CALL = 40,
56 ICALL_BRANCH_FUNNEL = 41,
57 MEMBARRIER = 42,
58 JUMP_TABLE_DEBUG_INFO = 43,
59 CONVERGENCECTRL_ENTRY = 44,
60 CONVERGENCECTRL_ANCHOR = 45,
61 CONVERGENCECTRL_LOOP = 46,
62 CONVERGENCECTRL_GLUE = 47,
63 G_ASSERT_SEXT = 48,
64 G_ASSERT_ZEXT = 49,
65 G_ASSERT_ALIGN = 50,
66 G_ADD = 51,
67 G_SUB = 52,
68 G_MUL = 53,
69 G_SDIV = 54,
70 G_UDIV = 55,
71 G_SREM = 56,
72 G_UREM = 57,
73 G_SDIVREM = 58,
74 G_UDIVREM = 59,
75 G_AND = 60,
76 G_OR = 61,
77 G_XOR = 62,
78 G_IMPLICIT_DEF = 63,
79 G_PHI = 64,
80 G_FRAME_INDEX = 65,
81 G_GLOBAL_VALUE = 66,
82 G_PTRAUTH_GLOBAL_VALUE = 67,
83 G_CONSTANT_POOL = 68,
84 G_EXTRACT = 69,
85 G_UNMERGE_VALUES = 70,
86 G_INSERT = 71,
87 G_MERGE_VALUES = 72,
88 G_BUILD_VECTOR = 73,
89 G_BUILD_VECTOR_TRUNC = 74,
90 G_CONCAT_VECTORS = 75,
91 G_PTRTOINT = 76,
92 G_INTTOPTR = 77,
93 G_BITCAST = 78,
94 G_FREEZE = 79,
95 G_CONSTANT_FOLD_BARRIER = 80,
96 G_INTRINSIC_FPTRUNC_ROUND = 81,
97 G_INTRINSIC_TRUNC = 82,
98 G_INTRINSIC_ROUND = 83,
99 G_INTRINSIC_LRINT = 84,
100 G_INTRINSIC_LLRINT = 85,
101 G_INTRINSIC_ROUNDEVEN = 86,
102 G_READCYCLECOUNTER = 87,
103 G_READSTEADYCOUNTER = 88,
104 G_LOAD = 89,
105 G_SEXTLOAD = 90,
106 G_ZEXTLOAD = 91,
107 G_INDEXED_LOAD = 92,
108 G_INDEXED_SEXTLOAD = 93,
109 G_INDEXED_ZEXTLOAD = 94,
110 G_STORE = 95,
111 G_INDEXED_STORE = 96,
112 G_ATOMIC_CMPXCHG_WITH_SUCCESS = 97,
113 G_ATOMIC_CMPXCHG = 98,
114 G_ATOMICRMW_XCHG = 99,
115 G_ATOMICRMW_ADD = 100,
116 G_ATOMICRMW_SUB = 101,
117 G_ATOMICRMW_AND = 102,
118 G_ATOMICRMW_NAND = 103,
119 G_ATOMICRMW_OR = 104,
120 G_ATOMICRMW_XOR = 105,
121 G_ATOMICRMW_MAX = 106,
122 G_ATOMICRMW_MIN = 107,
123 G_ATOMICRMW_UMAX = 108,
124 G_ATOMICRMW_UMIN = 109,
125 G_ATOMICRMW_FADD = 110,
126 G_ATOMICRMW_FSUB = 111,
127 G_ATOMICRMW_FMAX = 112,
128 G_ATOMICRMW_FMIN = 113,
129 G_ATOMICRMW_UINC_WRAP = 114,
130 G_ATOMICRMW_UDEC_WRAP = 115,
131 G_FENCE = 116,
132 G_PREFETCH = 117,
133 G_BRCOND = 118,
134 G_BRINDIRECT = 119,
135 G_INVOKE_REGION_START = 120,
136 G_INTRINSIC = 121,
137 G_INTRINSIC_W_SIDE_EFFECTS = 122,
138 G_INTRINSIC_CONVERGENT = 123,
139 G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 124,
140 G_ANYEXT = 125,
141 G_TRUNC = 126,
142 G_CONSTANT = 127,
143 G_FCONSTANT = 128,
144 G_VASTART = 129,
145 G_VAARG = 130,
146 G_SEXT = 131,
147 G_SEXT_INREG = 132,
148 G_ZEXT = 133,
149 G_SHL = 134,
150 G_LSHR = 135,
151 G_ASHR = 136,
152 G_FSHL = 137,
153 G_FSHR = 138,
154 G_ROTR = 139,
155 G_ROTL = 140,
156 G_ICMP = 141,
157 G_FCMP = 142,
158 G_SCMP = 143,
159 G_UCMP = 144,
160 G_SELECT = 145,
161 G_UADDO = 146,
162 G_UADDE = 147,
163 G_USUBO = 148,
164 G_USUBE = 149,
165 G_SADDO = 150,
166 G_SADDE = 151,
167 G_SSUBO = 152,
168 G_SSUBE = 153,
169 G_UMULO = 154,
170 G_SMULO = 155,
171 G_UMULH = 156,
172 G_SMULH = 157,
173 G_UADDSAT = 158,
174 G_SADDSAT = 159,
175 G_USUBSAT = 160,
176 G_SSUBSAT = 161,
177 G_USHLSAT = 162,
178 G_SSHLSAT = 163,
179 G_SMULFIX = 164,
180 G_UMULFIX = 165,
181 G_SMULFIXSAT = 166,
182 G_UMULFIXSAT = 167,
183 G_SDIVFIX = 168,
184 G_UDIVFIX = 169,
185 G_SDIVFIXSAT = 170,
186 G_UDIVFIXSAT = 171,
187 G_FADD = 172,
188 G_FSUB = 173,
189 G_FMUL = 174,
190 G_FMA = 175,
191 G_FMAD = 176,
192 G_FDIV = 177,
193 G_FREM = 178,
194 G_FPOW = 179,
195 G_FPOWI = 180,
196 G_FEXP = 181,
197 G_FEXP2 = 182,
198 G_FEXP10 = 183,
199 G_FLOG = 184,
200 G_FLOG2 = 185,
201 G_FLOG10 = 186,
202 G_FLDEXP = 187,
203 G_FFREXP = 188,
204 G_FNEG = 189,
205 G_FPEXT = 190,
206 G_FPTRUNC = 191,
207 G_FPTOSI = 192,
208 G_FPTOUI = 193,
209 G_SITOFP = 194,
210 G_UITOFP = 195,
211 G_FABS = 196,
212 G_FCOPYSIGN = 197,
213 G_IS_FPCLASS = 198,
214 G_FCANONICALIZE = 199,
215 G_FMINNUM = 200,
216 G_FMAXNUM = 201,
217 G_FMINNUM_IEEE = 202,
218 G_FMAXNUM_IEEE = 203,
219 G_FMINIMUM = 204,
220 G_FMAXIMUM = 205,
221 G_GET_FPENV = 206,
222 G_SET_FPENV = 207,
223 G_RESET_FPENV = 208,
224 G_GET_FPMODE = 209,
225 G_SET_FPMODE = 210,
226 G_RESET_FPMODE = 211,
227 G_PTR_ADD = 212,
228 G_PTRMASK = 213,
229 G_SMIN = 214,
230 G_SMAX = 215,
231 G_UMIN = 216,
232 G_UMAX = 217,
233 G_ABS = 218,
234 G_LROUND = 219,
235 G_LLROUND = 220,
236 G_BR = 221,
237 G_BRJT = 222,
238 G_VSCALE = 223,
239 G_INSERT_SUBVECTOR = 224,
240 G_EXTRACT_SUBVECTOR = 225,
241 G_INSERT_VECTOR_ELT = 226,
242 G_EXTRACT_VECTOR_ELT = 227,
243 G_SHUFFLE_VECTOR = 228,
244 G_SPLAT_VECTOR = 229,
245 G_VECTOR_COMPRESS = 230,
246 G_CTTZ = 231,
247 G_CTTZ_ZERO_UNDEF = 232,
248 G_CTLZ = 233,
249 G_CTLZ_ZERO_UNDEF = 234,
250 G_CTPOP = 235,
251 G_BSWAP = 236,
252 G_BITREVERSE = 237,
253 G_FCEIL = 238,
254 G_FCOS = 239,
255 G_FSIN = 240,
256 G_FTAN = 241,
257 G_FACOS = 242,
258 G_FASIN = 243,
259 G_FATAN = 244,
260 G_FCOSH = 245,
261 G_FSINH = 246,
262 G_FTANH = 247,
263 G_FSQRT = 248,
264 G_FFLOOR = 249,
265 G_FRINT = 250,
266 G_FNEARBYINT = 251,
267 G_ADDRSPACE_CAST = 252,
268 G_BLOCK_ADDR = 253,
269 G_JUMP_TABLE = 254,
270 G_DYN_STACKALLOC = 255,
271 G_STACKSAVE = 256,
272 G_STACKRESTORE = 257,
273 G_STRICT_FADD = 258,
274 G_STRICT_FSUB = 259,
275 G_STRICT_FMUL = 260,
276 G_STRICT_FDIV = 261,
277 G_STRICT_FREM = 262,
278 G_STRICT_FMA = 263,
279 G_STRICT_FSQRT = 264,
280 G_STRICT_FLDEXP = 265,
281 G_READ_REGISTER = 266,
282 G_WRITE_REGISTER = 267,
283 G_MEMCPY = 268,
284 G_MEMCPY_INLINE = 269,
285 G_MEMMOVE = 270,
286 G_MEMSET = 271,
287 G_BZERO = 272,
288 G_TRAP = 273,
289 G_DEBUGTRAP = 274,
290 G_UBSANTRAP = 275,
291 G_VECREDUCE_SEQ_FADD = 276,
292 G_VECREDUCE_SEQ_FMUL = 277,
293 G_VECREDUCE_FADD = 278,
294 G_VECREDUCE_FMUL = 279,
295 G_VECREDUCE_FMAX = 280,
296 G_VECREDUCE_FMIN = 281,
297 G_VECREDUCE_FMAXIMUM = 282,
298 G_VECREDUCE_FMINIMUM = 283,
299 G_VECREDUCE_ADD = 284,
300 G_VECREDUCE_MUL = 285,
301 G_VECREDUCE_AND = 286,
302 G_VECREDUCE_OR = 287,
303 G_VECREDUCE_XOR = 288,
304 G_VECREDUCE_SMAX = 289,
305 G_VECREDUCE_SMIN = 290,
306 G_VECREDUCE_UMAX = 291,
307 G_VECREDUCE_UMIN = 292,
308 G_SBFX = 293,
309 G_UBFX = 294,
310 ADA_ENTRY = 295,
311 ADA_ENTRY_VALUE = 296,
312 ADB_MemFoldPseudo = 297,
313 ADJCALLSTACKDOWN = 298,
314 ADJCALLSTACKUP = 299,
315 ADJDYNALLOC = 300,
316 AEB_MemFoldPseudo = 301,
317 AEXT128 = 302,
318 AFIMux = 303,
319 AG_MemFoldPseudo = 304,
320 AHIMux = 305,
321 AHIMuxK = 306,
322 ALG_MemFoldPseudo = 307,
323 AL_MemFoldPseudo = 308,
324 ATOMIC_CMP_SWAPW = 309,
325 ATOMIC_LOADW_AFI = 310,
326 ATOMIC_LOADW_AR = 311,
327 ATOMIC_LOADW_MAX = 312,
328 ATOMIC_LOADW_MIN = 313,
329 ATOMIC_LOADW_NILH = 314,
330 ATOMIC_LOADW_NILHi = 315,
331 ATOMIC_LOADW_NR = 316,
332 ATOMIC_LOADW_NRi = 317,
333 ATOMIC_LOADW_OILH = 318,
334 ATOMIC_LOADW_OR = 319,
335 ATOMIC_LOADW_SR = 320,
336 ATOMIC_LOADW_UMAX = 321,
337 ATOMIC_LOADW_UMIN = 322,
338 ATOMIC_LOADW_XILF = 323,
339 ATOMIC_LOADW_XR = 324,
340 ATOMIC_SWAPW = 325,
341 A_MemFoldPseudo = 326,
342 CFIMux = 327,
343 CGIBCall = 328,
344 CGIBReturn = 329,
345 CGRBCall = 330,
346 CGRBReturn = 331,
347 CHIMux = 332,
348 CIBCall = 333,
349 CIBReturn = 334,
350 CLCImm = 335,
351 CLCReg = 336,
352 CLFIMux = 337,
353 CLGIBCall = 338,
354 CLGIBReturn = 339,
355 CLGRBCall = 340,
356 CLGRBReturn = 341,
357 CLIBCall = 342,
358 CLIBReturn = 343,
359 CLMux = 344,
360 CLRBCall = 345,
361 CLRBReturn = 346,
362 CLSTLoop = 347,
363 CMux = 348,
364 CRBCall = 349,
365 CRBReturn = 350,
366 CallBASR = 351,
367 CallBASR_STACKEXT = 352,
368 CallBASR_XPLINK64 = 353,
369 CallBCR = 354,
370 CallBR = 355,
371 CallBRASL = 356,
372 CallBRASL_XPLINK64 = 357,
373 CallBRCL = 358,
374 CallJG = 359,
375 CondReturn = 360,
376 CondReturn_XPLINK = 361,
377 CondStore16 = 362,
378 CondStore16Inv = 363,
379 CondStore16Mux = 364,
380 CondStore16MuxInv = 365,
381 CondStore32 = 366,
382 CondStore32Inv = 367,
383 CondStore32Mux = 368,
384 CondStore32MuxInv = 369,
385 CondStore64 = 370,
386 CondStore64Inv = 371,
387 CondStore8 = 372,
388 CondStore8Inv = 373,
389 CondStore8Mux = 374,
390 CondStore8MuxInv = 375,
391 CondStoreF32 = 376,
392 CondStoreF32Inv = 377,
393 CondStoreF64 = 378,
394 CondStoreF64Inv = 379,
395 CondTrap = 380,
396 DDB_MemFoldPseudo = 381,
397 DEB_MemFoldPseudo = 382,
398 EXRL_Pseudo = 383,
399 GOT = 384,
400 IIFMux = 385,
401 IIHF64 = 386,
402 IIHH64 = 387,
403 IIHL64 = 388,
404 IIHMux = 389,
405 IILF64 = 390,
406 IILH64 = 391,
407 IILL64 = 392,
408 IILMux = 393,
409 L128 = 394,
410 LBMux = 395,
411 LEFR = 396,
412 LFER = 397,
413 LHIMux = 398,
414 LHMux = 399,
415 LLCMux = 400,
416 LLCRMux = 401,
417 LLHMux = 402,
418 LLHRMux = 403,
419 LMux = 404,
420 LOCG_MemFoldPseudo = 405,
421 LOCHIMux = 406,
422 LOCMux = 407,
423 LOCMux_MemFoldPseudo = 408,
424 LOCRMux = 409,
425 LTDBRCompare_Pseudo = 410,
426 LTEBRCompare_Pseudo = 411,
427 LTXBRCompare_Pseudo = 412,
428 LX = 413,
429 MADB_MemFoldPseudo = 414,
430 MAEB_MemFoldPseudo = 415,
431 MDB_MemFoldPseudo = 416,
432 MEEB_MemFoldPseudo = 417,
433 MSC_MemFoldPseudo = 418,
434 MSDB_MemFoldPseudo = 419,
435 MSEB_MemFoldPseudo = 420,
436 MSGC_MemFoldPseudo = 421,
437 MVCImm = 422,
438 MVCReg = 423,
439 MVSTLoop = 424,
440 MemsetImmImm = 425,
441 MemsetImmReg = 426,
442 MemsetRegImm = 427,
443 MemsetRegReg = 428,
444 NCImm = 429,
445 NCReg = 430,
446 NG_MemFoldPseudo = 431,
447 NIFMux = 432,
448 NIHF64 = 433,
449 NIHH64 = 434,
450 NIHL64 = 435,
451 NIHMux = 436,
452 NILF64 = 437,
453 NILH64 = 438,
454 NILL64 = 439,
455 NILMux = 440,
456 N_MemFoldPseudo = 441,
457 OCImm = 442,
458 OCReg = 443,
459 OG_MemFoldPseudo = 444,
460 OIFMux = 445,
461 OIHF64 = 446,
462 OIHH64 = 447,
463 OIHL64 = 448,
464 OIHMux = 449,
465 OILF64 = 450,
466 OILH64 = 451,
467 OILL64 = 452,
468 OILMux = 453,
469 O_MemFoldPseudo = 454,
470 PAIR128 = 455,
471 PROBED_ALLOCA = 456,
472 PROBED_STACKALLOC = 457,
473 RISBHH = 458,
474 RISBHL = 459,
475 RISBLH = 460,
476 RISBLL = 461,
477 RISBMux = 462,
478 Return = 463,
479 Return_XPLINK = 464,
480 SCmp128Hi = 465,
481 SDB_MemFoldPseudo = 466,
482 SEB_MemFoldPseudo = 467,
483 SELRMux = 468,
484 SG_MemFoldPseudo = 469,
485 SLG_MemFoldPseudo = 470,
486 SL_MemFoldPseudo = 471,
487 SRSTLoop = 472,
488 ST128 = 473,
489 STCMux = 474,
490 STHMux = 475,
491 STMux = 476,
492 STOCMux = 477,
493 STX = 478,
494 S_MemFoldPseudo = 479,
495 Select128 = 480,
496 Select32 = 481,
497 Select64 = 482,
498 SelectF128 = 483,
499 SelectF32 = 484,
500 SelectF64 = 485,
501 SelectVR128 = 486,
502 SelectVR32 = 487,
503 SelectVR64 = 488,
504 Serialize = 489,
505 TBEGIN_nofloat = 490,
506 TLS_GDCALL = 491,
507 TLS_LDCALL = 492,
508 TMHH64 = 493,
509 TMHL64 = 494,
510 TMHMux = 495,
511 TMLH64 = 496,
512 TMLL64 = 497,
513 TMLMux = 498,
514 Trap = 499,
515 UCmp128Hi = 500,
516 VL32 = 501,
517 VL64 = 502,
518 VLR32 = 503,
519 VLR64 = 504,
520 VLVGP32 = 505,
521 VST32 = 506,
522 VST64 = 507,
523 XCImm = 508,
524 XCReg = 509,
525 XG_MemFoldPseudo = 510,
526 XIFMux = 511,
527 XIHF64 = 512,
528 XILF64 = 513,
529 XPLINK_STACKALLOC = 514,
530 X_MemFoldPseudo = 515,
531 ZEXT128 = 516,
532 A = 517,
533 AD = 518,
534 ADB = 519,
535 ADBR = 520,
536 ADR = 521,
537 ADTR = 522,
538 ADTRA = 523,
539 AE = 524,
540 AEB = 525,
541 AEBR = 526,
542 AER = 527,
543 AFI = 528,
544 AG = 529,
545 AGF = 530,
546 AGFI = 531,
547 AGFR = 532,
548 AGH = 533,
549 AGHI = 534,
550 AGHIK = 535,
551 AGR = 536,
552 AGRK = 537,
553 AGSI = 538,
554 AH = 539,
555 AHHHR = 540,
556 AHHLR = 541,
557 AHI = 542,
558 AHIK = 543,
559 AHY = 544,
560 AIH = 545,
561 AL = 546,
562 ALC = 547,
563 ALCG = 548,
564 ALCGR = 549,
565 ALCR = 550,
566 ALFI = 551,
567 ALG = 552,
568 ALGF = 553,
569 ALGFI = 554,
570 ALGFR = 555,
571 ALGHSIK = 556,
572 ALGR = 557,
573 ALGRK = 558,
574 ALGSI = 559,
575 ALHHHR = 560,
576 ALHHLR = 561,
577 ALHSIK = 562,
578 ALR = 563,
579 ALRK = 564,
580 ALSI = 565,
581 ALSIH = 566,
582 ALSIHN = 567,
583 ALY = 568,
584 AP = 569,
585 AR = 570,
586 ARK = 571,
587 ASI = 572,
588 AU = 573,
589 AUR = 574,
590 AW = 575,
591 AWR = 576,
592 AXBR = 577,
593 AXR = 578,
594 AXTR = 579,
595 AXTRA = 580,
596 AY = 581,
597 B = 582,
598 BAKR = 583,
599 BAL = 584,
600 BALR = 585,
601 BAS = 586,
602 BASR = 587,
603 BASSM = 588,
604 BAsmE = 589,
605 BAsmH = 590,
606 BAsmHE = 591,
607 BAsmL = 592,
608 BAsmLE = 593,
609 BAsmLH = 594,
610 BAsmM = 595,
611 BAsmNE = 596,
612 BAsmNH = 597,
613 BAsmNHE = 598,
614 BAsmNL = 599,
615 BAsmNLE = 600,
616 BAsmNLH = 601,
617 BAsmNM = 602,
618 BAsmNO = 603,
619 BAsmNP = 604,
620 BAsmNZ = 605,
621 BAsmO = 606,
622 BAsmP = 607,
623 BAsmZ = 608,
624 BC = 609,
625 BCAsm = 610,
626 BCR = 611,
627 BCRAsm = 612,
628 BCT = 613,
629 BCTG = 614,
630 BCTGR = 615,
631 BCTR = 616,
632 BI = 617,
633 BIAsmE = 618,
634 BIAsmH = 619,
635 BIAsmHE = 620,
636 BIAsmL = 621,
637 BIAsmLE = 622,
638 BIAsmLH = 623,
639 BIAsmM = 624,
640 BIAsmNE = 625,
641 BIAsmNH = 626,
642 BIAsmNHE = 627,
643 BIAsmNL = 628,
644 BIAsmNLE = 629,
645 BIAsmNLH = 630,
646 BIAsmNM = 631,
647 BIAsmNO = 632,
648 BIAsmNP = 633,
649 BIAsmNZ = 634,
650 BIAsmO = 635,
651 BIAsmP = 636,
652 BIAsmZ = 637,
653 BIC = 638,
654 BICAsm = 639,
655 BPP = 640,
656 BPRP = 641,
657 BR = 642,
658 BRAS = 643,
659 BRASL = 644,
660 BRAsmE = 645,
661 BRAsmH = 646,
662 BRAsmHE = 647,
663 BRAsmL = 648,
664 BRAsmLE = 649,
665 BRAsmLH = 650,
666 BRAsmM = 651,
667 BRAsmNE = 652,
668 BRAsmNH = 653,
669 BRAsmNHE = 654,
670 BRAsmNL = 655,
671 BRAsmNLE = 656,
672 BRAsmNLH = 657,
673 BRAsmNM = 658,
674 BRAsmNO = 659,
675 BRAsmNP = 660,
676 BRAsmNZ = 661,
677 BRAsmO = 662,
678 BRAsmP = 663,
679 BRAsmZ = 664,
680 BRC = 665,
681 BRCAsm = 666,
682 BRCL = 667,
683 BRCLAsm = 668,
684 BRCT = 669,
685 BRCTG = 670,
686 BRCTH = 671,
687 BRXH = 672,
688 BRXHG = 673,
689 BRXLE = 674,
690 BRXLG = 675,
691 BSA = 676,
692 BSG = 677,
693 BSM = 678,
694 BXH = 679,
695 BXHG = 680,
696 BXLE = 681,
697 BXLEG = 682,
698 C = 683,
699 CD = 684,
700 CDB = 685,
701 CDBR = 686,
702 CDFBR = 687,
703 CDFBRA = 688,
704 CDFR = 689,
705 CDFTR = 690,
706 CDGBR = 691,
707 CDGBRA = 692,
708 CDGR = 693,
709 CDGTR = 694,
710 CDGTRA = 695,
711 CDLFBR = 696,
712 CDLFTR = 697,
713 CDLGBR = 698,
714 CDLGTR = 699,
715 CDPT = 700,
716 CDR = 701,
717 CDS = 702,
718 CDSG = 703,
719 CDSTR = 704,
720 CDSY = 705,
721 CDTR = 706,
722 CDUTR = 707,
723 CDZT = 708,
724 CE = 709,
725 CEB = 710,
726 CEBR = 711,
727 CEDTR = 712,
728 CEFBR = 713,
729 CEFBRA = 714,
730 CEFR = 715,
731 CEGBR = 716,
732 CEGBRA = 717,
733 CEGR = 718,
734 CELFBR = 719,
735 CELGBR = 720,
736 CER = 721,
737 CEXTR = 722,
738 CFC = 723,
739 CFDBR = 724,
740 CFDBRA = 725,
741 CFDR = 726,
742 CFDTR = 727,
743 CFEBR = 728,
744 CFEBRA = 729,
745 CFER = 730,
746 CFI = 731,
747 CFXBR = 732,
748 CFXBRA = 733,
749 CFXR = 734,
750 CFXTR = 735,
751 CG = 736,
752 CGDBR = 737,
753 CGDBRA = 738,
754 CGDR = 739,
755 CGDTR = 740,
756 CGDTRA = 741,
757 CGEBR = 742,
758 CGEBRA = 743,
759 CGER = 744,
760 CGF = 745,
761 CGFI = 746,
762 CGFR = 747,
763 CGFRL = 748,
764 CGH = 749,
765 CGHI = 750,
766 CGHRL = 751,
767 CGHSI = 752,
768 CGIB = 753,
769 CGIBAsm = 754,
770 CGIBAsmE = 755,
771 CGIBAsmH = 756,
772 CGIBAsmHE = 757,
773 CGIBAsmL = 758,
774 CGIBAsmLE = 759,
775 CGIBAsmLH = 760,
776 CGIBAsmNE = 761,
777 CGIBAsmNH = 762,
778 CGIBAsmNHE = 763,
779 CGIBAsmNL = 764,
780 CGIBAsmNLE = 765,
781 CGIBAsmNLH = 766,
782 CGIJ = 767,
783 CGIJAsm = 768,
784 CGIJAsmE = 769,
785 CGIJAsmH = 770,
786 CGIJAsmHE = 771,
787 CGIJAsmL = 772,
788 CGIJAsmLE = 773,
789 CGIJAsmLH = 774,
790 CGIJAsmNE = 775,
791 CGIJAsmNH = 776,
792 CGIJAsmNHE = 777,
793 CGIJAsmNL = 778,
794 CGIJAsmNLE = 779,
795 CGIJAsmNLH = 780,
796 CGIT = 781,
797 CGITAsm = 782,
798 CGITAsmE = 783,
799 CGITAsmH = 784,
800 CGITAsmHE = 785,
801 CGITAsmL = 786,
802 CGITAsmLE = 787,
803 CGITAsmLH = 788,
804 CGITAsmNE = 789,
805 CGITAsmNH = 790,
806 CGITAsmNHE = 791,
807 CGITAsmNL = 792,
808 CGITAsmNLE = 793,
809 CGITAsmNLH = 794,
810 CGR = 795,
811 CGRB = 796,
812 CGRBAsm = 797,
813 CGRBAsmE = 798,
814 CGRBAsmH = 799,
815 CGRBAsmHE = 800,
816 CGRBAsmL = 801,
817 CGRBAsmLE = 802,
818 CGRBAsmLH = 803,
819 CGRBAsmNE = 804,
820 CGRBAsmNH = 805,
821 CGRBAsmNHE = 806,
822 CGRBAsmNL = 807,
823 CGRBAsmNLE = 808,
824 CGRBAsmNLH = 809,
825 CGRJ = 810,
826 CGRJAsm = 811,
827 CGRJAsmE = 812,
828 CGRJAsmH = 813,
829 CGRJAsmHE = 814,
830 CGRJAsmL = 815,
831 CGRJAsmLE = 816,
832 CGRJAsmLH = 817,
833 CGRJAsmNE = 818,
834 CGRJAsmNH = 819,
835 CGRJAsmNHE = 820,
836 CGRJAsmNL = 821,
837 CGRJAsmNLE = 822,
838 CGRJAsmNLH = 823,
839 CGRL = 824,
840 CGRT = 825,
841 CGRTAsm = 826,
842 CGRTAsmE = 827,
843 CGRTAsmH = 828,
844 CGRTAsmHE = 829,
845 CGRTAsmL = 830,
846 CGRTAsmLE = 831,
847 CGRTAsmLH = 832,
848 CGRTAsmNE = 833,
849 CGRTAsmNH = 834,
850 CGRTAsmNHE = 835,
851 CGRTAsmNL = 836,
852 CGRTAsmNLE = 837,
853 CGRTAsmNLH = 838,
854 CGXBR = 839,
855 CGXBRA = 840,
856 CGXR = 841,
857 CGXTR = 842,
858 CGXTRA = 843,
859 CH = 844,
860 CHF = 845,
861 CHHR = 846,
862 CHHSI = 847,
863 CHI = 848,
864 CHLR = 849,
865 CHRL = 850,
866 CHSI = 851,
867 CHY = 852,
868 CIB = 853,
869 CIBAsm = 854,
870 CIBAsmE = 855,
871 CIBAsmH = 856,
872 CIBAsmHE = 857,
873 CIBAsmL = 858,
874 CIBAsmLE = 859,
875 CIBAsmLH = 860,
876 CIBAsmNE = 861,
877 CIBAsmNH = 862,
878 CIBAsmNHE = 863,
879 CIBAsmNL = 864,
880 CIBAsmNLE = 865,
881 CIBAsmNLH = 866,
882 CIH = 867,
883 CIJ = 868,
884 CIJAsm = 869,
885 CIJAsmE = 870,
886 CIJAsmH = 871,
887 CIJAsmHE = 872,
888 CIJAsmL = 873,
889 CIJAsmLE = 874,
890 CIJAsmLH = 875,
891 CIJAsmNE = 876,
892 CIJAsmNH = 877,
893 CIJAsmNHE = 878,
894 CIJAsmNL = 879,
895 CIJAsmNLE = 880,
896 CIJAsmNLH = 881,
897 CIT = 882,
898 CITAsm = 883,
899 CITAsmE = 884,
900 CITAsmH = 885,
901 CITAsmHE = 886,
902 CITAsmL = 887,
903 CITAsmLE = 888,
904 CITAsmLH = 889,
905 CITAsmNE = 890,
906 CITAsmNH = 891,
907 CITAsmNHE = 892,
908 CITAsmNL = 893,
909 CITAsmNLE = 894,
910 CITAsmNLH = 895,
911 CKSM = 896,
912 CL = 897,
913 CLC = 898,
914 CLCL = 899,
915 CLCLE = 900,
916 CLCLU = 901,
917 CLFDBR = 902,
918 CLFDTR = 903,
919 CLFEBR = 904,
920 CLFHSI = 905,
921 CLFI = 906,
922 CLFIT = 907,
923 CLFITAsm = 908,
924 CLFITAsmE = 909,
925 CLFITAsmH = 910,
926 CLFITAsmHE = 911,
927 CLFITAsmL = 912,
928 CLFITAsmLE = 913,
929 CLFITAsmLH = 914,
930 CLFITAsmNE = 915,
931 CLFITAsmNH = 916,
932 CLFITAsmNHE = 917,
933 CLFITAsmNL = 918,
934 CLFITAsmNLE = 919,
935 CLFITAsmNLH = 920,
936 CLFXBR = 921,
937 CLFXTR = 922,
938 CLG = 923,
939 CLGDBR = 924,
940 CLGDTR = 925,
941 CLGEBR = 926,
942 CLGF = 927,
943 CLGFI = 928,
944 CLGFR = 929,
945 CLGFRL = 930,
946 CLGHRL = 931,
947 CLGHSI = 932,
948 CLGIB = 933,
949 CLGIBAsm = 934,
950 CLGIBAsmE = 935,
951 CLGIBAsmH = 936,
952 CLGIBAsmHE = 937,
953 CLGIBAsmL = 938,
954 CLGIBAsmLE = 939,
955 CLGIBAsmLH = 940,
956 CLGIBAsmNE = 941,
957 CLGIBAsmNH = 942,
958 CLGIBAsmNHE = 943,
959 CLGIBAsmNL = 944,
960 CLGIBAsmNLE = 945,
961 CLGIBAsmNLH = 946,
962 CLGIJ = 947,
963 CLGIJAsm = 948,
964 CLGIJAsmE = 949,
965 CLGIJAsmH = 950,
966 CLGIJAsmHE = 951,
967 CLGIJAsmL = 952,
968 CLGIJAsmLE = 953,
969 CLGIJAsmLH = 954,
970 CLGIJAsmNE = 955,
971 CLGIJAsmNH = 956,
972 CLGIJAsmNHE = 957,
973 CLGIJAsmNL = 958,
974 CLGIJAsmNLE = 959,
975 CLGIJAsmNLH = 960,
976 CLGIT = 961,
977 CLGITAsm = 962,
978 CLGITAsmE = 963,
979 CLGITAsmH = 964,
980 CLGITAsmHE = 965,
981 CLGITAsmL = 966,
982 CLGITAsmLE = 967,
983 CLGITAsmLH = 968,
984 CLGITAsmNE = 969,
985 CLGITAsmNH = 970,
986 CLGITAsmNHE = 971,
987 CLGITAsmNL = 972,
988 CLGITAsmNLE = 973,
989 CLGITAsmNLH = 974,
990 CLGR = 975,
991 CLGRB = 976,
992 CLGRBAsm = 977,
993 CLGRBAsmE = 978,
994 CLGRBAsmH = 979,
995 CLGRBAsmHE = 980,
996 CLGRBAsmL = 981,
997 CLGRBAsmLE = 982,
998 CLGRBAsmLH = 983,
999 CLGRBAsmNE = 984,
1000 CLGRBAsmNH = 985,
1001 CLGRBAsmNHE = 986,
1002 CLGRBAsmNL = 987,
1003 CLGRBAsmNLE = 988,
1004 CLGRBAsmNLH = 989,
1005 CLGRJ = 990,
1006 CLGRJAsm = 991,
1007 CLGRJAsmE = 992,
1008 CLGRJAsmH = 993,
1009 CLGRJAsmHE = 994,
1010 CLGRJAsmL = 995,
1011 CLGRJAsmLE = 996,
1012 CLGRJAsmLH = 997,
1013 CLGRJAsmNE = 998,
1014 CLGRJAsmNH = 999,
1015 CLGRJAsmNHE = 1000,
1016 CLGRJAsmNL = 1001,
1017 CLGRJAsmNLE = 1002,
1018 CLGRJAsmNLH = 1003,
1019 CLGRL = 1004,
1020 CLGRT = 1005,
1021 CLGRTAsm = 1006,
1022 CLGRTAsmE = 1007,
1023 CLGRTAsmH = 1008,
1024 CLGRTAsmHE = 1009,
1025 CLGRTAsmL = 1010,
1026 CLGRTAsmLE = 1011,
1027 CLGRTAsmLH = 1012,
1028 CLGRTAsmNE = 1013,
1029 CLGRTAsmNH = 1014,
1030 CLGRTAsmNHE = 1015,
1031 CLGRTAsmNL = 1016,
1032 CLGRTAsmNLE = 1017,
1033 CLGRTAsmNLH = 1018,
1034 CLGT = 1019,
1035 CLGTAsm = 1020,
1036 CLGTAsmE = 1021,
1037 CLGTAsmH = 1022,
1038 CLGTAsmHE = 1023,
1039 CLGTAsmL = 1024,
1040 CLGTAsmLE = 1025,
1041 CLGTAsmLH = 1026,
1042 CLGTAsmNE = 1027,
1043 CLGTAsmNH = 1028,
1044 CLGTAsmNHE = 1029,
1045 CLGTAsmNL = 1030,
1046 CLGTAsmNLE = 1031,
1047 CLGTAsmNLH = 1032,
1048 CLGXBR = 1033,
1049 CLGXTR = 1034,
1050 CLHF = 1035,
1051 CLHHR = 1036,
1052 CLHHSI = 1037,
1053 CLHLR = 1038,
1054 CLHRL = 1039,
1055 CLI = 1040,
1056 CLIB = 1041,
1057 CLIBAsm = 1042,
1058 CLIBAsmE = 1043,
1059 CLIBAsmH = 1044,
1060 CLIBAsmHE = 1045,
1061 CLIBAsmL = 1046,
1062 CLIBAsmLE = 1047,
1063 CLIBAsmLH = 1048,
1064 CLIBAsmNE = 1049,
1065 CLIBAsmNH = 1050,
1066 CLIBAsmNHE = 1051,
1067 CLIBAsmNL = 1052,
1068 CLIBAsmNLE = 1053,
1069 CLIBAsmNLH = 1054,
1070 CLIH = 1055,
1071 CLIJ = 1056,
1072 CLIJAsm = 1057,
1073 CLIJAsmE = 1058,
1074 CLIJAsmH = 1059,
1075 CLIJAsmHE = 1060,
1076 CLIJAsmL = 1061,
1077 CLIJAsmLE = 1062,
1078 CLIJAsmLH = 1063,
1079 CLIJAsmNE = 1064,
1080 CLIJAsmNH = 1065,
1081 CLIJAsmNHE = 1066,
1082 CLIJAsmNL = 1067,
1083 CLIJAsmNLE = 1068,
1084 CLIJAsmNLH = 1069,
1085 CLIY = 1070,
1086 CLM = 1071,
1087 CLMH = 1072,
1088 CLMY = 1073,
1089 CLR = 1074,
1090 CLRB = 1075,
1091 CLRBAsm = 1076,
1092 CLRBAsmE = 1077,
1093 CLRBAsmH = 1078,
1094 CLRBAsmHE = 1079,
1095 CLRBAsmL = 1080,
1096 CLRBAsmLE = 1081,
1097 CLRBAsmLH = 1082,
1098 CLRBAsmNE = 1083,
1099 CLRBAsmNH = 1084,
1100 CLRBAsmNHE = 1085,
1101 CLRBAsmNL = 1086,
1102 CLRBAsmNLE = 1087,
1103 CLRBAsmNLH = 1088,
1104 CLRJ = 1089,
1105 CLRJAsm = 1090,
1106 CLRJAsmE = 1091,
1107 CLRJAsmH = 1092,
1108 CLRJAsmHE = 1093,
1109 CLRJAsmL = 1094,
1110 CLRJAsmLE = 1095,
1111 CLRJAsmLH = 1096,
1112 CLRJAsmNE = 1097,
1113 CLRJAsmNH = 1098,
1114 CLRJAsmNHE = 1099,
1115 CLRJAsmNL = 1100,
1116 CLRJAsmNLE = 1101,
1117 CLRJAsmNLH = 1102,
1118 CLRL = 1103,
1119 CLRT = 1104,
1120 CLRTAsm = 1105,
1121 CLRTAsmE = 1106,
1122 CLRTAsmH = 1107,
1123 CLRTAsmHE = 1108,
1124 CLRTAsmL = 1109,
1125 CLRTAsmLE = 1110,
1126 CLRTAsmLH = 1111,
1127 CLRTAsmNE = 1112,
1128 CLRTAsmNH = 1113,
1129 CLRTAsmNHE = 1114,
1130 CLRTAsmNL = 1115,
1131 CLRTAsmNLE = 1116,
1132 CLRTAsmNLH = 1117,
1133 CLST = 1118,
1134 CLT = 1119,
1135 CLTAsm = 1120,
1136 CLTAsmE = 1121,
1137 CLTAsmH = 1122,
1138 CLTAsmHE = 1123,
1139 CLTAsmL = 1124,
1140 CLTAsmLE = 1125,
1141 CLTAsmLH = 1126,
1142 CLTAsmNE = 1127,
1143 CLTAsmNH = 1128,
1144 CLTAsmNHE = 1129,
1145 CLTAsmNL = 1130,
1146 CLTAsmNLE = 1131,
1147 CLTAsmNLH = 1132,
1148 CLY = 1133,
1149 CMPSC = 1134,
1150 CP = 1135,
1151 CPDT = 1136,
1152 CPSDRdd = 1137,
1153 CPSDRds = 1138,
1154 CPSDRsd = 1139,
1155 CPSDRss = 1140,
1156 CPXT = 1141,
1157 CPYA = 1142,
1158 CR = 1143,
1159 CRB = 1144,
1160 CRBAsm = 1145,
1161 CRBAsmE = 1146,
1162 CRBAsmH = 1147,
1163 CRBAsmHE = 1148,
1164 CRBAsmL = 1149,
1165 CRBAsmLE = 1150,
1166 CRBAsmLH = 1151,
1167 CRBAsmNE = 1152,
1168 CRBAsmNH = 1153,
1169 CRBAsmNHE = 1154,
1170 CRBAsmNL = 1155,
1171 CRBAsmNLE = 1156,
1172 CRBAsmNLH = 1157,
1173 CRDTE = 1158,
1174 CRDTEOpt = 1159,
1175 CRJ = 1160,
1176 CRJAsm = 1161,
1177 CRJAsmE = 1162,
1178 CRJAsmH = 1163,
1179 CRJAsmHE = 1164,
1180 CRJAsmL = 1165,
1181 CRJAsmLE = 1166,
1182 CRJAsmLH = 1167,
1183 CRJAsmNE = 1168,
1184 CRJAsmNH = 1169,
1185 CRJAsmNHE = 1170,
1186 CRJAsmNL = 1171,
1187 CRJAsmNLE = 1172,
1188 CRJAsmNLH = 1173,
1189 CRL = 1174,
1190 CRT = 1175,
1191 CRTAsm = 1176,
1192 CRTAsmE = 1177,
1193 CRTAsmH = 1178,
1194 CRTAsmHE = 1179,
1195 CRTAsmL = 1180,
1196 CRTAsmLE = 1181,
1197 CRTAsmLH = 1182,
1198 CRTAsmNE = 1183,
1199 CRTAsmNH = 1184,
1200 CRTAsmNHE = 1185,
1201 CRTAsmNL = 1186,
1202 CRTAsmNLE = 1187,
1203 CRTAsmNLH = 1188,
1204 CS = 1189,
1205 CSCH = 1190,
1206 CSDTR = 1191,
1207 CSG = 1192,
1208 CSP = 1193,
1209 CSPG = 1194,
1210 CSST = 1195,
1211 CSXTR = 1196,
1212 CSY = 1197,
1213 CU12 = 1198,
1214 CU12Opt = 1199,
1215 CU14 = 1200,
1216 CU14Opt = 1201,
1217 CU21 = 1202,
1218 CU21Opt = 1203,
1219 CU24 = 1204,
1220 CU24Opt = 1205,
1221 CU41 = 1206,
1222 CU42 = 1207,
1223 CUDTR = 1208,
1224 CUSE = 1209,
1225 CUTFU = 1210,
1226 CUTFUOpt = 1211,
1227 CUUTF = 1212,
1228 CUUTFOpt = 1213,
1229 CUXTR = 1214,
1230 CVB = 1215,
1231 CVBG = 1216,
1232 CVBY = 1217,
1233 CVD = 1218,
1234 CVDG = 1219,
1235 CVDY = 1220,
1236 CXBR = 1221,
1237 CXFBR = 1222,
1238 CXFBRA = 1223,
1239 CXFR = 1224,
1240 CXFTR = 1225,
1241 CXGBR = 1226,
1242 CXGBRA = 1227,
1243 CXGR = 1228,
1244 CXGTR = 1229,
1245 CXGTRA = 1230,
1246 CXLFBR = 1231,
1247 CXLFTR = 1232,
1248 CXLGBR = 1233,
1249 CXLGTR = 1234,
1250 CXPT = 1235,
1251 CXR = 1236,
1252 CXSTR = 1237,
1253 CXTR = 1238,
1254 CXUTR = 1239,
1255 CXZT = 1240,
1256 CY = 1241,
1257 CZDT = 1242,
1258 CZXT = 1243,
1259 D = 1244,
1260 DD = 1245,
1261 DDB = 1246,
1262 DDBR = 1247,
1263 DDR = 1248,
1264 DDTR = 1249,
1265 DDTRA = 1250,
1266 DE = 1251,
1267 DEB = 1252,
1268 DEBR = 1253,
1269 DER = 1254,
1270 DFLTCC = 1255,
1271 DIAG = 1256,
1272 DIDBR = 1257,
1273 DIEBR = 1258,
1274 DL = 1259,
1275 DLG = 1260,
1276 DLGR = 1261,
1277 DLR = 1262,
1278 DP = 1263,
1279 DR = 1264,
1280 DSG = 1265,
1281 DSGF = 1266,
1282 DSGFR = 1267,
1283 DSGR = 1268,
1284 DXBR = 1269,
1285 DXR = 1270,
1286 DXTR = 1271,
1287 DXTRA = 1272,
1288 EAR = 1273,
1289 ECAG = 1274,
1290 ECCTR = 1275,
1291 ECPGA = 1276,
1292 ECTG = 1277,
1293 ED = 1278,
1294 EDMK = 1279,
1295 EEDTR = 1280,
1296 EEXTR = 1281,
1297 EFPC = 1282,
1298 EPAIR = 1283,
1299 EPAR = 1284,
1300 EPCTR = 1285,
1301 EPSW = 1286,
1302 EREG = 1287,
1303 EREGG = 1288,
1304 ESAIR = 1289,
1305 ESAR = 1290,
1306 ESDTR = 1291,
1307 ESEA = 1292,
1308 ESTA = 1293,
1309 ESXTR = 1294,
1310 ETND = 1295,
1311 EX = 1296,
1312 EXRL = 1297,
1313 FIDBR = 1298,
1314 FIDBRA = 1299,
1315 FIDR = 1300,
1316 FIDTR = 1301,
1317 FIEBR = 1302,
1318 FIEBRA = 1303,
1319 FIER = 1304,
1320 FIXBR = 1305,
1321 FIXBRA = 1306,
1322 FIXR = 1307,
1323 FIXTR = 1308,
1324 FLOGR = 1309,
1325 HDR = 1310,
1326 HER = 1311,
1327 HSCH = 1312,
1328 IAC = 1313,
1329 IC = 1314,
1330 IC32 = 1315,
1331 IC32Y = 1316,
1332 ICM = 1317,
1333 ICMH = 1318,
1334 ICMY = 1319,
1335 ICY = 1320,
1336 IDTE = 1321,
1337 IDTEOpt = 1322,
1338 IEDTR = 1323,
1339 IEXTR = 1324,
1340 IIHF = 1325,
1341 IIHH = 1326,
1342 IIHL = 1327,
1343 IILF = 1328,
1344 IILH = 1329,
1345 IILL = 1330,
1346 IPK = 1331,
1347 IPM = 1332,
1348 IPTE = 1333,
1349 IPTEOpt = 1334,
1350 IPTEOptOpt = 1335,
1351 IRBM = 1336,
1352 ISKE = 1337,
1353 IVSK = 1338,
1354 InsnE = 1339,
1355 InsnRI = 1340,
1356 InsnRIE = 1341,
1357 InsnRIL = 1342,
1358 InsnRILU = 1343,
1359 InsnRIS = 1344,
1360 InsnRR = 1345,
1361 InsnRRE = 1346,
1362 InsnRRF = 1347,
1363 InsnRRS = 1348,
1364 InsnRS = 1349,
1365 InsnRSE = 1350,
1366 InsnRSI = 1351,
1367 InsnRSY = 1352,
1368 InsnRX = 1353,
1369 InsnRXE = 1354,
1370 InsnRXF = 1355,
1371 InsnRXY = 1356,
1372 InsnS = 1357,
1373 InsnSI = 1358,
1374 InsnSIL = 1359,
1375 InsnSIY = 1360,
1376 InsnSS = 1361,
1377 InsnSSE = 1362,
1378 InsnSSF = 1363,
1379 InsnVRI = 1364,
1380 InsnVRR = 1365,
1381 InsnVRS = 1366,
1382 InsnVRV = 1367,
1383 InsnVRX = 1368,
1384 InsnVSI = 1369,
1385 J = 1370,
1386 JAsmE = 1371,
1387 JAsmH = 1372,
1388 JAsmHE = 1373,
1389 JAsmL = 1374,
1390 JAsmLE = 1375,
1391 JAsmLH = 1376,
1392 JAsmM = 1377,
1393 JAsmNE = 1378,
1394 JAsmNH = 1379,
1395 JAsmNHE = 1380,
1396 JAsmNL = 1381,
1397 JAsmNLE = 1382,
1398 JAsmNLH = 1383,
1399 JAsmNM = 1384,
1400 JAsmNO = 1385,
1401 JAsmNP = 1386,
1402 JAsmNZ = 1387,
1403 JAsmO = 1388,
1404 JAsmP = 1389,
1405 JAsmZ = 1390,
1406 JG = 1391,
1407 JGAsmE = 1392,
1408 JGAsmH = 1393,
1409 JGAsmHE = 1394,
1410 JGAsmL = 1395,
1411 JGAsmLE = 1396,
1412 JGAsmLH = 1397,
1413 JGAsmM = 1398,
1414 JGAsmNE = 1399,
1415 JGAsmNH = 1400,
1416 JGAsmNHE = 1401,
1417 JGAsmNL = 1402,
1418 JGAsmNLE = 1403,
1419 JGAsmNLH = 1404,
1420 JGAsmNM = 1405,
1421 JGAsmNO = 1406,
1422 JGAsmNP = 1407,
1423 JGAsmNZ = 1408,
1424 JGAsmO = 1409,
1425 JGAsmP = 1410,
1426 JGAsmZ = 1411,
1427 KDB = 1412,
1428 KDBR = 1413,
1429 KDSA = 1414,
1430 KDTR = 1415,
1431 KEB = 1416,
1432 KEBR = 1417,
1433 KIMD = 1418,
1434 KLMD = 1419,
1435 KM = 1420,
1436 KMA = 1421,
1437 KMAC = 1422,
1438 KMC = 1423,
1439 KMCTR = 1424,
1440 KMF = 1425,
1441 KMO = 1426,
1442 KXBR = 1427,
1443 KXTR = 1428,
1444 L = 1429,
1445 LA = 1430,
1446 LAA = 1431,
1447 LAAG = 1432,
1448 LAAL = 1433,
1449 LAALG = 1434,
1450 LAE = 1435,
1451 LAEY = 1436,
1452 LAM = 1437,
1453 LAMY = 1438,
1454 LAN = 1439,
1455 LANG = 1440,
1456 LAO = 1441,
1457 LAOG = 1442,
1458 LARL = 1443,
1459 LASP = 1444,
1460 LAT = 1445,
1461 LAX = 1446,
1462 LAXG = 1447,
1463 LAY = 1448,
1464 LB = 1449,
1465 LBEAR = 1450,
1466 LBH = 1451,
1467 LBR = 1452,
1468 LCBB = 1453,
1469 LCCTL = 1454,
1470 LCDBR = 1455,
1471 LCDFR = 1456,
1472 LCDFR_32 = 1457,
1473 LCDR = 1458,
1474 LCEBR = 1459,
1475 LCER = 1460,
1476 LCGFR = 1461,
1477 LCGR = 1462,
1478 LCR = 1463,
1479 LCTL = 1464,
1480 LCTLG = 1465,
1481 LCXBR = 1466,
1482 LCXR = 1467,
1483 LD = 1468,
1484 LDE = 1469,
1485 LDE32 = 1470,
1486 LDEB = 1471,
1487 LDEBR = 1472,
1488 LDER = 1473,
1489 LDETR = 1474,
1490 LDGR = 1475,
1491 LDR = 1476,
1492 LDR32 = 1477,
1493 LDXBR = 1478,
1494 LDXBRA = 1479,
1495 LDXR = 1480,
1496 LDXTR = 1481,
1497 LDY = 1482,
1498 LE = 1483,
1499 LEDBR = 1484,
1500 LEDBRA = 1485,
1501 LEDR = 1486,
1502 LEDTR = 1487,
1503 LER = 1488,
1504 LEXBR = 1489,
1505 LEXBRA = 1490,
1506 LEXR = 1491,
1507 LEY = 1492,
1508 LFAS = 1493,
1509 LFH = 1494,
1510 LFHAT = 1495,
1511 LFPC = 1496,
1512 LG = 1497,
1513 LGAT = 1498,
1514 LGB = 1499,
1515 LGBR = 1500,
1516 LGDR = 1501,
1517 LGF = 1502,
1518 LGFI = 1503,
1519 LGFR = 1504,
1520 LGFRL = 1505,
1521 LGG = 1506,
1522 LGH = 1507,
1523 LGHI = 1508,
1524 LGHR = 1509,
1525 LGHRL = 1510,
1526 LGR = 1511,
1527 LGRL = 1512,
1528 LGSC = 1513,
1529 LH = 1514,
1530 LHH = 1515,
1531 LHI = 1516,
1532 LHR = 1517,
1533 LHRL = 1518,
1534 LHY = 1519,
1535 LLC = 1520,
1536 LLCH = 1521,
1537 LLCR = 1522,
1538 LLGC = 1523,
1539 LLGCR = 1524,
1540 LLGF = 1525,
1541 LLGFAT = 1526,
1542 LLGFR = 1527,
1543 LLGFRL = 1528,
1544 LLGFSG = 1529,
1545 LLGH = 1530,
1546 LLGHR = 1531,
1547 LLGHRL = 1532,
1548 LLGT = 1533,
1549 LLGTAT = 1534,
1550 LLGTR = 1535,
1551 LLH = 1536,
1552 LLHH = 1537,
1553 LLHR = 1538,
1554 LLHRL = 1539,
1555 LLIHF = 1540,
1556 LLIHH = 1541,
1557 LLIHL = 1542,
1558 LLILF = 1543,
1559 LLILH = 1544,
1560 LLILL = 1545,
1561 LLZRGF = 1546,
1562 LM = 1547,
1563 LMD = 1548,
1564 LMG = 1549,
1565 LMH = 1550,
1566 LMY = 1551,
1567 LNDBR = 1552,
1568 LNDFR = 1553,
1569 LNDFR_32 = 1554,
1570 LNDR = 1555,
1571 LNEBR = 1556,
1572 LNER = 1557,
1573 LNGFR = 1558,
1574 LNGR = 1559,
1575 LNR = 1560,
1576 LNXBR = 1561,
1577 LNXR = 1562,
1578 LOC = 1563,
1579 LOCAsm = 1564,
1580 LOCAsmE = 1565,
1581 LOCAsmH = 1566,
1582 LOCAsmHE = 1567,
1583 LOCAsmL = 1568,
1584 LOCAsmLE = 1569,
1585 LOCAsmLH = 1570,
1586 LOCAsmM = 1571,
1587 LOCAsmNE = 1572,
1588 LOCAsmNH = 1573,
1589 LOCAsmNHE = 1574,
1590 LOCAsmNL = 1575,
1591 LOCAsmNLE = 1576,
1592 LOCAsmNLH = 1577,
1593 LOCAsmNM = 1578,
1594 LOCAsmNO = 1579,
1595 LOCAsmNP = 1580,
1596 LOCAsmNZ = 1581,
1597 LOCAsmO = 1582,
1598 LOCAsmP = 1583,
1599 LOCAsmZ = 1584,
1600 LOCFH = 1585,
1601 LOCFHAsm = 1586,
1602 LOCFHAsmE = 1587,
1603 LOCFHAsmH = 1588,
1604 LOCFHAsmHE = 1589,
1605 LOCFHAsmL = 1590,
1606 LOCFHAsmLE = 1591,
1607 LOCFHAsmLH = 1592,
1608 LOCFHAsmM = 1593,
1609 LOCFHAsmNE = 1594,
1610 LOCFHAsmNH = 1595,
1611 LOCFHAsmNHE = 1596,
1612 LOCFHAsmNL = 1597,
1613 LOCFHAsmNLE = 1598,
1614 LOCFHAsmNLH = 1599,
1615 LOCFHAsmNM = 1600,
1616 LOCFHAsmNO = 1601,
1617 LOCFHAsmNP = 1602,
1618 LOCFHAsmNZ = 1603,
1619 LOCFHAsmO = 1604,
1620 LOCFHAsmP = 1605,
1621 LOCFHAsmZ = 1606,
1622 LOCFHR = 1607,
1623 LOCFHRAsm = 1608,
1624 LOCFHRAsmE = 1609,
1625 LOCFHRAsmH = 1610,
1626 LOCFHRAsmHE = 1611,
1627 LOCFHRAsmL = 1612,
1628 LOCFHRAsmLE = 1613,
1629 LOCFHRAsmLH = 1614,
1630 LOCFHRAsmM = 1615,
1631 LOCFHRAsmNE = 1616,
1632 LOCFHRAsmNH = 1617,
1633 LOCFHRAsmNHE = 1618,
1634 LOCFHRAsmNL = 1619,
1635 LOCFHRAsmNLE = 1620,
1636 LOCFHRAsmNLH = 1621,
1637 LOCFHRAsmNM = 1622,
1638 LOCFHRAsmNO = 1623,
1639 LOCFHRAsmNP = 1624,
1640 LOCFHRAsmNZ = 1625,
1641 LOCFHRAsmO = 1626,
1642 LOCFHRAsmP = 1627,
1643 LOCFHRAsmZ = 1628,
1644 LOCG = 1629,
1645 LOCGAsm = 1630,
1646 LOCGAsmE = 1631,
1647 LOCGAsmH = 1632,
1648 LOCGAsmHE = 1633,
1649 LOCGAsmL = 1634,
1650 LOCGAsmLE = 1635,
1651 LOCGAsmLH = 1636,
1652 LOCGAsmM = 1637,
1653 LOCGAsmNE = 1638,
1654 LOCGAsmNH = 1639,
1655 LOCGAsmNHE = 1640,
1656 LOCGAsmNL = 1641,
1657 LOCGAsmNLE = 1642,
1658 LOCGAsmNLH = 1643,
1659 LOCGAsmNM = 1644,
1660 LOCGAsmNO = 1645,
1661 LOCGAsmNP = 1646,
1662 LOCGAsmNZ = 1647,
1663 LOCGAsmO = 1648,
1664 LOCGAsmP = 1649,
1665 LOCGAsmZ = 1650,
1666 LOCGHI = 1651,
1667 LOCGHIAsm = 1652,
1668 LOCGHIAsmE = 1653,
1669 LOCGHIAsmH = 1654,
1670 LOCGHIAsmHE = 1655,
1671 LOCGHIAsmL = 1656,
1672 LOCGHIAsmLE = 1657,
1673 LOCGHIAsmLH = 1658,
1674 LOCGHIAsmM = 1659,
1675 LOCGHIAsmNE = 1660,
1676 LOCGHIAsmNH = 1661,
1677 LOCGHIAsmNHE = 1662,
1678 LOCGHIAsmNL = 1663,
1679 LOCGHIAsmNLE = 1664,
1680 LOCGHIAsmNLH = 1665,
1681 LOCGHIAsmNM = 1666,
1682 LOCGHIAsmNO = 1667,
1683 LOCGHIAsmNP = 1668,
1684 LOCGHIAsmNZ = 1669,
1685 LOCGHIAsmO = 1670,
1686 LOCGHIAsmP = 1671,
1687 LOCGHIAsmZ = 1672,
1688 LOCGR = 1673,
1689 LOCGRAsm = 1674,
1690 LOCGRAsmE = 1675,
1691 LOCGRAsmH = 1676,
1692 LOCGRAsmHE = 1677,
1693 LOCGRAsmL = 1678,
1694 LOCGRAsmLE = 1679,
1695 LOCGRAsmLH = 1680,
1696 LOCGRAsmM = 1681,
1697 LOCGRAsmNE = 1682,
1698 LOCGRAsmNH = 1683,
1699 LOCGRAsmNHE = 1684,
1700 LOCGRAsmNL = 1685,
1701 LOCGRAsmNLE = 1686,
1702 LOCGRAsmNLH = 1687,
1703 LOCGRAsmNM = 1688,
1704 LOCGRAsmNO = 1689,
1705 LOCGRAsmNP = 1690,
1706 LOCGRAsmNZ = 1691,
1707 LOCGRAsmO = 1692,
1708 LOCGRAsmP = 1693,
1709 LOCGRAsmZ = 1694,
1710 LOCHHI = 1695,
1711 LOCHHIAsm = 1696,
1712 LOCHHIAsmE = 1697,
1713 LOCHHIAsmH = 1698,
1714 LOCHHIAsmHE = 1699,
1715 LOCHHIAsmL = 1700,
1716 LOCHHIAsmLE = 1701,
1717 LOCHHIAsmLH = 1702,
1718 LOCHHIAsmM = 1703,
1719 LOCHHIAsmNE = 1704,
1720 LOCHHIAsmNH = 1705,
1721 LOCHHIAsmNHE = 1706,
1722 LOCHHIAsmNL = 1707,
1723 LOCHHIAsmNLE = 1708,
1724 LOCHHIAsmNLH = 1709,
1725 LOCHHIAsmNM = 1710,
1726 LOCHHIAsmNO = 1711,
1727 LOCHHIAsmNP = 1712,
1728 LOCHHIAsmNZ = 1713,
1729 LOCHHIAsmO = 1714,
1730 LOCHHIAsmP = 1715,
1731 LOCHHIAsmZ = 1716,
1732 LOCHI = 1717,
1733 LOCHIAsm = 1718,
1734 LOCHIAsmE = 1719,
1735 LOCHIAsmH = 1720,
1736 LOCHIAsmHE = 1721,
1737 LOCHIAsmL = 1722,
1738 LOCHIAsmLE = 1723,
1739 LOCHIAsmLH = 1724,
1740 LOCHIAsmM = 1725,
1741 LOCHIAsmNE = 1726,
1742 LOCHIAsmNH = 1727,
1743 LOCHIAsmNHE = 1728,
1744 LOCHIAsmNL = 1729,
1745 LOCHIAsmNLE = 1730,
1746 LOCHIAsmNLH = 1731,
1747 LOCHIAsmNM = 1732,
1748 LOCHIAsmNO = 1733,
1749 LOCHIAsmNP = 1734,
1750 LOCHIAsmNZ = 1735,
1751 LOCHIAsmO = 1736,
1752 LOCHIAsmP = 1737,
1753 LOCHIAsmZ = 1738,
1754 LOCR = 1739,
1755 LOCRAsm = 1740,
1756 LOCRAsmE = 1741,
1757 LOCRAsmH = 1742,
1758 LOCRAsmHE = 1743,
1759 LOCRAsmL = 1744,
1760 LOCRAsmLE = 1745,
1761 LOCRAsmLH = 1746,
1762 LOCRAsmM = 1747,
1763 LOCRAsmNE = 1748,
1764 LOCRAsmNH = 1749,
1765 LOCRAsmNHE = 1750,
1766 LOCRAsmNL = 1751,
1767 LOCRAsmNLE = 1752,
1768 LOCRAsmNLH = 1753,
1769 LOCRAsmNM = 1754,
1770 LOCRAsmNO = 1755,
1771 LOCRAsmNP = 1756,
1772 LOCRAsmNZ = 1757,
1773 LOCRAsmO = 1758,
1774 LOCRAsmP = 1759,
1775 LOCRAsmZ = 1760,
1776 LPCTL = 1761,
1777 LPD = 1762,
1778 LPDBR = 1763,
1779 LPDFR = 1764,
1780 LPDFR_32 = 1765,
1781 LPDG = 1766,
1782 LPDR = 1767,
1783 LPEBR = 1768,
1784 LPER = 1769,
1785 LPGFR = 1770,
1786 LPGR = 1771,
1787 LPP = 1772,
1788 LPQ = 1773,
1789 LPR = 1774,
1790 LPSW = 1775,
1791 LPSWE = 1776,
1792 LPSWEY = 1777,
1793 LPTEA = 1778,
1794 LPXBR = 1779,
1795 LPXR = 1780,
1796 LR = 1781,
1797 LRA = 1782,
1798 LRAG = 1783,
1799 LRAY = 1784,
1800 LRDR = 1785,
1801 LRER = 1786,
1802 LRL = 1787,
1803 LRV = 1788,
1804 LRVG = 1789,
1805 LRVGR = 1790,
1806 LRVH = 1791,
1807 LRVR = 1792,
1808 LSCTL = 1793,
1809 LT = 1794,
1810 LTDBR = 1795,
1811 LTDR = 1796,
1812 LTDTR = 1797,
1813 LTEBR = 1798,
1814 LTER = 1799,
1815 LTG = 1800,
1816 LTGF = 1801,
1817 LTGFR = 1802,
1818 LTGR = 1803,
1819 LTR = 1804,
1820 LTXBR = 1805,
1821 LTXR = 1806,
1822 LTXTR = 1807,
1823 LURA = 1808,
1824 LURAG = 1809,
1825 LXD = 1810,
1826 LXDB = 1811,
1827 LXDBR = 1812,
1828 LXDR = 1813,
1829 LXDTR = 1814,
1830 LXE = 1815,
1831 LXEB = 1816,
1832 LXEBR = 1817,
1833 LXER = 1818,
1834 LXR = 1819,
1835 LY = 1820,
1836 LZDR = 1821,
1837 LZER = 1822,
1838 LZRF = 1823,
1839 LZRG = 1824,
1840 LZXR = 1825,
1841 M = 1826,
1842 MAD = 1827,
1843 MADB = 1828,
1844 MADBR = 1829,
1845 MADR = 1830,
1846 MAE = 1831,
1847 MAEB = 1832,
1848 MAEBR = 1833,
1849 MAER = 1834,
1850 MAY = 1835,
1851 MAYH = 1836,
1852 MAYHR = 1837,
1853 MAYL = 1838,
1854 MAYLR = 1839,
1855 MAYR = 1840,
1856 MC = 1841,
1857 MD = 1842,
1858 MDB = 1843,
1859 MDBR = 1844,
1860 MDE = 1845,
1861 MDEB = 1846,
1862 MDEBR = 1847,
1863 MDER = 1848,
1864 MDR = 1849,
1865 MDTR = 1850,
1866 MDTRA = 1851,
1867 ME = 1852,
1868 MEE = 1853,
1869 MEEB = 1854,
1870 MEEBR = 1855,
1871 MEER = 1856,
1872 MER = 1857,
1873 MFY = 1858,
1874 MG = 1859,
1875 MGH = 1860,
1876 MGHI = 1861,
1877 MGRK = 1862,
1878 MH = 1863,
1879 MHI = 1864,
1880 MHY = 1865,
1881 ML = 1866,
1882 MLG = 1867,
1883 MLGR = 1868,
1884 MLR = 1869,
1885 MP = 1870,
1886 MR = 1871,
1887 MS = 1872,
1888 MSC = 1873,
1889 MSCH = 1874,
1890 MSD = 1875,
1891 MSDB = 1876,
1892 MSDBR = 1877,
1893 MSDR = 1878,
1894 MSE = 1879,
1895 MSEB = 1880,
1896 MSEBR = 1881,
1897 MSER = 1882,
1898 MSFI = 1883,
1899 MSG = 1884,
1900 MSGC = 1885,
1901 MSGF = 1886,
1902 MSGFI = 1887,
1903 MSGFR = 1888,
1904 MSGR = 1889,
1905 MSGRKC = 1890,
1906 MSR = 1891,
1907 MSRKC = 1892,
1908 MSTA = 1893,
1909 MSY = 1894,
1910 MVC = 1895,
1911 MVCDK = 1896,
1912 MVCIN = 1897,
1913 MVCK = 1898,
1914 MVCL = 1899,
1915 MVCLE = 1900,
1916 MVCLU = 1901,
1917 MVCOS = 1902,
1918 MVCP = 1903,
1919 MVCRL = 1904,
1920 MVCS = 1905,
1921 MVCSK = 1906,
1922 MVGHI = 1907,
1923 MVHHI = 1908,
1924 MVHI = 1909,
1925 MVI = 1910,
1926 MVIY = 1911,
1927 MVN = 1912,
1928 MVO = 1913,
1929 MVPG = 1914,
1930 MVST = 1915,
1931 MVZ = 1916,
1932 MXBR = 1917,
1933 MXD = 1918,
1934 MXDB = 1919,
1935 MXDBR = 1920,
1936 MXDR = 1921,
1937 MXR = 1922,
1938 MXTR = 1923,
1939 MXTRA = 1924,
1940 MY = 1925,
1941 MYH = 1926,
1942 MYHR = 1927,
1943 MYL = 1928,
1944 MYLR = 1929,
1945 MYR = 1930,
1946 N = 1931,
1947 NC = 1932,
1948 NCGRK = 1933,
1949 NCRK = 1934,
1950 NG = 1935,
1951 NGR = 1936,
1952 NGRK = 1937,
1953 NI = 1938,
1954 NIAI = 1939,
1955 NIHF = 1940,
1956 NIHH = 1941,
1957 NIHL = 1942,
1958 NILF = 1943,
1959 NILH = 1944,
1960 NILL = 1945,
1961 NIY = 1946,
1962 NNGRK = 1947,
1963 NNPA = 1948,
1964 NNRK = 1949,
1965 NOGRK = 1950,
1966 NOP = 1951,
1967 NOPR = 1952,
1968 NOP_bare = 1953,
1969 NORK = 1954,
1970 NOTGR = 1955,
1971 NOTR = 1956,
1972 NR = 1957,
1973 NRK = 1958,
1974 NTSTG = 1959,
1975 NXGRK = 1960,
1976 NXRK = 1961,
1977 NY = 1962,
1978 O = 1963,
1979 OC = 1964,
1980 OCGRK = 1965,
1981 OCRK = 1966,
1982 OG = 1967,
1983 OGR = 1968,
1984 OGRK = 1969,
1985 OI = 1970,
1986 OIHF = 1971,
1987 OIHH = 1972,
1988 OIHL = 1973,
1989 OILF = 1974,
1990 OILH = 1975,
1991 OILL = 1976,
1992 OIY = 1977,
1993 OR = 1978,
1994 ORK = 1979,
1995 OY = 1980,
1996 PACK = 1981,
1997 PALB = 1982,
1998 PC = 1983,
1999 PCC = 1984,
2000 PCKMO = 1985,
2001 PFD = 1986,
2002 PFDRL = 1987,
2003 PFMF = 1988,
2004 PFPO = 1989,
2005 PGIN = 1990,
2006 PGOUT = 1991,
2007 PKA = 1992,
2008 PKU = 1993,
2009 PLO = 1994,
2010 POPCNT = 1995,
2011 POPCNTOpt = 1996,
2012 PPA = 1997,
2013 PPNO = 1998,
2014 PR = 1999,
2015 PRNO = 2000,
2016 PT = 2001,
2017 PTF = 2002,
2018 PTFF = 2003,
2019 PTI = 2004,
2020 PTLB = 2005,
2021 QADTR = 2006,
2022 QAXTR = 2007,
2023 QCTRI = 2008,
2024 QPACI = 2009,
2025 QSI = 2010,
2026 RCHP = 2011,
2027 RDP = 2012,
2028 RDPOpt = 2013,
2029 RISBG = 2014,
2030 RISBG32 = 2015,
2031 RISBGN = 2016,
2032 RISBGNZ = 2017,
2033 RISBGZ = 2018,
2034 RISBHG = 2019,
2035 RISBLG = 2020,
2036 RLL = 2021,
2037 RLLG = 2022,
2038 RNSBG = 2023,
2039 ROSBG = 2024,
2040 RP = 2025,
2041 RRBE = 2026,
2042 RRBM = 2027,
2043 RRDTR = 2028,
2044 RRXTR = 2029,
2045 RSCH = 2030,
2046 RXSBG = 2031,
2047 S = 2032,
2048 SAC = 2033,
2049 SACF = 2034,
2050 SAL = 2035,
2051 SAM24 = 2036,
2052 SAM31 = 2037,
2053 SAM64 = 2038,
2054 SAR = 2039,
2055 SCCTR = 2040,
2056 SCHM = 2041,
2057 SCK = 2042,
2058 SCKC = 2043,
2059 SCKPF = 2044,
2060 SD = 2045,
2061 SDB = 2046,
2062 SDBR = 2047,
2063 SDR = 2048,
2064 SDTR = 2049,
2065 SDTRA = 2050,
2066 SE = 2051,
2067 SEB = 2052,
2068 SEBR = 2053,
2069 SELFHR = 2054,
2070 SELFHRAsm = 2055,
2071 SELFHRAsmE = 2056,
2072 SELFHRAsmH = 2057,
2073 SELFHRAsmHE = 2058,
2074 SELFHRAsmL = 2059,
2075 SELFHRAsmLE = 2060,
2076 SELFHRAsmLH = 2061,
2077 SELFHRAsmM = 2062,
2078 SELFHRAsmNE = 2063,
2079 SELFHRAsmNH = 2064,
2080 SELFHRAsmNHE = 2065,
2081 SELFHRAsmNL = 2066,
2082 SELFHRAsmNLE = 2067,
2083 SELFHRAsmNLH = 2068,
2084 SELFHRAsmNM = 2069,
2085 SELFHRAsmNO = 2070,
2086 SELFHRAsmNP = 2071,
2087 SELFHRAsmNZ = 2072,
2088 SELFHRAsmO = 2073,
2089 SELFHRAsmP = 2074,
2090 SELFHRAsmZ = 2075,
2091 SELGR = 2076,
2092 SELGRAsm = 2077,
2093 SELGRAsmE = 2078,
2094 SELGRAsmH = 2079,
2095 SELGRAsmHE = 2080,
2096 SELGRAsmL = 2081,
2097 SELGRAsmLE = 2082,
2098 SELGRAsmLH = 2083,
2099 SELGRAsmM = 2084,
2100 SELGRAsmNE = 2085,
2101 SELGRAsmNH = 2086,
2102 SELGRAsmNHE = 2087,
2103 SELGRAsmNL = 2088,
2104 SELGRAsmNLE = 2089,
2105 SELGRAsmNLH = 2090,
2106 SELGRAsmNM = 2091,
2107 SELGRAsmNO = 2092,
2108 SELGRAsmNP = 2093,
2109 SELGRAsmNZ = 2094,
2110 SELGRAsmO = 2095,
2111 SELGRAsmP = 2096,
2112 SELGRAsmZ = 2097,
2113 SELR = 2098,
2114 SELRAsm = 2099,
2115 SELRAsmE = 2100,
2116 SELRAsmH = 2101,
2117 SELRAsmHE = 2102,
2118 SELRAsmL = 2103,
2119 SELRAsmLE = 2104,
2120 SELRAsmLH = 2105,
2121 SELRAsmM = 2106,
2122 SELRAsmNE = 2107,
2123 SELRAsmNH = 2108,
2124 SELRAsmNHE = 2109,
2125 SELRAsmNL = 2110,
2126 SELRAsmNLE = 2111,
2127 SELRAsmNLH = 2112,
2128 SELRAsmNM = 2113,
2129 SELRAsmNO = 2114,
2130 SELRAsmNP = 2115,
2131 SELRAsmNZ = 2116,
2132 SELRAsmO = 2117,
2133 SELRAsmP = 2118,
2134 SELRAsmZ = 2119,
2135 SER = 2120,
2136 SFASR = 2121,
2137 SFPC = 2122,
2138 SG = 2123,
2139 SGF = 2124,
2140 SGFR = 2125,
2141 SGH = 2126,
2142 SGR = 2127,
2143 SGRK = 2128,
2144 SH = 2129,
2145 SHHHR = 2130,
2146 SHHLR = 2131,
2147 SHY = 2132,
2148 SIE = 2133,
2149 SIGA = 2134,
2150 SIGP = 2135,
2151 SL = 2136,
2152 SLA = 2137,
2153 SLAG = 2138,
2154 SLAK = 2139,
2155 SLB = 2140,
2156 SLBG = 2141,
2157 SLBGR = 2142,
2158 SLBR = 2143,
2159 SLDA = 2144,
2160 SLDL = 2145,
2161 SLDT = 2146,
2162 SLFI = 2147,
2163 SLG = 2148,
2164 SLGF = 2149,
2165 SLGFI = 2150,
2166 SLGFR = 2151,
2167 SLGR = 2152,
2168 SLGRK = 2153,
2169 SLHHHR = 2154,
2170 SLHHLR = 2155,
2171 SLL = 2156,
2172 SLLG = 2157,
2173 SLLK = 2158,
2174 SLR = 2159,
2175 SLRK = 2160,
2176 SLXT = 2161,
2177 SLY = 2162,
2178 SORTL = 2163,
2179 SP = 2164,
2180 SPCTR = 2165,
2181 SPKA = 2166,
2182 SPM = 2167,
2183 SPT = 2168,
2184 SPX = 2169,
2185 SQD = 2170,
2186 SQDB = 2171,
2187 SQDBR = 2172,
2188 SQDR = 2173,
2189 SQE = 2174,
2190 SQEB = 2175,
2191 SQEBR = 2176,
2192 SQER = 2177,
2193 SQXBR = 2178,
2194 SQXR = 2179,
2195 SR = 2180,
2196 SRA = 2181,
2197 SRAG = 2182,
2198 SRAK = 2183,
2199 SRDA = 2184,
2200 SRDL = 2185,
2201 SRDT = 2186,
2202 SRK = 2187,
2203 SRL = 2188,
2204 SRLG = 2189,
2205 SRLK = 2190,
2206 SRNM = 2191,
2207 SRNMB = 2192,
2208 SRNMT = 2193,
2209 SRP = 2194,
2210 SRST = 2195,
2211 SRSTU = 2196,
2212 SRXT = 2197,
2213 SSAIR = 2198,
2214 SSAR = 2199,
2215 SSCH = 2200,
2216 SSKE = 2201,
2217 SSKEOpt = 2202,
2218 SSM = 2203,
2219 ST = 2204,
2220 STAM = 2205,
2221 STAMY = 2206,
2222 STAP = 2207,
2223 STBEAR = 2208,
2224 STC = 2209,
2225 STCH = 2210,
2226 STCK = 2211,
2227 STCKC = 2212,
2228 STCKE = 2213,
2229 STCKF = 2214,
2230 STCM = 2215,
2231 STCMH = 2216,
2232 STCMY = 2217,
2233 STCPS = 2218,
2234 STCRW = 2219,
2235 STCTG = 2220,
2236 STCTL = 2221,
2237 STCY = 2222,
2238 STD = 2223,
2239 STDY = 2224,
2240 STE = 2225,
2241 STEY = 2226,
2242 STFH = 2227,
2243 STFL = 2228,
2244 STFLE = 2229,
2245 STFPC = 2230,
2246 STG = 2231,
2247 STGRL = 2232,
2248 STGSC = 2233,
2249 STH = 2234,
2250 STHH = 2235,
2251 STHRL = 2236,
2252 STHY = 2237,
2253 STIDP = 2238,
2254 STM = 2239,
2255 STMG = 2240,
2256 STMH = 2241,
2257 STMY = 2242,
2258 STNSM = 2243,
2259 STOC = 2244,
2260 STOCAsm = 2245,
2261 STOCAsmE = 2246,
2262 STOCAsmH = 2247,
2263 STOCAsmHE = 2248,
2264 STOCAsmL = 2249,
2265 STOCAsmLE = 2250,
2266 STOCAsmLH = 2251,
2267 STOCAsmM = 2252,
2268 STOCAsmNE = 2253,
2269 STOCAsmNH = 2254,
2270 STOCAsmNHE = 2255,
2271 STOCAsmNL = 2256,
2272 STOCAsmNLE = 2257,
2273 STOCAsmNLH = 2258,
2274 STOCAsmNM = 2259,
2275 STOCAsmNO = 2260,
2276 STOCAsmNP = 2261,
2277 STOCAsmNZ = 2262,
2278 STOCAsmO = 2263,
2279 STOCAsmP = 2264,
2280 STOCAsmZ = 2265,
2281 STOCFH = 2266,
2282 STOCFHAsm = 2267,
2283 STOCFHAsmE = 2268,
2284 STOCFHAsmH = 2269,
2285 STOCFHAsmHE = 2270,
2286 STOCFHAsmL = 2271,
2287 STOCFHAsmLE = 2272,
2288 STOCFHAsmLH = 2273,
2289 STOCFHAsmM = 2274,
2290 STOCFHAsmNE = 2275,
2291 STOCFHAsmNH = 2276,
2292 STOCFHAsmNHE = 2277,
2293 STOCFHAsmNL = 2278,
2294 STOCFHAsmNLE = 2279,
2295 STOCFHAsmNLH = 2280,
2296 STOCFHAsmNM = 2281,
2297 STOCFHAsmNO = 2282,
2298 STOCFHAsmNP = 2283,
2299 STOCFHAsmNZ = 2284,
2300 STOCFHAsmO = 2285,
2301 STOCFHAsmP = 2286,
2302 STOCFHAsmZ = 2287,
2303 STOCG = 2288,
2304 STOCGAsm = 2289,
2305 STOCGAsmE = 2290,
2306 STOCGAsmH = 2291,
2307 STOCGAsmHE = 2292,
2308 STOCGAsmL = 2293,
2309 STOCGAsmLE = 2294,
2310 STOCGAsmLH = 2295,
2311 STOCGAsmM = 2296,
2312 STOCGAsmNE = 2297,
2313 STOCGAsmNH = 2298,
2314 STOCGAsmNHE = 2299,
2315 STOCGAsmNL = 2300,
2316 STOCGAsmNLE = 2301,
2317 STOCGAsmNLH = 2302,
2318 STOCGAsmNM = 2303,
2319 STOCGAsmNO = 2304,
2320 STOCGAsmNP = 2305,
2321 STOCGAsmNZ = 2306,
2322 STOCGAsmO = 2307,
2323 STOCGAsmP = 2308,
2324 STOCGAsmZ = 2309,
2325 STOSM = 2310,
2326 STPQ = 2311,
2327 STPT = 2312,
2328 STPX = 2313,
2329 STRAG = 2314,
2330 STRL = 2315,
2331 STRV = 2316,
2332 STRVG = 2317,
2333 STRVH = 2318,
2334 STSCH = 2319,
2335 STSI = 2320,
2336 STURA = 2321,
2337 STURG = 2322,
2338 STY = 2323,
2339 SU = 2324,
2340 SUR = 2325,
2341 SVC = 2326,
2342 SW = 2327,
2343 SWR = 2328,
2344 SXBR = 2329,
2345 SXR = 2330,
2346 SXTR = 2331,
2347 SXTRA = 2332,
2348 SY = 2333,
2349 TABORT = 2334,
2350 TAM = 2335,
2351 TAR = 2336,
2352 TB = 2337,
2353 TBDR = 2338,
2354 TBEDR = 2339,
2355 TBEGIN = 2340,
2356 TBEGINC = 2341,
2357 TCDB = 2342,
2358 TCEB = 2343,
2359 TCXB = 2344,
2360 TDCDT = 2345,
2361 TDCET = 2346,
2362 TDCXT = 2347,
2363 TDGDT = 2348,
2364 TDGET = 2349,
2365 TDGXT = 2350,
2366 TEND = 2351,
2367 THDER = 2352,
2368 THDR = 2353,
2369 TM = 2354,
2370 TMHH = 2355,
2371 TMHL = 2356,
2372 TMLH = 2357,
2373 TMLL = 2358,
2374 TMY = 2359,
2375 TP = 2360,
2376 TPEI = 2361,
2377 TPI = 2362,
2378 TPROT = 2363,
2379 TR = 2364,
2380 TRACE = 2365,
2381 TRACG = 2366,
2382 TRAP2 = 2367,
2383 TRAP4 = 2368,
2384 TRE = 2369,
2385 TROO = 2370,
2386 TROOOpt = 2371,
2387 TROT = 2372,
2388 TROTOpt = 2373,
2389 TRT = 2374,
2390 TRTE = 2375,
2391 TRTEOpt = 2376,
2392 TRTO = 2377,
2393 TRTOOpt = 2378,
2394 TRTR = 2379,
2395 TRTRE = 2380,
2396 TRTREOpt = 2381,
2397 TRTT = 2382,
2398 TRTTOpt = 2383,
2399 TS = 2384,
2400 TSCH = 2385,
2401 UNPK = 2386,
2402 UNPKA = 2387,
2403 UNPKU = 2388,
2404 UPT = 2389,
2405 VA = 2390,
2406 VAB = 2391,
2407 VAC = 2392,
2408 VACC = 2393,
2409 VACCB = 2394,
2410 VACCC = 2395,
2411 VACCCQ = 2396,
2412 VACCF = 2397,
2413 VACCG = 2398,
2414 VACCH = 2399,
2415 VACCQ = 2400,
2416 VACQ = 2401,
2417 VAF = 2402,
2418 VAG = 2403,
2419 VAH = 2404,
2420 VAP = 2405,
2421 VAQ = 2406,
2422 VAVG = 2407,
2423 VAVGB = 2408,
2424 VAVGF = 2409,
2425 VAVGG = 2410,
2426 VAVGH = 2411,
2427 VAVGL = 2412,
2428 VAVGLB = 2413,
2429 VAVGLF = 2414,
2430 VAVGLG = 2415,
2431 VAVGLH = 2416,
2432 VBPERM = 2417,
2433 VCDG = 2418,
2434 VCDGB = 2419,
2435 VCDLG = 2420,
2436 VCDLGB = 2421,
2437 VCEFB = 2422,
2438 VCELFB = 2423,
2439 VCEQ = 2424,
2440 VCEQB = 2425,
2441 VCEQBS = 2426,
2442 VCEQF = 2427,
2443 VCEQFS = 2428,
2444 VCEQG = 2429,
2445 VCEQGS = 2430,
2446 VCEQH = 2431,
2447 VCEQHS = 2432,
2448 VCFEB = 2433,
2449 VCFN = 2434,
2450 VCFPL = 2435,
2451 VCFPS = 2436,
2452 VCGD = 2437,
2453 VCGDB = 2438,
2454 VCH = 2439,
2455 VCHB = 2440,
2456 VCHBS = 2441,
2457 VCHF = 2442,
2458 VCHFS = 2443,
2459 VCHG = 2444,
2460 VCHGS = 2445,
2461 VCHH = 2446,
2462 VCHHS = 2447,
2463 VCHL = 2448,
2464 VCHLB = 2449,
2465 VCHLBS = 2450,
2466 VCHLF = 2451,
2467 VCHLFS = 2452,
2468 VCHLG = 2453,
2469 VCHLGS = 2454,
2470 VCHLH = 2455,
2471 VCHLHS = 2456,
2472 VCKSM = 2457,
2473 VCLFEB = 2458,
2474 VCLFNH = 2459,
2475 VCLFNL = 2460,
2476 VCLFP = 2461,
2477 VCLGD = 2462,
2478 VCLGDB = 2463,
2479 VCLZ = 2464,
2480 VCLZB = 2465,
2481 VCLZDP = 2466,
2482 VCLZF = 2467,
2483 VCLZG = 2468,
2484 VCLZH = 2469,
2485 VCNF = 2470,
2486 VCP = 2471,
2487 VCRNF = 2472,
2488 VCSFP = 2473,
2489 VCSPH = 2474,
2490 VCTZ = 2475,
2491 VCTZB = 2476,
2492 VCTZF = 2477,
2493 VCTZG = 2478,
2494 VCTZH = 2479,
2495 VCVB = 2480,
2496 VCVBG = 2481,
2497 VCVBGOpt = 2482,
2498 VCVBOpt = 2483,
2499 VCVD = 2484,
2500 VCVDG = 2485,
2501 VDP = 2486,
2502 VEC = 2487,
2503 VECB = 2488,
2504 VECF = 2489,
2505 VECG = 2490,
2506 VECH = 2491,
2507 VECL = 2492,
2508 VECLB = 2493,
2509 VECLF = 2494,
2510 VECLG = 2495,
2511 VECLH = 2496,
2512 VERIM = 2497,
2513 VERIMB = 2498,
2514 VERIMF = 2499,
2515 VERIMG = 2500,
2516 VERIMH = 2501,
2517 VERLL = 2502,
2518 VERLLB = 2503,
2519 VERLLF = 2504,
2520 VERLLG = 2505,
2521 VERLLH = 2506,
2522 VERLLV = 2507,
2523 VERLLVB = 2508,
2524 VERLLVF = 2509,
2525 VERLLVG = 2510,
2526 VERLLVH = 2511,
2527 VESL = 2512,
2528 VESLB = 2513,
2529 VESLF = 2514,
2530 VESLG = 2515,
2531 VESLH = 2516,
2532 VESLV = 2517,
2533 VESLVB = 2518,
2534 VESLVF = 2519,
2535 VESLVG = 2520,
2536 VESLVH = 2521,
2537 VESRA = 2522,
2538 VESRAB = 2523,
2539 VESRAF = 2524,
2540 VESRAG = 2525,
2541 VESRAH = 2526,
2542 VESRAV = 2527,
2543 VESRAVB = 2528,
2544 VESRAVF = 2529,
2545 VESRAVG = 2530,
2546 VESRAVH = 2531,
2547 VESRL = 2532,
2548 VESRLB = 2533,
2549 VESRLF = 2534,
2550 VESRLG = 2535,
2551 VESRLH = 2536,
2552 VESRLV = 2537,
2553 VESRLVB = 2538,
2554 VESRLVF = 2539,
2555 VESRLVG = 2540,
2556 VESRLVH = 2541,
2557 VFA = 2542,
2558 VFADB = 2543,
2559 VFAE = 2544,
2560 VFAEB = 2545,
2561 VFAEBS = 2546,
2562 VFAEF = 2547,
2563 VFAEFS = 2548,
2564 VFAEH = 2549,
2565 VFAEHS = 2550,
2566 VFAEZB = 2551,
2567 VFAEZBS = 2552,
2568 VFAEZF = 2553,
2569 VFAEZFS = 2554,
2570 VFAEZH = 2555,
2571 VFAEZHS = 2556,
2572 VFASB = 2557,
2573 VFCE = 2558,
2574 VFCEDB = 2559,
2575 VFCEDBS = 2560,
2576 VFCESB = 2561,
2577 VFCESBS = 2562,
2578 VFCH = 2563,
2579 VFCHDB = 2564,
2580 VFCHDBS = 2565,
2581 VFCHE = 2566,
2582 VFCHEDB = 2567,
2583 VFCHEDBS = 2568,
2584 VFCHESB = 2569,
2585 VFCHESBS = 2570,
2586 VFCHSB = 2571,
2587 VFCHSBS = 2572,
2588 VFD = 2573,
2589 VFDDB = 2574,
2590 VFDSB = 2575,
2591 VFEE = 2576,
2592 VFEEB = 2577,
2593 VFEEBS = 2578,
2594 VFEEF = 2579,
2595 VFEEFS = 2580,
2596 VFEEH = 2581,
2597 VFEEHS = 2582,
2598 VFEEZB = 2583,
2599 VFEEZBS = 2584,
2600 VFEEZF = 2585,
2601 VFEEZFS = 2586,
2602 VFEEZH = 2587,
2603 VFEEZHS = 2588,
2604 VFENE = 2589,
2605 VFENEB = 2590,
2606 VFENEBS = 2591,
2607 VFENEF = 2592,
2608 VFENEFS = 2593,
2609 VFENEH = 2594,
2610 VFENEHS = 2595,
2611 VFENEZB = 2596,
2612 VFENEZBS = 2597,
2613 VFENEZF = 2598,
2614 VFENEZFS = 2599,
2615 VFENEZH = 2600,
2616 VFENEZHS = 2601,
2617 VFI = 2602,
2618 VFIDB = 2603,
2619 VFISB = 2604,
2620 VFKEDB = 2605,
2621 VFKEDBS = 2606,
2622 VFKESB = 2607,
2623 VFKESBS = 2608,
2624 VFKHDB = 2609,
2625 VFKHDBS = 2610,
2626 VFKHEDB = 2611,
2627 VFKHEDBS = 2612,
2628 VFKHESB = 2613,
2629 VFKHESBS = 2614,
2630 VFKHSB = 2615,
2631 VFKHSBS = 2616,
2632 VFLCDB = 2617,
2633 VFLCSB = 2618,
2634 VFLL = 2619,
2635 VFLLS = 2620,
2636 VFLNDB = 2621,
2637 VFLNSB = 2622,
2638 VFLPDB = 2623,
2639 VFLPSB = 2624,
2640 VFLR = 2625,
2641 VFLRD = 2626,
2642 VFM = 2627,
2643 VFMA = 2628,
2644 VFMADB = 2629,
2645 VFMASB = 2630,
2646 VFMAX = 2631,
2647 VFMAXDB = 2632,
2648 VFMAXSB = 2633,
2649 VFMDB = 2634,
2650 VFMIN = 2635,
2651 VFMINDB = 2636,
2652 VFMINSB = 2637,
2653 VFMS = 2638,
2654 VFMSB = 2639,
2655 VFMSDB = 2640,
2656 VFMSSB = 2641,
2657 VFNMA = 2642,
2658 VFNMADB = 2643,
2659 VFNMASB = 2644,
2660 VFNMS = 2645,
2661 VFNMSDB = 2646,
2662 VFNMSSB = 2647,
2663 VFPSO = 2648,
2664 VFPSODB = 2649,
2665 VFPSOSB = 2650,
2666 VFS = 2651,
2667 VFSDB = 2652,
2668 VFSQ = 2653,
2669 VFSQDB = 2654,
2670 VFSQSB = 2655,
2671 VFSSB = 2656,
2672 VFTCI = 2657,
2673 VFTCIDB = 2658,
2674 VFTCISB = 2659,
2675 VGBM = 2660,
2676 VGEF = 2661,
2677 VGEG = 2662,
2678 VGFM = 2663,
2679 VGFMA = 2664,
2680 VGFMAB = 2665,
2681 VGFMAF = 2666,
2682 VGFMAG = 2667,
2683 VGFMAH = 2668,
2684 VGFMB = 2669,
2685 VGFMF = 2670,
2686 VGFMG = 2671,
2687 VGFMH = 2672,
2688 VGM = 2673,
2689 VGMB = 2674,
2690 VGMF = 2675,
2691 VGMG = 2676,
2692 VGMH = 2677,
2693 VISTR = 2678,
2694 VISTRB = 2679,
2695 VISTRBS = 2680,
2696 VISTRF = 2681,
2697 VISTRFS = 2682,
2698 VISTRH = 2683,
2699 VISTRHS = 2684,
2700 VL = 2685,
2701 VLAlign = 2686,
2702 VLBB = 2687,
2703 VLBR = 2688,
2704 VLBRF = 2689,
2705 VLBRG = 2690,
2706 VLBRH = 2691,
2707 VLBRQ = 2692,
2708 VLBRREP = 2693,
2709 VLBRREPF = 2694,
2710 VLBRREPG = 2695,
2711 VLBRREPH = 2696,
2712 VLC = 2697,
2713 VLCB = 2698,
2714 VLCF = 2699,
2715 VLCG = 2700,
2716 VLCH = 2701,
2717 VLDE = 2702,
2718 VLDEB = 2703,
2719 VLEB = 2704,
2720 VLEBRF = 2705,
2721 VLEBRG = 2706,
2722 VLEBRH = 2707,
2723 VLED = 2708,
2724 VLEDB = 2709,
2725 VLEF = 2710,
2726 VLEG = 2711,
2727 VLEH = 2712,
2728 VLEIB = 2713,
2729 VLEIF = 2714,
2730 VLEIG = 2715,
2731 VLEIH = 2716,
2732 VLER = 2717,
2733 VLERF = 2718,
2734 VLERG = 2719,
2735 VLERH = 2720,
2736 VLGV = 2721,
2737 VLGVB = 2722,
2738 VLGVF = 2723,
2739 VLGVG = 2724,
2740 VLGVH = 2725,
2741 VLIP = 2726,
2742 VLL = 2727,
2743 VLLEBRZ = 2728,
2744 VLLEBRZE = 2729,
2745 VLLEBRZF = 2730,
2746 VLLEBRZG = 2731,
2747 VLLEBRZH = 2732,
2748 VLLEZ = 2733,
2749 VLLEZB = 2734,
2750 VLLEZF = 2735,
2751 VLLEZG = 2736,
2752 VLLEZH = 2737,
2753 VLLEZLF = 2738,
2754 VLM = 2739,
2755 VLMAlign = 2740,
2756 VLP = 2741,
2757 VLPB = 2742,
2758 VLPF = 2743,
2759 VLPG = 2744,
2760 VLPH = 2745,
2761 VLR = 2746,
2762 VLREP = 2747,
2763 VLREPB = 2748,
2764 VLREPF = 2749,
2765 VLREPG = 2750,
2766 VLREPH = 2751,
2767 VLRL = 2752,
2768 VLRLR = 2753,
2769 VLVG = 2754,
2770 VLVGB = 2755,
2771 VLVGF = 2756,
2772 VLVGG = 2757,
2773 VLVGH = 2758,
2774 VLVGP = 2759,
2775 VMAE = 2760,
2776 VMAEB = 2761,
2777 VMAEF = 2762,
2778 VMAEH = 2763,
2779 VMAH = 2764,
2780 VMAHB = 2765,
2781 VMAHF = 2766,
2782 VMAHH = 2767,
2783 VMAL = 2768,
2784 VMALB = 2769,
2785 VMALE = 2770,
2786 VMALEB = 2771,
2787 VMALEF = 2772,
2788 VMALEH = 2773,
2789 VMALF = 2774,
2790 VMALH = 2775,
2791 VMALHB = 2776,
2792 VMALHF = 2777,
2793 VMALHH = 2778,
2794 VMALHW = 2779,
2795 VMALO = 2780,
2796 VMALOB = 2781,
2797 VMALOF = 2782,
2798 VMALOH = 2783,
2799 VMAO = 2784,
2800 VMAOB = 2785,
2801 VMAOF = 2786,
2802 VMAOH = 2787,
2803 VME = 2788,
2804 VMEB = 2789,
2805 VMEF = 2790,
2806 VMEH = 2791,
2807 VMH = 2792,
2808 VMHB = 2793,
2809 VMHF = 2794,
2810 VMHH = 2795,
2811 VML = 2796,
2812 VMLB = 2797,
2813 VMLE = 2798,
2814 VMLEB = 2799,
2815 VMLEF = 2800,
2816 VMLEH = 2801,
2817 VMLF = 2802,
2818 VMLH = 2803,
2819 VMLHB = 2804,
2820 VMLHF = 2805,
2821 VMLHH = 2806,
2822 VMLHW = 2807,
2823 VMLO = 2808,
2824 VMLOB = 2809,
2825 VMLOF = 2810,
2826 VMLOH = 2811,
2827 VMN = 2812,
2828 VMNB = 2813,
2829 VMNF = 2814,
2830 VMNG = 2815,
2831 VMNH = 2816,
2832 VMNL = 2817,
2833 VMNLB = 2818,
2834 VMNLF = 2819,
2835 VMNLG = 2820,
2836 VMNLH = 2821,
2837 VMO = 2822,
2838 VMOB = 2823,
2839 VMOF = 2824,
2840 VMOH = 2825,
2841 VMP = 2826,
2842 VMRH = 2827,
2843 VMRHB = 2828,
2844 VMRHF = 2829,
2845 VMRHG = 2830,
2846 VMRHH = 2831,
2847 VMRL = 2832,
2848 VMRLB = 2833,
2849 VMRLF = 2834,
2850 VMRLG = 2835,
2851 VMRLH = 2836,
2852 VMSL = 2837,
2853 VMSLG = 2838,
2854 VMSP = 2839,
2855 VMX = 2840,
2856 VMXB = 2841,
2857 VMXF = 2842,
2858 VMXG = 2843,
2859 VMXH = 2844,
2860 VMXL = 2845,
2861 VMXLB = 2846,
2862 VMXLF = 2847,
2863 VMXLG = 2848,
2864 VMXLH = 2849,
2865 VN = 2850,
2866 VNC = 2851,
2867 VNN = 2852,
2868 VNO = 2853,
2869 VNX = 2854,
2870 VO = 2855,
2871 VOC = 2856,
2872 VONE = 2857,
2873 VPDI = 2858,
2874 VPERM = 2859,
2875 VPK = 2860,
2876 VPKF = 2861,
2877 VPKG = 2862,
2878 VPKH = 2863,
2879 VPKLS = 2864,
2880 VPKLSF = 2865,
2881 VPKLSFS = 2866,
2882 VPKLSG = 2867,
2883 VPKLSGS = 2868,
2884 VPKLSH = 2869,
2885 VPKLSHS = 2870,
2886 VPKS = 2871,
2887 VPKSF = 2872,
2888 VPKSFS = 2873,
2889 VPKSG = 2874,
2890 VPKSGS = 2875,
2891 VPKSH = 2876,
2892 VPKSHS = 2877,
2893 VPKZ = 2878,
2894 VPKZR = 2879,
2895 VPOPCT = 2880,
2896 VPOPCTB = 2881,
2897 VPOPCTF = 2882,
2898 VPOPCTG = 2883,
2899 VPOPCTH = 2884,
2900 VPSOP = 2885,
2901 VREP = 2886,
2902 VREPB = 2887,
2903 VREPF = 2888,
2904 VREPG = 2889,
2905 VREPH = 2890,
2906 VREPI = 2891,
2907 VREPIB = 2892,
2908 VREPIF = 2893,
2909 VREPIG = 2894,
2910 VREPIH = 2895,
2911 VRP = 2896,
2912 VS = 2897,
2913 VSB = 2898,
2914 VSBCBI = 2899,
2915 VSBCBIQ = 2900,
2916 VSBI = 2901,
2917 VSBIQ = 2902,
2918 VSCBI = 2903,
2919 VSCBIB = 2904,
2920 VSCBIF = 2905,
2921 VSCBIG = 2906,
2922 VSCBIH = 2907,
2923 VSCBIQ = 2908,
2924 VSCEF = 2909,
2925 VSCEG = 2910,
2926 VSCHDP = 2911,
2927 VSCHP = 2912,
2928 VSCHSP = 2913,
2929 VSCHXP = 2914,
2930 VSCSHP = 2915,
2931 VSDP = 2916,
2932 VSEG = 2917,
2933 VSEGB = 2918,
2934 VSEGF = 2919,
2935 VSEGH = 2920,
2936 VSEL = 2921,
2937 VSF = 2922,
2938 VSG = 2923,
2939 VSH = 2924,
2940 VSL = 2925,
2941 VSLB = 2926,
2942 VSLD = 2927,
2943 VSLDB = 2928,
2944 VSP = 2929,
2945 VSQ = 2930,
2946 VSRA = 2931,
2947 VSRAB = 2932,
2948 VSRD = 2933,
2949 VSRL = 2934,
2950 VSRLB = 2935,
2951 VSRP = 2936,
2952 VSRPR = 2937,
2953 VST = 2938,
2954 VSTAlign = 2939,
2955 VSTBR = 2940,
2956 VSTBRF = 2941,
2957 VSTBRG = 2942,
2958 VSTBRH = 2943,
2959 VSTBRQ = 2944,
2960 VSTEB = 2945,
2961 VSTEBRF = 2946,
2962 VSTEBRG = 2947,
2963 VSTEBRH = 2948,
2964 VSTEF = 2949,
2965 VSTEG = 2950,
2966 VSTEH = 2951,
2967 VSTER = 2952,
2968 VSTERF = 2953,
2969 VSTERG = 2954,
2970 VSTERH = 2955,
2971 VSTL = 2956,
2972 VSTM = 2957,
2973 VSTMAlign = 2958,
2974 VSTRC = 2959,
2975 VSTRCB = 2960,
2976 VSTRCBS = 2961,
2977 VSTRCF = 2962,
2978 VSTRCFS = 2963,
2979 VSTRCH = 2964,
2980 VSTRCHS = 2965,
2981 VSTRCZB = 2966,
2982 VSTRCZBS = 2967,
2983 VSTRCZF = 2968,
2984 VSTRCZFS = 2969,
2985 VSTRCZH = 2970,
2986 VSTRCZHS = 2971,
2987 VSTRL = 2972,
2988 VSTRLR = 2973,
2989 VSTRS = 2974,
2990 VSTRSB = 2975,
2991 VSTRSF = 2976,
2992 VSTRSH = 2977,
2993 VSTRSZB = 2978,
2994 VSTRSZF = 2979,
2995 VSTRSZH = 2980,
2996 VSUM = 2981,
2997 VSUMB = 2982,
2998 VSUMG = 2983,
2999 VSUMGF = 2984,
3000 VSUMGH = 2985,
3001 VSUMH = 2986,
3002 VSUMQ = 2987,
3003 VSUMQF = 2988,
3004 VSUMQG = 2989,
3005 VTM = 2990,
3006 VTP = 2991,
3007 VUPH = 2992,
3008 VUPHB = 2993,
3009 VUPHF = 2994,
3010 VUPHH = 2995,
3011 VUPKZ = 2996,
3012 VUPKZH = 2997,
3013 VUPKZL = 2998,
3014 VUPL = 2999,
3015 VUPLB = 3000,
3016 VUPLF = 3001,
3017 VUPLH = 3002,
3018 VUPLHB = 3003,
3019 VUPLHF = 3004,
3020 VUPLHH = 3005,
3021 VUPLHW = 3006,
3022 VUPLL = 3007,
3023 VUPLLB = 3008,
3024 VUPLLF = 3009,
3025 VUPLLH = 3010,
3026 VX = 3011,
3027 VZERO = 3012,
3028 WCDGB = 3013,
3029 WCDLGB = 3014,
3030 WCEFB = 3015,
3031 WCELFB = 3016,
3032 WCFEB = 3017,
3033 WCGDB = 3018,
3034 WCLFEB = 3019,
3035 WCLGDB = 3020,
3036 WFADB = 3021,
3037 WFASB = 3022,
3038 WFAXB = 3023,
3039 WFC = 3024,
3040 WFCDB = 3025,
3041 WFCEDB = 3026,
3042 WFCEDBS = 3027,
3043 WFCESB = 3028,
3044 WFCESBS = 3029,
3045 WFCEXB = 3030,
3046 WFCEXBS = 3031,
3047 WFCHDB = 3032,
3048 WFCHDBS = 3033,
3049 WFCHEDB = 3034,
3050 WFCHEDBS = 3035,
3051 WFCHESB = 3036,
3052 WFCHESBS = 3037,
3053 WFCHEXB = 3038,
3054 WFCHEXBS = 3039,
3055 WFCHSB = 3040,
3056 WFCHSBS = 3041,
3057 WFCHXB = 3042,
3058 WFCHXBS = 3043,
3059 WFCSB = 3044,
3060 WFCXB = 3045,
3061 WFDDB = 3046,
3062 WFDSB = 3047,
3063 WFDXB = 3048,
3064 WFIDB = 3049,
3065 WFISB = 3050,
3066 WFIXB = 3051,
3067 WFK = 3052,
3068 WFKDB = 3053,
3069 WFKEDB = 3054,
3070 WFKEDBS = 3055,
3071 WFKESB = 3056,
3072 WFKESBS = 3057,
3073 WFKEXB = 3058,
3074 WFKEXBS = 3059,
3075 WFKHDB = 3060,
3076 WFKHDBS = 3061,
3077 WFKHEDB = 3062,
3078 WFKHEDBS = 3063,
3079 WFKHESB = 3064,
3080 WFKHESBS = 3065,
3081 WFKHEXB = 3066,
3082 WFKHEXBS = 3067,
3083 WFKHSB = 3068,
3084 WFKHSBS = 3069,
3085 WFKHXB = 3070,
3086 WFKHXBS = 3071,
3087 WFKSB = 3072,
3088 WFKXB = 3073,
3089 WFLCDB = 3074,
3090 WFLCSB = 3075,
3091 WFLCXB = 3076,
3092 WFLLD = 3077,
3093 WFLLS = 3078,
3094 WFLNDB = 3079,
3095 WFLNSB = 3080,
3096 WFLNXB = 3081,
3097 WFLPDB = 3082,
3098 WFLPSB = 3083,
3099 WFLPXB = 3084,
3100 WFLRD = 3085,
3101 WFLRX = 3086,
3102 WFMADB = 3087,
3103 WFMASB = 3088,
3104 WFMAXB = 3089,
3105 WFMAXDB = 3090,
3106 WFMAXSB = 3091,
3107 WFMAXXB = 3092,
3108 WFMDB = 3093,
3109 WFMINDB = 3094,
3110 WFMINSB = 3095,
3111 WFMINXB = 3096,
3112 WFMSB = 3097,
3113 WFMSDB = 3098,
3114 WFMSSB = 3099,
3115 WFMSXB = 3100,
3116 WFMXB = 3101,
3117 WFNMADB = 3102,
3118 WFNMASB = 3103,
3119 WFNMAXB = 3104,
3120 WFNMSDB = 3105,
3121 WFNMSSB = 3106,
3122 WFNMSXB = 3107,
3123 WFPSODB = 3108,
3124 WFPSOSB = 3109,
3125 WFPSOXB = 3110,
3126 WFSDB = 3111,
3127 WFSQDB = 3112,
3128 WFSQSB = 3113,
3129 WFSQXB = 3114,
3130 WFSSB = 3115,
3131 WFSXB = 3116,
3132 WFTCIDB = 3117,
3133 WFTCISB = 3118,
3134 WFTCIXB = 3119,
3135 WLDEB = 3120,
3136 WLEDB = 3121,
3137 X = 3122,
3138 XC = 3123,
3139 XG = 3124,
3140 XGR = 3125,
3141 XGRK = 3126,
3142 XI = 3127,
3143 XIHF = 3128,
3144 XILF = 3129,
3145 XIY = 3130,
3146 XR = 3131,
3147 XRK = 3132,
3148 XSCH = 3133,
3149 XY = 3134,
3150 ZAP = 3135,
3151 INSTRUCTION_LIST_END = 3136
3152 };
3153
3154} // end namespace SystemZ
3155} // end namespace llvm
3156#endif // GET_INSTRINFO_ENUM
3157
3158#ifdef GET_INSTRINFO_SCHED_ENUM
3159#undef GET_INSTRINFO_SCHED_ENUM
3160namespace llvm {
3161
3162namespace SystemZ {
3163namespace Sched {
3164 enum {
3165 NoInstrModel = 0,
3166 ADJDYNALLOC = 1,
3167 CallBRCL_BRC_BRCAsm_BRCL_BRCLAsm = 2,
3168 CallJG_J_JAsmE_JAsmH_JAsmHE_JAsmL_JAsmLE_JAsmLH_JAsmM_JAsmNE_JAsmNH_JAsmNHE_JAsmNL_JAsmNLE_JAsmNLH_JAsmNM_JAsmNO_JAsmNP_JAsmNZ_JAsmO_JAsmP_JAsmZ_JG_JGAsmE_JGAsmH_JGAsmHE_JGAsmL_JGAsmLE_JGAsmLH_JGAsmM_JGAsmNE_JGAsmNH_JGAsmNHE_JGAsmNL_JGAsmNLE_JGAsmNLH_JGAsmNM_JGAsmNO_JGAsmNP_JGAsmNZ_JGAsmO_JGAsmP_JGAsmZ = 3,
3169 CallBCR_BC_BCAsm_BCR_BCRAsm = 4,
3170 CallBR_B_BAsmE_BAsmH_BAsmHE_BAsmL_BAsmLE_BAsmLH_BAsmM_BAsmNE_BAsmNH_BAsmNHE_BAsmNL_BAsmNLE_BAsmNLH_BAsmNM_BAsmNO_BAsmNP_BAsmNZ_BAsmO_BAsmP_BAsmZ_BR_BRAsmE_BRAsmH_BRAsmHE_BRAsmL_BRAsmLE_BRAsmLH_BRAsmM_BRAsmNE_BRAsmNH_BRAsmNHE_BRAsmNL_BRAsmNLE_BRAsmNLH_BRAsmNM_BRAsmNO_BRAsmNP_BRAsmNZ_BRAsmO_BRAsmP_BRAsmZ = 5,
3171 BI_BIAsmE_BIAsmH_BIAsmHE_BIAsmL_BIAsmLE_BIAsmLH_BIAsmM_BIAsmNE_BIAsmNH_BIAsmNHE_BIAsmNL_BIAsmNLE_BIAsmNLH_BIAsmNM_BIAsmNO_BIAsmNP_BIAsmNZ_BIAsmO_BIAsmP_BIAsmZ_BIC_BICAsm = 6,
3172 BRCT_BRCTG = 7,
3173 BRCTH = 8,
3174 BCT_BCTG_BCTGR_BCTR = 9,
3175 BRXH_BRXHG_BRXLE_BRXLG_BXH_BXHG_BXLE_BXLEG = 10,
3176 CGIJ_CGIJAsm_CGIJAsmE_CGIJAsmH_CGIJAsmHE_CGIJAsmL_CGIJAsmLE_CGIJAsmLH_CGIJAsmNE_CGIJAsmNH_CGIJAsmNHE_CGIJAsmNL_CGIJAsmNLE_CGIJAsmNLH_CGRJ_CGRJAsm_CGRJAsmE_CGRJAsmH_CGRJAsmHE_CGRJAsmL_CGRJAsmLE_CGRJAsmLH_CGRJAsmNE_CGRJAsmNH_CGRJAsmNHE_CGRJAsmNL_CGRJAsmNLE_CGRJAsmNLH_CIJ_CIJAsm_CIJAsmE_CIJAsmH_CIJAsmHE_CIJAsmL_CIJAsmLE_CIJAsmLH_CIJAsmNE_CIJAsmNH_CIJAsmNHE_CIJAsmNL_CIJAsmNLE_CIJAsmNLH_CLGIJ_CLGIJAsm_CLGIJAsmE_CLGIJAsmH_CLGIJAsmHE_CLGIJAsmL_CLGIJAsmLE_CLGIJAsmLH_CLGIJAsmNE_CLGIJAsmNH_CLGIJAsmNHE_CLGIJAsmNL_CLGIJAsmNLE_CLGIJAsmNLH_CLGRJ_CLGRJAsm_CLGRJAsmE_CLGRJAsmH_CLGRJAsmHE_CLGRJAsmL_CLGRJAsmLE_CLGRJAsmLH_CLGRJAsmNE_CLGRJAsmNH_CLGRJAsmNHE_CLGRJAsmNL_CLGRJAsmNLE_CLGRJAsmNLH_CLIJ_CLIJAsm_CLIJAsmE_CLIJAsmH_CLIJAsmHE_CLIJAsmL_CLIJAsmLE_CLIJAsmLH_CLIJAsmNE_CLIJAsmNH_CLIJAsmNHE_CLIJAsmNL_CLIJAsmNLE_CLIJAsmNLH_CLRJ_CLRJAsm_CLRJAsmE_CLRJAsmH_CLRJAsmHE_CLRJAsmL_CLRJAsmLE_CLRJAsmLH_CLRJAsmNE_CLRJAsmNH_CLRJAsmNHE_CLRJAsmNL_CLRJAsmNLE_CLRJAsmNLH_CRJ_CRJAsm_CRJAsmE_CRJAsmH_CRJAsmHE_CRJAsmL_CRJAsmLE_CRJAsmLH_CRJAsmNE_CRJAsmNH_CRJAsmNHE_CRJAsmNL_CRJAsmNLE_CRJAsmNLH = 11,
3177 CGIBCall_CGIBReturn_CGRBCall_CGRBReturn_CIBCall_CIBReturn_CLGIBCall_CLGIBReturn_CLGRBCall_CLGRBReturn_CLIBCall_CLIBReturn_CLRBCall_CLRBReturn_CRBCall_CRBReturn_CGIB_CGIBAsm_CGIBAsmE_CGIBAsmH_CGIBAsmHE_CGIBAsmL_CGIBAsmLE_CGIBAsmLH_CGIBAsmNE_CGIBAsmNH_CGIBAsmNHE_CGIBAsmNL_CGIBAsmNLE_CGIBAsmNLH_CGRB_CGRBAsm_CGRBAsmE_CGRBAsmH_CGRBAsmHE_CGRBAsmL_CGRBAsmLE_CGRBAsmLH_CGRBAsmNE_CGRBAsmNH_CGRBAsmNHE_CGRBAsmNL_CGRBAsmNLE_CGRBAsmNLH_CIB_CIBAsm_CIBAsmE_CIBAsmH_CIBAsmHE_CIBAsmL_CIBAsmLE_CIBAsmLH_CIBAsmNE_CIBAsmNH_CIBAsmNHE_CIBAsmNL_CIBAsmNLE_CIBAsmNLH_CLGIB_CLGIBAsm_CLGIBAsmE_CLGIBAsmH_CLGIBAsmHE_CLGIBAsmL_CLGIBAsmLE_CLGIBAsmLH_CLGIBAsmNE_CLGIBAsmNH_CLGIBAsmNHE_CLGIBAsmNL_CLGIBAsmNLE_CLGIBAsmNLH_CLGRB_CLGRBAsm_CLGRBAsmE_CLGRBAsmH_CLGRBAsmHE_CLGRBAsmL_CLGRBAsmLE_CLGRBAsmLH_CLGRBAsmNE_CLGRBAsmNH_CLGRBAsmNHE_CLGRBAsmNL_CLGRBAsmNLE_CLGRBAsmNLH_CLIB_CLIBAsm_CLIBAsmE_CLIBAsmH_CLIBAsmHE_CLIBAsmL_CLIBAsmLE_CLIBAsmLH_CLIBAsmNE_CLIBAsmNH_CLIBAsmNHE_CLIBAsmNL_CLIBAsmNLE_CLIBAsmNLH_CLRB_CLRBAsm_CLRBAsmE_CLRBAsmH_CLRBAsmHE_CLRBAsmL_CLRBAsmLE_CLRBAsmLH_CLRBAsmNE_CLRBAsmNH_CLRBAsmNHE_CLRBAsmNL_CLRBAsmNLE_CLRBAsmNLH_CRB_CRBAsm_CRBAsmE_CRBAsmH_CRBAsmHE_CRBAsmL_CRBAsmLE_CRBAsmLH_CRBAsmNE_CRBAsmNH_CRBAsmNHE_CRBAsmNL_CRBAsmNLE_CRBAsmNLH = 12,
3178 CondTrap_Trap = 13,
3179 CGIT_CGITAsm_CGITAsmE_CGITAsmH_CGITAsmHE_CGITAsmL_CGITAsmLE_CGITAsmLH_CGITAsmNE_CGITAsmNH_CGITAsmNHE_CGITAsmNL_CGITAsmNLE_CGITAsmNLH_CGRT_CGRTAsm_CGRTAsmE_CGRTAsmH_CGRTAsmHE_CGRTAsmL_CGRTAsmLE_CGRTAsmLH_CGRTAsmNE_CGRTAsmNH_CGRTAsmNHE_CGRTAsmNL_CGRTAsmNLE_CGRTAsmNLH_CIT_CITAsm_CITAsmE_CITAsmH_CITAsmHE_CITAsmL_CITAsmLE_CITAsmLH_CITAsmNE_CITAsmNH_CITAsmNHE_CITAsmNL_CITAsmNLE_CITAsmNLH_CRT_CRTAsm_CRTAsmE_CRTAsmH_CRTAsmHE_CRTAsmL_CRTAsmLE_CRTAsmLH_CRTAsmNE_CRTAsmNH_CRTAsmNHE_CRTAsmNL_CRTAsmNLE_CRTAsmNLH = 14,
3180 CLGRT_CLGRTAsm_CLGRTAsmE_CLGRTAsmH_CLGRTAsmHE_CLGRTAsmL_CLGRTAsmLE_CLGRTAsmLH_CLGRTAsmNE_CLGRTAsmNH_CLGRTAsmNHE_CLGRTAsmNL_CLGRTAsmNLE_CLGRTAsmNLH_CLRT_CLRTAsm_CLRTAsmE_CLRTAsmH_CLRTAsmHE_CLRTAsmL_CLRTAsmLE_CLRTAsmLH_CLRTAsmNE_CLRTAsmNH_CLRTAsmNHE_CLRTAsmNL_CLRTAsmNLE_CLRTAsmNLH = 15,
3181 CLFIT_CLFITAsm_CLFITAsmE_CLFITAsmH_CLFITAsmHE_CLFITAsmL_CLFITAsmLE_CLFITAsmLH_CLFITAsmNE_CLFITAsmNH_CLFITAsmNHE_CLFITAsmNL_CLFITAsmNLE_CLFITAsmNLH_CLGIT_CLGITAsm_CLGITAsmE_CLGITAsmH_CLGITAsmHE_CLGITAsmL_CLGITAsmLE_CLGITAsmLH_CLGITAsmNE_CLGITAsmNH_CLGITAsmNHE_CLGITAsmNL_CLGITAsmNLE_CLGITAsmNLH = 16,
3182 CLGT_CLGTAsm_CLGTAsmE_CLGTAsmH_CLGTAsmHE_CLGTAsmL_CLGTAsmLE_CLGTAsmLH_CLGTAsmNE_CLGTAsmNH_CLGTAsmNHE_CLGTAsmNL_CLGTAsmNLE_CLGTAsmNLH_CLT_CLTAsm_CLTAsmE_CLTAsmH_CLTAsmHE_CLTAsmL_CLTAsmLE_CLTAsmLH_CLTAsmNE_CLTAsmNH_CLTAsmNHE_CLTAsmNL_CLTAsmNLE_CLTAsmNLH = 17,
3183 BRAS = 18,
3184 CallBRASL_CallBRASL_XPLINK64_BRASL = 19,
3185 CallBASR_CallBASR_STACKEXT_CallBASR_XPLINK64_BAS_BASR = 20,
3186 TLS_GDCALL_TLS_LDCALL = 21,
3187 Return_Return_XPLINK = 22,
3188 CondReturn_CondReturn_XPLINK = 23,
3189 MVGHI_MVHHI_MVHI = 24,
3190 MVI_MVIY = 25,
3191 MVC = 26,
3192 MVCL_MVCLE_MVCLU = 27,
3193 MVCRL = 28,
3194 COPY_TO_REGCLASS_COPY = 29,
3195 EXTRACT_SUBREG = 30,
3196 INSERT_SUBREG = 31,
3197 REG_SEQUENCE = 32,
3198 LMux_L_LFH_LRL_LY = 33,
3199 LCBB = 34,
3200 LG_LGRL = 35,
3201 L128 = 36,
3202 LLIHF_LLIHH_LLIHL = 37,
3203 LLILF_LLILH_LLILL = 38,
3204 LGFI_LGHI = 39,
3205 LHIMux_LHI = 40,
3206 LR = 41,
3207 LZRF_LZRG = 42,
3208 LAT_LFHAT_LGAT = 43,
3209 LT_LTG = 44,
3210 LTGR_LTR = 45,
3211 STG_STGRL = 46,
3212 ST128 = 47,
3213 STMux_ST_STFH_STRL_STY = 48,
3214 MVST = 49,
3215 LOCRMux = 50,
3216 LOCFHR_LOCFHRAsm_LOCFHRAsmE_LOCFHRAsmH_LOCFHRAsmHE_LOCFHRAsmL_LOCFHRAsmLE_LOCFHRAsmLH_LOCFHRAsmM_LOCFHRAsmNE_LOCFHRAsmNH_LOCFHRAsmNHE_LOCFHRAsmNL_LOCFHRAsmNLE_LOCFHRAsmNLH_LOCFHRAsmNM_LOCFHRAsmNO_LOCFHRAsmNP_LOCFHRAsmNZ_LOCFHRAsmO_LOCFHRAsmP_LOCFHRAsmZ_LOCGR_LOCGRAsm_LOCGRAsmE_LOCGRAsmH_LOCGRAsmHE_LOCGRAsmL_LOCGRAsmLE_LOCGRAsmLH_LOCGRAsmM_LOCGRAsmNE_LOCGRAsmNH_LOCGRAsmNHE_LOCGRAsmNL_LOCGRAsmNLE_LOCGRAsmNLH_LOCGRAsmNM_LOCGRAsmNO_LOCGRAsmNP_LOCGRAsmNZ_LOCGRAsmO_LOCGRAsmP_LOCGRAsmZ_LOCR_LOCRAsm_LOCRAsmE_LOCRAsmH_LOCRAsmHE_LOCRAsmL_LOCRAsmLE_LOCRAsmLH_LOCRAsmM_LOCRAsmNE_LOCRAsmNH_LOCRAsmNHE_LOCRAsmNL_LOCRAsmNLE_LOCRAsmNLH_LOCRAsmNM_LOCRAsmNO_LOCRAsmNP_LOCRAsmNZ_LOCRAsmO_LOCRAsmP_LOCRAsmZ = 51,
3217 LOCHIMux_LOCGHI_LOCGHIAsm_LOCGHIAsmE_LOCGHIAsmH_LOCGHIAsmHE_LOCGHIAsmL_LOCGHIAsmLE_LOCGHIAsmLH_LOCGHIAsmM_LOCGHIAsmNE_LOCGHIAsmNH_LOCGHIAsmNHE_LOCGHIAsmNL_LOCGHIAsmNLE_LOCGHIAsmNLH_LOCGHIAsmNM_LOCGHIAsmNO_LOCGHIAsmNP_LOCGHIAsmNZ_LOCGHIAsmO_LOCGHIAsmP_LOCGHIAsmZ_LOCHHI_LOCHHIAsm_LOCHHIAsmE_LOCHHIAsmH_LOCHHIAsmHE_LOCHHIAsmL_LOCHHIAsmLE_LOCHHIAsmLH_LOCHHIAsmM_LOCHHIAsmNE_LOCHHIAsmNH_LOCHHIAsmNHE_LOCHHIAsmNL_LOCHHIAsmNLE_LOCHHIAsmNLH_LOCHHIAsmNM_LOCHHIAsmNO_LOCHHIAsmNP_LOCHHIAsmNZ_LOCHHIAsmO_LOCHHIAsmP_LOCHHIAsmZ_LOCHI_LOCHIAsm_LOCHIAsmE_LOCHIAsmH_LOCHIAsmHE_LOCHIAsmL_LOCHIAsmLE_LOCHIAsmLH_LOCHIAsmM_LOCHIAsmNE_LOCHIAsmNH_LOCHIAsmNHE_LOCHIAsmNL_LOCHIAsmNLE_LOCHIAsmNLH_LOCHIAsmNM_LOCHIAsmNO_LOCHIAsmNP_LOCHIAsmNZ_LOCHIAsmO_LOCHIAsmP_LOCHIAsmZ = 52,
3218 LOCMux_LOC_LOCAsm_LOCAsmE_LOCAsmH_LOCAsmHE_LOCAsmL_LOCAsmLE_LOCAsmLH_LOCAsmM_LOCAsmNE_LOCAsmNH_LOCAsmNHE_LOCAsmNL_LOCAsmNLE_LOCAsmNLH_LOCAsmNM_LOCAsmNO_LOCAsmNP_LOCAsmNZ_LOCAsmO_LOCAsmP_LOCAsmZ_LOCFH_LOCFHAsm_LOCFHAsmE_LOCFHAsmH_LOCFHAsmHE_LOCFHAsmL_LOCFHAsmLE_LOCFHAsmLH_LOCFHAsmM_LOCFHAsmNE_LOCFHAsmNH_LOCFHAsmNHE_LOCFHAsmNL_LOCFHAsmNLE_LOCFHAsmNLH_LOCFHAsmNM_LOCFHAsmNO_LOCFHAsmNP_LOCFHAsmNZ_LOCFHAsmO_LOCFHAsmP_LOCFHAsmZ_LOCG_LOCGAsm_LOCGAsmE_LOCGAsmH_LOCGAsmHE_LOCGAsmL_LOCGAsmLE_LOCGAsmLH_LOCGAsmM_LOCGAsmNE_LOCGAsmNH_LOCGAsmNHE_LOCGAsmNL_LOCGAsmNLE_LOCGAsmNLH_LOCGAsmNM_LOCGAsmNO_LOCGAsmNP_LOCGAsmNZ_LOCGAsmO_LOCGAsmP_LOCGAsmZ = 53,
3219 STOCMux_STOC_STOCAsm_STOCAsmE_STOCAsmH_STOCAsmHE_STOCAsmL_STOCAsmLE_STOCAsmLH_STOCAsmM_STOCAsmNE_STOCAsmNH_STOCAsmNHE_STOCAsmNL_STOCAsmNLE_STOCAsmNLH_STOCAsmNM_STOCAsmNO_STOCAsmNP_STOCAsmNZ_STOCAsmO_STOCAsmP_STOCAsmZ_STOCFH_STOCFHAsm_STOCFHAsmE_STOCFHAsmH_STOCFHAsmHE_STOCFHAsmL_STOCFHAsmLE_STOCFHAsmLH_STOCFHAsmM_STOCFHAsmNE_STOCFHAsmNH_STOCFHAsmNHE_STOCFHAsmNL_STOCFHAsmNLE_STOCFHAsmNLH_STOCFHAsmNM_STOCFHAsmNO_STOCFHAsmNP_STOCFHAsmNZ_STOCFHAsmO_STOCFHAsmP_STOCFHAsmZ_STOCG_STOCGAsm_STOCGAsmE_STOCGAsmH_STOCGAsmHE_STOCGAsmL_STOCGAsmLE_STOCGAsmLH_STOCGAsmM_STOCGAsmNE_STOCGAsmNH_STOCGAsmNHE_STOCGAsmNL_STOCGAsmNLE_STOCGAsmNLH_STOCGAsmNM_STOCGAsmNO_STOCGAsmNP_STOCGAsmNZ_STOCGAsmO_STOCGAsmP_STOCGAsmZ = 54,
3220 SELRMux = 55,
3221 SELFHR_SELFHRAsm_SELFHRAsmE_SELFHRAsmH_SELFHRAsmHE_SELFHRAsmL_SELFHRAsmLE_SELFHRAsmLH_SELFHRAsmM_SELFHRAsmNE_SELFHRAsmNH_SELFHRAsmNHE_SELFHRAsmNL_SELFHRAsmNLE_SELFHRAsmNLH_SELFHRAsmNM_SELFHRAsmNO_SELFHRAsmNP_SELFHRAsmNZ_SELFHRAsmO_SELFHRAsmP_SELFHRAsmZ_SELGR_SELGRAsm_SELGRAsmE_SELGRAsmH_SELGRAsmHE_SELGRAsmL_SELGRAsmLE_SELGRAsmLH_SELGRAsmM_SELGRAsmNE_SELGRAsmNH_SELGRAsmNHE_SELGRAsmNL_SELGRAsmNLE_SELGRAsmNLH_SELGRAsmNM_SELGRAsmNO_SELGRAsmNP_SELGRAsmNZ_SELGRAsmO_SELGRAsmP_SELGRAsmZ_SELR_SELRAsm_SELRAsmE_SELRAsmH_SELRAsmHE_SELRAsmL_SELRAsmLE_SELRAsmLH_SELRAsmM_SELRAsmNE_SELRAsmNH_SELRAsmNHE_SELRAsmNL_SELRAsmNLE_SELRAsmNLH_SELRAsmNM_SELRAsmNO_SELRAsmNP_SELRAsmNZ_SELRAsmO_SELRAsmP_SELRAsmZ = 56,
3222 LBR_LGR_LHR = 57,
3223 LGBR_LGFR_LGHR = 58,
3224 LTGF = 59,
3225 LTGFR = 60,
3226 LBMux_LB_LBH = 61,
3227 LH_LHY = 62,
3228 LHMux_LHH_LHRL = 63,
3229 LGB_LGF_LGH = 64,
3230 LGFRL_LGHRL = 65,
3231 LLCRMux_LLCR = 66,
3232 LLHRMux_LLHR = 67,
3233 LLGCR_LLGFR_LLGHR_LLGTR = 68,
3234 LLCMux_LLC = 69,
3235 LLHMux_LLH = 70,
3236 LLCH_LLHH = 71,
3237 LLHRL = 72,
3238 LLGC_LLGF_LLGFRL_LLGH_LLGHRL_LLGT = 73,
3239 LLZRGF = 74,
3240 LLGFAT_LLGTAT = 75,
3241 STCMux_STC_STCH_STCY = 76,
3242 STHMux_STH_STHH_STHRL_STHY = 77,
3243 STCM_STCMH_STCMY = 78,
3244 LM_LMG_LMH_LMY = 79,
3245 LMD = 80,
3246 STM_STMG_STMH_STMY = 81,
3247 LRVGR_LRVR = 82,
3248 LRV_LRVG_LRVH = 83,
3249 STRV_STRVG_STRVH = 84,
3250 MVCIN = 85,
3251 LA_LARL_LAY = 86,
3252 GOT = 87,
3253 LPGR_LPR = 88,
3254 LNGFR_LPGFR = 89,
3255 LNGR_LNR = 90,
3256 LCGR_LCR = 91,
3257 LCGFR = 92,
3258 IC_ICY = 93,
3259 IC32_IC32Y = 94,
3260 ICM_ICMH_ICMY = 95,
3261 IIFMux_IIHMux_IILMux = 96,
3262 IIHF64_IIHF = 97,
3263 IIHH64_IIHH = 98,
3264 IIHL64_IIHL = 99,
3265 IILF64_IILF = 100,
3266 IILH64_IILH = 101,
3267 IILL64_IILL = 102,
3268 A_AY = 103,
3269 AH_AHY = 104,
3270 AIH = 105,
3271 AFIMux_AFI = 106,
3272 AG = 107,
3273 AGFI = 108,
3274 AGHI_AGHIK = 109,
3275 AGR_AGRK = 110,
3276 AHI_AHIK = 111,
3277 AHIMux_AHIMuxK = 112,
3278 AL_ALY = 113,
3279 ALFI_ALHSIK = 114,
3280 ALG_ALGF = 115,
3281 ALGHSIK = 116,
3282 ALGFI_ALGFR = 117,
3283 ALGR_ALGRK = 118,
3284 ALR_ALRK = 119,
3285 AR_ARK = 120,
3286 AHHHR_ALHHHR = 121,
3287 AHHLR_ALHHLR = 122,
3288 ALSIH_ALSIHN = 123,
3289 AGSI_ALGSI_ALSI_ASI = 124,
3290 ALC_ALCG = 125,
3291 ALCGR_ALCR = 126,
3292 AGF_AGH = 127,
3293 AGFR = 128,
3294 S_SG_SY = 129,
3295 SH_SHY = 130,
3296 SGR_SGRK = 131,
3297 SLFI = 132,
3298 SL_SLG_SLGF_SLY = 133,
3299 SLGFI_SLGFR = 134,
3300 SLGR_SLGRK = 135,
3301 SLR_SLRK = 136,
3302 SR_SRK = 137,
3303 SHHHR_SLHHHR = 138,
3304 SHHLR_SLHHLR = 139,
3305 SLB_SLBG = 140,
3306 SLBGR_SLBR = 141,
3307 SGF_SGH = 142,
3308 SGFR = 143,
3309 N_NG_NY = 144,
3310 NGR_NGRK = 145,
3311 NIFMux_NIHMux_NILMux = 146,
3312 NI_NIY = 147,
3313 NIHF64_NIHF = 148,
3314 NIHH64_NIHH = 149,
3315 NIHL64_NIHL = 150,
3316 NILF64_NILF = 151,
3317 NILH64_NILH = 152,
3318 NILL64_NILL = 153,
3319 NR_NRK = 154,
3320 NC = 155,
3321 O_OG_OY = 156,
3322 OGR_OGRK = 157,
3323 OI_OIY = 158,
3324 OIFMux_OIHMux_OILMux = 159,
3325 OIHF64_OIHF = 160,
3326 OIHH64_OIHH = 161,
3327 OIHL64_OIHL = 162,
3328 OILF64_OILF = 163,
3329 OILH64_OILH = 164,
3330 OILL64_OILL = 165,
3331 OR_ORK = 166,
3332 OC = 167,
3333 X_XG_XY = 168,
3334 XI_XIY = 169,
3335 XIFMux = 170,
3336 XGR_XGRK = 171,
3337 XIHF64_XIHF = 172,
3338 XILF64_XILF = 173,
3339 XR_XRK = 174,
3340 XC = 175,
3341 NCGRK_NCRK = 176,
3342 OCGRK_OCRK = 177,
3343 NNGRK_NNRK = 178,
3344 NOGRK_NORK = 179,
3345 NOTGR_NOTR = 180,
3346 NXGRK_NXRK = 181,
3347 MS_MSGF_MSY = 182,
3348 MSFI_MSR = 183,
3349 MSG = 184,
3350 MSGR = 185,
3351 MSGFI_MSGFR = 186,
3352 MLG = 187,
3353 MLGR = 188,
3354 MGHI = 189,
3355 MHI = 190,
3356 MH_MHY = 191,
3357 MLR_MR = 192,
3358 M_MFY_ML = 193,
3359 MGH = 194,
3360 MG = 195,
3361 MGRK = 196,
3362 MSC = 197,
3363 MSGC = 198,
3364 MSRKC = 199,
3365 MSGRKC = 200,
3366 DR = 201,
3367 D = 202,
3368 DSGFR_DSGR = 203,
3369 DSG_DSGF = 204,
3370 DLR = 205,
3371 DLGR = 206,
3372 DL_DLG = 207,
3373 SLL_SLLG_SLLK = 208,
3374 SRL_SRLG_SRLK = 209,
3375 SRA_SRAG_SRAK = 210,
3376 SLA_SLAG_SLAK = 211,
3377 SLDA_SLDL_SRDA_SRDL = 212,
3378 RLL_RLLG = 213,
3379 RISBHH_RISBHL_RISBHG = 214,
3380 RISBLH_RISBLL_RISBLG = 215,
3381 RISBG_RISBG32_RISBGN_RISBGNZ_RISBGZ = 216,
3382 RISBMux = 217,
3383 RNSBG_ROSBG_RXSBG = 218,
3384 CMux_C_CG_CY = 219,
3385 CRL = 220,
3386 CFIMux_CHIMux_CFI_CHI = 221,
3387 CGFI_CGHI = 222,
3388 CGHSI_CGRL = 223,
3389 CGR_CR = 224,
3390 CIH = 225,
3391 CHF = 226,
3392 CHSI = 227,
3393 CLMux_CL_CLY = 228,
3394 CLFHSI = 229,
3395 CLFIMux_CLFI = 230,
3396 CLG = 231,
3397 CLGHRL_CLGHSI = 232,
3398 CLGF = 233,
3399 CLGFRL = 234,
3400 CLGFI_CLGFR = 235,
3401 CLGR = 236,
3402 CLGRL = 237,
3403 CLHF = 238,
3404 CLHHSI_CLHRL = 239,
3405 CLIH = 240,
3406 CLI_CLIY = 241,
3407 CLR = 242,
3408 CLRL = 243,
3409 CHHR_CLHHR = 244,
3410 CHLR_CLHLR = 245,
3411 CH_CHY = 246,
3412 CHRL = 247,
3413 CGH = 248,
3414 CGHRL = 249,
3415 CHHSI = 250,
3416 CGF = 251,
3417 CGFRL = 252,
3418 CGFR = 253,
3419 CLC = 254,
3420 CLCL_CLCLE_CLCLU = 255,
3421 CLST = 256,
3422 TM_TMY = 257,
3423 TMHMux_TMLMux = 258,
3424 TMHH64_TMHH = 259,
3425 TMHL64_TMHL = 260,
3426 TMLH64_TMLH = 261,
3427 TMLL64_TMLL = 262,
3428 CLM_CLMH_CLMY = 263,
3429 PFD_PFDRL = 264,
3430 BPP = 265,
3431 BPRP = 266,
3432 NIAI = 267,
3433 Serialize = 268,
3434 LAA_LAAG = 269,
3435 LAAL_LAALG = 270,
3436 LAN_LANG = 271,
3437 LAO_LAOG = 272,
3438 LAX_LAXG = 273,
3439 TS = 274,
3440 CS_CSG_CSY = 275,
3441 CDS_CDSY = 276,
3442 CDSG = 277,
3443 CSST = 278,
3444 PLO = 279,
3445 LPQ = 280,
3446 STPQ = 281,
3447 LPD_LPDG = 282,
3448 TR = 283,
3449 TRT = 284,
3450 TRTR = 285,
3451 TRE = 286,
3452 TRTE_TRTEOpt_TRTRE_TRTREOpt = 287,
3453 TROO_TROOOpt_TROT_TROTOpt_TRTO_TRTOOpt_TRTT_TRTTOpt = 288,
3454 CU12_CU12Opt_CU14_CU14Opt_CU21_CU21Opt_CU24_CU24Opt_CU41_CU42 = 289,
3455 CUTFU_CUTFUOpt_CUUTF_CUUTFOpt = 290,
3456 KM_KMA_KMC_KMCTR_KMF_KMO = 291,
3457 KDSA_KIMD_KLMD_KMAC = 292,
3458 PCC_PPNO_PRNO = 293,
3459 LGG = 294,
3460 LLGFSG = 295,
3461 LGSC_STGSC = 296,
3462 CVBG = 297,
3463 CVB_CVBY = 298,
3464 CVDG = 299,
3465 CVD_CVDY = 300,
3466 MVN_MVO_MVZ = 301,
3467 PACK_PKA_PKU = 302,
3468 UNPKA_UNPKU = 303,
3469 UNPK = 304,
3470 AP_SP_ZAP = 305,
3471 MP = 306,
3472 DP = 307,
3473 SRP = 308,
3474 CP = 309,
3475 TP = 310,
3476 ED_EDMK = 311,
3477 CPYA_EAR_SAR = 312,
3478 LAE_LAEY = 313,
3479 LAM_LAMY = 314,
3480 STAM_STAMY = 315,
3481 IPM = 316,
3482 SPM = 317,
3483 BAL_BALR = 318,
3484 TAM = 319,
3485 SAM24_SAM31_SAM64 = 320,
3486 BSM = 321,
3487 BASSM = 322,
3488 TBEGIN_TBEGINC = 323,
3489 TEND = 324,
3490 TABORT = 325,
3491 ETND = 326,
3492 NTSTG = 327,
3493 PPA = 328,
3494 FLOGR = 329,
3495 POPCNT_POPCNTOpt = 330,
3496 SRST_SRSTU = 331,
3497 CUSE = 332,
3498 CFC = 333,
3499 UPT = 334,
3500 CKSM = 335,
3501 CMPSC = 336,
3502 SORTL = 337,
3503 DFLTCC = 338,
3504 NNPA = 339,
3505 EX_EXRL = 340,
3506 InsnE_InsnRI_InsnRIE_InsnRIL_InsnRILU_InsnRIS_InsnRR_InsnRRE_InsnRRF_InsnRRS_InsnRS_InsnRSE_InsnRSI_InsnRSY_InsnRX_InsnRXE_InsnRXF_InsnRXY_InsnS_InsnSI_InsnSIL_InsnSIY_InsnSS_InsnSSE_InsnSSF_InsnVRI_InsnVRR_InsnVRS_InsnVRV_InsnVRX_InsnVSI = 341,
3507 LZDR_LZER = 342,
3508 LZXR = 343,
3509 LER = 344,
3510 LDGR_LDR_LDR32 = 345,
3511 LGDR = 346,
3512 LXR = 347,
3513 LTDBR_LTEBR = 348,
3514 LTXBR = 349,
3515 CPSDRdd_CPSDRds_CPSDRsd_CPSDRss = 350,
3516 LE_LEY = 351,
3517 LD_LDE32_LDY = 352,
3518 LX = 353,
3519 STD_STDY_STE_STEY = 354,
3520 STX = 355,
3521 LEDBR_LEDBRA = 356,
3522 LDXBR_LDXBRA_LEXBR_LEXBRA = 357,
3523 LDEB = 358,
3524 LDEBR = 359,
3525 LXDB_LXEB = 360,
3526 LXDBR_LXEBR = 361,
3527 CDFBR_CDFBRA_CDGBR_CDGBRA_CEFBR_CEFBRA_CEGBR_CEGBRA = 362,
3528 CXFBR_CXFBRA_CXGBR_CXGBRA = 363,
3529 CDLFBR_CDLGBR_CELFBR_CELGBR = 364,
3530 CXLFBR_CXLGBR = 365,
3531 CFDBR_CFDBRA_CFEBR_CFEBRA_CGDBR_CGDBRA_CGEBR_CGEBRA = 366,
3532 CFXBR_CFXBRA_CGXBR_CGXBRA = 367,
3533 CLFEBR = 368,
3534 CLFDBR = 369,
3535 CLGDBR_CLGEBR = 370,
3536 CLFXBR_CLGXBR = 371,
3537 LCDBR_LCEBR_LNDBR_LNEBR_LPDBR_LPEBR = 372,
3538 LCDFR_LCDFR_32_LNDFR_LNDFR_32_LPDFR_LPDFR_32 = 373,
3539 LCXBR_LNXBR_LPXBR = 374,
3540 SQDB_SQEB = 375,
3541 SQEBR = 376,
3542 SQDBR = 377,
3543 SQXBR = 378,
3544 FIDBR_FIDBRA_FIEBR_FIEBRA = 379,
3545 FIXBR_FIXBRA = 380,
3546 ADB_AEB = 381,
3547 ADBR_AEBR = 382,
3548 AXBR = 383,
3549 SDB_SEB = 384,
3550 SDBR_SEBR = 385,
3551 SXBR = 386,
3552 MDB_MDEB_MEEB = 387,
3553 MDBR_MDEBR_MEEBR = 388,
3554 MXDB = 389,
3555 MXDBR = 390,
3556 MXBR = 391,
3557 MAEB_MSEB = 392,
3558 MAEBR_MSEBR = 393,
3559 MADB_MSDB = 394,
3560 MADBR_MSDBR = 395,
3561 DEB = 396,
3562 DDB = 397,
3563 DEBR = 398,
3564 DDBR = 399,
3565 DXBR = 400,
3566 DIDBR_DIEBR = 401,
3567 CDB_CEB_KDB_KEB = 402,
3568 CDBR_CEBR_KDBR_KEBR = 403,
3569 CXBR_KXBR = 404,
3570 TCDB_TCEB = 405,
3571 TCXB = 406,
3572 EFPC = 407,
3573 STFPC = 408,
3574 SFPC = 409,
3575 LFPC = 410,
3576 SFASR = 411,
3577 LFAS = 412,
3578 SRNM_SRNMB_SRNMT = 413,
3579 LTDR_LTER = 414,
3580 LTXR = 415,
3581 LEDR_LRER = 416,
3582 LEXR = 417,
3583 LDXR_LRDR = 418,
3584 LDE = 419,
3585 LDER = 420,
3586 LXD_LXE = 421,
3587 LXDR_LXER = 422,
3588 CDFR_CDGR_CEFR_CEGR = 423,
3589 CXFR_CXGR = 424,
3590 CFDR_CFER_CGDR_CGER = 425,
3591 CFXR_CGXR = 426,
3592 THDER_THDR = 427,
3593 TBDR_TBEDR = 428,
3594 LCDR_LCER_LNDR_LNER_LPDR_LPER = 429,
3595 LCXR_LNXR_LPXR = 430,
3596 HDR_HER = 431,
3597 SQD_SQE = 432,
3598 SQER = 433,
3599 SQDR = 434,
3600 SQXR = 435,
3601 FIDR_FIER = 436,
3602 FIXR = 437,
3603 AD_AE_AU_AW = 438,
3604 ADR_AER_AUR_AWR = 439,
3605 AXR = 440,
3606 SD_SE_SU_SW = 441,
3607 SDR_SER_SUR_SWR = 442,
3608 SXR = 443,
3609 MD_MDE_ME_MEE = 444,
3610 MDER_MDR_MEER_MER = 445,
3611 MXD = 446,
3612 MXDR = 447,
3613 MXR = 448,
3614 MY = 449,
3615 MYH_MYL = 450,
3616 MYR = 451,
3617 MYHR_MYLR = 452,
3618 MAD_MAE_MSD_MSE = 453,
3619 MADR_MAER_MSDR_MSER = 454,
3620 MAY = 455,
3621 MAYH_MAYL = 456,
3622 MAYR = 457,
3623 MAYHR_MAYLR = 458,
3624 DE = 459,
3625 DD = 460,
3626 DER = 461,
3627 DDR = 462,
3628 DXR = 463,
3629 CD_CE = 464,
3630 CDR_CER = 465,
3631 CXR = 466,
3632 LTDTR = 467,
3633 LTXTR = 468,
3634 LEDTR = 469,
3635 LDXTR = 470,
3636 LDETR = 471,
3637 LXDTR = 472,
3638 CDFTR = 473,
3639 CDGTR_CDGTRA = 474,
3640 CXFTR = 475,
3641 CXGTR_CXGTRA = 476,
3642 CDLFTR = 477,
3643 CDLGTR = 478,
3644 CXLFTR = 479,
3645 CXLGTR = 480,
3646 CFDTR_CGDTR_CGDTRA = 481,
3647 CFXTR_CGXTR_CGXTRA = 482,
3648 CLFDTR_CLGDTR = 483,
3649 CLFXTR_CLGXTR = 484,
3650 CDSTR_CDUTR = 485,
3651 CXSTR_CXUTR = 486,
3652 CSDTR_CUDTR = 487,
3653 CSXTR_CUXTR = 488,
3654 CDZT = 489,
3655 CXZT = 490,
3656 CZDT = 491,
3657 CZXT = 492,
3658 CDPT = 493,
3659 CXPT = 494,
3660 CPDT = 495,
3661 CPXT = 496,
3662 PFPO = 497,
3663 FIDTR = 498,
3664 FIXTR = 499,
3665 EEDTR = 500,
3666 EEXTR = 501,
3667 ESDTR = 502,
3668 ESXTR = 503,
3669 ADTR_ADTRA = 504,
3670 AXTR_AXTRA = 505,
3671 SDTR_SDTRA = 506,
3672 SXTR_SXTRA = 507,
3673 MDTR_MDTRA = 508,
3674 MXTR_MXTRA = 509,
3675 DDTR_DDTRA = 510,
3676 DXTR_DXTRA = 511,
3677 QADTR = 512,
3678 QAXTR = 513,
3679 RRDTR = 514,
3680 RRXTR = 515,
3681 SLDT_SRDT = 516,
3682 SLXT_SRXT = 517,
3683 IEDTR = 518,
3684 IEXTR = 519,
3685 CDTR_KDTR = 520,
3686 CXTR_KXTR = 521,
3687 CEDTR = 522,
3688 CEXTR = 523,
3689 TDCDT_TDCET_TDGDT_TDGET = 524,
3690 TDCXT_TDGXT = 525,
3691 VLR32_VLR64_VLR = 526,
3692 VLGV_VLGVB_VLGVF_VLGVG_VLGVH = 527,
3693 VLVG_VLVGB_VLVGF_VLVGG_VLVGH = 528,
3694 VLVGP32_VLVGP = 529,
3695 VZERO = 530,
3696 VONE = 531,
3697 VGBM = 532,
3698 VGM_VGMB_VGMF_VGMG_VGMH = 533,
3699 VREPI_VREPIB_VREPIF_VREPIG_VREPIH = 534,
3700 VLEIB_VLEIF_VLEIG_VLEIH = 535,
3701 VL_VLAlign = 536,
3702 VLBB_VLL = 537,
3703 VL32_VL64 = 538,
3704 VLLEZ_VLLEZB_VLLEZF_VLLEZG_VLLEZH_VLLEZLF = 539,
3705 VLREP_VLREPB_VLREPF_VLREPG_VLREPH = 540,
3706 VLEB_VLEF_VLEG_VLEH = 541,
3707 VGEF_VGEG = 542,
3708 VLM_VLMAlign = 543,
3709 VLRL_VLRLR = 544,
3710 VST32_VST64_VST_VSTAlign_VSTL = 545,
3711 VSTEF_VSTEG = 546,
3712 VSTEB_VSTEH = 547,
3713 VSTM_VSTMAlign = 548,
3714 VSCEF_VSCEG = 549,
3715 VSTRL_VSTRLR = 550,
3716 VLBR_VLBRF_VLBRG_VLBRH_VLBRQ = 551,
3717 VLER_VLERF_VLERG_VLERH = 552,
3718 VLEBRF_VLEBRG_VLEBRH = 553,
3719 VLLEBRZ_VLLEBRZE_VLLEBRZF_VLLEBRZG_VLLEBRZH = 554,
3720 VLBRREP_VLBRREPF_VLBRREPG_VLBRREPH = 555,
3721 VSTBR_VSTBRF_VSTBRG_VSTBRH_VSTBRQ = 556,
3722 VSTER_VSTERF_VSTERG_VSTERH = 557,
3723 VSTEBRH = 558,
3724 VSTEBRF_VSTEBRG = 559,
3725 VMRH_VMRHB_VMRHF_VMRHG_VMRHH = 560,
3726 VMRL_VMRLB_VMRLF_VMRLG_VMRLH = 561,
3727 VPERM = 562,
3728 VPDI = 563,
3729 VBPERM = 564,
3730 VREP_VREPB_VREPF_VREPG_VREPH = 565,
3731 VSEL = 566,
3732 VPK_VPKF_VPKG_VPKH = 567,
3733 VPKS_VPKSF_VPKSG_VPKSH = 568,
3734 VPKSFS_VPKSGS_VPKSHS = 569,
3735 VPKLS_VPKLSF_VPKLSG_VPKLSH = 570,
3736 VPKLSFS_VPKLSGS_VPKLSHS = 571,
3737 VSEG_VSEGB_VSEGF_VSEGH = 572,
3738 VUPH_VUPHB_VUPHF_VUPHH = 573,
3739 VUPL_VUPLB_VUPLF = 574,
3740 VUPLH_VUPLHB_VUPLHF_VUPLHH_VUPLHW = 575,
3741 VUPLL_VUPLLB_VUPLLF_VUPLLH = 576,
3742 VA_VAB_VAC_VACQ_VAF_VAG_VAH_VAQ = 577,
3743 VACC_VACCB_VACCC_VACCCQ_VACCF_VACCG_VACCH_VACCQ = 578,
3744 VAVG_VAVGB_VAVGF_VAVGG_VAVGH = 579,
3745 VAVGL_VAVGLB_VAVGLF_VAVGLG_VAVGLH = 580,
3746 VN_VNC_VNN_VNO_VNX = 581,
3747 VO_VOC = 582,
3748 VCKSM = 583,
3749 VCLZ_VCLZB_VCLZF_VCLZG_VCLZH = 584,
3750 VCTZ_VCTZB_VCTZF_VCTZG_VCTZH = 585,
3751 VX = 586,
3752 VGFM = 587,
3753 VGFMA_VGFMAB_VGFMAF_VGFMAG_VGFMAH = 588,
3754 VGFMB_VGFMF_VGFMG_VGFMH = 589,
3755 VLC_VLCB_VLCF_VLCG_VLCH = 590,
3756 VLP_VLPB_VLPF_VLPG_VLPH = 591,
3757 VMX_VMXB_VMXF_VMXG_VMXH = 592,
3758 VMXL_VMXLB_VMXLF_VMXLG_VMXLH = 593,
3759 VMN_VMNB_VMNF_VMNG_VMNH = 594,
3760 VMNL_VMNLB_VMNLF_VMNLG_VMNLH = 595,
3761 VMAL_VMALB_VMALF = 596,
3762 VMALE_VMALEB_VMALEF_VMALEH = 597,
3763 VMALH_VMALHB_VMALHF_VMALHH_VMALHW = 598,
3764 VMALO_VMALOB_VMALOF_VMALOH = 599,
3765 VMAO_VMAOB_VMAOF_VMAOH = 600,
3766 VMAE_VMAEB_VMAEF_VMAEH = 601,
3767 VMAH_VMAHB_VMAHF_VMAHH = 602,
3768 VME_VMEB_VMEF_VMEH = 603,
3769 VMH_VMHB_VMHF_VMHH = 604,
3770 VML_VMLB_VMLF = 605,
3771 VMLE_VMLEB_VMLEF_VMLEH = 606,
3772 VMLH_VMLHB_VMLHF_VMLHH_VMLHW = 607,
3773 VMLO_VMLOB_VMLOF_VMLOH = 608,
3774 VMO_VMOB_VMOF_VMOH = 609,
3775 VMSL_VMSLG = 610,
3776 VPOPCT_VPOPCTB_VPOPCTF_VPOPCTG_VPOPCTH = 611,
3777 VERLL_VERLLB_VERLLF_VERLLG_VERLLH = 612,
3778 VERLLV_VERLLVB_VERLLVF_VERLLVG_VERLLVH = 613,
3779 VERIM_VERIMB_VERIMF_VERIMG_VERIMH = 614,
3780 VESL_VESLB_VESLF_VESLG_VESLH = 615,
3781 VESLV_VESLVB_VESLVF_VESLVG_VESLVH = 616,
3782 VESRA_VESRAB_VESRAF_VESRAG_VESRAH = 617,
3783 VESRAV_VESRAVB_VESRAVF_VESRAVG_VESRAVH = 618,
3784 VESRL_VESRLB_VESRLF_VESRLG_VESRLH = 619,
3785 VESRLV_VESRLVB_VESRLVF_VESRLVG_VESRLVH = 620,
3786 VSL_VSLDB = 621,
3787 VSLB = 622,
3788 VSRA_VSRL = 623,
3789 VSRAB_VSRLB = 624,
3790 VSLD = 625,
3791 VSRD = 626,
3792 VSB_VSBCBI_VSBCBIQ_VSBI_VSBIQ = 627,
3793 VSCBI_VSCBIB_VSCBIF_VSCBIG_VSCBIH_VSCBIQ = 628,
3794 VS_VSF_VSG_VSH_VSQ = 629,
3795 VSUM_VSUMB_VSUMH = 630,
3796 VSUMG_VSUMGF_VSUMGH = 631,
3797 VSUMQ_VSUMQF_VSUMQG = 632,
3798 VEC_VECB_VECF_VECG_VECH = 633,
3799 VECL_VECLB_VECLF_VECLG_VECLH = 634,
3800 VCEQ_VCEQB_VCEQF_VCEQG_VCEQH = 635,
3801 VCEQBS_VCEQFS_VCEQGS_VCEQHS = 636,
3802 VCH_VCHB_VCHF_VCHG_VCHH = 637,
3803 VCHBS_VCHFS_VCHGS_VCHHS = 638,
3804 VCHL_VCHLB_VCHLF_VCHLG_VCHLH = 639,
3805 VCHLBS_VCHLFS_VCHLGS_VCHLHS = 640,
3806 VTM = 641,
3807 VCFPL_VCFPS = 642,
3808 VCDG_VCDLG = 643,
3809 VCDGB_VCDLGB = 644,
3810 WCDGB_WCDLGB = 645,
3811 VCEFB_VCELFB = 646,
3812 WCEFB_WCELFB = 647,
3813 VCLFP_VCSFP = 648,
3814 VCGD_VCLGD = 649,
3815 VCGDB_VCLGDB = 650,
3816 WCGDB_WCLGDB = 651,
3817 VCFEB_VCLFEB = 652,
3818 WCFEB_WCLFEB = 653,
3819 VLDE_VLED = 654,
3820 VLDEB_VLEDB = 655,
3821 WLDEB_WLEDB = 656,
3822 VFLL_VFLR = 657,
3823 VFLLS_VFLRD = 658,
3824 WFLLS_WFLRD = 659,
3825 WFLLD = 660,
3826 WFLRX = 661,
3827 VFI_VFIDB = 662,
3828 WFIDB = 663,
3829 VFISB = 664,
3830 WFISB = 665,
3831 WFIXB = 666,
3832 VFPSO = 667,
3833 VFPSODB_WFPSODB = 668,
3834 VFPSOSB_WFPSOSB = 669,
3835 WFPSOXB = 670,
3836 VFLCDB_VFLNDB_VFLPDB_WFLCDB_WFLNDB_WFLPDB = 671,
3837 VFLCSB_VFLNSB_VFLPSB_WFLCSB_WFLNSB_WFLPSB = 672,
3838 WFLCXB_WFLNXB_WFLPXB = 673,
3839 VFMAX_VFMIN = 674,
3840 VFMAXDB_VFMINDB = 675,
3841 WFMAXDB_WFMINDB = 676,
3842 VFMAXSB_VFMINSB = 677,
3843 WFMAXSB_WFMINSB = 678,
3844 WFMAXXB_WFMINXB = 679,
3845 VFTCI = 680,
3846 VFTCIDB_WFTCIDB = 681,
3847 VFTCISB_WFTCISB = 682,
3848 WFTCIXB = 683,
3849 VFA_VFS = 684,
3850 VFADB_VFSDB = 685,
3851 WFADB_WFSDB = 686,
3852 VFASB_VFSSB = 687,
3853 WFASB_WFSSB = 688,
3854 WFAXB_WFSXB = 689,
3855 VFM_VFMDB = 690,
3856 WFMDB_WFMSB = 691,
3857 VFMSB = 692,
3858 WFMXB = 693,
3859 VFMA_VFMS_VFNMA_VFNMS = 694,
3860 VFMADB_VFMSDB_VFNMADB_VFNMSDB = 695,
3861 WFMADB_WFMSDB_WFNMADB_WFNMSDB = 696,
3862 VFMASB_VFMSSB_VFNMASB_VFNMSSB = 697,
3863 WFMASB_WFMSSB_WFNMASB_WFNMSSB = 698,
3864 WFMAXB_WFMSXB_WFNMAXB_WFNMSXB = 699,
3865 VFD = 700,
3866 VFDDB_WFDDB = 701,
3867 WFDSB = 702,
3868 VFDSB = 703,
3869 WFDXB = 704,
3870 VFSQ = 705,
3871 VFSQDB_WFSQDB = 706,
3872 WFSQSB = 707,
3873 VFSQSB = 708,
3874 WFSQXB = 709,
3875 VFCE_VFCH_VFCHE = 710,
3876 VFCEDB_VFCHDB_VFCHEDB_VFKEDB_VFKHDB_VFKHEDB = 711,
3877 WFCEDB_WFCHDB_WFCHEDB = 712,
3878 WFKEDB_WFKHDB_WFKHEDB = 713,
3879 VFCESB_VFCHESB_VFCHSB_VFKESB_VFKHESB_VFKHSB = 714,
3880 WFCESB_WFCHESB_WFCHSB = 715,
3881 WFKESB_WFKHESB_WFKHSB = 716,
3882 WFCEXB_WFCHEXB_WFCHXB = 717,
3883 WFKEXB_WFKHEXB_WFKHXB = 718,
3884 VFCEDBS_VFCHDBS_VFCHEDBS = 719,
3885 VFKEDBS_VFKHDBS_VFKHEDBS = 720,
3886 WFCEDBS_WFCHDBS_WFCHEDBS_WFKEDBS_WFKHDBS_WFKHEDBS = 721,
3887 VFCESBS_VFCHESBS_VFCHSBS_VFKESBS_VFKHESBS_VFKHSBS = 722,
3888 WFCESBS_WFCHESBS_WFCHSBS = 723,
3889 WFKESBS_WFKHESBS_WFKHSBS = 724,
3890 WFCEXBS_WFCHEXBS_WFCHXBS = 725,
3891 WFKEXBS_WFKHEXBS_WFKHXBS = 726,
3892 WFC_WFK = 727,
3893 WFCDB_WFKDB = 728,
3894 WFCSB_WFKSB = 729,
3895 WFCXB_WFKXB = 730,
3896 LEFR = 731,
3897 LFER = 732,
3898 VFAE_VFAEB = 733,
3899 VFAEF_VFAEH = 734,
3900 VFAEBS_VFAEFS_VFAEHS = 735,
3901 VFAEZB_VFAEZF_VFAEZH = 736,
3902 VFAEZBS_VFAEZFS_VFAEZHS = 737,
3903 VFEE_VFEEB_VFEEF_VFEEH_VFEEZB_VFEEZF_VFEEZH = 738,
3904 VFEEBS_VFEEFS_VFEEHS_VFEEZBS_VFEEZFS_VFEEZHS = 739,
3905 VFENE_VFENEB_VFENEF_VFENEH_VFENEZB_VFENEZF_VFENEZH = 740,
3906 VFENEBS_VFENEFS_VFENEHS_VFENEZBS_VFENEZFS_VFENEZHS = 741,
3907 VISTR_VISTRB_VISTRF_VISTRH = 742,
3908 VISTRBS_VISTRFS_VISTRHS = 743,
3909 VSTRC_VSTRCB_VSTRCF_VSTRCH = 744,
3910 VSTRCBS_VSTRCFS_VSTRCHS = 745,
3911 VSTRCZB_VSTRCZF_VSTRCZH = 746,
3912 VSTRCZBS_VSTRCZFS_VSTRCZHS = 747,
3913 VSTRS_VSTRSB_VSTRSF_VSTRSH = 748,
3914 VSTRSZB_VSTRSZF_VSTRSZH = 749,
3915 VCFN = 750,
3916 VCLFNH_VCLFNL = 751,
3917 VCNF_VCRNF = 752,
3918 VLIP = 753,
3919 VPKZ = 754,
3920 VUPKZ = 755,
3921 VCVB_VCVBG_VCVBGOpt_VCVBOpt = 756,
3922 VCVD_VCVDG = 757,
3923 VAP_VSP = 758,
3924 VMP_VMSP = 759,
3925 VDP_VRP = 760,
3926 VSDP = 761,
3927 VSRP = 762,
3928 VPSOP = 763,
3929 VCP_VTP = 764,
3930 VSCHDP_VSCHP_VSCHSP_VSCHXP = 765,
3931 VSCSHP = 766,
3932 VCSPH = 767,
3933 VCLZDP = 768,
3934 VSRPR = 769,
3935 VPKZR = 770,
3936 VUPKZH = 771,
3937 VUPKZL = 772,
3938 EPSW = 773,
3939 LPSW_LPSWE_LPSWEY = 774,
3940 IPK = 775,
3941 SPKA = 776,
3942 SSM = 777,
3943 STNSM_STOSM = 778,
3944 IAC = 779,
3945 SAC_SACF = 780,
3946 LCTL_LCTLG = 781,
3947 STCTG_STCTL = 782,
3948 EPAIR_EPAR_ESAIR_ESAR = 783,
3949 SSAIR_SSAR = 784,
3950 ESEA = 785,
3951 SPX_STPX = 786,
3952 LBEAR = 787,
3953 STBEAR = 788,
3954 ISKE = 789,
3955 IVSK = 790,
3956 SSKE_SSKEOpt = 791,
3957 RRBE_RRBM = 792,
3958 IRBM = 793,
3959 PFMF = 794,
3960 TB = 795,
3961 PGIN = 796,
3962 PGOUT = 797,
3963 IPTE_IPTEOpt_IPTEOptOpt = 798,
3964 IDTE_IDTEOpt = 799,
3965 RDP_RDPOpt = 800,
3966 CRDTE_CRDTEOpt = 801,
3967 PTLB = 802,
3968 CSP_CSPG = 803,
3969 LPTEA = 804,
3970 LRA_LRAG_LRAY = 805,
3971 STRAG = 806,
3972 LURA_LURAG = 807,
3973 STURA_STURG = 808,
3974 TPROT = 809,
3975 MVCK_MVCP_MVCS = 810,
3976 MVCDK_MVCSK = 811,
3977 MVCOS = 812,
3978 MVPG = 813,
3979 LASP = 814,
3980 PALB = 815,
3981 PC = 816,
3982 PR = 817,
3983 PT_PTI = 818,
3984 RP = 819,
3985 BSA_BSG = 820,
3986 TAR = 821,
3987 BAKR = 822,
3988 EREG_EREGG = 823,
3989 ESTA_MSTA = 824,
3990 PTFF = 825,
3991 SCK_SCKC_SCKPF = 826,
3992 SPT = 827,
3993 STCK_STCKF = 828,
3994 STCKE = 829,
3995 STCKC = 830,
3996 STPT = 831,
3997 STAP = 832,
3998 STIDP = 833,
3999 STSI = 834,
4000 STFL_STFLE = 835,
4001 ECAG = 836,
4002 ECTG = 837,
4003 PTF = 838,
4004 PCKMO = 839,
4005 QPACI = 840,
4006 SVC = 841,
4007 MC = 842,
4008 DIAG = 843,
4009 TRACE_TRACG = 844,
4010 TRAP2_TRAP4 = 845,
4011 SIGA_SIGP = 846,
4012 SIE = 847,
4013 LPP = 848,
4014 ECPGA = 849,
4015 ECCTR_EPCTR = 850,
4016 LCCTL = 851,
4017 LPCTL_LSCTL = 852,
4018 QCTRI_QSI = 853,
4019 SCCTR_SPCTR = 854,
4020 CSCH_HSCH_RSCH_XSCH = 855,
4021 MSCH_SSCH_STSCH_TSCH = 856,
4022 RCHP = 857,
4023 SCHM = 858,
4024 STCPS_STCRW = 859,
4025 TPEI_TPI = 860,
4026 SAL = 861,
4027 NOP_NOPR = 862,
4028 LPSW_LPSWE = 863,
4029 KIMD_KLMD_KMAC = 864,
4030 POPCNT = 865,
4031 VFI = 866,
4032 VFM = 867,
4033 VCVB_VCVBG = 868,
4034 AGF = 869,
4035 SGF = 870,
4036 KM_KMC_KMCTR_KMF_KMO = 871,
4037 PCC_PPNO = 872,
4038 VLLEZ_VLLEZB_VLLEZF_VLLEZG_VLLEZH = 873,
4039 VN_VNC_VNO = 874,
4040 VO = 875,
4041 VPOPCT = 876,
4042 WFMDB = 877,
4043 VFMA_VFMS = 878,
4044 VFMADB_VFMSDB = 879,
4045 WFMADB_WFMSDB = 880,
4046 VFCEDB_VFCHDB_VFCHEDB = 881,
4047 WFCEDBS_WFCHDBS_WFCHEDBS = 882,
4048 TPI = 883,
4049 LOCGR_LOCGRAsm_LOCGRAsmE_LOCGRAsmH_LOCGRAsmHE_LOCGRAsmL_LOCGRAsmLE_LOCGRAsmLH_LOCGRAsmM_LOCGRAsmNE_LOCGRAsmNH_LOCGRAsmNHE_LOCGRAsmNL_LOCGRAsmNLE_LOCGRAsmNLH_LOCGRAsmNM_LOCGRAsmNO_LOCGRAsmNP_LOCGRAsmNZ_LOCGRAsmO_LOCGRAsmP_LOCGRAsmZ_LOCR_LOCRAsm_LOCRAsmE_LOCRAsmH_LOCRAsmHE_LOCRAsmL_LOCRAsmLE_LOCRAsmLH_LOCRAsmM_LOCRAsmNE_LOCRAsmNH_LOCRAsmNHE_LOCRAsmNL_LOCRAsmNLE_LOCRAsmNLH_LOCRAsmNM_LOCRAsmNO_LOCRAsmNP_LOCRAsmNZ_LOCRAsmO_LOCRAsmP_LOCRAsmZ = 884,
4050 LOC_LOCAsm_LOCAsmE_LOCAsmH_LOCAsmHE_LOCAsmL_LOCAsmLE_LOCAsmLH_LOCAsmM_LOCAsmNE_LOCAsmNH_LOCAsmNHE_LOCAsmNL_LOCAsmNLE_LOCAsmNLH_LOCAsmNM_LOCAsmNO_LOCAsmNP_LOCAsmNZ_LOCAsmO_LOCAsmP_LOCAsmZ_LOCG_LOCGAsm_LOCGAsmE_LOCGAsmH_LOCGAsmHE_LOCGAsmL_LOCGAsmLE_LOCGAsmLH_LOCGAsmM_LOCGAsmNE_LOCGAsmNH_LOCGAsmNHE_LOCGAsmNL_LOCGAsmNLE_LOCGAsmNLH_LOCGAsmNM_LOCGAsmNO_LOCGAsmNP_LOCGAsmNZ_LOCGAsmO_LOCGAsmP_LOCGAsmZ = 885,
4051 STOC_STOCAsm_STOCAsmE_STOCAsmH_STOCAsmHE_STOCAsmL_STOCAsmLE_STOCAsmLH_STOCAsmM_STOCAsmNE_STOCAsmNH_STOCAsmNHE_STOCAsmNL_STOCAsmNLE_STOCAsmNLH_STOCAsmNM_STOCAsmNO_STOCAsmNP_STOCAsmNZ_STOCAsmO_STOCAsmP_STOCAsmZ_STOCG_STOCGAsm_STOCGAsmE_STOCGAsmH_STOCGAsmHE_STOCGAsmL_STOCGAsmLE_STOCGAsmLH_STOCGAsmM_STOCGAsmNE_STOCGAsmNH_STOCGAsmNHE_STOCGAsmNL_STOCGAsmNLE_STOCGAsmNLH_STOCGAsmNM_STOCGAsmNO_STOCGAsmNP_STOCGAsmNZ_STOCGAsmO_STOCGAsmP_STOCGAsmZ = 886,
4052 ALSI_ASI = 887,
4053 ALGF = 888,
4054 PCC = 889,
4055 CELFBR_CELGBR = 890,
4056 MD_MEE = 891,
4057 MDR_MEER = 892,
4058 CFDTR = 893,
4059 CFXTR = 894,
4060 TDCDT_TDGDT = 895,
4061 SCK = 896,
4062 SCKPF = 897,
4063 RISBG_RISBG32_RISBGZ = 898,
4064 SCHED_LIST_END = 899
4065 };
4066} // end namespace Sched
4067} // end namespace SystemZ
4068} // end namespace llvm
4069#endif // GET_INSTRINFO_SCHED_ENUM
4070
4071#if defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
4072namespace llvm {
4073
4074struct SystemZInstrTable {
4075 MCInstrDesc Insts[3136];
4076 static_assert(alignof(MCInstrDesc) >= alignof(MCOperandInfo), "Unwanted padding between Insts and OperandInfo");
4077 MCOperandInfo OperandInfo[1652];
4078 static_assert(alignof(MCOperandInfo) >= alignof(MCPhysReg), "Unwanted padding between OperandInfo and ImplicitOps");
4079 MCPhysReg ImplicitOps[102];
4080};
4081
4082} // end namespace llvm
4083#endif // defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
4084
4085#ifdef GET_INSTRINFO_MC_DESC
4086#undef GET_INSTRINFO_MC_DESC
4087namespace llvm {
4088
4089static_assert(sizeof(MCOperandInfo) % sizeof(MCPhysReg) == 0);
4090static constexpr unsigned SystemZImpOpBase = sizeof SystemZInstrTable::OperandInfo / (sizeof(MCPhysReg));
4091
4092extern const SystemZInstrTable SystemZDescs = {
4093 {
4094 { 3135, 6, 0, 6, 305, 0, 1, SystemZImpOpBase + 0, 544, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #3135 = ZAP
4095 { 3134, 5, 1, 6, 168, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x2308cULL }, // Inst #3134 = XY
4096 { 3133, 0, 0, 4, 855, 1, 1, SystemZImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3133 = XSCH
4097 { 3132, 3, 1, 4, 174, 0, 1, SystemZImpOpBase + 0, 541, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #3132 = XRK
4098 { 3131, 3, 1, 2, 174, 0, 1, SystemZImpOpBase + 0, 538, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #3131 = XR
4099 { 3130, 3, 0, 6, 169, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #3130 = XIY
4100 { 3129, 3, 1, 6, 173, 0, 1, SystemZImpOpBase + 0, 515, 0, 0x23000ULL }, // Inst #3129 = XILF
4101 { 3128, 3, 1, 6, 172, 0, 1, SystemZImpOpBase + 0, 535, 0, 0x23000ULL }, // Inst #3128 = XIHF
4102 { 3127, 3, 0, 4, 169, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #3127 = XI
4103 { 3126, 3, 1, 4, 171, 0, 1, SystemZImpOpBase + 0, 382, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #3126 = XGRK
4104 { 3125, 3, 1, 4, 171, 0, 1, SystemZImpOpBase + 0, 526, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #3125 = XGR
4105 { 3124, 5, 1, 6, 168, 0, 1, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #3124 = XG
4106 { 3123, 5, 0, 6, 175, 0, 1, SystemZImpOpBase + 0, 789, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #3123 = XC
4107 { 3122, 5, 1, 4, 168, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #3122 = X
4108 { 3121, 4, 1, 6, 656, 1, 0, SystemZImpOpBase + 12, 1622, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3121 = WLEDB
4109 { 3120, 2, 1, 6, 656, 1, 0, SystemZImpOpBase + 12, 1620, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3120 = WLDEB
4110 { 3119, 3, 1, 6, 683, 0, 1, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #3119 = WFTCIXB
4111 { 3118, 3, 1, 6, 682, 0, 1, SystemZImpOpBase + 0, 1649, 0, 0x0ULL }, // Inst #3118 = WFTCISB
4112 { 3117, 3, 1, 6, 681, 0, 1, SystemZImpOpBase + 0, 1646, 0, 0x0ULL }, // Inst #3117 = WFTCIDB
4113 { 3116, 3, 1, 6, 689, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3116 = WFSXB
4114 { 3115, 3, 1, 6, 688, 1, 0, SystemZImpOpBase + 12, 1615, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3115 = WFSSB
4115 { 3114, 2, 1, 6, 709, 1, 0, SystemZImpOpBase + 12, 415, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3114 = WFSQXB
4116 { 3113, 2, 1, 6, 707, 1, 0, SystemZImpOpBase + 12, 480, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3113 = WFSQSB
4117 { 3112, 2, 1, 6, 706, 1, 0, SystemZImpOpBase + 12, 482, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3112 = WFSQDB
4118 { 3111, 3, 1, 6, 686, 1, 0, SystemZImpOpBase + 12, 1612, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3111 = WFSDB
4119 { 3110, 3, 1, 6, 670, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #3110 = WFPSOXB
4120 { 3109, 3, 1, 6, 669, 0, 0, SystemZImpOpBase + 0, 1649, 0, 0x0ULL }, // Inst #3109 = WFPSOSB
4121 { 3108, 3, 1, 6, 668, 0, 0, SystemZImpOpBase + 0, 1646, 0, 0x0ULL }, // Inst #3108 = WFPSODB
4122 { 3107, 4, 1, 6, 699, 1, 0, SystemZImpOpBase + 12, 1449, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3107 = WFNMSXB
4123 { 3106, 4, 1, 6, 698, 1, 0, SystemZImpOpBase + 12, 1634, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3106 = WFNMSSB
4124 { 3105, 4, 1, 6, 696, 1, 0, SystemZImpOpBase + 12, 1630, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3105 = WFNMSDB
4125 { 3104, 4, 1, 6, 699, 1, 0, SystemZImpOpBase + 12, 1449, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3104 = WFNMAXB
4126 { 3103, 4, 1, 6, 698, 1, 0, SystemZImpOpBase + 12, 1634, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3103 = WFNMASB
4127 { 3102, 4, 1, 6, 696, 1, 0, SystemZImpOpBase + 12, 1630, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3102 = WFNMADB
4128 { 3101, 3, 1, 6, 693, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3101 = WFMXB
4129 { 3100, 4, 1, 6, 699, 1, 0, SystemZImpOpBase + 12, 1449, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3100 = WFMSXB
4130 { 3099, 4, 1, 6, 698, 1, 0, SystemZImpOpBase + 12, 1634, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3099 = WFMSSB
4131 { 3098, 4, 1, 6, 880, 1, 0, SystemZImpOpBase + 12, 1630, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3098 = WFMSDB
4132 { 3097, 3, 1, 6, 691, 1, 0, SystemZImpOpBase + 12, 1615, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3097 = WFMSB
4133 { 3096, 4, 1, 6, 679, 1, 0, SystemZImpOpBase + 12, 1437, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3096 = WFMINXB
4134 { 3095, 4, 1, 6, 678, 1, 0, SystemZImpOpBase + 12, 1642, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3095 = WFMINSB
4135 { 3094, 4, 1, 6, 676, 1, 0, SystemZImpOpBase + 12, 1638, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3094 = WFMINDB
4136 { 3093, 3, 1, 6, 877, 1, 0, SystemZImpOpBase + 12, 1612, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3093 = WFMDB
4137 { 3092, 4, 1, 6, 679, 1, 0, SystemZImpOpBase + 12, 1437, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3092 = WFMAXXB
4138 { 3091, 4, 1, 6, 678, 1, 0, SystemZImpOpBase + 12, 1642, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3091 = WFMAXSB
4139 { 3090, 4, 1, 6, 676, 1, 0, SystemZImpOpBase + 12, 1638, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3090 = WFMAXDB
4140 { 3089, 4, 1, 6, 699, 1, 0, SystemZImpOpBase + 12, 1449, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3089 = WFMAXB
4141 { 3088, 4, 1, 6, 698, 1, 0, SystemZImpOpBase + 12, 1634, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3088 = WFMASB
4142 { 3087, 4, 1, 6, 880, 1, 0, SystemZImpOpBase + 12, 1630, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3087 = WFMADB
4143 { 3086, 4, 1, 6, 661, 1, 0, SystemZImpOpBase + 12, 1626, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3086 = WFLRX
4144 { 3085, 4, 1, 6, 659, 1, 0, SystemZImpOpBase + 12, 1622, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3085 = WFLRD
4145 { 3084, 2, 1, 6, 673, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #3084 = WFLPXB
4146 { 3083, 2, 1, 6, 672, 0, 0, SystemZImpOpBase + 0, 480, 0, 0x0ULL }, // Inst #3083 = WFLPSB
4147 { 3082, 2, 1, 6, 671, 0, 0, SystemZImpOpBase + 0, 482, 0, 0x0ULL }, // Inst #3082 = WFLPDB
4148 { 3081, 2, 1, 6, 673, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #3081 = WFLNXB
4149 { 3080, 2, 1, 6, 672, 0, 0, SystemZImpOpBase + 0, 480, 0, 0x0ULL }, // Inst #3080 = WFLNSB
4150 { 3079, 2, 1, 6, 671, 0, 0, SystemZImpOpBase + 0, 482, 0, 0x0ULL }, // Inst #3079 = WFLNDB
4151 { 3078, 2, 1, 6, 659, 1, 0, SystemZImpOpBase + 12, 1620, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3078 = WFLLS
4152 { 3077, 2, 1, 6, 660, 1, 0, SystemZImpOpBase + 12, 1618, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3077 = WFLLD
4153 { 3076, 2, 1, 6, 673, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #3076 = WFLCXB
4154 { 3075, 2, 1, 6, 672, 0, 0, SystemZImpOpBase + 0, 480, 0, 0x0ULL }, // Inst #3075 = WFLCSB
4155 { 3074, 2, 1, 6, 671, 0, 0, SystemZImpOpBase + 0, 482, 0, 0x0ULL }, // Inst #3074 = WFLCDB
4156 { 3073, 2, 0, 6, 730, 1, 1, SystemZImpOpBase + 1, 415, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3073 = WFKXB
4157 { 3072, 2, 0, 6, 729, 1, 1, SystemZImpOpBase + 1, 480, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3072 = WFKSB
4158 { 3071, 3, 1, 6, 726, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3071 = WFKHXBS
4159 { 3070, 3, 1, 6, 718, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3070 = WFKHXB
4160 { 3069, 3, 1, 6, 724, 1, 1, SystemZImpOpBase + 1, 1615, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3069 = WFKHSBS
4161 { 3068, 3, 1, 6, 716, 1, 0, SystemZImpOpBase + 12, 1615, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3068 = WFKHSB
4162 { 3067, 3, 1, 6, 726, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3067 = WFKHEXBS
4163 { 3066, 3, 1, 6, 718, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3066 = WFKHEXB
4164 { 3065, 3, 1, 6, 724, 1, 1, SystemZImpOpBase + 1, 1615, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3065 = WFKHESBS
4165 { 3064, 3, 1, 6, 716, 1, 0, SystemZImpOpBase + 12, 1615, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3064 = WFKHESB
4166 { 3063, 3, 1, 6, 721, 1, 1, SystemZImpOpBase + 1, 1612, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3063 = WFKHEDBS
4167 { 3062, 3, 1, 6, 713, 1, 0, SystemZImpOpBase + 12, 1612, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3062 = WFKHEDB
4168 { 3061, 3, 1, 6, 721, 1, 1, SystemZImpOpBase + 1, 1612, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3061 = WFKHDBS
4169 { 3060, 3, 1, 6, 713, 1, 0, SystemZImpOpBase + 12, 1612, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3060 = WFKHDB
4170 { 3059, 3, 1, 6, 726, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3059 = WFKEXBS
4171 { 3058, 3, 1, 6, 718, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3058 = WFKEXB
4172 { 3057, 3, 1, 6, 724, 1, 1, SystemZImpOpBase + 1, 1615, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3057 = WFKESBS
4173 { 3056, 3, 1, 6, 716, 1, 0, SystemZImpOpBase + 12, 1615, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3056 = WFKESB
4174 { 3055, 3, 1, 6, 721, 1, 1, SystemZImpOpBase + 1, 1612, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3055 = WFKEDBS
4175 { 3054, 3, 1, 6, 713, 1, 0, SystemZImpOpBase + 12, 1612, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3054 = WFKEDB
4176 { 3053, 2, 0, 6, 728, 1, 1, SystemZImpOpBase + 1, 482, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3053 = WFKDB
4177 { 3052, 4, 0, 6, 727, 1, 1, SystemZImpOpBase + 1, 1604, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3052 = WFK
4178 { 3051, 4, 1, 6, 666, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3051 = WFIXB
4179 { 3050, 4, 1, 6, 665, 1, 0, SystemZImpOpBase + 12, 1608, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3050 = WFISB
4180 { 3049, 4, 1, 6, 663, 1, 0, SystemZImpOpBase + 12, 1604, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3049 = WFIDB
4181 { 3048, 3, 1, 6, 704, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3048 = WFDXB
4182 { 3047, 3, 1, 6, 702, 1, 0, SystemZImpOpBase + 12, 1615, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3047 = WFDSB
4183 { 3046, 3, 1, 6, 701, 1, 0, SystemZImpOpBase + 12, 1612, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3046 = WFDDB
4184 { 3045, 2, 0, 6, 730, 1, 1, SystemZImpOpBase + 1, 415, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3045 = WFCXB
4185 { 3044, 2, 0, 6, 729, 1, 1, SystemZImpOpBase + 1, 480, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3044 = WFCSB
4186 { 3043, 3, 1, 6, 725, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3043 = WFCHXBS
4187 { 3042, 3, 1, 6, 717, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3042 = WFCHXB
4188 { 3041, 3, 1, 6, 723, 1, 1, SystemZImpOpBase + 1, 1615, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3041 = WFCHSBS
4189 { 3040, 3, 1, 6, 715, 1, 0, SystemZImpOpBase + 12, 1615, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3040 = WFCHSB
4190 { 3039, 3, 1, 6, 725, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3039 = WFCHEXBS
4191 { 3038, 3, 1, 6, 717, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3038 = WFCHEXB
4192 { 3037, 3, 1, 6, 723, 1, 1, SystemZImpOpBase + 1, 1615, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3037 = WFCHESBS
4193 { 3036, 3, 1, 6, 715, 1, 0, SystemZImpOpBase + 12, 1615, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3036 = WFCHESB
4194 { 3035, 3, 1, 6, 882, 1, 1, SystemZImpOpBase + 1, 1612, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3035 = WFCHEDBS
4195 { 3034, 3, 1, 6, 712, 1, 0, SystemZImpOpBase + 12, 1612, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3034 = WFCHEDB
4196 { 3033, 3, 1, 6, 882, 1, 1, SystemZImpOpBase + 1, 1612, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3033 = WFCHDBS
4197 { 3032, 3, 1, 6, 712, 1, 0, SystemZImpOpBase + 12, 1612, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3032 = WFCHDB
4198 { 3031, 3, 1, 6, 725, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3031 = WFCEXBS
4199 { 3030, 3, 1, 6, 717, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3030 = WFCEXB
4200 { 3029, 3, 1, 6, 723, 1, 1, SystemZImpOpBase + 1, 1615, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3029 = WFCESBS
4201 { 3028, 3, 1, 6, 715, 1, 0, SystemZImpOpBase + 12, 1615, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3028 = WFCESB
4202 { 3027, 3, 1, 6, 882, 1, 1, SystemZImpOpBase + 1, 1612, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3027 = WFCEDBS
4203 { 3026, 3, 1, 6, 712, 1, 0, SystemZImpOpBase + 12, 1612, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3026 = WFCEDB
4204 { 3025, 2, 0, 6, 728, 1, 1, SystemZImpOpBase + 1, 482, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3025 = WFCDB
4205 { 3024, 4, 0, 6, 727, 1, 1, SystemZImpOpBase + 1, 1604, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3024 = WFC
4206 { 3023, 3, 1, 6, 689, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3023 = WFAXB
4207 { 3022, 3, 1, 6, 688, 1, 0, SystemZImpOpBase + 12, 1615, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3022 = WFASB
4208 { 3021, 3, 1, 6, 686, 1, 0, SystemZImpOpBase + 12, 1612, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3021 = WFADB
4209 { 3020, 4, 1, 6, 651, 1, 0, SystemZImpOpBase + 12, 1604, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3020 = WCLGDB
4210 { 3019, 4, 1, 6, 653, 1, 0, SystemZImpOpBase + 12, 1608, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3019 = WCLFEB
4211 { 3018, 4, 1, 6, 651, 1, 0, SystemZImpOpBase + 12, 1604, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3018 = WCGDB
4212 { 3017, 4, 1, 6, 653, 1, 0, SystemZImpOpBase + 12, 1608, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3017 = WCFEB
4213 { 3016, 4, 1, 6, 647, 1, 0, SystemZImpOpBase + 12, 1608, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3016 = WCELFB
4214 { 3015, 4, 1, 6, 647, 1, 0, SystemZImpOpBase + 12, 1608, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3015 = WCEFB
4215 { 3014, 4, 1, 6, 645, 1, 0, SystemZImpOpBase + 12, 1604, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3014 = WCDLGB
4216 { 3013, 4, 1, 6, 645, 1, 0, SystemZImpOpBase + 12, 1604, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #3013 = WCDGB
4217 { 3012, 1, 1, 6, 530, 0, 0, SystemZImpOpBase + 0, 1598, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #3012 = VZERO
4218 { 3011, 3, 1, 6, 586, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #3011 = VX
4219 { 3010, 2, 1, 6, 576, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #3010 = VUPLLH
4220 { 3009, 2, 1, 6, 576, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #3009 = VUPLLF
4221 { 3008, 2, 1, 6, 576, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #3008 = VUPLLB
4222 { 3007, 3, 1, 6, 576, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #3007 = VUPLL
4223 { 3006, 2, 1, 6, 575, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #3006 = VUPLHW
4224 { 3005, 2, 1, 6, 575, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #3005 = VUPLHH
4225 { 3004, 2, 1, 6, 575, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #3004 = VUPLHF
4226 { 3003, 2, 1, 6, 575, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #3003 = VUPLHB
4227 { 3002, 3, 1, 6, 575, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #3002 = VUPLH
4228 { 3001, 2, 1, 6, 574, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #3001 = VUPLF
4229 { 3000, 2, 1, 6, 574, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #3000 = VUPLB
4230 { 2999, 3, 1, 6, 574, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2999 = VUPL
4231 { 2998, 3, 1, 6, 772, 0, 1, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2998 = VUPKZL
4232 { 2997, 3, 1, 6, 771, 0, 1, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2997 = VUPKZH
4233 { 2996, 4, 0, 6, 755, 0, 0, SystemZImpOpBase + 0, 1575, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2996 = VUPKZ
4234 { 2995, 2, 1, 6, 573, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2995 = VUPHH
4235 { 2994, 2, 1, 6, 573, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2994 = VUPHF
4236 { 2993, 2, 1, 6, 573, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2993 = VUPHB
4237 { 2992, 3, 1, 6, 573, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2992 = VUPH
4238 { 2991, 1, 0, 6, 764, 0, 1, SystemZImpOpBase + 0, 1598, 0, 0x0ULL }, // Inst #2991 = VTP
4239 { 2990, 2, 0, 6, 641, 0, 1, SystemZImpOpBase + 0, 415, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2990 = VTM
4240 { 2989, 3, 1, 6, 632, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2989 = VSUMQG
4241 { 2988, 3, 1, 6, 632, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2988 = VSUMQF
4242 { 2987, 4, 1, 6, 632, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2987 = VSUMQ
4243 { 2986, 3, 1, 6, 630, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2986 = VSUMH
4244 { 2985, 3, 1, 6, 631, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2985 = VSUMGH
4245 { 2984, 3, 1, 6, 631, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2984 = VSUMGF
4246 { 2983, 4, 1, 6, 631, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2983 = VSUMG
4247 { 2982, 3, 1, 6, 630, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2982 = VSUMB
4248 { 2981, 4, 1, 6, 630, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2981 = VSUM
4249 { 2980, 4, 1, 6, 749, 0, 1, SystemZImpOpBase + 0, 1449, 0, 0x0ULL }, // Inst #2980 = VSTRSZH
4250 { 2979, 4, 1, 6, 749, 0, 1, SystemZImpOpBase + 0, 1449, 0, 0x0ULL }, // Inst #2979 = VSTRSZF
4251 { 2978, 4, 1, 6, 749, 0, 1, SystemZImpOpBase + 0, 1449, 0, 0x0ULL }, // Inst #2978 = VSTRSZB
4252 { 2977, 5, 1, 6, 748, 0, 1, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2977 = VSTRSH
4253 { 2976, 5, 1, 6, 748, 0, 1, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2976 = VSTRSF
4254 { 2975, 5, 1, 6, 748, 0, 1, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2975 = VSTRSB
4255 { 2974, 6, 1, 6, 748, 0, 1, SystemZImpOpBase + 0, 1513, 0, 0x0ULL }, // Inst #2974 = VSTRS
4256 { 2973, 4, 0, 6, 550, 0, 0, SystemZImpOpBase + 0, 1562, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2973 = VSTRLR
4257 { 2972, 4, 0, 6, 550, 0, 0, SystemZImpOpBase + 0, 1575, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2972 = VSTRL
4258 { 2971, 5, 1, 6, 747, 0, 1, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2971 = VSTRCZHS
4259 { 2970, 5, 1, 6, 746, 0, 0, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2970 = VSTRCZH
4260 { 2969, 5, 1, 6, 747, 0, 1, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2969 = VSTRCZFS
4261 { 2968, 5, 1, 6, 746, 0, 0, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2968 = VSTRCZF
4262 { 2967, 5, 1, 6, 747, 0, 1, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2967 = VSTRCZBS
4263 { 2966, 5, 1, 6, 746, 0, 0, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2966 = VSTRCZB
4264 { 2965, 5, 1, 6, 745, 0, 1, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2965 = VSTRCHS
4265 { 2964, 5, 1, 6, 744, 0, 0, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2964 = VSTRCH
4266 { 2963, 5, 1, 6, 745, 0, 1, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2963 = VSTRCFS
4267 { 2962, 5, 1, 6, 744, 0, 0, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2962 = VSTRCF
4268 { 2961, 5, 1, 6, 745, 0, 1, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2961 = VSTRCBS
4269 { 2960, 5, 1, 6, 744, 0, 0, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2960 = VSTRCB
4270 { 2959, 6, 1, 6, 744, 0, 1, SystemZImpOpBase + 0, 1513, 0, 0x0ULL }, // Inst #2959 = VSTRC
4271 { 2958, 5, 0, 6, 548, 0, 0, SystemZImpOpBase + 0, 1570, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2958 = VSTMAlign
4272 { 2957, 4, 0, 6, 548, 0, 0, SystemZImpOpBase + 0, 1566, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2957 = VSTM
4273 { 2956, 4, 0, 6, 545, 0, 0, SystemZImpOpBase + 0, 1562, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2956 = VSTL
4274 { 2955, 4, 0, 6, 557, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2955 = VSTERH
4275 { 2954, 4, 0, 6, 557, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2954 = VSTERG
4276 { 2953, 4, 0, 6, 557, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2953 = VSTERF
4277 { 2952, 5, 0, 6, 557, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2952 = VSTER
4278 { 2951, 5, 0, 6, 547, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #2951 = VSTEH
4279 { 2950, 5, 0, 6, 546, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayStore), 0x100ULL }, // Inst #2950 = VSTEG
4280 { 2949, 5, 0, 6, 546, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #2949 = VSTEF
4281 { 2948, 5, 0, 6, 558, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayStore), 0x40ULL }, // Inst #2948 = VSTEBRH
4282 { 2947, 5, 0, 6, 559, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayStore), 0x100ULL }, // Inst #2947 = VSTEBRG
4283 { 2946, 5, 0, 6, 559, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #2946 = VSTEBRF
4284 { 2945, 5, 0, 6, 547, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayStore), 0x20ULL }, // Inst #2945 = VSTEB
4285 { 2944, 4, 0, 6, 556, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2944 = VSTBRQ
4286 { 2943, 4, 0, 6, 556, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2943 = VSTBRH
4287 { 2942, 4, 0, 6, 556, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2942 = VSTBRG
4288 { 2941, 4, 0, 6, 556, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2941 = VSTBRF
4289 { 2940, 5, 0, 6, 556, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2940 = VSTBR
4290 { 2939, 5, 0, 6, 545, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2939 = VSTAlign
4291 { 2938, 4, 0, 6, 545, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayStore), 0x200ULL }, // Inst #2938 = VST
4292 { 2937, 5, 1, 6, 769, 0, 1, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2937 = VSRPR
4293 { 2936, 5, 1, 6, 762, 0, 1, SystemZImpOpBase + 0, 1453, 0, 0x0ULL }, // Inst #2936 = VSRP
4294 { 2935, 3, 1, 6, 624, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2935 = VSRLB
4295 { 2934, 3, 1, 6, 623, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2934 = VSRL
4296 { 2933, 4, 1, 6, 626, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2933 = VSRD
4297 { 2932, 3, 1, 6, 624, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2932 = VSRAB
4298 { 2931, 3, 1, 6, 623, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2931 = VSRA
4299 { 2930, 3, 1, 6, 629, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2930 = VSQ
4300 { 2929, 5, 1, 6, 758, 0, 1, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2929 = VSP
4301 { 2928, 4, 1, 6, 621, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2928 = VSLDB
4302 { 2927, 4, 1, 6, 625, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2927 = VSLD
4303 { 2926, 3, 1, 6, 622, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2926 = VSLB
4304 { 2925, 3, 1, 6, 621, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2925 = VSL
4305 { 2924, 3, 1, 6, 629, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2924 = VSH
4306 { 2923, 3, 1, 6, 629, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2923 = VSG
4307 { 2922, 3, 1, 6, 629, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2922 = VSF
4308 { 2921, 4, 1, 6, 566, 0, 0, SystemZImpOpBase + 0, 1449, 0, 0x0ULL }, // Inst #2921 = VSEL
4309 { 2920, 2, 1, 6, 572, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2920 = VSEGH
4310 { 2919, 2, 1, 6, 572, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2919 = VSEGF
4311 { 2918, 2, 1, 6, 572, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2918 = VSEGB
4312 { 2917, 3, 1, 6, 572, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2917 = VSEG
4313 { 2916, 5, 1, 6, 761, 0, 1, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2916 = VSDP
4314 { 2915, 3, 1, 6, 766, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2915 = VSCSHP
4315 { 2914, 4, 1, 6, 765, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2914 = VSCHXP
4316 { 2913, 4, 1, 6, 765, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2913 = VSCHSP
4317 { 2912, 5, 1, 6, 765, 0, 0, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2912 = VSCHP
4318 { 2911, 4, 1, 6, 765, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2911 = VSCHDP
4319 { 2910, 5, 0, 6, 549, 0, 0, SystemZImpOpBase + 0, 1599, 0|(1ULL<<MCID::MayStore), 0x100ULL }, // Inst #2910 = VSCEG
4320 { 2909, 5, 0, 6, 549, 0, 0, SystemZImpOpBase + 0, 1599, 0|(1ULL<<MCID::MayStore), 0x80ULL }, // Inst #2909 = VSCEF
4321 { 2908, 3, 1, 6, 628, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2908 = VSCBIQ
4322 { 2907, 3, 1, 6, 628, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2907 = VSCBIH
4323 { 2906, 3, 1, 6, 628, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2906 = VSCBIG
4324 { 2905, 3, 1, 6, 628, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2905 = VSCBIF
4325 { 2904, 3, 1, 6, 628, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2904 = VSCBIB
4326 { 2903, 4, 1, 6, 628, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2903 = VSCBI
4327 { 2902, 4, 1, 6, 627, 0, 0, SystemZImpOpBase + 0, 1449, 0, 0x0ULL }, // Inst #2902 = VSBIQ
4328 { 2901, 5, 1, 6, 627, 0, 0, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2901 = VSBI
4329 { 2900, 4, 1, 6, 627, 0, 0, SystemZImpOpBase + 0, 1449, 0, 0x0ULL }, // Inst #2900 = VSBCBIQ
4330 { 2899, 5, 1, 6, 627, 0, 0, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2899 = VSBCBI
4331 { 2898, 3, 1, 6, 627, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2898 = VSB
4332 { 2897, 4, 1, 6, 629, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2897 = VS
4333 { 2896, 5, 1, 6, 760, 0, 1, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2896 = VRP
4334 { 2895, 2, 1, 6, 534, 0, 0, SystemZImpOpBase + 0, 1519, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2895 = VREPIH
4335 { 2894, 2, 1, 6, 534, 0, 0, SystemZImpOpBase + 0, 1519, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2894 = VREPIG
4336 { 2893, 2, 1, 6, 534, 0, 0, SystemZImpOpBase + 0, 1519, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2893 = VREPIF
4337 { 2892, 2, 1, 6, 534, 0, 0, SystemZImpOpBase + 0, 1519, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2892 = VREPIB
4338 { 2891, 3, 1, 6, 534, 0, 0, SystemZImpOpBase + 0, 1531, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2891 = VREPI
4339 { 2890, 3, 1, 6, 565, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2890 = VREPH
4340 { 2889, 3, 1, 6, 565, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2889 = VREPG
4341 { 2888, 3, 1, 6, 565, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2888 = VREPF
4342 { 2887, 3, 1, 6, 565, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2887 = VREPB
4343 { 2886, 4, 1, 6, 565, 0, 0, SystemZImpOpBase + 0, 1458, 0, 0x0ULL }, // Inst #2886 = VREP
4344 { 2885, 5, 1, 6, 763, 0, 1, SystemZImpOpBase + 0, 1453, 0, 0x0ULL }, // Inst #2885 = VPSOP
4345 { 2884, 2, 1, 6, 611, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2884 = VPOPCTH
4346 { 2883, 2, 1, 6, 611, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2883 = VPOPCTG
4347 { 2882, 2, 1, 6, 611, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2882 = VPOPCTF
4348 { 2881, 2, 1, 6, 611, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2881 = VPOPCTB
4349 { 2880, 3, 1, 6, 876, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2880 = VPOPCT
4350 { 2879, 5, 1, 6, 770, 0, 1, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2879 = VPKZR
4351 { 2878, 4, 1, 6, 754, 0, 0, SystemZImpOpBase + 0, 1575, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2878 = VPKZ
4352 { 2877, 3, 1, 6, 569, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2877 = VPKSHS
4353 { 2876, 3, 1, 6, 568, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2876 = VPKSH
4354 { 2875, 3, 1, 6, 569, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2875 = VPKSGS
4355 { 2874, 3, 1, 6, 568, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2874 = VPKSG
4356 { 2873, 3, 1, 6, 569, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2873 = VPKSFS
4357 { 2872, 3, 1, 6, 568, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2872 = VPKSF
4358 { 2871, 5, 1, 6, 568, 0, 1, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2871 = VPKS
4359 { 2870, 3, 1, 6, 571, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2870 = VPKLSHS
4360 { 2869, 3, 1, 6, 570, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2869 = VPKLSH
4361 { 2868, 3, 1, 6, 571, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2868 = VPKLSGS
4362 { 2867, 3, 1, 6, 570, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2867 = VPKLSG
4363 { 2866, 3, 1, 6, 571, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2866 = VPKLSFS
4364 { 2865, 3, 1, 6, 570, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2865 = VPKLSF
4365 { 2864, 5, 1, 6, 570, 0, 1, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2864 = VPKLS
4366 { 2863, 3, 1, 6, 567, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2863 = VPKH
4367 { 2862, 3, 1, 6, 567, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2862 = VPKG
4368 { 2861, 3, 1, 6, 567, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2861 = VPKF
4369 { 2860, 4, 1, 6, 567, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2860 = VPK
4370 { 2859, 4, 1, 6, 562, 0, 0, SystemZImpOpBase + 0, 1449, 0, 0x0ULL }, // Inst #2859 = VPERM
4371 { 2858, 4, 1, 6, 563, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2858 = VPDI
4372 { 2857, 1, 1, 6, 531, 0, 0, SystemZImpOpBase + 0, 1598, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2857 = VONE
4373 { 2856, 3, 1, 6, 582, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2856 = VOC
4374 { 2855, 3, 1, 6, 875, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2855 = VO
4375 { 2854, 3, 1, 6, 581, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2854 = VNX
4376 { 2853, 3, 1, 6, 874, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2853 = VNO
4377 { 2852, 3, 1, 6, 581, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2852 = VNN
4378 { 2851, 3, 1, 6, 874, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2851 = VNC
4379 { 2850, 3, 1, 6, 874, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2850 = VN
4380 { 2849, 3, 1, 6, 593, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2849 = VMXLH
4381 { 2848, 3, 1, 6, 593, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2848 = VMXLG
4382 { 2847, 3, 1, 6, 593, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2847 = VMXLF
4383 { 2846, 3, 1, 6, 593, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2846 = VMXLB
4384 { 2845, 4, 1, 6, 593, 0, 0, SystemZImpOpBase + 0, 1437, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2845 = VMXL
4385 { 2844, 3, 1, 6, 592, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2844 = VMXH
4386 { 2843, 3, 1, 6, 592, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2843 = VMXG
4387 { 2842, 3, 1, 6, 592, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2842 = VMXF
4388 { 2841, 3, 1, 6, 592, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2841 = VMXB
4389 { 2840, 4, 1, 6, 592, 0, 0, SystemZImpOpBase + 0, 1437, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2840 = VMX
4390 { 2839, 5, 1, 6, 759, 0, 1, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2839 = VMSP
4391 { 2838, 5, 1, 6, 610, 0, 0, SystemZImpOpBase + 0, 1444, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2838 = VMSLG
4392 { 2837, 6, 1, 6, 610, 0, 0, SystemZImpOpBase + 0, 1513, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2837 = VMSL
4393 { 2836, 3, 1, 6, 561, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2836 = VMRLH
4394 { 2835, 3, 1, 6, 561, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2835 = VMRLG
4395 { 2834, 3, 1, 6, 561, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2834 = VMRLF
4396 { 2833, 3, 1, 6, 561, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2833 = VMRLB
4397 { 2832, 4, 1, 6, 561, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2832 = VMRL
4398 { 2831, 3, 1, 6, 560, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2831 = VMRHH
4399 { 2830, 3, 1, 6, 560, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2830 = VMRHG
4400 { 2829, 3, 1, 6, 560, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2829 = VMRHF
4401 { 2828, 3, 1, 6, 560, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2828 = VMRHB
4402 { 2827, 4, 1, 6, 560, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2827 = VMRH
4403 { 2826, 5, 1, 6, 759, 0, 1, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2826 = VMP
4404 { 2825, 3, 1, 6, 609, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2825 = VMOH
4405 { 2824, 3, 1, 6, 609, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2824 = VMOF
4406 { 2823, 3, 1, 6, 609, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2823 = VMOB
4407 { 2822, 4, 1, 6, 609, 0, 0, SystemZImpOpBase + 0, 1437, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2822 = VMO
4408 { 2821, 3, 1, 6, 595, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2821 = VMNLH
4409 { 2820, 3, 1, 6, 595, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2820 = VMNLG
4410 { 2819, 3, 1, 6, 595, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2819 = VMNLF
4411 { 2818, 3, 1, 6, 595, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2818 = VMNLB
4412 { 2817, 4, 1, 6, 595, 0, 0, SystemZImpOpBase + 0, 1437, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2817 = VMNL
4413 { 2816, 3, 1, 6, 594, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2816 = VMNH
4414 { 2815, 3, 1, 6, 594, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2815 = VMNG
4415 { 2814, 3, 1, 6, 594, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2814 = VMNF
4416 { 2813, 3, 1, 6, 594, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2813 = VMNB
4417 { 2812, 4, 1, 6, 594, 0, 0, SystemZImpOpBase + 0, 1437, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2812 = VMN
4418 { 2811, 3, 1, 6, 608, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2811 = VMLOH
4419 { 2810, 3, 1, 6, 608, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2810 = VMLOF
4420 { 2809, 3, 1, 6, 608, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2809 = VMLOB
4421 { 2808, 4, 1, 6, 608, 0, 0, SystemZImpOpBase + 0, 1437, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2808 = VMLO
4422 { 2807, 3, 1, 6, 607, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2807 = VMLHW
4423 { 2806, 3, 1, 6, 607, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2806 = VMLHH
4424 { 2805, 3, 1, 6, 607, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2805 = VMLHF
4425 { 2804, 3, 1, 6, 607, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2804 = VMLHB
4426 { 2803, 4, 1, 6, 607, 0, 0, SystemZImpOpBase + 0, 1437, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2803 = VMLH
4427 { 2802, 3, 1, 6, 605, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2802 = VMLF
4428 { 2801, 3, 1, 6, 606, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2801 = VMLEH
4429 { 2800, 3, 1, 6, 606, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2800 = VMLEF
4430 { 2799, 3, 1, 6, 606, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2799 = VMLEB
4431 { 2798, 4, 1, 6, 606, 0, 0, SystemZImpOpBase + 0, 1437, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2798 = VMLE
4432 { 2797, 3, 1, 6, 605, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2797 = VMLB
4433 { 2796, 4, 1, 6, 605, 0, 0, SystemZImpOpBase + 0, 1437, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2796 = VML
4434 { 2795, 3, 1, 6, 604, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2795 = VMHH
4435 { 2794, 3, 1, 6, 604, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2794 = VMHF
4436 { 2793, 3, 1, 6, 604, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2793 = VMHB
4437 { 2792, 4, 1, 6, 604, 0, 0, SystemZImpOpBase + 0, 1437, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2792 = VMH
4438 { 2791, 3, 1, 6, 603, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2791 = VMEH
4439 { 2790, 3, 1, 6, 603, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2790 = VMEF
4440 { 2789, 3, 1, 6, 603, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2789 = VMEB
4441 { 2788, 4, 1, 6, 603, 0, 0, SystemZImpOpBase + 0, 1437, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2788 = VME
4442 { 2787, 4, 1, 6, 600, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2787 = VMAOH
4443 { 2786, 4, 1, 6, 600, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2786 = VMAOF
4444 { 2785, 4, 1, 6, 600, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2785 = VMAOB
4445 { 2784, 5, 1, 6, 600, 0, 0, SystemZImpOpBase + 0, 1444, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2784 = VMAO
4446 { 2783, 4, 1, 6, 599, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2783 = VMALOH
4447 { 2782, 4, 1, 6, 599, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2782 = VMALOF
4448 { 2781, 4, 1, 6, 599, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2781 = VMALOB
4449 { 2780, 5, 1, 6, 599, 0, 0, SystemZImpOpBase + 0, 1444, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2780 = VMALO
4450 { 2779, 4, 1, 6, 598, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2779 = VMALHW
4451 { 2778, 4, 1, 6, 598, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2778 = VMALHH
4452 { 2777, 4, 1, 6, 598, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2777 = VMALHF
4453 { 2776, 4, 1, 6, 598, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2776 = VMALHB
4454 { 2775, 5, 1, 6, 598, 0, 0, SystemZImpOpBase + 0, 1444, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2775 = VMALH
4455 { 2774, 4, 1, 6, 596, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2774 = VMALF
4456 { 2773, 4, 1, 6, 597, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2773 = VMALEH
4457 { 2772, 4, 1, 6, 597, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2772 = VMALEF
4458 { 2771, 4, 1, 6, 597, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2771 = VMALEB
4459 { 2770, 5, 1, 6, 597, 0, 0, SystemZImpOpBase + 0, 1444, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2770 = VMALE
4460 { 2769, 4, 1, 6, 596, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2769 = VMALB
4461 { 2768, 5, 1, 6, 596, 0, 0, SystemZImpOpBase + 0, 1444, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2768 = VMAL
4462 { 2767, 4, 1, 6, 602, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2767 = VMAHH
4463 { 2766, 4, 1, 6, 602, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2766 = VMAHF
4464 { 2765, 4, 1, 6, 602, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2765 = VMAHB
4465 { 2764, 5, 1, 6, 602, 0, 0, SystemZImpOpBase + 0, 1444, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2764 = VMAH
4466 { 2763, 4, 1, 6, 601, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2763 = VMAEH
4467 { 2762, 4, 1, 6, 601, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2762 = VMAEF
4468 { 2761, 4, 1, 6, 601, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2761 = VMAEB
4469 { 2760, 5, 1, 6, 601, 0, 0, SystemZImpOpBase + 0, 1444, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2760 = VMAE
4470 { 2759, 3, 1, 6, 529, 0, 0, SystemZImpOpBase + 0, 1595, 0, 0x0ULL }, // Inst #2759 = VLVGP
4471 { 2758, 5, 1, 6, 528, 0, 0, SystemZImpOpBase + 0, 1585, 0, 0x0ULL }, // Inst #2758 = VLVGH
4472 { 2757, 5, 1, 6, 528, 0, 0, SystemZImpOpBase + 0, 1590, 0, 0x0ULL }, // Inst #2757 = VLVGG
4473 { 2756, 5, 1, 6, 528, 0, 0, SystemZImpOpBase + 0, 1585, 0, 0x0ULL }, // Inst #2756 = VLVGF
4474 { 2755, 5, 1, 6, 528, 0, 0, SystemZImpOpBase + 0, 1585, 0, 0x0ULL }, // Inst #2755 = VLVGB
4475 { 2754, 6, 1, 6, 528, 0, 0, SystemZImpOpBase + 0, 1579, 0, 0x0ULL }, // Inst #2754 = VLVG
4476 { 2753, 4, 1, 6, 544, 0, 0, SystemZImpOpBase + 0, 1562, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2753 = VLRLR
4477 { 2752, 4, 1, 6, 544, 0, 0, SystemZImpOpBase + 0, 1575, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2752 = VLRL
4478 { 2751, 4, 1, 6, 540, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2751 = VLREPH
4479 { 2750, 4, 1, 6, 540, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2750 = VLREPG
4480 { 2749, 4, 1, 6, 540, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2749 = VLREPF
4481 { 2748, 4, 1, 6, 540, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x20ULL }, // Inst #2748 = VLREPB
4482 { 2747, 5, 1, 6, 540, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2747 = VLREP
4483 { 2746, 2, 1, 6, 526, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2746 = VLR
4484 { 2745, 2, 1, 6, 591, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2745 = VLPH
4485 { 2744, 2, 1, 6, 591, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2744 = VLPG
4486 { 2743, 2, 1, 6, 591, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2743 = VLPF
4487 { 2742, 2, 1, 6, 591, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2742 = VLPB
4488 { 2741, 3, 1, 6, 591, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2741 = VLP
4489 { 2740, 5, 2, 6, 543, 0, 0, SystemZImpOpBase + 0, 1570, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2740 = VLMAlign
4490 { 2739, 4, 2, 6, 543, 0, 0, SystemZImpOpBase + 0, 1566, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2739 = VLM
4491 { 2738, 4, 1, 6, 539, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2738 = VLLEZLF
4492 { 2737, 4, 1, 6, 873, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2737 = VLLEZH
4493 { 2736, 4, 1, 6, 873, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2736 = VLLEZG
4494 { 2735, 4, 1, 6, 873, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2735 = VLLEZF
4495 { 2734, 4, 1, 6, 873, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x20ULL }, // Inst #2734 = VLLEZB
4496 { 2733, 5, 1, 6, 873, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2733 = VLLEZ
4497 { 2732, 4, 1, 6, 554, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2732 = VLLEBRZH
4498 { 2731, 4, 1, 6, 554, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2731 = VLLEBRZG
4499 { 2730, 4, 1, 6, 554, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2730 = VLLEBRZF
4500 { 2729, 4, 1, 6, 554, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2729 = VLLEBRZE
4501 { 2728, 5, 1, 6, 554, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2728 = VLLEBRZ
4502 { 2727, 4, 1, 6, 537, 0, 0, SystemZImpOpBase + 0, 1562, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2727 = VLL
4503 { 2726, 3, 1, 6, 753, 0, 0, SystemZImpOpBase + 0, 1531, 0, 0x0ULL }, // Inst #2726 = VLIP
4504 { 2725, 4, 1, 6, 527, 0, 0, SystemZImpOpBase + 0, 1558, 0, 0x0ULL }, // Inst #2725 = VLGVH
4505 { 2724, 4, 1, 6, 527, 0, 0, SystemZImpOpBase + 0, 1558, 0, 0x0ULL }, // Inst #2724 = VLGVG
4506 { 2723, 4, 1, 6, 527, 0, 0, SystemZImpOpBase + 0, 1558, 0, 0x0ULL }, // Inst #2723 = VLGVF
4507 { 2722, 4, 1, 6, 527, 0, 0, SystemZImpOpBase + 0, 1558, 0, 0x0ULL }, // Inst #2722 = VLGVB
4508 { 2721, 5, 1, 6, 527, 0, 0, SystemZImpOpBase + 0, 1553, 0, 0x0ULL }, // Inst #2721 = VLGV
4509 { 2720, 4, 1, 6, 552, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2720 = VLERH
4510 { 2719, 4, 1, 6, 552, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2719 = VLERG
4511 { 2718, 4, 1, 6, 552, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2718 = VLERF
4512 { 2717, 5, 1, 6, 552, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2717 = VLER
4513 { 2716, 4, 1, 6, 535, 0, 0, SystemZImpOpBase + 0, 1549, 0, 0x0ULL }, // Inst #2716 = VLEIH
4514 { 2715, 4, 1, 6, 535, 0, 0, SystemZImpOpBase + 0, 1549, 0, 0x0ULL }, // Inst #2715 = VLEIG
4515 { 2714, 4, 1, 6, 535, 0, 0, SystemZImpOpBase + 0, 1549, 0, 0x0ULL }, // Inst #2714 = VLEIF
4516 { 2713, 4, 1, 6, 535, 0, 0, SystemZImpOpBase + 0, 1549, 0, 0x0ULL }, // Inst #2713 = VLEIB
4517 { 2712, 6, 1, 6, 541, 0, 0, SystemZImpOpBase + 0, 1543, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2712 = VLEH
4518 { 2711, 6, 1, 6, 541, 0, 0, SystemZImpOpBase + 0, 1543, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2711 = VLEG
4519 { 2710, 6, 1, 6, 541, 0, 0, SystemZImpOpBase + 0, 1543, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2710 = VLEF
4520 { 2709, 4, 1, 6, 655, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2709 = VLEDB
4521 { 2708, 5, 1, 6, 654, 1, 0, SystemZImpOpBase + 12, 1453, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2708 = VLED
4522 { 2707, 6, 1, 6, 553, 0, 0, SystemZImpOpBase + 0, 1543, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2707 = VLEBRH
4523 { 2706, 6, 1, 6, 553, 0, 0, SystemZImpOpBase + 0, 1543, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2706 = VLEBRG
4524 { 2705, 6, 1, 6, 553, 0, 0, SystemZImpOpBase + 0, 1543, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2705 = VLEBRF
4525 { 2704, 6, 1, 6, 541, 0, 0, SystemZImpOpBase + 0, 1543, 0|(1ULL<<MCID::MayLoad), 0x20ULL }, // Inst #2704 = VLEB
4526 { 2703, 2, 1, 6, 655, 1, 0, SystemZImpOpBase + 12, 415, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2703 = VLDEB
4527 { 2702, 4, 1, 6, 654, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2702 = VLDE
4528 { 2701, 2, 1, 6, 590, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2701 = VLCH
4529 { 2700, 2, 1, 6, 590, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2700 = VLCG
4530 { 2699, 2, 1, 6, 590, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2699 = VLCF
4531 { 2698, 2, 1, 6, 590, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2698 = VLCB
4532 { 2697, 3, 1, 6, 590, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2697 = VLC
4533 { 2696, 4, 1, 6, 555, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x40ULL }, // Inst #2696 = VLBRREPH
4534 { 2695, 4, 1, 6, 555, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2695 = VLBRREPG
4535 { 2694, 4, 1, 6, 555, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2694 = VLBRREPF
4536 { 2693, 5, 1, 6, 555, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2693 = VLBRREP
4537 { 2692, 4, 1, 6, 551, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2692 = VLBRQ
4538 { 2691, 4, 1, 6, 551, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2691 = VLBRH
4539 { 2690, 4, 1, 6, 551, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2690 = VLBRG
4540 { 2689, 4, 1, 6, 551, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2689 = VLBRF
4541 { 2688, 5, 1, 6, 551, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2688 = VLBR
4542 { 2687, 5, 1, 6, 537, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2687 = VLBB
4543 { 2686, 5, 1, 6, 536, 0, 0, SystemZImpOpBase + 0, 1538, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2686 = VLAlign
4544 { 2685, 4, 1, 6, 536, 0, 0, SystemZImpOpBase + 0, 1534, 0|(1ULL<<MCID::MayLoad), 0x200ULL }, // Inst #2685 = VL
4545 { 2684, 2, 1, 6, 743, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2684 = VISTRHS
4546 { 2683, 3, 1, 6, 742, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2683 = VISTRH
4547 { 2682, 2, 1, 6, 743, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2682 = VISTRFS
4548 { 2681, 3, 1, 6, 742, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2681 = VISTRF
4549 { 2680, 2, 1, 6, 743, 0, 1, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2680 = VISTRBS
4550 { 2679, 3, 1, 6, 742, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2679 = VISTRB
4551 { 2678, 4, 1, 6, 742, 0, 1, SystemZImpOpBase + 0, 1458, 0, 0x0ULL }, // Inst #2678 = VISTR
4552 { 2677, 3, 1, 6, 533, 0, 0, SystemZImpOpBase + 0, 1531, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2677 = VGMH
4553 { 2676, 3, 1, 6, 533, 0, 0, SystemZImpOpBase + 0, 1531, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2676 = VGMG
4554 { 2675, 3, 1, 6, 533, 0, 0, SystemZImpOpBase + 0, 1531, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2675 = VGMF
4555 { 2674, 3, 1, 6, 533, 0, 0, SystemZImpOpBase + 0, 1531, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2674 = VGMB
4556 { 2673, 4, 1, 6, 533, 0, 0, SystemZImpOpBase + 0, 1527, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2673 = VGM
4557 { 2672, 3, 1, 6, 589, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2672 = VGFMH
4558 { 2671, 3, 1, 6, 589, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2671 = VGFMG
4559 { 2670, 3, 1, 6, 589, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2670 = VGFMF
4560 { 2669, 3, 1, 6, 589, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2669 = VGFMB
4561 { 2668, 4, 1, 6, 588, 0, 0, SystemZImpOpBase + 0, 1449, 0, 0x0ULL }, // Inst #2668 = VGFMAH
4562 { 2667, 4, 1, 6, 588, 0, 0, SystemZImpOpBase + 0, 1449, 0, 0x0ULL }, // Inst #2667 = VGFMAG
4563 { 2666, 4, 1, 6, 588, 0, 0, SystemZImpOpBase + 0, 1449, 0, 0x0ULL }, // Inst #2666 = VGFMAF
4564 { 2665, 4, 1, 6, 588, 0, 0, SystemZImpOpBase + 0, 1449, 0, 0x0ULL }, // Inst #2665 = VGFMAB
4565 { 2664, 5, 1, 6, 588, 0, 0, SystemZImpOpBase + 0, 1444, 0, 0x0ULL }, // Inst #2664 = VGFMA
4566 { 2663, 4, 1, 6, 587, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2663 = VGFM
4567 { 2662, 6, 1, 6, 542, 0, 0, SystemZImpOpBase + 0, 1521, 0|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #2662 = VGEG
4568 { 2661, 6, 1, 6, 542, 0, 0, SystemZImpOpBase + 0, 1521, 0|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #2661 = VGEF
4569 { 2660, 2, 1, 6, 532, 0, 0, SystemZImpOpBase + 0, 1519, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #2660 = VGBM
4570 { 2659, 3, 1, 6, 682, 0, 1, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2659 = VFTCISB
4571 { 2658, 3, 1, 6, 681, 0, 1, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2658 = VFTCIDB
4572 { 2657, 5, 1, 6, 680, 0, 1, SystemZImpOpBase + 0, 1453, 0, 0x0ULL }, // Inst #2657 = VFTCI
4573 { 2656, 3, 1, 6, 687, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2656 = VFSSB
4574 { 2655, 2, 1, 6, 708, 1, 0, SystemZImpOpBase + 12, 415, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2655 = VFSQSB
4575 { 2654, 2, 1, 6, 706, 1, 0, SystemZImpOpBase + 12, 415, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2654 = VFSQDB
4576 { 2653, 4, 1, 6, 705, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2653 = VFSQ
4577 { 2652, 3, 1, 6, 685, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2652 = VFSDB
4578 { 2651, 5, 1, 6, 684, 1, 0, SystemZImpOpBase + 12, 427, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2651 = VFS
4579 { 2650, 3, 1, 6, 669, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2650 = VFPSOSB
4580 { 2649, 3, 1, 6, 668, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2649 = VFPSODB
4581 { 2648, 5, 1, 6, 667, 0, 0, SystemZImpOpBase + 0, 1453, 0, 0x0ULL }, // Inst #2648 = VFPSO
4582 { 2647, 4, 1, 6, 697, 1, 0, SystemZImpOpBase + 12, 1449, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2647 = VFNMSSB
4583 { 2646, 4, 1, 6, 695, 1, 0, SystemZImpOpBase + 12, 1449, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2646 = VFNMSDB
4584 { 2645, 6, 1, 6, 694, 1, 0, SystemZImpOpBase + 12, 1513, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2645 = VFNMS
4585 { 2644, 4, 1, 6, 697, 1, 0, SystemZImpOpBase + 12, 1449, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2644 = VFNMASB
4586 { 2643, 4, 1, 6, 695, 1, 0, SystemZImpOpBase + 12, 1449, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2643 = VFNMADB
4587 { 2642, 6, 1, 6, 694, 1, 0, SystemZImpOpBase + 12, 1513, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2642 = VFNMA
4588 { 2641, 4, 1, 6, 697, 1, 0, SystemZImpOpBase + 12, 1449, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2641 = VFMSSB
4589 { 2640, 4, 1, 6, 879, 1, 0, SystemZImpOpBase + 12, 1449, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2640 = VFMSDB
4590 { 2639, 3, 1, 6, 692, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2639 = VFMSB
4591 { 2638, 6, 1, 6, 878, 1, 0, SystemZImpOpBase + 12, 1513, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2638 = VFMS
4592 { 2637, 4, 1, 6, 677, 1, 0, SystemZImpOpBase + 12, 1437, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2637 = VFMINSB
4593 { 2636, 4, 1, 6, 675, 1, 0, SystemZImpOpBase + 12, 1437, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2636 = VFMINDB
4594 { 2635, 6, 1, 6, 674, 1, 0, SystemZImpOpBase + 12, 1507, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2635 = VFMIN
4595 { 2634, 3, 1, 6, 690, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2634 = VFMDB
4596 { 2633, 4, 1, 6, 677, 1, 0, SystemZImpOpBase + 12, 1437, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2633 = VFMAXSB
4597 { 2632, 4, 1, 6, 675, 1, 0, SystemZImpOpBase + 12, 1437, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2632 = VFMAXDB
4598 { 2631, 6, 1, 6, 674, 1, 0, SystemZImpOpBase + 12, 1507, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2631 = VFMAX
4599 { 2630, 4, 1, 6, 697, 1, 0, SystemZImpOpBase + 12, 1449, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2630 = VFMASB
4600 { 2629, 4, 1, 6, 879, 1, 0, SystemZImpOpBase + 12, 1449, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2629 = VFMADB
4601 { 2628, 6, 1, 6, 878, 1, 0, SystemZImpOpBase + 12, 1513, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2628 = VFMA
4602 { 2627, 5, 1, 6, 867, 1, 0, SystemZImpOpBase + 12, 427, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2627 = VFM
4603 { 2626, 4, 1, 6, 658, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2626 = VFLRD
4604 { 2625, 5, 1, 6, 657, 1, 0, SystemZImpOpBase + 12, 1453, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2625 = VFLR
4605 { 2624, 2, 1, 6, 672, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2624 = VFLPSB
4606 { 2623, 2, 1, 6, 671, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2623 = VFLPDB
4607 { 2622, 2, 1, 6, 672, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2622 = VFLNSB
4608 { 2621, 2, 1, 6, 671, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2621 = VFLNDB
4609 { 2620, 2, 1, 6, 658, 1, 0, SystemZImpOpBase + 12, 415, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2620 = VFLLS
4610 { 2619, 4, 1, 6, 657, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2619 = VFLL
4611 { 2618, 2, 1, 6, 672, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2618 = VFLCSB
4612 { 2617, 2, 1, 6, 671, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2617 = VFLCDB
4613 { 2616, 3, 1, 6, 722, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2616 = VFKHSBS
4614 { 2615, 3, 1, 6, 714, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2615 = VFKHSB
4615 { 2614, 3, 1, 6, 722, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2614 = VFKHESBS
4616 { 2613, 3, 1, 6, 714, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2613 = VFKHESB
4617 { 2612, 3, 1, 6, 720, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2612 = VFKHEDBS
4618 { 2611, 3, 1, 6, 711, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2611 = VFKHEDB
4619 { 2610, 3, 1, 6, 720, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2610 = VFKHDBS
4620 { 2609, 3, 1, 6, 711, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2609 = VFKHDB
4621 { 2608, 3, 1, 6, 722, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2608 = VFKESBS
4622 { 2607, 3, 1, 6, 714, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2607 = VFKESB
4623 { 2606, 3, 1, 6, 720, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2606 = VFKEDBS
4624 { 2605, 3, 1, 6, 711, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2605 = VFKEDB
4625 { 2604, 4, 1, 6, 664, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2604 = VFISB
4626 { 2603, 4, 1, 6, 662, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2603 = VFIDB
4627 { 2602, 5, 1, 6, 866, 1, 0, SystemZImpOpBase + 12, 1453, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2602 = VFI
4628 { 2601, 3, 1, 6, 741, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2601 = VFENEZHS
4629 { 2600, 3, 1, 6, 740, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2600 = VFENEZH
4630 { 2599, 3, 1, 6, 741, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2599 = VFENEZFS
4631 { 2598, 3, 1, 6, 740, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2598 = VFENEZF
4632 { 2597, 3, 1, 6, 741, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2597 = VFENEZBS
4633 { 2596, 3, 1, 6, 740, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2596 = VFENEZB
4634 { 2595, 3, 1, 6, 741, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2595 = VFENEHS
4635 { 2594, 4, 1, 6, 740, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2594 = VFENEH
4636 { 2593, 3, 1, 6, 741, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2593 = VFENEFS
4637 { 2592, 4, 1, 6, 740, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2592 = VFENEF
4638 { 2591, 3, 1, 6, 741, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2591 = VFENEBS
4639 { 2590, 4, 1, 6, 740, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2590 = VFENEB
4640 { 2589, 5, 1, 6, 740, 0, 1, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2589 = VFENE
4641 { 2588, 3, 1, 6, 739, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2588 = VFEEZHS
4642 { 2587, 3, 1, 6, 738, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2587 = VFEEZH
4643 { 2586, 3, 1, 6, 739, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2586 = VFEEZFS
4644 { 2585, 3, 1, 6, 738, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2585 = VFEEZF
4645 { 2584, 3, 1, 6, 739, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2584 = VFEEZBS
4646 { 2583, 3, 1, 6, 738, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2583 = VFEEZB
4647 { 2582, 3, 1, 6, 739, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2582 = VFEEHS
4648 { 2581, 4, 1, 6, 738, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2581 = VFEEH
4649 { 2580, 3, 1, 6, 739, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2580 = VFEEFS
4650 { 2579, 4, 1, 6, 738, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2579 = VFEEF
4651 { 2578, 3, 1, 6, 739, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2578 = VFEEBS
4652 { 2577, 4, 1, 6, 738, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2577 = VFEEB
4653 { 2576, 5, 1, 6, 738, 0, 1, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2576 = VFEE
4654 { 2575, 3, 1, 6, 703, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2575 = VFDSB
4655 { 2574, 3, 1, 6, 701, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2574 = VFDDB
4656 { 2573, 5, 1, 6, 700, 1, 0, SystemZImpOpBase + 12, 427, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2573 = VFD
4657 { 2572, 3, 1, 6, 722, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2572 = VFCHSBS
4658 { 2571, 3, 1, 6, 714, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2571 = VFCHSB
4659 { 2570, 3, 1, 6, 722, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2570 = VFCHESBS
4660 { 2569, 3, 1, 6, 714, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2569 = VFCHESB
4661 { 2568, 3, 1, 6, 719, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2568 = VFCHEDBS
4662 { 2567, 3, 1, 6, 881, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2567 = VFCHEDB
4663 { 2566, 6, 1, 6, 710, 1, 0, SystemZImpOpBase + 12, 1507, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2566 = VFCHE
4664 { 2565, 3, 1, 6, 719, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2565 = VFCHDBS
4665 { 2564, 3, 1, 6, 881, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2564 = VFCHDB
4666 { 2563, 6, 1, 6, 710, 1, 0, SystemZImpOpBase + 12, 1507, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2563 = VFCH
4667 { 2562, 3, 1, 6, 722, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2562 = VFCESBS
4668 { 2561, 3, 1, 6, 714, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2561 = VFCESB
4669 { 2560, 3, 1, 6, 719, 1, 1, SystemZImpOpBase + 1, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2560 = VFCEDBS
4670 { 2559, 3, 1, 6, 881, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2559 = VFCEDB
4671 { 2558, 6, 1, 6, 710, 1, 0, SystemZImpOpBase + 12, 1507, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2558 = VFCE
4672 { 2557, 3, 1, 6, 687, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2557 = VFASB
4673 { 2556, 4, 1, 6, 737, 0, 1, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2556 = VFAEZHS
4674 { 2555, 4, 1, 6, 736, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2555 = VFAEZH
4675 { 2554, 4, 1, 6, 737, 0, 1, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2554 = VFAEZFS
4676 { 2553, 4, 1, 6, 736, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2553 = VFAEZF
4677 { 2552, 4, 1, 6, 737, 0, 1, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2552 = VFAEZBS
4678 { 2551, 4, 1, 6, 736, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2551 = VFAEZB
4679 { 2550, 4, 1, 6, 735, 0, 1, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2550 = VFAEHS
4680 { 2549, 4, 1, 6, 734, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2549 = VFAEH
4681 { 2548, 4, 1, 6, 735, 0, 1, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2548 = VFAEFS
4682 { 2547, 4, 1, 6, 734, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2547 = VFAEF
4683 { 2546, 4, 1, 6, 735, 0, 1, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2546 = VFAEBS
4684 { 2545, 4, 1, 6, 733, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2545 = VFAEB
4685 { 2544, 5, 1, 6, 733, 0, 1, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2544 = VFAE
4686 { 2543, 3, 1, 6, 685, 1, 0, SystemZImpOpBase + 12, 1441, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2543 = VFADB
4687 { 2542, 5, 1, 6, 684, 1, 0, SystemZImpOpBase + 12, 427, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2542 = VFA
4688 { 2541, 3, 1, 6, 620, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2541 = VESRLVH
4689 { 2540, 3, 1, 6, 620, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2540 = VESRLVG
4690 { 2539, 3, 1, 6, 620, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2539 = VESRLVF
4691 { 2538, 3, 1, 6, 620, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2538 = VESRLVB
4692 { 2537, 4, 1, 6, 620, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2537 = VESRLV
4693 { 2536, 4, 1, 6, 619, 0, 0, SystemZImpOpBase + 0, 1503, 0, 0x0ULL }, // Inst #2536 = VESRLH
4694 { 2535, 4, 1, 6, 619, 0, 0, SystemZImpOpBase + 0, 1503, 0, 0x0ULL }, // Inst #2535 = VESRLG
4695 { 2534, 4, 1, 6, 619, 0, 0, SystemZImpOpBase + 0, 1503, 0, 0x0ULL }, // Inst #2534 = VESRLF
4696 { 2533, 4, 1, 6, 619, 0, 0, SystemZImpOpBase + 0, 1503, 0, 0x0ULL }, // Inst #2533 = VESRLB
4697 { 2532, 5, 1, 6, 619, 0, 0, SystemZImpOpBase + 0, 1498, 0, 0x0ULL }, // Inst #2532 = VESRL
4698 { 2531, 3, 1, 6, 618, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2531 = VESRAVH
4699 { 2530, 3, 1, 6, 618, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2530 = VESRAVG
4700 { 2529, 3, 1, 6, 618, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2529 = VESRAVF
4701 { 2528, 3, 1, 6, 618, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2528 = VESRAVB
4702 { 2527, 4, 1, 6, 618, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2527 = VESRAV
4703 { 2526, 4, 1, 6, 617, 0, 0, SystemZImpOpBase + 0, 1503, 0, 0x0ULL }, // Inst #2526 = VESRAH
4704 { 2525, 4, 1, 6, 617, 0, 0, SystemZImpOpBase + 0, 1503, 0, 0x0ULL }, // Inst #2525 = VESRAG
4705 { 2524, 4, 1, 6, 617, 0, 0, SystemZImpOpBase + 0, 1503, 0, 0x0ULL }, // Inst #2524 = VESRAF
4706 { 2523, 4, 1, 6, 617, 0, 0, SystemZImpOpBase + 0, 1503, 0, 0x0ULL }, // Inst #2523 = VESRAB
4707 { 2522, 5, 1, 6, 617, 0, 0, SystemZImpOpBase + 0, 1498, 0, 0x0ULL }, // Inst #2522 = VESRA
4708 { 2521, 3, 1, 6, 616, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2521 = VESLVH
4709 { 2520, 3, 1, 6, 616, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2520 = VESLVG
4710 { 2519, 3, 1, 6, 616, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2519 = VESLVF
4711 { 2518, 3, 1, 6, 616, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2518 = VESLVB
4712 { 2517, 4, 1, 6, 616, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2517 = VESLV
4713 { 2516, 4, 1, 6, 615, 0, 0, SystemZImpOpBase + 0, 1503, 0, 0x0ULL }, // Inst #2516 = VESLH
4714 { 2515, 4, 1, 6, 615, 0, 0, SystemZImpOpBase + 0, 1503, 0, 0x0ULL }, // Inst #2515 = VESLG
4715 { 2514, 4, 1, 6, 615, 0, 0, SystemZImpOpBase + 0, 1503, 0, 0x0ULL }, // Inst #2514 = VESLF
4716 { 2513, 4, 1, 6, 615, 0, 0, SystemZImpOpBase + 0, 1503, 0, 0x0ULL }, // Inst #2513 = VESLB
4717 { 2512, 5, 1, 6, 615, 0, 0, SystemZImpOpBase + 0, 1498, 0, 0x0ULL }, // Inst #2512 = VESL
4718 { 2511, 3, 1, 6, 613, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2511 = VERLLVH
4719 { 2510, 3, 1, 6, 613, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2510 = VERLLVG
4720 { 2509, 3, 1, 6, 613, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2509 = VERLLVF
4721 { 2508, 3, 1, 6, 613, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2508 = VERLLVB
4722 { 2507, 4, 1, 6, 613, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2507 = VERLLV
4723 { 2506, 4, 1, 6, 612, 0, 0, SystemZImpOpBase + 0, 1503, 0, 0x0ULL }, // Inst #2506 = VERLLH
4724 { 2505, 4, 1, 6, 612, 0, 0, SystemZImpOpBase + 0, 1503, 0, 0x0ULL }, // Inst #2505 = VERLLG
4725 { 2504, 4, 1, 6, 612, 0, 0, SystemZImpOpBase + 0, 1503, 0, 0x0ULL }, // Inst #2504 = VERLLF
4726 { 2503, 4, 1, 6, 612, 0, 0, SystemZImpOpBase + 0, 1503, 0, 0x0ULL }, // Inst #2503 = VERLLB
4727 { 2502, 5, 1, 6, 612, 0, 0, SystemZImpOpBase + 0, 1498, 0, 0x0ULL }, // Inst #2502 = VERLL
4728 { 2501, 5, 1, 6, 614, 0, 0, SystemZImpOpBase + 0, 1493, 0, 0x0ULL }, // Inst #2501 = VERIMH
4729 { 2500, 5, 1, 6, 614, 0, 0, SystemZImpOpBase + 0, 1493, 0, 0x0ULL }, // Inst #2500 = VERIMG
4730 { 2499, 5, 1, 6, 614, 0, 0, SystemZImpOpBase + 0, 1493, 0, 0x0ULL }, // Inst #2499 = VERIMF
4731 { 2498, 5, 1, 6, 614, 0, 0, SystemZImpOpBase + 0, 1493, 0, 0x0ULL }, // Inst #2498 = VERIMB
4732 { 2497, 6, 1, 6, 614, 0, 0, SystemZImpOpBase + 0, 1487, 0, 0x0ULL }, // Inst #2497 = VERIM
4733 { 2496, 2, 0, 6, 634, 0, 1, SystemZImpOpBase + 0, 415, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2496 = VECLH
4734 { 2495, 2, 0, 6, 634, 0, 1, SystemZImpOpBase + 0, 415, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2495 = VECLG
4735 { 2494, 2, 0, 6, 634, 0, 1, SystemZImpOpBase + 0, 415, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2494 = VECLF
4736 { 2493, 2, 0, 6, 634, 0, 1, SystemZImpOpBase + 0, 415, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2493 = VECLB
4737 { 2492, 3, 0, 6, 634, 0, 1, SystemZImpOpBase + 0, 1462, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2492 = VECL
4738 { 2491, 2, 0, 6, 633, 0, 1, SystemZImpOpBase + 0, 415, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2491 = VECH
4739 { 2490, 2, 0, 6, 633, 0, 1, SystemZImpOpBase + 0, 415, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2490 = VECG
4740 { 2489, 2, 0, 6, 633, 0, 1, SystemZImpOpBase + 0, 415, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2489 = VECF
4741 { 2488, 2, 0, 6, 633, 0, 1, SystemZImpOpBase + 0, 415, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2488 = VECB
4742 { 2487, 3, 0, 6, 633, 0, 1, SystemZImpOpBase + 0, 1462, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2487 = VEC
4743 { 2486, 5, 1, 6, 760, 0, 1, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2486 = VDP
4744 { 2485, 4, 1, 6, 757, 0, 1, SystemZImpOpBase + 0, 1483, 0, 0x0ULL }, // Inst #2485 = VCVDG
4745 { 2484, 4, 1, 6, 757, 0, 1, SystemZImpOpBase + 0, 1479, 0, 0x0ULL }, // Inst #2484 = VCVD
4746 { 2483, 4, 1, 6, 756, 0, 1, SystemZImpOpBase + 0, 1475, 0, 0x0ULL }, // Inst #2483 = VCVBOpt
4747 { 2482, 4, 1, 6, 756, 0, 1, SystemZImpOpBase + 0, 1471, 0, 0x0ULL }, // Inst #2482 = VCVBGOpt
4748 { 2481, 3, 1, 6, 868, 0, 1, SystemZImpOpBase + 0, 1468, 0, 0x0ULL }, // Inst #2481 = VCVBG
4749 { 2480, 3, 1, 6, 868, 0, 1, SystemZImpOpBase + 0, 1465, 0, 0x0ULL }, // Inst #2480 = VCVB
4750 { 2479, 2, 1, 6, 585, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2479 = VCTZH
4751 { 2478, 2, 1, 6, 585, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2478 = VCTZG
4752 { 2477, 2, 1, 6, 585, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2477 = VCTZF
4753 { 2476, 2, 1, 6, 585, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2476 = VCTZB
4754 { 2475, 3, 1, 6, 585, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2475 = VCTZ
4755 { 2474, 4, 1, 6, 767, 0, 0, SystemZImpOpBase + 0, 1437, 0, 0x0ULL }, // Inst #2474 = VCSPH
4756 { 2473, 5, 1, 6, 648, 1, 0, SystemZImpOpBase + 12, 1453, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2473 = VCSFP
4757 { 2472, 5, 1, 6, 752, 1, 0, SystemZImpOpBase + 12, 427, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2472 = VCRNF
4758 { 2471, 3, 0, 6, 764, 0, 1, SystemZImpOpBase + 0, 1462, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2471 = VCP
4759 { 2470, 4, 1, 6, 752, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2470 = VCNF
4760 { 2469, 2, 1, 6, 584, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2469 = VCLZH
4761 { 2468, 2, 1, 6, 584, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2468 = VCLZG
4762 { 2467, 2, 1, 6, 584, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2467 = VCLZF
4763 { 2466, 3, 1, 6, 768, 0, 1, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2466 = VCLZDP
4764 { 2465, 2, 1, 6, 584, 0, 0, SystemZImpOpBase + 0, 415, 0, 0x0ULL }, // Inst #2465 = VCLZB
4765 { 2464, 3, 1, 6, 584, 0, 0, SystemZImpOpBase + 0, 1462, 0, 0x0ULL }, // Inst #2464 = VCLZ
4766 { 2463, 4, 1, 6, 650, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2463 = VCLGDB
4767 { 2462, 5, 1, 6, 649, 1, 0, SystemZImpOpBase + 12, 1453, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2462 = VCLGD
4768 { 2461, 5, 1, 6, 648, 1, 0, SystemZImpOpBase + 12, 1453, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2461 = VCLFP
4769 { 2460, 4, 1, 6, 751, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2460 = VCLFNL
4770 { 2459, 4, 1, 6, 751, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2459 = VCLFNH
4771 { 2458, 4, 1, 6, 652, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2458 = VCLFEB
4772 { 2457, 3, 1, 6, 583, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2457 = VCKSM
4773 { 2456, 3, 1, 6, 640, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2456 = VCHLHS
4774 { 2455, 3, 1, 6, 639, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2455 = VCHLH
4775 { 2454, 3, 1, 6, 640, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2454 = VCHLGS
4776 { 2453, 3, 1, 6, 639, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2453 = VCHLG
4777 { 2452, 3, 1, 6, 640, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2452 = VCHLFS
4778 { 2451, 3, 1, 6, 639, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2451 = VCHLF
4779 { 2450, 3, 1, 6, 640, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2450 = VCHLBS
4780 { 2449, 3, 1, 6, 639, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2449 = VCHLB
4781 { 2448, 5, 1, 6, 639, 0, 1, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2448 = VCHL
4782 { 2447, 3, 1, 6, 638, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2447 = VCHHS
4783 { 2446, 3, 1, 6, 637, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2446 = VCHH
4784 { 2445, 3, 1, 6, 638, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2445 = VCHGS
4785 { 2444, 3, 1, 6, 637, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2444 = VCHG
4786 { 2443, 3, 1, 6, 638, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2443 = VCHFS
4787 { 2442, 3, 1, 6, 637, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2442 = VCHF
4788 { 2441, 3, 1, 6, 638, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2441 = VCHBS
4789 { 2440, 3, 1, 6, 637, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2440 = VCHB
4790 { 2439, 5, 1, 6, 637, 0, 1, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2439 = VCH
4791 { 2438, 4, 1, 6, 650, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2438 = VCGDB
4792 { 2437, 5, 1, 6, 649, 1, 0, SystemZImpOpBase + 12, 1453, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2437 = VCGD
4793 { 2436, 5, 1, 6, 642, 1, 0, SystemZImpOpBase + 12, 1453, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2436 = VCFPS
4794 { 2435, 5, 1, 6, 642, 1, 0, SystemZImpOpBase + 12, 1453, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2435 = VCFPL
4795 { 2434, 4, 1, 6, 750, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2434 = VCFN
4796 { 2433, 4, 1, 6, 652, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2433 = VCFEB
4797 { 2432, 3, 1, 6, 636, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2432 = VCEQHS
4798 { 2431, 3, 1, 6, 635, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2431 = VCEQH
4799 { 2430, 3, 1, 6, 636, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2430 = VCEQGS
4800 { 2429, 3, 1, 6, 635, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2429 = VCEQG
4801 { 2428, 3, 1, 6, 636, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2428 = VCEQFS
4802 { 2427, 3, 1, 6, 635, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2427 = VCEQF
4803 { 2426, 3, 1, 6, 636, 0, 1, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2426 = VCEQBS
4804 { 2425, 3, 1, 6, 635, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2425 = VCEQB
4805 { 2424, 5, 1, 6, 635, 0, 1, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2424 = VCEQ
4806 { 2423, 4, 1, 6, 646, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2423 = VCELFB
4807 { 2422, 4, 1, 6, 646, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2422 = VCEFB
4808 { 2421, 4, 1, 6, 644, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2421 = VCDLGB
4809 { 2420, 5, 1, 6, 643, 1, 0, SystemZImpOpBase + 12, 1453, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2420 = VCDLG
4810 { 2419, 4, 1, 6, 644, 1, 0, SystemZImpOpBase + 12, 1458, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2419 = VCDGB
4811 { 2418, 5, 1, 6, 643, 1, 0, SystemZImpOpBase + 12, 1453, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2418 = VCDG
4812 { 2417, 3, 1, 6, 564, 0, 0, SystemZImpOpBase + 0, 1441, 0, 0x0ULL }, // Inst #2417 = VBPERM
4813 { 2416, 3, 1, 6, 580, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2416 = VAVGLH
4814 { 2415, 3, 1, 6, 580, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2415 = VAVGLG
4815 { 2414, 3, 1, 6, 580, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2414 = VAVGLF
4816 { 2413, 3, 1, 6, 580, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2413 = VAVGLB
4817 { 2412, 4, 1, 6, 580, 0, 0, SystemZImpOpBase + 0, 1437, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2412 = VAVGL
4818 { 2411, 3, 1, 6, 579, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2411 = VAVGH
4819 { 2410, 3, 1, 6, 579, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2410 = VAVGG
4820 { 2409, 3, 1, 6, 579, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2409 = VAVGF
4821 { 2408, 3, 1, 6, 579, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2408 = VAVGB
4822 { 2407, 4, 1, 6, 579, 0, 0, SystemZImpOpBase + 0, 1437, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2407 = VAVG
4823 { 2406, 3, 1, 6, 577, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2406 = VAQ
4824 { 2405, 5, 1, 6, 758, 0, 1, SystemZImpOpBase + 0, 427, 0, 0x0ULL }, // Inst #2405 = VAP
4825 { 2404, 3, 1, 6, 577, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2404 = VAH
4826 { 2403, 3, 1, 6, 577, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2403 = VAG
4827 { 2402, 3, 1, 6, 577, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2402 = VAF
4828 { 2401, 4, 1, 6, 577, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2401 = VACQ
4829 { 2400, 3, 1, 6, 578, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2400 = VACCQ
4830 { 2399, 3, 1, 6, 578, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2399 = VACCH
4831 { 2398, 3, 1, 6, 578, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2398 = VACCG
4832 { 2397, 3, 1, 6, 578, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2397 = VACCF
4833 { 2396, 4, 1, 6, 578, 0, 0, SystemZImpOpBase + 0, 1449, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2396 = VACCCQ
4834 { 2395, 5, 1, 6, 578, 0, 0, SystemZImpOpBase + 0, 1444, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2395 = VACCC
4835 { 2394, 3, 1, 6, 578, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2394 = VACCB
4836 { 2393, 4, 1, 6, 578, 0, 0, SystemZImpOpBase + 0, 1437, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2393 = VACC
4837 { 2392, 5, 1, 6, 577, 0, 0, SystemZImpOpBase + 0, 1444, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2392 = VAC
4838 { 2391, 3, 1, 6, 577, 0, 0, SystemZImpOpBase + 0, 1441, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2391 = VAB
4839 { 2390, 4, 1, 6, 577, 0, 0, SystemZImpOpBase + 0, 1437, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2390 = VA
4840 { 2389, 0, 0, 2, 334, 6, 6, SystemZImpOpBase + 90, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2389 = UPT
4841 { 2388, 5, 0, 6, 303, 0, 1, SystemZImpOpBase + 0, 789, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2388 = UNPKU
4842 { 2387, 5, 0, 6, 303, 0, 1, SystemZImpOpBase + 0, 789, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2387 = UNPKA
4843 { 2386, 6, 0, 6, 304, 0, 0, SystemZImpOpBase + 0, 544, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2386 = UNPK
4844 { 2385, 2, 0, 4, 856, 1, 1, SystemZImpOpBase + 41, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2385 = TSCH
4845 { 2384, 2, 0, 4, 274, 0, 1, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20ULL }, // Inst #2384 = TS
4846 { 2383, 4, 2, 4, 288, 2, 1, SystemZImpOpBase + 43, 1421, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2383 = TRTTOpt
4847 { 2382, 5, 2, 4, 288, 2, 1, SystemZImpOpBase + 43, 1425, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2382 = TRTT
4848 { 2381, 3, 2, 4, 287, 1, 1, SystemZImpOpBase + 88, 1434, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2381 = TRTREOpt
4849 { 2380, 4, 2, 4, 287, 1, 1, SystemZImpOpBase + 88, 1430, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2380 = TRTRE
4850 { 2379, 5, 0, 6, 285, 0, 3, SystemZImpOpBase + 85, 789, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2379 = TRTR
4851 { 2378, 4, 2, 4, 288, 2, 1, SystemZImpOpBase + 43, 1421, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2378 = TRTOOpt
4852 { 2377, 5, 2, 4, 288, 2, 1, SystemZImpOpBase + 43, 1425, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2377 = TRTO
4853 { 2376, 3, 2, 4, 287, 1, 1, SystemZImpOpBase + 88, 1434, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2376 = TRTEOpt
4854 { 2375, 4, 2, 4, 287, 1, 1, SystemZImpOpBase + 88, 1430, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2375 = TRTE
4855 { 2374, 5, 0, 6, 284, 0, 3, SystemZImpOpBase + 85, 789, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2374 = TRT
4856 { 2373, 4, 2, 4, 288, 2, 1, SystemZImpOpBase + 43, 1421, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2373 = TROTOpt
4857 { 2372, 5, 2, 4, 288, 2, 1, SystemZImpOpBase + 43, 1425, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2372 = TROT
4858 { 2371, 4, 2, 4, 288, 2, 1, SystemZImpOpBase + 43, 1421, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2371 = TROOOpt
4859 { 2370, 5, 2, 4, 288, 2, 1, SystemZImpOpBase + 43, 1425, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2370 = TROO
4860 { 2369, 4, 2, 4, 286, 1, 0, SystemZImpOpBase + 55, 1421, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2369 = TRE
4861 { 2368, 2, 0, 4, 845, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2368 = TRAP4
4862 { 2367, 0, 0, 2, 845, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2367 = TRAP2
4863 { 2366, 4, 0, 6, 844, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #2366 = TRACG
4864 { 2365, 4, 0, 4, 844, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2365 = TRACE
4865 { 2364, 5, 0, 6, 283, 0, 0, SystemZImpOpBase + 0, 789, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2364 = TR
4866 { 2363, 4, 0, 6, 809, 0, 1, SystemZImpOpBase + 0, 1108, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2363 = TPROT
4867 { 2362, 2, 0, 4, 883, 0, 1, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2362 = TPI
4868 { 2361, 2, 1, 4, 860, 0, 1, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2361 = TPEI
4869 { 2360, 3, 0, 6, 310, 0, 1, SystemZImpOpBase + 0, 1418, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2360 = TP
4870 { 2359, 3, 0, 6, 257, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #2359 = TMY
4871 { 2358, 2, 0, 4, 262, 0, 1, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2358 = TMLL
4872 { 2357, 2, 0, 4, 261, 0, 1, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2357 = TMLH
4873 { 2356, 2, 0, 4, 260, 0, 1, SystemZImpOpBase + 0, 776, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2356 = TMHL
4874 { 2355, 2, 0, 4, 259, 0, 1, SystemZImpOpBase + 0, 776, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #2355 = TMHH
4875 { 2354, 3, 0, 4, 257, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2354 = TM
4876 { 2353, 2, 1, 4, 427, 0, 1, SystemZImpOpBase + 0, 631, 0, 0x0ULL }, // Inst #2353 = THDR
4877 { 2352, 2, 1, 4, 427, 0, 1, SystemZImpOpBase + 0, 1121, 0, 0x0ULL }, // Inst #2352 = THDER
4878 { 2351, 0, 0, 4, 324, 0, 1, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2351 = TEND
4879 { 2350, 4, 0, 6, 525, 0, 1, SystemZImpOpBase + 0, 347, 0, 0x8ULL }, // Inst #2350 = TDGXT
4880 { 2349, 4, 0, 6, 524, 0, 1, SystemZImpOpBase + 0, 655, 0, 0x8ULL }, // Inst #2349 = TDGET
4881 { 2348, 4, 0, 6, 895, 0, 1, SystemZImpOpBase + 0, 627, 0, 0x8ULL }, // Inst #2348 = TDGDT
4882 { 2347, 4, 0, 6, 525, 0, 1, SystemZImpOpBase + 0, 347, 0, 0x8ULL }, // Inst #2347 = TDCXT
4883 { 2346, 4, 0, 6, 524, 0, 1, SystemZImpOpBase + 0, 655, 0, 0x8ULL }, // Inst #2346 = TDCET
4884 { 2345, 4, 0, 6, 895, 0, 1, SystemZImpOpBase + 0, 627, 0, 0x8ULL }, // Inst #2345 = TDCDT
4885 { 2344, 4, 0, 6, 406, 0, 1, SystemZImpOpBase + 0, 347, 0, 0x3008ULL }, // Inst #2344 = TCXB
4886 { 2343, 4, 0, 6, 405, 0, 1, SystemZImpOpBase + 0, 655, 0, 0x3008ULL }, // Inst #2343 = TCEB
4887 { 2342, 4, 0, 6, 405, 0, 1, SystemZImpOpBase + 0, 627, 0, 0x3008ULL }, // Inst #2342 = TCDB
4888 { 2341, 3, 0, 6, 323, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2341 = TBEGINC
4889 { 2340, 3, 0, 6, 323, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2340 = TBEGIN
4890 { 2339, 3, 1, 4, 428, 0, 1, SystemZImpOpBase + 0, 1415, 0, 0x0ULL }, // Inst #2339 = TBEDR
4891 { 2338, 3, 1, 4, 428, 0, 1, SystemZImpOpBase + 0, 946, 0, 0x0ULL }, // Inst #2338 = TBDR
4892 { 2337, 2, 0, 4, 795, 1, 2, SystemZImpOpBase + 68, 563, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2337 = TB
4893 { 2336, 2, 0, 4, 821, 0, 1, SystemZImpOpBase + 0, 1354, 0, 0x0ULL }, // Inst #2336 = TAR
4894 { 2335, 0, 0, 2, 319, 0, 1, SystemZImpOpBase + 0, 1, 0, 0x0ULL }, // Inst #2335 = TAM
4895 { 2334, 2, 0, 4, 325, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2334 = TABORT
4896 { 2333, 5, 1, 6, 129, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x223c8cULL }, // Inst #2333 = SY
4897 { 2332, 4, 1, 4, 507, 1, 1, SystemZImpOpBase + 1, 556, 0, 0x0ULL }, // Inst #2332 = SXTRA
4898 { 2331, 3, 1, 4, 507, 1, 1, SystemZImpOpBase + 1, 553, 0, 0x0ULL }, // Inst #2331 = SXTR
4899 { 2330, 3, 1, 2, 443, 0, 1, SystemZImpOpBase + 0, 550, 0, 0x0ULL }, // Inst #2330 = SXR
4900 { 2329, 3, 1, 4, 386, 1, 1, SystemZImpOpBase + 1, 550, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #2329 = SXBR
4901 { 2328, 3, 1, 2, 442, 0, 1, SystemZImpOpBase + 0, 497, 0, 0x0ULL }, // Inst #2328 = SWR
4902 { 2327, 5, 1, 4, 441, 0, 1, SystemZImpOpBase + 0, 492, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #2327 = SW
4903 { 2326, 1, 0, 2, 841, 0, 1, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2326 = SVC
4904 { 2325, 3, 1, 2, 442, 0, 1, SystemZImpOpBase + 0, 512, 0, 0x0ULL }, // Inst #2325 = SUR
4905 { 2324, 5, 1, 4, 441, 0, 1, SystemZImpOpBase + 0, 507, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #2324 = SU
4906 { 2323, 4, 0, 6, 48, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayStore), 0x8eULL }, // Inst #2323 = STY
4907 { 2322, 2, 0, 4, 808, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2322 = STURG
4908 { 2321, 2, 0, 4, 808, 0, 0, SystemZImpOpBase + 0, 933, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2321 = STURA
4909 { 2320, 2, 0, 4, 834, 2, 2, SystemZImpOpBase + 81, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2320 = STSI
4910 { 2319, 2, 0, 4, 856, 1, 1, SystemZImpOpBase + 41, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2319 = STSCH
4911 { 2318, 4, 0, 6, 84, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayStore), 0x4cULL }, // Inst #2318 = STRVH
4912 { 2317, 4, 0, 6, 84, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayStore), 0x10cULL }, // Inst #2317 = STRVG
4913 { 2316, 4, 0, 6, 84, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayStore), 0x8cULL }, // Inst #2316 = STRV
4914 { 2315, 2, 0, 6, 48, 0, 0, SystemZImpOpBase + 0, 765, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2315 = STRL
4915 { 2314, 4, 0, 6, 806, 0, 0, SystemZImpOpBase + 0, 1108, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2314 = STRAG
4916 { 2313, 2, 0, 4, 786, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2313 = STPX
4917 { 2312, 2, 0, 4, 831, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2312 = STPT
4918 { 2311, 4, 0, 6, 281, 0, 0, SystemZImpOpBase + 0, 306, 0|(1ULL<<MCID::MayStore), 0x20cULL }, // Inst #2311 = STPQ
4919 { 2310, 3, 0, 4, 778, 0, 0, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2310 = STOSM
4920 { 2309, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2309 = STOCGAsmZ
4921 { 2308, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2308 = STOCGAsmP
4922 { 2307, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2307 = STOCGAsmO
4923 { 2306, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2306 = STOCGAsmNZ
4924 { 2305, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2305 = STOCGAsmNP
4925 { 2304, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2304 = STOCGAsmNO
4926 { 2303, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2303 = STOCGAsmNM
4927 { 2302, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2302 = STOCGAsmNLH
4928 { 2301, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2301 = STOCGAsmNLE
4929 { 2300, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2300 = STOCGAsmNL
4930 { 2299, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2299 = STOCGAsmNHE
4931 { 2298, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2298 = STOCGAsmNH
4932 { 2297, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2297 = STOCGAsmNE
4933 { 2296, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2296 = STOCGAsmM
4934 { 2295, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2295 = STOCGAsmLH
4935 { 2294, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2294 = STOCGAsmLE
4936 { 2293, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2293 = STOCGAsmL
4937 { 2292, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2292 = STOCGAsmHE
4938 { 2291, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2291 = STOCGAsmH
4939 { 2290, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2290 = STOCGAsmE
4940 { 2289, 4, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 804, 0|(1ULL<<MCID::MayStore), 0x104ULL }, // Inst #2289 = STOCGAsm
4941 { 2288, 5, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 1410, 0|(1ULL<<MCID::MayStore), 0x80104ULL }, // Inst #2288 = STOCG
4942 { 2287, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2287 = STOCFHAsmZ
4943 { 2286, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2286 = STOCFHAsmP
4944 { 2285, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2285 = STOCFHAsmO
4945 { 2284, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2284 = STOCFHAsmNZ
4946 { 2283, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2283 = STOCFHAsmNP
4947 { 2282, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2282 = STOCFHAsmNO
4948 { 2281, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2281 = STOCFHAsmNM
4949 { 2280, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2280 = STOCFHAsmNLH
4950 { 2279, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2279 = STOCFHAsmNLE
4951 { 2278, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2278 = STOCFHAsmNL
4952 { 2277, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2277 = STOCFHAsmNHE
4953 { 2276, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2276 = STOCFHAsmNH
4954 { 2275, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2275 = STOCFHAsmNE
4955 { 2274, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2274 = STOCFHAsmM
4956 { 2273, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2273 = STOCFHAsmLH
4957 { 2272, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2272 = STOCFHAsmLE
4958 { 2271, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2271 = STOCFHAsmL
4959 { 2270, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2270 = STOCFHAsmHE
4960 { 2269, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2269 = STOCFHAsmH
4961 { 2268, 3, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1407, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2268 = STOCFHAsmE
4962 { 2267, 4, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1403, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2267 = STOCFHAsm
4963 { 2266, 5, 0, 6, 54, 1, 0, SystemZImpOpBase + 0, 1398, 0|(1ULL<<MCID::MayStore), 0x80084ULL }, // Inst #2266 = STOCFH
4964 { 2265, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2265 = STOCAsmZ
4965 { 2264, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2264 = STOCAsmP
4966 { 2263, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2263 = STOCAsmO
4967 { 2262, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2262 = STOCAsmNZ
4968 { 2261, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2261 = STOCAsmNP
4969 { 2260, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2260 = STOCAsmNO
4970 { 2259, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2259 = STOCAsmNM
4971 { 2258, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2258 = STOCAsmNLH
4972 { 2257, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2257 = STOCAsmNLE
4973 { 2256, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2256 = STOCAsmNL
4974 { 2255, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2255 = STOCAsmNHE
4975 { 2254, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2254 = STOCAsmNH
4976 { 2253, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2253 = STOCAsmNE
4977 { 2252, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2252 = STOCAsmM
4978 { 2251, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2251 = STOCAsmLH
4979 { 2250, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2250 = STOCAsmLE
4980 { 2249, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2249 = STOCAsmL
4981 { 2248, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2248 = STOCAsmHE
4982 { 2247, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2247 = STOCAsmH
4983 { 2246, 3, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2246 = STOCAsmE
4984 { 2245, 4, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 837, 0|(1ULL<<MCID::MayStore), 0x84ULL }, // Inst #2245 = STOCAsm
4985 { 2244, 5, 0, 6, 886, 1, 0, SystemZImpOpBase + 0, 1393, 0|(1ULL<<MCID::MayStore), 0x80084ULL }, // Inst #2244 = STOC
4986 { 2243, 3, 0, 4, 778, 0, 0, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2243 = STNSM
4987 { 2242, 4, 0, 6, 81, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2242 = STMY
4988 { 2241, 4, 0, 6, 81, 0, 0, SystemZImpOpBase + 0, 1142, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2241 = STMH
4989 { 2240, 4, 0, 6, 81, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2240 = STMG
4990 { 2239, 4, 0, 4, 81, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2239 = STM
4991 { 2238, 2, 0, 4, 833, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2238 = STIDP
4992 { 2237, 4, 0, 6, 77, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayStore), 0x4cULL }, // Inst #2237 = STHY
4993 { 2236, 2, 0, 6, 77, 0, 0, SystemZImpOpBase + 0, 765, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2236 = STHRL
4994 { 2235, 4, 0, 6, 77, 0, 0, SystemZImpOpBase + 0, 757, 0|(1ULL<<MCID::MayStore), 0x4cULL }, // Inst #2235 = STHH
4995 { 2234, 4, 0, 4, 77, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayStore), 0x48ULL }, // Inst #2234 = STH
4996 { 2233, 4, 0, 6, 296, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xcULL }, // Inst #2233 = STGSC
4997 { 2232, 2, 0, 6, 46, 0, 0, SystemZImpOpBase + 0, 716, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2232 = STGRL
4998 { 2231, 4, 0, 6, 46, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayStore), 0x10eULL }, // Inst #2231 = STG
4999 { 2230, 2, 0, 4, 408, 1, 0, SystemZImpOpBase + 12, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2230 = STFPC
5000 { 2229, 2, 0, 4, 835, 1, 2, SystemZImpOpBase + 68, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2229 = STFLE
5001 { 2228, 2, 0, 4, 835, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2228 = STFL
5002 { 2227, 4, 0, 6, 48, 0, 0, SystemZImpOpBase + 0, 757, 0|(1ULL<<MCID::MayStore), 0x8eULL }, // Inst #2227 = STFH
5003 { 2226, 4, 0, 6, 354, 0, 0, SystemZImpOpBase + 0, 655, 0|(1ULL<<MCID::MayStore), 0x8eULL }, // Inst #2226 = STEY
5004 { 2225, 4, 0, 4, 354, 0, 0, SystemZImpOpBase + 0, 655, 0|(1ULL<<MCID::MayStore), 0x8aULL }, // Inst #2225 = STE
5005 { 2224, 4, 0, 6, 354, 0, 0, SystemZImpOpBase + 0, 627, 0|(1ULL<<MCID::MayStore), 0x10eULL }, // Inst #2224 = STDY
5006 { 2223, 4, 0, 4, 354, 0, 0, SystemZImpOpBase + 0, 627, 0|(1ULL<<MCID::MayStore), 0x10aULL }, // Inst #2223 = STD
5007 { 2222, 4, 0, 6, 76, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayStore), 0x2cULL }, // Inst #2222 = STCY
5008 { 2221, 4, 0, 4, 782, 0, 0, SystemZImpOpBase + 0, 1117, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2221 = STCTL
5009 { 2220, 4, 0, 6, 782, 0, 0, SystemZImpOpBase + 0, 1117, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #2220 = STCTG
5010 { 2219, 2, 0, 4, 859, 0, 1, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2219 = STCRW
5011 { 2218, 2, 0, 4, 859, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2218 = STCPS
5012 { 2217, 4, 0, 6, 78, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2217 = STCMY
5013 { 2216, 4, 0, 6, 78, 0, 0, SystemZImpOpBase + 0, 811, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2216 = STCMH
5014 { 2215, 4, 0, 4, 78, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2215 = STCM
5015 { 2214, 2, 0, 4, 828, 0, 1, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2214 = STCKF
5016 { 2213, 2, 0, 4, 829, 0, 1, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x200ULL }, // Inst #2213 = STCKE
5017 { 2212, 2, 0, 4, 830, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2212 = STCKC
5018 { 2211, 2, 0, 4, 828, 0, 1, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2211 = STCK
5019 { 2210, 4, 0, 6, 76, 0, 0, SystemZImpOpBase + 0, 757, 0|(1ULL<<MCID::MayStore), 0x2cULL }, // Inst #2210 = STCH
5020 { 2209, 4, 0, 4, 76, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayStore), 0x28ULL }, // Inst #2209 = STC
5021 { 2208, 2, 0, 4, 788, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2208 = STBEAR
5022 { 2207, 2, 0, 4, 832, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40ULL }, // Inst #2207 = STAP
5023 { 2206, 4, 0, 6, 315, 0, 0, SystemZImpOpBase + 0, 1104, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #2206 = STAMY
5024 { 2205, 4, 0, 4, 315, 0, 0, SystemZImpOpBase + 0, 1104, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2205 = STAM
5025 { 2204, 4, 0, 4, 48, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayStore), 0x8aULL }, // Inst #2204 = ST
5026 { 2203, 2, 0, 4, 777, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x20ULL }, // Inst #2203 = SSM
5027 { 2202, 2, 0, 4, 791, 0, 1, SystemZImpOpBase + 0, 933, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2202 = SSKEOpt
5028 { 2201, 3, 0, 4, 791, 0, 1, SystemZImpOpBase + 0, 1390, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2201 = SSKE
5029 { 2200, 2, 0, 4, 856, 1, 1, SystemZImpOpBase + 41, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2200 = SSCH
5030 { 2199, 1, 0, 4, 784, 0, 0, SystemZImpOpBase + 0, 935, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2199 = SSAR
5031 { 2198, 1, 0, 4, 784, 0, 0, SystemZImpOpBase + 0, 302, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2198 = SSAIR
5032 { 2197, 5, 1, 6, 517, 0, 0, SystemZImpOpBase + 0, 1377, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #2197 = SRXT
5033 { 2196, 4, 2, 4, 331, 1, 1, SystemZImpOpBase + 35, 833, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2196 = SRSTU
5034 { 2195, 4, 2, 4, 331, 1, 1, SystemZImpOpBase + 35, 833, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2195 = SRST
5035 { 2194, 6, 0, 6, 308, 0, 1, SystemZImpOpBase + 0, 1384, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2194 = SRP
5036 { 2193, 2, 0, 4, 413, 1, 1, SystemZImpOpBase + 79, 1382, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2193 = SRNMT
5037 { 2192, 2, 0, 4, 413, 1, 1, SystemZImpOpBase + 79, 1382, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2192 = SRNMB
5038 { 2191, 2, 0, 4, 413, 1, 1, SystemZImpOpBase + 79, 1382, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2191 = SRNM
5039 { 2190, 4, 1, 6, 209, 0, 0, SystemZImpOpBase + 0, 1350, 0, 0x4ULL }, // Inst #2190 = SRLK
5040 { 2189, 4, 1, 6, 209, 0, 0, SystemZImpOpBase + 0, 929, 0, 0x4ULL }, // Inst #2189 = SRLG
5041 { 2188, 4, 1, 4, 209, 0, 0, SystemZImpOpBase + 0, 1369, 0, 0x0ULL }, // Inst #2188 = SRL
5042 { 2187, 3, 1, 4, 137, 0, 1, SystemZImpOpBase + 0, 541, 0, 0x223c00ULL }, // Inst #2187 = SRK
5043 { 2186, 5, 1, 6, 516, 0, 0, SystemZImpOpBase + 0, 156, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #2186 = SRDT
5044 { 2185, 4, 1, 4, 212, 0, 0, SystemZImpOpBase + 0, 1373, 0, 0x0ULL }, // Inst #2185 = SRDL
5045 { 2184, 4, 1, 4, 212, 0, 1, SystemZImpOpBase + 0, 1373, 0, 0x3b800ULL }, // Inst #2184 = SRDA
5046 { 2183, 4, 1, 6, 210, 0, 1, SystemZImpOpBase + 0, 1350, 0, 0x3b804ULL }, // Inst #2183 = SRAK
5047 { 2182, 4, 1, 6, 210, 0, 1, SystemZImpOpBase + 0, 929, 0, 0x3b804ULL }, // Inst #2182 = SRAG
5048 { 2181, 4, 1, 4, 210, 0, 1, SystemZImpOpBase + 0, 1369, 0, 0x3b800ULL }, // Inst #2181 = SRA
5049 { 2180, 3, 1, 2, 137, 0, 1, SystemZImpOpBase + 0, 538, 0, 0x223c00ULL }, // Inst #2180 = SR
5050 { 2179, 2, 1, 4, 435, 0, 0, SystemZImpOpBase + 0, 673, 0, 0x0ULL }, // Inst #2179 = SQXR
5051 { 2178, 2, 1, 4, 378, 1, 0, SystemZImpOpBase + 12, 673, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2178 = SQXBR
5052 { 2177, 2, 1, 4, 433, 0, 0, SystemZImpOpBase + 0, 659, 0, 0x0ULL }, // Inst #2177 = SQER
5053 { 2176, 2, 1, 4, 376, 1, 0, SystemZImpOpBase + 12, 659, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2176 = SQEBR
5054 { 2175, 4, 1, 6, 375, 1, 0, SystemZImpOpBase + 12, 655, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #2175 = SQEB
5055 { 2174, 4, 1, 6, 432, 0, 0, SystemZImpOpBase + 0, 655, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #2174 = SQE
5056 { 2173, 2, 1, 4, 434, 0, 0, SystemZImpOpBase + 0, 631, 0, 0x0ULL }, // Inst #2173 = SQDR
5057 { 2172, 2, 1, 4, 377, 1, 0, SystemZImpOpBase + 12, 631, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #2172 = SQDBR
5058 { 2171, 4, 1, 6, 375, 1, 0, SystemZImpOpBase + 12, 627, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #2171 = SQDB
5059 { 2170, 4, 1, 6, 432, 0, 0, SystemZImpOpBase + 0, 627, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #2170 = SQD
5060 { 2169, 2, 0, 4, 786, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #2169 = SPX
5061 { 2168, 2, 0, 4, 827, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2168 = SPT
5062 { 2167, 1, 0, 2, 317, 0, 1, SystemZImpOpBase + 0, 935, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2167 = SPM
5063 { 2166, 2, 0, 4, 776, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2166 = SPKA
5064 { 2165, 2, 0, 4, 854, 0, 1, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2165 = SPCTR
5065 { 2164, 6, 0, 6, 305, 0, 1, SystemZImpOpBase + 0, 544, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2164 = SP
5066 { 2163, 4, 2, 4, 337, 2, 1, SystemZImpOpBase + 43, 794, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2163 = SORTL
5067 { 2162, 5, 1, 6, 133, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x101c8cULL }, // Inst #2162 = SLY
5068 { 2161, 5, 1, 6, 517, 0, 0, SystemZImpOpBase + 0, 1377, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #2161 = SLXT
5069 { 2160, 3, 1, 4, 136, 0, 1, SystemZImpOpBase + 0, 541, 0, 0x101c00ULL }, // Inst #2160 = SLRK
5070 { 2159, 3, 1, 2, 136, 0, 1, SystemZImpOpBase + 0, 538, 0, 0x101c00ULL }, // Inst #2159 = SLR
5071 { 2158, 4, 1, 6, 208, 0, 0, SystemZImpOpBase + 0, 1350, 0, 0x4ULL }, // Inst #2158 = SLLK
5072 { 2157, 4, 1, 6, 208, 0, 0, SystemZImpOpBase + 0, 929, 0, 0x4ULL }, // Inst #2157 = SLLG
5073 { 2156, 4, 1, 4, 208, 0, 0, SystemZImpOpBase + 0, 1369, 0, 0x0ULL }, // Inst #2156 = SLL
5074 { 2155, 3, 1, 4, 139, 0, 1, SystemZImpOpBase + 0, 532, 0, 0x101c00ULL }, // Inst #2155 = SLHHLR
5075 { 2154, 3, 1, 4, 138, 0, 1, SystemZImpOpBase + 0, 529, 0, 0x101c00ULL }, // Inst #2154 = SLHHHR
5076 { 2153, 3, 1, 4, 135, 0, 1, SystemZImpOpBase + 0, 382, 0, 0x101c00ULL }, // Inst #2153 = SLGRK
5077 { 2152, 3, 1, 4, 135, 0, 1, SystemZImpOpBase + 0, 526, 0, 0x101c00ULL }, // Inst #2152 = SLGR
5078 { 2151, 3, 1, 4, 134, 0, 1, SystemZImpOpBase + 0, 523, 0, 0x101c00ULL }, // Inst #2151 = SLGFR
5079 { 2150, 3, 1, 6, 134, 0, 1, SystemZImpOpBase + 0, 303, 0, 0x101c00ULL }, // Inst #2150 = SLGFI
5080 { 2149, 5, 1, 6, 133, 0, 1, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x101c8cULL }, // Inst #2149 = SLGF
5081 { 2148, 5, 1, 6, 133, 0, 1, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x101d0cULL }, // Inst #2148 = SLG
5082 { 2147, 3, 1, 6, 132, 0, 1, SystemZImpOpBase + 0, 515, 0, 0x101c00ULL }, // Inst #2147 = SLFI
5083 { 2146, 5, 1, 6, 516, 0, 0, SystemZImpOpBase + 0, 156, 0|(1ULL<<MCID::MayLoad), 0x8ULL }, // Inst #2146 = SLDT
5084 { 2145, 4, 1, 4, 212, 0, 0, SystemZImpOpBase + 0, 1373, 0, 0x0ULL }, // Inst #2145 = SLDL
5085 { 2144, 4, 1, 4, 212, 0, 1, SystemZImpOpBase + 0, 1373, 0, 0x0ULL }, // Inst #2144 = SLDA
5086 { 2143, 3, 1, 4, 141, 1, 1, SystemZImpOpBase + 26, 538, 0, 0x103c00ULL }, // Inst #2143 = SLBR
5087 { 2142, 3, 1, 4, 141, 1, 1, SystemZImpOpBase + 26, 526, 0, 0x103c00ULL }, // Inst #2142 = SLBGR
5088 { 2141, 5, 1, 6, 140, 1, 1, SystemZImpOpBase + 26, 518, 0|(1ULL<<MCID::MayLoad), 0x103d0cULL }, // Inst #2141 = SLBG
5089 { 2140, 5, 1, 6, 140, 1, 1, SystemZImpOpBase + 26, 487, 0|(1ULL<<MCID::MayLoad), 0x103c8cULL }, // Inst #2140 = SLB
5090 { 2139, 4, 1, 6, 211, 0, 1, SystemZImpOpBase + 0, 1350, 0, 0x4ULL }, // Inst #2139 = SLAK
5091 { 2138, 4, 1, 6, 211, 0, 1, SystemZImpOpBase + 0, 929, 0, 0x4ULL }, // Inst #2138 = SLAG
5092 { 2137, 4, 1, 4, 211, 0, 1, SystemZImpOpBase + 0, 1369, 0, 0x0ULL }, // Inst #2137 = SLA
5093 { 2136, 5, 1, 4, 133, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x101c88ULL }, // Inst #2136 = SL
5094 { 2135, 4, 0, 4, 846, 0, 1, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2135 = SIGP
5095 { 2134, 2, 0, 4, 846, 4, 1, SystemZImpOpBase + 74, 675, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2134 = SIGA
5096 { 2133, 2, 0, 4, 847, 0, 1, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2133 = SIE
5097 { 2132, 5, 1, 6, 130, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x223c4cULL }, // Inst #2132 = SHY
5098 { 2131, 3, 1, 4, 139, 0, 1, SystemZImpOpBase + 0, 532, 0, 0x223c00ULL }, // Inst #2131 = SHHLR
5099 { 2130, 3, 1, 4, 138, 0, 1, SystemZImpOpBase + 0, 529, 0, 0x223c00ULL }, // Inst #2130 = SHHHR
5100 { 2129, 5, 1, 4, 130, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x223c48ULL }, // Inst #2129 = SH
5101 { 2128, 3, 1, 4, 131, 0, 1, SystemZImpOpBase + 0, 382, 0, 0x223c00ULL }, // Inst #2128 = SGRK
5102 { 2127, 3, 1, 4, 131, 0, 1, SystemZImpOpBase + 0, 526, 0, 0x223c00ULL }, // Inst #2127 = SGR
5103 { 2126, 5, 1, 6, 142, 0, 1, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x223c4cULL }, // Inst #2126 = SGH
5104 { 2125, 3, 1, 4, 143, 0, 1, SystemZImpOpBase + 0, 523, 0, 0x223c00ULL }, // Inst #2125 = SGFR
5105 { 2124, 5, 1, 6, 870, 0, 1, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x223c8cULL }, // Inst #2124 = SGF
5106 { 2123, 5, 1, 6, 129, 0, 1, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x223d0cULL }, // Inst #2123 = SG
5107 { 2122, 1, 0, 4, 409, 0, 1, SystemZImpOpBase + 12, 935, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2122 = SFPC
5108 { 2121, 1, 0, 4, 411, 0, 1, SystemZImpOpBase + 12, 935, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2121 = SFASR
5109 { 2120, 3, 1, 2, 442, 0, 1, SystemZImpOpBase + 0, 512, 0, 0x0ULL }, // Inst #2120 = SER
5110 { 2119, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2119 = SELRAsmZ
5111 { 2118, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2118 = SELRAsmP
5112 { 2117, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2117 = SELRAsmO
5113 { 2116, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2116 = SELRAsmNZ
5114 { 2115, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2115 = SELRAsmNP
5115 { 2114, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2114 = SELRAsmNO
5116 { 2113, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2113 = SELRAsmNM
5117 { 2112, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2112 = SELRAsmNLH
5118 { 2111, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2111 = SELRAsmNLE
5119 { 2110, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2110 = SELRAsmNL
5120 { 2109, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2109 = SELRAsmNHE
5121 { 2108, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2108 = SELRAsmNH
5122 { 2107, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2107 = SELRAsmNE
5123 { 2106, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2106 = SELRAsmM
5124 { 2105, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2105 = SELRAsmLH
5125 { 2104, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2104 = SELRAsmLE
5126 { 2103, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2103 = SELRAsmL
5127 { 2102, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2102 = SELRAsmHE
5128 { 2101, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2101 = SELRAsmH
5129 { 2100, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 541, 0, 0x0ULL }, // Inst #2100 = SELRAsmE
5130 { 2099, 4, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 1365, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2099 = SELRAsm
5131 { 2098, 5, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 432, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #2098 = SELR
5132 { 2097, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2097 = SELGRAsmZ
5133 { 2096, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2096 = SELGRAsmP
5134 { 2095, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2095 = SELGRAsmO
5135 { 2094, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2094 = SELGRAsmNZ
5136 { 2093, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2093 = SELGRAsmNP
5137 { 2092, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2092 = SELGRAsmNO
5138 { 2091, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2091 = SELGRAsmNM
5139 { 2090, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2090 = SELGRAsmNLH
5140 { 2089, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2089 = SELGRAsmNLE
5141 { 2088, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2088 = SELGRAsmNL
5142 { 2087, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2087 = SELGRAsmNHE
5143 { 2086, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2086 = SELGRAsmNH
5144 { 2085, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2085 = SELGRAsmNE
5145 { 2084, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2084 = SELGRAsmM
5146 { 2083, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2083 = SELGRAsmLH
5147 { 2082, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2082 = SELGRAsmLE
5148 { 2081, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2081 = SELGRAsmL
5149 { 2080, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2080 = SELGRAsmHE
5150 { 2079, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2079 = SELGRAsmH
5151 { 2078, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 382, 0, 0x0ULL }, // Inst #2078 = SELGRAsmE
5152 { 2077, 4, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 977, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2077 = SELGRAsm
5153 { 2076, 5, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 437, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #2076 = SELGR
5154 { 2075, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2075 = SELFHRAsmZ
5155 { 2074, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2074 = SELFHRAsmP
5156 { 2073, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2073 = SELFHRAsmO
5157 { 2072, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2072 = SELFHRAsmNZ
5158 { 2071, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2071 = SELFHRAsmNP
5159 { 2070, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2070 = SELFHRAsmNO
5160 { 2069, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2069 = SELFHRAsmNM
5161 { 2068, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2068 = SELFHRAsmNLH
5162 { 2067, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2067 = SELFHRAsmNLE
5163 { 2066, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2066 = SELFHRAsmNL
5164 { 2065, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2065 = SELFHRAsmNHE
5165 { 2064, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2064 = SELFHRAsmNH
5166 { 2063, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2063 = SELFHRAsmNE
5167 { 2062, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2062 = SELFHRAsmM
5168 { 2061, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2061 = SELFHRAsmLH
5169 { 2060, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2060 = SELFHRAsmLE
5170 { 2059, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2059 = SELFHRAsmL
5171 { 2058, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2058 = SELFHRAsmHE
5172 { 2057, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2057 = SELFHRAsmH
5173 { 2056, 3, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 529, 0, 0x0ULL }, // Inst #2056 = SELFHRAsmE
5174 { 2055, 4, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 1361, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #2055 = SELFHRAsm
5175 { 2054, 5, 1, 4, 56, 1, 0, SystemZImpOpBase + 0, 1356, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #2054 = SELFHR
5176 { 2053, 3, 1, 4, 385, 1, 1, SystemZImpOpBase + 1, 512, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #2053 = SEBR
5177 { 2052, 5, 1, 6, 384, 1, 1, SystemZImpOpBase + 1, 507, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fc88ULL }, // Inst #2052 = SEB
5178 { 2051, 5, 1, 4, 441, 0, 1, SystemZImpOpBase + 0, 507, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #2051 = SE
5179 { 2050, 4, 1, 4, 506, 1, 1, SystemZImpOpBase + 1, 503, 0, 0x0ULL }, // Inst #2050 = SDTRA
5180 { 2049, 3, 1, 4, 506, 1, 1, SystemZImpOpBase + 1, 500, 0, 0x0ULL }, // Inst #2049 = SDTR
5181 { 2048, 3, 1, 2, 442, 0, 1, SystemZImpOpBase + 0, 497, 0, 0x0ULL }, // Inst #2048 = SDR
5182 { 2047, 3, 1, 4, 385, 1, 1, SystemZImpOpBase + 1, 497, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #2047 = SDBR
5183 { 2046, 5, 1, 6, 384, 1, 1, SystemZImpOpBase + 1, 492, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fd08ULL }, // Inst #2046 = SDB
5184 { 2045, 5, 1, 4, 441, 0, 1, SystemZImpOpBase + 0, 492, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #2045 = SD
5185 { 2044, 0, 0, 2, 897, 1, 0, SystemZImpOpBase + 55, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2044 = SCKPF
5186 { 2043, 2, 0, 4, 826, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2043 = SCKC
5187 { 2042, 2, 0, 4, 896, 0, 1, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #2042 = SCK
5188 { 2041, 0, 0, 4, 858, 2, 0, SystemZImpOpBase + 72, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2041 = SCHM
5189 { 2040, 2, 0, 4, 854, 0, 1, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2040 = SCCTR
5190 { 2039, 2, 1, 4, 312, 0, 0, SystemZImpOpBase + 0, 1354, 0, 0x0ULL }, // Inst #2039 = SAR
5191 { 2038, 0, 0, 2, 320, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2038 = SAM64
5192 { 2037, 0, 0, 2, 320, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2037 = SAM31
5193 { 2036, 0, 0, 2, 320, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2036 = SAM24
5194 { 2035, 0, 0, 4, 861, 1, 0, SystemZImpOpBase + 71, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2035 = SAL
5195 { 2034, 2, 0, 4, 780, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2034 = SACF
5196 { 2033, 2, 0, 4, 780, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2033 = SAC
5197 { 2032, 5, 1, 4, 129, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x223c88ULL }, // Inst #2032 = S
5198 { 2031, 6, 1, 6, 218, 0, 1, SystemZImpOpBase + 0, 1332, 0, 0x0ULL }, // Inst #2031 = RXSBG
5199 { 2030, 0, 0, 4, 855, 1, 1, SystemZImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2030 = RSCH
5200 { 2029, 5, 2, 4, 515, 1, 0, SystemZImpOpBase + 12, 1327, 0, 0x0ULL }, // Inst #2029 = RRXTR
5201 { 2028, 5, 2, 4, 514, 1, 0, SystemZImpOpBase + 12, 914, 0, 0x0ULL }, // Inst #2028 = RRDTR
5202 { 2027, 2, 1, 4, 792, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2027 = RRBM
5203 { 2026, 2, 0, 4, 792, 0, 1, SystemZImpOpBase + 0, 933, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2026 = RRBE
5204 { 2025, 2, 0, 4, 819, 0, 1, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2025 = RP
5205 { 2024, 6, 1, 6, 218, 0, 1, SystemZImpOpBase + 0, 1332, 0, 0x0ULL }, // Inst #2024 = ROSBG
5206 { 2023, 6, 1, 6, 218, 0, 1, SystemZImpOpBase + 0, 1332, 0, 0x0ULL }, // Inst #2023 = RNSBG
5207 { 2022, 4, 1, 6, 213, 0, 0, SystemZImpOpBase + 0, 929, 0, 0x4ULL }, // Inst #2022 = RLLG
5208 { 2021, 4, 1, 6, 213, 0, 0, SystemZImpOpBase + 0, 1350, 0, 0x4ULL }, // Inst #2021 = RLL
5209 { 2020, 6, 1, 6, 215, 0, 0, SystemZImpOpBase + 0, 1344, 0, 0x0ULL }, // Inst #2020 = RISBLG
5210 { 2019, 6, 1, 6, 214, 0, 0, SystemZImpOpBase + 0, 1338, 0, 0x0ULL }, // Inst #2019 = RISBHG
5211 { 2018, 6, 1, 6, 898, 0, 1, SystemZImpOpBase + 0, 1332, 0, 0x3b800ULL }, // Inst #2018 = RISBGZ
5212 { 2017, 6, 1, 6, 216, 0, 0, SystemZImpOpBase + 0, 1332, 0, 0x0ULL }, // Inst #2017 = RISBGNZ
5213 { 2016, 6, 1, 6, 216, 0, 0, SystemZImpOpBase + 0, 1332, 0, 0x0ULL }, // Inst #2016 = RISBGN
5214 { 2015, 6, 1, 6, 898, 0, 1, SystemZImpOpBase + 0, 403, 0, 0x0ULL }, // Inst #2015 = RISBG32
5215 { 2014, 6, 1, 6, 898, 0, 1, SystemZImpOpBase + 0, 1332, 0, 0x3b800ULL }, // Inst #2014 = RISBG
5216 { 2013, 3, 0, 4, 800, 0, 0, SystemZImpOpBase + 0, 382, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2013 = RDPOpt
5217 { 2012, 4, 0, 4, 800, 0, 0, SystemZImpOpBase + 0, 977, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2012 = RDP
5218 { 2011, 0, 0, 4, 857, 1, 1, SystemZImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2011 = RCHP
5219 { 2010, 2, 0, 4, 853, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2010 = QSI
5220 { 2009, 2, 0, 4, 840, 1, 2, SystemZImpOpBase + 68, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2009 = QPACI
5221 { 2008, 2, 0, 4, 853, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2008 = QCTRI
5222 { 2007, 5, 2, 4, 513, 1, 0, SystemZImpOpBase + 12, 1327, 0, 0x0ULL }, // Inst #2007 = QAXTR
5223 { 2006, 5, 2, 4, 512, 1, 0, SystemZImpOpBase + 12, 914, 0, 0x0ULL }, // Inst #2006 = QADTR
5224 { 2005, 0, 0, 4, 802, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2005 = PTLB
5225 { 2004, 2, 0, 4, 818, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2004 = PTI
5226 { 2003, 0, 0, 2, 825, 2, 1, SystemZImpOpBase + 43, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2003 = PTFF
5227 { 2002, 2, 1, 4, 838, 0, 0, SystemZImpOpBase + 0, 1325, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2002 = PTF
5228 { 2001, 2, 0, 4, 818, 0, 0, SystemZImpOpBase + 0, 933, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2001 = PT
5229 { 2000, 4, 2, 4, 293, 2, 1, SystemZImpOpBase + 43, 794, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2000 = PRNO
5230 { 1999, 0, 0, 2, 817, 0, 1, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1999 = PR
5231 { 1998, 4, 2, 4, 872, 2, 1, SystemZImpOpBase + 43, 794, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1998 = PPNO
5232 { 1997, 3, 0, 4, 328, 0, 0, SystemZImpOpBase + 0, 223, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1997 = PPA
5233 { 1996, 3, 1, 4, 330, 0, 1, SystemZImpOpBase + 0, 223, 0, 0x0ULL }, // Inst #1996 = POPCNTOpt
5234 { 1995, 2, 1, 4, 865, 0, 1, SystemZImpOpBase + 0, 563, 0, 0x0ULL }, // Inst #1995 = POPCNT
5235 { 1994, 6, 0, 6, 279, 2, 1, SystemZImpOpBase + 43, 1319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1994 = PLO
5236 { 1993, 5, 0, 6, 302, 0, 0, SystemZImpOpBase + 0, 1314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1993 = PKU
5237 { 1992, 5, 0, 6, 302, 0, 0, SystemZImpOpBase + 0, 1314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1992 = PKA
5238 { 1991, 2, 0, 4, 797, 0, 1, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1991 = PGOUT
5239 { 1990, 2, 0, 4, 796, 0, 1, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1990 = PGIN
5240 { 1989, 0, 0, 2, 497, 3, 3, SystemZImpOpBase + 62, 1, 0, 0x0ULL }, // Inst #1989 = PFPO
5241 { 1988, 3, 1, 4, 794, 0, 0, SystemZImpOpBase + 0, 1311, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1988 = PFMF
5242 { 1987, 2, 0, 6, 264, 0, 0, SystemZImpOpBase + 0, 594, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1987 = PFDRL
5243 { 1986, 4, 0, 6, 264, 0, 0, SystemZImpOpBase + 0, 572, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xcULL }, // Inst #1986 = PFD
5244 { 1985, 0, 0, 4, 839, 2, 0, SystemZImpOpBase + 60, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1985 = PCKMO
5245 { 1984, 0, 0, 4, 889, 2, 1, SystemZImpOpBase + 43, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1984 = PCC
5246 { 1983, 2, 0, 4, 816, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1983 = PC
5247 { 1982, 0, 0, 4, 815, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1982 = PALB
5248 { 1981, 6, 0, 6, 302, 0, 0, SystemZImpOpBase + 0, 544, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1981 = PACK
5249 { 1980, 5, 1, 6, 156, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x2308cULL }, // Inst #1980 = OY
5250 { 1979, 3, 1, 4, 166, 0, 1, SystemZImpOpBase + 0, 541, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1979 = ORK
5251 { 1978, 3, 1, 2, 166, 0, 1, SystemZImpOpBase + 0, 538, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1978 = OR
5252 { 1977, 3, 0, 6, 158, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1977 = OIY
5253 { 1976, 3, 1, 4, 165, 0, 1, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1976 = OILL
5254 { 1975, 3, 1, 4, 164, 0, 1, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1975 = OILH
5255 { 1974, 3, 1, 6, 163, 0, 1, SystemZImpOpBase + 0, 515, 0, 0x23000ULL }, // Inst #1974 = OILF
5256 { 1973, 3, 1, 4, 162, 0, 1, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1973 = OIHL
5257 { 1972, 3, 1, 4, 161, 0, 1, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1972 = OIHH
5258 { 1971, 3, 1, 6, 160, 0, 1, SystemZImpOpBase + 0, 535, 0, 0x23000ULL }, // Inst #1971 = OIHF
5259 { 1970, 3, 0, 4, 158, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1970 = OI
5260 { 1969, 3, 1, 4, 157, 0, 1, SystemZImpOpBase + 0, 382, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1969 = OGRK
5261 { 1968, 3, 1, 4, 157, 0, 1, SystemZImpOpBase + 0, 526, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1968 = OGR
5262 { 1967, 5, 1, 6, 156, 0, 1, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #1967 = OG
5263 { 1966, 3, 1, 4, 177, 0, 1, SystemZImpOpBase + 0, 541, 0, 0x23000ULL }, // Inst #1966 = OCRK
5264 { 1965, 3, 1, 4, 177, 0, 1, SystemZImpOpBase + 0, 382, 0, 0x23000ULL }, // Inst #1965 = OCGRK
5265 { 1964, 5, 0, 6, 167, 0, 1, SystemZImpOpBase + 0, 789, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1964 = OC
5266 { 1963, 5, 1, 4, 156, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #1963 = O
5267 { 1962, 5, 1, 6, 144, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x2308cULL }, // Inst #1962 = NY
5268 { 1961, 3, 1, 4, 181, 0, 1, SystemZImpOpBase + 0, 541, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1961 = NXRK
5269 { 1960, 3, 1, 4, 181, 0, 1, SystemZImpOpBase + 0, 382, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1960 = NXGRK
5270 { 1959, 4, 0, 6, 327, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10cULL }, // Inst #1959 = NTSTG
5271 { 1958, 3, 1, 4, 154, 0, 1, SystemZImpOpBase + 0, 541, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1958 = NRK
5272 { 1957, 3, 1, 2, 154, 0, 1, SystemZImpOpBase + 0, 538, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1957 = NR
5273 { 1956, 3, 1, 4, 180, 0, 1, SystemZImpOpBase + 0, 541, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1956 = NOTR
5274 { 1955, 3, 1, 4, 180, 0, 1, SystemZImpOpBase + 0, 382, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1955 = NOTGR
5275 { 1954, 3, 1, 4, 179, 0, 1, SystemZImpOpBase + 0, 541, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1954 = NORK
5276 { 1953, 0, 0, 4, 0, 0, 0, SystemZImpOpBase + 0, 1, 0, 0x8ULL }, // Inst #1953 = NOP_bare
5277 { 1952, 1, 0, 2, 862, 0, 0, SystemZImpOpBase + 0, 302, 0, 0x0ULL }, // Inst #1952 = NOPR
5278 { 1951, 3, 0, 4, 862, 0, 0, SystemZImpOpBase + 0, 560, 0, 0x8ULL }, // Inst #1951 = NOP
5279 { 1950, 3, 1, 4, 179, 0, 1, SystemZImpOpBase + 0, 382, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1950 = NOGRK
5280 { 1949, 3, 1, 4, 178, 0, 1, SystemZImpOpBase + 0, 541, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1949 = NNRK
5281 { 1948, 0, 0, 4, 339, 2, 2, SystemZImpOpBase + 56, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1948 = NNPA
5282 { 1947, 3, 1, 4, 178, 0, 1, SystemZImpOpBase + 0, 382, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1947 = NNGRK
5283 { 1946, 3, 0, 6, 147, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1946 = NIY
5284 { 1945, 3, 1, 4, 153, 0, 1, SystemZImpOpBase + 0, 515, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #1945 = NILL
5285 { 1944, 3, 1, 4, 152, 0, 1, SystemZImpOpBase + 0, 515, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #1944 = NILH
5286 { 1943, 3, 1, 6, 151, 0, 1, SystemZImpOpBase + 0, 515, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23000ULL }, // Inst #1943 = NILF
5287 { 1942, 3, 1, 4, 150, 0, 1, SystemZImpOpBase + 0, 535, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #1942 = NIHL
5288 { 1941, 3, 1, 4, 149, 0, 1, SystemZImpOpBase + 0, 535, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #1941 = NIHH
5289 { 1940, 3, 1, 6, 148, 0, 1, SystemZImpOpBase + 0, 535, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x23000ULL }, // Inst #1940 = NIHF
5290 { 1939, 2, 0, 4, 267, 0, 0, SystemZImpOpBase + 0, 21, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1939 = NIAI
5291 { 1938, 3, 0, 4, 147, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1938 = NI
5292 { 1937, 3, 1, 4, 145, 0, 1, SystemZImpOpBase + 0, 382, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1937 = NGRK
5293 { 1936, 3, 1, 4, 145, 0, 1, SystemZImpOpBase + 0, 526, 0|(1ULL<<MCID::Commutable), 0x23000ULL }, // Inst #1936 = NGR
5294 { 1935, 5, 1, 6, 144, 0, 1, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #1935 = NG
5295 { 1934, 3, 1, 4, 176, 0, 1, SystemZImpOpBase + 0, 541, 0, 0x23000ULL }, // Inst #1934 = NCRK
5296 { 1933, 3, 1, 4, 176, 0, 1, SystemZImpOpBase + 0, 382, 0, 0x23000ULL }, // Inst #1933 = NCGRK
5297 { 1932, 5, 0, 6, 155, 0, 1, SystemZImpOpBase + 0, 789, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1932 = NC
5298 { 1931, 5, 1, 4, 144, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #1931 = N
5299 { 1930, 3, 1, 4, 451, 0, 0, SystemZImpOpBase + 0, 1308, 0, 0x0ULL }, // Inst #1930 = MYR
5300 { 1929, 3, 1, 4, 452, 0, 0, SystemZImpOpBase + 0, 500, 0, 0x0ULL }, // Inst #1929 = MYLR
5301 { 1928, 5, 1, 6, 450, 0, 0, SystemZImpOpBase + 0, 156, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1928 = MYL
5302 { 1927, 3, 1, 4, 452, 0, 0, SystemZImpOpBase + 0, 500, 0, 0x0ULL }, // Inst #1927 = MYHR
5303 { 1926, 5, 1, 6, 450, 0, 0, SystemZImpOpBase + 0, 156, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1926 = MYH
5304 { 1925, 5, 1, 6, 449, 0, 0, SystemZImpOpBase + 0, 1303, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1925 = MY
5305 { 1924, 4, 1, 4, 509, 1, 0, SystemZImpOpBase + 12, 556, 0, 0x0ULL }, // Inst #1924 = MXTRA
5306 { 1923, 3, 1, 4, 509, 1, 0, SystemZImpOpBase + 12, 553, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1923 = MXTR
5307 { 1922, 3, 1, 2, 448, 0, 0, SystemZImpOpBase + 0, 550, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1922 = MXR
5308 { 1921, 3, 1, 2, 447, 0, 0, SystemZImpOpBase + 0, 1300, 0, 0x0ULL }, // Inst #1921 = MXDR
5309 { 1920, 3, 1, 4, 390, 1, 0, SystemZImpOpBase + 12, 1300, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1920 = MXDBR
5310 { 1919, 5, 1, 6, 389, 1, 0, SystemZImpOpBase + 12, 1295, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1919 = MXDB
5311 { 1918, 5, 1, 4, 446, 0, 0, SystemZImpOpBase + 0, 1295, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1918 = MXD
5312 { 1917, 3, 1, 4, 391, 1, 0, SystemZImpOpBase + 12, 550, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1917 = MXBR
5313 { 1916, 5, 0, 6, 301, 0, 0, SystemZImpOpBase + 0, 789, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1916 = MVZ
5314 { 1915, 4, 2, 4, 49, 1, 1, SystemZImpOpBase + 35, 833, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1915 = MVST
5315 { 1914, 2, 0, 4, 813, 1, 1, SystemZImpOpBase + 35, 563, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1914 = MVPG
5316 { 1913, 6, 0, 6, 301, 0, 0, SystemZImpOpBase + 0, 544, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1913 = MVO
5317 { 1912, 5, 0, 6, 301, 0, 0, SystemZImpOpBase + 0, 789, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1912 = MVN
5318 { 1911, 3, 0, 6, 25, 0, 0, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1911 = MVIY
5319 { 1910, 3, 0, 4, 25, 0, 0, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1910 = MVI
5320 { 1909, 3, 0, 6, 24, 0, 0, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1909 = MVHI
5321 { 1908, 3, 0, 6, 24, 0, 0, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1908 = MVHHI
5322 { 1907, 3, 0, 6, 24, 0, 0, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1907 = MVGHI
5323 { 1906, 4, 0, 6, 811, 2, 0, SystemZImpOpBase + 53, 1108, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1906 = MVCSK
5324 { 1905, 6, 0, 6, 810, 0, 1, SystemZImpOpBase + 0, 1289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1905 = MVCS
5325 { 1904, 4, 0, 6, 28, 1, 0, SystemZImpOpBase + 55, 1108, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1904 = MVCRL
5326 { 1903, 6, 0, 6, 810, 0, 1, SystemZImpOpBase + 0, 1289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1903 = MVCP
5327 { 1902, 5, 0, 6, 812, 1, 0, SystemZImpOpBase + 55, 873, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1902 = MVCOS
5328 { 1901, 6, 2, 6, 27, 0, 1, SystemZImpOpBase + 0, 798, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1901 = MVCLU
5329 { 1900, 6, 2, 4, 27, 0, 1, SystemZImpOpBase + 0, 798, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1900 = MVCLE
5330 { 1899, 4, 2, 2, 27, 0, 1, SystemZImpOpBase + 0, 794, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1899 = MVCL
5331 { 1898, 6, 0, 6, 810, 0, 1, SystemZImpOpBase + 0, 1289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1898 = MVCK
5332 { 1897, 5, 0, 6, 85, 0, 0, SystemZImpOpBase + 0, 789, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1897 = MVCIN
5333 { 1896, 4, 0, 6, 811, 2, 0, SystemZImpOpBase + 53, 1108, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1896 = MVCDK
5334 { 1895, 5, 0, 6, 26, 0, 0, SystemZImpOpBase + 0, 789, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1895 = MVC
5335 { 1894, 5, 1, 6, 182, 0, 0, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1894 = MSY
5336 { 1893, 1, 0, 4, 824, 0, 0, SystemZImpOpBase + 0, 1288, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1893 = MSTA
5337 { 1892, 3, 1, 4, 199, 0, 1, SystemZImpOpBase + 0, 541, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1892 = MSRKC
5338 { 1891, 3, 1, 4, 183, 0, 0, SystemZImpOpBase + 0, 538, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1891 = MSR
5339 { 1890, 3, 1, 4, 200, 0, 1, SystemZImpOpBase + 0, 382, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1890 = MSGRKC
5340 { 1889, 3, 1, 4, 185, 0, 0, SystemZImpOpBase + 0, 526, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1889 = MSGR
5341 { 1888, 3, 1, 4, 186, 0, 0, SystemZImpOpBase + 0, 523, 0, 0x0ULL }, // Inst #1888 = MSGFR
5342 { 1887, 3, 1, 6, 186, 0, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1887 = MSGFI
5343 { 1886, 5, 1, 6, 182, 0, 0, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1886 = MSGF
5344 { 1885, 5, 1, 6, 198, 0, 1, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1885 = MSGC
5345 { 1884, 5, 1, 6, 184, 0, 0, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1884 = MSG
5346 { 1883, 3, 1, 6, 183, 0, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1883 = MSFI
5347 { 1882, 4, 1, 4, 454, 0, 0, SystemZImpOpBase + 0, 1281, 0, 0x0ULL }, // Inst #1882 = MSER
5348 { 1881, 4, 1, 4, 393, 1, 0, SystemZImpOpBase + 12, 1281, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1881 = MSEBR
5349 { 1880, 6, 1, 6, 392, 1, 0, SystemZImpOpBase + 12, 1275, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1880 = MSEB
5350 { 1879, 6, 1, 6, 453, 0, 0, SystemZImpOpBase + 0, 1275, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1879 = MSE
5351 { 1878, 4, 1, 4, 454, 0, 0, SystemZImpOpBase + 0, 1271, 0, 0x0ULL }, // Inst #1878 = MSDR
5352 { 1877, 4, 1, 4, 395, 1, 0, SystemZImpOpBase + 12, 1271, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1877 = MSDBR
5353 { 1876, 6, 1, 6, 394, 1, 0, SystemZImpOpBase + 12, 1265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1876 = MSDB
5354 { 1875, 6, 1, 6, 453, 0, 0, SystemZImpOpBase + 0, 1265, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1875 = MSD
5355 { 1874, 2, 0, 4, 856, 1, 1, SystemZImpOpBase + 41, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1874 = MSCH
5356 { 1873, 5, 1, 6, 197, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1873 = MSC
5357 { 1872, 5, 1, 4, 182, 0, 0, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1872 = MS
5358 { 1871, 3, 1, 2, 192, 0, 0, SystemZImpOpBase + 0, 924, 0, 0x0ULL }, // Inst #1871 = MR
5359 { 1870, 6, 0, 6, 306, 0, 0, SystemZImpOpBase + 0, 544, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1870 = MP
5360 { 1869, 3, 1, 4, 192, 0, 0, SystemZImpOpBase + 0, 924, 0, 0x0ULL }, // Inst #1869 = MLR
5361 { 1868, 3, 1, 4, 188, 0, 0, SystemZImpOpBase + 0, 870, 0, 0x0ULL }, // Inst #1868 = MLGR
5362 { 1867, 5, 1, 6, 187, 0, 0, SystemZImpOpBase + 0, 904, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1867 = MLG
5363 { 1866, 5, 1, 6, 193, 0, 0, SystemZImpOpBase + 0, 904, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1866 = ML
5364 { 1865, 5, 1, 6, 191, 0, 0, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1865 = MHY
5365 { 1864, 3, 1, 4, 190, 0, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1864 = MHI
5366 { 1863, 5, 1, 4, 191, 0, 0, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x48ULL }, // Inst #1863 = MH
5367 { 1862, 3, 1, 4, 196, 0, 0, SystemZImpOpBase + 0, 379, 0, 0x0ULL }, // Inst #1862 = MGRK
5368 { 1861, 3, 1, 4, 189, 0, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1861 = MGHI
5369 { 1860, 5, 1, 6, 194, 0, 0, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1860 = MGH
5370 { 1859, 5, 1, 6, 195, 0, 0, SystemZImpOpBase + 0, 904, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1859 = MG
5371 { 1858, 5, 1, 6, 193, 0, 0, SystemZImpOpBase + 0, 904, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1858 = MFY
5372 { 1857, 3, 1, 2, 445, 0, 0, SystemZImpOpBase + 0, 1285, 0, 0x0ULL }, // Inst #1857 = MER
5373 { 1856, 3, 1, 4, 892, 0, 0, SystemZImpOpBase + 0, 512, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1856 = MEER
5374 { 1855, 3, 1, 4, 388, 1, 0, SystemZImpOpBase + 12, 512, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1855 = MEEBR
5375 { 1854, 5, 1, 6, 387, 1, 0, SystemZImpOpBase + 12, 507, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1854 = MEEB
5376 { 1853, 5, 1, 6, 891, 0, 0, SystemZImpOpBase + 0, 507, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1853 = MEE
5377 { 1852, 5, 1, 4, 444, 0, 0, SystemZImpOpBase + 0, 492, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1852 = ME
5378 { 1851, 4, 1, 4, 508, 1, 0, SystemZImpOpBase + 12, 503, 0, 0x0ULL }, // Inst #1851 = MDTRA
5379 { 1850, 3, 1, 4, 508, 1, 0, SystemZImpOpBase + 12, 500, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1850 = MDTR
5380 { 1849, 3, 1, 2, 892, 0, 0, SystemZImpOpBase + 0, 497, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1849 = MDR
5381 { 1848, 3, 1, 2, 445, 0, 0, SystemZImpOpBase + 0, 1285, 0, 0x0ULL }, // Inst #1848 = MDER
5382 { 1847, 3, 1, 4, 388, 1, 0, SystemZImpOpBase + 12, 1285, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1847 = MDEBR
5383 { 1846, 5, 1, 6, 387, 1, 0, SystemZImpOpBase + 12, 492, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1846 = MDEB
5384 { 1845, 5, 1, 4, 444, 0, 0, SystemZImpOpBase + 0, 492, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1845 = MDE
5385 { 1844, 3, 1, 4, 388, 1, 0, SystemZImpOpBase + 12, 497, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1844 = MDBR
5386 { 1843, 5, 1, 6, 387, 1, 0, SystemZImpOpBase + 12, 492, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1843 = MDB
5387 { 1842, 5, 1, 4, 891, 0, 0, SystemZImpOpBase + 0, 492, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1842 = MD
5388 { 1841, 3, 0, 4, 842, 0, 0, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1841 = MC
5389 { 1840, 4, 1, 4, 457, 0, 0, SystemZImpOpBase + 0, 1271, 0, 0x0ULL }, // Inst #1840 = MAYR
5390 { 1839, 4, 1, 4, 458, 0, 0, SystemZImpOpBase + 0, 1271, 0, 0x0ULL }, // Inst #1839 = MAYLR
5391 { 1838, 6, 1, 6, 456, 0, 0, SystemZImpOpBase + 0, 1265, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1838 = MAYL
5392 { 1837, 4, 1, 4, 458, 0, 0, SystemZImpOpBase + 0, 1271, 0, 0x0ULL }, // Inst #1837 = MAYHR
5393 { 1836, 6, 1, 6, 456, 0, 0, SystemZImpOpBase + 0, 1265, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1836 = MAYH
5394 { 1835, 6, 1, 6, 455, 0, 0, SystemZImpOpBase + 0, 1265, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1835 = MAY
5395 { 1834, 4, 1, 4, 454, 0, 0, SystemZImpOpBase + 0, 1281, 0, 0x0ULL }, // Inst #1834 = MAER
5396 { 1833, 4, 1, 4, 393, 1, 0, SystemZImpOpBase + 12, 1281, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1833 = MAEBR
5397 { 1832, 6, 1, 6, 392, 1, 0, SystemZImpOpBase + 12, 1275, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1832 = MAEB
5398 { 1831, 6, 1, 6, 453, 0, 0, SystemZImpOpBase + 0, 1275, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1831 = MAE
5399 { 1830, 4, 1, 4, 454, 0, 0, SystemZImpOpBase + 0, 1271, 0, 0x0ULL }, // Inst #1830 = MADR
5400 { 1829, 4, 1, 4, 395, 1, 0, SystemZImpOpBase + 12, 1271, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1829 = MADBR
5401 { 1828, 6, 1, 6, 394, 1, 0, SystemZImpOpBase + 12, 1265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1828 = MADB
5402 { 1827, 6, 1, 6, 453, 0, 0, SystemZImpOpBase + 0, 1265, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1827 = MAD
5403 { 1826, 5, 1, 4, 193, 0, 0, SystemZImpOpBase + 0, 904, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1826 = M
5404 { 1825, 1, 1, 4, 343, 0, 0, SystemZImpOpBase + 0, 346, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1825 = LZXR
5405 { 1824, 4, 1, 6, 42, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1824 = LZRG
5406 { 1823, 4, 1, 6, 42, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1823 = LZRF
5407 { 1822, 1, 1, 4, 342, 0, 0, SystemZImpOpBase + 0, 345, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1822 = LZER
5408 { 1821, 1, 1, 4, 342, 0, 0, SystemZImpOpBase + 0, 344, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1821 = LZDR
5409 { 1820, 4, 1, 6, 33, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL }, // Inst #1820 = LY
5410 { 1819, 2, 1, 4, 347, 0, 0, SystemZImpOpBase + 0, 673, 0, 0x0ULL }, // Inst #1819 = LXR
5411 { 1818, 2, 1, 4, 422, 0, 0, SystemZImpOpBase + 0, 1263, 0, 0x0ULL }, // Inst #1818 = LXER
5412 { 1817, 2, 1, 4, 361, 1, 0, SystemZImpOpBase + 12, 1263, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1817 = LXEBR
5413 { 1816, 4, 1, 6, 360, 1, 0, SystemZImpOpBase + 12, 347, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1816 = LXEB
5414 { 1815, 4, 1, 6, 421, 0, 0, SystemZImpOpBase + 0, 347, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1815 = LXE
5415 { 1814, 3, 1, 4, 472, 1, 0, SystemZImpOpBase + 12, 1260, 0, 0x0ULL }, // Inst #1814 = LXDTR
5416 { 1813, 2, 1, 4, 422, 0, 0, SystemZImpOpBase + 0, 1258, 0, 0x0ULL }, // Inst #1813 = LXDR
5417 { 1812, 2, 1, 4, 361, 1, 0, SystemZImpOpBase + 12, 1258, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1812 = LXDBR
5418 { 1811, 4, 1, 6, 360, 1, 0, SystemZImpOpBase + 12, 347, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1811 = LXDB
5419 { 1810, 4, 1, 6, 421, 0, 0, SystemZImpOpBase + 0, 347, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1810 = LXD
5420 { 1809, 2, 1, 4, 807, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1809 = LURAG
5421 { 1808, 2, 1, 4, 807, 0, 0, SystemZImpOpBase + 0, 933, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1808 = LURA
5422 { 1807, 2, 1, 4, 468, 1, 1, SystemZImpOpBase + 1, 673, 0, 0x0ULL }, // Inst #1807 = LTXTR
5423 { 1806, 2, 1, 4, 415, 0, 1, SystemZImpOpBase + 0, 673, 0, 0x0ULL }, // Inst #1806 = LTXR
5424 { 1805, 2, 1, 4, 349, 1, 1, SystemZImpOpBase + 1, 673, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #1805 = LTXBR
5425 { 1804, 2, 1, 2, 45, 0, 1, SystemZImpOpBase + 0, 815, 0, 0x3b800ULL }, // Inst #1804 = LTR
5426 { 1803, 2, 1, 4, 45, 0, 1, SystemZImpOpBase + 0, 563, 0, 0x3b800ULL }, // Inst #1803 = LTGR
5427 { 1802, 2, 1, 4, 60, 0, 1, SystemZImpOpBase + 0, 714, 0, 0x3b800ULL }, // Inst #1802 = LTGFR
5428 { 1801, 4, 1, 6, 59, 0, 1, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad), 0x3b88cULL }, // Inst #1801 = LTGF
5429 { 1800, 4, 1, 6, 44, 0, 1, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad), 0x3b90cULL }, // Inst #1800 = LTG
5430 { 1799, 2, 1, 2, 414, 0, 1, SystemZImpOpBase + 0, 659, 0, 0x0ULL }, // Inst #1799 = LTER
5431 { 1798, 2, 1, 4, 348, 1, 1, SystemZImpOpBase + 1, 659, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #1798 = LTEBR
5432 { 1797, 2, 1, 4, 467, 1, 1, SystemZImpOpBase + 1, 631, 0, 0x0ULL }, // Inst #1797 = LTDTR
5433 { 1796, 2, 1, 2, 414, 0, 1, SystemZImpOpBase + 0, 631, 0, 0x0ULL }, // Inst #1796 = LTDR
5434 { 1795, 2, 1, 4, 348, 1, 1, SystemZImpOpBase + 1, 631, 0|(1ULL<<MCID::MayRaiseFPException), 0x3fc00ULL }, // Inst #1795 = LTDBR
5435 { 1794, 4, 1, 6, 44, 0, 1, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayLoad), 0x3b88cULL }, // Inst #1794 = LT
5436 { 1793, 2, 0, 4, 852, 0, 1, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1793 = LSCTL
5437 { 1792, 2, 1, 4, 82, 0, 0, SystemZImpOpBase + 0, 815, 0, 0x0ULL }, // Inst #1792 = LRVR
5438 { 1791, 4, 1, 6, 83, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1791 = LRVH
5439 { 1790, 2, 1, 4, 82, 0, 0, SystemZImpOpBase + 0, 563, 0, 0x0ULL }, // Inst #1790 = LRVGR
5440 { 1789, 4, 1, 6, 83, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1789 = LRVG
5441 { 1788, 4, 1, 6, 83, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1788 = LRV
5442 { 1787, 2, 1, 6, 33, 0, 0, SystemZImpOpBase + 0, 765, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1787 = LRL
5443 { 1786, 2, 1, 2, 416, 0, 0, SystemZImpOpBase + 0, 1128, 0, 0x0ULL }, // Inst #1786 = LRER
5444 { 1785, 2, 1, 2, 418, 0, 0, SystemZImpOpBase + 0, 1126, 0, 0x0ULL }, // Inst #1785 = LRDR
5445 { 1784, 4, 1, 6, 805, 0, 1, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xcULL }, // Inst #1784 = LRAY
5446 { 1783, 4, 1, 6, 805, 0, 1, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xcULL }, // Inst #1783 = LRAG
5447 { 1782, 4, 1, 4, 805, 0, 1, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1782 = LRA
5448 { 1781, 2, 1, 2, 41, 0, 0, SystemZImpOpBase + 0, 815, 0, 0x0ULL }, // Inst #1781 = LR
5449 { 1780, 2, 1, 4, 430, 0, 1, SystemZImpOpBase + 0, 673, 0, 0x0ULL }, // Inst #1780 = LPXR
5450 { 1779, 2, 1, 4, 374, 0, 1, SystemZImpOpBase + 0, 673, 0, 0x3fc00ULL }, // Inst #1779 = LPXBR
5451 { 1778, 5, 2, 4, 804, 0, 1, SystemZImpOpBase + 0, 1253, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1778 = LPTEA
5452 { 1777, 2, 0, 6, 774, 0, 1, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x204ULL }, // Inst #1777 = LPSWEY
5453 { 1776, 2, 0, 4, 863, 0, 1, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x200ULL }, // Inst #1776 = LPSWE
5454 { 1775, 2, 0, 4, 863, 0, 1, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1775 = LPSW
5455 { 1774, 2, 1, 2, 88, 0, 1, SystemZImpOpBase + 0, 815, 0, 0x23c00ULL }, // Inst #1774 = LPR
5456 { 1773, 4, 1, 6, 280, 0, 0, SystemZImpOpBase + 0, 306, 0|(1ULL<<MCID::MayLoad), 0x20cULL }, // Inst #1773 = LPQ
5457 { 1772, 2, 0, 4, 848, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1772 = LPP
5458 { 1771, 2, 1, 4, 88, 0, 1, SystemZImpOpBase + 0, 563, 0, 0x23c00ULL }, // Inst #1771 = LPGR
5459 { 1770, 2, 1, 4, 89, 0, 1, SystemZImpOpBase + 0, 714, 0, 0x3b800ULL }, // Inst #1770 = LPGFR
5460 { 1769, 2, 1, 2, 429, 0, 1, SystemZImpOpBase + 0, 659, 0, 0x0ULL }, // Inst #1769 = LPER
5461 { 1768, 2, 1, 4, 372, 0, 1, SystemZImpOpBase + 0, 659, 0, 0x3fc00ULL }, // Inst #1768 = LPEBR
5462 { 1767, 2, 1, 2, 429, 0, 1, SystemZImpOpBase + 0, 631, 0, 0x0ULL }, // Inst #1767 = LPDR
5463 { 1766, 5, 1, 6, 282, 0, 1, SystemZImpOpBase + 0, 1248, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1766 = LPDG
5464 { 1765, 2, 1, 4, 373, 0, 0, SystemZImpOpBase + 0, 659, 0, 0x0ULL }, // Inst #1765 = LPDFR_32
5465 { 1764, 2, 1, 4, 373, 0, 0, SystemZImpOpBase + 0, 631, 0, 0x0ULL }, // Inst #1764 = LPDFR
5466 { 1763, 2, 1, 4, 372, 0, 1, SystemZImpOpBase + 0, 631, 0, 0x3fc00ULL }, // Inst #1763 = LPDBR
5467 { 1762, 5, 1, 6, 282, 0, 1, SystemZImpOpBase + 0, 1248, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1762 = LPD
5468 { 1761, 2, 0, 4, 852, 0, 1, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1761 = LPCTL
5469 { 1760, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1760 = LOCRAsmZ
5470 { 1759, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1759 = LOCRAsmP
5471 { 1758, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1758 = LOCRAsmO
5472 { 1757, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1757 = LOCRAsmNZ
5473 { 1756, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1756 = LOCRAsmNP
5474 { 1755, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1755 = LOCRAsmNO
5475 { 1754, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1754 = LOCRAsmNM
5476 { 1753, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1753 = LOCRAsmNLH
5477 { 1752, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1752 = LOCRAsmNLE
5478 { 1751, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1751 = LOCRAsmNL
5479 { 1750, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1750 = LOCRAsmNHE
5480 { 1749, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1749 = LOCRAsmNH
5481 { 1748, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1748 = LOCRAsmNE
5482 { 1747, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1747 = LOCRAsmM
5483 { 1746, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1746 = LOCRAsmLH
5484 { 1745, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1745 = LOCRAsmLE
5485 { 1744, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1744 = LOCRAsmL
5486 { 1743, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1743 = LOCRAsmHE
5487 { 1742, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1742 = LOCRAsmH
5488 { 1741, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 538, 0, 0x0ULL }, // Inst #1741 = LOCRAsmE
5489 { 1740, 4, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 1244, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1740 = LOCRAsm
5490 { 1739, 5, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 1239, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #1739 = LOCR
5491 { 1738, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1738 = LOCHIAsmZ
5492 { 1737, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1737 = LOCHIAsmP
5493 { 1736, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1736 = LOCHIAsmO
5494 { 1735, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1735 = LOCHIAsmNZ
5495 { 1734, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1734 = LOCHIAsmNP
5496 { 1733, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1733 = LOCHIAsmNO
5497 { 1732, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1732 = LOCHIAsmNM
5498 { 1731, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1731 = LOCHIAsmNLH
5499 { 1730, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1730 = LOCHIAsmNLE
5500 { 1729, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1729 = LOCHIAsmNL
5501 { 1728, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1728 = LOCHIAsmNHE
5502 { 1727, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1727 = LOCHIAsmNH
5503 { 1726, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1726 = LOCHIAsmNE
5504 { 1725, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1725 = LOCHIAsmM
5505 { 1724, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1724 = LOCHIAsmLH
5506 { 1723, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1723 = LOCHIAsmLE
5507 { 1722, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1722 = LOCHIAsmL
5508 { 1721, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1721 = LOCHIAsmHE
5509 { 1720, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1720 = LOCHIAsmH
5510 { 1719, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1719 = LOCHIAsmE
5511 { 1718, 4, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 1235, 0, 0x0ULL }, // Inst #1718 = LOCHIAsm
5512 { 1717, 5, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 1230, 0, 0x80000ULL }, // Inst #1717 = LOCHI
5513 { 1716, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1716 = LOCHHIAsmZ
5514 { 1715, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1715 = LOCHHIAsmP
5515 { 1714, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1714 = LOCHHIAsmO
5516 { 1713, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1713 = LOCHHIAsmNZ
5517 { 1712, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1712 = LOCHHIAsmNP
5518 { 1711, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1711 = LOCHHIAsmNO
5519 { 1710, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1710 = LOCHHIAsmNM
5520 { 1709, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1709 = LOCHHIAsmNLH
5521 { 1708, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1708 = LOCHHIAsmNLE
5522 { 1707, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1707 = LOCHHIAsmNL
5523 { 1706, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1706 = LOCHHIAsmNHE
5524 { 1705, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1705 = LOCHHIAsmNH
5525 { 1704, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1704 = LOCHHIAsmNE
5526 { 1703, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1703 = LOCHHIAsmM
5527 { 1702, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1702 = LOCHHIAsmLH
5528 { 1701, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1701 = LOCHHIAsmLE
5529 { 1700, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1700 = LOCHHIAsmL
5530 { 1699, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1699 = LOCHHIAsmHE
5531 { 1698, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1698 = LOCHHIAsmH
5532 { 1697, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1697 = LOCHHIAsmE
5533 { 1696, 4, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 1226, 0, 0x0ULL }, // Inst #1696 = LOCHHIAsm
5534 { 1695, 5, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 1221, 0, 0x80000ULL }, // Inst #1695 = LOCHHI
5535 { 1694, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1694 = LOCGRAsmZ
5536 { 1693, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1693 = LOCGRAsmP
5537 { 1692, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1692 = LOCGRAsmO
5538 { 1691, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1691 = LOCGRAsmNZ
5539 { 1690, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1690 = LOCGRAsmNP
5540 { 1689, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1689 = LOCGRAsmNO
5541 { 1688, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1688 = LOCGRAsmNM
5542 { 1687, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1687 = LOCGRAsmNLH
5543 { 1686, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1686 = LOCGRAsmNLE
5544 { 1685, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1685 = LOCGRAsmNL
5545 { 1684, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1684 = LOCGRAsmNHE
5546 { 1683, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1683 = LOCGRAsmNH
5547 { 1682, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1682 = LOCGRAsmNE
5548 { 1681, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1681 = LOCGRAsmM
5549 { 1680, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1680 = LOCGRAsmLH
5550 { 1679, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1679 = LOCGRAsmLE
5551 { 1678, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1678 = LOCGRAsmL
5552 { 1677, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1677 = LOCGRAsmHE
5553 { 1676, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1676 = LOCGRAsmH
5554 { 1675, 3, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 526, 0, 0x0ULL }, // Inst #1675 = LOCGRAsmE
5555 { 1674, 4, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 1217, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1674 = LOCGRAsm
5556 { 1673, 5, 1, 4, 884, 1, 0, SystemZImpOpBase + 0, 1212, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #1673 = LOCGR
5557 { 1672, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1672 = LOCGHIAsmZ
5558 { 1671, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1671 = LOCGHIAsmP
5559 { 1670, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1670 = LOCGHIAsmO
5560 { 1669, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1669 = LOCGHIAsmNZ
5561 { 1668, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1668 = LOCGHIAsmNP
5562 { 1667, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1667 = LOCGHIAsmNO
5563 { 1666, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1666 = LOCGHIAsmNM
5564 { 1665, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1665 = LOCGHIAsmNLH
5565 { 1664, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1664 = LOCGHIAsmNLE
5566 { 1663, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1663 = LOCGHIAsmNL
5567 { 1662, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1662 = LOCGHIAsmNHE
5568 { 1661, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1661 = LOCGHIAsmNH
5569 { 1660, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1660 = LOCGHIAsmNE
5570 { 1659, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1659 = LOCGHIAsmM
5571 { 1658, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1658 = LOCGHIAsmLH
5572 { 1657, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1657 = LOCGHIAsmLE
5573 { 1656, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1656 = LOCGHIAsmL
5574 { 1655, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1655 = LOCGHIAsmHE
5575 { 1654, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1654 = LOCGHIAsmH
5576 { 1653, 3, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 303, 0, 0x0ULL }, // Inst #1653 = LOCGHIAsmE
5577 { 1652, 4, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 1208, 0, 0x0ULL }, // Inst #1652 = LOCGHIAsm
5578 { 1651, 5, 1, 6, 52, 1, 0, SystemZImpOpBase + 0, 1203, 0, 0x80000ULL }, // Inst #1651 = LOCGHI
5579 { 1650, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1650 = LOCGAsmZ
5580 { 1649, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1649 = LOCGAsmP
5581 { 1648, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1648 = LOCGAsmO
5582 { 1647, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1647 = LOCGAsmNZ
5583 { 1646, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1646 = LOCGAsmNP
5584 { 1645, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1645 = LOCGAsmNO
5585 { 1644, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1644 = LOCGAsmNM
5586 { 1643, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1643 = LOCGAsmNLH
5587 { 1642, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1642 = LOCGAsmNLE
5588 { 1641, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1641 = LOCGAsmNL
5589 { 1640, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1640 = LOCGAsmNHE
5590 { 1639, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1639 = LOCGAsmNH
5591 { 1638, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1638 = LOCGAsmNE
5592 { 1637, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1637 = LOCGAsmM
5593 { 1636, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1636 = LOCGAsmLH
5594 { 1635, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1635 = LOCGAsmLE
5595 { 1634, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1634 = LOCGAsmL
5596 { 1633, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1633 = LOCGAsmHE
5597 { 1632, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1632 = LOCGAsmH
5598 { 1631, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1199, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1631 = LOCGAsmE
5599 { 1630, 5, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1194, 0|(1ULL<<MCID::MayLoad), 0x104ULL }, // Inst #1630 = LOCGAsm
5600 { 1629, 6, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1188, 0|(1ULL<<MCID::MayLoad), 0x80104ULL }, // Inst #1629 = LOCG
5601 { 1628, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1628 = LOCFHRAsmZ
5602 { 1627, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1627 = LOCFHRAsmP
5603 { 1626, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1626 = LOCFHRAsmO
5604 { 1625, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1625 = LOCFHRAsmNZ
5605 { 1624, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1624 = LOCFHRAsmNP
5606 { 1623, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1623 = LOCFHRAsmNO
5607 { 1622, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1622 = LOCFHRAsmNM
5608 { 1621, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1621 = LOCFHRAsmNLH
5609 { 1620, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1620 = LOCFHRAsmNLE
5610 { 1619, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1619 = LOCFHRAsmNL
5611 { 1618, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1618 = LOCFHRAsmNHE
5612 { 1617, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1617 = LOCFHRAsmNH
5613 { 1616, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1616 = LOCFHRAsmNE
5614 { 1615, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1615 = LOCFHRAsmM
5615 { 1614, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1614 = LOCFHRAsmLH
5616 { 1613, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1613 = LOCFHRAsmLE
5617 { 1612, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1612 = LOCFHRAsmL
5618 { 1611, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1611 = LOCFHRAsmHE
5619 { 1610, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1610 = LOCFHRAsmH
5620 { 1609, 3, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1185, 0, 0x0ULL }, // Inst #1609 = LOCFHRAsmE
5621 { 1608, 4, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1181, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #1608 = LOCFHRAsm
5622 { 1607, 5, 1, 4, 51, 1, 0, SystemZImpOpBase + 0, 1176, 0|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #1607 = LOCFHR
5623 { 1606, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1606 = LOCFHAsmZ
5624 { 1605, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1605 = LOCFHAsmP
5625 { 1604, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1604 = LOCFHAsmO
5626 { 1603, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1603 = LOCFHAsmNZ
5627 { 1602, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1602 = LOCFHAsmNP
5628 { 1601, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1601 = LOCFHAsmNO
5629 { 1600, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1600 = LOCFHAsmNM
5630 { 1599, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1599 = LOCFHAsmNLH
5631 { 1598, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1598 = LOCFHAsmNLE
5632 { 1597, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1597 = LOCFHAsmNL
5633 { 1596, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1596 = LOCFHAsmNHE
5634 { 1595, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1595 = LOCFHAsmNH
5635 { 1594, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1594 = LOCFHAsmNE
5636 { 1593, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1593 = LOCFHAsmM
5637 { 1592, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1592 = LOCFHAsmLH
5638 { 1591, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1591 = LOCFHAsmLE
5639 { 1590, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1590 = LOCFHAsmL
5640 { 1589, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1589 = LOCFHAsmHE
5641 { 1588, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1588 = LOCFHAsmH
5642 { 1587, 4, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1172, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1587 = LOCFHAsmE
5643 { 1586, 5, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1167, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1586 = LOCFHAsm
5644 { 1585, 6, 1, 6, 53, 1, 0, SystemZImpOpBase + 0, 1161, 0|(1ULL<<MCID::MayLoad), 0x80084ULL }, // Inst #1585 = LOCFH
5645 { 1584, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1584 = LOCAsmZ
5646 { 1583, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1583 = LOCAsmP
5647 { 1582, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1582 = LOCAsmO
5648 { 1581, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1581 = LOCAsmNZ
5649 { 1580, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1580 = LOCAsmNP
5650 { 1579, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1579 = LOCAsmNO
5651 { 1578, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1578 = LOCAsmNM
5652 { 1577, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1577 = LOCAsmNLH
5653 { 1576, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1576 = LOCAsmNLE
5654 { 1575, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1575 = LOCAsmNL
5655 { 1574, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1574 = LOCAsmNHE
5656 { 1573, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1573 = LOCAsmNH
5657 { 1572, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1572 = LOCAsmNE
5658 { 1571, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1571 = LOCAsmM
5659 { 1570, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1570 = LOCAsmLH
5660 { 1569, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1569 = LOCAsmLE
5661 { 1568, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1568 = LOCAsmL
5662 { 1567, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1567 = LOCAsmHE
5663 { 1566, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1566 = LOCAsmH
5664 { 1565, 4, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1157, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1565 = LOCAsmE
5665 { 1564, 5, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1152, 0|(1ULL<<MCID::MayLoad), 0x84ULL }, // Inst #1564 = LOCAsm
5666 { 1563, 6, 1, 6, 885, 1, 0, SystemZImpOpBase + 0, 1146, 0|(1ULL<<MCID::MayLoad), 0x80084ULL }, // Inst #1563 = LOC
5667 { 1562, 2, 1, 4, 430, 0, 1, SystemZImpOpBase + 0, 673, 0, 0x0ULL }, // Inst #1562 = LNXR
5668 { 1561, 2, 1, 4, 374, 0, 1, SystemZImpOpBase + 0, 673, 0, 0x3fc00ULL }, // Inst #1561 = LNXBR
5669 { 1560, 2, 1, 2, 90, 0, 1, SystemZImpOpBase + 0, 815, 0, 0x23c00ULL }, // Inst #1560 = LNR
5670 { 1559, 2, 1, 4, 90, 0, 1, SystemZImpOpBase + 0, 563, 0, 0x23c00ULL }, // Inst #1559 = LNGR
5671 { 1558, 2, 1, 4, 89, 0, 1, SystemZImpOpBase + 0, 714, 0, 0x3b800ULL }, // Inst #1558 = LNGFR
5672 { 1557, 2, 1, 2, 429, 0, 1, SystemZImpOpBase + 0, 659, 0, 0x0ULL }, // Inst #1557 = LNER
5673 { 1556, 2, 1, 4, 372, 0, 1, SystemZImpOpBase + 0, 659, 0, 0x3fc00ULL }, // Inst #1556 = LNEBR
5674 { 1555, 2, 1, 2, 429, 0, 1, SystemZImpOpBase + 0, 631, 0, 0x0ULL }, // Inst #1555 = LNDR
5675 { 1554, 2, 1, 4, 373, 0, 0, SystemZImpOpBase + 0, 659, 0, 0x0ULL }, // Inst #1554 = LNDFR_32
5676 { 1553, 2, 1, 4, 373, 0, 0, SystemZImpOpBase + 0, 631, 0, 0x0ULL }, // Inst #1553 = LNDFR
5677 { 1552, 2, 1, 4, 372, 0, 1, SystemZImpOpBase + 0, 631, 0, 0x3fc00ULL }, // Inst #1552 = LNDBR
5678 { 1551, 4, 2, 6, 79, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1551 = LMY
5679 { 1550, 4, 2, 6, 79, 0, 0, SystemZImpOpBase + 0, 1142, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1550 = LMH
5680 { 1549, 4, 2, 6, 79, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1549 = LMG
5681 { 1548, 6, 2, 6, 80, 0, 0, SystemZImpOpBase + 0, 1136, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1548 = LMD
5682 { 1547, 4, 2, 4, 79, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1547 = LM
5683 { 1546, 4, 1, 6, 74, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1546 = LLZRGF
5684 { 1545, 2, 1, 4, 38, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1545 = LLILL
5685 { 1544, 2, 1, 4, 38, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1544 = LLILH
5686 { 1543, 2, 1, 6, 38, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1543 = LLILF
5687 { 1542, 2, 1, 4, 37, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1542 = LLIHL
5688 { 1541, 2, 1, 4, 37, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1541 = LLIHH
5689 { 1540, 2, 1, 6, 37, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1540 = LLIHF
5690 { 1539, 2, 1, 6, 72, 0, 0, SystemZImpOpBase + 0, 765, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1539 = LLHRL
5691 { 1538, 2, 1, 4, 67, 0, 0, SystemZImpOpBase + 0, 815, 0, 0x0ULL }, // Inst #1538 = LLHR
5692 { 1537, 4, 1, 6, 71, 0, 0, SystemZImpOpBase + 0, 757, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1537 = LLHH
5693 { 1536, 4, 1, 6, 70, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1536 = LLH
5694 { 1535, 2, 1, 4, 68, 0, 0, SystemZImpOpBase + 0, 563, 0, 0x0ULL }, // Inst #1535 = LLGTR
5695 { 1534, 4, 1, 6, 75, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1534 = LLGTAT
5696 { 1533, 4, 1, 6, 73, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1533 = LLGT
5697 { 1532, 2, 1, 6, 73, 0, 0, SystemZImpOpBase + 0, 716, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1532 = LLGHRL
5698 { 1531, 2, 1, 4, 68, 0, 0, SystemZImpOpBase + 0, 563, 0, 0x0ULL }, // Inst #1531 = LLGHR
5699 { 1530, 4, 1, 6, 73, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1530 = LLGH
5700 { 1529, 4, 1, 6, 295, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1529 = LLGFSG
5701 { 1528, 2, 1, 6, 73, 0, 0, SystemZImpOpBase + 0, 716, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1528 = LLGFRL
5702 { 1527, 2, 1, 4, 68, 0, 0, SystemZImpOpBase + 0, 714, 0, 0x0ULL }, // Inst #1527 = LLGFR
5703 { 1526, 4, 1, 6, 75, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1526 = LLGFAT
5704 { 1525, 4, 1, 6, 73, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1525 = LLGF
5705 { 1524, 2, 1, 4, 68, 0, 0, SystemZImpOpBase + 0, 563, 0, 0x0ULL }, // Inst #1524 = LLGCR
5706 { 1523, 4, 1, 6, 73, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1523 = LLGC
5707 { 1522, 2, 1, 4, 66, 0, 0, SystemZImpOpBase + 0, 815, 0, 0x0ULL }, // Inst #1522 = LLCR
5708 { 1521, 4, 1, 6, 71, 0, 0, SystemZImpOpBase + 0, 757, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1521 = LLCH
5709 { 1520, 4, 1, 6, 69, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1520 = LLC
5710 { 1519, 4, 1, 6, 62, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1519 = LHY
5711 { 1518, 2, 1, 6, 63, 0, 0, SystemZImpOpBase + 0, 765, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1518 = LHRL
5712 { 1517, 2, 1, 4, 57, 0, 0, SystemZImpOpBase + 0, 815, 0, 0x0ULL }, // Inst #1517 = LHR
5713 { 1516, 2, 1, 4, 40, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1516 = LHI
5714 { 1515, 4, 1, 6, 63, 0, 0, SystemZImpOpBase + 0, 757, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1515 = LHH
5715 { 1514, 4, 1, 4, 62, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayLoad), 0x48ULL }, // Inst #1514 = LH
5716 { 1513, 4, 0, 6, 296, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xcULL }, // Inst #1513 = LGSC
5717 { 1512, 2, 1, 6, 35, 0, 0, SystemZImpOpBase + 0, 716, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1512 = LGRL
5718 { 1511, 2, 1, 4, 57, 0, 0, SystemZImpOpBase + 0, 563, 0, 0x0ULL }, // Inst #1511 = LGR
5719 { 1510, 2, 1, 6, 65, 0, 0, SystemZImpOpBase + 0, 716, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1510 = LGHRL
5720 { 1509, 2, 1, 4, 58, 0, 0, SystemZImpOpBase + 0, 563, 0, 0x0ULL }, // Inst #1509 = LGHR
5721 { 1508, 2, 1, 4, 39, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1508 = LGHI
5722 { 1507, 4, 1, 6, 64, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #1507 = LGH
5723 { 1506, 4, 1, 6, 294, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10cULL }, // Inst #1506 = LGG
5724 { 1505, 2, 1, 6, 65, 0, 0, SystemZImpOpBase + 0, 716, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1505 = LGFRL
5725 { 1504, 2, 1, 4, 58, 0, 0, SystemZImpOpBase + 0, 714, 0, 0x0ULL }, // Inst #1504 = LGFR
5726 { 1503, 2, 1, 6, 39, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1503 = LGFI
5727 { 1502, 4, 1, 6, 64, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1502 = LGF
5728 { 1501, 2, 1, 4, 346, 0, 0, SystemZImpOpBase + 0, 886, 0|(1ULL<<MCID::Bitcast), 0x0ULL }, // Inst #1501 = LGDR
5729 { 1500, 2, 1, 4, 58, 0, 0, SystemZImpOpBase + 0, 563, 0, 0x0ULL }, // Inst #1500 = LGBR
5730 { 1499, 4, 1, 6, 64, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1499 = LGB
5731 { 1498, 4, 1, 6, 43, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10cULL }, // Inst #1498 = LGAT
5732 { 1497, 4, 1, 6, 35, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x10dULL }, // Inst #1497 = LG
5733 { 1496, 2, 0, 4, 410, 0, 1, SystemZImpOpBase + 12, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1496 = LFPC
5734 { 1495, 4, 1, 6, 43, 0, 0, SystemZImpOpBase + 0, 757, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1495 = LFHAT
5735 { 1494, 4, 1, 6, 33, 0, 0, SystemZImpOpBase + 0, 757, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL }, // Inst #1494 = LFH
5736 { 1493, 2, 0, 4, 412, 0, 1, SystemZImpOpBase + 12, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x80ULL }, // Inst #1493 = LFAS
5737 { 1492, 4, 1, 6, 351, 0, 0, SystemZImpOpBase + 0, 655, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL }, // Inst #1492 = LEY
5738 { 1491, 2, 1, 4, 417, 0, 0, SystemZImpOpBase + 0, 1134, 0, 0x0ULL }, // Inst #1491 = LEXR
5739 { 1490, 4, 1, 4, 357, 1, 0, SystemZImpOpBase + 12, 963, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1490 = LEXBRA
5740 { 1489, 2, 1, 4, 357, 1, 0, SystemZImpOpBase + 12, 673, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1489 = LEXBR
5741 { 1488, 2, 1, 2, 344, 0, 0, SystemZImpOpBase + 0, 659, 0, 0x0ULL }, // Inst #1488 = LER
5742 { 1487, 4, 1, 4, 469, 1, 0, SystemZImpOpBase + 12, 1130, 0, 0x0ULL }, // Inst #1487 = LEDTR
5743 { 1486, 2, 1, 2, 416, 0, 0, SystemZImpOpBase + 0, 1128, 0, 0x0ULL }, // Inst #1486 = LEDR
5744 { 1485, 4, 1, 4, 356, 1, 0, SystemZImpOpBase + 12, 1130, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1485 = LEDBRA
5745 { 1484, 2, 1, 4, 356, 1, 0, SystemZImpOpBase + 12, 1128, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1484 = LEDBR
5746 { 1483, 4, 1, 4, 351, 0, 0, SystemZImpOpBase + 0, 655, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x89ULL }, // Inst #1483 = LE
5747 { 1482, 4, 1, 6, 352, 0, 0, SystemZImpOpBase + 0, 627, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x10dULL }, // Inst #1482 = LDY
5748 { 1481, 4, 1, 4, 470, 1, 0, SystemZImpOpBase + 12, 963, 0, 0x0ULL }, // Inst #1481 = LDXTR
5749 { 1480, 2, 1, 2, 418, 0, 0, SystemZImpOpBase + 0, 1126, 0, 0x0ULL }, // Inst #1480 = LDXR
5750 { 1479, 4, 1, 4, 357, 1, 0, SystemZImpOpBase + 12, 963, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1479 = LDXBRA
5751 { 1478, 2, 1, 4, 357, 1, 0, SystemZImpOpBase + 12, 673, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1478 = LDXBR
5752 { 1477, 2, 1, 2, 345, 0, 0, SystemZImpOpBase + 0, 659, 0, 0x0ULL }, // Inst #1477 = LDR32
5753 { 1476, 2, 1, 2, 345, 0, 0, SystemZImpOpBase + 0, 631, 0, 0x0ULL }, // Inst #1476 = LDR
5754 { 1475, 2, 1, 4, 345, 0, 0, SystemZImpOpBase + 0, 639, 0|(1ULL<<MCID::Bitcast), 0x0ULL }, // Inst #1475 = LDGR
5755 { 1474, 3, 1, 4, 471, 1, 0, SystemZImpOpBase + 12, 1123, 0, 0x0ULL }, // Inst #1474 = LDETR
5756 { 1473, 2, 1, 4, 420, 0, 0, SystemZImpOpBase + 0, 1121, 0, 0x0ULL }, // Inst #1473 = LDER
5757 { 1472, 2, 1, 4, 359, 1, 0, SystemZImpOpBase + 12, 1121, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1472 = LDEBR
5758 { 1471, 4, 1, 6, 358, 1, 0, SystemZImpOpBase + 12, 627, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1471 = LDEB
5759 { 1470, 4, 1, 6, 352, 0, 0, SystemZImpOpBase + 0, 655, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x89ULL }, // Inst #1470 = LDE32
5760 { 1469, 4, 1, 6, 419, 0, 0, SystemZImpOpBase + 0, 627, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1469 = LDE
5761 { 1468, 4, 1, 4, 352, 0, 0, SystemZImpOpBase + 0, 627, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x109ULL }, // Inst #1468 = LD
5762 { 1467, 2, 1, 4, 430, 0, 1, SystemZImpOpBase + 0, 673, 0, 0x0ULL }, // Inst #1467 = LCXR
5763 { 1466, 2, 1, 4, 374, 0, 1, SystemZImpOpBase + 0, 673, 0, 0x3fc00ULL }, // Inst #1466 = LCXBR
5764 { 1465, 4, 2, 6, 781, 0, 0, SystemZImpOpBase + 0, 1117, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1465 = LCTLG
5765 { 1464, 4, 2, 4, 781, 0, 0, SystemZImpOpBase + 0, 1117, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1464 = LCTL
5766 { 1463, 2, 1, 2, 91, 0, 1, SystemZImpOpBase + 0, 815, 0, 0x23c00ULL }, // Inst #1463 = LCR
5767 { 1462, 2, 1, 4, 91, 0, 1, SystemZImpOpBase + 0, 563, 0, 0x23c00ULL }, // Inst #1462 = LCGR
5768 { 1461, 2, 1, 4, 92, 0, 1, SystemZImpOpBase + 0, 714, 0, 0x3b800ULL }, // Inst #1461 = LCGFR
5769 { 1460, 2, 1, 2, 429, 0, 1, SystemZImpOpBase + 0, 659, 0, 0x0ULL }, // Inst #1460 = LCER
5770 { 1459, 2, 1, 4, 372, 0, 1, SystemZImpOpBase + 0, 659, 0, 0x3fc00ULL }, // Inst #1459 = LCEBR
5771 { 1458, 2, 1, 2, 429, 0, 1, SystemZImpOpBase + 0, 631, 0, 0x0ULL }, // Inst #1458 = LCDR
5772 { 1457, 2, 1, 4, 373, 0, 0, SystemZImpOpBase + 0, 659, 0, 0x0ULL }, // Inst #1457 = LCDFR_32
5773 { 1456, 2, 1, 4, 373, 0, 0, SystemZImpOpBase + 0, 631, 0, 0x0ULL }, // Inst #1456 = LCDFR
5774 { 1455, 2, 1, 4, 372, 0, 1, SystemZImpOpBase + 0, 631, 0, 0x3fc00ULL }, // Inst #1455 = LCDBR
5775 { 1454, 2, 0, 4, 851, 0, 1, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1454 = LCCTL
5776 { 1453, 5, 1, 6, 34, 0, 1, SystemZImpOpBase + 0, 1112, 0, 0x8ULL }, // Inst #1453 = LCBB
5777 { 1452, 2, 1, 4, 57, 0, 0, SystemZImpOpBase + 0, 815, 0, 0x0ULL }, // Inst #1452 = LBR
5778 { 1451, 4, 1, 6, 61, 0, 0, SystemZImpOpBase + 0, 757, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1451 = LBH
5779 { 1450, 2, 0, 4, 787, 0, 0, SystemZImpOpBase + 0, 675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100ULL }, // Inst #1450 = LBEAR
5780 { 1449, 4, 1, 6, 61, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1449 = LB
5781 { 1448, 4, 1, 6, 86, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0xcULL }, // Inst #1448 = LAY
5782 { 1447, 4, 1, 6, 273, 0, 1, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1447 = LAXG
5783 { 1446, 4, 1, 6, 273, 0, 1, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1446 = LAX
5784 { 1445, 4, 1, 6, 43, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1445 = LAT
5785 { 1444, 4, 0, 6, 814, 0, 1, SystemZImpOpBase + 0, 1108, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1444 = LASP
5786 { 1443, 2, 1, 6, 86, 0, 0, SystemZImpOpBase + 0, 716, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1443 = LARL
5787 { 1442, 4, 1, 6, 272, 0, 1, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1442 = LAOG
5788 { 1441, 4, 1, 6, 272, 0, 1, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1441 = LAO
5789 { 1440, 4, 1, 6, 271, 0, 1, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1440 = LANG
5790 { 1439, 4, 1, 6, 271, 0, 1, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1439 = LAN
5791 { 1438, 4, 2, 6, 314, 0, 0, SystemZImpOpBase + 0, 1104, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1438 = LAMY
5792 { 1437, 4, 2, 4, 314, 0, 0, SystemZImpOpBase + 0, 1104, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1437 = LAM
5793 { 1436, 4, 1, 6, 313, 0, 0, SystemZImpOpBase + 0, 161, 0, 0xcULL }, // Inst #1436 = LAEY
5794 { 1435, 4, 1, 4, 313, 0, 0, SystemZImpOpBase + 0, 161, 0, 0x8ULL }, // Inst #1435 = LAE
5795 { 1434, 4, 1, 6, 270, 0, 1, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1434 = LAALG
5796 { 1433, 4, 1, 6, 270, 0, 1, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1433 = LAAL
5797 { 1432, 4, 1, 6, 269, 0, 1, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1432 = LAAG
5798 { 1431, 4, 1, 6, 269, 0, 1, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1431 = LAA
5799 { 1430, 4, 1, 4, 86, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x8ULL }, // Inst #1430 = LA
5800 { 1429, 4, 1, 4, 33, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x89ULL }, // Inst #1429 = L
5801 { 1428, 2, 0, 4, 521, 1, 1, SystemZImpOpBase + 1, 673, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #1428 = KXTR
5802 { 1427, 2, 0, 4, 404, 1, 1, SystemZImpOpBase + 1, 673, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #1427 = KXBR
5803 { 1426, 4, 2, 4, 871, 2, 1, SystemZImpOpBase + 43, 794, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1426 = KMO
5804 { 1425, 4, 2, 4, 871, 2, 1, SystemZImpOpBase + 43, 794, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1425 = KMF
5805 { 1424, 6, 3, 4, 871, 2, 1, SystemZImpOpBase + 43, 1098, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1424 = KMCTR
5806 { 1423, 4, 2, 4, 871, 2, 1, SystemZImpOpBase + 43, 794, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1423 = KMC
5807 { 1422, 3, 1, 4, 864, 2, 1, SystemZImpOpBase + 43, 1095, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1422 = KMAC
5808 { 1421, 6, 3, 4, 291, 2, 1, SystemZImpOpBase + 43, 1098, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1421 = KMA
5809 { 1420, 4, 2, 4, 871, 2, 1, SystemZImpOpBase + 43, 794, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1420 = KM
5810 { 1419, 3, 1, 4, 864, 2, 1, SystemZImpOpBase + 43, 1095, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1419 = KLMD
5811 { 1418, 3, 1, 4, 864, 2, 1, SystemZImpOpBase + 43, 1095, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1418 = KIMD
5812 { 1417, 2, 0, 4, 403, 1, 1, SystemZImpOpBase + 1, 659, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #1417 = KEBR
5813 { 1416, 4, 0, 6, 402, 1, 1, SystemZImpOpBase + 1, 655, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3c88ULL }, // Inst #1416 = KEB
5814 { 1415, 2, 0, 4, 520, 1, 1, SystemZImpOpBase + 1, 631, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #1415 = KDTR
5815 { 1414, 3, 1, 4, 292, 2, 1, SystemZImpOpBase + 43, 1095, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1414 = KDSA
5816 { 1413, 2, 0, 4, 403, 1, 1, SystemZImpOpBase + 1, 631, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #1413 = KDBR
5817 { 1412, 4, 0, 6, 402, 1, 1, SystemZImpOpBase + 1, 627, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3d08ULL }, // Inst #1412 = KDB
5818 { 1411, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1411 = JGAsmZ
5819 { 1410, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1410 = JGAsmP
5820 { 1409, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1409 = JGAsmO
5821 { 1408, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1408 = JGAsmNZ
5822 { 1407, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1407 = JGAsmNP
5823 { 1406, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1406 = JGAsmNO
5824 { 1405, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1405 = JGAsmNM
5825 { 1404, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1404 = JGAsmNLH
5826 { 1403, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1403 = JGAsmNLE
5827 { 1402, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1402 = JGAsmNL
5828 { 1401, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1401 = JGAsmNHE
5829 { 1400, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1400 = JGAsmNH
5830 { 1399, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1399 = JGAsmNE
5831 { 1398, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1398 = JGAsmM
5832 { 1397, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1397 = JGAsmLH
5833 { 1396, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1396 = JGAsmLE
5834 { 1395, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1395 = JGAsmL
5835 { 1394, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1394 = JGAsmHE
5836 { 1393, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1393 = JGAsmH
5837 { 1392, 1, 0, 6, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1392 = JGAsmE
5838 { 1391, 1, 0, 6, 3, 0, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1391 = JG
5839 { 1390, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1390 = JAsmZ
5840 { 1389, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1389 = JAsmP
5841 { 1388, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1388 = JAsmO
5842 { 1387, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1387 = JAsmNZ
5843 { 1386, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1386 = JAsmNP
5844 { 1385, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1385 = JAsmNO
5845 { 1384, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1384 = JAsmNM
5846 { 1383, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1383 = JAsmNLH
5847 { 1382, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1382 = JAsmNLE
5848 { 1381, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1381 = JAsmNL
5849 { 1380, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1380 = JAsmNHE
5850 { 1379, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1379 = JAsmNH
5851 { 1378, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1378 = JAsmNE
5852 { 1377, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1377 = JAsmM
5853 { 1376, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1376 = JAsmLH
5854 { 1375, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1375 = JAsmLE
5855 { 1374, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1374 = JAsmL
5856 { 1373, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1373 = JAsmHE
5857 { 1372, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1372 = JAsmH
5858 { 1371, 1, 0, 4, 3, 1, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1371 = JAsmE
5859 { 1370, 1, 0, 4, 3, 0, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1370 = J
5860 { 1369, 5, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 1090, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1369 = InsnVSI
5861 { 1368, 6, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 1084, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1368 = InsnVRX
5862 { 1367, 6, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 1078, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1367 = InsnVRV
5863 { 1366, 6, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 1072, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1366 = InsnVRS
5864 { 1365, 7, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 1065, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1365 = InsnVRR
5865 { 1364, 6, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 1059, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1364 = InsnVRI
5866 { 1363, 6, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 1053, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1363 = InsnSSF
5867 { 1362, 5, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 1048, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1362 = InsnSSE
5868 { 1361, 7, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 1041, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1361 = InsnSS
5869 { 1360, 4, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 1037, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1360 = InsnSIY
5870 { 1359, 4, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 1037, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1359 = InsnSIL
5871 { 1358, 4, 0, 4, 341, 0, 0, SystemZImpOpBase + 0, 1037, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1358 = InsnSI
5872 { 1357, 3, 0, 4, 341, 0, 0, SystemZImpOpBase + 0, 1034, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1357 = InsnS
5873 { 1356, 5, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 1023, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xcULL }, // Inst #1356 = InsnRXY
5874 { 1355, 6, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 1028, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1355 = InsnRXF
5875 { 1354, 5, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 1023, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1354 = InsnRXE
5876 { 1353, 5, 0, 4, 341, 0, 0, SystemZImpOpBase + 0, 1023, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1353 = InsnRX
5877 { 1352, 5, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 1018, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1352 = InsnRSY
5878 { 1351, 4, 0, 4, 341, 0, 0, SystemZImpOpBase + 0, 991, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1351 = InsnRSI
5879 { 1350, 5, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 1018, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1350 = InsnRSE
5880 { 1349, 5, 0, 4, 341, 0, 0, SystemZImpOpBase + 0, 1018, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1349 = InsnRS
5881 { 1348, 6, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 1012, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1348 = InsnRRS
5882 { 1347, 5, 0, 4, 341, 0, 0, SystemZImpOpBase + 0, 1007, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1347 = InsnRRF
5883 { 1346, 3, 0, 4, 341, 0, 0, SystemZImpOpBase + 0, 1004, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1346 = InsnRRE
5884 { 1345, 3, 0, 2, 341, 0, 0, SystemZImpOpBase + 0, 1004, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1345 = InsnRR
5885 { 1344, 6, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 998, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1344 = InsnRIS
5886 { 1343, 3, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 988, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1343 = InsnRILU
5887 { 1342, 3, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 995, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1342 = InsnRIL
5888 { 1341, 4, 0, 6, 341, 0, 0, SystemZImpOpBase + 0, 991, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1341 = InsnRIE
5889 { 1340, 3, 0, 4, 341, 0, 0, SystemZImpOpBase + 0, 988, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1340 = InsnRI
5890 { 1339, 1, 0, 2, 341, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1339 = InsnE
5891 { 1338, 3, 1, 4, 790, 0, 0, SystemZImpOpBase + 0, 581, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1338 = IVSK
5892 { 1337, 3, 1, 4, 789, 0, 0, SystemZImpOpBase + 0, 581, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1337 = ISKE
5893 { 1336, 2, 1, 4, 793, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1336 = IRBM
5894 { 1335, 2, 0, 4, 798, 0, 0, SystemZImpOpBase + 0, 714, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1335 = IPTEOptOpt
5895 { 1334, 3, 0, 4, 798, 0, 0, SystemZImpOpBase + 0, 985, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1334 = IPTEOpt
5896 { 1333, 4, 0, 4, 798, 0, 0, SystemZImpOpBase + 0, 981, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1333 = IPTE
5897 { 1332, 1, 1, 4, 316, 1, 0, SystemZImpOpBase + 0, 935, 0, 0x0ULL }, // Inst #1332 = IPM
5898 { 1331, 0, 0, 4, 775, 1, 1, SystemZImpOpBase + 51, 1, 0, 0x0ULL }, // Inst #1331 = IPK
5899 { 1330, 3, 1, 4, 102, 0, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1330 = IILL
5900 { 1329, 3, 1, 4, 101, 0, 0, SystemZImpOpBase + 0, 515, 0, 0x0ULL }, // Inst #1329 = IILH
5901 { 1328, 2, 1, 6, 100, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1328 = IILF
5902 { 1327, 3, 1, 4, 99, 0, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1327 = IIHL
5903 { 1326, 3, 1, 4, 98, 0, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #1326 = IIHH
5904 { 1325, 2, 1, 6, 97, 0, 0, SystemZImpOpBase + 0, 776, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #1325 = IIHF
5905 { 1324, 3, 1, 4, 519, 0, 0, SystemZImpOpBase + 0, 553, 0, 0x0ULL }, // Inst #1324 = IEXTR
5906 { 1323, 3, 1, 4, 518, 0, 0, SystemZImpOpBase + 0, 500, 0, 0x0ULL }, // Inst #1323 = IEDTR
5907 { 1322, 3, 0, 4, 799, 0, 0, SystemZImpOpBase + 0, 382, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1322 = IDTEOpt
5908 { 1321, 4, 0, 4, 799, 0, 0, SystemZImpOpBase + 0, 977, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1321 = IDTE
5909 { 1320, 5, 1, 6, 93, 0, 0, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1320 = ICY
5910 { 1319, 5, 1, 6, 95, 0, 1, SystemZImpOpBase + 0, 967, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1319 = ICMY
5911 { 1318, 5, 1, 6, 95, 0, 1, SystemZImpOpBase + 0, 972, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1318 = ICMH
5912 { 1317, 5, 1, 4, 95, 0, 1, SystemZImpOpBase + 0, 967, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1317 = ICM
5913 { 1316, 5, 1, 6, 94, 0, 0, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #1316 = IC32Y
5914 { 1315, 5, 1, 4, 94, 0, 0, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x28ULL }, // Inst #1315 = IC32
5915 { 1314, 5, 1, 4, 93, 0, 0, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x28ULL }, // Inst #1314 = IC
5916 { 1313, 1, 1, 4, 779, 0, 0, SystemZImpOpBase + 0, 935, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1313 = IAC
5917 { 1312, 0, 0, 4, 855, 1, 1, SystemZImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1312 = HSCH
5918 { 1311, 2, 1, 2, 431, 0, 0, SystemZImpOpBase + 0, 659, 0, 0x0ULL }, // Inst #1311 = HER
5919 { 1310, 2, 1, 2, 431, 0, 0, SystemZImpOpBase + 0, 631, 0, 0x0ULL }, // Inst #1310 = HDR
5920 { 1309, 2, 1, 4, 329, 0, 1, SystemZImpOpBase + 0, 170, 0, 0x0ULL }, // Inst #1309 = FLOGR
5921 { 1308, 4, 1, 4, 499, 1, 0, SystemZImpOpBase + 12, 963, 0, 0x0ULL }, // Inst #1308 = FIXTR
5922 { 1307, 2, 1, 4, 437, 0, 0, SystemZImpOpBase + 0, 673, 0, 0x0ULL }, // Inst #1307 = FIXR
5923 { 1306, 4, 1, 4, 380, 1, 0, SystemZImpOpBase + 12, 963, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1306 = FIXBRA
5924 { 1305, 3, 1, 4, 380, 1, 0, SystemZImpOpBase + 12, 960, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1305 = FIXBR
5925 { 1304, 2, 1, 4, 436, 0, 0, SystemZImpOpBase + 0, 659, 0, 0x0ULL }, // Inst #1304 = FIER
5926 { 1303, 4, 1, 4, 379, 1, 0, SystemZImpOpBase + 12, 956, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1303 = FIEBRA
5927 { 1302, 3, 1, 4, 379, 1, 0, SystemZImpOpBase + 12, 953, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1302 = FIEBR
5928 { 1301, 4, 1, 4, 498, 1, 0, SystemZImpOpBase + 12, 949, 0, 0x0ULL }, // Inst #1301 = FIDTR
5929 { 1300, 2, 1, 4, 436, 0, 0, SystemZImpOpBase + 0, 631, 0, 0x0ULL }, // Inst #1300 = FIDR
5930 { 1299, 4, 1, 4, 379, 1, 0, SystemZImpOpBase + 12, 949, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1299 = FIDBRA
5931 { 1298, 3, 1, 4, 379, 1, 0, SystemZImpOpBase + 12, 946, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1298 = FIDBR
5932 { 1297, 2, 0, 6, 340, 0, 0, SystemZImpOpBase + 0, 944, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1297 = EXRL
5933 { 1296, 4, 0, 4, 340, 0, 0, SystemZImpOpBase + 0, 940, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8ULL }, // Inst #1296 = EX
5934 { 1295, 1, 1, 4, 326, 0, 0, SystemZImpOpBase + 0, 935, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1295 = ETND
5935 { 1294, 2, 1, 4, 503, 0, 0, SystemZImpOpBase + 0, 673, 0, 0x0ULL }, // Inst #1294 = ESXTR
5936 { 1293, 2, 1, 4, 824, 0, 1, SystemZImpOpBase + 0, 938, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1293 = ESTA
5937 { 1292, 2, 1, 4, 785, 0, 0, SystemZImpOpBase + 0, 936, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1292 = ESEA
5938 { 1291, 2, 1, 4, 502, 0, 0, SystemZImpOpBase + 0, 631, 0, 0x0ULL }, // Inst #1291 = ESDTR
5939 { 1290, 1, 1, 4, 783, 0, 0, SystemZImpOpBase + 0, 935, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1290 = ESAR
5940 { 1289, 1, 1, 4, 783, 0, 0, SystemZImpOpBase + 0, 302, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1289 = ESAIR
5941 { 1288, 2, 0, 4, 823, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1288 = EREGG
5942 { 1287, 2, 0, 4, 823, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1287 = EREG
5943 { 1286, 2, 2, 4, 773, 1, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1286 = EPSW
5944 { 1285, 2, 1, 4, 850, 0, 1, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1285 = EPCTR
5945 { 1284, 1, 1, 4, 783, 0, 0, SystemZImpOpBase + 0, 935, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1284 = EPAR
5946 { 1283, 1, 1, 4, 783, 0, 0, SystemZImpOpBase + 0, 302, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1283 = EPAIR
5947 { 1282, 1, 1, 4, 407, 1, 0, SystemZImpOpBase + 12, 935, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1282 = EFPC
5948 { 1281, 2, 1, 4, 501, 0, 0, SystemZImpOpBase + 0, 673, 0, 0x0ULL }, // Inst #1281 = EEXTR
5949 { 1280, 2, 1, 4, 500, 0, 0, SystemZImpOpBase + 0, 631, 0, 0x0ULL }, // Inst #1280 = EEDTR
5950 { 1279, 5, 0, 6, 311, 0, 1, SystemZImpOpBase + 0, 789, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1279 = EDMK
5951 { 1278, 5, 0, 6, 311, 0, 1, SystemZImpOpBase + 0, 789, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1278 = ED
5952 { 1277, 5, 0, 6, 837, 0, 2, SystemZImpOpBase + 49, 873, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1277 = ECTG
5953 { 1276, 2, 1, 4, 849, 0, 1, SystemZImpOpBase + 0, 933, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1276 = ECPGA
5954 { 1275, 2, 1, 4, 850, 0, 1, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1275 = ECCTR
5955 { 1274, 4, 1, 6, 836, 0, 0, SystemZImpOpBase + 0, 929, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1274 = ECAG
5956 { 1273, 2, 1, 4, 312, 0, 0, SystemZImpOpBase + 0, 927, 0, 0x0ULL }, // Inst #1273 = EAR
5957 { 1272, 4, 1, 4, 511, 1, 0, SystemZImpOpBase + 12, 556, 0, 0x0ULL }, // Inst #1272 = DXTRA
5958 { 1271, 3, 1, 4, 511, 1, 0, SystemZImpOpBase + 12, 553, 0, 0x0ULL }, // Inst #1271 = DXTR
5959 { 1270, 3, 1, 4, 463, 0, 0, SystemZImpOpBase + 0, 550, 0, 0x0ULL }, // Inst #1270 = DXR
5960 { 1269, 3, 1, 4, 400, 1, 0, SystemZImpOpBase + 12, 550, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1269 = DXBR
5961 { 1268, 3, 1, 4, 203, 0, 0, SystemZImpOpBase + 0, 870, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1268 = DSGR
5962 { 1267, 3, 1, 4, 203, 0, 0, SystemZImpOpBase + 0, 924, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1267 = DSGFR
5963 { 1266, 5, 1, 6, 204, 0, 0, SystemZImpOpBase + 0, 904, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1266 = DSGF
5964 { 1265, 5, 1, 6, 204, 0, 0, SystemZImpOpBase + 0, 904, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10cULL }, // Inst #1265 = DSG
5965 { 1264, 3, 1, 2, 201, 0, 0, SystemZImpOpBase + 0, 924, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1264 = DR
5966 { 1263, 6, 0, 6, 307, 0, 0, SystemZImpOpBase + 0, 544, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1263 = DP
5967 { 1262, 3, 1, 4, 205, 0, 0, SystemZImpOpBase + 0, 924, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1262 = DLR
5968 { 1261, 3, 1, 4, 206, 0, 0, SystemZImpOpBase + 0, 870, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1261 = DLGR
5969 { 1260, 5, 1, 6, 207, 0, 0, SystemZImpOpBase + 0, 904, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10cULL }, // Inst #1260 = DLG
5970 { 1259, 5, 1, 6, 207, 0, 0, SystemZImpOpBase + 0, 904, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8cULL }, // Inst #1259 = DL
5971 { 1258, 5, 2, 4, 401, 1, 1, SystemZImpOpBase + 1, 919, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1258 = DIEBR
5972 { 1257, 5, 2, 4, 401, 1, 1, SystemZImpOpBase + 1, 914, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1257 = DIDBR
5973 { 1256, 4, 0, 4, 843, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1256 = DIAG
5974 { 1255, 5, 2, 4, 338, 2, 1, SystemZImpOpBase + 43, 909, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1255 = DFLTCC
5975 { 1254, 3, 1, 2, 461, 0, 0, SystemZImpOpBase + 0, 512, 0, 0x0ULL }, // Inst #1254 = DER
5976 { 1253, 3, 1, 4, 398, 1, 0, SystemZImpOpBase + 12, 512, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1253 = DEBR
5977 { 1252, 5, 1, 6, 396, 1, 0, SystemZImpOpBase + 12, 507, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #1252 = DEB
5978 { 1251, 5, 1, 4, 459, 0, 0, SystemZImpOpBase + 0, 507, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1251 = DE
5979 { 1250, 4, 1, 4, 510, 1, 0, SystemZImpOpBase + 12, 503, 0, 0x0ULL }, // Inst #1250 = DDTRA
5980 { 1249, 3, 1, 4, 510, 1, 0, SystemZImpOpBase + 12, 500, 0, 0x0ULL }, // Inst #1249 = DDTR
5981 { 1248, 3, 1, 2, 462, 0, 0, SystemZImpOpBase + 0, 497, 0, 0x0ULL }, // Inst #1248 = DDR
5982 { 1247, 3, 1, 4, 399, 1, 0, SystemZImpOpBase + 12, 497, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1247 = DDBR
5983 { 1246, 5, 1, 6, 397, 1, 0, SystemZImpOpBase + 12, 492, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #1246 = DDB
5984 { 1245, 5, 1, 4, 460, 0, 0, SystemZImpOpBase + 0, 492, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #1245 = DD
5985 { 1244, 5, 1, 4, 202, 0, 0, SystemZImpOpBase + 0, 904, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x88ULL }, // Inst #1244 = D
5986 { 1243, 5, 0, 6, 492, 0, 0, SystemZImpOpBase + 0, 853, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1243 = CZXT
5987 { 1242, 5, 0, 6, 491, 0, 0, SystemZImpOpBase + 0, 645, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1242 = CZDT
5988 { 1241, 4, 0, 6, 219, 0, 1, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL }, // Inst #1241 = CY
5989 { 1240, 5, 1, 6, 490, 0, 0, SystemZImpOpBase + 0, 853, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1240 = CXZT
5990 { 1239, 2, 1, 4, 486, 0, 0, SystemZImpOpBase + 0, 902, 0, 0x0ULL }, // Inst #1239 = CXUTR
5991 { 1238, 2, 0, 4, 521, 1, 1, SystemZImpOpBase + 1, 673, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #1238 = CXTR
5992 { 1237, 2, 1, 4, 486, 0, 0, SystemZImpOpBase + 0, 902, 0, 0x0ULL }, // Inst #1237 = CXSTR
5993 { 1236, 2, 0, 4, 466, 0, 1, SystemZImpOpBase + 0, 673, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #1236 = CXR
5994 { 1235, 5, 1, 6, 494, 0, 0, SystemZImpOpBase + 0, 853, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1235 = CXPT
5995 { 1234, 4, 1, 4, 480, 1, 0, SystemZImpOpBase + 12, 898, 0, 0x0ULL }, // Inst #1234 = CXLGTR
5996 { 1233, 4, 1, 4, 365, 1, 0, SystemZImpOpBase + 12, 898, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1233 = CXLGBR
5997 { 1232, 4, 1, 4, 479, 1, 0, SystemZImpOpBase + 12, 892, 0, 0x0ULL }, // Inst #1232 = CXLFTR
5998 { 1231, 4, 1, 4, 365, 1, 0, SystemZImpOpBase + 12, 892, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1231 = CXLFBR
5999 { 1230, 4, 1, 4, 476, 1, 0, SystemZImpOpBase + 12, 898, 0, 0x0ULL }, // Inst #1230 = CXGTRA
6000 { 1229, 2, 1, 4, 476, 1, 0, SystemZImpOpBase + 12, 896, 0, 0x0ULL }, // Inst #1229 = CXGTR
6001 { 1228, 2, 1, 4, 424, 0, 0, SystemZImpOpBase + 0, 896, 0, 0x0ULL }, // Inst #1228 = CXGR
6002 { 1227, 4, 1, 4, 363, 1, 0, SystemZImpOpBase + 12, 898, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1227 = CXGBRA
6003 { 1226, 2, 1, 4, 363, 1, 0, SystemZImpOpBase + 12, 896, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1226 = CXGBR
6004 { 1225, 4, 1, 4, 475, 1, 0, SystemZImpOpBase + 12, 892, 0, 0x0ULL }, // Inst #1225 = CXFTR
6005 { 1224, 2, 1, 4, 424, 0, 0, SystemZImpOpBase + 0, 890, 0, 0x0ULL }, // Inst #1224 = CXFR
6006 { 1223, 4, 1, 4, 363, 1, 0, SystemZImpOpBase + 12, 892, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1223 = CXFBRA
6007 { 1222, 2, 1, 4, 363, 1, 0, SystemZImpOpBase + 12, 890, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1222 = CXFBR
6008 { 1221, 2, 0, 4, 404, 1, 1, SystemZImpOpBase + 1, 673, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #1221 = CXBR
6009 { 1220, 4, 0, 6, 300, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayStore), 0x8cULL }, // Inst #1220 = CVDY
6010 { 1219, 4, 0, 6, 299, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::MayStore), 0x10cULL }, // Inst #1219 = CVDG
6011 { 1218, 4, 0, 4, 300, 0, 0, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::MayStore), 0x88ULL }, // Inst #1218 = CVD
6012 { 1217, 5, 1, 6, 298, 0, 0, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #1217 = CVBY
6013 { 1216, 5, 1, 6, 297, 0, 0, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #1216 = CVBG
6014 { 1215, 5, 1, 4, 298, 0, 0, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #1215 = CVB
6015 { 1214, 2, 1, 4, 488, 0, 0, SystemZImpOpBase + 0, 888, 0, 0x0ULL }, // Inst #1214 = CUXTR
6016 { 1213, 4, 2, 4, 290, 0, 1, SystemZImpOpBase + 0, 794, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1213 = CUUTFOpt
6017 { 1212, 5, 2, 4, 290, 0, 1, SystemZImpOpBase + 0, 881, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1212 = CUUTF
6018 { 1211, 4, 2, 4, 290, 0, 1, SystemZImpOpBase + 0, 794, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1211 = CUTFUOpt
6019 { 1210, 5, 2, 4, 290, 0, 1, SystemZImpOpBase + 0, 881, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1210 = CUTFU
6020 { 1209, 4, 2, 4, 332, 2, 1, SystemZImpOpBase + 46, 794, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1209 = CUSE
6021 { 1208, 2, 1, 4, 487, 0, 0, SystemZImpOpBase + 0, 886, 0, 0x0ULL }, // Inst #1208 = CUDTR
6022 { 1207, 4, 2, 4, 289, 0, 1, SystemZImpOpBase + 0, 794, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1207 = CU42
6023 { 1206, 4, 2, 4, 289, 0, 1, SystemZImpOpBase + 0, 794, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1206 = CU41
6024 { 1205, 4, 2, 4, 289, 0, 1, SystemZImpOpBase + 0, 794, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1205 = CU24Opt
6025 { 1204, 5, 2, 4, 289, 0, 1, SystemZImpOpBase + 0, 881, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1204 = CU24
6026 { 1203, 4, 2, 4, 289, 0, 1, SystemZImpOpBase + 0, 794, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1203 = CU21Opt
6027 { 1202, 5, 2, 4, 289, 0, 1, SystemZImpOpBase + 0, 881, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1202 = CU21
6028 { 1201, 4, 2, 4, 289, 0, 1, SystemZImpOpBase + 0, 794, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1201 = CU14Opt
6029 { 1200, 5, 2, 4, 289, 0, 1, SystemZImpOpBase + 0, 881, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1200 = CU14
6030 { 1199, 4, 2, 4, 289, 0, 1, SystemZImpOpBase + 0, 794, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1199 = CU12Opt
6031 { 1198, 5, 2, 4, 289, 0, 1, SystemZImpOpBase + 0, 881, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1198 = CU12
6032 { 1197, 5, 1, 6, 275, 0, 1, SystemZImpOpBase + 0, 613, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1197 = CSY
6033 { 1196, 3, 1, 4, 488, 0, 0, SystemZImpOpBase + 0, 878, 0, 0x0ULL }, // Inst #1196 = CSXTR
6034 { 1195, 5, 0, 6, 278, 2, 1, SystemZImpOpBase + 43, 873, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1195 = CSST
6035 { 1194, 3, 1, 4, 803, 0, 1, SystemZImpOpBase + 0, 870, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1194 = CSPG
6036 { 1193, 3, 1, 4, 803, 0, 1, SystemZImpOpBase + 0, 870, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1193 = CSP
6037 { 1192, 5, 1, 6, 275, 0, 1, SystemZImpOpBase + 0, 618, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #1192 = CSG
6038 { 1191, 3, 1, 4, 487, 0, 0, SystemZImpOpBase + 0, 867, 0, 0x0ULL }, // Inst #1191 = CSDTR
6039 { 1190, 0, 0, 4, 855, 1, 1, SystemZImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1190 = CSCH
6040 { 1189, 5, 1, 4, 275, 0, 1, SystemZImpOpBase + 0, 613, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1189 = CS
6041 { 1188, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1188 = CRTAsmNLH
6042 { 1187, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1187 = CRTAsmNLE
6043 { 1186, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1186 = CRTAsmNL
6044 { 1185, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1185 = CRTAsmNHE
6045 { 1184, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1184 = CRTAsmNH
6046 { 1183, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1183 = CRTAsmNE
6047 { 1182, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1182 = CRTAsmLH
6048 { 1181, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1181 = CRTAsmLE
6049 { 1180, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1180 = CRTAsmL
6050 { 1179, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1179 = CRTAsmHE
6051 { 1178, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1178 = CRTAsmH
6052 { 1177, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1177 = CRTAsmE
6053 { 1176, 3, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1176 = CRTAsm
6054 { 1175, 3, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1175 = CRT
6055 { 1174, 2, 0, 6, 220, 0, 1, SystemZImpOpBase + 0, 765, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #1174 = CRL
6056 { 1173, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1173 = CRJAsmNLH
6057 { 1172, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1172 = CRJAsmNLE
6058 { 1171, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1171 = CRJAsmNL
6059 { 1170, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1170 = CRJAsmNHE
6060 { 1169, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1169 = CRJAsmNH
6061 { 1168, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1168 = CRJAsmNE
6062 { 1167, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1167 = CRJAsmLH
6063 { 1166, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1166 = CRJAsmLE
6064 { 1165, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1165 = CRJAsmL
6065 { 1164, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1164 = CRJAsmHE
6066 { 1163, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1163 = CRJAsmH
6067 { 1162, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1162 = CRJAsmE
6068 { 1161, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 826, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1161 = CRJAsm
6069 { 1160, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 826, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1160 = CRJ
6070 { 1159, 3, 0, 4, 801, 0, 1, SystemZImpOpBase + 0, 864, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1159 = CRDTEOpt
6071 { 1158, 4, 0, 4, 801, 0, 1, SystemZImpOpBase + 0, 860, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1158 = CRDTE
6072 { 1157, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1157 = CRBAsmNLH
6073 { 1156, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1156 = CRBAsmNLE
6074 { 1155, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1155 = CRBAsmNL
6075 { 1154, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1154 = CRBAsmNHE
6076 { 1153, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1153 = CRBAsmNH
6077 { 1152, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1152 = CRBAsmNE
6078 { 1151, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1151 = CRBAsmLH
6079 { 1150, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1150 = CRBAsmLE
6080 { 1149, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1149 = CRBAsmL
6081 { 1148, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1148 = CRBAsmHE
6082 { 1147, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1147 = CRBAsmH
6083 { 1146, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1146 = CRBAsmE
6084 { 1145, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 817, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1145 = CRBAsm
6085 { 1144, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 817, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1144 = CRB
6086 { 1143, 2, 0, 2, 224, 0, 1, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #1143 = CR
6087 { 1142, 2, 1, 4, 312, 0, 0, SystemZImpOpBase + 0, 858, 0, 0x0ULL }, // Inst #1142 = CPYA
6088 { 1141, 5, 0, 6, 496, 0, 0, SystemZImpOpBase + 0, 853, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1141 = CPXT
6089 { 1140, 3, 1, 4, 350, 0, 0, SystemZImpOpBase + 0, 850, 0, 0x0ULL }, // Inst #1140 = CPSDRss
6090 { 1139, 3, 1, 4, 350, 0, 0, SystemZImpOpBase + 0, 847, 0, 0x0ULL }, // Inst #1139 = CPSDRsd
6091 { 1138, 3, 1, 4, 350, 0, 0, SystemZImpOpBase + 0, 844, 0, 0x0ULL }, // Inst #1138 = CPSDRds
6092 { 1137, 3, 1, 4, 350, 0, 0, SystemZImpOpBase + 0, 500, 0, 0x0ULL }, // Inst #1137 = CPSDRdd
6093 { 1136, 5, 0, 6, 495, 0, 0, SystemZImpOpBase + 0, 645, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1136 = CPDT
6094 { 1135, 6, 0, 6, 309, 0, 1, SystemZImpOpBase + 0, 544, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1135 = CP
6095 { 1134, 4, 2, 4, 336, 2, 2, SystemZImpOpBase + 37, 794, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #1134 = CMPSC
6096 { 1133, 4, 0, 6, 228, 0, 1, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10388cULL }, // Inst #1133 = CLY
6097 { 1132, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1132 = CLTAsmNLH
6098 { 1131, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1131 = CLTAsmNLE
6099 { 1130, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1130 = CLTAsmNL
6100 { 1129, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1129 = CLTAsmNHE
6101 { 1128, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1128 = CLTAsmNH
6102 { 1127, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1127 = CLTAsmNE
6103 { 1126, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1126 = CLTAsmLH
6104 { 1125, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1125 = CLTAsmLE
6105 { 1124, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1124 = CLTAsmL
6106 { 1123, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1123 = CLTAsmHE
6107 { 1122, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1122 = CLTAsmH
6108 { 1121, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 841, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1121 = CLTAsmE
6109 { 1120, 4, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 837, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1120 = CLTAsm
6110 { 1119, 4, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 837, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1119 = CLT
6111 { 1118, 4, 2, 4, 256, 1, 1, SystemZImpOpBase + 35, 833, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1118 = CLST
6112 { 1117, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1117 = CLRTAsmNLH
6113 { 1116, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1116 = CLRTAsmNLE
6114 { 1115, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1115 = CLRTAsmNL
6115 { 1114, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1114 = CLRTAsmNHE
6116 { 1113, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1113 = CLRTAsmNH
6117 { 1112, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1112 = CLRTAsmNE
6118 { 1111, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1111 = CLRTAsmLH
6119 { 1110, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1110 = CLRTAsmLE
6120 { 1109, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1109 = CLRTAsmL
6121 { 1108, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1108 = CLRTAsmHE
6122 { 1107, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1107 = CLRTAsmH
6123 { 1106, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1106 = CLRTAsmE
6124 { 1105, 3, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1105 = CLRTAsm
6125 { 1104, 3, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 251, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1104 = CLRT
6126 { 1103, 2, 0, 6, 243, 0, 1, SystemZImpOpBase + 0, 765, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #1103 = CLRL
6127 { 1102, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1102 = CLRJAsmNLH
6128 { 1101, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1101 = CLRJAsmNLE
6129 { 1100, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1100 = CLRJAsmNL
6130 { 1099, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1099 = CLRJAsmNHE
6131 { 1098, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1098 = CLRJAsmNH
6132 { 1097, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1097 = CLRJAsmNE
6133 { 1096, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1096 = CLRJAsmLH
6134 { 1095, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1095 = CLRJAsmLE
6135 { 1094, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1094 = CLRJAsmL
6136 { 1093, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1093 = CLRJAsmHE
6137 { 1092, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1092 = CLRJAsmH
6138 { 1091, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 830, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1091 = CLRJAsmE
6139 { 1090, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 826, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1090 = CLRJAsm
6140 { 1089, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 826, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1089 = CLRJ
6141 { 1088, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1088 = CLRBAsmNLH
6142 { 1087, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1087 = CLRBAsmNLE
6143 { 1086, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1086 = CLRBAsmNL
6144 { 1085, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1085 = CLRBAsmNHE
6145 { 1084, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1084 = CLRBAsmNH
6146 { 1083, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1083 = CLRBAsmNE
6147 { 1082, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1082 = CLRBAsmLH
6148 { 1081, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1081 = CLRBAsmLE
6149 { 1080, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1080 = CLRBAsmL
6150 { 1079, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1079 = CLRBAsmHE
6151 { 1078, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1078 = CLRBAsmH
6152 { 1077, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 822, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1077 = CLRBAsmE
6153 { 1076, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 817, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1076 = CLRBAsm
6154 { 1075, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 817, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1075 = CLRB
6155 { 1074, 2, 0, 2, 242, 0, 1, SystemZImpOpBase + 0, 815, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #1074 = CLR
6156 { 1073, 4, 0, 6, 263, 0, 1, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1073 = CLMY
6157 { 1072, 4, 0, 6, 263, 0, 1, SystemZImpOpBase + 0, 811, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #1072 = CLMH
6158 { 1071, 4, 0, 4, 263, 0, 1, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #1071 = CLM
6159 { 1070, 3, 0, 6, 241, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103804ULL }, // Inst #1070 = CLIY
6160 { 1069, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1069 = CLIJAsmNLH
6161 { 1068, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1068 = CLIJAsmNLE
6162 { 1067, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1067 = CLIJAsmNL
6163 { 1066, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1066 = CLIJAsmNHE
6164 { 1065, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1065 = CLIJAsmNH
6165 { 1064, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1064 = CLIJAsmNE
6166 { 1063, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1063 = CLIJAsmLH
6167 { 1062, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1062 = CLIJAsmLE
6168 { 1061, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1061 = CLIJAsmL
6169 { 1060, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1060 = CLIJAsmHE
6170 { 1059, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1059 = CLIJAsmH
6171 { 1058, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1058 = CLIJAsmE
6172 { 1057, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 778, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1057 = CLIJAsm
6173 { 1056, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 778, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1056 = CLIJ
6174 { 1055, 2, 0, 6, 240, 0, 1, SystemZImpOpBase + 0, 776, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #1055 = CLIH
6175 { 1054, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1054 = CLIBAsmNLH
6176 { 1053, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1053 = CLIBAsmNLE
6177 { 1052, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1052 = CLIBAsmNL
6178 { 1051, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1051 = CLIBAsmNHE
6179 { 1050, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1050 = CLIBAsmNH
6180 { 1049, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1049 = CLIBAsmNE
6181 { 1048, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1048 = CLIBAsmLH
6182 { 1047, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1047 = CLIBAsmLE
6183 { 1046, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1046 = CLIBAsmL
6184 { 1045, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1045 = CLIBAsmHE
6185 { 1044, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1044 = CLIBAsmH
6186 { 1043, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1043 = CLIBAsmE
6187 { 1042, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 767, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1042 = CLIBAsm
6188 { 1041, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 767, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1041 = CLIB
6189 { 1040, 3, 0, 4, 241, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #1040 = CLI
6190 { 1039, 2, 0, 6, 239, 0, 1, SystemZImpOpBase + 0, 765, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #1039 = CLHRL
6191 { 1038, 2, 0, 4, 245, 0, 1, SystemZImpOpBase + 0, 763, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #1038 = CLHLR
6192 { 1037, 3, 0, 6, 239, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #1037 = CLHHSI
6193 { 1036, 2, 0, 4, 244, 0, 1, SystemZImpOpBase + 0, 761, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #1036 = CLHHR
6194 { 1035, 4, 0, 6, 238, 0, 1, SystemZImpOpBase + 0, 757, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10388cULL }, // Inst #1035 = CLHF
6195 { 1034, 4, 1, 4, 484, 1, 1, SystemZImpOpBase + 1, 753, 0, 0x0ULL }, // Inst #1034 = CLGXTR
6196 { 1033, 4, 1, 4, 371, 1, 1, SystemZImpOpBase + 1, 753, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #1033 = CLGXBR
6197 { 1032, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1032 = CLGTAsmNLH
6198 { 1031, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1031 = CLGTAsmNLE
6199 { 1030, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1030 = CLGTAsmNL
6200 { 1029, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1029 = CLGTAsmNHE
6201 { 1028, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1028 = CLGTAsmNH
6202 { 1027, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1027 = CLGTAsmNE
6203 { 1026, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1026 = CLGTAsmLH
6204 { 1025, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1025 = CLGTAsmLE
6205 { 1024, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1024 = CLGTAsmL
6206 { 1023, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1023 = CLGTAsmHE
6207 { 1022, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1022 = CLGTAsmH
6208 { 1021, 3, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 808, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1021 = CLGTAsmE
6209 { 1020, 4, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 804, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1020 = CLGTAsm
6210 { 1019, 4, 0, 6, 17, 0, 0, SystemZImpOpBase + 0, 804, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4ULL }, // Inst #1019 = CLGT
6211 { 1018, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1018 = CLGRTAsmNLH
6212 { 1017, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1017 = CLGRTAsmNLE
6213 { 1016, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1016 = CLGRTAsmNL
6214 { 1015, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1015 = CLGRTAsmNHE
6215 { 1014, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1014 = CLGRTAsmNH
6216 { 1013, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1013 = CLGRTAsmNE
6217 { 1012, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1012 = CLGRTAsmLH
6218 { 1011, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1011 = CLGRTAsmLE
6219 { 1010, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1010 = CLGRTAsmL
6220 { 1009, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1009 = CLGRTAsmHE
6221 { 1008, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1008 = CLGRTAsmH
6222 { 1007, 2, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1007 = CLGRTAsmE
6223 { 1006, 3, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 223, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1006 = CLGRTAsm
6224 { 1005, 3, 0, 4, 15, 0, 0, SystemZImpOpBase + 0, 223, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1005 = CLGRT
6225 { 1004, 2, 0, 6, 237, 0, 1, SystemZImpOpBase + 0, 716, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #1004 = CLGRL
6226 { 1003, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1003 = CLGRJAsmNLH
6227 { 1002, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1002 = CLGRJAsmNLE
6228 { 1001, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1001 = CLGRJAsmNL
6229 { 1000, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #1000 = CLGRJAsmNHE
6230 { 999, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #999 = CLGRJAsmNH
6231 { 998, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #998 = CLGRJAsmNE
6232 { 997, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #997 = CLGRJAsmLH
6233 { 996, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #996 = CLGRJAsmLE
6234 { 995, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #995 = CLGRJAsmL
6235 { 994, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #994 = CLGRJAsmHE
6236 { 993, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #993 = CLGRJAsmH
6237 { 992, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #992 = CLGRJAsmE
6238 { 991, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 743, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #991 = CLGRJAsm
6239 { 990, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 743, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #990 = CLGRJ
6240 { 989, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #989 = CLGRBAsmNLH
6241 { 988, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #988 = CLGRBAsmNLE
6242 { 987, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #987 = CLGRBAsmNL
6243 { 986, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #986 = CLGRBAsmNHE
6244 { 985, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #985 = CLGRBAsmNH
6245 { 984, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #984 = CLGRBAsmNE
6246 { 983, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #983 = CLGRBAsmLH
6247 { 982, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #982 = CLGRBAsmLE
6248 { 981, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #981 = CLGRBAsmL
6249 { 980, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #980 = CLGRBAsmHE
6250 { 979, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #979 = CLGRBAsmH
6251 { 978, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #978 = CLGRBAsmE
6252 { 977, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 734, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #977 = CLGRBAsm
6253 { 976, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 734, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #976 = CLGRB
6254 { 975, 2, 0, 4, 236, 0, 1, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #975 = CLGR
6255 { 974, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #974 = CLGITAsmNLH
6256 { 973, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #973 = CLGITAsmNLE
6257 { 972, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #972 = CLGITAsmNL
6258 { 971, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #971 = CLGITAsmNHE
6259 { 970, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #970 = CLGITAsmNH
6260 { 969, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #969 = CLGITAsmNE
6261 { 968, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #968 = CLGITAsmLH
6262 { 967, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #967 = CLGITAsmLE
6263 { 966, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #966 = CLGITAsmL
6264 { 965, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #965 = CLGITAsmHE
6265 { 964, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #964 = CLGITAsmH
6266 { 963, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #963 = CLGITAsmE
6267 { 962, 3, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 216, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #962 = CLGITAsm
6268 { 961, 3, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 216, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #961 = CLGIT
6269 { 960, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #960 = CLGIJAsmNLH
6270 { 959, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #959 = CLGIJAsmNLE
6271 { 958, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #958 = CLGIJAsmNL
6272 { 957, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #957 = CLGIJAsmNHE
6273 { 956, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #956 = CLGIJAsmNH
6274 { 955, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #955 = CLGIJAsmNE
6275 { 954, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #954 = CLGIJAsmLH
6276 { 953, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #953 = CLGIJAsmLE
6277 { 952, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #952 = CLGIJAsmL
6278 { 951, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #951 = CLGIJAsmHE
6279 { 950, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #950 = CLGIJAsmH
6280 { 949, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #949 = CLGIJAsmE
6281 { 948, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #948 = CLGIJAsm
6282 { 947, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #947 = CLGIJ
6283 { 946, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #946 = CLGIBAsmNLH
6284 { 945, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #945 = CLGIBAsmNLE
6285 { 944, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #944 = CLGIBAsmNL
6286 { 943, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #943 = CLGIBAsmNHE
6287 { 942, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #942 = CLGIBAsmNH
6288 { 941, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #941 = CLGIBAsmNE
6289 { 940, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #940 = CLGIBAsmLH
6290 { 939, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #939 = CLGIBAsmLE
6291 { 938, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #938 = CLGIBAsmL
6292 { 937, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #937 = CLGIBAsmHE
6293 { 936, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #936 = CLGIBAsmH
6294 { 935, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #935 = CLGIBAsmE
6295 { 934, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 718, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #934 = CLGIBAsm
6296 { 933, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 718, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #933 = CLGIB
6297 { 932, 3, 0, 6, 232, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #932 = CLGHSI
6298 { 931, 2, 0, 6, 232, 0, 1, SystemZImpOpBase + 0, 716, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #931 = CLGHRL
6299 { 930, 2, 0, 6, 234, 0, 1, SystemZImpOpBase + 0, 716, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #930 = CLGFRL
6300 { 929, 2, 0, 4, 235, 0, 1, SystemZImpOpBase + 0, 714, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #929 = CLGFR
6301 { 928, 2, 0, 6, 235, 0, 1, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #928 = CLGFI
6302 { 927, 4, 0, 6, 233, 0, 1, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10388cULL }, // Inst #927 = CLGF
6303 { 926, 4, 1, 4, 370, 1, 1, SystemZImpOpBase + 1, 710, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #926 = CLGEBR
6304 { 925, 4, 1, 4, 483, 1, 1, SystemZImpOpBase + 1, 703, 0, 0x0ULL }, // Inst #925 = CLGDTR
6305 { 924, 4, 1, 4, 370, 1, 1, SystemZImpOpBase + 1, 703, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #924 = CLGDBR
6306 { 923, 4, 0, 6, 231, 0, 1, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10390cULL }, // Inst #923 = CLG
6307 { 922, 4, 1, 4, 484, 1, 1, SystemZImpOpBase + 1, 696, 0, 0x0ULL }, // Inst #922 = CLFXTR
6308 { 921, 4, 1, 4, 371, 1, 1, SystemZImpOpBase + 1, 696, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #921 = CLFXBR
6309 { 920, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #920 = CLFITAsmNLH
6310 { 919, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #919 = CLFITAsmNLE
6311 { 918, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #918 = CLFITAsmNL
6312 { 917, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #917 = CLFITAsmNHE
6313 { 916, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #916 = CLFITAsmNH
6314 { 915, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #915 = CLFITAsmNE
6315 { 914, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #914 = CLFITAsmLH
6316 { 913, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #913 = CLFITAsmLE
6317 { 912, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #912 = CLFITAsmL
6318 { 911, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #911 = CLFITAsmHE
6319 { 910, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #910 = CLFITAsmH
6320 { 909, 2, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #909 = CLFITAsmE
6321 { 908, 3, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 230, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #908 = CLFITAsm
6322 { 907, 3, 0, 6, 16, 0, 0, SystemZImpOpBase + 0, 230, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #907 = CLFIT
6323 { 906, 2, 0, 6, 230, 0, 1, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #906 = CLFI
6324 { 905, 3, 0, 6, 229, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103800ULL }, // Inst #905 = CLFHSI
6325 { 904, 4, 1, 4, 368, 1, 1, SystemZImpOpBase + 1, 687, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #904 = CLFEBR
6326 { 903, 4, 1, 4, 483, 1, 1, SystemZImpOpBase + 1, 680, 0, 0x0ULL }, // Inst #903 = CLFDTR
6327 { 902, 4, 1, 4, 369, 1, 1, SystemZImpOpBase + 1, 680, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #902 = CLFDBR
6328 { 901, 6, 2, 6, 255, 0, 1, SystemZImpOpBase + 0, 798, 0|(1ULL<<MCID::MayLoad), 0x4ULL }, // Inst #901 = CLCLU
6329 { 900, 6, 2, 4, 255, 0, 1, SystemZImpOpBase + 0, 798, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #900 = CLCLE
6330 { 899, 4, 2, 2, 255, 0, 1, SystemZImpOpBase + 0, 794, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #899 = CLCL
6331 { 898, 5, 0, 6, 254, 0, 1, SystemZImpOpBase + 0, 789, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #898 = CLC
6332 { 897, 4, 0, 4, 228, 0, 1, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x103888ULL }, // Inst #897 = CL
6333 { 896, 4, 2, 4, 335, 0, 1, SystemZImpOpBase + 0, 785, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #896 = CKSM
6334 { 895, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #895 = CITAsmNLH
6335 { 894, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #894 = CITAsmNLE
6336 { 893, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #893 = CITAsmNL
6337 { 892, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #892 = CITAsmNHE
6338 { 891, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #891 = CITAsmNH
6339 { 890, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #890 = CITAsmNE
6340 { 889, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #889 = CITAsmLH
6341 { 888, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #888 = CITAsmLE
6342 { 887, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #887 = CITAsmL
6343 { 886, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #886 = CITAsmHE
6344 { 885, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #885 = CITAsmH
6345 { 884, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #884 = CITAsmE
6346 { 883, 3, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 230, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #883 = CITAsm
6347 { 882, 3, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 230, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #882 = CIT
6348 { 881, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #881 = CIJAsmNLH
6349 { 880, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #880 = CIJAsmNLE
6350 { 879, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #879 = CIJAsmNL
6351 { 878, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #878 = CIJAsmNHE
6352 { 877, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #877 = CIJAsmNH
6353 { 876, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #876 = CIJAsmNE
6354 { 875, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #875 = CIJAsmLH
6355 { 874, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #874 = CIJAsmLE
6356 { 873, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #873 = CIJAsmL
6357 { 872, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #872 = CIJAsmHE
6358 { 871, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #871 = CIJAsmH
6359 { 870, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 782, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #870 = CIJAsmE
6360 { 869, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 778, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #869 = CIJAsm
6361 { 868, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 778, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #868 = CIJ
6362 { 867, 2, 0, 6, 225, 0, 1, SystemZImpOpBase + 0, 776, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #867 = CIH
6363 { 866, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #866 = CIBAsmNLH
6364 { 865, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #865 = CIBAsmNLE
6365 { 864, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #864 = CIBAsmNL
6366 { 863, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #863 = CIBAsmNHE
6367 { 862, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #862 = CIBAsmNH
6368 { 861, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #861 = CIBAsmNE
6369 { 860, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #860 = CIBAsmLH
6370 { 859, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #859 = CIBAsmLE
6371 { 858, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #858 = CIBAsmL
6372 { 857, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #857 = CIBAsmHE
6373 { 856, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #856 = CIBAsmH
6374 { 855, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 772, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #855 = CIBAsmE
6375 { 854, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 767, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #854 = CIBAsm
6376 { 853, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 767, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #853 = CIB
6377 { 852, 4, 0, 6, 246, 0, 1, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x384cULL }, // Inst #852 = CHY
6378 { 851, 3, 0, 6, 227, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #851 = CHSI
6379 { 850, 2, 0, 6, 247, 0, 1, SystemZImpOpBase + 0, 765, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #850 = CHRL
6380 { 849, 2, 0, 4, 245, 0, 1, SystemZImpOpBase + 0, 763, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #849 = CHLR
6381 { 848, 2, 0, 4, 221, 0, 1, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #848 = CHI
6382 { 847, 3, 0, 6, 250, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #847 = CHHSI
6383 { 846, 2, 0, 4, 244, 0, 1, SystemZImpOpBase + 0, 761, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #846 = CHHR
6384 { 845, 4, 0, 6, 226, 0, 1, SystemZImpOpBase + 0, 757, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL }, // Inst #845 = CHF
6385 { 844, 4, 0, 4, 246, 0, 1, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3848ULL }, // Inst #844 = CH
6386 { 843, 4, 1, 4, 482, 1, 1, SystemZImpOpBase + 1, 753, 0, 0x0ULL }, // Inst #843 = CGXTRA
6387 { 842, 3, 1, 4, 482, 1, 1, SystemZImpOpBase + 1, 750, 0, 0x0ULL }, // Inst #842 = CGXTR
6388 { 841, 3, 1, 4, 426, 0, 1, SystemZImpOpBase + 0, 750, 0, 0x0ULL }, // Inst #841 = CGXR
6389 { 840, 4, 1, 4, 367, 1, 1, SystemZImpOpBase + 1, 753, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #840 = CGXBRA
6390 { 839, 3, 1, 4, 367, 1, 1, SystemZImpOpBase + 1, 750, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #839 = CGXBR
6391 { 838, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #838 = CGRTAsmNLH
6392 { 837, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #837 = CGRTAsmNLE
6393 { 836, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #836 = CGRTAsmNL
6394 { 835, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #835 = CGRTAsmNHE
6395 { 834, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #834 = CGRTAsmNH
6396 { 833, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #833 = CGRTAsmNE
6397 { 832, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #832 = CGRTAsmLH
6398 { 831, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #831 = CGRTAsmLE
6399 { 830, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #830 = CGRTAsmL
6400 { 829, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #829 = CGRTAsmHE
6401 { 828, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #828 = CGRTAsmH
6402 { 827, 2, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #827 = CGRTAsmE
6403 { 826, 3, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 223, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #826 = CGRTAsm
6404 { 825, 3, 0, 4, 14, 0, 0, SystemZImpOpBase + 0, 223, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #825 = CGRT
6405 { 824, 2, 0, 6, 223, 0, 1, SystemZImpOpBase + 0, 716, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #824 = CGRL
6406 { 823, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #823 = CGRJAsmNLH
6407 { 822, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #822 = CGRJAsmNLE
6408 { 821, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #821 = CGRJAsmNL
6409 { 820, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #820 = CGRJAsmNHE
6410 { 819, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #819 = CGRJAsmNH
6411 { 818, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #818 = CGRJAsmNE
6412 { 817, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #817 = CGRJAsmLH
6413 { 816, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #816 = CGRJAsmLE
6414 { 815, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #815 = CGRJAsmL
6415 { 814, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #814 = CGRJAsmHE
6416 { 813, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #813 = CGRJAsmH
6417 { 812, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 747, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #812 = CGRJAsmE
6418 { 811, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 743, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #811 = CGRJAsm
6419 { 810, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 743, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #810 = CGRJ
6420 { 809, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #809 = CGRBAsmNLH
6421 { 808, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #808 = CGRBAsmNLE
6422 { 807, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #807 = CGRBAsmNL
6423 { 806, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #806 = CGRBAsmNHE
6424 { 805, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #805 = CGRBAsmNH
6425 { 804, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #804 = CGRBAsmNE
6426 { 803, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #803 = CGRBAsmLH
6427 { 802, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #802 = CGRBAsmLE
6428 { 801, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #801 = CGRBAsmL
6429 { 800, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #800 = CGRBAsmHE
6430 { 799, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #799 = CGRBAsmH
6431 { 798, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 739, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #798 = CGRBAsmE
6432 { 797, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 734, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #797 = CGRBAsm
6433 { 796, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 734, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #796 = CGRB
6434 { 795, 2, 0, 4, 224, 0, 1, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #795 = CGR
6435 { 794, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #794 = CGITAsmNLH
6436 { 793, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #793 = CGITAsmNLE
6437 { 792, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #792 = CGITAsmNL
6438 { 791, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #791 = CGITAsmNHE
6439 { 790, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #790 = CGITAsmNH
6440 { 789, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #789 = CGITAsmNE
6441 { 788, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #788 = CGITAsmLH
6442 { 787, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #787 = CGITAsmLE
6443 { 786, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #786 = CGITAsmL
6444 { 785, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #785 = CGITAsmHE
6445 { 784, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #784 = CGITAsmH
6446 { 783, 2, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #783 = CGITAsmE
6447 { 782, 3, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 216, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #782 = CGITAsm
6448 { 781, 3, 0, 6, 14, 0, 0, SystemZImpOpBase + 0, 216, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #781 = CGIT
6449 { 780, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #780 = CGIJAsmNLH
6450 { 779, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #779 = CGIJAsmNLE
6451 { 778, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #778 = CGIJAsmNL
6452 { 777, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #777 = CGIJAsmNHE
6453 { 776, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #776 = CGIJAsmNH
6454 { 775, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #775 = CGIJAsmNE
6455 { 774, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #774 = CGIJAsmLH
6456 { 773, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #773 = CGIJAsmLE
6457 { 772, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #772 = CGIJAsmL
6458 { 771, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #771 = CGIJAsmHE
6459 { 770, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #770 = CGIJAsmH
6460 { 769, 3, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 731, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #769 = CGIJAsmE
6461 { 768, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #768 = CGIJAsm
6462 { 767, 4, 0, 6, 11, 0, 1, SystemZImpOpBase + 0, 727, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #767 = CGIJ
6463 { 766, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #766 = CGIBAsmNLH
6464 { 765, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #765 = CGIBAsmNLE
6465 { 764, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #764 = CGIBAsmNL
6466 { 763, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #763 = CGIBAsmNHE
6467 { 762, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #762 = CGIBAsmNH
6468 { 761, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #761 = CGIBAsmNE
6469 { 760, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #760 = CGIBAsmLH
6470 { 759, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #759 = CGIBAsmLE
6471 { 758, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #758 = CGIBAsmL
6472 { 757, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #757 = CGIBAsmHE
6473 { 756, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #756 = CGIBAsmH
6474 { 755, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 723, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #755 = CGIBAsmE
6475 { 754, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 718, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #754 = CGIBAsm
6476 { 753, 5, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 718, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #753 = CGIB
6477 { 752, 3, 0, 6, 223, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #752 = CGHSI
6478 { 751, 2, 0, 6, 249, 0, 1, SystemZImpOpBase + 0, 716, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #751 = CGHRL
6479 { 750, 2, 0, 4, 222, 0, 1, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #750 = CGHI
6480 { 749, 4, 0, 6, 248, 0, 1, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x384cULL }, // Inst #749 = CGH
6481 { 748, 2, 0, 6, 252, 0, 1, SystemZImpOpBase + 0, 716, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3800ULL }, // Inst #748 = CGFRL
6482 { 747, 2, 0, 4, 253, 0, 1, SystemZImpOpBase + 0, 714, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #747 = CGFR
6483 { 746, 2, 0, 6, 222, 0, 1, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #746 = CGFI
6484 { 745, 4, 0, 6, 251, 0, 1, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x388cULL }, // Inst #745 = CGF
6485 { 744, 3, 1, 4, 425, 0, 1, SystemZImpOpBase + 0, 707, 0, 0x0ULL }, // Inst #744 = CGER
6486 { 743, 4, 1, 4, 366, 1, 1, SystemZImpOpBase + 1, 710, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #743 = CGEBRA
6487 { 742, 3, 1, 4, 366, 1, 1, SystemZImpOpBase + 1, 707, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #742 = CGEBR
6488 { 741, 4, 1, 4, 481, 1, 1, SystemZImpOpBase + 1, 703, 0, 0x0ULL }, // Inst #741 = CGDTRA
6489 { 740, 3, 1, 4, 481, 1, 1, SystemZImpOpBase + 1, 700, 0, 0x0ULL }, // Inst #740 = CGDTR
6490 { 739, 3, 1, 4, 425, 0, 1, SystemZImpOpBase + 0, 700, 0, 0x0ULL }, // Inst #739 = CGDR
6491 { 738, 4, 1, 4, 366, 1, 1, SystemZImpOpBase + 1, 703, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #738 = CGDBRA
6492 { 737, 3, 1, 4, 366, 1, 1, SystemZImpOpBase + 1, 700, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #737 = CGDBR
6493 { 736, 4, 0, 6, 219, 0, 1, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x390cULL }, // Inst #736 = CG
6494 { 735, 4, 1, 4, 894, 1, 1, SystemZImpOpBase + 1, 696, 0, 0x0ULL }, // Inst #735 = CFXTR
6495 { 734, 3, 1, 4, 426, 0, 1, SystemZImpOpBase + 0, 693, 0, 0x0ULL }, // Inst #734 = CFXR
6496 { 733, 4, 1, 4, 367, 1, 1, SystemZImpOpBase + 1, 696, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #733 = CFXBRA
6497 { 732, 3, 1, 4, 367, 1, 1, SystemZImpOpBase + 1, 693, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #732 = CFXBR
6498 { 731, 2, 0, 6, 221, 0, 1, SystemZImpOpBase + 0, 691, 0|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #731 = CFI
6499 { 730, 3, 1, 4, 425, 0, 1, SystemZImpOpBase + 0, 684, 0, 0x0ULL }, // Inst #730 = CFER
6500 { 729, 4, 1, 4, 366, 1, 1, SystemZImpOpBase + 1, 687, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #729 = CFEBRA
6501 { 728, 3, 1, 4, 366, 1, 1, SystemZImpOpBase + 1, 684, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #728 = CFEBR
6502 { 727, 4, 1, 4, 893, 1, 1, SystemZImpOpBase + 1, 680, 0, 0x0ULL }, // Inst #727 = CFDTR
6503 { 726, 3, 1, 4, 425, 0, 1, SystemZImpOpBase + 0, 677, 0, 0x0ULL }, // Inst #726 = CFDR
6504 { 725, 4, 1, 4, 366, 1, 1, SystemZImpOpBase + 1, 680, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #725 = CFDBRA
6505 { 724, 3, 1, 4, 366, 1, 1, SystemZImpOpBase + 1, 677, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #724 = CFDBR
6506 { 723, 2, 0, 4, 333, 3, 4, SystemZImpOpBase + 28, 675, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #723 = CFC
6507 { 722, 2, 0, 4, 523, 0, 1, SystemZImpOpBase + 0, 673, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #722 = CEXTR
6508 { 721, 2, 0, 2, 465, 0, 1, SystemZImpOpBase + 0, 659, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #721 = CER
6509 { 720, 4, 1, 4, 890, 1, 0, SystemZImpOpBase + 12, 669, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #720 = CELGBR
6510 { 719, 4, 1, 4, 890, 1, 0, SystemZImpOpBase + 12, 663, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #719 = CELFBR
6511 { 718, 2, 1, 4, 423, 0, 0, SystemZImpOpBase + 0, 667, 0, 0x0ULL }, // Inst #718 = CEGR
6512 { 717, 4, 1, 4, 362, 1, 0, SystemZImpOpBase + 12, 669, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #717 = CEGBRA
6513 { 716, 2, 1, 4, 362, 1, 0, SystemZImpOpBase + 12, 667, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #716 = CEGBR
6514 { 715, 2, 1, 4, 423, 0, 0, SystemZImpOpBase + 0, 661, 0, 0x0ULL }, // Inst #715 = CEFR
6515 { 714, 4, 1, 4, 362, 1, 0, SystemZImpOpBase + 12, 663, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #714 = CEFBRA
6516 { 713, 2, 1, 4, 362, 1, 0, SystemZImpOpBase + 12, 661, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #713 = CEFBR
6517 { 712, 2, 0, 4, 522, 0, 1, SystemZImpOpBase + 0, 631, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #712 = CEDTR
6518 { 711, 2, 0, 4, 403, 1, 1, SystemZImpOpBase + 1, 659, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #711 = CEBR
6519 { 710, 4, 0, 6, 402, 1, 1, SystemZImpOpBase + 1, 655, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3c88ULL }, // Inst #710 = CEB
6520 { 709, 4, 0, 4, 464, 0, 1, SystemZImpOpBase + 0, 655, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #709 = CE
6521 { 708, 5, 1, 6, 489, 0, 0, SystemZImpOpBase + 0, 645, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #708 = CDZT
6522 { 707, 2, 1, 4, 485, 0, 0, SystemZImpOpBase + 0, 639, 0, 0x0ULL }, // Inst #707 = CDUTR
6523 { 706, 2, 0, 4, 520, 1, 1, SystemZImpOpBase + 1, 631, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #706 = CDTR
6524 { 705, 5, 1, 6, 276, 0, 1, SystemZImpOpBase + 0, 650, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #705 = CDSY
6525 { 704, 2, 1, 4, 485, 0, 0, SystemZImpOpBase + 0, 639, 0, 0x0ULL }, // Inst #704 = CDSTR
6526 { 703, 5, 1, 6, 277, 0, 1, SystemZImpOpBase + 0, 650, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL }, // Inst #703 = CDSG
6527 { 702, 5, 1, 4, 276, 0, 1, SystemZImpOpBase + 0, 650, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #702 = CDS
6528 { 701, 2, 0, 2, 465, 0, 1, SystemZImpOpBase + 0, 631, 0|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #701 = CDR
6529 { 700, 5, 1, 6, 493, 0, 0, SystemZImpOpBase + 0, 645, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #700 = CDPT
6530 { 699, 4, 1, 4, 478, 1, 0, SystemZImpOpBase + 12, 641, 0, 0x0ULL }, // Inst #699 = CDLGTR
6531 { 698, 4, 1, 4, 364, 1, 0, SystemZImpOpBase + 12, 641, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #698 = CDLGBR
6532 { 697, 4, 1, 4, 477, 1, 0, SystemZImpOpBase + 12, 635, 0, 0x0ULL }, // Inst #697 = CDLFTR
6533 { 696, 4, 1, 4, 364, 1, 0, SystemZImpOpBase + 12, 635, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #696 = CDLFBR
6534 { 695, 4, 1, 4, 474, 1, 0, SystemZImpOpBase + 12, 641, 0, 0x0ULL }, // Inst #695 = CDGTRA
6535 { 694, 2, 1, 4, 474, 1, 0, SystemZImpOpBase + 12, 639, 0, 0x0ULL }, // Inst #694 = CDGTR
6536 { 693, 2, 1, 4, 423, 0, 0, SystemZImpOpBase + 0, 639, 0, 0x0ULL }, // Inst #693 = CDGR
6537 { 692, 4, 1, 4, 362, 1, 0, SystemZImpOpBase + 12, 641, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #692 = CDGBRA
6538 { 691, 2, 1, 4, 362, 1, 0, SystemZImpOpBase + 12, 639, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #691 = CDGBR
6539 { 690, 4, 1, 4, 473, 1, 0, SystemZImpOpBase + 12, 635, 0, 0x0ULL }, // Inst #690 = CDFTR
6540 { 689, 2, 1, 4, 423, 0, 0, SystemZImpOpBase + 0, 633, 0, 0x0ULL }, // Inst #689 = CDFR
6541 { 688, 4, 1, 4, 362, 1, 0, SystemZImpOpBase + 12, 635, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #688 = CDFBRA
6542 { 687, 2, 1, 4, 362, 1, 0, SystemZImpOpBase + 12, 633, 0|(1ULL<<MCID::MayRaiseFPException), 0x0ULL }, // Inst #687 = CDFBR
6543 { 686, 2, 0, 4, 403, 1, 1, SystemZImpOpBase + 1, 631, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayRaiseFPException), 0x3c00ULL }, // Inst #686 = CDBR
6544 { 685, 4, 0, 6, 402, 1, 1, SystemZImpOpBase + 1, 627, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3d08ULL }, // Inst #685 = CDB
6545 { 684, 4, 0, 4, 464, 0, 1, SystemZImpOpBase + 0, 627, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #684 = CD
6546 { 683, 4, 0, 4, 219, 0, 1, SystemZImpOpBase + 0, 623, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x3888ULL }, // Inst #683 = C
6547 { 682, 5, 1, 6, 10, 0, 0, SystemZImpOpBase + 0, 618, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4ULL }, // Inst #682 = BXLEG
6548 { 681, 5, 1, 4, 10, 0, 0, SystemZImpOpBase + 0, 613, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #681 = BXLE
6549 { 680, 5, 1, 6, 10, 0, 0, SystemZImpOpBase + 0, 618, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4ULL }, // Inst #680 = BXHG
6550 { 679, 5, 1, 4, 10, 0, 0, SystemZImpOpBase + 0, 613, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #679 = BXH
6551 { 678, 2, 0, 2, 321, 0, 0, SystemZImpOpBase + 0, 565, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #678 = BSM
6552 { 677, 2, 1, 4, 820, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #677 = BSG
6553 { 676, 2, 1, 4, 820, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #676 = BSA
6554 { 675, 4, 1, 6, 10, 0, 1, SystemZImpOpBase + 0, 609, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #675 = BRXLG
6555 { 674, 4, 1, 4, 10, 0, 1, SystemZImpOpBase + 0, 605, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #674 = BRXLE
6556 { 673, 4, 1, 6, 10, 0, 1, SystemZImpOpBase + 0, 609, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #673 = BRXHG
6557 { 672, 4, 1, 4, 10, 0, 1, SystemZImpOpBase + 0, 605, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #672 = BRXH
6558 { 671, 3, 1, 6, 8, 0, 0, SystemZImpOpBase + 0, 602, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #671 = BRCTH
6559 { 670, 3, 1, 4, 7, 0, 1, SystemZImpOpBase + 0, 599, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #670 = BRCTG
6560 { 669, 3, 1, 4, 7, 0, 1, SystemZImpOpBase + 0, 596, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #669 = BRCT
6561 { 668, 2, 0, 6, 2, 1, 0, SystemZImpOpBase + 0, 594, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #668 = BRCLAsm
6562 { 667, 3, 0, 6, 2, 1, 0, SystemZImpOpBase + 0, 263, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #667 = BRCL
6563 { 666, 2, 0, 4, 2, 1, 0, SystemZImpOpBase + 0, 594, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #666 = BRCAsm
6564 { 665, 3, 0, 4, 2, 1, 0, SystemZImpOpBase + 0, 263, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #665 = BRC
6565 { 664, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #664 = BRAsmZ
6566 { 663, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #663 = BRAsmP
6567 { 662, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #662 = BRAsmO
6568 { 661, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #661 = BRAsmNZ
6569 { 660, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #660 = BRAsmNP
6570 { 659, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #659 = BRAsmNO
6571 { 658, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #658 = BRAsmNM
6572 { 657, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #657 = BRAsmNLH
6573 { 656, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #656 = BRAsmNLE
6574 { 655, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #655 = BRAsmNL
6575 { 654, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #654 = BRAsmNHE
6576 { 653, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #653 = BRAsmNH
6577 { 652, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #652 = BRAsmNE
6578 { 651, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #651 = BRAsmM
6579 { 650, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #650 = BRAsmLH
6580 { 649, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #649 = BRAsmLE
6581 { 648, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #648 = BRAsmL
6582 { 647, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #647 = BRAsmHE
6583 { 646, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #646 = BRAsmH
6584 { 645, 1, 0, 2, 5, 1, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #645 = BRAsmE
6585 { 644, 3, 0, 6, 19, 0, 1, SystemZImpOpBase + 0, 591, 0|(1ULL<<MCID::Call), 0x0ULL }, // Inst #644 = BRASL
6586 { 643, 3, 0, 4, 18, 0, 1, SystemZImpOpBase + 0, 591, 0|(1ULL<<MCID::Call), 0x0ULL }, // Inst #643 = BRAS
6587 { 642, 1, 0, 2, 5, 0, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #642 = BR
6588 { 641, 3, 0, 6, 266, 0, 0, SystemZImpOpBase + 0, 588, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #641 = BPRP
6589 { 640, 4, 0, 6, 265, 0, 0, SystemZImpOpBase + 0, 584, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #640 = BPP
6590 { 639, 4, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 572, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #639 = BICAsm
6591 { 638, 5, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 567, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x4000cULL }, // Inst #638 = BIC
6592 { 637, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #637 = BIAsmZ
6593 { 636, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #636 = BIAsmP
6594 { 635, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #635 = BIAsmO
6595 { 634, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #634 = BIAsmNZ
6596 { 633, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #633 = BIAsmNP
6597 { 632, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #632 = BIAsmNO
6598 { 631, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #631 = BIAsmNM
6599 { 630, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #630 = BIAsmNLH
6600 { 629, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #629 = BIAsmNLE
6601 { 628, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #628 = BIAsmNL
6602 { 627, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #627 = BIAsmNHE
6603 { 626, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #626 = BIAsmNH
6604 { 625, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #625 = BIAsmNE
6605 { 624, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #624 = BIAsmM
6606 { 623, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #623 = BIAsmLH
6607 { 622, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #622 = BIAsmLE
6608 { 621, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #621 = BIAsmL
6609 { 620, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #620 = BIAsmHE
6610 { 619, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #619 = BIAsmH
6611 { 618, 3, 0, 6, 6, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #618 = BIAsmE
6612 { 617, 3, 0, 6, 6, 0, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #617 = BI
6613 { 616, 3, 1, 2, 9, 0, 0, SystemZImpOpBase + 0, 581, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #616 = BCTR
6614 { 615, 3, 1, 4, 9, 0, 0, SystemZImpOpBase + 0, 526, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #615 = BCTGR
6615 { 614, 5, 1, 6, 9, 0, 0, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0xcULL }, // Inst #614 = BCTG
6616 { 613, 5, 1, 4, 9, 0, 0, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #613 = BCT
6617 { 612, 2, 0, 2, 4, 1, 0, SystemZImpOpBase + 0, 579, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #612 = BCRAsm
6618 { 611, 3, 0, 2, 4, 1, 0, SystemZImpOpBase + 0, 576, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #611 = BCR
6619 { 610, 4, 0, 4, 4, 1, 0, SystemZImpOpBase + 0, 572, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #610 = BCAsm
6620 { 609, 5, 0, 4, 4, 1, 0, SystemZImpOpBase + 0, 567, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x40008ULL }, // Inst #609 = BC
6621 { 608, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #608 = BAsmZ
6622 { 607, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #607 = BAsmP
6623 { 606, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #606 = BAsmO
6624 { 605, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #605 = BAsmNZ
6625 { 604, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #604 = BAsmNP
6626 { 603, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #603 = BAsmNO
6627 { 602, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #602 = BAsmNM
6628 { 601, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #601 = BAsmNLH
6629 { 600, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #600 = BAsmNLE
6630 { 599, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #599 = BAsmNL
6631 { 598, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #598 = BAsmNHE
6632 { 597, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #597 = BAsmNH
6633 { 596, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #596 = BAsmNE
6634 { 595, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #595 = BAsmM
6635 { 594, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #594 = BAsmLH
6636 { 593, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #593 = BAsmLE
6637 { 592, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #592 = BAsmL
6638 { 591, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #591 = BAsmHE
6639 { 590, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #590 = BAsmH
6640 { 589, 3, 0, 4, 5, 1, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #589 = BAsmE
6641 { 588, 2, 0, 2, 322, 0, 1, SystemZImpOpBase + 0, 565, 0|(1ULL<<MCID::Call), 0x0ULL }, // Inst #588 = BASSM
6642 { 587, 2, 0, 2, 20, 0, 1, SystemZImpOpBase + 0, 565, 0|(1ULL<<MCID::Call), 0x0ULL }, // Inst #587 = BASR
6643 { 586, 4, 0, 4, 20, 0, 1, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::Call), 0x8ULL }, // Inst #586 = BAS
6644 { 585, 2, 0, 2, 318, 1, 1, SystemZImpOpBase + 26, 565, 0|(1ULL<<MCID::Call), 0x0ULL }, // Inst #585 = BALR
6645 { 584, 4, 0, 4, 318, 1, 1, SystemZImpOpBase + 26, 161, 0|(1ULL<<MCID::Call), 0x8ULL }, // Inst #584 = BAL
6646 { 583, 2, 0, 4, 822, 0, 0, SystemZImpOpBase + 0, 563, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #583 = BAKR
6647 { 582, 3, 0, 4, 5, 0, 0, SystemZImpOpBase + 0, 560, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x8ULL }, // Inst #582 = B
6648 { 581, 5, 1, 6, 103, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x203c8cULL }, // Inst #581 = AY
6649 { 580, 4, 1, 4, 505, 1, 1, SystemZImpOpBase + 1, 556, 0, 0x0ULL }, // Inst #580 = AXTRA
6650 { 579, 3, 1, 4, 505, 1, 1, SystemZImpOpBase + 1, 553, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #579 = AXTR
6651 { 578, 3, 1, 2, 440, 0, 1, SystemZImpOpBase + 0, 550, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #578 = AXR
6652 { 577, 3, 1, 4, 383, 1, 1, SystemZImpOpBase + 1, 550, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x3fc00ULL }, // Inst #577 = AXBR
6653 { 576, 3, 1, 2, 439, 0, 1, SystemZImpOpBase + 0, 497, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #576 = AWR
6654 { 575, 5, 1, 4, 438, 0, 1, SystemZImpOpBase + 0, 492, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #575 = AW
6655 { 574, 3, 1, 2, 439, 0, 1, SystemZImpOpBase + 0, 512, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #574 = AUR
6656 { 573, 5, 1, 4, 438, 0, 1, SystemZImpOpBase + 0, 507, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #573 = AU
6657 { 572, 3, 0, 6, 887, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x203c04ULL }, // Inst #572 = ASI
6658 { 571, 3, 1, 4, 120, 0, 1, SystemZImpOpBase + 0, 541, 0|(1ULL<<MCID::Commutable), 0x203c00ULL }, // Inst #571 = ARK
6659 { 570, 3, 1, 2, 120, 0, 1, SystemZImpOpBase + 0, 538, 0|(1ULL<<MCID::Commutable), 0x203c00ULL }, // Inst #570 = AR
6660 { 569, 6, 0, 6, 305, 0, 1, SystemZImpOpBase + 0, 544, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #569 = AP
6661 { 568, 5, 1, 6, 113, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x103c8cULL }, // Inst #568 = ALY
6662 { 567, 3, 1, 6, 123, 0, 0, SystemZImpOpBase + 0, 535, 0, 0x0ULL }, // Inst #567 = ALSIHN
6663 { 566, 3, 1, 6, 123, 0, 1, SystemZImpOpBase + 0, 535, 0, 0x103c00ULL }, // Inst #566 = ALSIH
6664 { 565, 3, 0, 6, 887, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x103c04ULL }, // Inst #565 = ALSI
6665 { 564, 3, 1, 4, 119, 0, 1, SystemZImpOpBase + 0, 541, 0|(1ULL<<MCID::Commutable), 0x103c00ULL }, // Inst #564 = ALRK
6666 { 563, 3, 1, 2, 119, 0, 1, SystemZImpOpBase + 0, 538, 0|(1ULL<<MCID::Commutable), 0x103c00ULL }, // Inst #563 = ALR
6667 { 562, 3, 1, 6, 114, 0, 1, SystemZImpOpBase + 0, 251, 0, 0x103c00ULL }, // Inst #562 = ALHSIK
6668 { 561, 3, 1, 4, 122, 0, 1, SystemZImpOpBase + 0, 532, 0, 0x103c00ULL }, // Inst #561 = ALHHLR
6669 { 560, 3, 1, 4, 121, 0, 1, SystemZImpOpBase + 0, 529, 0, 0x103c00ULL }, // Inst #560 = ALHHHR
6670 { 559, 3, 0, 6, 124, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x103c04ULL }, // Inst #559 = ALGSI
6671 { 558, 3, 1, 4, 118, 0, 1, SystemZImpOpBase + 0, 382, 0|(1ULL<<MCID::Commutable), 0x103c00ULL }, // Inst #558 = ALGRK
6672 { 557, 3, 1, 4, 118, 0, 1, SystemZImpOpBase + 0, 526, 0|(1ULL<<MCID::Commutable), 0x103c00ULL }, // Inst #557 = ALGR
6673 { 556, 3, 1, 6, 116, 0, 1, SystemZImpOpBase + 0, 223, 0, 0x103c00ULL }, // Inst #556 = ALGHSIK
6674 { 555, 3, 1, 4, 117, 0, 1, SystemZImpOpBase + 0, 523, 0, 0x103c00ULL }, // Inst #555 = ALGFR
6675 { 554, 3, 1, 6, 117, 0, 1, SystemZImpOpBase + 0, 303, 0, 0x103c00ULL }, // Inst #554 = ALGFI
6676 { 553, 5, 1, 6, 888, 0, 1, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x103c8cULL }, // Inst #553 = ALGF
6677 { 552, 5, 1, 6, 115, 0, 1, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x103d0cULL }, // Inst #552 = ALG
6678 { 551, 3, 1, 6, 114, 0, 1, SystemZImpOpBase + 0, 515, 0, 0x103c00ULL }, // Inst #551 = ALFI
6679 { 550, 3, 1, 4, 126, 1, 1, SystemZImpOpBase + 26, 538, 0, 0x103c00ULL }, // Inst #550 = ALCR
6680 { 549, 3, 1, 4, 126, 1, 1, SystemZImpOpBase + 26, 526, 0, 0x103c00ULL }, // Inst #549 = ALCGR
6681 { 548, 5, 1, 6, 125, 1, 1, SystemZImpOpBase + 26, 518, 0|(1ULL<<MCID::MayLoad), 0x103d0cULL }, // Inst #548 = ALCG
6682 { 547, 5, 1, 6, 125, 1, 1, SystemZImpOpBase + 26, 487, 0|(1ULL<<MCID::MayLoad), 0x103c8cULL }, // Inst #547 = ALC
6683 { 546, 5, 1, 4, 113, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x103c88ULL }, // Inst #546 = AL
6684 { 545, 3, 1, 6, 105, 0, 1, SystemZImpOpBase + 0, 535, 0, 0x203c00ULL }, // Inst #545 = AIH
6685 { 544, 5, 1, 6, 104, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x203c4cULL }, // Inst #544 = AHY
6686 { 543, 3, 1, 6, 111, 0, 1, SystemZImpOpBase + 0, 251, 0, 0x203c00ULL }, // Inst #543 = AHIK
6687 { 542, 3, 1, 4, 111, 0, 1, SystemZImpOpBase + 0, 515, 0, 0x203c00ULL }, // Inst #542 = AHI
6688 { 541, 3, 1, 4, 122, 0, 1, SystemZImpOpBase + 0, 532, 0, 0x203c00ULL }, // Inst #541 = AHHLR
6689 { 540, 3, 1, 4, 121, 0, 1, SystemZImpOpBase + 0, 529, 0, 0x203c00ULL }, // Inst #540 = AHHHR
6690 { 539, 5, 1, 4, 104, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x203c48ULL }, // Inst #539 = AH
6691 { 538, 3, 0, 6, 124, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x203c04ULL }, // Inst #538 = AGSI
6692 { 537, 3, 1, 4, 110, 0, 1, SystemZImpOpBase + 0, 382, 0|(1ULL<<MCID::Commutable), 0x203c00ULL }, // Inst #537 = AGRK
6693 { 536, 3, 1, 4, 110, 0, 1, SystemZImpOpBase + 0, 526, 0|(1ULL<<MCID::Commutable), 0x203c00ULL }, // Inst #536 = AGR
6694 { 535, 3, 1, 6, 109, 0, 1, SystemZImpOpBase + 0, 223, 0, 0x203c00ULL }, // Inst #535 = AGHIK
6695 { 534, 3, 1, 4, 109, 0, 1, SystemZImpOpBase + 0, 303, 0, 0x203c00ULL }, // Inst #534 = AGHI
6696 { 533, 5, 1, 6, 127, 0, 1, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x203c4cULL }, // Inst #533 = AGH
6697 { 532, 3, 1, 4, 128, 0, 1, SystemZImpOpBase + 0, 523, 0, 0x203c00ULL }, // Inst #532 = AGFR
6698 { 531, 3, 1, 6, 108, 0, 1, SystemZImpOpBase + 0, 303, 0, 0x203c00ULL }, // Inst #531 = AGFI
6699 { 530, 5, 1, 6, 869, 0, 1, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x203c8cULL }, // Inst #530 = AGF
6700 { 529, 5, 1, 6, 107, 0, 1, SystemZImpOpBase + 0, 518, 0|(1ULL<<MCID::MayLoad), 0x203d0cULL }, // Inst #529 = AG
6701 { 528, 3, 1, 6, 106, 0, 1, SystemZImpOpBase + 0, 515, 0, 0x203c00ULL }, // Inst #528 = AFI
6702 { 527, 3, 1, 2, 439, 0, 1, SystemZImpOpBase + 0, 512, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #527 = AER
6703 { 526, 3, 1, 4, 382, 1, 1, SystemZImpOpBase + 1, 512, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x3fc00ULL }, // Inst #526 = AEBR
6704 { 525, 5, 1, 6, 381, 1, 1, SystemZImpOpBase + 1, 507, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fc88ULL }, // Inst #525 = AEB
6705 { 524, 5, 1, 4, 438, 0, 1, SystemZImpOpBase + 0, 507, 0|(1ULL<<MCID::MayLoad), 0x88ULL }, // Inst #524 = AE
6706 { 523, 4, 1, 4, 504, 1, 1, SystemZImpOpBase + 1, 503, 0, 0x0ULL }, // Inst #523 = ADTRA
6707 { 522, 3, 1, 4, 504, 1, 1, SystemZImpOpBase + 1, 500, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #522 = ADTR
6708 { 521, 3, 1, 2, 439, 0, 1, SystemZImpOpBase + 0, 497, 0|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #521 = ADR
6709 { 520, 3, 1, 4, 382, 1, 1, SystemZImpOpBase + 1, 497, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x3fc00ULL }, // Inst #520 = ADBR
6710 { 519, 5, 1, 6, 381, 1, 1, SystemZImpOpBase + 1, 492, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fd08ULL }, // Inst #519 = ADB
6711 { 518, 5, 1, 4, 438, 0, 1, SystemZImpOpBase + 0, 492, 0|(1ULL<<MCID::MayLoad), 0x108ULL }, // Inst #518 = AD
6712 { 517, 5, 1, 4, 103, 0, 1, SystemZImpOpBase + 0, 487, 0|(1ULL<<MCID::MayLoad), 0x203c88ULL }, // Inst #517 = A
6713 { 516, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 170, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #516 = ZEXT128
6714 { 515, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 183, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #515 = X_MemFoldPseudo
6715 { 514, 0, 0, 0, 0, 2, 2, SystemZImpOpBase + 22, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #514 = XPLINK_STACKALLOC
6716 { 513, 3, 1, 6, 173, 0, 1, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #513 = XILF64
6717 { 512, 3, 1, 6, 172, 0, 1, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #512 = XIHF64
6718 { 511, 3, 1, 0, 170, 0, 1, SystemZImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo), 0x23000ULL }, // Inst #511 = XIFMux
6719 { 510, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 175, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #510 = XG_MemFoldPseudo
6720 { 509, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 238, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #509 = XCReg
6721 { 508, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 233, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #508 = XCImm
6722 { 507, 4, 0, 6, 545, 0, 0, SystemZImpOpBase + 0, 476, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #507 = VST64
6723 { 506, 4, 0, 6, 545, 0, 0, SystemZImpOpBase + 0, 472, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #506 = VST32
6724 { 505, 3, 1, 6, 529, 0, 0, SystemZImpOpBase + 0, 484, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #505 = VLVGP32
6725 { 504, 2, 1, 6, 526, 0, 0, SystemZImpOpBase + 0, 482, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #504 = VLR64
6726 { 503, 2, 1, 6, 526, 0, 0, SystemZImpOpBase + 0, 480, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #503 = VLR32
6727 { 502, 4, 1, 6, 538, 0, 0, SystemZImpOpBase + 0, 476, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #502 = VL64
6728 { 501, 4, 1, 6, 538, 0, 0, SystemZImpOpBase + 0, 472, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #501 = VL32
6729 { 500, 2, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 415, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #500 = UCmp128Hi
6730 { 499, 0, 0, 4, 13, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #499 = Trap
6731 { 498, 2, 0, 0, 258, 0, 1, SystemZImpOpBase + 0, 210, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #498 = TMLMux
6732 { 497, 2, 0, 4, 262, 0, 1, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #497 = TMLL64
6733 { 496, 2, 0, 4, 261, 0, 1, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #496 = TMLH64
6734 { 495, 2, 0, 0, 258, 0, 1, SystemZImpOpBase + 0, 210, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #495 = TMHMux
6735 { 494, 2, 0, 4, 260, 0, 1, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #494 = TMHL64
6736 { 493, 2, 0, 4, 259, 0, 1, SystemZImpOpBase + 0, 470, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL }, // Inst #493 = TMHH64
6737 { 492, 1, 0, 6, 21, 0, 2, SystemZImpOpBase + 20, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #492 = TLS_LDCALL
6738 { 491, 1, 0, 6, 21, 0, 2, SystemZImpOpBase + 20, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #491 = TLS_GDCALL
6739 { 490, 3, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 467, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #490 = TBEGIN_nofloat
6740 { 489, 0, 0, 2, 268, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #489 = Serialize
6741 { 488, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 462, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #488 = SelectVR64
6742 { 487, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 457, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #487 = SelectVR32
6743 { 486, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 427, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #486 = SelectVR128
6744 { 485, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 452, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #485 = SelectF64
6745 { 484, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 447, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #484 = SelectF32
6746 { 483, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 442, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #483 = SelectF128
6747 { 482, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 437, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #482 = Select64
6748 { 481, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 432, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #481 = Select32
6749 { 480, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 427, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #480 = Select128
6750 { 479, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 183, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x223c88ULL }, // Inst #479 = S_MemFoldPseudo
6751 { 478, 4, 0, 0, 355, 0, 0, SystemZImpOpBase + 0, 347, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1eULL }, // Inst #478 = STX
6752 { 477, 5, 0, 0, 54, 1, 0, SystemZImpOpBase + 0, 422, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x80080ULL }, // Inst #477 = STOCMux
6753 { 476, 4, 0, 0, 48, 0, 0, SystemZImpOpBase + 0, 243, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x8eULL }, // Inst #476 = STMux
6754 { 475, 4, 0, 0, 77, 0, 0, SystemZImpOpBase + 0, 243, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x2cULL }, // Inst #475 = STHMux
6755 { 474, 4, 0, 0, 76, 0, 0, SystemZImpOpBase + 0, 243, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x2cULL }, // Inst #474 = STCMux
6756 { 473, 4, 0, 0, 47, 0, 0, SystemZImpOpBase + 0, 306, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1eULL }, // Inst #473 = ST128
6757 { 472, 4, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 254, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #472 = SRSTLoop
6758 { 471, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 183, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x101c88ULL }, // Inst #471 = SL_MemFoldPseudo
6759 { 470, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 175, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x101d0cULL }, // Inst #470 = SLG_MemFoldPseudo
6760 { 469, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 175, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x223d0cULL }, // Inst #469 = SG_MemFoldPseudo
6761 { 468, 5, 1, 0, 55, 1, 0, SystemZImpOpBase + 0, 417, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #468 = SELRMux
6762 { 467, 5, 1, 0, 0, 1, 1, SystemZImpOpBase + 1, 165, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fc88ULL }, // Inst #467 = SEB_MemFoldPseudo
6763 { 466, 5, 1, 0, 0, 1, 1, SystemZImpOpBase + 1, 156, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fd08ULL }, // Inst #466 = SDB_MemFoldPseudo
6764 { 465, 2, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 415, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #465 = SCmp128Hi
6765 { 464, 0, 0, 4, 22, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #464 = Return_XPLINK
6766 { 463, 0, 0, 2, 22, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #463 = Return
6767 { 462, 6, 1, 0, 217, 0, 0, SystemZImpOpBase + 0, 409, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #462 = RISBMux
6768 { 461, 6, 1, 6, 215, 0, 0, SystemZImpOpBase + 0, 403, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #461 = RISBLL
6769 { 460, 6, 1, 6, 215, 0, 0, SystemZImpOpBase + 0, 397, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #460 = RISBLH
6770 { 459, 6, 1, 6, 214, 0, 0, SystemZImpOpBase + 0, 391, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #459 = RISBHL
6771 { 458, 6, 1, 6, 214, 0, 0, SystemZImpOpBase + 0, 385, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #458 = RISBHH
6772 { 457, 1, 0, 0, 0, 1, 3, SystemZImpOpBase + 16, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #457 = PROBED_STACKALLOC
6773 { 456, 3, 1, 0, 0, 1, 2, SystemZImpOpBase + 13, 382, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #456 = PROBED_ALLOCA
6774 { 455, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 379, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #455 = PAIR128
6775 { 454, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 183, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #454 = O_MemFoldPseudo
6776 { 453, 3, 1, 0, 159, 0, 1, SystemZImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #453 = OILMux
6777 { 452, 3, 1, 4, 165, 0, 1, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #452 = OILL64
6778 { 451, 3, 1, 4, 164, 0, 1, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #451 = OILH64
6779 { 450, 3, 1, 6, 163, 0, 1, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #450 = OILF64
6780 { 449, 3, 1, 0, 159, 0, 1, SystemZImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #449 = OIHMux
6781 { 448, 3, 1, 4, 162, 0, 1, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #448 = OIHL64
6782 { 447, 3, 1, 4, 161, 0, 1, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #447 = OIHH64
6783 { 446, 3, 1, 6, 160, 0, 1, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #446 = OIHF64
6784 { 445, 3, 1, 0, 159, 0, 1, SystemZImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo), 0x23000ULL }, // Inst #445 = OIFMux
6785 { 444, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 175, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #444 = OG_MemFoldPseudo
6786 { 443, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 238, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #443 = OCReg
6787 { 442, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 233, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #442 = OCImm
6788 { 441, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 183, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x23088ULL }, // Inst #441 = N_MemFoldPseudo
6789 { 440, 3, 1, 0, 146, 0, 1, SystemZImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #440 = NILMux
6790 { 439, 3, 1, 4, 153, 0, 1, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #439 = NILL64
6791 { 438, 3, 1, 4, 152, 0, 1, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #438 = NILH64
6792 { 437, 3, 1, 6, 151, 0, 1, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #437 = NILF64
6793 { 436, 3, 1, 0, 146, 0, 1, SystemZImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #436 = NIHMux
6794 { 435, 3, 1, 4, 150, 0, 1, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #435 = NIHL64
6795 { 434, 3, 1, 4, 149, 0, 1, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #434 = NIHH64
6796 { 433, 3, 1, 6, 148, 0, 1, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #433 = NIHF64
6797 { 432, 3, 1, 0, 146, 0, 1, SystemZImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x23000ULL }, // Inst #432 = NIFMux
6798 { 431, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 175, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2310cULL }, // Inst #431 = NG_MemFoldPseudo
6799 { 430, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 238, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #430 = NCReg
6800 { 429, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 233, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #429 = NCImm
6801 { 428, 4, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 375, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #428 = MemsetRegReg
6802 { 427, 4, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 371, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #427 = MemsetRegImm
6803 { 426, 4, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 367, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #426 = MemsetImmReg
6804 { 425, 4, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 363, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #425 = MemsetImmImm
6805 { 424, 4, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 254, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #424 = MVSTLoop
6806 { 423, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 238, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #423 = MVCReg
6807 { 422, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 233, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #422 = MVCImm
6808 { 421, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 175, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x10cULL }, // Inst #421 = MSGC_MemFoldPseudo
6809 { 420, 6, 1, 0, 0, 1, 0, SystemZImpOpBase + 12, 357, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #420 = MSEB_MemFoldPseudo
6810 { 419, 6, 1, 0, 0, 1, 0, SystemZImpOpBase + 12, 351, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #419 = MSDB_MemFoldPseudo
6811 { 418, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 183, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x8cULL }, // Inst #418 = MSC_MemFoldPseudo
6812 { 417, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 12, 165, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #417 = MEEB_MemFoldPseudo
6813 { 416, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 12, 156, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #416 = MDB_MemFoldPseudo
6814 { 415, 6, 1, 0, 0, 1, 0, SystemZImpOpBase + 12, 357, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #415 = MAEB_MemFoldPseudo
6815 { 414, 6, 1, 0, 0, 1, 0, SystemZImpOpBase + 12, 351, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #414 = MADB_MemFoldPseudo
6816 { 413, 4, 1, 0, 353, 0, 0, SystemZImpOpBase + 0, 347, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x1dULL }, // Inst #413 = LX
6817 { 412, 1, 0, 0, 0, 1, 1, SystemZImpOpBase + 1, 346, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #412 = LTXBRCompare_Pseudo
6818 { 411, 1, 0, 0, 0, 1, 1, SystemZImpOpBase + 1, 345, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #411 = LTEBRCompare_Pseudo
6819 { 410, 1, 0, 0, 0, 1, 1, SystemZImpOpBase + 1, 344, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #410 = LTDBRCompare_Pseudo
6820 { 409, 5, 1, 0, 50, 1, 0, SystemZImpOpBase + 0, 339, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x80000ULL }, // Inst #409 = LOCRMux
6821 { 408, 6, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 333, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80ULL }, // Inst #408 = LOCMux_MemFoldPseudo
6822 { 407, 6, 1, 0, 53, 1, 0, SystemZImpOpBase + 0, 327, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x80080ULL }, // Inst #407 = LOCMux
6823 { 406, 5, 1, 0, 52, 1, 0, SystemZImpOpBase + 0, 322, 0|(1ULL<<MCID::Pseudo), 0x80000ULL }, // Inst #406 = LOCHIMux
6824 { 405, 6, 1, 0, 0, 1, 0, SystemZImpOpBase + 0, 316, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x100ULL }, // Inst #405 = LOCG_MemFoldPseudo
6825 { 404, 4, 1, 0, 33, 0, 0, SystemZImpOpBase + 0, 243, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x8dULL }, // Inst #404 = LMux
6826 { 403, 2, 1, 0, 67, 0, 0, SystemZImpOpBase + 0, 314, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #403 = LLHRMux
6827 { 402, 4, 1, 0, 70, 0, 0, SystemZImpOpBase + 0, 243, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #402 = LLHMux
6828 { 401, 2, 1, 0, 66, 0, 0, SystemZImpOpBase + 0, 314, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #401 = LLCRMux
6829 { 400, 4, 1, 0, 69, 0, 0, SystemZImpOpBase + 0, 243, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #400 = LLCMux
6830 { 399, 4, 1, 0, 63, 0, 0, SystemZImpOpBase + 0, 243, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x4cULL }, // Inst #399 = LHMux
6831 { 398, 2, 1, 0, 40, 0, 0, SystemZImpOpBase + 0, 210, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #398 = LHIMux
6832 { 397, 2, 1, 6, 732, 0, 0, SystemZImpOpBase + 0, 312, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #397 = LFER
6833 { 396, 2, 1, 6, 731, 0, 0, SystemZImpOpBase + 0, 310, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #396 = LEFR
6834 { 395, 4, 1, 0, 61, 0, 0, SystemZImpOpBase + 0, 243, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x2cULL }, // Inst #395 = LBMux
6835 { 394, 4, 1, 0, 36, 0, 0, SystemZImpOpBase + 0, 306, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x1dULL }, // Inst #394 = L128
6836 { 393, 3, 1, 0, 96, 0, 0, SystemZImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #393 = IILMux
6837 { 392, 3, 1, 4, 102, 0, 0, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #392 = IILL64
6838 { 391, 3, 1, 4, 101, 0, 0, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #391 = IILH64
6839 { 390, 3, 1, 6, 100, 0, 0, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #390 = IILF64
6840 { 389, 3, 1, 0, 96, 0, 0, SystemZImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #389 = IIHMux
6841 { 388, 3, 1, 4, 99, 0, 0, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #388 = IIHL64
6842 { 387, 3, 1, 4, 98, 0, 0, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #387 = IIHH64
6843 { 386, 3, 1, 6, 97, 0, 0, SystemZImpOpBase + 0, 303, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #386 = IIHF64
6844 { 385, 2, 1, 0, 96, 0, 0, SystemZImpOpBase + 0, 210, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #385 = IIFMux
6845 { 384, 1, 1, 6, 87, 0, 0, SystemZImpOpBase + 0, 302, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #384 = GOT
6846 { 383, 6, 0, 6, 0, 0, 0, SystemZImpOpBase + 0, 296, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #383 = EXRL_Pseudo
6847 { 382, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 12, 165, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x88ULL }, // Inst #382 = DEB_MemFoldPseudo
6848 { 381, 5, 1, 0, 0, 1, 0, SystemZImpOpBase + 12, 156, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x108ULL }, // Inst #381 = DDB_MemFoldPseudo
6849 { 380, 2, 0, 4, 13, 1, 0, SystemZImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #380 = CondTrap
6850 { 379, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 290, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #379 = CondStoreF64Inv
6851 { 378, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 290, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #378 = CondStoreF64
6852 { 377, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 284, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #377 = CondStoreF32Inv
6853 { 376, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 284, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #376 = CondStoreF32
6854 { 375, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 272, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #375 = CondStore8MuxInv
6855 { 374, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 272, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #374 = CondStore8Mux
6856 { 373, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 266, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #373 = CondStore8Inv
6857 { 372, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 266, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #372 = CondStore8
6858 { 371, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 278, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #371 = CondStore64Inv
6859 { 370, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 278, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #370 = CondStore64
6860 { 369, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 272, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #369 = CondStore32MuxInv
6861 { 368, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 272, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #368 = CondStore32Mux
6862 { 367, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 266, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #367 = CondStore32Inv
6863 { 366, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 266, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #366 = CondStore32
6864 { 365, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 272, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #365 = CondStore16MuxInv
6865 { 364, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 272, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #364 = CondStore16Mux
6866 { 363, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 266, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #363 = CondStore16Inv
6867 { 362, 6, 0, 0, 0, 1, 0, SystemZImpOpBase + 0, 266, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #362 = CondStore16
6868 { 361, 2, 0, 4, 23, 1, 0, SystemZImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #361 = CondReturn_XPLINK
6869 { 360, 2, 0, 2, 23, 1, 0, SystemZImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #360 = CondReturn
6870 { 359, 1, 0, 6, 3, 0, 0, SystemZImpOpBase + 0, 262, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #359 = CallJG
6871 { 358, 3, 0, 6, 2, 0, 0, SystemZImpOpBase + 0, 263, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #358 = CallBRCL
6872 { 357, 1, 0, 8, 19, 1, 2, SystemZImpOpBase + 9, 262, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #357 = CallBRASL_XPLINK64
6873 { 356, 1, 0, 6, 19, 1, 2, SystemZImpOpBase + 3, 262, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #356 = CallBRASL
6874 { 355, 1, 0, 2, 5, 0, 0, SystemZImpOpBase + 0, 258, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #355 = CallBR
6875 { 354, 3, 0, 2, 4, 0, 0, SystemZImpOpBase + 0, 259, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x40000ULL }, // Inst #354 = CallBCR
6876 { 353, 1, 0, 4, 20, 1, 2, SystemZImpOpBase + 9, 258, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #353 = CallBASR_XPLINK64
6877 { 352, 1, 0, 4, 20, 1, 2, SystemZImpOpBase + 6, 258, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // Inst #352 = CallBASR_STACKEXT
6878 { 351, 1, 0, 2, 20, 1, 2, SystemZImpOpBase + 3, 258, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #351 = CallBASR
6879 { 350, 3, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 251, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #350 = CRBReturn
6880 { 349, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 247, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #349 = CRBCall
6881 { 348, 4, 0, 0, 219, 0, 1, SystemZImpOpBase + 0, 243, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x388cULL }, // Inst #348 = CMux
6882 { 347, 4, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 254, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #347 = CLSTLoop
6883 { 346, 3, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 251, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #346 = CLRBReturn
6884 { 345, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 247, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #345 = CLRBCall
6885 { 344, 4, 0, 0, 228, 0, 1, SystemZImpOpBase + 0, 243, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x10388cULL }, // Inst #344 = CLMux
6886 { 343, 3, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 230, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #343 = CLIBReturn
6887 { 342, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 226, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #342 = CLIBCall
6888 { 341, 3, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 223, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #341 = CLGRBReturn
6889 { 340, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 219, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #340 = CLGRBCall
6890 { 339, 3, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 216, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #339 = CLGIBReturn
6891 { 338, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 212, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #338 = CLGIBCall
6892 { 337, 2, 0, 0, 230, 0, 1, SystemZImpOpBase + 0, 210, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x103800ULL }, // Inst #337 = CLFIMux
6893 { 336, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 238, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #336 = CLCReg
6894 { 335, 5, 0, 0, 0, 0, 1, SystemZImpOpBase + 0, 233, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #335 = CLCImm
6895 { 334, 3, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 230, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #334 = CIBReturn
6896 { 333, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 226, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #333 = CIBCall
6897 { 332, 2, 0, 0, 221, 0, 1, SystemZImpOpBase + 0, 210, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #332 = CHIMux
6898 { 331, 3, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 223, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #331 = CGRBReturn
6899 { 330, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 219, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #330 = CGRBCall
6900 { 329, 3, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 216, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #329 = CGIBReturn
6901 { 328, 4, 0, 6, 12, 0, 0, SystemZImpOpBase + 0, 212, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #328 = CGIBCall
6902 { 327, 2, 0, 0, 221, 0, 1, SystemZImpOpBase + 0, 210, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x3800ULL }, // Inst #327 = CFIMux
6903 { 326, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 183, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x203c88ULL }, // Inst #326 = A_MemFoldPseudo
6904 { 325, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #325 = ATOMIC_SWAPW
6905 { 324, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #324 = ATOMIC_LOADW_XR
6906 { 323, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 196, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #323 = ATOMIC_LOADW_XILF
6907 { 322, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #322 = ATOMIC_LOADW_UMIN
6908 { 321, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #321 = ATOMIC_LOADW_UMAX
6909 { 320, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #320 = ATOMIC_LOADW_SR
6910 { 319, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #319 = ATOMIC_LOADW_OR
6911 { 318, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 196, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #318 = ATOMIC_LOADW_OILH
6912 { 317, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #317 = ATOMIC_LOADW_NRi
6913 { 316, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #316 = ATOMIC_LOADW_NR
6914 { 315, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 196, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #315 = ATOMIC_LOADW_NILHi
6915 { 314, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 196, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #314 = ATOMIC_LOADW_NILH
6916 { 313, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #313 = ATOMIC_LOADW_MIN
6917 { 312, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #312 = ATOMIC_LOADW_MAX
6918 { 311, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #311 = ATOMIC_LOADW_AR
6919 { 310, 7, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 196, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x4ULL }, // Inst #310 = ATOMIC_LOADW_AFI
6920 { 309, 8, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 188, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #309 = ATOMIC_CMP_SWAPW
6921 { 308, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 183, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x103c88ULL }, // Inst #308 = AL_MemFoldPseudo
6922 { 307, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 175, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x103d0cULL }, // Inst #307 = ALG_MemFoldPseudo
6923 { 306, 3, 1, 0, 112, 0, 1, SystemZImpOpBase + 0, 180, 0|(1ULL<<MCID::Pseudo), 0x203c00ULL }, // Inst #306 = AHIMuxK
6924 { 305, 3, 1, 0, 112, 0, 1, SystemZImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo), 0x203c00ULL }, // Inst #305 = AHIMux
6925 { 304, 5, 1, 0, 0, 0, 1, SystemZImpOpBase + 0, 175, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x203d0cULL }, // Inst #304 = AG_MemFoldPseudo
6926 { 303, 3, 1, 0, 106, 0, 1, SystemZImpOpBase + 0, 172, 0|(1ULL<<MCID::Pseudo), 0x203c00ULL }, // Inst #303 = AFIMux
6927 { 302, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 170, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #302 = AEXT128
6928 { 301, 5, 1, 0, 0, 1, 1, SystemZImpOpBase + 1, 165, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fc88ULL }, // Inst #301 = AEB_MemFoldPseudo
6929 { 300, 4, 1, 0, 1, 0, 0, SystemZImpOpBase + 0, 161, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #300 = ADJDYNALLOC
6930 { 299, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #299 = ADJCALLSTACKUP
6931 { 298, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #298 = ADJCALLSTACKDOWN
6932 { 297, 5, 1, 0, 0, 1, 1, SystemZImpOpBase + 1, 156, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3fd08ULL }, // Inst #297 = ADB_MemFoldPseudo
6933 { 296, 4, 1, 12, 0, 0, 1, SystemZImpOpBase + 0, 152, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #296 = ADA_ENTRY_VALUE
6934 { 295, 4, 1, 12, 0, 0, 1, SystemZImpOpBase + 0, 152, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #295 = ADA_ENTRY
6935 { 294, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 148, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #294 = G_UBFX
6936 { 293, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 148, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #293 = G_SBFX
6937 { 292, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #292 = G_VECREDUCE_UMIN
6938 { 291, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #291 = G_VECREDUCE_UMAX
6939 { 290, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #290 = G_VECREDUCE_SMIN
6940 { 289, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #289 = G_VECREDUCE_SMAX
6941 { 288, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #288 = G_VECREDUCE_XOR
6942 { 287, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #287 = G_VECREDUCE_OR
6943 { 286, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #286 = G_VECREDUCE_AND
6944 { 285, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #285 = G_VECREDUCE_MUL
6945 { 284, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #284 = G_VECREDUCE_ADD
6946 { 283, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #283 = G_VECREDUCE_FMINIMUM
6947 { 282, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #282 = G_VECREDUCE_FMAXIMUM
6948 { 281, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #281 = G_VECREDUCE_FMIN
6949 { 280, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #280 = G_VECREDUCE_FMAX
6950 { 279, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #279 = G_VECREDUCE_FMUL
6951 { 278, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #278 = G_VECREDUCE_FADD
6952 { 277, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 131, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #277 = G_VECREDUCE_SEQ_FMUL
6953 { 276, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 131, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #276 = G_VECREDUCE_SEQ_FADD
6954 { 275, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #275 = G_UBSANTRAP
6955 { 274, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #274 = G_DEBUGTRAP
6956 { 273, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #273 = G_TRAP
6957 { 272, 3, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 58, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #272 = G_BZERO
6958 { 271, 4, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 144, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #271 = G_MEMSET
6959 { 270, 4, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 144, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #270 = G_MEMMOVE
6960 { 269, 3, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 131, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #269 = G_MEMCPY_INLINE
6961 { 268, 4, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 144, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #268 = G_MEMCPY
6962 { 267, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 142, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #267 = G_WRITE_REGISTER
6963 { 266, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #266 = G_READ_REGISTER
6964 { 265, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #265 = G_STRICT_FLDEXP
6965 { 264, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #264 = G_STRICT_FSQRT
6966 { 263, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #263 = G_STRICT_FMA
6967 { 262, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #262 = G_STRICT_FREM
6968 { 261, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #261 = G_STRICT_FDIV
6969 { 260, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #260 = G_STRICT_FMUL
6970 { 259, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #259 = G_STRICT_FSUB
6971 { 258, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #258 = G_STRICT_FADD
6972 { 257, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #257 = G_STACKRESTORE
6973 { 256, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #256 = G_STACKSAVE
6974 { 255, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 69, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #255 = G_DYN_STACKALLOC
6975 { 254, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #254 = G_JUMP_TABLE
6976 { 253, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #253 = G_BLOCK_ADDR
6977 { 252, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #252 = G_ADDRSPACE_CAST
6978 { 251, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #251 = G_FNEARBYINT
6979 { 250, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #250 = G_FRINT
6980 { 249, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #249 = G_FFLOOR
6981 { 248, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #248 = G_FSQRT
6982 { 247, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #247 = G_FTANH
6983 { 246, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #246 = G_FSINH
6984 { 245, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #245 = G_FCOSH
6985 { 244, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #244 = G_FATAN
6986 { 243, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #243 = G_FASIN
6987 { 242, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #242 = G_FACOS
6988 { 241, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #241 = G_FTAN
6989 { 240, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #240 = G_FSIN
6990 { 239, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #239 = G_FCOS
6991 { 238, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #238 = G_FCEIL
6992 { 237, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #237 = G_BITREVERSE
6993 { 236, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #236 = G_BSWAP
6994 { 235, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #235 = G_CTPOP
6995 { 234, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #234 = G_CTLZ_ZERO_UNDEF
6996 { 233, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #233 = G_CTLZ
6997 { 232, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #232 = G_CTTZ_ZERO_UNDEF
6998 { 231, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #231 = G_CTTZ
6999 { 230, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 138, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #230 = G_VECTOR_COMPRESS
7000 { 229, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #229 = G_SPLAT_VECTOR
7001 { 228, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 134, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #228 = G_SHUFFLE_VECTOR
7002 { 227, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 131, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #227 = G_EXTRACT_VECTOR_ELT
7003 { 226, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 127, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #226 = G_INSERT_VECTOR_ELT
7004 { 225, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #225 = G_EXTRACT_SUBVECTOR
7005 { 224, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 63, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #224 = G_INSERT_SUBVECTOR
7006 { 223, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #223 = G_VSCALE
7007 { 222, 3, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 124, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #222 = G_BRJT
7008 { 221, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #221 = G_BR
7009 { 220, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #220 = G_LLROUND
7010 { 219, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #219 = G_LROUND
7011 { 218, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #218 = G_ABS
7012 { 217, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #217 = G_UMAX
7013 { 216, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #216 = G_UMIN
7014 { 215, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #215 = G_SMAX
7015 { 214, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #214 = G_SMIN
7016 { 213, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #213 = G_PTRMASK
7017 { 212, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #212 = G_PTR_ADD
7018 { 211, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #211 = G_RESET_FPMODE
7019 { 210, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #210 = G_SET_FPMODE
7020 { 209, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #209 = G_GET_FPMODE
7021 { 208, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #208 = G_RESET_FPENV
7022 { 207, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #207 = G_SET_FPENV
7023 { 206, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #206 = G_GET_FPENV
7024 { 205, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #205 = G_FMAXIMUM
7025 { 204, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #204 = G_FMINIMUM
7026 { 203, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #203 = G_FMAXNUM_IEEE
7027 { 202, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #202 = G_FMINNUM_IEEE
7028 { 201, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #201 = G_FMAXNUM
7029 { 200, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #200 = G_FMINNUM
7030 { 199, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #199 = G_FCANONICALIZE
7031 { 198, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 98, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #198 = G_IS_FPCLASS
7032 { 197, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #197 = G_FCOPYSIGN
7033 { 196, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #196 = G_FABS
7034 { 195, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #195 = G_UITOFP
7035 { 194, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #194 = G_SITOFP
7036 { 193, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #193 = G_FPTOUI
7037 { 192, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #192 = G_FPTOSI
7038 { 191, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #191 = G_FPTRUNC
7039 { 190, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #190 = G_FPEXT
7040 { 189, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #189 = G_FNEG
7041 { 188, 3, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #188 = G_FFREXP
7042 { 187, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #187 = G_FLDEXP
7043 { 186, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #186 = G_FLOG10
7044 { 185, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #185 = G_FLOG2
7045 { 184, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #184 = G_FLOG
7046 { 183, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #183 = G_FEXP10
7047 { 182, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #182 = G_FEXP2
7048 { 181, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #181 = G_FEXP
7049 { 180, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #180 = G_FPOWI
7050 { 179, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #179 = G_FPOW
7051 { 178, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #178 = G_FREM
7052 { 177, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #177 = G_FDIV
7053 { 176, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #176 = G_FMAD
7054 { 175, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #175 = G_FMA
7055 { 174, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #174 = G_FMUL
7056 { 173, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #173 = G_FSUB
7057 { 172, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #172 = G_FADD
7058 { 171, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #171 = G_UDIVFIXSAT
7059 { 170, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #170 = G_SDIVFIXSAT
7060 { 169, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #169 = G_UDIVFIX
7061 { 168, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #168 = G_SDIVFIX
7062 { 167, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #167 = G_UMULFIXSAT
7063 { 166, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #166 = G_SMULFIXSAT
7064 { 165, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #165 = G_UMULFIX
7065 { 164, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #164 = G_SMULFIX
7066 { 163, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #163 = G_SSHLSAT
7067 { 162, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #162 = G_USHLSAT
7068 { 161, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #161 = G_SSUBSAT
7069 { 160, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #160 = G_USUBSAT
7070 { 159, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #159 = G_SADDSAT
7071 { 158, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #158 = G_UADDSAT
7072 { 157, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #157 = G_SMULH
7073 { 156, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #156 = G_UMULH
7074 { 155, 4, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #155 = G_SMULO
7075 { 154, 4, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #154 = G_UMULO
7076 { 153, 5, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 115, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #153 = G_SSUBE
7077 { 152, 4, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #152 = G_SSUBO
7078 { 151, 5, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 115, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #151 = G_SADDE
7079 { 150, 4, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #150 = G_SADDO
7080 { 149, 5, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 115, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #149 = G_USUBE
7081 { 148, 4, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #148 = G_USUBO
7082 { 147, 5, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 115, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #147 = G_UADDE
7083 { 146, 4, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #146 = G_UADDO
7084 { 145, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #145 = G_SELECT
7085 { 144, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #144 = G_UCMP
7086 { 143, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #143 = G_SCMP
7087 { 142, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 108, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #142 = G_FCMP
7088 { 141, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 108, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #141 = G_ICMP
7089 { 140, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #140 = G_ROTL
7090 { 139, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #139 = G_ROTR
7091 { 138, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 104, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #138 = G_FSHR
7092 { 137, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 104, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #137 = G_FSHL
7093 { 136, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #136 = G_ASHR
7094 { 135, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #135 = G_LSHR
7095 { 134, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #134 = G_SHL
7096 { 133, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #133 = G_ZEXT
7097 { 132, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #132 = G_SEXT_INREG
7098 { 131, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #131 = G_SEXT
7099 { 130, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 98, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #130 = G_VAARG
7100 { 129, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #129 = G_VASTART
7101 { 128, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #128 = G_FCONSTANT
7102 { 127, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #127 = G_CONSTANT
7103 { 126, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #126 = G_TRUNC
7104 { 125, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #125 = G_ANYEXT
7105 { 124, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #124 = G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
7106 { 123, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #123 = G_INTRINSIC_CONVERGENT
7107 { 122, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #122 = G_INTRINSIC_W_SIDE_EFFECTS
7108 { 121, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #121 = G_INTRINSIC
7109 { 120, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #120 = G_INVOKE_REGION_START
7110 { 119, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #119 = G_BRINDIRECT
7111 { 118, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #118 = G_BRCOND
7112 { 117, 4, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 94, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #117 = G_PREFETCH
7113 { 116, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 21, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #116 = G_FENCE
7114 { 115, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #115 = G_ATOMICRMW_UDEC_WRAP
7115 { 114, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #114 = G_ATOMICRMW_UINC_WRAP
7116 { 113, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #113 = G_ATOMICRMW_FMIN
7117 { 112, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #112 = G_ATOMICRMW_FMAX
7118 { 111, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #111 = G_ATOMICRMW_FSUB
7119 { 110, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #110 = G_ATOMICRMW_FADD
7120 { 109, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #109 = G_ATOMICRMW_UMIN
7121 { 108, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #108 = G_ATOMICRMW_UMAX
7122 { 107, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #107 = G_ATOMICRMW_MIN
7123 { 106, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #106 = G_ATOMICRMW_MAX
7124 { 105, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #105 = G_ATOMICRMW_XOR
7125 { 104, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #104 = G_ATOMICRMW_OR
7126 { 103, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #103 = G_ATOMICRMW_NAND
7127 { 102, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #102 = G_ATOMICRMW_AND
7128 { 101, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #101 = G_ATOMICRMW_SUB
7129 { 100, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #100 = G_ATOMICRMW_ADD
7130 { 99, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #99 = G_ATOMICRMW_XCHG
7131 { 98, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #98 = G_ATOMIC_CMPXCHG
7132 { 97, 5, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #97 = G_ATOMIC_CMPXCHG_WITH_SUCCESS
7133 { 96, 5, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 77, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #96 = G_INDEXED_STORE
7134 { 95, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #95 = G_STORE
7135 { 94, 5, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 72, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #94 = G_INDEXED_ZEXTLOAD
7136 { 93, 5, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 72, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #93 = G_INDEXED_SEXTLOAD
7137 { 92, 5, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 72, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #92 = G_INDEXED_LOAD
7138 { 91, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #91 = G_ZEXTLOAD
7139 { 90, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #90 = G_SEXTLOAD
7140 { 89, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #89 = G_LOAD
7141 { 88, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #88 = G_READSTEADYCOUNTER
7142 { 87, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #87 = G_READCYCLECOUNTER
7143 { 86, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #86 = G_INTRINSIC_ROUNDEVEN
7144 { 85, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #85 = G_INTRINSIC_LLRINT
7145 { 84, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #84 = G_INTRINSIC_LRINT
7146 { 83, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #83 = G_INTRINSIC_ROUND
7147 { 82, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #82 = G_INTRINSIC_TRUNC
7148 { 81, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 69, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #81 = G_INTRINSIC_FPTRUNC_ROUND
7149 { 80, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #80 = G_CONSTANT_FOLD_BARRIER
7150 { 79, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #79 = G_FREEZE
7151 { 78, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #78 = G_BITCAST
7152 { 77, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #77 = G_INTTOPTR
7153 { 76, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #76 = G_PTRTOINT
7154 { 75, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #75 = G_CONCAT_VECTORS
7155 { 74, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #74 = G_BUILD_VECTOR_TRUNC
7156 { 73, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #73 = G_BUILD_VECTOR
7157 { 72, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #72 = G_MERGE_VALUES
7158 { 71, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 63, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #71 = G_INSERT
7159 { 70, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #70 = G_UNMERGE_VALUES
7160 { 69, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 58, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #69 = G_EXTRACT
7161 { 68, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #68 = G_CONSTANT_POOL
7162 { 67, 5, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 53, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #67 = G_PTRAUTH_GLOBAL_VALUE
7163 { 66, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #66 = G_GLOBAL_VALUE
7164 { 65, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #65 = G_FRAME_INDEX
7165 { 64, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #64 = G_PHI
7166 { 63, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #63 = G_IMPLICIT_DEF
7167 { 62, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #62 = G_XOR
7168 { 61, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #61 = G_OR
7169 { 60, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #60 = G_AND
7170 { 59, 4, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #59 = G_UDIVREM
7171 { 58, 4, 2, 0, 0, 0, 0, SystemZImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #58 = G_SDIVREM
7172 { 57, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #57 = G_UREM
7173 { 56, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #56 = G_SREM
7174 { 55, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #55 = G_UDIV
7175 { 54, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #54 = G_SDIV
7176 { 53, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #53 = G_MUL
7177 { 52, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #52 = G_SUB
7178 { 51, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #51 = G_ADD
7179 { 50, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #50 = G_ASSERT_ALIGN
7180 { 49, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #49 = G_ASSERT_ZEXT
7181 { 48, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #48 = G_ASSERT_SEXT
7182 { 47, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #47 = CONVERGENCECTRL_GLUE
7183 { 46, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #46 = CONVERGENCECTRL_LOOP
7184 { 45, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #45 = CONVERGENCECTRL_ANCHOR
7185 { 44, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #44 = CONVERGENCECTRL_ENTRY
7186 { 43, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #43 = JUMP_TABLE_DEBUG_INFO
7187 { 42, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #42 = MEMBARRIER
7188 { 41, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #41 = ICALL_BRANCH_FUNNEL
7189 { 40, 3, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 37, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #40 = PATCHABLE_TYPED_EVENT_CALL
7190 { 39, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 35, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #39 = PATCHABLE_EVENT_CALL
7191 { 38, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #38 = PATCHABLE_TAIL_CALL
7192 { 37, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #37 = PATCHABLE_FUNCTION_EXIT
7193 { 36, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #36 = PATCHABLE_RET
7194 { 35, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #35 = PATCHABLE_FUNCTION_ENTER
7195 { 34, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #34 = PATCHABLE_OP
7196 { 33, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #33 = FAULTING_OP
7197 { 32, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 33, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #32 = LOCAL_ESCAPE
7198 { 31, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #31 = STATEPOINT
7199 { 30, 3, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 30, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #30 = PREALLOCATED_ARG
7200 { 29, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #29 = PREALLOCATED_SETUP
7201 { 28, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 29, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #28 = LOAD_STACK_GUARD
7202 { 27, 6, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 23, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #27 = PATCHPOINT
7203 { 26, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #26 = FENTRY_CALL
7204 { 25, 2, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #25 = STACKMAP
7205 { 24, 2, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 19, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #24 = ARITH_FENCE
7206 { 23, 4, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 15, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #23 = PSEUDO_PROBE
7207 { 22, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #22 = LIFETIME_END
7208 { 21, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #21 = LIFETIME_START
7209 { 20, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #20 = BUNDLE
7210 { 19, 2, 1, 0, 29, 0, 0, SystemZImpOpBase + 0, 13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #19 = COPY
7211 { 18, 2, 1, 0, 32, 0, 0, SystemZImpOpBase + 0, 13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #18 = REG_SEQUENCE
7212 { 17, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #17 = DBG_LABEL
7213 { 16, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #16 = DBG_PHI
7214 { 15, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #15 = DBG_INSTR_REF
7215 { 14, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #14 = DBG_VALUE_LIST
7216 { 13, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #13 = DBG_VALUE
7217 { 12, 3, 1, 0, 29, 0, 0, SystemZImpOpBase + 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #12 = COPY_TO_REGCLASS
7218 { 11, 4, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 9, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #11 = SUBREG_TO_REG
7219 { 10, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #10 = IMPLICIT_DEF
7220 { 9, 4, 1, 0, 31, 0, 0, SystemZImpOpBase + 0, 5, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #9 = INSERT_SUBREG
7221 { 8, 3, 1, 0, 30, 0, 0, SystemZImpOpBase + 0, 2, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #8 = EXTRACT_SUBREG
7222 { 7, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #7 = KILL
7223 { 6, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #6 = ANNOTATION_LABEL
7224 { 5, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #5 = GC_LABEL
7225 { 4, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #4 = EH_LABEL
7226 { 3, 1, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #3 = CFI_INSTRUCTION
7227 { 2, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2 = INLINEASM_BR
7228 { 1, 0, 0, 0, 0, 0, 0, SystemZImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #1 = INLINEASM
7229 { 0, 1, 1, 0, 0, 0, 0, SystemZImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #0 = PHI
7230 }, {
7231 /* 0 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7232 /* 1 */
7233 /* 1 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7234 /* 2 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7235 /* 5 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7236 /* 9 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7237 /* 13 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7238 /* 15 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7239 /* 19 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) },
7240 /* 21 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7241 /* 23 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7242 /* 29 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 },
7243 /* 30 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7244 /* 33 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7245 /* 35 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7246 /* 37 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7247 /* 40 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
7248 /* 43 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7249 /* 46 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7250 /* 50 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7251 /* 51 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7252 /* 53 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7253 /* 58 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
7254 /* 61 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7255 /* 63 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
7256 /* 67 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7257 /* 69 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7258 /* 72 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7259 /* 77 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7260 /* 82 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7261 /* 87 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7262 /* 91 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7263 /* 94 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7264 /* 98 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7265 /* 101 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7266 /* 104 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7267 /* 108 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7268 /* 112 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7269 /* 115 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7270 /* 120 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
7271 /* 124 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7272 /* 127 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 },
7273 /* 131 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 },
7274 /* 134 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7275 /* 138 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7276 /* 142 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7277 /* 144 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
7278 /* 148 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7279 /* 152 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7280 /* 156 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7281 /* 161 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7282 /* 165 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7283 /* 170 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7284 /* 172 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7285 /* 175 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7286 /* 180 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7287 /* 183 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7288 /* 188 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7289 /* 196 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7290 /* 203 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7291 /* 210 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7292 /* 212 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7293 /* 216 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7294 /* 219 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7295 /* 223 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7296 /* 226 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7297 /* 230 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7298 /* 233 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7299 /* 238 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7300 /* 243 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7301 /* 247 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7302 /* 251 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7303 /* 254 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7304 /* 258 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7305 /* 259 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7306 /* 262 */ { -1, 0, MCOI::OPERAND_PCREL, 0 },
7307 /* 263 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7308 /* 266 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7309 /* 272 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7310 /* 278 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7311 /* 284 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7312 /* 290 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7313 /* 296 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7314 /* 302 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7315 /* 303 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7316 /* 306 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7317 /* 310 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7318 /* 312 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7319 /* 314 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7320 /* 316 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7321 /* 322 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7322 /* 327 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7323 /* 333 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7324 /* 339 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7325 /* 344 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7326 /* 345 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7327 /* 346 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7328 /* 347 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7329 /* 351 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7330 /* 357 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7331 /* 363 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7332 /* 367 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7333 /* 371 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7334 /* 375 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7335 /* 379 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7336 /* 382 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7337 /* 385 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7338 /* 391 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7339 /* 397 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7340 /* 403 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7341 /* 409 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7342 /* 415 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7343 /* 417 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7344 /* 422 */ { SystemZ::GRX32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7345 /* 427 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7346 /* 432 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7347 /* 437 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7348 /* 442 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7349 /* 447 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7350 /* 452 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7351 /* 457 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7352 /* 462 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7353 /* 467 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7354 /* 470 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7355 /* 472 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7356 /* 476 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7357 /* 480 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7358 /* 482 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7359 /* 484 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7360 /* 487 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7361 /* 492 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7362 /* 497 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7363 /* 500 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7364 /* 503 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7365 /* 507 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7366 /* 512 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7367 /* 515 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7368 /* 518 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7369 /* 523 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7370 /* 526 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7371 /* 529 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7372 /* 532 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7373 /* 535 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7374 /* 538 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7375 /* 541 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7376 /* 544 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7377 /* 550 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7378 /* 553 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7379 /* 556 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7380 /* 560 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7381 /* 563 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7382 /* 565 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7383 /* 567 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7384 /* 572 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7385 /* 576 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7386 /* 579 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7387 /* 581 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7388 /* 584 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7389 /* 588 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7390 /* 591 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7391 /* 594 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7392 /* 596 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7393 /* 599 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7394 /* 602 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7395 /* 605 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7396 /* 609 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7397 /* 613 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7398 /* 618 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7399 /* 623 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7400 /* 627 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7401 /* 631 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7402 /* 633 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7403 /* 635 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7404 /* 639 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7405 /* 641 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7406 /* 645 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7407 /* 650 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7408 /* 655 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7409 /* 659 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7410 /* 661 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7411 /* 663 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7412 /* 667 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7413 /* 669 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7414 /* 673 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7415 /* 675 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7416 /* 677 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7417 /* 680 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7418 /* 684 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7419 /* 687 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7420 /* 691 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7421 /* 693 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7422 /* 696 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7423 /* 700 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7424 /* 703 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7425 /* 707 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7426 /* 710 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7427 /* 714 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7428 /* 716 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7429 /* 718 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7430 /* 723 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7431 /* 727 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7432 /* 731 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7433 /* 734 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7434 /* 739 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7435 /* 743 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7436 /* 747 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7437 /* 750 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7438 /* 753 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7439 /* 757 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7440 /* 761 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7441 /* 763 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7442 /* 765 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7443 /* 767 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7444 /* 772 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7445 /* 776 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7446 /* 778 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7447 /* 782 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7448 /* 785 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) },
7449 /* 789 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7450 /* 794 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) },
7451 /* 798 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7452 /* 804 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7453 /* 808 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7454 /* 811 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7455 /* 815 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7456 /* 817 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7457 /* 822 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7458 /* 826 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7459 /* 830 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7460 /* 833 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) },
7461 /* 837 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7462 /* 841 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7463 /* 844 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7464 /* 847 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7465 /* 850 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7466 /* 853 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7467 /* 858 */ { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7468 /* 860 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7469 /* 864 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7470 /* 867 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7471 /* 870 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7472 /* 873 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7473 /* 878 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7474 /* 881 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7475 /* 886 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7476 /* 888 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7477 /* 890 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7478 /* 892 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7479 /* 896 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7480 /* 898 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7481 /* 902 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7482 /* 904 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7483 /* 909 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7484 /* 914 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7485 /* 919 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7486 /* 924 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7487 /* 927 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7488 /* 929 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7489 /* 933 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7490 /* 935 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7491 /* 936 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
7492 /* 938 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7493 /* 940 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7494 /* 944 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7495 /* 946 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7496 /* 949 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7497 /* 953 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7498 /* 956 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7499 /* 960 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7500 /* 963 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7501 /* 967 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7502 /* 972 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7503 /* 977 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7504 /* 981 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7505 /* 985 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7506 /* 988 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7507 /* 991 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7508 /* 995 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 },
7509 /* 998 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7510 /* 1004 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7511 /* 1007 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7512 /* 1012 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7513 /* 1018 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7514 /* 1023 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7515 /* 1028 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7516 /* 1034 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7517 /* 1037 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7518 /* 1041 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7519 /* 1048 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7520 /* 1053 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7521 /* 1059 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7522 /* 1065 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7523 /* 1072 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::AnyRegBitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7524 /* 1078 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7525 /* 1084 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7526 /* 1090 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7527 /* 1095 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
7528 /* 1098 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(2) },
7529 /* 1104 */ { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7530 /* 1108 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7531 /* 1112 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7532 /* 1117 */ { SystemZ::CR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::CR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7533 /* 1121 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7534 /* 1123 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7535 /* 1126 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7536 /* 1128 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7537 /* 1130 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7538 /* 1134 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7539 /* 1136 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7540 /* 1142 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7541 /* 1146 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7542 /* 1152 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7543 /* 1157 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7544 /* 1161 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7545 /* 1167 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7546 /* 1172 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7547 /* 1176 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7548 /* 1181 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7549 /* 1185 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7550 /* 1188 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7551 /* 1194 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7552 /* 1199 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7553 /* 1203 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7554 /* 1208 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7555 /* 1212 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7556 /* 1217 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7557 /* 1221 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7558 /* 1226 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7559 /* 1230 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7560 /* 1235 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7561 /* 1239 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7562 /* 1244 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7563 /* 1248 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7564 /* 1253 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7565 /* 1258 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7566 /* 1260 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7567 /* 1263 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7568 /* 1265 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7569 /* 1271 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7570 /* 1275 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7571 /* 1281 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7572 /* 1285 */ { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7573 /* 1288 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7574 /* 1289 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7575 /* 1295 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7576 /* 1300 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7577 /* 1303 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7578 /* 1308 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7579 /* 1311 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
7580 /* 1314 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7581 /* 1319 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7582 /* 1325 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
7583 /* 1327 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7584 /* 1332 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7585 /* 1338 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7586 /* 1344 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7587 /* 1350 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7588 /* 1354 */ { SystemZ::AR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7589 /* 1356 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7590 /* 1361 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7591 /* 1365 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7592 /* 1369 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7593 /* 1373 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7594 /* 1377 */ { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::FP128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7595 /* 1382 */ { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7596 /* 1384 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7597 /* 1390 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7598 /* 1393 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7599 /* 1398 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7600 /* 1403 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7601 /* 1407 */ { SystemZ::GRH32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7602 /* 1410 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7603 /* 1415 */ { SystemZ::FP32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { SystemZ::FP64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7604 /* 1418 */ { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7605 /* 1421 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) },
7606 /* 1425 */ { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7607 /* 1430 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7608 /* 1434 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) },
7609 /* 1437 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7610 /* 1441 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7611 /* 1444 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7612 /* 1449 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7613 /* 1453 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7614 /* 1458 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7615 /* 1462 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7616 /* 1465 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7617 /* 1468 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7618 /* 1471 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7619 /* 1475 */ { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7620 /* 1479 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7621 /* 1483 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7622 /* 1487 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7623 /* 1493 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7624 /* 1498 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7625 /* 1503 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7626 /* 1507 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7627 /* 1513 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7628 /* 1519 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7629 /* 1521 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7630 /* 1527 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7631 /* 1531 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7632 /* 1534 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 },
7633 /* 1538 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7634 /* 1543 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7635 /* 1549 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7636 /* 1553 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7637 /* 1558 */ { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7638 /* 1562 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7639 /* 1566 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7640 /* 1570 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7641 /* 1575 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7642 /* 1579 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7643 /* 1585 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7644 /* 1590 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR32BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 },
7645 /* 1595 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::GR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7646 /* 1598 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7647 /* 1599 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::ADDR64BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7648 /* 1604 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7649 /* 1608 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7650 /* 1612 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7651 /* 1615 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7652 /* 1618 */ { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7653 /* 1620 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7654 /* 1622 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7655 /* 1626 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR128BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7656 /* 1630 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7657 /* 1634 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7658 /* 1638 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7659 /* 1642 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7660 /* 1646 */ { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR64BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7661 /* 1649 */ { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { SystemZ::VR32BitRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7662 }, {
7663 /* 0 */
7664 /* 0 */ SystemZ::CC,
7665 /* 1 */ SystemZ::FPC, SystemZ::CC,
7666 /* 3 */ SystemZ::FPC, SystemZ::R14D, SystemZ::CC,
7667 /* 6 */ SystemZ::FPC, SystemZ::R3D, SystemZ::CC,
7668 /* 9 */ SystemZ::FPC, SystemZ::R7D, SystemZ::CC,
7669 /* 12 */ SystemZ::FPC,
7670 /* 13 */ SystemZ::R15D, SystemZ::R15D, SystemZ::CC,
7671 /* 16 */ SystemZ::R15D, SystemZ::R1D, SystemZ::R15D, SystemZ::CC,
7672 /* 20 */ SystemZ::R14D, SystemZ::CC,
7673 /* 22 */ SystemZ::R3D, SystemZ::R4D, SystemZ::R3D, SystemZ::CC,
7674 /* 26 */ SystemZ::CC, SystemZ::CC,
7675 /* 28 */ SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::CC, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D,
7676 /* 35 */ SystemZ::R0L, SystemZ::CC,
7677 /* 37 */ SystemZ::R0L, SystemZ::R1D, SystemZ::CC, SystemZ::R1D,
7678 /* 41 */ SystemZ::R1L, SystemZ::CC,
7679 /* 43 */ SystemZ::R0L, SystemZ::R1D, SystemZ::CC,
7680 /* 46 */ SystemZ::R0L, SystemZ::R1L, SystemZ::CC,
7681 /* 49 */ SystemZ::R0D, SystemZ::R1D,
7682 /* 51 */ SystemZ::R2L, SystemZ::R2L,
7683 /* 53 */ SystemZ::R0L, SystemZ::R1L,
7684 /* 55 */ SystemZ::R0L,
7685 /* 56 */ SystemZ::R0D, SystemZ::R1D, SystemZ::R0D, SystemZ::CC,
7686 /* 60 */ SystemZ::R0L, SystemZ::R1D,
7687 /* 62 */ SystemZ::FPC, SystemZ::R0L, SystemZ::F4Q, SystemZ::CC, SystemZ::R1L, SystemZ::F0Q,
7688 /* 68 */ SystemZ::R0D, SystemZ::R0D, SystemZ::CC,
7689 /* 71 */ SystemZ::R1L,
7690 /* 72 */ SystemZ::R1L, SystemZ::R2D,
7691 /* 74 */ SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::CC,
7692 /* 79 */ SystemZ::FPC, SystemZ::FPC,
7693 /* 81 */ SystemZ::R0L, SystemZ::R1L, SystemZ::R0L, SystemZ::CC,
7694 /* 85 */ SystemZ::CC, SystemZ::R0L, SystemZ::R1D,
7695 /* 88 */ SystemZ::R1D, SystemZ::CC,
7696 /* 90 */ SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::CC, SystemZ::R0D, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::R5D,
7697 }
7698};
7699
7700
7701#ifdef __GNUC__
7702#pragma GCC diagnostic push
7703#pragma GCC diagnostic ignored "-Woverlength-strings"
7704#endif
7705extern const char SystemZInstrNameData[] = {
7706 /* 0 */ "G_FLOG10\0"
7707 /* 9 */ "G_FEXP10\0"
7708 /* 18 */ "CU21\0"
7709 /* 23 */ "SAM31\0"
7710 /* 29 */ "CU41\0"
7711 /* 34 */ "CU12\0"
7712 /* 39 */ "IC32\0"
7713 /* 44 */ "LDE32\0"
7714 /* 50 */ "CondStoreF32\0"
7715 /* 63 */ "SelectF32\0"
7716 /* 73 */ "RISBG32\0"
7717 /* 81 */ "VL32\0"
7718 /* 86 */ "VLVGP32\0"
7719 /* 94 */ "LDR32\0"
7720 /* 100 */ "VLR32\0"
7721 /* 106 */ "SelectVR32\0"
7722 /* 117 */ "VST32\0"
7723 /* 123 */ "LCDFR_32\0"
7724 /* 132 */ "LNDFR_32\0"
7725 /* 141 */ "LPDFR_32\0"
7726 /* 150 */ "CondStore32\0"
7727 /* 162 */ "Select32\0"
7728 /* 171 */ "CU42\0"
7729 /* 176 */ "G_FLOG2\0"
7730 /* 184 */ "TRAP2\0"
7731 /* 190 */ "G_FEXP2\0"
7732 /* 198 */ "CU14\0"
7733 /* 203 */ "SAM24\0"
7734 /* 209 */ "CU24\0"
7735 /* 214 */ "IIHF64\0"
7736 /* 221 */ "NIHF64\0"
7737 /* 228 */ "OIHF64\0"
7738 /* 235 */ "XIHF64\0"
7739 /* 242 */ "IILF64\0"
7740 /* 249 */ "NILF64\0"
7741 /* 256 */ "OILF64\0"
7742 /* 263 */ "XILF64\0"
7743 /* 270 */ "CondStoreF64\0"
7744 /* 283 */ "SelectF64\0"
7745 /* 293 */ "IIHH64\0"
7746 /* 300 */ "NIHH64\0"
7747 /* 307 */ "OIHH64\0"
7748 /* 314 */ "TMHH64\0"
7749 /* 321 */ "IILH64\0"
7750 /* 328 */ "NILH64\0"
7751 /* 335 */ "OILH64\0"
7752 /* 342 */ "TMLH64\0"
7753 /* 349 */ "CallBRASL_XPLINK64\0"
7754 /* 368 */ "CallBASR_XPLINK64\0"
7755 /* 386 */ "IIHL64\0"
7756 /* 393 */ "NIHL64\0"
7757 /* 400 */ "OIHL64\0"
7758 /* 407 */ "TMHL64\0"
7759 /* 414 */ "IILL64\0"
7760 /* 421 */ "NILL64\0"
7761 /* 428 */ "OILL64\0"
7762 /* 435 */ "TMLL64\0"
7763 /* 442 */ "VL64\0"
7764 /* 447 */ "SAM64\0"
7765 /* 453 */ "VLR64\0"
7766 /* 459 */ "SelectVR64\0"
7767 /* 470 */ "VST64\0"
7768 /* 476 */ "CondStore64\0"
7769 /* 488 */ "Select64\0"
7770 /* 497 */ "TRAP4\0"
7771 /* 503 */ "CondStore16\0"
7772 /* 515 */ "SelectF128\0"
7773 /* 526 */ "L128\0"
7774 /* 531 */ "PAIR128\0"
7775 /* 539 */ "SelectVR128\0"
7776 /* 551 */ "ST128\0"
7777 /* 557 */ "AEXT128\0"
7778 /* 565 */ "ZEXT128\0"
7779 /* 573 */ "Select128\0"
7780 /* 583 */ "CondStore8\0"
7781 /* 594 */ "LAA\0"
7782 /* 598 */ "PROBED_ALLOCA\0"
7783 /* 612 */ "SLDA\0"
7784 /* 617 */ "SRDA\0"
7785 /* 622 */ "ESEA\0"
7786 /* 627 */ "LPTEA\0"
7787 /* 633 */ "VFA\0"
7788 /* 637 */ "SIGA\0"
7789 /* 642 */ "ECPGA\0"
7790 /* 648 */ "UNPKA\0"
7791 /* 654 */ "SPKA\0"
7792 /* 659 */ "SLA\0"
7793 /* 663 */ "VGFMA\0"
7794 /* 669 */ "VFMA\0"
7795 /* 674 */ "G_FMA\0"
7796 /* 680 */ "G_STRICT_FMA\0"
7797 /* 693 */ "KMA\0"
7798 /* 697 */ "VFNMA\0"
7799 /* 703 */ "NNPA\0"
7800 /* 708 */ "PPA\0"
7801 /* 712 */ "LEDBRA\0"
7802 /* 719 */ "CFDBRA\0"
7803 /* 726 */ "CGDBRA\0"
7804 /* 733 */ "FIDBRA\0"
7805 /* 740 */ "CFEBRA\0"
7806 /* 747 */ "CGEBRA\0"
7807 /* 754 */ "FIEBRA\0"
7808 /* 761 */ "CDFBRA\0"
7809 /* 768 */ "CEFBRA\0"
7810 /* 775 */ "CXFBRA\0"
7811 /* 782 */ "CDGBRA\0"
7812 /* 789 */ "CEGBRA\0"
7813 /* 796 */ "CXGBRA\0"
7814 /* 803 */ "LDXBRA\0"
7815 /* 810 */ "LEXBRA\0"
7816 /* 817 */ "CFXBRA\0"
7817 /* 824 */ "CGXBRA\0"
7818 /* 831 */ "FIXBRA\0"
7819 /* 838 */ "LRA\0"
7820 /* 842 */ "VESRA\0"
7821 /* 848 */ "VSRA\0"
7822 /* 853 */ "ADTRA\0"
7823 /* 859 */ "DDTRA\0"
7824 /* 865 */ "CGDTRA\0"
7825 /* 872 */ "MDTRA\0"
7826 /* 878 */ "SDTRA\0"
7827 /* 884 */ "CDGTRA\0"
7828 /* 891 */ "CXGTRA\0"
7829 /* 898 */ "AXTRA\0"
7830 /* 904 */ "DXTRA\0"
7831 /* 910 */ "CGXTRA\0"
7832 /* 917 */ "MXTRA\0"
7833 /* 923 */ "SXTRA\0"
7834 /* 929 */ "LURA\0"
7835 /* 934 */ "STURA\0"
7836 /* 940 */ "BSA\0"
7837 /* 944 */ "KDSA\0"
7838 /* 949 */ "ESTA\0"
7839 /* 954 */ "MSTA\0"
7840 /* 959 */ "VA\0"
7841 /* 962 */ "CPYA\0"
7842 /* 967 */ "VGFMAB\0"
7843 /* 974 */ "VESRAB\0"
7844 /* 981 */ "VSRAB\0"
7845 /* 987 */ "VAB\0"
7846 /* 991 */ "LCBB\0"
7847 /* 996 */ "VLBB\0"
7848 /* 1001 */ "VACCB\0"
7849 /* 1007 */ "VECB\0"
7850 /* 1012 */ "VLCB\0"
7851 /* 1017 */ "VSTRCB\0"
7852 /* 1024 */ "VFADB\0"
7853 /* 1030 */ "WFADB\0"
7854 /* 1036 */ "VFMADB\0"
7855 /* 1043 */ "WFMADB\0"
7856 /* 1050 */ "VFNMADB\0"
7857 /* 1058 */ "WFNMADB\0"
7858 /* 1066 */ "WFCDB\0"
7859 /* 1072 */ "VFLCDB\0"
7860 /* 1079 */ "WFLCDB\0"
7861 /* 1086 */ "TCDB\0"
7862 /* 1091 */ "VFDDB\0"
7863 /* 1097 */ "WFDDB\0"
7864 /* 1103 */ "VFCEDB\0"
7865 /* 1110 */ "WFCEDB\0"
7866 /* 1117 */ "VFCHEDB\0"
7867 /* 1125 */ "WFCHEDB\0"
7868 /* 1133 */ "VFKHEDB\0"
7869 /* 1141 */ "WFKHEDB\0"
7870 /* 1149 */ "VFKEDB\0"
7871 /* 1156 */ "WFKEDB\0"
7872 /* 1163 */ "VLEDB\0"
7873 /* 1169 */ "WLEDB\0"
7874 /* 1175 */ "VCGDB\0"
7875 /* 1181 */ "WCGDB\0"
7876 /* 1187 */ "VCLGDB\0"
7877 /* 1194 */ "WCLGDB\0"
7878 /* 1201 */ "VFCHDB\0"
7879 /* 1208 */ "WFCHDB\0"
7880 /* 1215 */ "VFKHDB\0"
7881 /* 1222 */ "WFKHDB\0"
7882 /* 1229 */ "VFTCIDB\0"
7883 /* 1237 */ "WFTCIDB\0"
7884 /* 1245 */ "VFIDB\0"
7885 /* 1251 */ "WFIDB\0"
7886 /* 1257 */ "WFKDB\0"
7887 /* 1263 */ "VSLDB\0"
7888 /* 1269 */ "VFMDB\0"
7889 /* 1275 */ "WFMDB\0"
7890 /* 1281 */ "VFMINDB\0"
7891 /* 1289 */ "WFMINDB\0"
7892 /* 1297 */ "VFLNDB\0"
7893 /* 1304 */ "WFLNDB\0"
7894 /* 1311 */ "VFPSODB\0"
7895 /* 1319 */ "WFPSODB\0"
7896 /* 1327 */ "VFLPDB\0"
7897 /* 1334 */ "WFLPDB\0"
7898 /* 1341 */ "VFSQDB\0"
7899 /* 1348 */ "WFSQDB\0"
7900 /* 1355 */ "VFSDB\0"
7901 /* 1361 */ "WFSDB\0"
7902 /* 1367 */ "VFMSDB\0"
7903 /* 1374 */ "WFMSDB\0"
7904 /* 1381 */ "VFNMSDB\0"
7905 /* 1389 */ "WFNMSDB\0"
7906 /* 1397 */ "VFMAXDB\0"
7907 /* 1405 */ "WFMAXDB\0"
7908 /* 1413 */ "LXDB\0"
7909 /* 1418 */ "MXDB\0"
7910 /* 1423 */ "VFAEB\0"
7911 /* 1429 */ "VMAEB\0"
7912 /* 1435 */ "TCEB\0"
7913 /* 1440 */ "VLDEB\0"
7914 /* 1446 */ "WLDEB\0"
7915 /* 1452 */ "MDEB\0"
7916 /* 1457 */ "VFEEB\0"
7917 /* 1463 */ "MEEB\0"
7918 /* 1468 */ "VCFEB\0"
7919 /* 1474 */ "WCFEB\0"
7920 /* 1480 */ "VCLFEB\0"
7921 /* 1487 */ "WCLFEB\0"
7922 /* 1494 */ "KEB\0"
7923 /* 1498 */ "VMALEB\0"
7924 /* 1505 */ "VMLEB\0"
7925 /* 1511 */ "VLEB\0"
7926 /* 1516 */ "VMEB\0"
7927 /* 1521 */ "VFENEB\0"
7928 /* 1528 */ "SQEB\0"
7929 /* 1533 */ "MSEB\0"
7930 /* 1538 */ "VSTEB\0"
7931 /* 1544 */ "LXEB\0"
7932 /* 1549 */ "VCEFB\0"
7933 /* 1555 */ "WCEFB\0"
7934 /* 1561 */ "VCELFB\0"
7935 /* 1568 */ "WCELFB\0"
7936 /* 1575 */ "VCDGB\0"
7937 /* 1581 */ "WCDGB\0"
7938 /* 1587 */ "VSEGB\0"
7939 /* 1593 */ "VCDLGB\0"
7940 /* 1600 */ "WCDLGB\0"
7941 /* 1607 */ "VAVGB\0"
7942 /* 1613 */ "VLVGB\0"
7943 /* 1619 */ "VMAHB\0"
7944 /* 1625 */ "VCHB\0"
7945 /* 1630 */ "VMALHB\0"
7946 /* 1637 */ "VMLHB\0"
7947 /* 1643 */ "VUPLHB\0"
7948 /* 1650 */ "VMHB\0"
7949 /* 1655 */ "VUPHB\0"
7950 /* 1661 */ "VMRHB\0"
7951 /* 1667 */ "VSCBIB\0"
7952 /* 1674 */ "CIB\0"
7953 /* 1678 */ "VLEIB\0"
7954 /* 1684 */ "CGIB\0"
7955 /* 1689 */ "CLGIB\0"
7956 /* 1695 */ "CLIB\0"
7957 /* 1700 */ "VREPIB\0"
7958 /* 1707 */ "VMALB\0"
7959 /* 1713 */ "PALB\0"
7960 /* 1718 */ "VECLB\0"
7961 /* 1724 */ "VAVGLB\0"
7962 /* 1731 */ "VCHLB\0"
7963 /* 1737 */ "VUPLLB\0"
7964 /* 1744 */ "VERLLB\0"
7965 /* 1751 */ "VMLB\0"
7966 /* 1756 */ "VMNLB\0"
7967 /* 1762 */ "VUPLB\0"
7968 /* 1768 */ "VMRLB\0"
7969 /* 1774 */ "VESRLB\0"
7970 /* 1781 */ "VSRLB\0"
7971 /* 1787 */ "VESLB\0"
7972 /* 1793 */ "VSLB\0"
7973 /* 1798 */ "PTLB\0"
7974 /* 1803 */ "VMXLB\0"
7975 /* 1809 */ "VGFMB\0"
7976 /* 1815 */ "VGMB\0"
7977 /* 1820 */ "VERIMB\0"
7978 /* 1827 */ "SRNMB\0"
7979 /* 1833 */ "VSUMB\0"
7980 /* 1839 */ "VMNB\0"
7981 /* 1844 */ "VMAOB\0"
7982 /* 1850 */ "VMALOB\0"
7983 /* 1857 */ "VMLOB\0"
7984 /* 1863 */ "VMOB\0"
7985 /* 1868 */ "VLREPB\0"
7986 /* 1875 */ "VREPB\0"
7987 /* 1881 */ "VLPB\0"
7988 /* 1886 */ "VCEQB\0"
7989 /* 1892 */ "CRB\0"
7990 /* 1896 */ "CGRB\0"
7991 /* 1901 */ "CLGRB\0"
7992 /* 1907 */ "CLRB\0"
7993 /* 1912 */ "VISTRB\0"
7994 /* 1919 */ "VFASB\0"
7995 /* 1925 */ "WFASB\0"
7996 /* 1931 */ "VFMASB\0"
7997 /* 1938 */ "WFMASB\0"
7998 /* 1945 */ "VFNMASB\0"
7999 /* 1953 */ "WFNMASB\0"
8000 /* 1961 */ "WFCSB\0"
8001 /* 1967 */ "VFLCSB\0"
8002 /* 1974 */ "WFLCSB\0"
8003 /* 1981 */ "VFDSB\0"
8004 /* 1987 */ "WFDSB\0"
8005 /* 1993 */ "VFCESB\0"
8006 /* 2000 */ "WFCESB\0"
8007 /* 2007 */ "VFCHESB\0"
8008 /* 2015 */ "WFCHESB\0"
8009 /* 2023 */ "VFKHESB\0"
8010 /* 2031 */ "WFKHESB\0"
8011 /* 2039 */ "VFKESB\0"
8012 /* 2046 */ "WFKESB\0"
8013 /* 2053 */ "VFCHSB\0"
8014 /* 2060 */ "WFCHSB\0"
8015 /* 2067 */ "VFKHSB\0"
8016 /* 2074 */ "WFKHSB\0"
8017 /* 2081 */ "VFTCISB\0"
8018 /* 2089 */ "WFTCISB\0"
8019 /* 2097 */ "VFISB\0"
8020 /* 2103 */ "WFISB\0"
8021 /* 2109 */ "WFKSB\0"
8022 /* 2115 */ "VFMSB\0"
8023 /* 2121 */ "WFMSB\0"
8024 /* 2127 */ "VFMINSB\0"
8025 /* 2135 */ "WFMINSB\0"
8026 /* 2143 */ "VFLNSB\0"
8027 /* 2150 */ "WFLNSB\0"
8028 /* 2157 */ "VFPSOSB\0"
8029 /* 2165 */ "WFPSOSB\0"
8030 /* 2173 */ "VFLPSB\0"
8031 /* 2180 */ "WFLPSB\0"
8032 /* 2187 */ "VFSQSB\0"
8033 /* 2194 */ "WFSQSB\0"
8034 /* 2201 */ "VSTRSB\0"
8035 /* 2208 */ "VFSSB\0"
8036 /* 2214 */ "WFSSB\0"
8037 /* 2220 */ "VFMSSB\0"
8038 /* 2227 */ "WFMSSB\0"
8039 /* 2234 */ "VFNMSSB\0"
8040 /* 2242 */ "WFNMSSB\0"
8041 /* 2250 */ "VSB\0"
8042 /* 2254 */ "VFMAXSB\0"
8043 /* 2262 */ "WFMAXSB\0"
8044 /* 2270 */ "VPOPCTB\0"
8045 /* 2278 */ "G_FSUB\0"
8046 /* 2285 */ "G_STRICT_FSUB\0"
8047 /* 2299 */ "G_ATOMICRMW_FSUB\0"
8048 /* 2316 */ "G_SUB\0"
8049 /* 2322 */ "G_ATOMICRMW_SUB\0"
8050 /* 2338 */ "VESRAVB\0"
8051 /* 2346 */ "VCVB\0"
8052 /* 2351 */ "VLGVB\0"
8053 /* 2357 */ "VERLLVB\0"
8054 /* 2365 */ "VESRLVB\0"
8055 /* 2373 */ "VESLVB\0"
8056 /* 2380 */ "WFAXB\0"
8057 /* 2386 */ "WFMAXB\0"
8058 /* 2393 */ "WFNMAXB\0"
8059 /* 2401 */ "WFCXB\0"
8060 /* 2407 */ "WFLCXB\0"
8061 /* 2414 */ "TCXB\0"
8062 /* 2419 */ "WFDXB\0"
8063 /* 2425 */ "WFCEXB\0"
8064 /* 2432 */ "WFCHEXB\0"
8065 /* 2440 */ "WFKHEXB\0"
8066 /* 2448 */ "WFKEXB\0"
8067 /* 2455 */ "WFCHXB\0"
8068 /* 2462 */ "WFKHXB\0"
8069 /* 2469 */ "WFTCIXB\0"
8070 /* 2477 */ "WFIXB\0"
8071 /* 2483 */ "WFKXB\0"
8072 /* 2489 */ "WFMXB\0"
8073 /* 2495 */ "VMXB\0"
8074 /* 2500 */ "WFMINXB\0"
8075 /* 2508 */ "WFLNXB\0"
8076 /* 2515 */ "WFPSOXB\0"
8077 /* 2523 */ "WFLPXB\0"
8078 /* 2530 */ "WFSQXB\0"
8079 /* 2537 */ "WFSXB\0"
8080 /* 2543 */ "WFMSXB\0"
8081 /* 2550 */ "WFNMSXB\0"
8082 /* 2558 */ "WFMAXXB\0"
8083 /* 2566 */ "VSTRCZB\0"
8084 /* 2574 */ "VFAEZB\0"
8085 /* 2581 */ "VFEEZB\0"
8086 /* 2588 */ "VLLEZB\0"
8087 /* 2595 */ "VFENEZB\0"
8088 /* 2603 */ "VCLZB\0"
8089 /* 2609 */ "VSTRSZB\0"
8090 /* 2617 */ "VCTZB\0"
8091 /* 2623 */ "IAC\0"
8092 /* 2627 */ "KMAC\0"
8093 /* 2632 */ "SAC\0"
8094 /* 2636 */ "VAC\0"
8095 /* 2640 */ "BC\0"
8096 /* 2643 */ "VACC\0"
8097 /* 2648 */ "VACCC\0"
8098 /* 2654 */ "PCC\0"
8099 /* 2658 */ "DFLTCC\0"
8100 /* 2665 */ "VEC\0"
8101 /* 2669 */ "CFC\0"
8102 /* 2673 */ "WFC\0"
8103 /* 2677 */ "LLGC\0"
8104 /* 2682 */ "MSGC\0"
8105 /* 2687 */ "BIC\0"
8106 /* 2691 */ "G_INTRINSIC\0"
8107 /* 2703 */ "SCKC\0"
8108 /* 2708 */ "STCKC\0"
8109 /* 2714 */ "MSGRKC\0"
8110 /* 2721 */ "MSRKC\0"
8111 /* 2727 */ "ALC\0"
8112 /* 2731 */ "CLC\0"
8113 /* 2735 */ "LLC\0"
8114 /* 2739 */ "VLC\0"
8115 /* 2743 */ "KMC\0"
8116 /* 2747 */ "TBEGINC\0"
8117 /* 2755 */ "G_FPTRUNC\0"
8118 /* 2765 */ "G_INTRINSIC_TRUNC\0"
8119 /* 2783 */ "G_TRUNC\0"
8120 /* 2791 */ "G_BUILD_VECTOR_TRUNC\0"
8121 /* 2812 */ "VNC\0"
8122 /* 2816 */ "PROBED_STACKALLOC\0"
8123 /* 2834 */ "XPLINK_STACKALLOC\0"
8124 /* 2852 */ "G_DYN_STACKALLOC\0"
8125 /* 2869 */ "ADJDYNALLOC\0"
8126 /* 2881 */ "STOC\0"
8127 /* 2886 */ "VOC\0"
8128 /* 2890 */ "EFPC\0"
8129 /* 2895 */ "LFPC\0"
8130 /* 2900 */ "SFPC\0"
8131 /* 2905 */ "STFPC\0"
8132 /* 2911 */ "BRC\0"
8133 /* 2915 */ "VSTRC\0"
8134 /* 2921 */ "LGSC\0"
8135 /* 2926 */ "STGSC\0"
8136 /* 2932 */ "MSC\0"
8137 /* 2936 */ "CMPSC\0"
8138 /* 2942 */ "STC\0"
8139 /* 2946 */ "MVC\0"
8140 /* 2950 */ "SVC\0"
8141 /* 2954 */ "XC\0"
8142 /* 2957 */ "G_FMAD\0"
8143 /* 2964 */ "G_INDEXED_SEXTLOAD\0"
8144 /* 2983 */ "G_SEXTLOAD\0"
8145 /* 2994 */ "G_INDEXED_ZEXTLOAD\0"
8146 /* 3013 */ "G_ZEXTLOAD\0"
8147 /* 3024 */ "G_INDEXED_LOAD\0"
8148 /* 3039 */ "G_LOAD\0"
8149 /* 3046 */ "CD\0"
8150 /* 3049 */ "G_VECREDUCE_FADD\0"
8151 /* 3066 */ "G_FADD\0"
8152 /* 3073 */ "G_VECREDUCE_SEQ_FADD\0"
8153 /* 3094 */ "G_STRICT_FADD\0"
8154 /* 3108 */ "G_ATOMICRMW_FADD\0"
8155 /* 3125 */ "G_VECREDUCE_ADD\0"
8156 /* 3141 */ "G_ADD\0"
8157 /* 3147 */ "G_PTR_ADD\0"
8158 /* 3157 */ "G_ATOMICRMW_ADD\0"
8159 /* 3173 */ "VLED\0"
8160 /* 3178 */ "PFD\0"
8161 /* 3182 */ "VFD\0"
8162 /* 3186 */ "VCGD\0"
8163 /* 3191 */ "VCLGD\0"
8164 /* 3197 */ "WFLLD\0"
8165 /* 3203 */ "VSLD\0"
8166 /* 3208 */ "KIMD\0"
8167 /* 3213 */ "KLMD\0"
8168 /* 3218 */ "G_ATOMICRMW_NAND\0"
8169 /* 3235 */ "G_VECREDUCE_AND\0"
8170 /* 3251 */ "G_AND\0"
8171 /* 3257 */ "G_ATOMICRMW_AND\0"
8172 /* 3273 */ "TEND\0"
8173 /* 3278 */ "LIFETIME_END\0"
8174 /* 3291 */ "G_BRCOND\0"
8175 /* 3300 */ "ETND\0"
8176 /* 3305 */ "G_LLROUND\0"
8177 /* 3315 */ "G_LROUND\0"
8178 /* 3324 */ "G_INTRINSIC_ROUND\0"
8179 /* 3342 */ "G_INTRINSIC_FPTRUNC_ROUND\0"
8180 /* 3368 */ "LPD\0"
8181 /* 3372 */ "SQD\0"
8182 /* 3376 */ "LOAD_STACK_GUARD\0"
8183 /* 3393 */ "VFLRD\0"
8184 /* 3399 */ "WFLRD\0"
8185 /* 3405 */ "VSRD\0"
8186 /* 3410 */ "MSD\0"
8187 /* 3414 */ "STD\0"
8188 /* 3418 */ "VCVD\0"
8189 /* 3423 */ "LXD\0"
8190 /* 3427 */ "MXD\0"
8191 /* 3431 */ "VFAE\0"
8192 /* 3436 */ "LAE\0"
8193 /* 3440 */ "VMAE\0"
8194 /* 3445 */ "PSEUDO_PROBE\0"
8195 /* 3458 */ "RRBE\0"
8196 /* 3463 */ "G_SSUBE\0"
8197 /* 3471 */ "G_USUBE\0"
8198 /* 3479 */ "TRACE\0"
8199 /* 3485 */ "VFCE\0"
8200 /* 3490 */ "G_FENCE\0"
8201 /* 3498 */ "ARITH_FENCE\0"
8202 /* 3510 */ "REG_SEQUENCE\0"
8203 /* 3523 */ "G_SADDE\0"
8204 /* 3531 */ "G_UADDE\0"
8205 /* 3539 */ "VLDE\0"
8206 /* 3544 */ "MDE\0"
8207 /* 3548 */ "G_GET_FPMODE\0"
8208 /* 3561 */ "G_RESET_FPMODE\0"
8209 /* 3576 */ "G_SET_FPMODE\0"
8210 /* 3589 */ "G_FMINNUM_IEEE\0"
8211 /* 3604 */ "G_FMAXNUM_IEEE\0"
8212 /* 3619 */ "VFEE\0"
8213 /* 3624 */ "MEE\0"
8214 /* 3628 */ "VFCHE\0"
8215 /* 3634 */ "CIBAsmNHE\0"
8216 /* 3644 */ "CGIBAsmNHE\0"
8217 /* 3655 */ "CLGIBAsmNHE\0"
8218 /* 3667 */ "CLIBAsmNHE\0"
8219 /* 3678 */ "CRBAsmNHE\0"
8220 /* 3688 */ "CGRBAsmNHE\0"
8221 /* 3699 */ "CLGRBAsmNHE\0"
8222 /* 3711 */ "CLRBAsmNHE\0"
8223 /* 3722 */ "LOCAsmNHE\0"
8224 /* 3732 */ "STOCAsmNHE\0"
8225 /* 3743 */ "LOCGAsmNHE\0"
8226 /* 3754 */ "STOCGAsmNHE\0"
8227 /* 3766 */ "JGAsmNHE\0"
8228 /* 3775 */ "LOCFHAsmNHE\0"
8229 /* 3787 */ "STOCFHAsmNHE\0"
8230 /* 3800 */ "BIAsmNHE\0"
8231 /* 3809 */ "LOCHIAsmNHE\0"
8232 /* 3821 */ "LOCGHIAsmNHE\0"
8233 /* 3834 */ "LOCHHIAsmNHE\0"
8234 /* 3847 */ "CIJAsmNHE\0"
8235 /* 3857 */ "CGIJAsmNHE\0"
8236 /* 3868 */ "CLGIJAsmNHE\0"
8237 /* 3880 */ "CLIJAsmNHE\0"
8238 /* 3891 */ "CRJAsmNHE\0"
8239 /* 3901 */ "CGRJAsmNHE\0"
8240 /* 3912 */ "CLGRJAsmNHE\0"
8241 /* 3924 */ "CLRJAsmNHE\0"
8242 /* 3935 */ "BRAsmNHE\0"
8243 /* 3944 */ "LOCRAsmNHE\0"
8244 /* 3955 */ "LOCGRAsmNHE\0"
8245 /* 3967 */ "SELGRAsmNHE\0"
8246 /* 3979 */ "LOCFHRAsmNHE\0"
8247 /* 3992 */ "SELFHRAsmNHE\0"
8248 /* 4005 */ "SELRAsmNHE\0"
8249 /* 4016 */ "CLGTAsmNHE\0"
8250 /* 4027 */ "CITAsmNHE\0"
8251 /* 4037 */ "CLFITAsmNHE\0"
8252 /* 4049 */ "CGITAsmNHE\0"
8253 /* 4060 */ "CLGITAsmNHE\0"
8254 /* 4072 */ "CLTAsmNHE\0"
8255 /* 4082 */ "CRTAsmNHE\0"
8256 /* 4092 */ "CGRTAsmNHE\0"
8257 /* 4103 */ "CLGRTAsmNHE\0"
8258 /* 4115 */ "CLRTAsmNHE\0"
8259 /* 4126 */ "CIBAsmHE\0"
8260 /* 4135 */ "CGIBAsmHE\0"
8261 /* 4145 */ "CLGIBAsmHE\0"
8262 /* 4156 */ "CLIBAsmHE\0"
8263 /* 4166 */ "CRBAsmHE\0"
8264 /* 4175 */ "CGRBAsmHE\0"
8265 /* 4185 */ "CLGRBAsmHE\0"
8266 /* 4196 */ "CLRBAsmHE\0"
8267 /* 4206 */ "LOCAsmHE\0"
8268 /* 4215 */ "STOCAsmHE\0"
8269 /* 4225 */ "LOCGAsmHE\0"
8270 /* 4235 */ "STOCGAsmHE\0"
8271 /* 4246 */ "JGAsmHE\0"
8272 /* 4254 */ "LOCFHAsmHE\0"
8273 /* 4265 */ "STOCFHAsmHE\0"
8274 /* 4277 */ "BIAsmHE\0"
8275 /* 4285 */ "LOCHIAsmHE\0"
8276 /* 4296 */ "LOCGHIAsmHE\0"
8277 /* 4308 */ "LOCHHIAsmHE\0"
8278 /* 4320 */ "CIJAsmHE\0"
8279 /* 4329 */ "CGIJAsmHE\0"
8280 /* 4339 */ "CLGIJAsmHE\0"
8281 /* 4350 */ "CLIJAsmHE\0"
8282 /* 4360 */ "CRJAsmHE\0"
8283 /* 4369 */ "CGRJAsmHE\0"
8284 /* 4379 */ "CLGRJAsmHE\0"
8285 /* 4390 */ "CLRJAsmHE\0"
8286 /* 4400 */ "BRAsmHE\0"
8287 /* 4408 */ "LOCRAsmHE\0"
8288 /* 4418 */ "LOCGRAsmHE\0"
8289 /* 4429 */ "SELGRAsmHE\0"
8290 /* 4440 */ "LOCFHRAsmHE\0"
8291 /* 4452 */ "SELFHRAsmHE\0"
8292 /* 4464 */ "SELRAsmHE\0"
8293 /* 4474 */ "CLGTAsmHE\0"
8294 /* 4484 */ "CITAsmHE\0"
8295 /* 4493 */ "CLFITAsmHE\0"
8296 /* 4504 */ "CGITAsmHE\0"
8297 /* 4514 */ "CLGITAsmHE\0"
8298 /* 4525 */ "CLTAsmHE\0"
8299 /* 4534 */ "CRTAsmHE\0"
8300 /* 4543 */ "CGRTAsmHE\0"
8301 /* 4553 */ "CLGRTAsmHE\0"
8302 /* 4564 */ "CLRTAsmHE\0"
8303 /* 4574 */ "InsnRIE\0"
8304 /* 4582 */ "SIE\0"
8305 /* 4586 */ "STCKE\0"
8306 /* 4592 */ "ISKE\0"
8307 /* 4597 */ "SSKE\0"
8308 /* 4602 */ "G_VSCALE\0"
8309 /* 4611 */ "VMALE\0"
8310 /* 4617 */ "G_JUMP_TABLE\0"
8311 /* 4630 */ "CLCLE\0"
8312 /* 4636 */ "MVCLE\0"
8313 /* 4642 */ "BUNDLE\0"
8314 /* 4649 */ "STFLE\0"
8315 /* 4655 */ "VMLE\0"
8316 /* 4660 */ "CIBAsmNLE\0"
8317 /* 4670 */ "CGIBAsmNLE\0"
8318 /* 4681 */ "CLGIBAsmNLE\0"
8319 /* 4693 */ "CLIBAsmNLE\0"
8320 /* 4704 */ "CRBAsmNLE\0"
8321 /* 4714 */ "CGRBAsmNLE\0"
8322 /* 4725 */ "CLGRBAsmNLE\0"
8323 /* 4737 */ "CLRBAsmNLE\0"
8324 /* 4748 */ "LOCAsmNLE\0"
8325 /* 4758 */ "STOCAsmNLE\0"
8326 /* 4769 */ "LOCGAsmNLE\0"
8327 /* 4780 */ "STOCGAsmNLE\0"
8328 /* 4792 */ "JGAsmNLE\0"
8329 /* 4801 */ "LOCFHAsmNLE\0"
8330 /* 4813 */ "STOCFHAsmNLE\0"
8331 /* 4826 */ "BIAsmNLE\0"
8332 /* 4835 */ "LOCHIAsmNLE\0"
8333 /* 4847 */ "LOCGHIAsmNLE\0"
8334 /* 4860 */ "LOCHHIAsmNLE\0"
8335 /* 4873 */ "CIJAsmNLE\0"
8336 /* 4883 */ "CGIJAsmNLE\0"
8337 /* 4894 */ "CLGIJAsmNLE\0"
8338 /* 4906 */ "CLIJAsmNLE\0"
8339 /* 4917 */ "CRJAsmNLE\0"
8340 /* 4927 */ "CGRJAsmNLE\0"
8341 /* 4938 */ "CLGRJAsmNLE\0"
8342 /* 4950 */ "CLRJAsmNLE\0"
8343 /* 4961 */ "BRAsmNLE\0"
8344 /* 4970 */ "LOCRAsmNLE\0"
8345 /* 4981 */ "LOCGRAsmNLE\0"
8346 /* 4993 */ "SELGRAsmNLE\0"
8347 /* 5005 */ "LOCFHRAsmNLE\0"
8348 /* 5018 */ "SELFHRAsmNLE\0"
8349 /* 5031 */ "SELRAsmNLE\0"
8350 /* 5042 */ "CLGTAsmNLE\0"
8351 /* 5053 */ "CITAsmNLE\0"
8352 /* 5063 */ "CLFITAsmNLE\0"
8353 /* 5075 */ "CGITAsmNLE\0"
8354 /* 5086 */ "CLGITAsmNLE\0"
8355 /* 5098 */ "CLTAsmNLE\0"
8356 /* 5108 */ "CRTAsmNLE\0"
8357 /* 5118 */ "CGRTAsmNLE\0"
8358 /* 5129 */ "CLGRTAsmNLE\0"
8359 /* 5141 */ "CLRTAsmNLE\0"
8360 /* 5152 */ "BXLE\0"
8361 /* 5157 */ "BRXLE\0"
8362 /* 5163 */ "CIBAsmLE\0"
8363 /* 5172 */ "CGIBAsmLE\0"
8364 /* 5182 */ "CLGIBAsmLE\0"
8365 /* 5193 */ "CLIBAsmLE\0"
8366 /* 5203 */ "CRBAsmLE\0"
8367 /* 5212 */ "CGRBAsmLE\0"
8368 /* 5222 */ "CLGRBAsmLE\0"
8369 /* 5233 */ "CLRBAsmLE\0"
8370 /* 5243 */ "LOCAsmLE\0"
8371 /* 5252 */ "STOCAsmLE\0"
8372 /* 5262 */ "LOCGAsmLE\0"
8373 /* 5272 */ "STOCGAsmLE\0"
8374 /* 5283 */ "JGAsmLE\0"
8375 /* 5291 */ "LOCFHAsmLE\0"
8376 /* 5302 */ "STOCFHAsmLE\0"
8377 /* 5314 */ "BIAsmLE\0"
8378 /* 5322 */ "LOCHIAsmLE\0"
8379 /* 5333 */ "LOCGHIAsmLE\0"
8380 /* 5345 */ "LOCHHIAsmLE\0"
8381 /* 5357 */ "CIJAsmLE\0"
8382 /* 5366 */ "CGIJAsmLE\0"
8383 /* 5376 */ "CLGIJAsmLE\0"
8384 /* 5387 */ "CLIJAsmLE\0"
8385 /* 5397 */ "CRJAsmLE\0"
8386 /* 5406 */ "CGRJAsmLE\0"
8387 /* 5416 */ "CLGRJAsmLE\0"
8388 /* 5427 */ "CLRJAsmLE\0"
8389 /* 5437 */ "BRAsmLE\0"
8390 /* 5445 */ "LOCRAsmLE\0"
8391 /* 5455 */ "LOCGRAsmLE\0"
8392 /* 5466 */ "SELGRAsmLE\0"
8393 /* 5477 */ "LOCFHRAsmLE\0"
8394 /* 5489 */ "SELFHRAsmLE\0"
8395 /* 5501 */ "SELRAsmLE\0"
8396 /* 5511 */ "CLGTAsmLE\0"
8397 /* 5521 */ "CITAsmLE\0"
8398 /* 5530 */ "CLFITAsmLE\0"
8399 /* 5541 */ "CGITAsmLE\0"
8400 /* 5551 */ "CLGITAsmLE\0"
8401 /* 5562 */ "CLTAsmLE\0"
8402 /* 5571 */ "CRTAsmLE\0"
8403 /* 5580 */ "CGRTAsmLE\0"
8404 /* 5590 */ "CLGRTAsmLE\0"
8405 /* 5601 */ "CLRTAsmLE\0"
8406 /* 5611 */ "VME\0"
8407 /* 5615 */ "VFENE\0"
8408 /* 5621 */ "G_MEMCPY_INLINE\0"
8409 /* 5637 */ "VONE\0"
8410 /* 5642 */ "CIBAsmNE\0"
8411 /* 5651 */ "CGIBAsmNE\0"
8412 /* 5661 */ "CLGIBAsmNE\0"
8413 /* 5672 */ "CLIBAsmNE\0"
8414 /* 5682 */ "CRBAsmNE\0"
8415 /* 5691 */ "CGRBAsmNE\0"
8416 /* 5701 */ "CLGRBAsmNE\0"
8417 /* 5712 */ "CLRBAsmNE\0"
8418 /* 5722 */ "LOCAsmNE\0"
8419 /* 5731 */ "STOCAsmNE\0"
8420 /* 5741 */ "LOCGAsmNE\0"
8421 /* 5751 */ "STOCGAsmNE\0"
8422 /* 5762 */ "JGAsmNE\0"
8423 /* 5770 */ "LOCFHAsmNE\0"
8424 /* 5781 */ "STOCFHAsmNE\0"
8425 /* 5793 */ "BIAsmNE\0"
8426 /* 5801 */ "LOCHIAsmNE\0"
8427 /* 5812 */ "LOCGHIAsmNE\0"
8428 /* 5824 */ "LOCHHIAsmNE\0"
8429 /* 5836 */ "CIJAsmNE\0"
8430 /* 5845 */ "CGIJAsmNE\0"
8431 /* 5855 */ "CLGIJAsmNE\0"
8432 /* 5866 */ "CLIJAsmNE\0"
8433 /* 5876 */ "CRJAsmNE\0"
8434 /* 5885 */ "CGRJAsmNE\0"
8435 /* 5895 */ "CLGRJAsmNE\0"
8436 /* 5906 */ "CLRJAsmNE\0"
8437 /* 5916 */ "BRAsmNE\0"
8438 /* 5924 */ "LOCRAsmNE\0"
8439 /* 5934 */ "LOCGRAsmNE\0"
8440 /* 5945 */ "SELGRAsmNE\0"
8441 /* 5956 */ "LOCFHRAsmNE\0"
8442 /* 5968 */ "SELFHRAsmNE\0"
8443 /* 5980 */ "SELRAsmNE\0"
8444 /* 5990 */ "CLGTAsmNE\0"
8445 /* 6000 */ "CITAsmNE\0"
8446 /* 6009 */ "CLFITAsmNE\0"
8447 /* 6020 */ "CGITAsmNE\0"
8448 /* 6030 */ "CLGITAsmNE\0"
8449 /* 6041 */ "CLTAsmNE\0"
8450 /* 6050 */ "CRTAsmNE\0"
8451 /* 6059 */ "CGRTAsmNE\0"
8452 /* 6069 */ "CLGRTAsmNE\0"
8453 /* 6080 */ "CLRTAsmNE\0"
8454 /* 6090 */ "LOCAL_ESCAPE\0"
8455 /* 6103 */ "SQE\0"
8456 /* 6107 */ "G_STACKRESTORE\0"
8457 /* 6122 */ "G_INDEXED_STORE\0"
8458 /* 6138 */ "G_STORE\0"
8459 /* 6146 */ "InsnRRE\0"
8460 /* 6154 */ "TRTRE\0"
8461 /* 6160 */ "MSE\0"
8462 /* 6164 */ "G_BITREVERSE\0"
8463 /* 6177 */ "InsnRSE\0"
8464 /* 6185 */ "InsnSSE\0"
8465 /* 6193 */ "CUSE\0"
8466 /* 6198 */ "IDTE\0"
8467 /* 6203 */ "CRDTE\0"
8468 /* 6209 */ "IPTE\0"
8469 /* 6214 */ "TRTE\0"
8470 /* 6219 */ "STE\0"
8471 /* 6223 */ "DBG_VALUE\0"
8472 /* 6233 */ "G_GLOBAL_VALUE\0"
8473 /* 6248 */ "G_PTRAUTH_GLOBAL_VALUE\0"
8474 /* 6271 */ "ADA_ENTRY_VALUE\0"
8475 /* 6287 */ "CONVERGENCECTRL_GLUE\0"
8476 /* 6308 */ "G_STACKSAVE\0"
8477 /* 6320 */ "G_MEMMOVE\0"
8478 /* 6330 */ "LPSWE\0"
8479 /* 6336 */ "LXE\0"
8480 /* 6340 */ "InsnRXE\0"
8481 /* 6348 */ "G_FREEZE\0"
8482 /* 6357 */ "G_FCANONICALIZE\0"
8483 /* 6373 */ "VLLEBRZE\0"
8484 /* 6382 */ "CIBAsmE\0"
8485 /* 6390 */ "CGIBAsmE\0"
8486 /* 6399 */ "CLGIBAsmE\0"
8487 /* 6409 */ "CLIBAsmE\0"
8488 /* 6418 */ "CRBAsmE\0"
8489 /* 6426 */ "CGRBAsmE\0"
8490 /* 6435 */ "CLGRBAsmE\0"
8491 /* 6445 */ "CLRBAsmE\0"
8492 /* 6454 */ "LOCAsmE\0"
8493 /* 6462 */ "STOCAsmE\0"
8494 /* 6471 */ "LOCGAsmE\0"
8495 /* 6480 */ "STOCGAsmE\0"
8496 /* 6490 */ "JGAsmE\0"
8497 /* 6497 */ "LOCFHAsmE\0"
8498 /* 6507 */ "STOCFHAsmE\0"
8499 /* 6518 */ "BIAsmE\0"
8500 /* 6525 */ "LOCHIAsmE\0"
8501 /* 6535 */ "LOCGHIAsmE\0"
8502 /* 6546 */ "LOCHHIAsmE\0"
8503 /* 6557 */ "CIJAsmE\0"
8504 /* 6565 */ "CGIJAsmE\0"
8505 /* 6574 */ "CLGIJAsmE\0"
8506 /* 6584 */ "CLIJAsmE\0"
8507 /* 6593 */ "CRJAsmE\0"
8508 /* 6601 */ "CGRJAsmE\0"
8509 /* 6610 */ "CLGRJAsmE\0"
8510 /* 6620 */ "CLRJAsmE\0"
8511 /* 6629 */ "BRAsmE\0"
8512 /* 6636 */ "LOCRAsmE\0"
8513 /* 6645 */ "LOCGRAsmE\0"
8514 /* 6655 */ "SELGRAsmE\0"
8515 /* 6665 */ "LOCFHRAsmE\0"
8516 /* 6676 */ "SELFHRAsmE\0"
8517 /* 6687 */ "SELRAsmE\0"
8518 /* 6696 */ "CLGTAsmE\0"
8519 /* 6705 */ "CITAsmE\0"
8520 /* 6713 */ "CLFITAsmE\0"
8521 /* 6723 */ "CGITAsmE\0"
8522 /* 6732 */ "CLGITAsmE\0"
8523 /* 6742 */ "CLTAsmE\0"
8524 /* 6750 */ "CRTAsmE\0"
8525 /* 6758 */ "CGRTAsmE\0"
8526 /* 6767 */ "CLGRTAsmE\0"
8527 /* 6777 */ "CLRTAsmE\0"
8528 /* 6786 */ "InsnE\0"
8529 /* 6792 */ "VGFMAF\0"
8530 /* 6799 */ "VESRAF\0"
8531 /* 6806 */ "VAF\0"
8532 /* 6810 */ "SACF\0"
8533 /* 6815 */ "VACCF\0"
8534 /* 6821 */ "VECF\0"
8535 /* 6826 */ "VLCF\0"
8536 /* 6831 */ "VSTRCF\0"
8537 /* 6838 */ "VFAEF\0"
8538 /* 6844 */ "VMAEF\0"
8539 /* 6850 */ "VSCEF\0"
8540 /* 6856 */ "G_CTLZ_ZERO_UNDEF\0"
8541 /* 6874 */ "G_CTTZ_ZERO_UNDEF\0"
8542 /* 6892 */ "G_IMPLICIT_DEF\0"
8543 /* 6907 */ "VFEEF\0"
8544 /* 6913 */ "VGEF\0"
8545 /* 6918 */ "VMALEF\0"
8546 /* 6925 */ "VMLEF\0"
8547 /* 6931 */ "VLEF\0"
8548 /* 6936 */ "VMEF\0"
8549 /* 6941 */ "VFENEF\0"
8550 /* 6948 */ "DBG_INSTR_REF\0"
8551 /* 6962 */ "VSTEF\0"
8552 /* 6968 */ "PTFF\0"
8553 /* 6973 */ "AGF\0"
8554 /* 6977 */ "CGF\0"
8555 /* 6981 */ "VSEGF\0"
8556 /* 6987 */ "ALGF\0"
8557 /* 6992 */ "CLGF\0"
8558 /* 6997 */ "LLGF\0"
8559 /* 7002 */ "SLGF\0"
8560 /* 7007 */ "VSUMGF\0"
8561 /* 7014 */ "LLZRGF\0"
8562 /* 7021 */ "DSGF\0"
8563 /* 7026 */ "MSGF\0"
8564 /* 7031 */ "LTGF\0"
8565 /* 7036 */ "VAVGF\0"
8566 /* 7042 */ "VLVGF\0"
8567 /* 7048 */ "VMAHF\0"
8568 /* 7054 */ "VCHF\0"
8569 /* 7059 */ "IIHF\0"
8570 /* 7064 */ "LLIHF\0"
8571 /* 7070 */ "NIHF\0"
8572 /* 7075 */ "OIHF\0"
8573 /* 7080 */ "XIHF\0"
8574 /* 7085 */ "VMALHF\0"
8575 /* 7092 */ "CLHF\0"
8576 /* 7097 */ "VMLHF\0"
8577 /* 7103 */ "VUPLHF\0"
8578 /* 7110 */ "VMHF\0"
8579 /* 7115 */ "VUPHF\0"
8580 /* 7121 */ "VMRHF\0"
8581 /* 7127 */ "VSCBIF\0"
8582 /* 7134 */ "VLEIF\0"
8583 /* 7140 */ "VREPIF\0"
8584 /* 7147 */ "STCKF\0"
8585 /* 7153 */ "VPKF\0"
8586 /* 7158 */ "VMALF\0"
8587 /* 7164 */ "VECLF\0"
8588 /* 7170 */ "VAVGLF\0"
8589 /* 7177 */ "VCHLF\0"
8590 /* 7183 */ "IILF\0"
8591 /* 7188 */ "LLILF\0"
8592 /* 7194 */ "NILF\0"
8593 /* 7199 */ "OILF\0"
8594 /* 7204 */ "ATOMIC_LOADW_XILF\0"
8595 /* 7222 */ "VUPLLF\0"
8596 /* 7229 */ "VERLLF\0"
8597 /* 7236 */ "VMLF\0"
8598 /* 7241 */ "VMNLF\0"
8599 /* 7247 */ "VUPLF\0"
8600 /* 7253 */ "VMRLF\0"
8601 /* 7259 */ "VESRLF\0"
8602 /* 7266 */ "VESLF\0"
8603 /* 7272 */ "VMXLF\0"
8604 /* 7278 */ "VLLEZLF\0"
8605 /* 7286 */ "VGFMF\0"
8606 /* 7292 */ "PFMF\0"
8607 /* 7297 */ "VGMF\0"
8608 /* 7302 */ "VERIMF\0"
8609 /* 7309 */ "KMF\0"
8610 /* 7313 */ "VCNF\0"
8611 /* 7318 */ "VMNF\0"
8612 /* 7323 */ "VCRNF\0"
8613 /* 7329 */ "VMAOF\0"
8614 /* 7335 */ "VMALOF\0"
8615 /* 7342 */ "VMLOF\0"
8616 /* 7348 */ "VMOF\0"
8617 /* 7353 */ "VLREPF\0"
8618 /* 7360 */ "VLBRREPF\0"
8619 /* 7369 */ "VREPF\0"
8620 /* 7375 */ "SCKPF\0"
8621 /* 7381 */ "VLPF\0"
8622 /* 7386 */ "VCEQF\0"
8623 /* 7392 */ "VSUMQF\0"
8624 /* 7399 */ "VLEBRF\0"
8625 /* 7406 */ "VSTEBRF\0"
8626 /* 7414 */ "VLBRF\0"
8627 /* 7420 */ "VSTBRF\0"
8628 /* 7427 */ "VLERF\0"
8629 /* 7433 */ "VSTERF\0"
8630 /* 7440 */ "InsnRRF\0"
8631 /* 7448 */ "VISTRF\0"
8632 /* 7455 */ "LZRF\0"
8633 /* 7460 */ "VPKSF\0"
8634 /* 7466 */ "VPKLSF\0"
8635 /* 7473 */ "VSTRSF\0"
8636 /* 7480 */ "InsnSSF\0"
8637 /* 7488 */ "VSF\0"
8638 /* 7492 */ "VPOPCTF\0"
8639 /* 7500 */ "PTF\0"
8640 /* 7504 */ "CUUTF\0"
8641 /* 7510 */ "VESRAVF\0"
8642 /* 7518 */ "VLGVF\0"
8643 /* 7524 */ "VERLLVF\0"
8644 /* 7532 */ "VESRLVF\0"
8645 /* 7540 */ "VESLVF\0"
8646 /* 7547 */ "VMXF\0"
8647 /* 7552 */ "InsnRXF\0"
8648 /* 7560 */ "VSTRCZF\0"
8649 /* 7568 */ "VFAEZF\0"
8650 /* 7575 */ "VFEEZF\0"
8651 /* 7582 */ "VLLEZF\0"
8652 /* 7589 */ "VFENEZF\0"
8653 /* 7597 */ "VCLZF\0"
8654 /* 7603 */ "VLLEBRZF\0"
8655 /* 7612 */ "VSTRSZF\0"
8656 /* 7620 */ "VCTZF\0"
8657 /* 7626 */ "LAAG\0"
8658 /* 7631 */ "ECAG\0"
8659 /* 7636 */ "DIAG\0"
8660 /* 7641 */ "SLAG\0"
8661 /* 7646 */ "VGFMAG\0"
8662 /* 7653 */ "LRAG\0"
8663 /* 7658 */ "VESRAG\0"
8664 /* 7665 */ "STRAG\0"
8665 /* 7671 */ "LURAG\0"
8666 /* 7677 */ "VAG\0"
8667 /* 7681 */ "SLBG\0"
8668 /* 7686 */ "RISBG\0"
8669 /* 7692 */ "RNSBG\0"
8670 /* 7698 */ "ROSBG\0"
8671 /* 7704 */ "RXSBG\0"
8672 /* 7710 */ "VCVBG\0"
8673 /* 7716 */ "TRACG\0"
8674 /* 7722 */ "VACCG\0"
8675 /* 7728 */ "VECG\0"
8676 /* 7733 */ "ALCG\0"
8677 /* 7738 */ "VLCG\0"
8678 /* 7743 */ "LOCG\0"
8679 /* 7748 */ "STOCG\0"
8680 /* 7754 */ "VCDG\0"
8681 /* 7759 */ "LPDG\0"
8682 /* 7764 */ "VCVDG\0"
8683 /* 7770 */ "VSCEG\0"
8684 /* 7776 */ "VGEG\0"
8685 /* 7781 */ "VLEG\0"
8686 /* 7786 */ "BXLEG\0"
8687 /* 7792 */ "G_FNEG\0"
8688 /* 7799 */ "EXTRACT_SUBREG\0"
8689 /* 7814 */ "INSERT_SUBREG\0"
8690 /* 7828 */ "EREG\0"
8691 /* 7833 */ "G_SEXT_INREG\0"
8692 /* 7846 */ "SUBREG_TO_REG\0"
8693 /* 7860 */ "VSEG\0"
8694 /* 7865 */ "VSTEG\0"
8695 /* 7871 */ "EREGG\0"
8696 /* 7877 */ "LGG\0"
8697 /* 7881 */ "VAVGG\0"
8698 /* 7887 */ "VLVGG\0"
8699 /* 7893 */ "RISBHG\0"
8700 /* 7900 */ "VCHG\0"
8701 /* 7905 */ "G_ATOMIC_CMPXCHG\0"
8702 /* 7922 */ "G_ATOMICRMW_XCHG\0"
8703 /* 7939 */ "VMRHG\0"
8704 /* 7945 */ "BXHG\0"
8705 /* 7950 */ "BRXHG\0"
8706 /* 7956 */ "VSCBIG\0"
8707 /* 7963 */ "VLEIG\0"
8708 /* 7969 */ "VREPIG\0"
8709 /* 7976 */ "CallJG\0"
8710 /* 7983 */ "VPKG\0"
8711 /* 7988 */ "LAALG\0"
8712 /* 7994 */ "RISBLG\0"
8713 /* 8001 */ "VECLG\0"
8714 /* 8007 */ "VCDLG\0"
8715 /* 8013 */ "VAVGLG\0"
8716 /* 8020 */ "VCHLG\0"
8717 /* 8026 */ "VERLLG\0"
8718 /* 8033 */ "SLLG\0"
8719 /* 8038 */ "MLG\0"
8720 /* 8042 */ "VMNLG\0"
8721 /* 8048 */ "VMRLG\0"
8722 /* 8054 */ "VESRLG\0"
8723 /* 8061 */ "VESLG\0"
8724 /* 8067 */ "VMSLG\0"
8725 /* 8073 */ "LCTLG\0"
8726 /* 8079 */ "VMXLG\0"
8727 /* 8085 */ "BRXLG\0"
8728 /* 8091 */ "VGFMG\0"
8729 /* 8097 */ "VGMG\0"
8730 /* 8102 */ "VERIMG\0"
8731 /* 8109 */ "LMG\0"
8732 /* 8113 */ "STMG\0"
8733 /* 8118 */ "VSUMG\0"
8734 /* 8124 */ "LANG\0"
8735 /* 8129 */ "VMNG\0"
8736 /* 8134 */ "LAOG\0"
8737 /* 8139 */ "G_FLOG\0"
8738 /* 8146 */ "VLREPG\0"
8739 /* 8153 */ "VLBRREPG\0"
8740 /* 8162 */ "VREPG\0"
8741 /* 8168 */ "VLPG\0"
8742 /* 8173 */ "CSPG\0"
8743 /* 8178 */ "MVPG\0"
8744 /* 8183 */ "VCEQG\0"
8745 /* 8189 */ "VSUMQG\0"
8746 /* 8196 */ "G_VAARG\0"
8747 /* 8204 */ "PREALLOCATED_ARG\0"
8748 /* 8221 */ "VLEBRG\0"
8749 /* 8228 */ "VSTEBRG\0"
8750 /* 8236 */ "VLBRG\0"
8751 /* 8242 */ "VSTBRG\0"
8752 /* 8249 */ "VLERG\0"
8753 /* 8255 */ "VSTERG\0"
8754 /* 8262 */ "STURG\0"
8755 /* 8268 */ "LZRG\0"
8756 /* 8273 */ "BSG\0"
8757 /* 8277 */ "CSG\0"
8758 /* 8281 */ "CDSG\0"
8759 /* 8286 */ "LLGFSG\0"
8760 /* 8293 */ "VPKSG\0"
8761 /* 8299 */ "VPKLSG\0"
8762 /* 8306 */ "MSG\0"
8763 /* 8310 */ "VSG\0"
8764 /* 8314 */ "BCTG\0"
8765 /* 8319 */ "ECTG\0"
8766 /* 8324 */ "VPOPCTG\0"
8767 /* 8332 */ "BRCTG\0"
8768 /* 8338 */ "STCTG\0"
8769 /* 8344 */ "LTG\0"
8770 /* 8348 */ "NTSTG\0"
8771 /* 8354 */ "VESRAVG\0"
8772 /* 8362 */ "VAVG\0"
8773 /* 8367 */ "VLGVG\0"
8774 /* 8373 */ "VERLLVG\0"
8775 /* 8381 */ "VESRLVG\0"
8776 /* 8389 */ "VESLVG\0"
8777 /* 8396 */ "VLVG\0"
8778 /* 8401 */ "LRVG\0"
8779 /* 8406 */ "STRVG\0"
8780 /* 8412 */ "LAXG\0"
8781 /* 8417 */ "VMXG\0"
8782 /* 8422 */ "VLLEZG\0"
8783 /* 8429 */ "VCLZG\0"
8784 /* 8435 */ "VLLEBRZG\0"
8785 /* 8444 */ "VCTZG\0"
8786 /* 8450 */ "VGFMAH\0"
8787 /* 8457 */ "VMAH\0"
8788 /* 8462 */ "VESRAH\0"
8789 /* 8469 */ "VAH\0"
8790 /* 8473 */ "LBH\0"
8791 /* 8477 */ "VACCH\0"
8792 /* 8483 */ "VECH\0"
8793 /* 8488 */ "VFCH\0"
8794 /* 8493 */ "LLCH\0"
8795 /* 8498 */ "VLCH\0"
8796 /* 8503 */ "VSTRCH\0"
8797 /* 8510 */ "CSCH\0"
8798 /* 8515 */ "HSCH\0"
8799 /* 8520 */ "MSCH\0"
8800 /* 8525 */ "RSCH\0"
8801 /* 8530 */ "SSCH\0"
8802 /* 8535 */ "STSCH\0"
8803 /* 8541 */ "XSCH\0"
8804 /* 8546 */ "G_PREFETCH\0"
8805 /* 8557 */ "STCH\0"
8806 /* 8562 */ "VCH\0"
8807 /* 8566 */ "VFAEH\0"
8808 /* 8572 */ "VMAEH\0"
8809 /* 8578 */ "VFEEH\0"
8810 /* 8584 */ "VMALEH\0"
8811 /* 8591 */ "VMLEH\0"
8812 /* 8597 */ "VLEH\0"
8813 /* 8602 */ "VMEH\0"
8814 /* 8607 */ "VFENEH\0"
8815 /* 8614 */ "VSTEH\0"
8816 /* 8620 */ "LOCFH\0"
8817 /* 8626 */ "STOCFH\0"
8818 /* 8633 */ "LFH\0"
8819 /* 8637 */ "STFH\0"
8820 /* 8642 */ "AGH\0"
8821 /* 8646 */ "CGH\0"
8822 /* 8650 */ "VSEGH\0"
8823 /* 8656 */ "LLGH\0"
8824 /* 8661 */ "VSUMGH\0"
8825 /* 8668 */ "SGH\0"
8826 /* 8672 */ "VAVGH\0"
8827 /* 8678 */ "VLVGH\0"
8828 /* 8684 */ "VMAHH\0"
8829 /* 8690 */ "RISBHH\0"
8830 /* 8697 */ "VCHH\0"
8831 /* 8702 */ "IIHH\0"
8832 /* 8707 */ "LLIHH\0"
8833 /* 8713 */ "NIHH\0"
8834 /* 8718 */ "OIHH\0"
8835 /* 8723 */ "VMALHH\0"
8836 /* 8730 */ "LLHH\0"
8837 /* 8735 */ "VMLHH\0"
8838 /* 8741 */ "VUPLHH\0"
8839 /* 8748 */ "TMHH\0"
8840 /* 8753 */ "VMHH\0"
8841 /* 8758 */ "VUPHH\0"
8842 /* 8764 */ "VMRHH\0"
8843 /* 8770 */ "STHH\0"
8844 /* 8775 */ "AIH\0"
8845 /* 8779 */ "VSCBIH\0"
8846 /* 8786 */ "CIH\0"
8847 /* 8790 */ "VLEIH\0"
8848 /* 8796 */ "CLIH\0"
8849 /* 8801 */ "VREPIH\0"
8850 /* 8808 */ "ALSIH\0"
8851 /* 8814 */ "VPKH\0"
8852 /* 8819 */ "VMALH\0"
8853 /* 8825 */ "RISBLH\0"
8854 /* 8832 */ "VECLH\0"
8855 /* 8838 */ "VAVGLH\0"
8856 /* 8845 */ "VCHLH\0"
8857 /* 8851 */ "IILH\0"
8858 /* 8856 */ "LLILH\0"
8859 /* 8862 */ "ATOMIC_LOADW_NILH\0"
8860 /* 8880 */ "ATOMIC_LOADW_OILH\0"
8861 /* 8898 */ "VUPLLH\0"
8862 /* 8905 */ "VERLLH\0"
8863 /* 8912 */ "TMLH\0"
8864 /* 8917 */ "VMLH\0"
8865 /* 8922 */ "VMNLH\0"
8866 /* 8928 */ "CIBAsmNLH\0"
8867 /* 8938 */ "CGIBAsmNLH\0"
8868 /* 8949 */ "CLGIBAsmNLH\0"
8869 /* 8961 */ "CLIBAsmNLH\0"
8870 /* 8972 */ "CRBAsmNLH\0"
8871 /* 8982 */ "CGRBAsmNLH\0"
8872 /* 8993 */ "CLGRBAsmNLH\0"
8873 /* 9005 */ "CLRBAsmNLH\0"
8874 /* 9016 */ "LOCAsmNLH\0"
8875 /* 9026 */ "STOCAsmNLH\0"
8876 /* 9037 */ "LOCGAsmNLH\0"
8877 /* 9048 */ "STOCGAsmNLH\0"
8878 /* 9060 */ "JGAsmNLH\0"
8879 /* 9069 */ "LOCFHAsmNLH\0"
8880 /* 9081 */ "STOCFHAsmNLH\0"
8881 /* 9094 */ "BIAsmNLH\0"
8882 /* 9103 */ "LOCHIAsmNLH\0"
8883 /* 9115 */ "LOCGHIAsmNLH\0"
8884 /* 9128 */ "LOCHHIAsmNLH\0"
8885 /* 9141 */ "CIJAsmNLH\0"
8886 /* 9151 */ "CGIJAsmNLH\0"
8887 /* 9162 */ "CLGIJAsmNLH\0"
8888 /* 9174 */ "CLIJAsmNLH\0"
8889 /* 9185 */ "CRJAsmNLH\0"
8890 /* 9195 */ "CGRJAsmNLH\0"
8891 /* 9206 */ "CLGRJAsmNLH\0"
8892 /* 9218 */ "CLRJAsmNLH\0"
8893 /* 9229 */ "BRAsmNLH\0"
8894 /* 9238 */ "LOCRAsmNLH\0"
8895 /* 9249 */ "LOCGRAsmNLH\0"
8896 /* 9261 */ "SELGRAsmNLH\0"
8897 /* 9273 */ "LOCFHRAsmNLH\0"
8898 /* 9286 */ "SELFHRAsmNLH\0"
8899 /* 9299 */ "SELRAsmNLH\0"
8900 /* 9310 */ "CLGTAsmNLH\0"
8901 /* 9321 */ "CITAsmNLH\0"
8902 /* 9331 */ "CLFITAsmNLH\0"
8903 /* 9343 */ "CGITAsmNLH\0"
8904 /* 9354 */ "CLGITAsmNLH\0"
8905 /* 9366 */ "CLTAsmNLH\0"
8906 /* 9376 */ "CRTAsmNLH\0"
8907 /* 9386 */ "CGRTAsmNLH\0"
8908 /* 9397 */ "CLGRTAsmNLH\0"
8909 /* 9409 */ "CLRTAsmNLH\0"
8910 /* 9420 */ "VUPLH\0"
8911 /* 9426 */ "VMRLH\0"
8912 /* 9432 */ "VESRLH\0"
8913 /* 9439 */ "VESLH\0"
8914 /* 9445 */ "G_SMULH\0"
8915 /* 9453 */ "G_UMULH\0"
8916 /* 9461 */ "VMXLH\0"
8917 /* 9467 */ "CIBAsmLH\0"
8918 /* 9476 */ "CGIBAsmLH\0"
8919 /* 9486 */ "CLGIBAsmLH\0"
8920 /* 9497 */ "CLIBAsmLH\0"
8921 /* 9507 */ "CRBAsmLH\0"
8922 /* 9516 */ "CGRBAsmLH\0"
8923 /* 9526 */ "CLGRBAsmLH\0"
8924 /* 9537 */ "CLRBAsmLH\0"
8925 /* 9547 */ "LOCAsmLH\0"
8926 /* 9556 */ "STOCAsmLH\0"
8927 /* 9566 */ "LOCGAsmLH\0"
8928 /* 9576 */ "STOCGAsmLH\0"
8929 /* 9587 */ "JGAsmLH\0"
8930 /* 9595 */ "LOCFHAsmLH\0"
8931 /* 9606 */ "STOCFHAsmLH\0"
8932 /* 9618 */ "BIAsmLH\0"
8933 /* 9626 */ "LOCHIAsmLH\0"
8934 /* 9637 */ "LOCGHIAsmLH\0"
8935 /* 9649 */ "LOCHHIAsmLH\0"
8936 /* 9661 */ "CIJAsmLH\0"
8937 /* 9670 */ "CGIJAsmLH\0"
8938 /* 9680 */ "CLGIJAsmLH\0"
8939 /* 9691 */ "CLIJAsmLH\0"
8940 /* 9701 */ "CRJAsmLH\0"
8941 /* 9710 */ "CGRJAsmLH\0"
8942 /* 9720 */ "CLGRJAsmLH\0"
8943 /* 9731 */ "CLRJAsmLH\0"
8944 /* 9741 */ "BRAsmLH\0"
8945 /* 9749 */ "LOCRAsmLH\0"
8946 /* 9759 */ "LOCGRAsmLH\0"
8947 /* 9770 */ "SELGRAsmLH\0"
8948 /* 9781 */ "LOCFHRAsmLH\0"
8949 /* 9793 */ "SELFHRAsmLH\0"
8950 /* 9805 */ "SELRAsmLH\0"
8951 /* 9815 */ "CLGTAsmLH\0"
8952 /* 9825 */ "CITAsmLH\0"
8953 /* 9834 */ "CLFITAsmLH\0"
8954 /* 9845 */ "CGITAsmLH\0"
8955 /* 9855 */ "CLGITAsmLH\0"
8956 /* 9866 */ "CLTAsmLH\0"
8957 /* 9875 */ "CRTAsmLH\0"
8958 /* 9884 */ "CGRTAsmLH\0"
8959 /* 9894 */ "CLGRTAsmLH\0"
8960 /* 9905 */ "CLRTAsmLH\0"
8961 /* 9915 */ "ICMH\0"
8962 /* 9920 */ "STCMH\0"
8963 /* 9926 */ "VGFMH\0"
8964 /* 9932 */ "VGMH\0"
8965 /* 9937 */ "VERIMH\0"
8966 /* 9944 */ "CLMH\0"
8967 /* 9949 */ "STMH\0"
8968 /* 9954 */ "VSUMH\0"
8969 /* 9960 */ "VMH\0"
8970 /* 9964 */ "G_FTANH\0"
8971 /* 9972 */ "VCLFNH\0"
8972 /* 9979 */ "G_FSINH\0"
8973 /* 9987 */ "VMNH\0"
8974 /* 9992 */ "CIBAsmNH\0"
8975 /* 10001 */ "CGIBAsmNH\0"
8976 /* 10011 */ "CLGIBAsmNH\0"
8977 /* 10022 */ "CLIBAsmNH\0"
8978 /* 10032 */ "CRBAsmNH\0"
8979 /* 10041 */ "CGRBAsmNH\0"
8980 /* 10051 */ "CLGRBAsmNH\0"
8981 /* 10062 */ "CLRBAsmNH\0"
8982 /* 10072 */ "LOCAsmNH\0"
8983 /* 10081 */ "STOCAsmNH\0"
8984 /* 10091 */ "LOCGAsmNH\0"
8985 /* 10101 */ "STOCGAsmNH\0"
8986 /* 10112 */ "JGAsmNH\0"
8987 /* 10120 */ "LOCFHAsmNH\0"
8988 /* 10131 */ "STOCFHAsmNH\0"
8989 /* 10143 */ "BIAsmNH\0"
8990 /* 10151 */ "LOCHIAsmNH\0"
8991 /* 10162 */ "LOCGHIAsmNH\0"
8992 /* 10174 */ "LOCHHIAsmNH\0"
8993 /* 10186 */ "CIJAsmNH\0"
8994 /* 10195 */ "CGIJAsmNH\0"
8995 /* 10205 */ "CLGIJAsmNH\0"
8996 /* 10216 */ "CLIJAsmNH\0"
8997 /* 10226 */ "CRJAsmNH\0"
8998 /* 10235 */ "CGRJAsmNH\0"
8999 /* 10245 */ "CLGRJAsmNH\0"
9000 /* 10256 */ "CLRJAsmNH\0"
9001 /* 10266 */ "BRAsmNH\0"
9002 /* 10274 */ "LOCRAsmNH\0"
9003 /* 10284 */ "LOCGRAsmNH\0"
9004 /* 10295 */ "SELGRAsmNH\0"
9005 /* 10306 */ "LOCFHRAsmNH\0"
9006 /* 10318 */ "SELFHRAsmNH\0"
9007 /* 10330 */ "SELRAsmNH\0"
9008 /* 10340 */ "CLGTAsmNH\0"
9009 /* 10350 */ "CITAsmNH\0"
9010 /* 10359 */ "CLFITAsmNH\0"
9011 /* 10370 */ "CGITAsmNH\0"
9012 /* 10380 */ "CLGITAsmNH\0"
9013 /* 10391 */ "CLTAsmNH\0"
9014 /* 10400 */ "CRTAsmNH\0"
9015 /* 10409 */ "CGRTAsmNH\0"
9016 /* 10419 */ "CLGRTAsmNH\0"
9017 /* 10430 */ "CLRTAsmNH\0"
9018 /* 10440 */ "VMAOH\0"
9019 /* 10446 */ "VMALOH\0"
9020 /* 10453 */ "VMLOH\0"
9021 /* 10459 */ "VMOH\0"
9022 /* 10464 */ "VLREPH\0"
9023 /* 10471 */ "VLBRREPH\0"
9024 /* 10480 */ "VREPH\0"
9025 /* 10486 */ "VLPH\0"
9026 /* 10491 */ "VCSPH\0"
9027 /* 10497 */ "VUPH\0"
9028 /* 10502 */ "VCEQH\0"
9029 /* 10508 */ "VLEBRH\0"
9030 /* 10515 */ "VSTEBRH\0"
9031 /* 10523 */ "VLBRH\0"
9032 /* 10529 */ "VSTBRH\0"
9033 /* 10536 */ "VLERH\0"
9034 /* 10542 */ "VSTERH\0"
9035 /* 10549 */ "VMRH\0"
9036 /* 10554 */ "VISTRH\0"
9037 /* 10561 */ "VPKSH\0"
9038 /* 10567 */ "VPKLSH\0"
9039 /* 10574 */ "G_FCOSH\0"
9040 /* 10582 */ "VSTRSH\0"
9041 /* 10589 */ "VSH\0"
9042 /* 10593 */ "VPOPCTH\0"
9043 /* 10601 */ "BRCTH\0"
9044 /* 10607 */ "STH\0"
9045 /* 10611 */ "VESRAVH\0"
9046 /* 10619 */ "VLGVH\0"
9047 /* 10625 */ "VERLLVH\0"
9048 /* 10633 */ "VESRLVH\0"
9049 /* 10641 */ "VESLVH\0"
9050 /* 10648 */ "LRVH\0"
9051 /* 10653 */ "STRVH\0"
9052 /* 10659 */ "BXH\0"
9053 /* 10663 */ "VMXH\0"
9054 /* 10668 */ "BRXH\0"
9055 /* 10673 */ "MAYH\0"
9056 /* 10678 */ "MYH\0"
9057 /* 10682 */ "VSTRCZH\0"
9058 /* 10690 */ "VFAEZH\0"
9059 /* 10697 */ "VFEEZH\0"
9060 /* 10704 */ "VLLEZH\0"
9061 /* 10711 */ "VFENEZH\0"
9062 /* 10719 */ "VUPKZH\0"
9063 /* 10726 */ "VCLZH\0"
9064 /* 10732 */ "VLLEBRZH\0"
9065 /* 10741 */ "VSTRSZH\0"
9066 /* 10749 */ "VCTZH\0"
9067 /* 10755 */ "CIBAsmH\0"
9068 /* 10763 */ "CGIBAsmH\0"
9069 /* 10772 */ "CLGIBAsmH\0"
9070 /* 10782 */ "CLIBAsmH\0"
9071 /* 10791 */ "CRBAsmH\0"
9072 /* 10799 */ "CGRBAsmH\0"
9073 /* 10808 */ "CLGRBAsmH\0"
9074 /* 10818 */ "CLRBAsmH\0"
9075 /* 10827 */ "LOCAsmH\0"
9076 /* 10835 */ "STOCAsmH\0"
9077 /* 10844 */ "LOCGAsmH\0"
9078 /* 10853 */ "STOCGAsmH\0"
9079 /* 10863 */ "JGAsmH\0"
9080 /* 10870 */ "LOCFHAsmH\0"
9081 /* 10880 */ "STOCFHAsmH\0"
9082 /* 10891 */ "BIAsmH\0"
9083 /* 10898 */ "LOCHIAsmH\0"
9084 /* 10908 */ "LOCGHIAsmH\0"
9085 /* 10919 */ "LOCHHIAsmH\0"
9086 /* 10930 */ "CIJAsmH\0"
9087 /* 10938 */ "CGIJAsmH\0"
9088 /* 10947 */ "CLGIJAsmH\0"
9089 /* 10957 */ "CLIJAsmH\0"
9090 /* 10966 */ "CRJAsmH\0"
9091 /* 10974 */ "CGRJAsmH\0"
9092 /* 10983 */ "CLGRJAsmH\0"
9093 /* 10993 */ "CLRJAsmH\0"
9094 /* 11002 */ "BRAsmH\0"
9095 /* 11009 */ "LOCRAsmH\0"
9096 /* 11018 */ "LOCGRAsmH\0"
9097 /* 11028 */ "SELGRAsmH\0"
9098 /* 11038 */ "LOCFHRAsmH\0"
9099 /* 11049 */ "SELFHRAsmH\0"
9100 /* 11060 */ "SELRAsmH\0"
9101 /* 11069 */ "CLGTAsmH\0"
9102 /* 11078 */ "CITAsmH\0"
9103 /* 11086 */ "CLFITAsmH\0"
9104 /* 11096 */ "CGITAsmH\0"
9105 /* 11105 */ "CLGITAsmH\0"
9106 /* 11115 */ "CLTAsmH\0"
9107 /* 11123 */ "CRTAsmH\0"
9108 /* 11131 */ "CGRTAsmH\0"
9109 /* 11140 */ "CLGRTAsmH\0"
9110 /* 11150 */ "CLRTAsmH\0"
9111 /* 11159 */ "NIAI\0"
9112 /* 11164 */ "VSBCBI\0"
9113 /* 11171 */ "VSCBI\0"
9114 /* 11177 */ "VSBI\0"
9115 /* 11182 */ "QPACI\0"
9116 /* 11188 */ "VFTCI\0"
9117 /* 11194 */ "VPDI\0"
9118 /* 11199 */ "TPEI\0"
9119 /* 11204 */ "ATOMIC_LOADW_AFI\0"
9120 /* 11221 */ "CFI\0"
9121 /* 11225 */ "AGFI\0"
9122 /* 11230 */ "CGFI\0"
9123 /* 11235 */ "ALGFI\0"
9124 /* 11241 */ "CLGFI\0"
9125 /* 11247 */ "SLGFI\0"
9126 /* 11253 */ "MSGFI\0"
9127 /* 11259 */ "ALFI\0"
9128 /* 11264 */ "CLFI\0"
9129 /* 11269 */ "SLFI\0"
9130 /* 11274 */ "MSFI\0"
9131 /* 11279 */ "VFI\0"
9132 /* 11283 */ "AHI\0"
9133 /* 11287 */ "LOCHI\0"
9134 /* 11293 */ "AGHI\0"
9135 /* 11298 */ "LOCGHI\0"
9136 /* 11305 */ "LGHI\0"
9137 /* 11310 */ "MGHI\0"
9138 /* 11315 */ "MVGHI\0"
9139 /* 11321 */ "LOCHHI\0"
9140 /* 11328 */ "MVHHI\0"
9141 /* 11334 */ "LHI\0"
9142 /* 11338 */ "MHI\0"
9143 /* 11342 */ "DBG_PHI\0"
9144 /* 11350 */ "MVHI\0"
9145 /* 11355 */ "CLI\0"
9146 /* 11359 */ "NI\0"
9147 /* 11362 */ "OI\0"
9148 /* 11365 */ "VREPI\0"
9149 /* 11371 */ "TPI\0"
9150 /* 11375 */ "QCTRI\0"
9151 /* 11381 */ "InsnVRI\0"
9152 /* 11389 */ "InsnRI\0"
9153 /* 11396 */ "ASI\0"
9154 /* 11400 */ "AGSI\0"
9155 /* 11405 */ "ALGSI\0"
9156 /* 11411 */ "CHSI\0"
9157 /* 11416 */ "CLFHSI\0"
9158 /* 11423 */ "CGHSI\0"
9159 /* 11429 */ "CLGHSI\0"
9160 /* 11436 */ "CHHSI\0"
9161 /* 11442 */ "CLHHSI\0"
9162 /* 11449 */ "ALSI\0"
9163 /* 11454 */ "G_FPTOSI\0"
9164 /* 11463 */ "QSI\0"
9165 /* 11467 */ "InsnRSI\0"
9166 /* 11475 */ "STSI\0"
9167 /* 11480 */ "InsnVSI\0"
9168 /* 11488 */ "InsnSI\0"
9169 /* 11495 */ "PTI\0"
9170 /* 11499 */ "G_FPTOUI\0"
9171 /* 11508 */ "MVI\0"
9172 /* 11512 */ "G_FPOWI\0"
9173 /* 11520 */ "XI\0"
9174 /* 11523 */ "CIJ\0"
9175 /* 11527 */ "CGIJ\0"
9176 /* 11532 */ "CLGIJ\0"
9177 /* 11538 */ "CLIJ\0"
9178 /* 11543 */ "CRJ\0"
9179 /* 11547 */ "CGRJ\0"
9180 /* 11552 */ "CLGRJ\0"
9181 /* 11558 */ "CLRJ\0"
9182 /* 11563 */ "SLAK\0"
9183 /* 11568 */ "SRAK\0"
9184 /* 11573 */ "PACK\0"
9185 /* 11578 */ "SCK\0"
9186 /* 11582 */ "STCK\0"
9187 /* 11587 */ "MVCK\0"
9188 /* 11592 */ "MVCDK\0"
9189 /* 11598 */ "WFK\0"
9190 /* 11602 */ "AHIK\0"
9191 /* 11607 */ "AGHIK\0"
9192 /* 11613 */ "ALGHSIK\0"
9193 /* 11621 */ "ALHSIK\0"
9194 /* 11628 */ "SLLK\0"
9195 /* 11633 */ "SRLK\0"
9196 /* 11638 */ "EDMK\0"
9197 /* 11643 */ "CondReturn_XPLINK\0"
9198 /* 11661 */ "IPK\0"
9199 /* 11665 */ "UNPK\0"
9200 /* 11670 */ "VPK\0"
9201 /* 11674 */ "ARK\0"
9202 /* 11678 */ "NCRK\0"
9203 /* 11683 */ "OCRK\0"
9204 /* 11688 */ "AGRK\0"
9205 /* 11693 */ "NCGRK\0"
9206 /* 11699 */ "OCGRK\0"
9207 /* 11705 */ "ALGRK\0"
9208 /* 11711 */ "SLGRK\0"
9209 /* 11717 */ "MGRK\0"
9210 /* 11722 */ "NNGRK\0"
9211 /* 11728 */ "NOGRK\0"
9212 /* 11734 */ "SGRK\0"
9213 /* 11739 */ "NXGRK\0"
9214 /* 11745 */ "ALRK\0"
9215 /* 11750 */ "SLRK\0"
9216 /* 11755 */ "NNRK\0"
9217 /* 11760 */ "NORK\0"
9218 /* 11765 */ "SRK\0"
9219 /* 11769 */ "NXRK\0"
9220 /* 11774 */ "G_PTRMASK\0"
9221 /* 11784 */ "MVCSK\0"
9222 /* 11790 */ "IVSK\0"
9223 /* 11795 */ "AHIMuxK\0"
9224 /* 11803 */ "LAAL\0"
9225 /* 11808 */ "BAL\0"
9226 /* 11812 */ "VMAL\0"
9227 /* 11817 */ "SAL\0"
9228 /* 11821 */ "VECL\0"
9229 /* 11826 */ "CLCL\0"
9230 /* 11831 */ "CallBRCL\0"
9231 /* 11840 */ "MVCL\0"
9232 /* 11845 */ "SLDL\0"
9233 /* 11850 */ "SRDL\0"
9234 /* 11855 */ "GC_LABEL\0"
9235 /* 11864 */ "DBG_LABEL\0"
9236 /* 11874 */ "EH_LABEL\0"
9237 /* 11883 */ "ANNOTATION_LABEL\0"
9238 /* 11900 */ "ICALL_BRANCH_FUNNEL\0"
9239 /* 11920 */ "VSEL\0"
9240 /* 11925 */ "STFL\0"
9241 /* 11930 */ "VAVGL\0"
9242 /* 11936 */ "RISBHL\0"
9243 /* 11943 */ "VCHL\0"
9244 /* 11948 */ "IIHL\0"
9245 /* 11953 */ "LLIHL\0"
9246 /* 11959 */ "NIHL\0"
9247 /* 11964 */ "OIHL\0"
9248 /* 11969 */ "TMHL\0"
9249 /* 11974 */ "G_FSHL\0"
9250 /* 11981 */ "G_SHL\0"
9251 /* 11987 */ "G_FCEIL\0"
9252 /* 11995 */ "InsnRIL\0"
9253 /* 12003 */ "InsnSIL\0"
9254 /* 12011 */ "TLS_GDCALL\0"
9255 /* 12022 */ "TLS_LDCALL\0"
9256 /* 12033 */ "PATCHABLE_TAIL_CALL\0"
9257 /* 12053 */ "PATCHABLE_TYPED_EVENT_CALL\0"
9258 /* 12080 */ "PATCHABLE_EVENT_CALL\0"
9259 /* 12101 */ "FENTRY_CALL\0"
9260 /* 12113 */ "RISBLL\0"
9261 /* 12120 */ "VFLL\0"
9262 /* 12125 */ "IILL\0"
9263 /* 12130 */ "KILL\0"
9264 /* 12135 */ "LLILL\0"
9265 /* 12141 */ "NILL\0"
9266 /* 12146 */ "OILL\0"
9267 /* 12151 */ "TMLL\0"
9268 /* 12156 */ "VUPLL\0"
9269 /* 12162 */ "VERLL\0"
9270 /* 12168 */ "SLL\0"
9271 /* 12172 */ "VLL\0"
9272 /* 12176 */ "VML\0"
9273 /* 12180 */ "VCLFNL\0"
9274 /* 12187 */ "VMNL\0"
9275 /* 12192 */ "CIBAsmNL\0"
9276 /* 12201 */ "CGIBAsmNL\0"
9277 /* 12211 */ "CLGIBAsmNL\0"
9278 /* 12222 */ "CLIBAsmNL\0"
9279 /* 12232 */ "CRBAsmNL\0"
9280 /* 12241 */ "CGRBAsmNL\0"
9281 /* 12251 */ "CLGRBAsmNL\0"
9282 /* 12262 */ "CLRBAsmNL\0"
9283 /* 12272 */ "LOCAsmNL\0"
9284 /* 12281 */ "STOCAsmNL\0"
9285 /* 12291 */ "LOCGAsmNL\0"
9286 /* 12301 */ "STOCGAsmNL\0"
9287 /* 12312 */ "JGAsmNL\0"
9288 /* 12320 */ "LOCFHAsmNL\0"
9289 /* 12331 */ "STOCFHAsmNL\0"
9290 /* 12343 */ "BIAsmNL\0"
9291 /* 12351 */ "LOCHIAsmNL\0"
9292 /* 12362 */ "LOCGHIAsmNL\0"
9293 /* 12374 */ "LOCHHIAsmNL\0"
9294 /* 12386 */ "CIJAsmNL\0"
9295 /* 12395 */ "CGIJAsmNL\0"
9296 /* 12405 */ "CLGIJAsmNL\0"
9297 /* 12416 */ "CLIJAsmNL\0"
9298 /* 12426 */ "CRJAsmNL\0"
9299 /* 12435 */ "CGRJAsmNL\0"
9300 /* 12445 */ "CLGRJAsmNL\0"
9301 /* 12456 */ "CLRJAsmNL\0"
9302 /* 12466 */ "BRAsmNL\0"
9303 /* 12474 */ "LOCRAsmNL\0"
9304 /* 12484 */ "LOCGRAsmNL\0"
9305 /* 12495 */ "SELGRAsmNL\0"
9306 /* 12506 */ "LOCFHRAsmNL\0"
9307 /* 12518 */ "SELFHRAsmNL\0"
9308 /* 12530 */ "SELRAsmNL\0"
9309 /* 12540 */ "CLGTAsmNL\0"
9310 /* 12550 */ "CITAsmNL\0"
9311 /* 12559 */ "CLFITAsmNL\0"
9312 /* 12570 */ "CGITAsmNL\0"
9313 /* 12580 */ "CLGITAsmNL\0"
9314 /* 12591 */ "CLTAsmNL\0"
9315 /* 12600 */ "CRTAsmNL\0"
9316 /* 12609 */ "CGRTAsmNL\0"
9317 /* 12619 */ "CLGRTAsmNL\0"
9318 /* 12630 */ "CLRTAsmNL\0"
9319 /* 12640 */ "G_CONSTANT_POOL\0"
9320 /* 12656 */ "VCFPL\0"
9321 /* 12662 */ "VUPL\0"
9322 /* 12667 */ "LARL\0"
9323 /* 12672 */ "MVCRL\0"
9324 /* 12678 */ "PFDRL\0"
9325 /* 12684 */ "CGFRL\0"
9326 /* 12690 */ "CLGFRL\0"
9327 /* 12697 */ "LLGFRL\0"
9328 /* 12704 */ "CGRL\0"
9329 /* 12709 */ "CLGRL\0"
9330 /* 12715 */ "STGRL\0"
9331 /* 12721 */ "CHRL\0"
9332 /* 12726 */ "CGHRL\0"
9333 /* 12732 */ "CLGHRL\0"
9334 /* 12739 */ "LLGHRL\0"
9335 /* 12746 */ "CLHRL\0"
9336 /* 12752 */ "LLHRL\0"
9337 /* 12758 */ "STHRL\0"
9338 /* 12764 */ "CLRL\0"
9339 /* 12769 */ "VLRL\0"
9340 /* 12774 */ "VMRL\0"
9341 /* 12779 */ "VESRL\0"
9342 /* 12785 */ "VSRL\0"
9343 /* 12790 */ "VSTRL\0"
9344 /* 12796 */ "EXRL\0"
9345 /* 12801 */ "CallBRASL\0"
9346 /* 12811 */ "VESL\0"
9347 /* 12816 */ "VMSL\0"
9348 /* 12821 */ "VSL\0"
9349 /* 12825 */ "LCCTL\0"
9350 /* 12831 */ "LCTL\0"
9351 /* 12836 */ "LPCTL\0"
9352 /* 12842 */ "LSCTL\0"
9353 /* 12848 */ "STCTL\0"
9354 /* 12854 */ "G_ROTL\0"
9355 /* 12861 */ "SORTL\0"
9356 /* 12867 */ "VSTL\0"
9357 /* 12872 */ "G_VECREDUCE_FMUL\0"
9358 /* 12889 */ "G_FMUL\0"
9359 /* 12896 */ "G_VECREDUCE_SEQ_FMUL\0"
9360 /* 12917 */ "G_STRICT_FMUL\0"
9361 /* 12931 */ "G_VECREDUCE_MUL\0"
9362 /* 12947 */ "G_MUL\0"
9363 /* 12953 */ "VL\0"
9364 /* 12956 */ "VMXL\0"
9365 /* 12961 */ "MAYL\0"
9366 /* 12966 */ "MYL\0"
9367 /* 12970 */ "VUPKZL\0"
9368 /* 12977 */ "CIBAsmL\0"
9369 /* 12985 */ "CGIBAsmL\0"
9370 /* 12994 */ "CLGIBAsmL\0"
9371 /* 13004 */ "CLIBAsmL\0"
9372 /* 13013 */ "CRBAsmL\0"
9373 /* 13021 */ "CGRBAsmL\0"
9374 /* 13030 */ "CLGRBAsmL\0"
9375 /* 13040 */ "CLRBAsmL\0"
9376 /* 13049 */ "LOCAsmL\0"
9377 /* 13057 */ "STOCAsmL\0"
9378 /* 13066 */ "LOCGAsmL\0"
9379 /* 13075 */ "STOCGAsmL\0"
9380 /* 13085 */ "JGAsmL\0"
9381 /* 13092 */ "LOCFHAsmL\0"
9382 /* 13102 */ "STOCFHAsmL\0"
9383 /* 13113 */ "BIAsmL\0"
9384 /* 13120 */ "LOCHIAsmL\0"
9385 /* 13130 */ "LOCGHIAsmL\0"
9386 /* 13141 */ "LOCHHIAsmL\0"
9387 /* 13152 */ "CIJAsmL\0"
9388 /* 13160 */ "CGIJAsmL\0"
9389 /* 13169 */ "CLGIJAsmL\0"
9390 /* 13179 */ "CLIJAsmL\0"
9391 /* 13188 */ "CRJAsmL\0"
9392 /* 13196 */ "CGRJAsmL\0"
9393 /* 13205 */ "CLGRJAsmL\0"
9394 /* 13215 */ "CLRJAsmL\0"
9395 /* 13224 */ "BRAsmL\0"
9396 /* 13231 */ "LOCRAsmL\0"
9397 /* 13240 */ "LOCGRAsmL\0"
9398 /* 13250 */ "SELGRAsmL\0"
9399 /* 13260 */ "LOCFHRAsmL\0"
9400 /* 13271 */ "SELFHRAsmL\0"
9401 /* 13282 */ "SELRAsmL\0"
9402 /* 13291 */ "CLGTAsmL\0"
9403 /* 13300 */ "CITAsmL\0"
9404 /* 13308 */ "CLFITAsmL\0"
9405 /* 13318 */ "CGITAsmL\0"
9406 /* 13327 */ "CLGITAsmL\0"
9407 /* 13337 */ "CLTAsmL\0"
9408 /* 13345 */ "CRTAsmL\0"
9409 /* 13353 */ "CGRTAsmL\0"
9410 /* 13362 */ "CLGRTAsmL\0"
9411 /* 13372 */ "CLRTAsmL\0"
9412 /* 13381 */ "LAM\0"
9413 /* 13385 */ "STAM\0"
9414 /* 13390 */ "VGBM\0"
9415 /* 13395 */ "IRBM\0"
9416 /* 13400 */ "RRBM\0"
9417 /* 13405 */ "ICM\0"
9418 /* 13409 */ "STCM\0"
9419 /* 13414 */ "G_FREM\0"
9420 /* 13421 */ "G_STRICT_FREM\0"
9421 /* 13435 */ "G_SREM\0"
9422 /* 13442 */ "G_UREM\0"
9423 /* 13449 */ "G_SDIVREM\0"
9424 /* 13459 */ "G_UDIVREM\0"
9425 /* 13469 */ "VGFM\0"
9426 /* 13474 */ "VFM\0"
9427 /* 13478 */ "VGM\0"
9428 /* 13482 */ "SCHM\0"
9429 /* 13487 */ "VERIM\0"
9430 /* 13493 */ "KM\0"
9431 /* 13496 */ "CLM\0"
9432 /* 13500 */ "VLM\0"
9433 /* 13504 */ "SRNM\0"
9434 /* 13509 */ "BAsmNM\0"
9435 /* 13516 */ "LOCAsmNM\0"
9436 /* 13525 */ "STOCAsmNM\0"
9437 /* 13535 */ "LOCGAsmNM\0"
9438 /* 13545 */ "STOCGAsmNM\0"
9439 /* 13556 */ "JGAsmNM\0"
9440 /* 13564 */ "LOCFHAsmNM\0"
9441 /* 13575 */ "STOCFHAsmNM\0"
9442 /* 13587 */ "BIAsmNM\0"
9443 /* 13595 */ "LOCHIAsmNM\0"
9444 /* 13606 */ "LOCGHIAsmNM\0"
9445 /* 13618 */ "LOCHHIAsmNM\0"
9446 /* 13630 */ "JAsmNM\0"
9447 /* 13637 */ "BRAsmNM\0"
9448 /* 13645 */ "LOCRAsmNM\0"
9449 /* 13655 */ "LOCGRAsmNM\0"
9450 /* 13666 */ "SELGRAsmNM\0"
9451 /* 13677 */ "LOCFHRAsmNM\0"
9452 /* 13689 */ "SELFHRAsmNM\0"
9453 /* 13701 */ "SELRAsmNM\0"
9454 /* 13711 */ "IPM\0"
9455 /* 13715 */ "SPM\0"
9456 /* 13719 */ "VBPERM\0"
9457 /* 13726 */ "VPERM\0"
9458 /* 13732 */ "INLINEASM\0"
9459 /* 13742 */ "BSM\0"
9460 /* 13746 */ "VCKSM\0"
9461 /* 13752 */ "STNSM\0"
9462 /* 13758 */ "STOSM\0"
9463 /* 13764 */ "BASSM\0"
9464 /* 13770 */ "VSTM\0"
9465 /* 13775 */ "VTM\0"
9466 /* 13779 */ "G_VECREDUCE_FMINIMUM\0"
9467 /* 13800 */ "G_FMINIMUM\0"
9468 /* 13811 */ "G_VECREDUCE_FMAXIMUM\0"
9469 /* 13832 */ "G_FMAXIMUM\0"
9470 /* 13843 */ "G_FMINNUM\0"
9471 /* 13853 */ "G_FMAXNUM\0"
9472 /* 13863 */ "VSUM\0"
9473 /* 13868 */ "BAsmM\0"
9474 /* 13874 */ "LOCAsmM\0"
9475 /* 13882 */ "STOCAsmM\0"
9476 /* 13891 */ "LOCGAsmM\0"
9477 /* 13900 */ "STOCGAsmM\0"
9478 /* 13910 */ "JGAsmM\0"
9479 /* 13917 */ "LOCFHAsmM\0"
9480 /* 13927 */ "STOCFHAsmM\0"
9481 /* 13938 */ "BIAsmM\0"
9482 /* 13945 */ "LOCHIAsmM\0"
9483 /* 13955 */ "LOCGHIAsmM\0"
9484 /* 13966 */ "LOCHHIAsmM\0"
9485 /* 13977 */ "JAsmM\0"
9486 /* 13983 */ "BRAsmM\0"
9487 /* 13990 */ "LOCRAsmM\0"
9488 /* 13999 */ "LOCGRAsmM\0"
9489 /* 14009 */ "SELGRAsmM\0"
9490 /* 14019 */ "LOCFHRAsmM\0"
9491 /* 14030 */ "SELFHRAsmM\0"
9492 /* 14041 */ "SELRAsmM\0"
9493 /* 14050 */ "LAN\0"
9494 /* 14054 */ "G_FATAN\0"
9495 /* 14062 */ "G_FTAN\0"
9496 /* 14069 */ "G_INTRINSIC_ROUNDEVEN\0"
9497 /* 14091 */ "VCFN\0"
9498 /* 14096 */ "RISBGN\0"
9499 /* 14103 */ "G_ASSERT_ALIGN\0"
9500 /* 14118 */ "G_FCOPYSIGN\0"
9501 /* 14130 */ "ALSIHN\0"
9502 /* 14137 */ "MVCIN\0"
9503 /* 14143 */ "TBEGIN\0"
9504 /* 14150 */ "PGIN\0"
9505 /* 14155 */ "VFMIN\0"
9506 /* 14161 */ "G_VECREDUCE_FMIN\0"
9507 /* 14178 */ "G_ATOMICRMW_FMIN\0"
9508 /* 14195 */ "G_VECREDUCE_SMIN\0"
9509 /* 14212 */ "G_SMIN\0"
9510 /* 14219 */ "G_VECREDUCE_UMIN\0"
9511 /* 14236 */ "G_UMIN\0"
9512 /* 14243 */ "ATOMIC_LOADW_UMIN\0"
9513 /* 14261 */ "G_ATOMICRMW_UMIN\0"
9514 /* 14278 */ "ATOMIC_LOADW_MIN\0"
9515 /* 14295 */ "G_ATOMICRMW_MIN\0"
9516 /* 14311 */ "G_FASIN\0"
9517 /* 14319 */ "G_FSIN\0"
9518 /* 14326 */ "VMN\0"
9519 /* 14330 */ "VNN\0"
9520 /* 14334 */ "CFI_INSTRUCTION\0"
9521 /* 14350 */ "MVN\0"
9522 /* 14354 */ "ADJCALLSTACKDOWN\0"
9523 /* 14371 */ "LAO\0"
9524 /* 14375 */ "VMAO\0"
9525 /* 14380 */ "G_SSUBO\0"
9526 /* 14388 */ "G_USUBO\0"
9527 /* 14396 */ "G_SADDO\0"
9528 /* 14404 */ "G_UADDO\0"
9529 /* 14412 */ "JUMP_TABLE_DEBUG_INFO\0"
9530 /* 14434 */ "VMALO\0"
9531 /* 14440 */ "VMLO\0"
9532 /* 14445 */ "PLO\0"
9533 /* 14449 */ "G_SMULO\0"
9534 /* 14457 */ "G_UMULO\0"
9535 /* 14465 */ "PCKMO\0"
9536 /* 14471 */ "VMO\0"
9537 /* 14475 */ "PPNO\0"
9538 /* 14480 */ "PRNO\0"
9539 /* 14485 */ "VNO\0"
9540 /* 14489 */ "BAsmNO\0"
9541 /* 14496 */ "LOCAsmNO\0"
9542 /* 14505 */ "STOCAsmNO\0"
9543 /* 14515 */ "LOCGAsmNO\0"
9544 /* 14525 */ "STOCGAsmNO\0"
9545 /* 14536 */ "JGAsmNO\0"
9546 /* 14544 */ "LOCFHAsmNO\0"
9547 /* 14555 */ "STOCFHAsmNO\0"
9548 /* 14567 */ "BIAsmNO\0"
9549 /* 14575 */ "LOCHIAsmNO\0"
9550 /* 14586 */ "LOCGHIAsmNO\0"
9551 /* 14598 */ "LOCHHIAsmNO\0"
9552 /* 14610 */ "JAsmNO\0"
9553 /* 14617 */ "BRAsmNO\0"
9554 /* 14625 */ "LOCRAsmNO\0"
9555 /* 14635 */ "LOCGRAsmNO\0"
9556 /* 14646 */ "SELGRAsmNO\0"
9557 /* 14657 */ "LOCFHRAsmNO\0"
9558 /* 14669 */ "SELFHRAsmNO\0"
9559 /* 14681 */ "SELRAsmNO\0"
9560 /* 14691 */ "TROO\0"
9561 /* 14696 */ "PFPO\0"
9562 /* 14701 */ "G_BZERO\0"
9563 /* 14709 */ "VZERO\0"
9564 /* 14715 */ "VFPSO\0"
9565 /* 14721 */ "TRTO\0"
9566 /* 14726 */ "MVO\0"
9567 /* 14730 */ "BAsmO\0"
9568 /* 14736 */ "LOCAsmO\0"
9569 /* 14744 */ "STOCAsmO\0"
9570 /* 14753 */ "LOCGAsmO\0"
9571 /* 14762 */ "STOCGAsmO\0"
9572 /* 14772 */ "JGAsmO\0"
9573 /* 14779 */ "LOCFHAsmO\0"
9574 /* 14789 */ "STOCFHAsmO\0"
9575 /* 14800 */ "BIAsmO\0"
9576 /* 14807 */ "LOCHIAsmO\0"
9577 /* 14817 */ "LOCGHIAsmO\0"
9578 /* 14828 */ "LOCHHIAsmO\0"
9579 /* 14839 */ "JAsmO\0"
9580 /* 14845 */ "BRAsmO\0"
9581 /* 14852 */ "LOCRAsmO\0"
9582 /* 14861 */ "LOCGRAsmO\0"
9583 /* 14871 */ "SELGRAsmO\0"
9584 /* 14881 */ "LOCFHRAsmO\0"
9585 /* 14892 */ "SELFHRAsmO\0"
9586 /* 14903 */ "SELRAsmO\0"
9587 /* 14912 */ "STACKMAP\0"
9588 /* 14921 */ "G_DEBUGTRAP\0"
9589 /* 14933 */ "G_UBSANTRAP\0"
9590 /* 14945 */ "G_TRAP\0"
9591 /* 14952 */ "G_ATOMICRMW_UDEC_WRAP\0"
9592 /* 14974 */ "G_ATOMICRMW_UINC_WRAP\0"
9593 /* 14996 */ "STAP\0"
9594 /* 15001 */ "VAP\0"
9595 /* 15005 */ "G_BSWAP\0"
9596 /* 15013 */ "ZAP\0"
9597 /* 15017 */ "MVCP\0"
9598 /* 15022 */ "VSCHDP\0"
9599 /* 15029 */ "STIDP\0"
9600 /* 15035 */ "RDP\0"
9601 /* 15039 */ "VSDP\0"
9602 /* 15044 */ "VDP\0"
9603 /* 15048 */ "VCLZDP\0"
9604 /* 15055 */ "VLREP\0"
9605 /* 15061 */ "VLBRREP\0"
9606 /* 15069 */ "VREP\0"
9607 /* 15074 */ "VCLFP\0"
9608 /* 15080 */ "G_SITOFP\0"
9609 /* 15089 */ "G_UITOFP\0"
9610 /* 15098 */ "VCSFP\0"
9611 /* 15104 */ "SIGP\0"
9612 /* 15109 */ "VLVGP\0"
9613 /* 15115 */ "RCHP\0"
9614 /* 15120 */ "VSCHP\0"
9615 /* 15126 */ "VSCSHP\0"
9616 /* 15133 */ "VLIP\0"
9617 /* 15138 */ "VLP\0"
9618 /* 15142 */ "G_FCMP\0"
9619 /* 15149 */ "G_ICMP\0"
9620 /* 15156 */ "G_SCMP\0"
9621 /* 15163 */ "G_UCMP\0"
9622 /* 15170 */ "VMP\0"
9623 /* 15174 */ "BAsmNP\0"
9624 /* 15181 */ "LOCAsmNP\0"
9625 /* 15190 */ "STOCAsmNP\0"
9626 /* 15200 */ "LOCGAsmNP\0"
9627 /* 15210 */ "STOCGAsmNP\0"
9628 /* 15221 */ "JGAsmNP\0"
9629 /* 15229 */ "LOCFHAsmNP\0"
9630 /* 15240 */ "STOCFHAsmNP\0"
9631 /* 15252 */ "BIAsmNP\0"
9632 /* 15260 */ "LOCHIAsmNP\0"
9633 /* 15271 */ "LOCGHIAsmNP\0"
9634 /* 15283 */ "LOCHHIAsmNP\0"
9635 /* 15295 */ "JAsmNP\0"
9636 /* 15302 */ "BRAsmNP\0"
9637 /* 15310 */ "LOCRAsmNP\0"
9638 /* 15320 */ "LOCGRAsmNP\0"
9639 /* 15331 */ "SELGRAsmNP\0"
9640 /* 15342 */ "LOCFHRAsmNP\0"
9641 /* 15354 */ "SELFHRAsmNP\0"
9642 /* 15366 */ "SELRAsmNP\0"
9643 /* 15376 */ "NOP\0"
9644 /* 15380 */ "CONVERGENCECTRL_LOOP\0"
9645 /* 15401 */ "G_CTPOP\0"
9646 /* 15409 */ "VPSOP\0"
9647 /* 15415 */ "PATCHABLE_OP\0"
9648 /* 15428 */ "FAULTING_OP\0"
9649 /* 15440 */ "BPP\0"
9650 /* 15444 */ "LPP\0"
9651 /* 15448 */ "BPRP\0"
9652 /* 15453 */ "VSRP\0"
9653 /* 15458 */ "VRP\0"
9654 /* 15462 */ "LASP\0"
9655 /* 15467 */ "CSP\0"
9656 /* 15471 */ "VSCHSP\0"
9657 /* 15478 */ "VMSP\0"
9658 /* 15483 */ "VSP\0"
9659 /* 15487 */ "VTP\0"
9660 /* 15491 */ "ADJCALLSTACKUP\0"
9661 /* 15506 */ "PREALLOCATED_SETUP\0"
9662 /* 15525 */ "G_FLDEXP\0"
9663 /* 15534 */ "G_STRICT_FLDEXP\0"
9664 /* 15550 */ "G_FEXP\0"
9665 /* 15557 */ "G_FFREXP\0"
9666 /* 15566 */ "VSCHXP\0"
9667 /* 15573 */ "BAsmP\0"
9668 /* 15579 */ "LOCAsmP\0"
9669 /* 15587 */ "STOCAsmP\0"
9670 /* 15596 */ "LOCGAsmP\0"
9671 /* 15605 */ "STOCGAsmP\0"
9672 /* 15615 */ "JGAsmP\0"
9673 /* 15622 */ "LOCFHAsmP\0"
9674 /* 15632 */ "STOCFHAsmP\0"
9675 /* 15643 */ "BIAsmP\0"
9676 /* 15650 */ "LOCHIAsmP\0"
9677 /* 15660 */ "LOCGHIAsmP\0"
9678 /* 15671 */ "LOCHHIAsmP\0"
9679 /* 15682 */ "JAsmP\0"
9680 /* 15688 */ "BRAsmP\0"
9681 /* 15695 */ "LOCRAsmP\0"
9682 /* 15704 */ "LOCGRAsmP\0"
9683 /* 15714 */ "SELGRAsmP\0"
9684 /* 15724 */ "LOCFHRAsmP\0"
9685 /* 15735 */ "SELFHRAsmP\0"
9686 /* 15746 */ "SELRAsmP\0"
9687 /* 15755 */ "VAQ\0"
9688 /* 15759 */ "VACQ\0"
9689 /* 15764 */ "VACCQ\0"
9690 /* 15770 */ "VACCCQ\0"
9691 /* 15777 */ "VCEQ\0"
9692 /* 15782 */ "VSBCBIQ\0"
9693 /* 15790 */ "VSCBIQ\0"
9694 /* 15797 */ "VSBIQ\0"
9695 /* 15803 */ "VSUMQ\0"
9696 /* 15809 */ "LPQ\0"
9697 /* 15813 */ "STPQ\0"
9698 /* 15818 */ "VLBRQ\0"
9699 /* 15824 */ "VSTBRQ\0"
9700 /* 15831 */ "VFSQ\0"
9701 /* 15836 */ "VSQ\0"
9702 /* 15840 */ "LBEAR\0"
9703 /* 15846 */ "STBEAR\0"
9704 /* 15853 */ "EPAR\0"
9705 /* 15858 */ "ESAR\0"
9706 /* 15863 */ "SSAR\0"
9707 /* 15868 */ "TAR\0"
9708 /* 15872 */ "ATOMIC_LOADW_AR\0"
9709 /* 15888 */ "MADBR\0"
9710 /* 15894 */ "LCDBR\0"
9711 /* 15900 */ "DDBR\0"
9712 /* 15905 */ "LEDBR\0"
9713 /* 15911 */ "CFDBR\0"
9714 /* 15917 */ "CLFDBR\0"
9715 /* 15924 */ "CGDBR\0"
9716 /* 15930 */ "CLGDBR\0"
9717 /* 15937 */ "DIDBR\0"
9718 /* 15943 */ "FIDBR\0"
9719 /* 15949 */ "KDBR\0"
9720 /* 15954 */ "MDBR\0"
9721 /* 15959 */ "LNDBR\0"
9722 /* 15965 */ "LPDBR\0"
9723 /* 15971 */ "SQDBR\0"
9724 /* 15977 */ "MSDBR\0"
9725 /* 15983 */ "LTDBR\0"
9726 /* 15989 */ "LXDBR\0"
9727 /* 15995 */ "MXDBR\0"
9728 /* 16001 */ "MAEBR\0"
9729 /* 16007 */ "LCEBR\0"
9730 /* 16013 */ "LDEBR\0"
9731 /* 16019 */ "MDEBR\0"
9732 /* 16025 */ "MEEBR\0"
9733 /* 16031 */ "CFEBR\0"
9734 /* 16037 */ "CLFEBR\0"
9735 /* 16044 */ "CGEBR\0"
9736 /* 16050 */ "CLGEBR\0"
9737 /* 16057 */ "DIEBR\0"
9738 /* 16063 */ "FIEBR\0"
9739 /* 16069 */ "KEBR\0"
9740 /* 16074 */ "LNEBR\0"
9741 /* 16080 */ "LPEBR\0"
9742 /* 16086 */ "SQEBR\0"
9743 /* 16092 */ "MSEBR\0"
9744 /* 16098 */ "LTEBR\0"
9745 /* 16104 */ "LXEBR\0"
9746 /* 16110 */ "CDFBR\0"
9747 /* 16116 */ "CEFBR\0"
9748 /* 16122 */ "CDLFBR\0"
9749 /* 16129 */ "CELFBR\0"
9750 /* 16136 */ "CXLFBR\0"
9751 /* 16143 */ "CXFBR\0"
9752 /* 16149 */ "CDGBR\0"
9753 /* 16155 */ "CEGBR\0"
9754 /* 16161 */ "CDLGBR\0"
9755 /* 16168 */ "CELGBR\0"
9756 /* 16175 */ "CXLGBR\0"
9757 /* 16182 */ "CXGBR\0"
9758 /* 16188 */ "SLBR\0"
9759 /* 16193 */ "VLBR\0"
9760 /* 16198 */ "VSTBR\0"
9761 /* 16204 */ "AXBR\0"
9762 /* 16209 */ "LCXBR\0"
9763 /* 16215 */ "LDXBR\0"
9764 /* 16221 */ "LEXBR\0"
9765 /* 16227 */ "CFXBR\0"
9766 /* 16233 */ "CLFXBR\0"
9767 /* 16240 */ "CGXBR\0"
9768 /* 16246 */ "CLGXBR\0"
9769 /* 16253 */ "FIXBR\0"
9770 /* 16259 */ "KXBR\0"
9771 /* 16264 */ "MXBR\0"
9772 /* 16269 */ "LNXBR\0"
9773 /* 16275 */ "LPXBR\0"
9774 /* 16281 */ "SQXBR\0"
9775 /* 16287 */ "SXBR\0"
9776 /* 16292 */ "LTXBR\0"
9777 /* 16298 */ "G_BR\0"
9778 /* 16303 */ "INLINEASM_BR\0"
9779 /* 16316 */ "CallBR\0"
9780 /* 16323 */ "CallBCR\0"
9781 /* 16331 */ "LLGCR\0"
9782 /* 16337 */ "ALCR\0"
9783 /* 16342 */ "LLCR\0"
9784 /* 16347 */ "LOCR\0"
9785 /* 16352 */ "MADR\0"
9786 /* 16357 */ "TBDR\0"
9787 /* 16362 */ "LCDR\0"
9788 /* 16367 */ "G_BLOCK_ADDR\0"
9789 /* 16380 */ "TBEDR\0"
9790 /* 16386 */ "LEDR\0"
9791 /* 16391 */ "CFDR\0"
9792 /* 16396 */ "CGDR\0"
9793 /* 16401 */ "LGDR\0"
9794 /* 16406 */ "THDR\0"
9795 /* 16411 */ "FIDR\0"
9796 /* 16416 */ "LDR\0"
9797 /* 16420 */ "MDR\0"
9798 /* 16424 */ "LNDR\0"
9799 /* 16429 */ "LPDR\0"
9800 /* 16434 */ "SQDR\0"
9801 /* 16439 */ "LRDR\0"
9802 /* 16444 */ "MSDR\0"
9803 /* 16449 */ "LTDR\0"
9804 /* 16454 */ "LXDR\0"
9805 /* 16459 */ "MXDR\0"
9806 /* 16464 */ "LZDR\0"
9807 /* 16469 */ "MAER\0"
9808 /* 16474 */ "LCER\0"
9809 /* 16479 */ "THDER\0"
9810 /* 16485 */ "LDER\0"
9811 /* 16490 */ "MDER\0"
9812 /* 16495 */ "MEER\0"
9813 /* 16500 */ "CFER\0"
9814 /* 16505 */ "LFER\0"
9815 /* 16510 */ "CGER\0"
9816 /* 16515 */ "HER\0"
9817 /* 16519 */ "FIER\0"
9818 /* 16524 */ "MEMBARRIER\0"
9819 /* 16535 */ "G_CONSTANT_FOLD_BARRIER\0"
9820 /* 16559 */ "VLER\0"
9821 /* 16564 */ "MER\0"
9822 /* 16568 */ "LNER\0"
9823 /* 16573 */ "LPER\0"
9824 /* 16578 */ "SQER\0"
9825 /* 16583 */ "LRER\0"
9826 /* 16588 */ "MSER\0"
9827 /* 16593 */ "LTER\0"
9828 /* 16598 */ "PATCHABLE_FUNCTION_ENTER\0"
9829 /* 16623 */ "G_READCYCLECOUNTER\0"
9830 /* 16642 */ "G_READSTEADYCOUNTER\0"
9831 /* 16662 */ "G_READ_REGISTER\0"
9832 /* 16678 */ "G_WRITE_REGISTER\0"
9833 /* 16695 */ "VSTER\0"
9834 /* 16701 */ "LXER\0"
9835 /* 16706 */ "LZER\0"
9836 /* 16711 */ "LCDFR\0"
9837 /* 16717 */ "LNDFR\0"
9838 /* 16723 */ "LPDFR\0"
9839 /* 16729 */ "CEFR\0"
9840 /* 16734 */ "LEFR\0"
9841 /* 16739 */ "AGFR\0"
9842 /* 16744 */ "LCGFR\0"
9843 /* 16750 */ "ALGFR\0"
9844 /* 16756 */ "CLGFR\0"
9845 /* 16762 */ "LLGFR\0"
9846 /* 16768 */ "SLGFR\0"
9847 /* 16774 */ "LNGFR\0"
9848 /* 16780 */ "LPGFR\0"
9849 /* 16786 */ "DSGFR\0"
9850 /* 16792 */ "MSGFR\0"
9851 /* 16798 */ "LTGFR\0"
9852 /* 16804 */ "CXFR\0"
9853 /* 16809 */ "AGR\0"
9854 /* 16813 */ "SLBGR\0"
9855 /* 16819 */ "ALCGR\0"
9856 /* 16825 */ "LOCGR\0"
9857 /* 16831 */ "CDGR\0"
9858 /* 16836 */ "LDGR\0"
9859 /* 16841 */ "CEGR\0"
9860 /* 16846 */ "ALGR\0"
9861 /* 16851 */ "CLGR\0"
9862 /* 16856 */ "DLGR\0"
9863 /* 16861 */ "SELGR\0"
9864 /* 16867 */ "MLGR\0"
9865 /* 16872 */ "SLGR\0"
9866 /* 16877 */ "LNGR\0"
9867 /* 16882 */ "FLOGR\0"
9868 /* 16888 */ "LPGR\0"
9869 /* 16893 */ "DSGR\0"
9870 /* 16898 */ "MSGR\0"
9871 /* 16903 */ "BCTGR\0"
9872 /* 16909 */ "LTGR\0"
9873 /* 16914 */ "NOTGR\0"
9874 /* 16920 */ "LRVGR\0"
9875 /* 16926 */ "CXGR\0"
9876 /* 16931 */ "LOCFHR\0"
9877 /* 16938 */ "SELFHR\0"
9878 /* 16945 */ "LLGHR\0"
9879 /* 16951 */ "CHHR\0"
9880 /* 16956 */ "AHHHR\0"
9881 /* 16962 */ "ALHHHR\0"
9882 /* 16969 */ "SLHHHR\0"
9883 /* 16976 */ "SHHHR\0"
9884 /* 16982 */ "CLHHR\0"
9885 /* 16988 */ "LLHR\0"
9886 /* 16993 */ "G_ASHR\0"
9887 /* 17000 */ "G_FSHR\0"
9888 /* 17007 */ "G_LSHR\0"
9889 /* 17014 */ "MAYHR\0"
9890 /* 17020 */ "MYHR\0"
9891 /* 17025 */ "EPAIR\0"
9892 /* 17031 */ "ESAIR\0"
9893 /* 17037 */ "SSAIR\0"
9894 /* 17043 */ "BAKR\0"
9895 /* 17048 */ "BALR\0"
9896 /* 17053 */ "CLR\0"
9897 /* 17057 */ "DLR\0"
9898 /* 17061 */ "SELR\0"
9899 /* 17066 */ "VFLR\0"
9900 /* 17071 */ "CHLR\0"
9901 /* 17076 */ "AHHLR\0"
9902 /* 17082 */ "ALHHLR\0"
9903 /* 17089 */ "SLHHLR\0"
9904 /* 17096 */ "SHHLR\0"
9905 /* 17102 */ "CLHLR\0"
9906 /* 17108 */ "MLR\0"
9907 /* 17112 */ "VLRLR\0"
9908 /* 17118 */ "VSTRLR\0"
9909 /* 17125 */ "SLR\0"
9910 /* 17129 */ "VLR\0"
9911 /* 17133 */ "MAYLR\0"
9912 /* 17139 */ "MYLR\0"
9913 /* 17144 */ "MR\0"
9914 /* 17147 */ "LNR\0"
9915 /* 17151 */ "ATOMIC_LOADW_NR\0"
9916 /* 17167 */ "CONVERGENCECTRL_ANCHOR\0"
9917 /* 17190 */ "G_FFLOOR\0"
9918 /* 17199 */ "G_EXTRACT_SUBVECTOR\0"
9919 /* 17219 */ "G_INSERT_SUBVECTOR\0"
9920 /* 17238 */ "G_BUILD_VECTOR\0"
9921 /* 17253 */ "G_SHUFFLE_VECTOR\0"
9922 /* 17270 */ "G_SPLAT_VECTOR\0"
9923 /* 17285 */ "G_VECREDUCE_XOR\0"
9924 /* 17301 */ "G_XOR\0"
9925 /* 17307 */ "G_ATOMICRMW_XOR\0"
9926 /* 17323 */ "G_VECREDUCE_OR\0"
9927 /* 17338 */ "G_OR\0"
9928 /* 17343 */ "ATOMIC_LOADW_OR\0"
9929 /* 17359 */ "G_ATOMICRMW_OR\0"
9930 /* 17374 */ "LPR\0"
9931 /* 17378 */ "NOPR\0"
9932 /* 17383 */ "VSRPR\0"
9933 /* 17389 */ "InsnVRR\0"
9934 /* 17397 */ "InsnRR\0"
9935 /* 17404 */ "CallBASR\0"
9936 /* 17413 */ "SFASR\0"
9937 /* 17419 */ "MSR\0"
9938 /* 17423 */ "ATOMIC_LOADW_SR\0"
9939 /* 17439 */ "BCTR\0"
9940 /* 17444 */ "ECCTR\0"
9941 /* 17450 */ "SCCTR\0"
9942 /* 17456 */ "KMCTR\0"
9943 /* 17462 */ "EPCTR\0"
9944 /* 17468 */ "SPCTR\0"
9945 /* 17474 */ "QADTR\0"
9946 /* 17480 */ "CDTR\0"
9947 /* 17485 */ "DDTR\0"
9948 /* 17490 */ "CEDTR\0"
9949 /* 17496 */ "EEDTR\0"
9950 /* 17502 */ "IEDTR\0"
9951 /* 17508 */ "LEDTR\0"
9952 /* 17514 */ "CFDTR\0"
9953 /* 17520 */ "CLFDTR\0"
9954 /* 17527 */ "CGDTR\0"
9955 /* 17533 */ "CLGDTR\0"
9956 /* 17540 */ "FIDTR\0"
9957 /* 17546 */ "KDTR\0"
9958 /* 17551 */ "MDTR\0"
9959 /* 17556 */ "RRDTR\0"
9960 /* 17562 */ "CSDTR\0"
9961 /* 17568 */ "ESDTR\0"
9962 /* 17574 */ "LTDTR\0"
9963 /* 17580 */ "CUDTR\0"
9964 /* 17586 */ "LXDTR\0"
9965 /* 17592 */ "LDETR\0"
9966 /* 17598 */ "CDFTR\0"
9967 /* 17604 */ "CDLFTR\0"
9968 /* 17611 */ "CXLFTR\0"
9969 /* 17618 */ "CXFTR\0"
9970 /* 17624 */ "CDGTR\0"
9971 /* 17630 */ "CDLGTR\0"
9972 /* 17637 */ "LLGTR\0"
9973 /* 17643 */ "CXLGTR\0"
9974 /* 17650 */ "CXGTR\0"
9975 /* 17656 */ "LTR\0"
9976 /* 17660 */ "NOTR\0"
9977 /* 17665 */ "G_ROTR\0"
9978 /* 17672 */ "G_INTTOPTR\0"
9979 /* 17683 */ "TRTR\0"
9980 /* 17688 */ "CDSTR\0"
9981 /* 17694 */ "VISTR\0"
9982 /* 17700 */ "CXSTR\0"
9983 /* 17706 */ "CDUTR\0"
9984 /* 17712 */ "CXUTR\0"
9985 /* 17718 */ "QAXTR\0"
9986 /* 17724 */ "CXTR\0"
9987 /* 17729 */ "LDXTR\0"
9988 /* 17735 */ "CEXTR\0"
9989 /* 17741 */ "EEXTR\0"
9990 /* 17747 */ "IEXTR\0"
9991 /* 17753 */ "CFXTR\0"
9992 /* 17759 */ "CLFXTR\0"
9993 /* 17766 */ "CGXTR\0"
9994 /* 17772 */ "CLGXTR\0"
9995 /* 17779 */ "FIXTR\0"
9996 /* 17785 */ "KXTR\0"
9997 /* 17790 */ "MXTR\0"
9998 /* 17795 */ "RRXTR\0"
9999 /* 17801 */ "CSXTR\0"
10000 /* 17807 */ "ESXTR\0"
10001 /* 17813 */ "LTXTR\0"
10002 /* 17819 */ "CUXTR\0"
10003 /* 17825 */ "AUR\0"
10004 /* 17829 */ "SUR\0"
10005 /* 17833 */ "LRVR\0"
10006 /* 17838 */ "AWR\0"
10007 /* 17842 */ "SWR\0"
10008 /* 17846 */ "AXR\0"
10009 /* 17850 */ "LCXR\0"
10010 /* 17855 */ "LDXR\0"
10011 /* 17860 */ "LEXR\0"
10012 /* 17865 */ "CFXR\0"
10013 /* 17870 */ "CGXR\0"
10014 /* 17875 */ "FIXR\0"
10015 /* 17880 */ "LXR\0"
10016 /* 17884 */ "MXR\0"
10017 /* 17888 */ "LNXR\0"
10018 /* 17893 */ "LPXR\0"
10019 /* 17898 */ "SQXR\0"
10020 /* 17903 */ "SXR\0"
10021 /* 17907 */ "LTXR\0"
10022 /* 17912 */ "LZXR\0"
10023 /* 17917 */ "ATOMIC_LOADW_XR\0"
10024 /* 17933 */ "MAYR\0"
10025 /* 17938 */ "MYR\0"
10026 /* 17942 */ "VPKZR\0"
10027 /* 17948 */ "BAS\0"
10028 /* 17952 */ "LFAS\0"
10029 /* 17957 */ "BRAS\0"
10030 /* 17962 */ "G_FABS\0"
10031 /* 17969 */ "G_ABS\0"
10032 /* 17975 */ "VSTRCBS\0"
10033 /* 17983 */ "VFCEDBS\0"
10034 /* 17991 */ "WFCEDBS\0"
10035 /* 17999 */ "VFCHEDBS\0"
10036 /* 18008 */ "WFCHEDBS\0"
10037 /* 18017 */ "VFKHEDBS\0"
10038 /* 18026 */ "WFKHEDBS\0"
10039 /* 18035 */ "VFKEDBS\0"
10040 /* 18043 */ "WFKEDBS\0"
10041 /* 18051 */ "VFCHDBS\0"
10042 /* 18059 */ "WFCHDBS\0"
10043 /* 18067 */ "VFKHDBS\0"
10044 /* 18075 */ "WFKHDBS\0"
10045 /* 18083 */ "VFAEBS\0"
10046 /* 18090 */ "VFEEBS\0"
10047 /* 18097 */ "VFENEBS\0"
10048 /* 18105 */ "VCHBS\0"
10049 /* 18111 */ "VCHLBS\0"
10050 /* 18118 */ "VCEQBS\0"
10051 /* 18125 */ "VISTRBS\0"
10052 /* 18133 */ "VFCESBS\0"
10053 /* 18141 */ "WFCESBS\0"
10054 /* 18149 */ "VFCHESBS\0"
10055 /* 18158 */ "WFCHESBS\0"
10056 /* 18167 */ "VFKHESBS\0"
10057 /* 18176 */ "WFKHESBS\0"
10058 /* 18185 */ "VFKESBS\0"
10059 /* 18193 */ "WFKESBS\0"
10060 /* 18201 */ "VFCHSBS\0"
10061 /* 18209 */ "WFCHSBS\0"
10062 /* 18217 */ "VFKHSBS\0"
10063 /* 18225 */ "WFKHSBS\0"
10064 /* 18233 */ "WFCEXBS\0"
10065 /* 18241 */ "WFCHEXBS\0"
10066 /* 18250 */ "WFKHEXBS\0"
10067 /* 18259 */ "WFKEXBS\0"
10068 /* 18267 */ "WFCHXBS\0"
10069 /* 18275 */ "WFKHXBS\0"
10070 /* 18283 */ "VSTRCZBS\0"
10071 /* 18292 */ "VFAEZBS\0"
10072 /* 18300 */ "VFEEZBS\0"
10073 /* 18308 */ "VFENEZBS\0"
10074 /* 18317 */ "MVCS\0"
10075 /* 18322 */ "CDS\0"
10076 /* 18326 */ "G_UNMERGE_VALUES\0"
10077 /* 18343 */ "G_MERGE_VALUES\0"
10078 /* 18358 */ "VSTRCFS\0"
10079 /* 18366 */ "VFAEFS\0"
10080 /* 18373 */ "VFEEFS\0"
10081 /* 18380 */ "VFENEFS\0"
10082 /* 18388 */ "VCHFS\0"
10083 /* 18394 */ "VCHLFS\0"
10084 /* 18401 */ "VCEQFS\0"
10085 /* 18408 */ "VISTRFS\0"
10086 /* 18416 */ "VPKSFS\0"
10087 /* 18423 */ "VPKLSFS\0"
10088 /* 18431 */ "VFS\0"
10089 /* 18435 */ "VSTRCZFS\0"
10090 /* 18444 */ "VFAEZFS\0"
10091 /* 18452 */ "VFEEZFS\0"
10092 /* 18460 */ "VFENEZFS\0"
10093 /* 18469 */ "VCHGS\0"
10094 /* 18475 */ "VCHLGS\0"
10095 /* 18482 */ "VCEQGS\0"
10096 /* 18489 */ "VPKSGS\0"
10097 /* 18496 */ "VPKLSGS\0"
10098 /* 18504 */ "VSTRCHS\0"
10099 /* 18512 */ "VFAEHS\0"
10100 /* 18519 */ "VFEEHS\0"
10101 /* 18526 */ "VFENEHS\0"
10102 /* 18534 */ "VCHHS\0"
10103 /* 18540 */ "VCHLHS\0"
10104 /* 18547 */ "VCEQHS\0"
10105 /* 18554 */ "VISTRHS\0"
10106 /* 18562 */ "VPKSHS\0"
10107 /* 18569 */ "VPKLSHS\0"
10108 /* 18577 */ "VSTRCZHS\0"
10109 /* 18586 */ "VFAEZHS\0"
10110 /* 18594 */ "VFEEZHS\0"
10111 /* 18602 */ "VFENEZHS\0"
10112 /* 18611 */ "InsnRIS\0"
10113 /* 18619 */ "VPKS\0"
10114 /* 18624 */ "VPKLS\0"
10115 /* 18630 */ "VFLLS\0"
10116 /* 18636 */ "WFLLS\0"
10117 /* 18642 */ "VFMS\0"
10118 /* 18647 */ "VFNMS\0"
10119 /* 18653 */ "G_FACOS\0"
10120 /* 18661 */ "G_FCOS\0"
10121 /* 18668 */ "MVCOS\0"
10122 /* 18674 */ "STCPS\0"
10123 /* 18680 */ "VCFPS\0"
10124 /* 18686 */ "G_CONCAT_VECTORS\0"
10125 /* 18703 */ "InsnRRS\0"
10126 /* 18711 */ "VSTRS\0"
10127 /* 18717 */ "InsnVRS\0"
10128 /* 18725 */ "InsnRS\0"
10129 /* 18732 */ "COPY_TO_REGCLASS\0"
10130 /* 18749 */ "G_IS_FPCLASS\0"
10131 /* 18762 */ "G_ATOMIC_CMPXCHG_WITH_SUCCESS\0"
10132 /* 18792 */ "G_VECTOR_COMPRESS\0"
10133 /* 18810 */ "InsnSS\0"
10134 /* 18817 */ "G_INTRINSIC_W_SIDE_EFFECTS\0"
10135 /* 18844 */ "G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS\0"
10136 /* 18882 */ "VS\0"
10137 /* 18885 */ "InsnS\0"
10138 /* 18891 */ "LLGFAT\0"
10139 /* 18898 */ "LGAT\0"
10140 /* 18903 */ "LFHAT\0"
10141 /* 18909 */ "LAT\0"
10142 /* 18913 */ "G_SSUBSAT\0"
10143 /* 18923 */ "G_USUBSAT\0"
10144 /* 18933 */ "G_SADDSAT\0"
10145 /* 18943 */ "G_UADDSAT\0"
10146 /* 18953 */ "G_SSHLSAT\0"
10147 /* 18963 */ "G_USHLSAT\0"
10148 /* 18973 */ "G_SMULFIXSAT\0"
10149 /* 18986 */ "G_UMULFIXSAT\0"
10150 /* 18999 */ "G_SDIVFIXSAT\0"
10151 /* 19012 */ "G_UDIVFIXSAT\0"
10152 /* 19025 */ "LLGTAT\0"
10153 /* 19032 */ "G_EXTRACT\0"
10154 /* 19042 */ "BCT\0"
10155 /* 19046 */ "G_SELECT\0"
10156 /* 19055 */ "G_BRINDIRECT\0"
10157 /* 19068 */ "VPOPCT\0"
10158 /* 19075 */ "BRCT\0"
10159 /* 19080 */ "TDCDT\0"
10160 /* 19086 */ "TDGDT\0"
10161 /* 19092 */ "SLDT\0"
10162 /* 19097 */ "CPDT\0"
10163 /* 19102 */ "SRDT\0"
10164 /* 19107 */ "CZDT\0"
10165 /* 19112 */ "TDCET\0"
10166 /* 19118 */ "TDGET\0"
10167 /* 19124 */ "PATCHABLE_RET\0"
10168 /* 19138 */ "G_MEMSET\0"
10169 /* 19147 */ "CLGT\0"
10170 /* 19152 */ "LLGT\0"
10171 /* 19157 */ "CIT\0"
10172 /* 19161 */ "CLFIT\0"
10173 /* 19167 */ "CGIT\0"
10174 /* 19172 */ "CLGIT\0"
10175 /* 19178 */ "PATCHABLE_FUNCTION_EXIT\0"
10176 /* 19202 */ "G_BRJT\0"
10177 /* 19209 */ "CLT\0"
10178 /* 19213 */ "G_EXTRACT_VECTOR_ELT\0"
10179 /* 19234 */ "G_INSERT_VECTOR_ELT\0"
10180 /* 19254 */ "SRNMT\0"
10181 /* 19260 */ "G_FCONSTANT\0"
10182 /* 19272 */ "G_CONSTANT\0"
10183 /* 19283 */ "POPCNT\0"
10184 /* 19290 */ "G_INTRINSIC_CONVERGENT\0"
10185 /* 19313 */ "STATEPOINT\0"
10186 /* 19324 */ "PATCHPOINT\0"
10187 /* 19335 */ "G_PTRTOINT\0"
10188 /* 19346 */ "G_FRINT\0"
10189 /* 19354 */ "G_INTRINSIC_LLRINT\0"
10190 /* 19373 */ "G_INTRINSIC_LRINT\0"
10191 /* 19391 */ "G_FNEARBYINT\0"
10192 /* 19404 */ "GOT\0"
10193 /* 19408 */ "TPROT\0"
10194 /* 19414 */ "TROT\0"
10195 /* 19419 */ "CDPT\0"
10196 /* 19424 */ "SPT\0"
10197 /* 19428 */ "STPT\0"
10198 /* 19433 */ "UPT\0"
10199 /* 19437 */ "CXPT\0"
10200 /* 19442 */ "G_VASTART\0"
10201 /* 19452 */ "LIFETIME_START\0"
10202 /* 19467 */ "G_INVOKE_REGION_START\0"
10203 /* 19489 */ "CRT\0"
10204 /* 19493 */ "G_INSERT\0"
10205 /* 19502 */ "CGRT\0"
10206 /* 19507 */ "CLGRT\0"
10207 /* 19513 */ "CLRT\0"
10208 /* 19518 */ "TABORT\0"
10209 /* 19525 */ "G_FSQRT\0"
10210 /* 19533 */ "G_STRICT_FSQRT\0"
10211 /* 19548 */ "TRT\0"
10212 /* 19552 */ "G_BITCAST\0"
10213 /* 19562 */ "G_ADDRSPACE_CAST\0"
10214 /* 19579 */ "DBG_VALUE_LIST\0"
10215 /* 19594 */ "CLST\0"
10216 /* 19599 */ "SRST\0"
10217 /* 19604 */ "CSST\0"
10218 /* 19609 */ "MVST\0"
10219 /* 19614 */ "TRTT\0"
10220 /* 19619 */ "PGOUT\0"
10221 /* 19625 */ "TDCXT\0"
10222 /* 19631 */ "CallBASR_STACKEXT\0"
10223 /* 19649 */ "G_FPEXT\0"
10224 /* 19657 */ "G_SEXT\0"
10225 /* 19664 */ "G_ASSERT_SEXT\0"
10226 /* 19678 */ "G_ANYEXT\0"
10227 /* 19687 */ "G_ZEXT\0"
10228 /* 19694 */ "G_ASSERT_ZEXT\0"
10229 /* 19708 */ "TDGXT\0"
10230 /* 19714 */ "SLXT\0"
10231 /* 19719 */ "CPXT\0"
10232 /* 19724 */ "SRXT\0"
10233 /* 19729 */ "CZXT\0"
10234 /* 19734 */ "CDZT\0"
10235 /* 19739 */ "CXZT\0"
10236 /* 19744 */ "AU\0"
10237 /* 19747 */ "CUTFU\0"
10238 /* 19753 */ "UNPKU\0"
10239 /* 19759 */ "CLCLU\0"
10240 /* 19765 */ "MVCLU\0"
10241 /* 19771 */ "InsnRILU\0"
10242 /* 19780 */ "SU\0"
10243 /* 19783 */ "SRSTU\0"
10244 /* 19789 */ "VESRAV\0"
10245 /* 19796 */ "VLGV\0"
10246 /* 19801 */ "G_FDIV\0"
10247 /* 19808 */ "G_STRICT_FDIV\0"
10248 /* 19822 */ "G_SDIV\0"
10249 /* 19829 */ "G_UDIV\0"
10250 /* 19836 */ "VERLLV\0"
10251 /* 19843 */ "VESRLV\0"
10252 /* 19850 */ "VESLV\0"
10253 /* 19856 */ "G_GET_FPENV\0"
10254 /* 19868 */ "G_RESET_FPENV\0"
10255 /* 19882 */ "G_SET_FPENV\0"
10256 /* 19894 */ "LRV\0"
10257 /* 19898 */ "STRV\0"
10258 /* 19903 */ "InsnVRV\0"
10259 /* 19911 */ "AW\0"
10260 /* 19914 */ "VMALHW\0"
10261 /* 19921 */ "VMLHW\0"
10262 /* 19927 */ "VUPLHW\0"
10263 /* 19934 */ "G_FPOW\0"
10264 /* 19941 */ "ATOMIC_SWAPW\0"
10265 /* 19954 */ "ATOMIC_CMP_SWAPW\0"
10266 /* 19971 */ "STCRW\0"
10267 /* 19977 */ "EPSW\0"
10268 /* 19982 */ "LPSW\0"
10269 /* 19987 */ "LAX\0"
10270 /* 19991 */ "VFMAX\0"
10271 /* 19997 */ "G_VECREDUCE_FMAX\0"
10272 /* 20014 */ "G_ATOMICRMW_FMAX\0"
10273 /* 20031 */ "G_VECREDUCE_SMAX\0"
10274 /* 20048 */ "G_SMAX\0"
10275 /* 20055 */ "G_VECREDUCE_UMAX\0"
10276 /* 20072 */ "G_UMAX\0"
10277 /* 20079 */ "ATOMIC_LOADW_UMAX\0"
10278 /* 20097 */ "G_ATOMICRMW_UMAX\0"
10279 /* 20114 */ "ATOMIC_LOADW_MAX\0"
10280 /* 20131 */ "G_ATOMICRMW_MAX\0"
10281 /* 20147 */ "G_FRAME_INDEX\0"
10282 /* 20161 */ "G_SBFX\0"
10283 /* 20168 */ "G_UBFX\0"
10284 /* 20175 */ "G_SMULFIX\0"
10285 /* 20185 */ "G_UMULFIX\0"
10286 /* 20195 */ "G_SDIVFIX\0"
10287 /* 20205 */ "G_UDIVFIX\0"
10288 /* 20215 */ "LX\0"
10289 /* 20218 */ "VMX\0"
10290 /* 20222 */ "VNX\0"
10291 /* 20226 */ "SPX\0"
10292 /* 20230 */ "STPX\0"
10293 /* 20235 */ "WFLRX\0"
10294 /* 20241 */ "InsnVRX\0"
10295 /* 20249 */ "InsnRX\0"
10296 /* 20256 */ "STX\0"
10297 /* 20260 */ "VX\0"
10298 /* 20263 */ "IC32Y\0"
10299 /* 20269 */ "LAY\0"
10300 /* 20273 */ "MAY\0"
10301 /* 20277 */ "LRAY\0"
10302 /* 20282 */ "CVBY\0"
10303 /* 20287 */ "ICY\0"
10304 /* 20291 */ "STCY\0"
10305 /* 20296 */ "LDY\0"
10306 /* 20300 */ "STDY\0"
10307 /* 20305 */ "CVDY\0"
10308 /* 20310 */ "LAEY\0"
10309 /* 20315 */ "LEY\0"
10310 /* 20319 */ "STEY\0"
10311 /* 20324 */ "LPSWEY\0"
10312 /* 20331 */ "MFY\0"
10313 /* 20335 */ "AHY\0"
10314 /* 20339 */ "CHY\0"
10315 /* 20343 */ "LHY\0"
10316 /* 20347 */ "MHY\0"
10317 /* 20351 */ "SHY\0"
10318 /* 20355 */ "STHY\0"
10319 /* 20360 */ "CLIY\0"
10320 /* 20365 */ "NIY\0"
10321 /* 20369 */ "OIY\0"
10322 /* 20373 */ "InsnSIY\0"
10323 /* 20381 */ "MVIY\0"
10324 /* 20386 */ "XIY\0"
10325 /* 20390 */ "ALY\0"
10326 /* 20394 */ "CLY\0"
10327 /* 20398 */ "SLY\0"
10328 /* 20402 */ "LAMY\0"
10329 /* 20407 */ "STAMY\0"
10330 /* 20413 */ "ICMY\0"
10331 /* 20418 */ "STCMY\0"
10332 /* 20424 */ "CLMY\0"
10333 /* 20429 */ "STMY\0"
10334 /* 20434 */ "NY\0"
10335 /* 20437 */ "OY\0"
10336 /* 20440 */ "G_MEMCPY\0"
10337 /* 20449 */ "COPY\0"
10338 /* 20454 */ "ADA_ENTRY\0"
10339 /* 20464 */ "CONVERGENCECTRL_ENTRY\0"
10340 /* 20486 */ "CSY\0"
10341 /* 20490 */ "CDSY\0"
10342 /* 20495 */ "MSY\0"
10343 /* 20499 */ "InsnRSY\0"
10344 /* 20507 */ "STY\0"
10345 /* 20511 */ "InsnRXY\0"
10346 /* 20519 */ "VLLEZ\0"
10347 /* 20525 */ "RISBGZ\0"
10348 /* 20532 */ "VUPKZ\0"
10349 /* 20538 */ "VPKZ\0"
10350 /* 20543 */ "VCLZ\0"
10351 /* 20548 */ "G_CTLZ\0"
10352 /* 20555 */ "RISBGNZ\0"
10353 /* 20563 */ "BAsmNZ\0"
10354 /* 20570 */ "LOCAsmNZ\0"
10355 /* 20579 */ "STOCAsmNZ\0"
10356 /* 20589 */ "LOCGAsmNZ\0"
10357 /* 20599 */ "STOCGAsmNZ\0"
10358 /* 20610 */ "JGAsmNZ\0"
10359 /* 20618 */ "LOCFHAsmNZ\0"
10360 /* 20629 */ "STOCFHAsmNZ\0"
10361 /* 20641 */ "BIAsmNZ\0"
10362 /* 20649 */ "LOCHIAsmNZ\0"
10363 /* 20660 */ "LOCGHIAsmNZ\0"
10364 /* 20672 */ "LOCHHIAsmNZ\0"
10365 /* 20684 */ "JAsmNZ\0"
10366 /* 20691 */ "BRAsmNZ\0"
10367 /* 20699 */ "LOCRAsmNZ\0"
10368 /* 20709 */ "LOCGRAsmNZ\0"
10369 /* 20720 */ "SELGRAsmNZ\0"
10370 /* 20731 */ "LOCFHRAsmNZ\0"
10371 /* 20743 */ "SELFHRAsmNZ\0"
10372 /* 20755 */ "SELRAsmNZ\0"
10373 /* 20765 */ "VLLEBRZ\0"
10374 /* 20773 */ "VCTZ\0"
10375 /* 20778 */ "G_CTTZ\0"
10376 /* 20785 */ "MVZ\0"
10377 /* 20789 */ "BAsmZ\0"
10378 /* 20795 */ "LOCAsmZ\0"
10379 /* 20803 */ "STOCAsmZ\0"
10380 /* 20812 */ "LOCGAsmZ\0"
10381 /* 20821 */ "STOCGAsmZ\0"
10382 /* 20831 */ "JGAsmZ\0"
10383 /* 20838 */ "LOCFHAsmZ\0"
10384 /* 20848 */ "STOCFHAsmZ\0"
10385 /* 20859 */ "BIAsmZ\0"
10386 /* 20866 */ "LOCHIAsmZ\0"
10387 /* 20876 */ "LOCGHIAsmZ\0"
10388 /* 20887 */ "LOCHHIAsmZ\0"
10389 /* 20898 */ "JAsmZ\0"
10390 /* 20904 */ "BRAsmZ\0"
10391 /* 20911 */ "LOCRAsmZ\0"
10392 /* 20920 */ "LOCGRAsmZ\0"
10393 /* 20930 */ "SELGRAsmZ\0"
10394 /* 20940 */ "LOCFHRAsmZ\0"
10395 /* 20951 */ "SELFHRAsmZ\0"
10396 /* 20962 */ "SELRAsmZ\0"
10397 /* 20971 */ "CPSDRdd\0"
10398 /* 20979 */ "CPSDRsd\0"
10399 /* 20987 */ "NOP_bare\0"
10400 /* 20996 */ "Serialize\0"
10401 /* 21006 */ "CLCReg\0"
10402 /* 21013 */ "NCReg\0"
10403 /* 21019 */ "OCReg\0"
10404 /* 21025 */ "MVCReg\0"
10405 /* 21032 */ "XCReg\0"
10406 /* 21038 */ "MemsetRegReg\0"
10407 /* 21051 */ "MemsetImmReg\0"
10408 /* 21064 */ "SCmp128Hi\0"
10409 /* 21074 */ "UCmp128Hi\0"
10410 /* 21084 */ "ATOMIC_LOADW_NILHi\0"
10411 /* 21103 */ "ATOMIC_LOADW_NRi\0"
10412 /* 21120 */ "CIBCall\0"
10413 /* 21128 */ "CGIBCall\0"
10414 /* 21137 */ "CLGIBCall\0"
10415 /* 21147 */ "CLIBCall\0"
10416 /* 21156 */ "CRBCall\0"
10417 /* 21164 */ "CGRBCall\0"
10418 /* 21173 */ "CLGRBCall\0"
10419 /* 21183 */ "CLRBCall\0"
10420 /* 21192 */ "CLCImm\0"
10421 /* 21199 */ "NCImm\0"
10422 /* 21205 */ "OCImm\0"
10423 /* 21211 */ "MVCImm\0"
10424 /* 21218 */ "XCImm\0"
10425 /* 21224 */ "MemsetRegImm\0"
10426 /* 21237 */ "MemsetImmImm\0"
10427 /* 21250 */ "CIBAsm\0"
10428 /* 21257 */ "CGIBAsm\0"
10429 /* 21265 */ "CLGIBAsm\0"
10430 /* 21274 */ "CLIBAsm\0"
10431 /* 21282 */ "CRBAsm\0"
10432 /* 21289 */ "CGRBAsm\0"
10433 /* 21297 */ "CLGRBAsm\0"
10434 /* 21306 */ "CLRBAsm\0"
10435 /* 21314 */ "BCAsm\0"
10436 /* 21320 */ "BICAsm\0"
10437 /* 21327 */ "LOCAsm\0"
10438 /* 21334 */ "STOCAsm\0"
10439 /* 21342 */ "BRCAsm\0"
10440 /* 21349 */ "LOCGAsm\0"
10441 /* 21357 */ "STOCGAsm\0"
10442 /* 21366 */ "LOCFHAsm\0"
10443 /* 21375 */ "STOCFHAsm\0"
10444 /* 21385 */ "LOCHIAsm\0"
10445 /* 21394 */ "LOCGHIAsm\0"
10446 /* 21404 */ "LOCHHIAsm\0"
10447 /* 21414 */ "CIJAsm\0"
10448 /* 21421 */ "CGIJAsm\0"
10449 /* 21429 */ "CLGIJAsm\0"
10450 /* 21438 */ "CLIJAsm\0"
10451 /* 21446 */ "CRJAsm\0"
10452 /* 21453 */ "CGRJAsm\0"
10453 /* 21461 */ "CLGRJAsm\0"
10454 /* 21470 */ "CLRJAsm\0"
10455 /* 21478 */ "BRCLAsm\0"
10456 /* 21486 */ "BCRAsm\0"
10457 /* 21493 */ "LOCRAsm\0"
10458 /* 21501 */ "LOCGRAsm\0"
10459 /* 21510 */ "SELGRAsm\0"
10460 /* 21519 */ "LOCFHRAsm\0"
10461 /* 21529 */ "SELFHRAsm\0"
10462 /* 21539 */ "SELRAsm\0"
10463 /* 21547 */ "CLGTAsm\0"
10464 /* 21555 */ "CITAsm\0"
10465 /* 21562 */ "CLFITAsm\0"
10466 /* 21571 */ "CGITAsm\0"
10467 /* 21579 */ "CLGITAsm\0"
10468 /* 21588 */ "CLTAsm\0"
10469 /* 21595 */ "CRTAsm\0"
10470 /* 21602 */ "CGRTAsm\0"
10471 /* 21610 */ "CLGRTAsm\0"
10472 /* 21619 */ "CLRTAsm\0"
10473 /* 21627 */ "VLAlign\0"
10474 /* 21635 */ "VLMAlign\0"
10475 /* 21644 */ "VSTMAlign\0"
10476 /* 21654 */ "VSTAlign\0"
10477 /* 21663 */ "CIBReturn\0"
10478 /* 21673 */ "CGIBReturn\0"
10479 /* 21684 */ "CLGIBReturn\0"
10480 /* 21696 */ "CLIBReturn\0"
10481 /* 21707 */ "CRBReturn\0"
10482 /* 21717 */ "CGRBReturn\0"
10483 /* 21728 */ "CLGRBReturn\0"
10484 /* 21740 */ "CLRBReturn\0"
10485 /* 21751 */ "CondReturn\0"
10486 /* 21762 */ "EXRL_Pseudo\0"
10487 /* 21774 */ "LTDBRCompare_Pseudo\0"
10488 /* 21794 */ "LTEBRCompare_Pseudo\0"
10489 /* 21814 */ "LTXBRCompare_Pseudo\0"
10490 /* 21834 */ "A_MemFoldPseudo\0"
10491 /* 21850 */ "MADB_MemFoldPseudo\0"
10492 /* 21869 */ "DDB_MemFoldPseudo\0"
10493 /* 21887 */ "MDB_MemFoldPseudo\0"
10494 /* 21905 */ "MSDB_MemFoldPseudo\0"
10495 /* 21924 */ "MAEB_MemFoldPseudo\0"
10496 /* 21943 */ "DEB_MemFoldPseudo\0"
10497 /* 21961 */ "MEEB_MemFoldPseudo\0"
10498 /* 21980 */ "MSEB_MemFoldPseudo\0"
10499 /* 21999 */ "MSGC_MemFoldPseudo\0"
10500 /* 22018 */ "MSC_MemFoldPseudo\0"
10501 /* 22036 */ "AG_MemFoldPseudo\0"
10502 /* 22053 */ "LOCG_MemFoldPseudo\0"
10503 /* 22072 */ "ALG_MemFoldPseudo\0"
10504 /* 22090 */ "SLG_MemFoldPseudo\0"
10505 /* 22108 */ "NG_MemFoldPseudo\0"
10506 /* 22125 */ "OG_MemFoldPseudo\0"
10507 /* 22142 */ "SG_MemFoldPseudo\0"
10508 /* 22159 */ "XG_MemFoldPseudo\0"
10509 /* 22176 */ "AL_MemFoldPseudo\0"
10510 /* 22193 */ "SL_MemFoldPseudo\0"
10511 /* 22210 */ "N_MemFoldPseudo\0"
10512 /* 22226 */ "O_MemFoldPseudo\0"
10513 /* 22242 */ "S_MemFoldPseudo\0"
10514 /* 22258 */ "X_MemFoldPseudo\0"
10515 /* 22274 */ "LOCMux_MemFoldPseudo\0"
10516 /* 22295 */ "CondTrap\0"
10517 /* 22304 */ "CLSTLoop\0"
10518 /* 22313 */ "SRSTLoop\0"
10519 /* 22322 */ "MVSTLoop\0"
10520 /* 22331 */ "CPSDRds\0"
10521 /* 22339 */ "CPSDRss\0"
10522 /* 22347 */ "TBEGIN_nofloat\0"
10523 /* 22362 */ "CU21Opt\0"
10524 /* 22370 */ "CU12Opt\0"
10525 /* 22378 */ "CU14Opt\0"
10526 /* 22386 */ "CU24Opt\0"
10527 /* 22394 */ "VCVBOpt\0"
10528 /* 22402 */ "SSKEOpt\0"
10529 /* 22410 */ "TRTREOpt\0"
10530 /* 22419 */ "IDTEOpt\0"
10531 /* 22427 */ "CRDTEOpt\0"
10532 /* 22436 */ "IPTEOpt\0"
10533 /* 22444 */ "TRTEOpt\0"
10534 /* 22452 */ "CUUTFOpt\0"
10535 /* 22461 */ "VCVBGOpt\0"
10536 /* 22470 */ "TROOOpt\0"
10537 /* 22478 */ "TRTOOpt\0"
10538 /* 22486 */ "RDPOpt\0"
10539 /* 22493 */ "POPCNTOpt\0"
10540 /* 22503 */ "TROTOpt\0"
10541 /* 22511 */ "TRTTOpt\0"
10542 /* 22519 */ "CUTFUOpt\0"
10543 /* 22528 */ "IPTEOptOpt\0"
10544 /* 22539 */ "CondStoreF32Inv\0"
10545 /* 22555 */ "CondStore32Inv\0"
10546 /* 22570 */ "CondStoreF64Inv\0"
10547 /* 22586 */ "CondStore64Inv\0"
10548 /* 22601 */ "CondStore16Inv\0"
10549 /* 22616 */ "CondStore8Inv\0"
10550 /* 22630 */ "CondStore32MuxInv\0"
10551 /* 22648 */ "CondStore16MuxInv\0"
10552 /* 22666 */ "CondStore8MuxInv\0"
10553 /* 22683 */ "CondStore32Mux\0"
10554 /* 22698 */ "CondStore16Mux\0"
10555 /* 22713 */ "CondStore8Mux\0"
10556 /* 22727 */ "LBMux\0"
10557 /* 22733 */ "RISBMux\0"
10558 /* 22741 */ "LLCMux\0"
10559 /* 22748 */ "LOCMux\0"
10560 /* 22755 */ "STOCMux\0"
10561 /* 22763 */ "STCMux\0"
10562 /* 22770 */ "IIFMux\0"
10563 /* 22777 */ "NIFMux\0"
10564 /* 22784 */ "OIFMux\0"
10565 /* 22791 */ "XIFMux\0"
10566 /* 22798 */ "IIHMux\0"
10567 /* 22805 */ "NIHMux\0"
10568 /* 22812 */ "OIHMux\0"
10569 /* 22819 */ "LLHMux\0"
10570 /* 22826 */ "TMHMux\0"
10571 /* 22833 */ "STHMux\0"
10572 /* 22840 */ "AFIMux\0"
10573 /* 22847 */ "CFIMux\0"
10574 /* 22854 */ "CLFIMux\0"
10575 /* 22862 */ "AHIMux\0"
10576 /* 22869 */ "LOCHIMux\0"
10577 /* 22878 */ "LHIMux\0"
10578 /* 22885 */ "CLMux\0"
10579 /* 22891 */ "IILMux\0"
10580 /* 22898 */ "NILMux\0"
10581 /* 22905 */ "OILMux\0"
10582 /* 22912 */ "TMLMux\0"
10583 /* 22919 */ "LLCRMux\0"
10584 /* 22927 */ "LOCRMux\0"
10585 /* 22935 */ "LLHRMux\0"
10586 /* 22943 */ "SELRMux\0"
10587 /* 22951 */ "STMux\0"
10588};
10589#ifdef __GNUC__
10590#pragma GCC diagnostic pop
10591#endif
10592
10593extern const unsigned SystemZInstrNameIndices[] = {
10594 11346U, 13732U, 16303U, 14334U, 11874U, 11855U, 11883U, 12130U,
10595 7799U, 7814U, 6894U, 7846U, 18732U, 6223U, 19579U, 6948U,
10596 11342U, 11864U, 3510U, 20449U, 4642U, 19452U, 3278U, 3445U,
10597 3498U, 14912U, 12101U, 19324U, 3376U, 15506U, 8204U, 19313U,
10598 6090U, 15428U, 15415U, 16598U, 19124U, 19178U, 12033U, 12080U,
10599 12053U, 11900U, 16524U, 14412U, 20464U, 17167U, 15380U, 6287U,
10600 19664U, 19694U, 14103U, 3141U, 2316U, 12947U, 19822U, 19829U,
10601 13435U, 13442U, 13449U, 13459U, 3251U, 17338U, 17301U, 6892U,
10602 11344U, 20147U, 6233U, 6248U, 12640U, 19032U, 18326U, 19493U,
10603 18343U, 17238U, 2791U, 18686U, 19335U, 17672U, 19552U, 6348U,
10604 16535U, 3342U, 2765U, 3324U, 19373U, 19354U, 14069U, 16623U,
10605 16642U, 3039U, 2983U, 3013U, 3024U, 2964U, 2994U, 6138U,
10606 6122U, 18762U, 7905U, 7922U, 3157U, 2322U, 3257U, 3218U,
10607 17359U, 17307U, 20131U, 14295U, 20097U, 14261U, 3108U, 2299U,
10608 20014U, 14178U, 14974U, 14952U, 3490U, 8546U, 3291U, 19055U,
10609 19467U, 2691U, 18817U, 19290U, 18844U, 19678U, 2783U, 19272U,
10610 19260U, 19442U, 8196U, 19657U, 7833U, 19687U, 11981U, 17007U,
10611 16993U, 11974U, 17000U, 17665U, 12854U, 15149U, 15142U, 15156U,
10612 15163U, 19046U, 14404U, 3531U, 14388U, 3471U, 14396U, 3523U,
10613 14380U, 3463U, 14457U, 14449U, 9453U, 9445U, 18943U, 18933U,
10614 18923U, 18913U, 18963U, 18953U, 20175U, 20185U, 18973U, 18986U,
10615 20195U, 20205U, 18999U, 19012U, 3066U, 2278U, 12889U, 674U,
10616 2957U, 19801U, 13414U, 19934U, 11512U, 15550U, 190U, 9U,
10617 8139U, 176U, 0U, 15525U, 15557U, 7792U, 19649U, 2755U,
10618 11454U, 11499U, 15080U, 15089U, 17962U, 14118U, 18749U, 6357U,
10619 13843U, 13853U, 3589U, 3604U, 13800U, 13832U, 19856U, 19882U,
10620 19868U, 3548U, 3576U, 3561U, 3147U, 11774U, 14212U, 20048U,
10621 14236U, 20072U, 17969U, 3315U, 3305U, 16298U, 19202U, 4602U,
10622 17219U, 17199U, 19234U, 19213U, 17253U, 17270U, 18792U, 20778U,
10623 6874U, 20548U, 6856U, 15401U, 15005U, 6164U, 11987U, 18661U,
10624 14319U, 14062U, 18653U, 14311U, 14054U, 10574U, 9979U, 9964U,
10625 19525U, 17190U, 19346U, 19391U, 19562U, 16367U, 4617U, 2852U,
10626 6308U, 6107U, 3094U, 2285U, 12917U, 19808U, 13421U, 680U,
10627 19533U, 15534U, 16662U, 16678U, 20440U, 5621U, 6320U, 19138U,
10628 14701U, 14945U, 14921U, 14933U, 3073U, 12896U, 3049U, 12872U,
10629 19997U, 14161U, 13811U, 13779U, 3125U, 12931U, 3235U, 17323U,
10630 17285U, 20031U, 14195U, 20055U, 14219U, 20161U, 20168U, 20454U,
10631 6271U, 21851U, 14354U, 15491U, 2869U, 21925U, 557U, 22840U,
10632 22036U, 22862U, 11795U, 22072U, 22176U, 19954U, 11204U, 15872U,
10633 20114U, 14278U, 8862U, 21084U, 17151U, 21103U, 8880U, 17343U,
10634 17423U, 20079U, 14243U, 7204U, 17917U, 19941U, 21834U, 22847U,
10635 21128U, 21673U, 21164U, 21717U, 22871U, 21120U, 21663U, 21192U,
10636 21006U, 22854U, 21137U, 21684U, 21173U, 21728U, 21147U, 21696U,
10637 22885U, 21183U, 21740U, 22304U, 22743U, 21156U, 21707U, 17404U,
10638 19631U, 368U, 16323U, 16316U, 12801U, 349U, 11831U, 7976U,
10639 21751U, 11643U, 503U, 22601U, 22698U, 22648U, 150U, 22555U,
10640 22683U, 22630U, 476U, 22586U, 583U, 22616U, 22713U, 22666U,
10641 50U, 22539U, 270U, 22570U, 22295U, 21869U, 21943U, 21762U,
10642 19404U, 22770U, 214U, 293U, 386U, 22798U, 242U, 321U,
10643 414U, 22891U, 526U, 22727U, 16734U, 16505U, 22878U, 22820U,
10644 22741U, 22919U, 22819U, 22935U, 22886U, 22053U, 22869U, 22748U,
10645 22274U, 22927U, 21774U, 21794U, 21814U, 20215U, 21850U, 21924U,
10646 21887U, 21961U, 22018U, 21905U, 21980U, 21999U, 21211U, 21025U,
10647 22322U, 21237U, 21051U, 21224U, 21038U, 21199U, 21013U, 22108U,
10648 22777U, 221U, 300U, 393U, 22805U, 249U, 328U, 421U,
10649 22898U, 22210U, 21205U, 21019U, 22125U, 22784U, 228U, 307U,
10650 400U, 22812U, 256U, 335U, 428U, 22905U, 22226U, 531U,
10651 598U, 2816U, 8690U, 11936U, 8825U, 12113U, 22733U, 21666U,
10652 11647U, 21064U, 21906U, 21981U, 22943U, 22142U, 22090U, 22193U,
10653 22313U, 551U, 22763U, 22833U, 22951U, 22755U, 20256U, 22242U,
10654 573U, 162U, 488U, 515U, 63U, 283U, 539U, 106U,
10655 459U, 20996U, 22347U, 12011U, 12022U, 314U, 407U, 22826U,
10656 342U, 435U, 22912U, 22299U, 21074U, 81U, 442U, 100U,
10657 453U, 86U, 117U, 470U, 21218U, 21032U, 22159U, 22791U,
10658 235U, 263U, 2834U, 22258U, 565U, 596U, 2961U, 1026U,
10659 15889U, 16353U, 17475U, 853U, 3433U, 1425U, 16002U, 16470U,
10660 11217U, 7628U, 6973U, 11225U, 16739U, 8642U, 11293U, 11607U,
10661 16809U, 11688U, 11400U, 8454U, 16956U, 17076U, 11283U, 11602U,
10662 20335U, 8775U, 11805U, 2727U, 7733U, 16819U, 16337U, 11259U,
10663 7990U, 6987U, 11235U, 16750U, 11613U, 16846U, 11705U, 11405U,
10664 16962U, 17082U, 11621U, 17049U, 11745U, 11449U, 8808U, 14130U,
10665 20390U, 14918U, 15843U, 11674U, 11396U, 19744U, 17825U, 19911U,
10666 17838U, 16204U, 17846U, 17719U, 898U, 20270U, 972U, 17043U,
10667 11808U, 17048U, 17948U, 17408U, 13764U, 6384U, 10757U, 4128U,
10668 12979U, 5165U, 9469U, 13868U, 5644U, 9994U, 3636U, 12194U,
10669 4662U, 8930U, 13509U, 14489U, 15174U, 20563U, 14730U, 15573U,
10670 20789U, 2640U, 21314U, 16327U, 21486U, 19042U, 8314U, 16903U,
10671 17439U, 11168U, 6518U, 10891U, 4277U, 13113U, 5314U, 9618U,
10672 13938U, 5793U, 10143U, 3800U, 12343U, 4826U, 9094U, 13587U,
10673 14567U, 15252U, 20641U, 14800U, 15643U, 20859U, 2687U, 21320U,
10674 15440U, 15448U, 15891U, 17957U, 12805U, 6629U, 11002U, 4400U,
10675 13224U, 5437U, 9741U, 13983U, 5916U, 10266U, 3935U, 12466U,
10676 4961U, 9229U, 13637U, 14617U, 15302U, 20691U, 14845U, 15688U,
10677 20904U, 2911U, 21342U, 11835U, 21478U, 19075U, 8332U, 10601U,
10678 10668U, 7950U, 5157U, 8085U, 940U, 8273U, 13742U, 10659U,
10679 7945U, 5152U, 7786U, 2625U, 3046U, 1068U, 15895U, 16110U,
10680 761U, 16712U, 17598U, 16149U, 782U, 16831U, 17624U, 884U,
10681 16122U, 17604U, 16161U, 17630U, 19419U, 16363U, 18322U, 8281U,
10682 17688U, 20490U, 17480U, 17706U, 19734U, 3482U, 1436U, 16008U,
10683 17490U, 16116U, 768U, 16729U, 16155U, 789U, 16841U, 16129U,
10684 16168U, 16475U, 17735U, 2669U, 15911U, 719U, 16391U, 17514U,
10685 16031U, 740U, 16500U, 11221U, 16227U, 817U, 17865U, 17753U,
10686 7719U, 15924U, 726U, 16396U, 17527U, 865U, 16044U, 747U,
10687 16510U, 6977U, 11230U, 16745U, 12684U, 8646U, 11300U, 12726U,
10688 11423U, 1684U, 21257U, 6390U, 10763U, 4135U, 12985U, 5172U,
10689 9476U, 5651U, 10001U, 3644U, 12201U, 4670U, 8938U, 11527U,
10690 21421U, 6565U, 10938U, 4329U, 13160U, 5366U, 9670U, 5845U,
10691 10195U, 3857U, 12395U, 4883U, 9151U, 19167U, 21571U, 6723U,
10692 11096U, 4504U, 13318U, 5541U, 9845U, 6020U, 10370U, 4049U,
10693 12570U, 5075U, 9343U, 16821U, 1896U, 21289U, 6426U, 10799U,
10694 4175U, 13021U, 5212U, 9516U, 5691U, 10041U, 3688U, 12241U,
10695 4714U, 8982U, 11547U, 21453U, 6601U, 10974U, 4369U, 13196U,
10696 5406U, 9710U, 5885U, 10235U, 3901U, 12435U, 4927U, 9195U,
10697 12704U, 19502U, 21602U, 6758U, 11131U, 4543U, 13353U, 5580U,
10698 9884U, 6059U, 10409U, 4092U, 12609U, 5118U, 9386U, 16240U,
10699 824U, 17870U, 17766U, 910U, 8480U, 7055U, 16951U, 11436U,
10700 11289U, 17071U, 12721U, 11411U, 20339U, 1674U, 21250U, 6382U,
10701 10755U, 4126U, 12977U, 5163U, 9467U, 5642U, 9992U, 3634U,
10702 12192U, 4660U, 8928U, 8786U, 11523U, 21414U, 6557U, 10930U,
10703 4320U, 13152U, 5357U, 9661U, 5836U, 10186U, 3847U, 12386U,
10704 4873U, 9141U, 19157U, 21555U, 6705U, 11078U, 4484U, 13300U,
10705 5521U, 9825U, 6000U, 10350U, 4027U, 12550U, 5053U, 9321U,
10706 13747U, 11823U, 2731U, 11826U, 4630U, 19759U, 15917U, 17520U,
10707 16037U, 11416U, 11264U, 19161U, 21562U, 6713U, 11086U, 4493U,
10708 13308U, 5530U, 9834U, 6009U, 10359U, 4037U, 12559U, 5063U,
10709 9331U, 16233U, 17759U, 8003U, 15930U, 17533U, 16050U, 6992U,
10710 11241U, 16756U, 12690U, 12732U, 11429U, 1689U, 21265U, 6399U,
10711 10772U, 4145U, 12994U, 5182U, 9486U, 5661U, 10011U, 3655U,
10712 12211U, 4681U, 8949U, 11532U, 21429U, 6574U, 10947U, 4339U,
10713 13169U, 5376U, 9680U, 5855U, 10205U, 3868U, 12405U, 4894U,
10714 9162U, 19172U, 21579U, 6732U, 11105U, 4514U, 13327U, 5551U,
10715 9855U, 6030U, 10380U, 4060U, 12580U, 5086U, 9354U, 16851U,
10716 1901U, 21297U, 6435U, 10808U, 4185U, 13030U, 5222U, 9526U,
10717 5701U, 10051U, 3699U, 12251U, 4725U, 8993U, 11552U, 21461U,
10718 6610U, 10983U, 4379U, 13205U, 5416U, 9720U, 5895U, 10245U,
10719 3912U, 12445U, 4938U, 9206U, 12709U, 19507U, 21610U, 6767U,
10720 11140U, 4553U, 13362U, 5590U, 9894U, 6069U, 10419U, 4103U,
10721 12619U, 5129U, 9397U, 19147U, 21547U, 6696U, 11069U, 4474U,
10722 13291U, 5511U, 9815U, 5990U, 10340U, 4016U, 12540U, 5042U,
10723 9310U, 16246U, 17772U, 7092U, 16982U, 11442U, 17102U, 12746U,
10724 11355U, 1695U, 21274U, 6409U, 10782U, 4156U, 13004U, 5193U,
10725 9497U, 5672U, 10022U, 3667U, 12222U, 4693U, 8961U, 8796U,
10726 11538U, 21438U, 6584U, 10957U, 4350U, 13179U, 5387U, 9691U,
10727 5866U, 10216U, 3880U, 12416U, 4906U, 9174U, 20360U, 13496U,
10728 9944U, 20424U, 17053U, 1907U, 21306U, 6445U, 10818U, 4196U,
10729 13040U, 5233U, 9537U, 5712U, 10062U, 3711U, 12262U, 4737U,
10730 9005U, 11558U, 21470U, 6620U, 10993U, 4390U, 13215U, 5427U,
10731 9731U, 5906U, 10256U, 3924U, 12456U, 4950U, 9218U, 12764U,
10732 19513U, 21619U, 6777U, 11150U, 4564U, 13372U, 5601U, 9905U,
10733 6080U, 10430U, 4115U, 12630U, 5141U, 9409U, 19594U, 19209U,
10734 21588U, 6742U, 11115U, 4525U, 13337U, 5562U, 9866U, 6041U,
10735 10391U, 4072U, 12591U, 5098U, 9366U, 20394U, 2936U, 15019U,
10736 19097U, 20971U, 22331U, 20979U, 22339U, 19719U, 962U, 16328U,
10737 1892U, 21282U, 6418U, 10791U, 4166U, 13013U, 5203U, 9507U,
10738 5682U, 10032U, 3678U, 12232U, 4704U, 8972U, 6203U, 22427U,
10739 11543U, 21446U, 6593U, 10966U, 4360U, 13188U, 5397U, 9701U,
10740 5876U, 10226U, 3891U, 12426U, 4917U, 9185U, 12674U, 19489U,
10741 21595U, 6750U, 11123U, 4534U, 13345U, 5571U, 9875U, 6050U,
10742 10400U, 4082U, 12600U, 5108U, 9376U, 18319U, 8510U, 17562U,
10743 8277U, 15467U, 8173U, 19604U, 17801U, 20486U, 34U, 22370U,
10744 198U, 22378U, 18U, 22362U, 209U, 22386U, 29U, 171U,
10745 17580U, 6193U, 19747U, 22519U, 7504U, 22452U, 17819U, 2347U,
10746 7711U, 20282U, 3419U, 7765U, 20305U, 16210U, 16143U, 775U,
10747 16804U, 17618U, 16182U, 796U, 16926U, 17650U, 891U, 16136U,
10748 17611U, 16175U, 17643U, 19437U, 17851U, 17700U, 17724U, 17712U,
10749 19739U, 20288U, 19107U, 19729U, 2962U, 3063U, 1093U, 15900U,
10750 16376U, 17485U, 859U, 3528U, 1442U, 16014U, 16481U, 2658U,
10751 7636U, 15937U, 16057U, 11847U, 8009U, 16856U, 17057U, 15026U,
10752 16354U, 8282U, 7021U, 16786U, 16893U, 16216U, 17856U, 17730U,
10753 904U, 15842U, 7631U, 17444U, 642U, 8319U, 3175U, 11638U,
10754 17496U, 17741U, 2890U, 17025U, 15853U, 17462U, 19977U, 7828U,
10755 7871U, 17031U, 15858U, 17568U, 622U, 949U, 17807U, 3300U,
10756 20158U, 12796U, 15943U, 733U, 16411U, 17540U, 16063U, 754U,
10757 16519U, 16253U, 831U, 17875U, 17779U, 16882U, 16407U, 16515U,
10758 8515U, 2623U, 2688U, 39U, 20263U, 13405U, 9915U, 20413U,
10759 20287U, 6198U, 22419U, 17502U, 17747U, 7059U, 8702U, 11948U,
10760 7183U, 8851U, 12125U, 11661U, 13711U, 6209U, 22436U, 22528U,
10761 13395U, 4592U, 11790U, 6786U, 11389U, 4574U, 11995U, 19771U,
10762 18611U, 17397U, 6146U, 7440U, 18703U, 18725U, 6177U, 11467U,
10763 20499U, 20249U, 6340U, 7552U, 20511U, 18885U, 11488U, 12003U,
10764 20373U, 18810U, 6185U, 7480U, 11381U, 17389U, 18717U, 19903U,
10765 20241U, 11480U, 11525U, 6559U, 10932U, 4322U, 13154U, 5359U,
10766 9663U, 13977U, 5838U, 10188U, 3849U, 12388U, 4875U, 9143U,
10767 13630U, 14610U, 15295U, 20684U, 14839U, 15682U, 20898U, 7980U,
10768 6490U, 10863U, 4246U, 13085U, 5283U, 9587U, 13910U, 5762U,
10769 10112U, 3766U, 12312U, 4792U, 9060U, 13556U, 14536U, 15221U,
10770 20610U, 14772U, 15615U, 20831U, 1259U, 15949U, 944U, 17546U,
10771 1494U, 16069U, 3208U, 3213U, 13493U, 693U, 2627U, 2743U,
10772 17456U, 7309U, 14467U, 16259U, 17785U, 11806U, 660U, 594U,
10773 7626U, 11803U, 7988U, 3436U, 20310U, 13381U, 20402U, 14050U,
10774 8124U, 14371U, 8134U, 12667U, 15462U, 18909U, 19987U, 8412U,
10775 20269U, 1710U, 15840U, 8473U, 16189U, 991U, 12825U, 15894U,
10776 16711U, 123U, 16362U, 16007U, 16474U, 16744U, 16820U, 16338U,
10777 12831U, 8073U, 16209U, 17850U, 3200U, 3540U, 44U, 1441U,
10778 16013U, 16485U, 17592U, 16836U, 16416U, 94U, 16215U, 803U,
10779 17855U, 17729U, 20296U, 4608U, 15905U, 712U, 16386U, 17508U,
10780 16560U, 16221U, 810U, 17860U, 20315U, 17952U, 8633U, 18903U,
10781 2895U, 7991U, 18898U, 1596U, 16163U, 16401U, 6988U, 11236U,
10782 16751U, 12691U, 7877U, 8657U, 11305U, 16946U, 12733U, 16847U,
10783 12710U, 2921U, 8822U, 8726U, 11334U, 16989U, 12747U, 20343U,
10784 2735U, 8493U, 16342U, 2677U, 16331U, 6997U, 18891U, 16762U,
10785 12697U, 8286U, 8656U, 16945U, 12739U, 19152U, 19025U, 17637U,
10786 8901U, 8730U, 16988U, 12752U, 7064U, 8707U, 11953U, 7188U,
10787 8856U, 12135U, 7014U, 13497U, 3214U, 8109U, 9945U, 20425U,
10788 15959U, 16717U, 132U, 16424U, 16074U, 16568U, 16774U, 16877U,
10789 17147U, 16269U, 17888U, 2830U, 21327U, 6454U, 10827U, 4206U,
10790 13049U, 5243U, 9547U, 13874U, 5722U, 10072U, 3722U, 12272U,
10791 4748U, 9016U, 13516U, 14496U, 15181U, 20570U, 14736U, 15579U,
10792 20795U, 8620U, 21366U, 6497U, 10870U, 4254U, 13092U, 5291U,
10793 9595U, 13917U, 5770U, 10120U, 3775U, 12320U, 4801U, 9069U,
10794 13564U, 14544U, 15229U, 20618U, 14779U, 15622U, 20838U, 16931U,
10795 21519U, 6665U, 11038U, 4440U, 13260U, 5477U, 9781U, 14019U,
10796 5956U, 10306U, 3979U, 12506U, 5005U, 9273U, 13677U, 14657U,
10797 15342U, 20731U, 14881U, 15724U, 20940U, 7743U, 21349U, 6471U,
10798 10844U, 4225U, 13066U, 5262U, 9566U, 13891U, 5741U, 10091U,
10799 3743U, 12291U, 4769U, 9037U, 13535U, 14515U, 15200U, 20589U,
10800 14753U, 15596U, 20812U, 11298U, 21394U, 6535U, 10908U, 4296U,
10801 13130U, 5333U, 9637U, 13955U, 5812U, 10162U, 3821U, 12362U,
10802 4847U, 9115U, 13606U, 14586U, 15271U, 20660U, 14817U, 15660U,
10803 20876U, 16825U, 21501U, 6645U, 11018U, 4418U, 13240U, 5455U,
10804 9759U, 13999U, 5934U, 10284U, 3955U, 12484U, 4981U, 9249U,
10805 13655U, 14635U, 15320U, 20709U, 14861U, 15704U, 20920U, 11321U,
10806 21404U, 6546U, 10919U, 4308U, 13141U, 5345U, 9649U, 13966U,
10807 5824U, 10174U, 3834U, 12374U, 4860U, 9128U, 13618U, 14598U,
10808 15283U, 20672U, 14828U, 15671U, 20887U, 11287U, 21385U, 6525U,
10809 10898U, 4285U, 13120U, 5322U, 9626U, 13945U, 5801U, 10151U,
10810 3809U, 12351U, 4835U, 9103U, 13595U, 14575U, 15260U, 20649U,
10811 14807U, 15650U, 20866U, 16347U, 21493U, 6636U, 11009U, 4408U,
10812 13231U, 5445U, 9749U, 13990U, 5924U, 10274U, 3944U, 12474U,
10813 4970U, 9238U, 13645U, 14625U, 15310U, 20699U, 14852U, 15695U,
10814 20911U, 12836U, 3368U, 15965U, 16723U, 141U, 7759U, 16429U,
10815 16080U, 16573U, 16780U, 16888U, 15444U, 15809U, 17374U, 19982U,
10816 6330U, 20324U, 627U, 16275U, 17893U, 17050U, 838U, 7653U,
10817 20277U, 16439U, 16583U, 12765U, 19894U, 8401U, 16920U, 10648U,
10818 17833U, 12842U, 19210U, 15983U, 16449U, 17574U, 16098U, 16593U,
10819 8344U, 7031U, 16798U, 16909U, 17656U, 16292U, 17907U, 17813U,
10820 929U, 7671U, 3423U, 1413U, 15989U, 16454U, 17586U, 6336U,
10821 1544U, 16104U, 16701U, 17880U, 20391U, 16464U, 16706U, 7455U,
10822 8268U, 17912U, 13383U, 2960U, 1038U, 15888U, 16352U, 3441U,
10823 1430U, 16001U, 16469U, 20273U, 10673U, 17014U, 12961U, 17133U,
10824 17933U, 2744U, 3210U, 1271U, 15954U, 3544U, 1452U, 16019U,
10825 16490U, 16420U, 17551U, 872U, 5612U, 3624U, 1463U, 16025U,
10826 16495U, 16564U, 20331U, 8094U, 8664U, 11310U, 11717U, 9917U,
10827 11338U, 20347U, 12177U, 8038U, 16867U, 17108U, 15146U, 17144U,
10828 18644U, 2932U, 8520U, 3410U, 1369U, 15977U, 16444U, 6160U,
10829 1533U, 16092U, 16588U, 11274U, 8306U, 2682U, 7026U, 11253U,
10830 16792U, 16898U, 2714U, 17419U, 2721U, 954U, 20495U, 2946U,
10831 11592U, 14137U, 11587U, 11840U, 4636U, 19765U, 18668U, 15017U,
10832 12672U, 18317U, 11784U, 11315U, 11328U, 11350U, 11508U, 20381U,
10833 14350U, 14726U, 8178U, 19609U, 20785U, 16264U, 3427U, 1418U,
10834 15995U, 16459U, 17884U, 17790U, 917U, 20404U, 10678U, 17020U,
10835 12966U, 17139U, 17938U, 14052U, 2752U, 11693U, 11678U, 8126U,
10836 16878U, 11723U, 11359U, 11159U, 7070U, 8713U, 11959U, 7194U,
10837 8875U, 12141U, 20365U, 11722U, 703U, 11755U, 11728U, 15376U,
10838 17378U, 20987U, 11760U, 16914U, 17660U, 17148U, 11756U, 8348U,
10839 11739U, 11769U, 20434U, 14373U, 2831U, 11699U, 11683U, 8136U,
10840 16884U, 11729U, 11362U, 7075U, 8718U, 11964U, 7199U, 8893U,
10841 12146U, 20369U, 17187U, 11761U, 20437U, 11573U, 1713U, 2892U,
10842 2654U, 14465U, 3178U, 12678U, 7292U, 14696U, 14150U, 19619U,
10843 650U, 19755U, 14445U, 19283U, 22493U, 708U, 14475U, 17375U,
10844 14480U, 19421U, 7500U, 6968U, 11495U, 1798U, 17474U, 17718U,
10845 11375U, 11182U, 11463U, 15115U, 15035U, 22486U, 7686U, 73U,
10846 14096U, 20555U, 20525U, 7893U, 7994U, 12164U, 8028U, 7692U,
10847 7698U, 15450U, 3458U, 13400U, 17556U, 17795U, 8525U, 7704U,
10848 17950U, 2632U, 6810U, 11817U, 203U, 23U, 447U, 15859U,
10849 17450U, 13482U, 11578U, 2703U, 7375U, 3411U, 1357U, 15978U,
10850 16445U, 17563U, 878U, 6161U, 1534U, 16093U, 16938U, 21529U,
10851 6676U, 11049U, 4452U, 13271U, 5489U, 9793U, 14030U, 5968U,
10852 10318U, 3992U, 12518U, 5018U, 9286U, 13689U, 14669U, 15354U,
10853 20743U, 14892U, 15735U, 20951U, 16861U, 21510U, 6655U, 11028U,
10854 4429U, 13250U, 5466U, 9770U, 14009U, 5945U, 10295U, 3967U,
10855 12495U, 4993U, 9261U, 13666U, 14646U, 15331U, 20720U, 14871U,
10856 15714U, 20930U, 17061U, 21539U, 6687U, 11060U, 4464U, 13282U,
10857 5501U, 9805U, 14041U, 5980U, 10330U, 4005U, 12530U, 5031U,
10858 9299U, 13701U, 14681U, 15366U, 20755U, 14903U, 15746U, 20962U,
10859 16589U, 17413U, 2900U, 8274U, 7022U, 16787U, 8668U, 16894U,
10860 11734U, 10564U, 16976U, 17096U, 20351U, 4582U, 637U, 15104U,
10861 12808U, 659U, 7641U, 11563U, 1789U, 7681U, 16813U, 16188U,
10862 612U, 11845U, 19092U, 11269U, 8063U, 7002U, 11247U, 16768U,
10863 16872U, 11711U, 16969U, 17089U, 12168U, 8033U, 11628U, 17125U,
10864 11750U, 19714U, 20398U, 12861U, 15464U, 17468U, 654U, 13715U,
10865 19424U, 20226U, 3372U, 1343U, 15971U, 16434U, 6103U, 1528U,
10866 16086U, 16578U, 16281U, 17898U, 17410U, 844U, 7660U, 11568U,
10867 617U, 11850U, 19102U, 11765U, 12781U, 8056U, 11633U, 13504U,
10868 1827U, 19254U, 15454U, 19599U, 19783U, 19724U, 17037U, 15863U,
10869 8530U, 4597U, 22402U, 13766U, 19559U, 13385U, 20407U, 14996U,
10870 15846U, 2942U, 8557U, 11582U, 2708U, 4586U, 7147U, 13409U,
10871 9920U, 20418U, 18674U, 19971U, 8338U, 12848U, 20291U, 3414U,
10872 20300U, 6219U, 20319U, 8637U, 11925U, 4649U, 2905U, 8350U,
10873 12715U, 2926U, 10607U, 8770U, 12758U, 20355U, 15029U, 13771U,
10874 8113U, 9949U, 20429U, 13752U, 2881U, 21334U, 6462U, 10835U,
10875 4215U, 13057U, 5252U, 9556U, 13882U, 5731U, 10081U, 3732U,
10876 12281U, 4758U, 9026U, 13525U, 14505U, 15190U, 20579U, 14744U,
10877 15587U, 20803U, 8626U, 21375U, 6507U, 10880U, 4265U, 13102U,
10878 5302U, 9606U, 13927U, 5781U, 10131U, 3787U, 12331U, 4813U,
10879 9081U, 13575U, 14555U, 15240U, 20629U, 14789U, 15632U, 20848U,
10880 7748U, 21357U, 6480U, 10853U, 4235U, 13075U, 5272U, 9576U,
10881 13900U, 5751U, 10101U, 3754U, 12301U, 4780U, 9048U, 13545U,
10882 14525U, 15210U, 20599U, 14762U, 15605U, 20821U, 13758U, 15813U,
10883 19428U, 20230U, 7665U, 12791U, 19898U, 8406U, 10653U, 8535U,
10884 11475U, 934U, 8262U, 20507U, 19780U, 17829U, 2950U, 19979U,
10885 17842U, 16287U, 17903U, 17802U, 923U, 20487U, 19518U, 13386U,
10886 15868U, 2275U, 16357U, 16380U, 14143U, 2747U, 1086U, 1435U,
10887 2414U, 19080U, 19112U, 19625U, 19086U, 19118U, 19708U, 3273U,
10888 16479U, 16406U, 13772U, 8748U, 11969U, 8912U, 12151U, 20430U,
10889 15488U, 11199U, 11371U, 19408U, 17441U, 3479U, 7716U, 184U,
10890 497U, 6156U, 14691U, 22470U, 19414U, 22503U, 19548U, 6214U,
10891 22444U, 14721U, 22478U, 17683U, 6154U, 22410U, 19614U, 22511U,
10892 18841U, 8536U, 11665U, 648U, 19753U, 19433U, 959U, 987U,
10893 2636U, 2643U, 1001U, 2648U, 15770U, 6815U, 7722U, 8477U,
10894 15764U, 15759U, 6806U, 7677U, 8469U, 15001U, 15755U, 8362U,
10895 1607U, 7036U, 7881U, 8672U, 11930U, 1724U, 7170U, 8013U,
10896 8838U, 13719U, 7754U, 1575U, 8007U, 1593U, 1549U, 1561U,
10897 15777U, 1886U, 18118U, 7386U, 18401U, 8183U, 18482U, 10502U,
10898 18547U, 1468U, 14091U, 12656U, 18680U, 3186U, 1175U, 8562U,
10899 1625U, 18105U, 7054U, 18388U, 7900U, 18469U, 8697U, 18534U,
10900 11943U, 1731U, 18111U, 7177U, 18394U, 8020U, 18475U, 8845U,
10901 18540U, 13746U, 1480U, 9972U, 12180U, 15074U, 3191U, 1187U,
10902 20543U, 2603U, 15048U, 7597U, 8429U, 10726U, 7313U, 15018U,
10903 7323U, 15098U, 10491U, 20773U, 2617U, 7620U, 8444U, 10749U,
10904 2346U, 7710U, 22461U, 22394U, 3418U, 7764U, 15044U, 2665U,
10905 1007U, 6821U, 7728U, 8483U, 11821U, 1718U, 7164U, 8001U,
10906 8832U, 13487U, 1820U, 7302U, 8102U, 9937U, 12162U, 1744U,
10907 7229U, 8026U, 8905U, 19836U, 2357U, 7524U, 8373U, 10625U,
10908 12811U, 1787U, 7266U, 8061U, 9439U, 19850U, 2373U, 7540U,
10909 8389U, 10641U, 842U, 974U, 6799U, 7658U, 8462U, 19789U,
10910 2338U, 7510U, 8354U, 10611U, 12779U, 1774U, 7259U, 8054U,
10911 9432U, 19843U, 2365U, 7532U, 8381U, 10633U, 633U, 1024U,
10912 3431U, 1423U, 18083U, 6838U, 18366U, 8566U, 18512U, 2574U,
10913 18292U, 7568U, 18444U, 10690U, 18586U, 1919U, 3485U, 1103U,
10914 17983U, 1993U, 18133U, 8488U, 1201U, 18051U, 3628U, 1117U,
10915 17999U, 2007U, 18149U, 2053U, 18201U, 3182U, 1091U, 1981U,
10916 3619U, 1457U, 18090U, 6907U, 18373U, 8578U, 18519U, 2581U,
10917 18300U, 7575U, 18452U, 10697U, 18594U, 5615U, 1521U, 18097U,
10918 6941U, 18380U, 8607U, 18526U, 2595U, 18308U, 7589U, 18460U,
10919 10711U, 18602U, 11279U, 1245U, 2097U, 1149U, 18035U, 2039U,
10920 18185U, 1215U, 18067U, 1133U, 18017U, 2023U, 18167U, 2067U,
10921 18217U, 1072U, 1967U, 12120U, 18630U, 1297U, 2143U, 1327U,
10922 2173U, 17066U, 3393U, 13474U, 669U, 1036U, 1931U, 19991U,
10923 1397U, 2254U, 1269U, 14155U, 1281U, 2127U, 18642U, 2115U,
10924 1367U, 2220U, 697U, 1050U, 1945U, 18647U, 1381U, 2234U,
10925 14715U, 1311U, 2157U, 18431U, 1355U, 15831U, 1341U, 2187U,
10926 2208U, 11188U, 1229U, 2081U, 13390U, 6913U, 7776U, 13469U,
10927 663U, 967U, 6792U, 7646U, 8450U, 1809U, 7286U, 8091U,
10928 9926U, 13478U, 1815U, 7297U, 8097U, 9932U, 17694U, 1912U,
10929 18125U, 7448U, 18408U, 10554U, 18554U, 12953U, 21627U, 996U,
10930 16193U, 7414U, 8236U, 10523U, 15818U, 15061U, 7360U, 8153U,
10931 10471U, 2739U, 1012U, 6826U, 7738U, 8498U, 3539U, 1440U,
10932 1511U, 7399U, 8221U, 10508U, 3173U, 1163U, 6931U, 7781U,
10933 8597U, 1678U, 7134U, 7963U, 8790U, 16559U, 7427U, 8249U,
10934 10536U, 19796U, 2351U, 7518U, 8367U, 10619U, 15133U, 12172U,
10935 20765U, 6373U, 7603U, 8435U, 10732U, 20519U, 2588U, 7582U,
10936 8422U, 10704U, 7278U, 13500U, 21635U, 15138U, 1881U, 7381U,
10937 8168U, 10486U, 17129U, 15055U, 1868U, 7353U, 8146U, 10464U,
10938 12769U, 17112U, 8396U, 1613U, 7042U, 7887U, 8678U, 15109U,
10939 3440U, 1429U, 6844U, 8572U, 8457U, 1619U, 7048U, 8684U,
10940 11812U, 1707U, 4611U, 1498U, 6918U, 8584U, 7158U, 8819U,
10941 1630U, 7085U, 8723U, 19914U, 14434U, 1850U, 7335U, 10446U,
10942 14375U, 1844U, 7329U, 10440U, 5611U, 1516U, 6936U, 8602U,
10943 9960U, 1650U, 7110U, 8753U, 12176U, 1751U, 4655U, 1505U,
10944 6925U, 8591U, 7236U, 8917U, 1637U, 7097U, 8735U, 19921U,
10945 14440U, 1857U, 7342U, 10453U, 14326U, 1839U, 7318U, 8129U,
10946 9987U, 12187U, 1756U, 7241U, 8042U, 8922U, 14471U, 1863U,
10947 7348U, 10459U, 15170U, 10549U, 1661U, 7121U, 7939U, 8764U,
10948 12774U, 1768U, 7253U, 8048U, 9426U, 12816U, 8067U, 15478U,
10949 20218U, 2495U, 7547U, 8417U, 10663U, 12956U, 1803U, 7272U,
10950 8079U, 9461U, 14351U, 2812U, 14330U, 14485U, 20222U, 14727U,
10951 2886U, 5637U, 11194U, 13726U, 11670U, 7153U, 7983U, 8814U,
10952 18624U, 7466U, 18423U, 8299U, 18496U, 10567U, 18569U, 18619U,
10953 7460U, 18416U, 8293U, 18489U, 10561U, 18562U, 20538U, 17942U,
10954 19068U, 2270U, 7492U, 8324U, 10593U, 15409U, 15069U, 1875U,
10955 7369U, 8162U, 10480U, 11365U, 1700U, 7140U, 7969U, 8801U,
10956 15458U, 18882U, 2250U, 11164U, 15782U, 11177U, 15797U, 11171U,
10957 1667U, 7127U, 7956U, 8779U, 15790U, 6850U, 7770U, 15022U,
10958 15120U, 15471U, 15566U, 15126U, 15039U, 7860U, 1587U, 6981U,
10959 8650U, 11920U, 7488U, 8310U, 10589U, 12821U, 1793U, 3203U,
10960 1263U, 15483U, 15836U, 848U, 981U, 3405U, 12785U, 1781U,
10961 15453U, 17383U, 19610U, 21654U, 16198U, 7420U, 8242U, 10529U,
10962 15824U, 1538U, 7406U, 8228U, 10515U, 6962U, 7865U, 8614U,
10963 16695U, 7433U, 8255U, 10542U, 12867U, 13770U, 21644U, 2915U,
10964 1017U, 17975U, 6831U, 18358U, 8503U, 18504U, 2566U, 18283U,
10965 7560U, 18435U, 10682U, 18577U, 12790U, 17118U, 18711U, 2201U,
10966 7473U, 10582U, 2609U, 7612U, 10741U, 13863U, 1833U, 8118U,
10967 7007U, 8661U, 9954U, 15803U, 7392U, 8189U, 13775U, 15487U,
10968 10497U, 1655U, 7115U, 8758U, 20532U, 10719U, 12970U, 12662U,
10969 1762U, 7247U, 9420U, 1643U, 7103U, 8741U, 19927U, 12156U,
10970 1737U, 7222U, 8898U, 20260U, 14709U, 1581U, 1600U, 1555U,
10971 1568U, 1474U, 1181U, 1487U, 1194U, 1030U, 1925U, 2380U,
10972 2673U, 1066U, 1110U, 17991U, 2000U, 18141U, 2425U, 18233U,
10973 1208U, 18059U, 1125U, 18008U, 2015U, 18158U, 2432U, 18241U,
10974 2060U, 18209U, 2455U, 18267U, 1961U, 2401U, 1097U, 1987U,
10975 2419U, 1251U, 2103U, 2477U, 11598U, 1257U, 1156U, 18043U,
10976 2046U, 18193U, 2448U, 18259U, 1222U, 18075U, 1141U, 18026U,
10977 2031U, 18176U, 2440U, 18250U, 2074U, 18225U, 2462U, 18275U,
10978 2109U, 2483U, 1079U, 1974U, 2407U, 3197U, 18636U, 1304U,
10979 2150U, 2508U, 1334U, 2180U, 2523U, 3399U, 20235U, 1043U,
10980 1938U, 2386U, 1405U, 2262U, 2558U, 1275U, 1289U, 2135U,
10981 2500U, 2121U, 1374U, 2227U, 2543U, 2489U, 1058U, 1953U,
10982 2393U, 1389U, 2242U, 2550U, 1319U, 2165U, 2515U, 1361U,
10983 1348U, 2194U, 2530U, 2214U, 2537U, 1237U, 2089U, 2469U,
10984 1446U, 1169U, 19989U, 2954U, 8414U, 16927U, 11740U, 11520U,
10985 7080U, 7217U, 20386U, 17847U, 11770U, 8541U, 20516U, 15013U,
10986};
10987
10988static inline void InitSystemZMCInstrInfo(MCInstrInfo *II) {
10989 II->InitMCInstrInfo(SystemZDescs.Insts, SystemZInstrNameIndices, SystemZInstrNameData, nullptr, nullptr, 3136);
10990}
10991
10992} // end namespace llvm
10993#endif // GET_INSTRINFO_MC_DESC
10994
10995#ifdef GET_INSTRINFO_HEADER
10996#undef GET_INSTRINFO_HEADER
10997namespace llvm {
10998struct SystemZGenInstrInfo : public TargetInstrInfo {
10999 explicit SystemZGenInstrInfo(unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u, unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u);
11000 ~SystemZGenInstrInfo() override = default;
11001
11002};
11003} // end namespace llvm
11004#endif // GET_INSTRINFO_HEADER
11005
11006#ifdef GET_INSTRINFO_HELPER_DECLS
11007#undef GET_INSTRINFO_HELPER_DECLS
11008
11009
11010#endif // GET_INSTRINFO_HELPER_DECLS
11011
11012#ifdef GET_INSTRINFO_HELPERS
11013#undef GET_INSTRINFO_HELPERS
11014
11015#endif // GET_INSTRINFO_HELPERS
11016
11017#ifdef GET_INSTRINFO_CTOR_DTOR
11018#undef GET_INSTRINFO_CTOR_DTOR
11019namespace llvm {
11020extern const SystemZInstrTable SystemZDescs;
11021extern const unsigned SystemZInstrNameIndices[];
11022extern const char SystemZInstrNameData[];
11023SystemZGenInstrInfo::SystemZGenInstrInfo(unsigned CFSetupOpcode, unsigned CFDestroyOpcode, unsigned CatchRetOpcode, unsigned ReturnOpcode)
11024 : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) {
11025 InitMCInstrInfo(SystemZDescs.Insts, SystemZInstrNameIndices, SystemZInstrNameData, nullptr, nullptr, 3136);
11026}
11027} // end namespace llvm
11028#endif // GET_INSTRINFO_CTOR_DTOR
11029
11030#ifdef GET_INSTRINFO_OPERAND_ENUM
11031#undef GET_INSTRINFO_OPERAND_ENUM
11032namespace llvm {
11033namespace SystemZ {
11034namespace OpName {
11035enum {
11036 OPERAND_LAST
11037};
11038} // end namespace OpName
11039} // end namespace SystemZ
11040} // end namespace llvm
11041#endif //GET_INSTRINFO_OPERAND_ENUM
11042
11043#ifdef GET_INSTRINFO_NAMED_OPS
11044#undef GET_INSTRINFO_NAMED_OPS
11045namespace llvm {
11046namespace SystemZ {
11047LLVM_READONLY
11048int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) {
11049 return -1;
11050}
11051} // end namespace SystemZ
11052} // end namespace llvm
11053#endif //GET_INSTRINFO_NAMED_OPS
11054
11055#ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM
11056#undef GET_INSTRINFO_OPERAND_TYPES_ENUM
11057namespace llvm {
11058namespace SystemZ {
11059namespace OpTypes {
11060enum OperandType {
11061 adasym = 0,
11062 bdaddr12only = 1,
11063 bdaddr12pair = 2,
11064 bdaddr20only = 3,
11065 bdaddr20pair = 4,
11066 bdladdr12onlylen4 = 5,
11067 bdladdr12onlylen8 = 6,
11068 bdraddr12only = 7,
11069 bdvaddr12only = 8,
11070 bdxaddr12only = 9,
11071 bdxaddr12pair = 10,
11072 bdxaddr20only = 11,
11073 bdxaddr20only128 = 12,
11074 bdxaddr20pair = 13,
11075 brtarget12bpp = 14,
11076 brtarget16 = 15,
11077 brtarget16bpp = 16,
11078 brtarget16tls = 17,
11079 brtarget24bpp = 18,
11080 brtarget32 = 19,
11081 brtarget32tls = 20,
11082 cond4 = 21,
11083 disp12imm32 = 22,
11084 disp12imm64 = 23,
11085 disp20imm32 = 24,
11086 disp20imm64 = 25,
11087 dynalloc12only = 26,
11088 f32imm = 27,
11089 f64imm = 28,
11090 i1imm = 29,
11091 i8imm = 30,
11092 i16imm = 31,
11093 i32imm = 32,
11094 i64imm = 33,
11095 imm32lh16 = 34,
11096 imm32lh16_timm = 35,
11097 imm32lh16c = 36,
11098 imm32lh16c_timm = 37,
11099 imm32ll16 = 38,
11100 imm32ll16_timm = 39,
11101 imm32ll16c = 40,
11102 imm32ll16c_timm = 41,
11103 imm32sx8 = 42,
11104 imm32sx8_timm = 43,
11105 imm32sx16 = 44,
11106 imm32sx16_timm = 45,
11107 imm32sx16n = 46,
11108 imm32sx16n_timm = 47,
11109 imm32sx16trunc = 48,
11110 imm32sx16trunc_timm = 49,
11111 imm32zx1 = 50,
11112 imm32zx1_timm = 51,
11113 imm32zx2 = 52,
11114 imm32zx2_timm = 53,
11115 imm32zx3 = 54,
11116 imm32zx3_timm = 55,
11117 imm32zx4 = 56,
11118 imm32zx4_timm = 57,
11119 imm32zx4even = 58,
11120 imm32zx4even_timm = 59,
11121 imm32zx8 = 60,
11122 imm32zx8_timm = 61,
11123 imm32zx8trunc = 62,
11124 imm32zx8trunc_timm = 63,
11125 imm32zx12 = 64,
11126 imm32zx12_timm = 65,
11127 imm32zx16 = 66,
11128 imm32zx16_timm = 67,
11129 imm32zx16trunc = 68,
11130 imm32zx16trunc_timm = 69,
11131 imm64 = 70,
11132 imm64hf32 = 71,
11133 imm64hf32_timm = 72,
11134 imm64hf32c = 73,
11135 imm64hf32c_timm = 74,
11136 imm64hh16 = 75,
11137 imm64hh16_timm = 76,
11138 imm64hh16c = 77,
11139 imm64hh16c_timm = 78,
11140 imm64hl16 = 79,
11141 imm64hl16_timm = 80,
11142 imm64hl16c = 81,
11143 imm64hl16c_timm = 82,
11144 imm64lf32 = 83,
11145 imm64lf32_timm = 84,
11146 imm64lf32c = 85,
11147 imm64lf32c_timm = 86,
11148 imm64lf32n = 87,
11149 imm64lf32n_timm = 88,
11150 imm64lh16 = 89,
11151 imm64lh16_timm = 90,
11152 imm64lh16c = 91,
11153 imm64lh16c_timm = 92,
11154 imm64lh16n = 93,
11155 imm64lh16n_timm = 94,
11156 imm64ll16 = 95,
11157 imm64ll16_timm = 96,
11158 imm64ll16c = 97,
11159 imm64ll16c_timm = 98,
11160 imm64sx8 = 99,
11161 imm64sx8_timm = 100,
11162 imm64sx16 = 101,
11163 imm64sx16_timm = 102,
11164 imm64sx16n = 103,
11165 imm64sx16n_timm = 104,
11166 imm64sx32 = 105,
11167 imm64sx32_timm = 106,
11168 imm64sx32n = 107,
11169 imm64sx32n_timm = 108,
11170 imm64zx8 = 109,
11171 imm64zx8_timm = 110,
11172 imm64zx16 = 111,
11173 imm64zx16_timm = 112,
11174 imm64zx32 = 113,
11175 imm64zx32_timm = 114,
11176 imm64zx32n = 115,
11177 imm64zx32n_timm = 116,
11178 imm64zx48 = 117,
11179 imm64zx48_timm = 118,
11180 laaddr12pair = 119,
11181 laaddr20pair = 120,
11182 len4imm64 = 121,
11183 len8imm64 = 122,
11184 mviaddr12pair = 123,
11185 mviaddr20pair = 124,
11186 pcrel32 = 125,
11187 ptype0 = 126,
11188 ptype1 = 127,
11189 ptype2 = 128,
11190 ptype3 = 129,
11191 ptype4 = 130,
11192 ptype5 = 131,
11193 shift12only = 132,
11194 shift20only = 133,
11195 simm32 = 134,
11196 simm32_timm = 135,
11197 simm32n = 136,
11198 simm32n_timm = 137,
11199 tlssym = 138,
11200 type0 = 139,
11201 type1 = 140,
11202 type2 = 141,
11203 type3 = 142,
11204 type4 = 143,
11205 type5 = 144,
11206 uimm32 = 145,
11207 uimm32_timm = 146,
11208 untyped_imm_0 = 147,
11209 ADDR32 = 148,
11210 ADDR64 = 149,
11211 ADDR128 = 150,
11212 AR32 = 151,
11213 AnyReg = 152,
11214 CR64 = 153,
11215 FP32 = 154,
11216 FP64 = 155,
11217 FP128 = 156,
11218 GR32 = 157,
11219 GR64 = 158,
11220 GR128 = 159,
11221 GRH32 = 160,
11222 GRX32 = 161,
11223 VF128 = 162,
11224 VR32 = 163,
11225 VR64 = 164,
11226 VR128 = 165,
11227 ADDR32Bit = 166,
11228 ADDR64Bit = 167,
11229 ADDR128Bit = 168,
11230 AR32Bit = 169,
11231 AnyRegBit = 170,
11232 CCR = 171,
11233 CR64Bit = 172,
11234 FP32Bit = 173,
11235 FP64Bit = 174,
11236 FP128Bit = 175,
11237 FPCRegs = 176,
11238 GR32Bit = 177,
11239 GR64Bit = 178,
11240 GR128Bit = 179,
11241 GRH32Bit = 180,
11242 GRX32Bit = 181,
11243 VF128Bit = 182,
11244 VR32Bit = 183,
11245 VR64Bit = 184,
11246 VR128Bit = 185,
11247 OPERAND_TYPE_LIST_END
11248};
11249} // end namespace OpTypes
11250} // end namespace SystemZ
11251} // end namespace llvm
11252#endif // GET_INSTRINFO_OPERAND_TYPES_ENUM
11253
11254#ifdef GET_INSTRINFO_OPERAND_TYPE
11255#undef GET_INSTRINFO_OPERAND_TYPE
11256namespace llvm {
11257namespace SystemZ {
11258LLVM_READONLY
11259static int getOperandType(uint16_t Opcode, uint16_t OpIdx) {
11260 static const uint16_t Offsets[] = {
11261 /* PHI */
11262 0,
11263 /* INLINEASM */
11264 1,
11265 /* INLINEASM_BR */
11266 1,
11267 /* CFI_INSTRUCTION */
11268 1,
11269 /* EH_LABEL */
11270 2,
11271 /* GC_LABEL */
11272 3,
11273 /* ANNOTATION_LABEL */
11274 4,
11275 /* KILL */
11276 5,
11277 /* EXTRACT_SUBREG */
11278 5,
11279 /* INSERT_SUBREG */
11280 8,
11281 /* IMPLICIT_DEF */
11282 12,
11283 /* SUBREG_TO_REG */
11284 13,
11285 /* COPY_TO_REGCLASS */
11286 17,
11287 /* DBG_VALUE */
11288 20,
11289 /* DBG_VALUE_LIST */
11290 20,
11291 /* DBG_INSTR_REF */
11292 20,
11293 /* DBG_PHI */
11294 20,
11295 /* DBG_LABEL */
11296 20,
11297 /* REG_SEQUENCE */
11298 21,
11299 /* COPY */
11300 23,
11301 /* BUNDLE */
11302 25,
11303 /* LIFETIME_START */
11304 25,
11305 /* LIFETIME_END */
11306 26,
11307 /* PSEUDO_PROBE */
11308 27,
11309 /* ARITH_FENCE */
11310 31,
11311 /* STACKMAP */
11312 33,
11313 /* FENTRY_CALL */
11314 35,
11315 /* PATCHPOINT */
11316 35,
11317 /* LOAD_STACK_GUARD */
11318 41,
11319 /* PREALLOCATED_SETUP */
11320 42,
11321 /* PREALLOCATED_ARG */
11322 43,
11323 /* STATEPOINT */
11324 46,
11325 /* LOCAL_ESCAPE */
11326 46,
11327 /* FAULTING_OP */
11328 48,
11329 /* PATCHABLE_OP */
11330 49,
11331 /* PATCHABLE_FUNCTION_ENTER */
11332 49,
11333 /* PATCHABLE_RET */
11334 49,
11335 /* PATCHABLE_FUNCTION_EXIT */
11336 49,
11337 /* PATCHABLE_TAIL_CALL */
11338 49,
11339 /* PATCHABLE_EVENT_CALL */
11340 49,
11341 /* PATCHABLE_TYPED_EVENT_CALL */
11342 51,
11343 /* ICALL_BRANCH_FUNNEL */
11344 54,
11345 /* MEMBARRIER */
11346 54,
11347 /* JUMP_TABLE_DEBUG_INFO */
11348 54,
11349 /* CONVERGENCECTRL_ENTRY */
11350 55,
11351 /* CONVERGENCECTRL_ANCHOR */
11352 56,
11353 /* CONVERGENCECTRL_LOOP */
11354 57,
11355 /* CONVERGENCECTRL_GLUE */
11356 59,
11357 /* G_ASSERT_SEXT */
11358 60,
11359 /* G_ASSERT_ZEXT */
11360 63,
11361 /* G_ASSERT_ALIGN */
11362 66,
11363 /* G_ADD */
11364 69,
11365 /* G_SUB */
11366 72,
11367 /* G_MUL */
11368 75,
11369 /* G_SDIV */
11370 78,
11371 /* G_UDIV */
11372 81,
11373 /* G_SREM */
11374 84,
11375 /* G_UREM */
11376 87,
11377 /* G_SDIVREM */
11378 90,
11379 /* G_UDIVREM */
11380 94,
11381 /* G_AND */
11382 98,
11383 /* G_OR */
11384 101,
11385 /* G_XOR */
11386 104,
11387 /* G_IMPLICIT_DEF */
11388 107,
11389 /* G_PHI */
11390 108,
11391 /* G_FRAME_INDEX */
11392 109,
11393 /* G_GLOBAL_VALUE */
11394 111,
11395 /* G_PTRAUTH_GLOBAL_VALUE */
11396 113,
11397 /* G_CONSTANT_POOL */
11398 118,
11399 /* G_EXTRACT */
11400 120,
11401 /* G_UNMERGE_VALUES */
11402 123,
11403 /* G_INSERT */
11404 125,
11405 /* G_MERGE_VALUES */
11406 129,
11407 /* G_BUILD_VECTOR */
11408 131,
11409 /* G_BUILD_VECTOR_TRUNC */
11410 133,
11411 /* G_CONCAT_VECTORS */
11412 135,
11413 /* G_PTRTOINT */
11414 137,
11415 /* G_INTTOPTR */
11416 139,
11417 /* G_BITCAST */
11418 141,
11419 /* G_FREEZE */
11420 143,
11421 /* G_CONSTANT_FOLD_BARRIER */
11422 145,
11423 /* G_INTRINSIC_FPTRUNC_ROUND */
11424 147,
11425 /* G_INTRINSIC_TRUNC */
11426 150,
11427 /* G_INTRINSIC_ROUND */
11428 152,
11429 /* G_INTRINSIC_LRINT */
11430 154,
11431 /* G_INTRINSIC_LLRINT */
11432 156,
11433 /* G_INTRINSIC_ROUNDEVEN */
11434 158,
11435 /* G_READCYCLECOUNTER */
11436 160,
11437 /* G_READSTEADYCOUNTER */
11438 161,
11439 /* G_LOAD */
11440 162,
11441 /* G_SEXTLOAD */
11442 164,
11443 /* G_ZEXTLOAD */
11444 166,
11445 /* G_INDEXED_LOAD */
11446 168,
11447 /* G_INDEXED_SEXTLOAD */
11448 173,
11449 /* G_INDEXED_ZEXTLOAD */
11450 178,
11451 /* G_STORE */
11452 183,
11453 /* G_INDEXED_STORE */
11454 185,
11455 /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */
11456 190,
11457 /* G_ATOMIC_CMPXCHG */
11458 195,
11459 /* G_ATOMICRMW_XCHG */
11460 199,
11461 /* G_ATOMICRMW_ADD */
11462 202,
11463 /* G_ATOMICRMW_SUB */
11464 205,
11465 /* G_ATOMICRMW_AND */
11466 208,
11467 /* G_ATOMICRMW_NAND */
11468 211,
11469 /* G_ATOMICRMW_OR */
11470 214,
11471 /* G_ATOMICRMW_XOR */
11472 217,
11473 /* G_ATOMICRMW_MAX */
11474 220,
11475 /* G_ATOMICRMW_MIN */
11476 223,
11477 /* G_ATOMICRMW_UMAX */
11478 226,
11479 /* G_ATOMICRMW_UMIN */
11480 229,
11481 /* G_ATOMICRMW_FADD */
11482 232,
11483 /* G_ATOMICRMW_FSUB */
11484 235,
11485 /* G_ATOMICRMW_FMAX */
11486 238,
11487 /* G_ATOMICRMW_FMIN */
11488 241,
11489 /* G_ATOMICRMW_UINC_WRAP */
11490 244,
11491 /* G_ATOMICRMW_UDEC_WRAP */
11492 247,
11493 /* G_FENCE */
11494 250,
11495 /* G_PREFETCH */
11496 252,
11497 /* G_BRCOND */
11498 256,
11499 /* G_BRINDIRECT */
11500 258,
11501 /* G_INVOKE_REGION_START */
11502 259,
11503 /* G_INTRINSIC */
11504 259,
11505 /* G_INTRINSIC_W_SIDE_EFFECTS */
11506 260,
11507 /* G_INTRINSIC_CONVERGENT */
11508 261,
11509 /* G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS */
11510 262,
11511 /* G_ANYEXT */
11512 263,
11513 /* G_TRUNC */
11514 265,
11515 /* G_CONSTANT */
11516 267,
11517 /* G_FCONSTANT */
11518 269,
11519 /* G_VASTART */
11520 271,
11521 /* G_VAARG */
11522 272,
11523 /* G_SEXT */
11524 275,
11525 /* G_SEXT_INREG */
11526 277,
11527 /* G_ZEXT */
11528 280,
11529 /* G_SHL */
11530 282,
11531 /* G_LSHR */
11532 285,
11533 /* G_ASHR */
11534 288,
11535 /* G_FSHL */
11536 291,
11537 /* G_FSHR */
11538 295,
11539 /* G_ROTR */
11540 299,
11541 /* G_ROTL */
11542 302,
11543 /* G_ICMP */
11544 305,
11545 /* G_FCMP */
11546 309,
11547 /* G_SCMP */
11548 313,
11549 /* G_UCMP */
11550 316,
11551 /* G_SELECT */
11552 319,
11553 /* G_UADDO */
11554 323,
11555 /* G_UADDE */
11556 327,
11557 /* G_USUBO */
11558 332,
11559 /* G_USUBE */
11560 336,
11561 /* G_SADDO */
11562 341,
11563 /* G_SADDE */
11564 345,
11565 /* G_SSUBO */
11566 350,
11567 /* G_SSUBE */
11568 354,
11569 /* G_UMULO */
11570 359,
11571 /* G_SMULO */
11572 363,
11573 /* G_UMULH */
11574 367,
11575 /* G_SMULH */
11576 370,
11577 /* G_UADDSAT */
11578 373,
11579 /* G_SADDSAT */
11580 376,
11581 /* G_USUBSAT */
11582 379,
11583 /* G_SSUBSAT */
11584 382,
11585 /* G_USHLSAT */
11586 385,
11587 /* G_SSHLSAT */
11588 388,
11589 /* G_SMULFIX */
11590 391,
11591 /* G_UMULFIX */
11592 395,
11593 /* G_SMULFIXSAT */
11594 399,
11595 /* G_UMULFIXSAT */
11596 403,
11597 /* G_SDIVFIX */
11598 407,
11599 /* G_UDIVFIX */
11600 411,
11601 /* G_SDIVFIXSAT */
11602 415,
11603 /* G_UDIVFIXSAT */
11604 419,
11605 /* G_FADD */
11606 423,
11607 /* G_FSUB */
11608 426,
11609 /* G_FMUL */
11610 429,
11611 /* G_FMA */
11612 432,
11613 /* G_FMAD */
11614 436,
11615 /* G_FDIV */
11616 440,
11617 /* G_FREM */
11618 443,
11619 /* G_FPOW */
11620 446,
11621 /* G_FPOWI */
11622 449,
11623 /* G_FEXP */
11624 452,
11625 /* G_FEXP2 */
11626 454,
11627 /* G_FEXP10 */
11628 456,
11629 /* G_FLOG */
11630 458,
11631 /* G_FLOG2 */
11632 460,
11633 /* G_FLOG10 */
11634 462,
11635 /* G_FLDEXP */
11636 464,
11637 /* G_FFREXP */
11638 467,
11639 /* G_FNEG */
11640 470,
11641 /* G_FPEXT */
11642 472,
11643 /* G_FPTRUNC */
11644 474,
11645 /* G_FPTOSI */
11646 476,
11647 /* G_FPTOUI */
11648 478,
11649 /* G_SITOFP */
11650 480,
11651 /* G_UITOFP */
11652 482,
11653 /* G_FABS */
11654 484,
11655 /* G_FCOPYSIGN */
11656 486,
11657 /* G_IS_FPCLASS */
11658 489,
11659 /* G_FCANONICALIZE */
11660 492,
11661 /* G_FMINNUM */
11662 494,
11663 /* G_FMAXNUM */
11664 497,
11665 /* G_FMINNUM_IEEE */
11666 500,
11667 /* G_FMAXNUM_IEEE */
11668 503,
11669 /* G_FMINIMUM */
11670 506,
11671 /* G_FMAXIMUM */
11672 509,
11673 /* G_GET_FPENV */
11674 512,
11675 /* G_SET_FPENV */
11676 513,
11677 /* G_RESET_FPENV */
11678 514,
11679 /* G_GET_FPMODE */
11680 514,
11681 /* G_SET_FPMODE */
11682 515,
11683 /* G_RESET_FPMODE */
11684 516,
11685 /* G_PTR_ADD */
11686 516,
11687 /* G_PTRMASK */
11688 519,
11689 /* G_SMIN */
11690 522,
11691 /* G_SMAX */
11692 525,
11693 /* G_UMIN */
11694 528,
11695 /* G_UMAX */
11696 531,
11697 /* G_ABS */
11698 534,
11699 /* G_LROUND */
11700 536,
11701 /* G_LLROUND */
11702 538,
11703 /* G_BR */
11704 540,
11705 /* G_BRJT */
11706 541,
11707 /* G_VSCALE */
11708 544,
11709 /* G_INSERT_SUBVECTOR */
11710 546,
11711 /* G_EXTRACT_SUBVECTOR */
11712 550,
11713 /* G_INSERT_VECTOR_ELT */
11714 553,
11715 /* G_EXTRACT_VECTOR_ELT */
11716 557,
11717 /* G_SHUFFLE_VECTOR */
11718 560,
11719 /* G_SPLAT_VECTOR */
11720 564,
11721 /* G_VECTOR_COMPRESS */
11722 566,
11723 /* G_CTTZ */
11724 570,
11725 /* G_CTTZ_ZERO_UNDEF */
11726 572,
11727 /* G_CTLZ */
11728 574,
11729 /* G_CTLZ_ZERO_UNDEF */
11730 576,
11731 /* G_CTPOP */
11732 578,
11733 /* G_BSWAP */
11734 580,
11735 /* G_BITREVERSE */
11736 582,
11737 /* G_FCEIL */
11738 584,
11739 /* G_FCOS */
11740 586,
11741 /* G_FSIN */
11742 588,
11743 /* G_FTAN */
11744 590,
11745 /* G_FACOS */
11746 592,
11747 /* G_FASIN */
11748 594,
11749 /* G_FATAN */
11750 596,
11751 /* G_FCOSH */
11752 598,
11753 /* G_FSINH */
11754 600,
11755 /* G_FTANH */
11756 602,
11757 /* G_FSQRT */
11758 604,
11759 /* G_FFLOOR */
11760 606,
11761 /* G_FRINT */
11762 608,
11763 /* G_FNEARBYINT */
11764 610,
11765 /* G_ADDRSPACE_CAST */
11766 612,
11767 /* G_BLOCK_ADDR */
11768 614,
11769 /* G_JUMP_TABLE */
11770 616,
11771 /* G_DYN_STACKALLOC */
11772 618,
11773 /* G_STACKSAVE */
11774 621,
11775 /* G_STACKRESTORE */
11776 622,
11777 /* G_STRICT_FADD */
11778 623,
11779 /* G_STRICT_FSUB */
11780 626,
11781 /* G_STRICT_FMUL */
11782 629,
11783 /* G_STRICT_FDIV */
11784 632,
11785 /* G_STRICT_FREM */
11786 635,
11787 /* G_STRICT_FMA */
11788 638,
11789 /* G_STRICT_FSQRT */
11790 642,
11791 /* G_STRICT_FLDEXP */
11792 644,
11793 /* G_READ_REGISTER */
11794 647,
11795 /* G_WRITE_REGISTER */
11796 649,
11797 /* G_MEMCPY */
11798 651,
11799 /* G_MEMCPY_INLINE */
11800 655,
11801 /* G_MEMMOVE */
11802 658,
11803 /* G_MEMSET */
11804 662,
11805 /* G_BZERO */
11806 666,
11807 /* G_TRAP */
11808 669,
11809 /* G_DEBUGTRAP */
11810 669,
11811 /* G_UBSANTRAP */
11812 669,
11813 /* G_VECREDUCE_SEQ_FADD */
11814 670,
11815 /* G_VECREDUCE_SEQ_FMUL */
11816 673,
11817 /* G_VECREDUCE_FADD */
11818 676,
11819 /* G_VECREDUCE_FMUL */
11820 678,
11821 /* G_VECREDUCE_FMAX */
11822 680,
11823 /* G_VECREDUCE_FMIN */
11824 682,
11825 /* G_VECREDUCE_FMAXIMUM */
11826 684,
11827 /* G_VECREDUCE_FMINIMUM */
11828 686,
11829 /* G_VECREDUCE_ADD */
11830 688,
11831 /* G_VECREDUCE_MUL */
11832 690,
11833 /* G_VECREDUCE_AND */
11834 692,
11835 /* G_VECREDUCE_OR */
11836 694,
11837 /* G_VECREDUCE_XOR */
11838 696,
11839 /* G_VECREDUCE_SMAX */
11840 698,
11841 /* G_VECREDUCE_SMIN */
11842 700,
11843 /* G_VECREDUCE_UMAX */
11844 702,
11845 /* G_VECREDUCE_UMIN */
11846 704,
11847 /* G_SBFX */
11848 706,
11849 /* G_UBFX */
11850 710,
11851 /* ADA_ENTRY */
11852 714,
11853 /* ADA_ENTRY_VALUE */
11854 718,
11855 /* ADB_MemFoldPseudo */
11856 722,
11857 /* ADJCALLSTACKDOWN */
11858 727,
11859 /* ADJCALLSTACKUP */
11860 729,
11861 /* ADJDYNALLOC */
11862 731,
11863 /* AEB_MemFoldPseudo */
11864 735,
11865 /* AEXT128 */
11866 740,
11867 /* AFIMux */
11868 742,
11869 /* AG_MemFoldPseudo */
11870 745,
11871 /* AHIMux */
11872 750,
11873 /* AHIMuxK */
11874 753,
11875 /* ALG_MemFoldPseudo */
11876 756,
11877 /* AL_MemFoldPseudo */
11878 761,
11879 /* ATOMIC_CMP_SWAPW */
11880 766,
11881 /* ATOMIC_LOADW_AFI */
11882 774,
11883 /* ATOMIC_LOADW_AR */
11884 781,
11885 /* ATOMIC_LOADW_MAX */
11886 788,
11887 /* ATOMIC_LOADW_MIN */
11888 795,
11889 /* ATOMIC_LOADW_NILH */
11890 802,
11891 /* ATOMIC_LOADW_NILHi */
11892 809,
11893 /* ATOMIC_LOADW_NR */
11894 816,
11895 /* ATOMIC_LOADW_NRi */
11896 823,
11897 /* ATOMIC_LOADW_OILH */
11898 830,
11899 /* ATOMIC_LOADW_OR */
11900 837,
11901 /* ATOMIC_LOADW_SR */
11902 844,
11903 /* ATOMIC_LOADW_UMAX */
11904 851,
11905 /* ATOMIC_LOADW_UMIN */
11906 858,
11907 /* ATOMIC_LOADW_XILF */
11908 865,
11909 /* ATOMIC_LOADW_XR */
11910 872,
11911 /* ATOMIC_SWAPW */
11912 879,
11913 /* A_MemFoldPseudo */
11914 886,
11915 /* CFIMux */
11916 891,
11917 /* CGIBCall */
11918 893,
11919 /* CGIBReturn */
11920 897,
11921 /* CGRBCall */
11922 900,
11923 /* CGRBReturn */
11924 904,
11925 /* CHIMux */
11926 907,
11927 /* CIBCall */
11928 909,
11929 /* CIBReturn */
11930 913,
11931 /* CLCImm */
11932 916,
11933 /* CLCReg */
11934 921,
11935 /* CLFIMux */
11936 926,
11937 /* CLGIBCall */
11938 928,
11939 /* CLGIBReturn */
11940 932,
11941 /* CLGRBCall */
11942 935,
11943 /* CLGRBReturn */
11944 939,
11945 /* CLIBCall */
11946 942,
11947 /* CLIBReturn */
11948 946,
11949 /* CLMux */
11950 949,
11951 /* CLRBCall */
11952 953,
11953 /* CLRBReturn */
11954 957,
11955 /* CLSTLoop */
11956 960,
11957 /* CMux */
11958 964,
11959 /* CRBCall */
11960 968,
11961 /* CRBReturn */
11962 972,
11963 /* CallBASR */
11964 975,
11965 /* CallBASR_STACKEXT */
11966 976,
11967 /* CallBASR_XPLINK64 */
11968 977,
11969 /* CallBCR */
11970 978,
11971 /* CallBR */
11972 981,
11973 /* CallBRASL */
11974 982,
11975 /* CallBRASL_XPLINK64 */
11976 983,
11977 /* CallBRCL */
11978 984,
11979 /* CallJG */
11980 987,
11981 /* CondReturn */
11982 988,
11983 /* CondReturn_XPLINK */
11984 990,
11985 /* CondStore16 */
11986 992,
11987 /* CondStore16Inv */
11988 998,
11989 /* CondStore16Mux */
11990 1004,
11991 /* CondStore16MuxInv */
11992 1010,
11993 /* CondStore32 */
11994 1016,
11995 /* CondStore32Inv */
11996 1022,
11997 /* CondStore32Mux */
11998 1028,
11999 /* CondStore32MuxInv */
12000 1034,
12001 /* CondStore64 */
12002 1040,
12003 /* CondStore64Inv */
12004 1046,
12005 /* CondStore8 */
12006 1052,
12007 /* CondStore8Inv */
12008 1058,
12009 /* CondStore8Mux */
12010 1064,
12011 /* CondStore8MuxInv */
12012 1070,
12013 /* CondStoreF32 */
12014 1076,
12015 /* CondStoreF32Inv */
12016 1082,
12017 /* CondStoreF64 */
12018 1088,
12019 /* CondStoreF64Inv */
12020 1094,
12021 /* CondTrap */
12022 1100,
12023 /* DDB_MemFoldPseudo */
12024 1102,
12025 /* DEB_MemFoldPseudo */
12026 1107,
12027 /* EXRL_Pseudo */
12028 1112,
12029 /* GOT */
12030 1118,
12031 /* IIFMux */
12032 1119,
12033 /* IIHF64 */
12034 1121,
12035 /* IIHH64 */
12036 1124,
12037 /* IIHL64 */
12038 1127,
12039 /* IIHMux */
12040 1130,
12041 /* IILF64 */
12042 1133,
12043 /* IILH64 */
12044 1136,
12045 /* IILL64 */
12046 1139,
12047 /* IILMux */
12048 1142,
12049 /* L128 */
12050 1145,
12051 /* LBMux */
12052 1149,
12053 /* LEFR */
12054 1153,
12055 /* LFER */
12056 1155,
12057 /* LHIMux */
12058 1157,
12059 /* LHMux */
12060 1159,
12061 /* LLCMux */
12062 1163,
12063 /* LLCRMux */
12064 1167,
12065 /* LLHMux */
12066 1169,
12067 /* LLHRMux */
12068 1173,
12069 /* LMux */
12070 1175,
12071 /* LOCG_MemFoldPseudo */
12072 1179,
12073 /* LOCHIMux */
12074 1185,
12075 /* LOCMux */
12076 1190,
12077 /* LOCMux_MemFoldPseudo */
12078 1196,
12079 /* LOCRMux */
12080 1202,
12081 /* LTDBRCompare_Pseudo */
12082 1207,
12083 /* LTEBRCompare_Pseudo */
12084 1208,
12085 /* LTXBRCompare_Pseudo */
12086 1209,
12087 /* LX */
12088 1210,
12089 /* MADB_MemFoldPseudo */
12090 1214,
12091 /* MAEB_MemFoldPseudo */
12092 1220,
12093 /* MDB_MemFoldPseudo */
12094 1226,
12095 /* MEEB_MemFoldPseudo */
12096 1231,
12097 /* MSC_MemFoldPseudo */
12098 1236,
12099 /* MSDB_MemFoldPseudo */
12100 1241,
12101 /* MSEB_MemFoldPseudo */
12102 1247,
12103 /* MSGC_MemFoldPseudo */
12104 1253,
12105 /* MVCImm */
12106 1258,
12107 /* MVCReg */
12108 1263,
12109 /* MVSTLoop */
12110 1268,
12111 /* MemsetImmImm */
12112 1272,
12113 /* MemsetImmReg */
12114 1276,
12115 /* MemsetRegImm */
12116 1280,
12117 /* MemsetRegReg */
12118 1284,
12119 /* NCImm */
12120 1288,
12121 /* NCReg */
12122 1293,
12123 /* NG_MemFoldPseudo */
12124 1298,
12125 /* NIFMux */
12126 1303,
12127 /* NIHF64 */
12128 1306,
12129 /* NIHH64 */
12130 1309,
12131 /* NIHL64 */
12132 1312,
12133 /* NIHMux */
12134 1315,
12135 /* NILF64 */
12136 1318,
12137 /* NILH64 */
12138 1321,
12139 /* NILL64 */
12140 1324,
12141 /* NILMux */
12142 1327,
12143 /* N_MemFoldPseudo */
12144 1330,
12145 /* OCImm */
12146 1335,
12147 /* OCReg */
12148 1340,
12149 /* OG_MemFoldPseudo */
12150 1345,
12151 /* OIFMux */
12152 1350,
12153 /* OIHF64 */
12154 1353,
12155 /* OIHH64 */
12156 1356,
12157 /* OIHL64 */
12158 1359,
12159 /* OIHMux */
12160 1362,
12161 /* OILF64 */
12162 1365,
12163 /* OILH64 */
12164 1368,
12165 /* OILL64 */
12166 1371,
12167 /* OILMux */
12168 1374,
12169 /* O_MemFoldPseudo */
12170 1377,
12171 /* PAIR128 */
12172 1382,
12173 /* PROBED_ALLOCA */
12174 1385,
12175 /* PROBED_STACKALLOC */
12176 1388,
12177 /* RISBHH */
12178 1389,
12179 /* RISBHL */
12180 1395,
12181 /* RISBLH */
12182 1401,
12183 /* RISBLL */
12184 1407,
12185 /* RISBMux */
12186 1413,
12187 /* Return */
12188 1419,
12189 /* Return_XPLINK */
12190 1419,
12191 /* SCmp128Hi */
12192 1419,
12193 /* SDB_MemFoldPseudo */
12194 1421,
12195 /* SEB_MemFoldPseudo */
12196 1426,
12197 /* SELRMux */
12198 1431,
12199 /* SG_MemFoldPseudo */
12200 1436,
12201 /* SLG_MemFoldPseudo */
12202 1441,
12203 /* SL_MemFoldPseudo */
12204 1446,
12205 /* SRSTLoop */
12206 1451,
12207 /* ST128 */
12208 1455,
12209 /* STCMux */
12210 1459,
12211 /* STHMux */
12212 1463,
12213 /* STMux */
12214 1467,
12215 /* STOCMux */
12216 1471,
12217 /* STX */
12218 1476,
12219 /* S_MemFoldPseudo */
12220 1480,
12221 /* Select128 */
12222 1485,
12223 /* Select32 */
12224 1490,
12225 /* Select64 */
12226 1495,
12227 /* SelectF128 */
12228 1500,
12229 /* SelectF32 */
12230 1505,
12231 /* SelectF64 */
12232 1510,
12233 /* SelectVR128 */
12234 1515,
12235 /* SelectVR32 */
12236 1520,
12237 /* SelectVR64 */
12238 1525,
12239 /* Serialize */
12240 1530,
12241 /* TBEGIN_nofloat */
12242 1530,
12243 /* TLS_GDCALL */
12244 1533,
12245 /* TLS_LDCALL */
12246 1534,
12247 /* TMHH64 */
12248 1535,
12249 /* TMHL64 */
12250 1537,
12251 /* TMHMux */
12252 1539,
12253 /* TMLH64 */
12254 1541,
12255 /* TMLL64 */
12256 1543,
12257 /* TMLMux */
12258 1545,
12259 /* Trap */
12260 1547,
12261 /* UCmp128Hi */
12262 1547,
12263 /* VL32 */
12264 1549,
12265 /* VL64 */
12266 1553,
12267 /* VLR32 */
12268 1557,
12269 /* VLR64 */
12270 1559,
12271 /* VLVGP32 */
12272 1561,
12273 /* VST32 */
12274 1564,
12275 /* VST64 */
12276 1568,
12277 /* XCImm */
12278 1572,
12279 /* XCReg */
12280 1577,
12281 /* XG_MemFoldPseudo */
12282 1582,
12283 /* XIFMux */
12284 1587,
12285 /* XIHF64 */
12286 1590,
12287 /* XILF64 */
12288 1593,
12289 /* XPLINK_STACKALLOC */
12290 1596,
12291 /* X_MemFoldPseudo */
12292 1596,
12293 /* ZEXT128 */
12294 1601,
12295 /* A */
12296 1603,
12297 /* AD */
12298 1608,
12299 /* ADB */
12300 1613,
12301 /* ADBR */
12302 1618,
12303 /* ADR */
12304 1621,
12305 /* ADTR */
12306 1624,
12307 /* ADTRA */
12308 1627,
12309 /* AE */
12310 1631,
12311 /* AEB */
12312 1636,
12313 /* AEBR */
12314 1641,
12315 /* AER */
12316 1644,
12317 /* AFI */
12318 1647,
12319 /* AG */
12320 1650,
12321 /* AGF */
12322 1655,
12323 /* AGFI */
12324 1660,
12325 /* AGFR */
12326 1663,
12327 /* AGH */
12328 1666,
12329 /* AGHI */
12330 1671,
12331 /* AGHIK */
12332 1674,
12333 /* AGR */
12334 1677,
12335 /* AGRK */
12336 1680,
12337 /* AGSI */
12338 1683,
12339 /* AH */
12340 1686,
12341 /* AHHHR */
12342 1691,
12343 /* AHHLR */
12344 1694,
12345 /* AHI */
12346 1697,
12347 /* AHIK */
12348 1700,
12349 /* AHY */
12350 1703,
12351 /* AIH */
12352 1708,
12353 /* AL */
12354 1711,
12355 /* ALC */
12356 1716,
12357 /* ALCG */
12358 1721,
12359 /* ALCGR */
12360 1726,
12361 /* ALCR */
12362 1729,
12363 /* ALFI */
12364 1732,
12365 /* ALG */
12366 1735,
12367 /* ALGF */
12368 1740,
12369 /* ALGFI */
12370 1745,
12371 /* ALGFR */
12372 1748,
12373 /* ALGHSIK */
12374 1751,
12375 /* ALGR */
12376 1754,
12377 /* ALGRK */
12378 1757,
12379 /* ALGSI */
12380 1760,
12381 /* ALHHHR */
12382 1763,
12383 /* ALHHLR */
12384 1766,
12385 /* ALHSIK */
12386 1769,
12387 /* ALR */
12388 1772,
12389 /* ALRK */
12390 1775,
12391 /* ALSI */
12392 1778,
12393 /* ALSIH */
12394 1781,
12395 /* ALSIHN */
12396 1784,
12397 /* ALY */
12398 1787,
12399 /* AP */
12400 1792,
12401 /* AR */
12402 1798,
12403 /* ARK */
12404 1801,
12405 /* ASI */
12406 1804,
12407 /* AU */
12408 1807,
12409 /* AUR */
12410 1812,
12411 /* AW */
12412 1815,
12413 /* AWR */
12414 1820,
12415 /* AXBR */
12416 1823,
12417 /* AXR */
12418 1826,
12419 /* AXTR */
12420 1829,
12421 /* AXTRA */
12422 1832,
12423 /* AY */
12424 1836,
12425 /* B */
12426 1841,
12427 /* BAKR */
12428 1844,
12429 /* BAL */
12430 1846,
12431 /* BALR */
12432 1850,
12433 /* BAS */
12434 1852,
12435 /* BASR */
12436 1856,
12437 /* BASSM */
12438 1858,
12439 /* BAsmE */
12440 1860,
12441 /* BAsmH */
12442 1863,
12443 /* BAsmHE */
12444 1866,
12445 /* BAsmL */
12446 1869,
12447 /* BAsmLE */
12448 1872,
12449 /* BAsmLH */
12450 1875,
12451 /* BAsmM */
12452 1878,
12453 /* BAsmNE */
12454 1881,
12455 /* BAsmNH */
12456 1884,
12457 /* BAsmNHE */
12458 1887,
12459 /* BAsmNL */
12460 1890,
12461 /* BAsmNLE */
12462 1893,
12463 /* BAsmNLH */
12464 1896,
12465 /* BAsmNM */
12466 1899,
12467 /* BAsmNO */
12468 1902,
12469 /* BAsmNP */
12470 1905,
12471 /* BAsmNZ */
12472 1908,
12473 /* BAsmO */
12474 1911,
12475 /* BAsmP */
12476 1914,
12477 /* BAsmZ */
12478 1917,
12479 /* BC */
12480 1920,
12481 /* BCAsm */
12482 1925,
12483 /* BCR */
12484 1929,
12485 /* BCRAsm */
12486 1932,
12487 /* BCT */
12488 1934,
12489 /* BCTG */
12490 1939,
12491 /* BCTGR */
12492 1944,
12493 /* BCTR */
12494 1947,
12495 /* BI */
12496 1950,
12497 /* BIAsmE */
12498 1953,
12499 /* BIAsmH */
12500 1956,
12501 /* BIAsmHE */
12502 1959,
12503 /* BIAsmL */
12504 1962,
12505 /* BIAsmLE */
12506 1965,
12507 /* BIAsmLH */
12508 1968,
12509 /* BIAsmM */
12510 1971,
12511 /* BIAsmNE */
12512 1974,
12513 /* BIAsmNH */
12514 1977,
12515 /* BIAsmNHE */
12516 1980,
12517 /* BIAsmNL */
12518 1983,
12519 /* BIAsmNLE */
12520 1986,
12521 /* BIAsmNLH */
12522 1989,
12523 /* BIAsmNM */
12524 1992,
12525 /* BIAsmNO */
12526 1995,
12527 /* BIAsmNP */
12528 1998,
12529 /* BIAsmNZ */
12530 2001,
12531 /* BIAsmO */
12532 2004,
12533 /* BIAsmP */
12534 2007,
12535 /* BIAsmZ */
12536 2010,
12537 /* BIC */
12538 2013,
12539 /* BICAsm */
12540 2018,
12541 /* BPP */
12542 2022,
12543 /* BPRP */
12544 2026,
12545 /* BR */
12546 2029,
12547 /* BRAS */
12548 2030,
12549 /* BRASL */
12550 2033,
12551 /* BRAsmE */
12552 2036,
12553 /* BRAsmH */
12554 2037,
12555 /* BRAsmHE */
12556 2038,
12557 /* BRAsmL */
12558 2039,
12559 /* BRAsmLE */
12560 2040,
12561 /* BRAsmLH */
12562 2041,
12563 /* BRAsmM */
12564 2042,
12565 /* BRAsmNE */
12566 2043,
12567 /* BRAsmNH */
12568 2044,
12569 /* BRAsmNHE */
12570 2045,
12571 /* BRAsmNL */
12572 2046,
12573 /* BRAsmNLE */
12574 2047,
12575 /* BRAsmNLH */
12576 2048,
12577 /* BRAsmNM */
12578 2049,
12579 /* BRAsmNO */
12580 2050,
12581 /* BRAsmNP */
12582 2051,
12583 /* BRAsmNZ */
12584 2052,
12585 /* BRAsmO */
12586 2053,
12587 /* BRAsmP */
12588 2054,
12589 /* BRAsmZ */
12590 2055,
12591 /* BRC */
12592 2056,
12593 /* BRCAsm */
12594 2059,
12595 /* BRCL */
12596 2061,
12597 /* BRCLAsm */
12598 2064,
12599 /* BRCT */
12600 2066,
12601 /* BRCTG */
12602 2069,
12603 /* BRCTH */
12604 2072,
12605 /* BRXH */
12606 2075,
12607 /* BRXHG */
12608 2079,
12609 /* BRXLE */
12610 2083,
12611 /* BRXLG */
12612 2087,
12613 /* BSA */
12614 2091,
12615 /* BSG */
12616 2093,
12617 /* BSM */
12618 2095,
12619 /* BXH */
12620 2097,
12621 /* BXHG */
12622 2102,
12623 /* BXLE */
12624 2107,
12625 /* BXLEG */
12626 2112,
12627 /* C */
12628 2117,
12629 /* CD */
12630 2121,
12631 /* CDB */
12632 2125,
12633 /* CDBR */
12634 2129,
12635 /* CDFBR */
12636 2131,
12637 /* CDFBRA */
12638 2133,
12639 /* CDFR */
12640 2137,
12641 /* CDFTR */
12642 2139,
12643 /* CDGBR */
12644 2143,
12645 /* CDGBRA */
12646 2145,
12647 /* CDGR */
12648 2149,
12649 /* CDGTR */
12650 2151,
12651 /* CDGTRA */
12652 2153,
12653 /* CDLFBR */
12654 2157,
12655 /* CDLFTR */
12656 2161,
12657 /* CDLGBR */
12658 2165,
12659 /* CDLGTR */
12660 2169,
12661 /* CDPT */
12662 2173,
12663 /* CDR */
12664 2178,
12665 /* CDS */
12666 2180,
12667 /* CDSG */
12668 2185,
12669 /* CDSTR */
12670 2190,
12671 /* CDSY */
12672 2192,
12673 /* CDTR */
12674 2197,
12675 /* CDUTR */
12676 2199,
12677 /* CDZT */
12678 2201,
12679 /* CE */
12680 2206,
12681 /* CEB */
12682 2210,
12683 /* CEBR */
12684 2214,
12685 /* CEDTR */
12686 2216,
12687 /* CEFBR */
12688 2218,
12689 /* CEFBRA */
12690 2220,
12691 /* CEFR */
12692 2224,
12693 /* CEGBR */
12694 2226,
12695 /* CEGBRA */
12696 2228,
12697 /* CEGR */
12698 2232,
12699 /* CELFBR */
12700 2234,
12701 /* CELGBR */
12702 2238,
12703 /* CER */
12704 2242,
12705 /* CEXTR */
12706 2244,
12707 /* CFC */
12708 2246,
12709 /* CFDBR */
12710 2248,
12711 /* CFDBRA */
12712 2251,
12713 /* CFDR */
12714 2255,
12715 /* CFDTR */
12716 2258,
12717 /* CFEBR */
12718 2262,
12719 /* CFEBRA */
12720 2265,
12721 /* CFER */
12722 2269,
12723 /* CFI */
12724 2272,
12725 /* CFXBR */
12726 2274,
12727 /* CFXBRA */
12728 2277,
12729 /* CFXR */
12730 2281,
12731 /* CFXTR */
12732 2284,
12733 /* CG */
12734 2288,
12735 /* CGDBR */
12736 2292,
12737 /* CGDBRA */
12738 2295,
12739 /* CGDR */
12740 2299,
12741 /* CGDTR */
12742 2302,
12743 /* CGDTRA */
12744 2305,
12745 /* CGEBR */
12746 2309,
12747 /* CGEBRA */
12748 2312,
12749 /* CGER */
12750 2316,
12751 /* CGF */
12752 2319,
12753 /* CGFI */
12754 2323,
12755 /* CGFR */
12756 2325,
12757 /* CGFRL */
12758 2327,
12759 /* CGH */
12760 2329,
12761 /* CGHI */
12762 2333,
12763 /* CGHRL */
12764 2335,
12765 /* CGHSI */
12766 2337,
12767 /* CGIB */
12768 2340,
12769 /* CGIBAsm */
12770 2345,
12771 /* CGIBAsmE */
12772 2350,
12773 /* CGIBAsmH */
12774 2354,
12775 /* CGIBAsmHE */
12776 2358,
12777 /* CGIBAsmL */
12778 2362,
12779 /* CGIBAsmLE */
12780 2366,
12781 /* CGIBAsmLH */
12782 2370,
12783 /* CGIBAsmNE */
12784 2374,
12785 /* CGIBAsmNH */
12786 2378,
12787 /* CGIBAsmNHE */
12788 2382,
12789 /* CGIBAsmNL */
12790 2386,
12791 /* CGIBAsmNLE */
12792 2390,
12793 /* CGIBAsmNLH */
12794 2394,
12795 /* CGIJ */
12796 2398,
12797 /* CGIJAsm */
12798 2402,
12799 /* CGIJAsmE */
12800 2406,
12801 /* CGIJAsmH */
12802 2409,
12803 /* CGIJAsmHE */
12804 2412,
12805 /* CGIJAsmL */
12806 2415,
12807 /* CGIJAsmLE */
12808 2418,
12809 /* CGIJAsmLH */
12810 2421,
12811 /* CGIJAsmNE */
12812 2424,
12813 /* CGIJAsmNH */
12814 2427,
12815 /* CGIJAsmNHE */
12816 2430,
12817 /* CGIJAsmNL */
12818 2433,
12819 /* CGIJAsmNLE */
12820 2436,
12821 /* CGIJAsmNLH */
12822 2439,
12823 /* CGIT */
12824 2442,
12825 /* CGITAsm */
12826 2445,
12827 /* CGITAsmE */
12828 2448,
12829 /* CGITAsmH */
12830 2450,
12831 /* CGITAsmHE */
12832 2452,
12833 /* CGITAsmL */
12834 2454,
12835 /* CGITAsmLE */
12836 2456,
12837 /* CGITAsmLH */
12838 2458,
12839 /* CGITAsmNE */
12840 2460,
12841 /* CGITAsmNH */
12842 2462,
12843 /* CGITAsmNHE */
12844 2464,
12845 /* CGITAsmNL */
12846 2466,
12847 /* CGITAsmNLE */
12848 2468,
12849 /* CGITAsmNLH */
12850 2470,
12851 /* CGR */
12852 2472,
12853 /* CGRB */
12854 2474,
12855 /* CGRBAsm */
12856 2479,
12857 /* CGRBAsmE */
12858 2484,
12859 /* CGRBAsmH */
12860 2488,
12861 /* CGRBAsmHE */
12862 2492,
12863 /* CGRBAsmL */
12864 2496,
12865 /* CGRBAsmLE */
12866 2500,
12867 /* CGRBAsmLH */
12868 2504,
12869 /* CGRBAsmNE */
12870 2508,
12871 /* CGRBAsmNH */
12872 2512,
12873 /* CGRBAsmNHE */
12874 2516,
12875 /* CGRBAsmNL */
12876 2520,
12877 /* CGRBAsmNLE */
12878 2524,
12879 /* CGRBAsmNLH */
12880 2528,
12881 /* CGRJ */
12882 2532,
12883 /* CGRJAsm */
12884 2536,
12885 /* CGRJAsmE */
12886 2540,
12887 /* CGRJAsmH */
12888 2543,
12889 /* CGRJAsmHE */
12890 2546,
12891 /* CGRJAsmL */
12892 2549,
12893 /* CGRJAsmLE */
12894 2552,
12895 /* CGRJAsmLH */
12896 2555,
12897 /* CGRJAsmNE */
12898 2558,
12899 /* CGRJAsmNH */
12900 2561,
12901 /* CGRJAsmNHE */
12902 2564,
12903 /* CGRJAsmNL */
12904 2567,
12905 /* CGRJAsmNLE */
12906 2570,
12907 /* CGRJAsmNLH */
12908 2573,
12909 /* CGRL */
12910 2576,
12911 /* CGRT */
12912 2578,
12913 /* CGRTAsm */
12914 2581,
12915 /* CGRTAsmE */
12916 2584,
12917 /* CGRTAsmH */
12918 2586,
12919 /* CGRTAsmHE */
12920 2588,
12921 /* CGRTAsmL */
12922 2590,
12923 /* CGRTAsmLE */
12924 2592,
12925 /* CGRTAsmLH */
12926 2594,
12927 /* CGRTAsmNE */
12928 2596,
12929 /* CGRTAsmNH */
12930 2598,
12931 /* CGRTAsmNHE */
12932 2600,
12933 /* CGRTAsmNL */
12934 2602,
12935 /* CGRTAsmNLE */
12936 2604,
12937 /* CGRTAsmNLH */
12938 2606,
12939 /* CGXBR */
12940 2608,
12941 /* CGXBRA */
12942 2611,
12943 /* CGXR */
12944 2615,
12945 /* CGXTR */
12946 2618,
12947 /* CGXTRA */
12948 2621,
12949 /* CH */
12950 2625,
12951 /* CHF */
12952 2629,
12953 /* CHHR */
12954 2633,
12955 /* CHHSI */
12956 2635,
12957 /* CHI */
12958 2638,
12959 /* CHLR */
12960 2640,
12961 /* CHRL */
12962 2642,
12963 /* CHSI */
12964 2644,
12965 /* CHY */
12966 2647,
12967 /* CIB */
12968 2651,
12969 /* CIBAsm */
12970 2656,
12971 /* CIBAsmE */
12972 2661,
12973 /* CIBAsmH */
12974 2665,
12975 /* CIBAsmHE */
12976 2669,
12977 /* CIBAsmL */
12978 2673,
12979 /* CIBAsmLE */
12980 2677,
12981 /* CIBAsmLH */
12982 2681,
12983 /* CIBAsmNE */
12984 2685,
12985 /* CIBAsmNH */
12986 2689,
12987 /* CIBAsmNHE */
12988 2693,
12989 /* CIBAsmNL */
12990 2697,
12991 /* CIBAsmNLE */
12992 2701,
12993 /* CIBAsmNLH */
12994 2705,
12995 /* CIH */
12996 2709,
12997 /* CIJ */
12998 2711,
12999 /* CIJAsm */
13000 2715,
13001 /* CIJAsmE */
13002 2719,
13003 /* CIJAsmH */
13004 2722,
13005 /* CIJAsmHE */
13006 2725,
13007 /* CIJAsmL */
13008 2728,
13009 /* CIJAsmLE */
13010 2731,
13011 /* CIJAsmLH */
13012 2734,
13013 /* CIJAsmNE */
13014 2737,
13015 /* CIJAsmNH */
13016 2740,
13017 /* CIJAsmNHE */
13018 2743,
13019 /* CIJAsmNL */
13020 2746,
13021 /* CIJAsmNLE */
13022 2749,
13023 /* CIJAsmNLH */
13024 2752,
13025 /* CIT */
13026 2755,
13027 /* CITAsm */
13028 2758,
13029 /* CITAsmE */
13030 2761,
13031 /* CITAsmH */
13032 2763,
13033 /* CITAsmHE */
13034 2765,
13035 /* CITAsmL */
13036 2767,
13037 /* CITAsmLE */
13038 2769,
13039 /* CITAsmLH */
13040 2771,
13041 /* CITAsmNE */
13042 2773,
13043 /* CITAsmNH */
13044 2775,
13045 /* CITAsmNHE */
13046 2777,
13047 /* CITAsmNL */
13048 2779,
13049 /* CITAsmNLE */
13050 2781,
13051 /* CITAsmNLH */
13052 2783,
13053 /* CKSM */
13054 2785,
13055 /* CL */
13056 2789,
13057 /* CLC */
13058 2793,
13059 /* CLCL */
13060 2798,
13061 /* CLCLE */
13062 2802,
13063 /* CLCLU */
13064 2808,
13065 /* CLFDBR */
13066 2814,
13067 /* CLFDTR */
13068 2818,
13069 /* CLFEBR */
13070 2822,
13071 /* CLFHSI */
13072 2826,
13073 /* CLFI */
13074 2829,
13075 /* CLFIT */
13076 2831,
13077 /* CLFITAsm */
13078 2834,
13079 /* CLFITAsmE */
13080 2837,
13081 /* CLFITAsmH */
13082 2839,
13083 /* CLFITAsmHE */
13084 2841,
13085 /* CLFITAsmL */
13086 2843,
13087 /* CLFITAsmLE */
13088 2845,
13089 /* CLFITAsmLH */
13090 2847,
13091 /* CLFITAsmNE */
13092 2849,
13093 /* CLFITAsmNH */
13094 2851,
13095 /* CLFITAsmNHE */
13096 2853,
13097 /* CLFITAsmNL */
13098 2855,
13099 /* CLFITAsmNLE */
13100 2857,
13101 /* CLFITAsmNLH */
13102 2859,
13103 /* CLFXBR */
13104 2861,
13105 /* CLFXTR */
13106 2865,
13107 /* CLG */
13108 2869,
13109 /* CLGDBR */
13110 2873,
13111 /* CLGDTR */
13112 2877,
13113 /* CLGEBR */
13114 2881,
13115 /* CLGF */
13116 2885,
13117 /* CLGFI */
13118 2889,
13119 /* CLGFR */
13120 2891,
13121 /* CLGFRL */
13122 2893,
13123 /* CLGHRL */
13124 2895,
13125 /* CLGHSI */
13126 2897,
13127 /* CLGIB */
13128 2900,
13129 /* CLGIBAsm */
13130 2905,
13131 /* CLGIBAsmE */
13132 2910,
13133 /* CLGIBAsmH */
13134 2914,
13135 /* CLGIBAsmHE */
13136 2918,
13137 /* CLGIBAsmL */
13138 2922,
13139 /* CLGIBAsmLE */
13140 2926,
13141 /* CLGIBAsmLH */
13142 2930,
13143 /* CLGIBAsmNE */
13144 2934,
13145 /* CLGIBAsmNH */
13146 2938,
13147 /* CLGIBAsmNHE */
13148 2942,
13149 /* CLGIBAsmNL */
13150 2946,
13151 /* CLGIBAsmNLE */
13152 2950,
13153 /* CLGIBAsmNLH */
13154 2954,
13155 /* CLGIJ */
13156 2958,
13157 /* CLGIJAsm */
13158 2962,
13159 /* CLGIJAsmE */
13160 2966,
13161 /* CLGIJAsmH */
13162 2969,
13163 /* CLGIJAsmHE */
13164 2972,
13165 /* CLGIJAsmL */
13166 2975,
13167 /* CLGIJAsmLE */
13168 2978,
13169 /* CLGIJAsmLH */
13170 2981,
13171 /* CLGIJAsmNE */
13172 2984,
13173 /* CLGIJAsmNH */
13174 2987,
13175 /* CLGIJAsmNHE */
13176 2990,
13177 /* CLGIJAsmNL */
13178 2993,
13179 /* CLGIJAsmNLE */
13180 2996,
13181 /* CLGIJAsmNLH */
13182 2999,
13183 /* CLGIT */
13184 3002,
13185 /* CLGITAsm */
13186 3005,
13187 /* CLGITAsmE */
13188 3008,
13189 /* CLGITAsmH */
13190 3010,
13191 /* CLGITAsmHE */
13192 3012,
13193 /* CLGITAsmL */
13194 3014,
13195 /* CLGITAsmLE */
13196 3016,
13197 /* CLGITAsmLH */
13198 3018,
13199 /* CLGITAsmNE */
13200 3020,
13201 /* CLGITAsmNH */
13202 3022,
13203 /* CLGITAsmNHE */
13204 3024,
13205 /* CLGITAsmNL */
13206 3026,
13207 /* CLGITAsmNLE */
13208 3028,
13209 /* CLGITAsmNLH */
13210 3030,
13211 /* CLGR */
13212 3032,
13213 /* CLGRB */
13214 3034,
13215 /* CLGRBAsm */
13216 3039,
13217 /* CLGRBAsmE */
13218 3044,
13219 /* CLGRBAsmH */
13220 3048,
13221 /* CLGRBAsmHE */
13222 3052,
13223 /* CLGRBAsmL */
13224 3056,
13225 /* CLGRBAsmLE */
13226 3060,
13227 /* CLGRBAsmLH */
13228 3064,
13229 /* CLGRBAsmNE */
13230 3068,
13231 /* CLGRBAsmNH */
13232 3072,
13233 /* CLGRBAsmNHE */
13234 3076,
13235 /* CLGRBAsmNL */
13236 3080,
13237 /* CLGRBAsmNLE */
13238 3084,
13239 /* CLGRBAsmNLH */
13240 3088,
13241 /* CLGRJ */
13242 3092,
13243 /* CLGRJAsm */
13244 3096,
13245 /* CLGRJAsmE */
13246 3100,
13247 /* CLGRJAsmH */
13248 3103,
13249 /* CLGRJAsmHE */
13250 3106,
13251 /* CLGRJAsmL */
13252 3109,
13253 /* CLGRJAsmLE */
13254 3112,
13255 /* CLGRJAsmLH */
13256 3115,
13257 /* CLGRJAsmNE */
13258 3118,
13259 /* CLGRJAsmNH */
13260 3121,
13261 /* CLGRJAsmNHE */
13262 3124,
13263 /* CLGRJAsmNL */
13264 3127,
13265 /* CLGRJAsmNLE */
13266 3130,
13267 /* CLGRJAsmNLH */
13268 3133,
13269 /* CLGRL */
13270 3136,
13271 /* CLGRT */
13272 3138,
13273 /* CLGRTAsm */
13274 3141,
13275 /* CLGRTAsmE */
13276 3144,
13277 /* CLGRTAsmH */
13278 3146,
13279 /* CLGRTAsmHE */
13280 3148,
13281 /* CLGRTAsmL */
13282 3150,
13283 /* CLGRTAsmLE */
13284 3152,
13285 /* CLGRTAsmLH */
13286 3154,
13287 /* CLGRTAsmNE */
13288 3156,
13289 /* CLGRTAsmNH */
13290 3158,
13291 /* CLGRTAsmNHE */
13292 3160,
13293 /* CLGRTAsmNL */
13294 3162,
13295 /* CLGRTAsmNLE */
13296 3164,
13297 /* CLGRTAsmNLH */
13298 3166,
13299 /* CLGT */
13300 3168,
13301 /* CLGTAsm */
13302 3172,
13303 /* CLGTAsmE */
13304 3176,
13305 /* CLGTAsmH */
13306 3179,
13307 /* CLGTAsmHE */
13308 3182,
13309 /* CLGTAsmL */
13310 3185,
13311 /* CLGTAsmLE */
13312 3188,
13313 /* CLGTAsmLH */
13314 3191,
13315 /* CLGTAsmNE */
13316 3194,
13317 /* CLGTAsmNH */
13318 3197,
13319 /* CLGTAsmNHE */
13320 3200,
13321 /* CLGTAsmNL */
13322 3203,
13323 /* CLGTAsmNLE */
13324 3206,
13325 /* CLGTAsmNLH */
13326 3209,
13327 /* CLGXBR */
13328 3212,
13329 /* CLGXTR */
13330 3216,
13331 /* CLHF */
13332 3220,
13333 /* CLHHR */
13334 3224,
13335 /* CLHHSI */
13336 3226,
13337 /* CLHLR */
13338 3229,
13339 /* CLHRL */
13340 3231,
13341 /* CLI */
13342 3233,
13343 /* CLIB */
13344 3236,
13345 /* CLIBAsm */
13346 3241,
13347 /* CLIBAsmE */
13348 3246,
13349 /* CLIBAsmH */
13350 3250,
13351 /* CLIBAsmHE */
13352 3254,
13353 /* CLIBAsmL */
13354 3258,
13355 /* CLIBAsmLE */
13356 3262,
13357 /* CLIBAsmLH */
13358 3266,
13359 /* CLIBAsmNE */
13360 3270,
13361 /* CLIBAsmNH */
13362 3274,
13363 /* CLIBAsmNHE */
13364 3278,
13365 /* CLIBAsmNL */
13366 3282,
13367 /* CLIBAsmNLE */
13368 3286,
13369 /* CLIBAsmNLH */
13370 3290,
13371 /* CLIH */
13372 3294,
13373 /* CLIJ */
13374 3296,
13375 /* CLIJAsm */
13376 3300,
13377 /* CLIJAsmE */
13378 3304,
13379 /* CLIJAsmH */
13380 3307,
13381 /* CLIJAsmHE */
13382 3310,
13383 /* CLIJAsmL */
13384 3313,
13385 /* CLIJAsmLE */
13386 3316,
13387 /* CLIJAsmLH */
13388 3319,
13389 /* CLIJAsmNE */
13390 3322,
13391 /* CLIJAsmNH */
13392 3325,
13393 /* CLIJAsmNHE */
13394 3328,
13395 /* CLIJAsmNL */
13396 3331,
13397 /* CLIJAsmNLE */
13398 3334,
13399 /* CLIJAsmNLH */
13400 3337,
13401 /* CLIY */
13402 3340,
13403 /* CLM */
13404 3343,
13405 /* CLMH */
13406 3347,
13407 /* CLMY */
13408 3351,
13409 /* CLR */
13410 3355,
13411 /* CLRB */
13412 3357,
13413 /* CLRBAsm */
13414 3362,
13415 /* CLRBAsmE */
13416 3367,
13417 /* CLRBAsmH */
13418 3371,
13419 /* CLRBAsmHE */
13420 3375,
13421 /* CLRBAsmL */
13422 3379,
13423 /* CLRBAsmLE */
13424 3383,
13425 /* CLRBAsmLH */
13426 3387,
13427 /* CLRBAsmNE */
13428 3391,
13429 /* CLRBAsmNH */
13430 3395,
13431 /* CLRBAsmNHE */
13432 3399,
13433 /* CLRBAsmNL */
13434 3403,
13435 /* CLRBAsmNLE */
13436 3407,
13437 /* CLRBAsmNLH */
13438 3411,
13439 /* CLRJ */
13440 3415,
13441 /* CLRJAsm */
13442 3419,
13443 /* CLRJAsmE */
13444 3423,
13445 /* CLRJAsmH */
13446 3426,
13447 /* CLRJAsmHE */
13448 3429,
13449 /* CLRJAsmL */
13450 3432,
13451 /* CLRJAsmLE */
13452 3435,
13453 /* CLRJAsmLH */
13454 3438,
13455 /* CLRJAsmNE */
13456 3441,
13457 /* CLRJAsmNH */
13458 3444,
13459 /* CLRJAsmNHE */
13460 3447,
13461 /* CLRJAsmNL */
13462 3450,
13463 /* CLRJAsmNLE */
13464 3453,
13465 /* CLRJAsmNLH */
13466 3456,
13467 /* CLRL */
13468 3459,
13469 /* CLRT */
13470 3461,
13471 /* CLRTAsm */
13472 3464,
13473 /* CLRTAsmE */
13474 3467,
13475 /* CLRTAsmH */
13476 3469,
13477 /* CLRTAsmHE */
13478 3471,
13479 /* CLRTAsmL */
13480 3473,
13481 /* CLRTAsmLE */
13482 3475,
13483 /* CLRTAsmLH */
13484 3477,
13485 /* CLRTAsmNE */
13486 3479,
13487 /* CLRTAsmNH */
13488 3481,
13489 /* CLRTAsmNHE */
13490 3483,
13491 /* CLRTAsmNL */
13492 3485,
13493 /* CLRTAsmNLE */
13494 3487,
13495 /* CLRTAsmNLH */
13496 3489,
13497 /* CLST */
13498 3491,
13499 /* CLT */
13500 3495,
13501 /* CLTAsm */
13502 3499,
13503 /* CLTAsmE */
13504 3503,
13505 /* CLTAsmH */
13506 3506,
13507 /* CLTAsmHE */
13508 3509,
13509 /* CLTAsmL */
13510 3512,
13511 /* CLTAsmLE */
13512 3515,
13513 /* CLTAsmLH */
13514 3518,
13515 /* CLTAsmNE */
13516 3521,
13517 /* CLTAsmNH */
13518 3524,
13519 /* CLTAsmNHE */
13520 3527,
13521 /* CLTAsmNL */
13522 3530,
13523 /* CLTAsmNLE */
13524 3533,
13525 /* CLTAsmNLH */
13526 3536,
13527 /* CLY */
13528 3539,
13529 /* CMPSC */
13530 3543,
13531 /* CP */
13532 3547,
13533 /* CPDT */
13534 3553,
13535 /* CPSDRdd */
13536 3558,
13537 /* CPSDRds */
13538 3561,
13539 /* CPSDRsd */
13540 3564,
13541 /* CPSDRss */
13542 3567,
13543 /* CPXT */
13544 3570,
13545 /* CPYA */
13546 3575,
13547 /* CR */
13548 3577,
13549 /* CRB */
13550 3579,
13551 /* CRBAsm */
13552 3584,
13553 /* CRBAsmE */
13554 3589,
13555 /* CRBAsmH */
13556 3593,
13557 /* CRBAsmHE */
13558 3597,
13559 /* CRBAsmL */
13560 3601,
13561 /* CRBAsmLE */
13562 3605,
13563 /* CRBAsmLH */
13564 3609,
13565 /* CRBAsmNE */
13566 3613,
13567 /* CRBAsmNH */
13568 3617,
13569 /* CRBAsmNHE */
13570 3621,
13571 /* CRBAsmNL */
13572 3625,
13573 /* CRBAsmNLE */
13574 3629,
13575 /* CRBAsmNLH */
13576 3633,
13577 /* CRDTE */
13578 3637,
13579 /* CRDTEOpt */
13580 3641,
13581 /* CRJ */
13582 3644,
13583 /* CRJAsm */
13584 3648,
13585 /* CRJAsmE */
13586 3652,
13587 /* CRJAsmH */
13588 3655,
13589 /* CRJAsmHE */
13590 3658,
13591 /* CRJAsmL */
13592 3661,
13593 /* CRJAsmLE */
13594 3664,
13595 /* CRJAsmLH */
13596 3667,
13597 /* CRJAsmNE */
13598 3670,
13599 /* CRJAsmNH */
13600 3673,
13601 /* CRJAsmNHE */
13602 3676,
13603 /* CRJAsmNL */
13604 3679,
13605 /* CRJAsmNLE */
13606 3682,
13607 /* CRJAsmNLH */
13608 3685,
13609 /* CRL */
13610 3688,
13611 /* CRT */
13612 3690,
13613 /* CRTAsm */
13614 3693,
13615 /* CRTAsmE */
13616 3696,
13617 /* CRTAsmH */
13618 3698,
13619 /* CRTAsmHE */
13620 3700,
13621 /* CRTAsmL */
13622 3702,
13623 /* CRTAsmLE */
13624 3704,
13625 /* CRTAsmLH */
13626 3706,
13627 /* CRTAsmNE */
13628 3708,
13629 /* CRTAsmNH */
13630 3710,
13631 /* CRTAsmNHE */
13632 3712,
13633 /* CRTAsmNL */
13634 3714,
13635 /* CRTAsmNLE */
13636 3716,
13637 /* CRTAsmNLH */
13638 3718,
13639 /* CS */
13640 3720,
13641 /* CSCH */
13642 3725,
13643 /* CSDTR */
13644 3725,
13645 /* CSG */
13646 3728,
13647 /* CSP */
13648 3733,
13649 /* CSPG */
13650 3736,
13651 /* CSST */
13652 3739,
13653 /* CSXTR */
13654 3744,
13655 /* CSY */
13656 3747,
13657 /* CU12 */
13658 3752,
13659 /* CU12Opt */
13660 3757,
13661 /* CU14 */
13662 3761,
13663 /* CU14Opt */
13664 3766,
13665 /* CU21 */
13666 3770,
13667 /* CU21Opt */
13668 3775,
13669 /* CU24 */
13670 3779,
13671 /* CU24Opt */
13672 3784,
13673 /* CU41 */
13674 3788,
13675 /* CU42 */
13676 3792,
13677 /* CUDTR */
13678 3796,
13679 /* CUSE */
13680 3798,
13681 /* CUTFU */
13682 3802,
13683 /* CUTFUOpt */
13684 3807,
13685 /* CUUTF */
13686 3811,
13687 /* CUUTFOpt */
13688 3816,
13689 /* CUXTR */
13690 3820,
13691 /* CVB */
13692 3822,
13693 /* CVBG */
13694 3827,
13695 /* CVBY */
13696 3832,
13697 /* CVD */
13698 3837,
13699 /* CVDG */
13700 3841,
13701 /* CVDY */
13702 3845,
13703 /* CXBR */
13704 3849,
13705 /* CXFBR */
13706 3851,
13707 /* CXFBRA */
13708 3853,
13709 /* CXFR */
13710 3857,
13711 /* CXFTR */
13712 3859,
13713 /* CXGBR */
13714 3863,
13715 /* CXGBRA */
13716 3865,
13717 /* CXGR */
13718 3869,
13719 /* CXGTR */
13720 3871,
13721 /* CXGTRA */
13722 3873,
13723 /* CXLFBR */
13724 3877,
13725 /* CXLFTR */
13726 3881,
13727 /* CXLGBR */
13728 3885,
13729 /* CXLGTR */
13730 3889,
13731 /* CXPT */
13732 3893,
13733 /* CXR */
13734 3898,
13735 /* CXSTR */
13736 3900,
13737 /* CXTR */
13738 3902,
13739 /* CXUTR */
13740 3904,
13741 /* CXZT */
13742 3906,
13743 /* CY */
13744 3911,
13745 /* CZDT */
13746 3915,
13747 /* CZXT */
13748 3920,
13749 /* D */
13750 3925,
13751 /* DD */
13752 3930,
13753 /* DDB */
13754 3935,
13755 /* DDBR */
13756 3940,
13757 /* DDR */
13758 3943,
13759 /* DDTR */
13760 3946,
13761 /* DDTRA */
13762 3949,
13763 /* DE */
13764 3953,
13765 /* DEB */
13766 3958,
13767 /* DEBR */
13768 3963,
13769 /* DER */
13770 3966,
13771 /* DFLTCC */
13772 3969,
13773 /* DIAG */
13774 3974,
13775 /* DIDBR */
13776 3978,
13777 /* DIEBR */
13778 3983,
13779 /* DL */
13780 3988,
13781 /* DLG */
13782 3993,
13783 /* DLGR */
13784 3998,
13785 /* DLR */
13786 4001,
13787 /* DP */
13788 4004,
13789 /* DR */
13790 4010,
13791 /* DSG */
13792 4013,
13793 /* DSGF */
13794 4018,
13795 /* DSGFR */
13796 4023,
13797 /* DSGR */
13798 4026,
13799 /* DXBR */
13800 4029,
13801 /* DXR */
13802 4032,
13803 /* DXTR */
13804 4035,
13805 /* DXTRA */
13806 4038,
13807 /* EAR */
13808 4042,
13809 /* ECAG */
13810 4044,
13811 /* ECCTR */
13812 4048,
13813 /* ECPGA */
13814 4050,
13815 /* ECTG */
13816 4052,
13817 /* ED */
13818 4057,
13819 /* EDMK */
13820 4062,
13821 /* EEDTR */
13822 4067,
13823 /* EEXTR */
13824 4069,
13825 /* EFPC */
13826 4071,
13827 /* EPAIR */
13828 4072,
13829 /* EPAR */
13830 4073,
13831 /* EPCTR */
13832 4074,
13833 /* EPSW */
13834 4076,
13835 /* EREG */
13836 4078,
13837 /* EREGG */
13838 4080,
13839 /* ESAIR */
13840 4082,
13841 /* ESAR */
13842 4083,
13843 /* ESDTR */
13844 4084,
13845 /* ESEA */
13846 4086,
13847 /* ESTA */
13848 4088,
13849 /* ESXTR */
13850 4090,
13851 /* ETND */
13852 4092,
13853 /* EX */
13854 4093,
13855 /* EXRL */
13856 4097,
13857 /* FIDBR */
13858 4099,
13859 /* FIDBRA */
13860 4102,
13861 /* FIDR */
13862 4106,
13863 /* FIDTR */
13864 4108,
13865 /* FIEBR */
13866 4112,
13867 /* FIEBRA */
13868 4115,
13869 /* FIER */
13870 4119,
13871 /* FIXBR */
13872 4121,
13873 /* FIXBRA */
13874 4124,
13875 /* FIXR */
13876 4128,
13877 /* FIXTR */
13878 4130,
13879 /* FLOGR */
13880 4134,
13881 /* HDR */
13882 4136,
13883 /* HER */
13884 4138,
13885 /* HSCH */
13886 4140,
13887 /* IAC */
13888 4140,
13889 /* IC */
13890 4141,
13891 /* IC32 */
13892 4146,
13893 /* IC32Y */
13894 4151,
13895 /* ICM */
13896 4156,
13897 /* ICMH */
13898 4161,
13899 /* ICMY */
13900 4166,
13901 /* ICY */
13902 4171,
13903 /* IDTE */
13904 4176,
13905 /* IDTEOpt */
13906 4180,
13907 /* IEDTR */
13908 4183,
13909 /* IEXTR */
13910 4186,
13911 /* IIHF */
13912 4189,
13913 /* IIHH */
13914 4191,
13915 /* IIHL */
13916 4194,
13917 /* IILF */
13918 4197,
13919 /* IILH */
13920 4199,
13921 /* IILL */
13922 4202,
13923 /* IPK */
13924 4205,
13925 /* IPM */
13926 4205,
13927 /* IPTE */
13928 4206,
13929 /* IPTEOpt */
13930 4210,
13931 /* IPTEOptOpt */
13932 4213,
13933 /* IRBM */
13934 4215,
13935 /* ISKE */
13936 4217,
13937 /* IVSK */
13938 4220,
13939 /* InsnE */
13940 4223,
13941 /* InsnRI */
13942 4224,
13943 /* InsnRIE */
13944 4227,
13945 /* InsnRIL */
13946 4231,
13947 /* InsnRILU */
13948 4234,
13949 /* InsnRIS */
13950 4237,
13951 /* InsnRR */
13952 4243,
13953 /* InsnRRE */
13954 4246,
13955 /* InsnRRF */
13956 4249,
13957 /* InsnRRS */
13958 4254,
13959 /* InsnRS */
13960 4260,
13961 /* InsnRSE */
13962 4265,
13963 /* InsnRSI */
13964 4270,
13965 /* InsnRSY */
13966 4274,
13967 /* InsnRX */
13968 4279,
13969 /* InsnRXE */
13970 4284,
13971 /* InsnRXF */
13972 4289,
13973 /* InsnRXY */
13974 4295,
13975 /* InsnS */
13976 4300,
13977 /* InsnSI */
13978 4303,
13979 /* InsnSIL */
13980 4307,
13981 /* InsnSIY */
13982 4311,
13983 /* InsnSS */
13984 4315,
13985 /* InsnSSE */
13986 4322,
13987 /* InsnSSF */
13988 4327,
13989 /* InsnVRI */
13990 4333,
13991 /* InsnVRR */
13992 4339,
13993 /* InsnVRS */
13994 4346,
13995 /* InsnVRV */
13996 4352,
13997 /* InsnVRX */
13998 4358,
13999 /* InsnVSI */
14000 4364,
14001 /* J */
14002 4369,
14003 /* JAsmE */
14004 4370,
14005 /* JAsmH */
14006 4371,
14007 /* JAsmHE */
14008 4372,
14009 /* JAsmL */
14010 4373,
14011 /* JAsmLE */
14012 4374,
14013 /* JAsmLH */
14014 4375,
14015 /* JAsmM */
14016 4376,
14017 /* JAsmNE */
14018 4377,
14019 /* JAsmNH */
14020 4378,
14021 /* JAsmNHE */
14022 4379,
14023 /* JAsmNL */
14024 4380,
14025 /* JAsmNLE */
14026 4381,
14027 /* JAsmNLH */
14028 4382,
14029 /* JAsmNM */
14030 4383,
14031 /* JAsmNO */
14032 4384,
14033 /* JAsmNP */
14034 4385,
14035 /* JAsmNZ */
14036 4386,
14037 /* JAsmO */
14038 4387,
14039 /* JAsmP */
14040 4388,
14041 /* JAsmZ */
14042 4389,
14043 /* JG */
14044 4390,
14045 /* JGAsmE */
14046 4391,
14047 /* JGAsmH */
14048 4392,
14049 /* JGAsmHE */
14050 4393,
14051 /* JGAsmL */
14052 4394,
14053 /* JGAsmLE */
14054 4395,
14055 /* JGAsmLH */
14056 4396,
14057 /* JGAsmM */
14058 4397,
14059 /* JGAsmNE */
14060 4398,
14061 /* JGAsmNH */
14062 4399,
14063 /* JGAsmNHE */
14064 4400,
14065 /* JGAsmNL */
14066 4401,
14067 /* JGAsmNLE */
14068 4402,
14069 /* JGAsmNLH */
14070 4403,
14071 /* JGAsmNM */
14072 4404,
14073 /* JGAsmNO */
14074 4405,
14075 /* JGAsmNP */
14076 4406,
14077 /* JGAsmNZ */
14078 4407,
14079 /* JGAsmO */
14080 4408,
14081 /* JGAsmP */
14082 4409,
14083 /* JGAsmZ */
14084 4410,
14085 /* KDB */
14086 4411,
14087 /* KDBR */
14088 4415,
14089 /* KDSA */
14090 4417,
14091 /* KDTR */
14092 4420,
14093 /* KEB */
14094 4422,
14095 /* KEBR */
14096 4426,
14097 /* KIMD */
14098 4428,
14099 /* KLMD */
14100 4431,
14101 /* KM */
14102 4434,
14103 /* KMA */
14104 4438,
14105 /* KMAC */
14106 4444,
14107 /* KMC */
14108 4447,
14109 /* KMCTR */
14110 4451,
14111 /* KMF */
14112 4457,
14113 /* KMO */
14114 4461,
14115 /* KXBR */
14116 4465,
14117 /* KXTR */
14118 4467,
14119 /* L */
14120 4469,
14121 /* LA */
14122 4473,
14123 /* LAA */
14124 4477,
14125 /* LAAG */
14126 4481,
14127 /* LAAL */
14128 4485,
14129 /* LAALG */
14130 4489,
14131 /* LAE */
14132 4493,
14133 /* LAEY */
14134 4497,
14135 /* LAM */
14136 4501,
14137 /* LAMY */
14138 4505,
14139 /* LAN */
14140 4509,
14141 /* LANG */
14142 4513,
14143 /* LAO */
14144 4517,
14145 /* LAOG */
14146 4521,
14147 /* LARL */
14148 4525,
14149 /* LASP */
14150 4527,
14151 /* LAT */
14152 4531,
14153 /* LAX */
14154 4535,
14155 /* LAXG */
14156 4539,
14157 /* LAY */
14158 4543,
14159 /* LB */
14160 4547,
14161 /* LBEAR */
14162 4551,
14163 /* LBH */
14164 4553,
14165 /* LBR */
14166 4557,
14167 /* LCBB */
14168 4559,
14169 /* LCCTL */
14170 4564,
14171 /* LCDBR */
14172 4566,
14173 /* LCDFR */
14174 4568,
14175 /* LCDFR_32 */
14176 4570,
14177 /* LCDR */
14178 4572,
14179 /* LCEBR */
14180 4574,
14181 /* LCER */
14182 4576,
14183 /* LCGFR */
14184 4578,
14185 /* LCGR */
14186 4580,
14187 /* LCR */
14188 4582,
14189 /* LCTL */
14190 4584,
14191 /* LCTLG */
14192 4588,
14193 /* LCXBR */
14194 4592,
14195 /* LCXR */
14196 4594,
14197 /* LD */
14198 4596,
14199 /* LDE */
14200 4600,
14201 /* LDE32 */
14202 4604,
14203 /* LDEB */
14204 4608,
14205 /* LDEBR */
14206 4612,
14207 /* LDER */
14208 4614,
14209 /* LDETR */
14210 4616,
14211 /* LDGR */
14212 4619,
14213 /* LDR */
14214 4621,
14215 /* LDR32 */
14216 4623,
14217 /* LDXBR */
14218 4625,
14219 /* LDXBRA */
14220 4627,
14221 /* LDXR */
14222 4631,
14223 /* LDXTR */
14224 4633,
14225 /* LDY */
14226 4637,
14227 /* LE */
14228 4641,
14229 /* LEDBR */
14230 4645,
14231 /* LEDBRA */
14232 4647,
14233 /* LEDR */
14234 4651,
14235 /* LEDTR */
14236 4653,
14237 /* LER */
14238 4657,
14239 /* LEXBR */
14240 4659,
14241 /* LEXBRA */
14242 4661,
14243 /* LEXR */
14244 4665,
14245 /* LEY */
14246 4667,
14247 /* LFAS */
14248 4671,
14249 /* LFH */
14250 4673,
14251 /* LFHAT */
14252 4677,
14253 /* LFPC */
14254 4681,
14255 /* LG */
14256 4683,
14257 /* LGAT */
14258 4687,
14259 /* LGB */
14260 4691,
14261 /* LGBR */
14262 4695,
14263 /* LGDR */
14264 4697,
14265 /* LGF */
14266 4699,
14267 /* LGFI */
14268 4703,
14269 /* LGFR */
14270 4705,
14271 /* LGFRL */
14272 4707,
14273 /* LGG */
14274 4709,
14275 /* LGH */
14276 4713,
14277 /* LGHI */
14278 4717,
14279 /* LGHR */
14280 4719,
14281 /* LGHRL */
14282 4721,
14283 /* LGR */
14284 4723,
14285 /* LGRL */
14286 4725,
14287 /* LGSC */
14288 4727,
14289 /* LH */
14290 4731,
14291 /* LHH */
14292 4735,
14293 /* LHI */
14294 4739,
14295 /* LHR */
14296 4741,
14297 /* LHRL */
14298 4743,
14299 /* LHY */
14300 4745,
14301 /* LLC */
14302 4749,
14303 /* LLCH */
14304 4753,
14305 /* LLCR */
14306 4757,
14307 /* LLGC */
14308 4759,
14309 /* LLGCR */
14310 4763,
14311 /* LLGF */
14312 4765,
14313 /* LLGFAT */
14314 4769,
14315 /* LLGFR */
14316 4773,
14317 /* LLGFRL */
14318 4775,
14319 /* LLGFSG */
14320 4777,
14321 /* LLGH */
14322 4781,
14323 /* LLGHR */
14324 4785,
14325 /* LLGHRL */
14326 4787,
14327 /* LLGT */
14328 4789,
14329 /* LLGTAT */
14330 4793,
14331 /* LLGTR */
14332 4797,
14333 /* LLH */
14334 4799,
14335 /* LLHH */
14336 4803,
14337 /* LLHR */
14338 4807,
14339 /* LLHRL */
14340 4809,
14341 /* LLIHF */
14342 4811,
14343 /* LLIHH */
14344 4813,
14345 /* LLIHL */
14346 4815,
14347 /* LLILF */
14348 4817,
14349 /* LLILH */
14350 4819,
14351 /* LLILL */
14352 4821,
14353 /* LLZRGF */
14354 4823,
14355 /* LM */
14356 4827,
14357 /* LMD */
14358 4831,
14359 /* LMG */
14360 4837,
14361 /* LMH */
14362 4841,
14363 /* LMY */
14364 4845,
14365 /* LNDBR */
14366 4849,
14367 /* LNDFR */
14368 4851,
14369 /* LNDFR_32 */
14370 4853,
14371 /* LNDR */
14372 4855,
14373 /* LNEBR */
14374 4857,
14375 /* LNER */
14376 4859,
14377 /* LNGFR */
14378 4861,
14379 /* LNGR */
14380 4863,
14381 /* LNR */
14382 4865,
14383 /* LNXBR */
14384 4867,
14385 /* LNXR */
14386 4869,
14387 /* LOC */
14388 4871,
14389 /* LOCAsm */
14390 4877,
14391 /* LOCAsmE */
14392 4882,
14393 /* LOCAsmH */
14394 4886,
14395 /* LOCAsmHE */
14396 4890,
14397 /* LOCAsmL */
14398 4894,
14399 /* LOCAsmLE */
14400 4898,
14401 /* LOCAsmLH */
14402 4902,
14403 /* LOCAsmM */
14404 4906,
14405 /* LOCAsmNE */
14406 4910,
14407 /* LOCAsmNH */
14408 4914,
14409 /* LOCAsmNHE */
14410 4918,
14411 /* LOCAsmNL */
14412 4922,
14413 /* LOCAsmNLE */
14414 4926,
14415 /* LOCAsmNLH */
14416 4930,
14417 /* LOCAsmNM */
14418 4934,
14419 /* LOCAsmNO */
14420 4938,
14421 /* LOCAsmNP */
14422 4942,
14423 /* LOCAsmNZ */
14424 4946,
14425 /* LOCAsmO */
14426 4950,
14427 /* LOCAsmP */
14428 4954,
14429 /* LOCAsmZ */
14430 4958,
14431 /* LOCFH */
14432 4962,
14433 /* LOCFHAsm */
14434 4968,
14435 /* LOCFHAsmE */
14436 4973,
14437 /* LOCFHAsmH */
14438 4977,
14439 /* LOCFHAsmHE */
14440 4981,
14441 /* LOCFHAsmL */
14442 4985,
14443 /* LOCFHAsmLE */
14444 4989,
14445 /* LOCFHAsmLH */
14446 4993,
14447 /* LOCFHAsmM */
14448 4997,
14449 /* LOCFHAsmNE */
14450 5001,
14451 /* LOCFHAsmNH */
14452 5005,
14453 /* LOCFHAsmNHE */
14454 5009,
14455 /* LOCFHAsmNL */
14456 5013,
14457 /* LOCFHAsmNLE */
14458 5017,
14459 /* LOCFHAsmNLH */
14460 5021,
14461 /* LOCFHAsmNM */
14462 5025,
14463 /* LOCFHAsmNO */
14464 5029,
14465 /* LOCFHAsmNP */
14466 5033,
14467 /* LOCFHAsmNZ */
14468 5037,
14469 /* LOCFHAsmO */
14470 5041,
14471 /* LOCFHAsmP */
14472 5045,
14473 /* LOCFHAsmZ */
14474 5049,
14475 /* LOCFHR */
14476 5053,
14477 /* LOCFHRAsm */
14478 5058,
14479 /* LOCFHRAsmE */
14480 5062,
14481 /* LOCFHRAsmH */
14482 5065,
14483 /* LOCFHRAsmHE */
14484 5068,
14485 /* LOCFHRAsmL */
14486 5071,
14487 /* LOCFHRAsmLE */
14488 5074,
14489 /* LOCFHRAsmLH */
14490 5077,
14491 /* LOCFHRAsmM */
14492 5080,
14493 /* LOCFHRAsmNE */
14494 5083,
14495 /* LOCFHRAsmNH */
14496 5086,
14497 /* LOCFHRAsmNHE */
14498 5089,
14499 /* LOCFHRAsmNL */
14500 5092,
14501 /* LOCFHRAsmNLE */
14502 5095,
14503 /* LOCFHRAsmNLH */
14504 5098,
14505 /* LOCFHRAsmNM */
14506 5101,
14507 /* LOCFHRAsmNO */
14508 5104,
14509 /* LOCFHRAsmNP */
14510 5107,
14511 /* LOCFHRAsmNZ */
14512 5110,
14513 /* LOCFHRAsmO */
14514 5113,
14515 /* LOCFHRAsmP */
14516 5116,
14517 /* LOCFHRAsmZ */
14518 5119,
14519 /* LOCG */
14520 5122,
14521 /* LOCGAsm */
14522 5128,
14523 /* LOCGAsmE */
14524 5133,
14525 /* LOCGAsmH */
14526 5137,
14527 /* LOCGAsmHE */
14528 5141,
14529 /* LOCGAsmL */
14530 5145,
14531 /* LOCGAsmLE */
14532 5149,
14533 /* LOCGAsmLH */
14534 5153,
14535 /* LOCGAsmM */
14536 5157,
14537 /* LOCGAsmNE */
14538 5161,
14539 /* LOCGAsmNH */
14540 5165,
14541 /* LOCGAsmNHE */
14542 5169,
14543 /* LOCGAsmNL */
14544 5173,
14545 /* LOCGAsmNLE */
14546 5177,
14547 /* LOCGAsmNLH */
14548 5181,
14549 /* LOCGAsmNM */
14550 5185,
14551 /* LOCGAsmNO */
14552 5189,
14553 /* LOCGAsmNP */
14554 5193,
14555 /* LOCGAsmNZ */
14556 5197,
14557 /* LOCGAsmO */
14558 5201,
14559 /* LOCGAsmP */
14560 5205,
14561 /* LOCGAsmZ */
14562 5209,
14563 /* LOCGHI */
14564 5213,
14565 /* LOCGHIAsm */
14566 5218,
14567 /* LOCGHIAsmE */
14568 5222,
14569 /* LOCGHIAsmH */
14570 5225,
14571 /* LOCGHIAsmHE */
14572 5228,
14573 /* LOCGHIAsmL */
14574 5231,
14575 /* LOCGHIAsmLE */
14576 5234,
14577 /* LOCGHIAsmLH */
14578 5237,
14579 /* LOCGHIAsmM */
14580 5240,
14581 /* LOCGHIAsmNE */
14582 5243,
14583 /* LOCGHIAsmNH */
14584 5246,
14585 /* LOCGHIAsmNHE */
14586 5249,
14587 /* LOCGHIAsmNL */
14588 5252,
14589 /* LOCGHIAsmNLE */
14590 5255,
14591 /* LOCGHIAsmNLH */
14592 5258,
14593 /* LOCGHIAsmNM */
14594 5261,
14595 /* LOCGHIAsmNO */
14596 5264,
14597 /* LOCGHIAsmNP */
14598 5267,
14599 /* LOCGHIAsmNZ */
14600 5270,
14601 /* LOCGHIAsmO */
14602 5273,
14603 /* LOCGHIAsmP */
14604 5276,
14605 /* LOCGHIAsmZ */
14606 5279,
14607 /* LOCGR */
14608 5282,
14609 /* LOCGRAsm */
14610 5287,
14611 /* LOCGRAsmE */
14612 5291,
14613 /* LOCGRAsmH */
14614 5294,
14615 /* LOCGRAsmHE */
14616 5297,
14617 /* LOCGRAsmL */
14618 5300,
14619 /* LOCGRAsmLE */
14620 5303,
14621 /* LOCGRAsmLH */
14622 5306,
14623 /* LOCGRAsmM */
14624 5309,
14625 /* LOCGRAsmNE */
14626 5312,
14627 /* LOCGRAsmNH */
14628 5315,
14629 /* LOCGRAsmNHE */
14630 5318,
14631 /* LOCGRAsmNL */
14632 5321,
14633 /* LOCGRAsmNLE */
14634 5324,
14635 /* LOCGRAsmNLH */
14636 5327,
14637 /* LOCGRAsmNM */
14638 5330,
14639 /* LOCGRAsmNO */
14640 5333,
14641 /* LOCGRAsmNP */
14642 5336,
14643 /* LOCGRAsmNZ */
14644 5339,
14645 /* LOCGRAsmO */
14646 5342,
14647 /* LOCGRAsmP */
14648 5345,
14649 /* LOCGRAsmZ */
14650 5348,
14651 /* LOCHHI */
14652 5351,
14653 /* LOCHHIAsm */
14654 5356,
14655 /* LOCHHIAsmE */
14656 5360,
14657 /* LOCHHIAsmH */
14658 5363,
14659 /* LOCHHIAsmHE */
14660 5366,
14661 /* LOCHHIAsmL */
14662 5369,
14663 /* LOCHHIAsmLE */
14664 5372,
14665 /* LOCHHIAsmLH */
14666 5375,
14667 /* LOCHHIAsmM */
14668 5378,
14669 /* LOCHHIAsmNE */
14670 5381,
14671 /* LOCHHIAsmNH */
14672 5384,
14673 /* LOCHHIAsmNHE */
14674 5387,
14675 /* LOCHHIAsmNL */
14676 5390,
14677 /* LOCHHIAsmNLE */
14678 5393,
14679 /* LOCHHIAsmNLH */
14680 5396,
14681 /* LOCHHIAsmNM */
14682 5399,
14683 /* LOCHHIAsmNO */
14684 5402,
14685 /* LOCHHIAsmNP */
14686 5405,
14687 /* LOCHHIAsmNZ */
14688 5408,
14689 /* LOCHHIAsmO */
14690 5411,
14691 /* LOCHHIAsmP */
14692 5414,
14693 /* LOCHHIAsmZ */
14694 5417,
14695 /* LOCHI */
14696 5420,
14697 /* LOCHIAsm */
14698 5425,
14699 /* LOCHIAsmE */
14700 5429,
14701 /* LOCHIAsmH */
14702 5432,
14703 /* LOCHIAsmHE */
14704 5435,
14705 /* LOCHIAsmL */
14706 5438,
14707 /* LOCHIAsmLE */
14708 5441,
14709 /* LOCHIAsmLH */
14710 5444,
14711 /* LOCHIAsmM */
14712 5447,
14713 /* LOCHIAsmNE */
14714 5450,
14715 /* LOCHIAsmNH */
14716 5453,
14717 /* LOCHIAsmNHE */
14718 5456,
14719 /* LOCHIAsmNL */
14720 5459,
14721 /* LOCHIAsmNLE */
14722 5462,
14723 /* LOCHIAsmNLH */
14724 5465,
14725 /* LOCHIAsmNM */
14726 5468,
14727 /* LOCHIAsmNO */
14728 5471,
14729 /* LOCHIAsmNP */
14730 5474,
14731 /* LOCHIAsmNZ */
14732 5477,
14733 /* LOCHIAsmO */
14734 5480,
14735 /* LOCHIAsmP */
14736 5483,
14737 /* LOCHIAsmZ */
14738 5486,
14739 /* LOCR */
14740 5489,
14741 /* LOCRAsm */
14742 5494,
14743 /* LOCRAsmE */
14744 5498,
14745 /* LOCRAsmH */
14746 5501,
14747 /* LOCRAsmHE */
14748 5504,
14749 /* LOCRAsmL */
14750 5507,
14751 /* LOCRAsmLE */
14752 5510,
14753 /* LOCRAsmLH */
14754 5513,
14755 /* LOCRAsmM */
14756 5516,
14757 /* LOCRAsmNE */
14758 5519,
14759 /* LOCRAsmNH */
14760 5522,
14761 /* LOCRAsmNHE */
14762 5525,
14763 /* LOCRAsmNL */
14764 5528,
14765 /* LOCRAsmNLE */
14766 5531,
14767 /* LOCRAsmNLH */
14768 5534,
14769 /* LOCRAsmNM */
14770 5537,
14771 /* LOCRAsmNO */
14772 5540,
14773 /* LOCRAsmNP */
14774 5543,
14775 /* LOCRAsmNZ */
14776 5546,
14777 /* LOCRAsmO */
14778 5549,
14779 /* LOCRAsmP */
14780 5552,
14781 /* LOCRAsmZ */
14782 5555,
14783 /* LPCTL */
14784 5558,
14785 /* LPD */
14786 5560,
14787 /* LPDBR */
14788 5565,
14789 /* LPDFR */
14790 5567,
14791 /* LPDFR_32 */
14792 5569,
14793 /* LPDG */
14794 5571,
14795 /* LPDR */
14796 5576,
14797 /* LPEBR */
14798 5578,
14799 /* LPER */
14800 5580,
14801 /* LPGFR */
14802 5582,
14803 /* LPGR */
14804 5584,
14805 /* LPP */
14806 5586,
14807 /* LPQ */
14808 5588,
14809 /* LPR */
14810 5592,
14811 /* LPSW */
14812 5594,
14813 /* LPSWE */
14814 5596,
14815 /* LPSWEY */
14816 5598,
14817 /* LPTEA */
14818 5600,
14819 /* LPXBR */
14820 5605,
14821 /* LPXR */
14822 5607,
14823 /* LR */
14824 5609,
14825 /* LRA */
14826 5611,
14827 /* LRAG */
14828 5615,
14829 /* LRAY */
14830 5619,
14831 /* LRDR */
14832 5623,
14833 /* LRER */
14834 5625,
14835 /* LRL */
14836 5627,
14837 /* LRV */
14838 5629,
14839 /* LRVG */
14840 5633,
14841 /* LRVGR */
14842 5637,
14843 /* LRVH */
14844 5639,
14845 /* LRVR */
14846 5643,
14847 /* LSCTL */
14848 5645,
14849 /* LT */
14850 5647,
14851 /* LTDBR */
14852 5651,
14853 /* LTDR */
14854 5653,
14855 /* LTDTR */
14856 5655,
14857 /* LTEBR */
14858 5657,
14859 /* LTER */
14860 5659,
14861 /* LTG */
14862 5661,
14863 /* LTGF */
14864 5665,
14865 /* LTGFR */
14866 5669,
14867 /* LTGR */
14868 5671,
14869 /* LTR */
14870 5673,
14871 /* LTXBR */
14872 5675,
14873 /* LTXR */
14874 5677,
14875 /* LTXTR */
14876 5679,
14877 /* LURA */
14878 5681,
14879 /* LURAG */
14880 5683,
14881 /* LXD */
14882 5685,
14883 /* LXDB */
14884 5689,
14885 /* LXDBR */
14886 5693,
14887 /* LXDR */
14888 5695,
14889 /* LXDTR */
14890 5697,
14891 /* LXE */
14892 5700,
14893 /* LXEB */
14894 5704,
14895 /* LXEBR */
14896 5708,
14897 /* LXER */
14898 5710,
14899 /* LXR */
14900 5712,
14901 /* LY */
14902 5714,
14903 /* LZDR */
14904 5718,
14905 /* LZER */
14906 5719,
14907 /* LZRF */
14908 5720,
14909 /* LZRG */
14910 5724,
14911 /* LZXR */
14912 5728,
14913 /* M */
14914 5729,
14915 /* MAD */
14916 5734,
14917 /* MADB */
14918 5740,
14919 /* MADBR */
14920 5746,
14921 /* MADR */
14922 5750,
14923 /* MAE */
14924 5754,
14925 /* MAEB */
14926 5760,
14927 /* MAEBR */
14928 5766,
14929 /* MAER */
14930 5770,
14931 /* MAY */
14932 5774,
14933 /* MAYH */
14934 5780,
14935 /* MAYHR */
14936 5786,
14937 /* MAYL */
14938 5790,
14939 /* MAYLR */
14940 5796,
14941 /* MAYR */
14942 5800,
14943 /* MC */
14944 5804,
14945 /* MD */
14946 5807,
14947 /* MDB */
14948 5812,
14949 /* MDBR */
14950 5817,
14951 /* MDE */
14952 5820,
14953 /* MDEB */
14954 5825,
14955 /* MDEBR */
14956 5830,
14957 /* MDER */
14958 5833,
14959 /* MDR */
14960 5836,
14961 /* MDTR */
14962 5839,
14963 /* MDTRA */
14964 5842,
14965 /* ME */
14966 5846,
14967 /* MEE */
14968 5851,
14969 /* MEEB */
14970 5856,
14971 /* MEEBR */
14972 5861,
14973 /* MEER */
14974 5864,
14975 /* MER */
14976 5867,
14977 /* MFY */
14978 5870,
14979 /* MG */
14980 5875,
14981 /* MGH */
14982 5880,
14983 /* MGHI */
14984 5885,
14985 /* MGRK */
14986 5888,
14987 /* MH */
14988 5891,
14989 /* MHI */
14990 5896,
14991 /* MHY */
14992 5899,
14993 /* ML */
14994 5904,
14995 /* MLG */
14996 5909,
14997 /* MLGR */
14998 5914,
14999 /* MLR */
15000 5917,
15001 /* MP */
15002 5920,
15003 /* MR */
15004 5926,
15005 /* MS */
15006 5929,
15007 /* MSC */
15008 5934,
15009 /* MSCH */
15010 5939,
15011 /* MSD */
15012 5941,
15013 /* MSDB */
15014 5947,
15015 /* MSDBR */
15016 5953,
15017 /* MSDR */
15018 5957,
15019 /* MSE */
15020 5961,
15021 /* MSEB */
15022 5967,
15023 /* MSEBR */
15024 5973,
15025 /* MSER */
15026 5977,
15027 /* MSFI */
15028 5981,
15029 /* MSG */
15030 5984,
15031 /* MSGC */
15032 5989,
15033 /* MSGF */
15034 5994,
15035 /* MSGFI */
15036 5999,
15037 /* MSGFR */
15038 6002,
15039 /* MSGR */
15040 6005,
15041 /* MSGRKC */
15042 6008,
15043 /* MSR */
15044 6011,
15045 /* MSRKC */
15046 6014,
15047 /* MSTA */
15048 6017,
15049 /* MSY */
15050 6018,
15051 /* MVC */
15052 6023,
15053 /* MVCDK */
15054 6028,
15055 /* MVCIN */
15056 6032,
15057 /* MVCK */
15058 6037,
15059 /* MVCL */
15060 6043,
15061 /* MVCLE */
15062 6047,
15063 /* MVCLU */
15064 6053,
15065 /* MVCOS */
15066 6059,
15067 /* MVCP */
15068 6064,
15069 /* MVCRL */
15070 6070,
15071 /* MVCS */
15072 6074,
15073 /* MVCSK */
15074 6080,
15075 /* MVGHI */
15076 6084,
15077 /* MVHHI */
15078 6087,
15079 /* MVHI */
15080 6090,
15081 /* MVI */
15082 6093,
15083 /* MVIY */
15084 6096,
15085 /* MVN */
15086 6099,
15087 /* MVO */
15088 6104,
15089 /* MVPG */
15090 6110,
15091 /* MVST */
15092 6112,
15093 /* MVZ */
15094 6116,
15095 /* MXBR */
15096 6121,
15097 /* MXD */
15098 6124,
15099 /* MXDB */
15100 6129,
15101 /* MXDBR */
15102 6134,
15103 /* MXDR */
15104 6137,
15105 /* MXR */
15106 6140,
15107 /* MXTR */
15108 6143,
15109 /* MXTRA */
15110 6146,
15111 /* MY */
15112 6150,
15113 /* MYH */
15114 6155,
15115 /* MYHR */
15116 6160,
15117 /* MYL */
15118 6163,
15119 /* MYLR */
15120 6168,
15121 /* MYR */
15122 6171,
15123 /* N */
15124 6174,
15125 /* NC */
15126 6179,
15127 /* NCGRK */
15128 6184,
15129 /* NCRK */
15130 6187,
15131 /* NG */
15132 6190,
15133 /* NGR */
15134 6195,
15135 /* NGRK */
15136 6198,
15137 /* NI */
15138 6201,
15139 /* NIAI */
15140 6204,
15141 /* NIHF */
15142 6206,
15143 /* NIHH */
15144 6209,
15145 /* NIHL */
15146 6212,
15147 /* NILF */
15148 6215,
15149 /* NILH */
15150 6218,
15151 /* NILL */
15152 6221,
15153 /* NIY */
15154 6224,
15155 /* NNGRK */
15156 6227,
15157 /* NNPA */
15158 6230,
15159 /* NNRK */
15160 6230,
15161 /* NOGRK */
15162 6233,
15163 /* NOP */
15164 6236,
15165 /* NOPR */
15166 6239,
15167 /* NOP_bare */
15168 6240,
15169 /* NORK */
15170 6240,
15171 /* NOTGR */
15172 6243,
15173 /* NOTR */
15174 6246,
15175 /* NR */
15176 6249,
15177 /* NRK */
15178 6252,
15179 /* NTSTG */
15180 6255,
15181 /* NXGRK */
15182 6259,
15183 /* NXRK */
15184 6262,
15185 /* NY */
15186 6265,
15187 /* O */
15188 6270,
15189 /* OC */
15190 6275,
15191 /* OCGRK */
15192 6280,
15193 /* OCRK */
15194 6283,
15195 /* OG */
15196 6286,
15197 /* OGR */
15198 6291,
15199 /* OGRK */
15200 6294,
15201 /* OI */
15202 6297,
15203 /* OIHF */
15204 6300,
15205 /* OIHH */
15206 6303,
15207 /* OIHL */
15208 6306,
15209 /* OILF */
15210 6309,
15211 /* OILH */
15212 6312,
15213 /* OILL */
15214 6315,
15215 /* OIY */
15216 6318,
15217 /* OR */
15218 6321,
15219 /* ORK */
15220 6324,
15221 /* OY */
15222 6327,
15223 /* PACK */
15224 6332,
15225 /* PALB */
15226 6338,
15227 /* PC */
15228 6338,
15229 /* PCC */
15230 6340,
15231 /* PCKMO */
15232 6340,
15233 /* PFD */
15234 6340,
15235 /* PFDRL */
15236 6344,
15237 /* PFMF */
15238 6346,
15239 /* PFPO */
15240 6349,
15241 /* PGIN */
15242 6349,
15243 /* PGOUT */
15244 6351,
15245 /* PKA */
15246 6353,
15247 /* PKU */
15248 6358,
15249 /* PLO */
15250 6363,
15251 /* POPCNT */
15252 6369,
15253 /* POPCNTOpt */
15254 6371,
15255 /* PPA */
15256 6374,
15257 /* PPNO */
15258 6377,
15259 /* PR */
15260 6381,
15261 /* PRNO */
15262 6381,
15263 /* PT */
15264 6385,
15265 /* PTF */
15266 6387,
15267 /* PTFF */
15268 6389,
15269 /* PTI */
15270 6389,
15271 /* PTLB */
15272 6391,
15273 /* QADTR */
15274 6391,
15275 /* QAXTR */
15276 6396,
15277 /* QCTRI */
15278 6401,
15279 /* QPACI */
15280 6403,
15281 /* QSI */
15282 6405,
15283 /* RCHP */
15284 6407,
15285 /* RDP */
15286 6407,
15287 /* RDPOpt */
15288 6411,
15289 /* RISBG */
15290 6414,
15291 /* RISBG32 */
15292 6420,
15293 /* RISBGN */
15294 6426,
15295 /* RISBGNZ */
15296 6432,
15297 /* RISBGZ */
15298 6438,
15299 /* RISBHG */
15300 6444,
15301 /* RISBLG */
15302 6450,
15303 /* RLL */
15304 6456,
15305 /* RLLG */
15306 6460,
15307 /* RNSBG */
15308 6464,
15309 /* ROSBG */
15310 6470,
15311 /* RP */
15312 6476,
15313 /* RRBE */
15314 6478,
15315 /* RRBM */
15316 6480,
15317 /* RRDTR */
15318 6482,
15319 /* RRXTR */
15320 6487,
15321 /* RSCH */
15322 6492,
15323 /* RXSBG */
15324 6492,
15325 /* S */
15326 6498,
15327 /* SAC */
15328 6503,
15329 /* SACF */
15330 6505,
15331 /* SAL */
15332 6507,
15333 /* SAM24 */
15334 6507,
15335 /* SAM31 */
15336 6507,
15337 /* SAM64 */
15338 6507,
15339 /* SAR */
15340 6507,
15341 /* SCCTR */
15342 6509,
15343 /* SCHM */
15344 6511,
15345 /* SCK */
15346 6511,
15347 /* SCKC */
15348 6513,
15349 /* SCKPF */
15350 6515,
15351 /* SD */
15352 6515,
15353 /* SDB */
15354 6520,
15355 /* SDBR */
15356 6525,
15357 /* SDR */
15358 6528,
15359 /* SDTR */
15360 6531,
15361 /* SDTRA */
15362 6534,
15363 /* SE */
15364 6538,
15365 /* SEB */
15366 6543,
15367 /* SEBR */
15368 6548,
15369 /* SELFHR */
15370 6551,
15371 /* SELFHRAsm */
15372 6556,
15373 /* SELFHRAsmE */
15374 6560,
15375 /* SELFHRAsmH */
15376 6563,
15377 /* SELFHRAsmHE */
15378 6566,
15379 /* SELFHRAsmL */
15380 6569,
15381 /* SELFHRAsmLE */
15382 6572,
15383 /* SELFHRAsmLH */
15384 6575,
15385 /* SELFHRAsmM */
15386 6578,
15387 /* SELFHRAsmNE */
15388 6581,
15389 /* SELFHRAsmNH */
15390 6584,
15391 /* SELFHRAsmNHE */
15392 6587,
15393 /* SELFHRAsmNL */
15394 6590,
15395 /* SELFHRAsmNLE */
15396 6593,
15397 /* SELFHRAsmNLH */
15398 6596,
15399 /* SELFHRAsmNM */
15400 6599,
15401 /* SELFHRAsmNO */
15402 6602,
15403 /* SELFHRAsmNP */
15404 6605,
15405 /* SELFHRAsmNZ */
15406 6608,
15407 /* SELFHRAsmO */
15408 6611,
15409 /* SELFHRAsmP */
15410 6614,
15411 /* SELFHRAsmZ */
15412 6617,
15413 /* SELGR */
15414 6620,
15415 /* SELGRAsm */
15416 6625,
15417 /* SELGRAsmE */
15418 6629,
15419 /* SELGRAsmH */
15420 6632,
15421 /* SELGRAsmHE */
15422 6635,
15423 /* SELGRAsmL */
15424 6638,
15425 /* SELGRAsmLE */
15426 6641,
15427 /* SELGRAsmLH */
15428 6644,
15429 /* SELGRAsmM */
15430 6647,
15431 /* SELGRAsmNE */
15432 6650,
15433 /* SELGRAsmNH */
15434 6653,
15435 /* SELGRAsmNHE */
15436 6656,
15437 /* SELGRAsmNL */
15438 6659,
15439 /* SELGRAsmNLE */
15440 6662,
15441 /* SELGRAsmNLH */
15442 6665,
15443 /* SELGRAsmNM */
15444 6668,
15445 /* SELGRAsmNO */
15446 6671,
15447 /* SELGRAsmNP */
15448 6674,
15449 /* SELGRAsmNZ */
15450 6677,
15451 /* SELGRAsmO */
15452 6680,
15453 /* SELGRAsmP */
15454 6683,
15455 /* SELGRAsmZ */
15456 6686,
15457 /* SELR */
15458 6689,
15459 /* SELRAsm */
15460 6694,
15461 /* SELRAsmE */
15462 6698,
15463 /* SELRAsmH */
15464 6701,
15465 /* SELRAsmHE */
15466 6704,
15467 /* SELRAsmL */
15468 6707,
15469 /* SELRAsmLE */
15470 6710,
15471 /* SELRAsmLH */
15472 6713,
15473 /* SELRAsmM */
15474 6716,
15475 /* SELRAsmNE */
15476 6719,
15477 /* SELRAsmNH */
15478 6722,
15479 /* SELRAsmNHE */
15480 6725,
15481 /* SELRAsmNL */
15482 6728,
15483 /* SELRAsmNLE */
15484 6731,
15485 /* SELRAsmNLH */
15486 6734,
15487 /* SELRAsmNM */
15488 6737,
15489 /* SELRAsmNO */
15490 6740,
15491 /* SELRAsmNP */
15492 6743,
15493 /* SELRAsmNZ */
15494 6746,
15495 /* SELRAsmO */
15496 6749,
15497 /* SELRAsmP */
15498 6752,
15499 /* SELRAsmZ */
15500 6755,
15501 /* SER */
15502 6758,
15503 /* SFASR */
15504 6761,
15505 /* SFPC */
15506 6762,
15507 /* SG */
15508 6763,
15509 /* SGF */
15510 6768,
15511 /* SGFR */
15512 6773,
15513 /* SGH */
15514 6776,
15515 /* SGR */
15516 6781,
15517 /* SGRK */
15518 6784,
15519 /* SH */
15520 6787,
15521 /* SHHHR */
15522 6792,
15523 /* SHHLR */
15524 6795,
15525 /* SHY */
15526 6798,
15527 /* SIE */
15528 6803,
15529 /* SIGA */
15530 6805,
15531 /* SIGP */
15532 6807,
15533 /* SL */
15534 6811,
15535 /* SLA */
15536 6816,
15537 /* SLAG */
15538 6820,
15539 /* SLAK */
15540 6824,
15541 /* SLB */
15542 6828,
15543 /* SLBG */
15544 6833,
15545 /* SLBGR */
15546 6838,
15547 /* SLBR */
15548 6841,
15549 /* SLDA */
15550 6844,
15551 /* SLDL */
15552 6848,
15553 /* SLDT */
15554 6852,
15555 /* SLFI */
15556 6857,
15557 /* SLG */
15558 6860,
15559 /* SLGF */
15560 6865,
15561 /* SLGFI */
15562 6870,
15563 /* SLGFR */
15564 6873,
15565 /* SLGR */
15566 6876,
15567 /* SLGRK */
15568 6879,
15569 /* SLHHHR */
15570 6882,
15571 /* SLHHLR */
15572 6885,
15573 /* SLL */
15574 6888,
15575 /* SLLG */
15576 6892,
15577 /* SLLK */
15578 6896,
15579 /* SLR */
15580 6900,
15581 /* SLRK */
15582 6903,
15583 /* SLXT */
15584 6906,
15585 /* SLY */
15586 6911,
15587 /* SORTL */
15588 6916,
15589 /* SP */
15590 6920,
15591 /* SPCTR */
15592 6926,
15593 /* SPKA */
15594 6928,
15595 /* SPM */
15596 6930,
15597 /* SPT */
15598 6931,
15599 /* SPX */
15600 6933,
15601 /* SQD */
15602 6935,
15603 /* SQDB */
15604 6939,
15605 /* SQDBR */
15606 6943,
15607 /* SQDR */
15608 6945,
15609 /* SQE */
15610 6947,
15611 /* SQEB */
15612 6951,
15613 /* SQEBR */
15614 6955,
15615 /* SQER */
15616 6957,
15617 /* SQXBR */
15618 6959,
15619 /* SQXR */
15620 6961,
15621 /* SR */
15622 6963,
15623 /* SRA */
15624 6966,
15625 /* SRAG */
15626 6970,
15627 /* SRAK */
15628 6974,
15629 /* SRDA */
15630 6978,
15631 /* SRDL */
15632 6982,
15633 /* SRDT */
15634 6986,
15635 /* SRK */
15636 6991,
15637 /* SRL */
15638 6994,
15639 /* SRLG */
15640 6998,
15641 /* SRLK */
15642 7002,
15643 /* SRNM */
15644 7006,
15645 /* SRNMB */
15646 7008,
15647 /* SRNMT */
15648 7010,
15649 /* SRP */
15650 7012,
15651 /* SRST */
15652 7018,
15653 /* SRSTU */
15654 7022,
15655 /* SRXT */
15656 7026,
15657 /* SSAIR */
15658 7031,
15659 /* SSAR */
15660 7032,
15661 /* SSCH */
15662 7033,
15663 /* SSKE */
15664 7035,
15665 /* SSKEOpt */
15666 7038,
15667 /* SSM */
15668 7040,
15669 /* ST */
15670 7042,
15671 /* STAM */
15672 7046,
15673 /* STAMY */
15674 7050,
15675 /* STAP */
15676 7054,
15677 /* STBEAR */
15678 7056,
15679 /* STC */
15680 7058,
15681 /* STCH */
15682 7062,
15683 /* STCK */
15684 7066,
15685 /* STCKC */
15686 7068,
15687 /* STCKE */
15688 7070,
15689 /* STCKF */
15690 7072,
15691 /* STCM */
15692 7074,
15693 /* STCMH */
15694 7078,
15695 /* STCMY */
15696 7082,
15697 /* STCPS */
15698 7086,
15699 /* STCRW */
15700 7088,
15701 /* STCTG */
15702 7090,
15703 /* STCTL */
15704 7094,
15705 /* STCY */
15706 7098,
15707 /* STD */
15708 7102,
15709 /* STDY */
15710 7106,
15711 /* STE */
15712 7110,
15713 /* STEY */
15714 7114,
15715 /* STFH */
15716 7118,
15717 /* STFL */
15718 7122,
15719 /* STFLE */
15720 7124,
15721 /* STFPC */
15722 7126,
15723 /* STG */
15724 7128,
15725 /* STGRL */
15726 7132,
15727 /* STGSC */
15728 7134,
15729 /* STH */
15730 7138,
15731 /* STHH */
15732 7142,
15733 /* STHRL */
15734 7146,
15735 /* STHY */
15736 7148,
15737 /* STIDP */
15738 7152,
15739 /* STM */
15740 7154,
15741 /* STMG */
15742 7158,
15743 /* STMH */
15744 7162,
15745 /* STMY */
15746 7166,
15747 /* STNSM */
15748 7170,
15749 /* STOC */
15750 7173,
15751 /* STOCAsm */
15752 7178,
15753 /* STOCAsmE */
15754 7182,
15755 /* STOCAsmH */
15756 7185,
15757 /* STOCAsmHE */
15758 7188,
15759 /* STOCAsmL */
15760 7191,
15761 /* STOCAsmLE */
15762 7194,
15763 /* STOCAsmLH */
15764 7197,
15765 /* STOCAsmM */
15766 7200,
15767 /* STOCAsmNE */
15768 7203,
15769 /* STOCAsmNH */
15770 7206,
15771 /* STOCAsmNHE */
15772 7209,
15773 /* STOCAsmNL */
15774 7212,
15775 /* STOCAsmNLE */
15776 7215,
15777 /* STOCAsmNLH */
15778 7218,
15779 /* STOCAsmNM */
15780 7221,
15781 /* STOCAsmNO */
15782 7224,
15783 /* STOCAsmNP */
15784 7227,
15785 /* STOCAsmNZ */
15786 7230,
15787 /* STOCAsmO */
15788 7233,
15789 /* STOCAsmP */
15790 7236,
15791 /* STOCAsmZ */
15792 7239,
15793 /* STOCFH */
15794 7242,
15795 /* STOCFHAsm */
15796 7247,
15797 /* STOCFHAsmE */
15798 7251,
15799 /* STOCFHAsmH */
15800 7254,
15801 /* STOCFHAsmHE */
15802 7257,
15803 /* STOCFHAsmL */
15804 7260,
15805 /* STOCFHAsmLE */
15806 7263,
15807 /* STOCFHAsmLH */
15808 7266,
15809 /* STOCFHAsmM */
15810 7269,
15811 /* STOCFHAsmNE */
15812 7272,
15813 /* STOCFHAsmNH */
15814 7275,
15815 /* STOCFHAsmNHE */
15816 7278,
15817 /* STOCFHAsmNL */
15818 7281,
15819 /* STOCFHAsmNLE */
15820 7284,
15821 /* STOCFHAsmNLH */
15822 7287,
15823 /* STOCFHAsmNM */
15824 7290,
15825 /* STOCFHAsmNO */
15826 7293,
15827 /* STOCFHAsmNP */
15828 7296,
15829 /* STOCFHAsmNZ */
15830 7299,
15831 /* STOCFHAsmO */
15832 7302,
15833 /* STOCFHAsmP */
15834 7305,
15835 /* STOCFHAsmZ */
15836 7308,
15837 /* STOCG */
15838 7311,
15839 /* STOCGAsm */
15840 7316,
15841 /* STOCGAsmE */
15842 7320,
15843 /* STOCGAsmH */
15844 7323,
15845 /* STOCGAsmHE */
15846 7326,
15847 /* STOCGAsmL */
15848 7329,
15849 /* STOCGAsmLE */
15850 7332,
15851 /* STOCGAsmLH */
15852 7335,
15853 /* STOCGAsmM */
15854 7338,
15855 /* STOCGAsmNE */
15856 7341,
15857 /* STOCGAsmNH */
15858 7344,
15859 /* STOCGAsmNHE */
15860 7347,
15861 /* STOCGAsmNL */
15862 7350,
15863 /* STOCGAsmNLE */
15864 7353,
15865 /* STOCGAsmNLH */
15866 7356,
15867 /* STOCGAsmNM */
15868 7359,
15869 /* STOCGAsmNO */
15870 7362,
15871 /* STOCGAsmNP */
15872 7365,
15873 /* STOCGAsmNZ */
15874 7368,
15875 /* STOCGAsmO */
15876 7371,
15877 /* STOCGAsmP */
15878 7374,
15879 /* STOCGAsmZ */
15880 7377,
15881 /* STOSM */
15882 7380,
15883 /* STPQ */
15884 7383,
15885 /* STPT */
15886 7387,
15887 /* STPX */
15888 7389,
15889 /* STRAG */
15890 7391,
15891 /* STRL */
15892 7395,
15893 /* STRV */
15894 7397,
15895 /* STRVG */
15896 7401,
15897 /* STRVH */
15898 7405,
15899 /* STSCH */
15900 7409,
15901 /* STSI */
15902 7411,
15903 /* STURA */
15904 7413,
15905 /* STURG */
15906 7415,
15907 /* STY */
15908 7417,
15909 /* SU */
15910 7421,
15911 /* SUR */
15912 7426,
15913 /* SVC */
15914 7429,
15915 /* SW */
15916 7430,
15917 /* SWR */
15918 7435,
15919 /* SXBR */
15920 7438,
15921 /* SXR */
15922 7441,
15923 /* SXTR */
15924 7444,
15925 /* SXTRA */
15926 7447,
15927 /* SY */
15928 7451,
15929 /* TABORT */
15930 7456,
15931 /* TAM */
15932 7458,
15933 /* TAR */
15934 7458,
15935 /* TB */
15936 7460,
15937 /* TBDR */
15938 7462,
15939 /* TBEDR */
15940 7465,
15941 /* TBEGIN */
15942 7468,
15943 /* TBEGINC */
15944 7471,
15945 /* TCDB */
15946 7474,
15947 /* TCEB */
15948 7478,
15949 /* TCXB */
15950 7482,
15951 /* TDCDT */
15952 7486,
15953 /* TDCET */
15954 7490,
15955 /* TDCXT */
15956 7494,
15957 /* TDGDT */
15958 7498,
15959 /* TDGET */
15960 7502,
15961 /* TDGXT */
15962 7506,
15963 /* TEND */
15964 7510,
15965 /* THDER */
15966 7510,
15967 /* THDR */
15968 7512,
15969 /* TM */
15970 7514,
15971 /* TMHH */
15972 7517,
15973 /* TMHL */
15974 7519,
15975 /* TMLH */
15976 7521,
15977 /* TMLL */
15978 7523,
15979 /* TMY */
15980 7525,
15981 /* TP */
15982 7528,
15983 /* TPEI */
15984 7531,
15985 /* TPI */
15986 7533,
15987 /* TPROT */
15988 7535,
15989 /* TR */
15990 7539,
15991 /* TRACE */
15992 7544,
15993 /* TRACG */
15994 7548,
15995 /* TRAP2 */
15996 7552,
15997 /* TRAP4 */
15998 7552,
15999 /* TRE */
16000 7554,
16001 /* TROO */
16002 7558,
16003 /* TROOOpt */
16004 7563,
16005 /* TROT */
16006 7567,
16007 /* TROTOpt */
16008 7572,
16009 /* TRT */
16010 7576,
16011 /* TRTE */
16012 7581,
16013 /* TRTEOpt */
16014 7585,
16015 /* TRTO */
16016 7588,
16017 /* TRTOOpt */
16018 7593,
16019 /* TRTR */
16020 7597,
16021 /* TRTRE */
16022 7602,
16023 /* TRTREOpt */
16024 7606,
16025 /* TRTT */
16026 7609,
16027 /* TRTTOpt */
16028 7614,
16029 /* TS */
16030 7618,
16031 /* TSCH */
16032 7620,
16033 /* UNPK */
16034 7622,
16035 /* UNPKA */
16036 7628,
16037 /* UNPKU */
16038 7633,
16039 /* UPT */
16040 7638,
16041 /* VA */
16042 7638,
16043 /* VAB */
16044 7642,
16045 /* VAC */
16046 7645,
16047 /* VACC */
16048 7650,
16049 /* VACCB */
16050 7654,
16051 /* VACCC */
16052 7657,
16053 /* VACCCQ */
16054 7662,
16055 /* VACCF */
16056 7666,
16057 /* VACCG */
16058 7669,
16059 /* VACCH */
16060 7672,
16061 /* VACCQ */
16062 7675,
16063 /* VACQ */
16064 7678,
16065 /* VAF */
16066 7682,
16067 /* VAG */
16068 7685,
16069 /* VAH */
16070 7688,
16071 /* VAP */
16072 7691,
16073 /* VAQ */
16074 7696,
16075 /* VAVG */
16076 7699,
16077 /* VAVGB */
16078 7703,
16079 /* VAVGF */
16080 7706,
16081 /* VAVGG */
16082 7709,
16083 /* VAVGH */
16084 7712,
16085 /* VAVGL */
16086 7715,
16087 /* VAVGLB */
16088 7719,
16089 /* VAVGLF */
16090 7722,
16091 /* VAVGLG */
16092 7725,
16093 /* VAVGLH */
16094 7728,
16095 /* VBPERM */
16096 7731,
16097 /* VCDG */
16098 7734,
16099 /* VCDGB */
16100 7739,
16101 /* VCDLG */
16102 7743,
16103 /* VCDLGB */
16104 7748,
16105 /* VCEFB */
16106 7752,
16107 /* VCELFB */
16108 7756,
16109 /* VCEQ */
16110 7760,
16111 /* VCEQB */
16112 7765,
16113 /* VCEQBS */
16114 7768,
16115 /* VCEQF */
16116 7771,
16117 /* VCEQFS */
16118 7774,
16119 /* VCEQG */
16120 7777,
16121 /* VCEQGS */
16122 7780,
16123 /* VCEQH */
16124 7783,
16125 /* VCEQHS */
16126 7786,
16127 /* VCFEB */
16128 7789,
16129 /* VCFN */
16130 7793,
16131 /* VCFPL */
16132 7797,
16133 /* VCFPS */
16134 7802,
16135 /* VCGD */
16136 7807,
16137 /* VCGDB */
16138 7812,
16139 /* VCH */
16140 7816,
16141 /* VCHB */
16142 7821,
16143 /* VCHBS */
16144 7824,
16145 /* VCHF */
16146 7827,
16147 /* VCHFS */
16148 7830,
16149 /* VCHG */
16150 7833,
16151 /* VCHGS */
16152 7836,
16153 /* VCHH */
16154 7839,
16155 /* VCHHS */
16156 7842,
16157 /* VCHL */
16158 7845,
16159 /* VCHLB */
16160 7850,
16161 /* VCHLBS */
16162 7853,
16163 /* VCHLF */
16164 7856,
16165 /* VCHLFS */
16166 7859,
16167 /* VCHLG */
16168 7862,
16169 /* VCHLGS */
16170 7865,
16171 /* VCHLH */
16172 7868,
16173 /* VCHLHS */
16174 7871,
16175 /* VCKSM */
16176 7874,
16177 /* VCLFEB */
16178 7877,
16179 /* VCLFNH */
16180 7881,
16181 /* VCLFNL */
16182 7885,
16183 /* VCLFP */
16184 7889,
16185 /* VCLGD */
16186 7894,
16187 /* VCLGDB */
16188 7899,
16189 /* VCLZ */
16190 7903,
16191 /* VCLZB */
16192 7906,
16193 /* VCLZDP */
16194 7908,
16195 /* VCLZF */
16196 7911,
16197 /* VCLZG */
16198 7913,
16199 /* VCLZH */
16200 7915,
16201 /* VCNF */
16202 7917,
16203 /* VCP */
16204 7921,
16205 /* VCRNF */
16206 7924,
16207 /* VCSFP */
16208 7929,
16209 /* VCSPH */
16210 7934,
16211 /* VCTZ */
16212 7938,
16213 /* VCTZB */
16214 7941,
16215 /* VCTZF */
16216 7943,
16217 /* VCTZG */
16218 7945,
16219 /* VCTZH */
16220 7947,
16221 /* VCVB */
16222 7949,
16223 /* VCVBG */
16224 7952,
16225 /* VCVBGOpt */
16226 7955,
16227 /* VCVBOpt */
16228 7959,
16229 /* VCVD */
16230 7963,
16231 /* VCVDG */
16232 7967,
16233 /* VDP */
16234 7971,
16235 /* VEC */
16236 7976,
16237 /* VECB */
16238 7979,
16239 /* VECF */
16240 7981,
16241 /* VECG */
16242 7983,
16243 /* VECH */
16244 7985,
16245 /* VECL */
16246 7987,
16247 /* VECLB */
16248 7990,
16249 /* VECLF */
16250 7992,
16251 /* VECLG */
16252 7994,
16253 /* VECLH */
16254 7996,
16255 /* VERIM */
16256 7998,
16257 /* VERIMB */
16258 8004,
16259 /* VERIMF */
16260 8009,
16261 /* VERIMG */
16262 8014,
16263 /* VERIMH */
16264 8019,
16265 /* VERLL */
16266 8024,
16267 /* VERLLB */
16268 8029,
16269 /* VERLLF */
16270 8033,
16271 /* VERLLG */
16272 8037,
16273 /* VERLLH */
16274 8041,
16275 /* VERLLV */
16276 8045,
16277 /* VERLLVB */
16278 8049,
16279 /* VERLLVF */
16280 8052,
16281 /* VERLLVG */
16282 8055,
16283 /* VERLLVH */
16284 8058,
16285 /* VESL */
16286 8061,
16287 /* VESLB */
16288 8066,
16289 /* VESLF */
16290 8070,
16291 /* VESLG */
16292 8074,
16293 /* VESLH */
16294 8078,
16295 /* VESLV */
16296 8082,
16297 /* VESLVB */
16298 8086,
16299 /* VESLVF */
16300 8089,
16301 /* VESLVG */
16302 8092,
16303 /* VESLVH */
16304 8095,
16305 /* VESRA */
16306 8098,
16307 /* VESRAB */
16308 8103,
16309 /* VESRAF */
16310 8107,
16311 /* VESRAG */
16312 8111,
16313 /* VESRAH */
16314 8115,
16315 /* VESRAV */
16316 8119,
16317 /* VESRAVB */
16318 8123,
16319 /* VESRAVF */
16320 8126,
16321 /* VESRAVG */
16322 8129,
16323 /* VESRAVH */
16324 8132,
16325 /* VESRL */
16326 8135,
16327 /* VESRLB */
16328 8140,
16329 /* VESRLF */
16330 8144,
16331 /* VESRLG */
16332 8148,
16333 /* VESRLH */
16334 8152,
16335 /* VESRLV */
16336 8156,
16337 /* VESRLVB */
16338 8160,
16339 /* VESRLVF */
16340 8163,
16341 /* VESRLVG */
16342 8166,
16343 /* VESRLVH */
16344 8169,
16345 /* VFA */
16346 8172,
16347 /* VFADB */
16348 8177,
16349 /* VFAE */
16350 8180,
16351 /* VFAEB */
16352 8185,
16353 /* VFAEBS */
16354 8189,
16355 /* VFAEF */
16356 8193,
16357 /* VFAEFS */
16358 8197,
16359 /* VFAEH */
16360 8201,
16361 /* VFAEHS */
16362 8205,
16363 /* VFAEZB */
16364 8209,
16365 /* VFAEZBS */
16366 8213,
16367 /* VFAEZF */
16368 8217,
16369 /* VFAEZFS */
16370 8221,
16371 /* VFAEZH */
16372 8225,
16373 /* VFAEZHS */
16374 8229,
16375 /* VFASB */
16376 8233,
16377 /* VFCE */
16378 8236,
16379 /* VFCEDB */
16380 8242,
16381 /* VFCEDBS */
16382 8245,
16383 /* VFCESB */
16384 8248,
16385 /* VFCESBS */
16386 8251,
16387 /* VFCH */
16388 8254,
16389 /* VFCHDB */
16390 8260,
16391 /* VFCHDBS */
16392 8263,
16393 /* VFCHE */
16394 8266,
16395 /* VFCHEDB */
16396 8272,
16397 /* VFCHEDBS */
16398 8275,
16399 /* VFCHESB */
16400 8278,
16401 /* VFCHESBS */
16402 8281,
16403 /* VFCHSB */
16404 8284,
16405 /* VFCHSBS */
16406 8287,
16407 /* VFD */
16408 8290,
16409 /* VFDDB */
16410 8295,
16411 /* VFDSB */
16412 8298,
16413 /* VFEE */
16414 8301,
16415 /* VFEEB */
16416 8306,
16417 /* VFEEBS */
16418 8310,
16419 /* VFEEF */
16420 8313,
16421 /* VFEEFS */
16422 8317,
16423 /* VFEEH */
16424 8320,
16425 /* VFEEHS */
16426 8324,
16427 /* VFEEZB */
16428 8327,
16429 /* VFEEZBS */
16430 8330,
16431 /* VFEEZF */
16432 8333,
16433 /* VFEEZFS */
16434 8336,
16435 /* VFEEZH */
16436 8339,
16437 /* VFEEZHS */
16438 8342,
16439 /* VFENE */
16440 8345,
16441 /* VFENEB */
16442 8350,
16443 /* VFENEBS */
16444 8354,
16445 /* VFENEF */
16446 8357,
16447 /* VFENEFS */
16448 8361,
16449 /* VFENEH */
16450 8364,
16451 /* VFENEHS */
16452 8368,
16453 /* VFENEZB */
16454 8371,
16455 /* VFENEZBS */
16456 8374,
16457 /* VFENEZF */
16458 8377,
16459 /* VFENEZFS */
16460 8380,
16461 /* VFENEZH */
16462 8383,
16463 /* VFENEZHS */
16464 8386,
16465 /* VFI */
16466 8389,
16467 /* VFIDB */
16468 8394,
16469 /* VFISB */
16470 8398,
16471 /* VFKEDB */
16472 8402,
16473 /* VFKEDBS */
16474 8405,
16475 /* VFKESB */
16476 8408,
16477 /* VFKESBS */
16478 8411,
16479 /* VFKHDB */
16480 8414,
16481 /* VFKHDBS */
16482 8417,
16483 /* VFKHEDB */
16484 8420,
16485 /* VFKHEDBS */
16486 8423,
16487 /* VFKHESB */
16488 8426,
16489 /* VFKHESBS */
16490 8429,
16491 /* VFKHSB */
16492 8432,
16493 /* VFKHSBS */
16494 8435,
16495 /* VFLCDB */
16496 8438,
16497 /* VFLCSB */
16498 8440,
16499 /* VFLL */
16500 8442,
16501 /* VFLLS */
16502 8446,
16503 /* VFLNDB */
16504 8448,
16505 /* VFLNSB */
16506 8450,
16507 /* VFLPDB */
16508 8452,
16509 /* VFLPSB */
16510 8454,
16511 /* VFLR */
16512 8456,
16513 /* VFLRD */
16514 8461,
16515 /* VFM */
16516 8465,
16517 /* VFMA */
16518 8470,
16519 /* VFMADB */
16520 8476,
16521 /* VFMASB */
16522 8480,
16523 /* VFMAX */
16524 8484,
16525 /* VFMAXDB */
16526 8490,
16527 /* VFMAXSB */
16528 8494,
16529 /* VFMDB */
16530 8498,
16531 /* VFMIN */
16532 8501,
16533 /* VFMINDB */
16534 8507,
16535 /* VFMINSB */
16536 8511,
16537 /* VFMS */
16538 8515,
16539 /* VFMSB */
16540 8521,
16541 /* VFMSDB */
16542 8524,
16543 /* VFMSSB */
16544 8528,
16545 /* VFNMA */
16546 8532,
16547 /* VFNMADB */
16548 8538,
16549 /* VFNMASB */
16550 8542,
16551 /* VFNMS */
16552 8546,
16553 /* VFNMSDB */
16554 8552,
16555 /* VFNMSSB */
16556 8556,
16557 /* VFPSO */
16558 8560,
16559 /* VFPSODB */
16560 8565,
16561 /* VFPSOSB */
16562 8568,
16563 /* VFS */
16564 8571,
16565 /* VFSDB */
16566 8576,
16567 /* VFSQ */
16568 8579,
16569 /* VFSQDB */
16570 8583,
16571 /* VFSQSB */
16572 8585,
16573 /* VFSSB */
16574 8587,
16575 /* VFTCI */
16576 8590,
16577 /* VFTCIDB */
16578 8595,
16579 /* VFTCISB */
16580 8598,
16581 /* VGBM */
16582 8601,
16583 /* VGEF */
16584 8603,
16585 /* VGEG */
16586 8609,
16587 /* VGFM */
16588 8615,
16589 /* VGFMA */
16590 8619,
16591 /* VGFMAB */
16592 8624,
16593 /* VGFMAF */
16594 8628,
16595 /* VGFMAG */
16596 8632,
16597 /* VGFMAH */
16598 8636,
16599 /* VGFMB */
16600 8640,
16601 /* VGFMF */
16602 8643,
16603 /* VGFMG */
16604 8646,
16605 /* VGFMH */
16606 8649,
16607 /* VGM */
16608 8652,
16609 /* VGMB */
16610 8656,
16611 /* VGMF */
16612 8659,
16613 /* VGMG */
16614 8662,
16615 /* VGMH */
16616 8665,
16617 /* VISTR */
16618 8668,
16619 /* VISTRB */
16620 8672,
16621 /* VISTRBS */
16622 8675,
16623 /* VISTRF */
16624 8677,
16625 /* VISTRFS */
16626 8680,
16627 /* VISTRH */
16628 8682,
16629 /* VISTRHS */
16630 8685,
16631 /* VL */
16632 8687,
16633 /* VLAlign */
16634 8691,
16635 /* VLBB */
16636 8696,
16637 /* VLBR */
16638 8701,
16639 /* VLBRF */
16640 8706,
16641 /* VLBRG */
16642 8710,
16643 /* VLBRH */
16644 8714,
16645 /* VLBRQ */
16646 8718,
16647 /* VLBRREP */
16648 8722,
16649 /* VLBRREPF */
16650 8727,
16651 /* VLBRREPG */
16652 8731,
16653 /* VLBRREPH */
16654 8735,
16655 /* VLC */
16656 8739,
16657 /* VLCB */
16658 8742,
16659 /* VLCF */
16660 8744,
16661 /* VLCG */
16662 8746,
16663 /* VLCH */
16664 8748,
16665 /* VLDE */
16666 8750,
16667 /* VLDEB */
16668 8754,
16669 /* VLEB */
16670 8756,
16671 /* VLEBRF */
16672 8762,
16673 /* VLEBRG */
16674 8768,
16675 /* VLEBRH */
16676 8774,
16677 /* VLED */
16678 8780,
16679 /* VLEDB */
16680 8785,
16681 /* VLEF */
16682 8789,
16683 /* VLEG */
16684 8795,
16685 /* VLEH */
16686 8801,
16687 /* VLEIB */
16688 8807,
16689 /* VLEIF */
16690 8811,
16691 /* VLEIG */
16692 8815,
16693 /* VLEIH */
16694 8819,
16695 /* VLER */
16696 8823,
16697 /* VLERF */
16698 8828,
16699 /* VLERG */
16700 8832,
16701 /* VLERH */
16702 8836,
16703 /* VLGV */
16704 8840,
16705 /* VLGVB */
16706 8845,
16707 /* VLGVF */
16708 8849,
16709 /* VLGVG */
16710 8853,
16711 /* VLGVH */
16712 8857,
16713 /* VLIP */
16714 8861,
16715 /* VLL */
16716 8864,
16717 /* VLLEBRZ */
16718 8868,
16719 /* VLLEBRZE */
16720 8873,
16721 /* VLLEBRZF */
16722 8877,
16723 /* VLLEBRZG */
16724 8881,
16725 /* VLLEBRZH */
16726 8885,
16727 /* VLLEZ */
16728 8889,
16729 /* VLLEZB */
16730 8894,
16731 /* VLLEZF */
16732 8898,
16733 /* VLLEZG */
16734 8902,
16735 /* VLLEZH */
16736 8906,
16737 /* VLLEZLF */
16738 8910,
16739 /* VLM */
16740 8914,
16741 /* VLMAlign */
16742 8918,
16743 /* VLP */
16744 8923,
16745 /* VLPB */
16746 8926,
16747 /* VLPF */
16748 8928,
16749 /* VLPG */
16750 8930,
16751 /* VLPH */
16752 8932,
16753 /* VLR */
16754 8934,
16755 /* VLREP */
16756 8936,
16757 /* VLREPB */
16758 8941,
16759 /* VLREPF */
16760 8945,
16761 /* VLREPG */
16762 8949,
16763 /* VLREPH */
16764 8953,
16765 /* VLRL */
16766 8957,
16767 /* VLRLR */
16768 8961,
16769 /* VLVG */
16770 8965,
16771 /* VLVGB */
16772 8971,
16773 /* VLVGF */
16774 8976,
16775 /* VLVGG */
16776 8981,
16777 /* VLVGH */
16778 8986,
16779 /* VLVGP */
16780 8991,
16781 /* VMAE */
16782 8994,
16783 /* VMAEB */
16784 8999,
16785 /* VMAEF */
16786 9003,
16787 /* VMAEH */
16788 9007,
16789 /* VMAH */
16790 9011,
16791 /* VMAHB */
16792 9016,
16793 /* VMAHF */
16794 9020,
16795 /* VMAHH */
16796 9024,
16797 /* VMAL */
16798 9028,
16799 /* VMALB */
16800 9033,
16801 /* VMALE */
16802 9037,
16803 /* VMALEB */
16804 9042,
16805 /* VMALEF */
16806 9046,
16807 /* VMALEH */
16808 9050,
16809 /* VMALF */
16810 9054,
16811 /* VMALH */
16812 9058,
16813 /* VMALHB */
16814 9063,
16815 /* VMALHF */
16816 9067,
16817 /* VMALHH */
16818 9071,
16819 /* VMALHW */
16820 9075,
16821 /* VMALO */
16822 9079,
16823 /* VMALOB */
16824 9084,
16825 /* VMALOF */
16826 9088,
16827 /* VMALOH */
16828 9092,
16829 /* VMAO */
16830 9096,
16831 /* VMAOB */
16832 9101,
16833 /* VMAOF */
16834 9105,
16835 /* VMAOH */
16836 9109,
16837 /* VME */
16838 9113,
16839 /* VMEB */
16840 9117,
16841 /* VMEF */
16842 9120,
16843 /* VMEH */
16844 9123,
16845 /* VMH */
16846 9126,
16847 /* VMHB */
16848 9130,
16849 /* VMHF */
16850 9133,
16851 /* VMHH */
16852 9136,
16853 /* VML */
16854 9139,
16855 /* VMLB */
16856 9143,
16857 /* VMLE */
16858 9146,
16859 /* VMLEB */
16860 9150,
16861 /* VMLEF */
16862 9153,
16863 /* VMLEH */
16864 9156,
16865 /* VMLF */
16866 9159,
16867 /* VMLH */
16868 9162,
16869 /* VMLHB */
16870 9166,
16871 /* VMLHF */
16872 9169,
16873 /* VMLHH */
16874 9172,
16875 /* VMLHW */
16876 9175,
16877 /* VMLO */
16878 9178,
16879 /* VMLOB */
16880 9182,
16881 /* VMLOF */
16882 9185,
16883 /* VMLOH */
16884 9188,
16885 /* VMN */
16886 9191,
16887 /* VMNB */
16888 9195,
16889 /* VMNF */
16890 9198,
16891 /* VMNG */
16892 9201,
16893 /* VMNH */
16894 9204,
16895 /* VMNL */
16896 9207,
16897 /* VMNLB */
16898 9211,
16899 /* VMNLF */
16900 9214,
16901 /* VMNLG */
16902 9217,
16903 /* VMNLH */
16904 9220,
16905 /* VMO */
16906 9223,
16907 /* VMOB */
16908 9227,
16909 /* VMOF */
16910 9230,
16911 /* VMOH */
16912 9233,
16913 /* VMP */
16914 9236,
16915 /* VMRH */
16916 9241,
16917 /* VMRHB */
16918 9245,
16919 /* VMRHF */
16920 9248,
16921 /* VMRHG */
16922 9251,
16923 /* VMRHH */
16924 9254,
16925 /* VMRL */
16926 9257,
16927 /* VMRLB */
16928 9261,
16929 /* VMRLF */
16930 9264,
16931 /* VMRLG */
16932 9267,
16933 /* VMRLH */
16934 9270,
16935 /* VMSL */
16936 9273,
16937 /* VMSLG */
16938 9279,
16939 /* VMSP */
16940 9284,
16941 /* VMX */
16942 9289,
16943 /* VMXB */
16944 9293,
16945 /* VMXF */
16946 9296,
16947 /* VMXG */
16948 9299,
16949 /* VMXH */
16950 9302,
16951 /* VMXL */
16952 9305,
16953 /* VMXLB */
16954 9309,
16955 /* VMXLF */
16956 9312,
16957 /* VMXLG */
16958 9315,
16959 /* VMXLH */
16960 9318,
16961 /* VN */
16962 9321,
16963 /* VNC */
16964 9324,
16965 /* VNN */
16966 9327,
16967 /* VNO */
16968 9330,
16969 /* VNX */
16970 9333,
16971 /* VO */
16972 9336,
16973 /* VOC */
16974 9339,
16975 /* VONE */
16976 9342,
16977 /* VPDI */
16978 9343,
16979 /* VPERM */
16980 9347,
16981 /* VPK */
16982 9351,
16983 /* VPKF */
16984 9355,
16985 /* VPKG */
16986 9358,
16987 /* VPKH */
16988 9361,
16989 /* VPKLS */
16990 9364,
16991 /* VPKLSF */
16992 9369,
16993 /* VPKLSFS */
16994 9372,
16995 /* VPKLSG */
16996 9375,
16997 /* VPKLSGS */
16998 9378,
16999 /* VPKLSH */
17000 9381,
17001 /* VPKLSHS */
17002 9384,
17003 /* VPKS */
17004 9387,
17005 /* VPKSF */
17006 9392,
17007 /* VPKSFS */
17008 9395,
17009 /* VPKSG */
17010 9398,
17011 /* VPKSGS */
17012 9401,
17013 /* VPKSH */
17014 9404,
17015 /* VPKSHS */
17016 9407,
17017 /* VPKZ */
17018 9410,
17019 /* VPKZR */
17020 9414,
17021 /* VPOPCT */
17022 9419,
17023 /* VPOPCTB */
17024 9422,
17025 /* VPOPCTF */
17026 9424,
17027 /* VPOPCTG */
17028 9426,
17029 /* VPOPCTH */
17030 9428,
17031 /* VPSOP */
17032 9430,
17033 /* VREP */
17034 9435,
17035 /* VREPB */
17036 9439,
17037 /* VREPF */
17038 9442,
17039 /* VREPG */
17040 9445,
17041 /* VREPH */
17042 9448,
17043 /* VREPI */
17044 9451,
17045 /* VREPIB */
17046 9454,
17047 /* VREPIF */
17048 9456,
17049 /* VREPIG */
17050 9458,
17051 /* VREPIH */
17052 9460,
17053 /* VRP */
17054 9462,
17055 /* VS */
17056 9467,
17057 /* VSB */
17058 9471,
17059 /* VSBCBI */
17060 9474,
17061 /* VSBCBIQ */
17062 9479,
17063 /* VSBI */
17064 9483,
17065 /* VSBIQ */
17066 9488,
17067 /* VSCBI */
17068 9492,
17069 /* VSCBIB */
17070 9496,
17071 /* VSCBIF */
17072 9499,
17073 /* VSCBIG */
17074 9502,
17075 /* VSCBIH */
17076 9505,
17077 /* VSCBIQ */
17078 9508,
17079 /* VSCEF */
17080 9511,
17081 /* VSCEG */
17082 9516,
17083 /* VSCHDP */
17084 9521,
17085 /* VSCHP */
17086 9525,
17087 /* VSCHSP */
17088 9530,
17089 /* VSCHXP */
17090 9534,
17091 /* VSCSHP */
17092 9538,
17093 /* VSDP */
17094 9541,
17095 /* VSEG */
17096 9546,
17097 /* VSEGB */
17098 9549,
17099 /* VSEGF */
17100 9551,
17101 /* VSEGH */
17102 9553,
17103 /* VSEL */
17104 9555,
17105 /* VSF */
17106 9559,
17107 /* VSG */
17108 9562,
17109 /* VSH */
17110 9565,
17111 /* VSL */
17112 9568,
17113 /* VSLB */
17114 9571,
17115 /* VSLD */
17116 9574,
17117 /* VSLDB */
17118 9578,
17119 /* VSP */
17120 9582,
17121 /* VSQ */
17122 9587,
17123 /* VSRA */
17124 9590,
17125 /* VSRAB */
17126 9593,
17127 /* VSRD */
17128 9596,
17129 /* VSRL */
17130 9600,
17131 /* VSRLB */
17132 9603,
17133 /* VSRP */
17134 9606,
17135 /* VSRPR */
17136 9611,
17137 /* VST */
17138 9616,
17139 /* VSTAlign */
17140 9620,
17141 /* VSTBR */
17142 9625,
17143 /* VSTBRF */
17144 9630,
17145 /* VSTBRG */
17146 9634,
17147 /* VSTBRH */
17148 9638,
17149 /* VSTBRQ */
17150 9642,
17151 /* VSTEB */
17152 9646,
17153 /* VSTEBRF */
17154 9651,
17155 /* VSTEBRG */
17156 9656,
17157 /* VSTEBRH */
17158 9661,
17159 /* VSTEF */
17160 9666,
17161 /* VSTEG */
17162 9671,
17163 /* VSTEH */
17164 9676,
17165 /* VSTER */
17166 9681,
17167 /* VSTERF */
17168 9686,
17169 /* VSTERG */
17170 9690,
17171 /* VSTERH */
17172 9694,
17173 /* VSTL */
17174 9698,
17175 /* VSTM */
17176 9702,
17177 /* VSTMAlign */
17178 9706,
17179 /* VSTRC */
17180 9711,
17181 /* VSTRCB */
17182 9717,
17183 /* VSTRCBS */
17184 9722,
17185 /* VSTRCF */
17186 9727,
17187 /* VSTRCFS */
17188 9732,
17189 /* VSTRCH */
17190 9737,
17191 /* VSTRCHS */
17192 9742,
17193 /* VSTRCZB */
17194 9747,
17195 /* VSTRCZBS */
17196 9752,
17197 /* VSTRCZF */
17198 9757,
17199 /* VSTRCZFS */
17200 9762,
17201 /* VSTRCZH */
17202 9767,
17203 /* VSTRCZHS */
17204 9772,
17205 /* VSTRL */
17206 9777,
17207 /* VSTRLR */
17208 9781,
17209 /* VSTRS */
17210 9785,
17211 /* VSTRSB */
17212 9791,
17213 /* VSTRSF */
17214 9796,
17215 /* VSTRSH */
17216 9801,
17217 /* VSTRSZB */
17218 9806,
17219 /* VSTRSZF */
17220 9810,
17221 /* VSTRSZH */
17222 9814,
17223 /* VSUM */
17224 9818,
17225 /* VSUMB */
17226 9822,
17227 /* VSUMG */
17228 9825,
17229 /* VSUMGF */
17230 9829,
17231 /* VSUMGH */
17232 9832,
17233 /* VSUMH */
17234 9835,
17235 /* VSUMQ */
17236 9838,
17237 /* VSUMQF */
17238 9842,
17239 /* VSUMQG */
17240 9845,
17241 /* VTM */
17242 9848,
17243 /* VTP */
17244 9850,
17245 /* VUPH */
17246 9851,
17247 /* VUPHB */
17248 9854,
17249 /* VUPHF */
17250 9856,
17251 /* VUPHH */
17252 9858,
17253 /* VUPKZ */
17254 9860,
17255 /* VUPKZH */
17256 9864,
17257 /* VUPKZL */
17258 9867,
17259 /* VUPL */
17260 9870,
17261 /* VUPLB */
17262 9873,
17263 /* VUPLF */
17264 9875,
17265 /* VUPLH */
17266 9877,
17267 /* VUPLHB */
17268 9880,
17269 /* VUPLHF */
17270 9882,
17271 /* VUPLHH */
17272 9884,
17273 /* VUPLHW */
17274 9886,
17275 /* VUPLL */
17276 9888,
17277 /* VUPLLB */
17278 9891,
17279 /* VUPLLF */
17280 9893,
17281 /* VUPLLH */
17282 9895,
17283 /* VX */
17284 9897,
17285 /* VZERO */
17286 9900,
17287 /* WCDGB */
17288 9901,
17289 /* WCDLGB */
17290 9905,
17291 /* WCEFB */
17292 9909,
17293 /* WCELFB */
17294 9913,
17295 /* WCFEB */
17296 9917,
17297 /* WCGDB */
17298 9921,
17299 /* WCLFEB */
17300 9925,
17301 /* WCLGDB */
17302 9929,
17303 /* WFADB */
17304 9933,
17305 /* WFASB */
17306 9936,
17307 /* WFAXB */
17308 9939,
17309 /* WFC */
17310 9942,
17311 /* WFCDB */
17312 9946,
17313 /* WFCEDB */
17314 9948,
17315 /* WFCEDBS */
17316 9951,
17317 /* WFCESB */
17318 9954,
17319 /* WFCESBS */
17320 9957,
17321 /* WFCEXB */
17322 9960,
17323 /* WFCEXBS */
17324 9963,
17325 /* WFCHDB */
17326 9966,
17327 /* WFCHDBS */
17328 9969,
17329 /* WFCHEDB */
17330 9972,
17331 /* WFCHEDBS */
17332 9975,
17333 /* WFCHESB */
17334 9978,
17335 /* WFCHESBS */
17336 9981,
17337 /* WFCHEXB */
17338 9984,
17339 /* WFCHEXBS */
17340 9987,
17341 /* WFCHSB */
17342 9990,
17343 /* WFCHSBS */
17344 9993,
17345 /* WFCHXB */
17346 9996,
17347 /* WFCHXBS */
17348 9999,
17349 /* WFCSB */
17350 10002,
17351 /* WFCXB */
17352 10004,
17353 /* WFDDB */
17354 10006,
17355 /* WFDSB */
17356 10009,
17357 /* WFDXB */
17358 10012,
17359 /* WFIDB */
17360 10015,
17361 /* WFISB */
17362 10019,
17363 /* WFIXB */
17364 10023,
17365 /* WFK */
17366 10027,
17367 /* WFKDB */
17368 10031,
17369 /* WFKEDB */
17370 10033,
17371 /* WFKEDBS */
17372 10036,
17373 /* WFKESB */
17374 10039,
17375 /* WFKESBS */
17376 10042,
17377 /* WFKEXB */
17378 10045,
17379 /* WFKEXBS */
17380 10048,
17381 /* WFKHDB */
17382 10051,
17383 /* WFKHDBS */
17384 10054,
17385 /* WFKHEDB */
17386 10057,
17387 /* WFKHEDBS */
17388 10060,
17389 /* WFKHESB */
17390 10063,
17391 /* WFKHESBS */
17392 10066,
17393 /* WFKHEXB */
17394 10069,
17395 /* WFKHEXBS */
17396 10072,
17397 /* WFKHSB */
17398 10075,
17399 /* WFKHSBS */
17400 10078,
17401 /* WFKHXB */
17402 10081,
17403 /* WFKHXBS */
17404 10084,
17405 /* WFKSB */
17406 10087,
17407 /* WFKXB */
17408 10089,
17409 /* WFLCDB */
17410 10091,
17411 /* WFLCSB */
17412 10093,
17413 /* WFLCXB */
17414 10095,
17415 /* WFLLD */
17416 10097,
17417 /* WFLLS */
17418 10099,
17419 /* WFLNDB */
17420 10101,
17421 /* WFLNSB */
17422 10103,
17423 /* WFLNXB */
17424 10105,
17425 /* WFLPDB */
17426 10107,
17427 /* WFLPSB */
17428 10109,
17429 /* WFLPXB */
17430 10111,
17431 /* WFLRD */
17432 10113,
17433 /* WFLRX */
17434 10117,
17435 /* WFMADB */
17436 10121,
17437 /* WFMASB */
17438 10125,
17439 /* WFMAXB */
17440 10129,
17441 /* WFMAXDB */
17442 10133,
17443 /* WFMAXSB */
17444 10137,
17445 /* WFMAXXB */
17446 10141,
17447 /* WFMDB */
17448 10145,
17449 /* WFMINDB */
17450 10148,
17451 /* WFMINSB */
17452 10152,
17453 /* WFMINXB */
17454 10156,
17455 /* WFMSB */
17456 10160,
17457 /* WFMSDB */
17458 10163,
17459 /* WFMSSB */
17460 10167,
17461 /* WFMSXB */
17462 10171,
17463 /* WFMXB */
17464 10175,
17465 /* WFNMADB */
17466 10178,
17467 /* WFNMASB */
17468 10182,
17469 /* WFNMAXB */
17470 10186,
17471 /* WFNMSDB */
17472 10190,
17473 /* WFNMSSB */
17474 10194,
17475 /* WFNMSXB */
17476 10198,
17477 /* WFPSODB */
17478 10202,
17479 /* WFPSOSB */
17480 10205,
17481 /* WFPSOXB */
17482 10208,
17483 /* WFSDB */
17484 10211,
17485 /* WFSQDB */
17486 10214,
17487 /* WFSQSB */
17488 10216,
17489 /* WFSQXB */
17490 10218,
17491 /* WFSSB */
17492 10220,
17493 /* WFSXB */
17494 10223,
17495 /* WFTCIDB */
17496 10226,
17497 /* WFTCISB */
17498 10229,
17499 /* WFTCIXB */
17500 10232,
17501 /* WLDEB */
17502 10235,
17503 /* WLEDB */
17504 10237,
17505 /* X */
17506 10241,
17507 /* XC */
17508 10246,
17509 /* XG */
17510 10251,
17511 /* XGR */
17512 10256,
17513 /* XGRK */
17514 10259,
17515 /* XI */
17516 10262,
17517 /* XIHF */
17518 10265,
17519 /* XILF */
17520 10268,
17521 /* XIY */
17522 10271,
17523 /* XR */
17524 10274,
17525 /* XRK */
17526 10277,
17527 /* XSCH */
17528 10280,
17529 /* XY */
17530 10280,
17531 /* ZAP */
17532 10285,
17533 };
17534
17535 using namespace OpTypes;
17536 static const int16_t OpcodeOperandTypes[] = {
17537
17538 /* PHI */
17539 -1,
17540 /* INLINEASM */
17541 /* INLINEASM_BR */
17542 /* CFI_INSTRUCTION */
17543 i32imm,
17544 /* EH_LABEL */
17545 i32imm,
17546 /* GC_LABEL */
17547 i32imm,
17548 /* ANNOTATION_LABEL */
17549 i32imm,
17550 /* KILL */
17551 /* EXTRACT_SUBREG */
17552 -1, -1, i32imm,
17553 /* INSERT_SUBREG */
17554 -1, -1, -1, i32imm,
17555 /* IMPLICIT_DEF */
17556 -1,
17557 /* SUBREG_TO_REG */
17558 -1, -1, -1, i32imm,
17559 /* COPY_TO_REGCLASS */
17560 -1, -1, i32imm,
17561 /* DBG_VALUE */
17562 /* DBG_VALUE_LIST */
17563 /* DBG_INSTR_REF */
17564 /* DBG_PHI */
17565 /* DBG_LABEL */
17566 -1,
17567 /* REG_SEQUENCE */
17568 -1, -1,
17569 /* COPY */
17570 -1, -1,
17571 /* BUNDLE */
17572 /* LIFETIME_START */
17573 i32imm,
17574 /* LIFETIME_END */
17575 i32imm,
17576 /* PSEUDO_PROBE */
17577 i64imm, i64imm, i8imm, i32imm,
17578 /* ARITH_FENCE */
17579 -1, -1,
17580 /* STACKMAP */
17581 i64imm, i32imm,
17582 /* FENTRY_CALL */
17583 /* PATCHPOINT */
17584 -1, i64imm, i32imm, -1, i32imm, i32imm,
17585 /* LOAD_STACK_GUARD */
17586 -1,
17587 /* PREALLOCATED_SETUP */
17588 i32imm,
17589 /* PREALLOCATED_ARG */
17590 -1, i32imm, i32imm,
17591 /* STATEPOINT */
17592 /* LOCAL_ESCAPE */
17593 -1, i32imm,
17594 /* FAULTING_OP */
17595 -1,
17596 /* PATCHABLE_OP */
17597 /* PATCHABLE_FUNCTION_ENTER */
17598 /* PATCHABLE_RET */
17599 /* PATCHABLE_FUNCTION_EXIT */
17600 /* PATCHABLE_TAIL_CALL */
17601 /* PATCHABLE_EVENT_CALL */
17602 -1, -1,
17603 /* PATCHABLE_TYPED_EVENT_CALL */
17604 -1, -1, -1,
17605 /* ICALL_BRANCH_FUNNEL */
17606 /* MEMBARRIER */
17607 /* JUMP_TABLE_DEBUG_INFO */
17608 i64imm,
17609 /* CONVERGENCECTRL_ENTRY */
17610 -1,
17611 /* CONVERGENCECTRL_ANCHOR */
17612 -1,
17613 /* CONVERGENCECTRL_LOOP */
17614 -1, -1,
17615 /* CONVERGENCECTRL_GLUE */
17616 -1,
17617 /* G_ASSERT_SEXT */
17618 type0, type0, untyped_imm_0,
17619 /* G_ASSERT_ZEXT */
17620 type0, type0, untyped_imm_0,
17621 /* G_ASSERT_ALIGN */
17622 type0, type0, untyped_imm_0,
17623 /* G_ADD */
17624 type0, type0, type0,
17625 /* G_SUB */
17626 type0, type0, type0,
17627 /* G_MUL */
17628 type0, type0, type0,
17629 /* G_SDIV */
17630 type0, type0, type0,
17631 /* G_UDIV */
17632 type0, type0, type0,
17633 /* G_SREM */
17634 type0, type0, type0,
17635 /* G_UREM */
17636 type0, type0, type0,
17637 /* G_SDIVREM */
17638 type0, type0, type0, type0,
17639 /* G_UDIVREM */
17640 type0, type0, type0, type0,
17641 /* G_AND */
17642 type0, type0, type0,
17643 /* G_OR */
17644 type0, type0, type0,
17645 /* G_XOR */
17646 type0, type0, type0,
17647 /* G_IMPLICIT_DEF */
17648 type0,
17649 /* G_PHI */
17650 type0,
17651 /* G_FRAME_INDEX */
17652 type0, -1,
17653 /* G_GLOBAL_VALUE */
17654 type0, -1,
17655 /* G_PTRAUTH_GLOBAL_VALUE */
17656 type0, -1, i32imm, type1, i64imm,
17657 /* G_CONSTANT_POOL */
17658 type0, -1,
17659 /* G_EXTRACT */
17660 type0, type1, untyped_imm_0,
17661 /* G_UNMERGE_VALUES */
17662 type0, type1,
17663 /* G_INSERT */
17664 type0, type0, type1, untyped_imm_0,
17665 /* G_MERGE_VALUES */
17666 type0, type1,
17667 /* G_BUILD_VECTOR */
17668 type0, type1,
17669 /* G_BUILD_VECTOR_TRUNC */
17670 type0, type1,
17671 /* G_CONCAT_VECTORS */
17672 type0, type1,
17673 /* G_PTRTOINT */
17674 type0, type1,
17675 /* G_INTTOPTR */
17676 type0, type1,
17677 /* G_BITCAST */
17678 type0, type1,
17679 /* G_FREEZE */
17680 type0, type0,
17681 /* G_CONSTANT_FOLD_BARRIER */
17682 type0, type0,
17683 /* G_INTRINSIC_FPTRUNC_ROUND */
17684 type0, type1, i32imm,
17685 /* G_INTRINSIC_TRUNC */
17686 type0, type0,
17687 /* G_INTRINSIC_ROUND */
17688 type0, type0,
17689 /* G_INTRINSIC_LRINT */
17690 type0, type1,
17691 /* G_INTRINSIC_LLRINT */
17692 type0, type1,
17693 /* G_INTRINSIC_ROUNDEVEN */
17694 type0, type0,
17695 /* G_READCYCLECOUNTER */
17696 type0,
17697 /* G_READSTEADYCOUNTER */
17698 type0,
17699 /* G_LOAD */
17700 type0, ptype1,
17701 /* G_SEXTLOAD */
17702 type0, ptype1,
17703 /* G_ZEXTLOAD */
17704 type0, ptype1,
17705 /* G_INDEXED_LOAD */
17706 type0, ptype1, ptype1, type2, -1,
17707 /* G_INDEXED_SEXTLOAD */
17708 type0, ptype1, ptype1, type2, -1,
17709 /* G_INDEXED_ZEXTLOAD */
17710 type0, ptype1, ptype1, type2, -1,
17711 /* G_STORE */
17712 type0, ptype1,
17713 /* G_INDEXED_STORE */
17714 ptype0, type1, ptype0, ptype2, -1,
17715 /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */
17716 type0, type1, type2, type0, type0,
17717 /* G_ATOMIC_CMPXCHG */
17718 type0, ptype1, type0, type0,
17719 /* G_ATOMICRMW_XCHG */
17720 type0, ptype1, type0,
17721 /* G_ATOMICRMW_ADD */
17722 type0, ptype1, type0,
17723 /* G_ATOMICRMW_SUB */
17724 type0, ptype1, type0,
17725 /* G_ATOMICRMW_AND */
17726 type0, ptype1, type0,
17727 /* G_ATOMICRMW_NAND */
17728 type0, ptype1, type0,
17729 /* G_ATOMICRMW_OR */
17730 type0, ptype1, type0,
17731 /* G_ATOMICRMW_XOR */
17732 type0, ptype1, type0,
17733 /* G_ATOMICRMW_MAX */
17734 type0, ptype1, type0,
17735 /* G_ATOMICRMW_MIN */
17736 type0, ptype1, type0,
17737 /* G_ATOMICRMW_UMAX */
17738 type0, ptype1, type0,
17739 /* G_ATOMICRMW_UMIN */
17740 type0, ptype1, type0,
17741 /* G_ATOMICRMW_FADD */
17742 type0, ptype1, type0,
17743 /* G_ATOMICRMW_FSUB */
17744 type0, ptype1, type0,
17745 /* G_ATOMICRMW_FMAX */
17746 type0, ptype1, type0,
17747 /* G_ATOMICRMW_FMIN */
17748 type0, ptype1, type0,
17749 /* G_ATOMICRMW_UINC_WRAP */
17750 type0, ptype1, type0,
17751 /* G_ATOMICRMW_UDEC_WRAP */
17752 type0, ptype1, type0,
17753 /* G_FENCE */
17754 i32imm, i32imm,
17755 /* G_PREFETCH */
17756 ptype0, i32imm, i32imm, i32imm,
17757 /* G_BRCOND */
17758 type0, -1,
17759 /* G_BRINDIRECT */
17760 type0,
17761 /* G_INVOKE_REGION_START */
17762 /* G_INTRINSIC */
17763 -1,
17764 /* G_INTRINSIC_W_SIDE_EFFECTS */
17765 -1,
17766 /* G_INTRINSIC_CONVERGENT */
17767 -1,
17768 /* G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS */
17769 -1,
17770 /* G_ANYEXT */
17771 type0, type1,
17772 /* G_TRUNC */
17773 type0, type1,
17774 /* G_CONSTANT */
17775 type0, -1,
17776 /* G_FCONSTANT */
17777 type0, -1,
17778 /* G_VASTART */
17779 type0,
17780 /* G_VAARG */
17781 type0, type1, -1,
17782 /* G_SEXT */
17783 type0, type1,
17784 /* G_SEXT_INREG */
17785 type0, type0, untyped_imm_0,
17786 /* G_ZEXT */
17787 type0, type1,
17788 /* G_SHL */
17789 type0, type0, type1,
17790 /* G_LSHR */
17791 type0, type0, type1,
17792 /* G_ASHR */
17793 type0, type0, type1,
17794 /* G_FSHL */
17795 type0, type0, type0, type1,
17796 /* G_FSHR */
17797 type0, type0, type0, type1,
17798 /* G_ROTR */
17799 type0, type0, type1,
17800 /* G_ROTL */
17801 type0, type0, type1,
17802 /* G_ICMP */
17803 type0, -1, type1, type1,
17804 /* G_FCMP */
17805 type0, -1, type1, type1,
17806 /* G_SCMP */
17807 type0, type1, type1,
17808 /* G_UCMP */
17809 type0, type1, type1,
17810 /* G_SELECT */
17811 type0, type1, type0, type0,
17812 /* G_UADDO */
17813 type0, type1, type0, type0,
17814 /* G_UADDE */
17815 type0, type1, type0, type0, type1,
17816 /* G_USUBO */
17817 type0, type1, type0, type0,
17818 /* G_USUBE */
17819 type0, type1, type0, type0, type1,
17820 /* G_SADDO */
17821 type0, type1, type0, type0,
17822 /* G_SADDE */
17823 type0, type1, type0, type0, type1,
17824 /* G_SSUBO */
17825 type0, type1, type0, type0,
17826 /* G_SSUBE */
17827 type0, type1, type0, type0, type1,
17828 /* G_UMULO */
17829 type0, type1, type0, type0,
17830 /* G_SMULO */
17831 type0, type1, type0, type0,
17832 /* G_UMULH */
17833 type0, type0, type0,
17834 /* G_SMULH */
17835 type0, type0, type0,
17836 /* G_UADDSAT */
17837 type0, type0, type0,
17838 /* G_SADDSAT */
17839 type0, type0, type0,
17840 /* G_USUBSAT */
17841 type0, type0, type0,
17842 /* G_SSUBSAT */
17843 type0, type0, type0,
17844 /* G_USHLSAT */
17845 type0, type0, type1,
17846 /* G_SSHLSAT */
17847 type0, type0, type1,
17848 /* G_SMULFIX */
17849 type0, type0, type0, untyped_imm_0,
17850 /* G_UMULFIX */
17851 type0, type0, type0, untyped_imm_0,
17852 /* G_SMULFIXSAT */
17853 type0, type0, type0, untyped_imm_0,
17854 /* G_UMULFIXSAT */
17855 type0, type0, type0, untyped_imm_0,
17856 /* G_SDIVFIX */
17857 type0, type0, type0, untyped_imm_0,
17858 /* G_UDIVFIX */
17859 type0, type0, type0, untyped_imm_0,
17860 /* G_SDIVFIXSAT */
17861 type0, type0, type0, untyped_imm_0,
17862 /* G_UDIVFIXSAT */
17863 type0, type0, type0, untyped_imm_0,
17864 /* G_FADD */
17865 type0, type0, type0,
17866 /* G_FSUB */
17867 type0, type0, type0,
17868 /* G_FMUL */
17869 type0, type0, type0,
17870 /* G_FMA */
17871 type0, type0, type0, type0,
17872 /* G_FMAD */
17873 type0, type0, type0, type0,
17874 /* G_FDIV */
17875 type0, type0, type0,
17876 /* G_FREM */
17877 type0, type0, type0,
17878 /* G_FPOW */
17879 type0, type0, type0,
17880 /* G_FPOWI */
17881 type0, type0, type1,
17882 /* G_FEXP */
17883 type0, type0,
17884 /* G_FEXP2 */
17885 type0, type0,
17886 /* G_FEXP10 */
17887 type0, type0,
17888 /* G_FLOG */
17889 type0, type0,
17890 /* G_FLOG2 */
17891 type0, type0,
17892 /* G_FLOG10 */
17893 type0, type0,
17894 /* G_FLDEXP */
17895 type0, type0, type1,
17896 /* G_FFREXP */
17897 type0, type1, type0,
17898 /* G_FNEG */
17899 type0, type0,
17900 /* G_FPEXT */
17901 type0, type1,
17902 /* G_FPTRUNC */
17903 type0, type1,
17904 /* G_FPTOSI */
17905 type0, type1,
17906 /* G_FPTOUI */
17907 type0, type1,
17908 /* G_SITOFP */
17909 type0, type1,
17910 /* G_UITOFP */
17911 type0, type1,
17912 /* G_FABS */
17913 type0, type0,
17914 /* G_FCOPYSIGN */
17915 type0, type0, type1,
17916 /* G_IS_FPCLASS */
17917 type0, type1, -1,
17918 /* G_FCANONICALIZE */
17919 type0, type0,
17920 /* G_FMINNUM */
17921 type0, type0, type0,
17922 /* G_FMAXNUM */
17923 type0, type0, type0,
17924 /* G_FMINNUM_IEEE */
17925 type0, type0, type0,
17926 /* G_FMAXNUM_IEEE */
17927 type0, type0, type0,
17928 /* G_FMINIMUM */
17929 type0, type0, type0,
17930 /* G_FMAXIMUM */
17931 type0, type0, type0,
17932 /* G_GET_FPENV */
17933 type0,
17934 /* G_SET_FPENV */
17935 type0,
17936 /* G_RESET_FPENV */
17937 /* G_GET_FPMODE */
17938 type0,
17939 /* G_SET_FPMODE */
17940 type0,
17941 /* G_RESET_FPMODE */
17942 /* G_PTR_ADD */
17943 ptype0, ptype0, type1,
17944 /* G_PTRMASK */
17945 ptype0, ptype0, type1,
17946 /* G_SMIN */
17947 type0, type0, type0,
17948 /* G_SMAX */
17949 type0, type0, type0,
17950 /* G_UMIN */
17951 type0, type0, type0,
17952 /* G_UMAX */
17953 type0, type0, type0,
17954 /* G_ABS */
17955 type0, type0,
17956 /* G_LROUND */
17957 type0, type1,
17958 /* G_LLROUND */
17959 type0, type1,
17960 /* G_BR */
17961 -1,
17962 /* G_BRJT */
17963 ptype0, -1, type1,
17964 /* G_VSCALE */
17965 type0, -1,
17966 /* G_INSERT_SUBVECTOR */
17967 type0, type0, type1, untyped_imm_0,
17968 /* G_EXTRACT_SUBVECTOR */
17969 type0, type0, untyped_imm_0,
17970 /* G_INSERT_VECTOR_ELT */
17971 type0, type0, type1, type2,
17972 /* G_EXTRACT_VECTOR_ELT */
17973 type0, type1, type2,
17974 /* G_SHUFFLE_VECTOR */
17975 type0, type1, type1, -1,
17976 /* G_SPLAT_VECTOR */
17977 type0, type1,
17978 /* G_VECTOR_COMPRESS */
17979 type0, type0, type1, type0,
17980 /* G_CTTZ */
17981 type0, type1,
17982 /* G_CTTZ_ZERO_UNDEF */
17983 type0, type1,
17984 /* G_CTLZ */
17985 type0, type1,
17986 /* G_CTLZ_ZERO_UNDEF */
17987 type0, type1,
17988 /* G_CTPOP */
17989 type0, type1,
17990 /* G_BSWAP */
17991 type0, type0,
17992 /* G_BITREVERSE */
17993 type0, type0,
17994 /* G_FCEIL */
17995 type0, type0,
17996 /* G_FCOS */
17997 type0, type0,
17998 /* G_FSIN */
17999 type0, type0,
18000 /* G_FTAN */
18001 type0, type0,
18002 /* G_FACOS */
18003 type0, type0,
18004 /* G_FASIN */
18005 type0, type0,
18006 /* G_FATAN */
18007 type0, type0,
18008 /* G_FCOSH */
18009 type0, type0,
18010 /* G_FSINH */
18011 type0, type0,
18012 /* G_FTANH */
18013 type0, type0,
18014 /* G_FSQRT */
18015 type0, type0,
18016 /* G_FFLOOR */
18017 type0, type0,
18018 /* G_FRINT */
18019 type0, type0,
18020 /* G_FNEARBYINT */
18021 type0, type0,
18022 /* G_ADDRSPACE_CAST */
18023 type0, type1,
18024 /* G_BLOCK_ADDR */
18025 type0, -1,
18026 /* G_JUMP_TABLE */
18027 type0, -1,
18028 /* G_DYN_STACKALLOC */
18029 ptype0, type1, i32imm,
18030 /* G_STACKSAVE */
18031 ptype0,
18032 /* G_STACKRESTORE */
18033 ptype0,
18034 /* G_STRICT_FADD */
18035 type0, type0, type0,
18036 /* G_STRICT_FSUB */
18037 type0, type0, type0,
18038 /* G_STRICT_FMUL */
18039 type0, type0, type0,
18040 /* G_STRICT_FDIV */
18041 type0, type0, type0,
18042 /* G_STRICT_FREM */
18043 type0, type0, type0,
18044 /* G_STRICT_FMA */
18045 type0, type0, type0, type0,
18046 /* G_STRICT_FSQRT */
18047 type0, type0,
18048 /* G_STRICT_FLDEXP */
18049 type0, type0, type1,
18050 /* G_READ_REGISTER */
18051 type0, -1,
18052 /* G_WRITE_REGISTER */
18053 -1, type0,
18054 /* G_MEMCPY */
18055 ptype0, ptype1, type2, untyped_imm_0,
18056 /* G_MEMCPY_INLINE */
18057 ptype0, ptype1, type2,
18058 /* G_MEMMOVE */
18059 ptype0, ptype1, type2, untyped_imm_0,
18060 /* G_MEMSET */
18061 ptype0, type1, type2, untyped_imm_0,
18062 /* G_BZERO */
18063 ptype0, type1, untyped_imm_0,
18064 /* G_TRAP */
18065 /* G_DEBUGTRAP */
18066 /* G_UBSANTRAP */
18067 i8imm,
18068 /* G_VECREDUCE_SEQ_FADD */
18069 type0, type1, type2,
18070 /* G_VECREDUCE_SEQ_FMUL */
18071 type0, type1, type2,
18072 /* G_VECREDUCE_FADD */
18073 type0, type1,
18074 /* G_VECREDUCE_FMUL */
18075 type0, type1,
18076 /* G_VECREDUCE_FMAX */
18077 type0, type1,
18078 /* G_VECREDUCE_FMIN */
18079 type0, type1,
18080 /* G_VECREDUCE_FMAXIMUM */
18081 type0, type1,
18082 /* G_VECREDUCE_FMINIMUM */
18083 type0, type1,
18084 /* G_VECREDUCE_ADD */
18085 type0, type1,
18086 /* G_VECREDUCE_MUL */
18087 type0, type1,
18088 /* G_VECREDUCE_AND */
18089 type0, type1,
18090 /* G_VECREDUCE_OR */
18091 type0, type1,
18092 /* G_VECREDUCE_XOR */
18093 type0, type1,
18094 /* G_VECREDUCE_SMAX */
18095 type0, type1,
18096 /* G_VECREDUCE_SMIN */
18097 type0, type1,
18098 /* G_VECREDUCE_UMAX */
18099 type0, type1,
18100 /* G_VECREDUCE_UMIN */
18101 type0, type1,
18102 /* G_SBFX */
18103 type0, type0, type1, type1,
18104 /* G_UBFX */
18105 type0, type0, type1, type1,
18106 /* ADA_ENTRY */
18107 GR64, adasym, ADDR64, imm64,
18108 /* ADA_ENTRY_VALUE */
18109 GR64, adasym, ADDR64, imm64,
18110 /* ADB_MemFoldPseudo */
18111 FP64, FP64, ADDR64, disp12imm64, ADDR64,
18112 /* ADJCALLSTACKDOWN */
18113 i64imm, i64imm,
18114 /* ADJCALLSTACKUP */
18115 i64imm, i64imm,
18116 /* ADJDYNALLOC */
18117 GR64, ADDR64, disp12imm64, ADDR64,
18118 /* AEB_MemFoldPseudo */
18119 FP32, FP32, ADDR64, disp12imm64, ADDR64,
18120 /* AEXT128 */
18121 GR128, GR64,
18122 /* AFIMux */
18123 GRX32, GRX32, simm32,
18124 /* AG_MemFoldPseudo */
18125 GR64, GR64, ADDR64, disp20imm64, ADDR64,
18126 /* AHIMux */
18127 GRX32, GRX32, imm32sx16,
18128 /* AHIMuxK */
18129 GRX32, GRX32, imm32sx16,
18130 /* ALG_MemFoldPseudo */
18131 GR64, GR64, ADDR64, disp20imm64, ADDR64,
18132 /* AL_MemFoldPseudo */
18133 GR32, GR32, ADDR64, disp12imm64, ADDR64,
18134 /* ATOMIC_CMP_SWAPW */
18135 GR32, ADDR64, disp20imm64, GR32, GR32, ADDR32, ADDR32, uimm32,
18136 /* ATOMIC_LOADW_AFI */
18137 GR32, ADDR64, disp20imm64, simm32, ADDR32, ADDR32, uimm32,
18138 /* ATOMIC_LOADW_AR */
18139 GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32,
18140 /* ATOMIC_LOADW_MAX */
18141 GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32,
18142 /* ATOMIC_LOADW_MIN */
18143 GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32,
18144 /* ATOMIC_LOADW_NILH */
18145 GR32, ADDR64, disp20imm64, imm32lh16c, ADDR32, ADDR32, uimm32,
18146 /* ATOMIC_LOADW_NILHi */
18147 GR32, ADDR64, disp20imm64, imm32lh16c, ADDR32, ADDR32, uimm32,
18148 /* ATOMIC_LOADW_NR */
18149 GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32,
18150 /* ATOMIC_LOADW_NRi */
18151 GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32,
18152 /* ATOMIC_LOADW_OILH */
18153 GR32, ADDR64, disp20imm64, imm32lh16, ADDR32, ADDR32, uimm32,
18154 /* ATOMIC_LOADW_OR */
18155 GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32,
18156 /* ATOMIC_LOADW_SR */
18157 GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32,
18158 /* ATOMIC_LOADW_UMAX */
18159 GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32,
18160 /* ATOMIC_LOADW_UMIN */
18161 GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32,
18162 /* ATOMIC_LOADW_XILF */
18163 GR32, ADDR64, disp20imm64, uimm32, ADDR32, ADDR32, uimm32,
18164 /* ATOMIC_LOADW_XR */
18165 GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32,
18166 /* ATOMIC_SWAPW */
18167 GR32, ADDR64, disp20imm64, GR32, ADDR32, ADDR32, uimm32,
18168 /* A_MemFoldPseudo */
18169 GR32, GR32, ADDR64, disp12imm64, ADDR64,
18170 /* CFIMux */
18171 GRX32, simm32,
18172 /* CGIBCall */
18173 GR64, imm64sx8, cond4, ADDR64,
18174 /* CGIBReturn */
18175 GR64, imm64sx8, cond4,
18176 /* CGRBCall */
18177 GR64, GR64, cond4, ADDR64,
18178 /* CGRBReturn */
18179 GR64, GR64, cond4,
18180 /* CHIMux */
18181 GRX32, imm32sx16,
18182 /* CIBCall */
18183 GR32, imm32sx8, cond4, ADDR64,
18184 /* CIBReturn */
18185 GR32, imm32sx8, cond4,
18186 /* CLCImm */
18187 ADDR64, disp12imm64, ADDR64, disp12imm64, imm64,
18188 /* CLCReg */
18189 ADDR64, disp12imm64, ADDR64, disp12imm64, ADDR64,
18190 /* CLFIMux */
18191 GRX32, uimm32,
18192 /* CLGIBCall */
18193 GR64, imm64zx8, cond4, ADDR64,
18194 /* CLGIBReturn */
18195 GR64, imm64zx8, cond4,
18196 /* CLGRBCall */
18197 GR64, GR64, cond4, ADDR64,
18198 /* CLGRBReturn */
18199 GR64, GR64, cond4,
18200 /* CLIBCall */
18201 GR32, imm32zx8, cond4, ADDR64,
18202 /* CLIBReturn */
18203 GR32, imm32zx8, cond4,
18204 /* CLMux */
18205 GRX32, ADDR64, disp20imm64, ADDR64,
18206 /* CLRBCall */
18207 GR32, GR32, cond4, ADDR64,
18208 /* CLRBReturn */
18209 GR32, GR32, cond4,
18210 /* CLSTLoop */
18211 GR64, GR64, GR64, GR32,
18212 /* CMux */
18213 GRX32, ADDR64, disp20imm64, ADDR64,
18214 /* CRBCall */
18215 GR32, GR32, cond4, ADDR64,
18216 /* CRBReturn */
18217 GR32, GR32, cond4,
18218 /* CallBASR */
18219 ADDR64,
18220 /* CallBASR_STACKEXT */
18221 ADDR64,
18222 /* CallBASR_XPLINK64 */
18223 ADDR64,
18224 /* CallBCR */
18225 cond4, cond4, ADDR64,
18226 /* CallBR */
18227 ADDR64,
18228 /* CallBRASL */
18229 pcrel32,
18230 /* CallBRASL_XPLINK64 */
18231 pcrel32,
18232 /* CallBRCL */
18233 cond4, cond4, pcrel32,
18234 /* CallJG */
18235 pcrel32,
18236 /* CondReturn */
18237 cond4, cond4,
18238 /* CondReturn_XPLINK */
18239 cond4, cond4,
18240 /* CondStore16 */
18241 GR32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18242 /* CondStore16Inv */
18243 GR32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18244 /* CondStore16Mux */
18245 GRX32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18246 /* CondStore16MuxInv */
18247 GRX32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18248 /* CondStore32 */
18249 GR32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18250 /* CondStore32Inv */
18251 GR32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18252 /* CondStore32Mux */
18253 GRX32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18254 /* CondStore32MuxInv */
18255 GRX32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18256 /* CondStore64 */
18257 GR64, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18258 /* CondStore64Inv */
18259 GR64, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18260 /* CondStore8 */
18261 GR32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18262 /* CondStore8Inv */
18263 GR32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18264 /* CondStore8Mux */
18265 GRX32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18266 /* CondStore8MuxInv */
18267 GRX32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18268 /* CondStoreF32 */
18269 FP32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18270 /* CondStoreF32Inv */
18271 FP32, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18272 /* CondStoreF64 */
18273 FP64, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18274 /* CondStoreF64Inv */
18275 FP64, ADDR64, disp20imm64, ADDR64, imm32zx4, imm32zx4,
18276 /* CondTrap */
18277 cond4, cond4,
18278 /* DDB_MemFoldPseudo */
18279 FP64, FP64, ADDR64, disp12imm64, ADDR64,
18280 /* DEB_MemFoldPseudo */
18281 FP32, FP32, ADDR64, disp12imm64, ADDR64,
18282 /* EXRL_Pseudo */
18283 i64imm, ADDR64, ADDR64, disp12imm64, ADDR64, disp12imm64,
18284 /* GOT */
18285 GR64,
18286 /* IIFMux */
18287 GRX32, uimm32,
18288 /* IIHF64 */
18289 GR64, GR64, imm64hf32,
18290 /* IIHH64 */
18291 GR64, GR64, imm64hh16,
18292 /* IIHL64 */
18293 GR64, GR64, imm64hl16,
18294 /* IIHMux */
18295 GRX32, GRX32, imm32lh16,
18296 /* IILF64 */
18297 GR64, GR64, imm64lf32,
18298 /* IILH64 */
18299 GR64, GR64, imm64lh16,
18300 /* IILL64 */
18301 GR64, GR64, imm64ll16,
18302 /* IILMux */
18303 GRX32, GRX32, imm32ll16,
18304 /* L128 */
18305 GR128, ADDR64, disp20imm64, ADDR64,
18306 /* LBMux */
18307 GRX32, ADDR64, disp20imm64, ADDR64,
18308 /* LEFR */
18309 VR32, GR32,
18310 /* LFER */
18311 GR64, VR32,
18312 /* LHIMux */
18313 GRX32, imm32sx16,
18314 /* LHMux */
18315 GRX32, ADDR64, disp20imm64, ADDR64,
18316 /* LLCMux */
18317 GRX32, ADDR64, disp20imm64, ADDR64,
18318 /* LLCRMux */
18319 GRX32, GRX32,
18320 /* LLHMux */
18321 GRX32, ADDR64, disp20imm64, ADDR64,
18322 /* LLHRMux */
18323 GRX32, GRX32,
18324 /* LMux */
18325 GRX32, ADDR64, disp20imm64, ADDR64,
18326 /* LOCG_MemFoldPseudo */
18327 GR64, GR64, ADDR64, disp20imm64, cond4, cond4,
18328 /* LOCHIMux */
18329 GRX32, GRX32, imm32sx16, cond4, cond4,
18330 /* LOCMux */
18331 GRX32, GRX32, ADDR64, disp20imm64, cond4, cond4,
18332 /* LOCMux_MemFoldPseudo */
18333 GRX32, GRX32, ADDR64, disp20imm64, cond4, cond4,
18334 /* LOCRMux */
18335 GRX32, GRX32, GRX32, cond4, cond4,
18336 /* LTDBRCompare_Pseudo */
18337 FP64,
18338 /* LTEBRCompare_Pseudo */
18339 FP32,
18340 /* LTXBRCompare_Pseudo */
18341 FP128,
18342 /* LX */
18343 FP128, ADDR64, disp20imm64, ADDR64,
18344 /* MADB_MemFoldPseudo */
18345 FP64, FP64, FP64, ADDR64, disp12imm64, ADDR64,
18346 /* MAEB_MemFoldPseudo */
18347 FP32, FP32, FP32, ADDR64, disp12imm64, ADDR64,
18348 /* MDB_MemFoldPseudo */
18349 FP64, FP64, ADDR64, disp12imm64, ADDR64,
18350 /* MEEB_MemFoldPseudo */
18351 FP32, FP32, ADDR64, disp12imm64, ADDR64,
18352 /* MSC_MemFoldPseudo */
18353 GR32, GR32, ADDR64, disp20imm64, ADDR64,
18354 /* MSDB_MemFoldPseudo */
18355 FP64, FP64, FP64, ADDR64, disp12imm64, ADDR64,
18356 /* MSEB_MemFoldPseudo */
18357 FP32, FP32, FP32, ADDR64, disp12imm64, ADDR64,
18358 /* MSGC_MemFoldPseudo */
18359 GR64, GR64, ADDR64, disp20imm64, ADDR64,
18360 /* MVCImm */
18361 ADDR64, disp12imm64, ADDR64, disp12imm64, imm64,
18362 /* MVCReg */
18363 ADDR64, disp12imm64, ADDR64, disp12imm64, ADDR64,
18364 /* MVSTLoop */
18365 GR64, GR64, GR64, GR32,
18366 /* MemsetImmImm */
18367 ADDR64, disp12imm64, imm64, imm32zx8trunc,
18368 /* MemsetImmReg */
18369 ADDR64, disp12imm64, imm64, GR32,
18370 /* MemsetRegImm */
18371 ADDR64, disp12imm64, ADDR64, imm32zx8trunc,
18372 /* MemsetRegReg */
18373 ADDR64, disp12imm64, ADDR64, GR32,
18374 /* NCImm */
18375 ADDR64, disp12imm64, ADDR64, disp12imm64, imm64,
18376 /* NCReg */
18377 ADDR64, disp12imm64, ADDR64, disp12imm64, ADDR64,
18378 /* NG_MemFoldPseudo */
18379 GR64, GR64, ADDR64, disp20imm64, ADDR64,
18380 /* NIFMux */
18381 GRX32, GRX32, uimm32,
18382 /* NIHF64 */
18383 GR64, GR64, imm64hf32c,
18384 /* NIHH64 */
18385 GR64, GR64, imm64hh16c,
18386 /* NIHL64 */
18387 GR64, GR64, imm64hl16c,
18388 /* NIHMux */
18389 GRX32, GRX32, imm32lh16c,
18390 /* NILF64 */
18391 GR64, GR64, imm64lf32c,
18392 /* NILH64 */
18393 GR64, GR64, imm64lh16c,
18394 /* NILL64 */
18395 GR64, GR64, imm64ll16c,
18396 /* NILMux */
18397 GRX32, GRX32, imm32ll16c,
18398 /* N_MemFoldPseudo */
18399 GR32, GR32, ADDR64, disp12imm64, ADDR64,
18400 /* OCImm */
18401 ADDR64, disp12imm64, ADDR64, disp12imm64, imm64,
18402 /* OCReg */
18403 ADDR64, disp12imm64, ADDR64, disp12imm64, ADDR64,
18404 /* OG_MemFoldPseudo */
18405 GR64, GR64, ADDR64, disp20imm64, ADDR64,
18406 /* OIFMux */
18407 GRX32, GRX32, uimm32,
18408 /* OIHF64 */
18409 GR64, GR64, imm64hf32,
18410 /* OIHH64 */
18411 GR64, GR64, imm64hh16,
18412 /* OIHL64 */
18413 GR64, GR64, imm64hl16,
18414 /* OIHMux */
18415 GRX32, GRX32, imm32lh16,
18416 /* OILF64 */
18417 GR64, GR64, imm64lf32,
18418 /* OILH64 */
18419 GR64, GR64, imm64lh16,
18420 /* OILL64 */
18421 GR64, GR64, imm64ll16,
18422 /* OILMux */
18423 GRX32, GRX32, imm32ll16,
18424 /* O_MemFoldPseudo */
18425 GR32, GR32, ADDR64, disp12imm64, ADDR64,
18426 /* PAIR128 */
18427 GR128, GR64, GR64,
18428 /* PROBED_ALLOCA */
18429 GR64, GR64, GR64,
18430 /* PROBED_STACKALLOC */
18431 i64imm,
18432 /* RISBHH */
18433 GRH32, GRH32, GRH32, imm32zx8, imm32zx8, imm32zx8,
18434 /* RISBHL */
18435 GRH32, GRH32, GR32, imm32zx8, imm32zx8, imm32zx8,
18436 /* RISBLH */
18437 GR32, GR32, GRH32, imm32zx8, imm32zx8, imm32zx8,
18438 /* RISBLL */
18439 GR32, GR32, GR32, imm32zx8, imm32zx8, imm32zx8,
18440 /* RISBMux */
18441 GRX32, GRX32, GRX32, imm32zx8, imm32zx8, imm32zx8,
18442 /* Return */
18443 /* Return_XPLINK */
18444 /* SCmp128Hi */
18445 VR128, VR128,
18446 /* SDB_MemFoldPseudo */
18447 FP64, FP64, ADDR64, disp12imm64, ADDR64,
18448 /* SEB_MemFoldPseudo */
18449 FP32, FP32, ADDR64, disp12imm64, ADDR64,
18450 /* SELRMux */
18451 GRX32, GRX32, GRX32, cond4, cond4,
18452 /* SG_MemFoldPseudo */
18453 GR64, GR64, ADDR64, disp20imm64, ADDR64,
18454 /* SLG_MemFoldPseudo */
18455 GR64, GR64, ADDR64, disp20imm64, ADDR64,
18456 /* SL_MemFoldPseudo */
18457 GR32, GR32, ADDR64, disp12imm64, ADDR64,
18458 /* SRSTLoop */
18459 GR64, GR64, GR64, GR32,
18460 /* ST128 */
18461 GR128, ADDR64, disp20imm64, ADDR64,
18462 /* STCMux */
18463 GRX32, ADDR64, disp20imm64, ADDR64,
18464 /* STHMux */
18465 GRX32, ADDR64, disp20imm64, ADDR64,
18466 /* STMux */
18467 GRX32, ADDR64, disp20imm64, ADDR64,
18468 /* STOCMux */
18469 GRX32, ADDR64, disp20imm64, cond4, cond4,
18470 /* STX */
18471 FP128, ADDR64, disp20imm64, ADDR64,
18472 /* S_MemFoldPseudo */
18473 GR32, GR32, ADDR64, disp12imm64, ADDR64,
18474 /* Select128 */
18475 VR128, VR128, VR128, imm32zx4, imm32zx4,
18476 /* Select32 */
18477 GR32, GR32, GR32, imm32zx4, imm32zx4,
18478 /* Select64 */
18479 GR64, GR64, GR64, imm32zx4, imm32zx4,
18480 /* SelectF128 */
18481 FP128, FP128, FP128, imm32zx4, imm32zx4,
18482 /* SelectF32 */
18483 FP32, FP32, FP32, imm32zx4, imm32zx4,
18484 /* SelectF64 */
18485 FP64, FP64, FP64, imm32zx4, imm32zx4,
18486 /* SelectVR128 */
18487 VR128, VR128, VR128, imm32zx4, imm32zx4,
18488 /* SelectVR32 */
18489 VR32, VR32, VR32, imm32zx4, imm32zx4,
18490 /* SelectVR64 */
18491 VR64, VR64, VR64, imm32zx4, imm32zx4,
18492 /* Serialize */
18493 /* TBEGIN_nofloat */
18494 ADDR64, disp12imm64, imm32zx16,
18495 /* TLS_GDCALL */
18496 tlssym,
18497 /* TLS_LDCALL */
18498 tlssym,
18499 /* TMHH64 */
18500 GR64, imm64hh16,
18501 /* TMHL64 */
18502 GR64, imm64hl16,
18503 /* TMHMux */
18504 GRX32, imm32lh16,
18505 /* TMLH64 */
18506 GR64, imm64lh16,
18507 /* TMLL64 */
18508 GR64, imm64ll16,
18509 /* TMLMux */
18510 GRX32, imm32ll16,
18511 /* Trap */
18512 /* UCmp128Hi */
18513 VR128, VR128,
18514 /* VL32 */
18515 VR32, ADDR64, disp12imm64, ADDR64,
18516 /* VL64 */
18517 VR64, ADDR64, disp12imm64, ADDR64,
18518 /* VLR32 */
18519 VR32, VR32,
18520 /* VLR64 */
18521 VR64, VR64,
18522 /* VLVGP32 */
18523 VR128, GR32, GR32,
18524 /* VST32 */
18525 VR32, ADDR64, disp12imm64, ADDR64,
18526 /* VST64 */
18527 VR64, ADDR64, disp12imm64, ADDR64,
18528 /* XCImm */
18529 ADDR64, disp12imm64, ADDR64, disp12imm64, imm64,
18530 /* XCReg */
18531 ADDR64, disp12imm64, ADDR64, disp12imm64, ADDR64,
18532 /* XG_MemFoldPseudo */
18533 GR64, GR64, ADDR64, disp20imm64, ADDR64,
18534 /* XIFMux */
18535 GRX32, GRX32, uimm32,
18536 /* XIHF64 */
18537 GR64, GR64, imm64hf32,
18538 /* XILF64 */
18539 GR64, GR64, imm64lf32,
18540 /* XPLINK_STACKALLOC */
18541 /* X_MemFoldPseudo */
18542 GR32, GR32, ADDR64, disp12imm64, ADDR64,
18543 /* ZEXT128 */
18544 GR128, GR64,
18545 /* A */
18546 GR32, GR32, ADDR64, disp12imm64, ADDR64,
18547 /* AD */
18548 FP64, FP64, ADDR64, disp12imm64, ADDR64,
18549 /* ADB */
18550 FP64, FP64, ADDR64, disp12imm64, ADDR64,
18551 /* ADBR */
18552 FP64, FP64, FP64,
18553 /* ADR */
18554 FP64, FP64, FP64,
18555 /* ADTR */
18556 FP64, FP64, FP64,
18557 /* ADTRA */
18558 FP64, FP64, FP64, imm32zx4,
18559 /* AE */
18560 FP32, FP32, ADDR64, disp12imm64, ADDR64,
18561 /* AEB */
18562 FP32, FP32, ADDR64, disp12imm64, ADDR64,
18563 /* AEBR */
18564 FP32, FP32, FP32,
18565 /* AER */
18566 FP32, FP32, FP32,
18567 /* AFI */
18568 GR32, GR32, simm32,
18569 /* AG */
18570 GR64, GR64, ADDR64, disp20imm64, ADDR64,
18571 /* AGF */
18572 GR64, GR64, ADDR64, disp20imm64, ADDR64,
18573 /* AGFI */
18574 GR64, GR64, imm64sx32,
18575 /* AGFR */
18576 GR64, GR64, GR32,
18577 /* AGH */
18578 GR64, GR64, ADDR64, disp20imm64, ADDR64,
18579 /* AGHI */
18580 GR64, GR64, imm64sx16,
18581 /* AGHIK */
18582 GR64, GR64, imm64sx16,
18583 /* AGR */
18584 GR64, GR64, GR64,
18585 /* AGRK */
18586 GR64, GR64, GR64,
18587 /* AGSI */
18588 ADDR64, disp20imm64, imm64sx8,
18589 /* AH */
18590 GR32, GR32, ADDR64, disp12imm64, ADDR64,
18591 /* AHHHR */
18592 GRH32, GRH32, GRH32,
18593 /* AHHLR */
18594 GRH32, GRH32, GR32,
18595 /* AHI */
18596 GR32, GR32, imm32sx16,
18597 /* AHIK */
18598 GR32, GR32, imm32sx16,
18599 /* AHY */
18600 GR32, GR32, ADDR64, disp20imm64, ADDR64,
18601 /* AIH */
18602 GRH32, GRH32, simm32,
18603 /* AL */
18604 GR32, GR32, ADDR64, disp12imm64, ADDR64,
18605 /* ALC */
18606 GR32, GR32, ADDR64, disp20imm64, ADDR64,
18607 /* ALCG */
18608 GR64, GR64, ADDR64, disp20imm64, ADDR64,
18609 /* ALCGR */
18610 GR64, GR64, GR64,
18611 /* ALCR */
18612 GR32, GR32, GR32,
18613 /* ALFI */
18614 GR32, GR32, uimm32,
18615 /* ALG */
18616 GR64, GR64, ADDR64, disp20imm64, ADDR64,
18617 /* ALGF */
18618 GR64, GR64, ADDR64, disp20imm64, ADDR64,
18619 /* ALGFI */
18620 GR64, GR64, imm64zx32,
18621 /* ALGFR */
18622 GR64, GR64, GR32,
18623 /* ALGHSIK */
18624 GR64, GR64, imm64sx16,
18625 /* ALGR */
18626 GR64, GR64, GR64,
18627 /* ALGRK */
18628 GR64, GR64, GR64,
18629 /* ALGSI */
18630 ADDR64, disp20imm64, imm64sx8,
18631 /* ALHHHR */
18632 GRH32, GRH32, GRH32,
18633 /* ALHHLR */
18634 GRH32, GRH32, GR32,
18635 /* ALHSIK */
18636 GR32, GR32, imm32sx16,
18637 /* ALR */
18638 GR32, GR32, GR32,
18639 /* ALRK */
18640 GR32, GR32, GR32,
18641 /* ALSI */
18642 ADDR64, disp20imm64, imm32sx8,
18643 /* ALSIH */
18644 GRH32, GRH32, simm32,
18645 /* ALSIHN */
18646 GRH32, GRH32, simm32,
18647 /* ALY */
18648 GR32, GR32, ADDR64, disp20imm64, ADDR64,
18649 /* AP */
18650 ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64,
18651 /* AR */
18652 GR32, GR32, GR32,
18653 /* ARK */
18654 GR32, GR32, GR32,
18655 /* ASI */
18656 ADDR64, disp20imm64, imm32sx8,
18657 /* AU */
18658 FP32, FP32, ADDR64, disp12imm64, ADDR64,
18659 /* AUR */
18660 FP32, FP32, FP32,
18661 /* AW */
18662 FP64, FP64, ADDR64, disp12imm64, ADDR64,
18663 /* AWR */
18664 FP64, FP64, FP64,
18665 /* AXBR */
18666 FP128, FP128, FP128,
18667 /* AXR */
18668 FP128, FP128, FP128,
18669 /* AXTR */
18670 FP128, FP128, FP128,
18671 /* AXTRA */
18672 FP128, FP128, FP128, imm32zx4,
18673 /* AY */
18674 GR32, GR32, ADDR64, disp20imm64, ADDR64,
18675 /* B */
18676 ADDR64, disp12imm64, ADDR64,
18677 /* BAKR */
18678 GR64, GR64,
18679 /* BAL */
18680 GR64, ADDR64, disp12imm64, ADDR64,
18681 /* BALR */
18682 GR64, ADDR64,
18683 /* BAS */
18684 GR64, ADDR64, disp12imm64, ADDR64,
18685 /* BASR */
18686 GR64, ADDR64,
18687 /* BASSM */
18688 GR64, ADDR64,
18689 /* BAsmE */
18690 ADDR64, disp12imm64, ADDR64,
18691 /* BAsmH */
18692 ADDR64, disp12imm64, ADDR64,
18693 /* BAsmHE */
18694 ADDR64, disp12imm64, ADDR64,
18695 /* BAsmL */
18696 ADDR64, disp12imm64, ADDR64,
18697 /* BAsmLE */
18698 ADDR64, disp12imm64, ADDR64,
18699 /* BAsmLH */
18700 ADDR64, disp12imm64, ADDR64,
18701 /* BAsmM */
18702 ADDR64, disp12imm64, ADDR64,
18703 /* BAsmNE */
18704 ADDR64, disp12imm64, ADDR64,
18705 /* BAsmNH */
18706 ADDR64, disp12imm64, ADDR64,
18707 /* BAsmNHE */
18708 ADDR64, disp12imm64, ADDR64,
18709 /* BAsmNL */
18710 ADDR64, disp12imm64, ADDR64,
18711 /* BAsmNLE */
18712 ADDR64, disp12imm64, ADDR64,
18713 /* BAsmNLH */
18714 ADDR64, disp12imm64, ADDR64,
18715 /* BAsmNM */
18716 ADDR64, disp12imm64, ADDR64,
18717 /* BAsmNO */
18718 ADDR64, disp12imm64, ADDR64,
18719 /* BAsmNP */
18720 ADDR64, disp12imm64, ADDR64,
18721 /* BAsmNZ */
18722 ADDR64, disp12imm64, ADDR64,
18723 /* BAsmO */
18724 ADDR64, disp12imm64, ADDR64,
18725 /* BAsmP */
18726 ADDR64, disp12imm64, ADDR64,
18727 /* BAsmZ */
18728 ADDR64, disp12imm64, ADDR64,
18729 /* BC */
18730 cond4, cond4, ADDR64, disp12imm64, ADDR64,
18731 /* BCAsm */
18732 imm32zx4, ADDR64, disp12imm64, ADDR64,
18733 /* BCR */
18734 cond4, cond4, GR64,
18735 /* BCRAsm */
18736 imm32zx4, GR64,
18737 /* BCT */
18738 GR32, GR32, ADDR64, disp12imm64, ADDR64,
18739 /* BCTG */
18740 GR64, GR64, ADDR64, disp20imm64, ADDR64,
18741 /* BCTGR */
18742 GR64, GR64, GR64,
18743 /* BCTR */
18744 GR32, GR32, GR64,
18745 /* BI */
18746 ADDR64, disp20imm64, ADDR64,
18747 /* BIAsmE */
18748 ADDR64, disp20imm64, ADDR64,
18749 /* BIAsmH */
18750 ADDR64, disp20imm64, ADDR64,
18751 /* BIAsmHE */
18752 ADDR64, disp20imm64, ADDR64,
18753 /* BIAsmL */
18754 ADDR64, disp20imm64, ADDR64,
18755 /* BIAsmLE */
18756 ADDR64, disp20imm64, ADDR64,
18757 /* BIAsmLH */
18758 ADDR64, disp20imm64, ADDR64,
18759 /* BIAsmM */
18760 ADDR64, disp20imm64, ADDR64,
18761 /* BIAsmNE */
18762 ADDR64, disp20imm64, ADDR64,
18763 /* BIAsmNH */
18764 ADDR64, disp20imm64, ADDR64,
18765 /* BIAsmNHE */
18766 ADDR64, disp20imm64, ADDR64,
18767 /* BIAsmNL */
18768 ADDR64, disp20imm64, ADDR64,
18769 /* BIAsmNLE */
18770 ADDR64, disp20imm64, ADDR64,
18771 /* BIAsmNLH */
18772 ADDR64, disp20imm64, ADDR64,
18773 /* BIAsmNM */
18774 ADDR64, disp20imm64, ADDR64,
18775 /* BIAsmNO */
18776 ADDR64, disp20imm64, ADDR64,
18777 /* BIAsmNP */
18778 ADDR64, disp20imm64, ADDR64,
18779 /* BIAsmNZ */
18780 ADDR64, disp20imm64, ADDR64,
18781 /* BIAsmO */
18782 ADDR64, disp20imm64, ADDR64,
18783 /* BIAsmP */
18784 ADDR64, disp20imm64, ADDR64,
18785 /* BIAsmZ */
18786 ADDR64, disp20imm64, ADDR64,
18787 /* BIC */
18788 cond4, cond4, ADDR64, disp20imm64, ADDR64,
18789 /* BICAsm */
18790 imm32zx4, ADDR64, disp20imm64, ADDR64,
18791 /* BPP */
18792 imm32zx4, brtarget16bpp, ADDR64, disp12imm64,
18793 /* BPRP */
18794 imm32zx4, brtarget12bpp, brtarget24bpp,
18795 /* BR */
18796 ADDR64,
18797 /* BRAS */
18798 GR64, brtarget16, tlssym,
18799 /* BRASL */
18800 GR64, brtarget32, tlssym,
18801 /* BRAsmE */
18802 ADDR64,
18803 /* BRAsmH */
18804 ADDR64,
18805 /* BRAsmHE */
18806 ADDR64,
18807 /* BRAsmL */
18808 ADDR64,
18809 /* BRAsmLE */
18810 ADDR64,
18811 /* BRAsmLH */
18812 ADDR64,
18813 /* BRAsmM */
18814 ADDR64,
18815 /* BRAsmNE */
18816 ADDR64,
18817 /* BRAsmNH */
18818 ADDR64,
18819 /* BRAsmNHE */
18820 ADDR64,
18821 /* BRAsmNL */
18822 ADDR64,
18823 /* BRAsmNLE */
18824 ADDR64,
18825 /* BRAsmNLH */
18826 ADDR64,
18827 /* BRAsmNM */
18828 ADDR64,
18829 /* BRAsmNO */
18830 ADDR64,
18831 /* BRAsmNP */
18832 ADDR64,
18833 /* BRAsmNZ */
18834 ADDR64,
18835 /* BRAsmO */
18836 ADDR64,
18837 /* BRAsmP */
18838 ADDR64,
18839 /* BRAsmZ */
18840 ADDR64,
18841 /* BRC */
18842 cond4, cond4, brtarget16,
18843 /* BRCAsm */
18844 imm32zx4, brtarget16,
18845 /* BRCL */
18846 cond4, cond4, brtarget32,
18847 /* BRCLAsm */
18848 imm32zx4, brtarget32,
18849 /* BRCT */
18850 GR32, GR32, brtarget16,
18851 /* BRCTG */
18852 GR64, GR64, brtarget16,
18853 /* BRCTH */
18854 GRH32, GRH32, brtarget32,
18855 /* BRXH */
18856 GR32, GR32, GR32, brtarget16,
18857 /* BRXHG */
18858 GR64, GR64, GR64, brtarget16,
18859 /* BRXLE */
18860 GR32, GR32, GR32, brtarget16,
18861 /* BRXLG */
18862 GR64, GR64, GR64, brtarget16,
18863 /* BSA */
18864 GR64, GR64,
18865 /* BSG */
18866 GR64, GR64,
18867 /* BSM */
18868 GR64, ADDR64,
18869 /* BXH */
18870 GR32, GR32, GR32, ADDR64, disp12imm64,
18871 /* BXHG */
18872 GR64, GR64, GR64, ADDR64, disp20imm64,
18873 /* BXLE */
18874 GR32, GR32, GR32, ADDR64, disp12imm64,
18875 /* BXLEG */
18876 GR64, GR64, GR64, ADDR64, disp20imm64,
18877 /* C */
18878 GR32, ADDR64, disp12imm64, ADDR64,
18879 /* CD */
18880 FP64, ADDR64, disp12imm64, ADDR64,
18881 /* CDB */
18882 FP64, ADDR64, disp12imm64, ADDR64,
18883 /* CDBR */
18884 FP64, FP64,
18885 /* CDFBR */
18886 FP64, GR32,
18887 /* CDFBRA */
18888 FP64, imm32zx4, GR32, imm32zx4,
18889 /* CDFR */
18890 FP64, GR32,
18891 /* CDFTR */
18892 FP64, imm32zx4, GR32, imm32zx4,
18893 /* CDGBR */
18894 FP64, GR64,
18895 /* CDGBRA */
18896 FP64, imm32zx4, GR64, imm32zx4,
18897 /* CDGR */
18898 FP64, GR64,
18899 /* CDGTR */
18900 FP64, GR64,
18901 /* CDGTRA */
18902 FP64, imm32zx4, GR64, imm32zx4,
18903 /* CDLFBR */
18904 FP64, imm32zx4, GR32, imm32zx4,
18905 /* CDLFTR */
18906 FP64, imm32zx4, GR32, imm32zx4,
18907 /* CDLGBR */
18908 FP64, imm32zx4, GR64, imm32zx4,
18909 /* CDLGTR */
18910 FP64, imm32zx4, GR64, imm32zx4,
18911 /* CDPT */
18912 FP64, ADDR64, disp12imm64, len8imm64, imm32zx4,
18913 /* CDR */
18914 FP64, FP64,
18915 /* CDS */
18916 GR128, GR128, GR128, ADDR64, disp12imm64,
18917 /* CDSG */
18918 GR128, GR128, GR128, ADDR64, disp20imm64,
18919 /* CDSTR */
18920 FP64, GR64,
18921 /* CDSY */
18922 GR128, GR128, GR128, ADDR64, disp20imm64,
18923 /* CDTR */
18924 FP64, FP64,
18925 /* CDUTR */
18926 FP64, GR64,
18927 /* CDZT */
18928 FP64, ADDR64, disp12imm64, len8imm64, imm32zx4,
18929 /* CE */
18930 FP32, ADDR64, disp12imm64, ADDR64,
18931 /* CEB */
18932 FP32, ADDR64, disp12imm64, ADDR64,
18933 /* CEBR */
18934 FP32, FP32,
18935 /* CEDTR */
18936 FP64, FP64,
18937 /* CEFBR */
18938 FP32, GR32,
18939 /* CEFBRA */
18940 FP32, imm32zx4, GR32, imm32zx4,
18941 /* CEFR */
18942 FP32, GR32,
18943 /* CEGBR */
18944 FP32, GR64,
18945 /* CEGBRA */
18946 FP32, imm32zx4, GR64, imm32zx4,
18947 /* CEGR */
18948 FP32, GR64,
18949 /* CELFBR */
18950 FP32, imm32zx4, GR32, imm32zx4,
18951 /* CELGBR */
18952 FP32, imm32zx4, GR64, imm32zx4,
18953 /* CER */
18954 FP32, FP32,
18955 /* CEXTR */
18956 FP128, FP128,
18957 /* CFC */
18958 ADDR64, disp12imm64,
18959 /* CFDBR */
18960 GR32, imm32zx4, FP64,
18961 /* CFDBRA */
18962 GR32, imm32zx4, FP64, imm32zx4,
18963 /* CFDR */
18964 GR32, imm32zx4, FP64,
18965 /* CFDTR */
18966 GR32, imm32zx4, FP64, imm32zx4,
18967 /* CFEBR */
18968 GR32, imm32zx4, FP32,
18969 /* CFEBRA */
18970 GR32, imm32zx4, FP32, imm32zx4,
18971 /* CFER */
18972 GR32, imm32zx4, FP32,
18973 /* CFI */
18974 GR32, simm32,
18975 /* CFXBR */
18976 GR32, imm32zx4, FP128,
18977 /* CFXBRA */
18978 GR32, imm32zx4, FP128, imm32zx4,
18979 /* CFXR */
18980 GR32, imm32zx4, FP128,
18981 /* CFXTR */
18982 GR32, imm32zx4, FP128, imm32zx4,
18983 /* CG */
18984 GR64, ADDR64, disp20imm64, ADDR64,
18985 /* CGDBR */
18986 GR64, imm32zx4, FP64,
18987 /* CGDBRA */
18988 GR64, imm32zx4, FP64, imm32zx4,
18989 /* CGDR */
18990 GR64, imm32zx4, FP64,
18991 /* CGDTR */
18992 GR64, imm32zx4, FP64,
18993 /* CGDTRA */
18994 GR64, imm32zx4, FP64, imm32zx4,
18995 /* CGEBR */
18996 GR64, imm32zx4, FP32,
18997 /* CGEBRA */
18998 GR64, imm32zx4, FP32, imm32zx4,
18999 /* CGER */
19000 GR64, imm32zx4, FP32,
19001 /* CGF */
19002 GR64, ADDR64, disp20imm64, ADDR64,
19003 /* CGFI */
19004 GR64, imm64sx32,
19005 /* CGFR */
19006 GR64, GR32,
19007 /* CGFRL */
19008 GR64, pcrel32,
19009 /* CGH */
19010 GR64, ADDR64, disp20imm64, ADDR64,
19011 /* CGHI */
19012 GR64, imm64sx16,
19013 /* CGHRL */
19014 GR64, pcrel32,
19015 /* CGHSI */
19016 ADDR64, disp12imm64, imm64sx16,
19017 /* CGIB */
19018 GR64, imm64sx8, cond4, ADDR64, disp12imm64,
19019 /* CGIBAsm */
19020 GR64, imm64sx8, imm32zx4, ADDR64, disp12imm64,
19021 /* CGIBAsmE */
19022 GR64, imm64sx8, ADDR64, disp12imm64,
19023 /* CGIBAsmH */
19024 GR64, imm64sx8, ADDR64, disp12imm64,
19025 /* CGIBAsmHE */
19026 GR64, imm64sx8, ADDR64, disp12imm64,
19027 /* CGIBAsmL */
19028 GR64, imm64sx8, ADDR64, disp12imm64,
19029 /* CGIBAsmLE */
19030 GR64, imm64sx8, ADDR64, disp12imm64,
19031 /* CGIBAsmLH */
19032 GR64, imm64sx8, ADDR64, disp12imm64,
19033 /* CGIBAsmNE */
19034 GR64, imm64sx8, ADDR64, disp12imm64,
19035 /* CGIBAsmNH */
19036 GR64, imm64sx8, ADDR64, disp12imm64,
19037 /* CGIBAsmNHE */
19038 GR64, imm64sx8, ADDR64, disp12imm64,
19039 /* CGIBAsmNL */
19040 GR64, imm64sx8, ADDR64, disp12imm64,
19041 /* CGIBAsmNLE */
19042 GR64, imm64sx8, ADDR64, disp12imm64,
19043 /* CGIBAsmNLH */
19044 GR64, imm64sx8, ADDR64, disp12imm64,
19045 /* CGIJ */
19046 GR64, imm64sx8, cond4, brtarget16,
19047 /* CGIJAsm */
19048 GR64, imm64sx8, imm32zx4, brtarget16,
19049 /* CGIJAsmE */
19050 GR64, imm64sx8, brtarget16,
19051 /* CGIJAsmH */
19052 GR64, imm64sx8, brtarget16,
19053 /* CGIJAsmHE */
19054 GR64, imm64sx8, brtarget16,
19055 /* CGIJAsmL */
19056 GR64, imm64sx8, brtarget16,
19057 /* CGIJAsmLE */
19058 GR64, imm64sx8, brtarget16,
19059 /* CGIJAsmLH */
19060 GR64, imm64sx8, brtarget16,
19061 /* CGIJAsmNE */
19062 GR64, imm64sx8, brtarget16,
19063 /* CGIJAsmNH */
19064 GR64, imm64sx8, brtarget16,
19065 /* CGIJAsmNHE */
19066 GR64, imm64sx8, brtarget16,
19067 /* CGIJAsmNL */
19068 GR64, imm64sx8, brtarget16,
19069 /* CGIJAsmNLE */
19070 GR64, imm64sx8, brtarget16,
19071 /* CGIJAsmNLH */
19072 GR64, imm64sx8, brtarget16,
19073 /* CGIT */
19074 GR64, imm64sx16, cond4,
19075 /* CGITAsm */
19076 GR64, imm64sx16, imm32zx4,
19077 /* CGITAsmE */
19078 GR64, imm64sx16,
19079 /* CGITAsmH */
19080 GR64, imm64sx16,
19081 /* CGITAsmHE */
19082 GR64, imm64sx16,
19083 /* CGITAsmL */
19084 GR64, imm64sx16,
19085 /* CGITAsmLE */
19086 GR64, imm64sx16,
19087 /* CGITAsmLH */
19088 GR64, imm64sx16,
19089 /* CGITAsmNE */
19090 GR64, imm64sx16,
19091 /* CGITAsmNH */
19092 GR64, imm64sx16,
19093 /* CGITAsmNHE */
19094 GR64, imm64sx16,
19095 /* CGITAsmNL */
19096 GR64, imm64sx16,
19097 /* CGITAsmNLE */
19098 GR64, imm64sx16,
19099 /* CGITAsmNLH */
19100 GR64, imm64sx16,
19101 /* CGR */
19102 GR64, GR64,
19103 /* CGRB */
19104 GR64, GR64, cond4, ADDR64, disp12imm64,
19105 /* CGRBAsm */
19106 GR64, GR64, imm32zx4, ADDR64, disp12imm64,
19107 /* CGRBAsmE */
19108 GR64, GR64, ADDR64, disp12imm64,
19109 /* CGRBAsmH */
19110 GR64, GR64, ADDR64, disp12imm64,
19111 /* CGRBAsmHE */
19112 GR64, GR64, ADDR64, disp12imm64,
19113 /* CGRBAsmL */
19114 GR64, GR64, ADDR64, disp12imm64,
19115 /* CGRBAsmLE */
19116 GR64, GR64, ADDR64, disp12imm64,
19117 /* CGRBAsmLH */
19118 GR64, GR64, ADDR64, disp12imm64,
19119 /* CGRBAsmNE */
19120 GR64, GR64, ADDR64, disp12imm64,
19121 /* CGRBAsmNH */
19122 GR64, GR64, ADDR64, disp12imm64,
19123 /* CGRBAsmNHE */
19124 GR64, GR64, ADDR64, disp12imm64,
19125 /* CGRBAsmNL */
19126 GR64, GR64, ADDR64, disp12imm64,
19127 /* CGRBAsmNLE */
19128 GR64, GR64, ADDR64, disp12imm64,
19129 /* CGRBAsmNLH */
19130 GR64, GR64, ADDR64, disp12imm64,
19131 /* CGRJ */
19132 GR64, GR64, cond4, brtarget16,
19133 /* CGRJAsm */
19134 GR64, GR64, imm32zx4, brtarget16,
19135 /* CGRJAsmE */
19136 GR64, GR64, brtarget16,
19137 /* CGRJAsmH */
19138 GR64, GR64, brtarget16,
19139 /* CGRJAsmHE */
19140 GR64, GR64, brtarget16,
19141 /* CGRJAsmL */
19142 GR64, GR64, brtarget16,
19143 /* CGRJAsmLE */
19144 GR64, GR64, brtarget16,
19145 /* CGRJAsmLH */
19146 GR64, GR64, brtarget16,
19147 /* CGRJAsmNE */
19148 GR64, GR64, brtarget16,
19149 /* CGRJAsmNH */
19150 GR64, GR64, brtarget16,
19151 /* CGRJAsmNHE */
19152 GR64, GR64, brtarget16,
19153 /* CGRJAsmNL */
19154 GR64, GR64, brtarget16,
19155 /* CGRJAsmNLE */
19156 GR64, GR64, brtarget16,
19157 /* CGRJAsmNLH */
19158 GR64, GR64, brtarget16,
19159 /* CGRL */
19160 GR64, pcrel32,
19161 /* CGRT */
19162 GR64, GR64, cond4,
19163 /* CGRTAsm */
19164 GR64, GR64, imm32zx4,
19165 /* CGRTAsmE */
19166 GR64, GR64,
19167 /* CGRTAsmH */
19168 GR64, GR64,
19169 /* CGRTAsmHE */
19170 GR64, GR64,
19171 /* CGRTAsmL */
19172 GR64, GR64,
19173 /* CGRTAsmLE */
19174 GR64, GR64,
19175 /* CGRTAsmLH */
19176 GR64, GR64,
19177 /* CGRTAsmNE */
19178 GR64, GR64,
19179 /* CGRTAsmNH */
19180 GR64, GR64,
19181 /* CGRTAsmNHE */
19182 GR64, GR64,
19183 /* CGRTAsmNL */
19184 GR64, GR64,
19185 /* CGRTAsmNLE */
19186 GR64, GR64,
19187 /* CGRTAsmNLH */
19188 GR64, GR64,
19189 /* CGXBR */
19190 GR64, imm32zx4, FP128,
19191 /* CGXBRA */
19192 GR64, imm32zx4, FP128, imm32zx4,
19193 /* CGXR */
19194 GR64, imm32zx4, FP128,
19195 /* CGXTR */
19196 GR64, imm32zx4, FP128,
19197 /* CGXTRA */
19198 GR64, imm32zx4, FP128, imm32zx4,
19199 /* CH */
19200 GR32, ADDR64, disp12imm64, ADDR64,
19201 /* CHF */
19202 GRH32, ADDR64, disp20imm64, ADDR64,
19203 /* CHHR */
19204 GRH32, GRH32,
19205 /* CHHSI */
19206 ADDR64, disp12imm64, imm32sx16,
19207 /* CHI */
19208 GR32, imm32sx16,
19209 /* CHLR */
19210 GRH32, GR32,
19211 /* CHRL */
19212 GR32, pcrel32,
19213 /* CHSI */
19214 ADDR64, disp12imm64, imm32sx16,
19215 /* CHY */
19216 GR32, ADDR64, disp20imm64, ADDR64,
19217 /* CIB */
19218 GR32, imm32sx8, cond4, ADDR64, disp12imm64,
19219 /* CIBAsm */
19220 GR32, imm32sx8, imm32zx4, ADDR64, disp12imm64,
19221 /* CIBAsmE */
19222 GR32, imm32sx8, ADDR64, disp12imm64,
19223 /* CIBAsmH */
19224 GR32, imm32sx8, ADDR64, disp12imm64,
19225 /* CIBAsmHE */
19226 GR32, imm32sx8, ADDR64, disp12imm64,
19227 /* CIBAsmL */
19228 GR32, imm32sx8, ADDR64, disp12imm64,
19229 /* CIBAsmLE */
19230 GR32, imm32sx8, ADDR64, disp12imm64,
19231 /* CIBAsmLH */
19232 GR32, imm32sx8, ADDR64, disp12imm64,
19233 /* CIBAsmNE */
19234 GR32, imm32sx8, ADDR64, disp12imm64,
19235 /* CIBAsmNH */
19236 GR32, imm32sx8, ADDR64, disp12imm64,
19237 /* CIBAsmNHE */
19238 GR32, imm32sx8, ADDR64, disp12imm64,
19239 /* CIBAsmNL */
19240 GR32, imm32sx8, ADDR64, disp12imm64,
19241 /* CIBAsmNLE */
19242 GR32, imm32sx8, ADDR64, disp12imm64,
19243 /* CIBAsmNLH */
19244 GR32, imm32sx8, ADDR64, disp12imm64,
19245 /* CIH */
19246 GRH32, simm32,
19247 /* CIJ */
19248 GR32, imm32sx8, cond4, brtarget16,
19249 /* CIJAsm */
19250 GR32, imm32sx8, imm32zx4, brtarget16,
19251 /* CIJAsmE */
19252 GR32, imm32sx8, brtarget16,
19253 /* CIJAsmH */
19254 GR32, imm32sx8, brtarget16,
19255 /* CIJAsmHE */
19256 GR32, imm32sx8, brtarget16,
19257 /* CIJAsmL */
19258 GR32, imm32sx8, brtarget16,
19259 /* CIJAsmLE */
19260 GR32, imm32sx8, brtarget16,
19261 /* CIJAsmLH */
19262 GR32, imm32sx8, brtarget16,
19263 /* CIJAsmNE */
19264 GR32, imm32sx8, brtarget16,
19265 /* CIJAsmNH */
19266 GR32, imm32sx8, brtarget16,
19267 /* CIJAsmNHE */
19268 GR32, imm32sx8, brtarget16,
19269 /* CIJAsmNL */
19270 GR32, imm32sx8, brtarget16,
19271 /* CIJAsmNLE */
19272 GR32, imm32sx8, brtarget16,
19273 /* CIJAsmNLH */
19274 GR32, imm32sx8, brtarget16,
19275 /* CIT */
19276 GR32, imm32sx16, cond4,
19277 /* CITAsm */
19278 GR32, imm32sx16, imm32zx4,
19279 /* CITAsmE */
19280 GR32, imm32sx16,
19281 /* CITAsmH */
19282 GR32, imm32sx16,
19283 /* CITAsmHE */
19284 GR32, imm32sx16,
19285 /* CITAsmL */
19286 GR32, imm32sx16,
19287 /* CITAsmLE */
19288 GR32, imm32sx16,
19289 /* CITAsmLH */
19290 GR32, imm32sx16,
19291 /* CITAsmNE */
19292 GR32, imm32sx16,
19293 /* CITAsmNH */
19294 GR32, imm32sx16,
19295 /* CITAsmNHE */
19296 GR32, imm32sx16,
19297 /* CITAsmNL */
19298 GR32, imm32sx16,
19299 /* CITAsmNLE */
19300 GR32, imm32sx16,
19301 /* CITAsmNLH */
19302 GR32, imm32sx16,
19303 /* CKSM */
19304 GR64, GR128, GR64, GR128,
19305 /* CL */
19306 GR32, ADDR64, disp12imm64, ADDR64,
19307 /* CLC */
19308 ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64,
19309 /* CLCL */
19310 GR128, GR128, GR128, GR128,
19311 /* CLCLE */
19312 GR128, GR128, GR128, GR128, ADDR32, disp12imm32,
19313 /* CLCLU */
19314 GR128, GR128, GR128, GR128, ADDR32, disp20imm32,
19315 /* CLFDBR */
19316 GR32, imm32zx4, FP64, imm32zx4,
19317 /* CLFDTR */
19318 GR32, imm32zx4, FP64, imm32zx4,
19319 /* CLFEBR */
19320 GR32, imm32zx4, FP32, imm32zx4,
19321 /* CLFHSI */
19322 ADDR64, disp12imm64, imm32zx16,
19323 /* CLFI */
19324 GR32, uimm32,
19325 /* CLFIT */
19326 GR32, imm32zx16, cond4,
19327 /* CLFITAsm */
19328 GR32, imm32zx16, imm32zx4,
19329 /* CLFITAsmE */
19330 GR32, imm32zx16,
19331 /* CLFITAsmH */
19332 GR32, imm32zx16,
19333 /* CLFITAsmHE */
19334 GR32, imm32zx16,
19335 /* CLFITAsmL */
19336 GR32, imm32zx16,
19337 /* CLFITAsmLE */
19338 GR32, imm32zx16,
19339 /* CLFITAsmLH */
19340 GR32, imm32zx16,
19341 /* CLFITAsmNE */
19342 GR32, imm32zx16,
19343 /* CLFITAsmNH */
19344 GR32, imm32zx16,
19345 /* CLFITAsmNHE */
19346 GR32, imm32zx16,
19347 /* CLFITAsmNL */
19348 GR32, imm32zx16,
19349 /* CLFITAsmNLE */
19350 GR32, imm32zx16,
19351 /* CLFITAsmNLH */
19352 GR32, imm32zx16,
19353 /* CLFXBR */
19354 GR32, imm32zx4, FP128, imm32zx4,
19355 /* CLFXTR */
19356 GR32, imm32zx4, FP128, imm32zx4,
19357 /* CLG */
19358 GR64, ADDR64, disp20imm64, ADDR64,
19359 /* CLGDBR */
19360 GR64, imm32zx4, FP64, imm32zx4,
19361 /* CLGDTR */
19362 GR64, imm32zx4, FP64, imm32zx4,
19363 /* CLGEBR */
19364 GR64, imm32zx4, FP32, imm32zx4,
19365 /* CLGF */
19366 GR64, ADDR64, disp20imm64, ADDR64,
19367 /* CLGFI */
19368 GR64, imm64zx32,
19369 /* CLGFR */
19370 GR64, GR32,
19371 /* CLGFRL */
19372 GR64, pcrel32,
19373 /* CLGHRL */
19374 GR64, pcrel32,
19375 /* CLGHSI */
19376 ADDR64, disp12imm64, imm64zx16,
19377 /* CLGIB */
19378 GR64, imm64zx8, cond4, ADDR64, disp12imm64,
19379 /* CLGIBAsm */
19380 GR64, imm64zx8, imm32zx4, ADDR64, disp12imm64,
19381 /* CLGIBAsmE */
19382 GR64, imm64zx8, ADDR64, disp12imm64,
19383 /* CLGIBAsmH */
19384 GR64, imm64zx8, ADDR64, disp12imm64,
19385 /* CLGIBAsmHE */
19386 GR64, imm64zx8, ADDR64, disp12imm64,
19387 /* CLGIBAsmL */
19388 GR64, imm64zx8, ADDR64, disp12imm64,
19389 /* CLGIBAsmLE */
19390 GR64, imm64zx8, ADDR64, disp12imm64,
19391 /* CLGIBAsmLH */
19392 GR64, imm64zx8, ADDR64, disp12imm64,
19393 /* CLGIBAsmNE */
19394 GR64, imm64zx8, ADDR64, disp12imm64,
19395 /* CLGIBAsmNH */
19396 GR64, imm64zx8, ADDR64, disp12imm64,
19397 /* CLGIBAsmNHE */
19398 GR64, imm64zx8, ADDR64, disp12imm64,
19399 /* CLGIBAsmNL */
19400 GR64, imm64zx8, ADDR64, disp12imm64,
19401 /* CLGIBAsmNLE */
19402 GR64, imm64zx8, ADDR64, disp12imm64,
19403 /* CLGIBAsmNLH */
19404 GR64, imm64zx8, ADDR64, disp12imm64,
19405 /* CLGIJ */
19406 GR64, imm64zx8, cond4, brtarget16,
19407 /* CLGIJAsm */
19408 GR64, imm64zx8, imm32zx4, brtarget16,
19409 /* CLGIJAsmE */
19410 GR64, imm64zx8, brtarget16,
19411 /* CLGIJAsmH */
19412 GR64, imm64zx8, brtarget16,
19413 /* CLGIJAsmHE */
19414 GR64, imm64zx8, brtarget16,
19415 /* CLGIJAsmL */
19416 GR64, imm64zx8, brtarget16,
19417 /* CLGIJAsmLE */
19418 GR64, imm64zx8, brtarget16,
19419 /* CLGIJAsmLH */
19420 GR64, imm64zx8, brtarget16,
19421 /* CLGIJAsmNE */
19422 GR64, imm64zx8, brtarget16,
19423 /* CLGIJAsmNH */
19424 GR64, imm64zx8, brtarget16,
19425 /* CLGIJAsmNHE */
19426 GR64, imm64zx8, brtarget16,
19427 /* CLGIJAsmNL */
19428 GR64, imm64zx8, brtarget16,
19429 /* CLGIJAsmNLE */
19430 GR64, imm64zx8, brtarget16,
19431 /* CLGIJAsmNLH */
19432 GR64, imm64zx8, brtarget16,
19433 /* CLGIT */
19434 GR64, imm64zx16, cond4,
19435 /* CLGITAsm */
19436 GR64, imm64zx16, imm32zx4,
19437 /* CLGITAsmE */
19438 GR64, imm64zx16,
19439 /* CLGITAsmH */
19440 GR64, imm64zx16,
19441 /* CLGITAsmHE */
19442 GR64, imm64zx16,
19443 /* CLGITAsmL */
19444 GR64, imm64zx16,
19445 /* CLGITAsmLE */
19446 GR64, imm64zx16,
19447 /* CLGITAsmLH */
19448 GR64, imm64zx16,
19449 /* CLGITAsmNE */
19450 GR64, imm64zx16,
19451 /* CLGITAsmNH */
19452 GR64, imm64zx16,
19453 /* CLGITAsmNHE */
19454 GR64, imm64zx16,
19455 /* CLGITAsmNL */
19456 GR64, imm64zx16,
19457 /* CLGITAsmNLE */
19458 GR64, imm64zx16,
19459 /* CLGITAsmNLH */
19460 GR64, imm64zx16,
19461 /* CLGR */
19462 GR64, GR64,
19463 /* CLGRB */
19464 GR64, GR64, cond4, ADDR64, disp12imm64,
19465 /* CLGRBAsm */
19466 GR64, GR64, imm32zx4, ADDR64, disp12imm64,
19467 /* CLGRBAsmE */
19468 GR64, GR64, ADDR64, disp12imm64,
19469 /* CLGRBAsmH */
19470 GR64, GR64, ADDR64, disp12imm64,
19471 /* CLGRBAsmHE */
19472 GR64, GR64, ADDR64, disp12imm64,
19473 /* CLGRBAsmL */
19474 GR64, GR64, ADDR64, disp12imm64,
19475 /* CLGRBAsmLE */
19476 GR64, GR64, ADDR64, disp12imm64,
19477 /* CLGRBAsmLH */
19478 GR64, GR64, ADDR64, disp12imm64,
19479 /* CLGRBAsmNE */
19480 GR64, GR64, ADDR64, disp12imm64,
19481 /* CLGRBAsmNH */
19482 GR64, GR64, ADDR64, disp12imm64,
19483 /* CLGRBAsmNHE */
19484 GR64, GR64, ADDR64, disp12imm64,
19485 /* CLGRBAsmNL */
19486 GR64, GR64, ADDR64, disp12imm64,
19487 /* CLGRBAsmNLE */
19488 GR64, GR64, ADDR64, disp12imm64,
19489 /* CLGRBAsmNLH */
19490 GR64, GR64, ADDR64, disp12imm64,
19491 /* CLGRJ */
19492 GR64, GR64, cond4, brtarget16,
19493 /* CLGRJAsm */
19494 GR64, GR64, imm32zx4, brtarget16,
19495 /* CLGRJAsmE */
19496 GR64, GR64, brtarget16,
19497 /* CLGRJAsmH */
19498 GR64, GR64, brtarget16,
19499 /* CLGRJAsmHE */
19500 GR64, GR64, brtarget16,
19501 /* CLGRJAsmL */
19502 GR64, GR64, brtarget16,
19503 /* CLGRJAsmLE */
19504 GR64, GR64, brtarget16,
19505 /* CLGRJAsmLH */
19506 GR64, GR64, brtarget16,
19507 /* CLGRJAsmNE */
19508 GR64, GR64, brtarget16,
19509 /* CLGRJAsmNH */
19510 GR64, GR64, brtarget16,
19511 /* CLGRJAsmNHE */
19512 GR64, GR64, brtarget16,
19513 /* CLGRJAsmNL */
19514 GR64, GR64, brtarget16,
19515 /* CLGRJAsmNLE */
19516 GR64, GR64, brtarget16,
19517 /* CLGRJAsmNLH */
19518 GR64, GR64, brtarget16,
19519 /* CLGRL */
19520 GR64, pcrel32,
19521 /* CLGRT */
19522 GR64, GR64, cond4,
19523 /* CLGRTAsm */
19524 GR64, GR64, imm32zx4,
19525 /* CLGRTAsmE */
19526 GR64, GR64,
19527 /* CLGRTAsmH */
19528 GR64, GR64,
19529 /* CLGRTAsmHE */
19530 GR64, GR64,
19531 /* CLGRTAsmL */
19532 GR64, GR64,
19533 /* CLGRTAsmLE */
19534 GR64, GR64,
19535 /* CLGRTAsmLH */
19536 GR64, GR64,
19537 /* CLGRTAsmNE */
19538 GR64, GR64,
19539 /* CLGRTAsmNH */
19540 GR64, GR64,
19541 /* CLGRTAsmNHE */
19542 GR64, GR64,
19543 /* CLGRTAsmNL */
19544 GR64, GR64,
19545 /* CLGRTAsmNLE */
19546 GR64, GR64,
19547 /* CLGRTAsmNLH */
19548 GR64, GR64,
19549 /* CLGT */
19550 GR64, ADDR64, disp20imm64, cond4,
19551 /* CLGTAsm */
19552 GR64, ADDR64, disp20imm64, imm32zx4,
19553 /* CLGTAsmE */
19554 GR64, ADDR64, disp20imm64,
19555 /* CLGTAsmH */
19556 GR64, ADDR64, disp20imm64,
19557 /* CLGTAsmHE */
19558 GR64, ADDR64, disp20imm64,
19559 /* CLGTAsmL */
19560 GR64, ADDR64, disp20imm64,
19561 /* CLGTAsmLE */
19562 GR64, ADDR64, disp20imm64,
19563 /* CLGTAsmLH */
19564 GR64, ADDR64, disp20imm64,
19565 /* CLGTAsmNE */
19566 GR64, ADDR64, disp20imm64,
19567 /* CLGTAsmNH */
19568 GR64, ADDR64, disp20imm64,
19569 /* CLGTAsmNHE */
19570 GR64, ADDR64, disp20imm64,
19571 /* CLGTAsmNL */
19572 GR64, ADDR64, disp20imm64,
19573 /* CLGTAsmNLE */
19574 GR64, ADDR64, disp20imm64,
19575 /* CLGTAsmNLH */
19576 GR64, ADDR64, disp20imm64,
19577 /* CLGXBR */
19578 GR64, imm32zx4, FP128, imm32zx4,
19579 /* CLGXTR */
19580 GR64, imm32zx4, FP128, imm32zx4,
19581 /* CLHF */
19582 GRH32, ADDR64, disp20imm64, ADDR64,
19583 /* CLHHR */
19584 GRH32, GRH32,
19585 /* CLHHSI */
19586 ADDR64, disp12imm64, imm32zx16,
19587 /* CLHLR */
19588 GRH32, GR32,
19589 /* CLHRL */
19590 GR32, pcrel32,
19591 /* CLI */
19592 ADDR64, disp12imm64, imm32zx8,
19593 /* CLIB */
19594 GR32, imm32zx8, cond4, ADDR64, disp12imm64,
19595 /* CLIBAsm */
19596 GR32, imm32zx8, imm32zx4, ADDR64, disp12imm64,
19597 /* CLIBAsmE */
19598 GR32, imm32zx8, ADDR64, disp12imm64,
19599 /* CLIBAsmH */
19600 GR32, imm32zx8, ADDR64, disp12imm64,
19601 /* CLIBAsmHE */
19602 GR32, imm32zx8, ADDR64, disp12imm64,
19603 /* CLIBAsmL */
19604 GR32, imm32zx8, ADDR64, disp12imm64,
19605 /* CLIBAsmLE */
19606 GR32, imm32zx8, ADDR64, disp12imm64,
19607 /* CLIBAsmLH */
19608 GR32, imm32zx8, ADDR64, disp12imm64,
19609 /* CLIBAsmNE */
19610 GR32, imm32zx8, ADDR64, disp12imm64,
19611 /* CLIBAsmNH */
19612 GR32, imm32zx8, ADDR64, disp12imm64,
19613 /* CLIBAsmNHE */
19614 GR32, imm32zx8, ADDR64, disp12imm64,
19615 /* CLIBAsmNL */
19616 GR32, imm32zx8, ADDR64, disp12imm64,
19617 /* CLIBAsmNLE */
19618 GR32, imm32zx8, ADDR64, disp12imm64,
19619 /* CLIBAsmNLH */
19620 GR32, imm32zx8, ADDR64, disp12imm64,
19621 /* CLIH */
19622 GRH32, uimm32,
19623 /* CLIJ */
19624 GR32, imm32zx8, cond4, brtarget16,
19625 /* CLIJAsm */
19626 GR32, imm32zx8, imm32zx4, brtarget16,
19627 /* CLIJAsmE */
19628 GR32, imm32zx8, brtarget16,
19629 /* CLIJAsmH */
19630 GR32, imm32zx8, brtarget16,
19631 /* CLIJAsmHE */
19632 GR32, imm32zx8, brtarget16,
19633 /* CLIJAsmL */
19634 GR32, imm32zx8, brtarget16,
19635 /* CLIJAsmLE */
19636 GR32, imm32zx8, brtarget16,
19637 /* CLIJAsmLH */
19638 GR32, imm32zx8, brtarget16,
19639 /* CLIJAsmNE */
19640 GR32, imm32zx8, brtarget16,
19641 /* CLIJAsmNH */
19642 GR32, imm32zx8, brtarget16,
19643 /* CLIJAsmNHE */
19644 GR32, imm32zx8, brtarget16,
19645 /* CLIJAsmNL */
19646 GR32, imm32zx8, brtarget16,
19647 /* CLIJAsmNLE */
19648 GR32, imm32zx8, brtarget16,
19649 /* CLIJAsmNLH */
19650 GR32, imm32zx8, brtarget16,
19651 /* CLIY */
19652 ADDR64, disp20imm64, imm32zx8,
19653 /* CLM */
19654 GR32, imm32zx4, ADDR64, disp12imm64,
19655 /* CLMH */
19656 GRH32, imm32zx4, ADDR64, disp20imm64,
19657 /* CLMY */
19658 GR32, imm32zx4, ADDR64, disp20imm64,
19659 /* CLR */
19660 GR32, GR32,
19661 /* CLRB */
19662 GR32, GR32, cond4, ADDR64, disp12imm64,
19663 /* CLRBAsm */
19664 GR32, GR32, imm32zx4, ADDR64, disp12imm64,
19665 /* CLRBAsmE */
19666 GR32, GR32, ADDR64, disp12imm64,
19667 /* CLRBAsmH */
19668 GR32, GR32, ADDR64, disp12imm64,
19669 /* CLRBAsmHE */
19670 GR32, GR32, ADDR64, disp12imm64,
19671 /* CLRBAsmL */
19672 GR32, GR32, ADDR64, disp12imm64,
19673 /* CLRBAsmLE */
19674 GR32, GR32, ADDR64, disp12imm64,
19675 /* CLRBAsmLH */
19676 GR32, GR32, ADDR64, disp12imm64,
19677 /* CLRBAsmNE */
19678 GR32, GR32, ADDR64, disp12imm64,
19679 /* CLRBAsmNH */
19680 GR32, GR32, ADDR64, disp12imm64,
19681 /* CLRBAsmNHE */
19682 GR32, GR32, ADDR64, disp12imm64,
19683 /* CLRBAsmNL */
19684 GR32, GR32, ADDR64, disp12imm64,
19685 /* CLRBAsmNLE */
19686 GR32, GR32, ADDR64, disp12imm64,
19687 /* CLRBAsmNLH */
19688 GR32, GR32, ADDR64, disp12imm64,
19689 /* CLRJ */
19690 GR32, GR32, cond4, brtarget16,
19691 /* CLRJAsm */
19692 GR32, GR32, imm32zx4, brtarget16,
19693 /* CLRJAsmE */
19694 GR32, GR32, brtarget16,
19695 /* CLRJAsmH */
19696 GR32, GR32, brtarget16,
19697 /* CLRJAsmHE */
19698 GR32, GR32, brtarget16,
19699 /* CLRJAsmL */
19700 GR32, GR32, brtarget16,
19701 /* CLRJAsmLE */
19702 GR32, GR32, brtarget16,
19703 /* CLRJAsmLH */
19704 GR32, GR32, brtarget16,
19705 /* CLRJAsmNE */
19706 GR32, GR32, brtarget16,
19707 /* CLRJAsmNH */
19708 GR32, GR32, brtarget16,
19709 /* CLRJAsmNHE */
19710 GR32, GR32, brtarget16,
19711 /* CLRJAsmNL */
19712 GR32, GR32, brtarget16,
19713 /* CLRJAsmNLE */
19714 GR32, GR32, brtarget16,
19715 /* CLRJAsmNLH */
19716 GR32, GR32, brtarget16,
19717 /* CLRL */
19718 GR32, pcrel32,
19719 /* CLRT */
19720 GR32, GR32, cond4,
19721 /* CLRTAsm */
19722 GR32, GR32, imm32zx4,
19723 /* CLRTAsmE */
19724 GR32, GR32,
19725 /* CLRTAsmH */
19726 GR32, GR32,
19727 /* CLRTAsmHE */
19728 GR32, GR32,
19729 /* CLRTAsmL */
19730 GR32, GR32,
19731 /* CLRTAsmLE */
19732 GR32, GR32,
19733 /* CLRTAsmLH */
19734 GR32, GR32,
19735 /* CLRTAsmNE */
19736 GR32, GR32,
19737 /* CLRTAsmNH */
19738 GR32, GR32,
19739 /* CLRTAsmNHE */
19740 GR32, GR32,
19741 /* CLRTAsmNL */
19742 GR32, GR32,
19743 /* CLRTAsmNLE */
19744 GR32, GR32,
19745 /* CLRTAsmNLH */
19746 GR32, GR32,
19747 /* CLST */
19748 GR64, GR64, GR64, GR64,
19749 /* CLT */
19750 GR32, ADDR64, disp20imm64, cond4,
19751 /* CLTAsm */
19752 GR32, ADDR64, disp20imm64, imm32zx4,
19753 /* CLTAsmE */
19754 GR32, ADDR64, disp20imm64,
19755 /* CLTAsmH */
19756 GR32, ADDR64, disp20imm64,
19757 /* CLTAsmHE */
19758 GR32, ADDR64, disp20imm64,
19759 /* CLTAsmL */
19760 GR32, ADDR64, disp20imm64,
19761 /* CLTAsmLE */
19762 GR32, ADDR64, disp20imm64,
19763 /* CLTAsmLH */
19764 GR32, ADDR64, disp20imm64,
19765 /* CLTAsmNE */
19766 GR32, ADDR64, disp20imm64,
19767 /* CLTAsmNH */
19768 GR32, ADDR64, disp20imm64,
19769 /* CLTAsmNHE */
19770 GR32, ADDR64, disp20imm64,
19771 /* CLTAsmNL */
19772 GR32, ADDR64, disp20imm64,
19773 /* CLTAsmNLE */
19774 GR32, ADDR64, disp20imm64,
19775 /* CLTAsmNLH */
19776 GR32, ADDR64, disp20imm64,
19777 /* CLY */
19778 GR32, ADDR64, disp20imm64, ADDR64,
19779 /* CMPSC */
19780 GR128, GR128, GR128, GR128,
19781 /* CP */
19782 ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64,
19783 /* CPDT */
19784 FP64, ADDR64, disp12imm64, len8imm64, imm32zx4,
19785 /* CPSDRdd */
19786 FP64, FP64, FP64,
19787 /* CPSDRds */
19788 FP64, FP64, FP32,
19789 /* CPSDRsd */
19790 FP32, FP32, FP64,
19791 /* CPSDRss */
19792 FP32, FP32, FP32,
19793 /* CPXT */
19794 FP128, ADDR64, disp12imm64, len8imm64, imm32zx4,
19795 /* CPYA */
19796 AR32, AR32,
19797 /* CR */
19798 GR32, GR32,
19799 /* CRB */
19800 GR32, GR32, cond4, ADDR64, disp12imm64,
19801 /* CRBAsm */
19802 GR32, GR32, imm32zx4, ADDR64, disp12imm64,
19803 /* CRBAsmE */
19804 GR32, GR32, ADDR64, disp12imm64,
19805 /* CRBAsmH */
19806 GR32, GR32, ADDR64, disp12imm64,
19807 /* CRBAsmHE */
19808 GR32, GR32, ADDR64, disp12imm64,
19809 /* CRBAsmL */
19810 GR32, GR32, ADDR64, disp12imm64,
19811 /* CRBAsmLE */
19812 GR32, GR32, ADDR64, disp12imm64,
19813 /* CRBAsmLH */
19814 GR32, GR32, ADDR64, disp12imm64,
19815 /* CRBAsmNE */
19816 GR32, GR32, ADDR64, disp12imm64,
19817 /* CRBAsmNH */
19818 GR32, GR32, ADDR64, disp12imm64,
19819 /* CRBAsmNHE */
19820 GR32, GR32, ADDR64, disp12imm64,
19821 /* CRBAsmNL */
19822 GR32, GR32, ADDR64, disp12imm64,
19823 /* CRBAsmNLE */
19824 GR32, GR32, ADDR64, disp12imm64,
19825 /* CRBAsmNLH */
19826 GR32, GR32, ADDR64, disp12imm64,
19827 /* CRDTE */
19828 GR128, GR128, GR64, imm32zx4,
19829 /* CRDTEOpt */
19830 GR128, GR128, GR64,
19831 /* CRJ */
19832 GR32, GR32, cond4, brtarget16,
19833 /* CRJAsm */
19834 GR32, GR32, imm32zx4, brtarget16,
19835 /* CRJAsmE */
19836 GR32, GR32, brtarget16,
19837 /* CRJAsmH */
19838 GR32, GR32, brtarget16,
19839 /* CRJAsmHE */
19840 GR32, GR32, brtarget16,
19841 /* CRJAsmL */
19842 GR32, GR32, brtarget16,
19843 /* CRJAsmLE */
19844 GR32, GR32, brtarget16,
19845 /* CRJAsmLH */
19846 GR32, GR32, brtarget16,
19847 /* CRJAsmNE */
19848 GR32, GR32, brtarget16,
19849 /* CRJAsmNH */
19850 GR32, GR32, brtarget16,
19851 /* CRJAsmNHE */
19852 GR32, GR32, brtarget16,
19853 /* CRJAsmNL */
19854 GR32, GR32, brtarget16,
19855 /* CRJAsmNLE */
19856 GR32, GR32, brtarget16,
19857 /* CRJAsmNLH */
19858 GR32, GR32, brtarget16,
19859 /* CRL */
19860 GR32, pcrel32,
19861 /* CRT */
19862 GR32, GR32, cond4,
19863 /* CRTAsm */
19864 GR32, GR32, imm32zx4,
19865 /* CRTAsmE */
19866 GR32, GR32,
19867 /* CRTAsmH */
19868 GR32, GR32,
19869 /* CRTAsmHE */
19870 GR32, GR32,
19871 /* CRTAsmL */
19872 GR32, GR32,
19873 /* CRTAsmLE */
19874 GR32, GR32,
19875 /* CRTAsmLH */
19876 GR32, GR32,
19877 /* CRTAsmNE */
19878 GR32, GR32,
19879 /* CRTAsmNH */
19880 GR32, GR32,
19881 /* CRTAsmNHE */
19882 GR32, GR32,
19883 /* CRTAsmNL */
19884 GR32, GR32,
19885 /* CRTAsmNLE */
19886 GR32, GR32,
19887 /* CRTAsmNLH */
19888 GR32, GR32,
19889 /* CS */
19890 GR32, GR32, GR32, ADDR64, disp12imm64,
19891 /* CSCH */
19892 /* CSDTR */
19893 GR64, FP64, imm32zx4,
19894 /* CSG */
19895 GR64, GR64, GR64, ADDR64, disp20imm64,
19896 /* CSP */
19897 GR128, GR128, GR64,
19898 /* CSPG */
19899 GR128, GR128, GR64,
19900 /* CSST */
19901 ADDR64, disp12imm64, ADDR64, disp12imm64, GR64,
19902 /* CSXTR */
19903 GR128, FP128, imm32zx4,
19904 /* CSY */
19905 GR32, GR32, GR32, ADDR64, disp20imm64,
19906 /* CU12 */
19907 GR128, GR128, GR128, GR128, imm32zx4,
19908 /* CU12Opt */
19909 GR128, GR128, GR128, GR128,
19910 /* CU14 */
19911 GR128, GR128, GR128, GR128, imm32zx4,
19912 /* CU14Opt */
19913 GR128, GR128, GR128, GR128,
19914 /* CU21 */
19915 GR128, GR128, GR128, GR128, imm32zx4,
19916 /* CU21Opt */
19917 GR128, GR128, GR128, GR128,
19918 /* CU24 */
19919 GR128, GR128, GR128, GR128, imm32zx4,
19920 /* CU24Opt */
19921 GR128, GR128, GR128, GR128,
19922 /* CU41 */
19923 GR128, GR128, GR128, GR128,
19924 /* CU42 */
19925 GR128, GR128, GR128, GR128,
19926 /* CUDTR */
19927 GR64, FP64,
19928 /* CUSE */
19929 GR128, GR128, GR128, GR128,
19930 /* CUTFU */
19931 GR128, GR128, GR128, GR128, imm32zx4,
19932 /* CUTFUOpt */
19933 GR128, GR128, GR128, GR128,
19934 /* CUUTF */
19935 GR128, GR128, GR128, GR128, imm32zx4,
19936 /* CUUTFOpt */
19937 GR128, GR128, GR128, GR128,
19938 /* CUXTR */
19939 GR128, FP128,
19940 /* CVB */
19941 GR32, GR32, ADDR64, disp12imm64, ADDR64,
19942 /* CVBG */
19943 GR64, GR64, ADDR64, disp20imm64, ADDR64,
19944 /* CVBY */
19945 GR32, GR32, ADDR64, disp20imm64, ADDR64,
19946 /* CVD */
19947 GR32, ADDR64, disp12imm64, ADDR64,
19948 /* CVDG */
19949 GR64, ADDR64, disp20imm64, ADDR64,
19950 /* CVDY */
19951 GR32, ADDR64, disp20imm64, ADDR64,
19952 /* CXBR */
19953 FP128, FP128,
19954 /* CXFBR */
19955 FP128, GR32,
19956 /* CXFBRA */
19957 FP128, imm32zx4, GR32, imm32zx4,
19958 /* CXFR */
19959 FP128, GR32,
19960 /* CXFTR */
19961 FP128, imm32zx4, GR32, imm32zx4,
19962 /* CXGBR */
19963 FP128, GR64,
19964 /* CXGBRA */
19965 FP128, imm32zx4, GR64, imm32zx4,
19966 /* CXGR */
19967 FP128, GR64,
19968 /* CXGTR */
19969 FP128, GR64,
19970 /* CXGTRA */
19971 FP128, imm32zx4, GR64, imm32zx4,
19972 /* CXLFBR */
19973 FP128, imm32zx4, GR32, imm32zx4,
19974 /* CXLFTR */
19975 FP128, imm32zx4, GR32, imm32zx4,
19976 /* CXLGBR */
19977 FP128, imm32zx4, GR64, imm32zx4,
19978 /* CXLGTR */
19979 FP128, imm32zx4, GR64, imm32zx4,
19980 /* CXPT */
19981 FP128, ADDR64, disp12imm64, len8imm64, imm32zx4,
19982 /* CXR */
19983 FP128, FP128,
19984 /* CXSTR */
19985 FP128, GR128,
19986 /* CXTR */
19987 FP128, FP128,
19988 /* CXUTR */
19989 FP128, GR128,
19990 /* CXZT */
19991 FP128, ADDR64, disp12imm64, len8imm64, imm32zx4,
19992 /* CY */
19993 GR32, ADDR64, disp20imm64, ADDR64,
19994 /* CZDT */
19995 FP64, ADDR64, disp12imm64, len8imm64, imm32zx4,
19996 /* CZXT */
19997 FP128, ADDR64, disp12imm64, len8imm64, imm32zx4,
19998 /* D */
19999 GR128, GR128, ADDR64, disp12imm64, ADDR64,
20000 /* DD */
20001 FP64, FP64, ADDR64, disp12imm64, ADDR64,
20002 /* DDB */
20003 FP64, FP64, ADDR64, disp12imm64, ADDR64,
20004 /* DDBR */
20005 FP64, FP64, FP64,
20006 /* DDR */
20007 FP64, FP64, FP64,
20008 /* DDTR */
20009 FP64, FP64, FP64,
20010 /* DDTRA */
20011 FP64, FP64, FP64, imm32zx4,
20012 /* DE */
20013 FP32, FP32, ADDR64, disp12imm64, ADDR64,
20014 /* DEB */
20015 FP32, FP32, ADDR64, disp12imm64, ADDR64,
20016 /* DEBR */
20017 FP32, FP32, FP32,
20018 /* DER */
20019 FP32, FP32, FP32,
20020 /* DFLTCC */
20021 GR128, GR128, GR128, GR128, GR64,
20022 /* DIAG */
20023 GR32, GR32, ADDR64, disp12imm64,
20024 /* DIDBR */
20025 FP64, FP64, FP64, FP64, imm32zx4,
20026 /* DIEBR */
20027 FP32, FP32, FP32, FP32, imm32zx4,
20028 /* DL */
20029 GR128, GR128, ADDR64, disp20imm64, ADDR64,
20030 /* DLG */
20031 GR128, GR128, ADDR64, disp20imm64, ADDR64,
20032 /* DLGR */
20033 GR128, GR128, GR64,
20034 /* DLR */
20035 GR128, GR128, GR32,
20036 /* DP */
20037 ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64,
20038 /* DR */
20039 GR128, GR128, GR32,
20040 /* DSG */
20041 GR128, GR128, ADDR64, disp20imm64, ADDR64,
20042 /* DSGF */
20043 GR128, GR128, ADDR64, disp20imm64, ADDR64,
20044 /* DSGFR */
20045 GR128, GR128, GR32,
20046 /* DSGR */
20047 GR128, GR128, GR64,
20048 /* DXBR */
20049 FP128, FP128, FP128,
20050 /* DXR */
20051 FP128, FP128, FP128,
20052 /* DXTR */
20053 FP128, FP128, FP128,
20054 /* DXTRA */
20055 FP128, FP128, FP128, imm32zx4,
20056 /* EAR */
20057 GR32, AR32,
20058 /* ECAG */
20059 GR64, GR64, ADDR32, disp20imm32,
20060 /* ECCTR */
20061 GR64, GR64,
20062 /* ECPGA */
20063 GR32, GR64,
20064 /* ECTG */
20065 ADDR64, disp12imm64, ADDR64, disp12imm64, GR64,
20066 /* ED */
20067 ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64,
20068 /* EDMK */
20069 ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64,
20070 /* EEDTR */
20071 FP64, FP64,
20072 /* EEXTR */
20073 FP128, FP128,
20074 /* EFPC */
20075 GR32,
20076 /* EPAIR */
20077 GR64,
20078 /* EPAR */
20079 GR32,
20080 /* EPCTR */
20081 GR64, GR64,
20082 /* EPSW */
20083 GR32, GR32,
20084 /* EREG */
20085 GR32, GR32,
20086 /* EREGG */
20087 GR64, GR64,
20088 /* ESAIR */
20089 GR64,
20090 /* ESAR */
20091 GR32,
20092 /* ESDTR */
20093 FP64, FP64,
20094 /* ESEA */
20095 GR32, GR32,
20096 /* ESTA */
20097 GR128, GR32,
20098 /* ESXTR */
20099 FP128, FP128,
20100 /* ETND */
20101 GR32,
20102 /* EX */
20103 ADDR64, ADDR64, disp12imm64, ADDR64,
20104 /* EXRL */
20105 ADDR64, pcrel32,
20106 /* FIDBR */
20107 FP64, imm32zx4, FP64,
20108 /* FIDBRA */
20109 FP64, imm32zx4, FP64, imm32zx4,
20110 /* FIDR */
20111 FP64, FP64,
20112 /* FIDTR */
20113 FP64, imm32zx4, FP64, imm32zx4,
20114 /* FIEBR */
20115 FP32, imm32zx4, FP32,
20116 /* FIEBRA */
20117 FP32, imm32zx4, FP32, imm32zx4,
20118 /* FIER */
20119 FP32, FP32,
20120 /* FIXBR */
20121 FP128, imm32zx4, FP128,
20122 /* FIXBRA */
20123 FP128, imm32zx4, FP128, imm32zx4,
20124 /* FIXR */
20125 FP128, FP128,
20126 /* FIXTR */
20127 FP128, imm32zx4, FP128, imm32zx4,
20128 /* FLOGR */
20129 GR128, GR64,
20130 /* HDR */
20131 FP64, FP64,
20132 /* HER */
20133 FP32, FP32,
20134 /* HSCH */
20135 /* IAC */
20136 GR32,
20137 /* IC */
20138 GR64, GR64, ADDR64, disp12imm64, ADDR64,
20139 /* IC32 */
20140 GR32, GR32, ADDR64, disp12imm64, ADDR64,
20141 /* IC32Y */
20142 GR32, GR32, ADDR64, disp20imm64, ADDR64,
20143 /* ICM */
20144 GR32, GR32, imm32zx4, ADDR64, disp12imm64,
20145 /* ICMH */
20146 GRH32, GRH32, imm32zx4, ADDR64, disp20imm64,
20147 /* ICMY */
20148 GR32, GR32, imm32zx4, ADDR64, disp20imm64,
20149 /* ICY */
20150 GR64, GR64, ADDR64, disp20imm64, ADDR64,
20151 /* IDTE */
20152 GR64, GR64, GR64, imm32zx4,
20153 /* IDTEOpt */
20154 GR64, GR64, GR64,
20155 /* IEDTR */
20156 FP64, FP64, FP64,
20157 /* IEXTR */
20158 FP128, FP128, FP128,
20159 /* IIHF */
20160 GRH32, uimm32,
20161 /* IIHH */
20162 GRH32, GRH32, imm32lh16,
20163 /* IIHL */
20164 GRH32, GRH32, imm32ll16,
20165 /* IILF */
20166 GR32, uimm32,
20167 /* IILH */
20168 GR32, GR32, imm32lh16,
20169 /* IILL */
20170 GR32, GR32, imm32ll16,
20171 /* IPK */
20172 /* IPM */
20173 GR32,
20174 /* IPTE */
20175 GR64, GR32, GR32, imm32zx4,
20176 /* IPTEOpt */
20177 GR64, GR32, GR32,
20178 /* IPTEOptOpt */
20179 GR64, GR32,
20180 /* IRBM */
20181 GR64, GR64,
20182 /* ISKE */
20183 GR32, GR32, GR64,
20184 /* IVSK */
20185 GR32, GR32, GR64,
20186 /* InsnE */
20187 imm64zx16,
20188 /* InsnRI */
20189 imm64zx32, AnyReg, imm32sx16,
20190 /* InsnRIE */
20191 imm64zx48, AnyReg, AnyReg, brtarget16,
20192 /* InsnRIL */
20193 imm64zx48, AnyReg, brtarget32,
20194 /* InsnRILU */
20195 imm64zx48, AnyReg, uimm32,
20196 /* InsnRIS */
20197 imm64zx48, AnyReg, imm32sx8, imm32zx4, ADDR64, disp12imm64,
20198 /* InsnRR */
20199 imm64zx16, AnyReg, AnyReg,
20200 /* InsnRRE */
20201 imm64zx32, AnyReg, AnyReg,
20202 /* InsnRRF */
20203 imm64zx32, AnyReg, AnyReg, AnyReg, imm32zx4,
20204 /* InsnRRS */
20205 imm64zx48, AnyReg, AnyReg, imm32zx4, ADDR64, disp12imm64,
20206 /* InsnRS */
20207 imm64zx32, AnyReg, AnyReg, ADDR64, disp12imm64,
20208 /* InsnRSE */
20209 imm64zx48, AnyReg, AnyReg, ADDR64, disp12imm64,
20210 /* InsnRSI */
20211 imm64zx48, AnyReg, AnyReg, brtarget16,
20212 /* InsnRSY */
20213 imm64zx48, AnyReg, AnyReg, ADDR64, disp20imm64,
20214 /* InsnRX */
20215 imm64zx32, AnyReg, ADDR64, disp12imm64, ADDR64,
20216 /* InsnRXE */
20217 imm64zx48, AnyReg, ADDR64, disp12imm64, ADDR64,
20218 /* InsnRXF */
20219 imm64zx48, AnyReg, AnyReg, ADDR64, disp12imm64, ADDR64,
20220 /* InsnRXY */
20221 imm64zx48, AnyReg, ADDR64, disp20imm64, ADDR64,
20222 /* InsnS */
20223 imm64zx32, ADDR64, disp12imm64,
20224 /* InsnSI */
20225 imm64zx32, ADDR64, disp12imm64, imm32sx8,
20226 /* InsnSIL */
20227 imm64zx48, ADDR64, disp12imm64, imm32zx16,
20228 /* InsnSIY */
20229 imm64zx48, ADDR64, disp20imm64, imm32zx8,
20230 /* InsnSS */
20231 imm64zx48, ADDR64, disp12imm64, GR64, ADDR64, disp12imm64, AnyReg,
20232 /* InsnSSE */
20233 imm64zx48, ADDR64, disp12imm64, ADDR64, disp12imm64,
20234 /* InsnSSF */
20235 imm64zx48, ADDR64, disp12imm64, ADDR64, disp12imm64, AnyReg,
20236 /* InsnVRI */
20237 imm64zx48, VR128, VR128, imm32zx12, imm32zx4, imm32zx4,
20238 /* InsnVRR */
20239 imm64zx48, VR128, VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
20240 /* InsnVRS */
20241 imm64zx48, AnyReg, VR128, ADDR64, disp12imm64, imm32zx4,
20242 /* InsnVRV */
20243 imm64zx48, VR128, ADDR64, disp12imm64, VR128, imm32zx4,
20244 /* InsnVRX */
20245 imm64zx48, VR128, ADDR64, disp12imm64, ADDR64, imm32zx4,
20246 /* InsnVSI */
20247 imm64zx48, VR128, ADDR64, disp12imm64, imm32zx8,
20248 /* J */
20249 brtarget16,
20250 /* JAsmE */
20251 brtarget16,
20252 /* JAsmH */
20253 brtarget16,
20254 /* JAsmHE */
20255 brtarget16,
20256 /* JAsmL */
20257 brtarget16,
20258 /* JAsmLE */
20259 brtarget16,
20260 /* JAsmLH */
20261 brtarget16,
20262 /* JAsmM */
20263 brtarget16,
20264 /* JAsmNE */
20265 brtarget16,
20266 /* JAsmNH */
20267 brtarget16,
20268 /* JAsmNHE */
20269 brtarget16,
20270 /* JAsmNL */
20271 brtarget16,
20272 /* JAsmNLE */
20273 brtarget16,
20274 /* JAsmNLH */
20275 brtarget16,
20276 /* JAsmNM */
20277 brtarget16,
20278 /* JAsmNO */
20279 brtarget16,
20280 /* JAsmNP */
20281 brtarget16,
20282 /* JAsmNZ */
20283 brtarget16,
20284 /* JAsmO */
20285 brtarget16,
20286 /* JAsmP */
20287 brtarget16,
20288 /* JAsmZ */
20289 brtarget16,
20290 /* JG */
20291 brtarget32,
20292 /* JGAsmE */
20293 brtarget32,
20294 /* JGAsmH */
20295 brtarget32,
20296 /* JGAsmHE */
20297 brtarget32,
20298 /* JGAsmL */
20299 brtarget32,
20300 /* JGAsmLE */
20301 brtarget32,
20302 /* JGAsmLH */
20303 brtarget32,
20304 /* JGAsmM */
20305 brtarget32,
20306 /* JGAsmNE */
20307 brtarget32,
20308 /* JGAsmNH */
20309 brtarget32,
20310 /* JGAsmNHE */
20311 brtarget32,
20312 /* JGAsmNL */
20313 brtarget32,
20314 /* JGAsmNLE */
20315 brtarget32,
20316 /* JGAsmNLH */
20317 brtarget32,
20318 /* JGAsmNM */
20319 brtarget32,
20320 /* JGAsmNO */
20321 brtarget32,
20322 /* JGAsmNP */
20323 brtarget32,
20324 /* JGAsmNZ */
20325 brtarget32,
20326 /* JGAsmO */
20327 brtarget32,
20328 /* JGAsmP */
20329 brtarget32,
20330 /* JGAsmZ */
20331 brtarget32,
20332 /* KDB */
20333 FP64, ADDR64, disp12imm64, ADDR64,
20334 /* KDBR */
20335 FP64, FP64,
20336 /* KDSA */
20337 GR128, GR64, GR128,
20338 /* KDTR */
20339 FP64, FP64,
20340 /* KEB */
20341 FP32, ADDR64, disp12imm64, ADDR64,
20342 /* KEBR */
20343 FP32, FP32,
20344 /* KIMD */
20345 GR128, GR64, GR128,
20346 /* KLMD */
20347 GR128, GR64, GR128,
20348 /* KM */
20349 GR128, GR128, GR128, GR128,
20350 /* KMA */
20351 GR128, GR128, GR128, GR128, GR128, GR128,
20352 /* KMAC */
20353 GR128, GR64, GR128,
20354 /* KMC */
20355 GR128, GR128, GR128, GR128,
20356 /* KMCTR */
20357 GR128, GR128, GR128, GR128, GR128, GR128,
20358 /* KMF */
20359 GR128, GR128, GR128, GR128,
20360 /* KMO */
20361 GR128, GR128, GR128, GR128,
20362 /* KXBR */
20363 FP128, FP128,
20364 /* KXTR */
20365 FP128, FP128,
20366 /* L */
20367 GR32, ADDR64, disp12imm64, ADDR64,
20368 /* LA */
20369 GR64, ADDR64, disp12imm64, ADDR64,
20370 /* LAA */
20371 GR32, GR32, ADDR64, disp20imm64,
20372 /* LAAG */
20373 GR64, GR64, ADDR64, disp20imm64,
20374 /* LAAL */
20375 GR32, GR32, ADDR64, disp20imm64,
20376 /* LAALG */
20377 GR64, GR64, ADDR64, disp20imm64,
20378 /* LAE */
20379 GR64, ADDR64, disp12imm64, ADDR64,
20380 /* LAEY */
20381 GR64, ADDR64, disp20imm64, ADDR64,
20382 /* LAM */
20383 AR32, AR32, ADDR64, disp12imm64,
20384 /* LAMY */
20385 AR32, AR32, ADDR64, disp20imm64,
20386 /* LAN */
20387 GR32, GR32, ADDR64, disp20imm64,
20388 /* LANG */
20389 GR64, GR64, ADDR64, disp20imm64,
20390 /* LAO */
20391 GR32, GR32, ADDR64, disp20imm64,
20392 /* LAOG */
20393 GR64, GR64, ADDR64, disp20imm64,
20394 /* LARL */
20395 GR64, pcrel32,
20396 /* LASP */
20397 ADDR64, disp12imm64, ADDR64, disp12imm64,
20398 /* LAT */
20399 GR32, ADDR64, disp20imm64, ADDR64,
20400 /* LAX */
20401 GR32, GR32, ADDR64, disp20imm64,
20402 /* LAXG */
20403 GR64, GR64, ADDR64, disp20imm64,
20404 /* LAY */
20405 GR64, ADDR64, disp20imm64, ADDR64,
20406 /* LB */
20407 GR32, ADDR64, disp20imm64, ADDR64,
20408 /* LBEAR */
20409 ADDR64, disp12imm64,
20410 /* LBH */
20411 GRH32, ADDR64, disp20imm64, ADDR64,
20412 /* LBR */
20413 GR32, GR32,
20414 /* LCBB */
20415 GR32, ADDR64, disp12imm64, ADDR64, imm32zx4,
20416 /* LCCTL */
20417 ADDR64, disp12imm64,
20418 /* LCDBR */
20419 FP64, FP64,
20420 /* LCDFR */
20421 FP64, FP64,
20422 /* LCDFR_32 */
20423 FP32, FP32,
20424 /* LCDR */
20425 FP64, FP64,
20426 /* LCEBR */
20427 FP32, FP32,
20428 /* LCER */
20429 FP32, FP32,
20430 /* LCGFR */
20431 GR64, GR32,
20432 /* LCGR */
20433 GR64, GR64,
20434 /* LCR */
20435 GR32, GR32,
20436 /* LCTL */
20437 CR64, CR64, ADDR64, disp12imm64,
20438 /* LCTLG */
20439 CR64, CR64, ADDR64, disp20imm64,
20440 /* LCXBR */
20441 FP128, FP128,
20442 /* LCXR */
20443 FP128, FP128,
20444 /* LD */
20445 FP64, ADDR64, disp12imm64, ADDR64,
20446 /* LDE */
20447 FP64, ADDR64, disp12imm64, ADDR64,
20448 /* LDE32 */
20449 FP32, ADDR64, disp12imm64, ADDR64,
20450 /* LDEB */
20451 FP64, ADDR64, disp12imm64, ADDR64,
20452 /* LDEBR */
20453 FP64, FP32,
20454 /* LDER */
20455 FP64, FP32,
20456 /* LDETR */
20457 FP64, FP32, imm32zx4,
20458 /* LDGR */
20459 FP64, GR64,
20460 /* LDR */
20461 FP64, FP64,
20462 /* LDR32 */
20463 FP32, FP32,
20464 /* LDXBR */
20465 FP128, FP128,
20466 /* LDXBRA */
20467 FP128, imm32zx4, FP128, imm32zx4,
20468 /* LDXR */
20469 FP64, FP128,
20470 /* LDXTR */
20471 FP128, imm32zx4, FP128, imm32zx4,
20472 /* LDY */
20473 FP64, ADDR64, disp20imm64, ADDR64,
20474 /* LE */
20475 FP32, ADDR64, disp12imm64, ADDR64,
20476 /* LEDBR */
20477 FP32, FP64,
20478 /* LEDBRA */
20479 FP32, imm32zx4, FP64, imm32zx4,
20480 /* LEDR */
20481 FP32, FP64,
20482 /* LEDTR */
20483 FP32, imm32zx4, FP64, imm32zx4,
20484 /* LER */
20485 FP32, FP32,
20486 /* LEXBR */
20487 FP128, FP128,
20488 /* LEXBRA */
20489 FP128, imm32zx4, FP128, imm32zx4,
20490 /* LEXR */
20491 FP32, FP128,
20492 /* LEY */
20493 FP32, ADDR64, disp20imm64, ADDR64,
20494 /* LFAS */
20495 ADDR64, disp12imm64,
20496 /* LFH */
20497 GRH32, ADDR64, disp20imm64, ADDR64,
20498 /* LFHAT */
20499 GRH32, ADDR64, disp20imm64, ADDR64,
20500 /* LFPC */
20501 ADDR64, disp12imm64,
20502 /* LG */
20503 GR64, ADDR64, disp20imm64, ADDR64,
20504 /* LGAT */
20505 GR64, ADDR64, disp20imm64, ADDR64,
20506 /* LGB */
20507 GR64, ADDR64, disp20imm64, ADDR64,
20508 /* LGBR */
20509 GR64, GR64,
20510 /* LGDR */
20511 GR64, FP64,
20512 /* LGF */
20513 GR64, ADDR64, disp20imm64, ADDR64,
20514 /* LGFI */
20515 GR64, imm64sx32,
20516 /* LGFR */
20517 GR64, GR32,
20518 /* LGFRL */
20519 GR64, pcrel32,
20520 /* LGG */
20521 GR64, ADDR64, disp20imm64, ADDR64,
20522 /* LGH */
20523 GR64, ADDR64, disp20imm64, ADDR64,
20524 /* LGHI */
20525 GR64, imm64sx16,
20526 /* LGHR */
20527 GR64, GR64,
20528 /* LGHRL */
20529 GR64, pcrel32,
20530 /* LGR */
20531 GR64, GR64,
20532 /* LGRL */
20533 GR64, pcrel32,
20534 /* LGSC */
20535 GR64, ADDR64, disp20imm64, ADDR64,
20536 /* LH */
20537 GR32, ADDR64, disp12imm64, ADDR64,
20538 /* LHH */
20539 GRH32, ADDR64, disp20imm64, ADDR64,
20540 /* LHI */
20541 GR32, imm32sx16,
20542 /* LHR */
20543 GR32, GR32,
20544 /* LHRL */
20545 GR32, pcrel32,
20546 /* LHY */
20547 GR32, ADDR64, disp20imm64, ADDR64,
20548 /* LLC */
20549 GR32, ADDR64, disp20imm64, ADDR64,
20550 /* LLCH */
20551 GRH32, ADDR64, disp20imm64, ADDR64,
20552 /* LLCR */
20553 GR32, GR32,
20554 /* LLGC */
20555 GR64, ADDR64, disp20imm64, ADDR64,
20556 /* LLGCR */
20557 GR64, GR64,
20558 /* LLGF */
20559 GR64, ADDR64, disp20imm64, ADDR64,
20560 /* LLGFAT */
20561 GR64, ADDR64, disp20imm64, ADDR64,
20562 /* LLGFR */
20563 GR64, GR32,
20564 /* LLGFRL */
20565 GR64, pcrel32,
20566 /* LLGFSG */
20567 GR64, ADDR64, disp20imm64, ADDR64,
20568 /* LLGH */
20569 GR64, ADDR64, disp20imm64, ADDR64,
20570 /* LLGHR */
20571 GR64, GR64,
20572 /* LLGHRL */
20573 GR64, pcrel32,
20574 /* LLGT */
20575 GR64, ADDR64, disp20imm64, ADDR64,
20576 /* LLGTAT */
20577 GR64, ADDR64, disp20imm64, ADDR64,
20578 /* LLGTR */
20579 GR64, GR64,
20580 /* LLH */
20581 GR32, ADDR64, disp20imm64, ADDR64,
20582 /* LLHH */
20583 GRH32, ADDR64, disp20imm64, ADDR64,
20584 /* LLHR */
20585 GR32, GR32,
20586 /* LLHRL */
20587 GR32, pcrel32,
20588 /* LLIHF */
20589 GR64, imm64hf32,
20590 /* LLIHH */
20591 GR64, imm64hh16,
20592 /* LLIHL */
20593 GR64, imm64hl16,
20594 /* LLILF */
20595 GR64, imm64lf32,
20596 /* LLILH */
20597 GR64, imm64lh16,
20598 /* LLILL */
20599 GR64, imm64ll16,
20600 /* LLZRGF */
20601 GR64, ADDR64, disp20imm64, ADDR64,
20602 /* LM */
20603 GR32, GR32, ADDR64, disp12imm64,
20604 /* LMD */
20605 GR64, GR64, ADDR64, disp12imm64, ADDR64, disp12imm64,
20606 /* LMG */
20607 GR64, GR64, ADDR64, disp20imm64,
20608 /* LMH */
20609 GRH32, GRH32, ADDR64, disp20imm64,
20610 /* LMY */
20611 GR32, GR32, ADDR64, disp20imm64,
20612 /* LNDBR */
20613 FP64, FP64,
20614 /* LNDFR */
20615 FP64, FP64,
20616 /* LNDFR_32 */
20617 FP32, FP32,
20618 /* LNDR */
20619 FP64, FP64,
20620 /* LNEBR */
20621 FP32, FP32,
20622 /* LNER */
20623 FP32, FP32,
20624 /* LNGFR */
20625 GR64, GR32,
20626 /* LNGR */
20627 GR64, GR64,
20628 /* LNR */
20629 GR32, GR32,
20630 /* LNXBR */
20631 FP128, FP128,
20632 /* LNXR */
20633 FP128, FP128,
20634 /* LOC */
20635 GR32, GR32, ADDR64, disp20imm64, cond4, cond4,
20636 /* LOCAsm */
20637 GR32, GR32, ADDR64, disp20imm64, imm32zx4,
20638 /* LOCAsmE */
20639 GR32, GR32, ADDR64, disp20imm64,
20640 /* LOCAsmH */
20641 GR32, GR32, ADDR64, disp20imm64,
20642 /* LOCAsmHE */
20643 GR32, GR32, ADDR64, disp20imm64,
20644 /* LOCAsmL */
20645 GR32, GR32, ADDR64, disp20imm64,
20646 /* LOCAsmLE */
20647 GR32, GR32, ADDR64, disp20imm64,
20648 /* LOCAsmLH */
20649 GR32, GR32, ADDR64, disp20imm64,
20650 /* LOCAsmM */
20651 GR32, GR32, ADDR64, disp20imm64,
20652 /* LOCAsmNE */
20653 GR32, GR32, ADDR64, disp20imm64,
20654 /* LOCAsmNH */
20655 GR32, GR32, ADDR64, disp20imm64,
20656 /* LOCAsmNHE */
20657 GR32, GR32, ADDR64, disp20imm64,
20658 /* LOCAsmNL */
20659 GR32, GR32, ADDR64, disp20imm64,
20660 /* LOCAsmNLE */
20661 GR32, GR32, ADDR64, disp20imm64,
20662 /* LOCAsmNLH */
20663 GR32, GR32, ADDR64, disp20imm64,
20664 /* LOCAsmNM */
20665 GR32, GR32, ADDR64, disp20imm64,
20666 /* LOCAsmNO */
20667 GR32, GR32, ADDR64, disp20imm64,
20668 /* LOCAsmNP */
20669 GR32, GR32, ADDR64, disp20imm64,
20670 /* LOCAsmNZ */
20671 GR32, GR32, ADDR64, disp20imm64,
20672 /* LOCAsmO */
20673 GR32, GR32, ADDR64, disp20imm64,
20674 /* LOCAsmP */
20675 GR32, GR32, ADDR64, disp20imm64,
20676 /* LOCAsmZ */
20677 GR32, GR32, ADDR64, disp20imm64,
20678 /* LOCFH */
20679 GRH32, GRH32, ADDR64, disp20imm64, cond4, cond4,
20680 /* LOCFHAsm */
20681 GRH32, GRH32, ADDR64, disp20imm64, imm32zx4,
20682 /* LOCFHAsmE */
20683 GRH32, GRH32, ADDR64, disp20imm64,
20684 /* LOCFHAsmH */
20685 GRH32, GRH32, ADDR64, disp20imm64,
20686 /* LOCFHAsmHE */
20687 GRH32, GRH32, ADDR64, disp20imm64,
20688 /* LOCFHAsmL */
20689 GRH32, GRH32, ADDR64, disp20imm64,
20690 /* LOCFHAsmLE */
20691 GRH32, GRH32, ADDR64, disp20imm64,
20692 /* LOCFHAsmLH */
20693 GRH32, GRH32, ADDR64, disp20imm64,
20694 /* LOCFHAsmM */
20695 GRH32, GRH32, ADDR64, disp20imm64,
20696 /* LOCFHAsmNE */
20697 GRH32, GRH32, ADDR64, disp20imm64,
20698 /* LOCFHAsmNH */
20699 GRH32, GRH32, ADDR64, disp20imm64,
20700 /* LOCFHAsmNHE */
20701 GRH32, GRH32, ADDR64, disp20imm64,
20702 /* LOCFHAsmNL */
20703 GRH32, GRH32, ADDR64, disp20imm64,
20704 /* LOCFHAsmNLE */
20705 GRH32, GRH32, ADDR64, disp20imm64,
20706 /* LOCFHAsmNLH */
20707 GRH32, GRH32, ADDR64, disp20imm64,
20708 /* LOCFHAsmNM */
20709 GRH32, GRH32, ADDR64, disp20imm64,
20710 /* LOCFHAsmNO */
20711 GRH32, GRH32, ADDR64, disp20imm64,
20712 /* LOCFHAsmNP */
20713 GRH32, GRH32, ADDR64, disp20imm64,
20714 /* LOCFHAsmNZ */
20715 GRH32, GRH32, ADDR64, disp20imm64,
20716 /* LOCFHAsmO */
20717 GRH32, GRH32, ADDR64, disp20imm64,
20718 /* LOCFHAsmP */
20719 GRH32, GRH32, ADDR64, disp20imm64,
20720 /* LOCFHAsmZ */
20721 GRH32, GRH32, ADDR64, disp20imm64,
20722 /* LOCFHR */
20723 GRH32, GRH32, GRH32, cond4, cond4,
20724 /* LOCFHRAsm */
20725 GRH32, GRH32, GRH32, imm32zx4,
20726 /* LOCFHRAsmE */
20727 GRH32, GRH32, GRH32,
20728 /* LOCFHRAsmH */
20729 GRH32, GRH32, GRH32,
20730 /* LOCFHRAsmHE */
20731 GRH32, GRH32, GRH32,
20732 /* LOCFHRAsmL */
20733 GRH32, GRH32, GRH32,
20734 /* LOCFHRAsmLE */
20735 GRH32, GRH32, GRH32,
20736 /* LOCFHRAsmLH */
20737 GRH32, GRH32, GRH32,
20738 /* LOCFHRAsmM */
20739 GRH32, GRH32, GRH32,
20740 /* LOCFHRAsmNE */
20741 GRH32, GRH32, GRH32,
20742 /* LOCFHRAsmNH */
20743 GRH32, GRH32, GRH32,
20744 /* LOCFHRAsmNHE */
20745 GRH32, GRH32, GRH32,
20746 /* LOCFHRAsmNL */
20747 GRH32, GRH32, GRH32,
20748 /* LOCFHRAsmNLE */
20749 GRH32, GRH32, GRH32,
20750 /* LOCFHRAsmNLH */
20751 GRH32, GRH32, GRH32,
20752 /* LOCFHRAsmNM */
20753 GRH32, GRH32, GRH32,
20754 /* LOCFHRAsmNO */
20755 GRH32, GRH32, GRH32,
20756 /* LOCFHRAsmNP */
20757 GRH32, GRH32, GRH32,
20758 /* LOCFHRAsmNZ */
20759 GRH32, GRH32, GRH32,
20760 /* LOCFHRAsmO */
20761 GRH32, GRH32, GRH32,
20762 /* LOCFHRAsmP */
20763 GRH32, GRH32, GRH32,
20764 /* LOCFHRAsmZ */
20765 GRH32, GRH32, GRH32,
20766 /* LOCG */
20767 GR64, GR64, ADDR64, disp20imm64, cond4, cond4,
20768 /* LOCGAsm */
20769 GR64, GR64, ADDR64, disp20imm64, imm32zx4,
20770 /* LOCGAsmE */
20771 GR64, GR64, ADDR64, disp20imm64,
20772 /* LOCGAsmH */
20773 GR64, GR64, ADDR64, disp20imm64,
20774 /* LOCGAsmHE */
20775 GR64, GR64, ADDR64, disp20imm64,
20776 /* LOCGAsmL */
20777 GR64, GR64, ADDR64, disp20imm64,
20778 /* LOCGAsmLE */
20779 GR64, GR64, ADDR64, disp20imm64,
20780 /* LOCGAsmLH */
20781 GR64, GR64, ADDR64, disp20imm64,
20782 /* LOCGAsmM */
20783 GR64, GR64, ADDR64, disp20imm64,
20784 /* LOCGAsmNE */
20785 GR64, GR64, ADDR64, disp20imm64,
20786 /* LOCGAsmNH */
20787 GR64, GR64, ADDR64, disp20imm64,
20788 /* LOCGAsmNHE */
20789 GR64, GR64, ADDR64, disp20imm64,
20790 /* LOCGAsmNL */
20791 GR64, GR64, ADDR64, disp20imm64,
20792 /* LOCGAsmNLE */
20793 GR64, GR64, ADDR64, disp20imm64,
20794 /* LOCGAsmNLH */
20795 GR64, GR64, ADDR64, disp20imm64,
20796 /* LOCGAsmNM */
20797 GR64, GR64, ADDR64, disp20imm64,
20798 /* LOCGAsmNO */
20799 GR64, GR64, ADDR64, disp20imm64,
20800 /* LOCGAsmNP */
20801 GR64, GR64, ADDR64, disp20imm64,
20802 /* LOCGAsmNZ */
20803 GR64, GR64, ADDR64, disp20imm64,
20804 /* LOCGAsmO */
20805 GR64, GR64, ADDR64, disp20imm64,
20806 /* LOCGAsmP */
20807 GR64, GR64, ADDR64, disp20imm64,
20808 /* LOCGAsmZ */
20809 GR64, GR64, ADDR64, disp20imm64,
20810 /* LOCGHI */
20811 GR64, GR64, imm64sx16, cond4, cond4,
20812 /* LOCGHIAsm */
20813 GR64, GR64, imm64sx16, imm32zx4,
20814 /* LOCGHIAsmE */
20815 GR64, GR64, imm64sx16,
20816 /* LOCGHIAsmH */
20817 GR64, GR64, imm64sx16,
20818 /* LOCGHIAsmHE */
20819 GR64, GR64, imm64sx16,
20820 /* LOCGHIAsmL */
20821 GR64, GR64, imm64sx16,
20822 /* LOCGHIAsmLE */
20823 GR64, GR64, imm64sx16,
20824 /* LOCGHIAsmLH */
20825 GR64, GR64, imm64sx16,
20826 /* LOCGHIAsmM */
20827 GR64, GR64, imm64sx16,
20828 /* LOCGHIAsmNE */
20829 GR64, GR64, imm64sx16,
20830 /* LOCGHIAsmNH */
20831 GR64, GR64, imm64sx16,
20832 /* LOCGHIAsmNHE */
20833 GR64, GR64, imm64sx16,
20834 /* LOCGHIAsmNL */
20835 GR64, GR64, imm64sx16,
20836 /* LOCGHIAsmNLE */
20837 GR64, GR64, imm64sx16,
20838 /* LOCGHIAsmNLH */
20839 GR64, GR64, imm64sx16,
20840 /* LOCGHIAsmNM */
20841 GR64, GR64, imm64sx16,
20842 /* LOCGHIAsmNO */
20843 GR64, GR64, imm64sx16,
20844 /* LOCGHIAsmNP */
20845 GR64, GR64, imm64sx16,
20846 /* LOCGHIAsmNZ */
20847 GR64, GR64, imm64sx16,
20848 /* LOCGHIAsmO */
20849 GR64, GR64, imm64sx16,
20850 /* LOCGHIAsmP */
20851 GR64, GR64, imm64sx16,
20852 /* LOCGHIAsmZ */
20853 GR64, GR64, imm64sx16,
20854 /* LOCGR */
20855 GR64, GR64, GR64, cond4, cond4,
20856 /* LOCGRAsm */
20857 GR64, GR64, GR64, imm32zx4,
20858 /* LOCGRAsmE */
20859 GR64, GR64, GR64,
20860 /* LOCGRAsmH */
20861 GR64, GR64, GR64,
20862 /* LOCGRAsmHE */
20863 GR64, GR64, GR64,
20864 /* LOCGRAsmL */
20865 GR64, GR64, GR64,
20866 /* LOCGRAsmLE */
20867 GR64, GR64, GR64,
20868 /* LOCGRAsmLH */
20869 GR64, GR64, GR64,
20870 /* LOCGRAsmM */
20871 GR64, GR64, GR64,
20872 /* LOCGRAsmNE */
20873 GR64, GR64, GR64,
20874 /* LOCGRAsmNH */
20875 GR64, GR64, GR64,
20876 /* LOCGRAsmNHE */
20877 GR64, GR64, GR64,
20878 /* LOCGRAsmNL */
20879 GR64, GR64, GR64,
20880 /* LOCGRAsmNLE */
20881 GR64, GR64, GR64,
20882 /* LOCGRAsmNLH */
20883 GR64, GR64, GR64,
20884 /* LOCGRAsmNM */
20885 GR64, GR64, GR64,
20886 /* LOCGRAsmNO */
20887 GR64, GR64, GR64,
20888 /* LOCGRAsmNP */
20889 GR64, GR64, GR64,
20890 /* LOCGRAsmNZ */
20891 GR64, GR64, GR64,
20892 /* LOCGRAsmO */
20893 GR64, GR64, GR64,
20894 /* LOCGRAsmP */
20895 GR64, GR64, GR64,
20896 /* LOCGRAsmZ */
20897 GR64, GR64, GR64,
20898 /* LOCHHI */
20899 GRH32, GRH32, imm32sx16, cond4, cond4,
20900 /* LOCHHIAsm */
20901 GRH32, GRH32, imm32sx16, imm32zx4,
20902 /* LOCHHIAsmE */
20903 GRH32, GRH32, imm32sx16,
20904 /* LOCHHIAsmH */
20905 GRH32, GRH32, imm32sx16,
20906 /* LOCHHIAsmHE */
20907 GRH32, GRH32, imm32sx16,
20908 /* LOCHHIAsmL */
20909 GRH32, GRH32, imm32sx16,
20910 /* LOCHHIAsmLE */
20911 GRH32, GRH32, imm32sx16,
20912 /* LOCHHIAsmLH */
20913 GRH32, GRH32, imm32sx16,
20914 /* LOCHHIAsmM */
20915 GRH32, GRH32, imm32sx16,
20916 /* LOCHHIAsmNE */
20917 GRH32, GRH32, imm32sx16,
20918 /* LOCHHIAsmNH */
20919 GRH32, GRH32, imm32sx16,
20920 /* LOCHHIAsmNHE */
20921 GRH32, GRH32, imm32sx16,
20922 /* LOCHHIAsmNL */
20923 GRH32, GRH32, imm32sx16,
20924 /* LOCHHIAsmNLE */
20925 GRH32, GRH32, imm32sx16,
20926 /* LOCHHIAsmNLH */
20927 GRH32, GRH32, imm32sx16,
20928 /* LOCHHIAsmNM */
20929 GRH32, GRH32, imm32sx16,
20930 /* LOCHHIAsmNO */
20931 GRH32, GRH32, imm32sx16,
20932 /* LOCHHIAsmNP */
20933 GRH32, GRH32, imm32sx16,
20934 /* LOCHHIAsmNZ */
20935 GRH32, GRH32, imm32sx16,
20936 /* LOCHHIAsmO */
20937 GRH32, GRH32, imm32sx16,
20938 /* LOCHHIAsmP */
20939 GRH32, GRH32, imm32sx16,
20940 /* LOCHHIAsmZ */
20941 GRH32, GRH32, imm32sx16,
20942 /* LOCHI */
20943 GR32, GR32, imm32sx16, cond4, cond4,
20944 /* LOCHIAsm */
20945 GR32, GR32, imm32sx16, imm32zx4,
20946 /* LOCHIAsmE */
20947 GR32, GR32, imm32sx16,
20948 /* LOCHIAsmH */
20949 GR32, GR32, imm32sx16,
20950 /* LOCHIAsmHE */
20951 GR32, GR32, imm32sx16,
20952 /* LOCHIAsmL */
20953 GR32, GR32, imm32sx16,
20954 /* LOCHIAsmLE */
20955 GR32, GR32, imm32sx16,
20956 /* LOCHIAsmLH */
20957 GR32, GR32, imm32sx16,
20958 /* LOCHIAsmM */
20959 GR32, GR32, imm32sx16,
20960 /* LOCHIAsmNE */
20961 GR32, GR32, imm32sx16,
20962 /* LOCHIAsmNH */
20963 GR32, GR32, imm32sx16,
20964 /* LOCHIAsmNHE */
20965 GR32, GR32, imm32sx16,
20966 /* LOCHIAsmNL */
20967 GR32, GR32, imm32sx16,
20968 /* LOCHIAsmNLE */
20969 GR32, GR32, imm32sx16,
20970 /* LOCHIAsmNLH */
20971 GR32, GR32, imm32sx16,
20972 /* LOCHIAsmNM */
20973 GR32, GR32, imm32sx16,
20974 /* LOCHIAsmNO */
20975 GR32, GR32, imm32sx16,
20976 /* LOCHIAsmNP */
20977 GR32, GR32, imm32sx16,
20978 /* LOCHIAsmNZ */
20979 GR32, GR32, imm32sx16,
20980 /* LOCHIAsmO */
20981 GR32, GR32, imm32sx16,
20982 /* LOCHIAsmP */
20983 GR32, GR32, imm32sx16,
20984 /* LOCHIAsmZ */
20985 GR32, GR32, imm32sx16,
20986 /* LOCR */
20987 GR32, GR32, GR32, cond4, cond4,
20988 /* LOCRAsm */
20989 GR32, GR32, GR32, imm32zx4,
20990 /* LOCRAsmE */
20991 GR32, GR32, GR32,
20992 /* LOCRAsmH */
20993 GR32, GR32, GR32,
20994 /* LOCRAsmHE */
20995 GR32, GR32, GR32,
20996 /* LOCRAsmL */
20997 GR32, GR32, GR32,
20998 /* LOCRAsmLE */
20999 GR32, GR32, GR32,
21000 /* LOCRAsmLH */
21001 GR32, GR32, GR32,
21002 /* LOCRAsmM */
21003 GR32, GR32, GR32,
21004 /* LOCRAsmNE */
21005 GR32, GR32, GR32,
21006 /* LOCRAsmNH */
21007 GR32, GR32, GR32,
21008 /* LOCRAsmNHE */
21009 GR32, GR32, GR32,
21010 /* LOCRAsmNL */
21011 GR32, GR32, GR32,
21012 /* LOCRAsmNLE */
21013 GR32, GR32, GR32,
21014 /* LOCRAsmNLH */
21015 GR32, GR32, GR32,
21016 /* LOCRAsmNM */
21017 GR32, GR32, GR32,
21018 /* LOCRAsmNO */
21019 GR32, GR32, GR32,
21020 /* LOCRAsmNP */
21021 GR32, GR32, GR32,
21022 /* LOCRAsmNZ */
21023 GR32, GR32, GR32,
21024 /* LOCRAsmO */
21025 GR32, GR32, GR32,
21026 /* LOCRAsmP */
21027 GR32, GR32, GR32,
21028 /* LOCRAsmZ */
21029 GR32, GR32, GR32,
21030 /* LPCTL */
21031 ADDR64, disp12imm64,
21032 /* LPD */
21033 GR128, ADDR64, disp12imm64, ADDR64, disp12imm64,
21034 /* LPDBR */
21035 FP64, FP64,
21036 /* LPDFR */
21037 FP64, FP64,
21038 /* LPDFR_32 */
21039 FP32, FP32,
21040 /* LPDG */
21041 GR128, ADDR64, disp12imm64, ADDR64, disp12imm64,
21042 /* LPDR */
21043 FP64, FP64,
21044 /* LPEBR */
21045 FP32, FP32,
21046 /* LPER */
21047 FP32, FP32,
21048 /* LPGFR */
21049 GR64, GR32,
21050 /* LPGR */
21051 GR64, GR64,
21052 /* LPP */
21053 ADDR64, disp12imm64,
21054 /* LPQ */
21055 GR128, ADDR64, disp20imm64, ADDR64,
21056 /* LPR */
21057 GR32, GR32,
21058 /* LPSW */
21059 ADDR64, disp12imm64,
21060 /* LPSWE */
21061 ADDR64, disp12imm64,
21062 /* LPSWEY */
21063 ADDR64, disp20imm64,
21064 /* LPTEA */
21065 GR64, GR64, GR64, GR64, imm32zx4,
21066 /* LPXBR */
21067 FP128, FP128,
21068 /* LPXR */
21069 FP128, FP128,
21070 /* LR */
21071 GR32, GR32,
21072 /* LRA */
21073 GR64, ADDR64, disp12imm64, ADDR64,
21074 /* LRAG */
21075 GR64, ADDR64, disp20imm64, ADDR64,
21076 /* LRAY */
21077 GR64, ADDR64, disp20imm64, ADDR64,
21078 /* LRDR */
21079 FP64, FP128,
21080 /* LRER */
21081 FP32, FP64,
21082 /* LRL */
21083 GR32, pcrel32,
21084 /* LRV */
21085 GR32, ADDR64, disp20imm64, ADDR64,
21086 /* LRVG */
21087 GR64, ADDR64, disp20imm64, ADDR64,
21088 /* LRVGR */
21089 GR64, GR64,
21090 /* LRVH */
21091 GR32, ADDR64, disp20imm64, ADDR64,
21092 /* LRVR */
21093 GR32, GR32,
21094 /* LSCTL */
21095 ADDR64, disp12imm64,
21096 /* LT */
21097 GR32, ADDR64, disp20imm64, ADDR64,
21098 /* LTDBR */
21099 FP64, FP64,
21100 /* LTDR */
21101 FP64, FP64,
21102 /* LTDTR */
21103 FP64, FP64,
21104 /* LTEBR */
21105 FP32, FP32,
21106 /* LTER */
21107 FP32, FP32,
21108 /* LTG */
21109 GR64, ADDR64, disp20imm64, ADDR64,
21110 /* LTGF */
21111 GR64, ADDR64, disp20imm64, ADDR64,
21112 /* LTGFR */
21113 GR64, GR32,
21114 /* LTGR */
21115 GR64, GR64,
21116 /* LTR */
21117 GR32, GR32,
21118 /* LTXBR */
21119 FP128, FP128,
21120 /* LTXR */
21121 FP128, FP128,
21122 /* LTXTR */
21123 FP128, FP128,
21124 /* LURA */
21125 GR32, GR64,
21126 /* LURAG */
21127 GR64, GR64,
21128 /* LXD */
21129 FP128, ADDR64, disp12imm64, ADDR64,
21130 /* LXDB */
21131 FP128, ADDR64, disp12imm64, ADDR64,
21132 /* LXDBR */
21133 FP128, FP64,
21134 /* LXDR */
21135 FP128, FP64,
21136 /* LXDTR */
21137 FP128, FP64, imm32zx4,
21138 /* LXE */
21139 FP128, ADDR64, disp12imm64, ADDR64,
21140 /* LXEB */
21141 FP128, ADDR64, disp12imm64, ADDR64,
21142 /* LXEBR */
21143 FP128, FP32,
21144 /* LXER */
21145 FP128, FP32,
21146 /* LXR */
21147 FP128, FP128,
21148 /* LY */
21149 GR32, ADDR64, disp20imm64, ADDR64,
21150 /* LZDR */
21151 FP64,
21152 /* LZER */
21153 FP32,
21154 /* LZRF */
21155 GR32, ADDR64, disp20imm64, ADDR64,
21156 /* LZRG */
21157 GR64, ADDR64, disp20imm64, ADDR64,
21158 /* LZXR */
21159 FP128,
21160 /* M */
21161 GR128, GR128, ADDR64, disp12imm64, ADDR64,
21162 /* MAD */
21163 FP64, FP64, FP64, ADDR64, disp12imm64, ADDR64,
21164 /* MADB */
21165 FP64, FP64, FP64, ADDR64, disp12imm64, ADDR64,
21166 /* MADBR */
21167 FP64, FP64, FP64, FP64,
21168 /* MADR */
21169 FP64, FP64, FP64, FP64,
21170 /* MAE */
21171 FP32, FP32, FP32, ADDR64, disp12imm64, ADDR64,
21172 /* MAEB */
21173 FP32, FP32, FP32, ADDR64, disp12imm64, ADDR64,
21174 /* MAEBR */
21175 FP32, FP32, FP32, FP32,
21176 /* MAER */
21177 FP32, FP32, FP32, FP32,
21178 /* MAY */
21179 FP64, FP64, FP64, ADDR64, disp12imm64, ADDR64,
21180 /* MAYH */
21181 FP64, FP64, FP64, ADDR64, disp12imm64, ADDR64,
21182 /* MAYHR */
21183 FP64, FP64, FP64, FP64,
21184 /* MAYL */
21185 FP64, FP64, FP64, ADDR64, disp12imm64, ADDR64,
21186 /* MAYLR */
21187 FP64, FP64, FP64, FP64,
21188 /* MAYR */
21189 FP64, FP64, FP64, FP64,
21190 /* MC */
21191 ADDR64, disp12imm64, imm32zx8,
21192 /* MD */
21193 FP64, FP64, ADDR64, disp12imm64, ADDR64,
21194 /* MDB */
21195 FP64, FP64, ADDR64, disp12imm64, ADDR64,
21196 /* MDBR */
21197 FP64, FP64, FP64,
21198 /* MDE */
21199 FP64, FP64, ADDR64, disp12imm64, ADDR64,
21200 /* MDEB */
21201 FP64, FP64, ADDR64, disp12imm64, ADDR64,
21202 /* MDEBR */
21203 FP64, FP64, FP32,
21204 /* MDER */
21205 FP64, FP64, FP32,
21206 /* MDR */
21207 FP64, FP64, FP64,
21208 /* MDTR */
21209 FP64, FP64, FP64,
21210 /* MDTRA */
21211 FP64, FP64, FP64, imm32zx4,
21212 /* ME */
21213 FP64, FP64, ADDR64, disp12imm64, ADDR64,
21214 /* MEE */
21215 FP32, FP32, ADDR64, disp12imm64, ADDR64,
21216 /* MEEB */
21217 FP32, FP32, ADDR64, disp12imm64, ADDR64,
21218 /* MEEBR */
21219 FP32, FP32, FP32,
21220 /* MEER */
21221 FP32, FP32, FP32,
21222 /* MER */
21223 FP64, FP64, FP32,
21224 /* MFY */
21225 GR128, GR128, ADDR64, disp20imm64, ADDR64,
21226 /* MG */
21227 GR128, GR128, ADDR64, disp20imm64, ADDR64,
21228 /* MGH */
21229 GR64, GR64, ADDR64, disp20imm64, ADDR64,
21230 /* MGHI */
21231 GR64, GR64, imm64sx16,
21232 /* MGRK */
21233 GR128, GR64, GR64,
21234 /* MH */
21235 GR32, GR32, ADDR64, disp12imm64, ADDR64,
21236 /* MHI */
21237 GR32, GR32, imm32sx16,
21238 /* MHY */
21239 GR32, GR32, ADDR64, disp20imm64, ADDR64,
21240 /* ML */
21241 GR128, GR128, ADDR64, disp20imm64, ADDR64,
21242 /* MLG */
21243 GR128, GR128, ADDR64, disp20imm64, ADDR64,
21244 /* MLGR */
21245 GR128, GR128, GR64,
21246 /* MLR */
21247 GR128, GR128, GR32,
21248 /* MP */
21249 ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64,
21250 /* MR */
21251 GR128, GR128, GR32,
21252 /* MS */
21253 GR32, GR32, ADDR64, disp12imm64, ADDR64,
21254 /* MSC */
21255 GR32, GR32, ADDR64, disp20imm64, ADDR64,
21256 /* MSCH */
21257 ADDR64, disp12imm64,
21258 /* MSD */
21259 FP64, FP64, FP64, ADDR64, disp12imm64, ADDR64,
21260 /* MSDB */
21261 FP64, FP64, FP64, ADDR64, disp12imm64, ADDR64,
21262 /* MSDBR */
21263 FP64, FP64, FP64, FP64,
21264 /* MSDR */
21265 FP64, FP64, FP64, FP64,
21266 /* MSE */
21267 FP32, FP32, FP32, ADDR64, disp12imm64, ADDR64,
21268 /* MSEB */
21269 FP32, FP32, FP32, ADDR64, disp12imm64, ADDR64,
21270 /* MSEBR */
21271 FP32, FP32, FP32, FP32,
21272 /* MSER */
21273 FP32, FP32, FP32, FP32,
21274 /* MSFI */
21275 GR32, GR32, simm32,
21276 /* MSG */
21277 GR64, GR64, ADDR64, disp20imm64, ADDR64,
21278 /* MSGC */
21279 GR64, GR64, ADDR64, disp20imm64, ADDR64,
21280 /* MSGF */
21281 GR64, GR64, ADDR64, disp20imm64, ADDR64,
21282 /* MSGFI */
21283 GR64, GR64, imm64sx32,
21284 /* MSGFR */
21285 GR64, GR64, GR32,
21286 /* MSGR */
21287 GR64, GR64, GR64,
21288 /* MSGRKC */
21289 GR64, GR64, GR64,
21290 /* MSR */
21291 GR32, GR32, GR32,
21292 /* MSRKC */
21293 GR32, GR32, GR32,
21294 /* MSTA */
21295 GR128,
21296 /* MSY */
21297 GR32, GR32, ADDR64, disp20imm64, ADDR64,
21298 /* MVC */
21299 ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64,
21300 /* MVCDK */
21301 ADDR64, disp12imm64, ADDR64, disp12imm64,
21302 /* MVCIN */
21303 ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64,
21304 /* MVCK */
21305 ADDR64, disp12imm64, GR64, ADDR64, disp12imm64, GR64,
21306 /* MVCL */
21307 GR128, GR128, GR128, GR128,
21308 /* MVCLE */
21309 GR128, GR128, GR128, GR128, ADDR32, disp12imm32,
21310 /* MVCLU */
21311 GR128, GR128, GR128, GR128, ADDR32, disp20imm32,
21312 /* MVCOS */
21313 ADDR64, disp12imm64, ADDR64, disp12imm64, GR64,
21314 /* MVCP */
21315 ADDR64, disp12imm64, GR64, ADDR64, disp12imm64, GR64,
21316 /* MVCRL */
21317 ADDR64, disp12imm64, ADDR64, disp12imm64,
21318 /* MVCS */
21319 ADDR64, disp12imm64, GR64, ADDR64, disp12imm64, GR64,
21320 /* MVCSK */
21321 ADDR64, disp12imm64, ADDR64, disp12imm64,
21322 /* MVGHI */
21323 ADDR64, disp12imm64, imm64sx16,
21324 /* MVHHI */
21325 ADDR64, disp12imm64, imm32sx16trunc,
21326 /* MVHI */
21327 ADDR64, disp12imm64, imm32sx16,
21328 /* MVI */
21329 ADDR64, disp12imm64, imm32zx8trunc,
21330 /* MVIY */
21331 ADDR64, disp20imm64, imm32zx8trunc,
21332 /* MVN */
21333 ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64,
21334 /* MVO */
21335 ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64,
21336 /* MVPG */
21337 GR64, GR64,
21338 /* MVST */
21339 GR64, GR64, GR64, GR64,
21340 /* MVZ */
21341 ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64,
21342 /* MXBR */
21343 FP128, FP128, FP128,
21344 /* MXD */
21345 FP128, FP128, ADDR64, disp12imm64, ADDR64,
21346 /* MXDB */
21347 FP128, FP128, ADDR64, disp12imm64, ADDR64,
21348 /* MXDBR */
21349 FP128, FP128, FP64,
21350 /* MXDR */
21351 FP128, FP128, FP64,
21352 /* MXR */
21353 FP128, FP128, FP128,
21354 /* MXTR */
21355 FP128, FP128, FP128,
21356 /* MXTRA */
21357 FP128, FP128, FP128, imm32zx4,
21358 /* MY */
21359 FP128, FP64, ADDR64, disp12imm64, ADDR64,
21360 /* MYH */
21361 FP64, FP64, ADDR64, disp12imm64, ADDR64,
21362 /* MYHR */
21363 FP64, FP64, FP64,
21364 /* MYL */
21365 FP64, FP64, ADDR64, disp12imm64, ADDR64,
21366 /* MYLR */
21367 FP64, FP64, FP64,
21368 /* MYR */
21369 FP128, FP64, FP64,
21370 /* N */
21371 GR32, GR32, ADDR64, disp12imm64, ADDR64,
21372 /* NC */
21373 ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64,
21374 /* NCGRK */
21375 GR64, GR64, GR64,
21376 /* NCRK */
21377 GR32, GR32, GR32,
21378 /* NG */
21379 GR64, GR64, ADDR64, disp20imm64, ADDR64,
21380 /* NGR */
21381 GR64, GR64, GR64,
21382 /* NGRK */
21383 GR64, GR64, GR64,
21384 /* NI */
21385 ADDR64, disp12imm64, imm32zx8,
21386 /* NIAI */
21387 imm32zx4, imm32zx4,
21388 /* NIHF */
21389 GRH32, GRH32, uimm32,
21390 /* NIHH */
21391 GRH32, GRH32, imm32lh16c,
21392 /* NIHL */
21393 GRH32, GRH32, imm32ll16c,
21394 /* NILF */
21395 GR32, GR32, uimm32,
21396 /* NILH */
21397 GR32, GR32, imm32lh16c,
21398 /* NILL */
21399 GR32, GR32, imm32ll16c,
21400 /* NIY */
21401 ADDR64, disp20imm64, imm32zx8,
21402 /* NNGRK */
21403 GR64, GR64, GR64,
21404 /* NNPA */
21405 /* NNRK */
21406 GR32, GR32, GR32,
21407 /* NOGRK */
21408 GR64, GR64, GR64,
21409 /* NOP */
21410 ADDR64, disp12imm64, ADDR64,
21411 /* NOPR */
21412 GR64,
21413 /* NOP_bare */
21414 /* NORK */
21415 GR32, GR32, GR32,
21416 /* NOTGR */
21417 GR64, GR64, GR64,
21418 /* NOTR */
21419 GR32, GR32, GR32,
21420 /* NR */
21421 GR32, GR32, GR32,
21422 /* NRK */
21423 GR32, GR32, GR32,
21424 /* NTSTG */
21425 GR64, ADDR64, disp20imm64, ADDR64,
21426 /* NXGRK */
21427 GR64, GR64, GR64,
21428 /* NXRK */
21429 GR32, GR32, GR32,
21430 /* NY */
21431 GR32, GR32, ADDR64, disp20imm64, ADDR64,
21432 /* O */
21433 GR32, GR32, ADDR64, disp12imm64, ADDR64,
21434 /* OC */
21435 ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64,
21436 /* OCGRK */
21437 GR64, GR64, GR64,
21438 /* OCRK */
21439 GR32, GR32, GR32,
21440 /* OG */
21441 GR64, GR64, ADDR64, disp20imm64, ADDR64,
21442 /* OGR */
21443 GR64, GR64, GR64,
21444 /* OGRK */
21445 GR64, GR64, GR64,
21446 /* OI */
21447 ADDR64, disp12imm64, imm32zx8,
21448 /* OIHF */
21449 GRH32, GRH32, uimm32,
21450 /* OIHH */
21451 GRH32, GRH32, imm32lh16,
21452 /* OIHL */
21453 GRH32, GRH32, imm32ll16,
21454 /* OILF */
21455 GR32, GR32, uimm32,
21456 /* OILH */
21457 GR32, GR32, imm32lh16,
21458 /* OILL */
21459 GR32, GR32, imm32ll16,
21460 /* OIY */
21461 ADDR64, disp20imm64, imm32zx8,
21462 /* OR */
21463 GR32, GR32, GR32,
21464 /* ORK */
21465 GR32, GR32, GR32,
21466 /* OY */
21467 GR32, GR32, ADDR64, disp20imm64, ADDR64,
21468 /* PACK */
21469 ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64,
21470 /* PALB */
21471 /* PC */
21472 ADDR64, disp12imm64,
21473 /* PCC */
21474 /* PCKMO */
21475 /* PFD */
21476 imm32zx4, ADDR64, disp20imm64, ADDR64,
21477 /* PFDRL */
21478 imm32zx4_timm, pcrel32,
21479 /* PFMF */
21480 GR64, GR32, GR64,
21481 /* PFPO */
21482 /* PGIN */
21483 GR64, GR64,
21484 /* PGOUT */
21485 GR64, GR64,
21486 /* PKA */
21487 ADDR64, disp12imm64, ADDR64, disp12imm64, len8imm64,
21488 /* PKU */
21489 ADDR64, disp12imm64, ADDR64, disp12imm64, len8imm64,
21490 /* PLO */
21491 GR64, ADDR64, disp12imm64, GR64, ADDR64, disp12imm64,
21492 /* POPCNT */
21493 GR64, GR64,
21494 /* POPCNTOpt */
21495 GR64, GR64, imm32zx4,
21496 /* PPA */
21497 GR64, GR64, imm32zx4,
21498 /* PPNO */
21499 GR128, GR128, GR128, GR128,
21500 /* PR */
21501 /* PRNO */
21502 GR128, GR128, GR128, GR128,
21503 /* PT */
21504 GR32, GR64,
21505 /* PTF */
21506 GR64, GR64,
21507 /* PTFF */
21508 /* PTI */
21509 GR64, GR64,
21510 /* PTLB */
21511 /* QADTR */
21512 FP64, FP64, FP64, FP64, imm32zx4,
21513 /* QAXTR */
21514 FP128, FP128, FP128, FP128, imm32zx4,
21515 /* QCTRI */
21516 ADDR64, disp12imm64,
21517 /* QPACI */
21518 ADDR64, disp12imm64,
21519 /* QSI */
21520 ADDR64, disp12imm64,
21521 /* RCHP */
21522 /* RDP */
21523 GR64, GR64, GR64, imm32zx4,
21524 /* RDPOpt */
21525 GR64, GR64, GR64,
21526 /* RISBG */
21527 GR64, GR64, GR64, imm32zx8, imm32zx8, imm32zx8,
21528 /* RISBG32 */
21529 GR32, GR32, GR32, imm32zx8, imm32zx8, imm32zx8,
21530 /* RISBGN */
21531 GR64, GR64, GR64, imm32zx8, imm32zx8, imm32zx8,
21532 /* RISBGNZ */
21533 GR64, GR64, GR64, imm32zx8, imm32zx8, imm32zx8,
21534 /* RISBGZ */
21535 GR64, GR64, GR64, imm32zx8, imm32zx8, imm32zx8,
21536 /* RISBHG */
21537 GRH32, GRH32, GR64, imm32zx8, imm32zx8, imm32zx8,
21538 /* RISBLG */
21539 GR32, GR32, GR64, imm32zx8, imm32zx8, imm32zx8,
21540 /* RLL */
21541 GR32, GR32, ADDR32, disp20imm32,
21542 /* RLLG */
21543 GR64, GR64, ADDR32, disp20imm32,
21544 /* RNSBG */
21545 GR64, GR64, GR64, imm32zx8, imm32zx8, imm32zx8,
21546 /* ROSBG */
21547 GR64, GR64, GR64, imm32zx8, imm32zx8, imm32zx8,
21548 /* RP */
21549 ADDR64, disp12imm64,
21550 /* RRBE */
21551 GR32, GR64,
21552 /* RRBM */
21553 GR64, GR64,
21554 /* RRDTR */
21555 FP64, FP64, FP64, FP64, imm32zx4,
21556 /* RRXTR */
21557 FP128, FP128, FP128, FP128, imm32zx4,
21558 /* RSCH */
21559 /* RXSBG */
21560 GR64, GR64, GR64, imm32zx8, imm32zx8, imm32zx8,
21561 /* S */
21562 GR32, GR32, ADDR64, disp12imm64, ADDR64,
21563 /* SAC */
21564 ADDR64, disp12imm64,
21565 /* SACF */
21566 ADDR64, disp12imm64,
21567 /* SAL */
21568 /* SAM24 */
21569 /* SAM31 */
21570 /* SAM64 */
21571 /* SAR */
21572 AR32, GR32,
21573 /* SCCTR */
21574 GR64, GR64,
21575 /* SCHM */
21576 /* SCK */
21577 ADDR64, disp12imm64,
21578 /* SCKC */
21579 ADDR64, disp12imm64,
21580 /* SCKPF */
21581 /* SD */
21582 FP64, FP64, ADDR64, disp12imm64, ADDR64,
21583 /* SDB */
21584 FP64, FP64, ADDR64, disp12imm64, ADDR64,
21585 /* SDBR */
21586 FP64, FP64, FP64,
21587 /* SDR */
21588 FP64, FP64, FP64,
21589 /* SDTR */
21590 FP64, FP64, FP64,
21591 /* SDTRA */
21592 FP64, FP64, FP64, imm32zx4,
21593 /* SE */
21594 FP32, FP32, ADDR64, disp12imm64, ADDR64,
21595 /* SEB */
21596 FP32, FP32, ADDR64, disp12imm64, ADDR64,
21597 /* SEBR */
21598 FP32, FP32, FP32,
21599 /* SELFHR */
21600 GRH32, GRH32, GRH32, cond4, cond4,
21601 /* SELFHRAsm */
21602 GRH32, GRH32, GRH32, imm32zx4,
21603 /* SELFHRAsmE */
21604 GRH32, GRH32, GRH32,
21605 /* SELFHRAsmH */
21606 GRH32, GRH32, GRH32,
21607 /* SELFHRAsmHE */
21608 GRH32, GRH32, GRH32,
21609 /* SELFHRAsmL */
21610 GRH32, GRH32, GRH32,
21611 /* SELFHRAsmLE */
21612 GRH32, GRH32, GRH32,
21613 /* SELFHRAsmLH */
21614 GRH32, GRH32, GRH32,
21615 /* SELFHRAsmM */
21616 GRH32, GRH32, GRH32,
21617 /* SELFHRAsmNE */
21618 GRH32, GRH32, GRH32,
21619 /* SELFHRAsmNH */
21620 GRH32, GRH32, GRH32,
21621 /* SELFHRAsmNHE */
21622 GRH32, GRH32, GRH32,
21623 /* SELFHRAsmNL */
21624 GRH32, GRH32, GRH32,
21625 /* SELFHRAsmNLE */
21626 GRH32, GRH32, GRH32,
21627 /* SELFHRAsmNLH */
21628 GRH32, GRH32, GRH32,
21629 /* SELFHRAsmNM */
21630 GRH32, GRH32, GRH32,
21631 /* SELFHRAsmNO */
21632 GRH32, GRH32, GRH32,
21633 /* SELFHRAsmNP */
21634 GRH32, GRH32, GRH32,
21635 /* SELFHRAsmNZ */
21636 GRH32, GRH32, GRH32,
21637 /* SELFHRAsmO */
21638 GRH32, GRH32, GRH32,
21639 /* SELFHRAsmP */
21640 GRH32, GRH32, GRH32,
21641 /* SELFHRAsmZ */
21642 GRH32, GRH32, GRH32,
21643 /* SELGR */
21644 GR64, GR64, GR64, cond4, cond4,
21645 /* SELGRAsm */
21646 GR64, GR64, GR64, imm32zx4,
21647 /* SELGRAsmE */
21648 GR64, GR64, GR64,
21649 /* SELGRAsmH */
21650 GR64, GR64, GR64,
21651 /* SELGRAsmHE */
21652 GR64, GR64, GR64,
21653 /* SELGRAsmL */
21654 GR64, GR64, GR64,
21655 /* SELGRAsmLE */
21656 GR64, GR64, GR64,
21657 /* SELGRAsmLH */
21658 GR64, GR64, GR64,
21659 /* SELGRAsmM */
21660 GR64, GR64, GR64,
21661 /* SELGRAsmNE */
21662 GR64, GR64, GR64,
21663 /* SELGRAsmNH */
21664 GR64, GR64, GR64,
21665 /* SELGRAsmNHE */
21666 GR64, GR64, GR64,
21667 /* SELGRAsmNL */
21668 GR64, GR64, GR64,
21669 /* SELGRAsmNLE */
21670 GR64, GR64, GR64,
21671 /* SELGRAsmNLH */
21672 GR64, GR64, GR64,
21673 /* SELGRAsmNM */
21674 GR64, GR64, GR64,
21675 /* SELGRAsmNO */
21676 GR64, GR64, GR64,
21677 /* SELGRAsmNP */
21678 GR64, GR64, GR64,
21679 /* SELGRAsmNZ */
21680 GR64, GR64, GR64,
21681 /* SELGRAsmO */
21682 GR64, GR64, GR64,
21683 /* SELGRAsmP */
21684 GR64, GR64, GR64,
21685 /* SELGRAsmZ */
21686 GR64, GR64, GR64,
21687 /* SELR */
21688 GR32, GR32, GR32, cond4, cond4,
21689 /* SELRAsm */
21690 GR32, GR32, GR32, imm32zx4,
21691 /* SELRAsmE */
21692 GR32, GR32, GR32,
21693 /* SELRAsmH */
21694 GR32, GR32, GR32,
21695 /* SELRAsmHE */
21696 GR32, GR32, GR32,
21697 /* SELRAsmL */
21698 GR32, GR32, GR32,
21699 /* SELRAsmLE */
21700 GR32, GR32, GR32,
21701 /* SELRAsmLH */
21702 GR32, GR32, GR32,
21703 /* SELRAsmM */
21704 GR32, GR32, GR32,
21705 /* SELRAsmNE */
21706 GR32, GR32, GR32,
21707 /* SELRAsmNH */
21708 GR32, GR32, GR32,
21709 /* SELRAsmNHE */
21710 GR32, GR32, GR32,
21711 /* SELRAsmNL */
21712 GR32, GR32, GR32,
21713 /* SELRAsmNLE */
21714 GR32, GR32, GR32,
21715 /* SELRAsmNLH */
21716 GR32, GR32, GR32,
21717 /* SELRAsmNM */
21718 GR32, GR32, GR32,
21719 /* SELRAsmNO */
21720 GR32, GR32, GR32,
21721 /* SELRAsmNP */
21722 GR32, GR32, GR32,
21723 /* SELRAsmNZ */
21724 GR32, GR32, GR32,
21725 /* SELRAsmO */
21726 GR32, GR32, GR32,
21727 /* SELRAsmP */
21728 GR32, GR32, GR32,
21729 /* SELRAsmZ */
21730 GR32, GR32, GR32,
21731 /* SER */
21732 FP32, FP32, FP32,
21733 /* SFASR */
21734 GR32,
21735 /* SFPC */
21736 GR32,
21737 /* SG */
21738 GR64, GR64, ADDR64, disp20imm64, ADDR64,
21739 /* SGF */
21740 GR64, GR64, ADDR64, disp20imm64, ADDR64,
21741 /* SGFR */
21742 GR64, GR64, GR32,
21743 /* SGH */
21744 GR64, GR64, ADDR64, disp20imm64, ADDR64,
21745 /* SGR */
21746 GR64, GR64, GR64,
21747 /* SGRK */
21748 GR64, GR64, GR64,
21749 /* SH */
21750 GR32, GR32, ADDR64, disp12imm64, ADDR64,
21751 /* SHHHR */
21752 GRH32, GRH32, GRH32,
21753 /* SHHLR */
21754 GRH32, GRH32, GR32,
21755 /* SHY */
21756 GR32, GR32, ADDR64, disp20imm64, ADDR64,
21757 /* SIE */
21758 ADDR64, disp12imm64,
21759 /* SIGA */
21760 ADDR64, disp12imm64,
21761 /* SIGP */
21762 GR64, GR64, ADDR64, disp12imm64,
21763 /* SL */
21764 GR32, GR32, ADDR64, disp12imm64, ADDR64,
21765 /* SLA */
21766 GR32, GR32, ADDR32, disp12imm32,
21767 /* SLAG */
21768 GR64, GR64, ADDR32, disp20imm32,
21769 /* SLAK */
21770 GR32, GR32, ADDR32, disp20imm32,
21771 /* SLB */
21772 GR32, GR32, ADDR64, disp20imm64, ADDR64,
21773 /* SLBG */
21774 GR64, GR64, ADDR64, disp20imm64, ADDR64,
21775 /* SLBGR */
21776 GR64, GR64, GR64,
21777 /* SLBR */
21778 GR32, GR32, GR32,
21779 /* SLDA */
21780 GR128, GR128, ADDR32, disp12imm32,
21781 /* SLDL */
21782 GR128, GR128, ADDR32, disp12imm32,
21783 /* SLDT */
21784 FP64, FP64, ADDR64, disp12imm64, ADDR64,
21785 /* SLFI */
21786 GR32, GR32, uimm32,
21787 /* SLG */
21788 GR64, GR64, ADDR64, disp20imm64, ADDR64,
21789 /* SLGF */
21790 GR64, GR64, ADDR64, disp20imm64, ADDR64,
21791 /* SLGFI */
21792 GR64, GR64, imm64zx32,
21793 /* SLGFR */
21794 GR64, GR64, GR32,
21795 /* SLGR */
21796 GR64, GR64, GR64,
21797 /* SLGRK */
21798 GR64, GR64, GR64,
21799 /* SLHHHR */
21800 GRH32, GRH32, GRH32,
21801 /* SLHHLR */
21802 GRH32, GRH32, GR32,
21803 /* SLL */
21804 GR32, GR32, ADDR32, disp12imm32,
21805 /* SLLG */
21806 GR64, GR64, ADDR32, disp20imm32,
21807 /* SLLK */
21808 GR32, GR32, ADDR32, disp20imm32,
21809 /* SLR */
21810 GR32, GR32, GR32,
21811 /* SLRK */
21812 GR32, GR32, GR32,
21813 /* SLXT */
21814 FP128, FP128, ADDR64, disp12imm64, ADDR64,
21815 /* SLY */
21816 GR32, GR32, ADDR64, disp20imm64, ADDR64,
21817 /* SORTL */
21818 GR128, GR128, GR128, GR128,
21819 /* SP */
21820 ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64,
21821 /* SPCTR */
21822 GR64, GR64,
21823 /* SPKA */
21824 ADDR64, disp12imm64,
21825 /* SPM */
21826 GR32,
21827 /* SPT */
21828 ADDR64, disp12imm64,
21829 /* SPX */
21830 ADDR64, disp12imm64,
21831 /* SQD */
21832 FP64, ADDR64, disp12imm64, ADDR64,
21833 /* SQDB */
21834 FP64, ADDR64, disp12imm64, ADDR64,
21835 /* SQDBR */
21836 FP64, FP64,
21837 /* SQDR */
21838 FP64, FP64,
21839 /* SQE */
21840 FP32, ADDR64, disp12imm64, ADDR64,
21841 /* SQEB */
21842 FP32, ADDR64, disp12imm64, ADDR64,
21843 /* SQEBR */
21844 FP32, FP32,
21845 /* SQER */
21846 FP32, FP32,
21847 /* SQXBR */
21848 FP128, FP128,
21849 /* SQXR */
21850 FP128, FP128,
21851 /* SR */
21852 GR32, GR32, GR32,
21853 /* SRA */
21854 GR32, GR32, ADDR32, disp12imm32,
21855 /* SRAG */
21856 GR64, GR64, ADDR32, disp20imm32,
21857 /* SRAK */
21858 GR32, GR32, ADDR32, disp20imm32,
21859 /* SRDA */
21860 GR128, GR128, ADDR32, disp12imm32,
21861 /* SRDL */
21862 GR128, GR128, ADDR32, disp12imm32,
21863 /* SRDT */
21864 FP64, FP64, ADDR64, disp12imm64, ADDR64,
21865 /* SRK */
21866 GR32, GR32, GR32,
21867 /* SRL */
21868 GR32, GR32, ADDR32, disp12imm32,
21869 /* SRLG */
21870 GR64, GR64, ADDR32, disp20imm32,
21871 /* SRLK */
21872 GR32, GR32, ADDR32, disp20imm32,
21873 /* SRNM */
21874 ADDR32, disp12imm32,
21875 /* SRNMB */
21876 ADDR32, disp12imm32,
21877 /* SRNMT */
21878 ADDR32, disp12imm32,
21879 /* SRP */
21880 ADDR64, disp12imm64, len4imm64, ADDR32, disp12imm32, imm32zx4,
21881 /* SRST */
21882 GR64, GR64, GR64, GR64,
21883 /* SRSTU */
21884 GR64, GR64, GR64, GR64,
21885 /* SRXT */
21886 FP128, FP128, ADDR64, disp12imm64, ADDR64,
21887 /* SSAIR */
21888 GR64,
21889 /* SSAR */
21890 GR32,
21891 /* SSCH */
21892 ADDR64, disp12imm64,
21893 /* SSKE */
21894 GR32, GR64, imm32zx4,
21895 /* SSKEOpt */
21896 GR32, GR64,
21897 /* SSM */
21898 ADDR64, disp12imm64,
21899 /* ST */
21900 GR32, ADDR64, disp12imm64, ADDR64,
21901 /* STAM */
21902 AR32, AR32, ADDR64, disp12imm64,
21903 /* STAMY */
21904 AR32, AR32, ADDR64, disp20imm64,
21905 /* STAP */
21906 ADDR64, disp12imm64,
21907 /* STBEAR */
21908 ADDR64, disp12imm64,
21909 /* STC */
21910 GR32, ADDR64, disp12imm64, ADDR64,
21911 /* STCH */
21912 GRH32, ADDR64, disp20imm64, ADDR64,
21913 /* STCK */
21914 ADDR64, disp12imm64,
21915 /* STCKC */
21916 ADDR64, disp12imm64,
21917 /* STCKE */
21918 ADDR64, disp12imm64,
21919 /* STCKF */
21920 ADDR64, disp12imm64,
21921 /* STCM */
21922 GR32, imm32zx4, ADDR64, disp12imm64,
21923 /* STCMH */
21924 GRH32, imm32zx4, ADDR64, disp20imm64,
21925 /* STCMY */
21926 GR32, imm32zx4, ADDR64, disp20imm64,
21927 /* STCPS */
21928 ADDR64, disp12imm64,
21929 /* STCRW */
21930 ADDR64, disp12imm64,
21931 /* STCTG */
21932 CR64, CR64, ADDR64, disp20imm64,
21933 /* STCTL */
21934 CR64, CR64, ADDR64, disp12imm64,
21935 /* STCY */
21936 GR32, ADDR64, disp20imm64, ADDR64,
21937 /* STD */
21938 FP64, ADDR64, disp12imm64, ADDR64,
21939 /* STDY */
21940 FP64, ADDR64, disp20imm64, ADDR64,
21941 /* STE */
21942 FP32, ADDR64, disp12imm64, ADDR64,
21943 /* STEY */
21944 FP32, ADDR64, disp20imm64, ADDR64,
21945 /* STFH */
21946 GRH32, ADDR64, disp20imm64, ADDR64,
21947 /* STFL */
21948 ADDR64, disp12imm64,
21949 /* STFLE */
21950 ADDR64, disp12imm64,
21951 /* STFPC */
21952 ADDR64, disp12imm64,
21953 /* STG */
21954 GR64, ADDR64, disp20imm64, ADDR64,
21955 /* STGRL */
21956 GR64, pcrel32,
21957 /* STGSC */
21958 GR64, ADDR64, disp20imm64, ADDR64,
21959 /* STH */
21960 GR32, ADDR64, disp12imm64, ADDR64,
21961 /* STHH */
21962 GRH32, ADDR64, disp20imm64, ADDR64,
21963 /* STHRL */
21964 GR32, pcrel32,
21965 /* STHY */
21966 GR32, ADDR64, disp20imm64, ADDR64,
21967 /* STIDP */
21968 ADDR64, disp12imm64,
21969 /* STM */
21970 GR32, GR32, ADDR64, disp12imm64,
21971 /* STMG */
21972 GR64, GR64, ADDR64, disp20imm64,
21973 /* STMH */
21974 GRH32, GRH32, ADDR64, disp20imm64,
21975 /* STMY */
21976 GR32, GR32, ADDR64, disp20imm64,
21977 /* STNSM */
21978 ADDR64, disp12imm64, imm32zx8,
21979 /* STOC */
21980 GR32, ADDR64, disp20imm64, cond4, cond4,
21981 /* STOCAsm */
21982 GR32, ADDR64, disp20imm64, imm32zx4,
21983 /* STOCAsmE */
21984 GR32, ADDR64, disp20imm64,
21985 /* STOCAsmH */
21986 GR32, ADDR64, disp20imm64,
21987 /* STOCAsmHE */
21988 GR32, ADDR64, disp20imm64,
21989 /* STOCAsmL */
21990 GR32, ADDR64, disp20imm64,
21991 /* STOCAsmLE */
21992 GR32, ADDR64, disp20imm64,
21993 /* STOCAsmLH */
21994 GR32, ADDR64, disp20imm64,
21995 /* STOCAsmM */
21996 GR32, ADDR64, disp20imm64,
21997 /* STOCAsmNE */
21998 GR32, ADDR64, disp20imm64,
21999 /* STOCAsmNH */
22000 GR32, ADDR64, disp20imm64,
22001 /* STOCAsmNHE */
22002 GR32, ADDR64, disp20imm64,
22003 /* STOCAsmNL */
22004 GR32, ADDR64, disp20imm64,
22005 /* STOCAsmNLE */
22006 GR32, ADDR64, disp20imm64,
22007 /* STOCAsmNLH */
22008 GR32, ADDR64, disp20imm64,
22009 /* STOCAsmNM */
22010 GR32, ADDR64, disp20imm64,
22011 /* STOCAsmNO */
22012 GR32, ADDR64, disp20imm64,
22013 /* STOCAsmNP */
22014 GR32, ADDR64, disp20imm64,
22015 /* STOCAsmNZ */
22016 GR32, ADDR64, disp20imm64,
22017 /* STOCAsmO */
22018 GR32, ADDR64, disp20imm64,
22019 /* STOCAsmP */
22020 GR32, ADDR64, disp20imm64,
22021 /* STOCAsmZ */
22022 GR32, ADDR64, disp20imm64,
22023 /* STOCFH */
22024 GRH32, ADDR64, disp20imm64, cond4, cond4,
22025 /* STOCFHAsm */
22026 GRH32, ADDR64, disp20imm64, imm32zx4,
22027 /* STOCFHAsmE */
22028 GRH32, ADDR64, disp20imm64,
22029 /* STOCFHAsmH */
22030 GRH32, ADDR64, disp20imm64,
22031 /* STOCFHAsmHE */
22032 GRH32, ADDR64, disp20imm64,
22033 /* STOCFHAsmL */
22034 GRH32, ADDR64, disp20imm64,
22035 /* STOCFHAsmLE */
22036 GRH32, ADDR64, disp20imm64,
22037 /* STOCFHAsmLH */
22038 GRH32, ADDR64, disp20imm64,
22039 /* STOCFHAsmM */
22040 GRH32, ADDR64, disp20imm64,
22041 /* STOCFHAsmNE */
22042 GRH32, ADDR64, disp20imm64,
22043 /* STOCFHAsmNH */
22044 GRH32, ADDR64, disp20imm64,
22045 /* STOCFHAsmNHE */
22046 GRH32, ADDR64, disp20imm64,
22047 /* STOCFHAsmNL */
22048 GRH32, ADDR64, disp20imm64,
22049 /* STOCFHAsmNLE */
22050 GRH32, ADDR64, disp20imm64,
22051 /* STOCFHAsmNLH */
22052 GRH32, ADDR64, disp20imm64,
22053 /* STOCFHAsmNM */
22054 GRH32, ADDR64, disp20imm64,
22055 /* STOCFHAsmNO */
22056 GRH32, ADDR64, disp20imm64,
22057 /* STOCFHAsmNP */
22058 GRH32, ADDR64, disp20imm64,
22059 /* STOCFHAsmNZ */
22060 GRH32, ADDR64, disp20imm64,
22061 /* STOCFHAsmO */
22062 GRH32, ADDR64, disp20imm64,
22063 /* STOCFHAsmP */
22064 GRH32, ADDR64, disp20imm64,
22065 /* STOCFHAsmZ */
22066 GRH32, ADDR64, disp20imm64,
22067 /* STOCG */
22068 GR64, ADDR64, disp20imm64, cond4, cond4,
22069 /* STOCGAsm */
22070 GR64, ADDR64, disp20imm64, imm32zx4,
22071 /* STOCGAsmE */
22072 GR64, ADDR64, disp20imm64,
22073 /* STOCGAsmH */
22074 GR64, ADDR64, disp20imm64,
22075 /* STOCGAsmHE */
22076 GR64, ADDR64, disp20imm64,
22077 /* STOCGAsmL */
22078 GR64, ADDR64, disp20imm64,
22079 /* STOCGAsmLE */
22080 GR64, ADDR64, disp20imm64,
22081 /* STOCGAsmLH */
22082 GR64, ADDR64, disp20imm64,
22083 /* STOCGAsmM */
22084 GR64, ADDR64, disp20imm64,
22085 /* STOCGAsmNE */
22086 GR64, ADDR64, disp20imm64,
22087 /* STOCGAsmNH */
22088 GR64, ADDR64, disp20imm64,
22089 /* STOCGAsmNHE */
22090 GR64, ADDR64, disp20imm64,
22091 /* STOCGAsmNL */
22092 GR64, ADDR64, disp20imm64,
22093 /* STOCGAsmNLE */
22094 GR64, ADDR64, disp20imm64,
22095 /* STOCGAsmNLH */
22096 GR64, ADDR64, disp20imm64,
22097 /* STOCGAsmNM */
22098 GR64, ADDR64, disp20imm64,
22099 /* STOCGAsmNO */
22100 GR64, ADDR64, disp20imm64,
22101 /* STOCGAsmNP */
22102 GR64, ADDR64, disp20imm64,
22103 /* STOCGAsmNZ */
22104 GR64, ADDR64, disp20imm64,
22105 /* STOCGAsmO */
22106 GR64, ADDR64, disp20imm64,
22107 /* STOCGAsmP */
22108 GR64, ADDR64, disp20imm64,
22109 /* STOCGAsmZ */
22110 GR64, ADDR64, disp20imm64,
22111 /* STOSM */
22112 ADDR64, disp12imm64, imm32zx8,
22113 /* STPQ */
22114 GR128, ADDR64, disp20imm64, ADDR64,
22115 /* STPT */
22116 ADDR64, disp12imm64,
22117 /* STPX */
22118 ADDR64, disp12imm64,
22119 /* STRAG */
22120 ADDR64, disp12imm64, ADDR64, disp12imm64,
22121 /* STRL */
22122 GR32, pcrel32,
22123 /* STRV */
22124 GR32, ADDR64, disp20imm64, ADDR64,
22125 /* STRVG */
22126 GR64, ADDR64, disp20imm64, ADDR64,
22127 /* STRVH */
22128 GR32, ADDR64, disp20imm64, ADDR64,
22129 /* STSCH */
22130 ADDR64, disp12imm64,
22131 /* STSI */
22132 ADDR64, disp12imm64,
22133 /* STURA */
22134 GR32, GR64,
22135 /* STURG */
22136 GR64, GR64,
22137 /* STY */
22138 GR32, ADDR64, disp20imm64, ADDR64,
22139 /* SU */
22140 FP32, FP32, ADDR64, disp12imm64, ADDR64,
22141 /* SUR */
22142 FP32, FP32, FP32,
22143 /* SVC */
22144 imm32zx8,
22145 /* SW */
22146 FP64, FP64, ADDR64, disp12imm64, ADDR64,
22147 /* SWR */
22148 FP64, FP64, FP64,
22149 /* SXBR */
22150 FP128, FP128, FP128,
22151 /* SXR */
22152 FP128, FP128, FP128,
22153 /* SXTR */
22154 FP128, FP128, FP128,
22155 /* SXTRA */
22156 FP128, FP128, FP128, imm32zx4,
22157 /* SY */
22158 GR32, GR32, ADDR64, disp20imm64, ADDR64,
22159 /* TABORT */
22160 ADDR64, disp12imm64,
22161 /* TAM */
22162 /* TAR */
22163 AR32, GR32,
22164 /* TB */
22165 GR64, GR64,
22166 /* TBDR */
22167 FP64, imm32zx4, FP64,
22168 /* TBEDR */
22169 FP32, imm32zx4, FP64,
22170 /* TBEGIN */
22171 ADDR64, disp12imm64, imm32zx16,
22172 /* TBEGINC */
22173 ADDR64, disp12imm64, imm32zx16,
22174 /* TCDB */
22175 FP64, ADDR64, disp12imm64, ADDR64,
22176 /* TCEB */
22177 FP32, ADDR64, disp12imm64, ADDR64,
22178 /* TCXB */
22179 FP128, ADDR64, disp12imm64, ADDR64,
22180 /* TDCDT */
22181 FP64, ADDR64, disp12imm64, ADDR64,
22182 /* TDCET */
22183 FP32, ADDR64, disp12imm64, ADDR64,
22184 /* TDCXT */
22185 FP128, ADDR64, disp12imm64, ADDR64,
22186 /* TDGDT */
22187 FP64, ADDR64, disp12imm64, ADDR64,
22188 /* TDGET */
22189 FP32, ADDR64, disp12imm64, ADDR64,
22190 /* TDGXT */
22191 FP128, ADDR64, disp12imm64, ADDR64,
22192 /* TEND */
22193 /* THDER */
22194 FP64, FP32,
22195 /* THDR */
22196 FP64, FP64,
22197 /* TM */
22198 ADDR64, disp12imm64, imm32zx8,
22199 /* TMHH */
22200 GRH32, imm32lh16,
22201 /* TMHL */
22202 GRH32, imm32ll16,
22203 /* TMLH */
22204 GR32, imm32lh16,
22205 /* TMLL */
22206 GR32, imm32ll16,
22207 /* TMY */
22208 ADDR64, disp20imm64, imm32zx8,
22209 /* TP */
22210 ADDR64, disp12imm64, len4imm64,
22211 /* TPEI */
22212 GR64, GR64,
22213 /* TPI */
22214 ADDR64, disp12imm64,
22215 /* TPROT */
22216 ADDR64, disp12imm64, ADDR64, disp12imm64,
22217 /* TR */
22218 ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64,
22219 /* TRACE */
22220 GR32, GR32, ADDR64, disp12imm64,
22221 /* TRACG */
22222 GR64, GR64, ADDR64, disp20imm64,
22223 /* TRAP2 */
22224 /* TRAP4 */
22225 ADDR64, disp12imm64,
22226 /* TRE */
22227 GR128, GR64, GR128, GR64,
22228 /* TROO */
22229 GR128, GR64, GR128, GR64, imm32zx4,
22230 /* TROOOpt */
22231 GR128, GR64, GR128, GR64,
22232 /* TROT */
22233 GR128, GR64, GR128, GR64, imm32zx4,
22234 /* TROTOpt */
22235 GR128, GR64, GR128, GR64,
22236 /* TRT */
22237 ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64,
22238 /* TRTE */
22239 GR64, GR128, GR128, imm32zx4,
22240 /* TRTEOpt */
22241 GR64, GR128, GR128,
22242 /* TRTO */
22243 GR128, GR64, GR128, GR64, imm32zx4,
22244 /* TRTOOpt */
22245 GR128, GR64, GR128, GR64,
22246 /* TRTR */
22247 ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64,
22248 /* TRTRE */
22249 GR64, GR128, GR128, imm32zx4,
22250 /* TRTREOpt */
22251 GR64, GR128, GR128,
22252 /* TRTT */
22253 GR128, GR64, GR128, GR64, imm32zx4,
22254 /* TRTTOpt */
22255 GR128, GR64, GR128, GR64,
22256 /* TS */
22257 ADDR64, disp12imm64,
22258 /* TSCH */
22259 ADDR64, disp12imm64,
22260 /* UNPK */
22261 ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64,
22262 /* UNPKA */
22263 ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64,
22264 /* UNPKU */
22265 ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64,
22266 /* UPT */
22267 /* VA */
22268 VR128, VR128, VR128, imm32zx4,
22269 /* VAB */
22270 VR128, VR128, VR128,
22271 /* VAC */
22272 VR128, VR128, VR128, VR128, imm32zx4,
22273 /* VACC */
22274 VR128, VR128, VR128, imm32zx4,
22275 /* VACCB */
22276 VR128, VR128, VR128,
22277 /* VACCC */
22278 VR128, VR128, VR128, VR128, imm32zx4,
22279 /* VACCCQ */
22280 VR128, VR128, VR128, VR128,
22281 /* VACCF */
22282 VR128, VR128, VR128,
22283 /* VACCG */
22284 VR128, VR128, VR128,
22285 /* VACCH */
22286 VR128, VR128, VR128,
22287 /* VACCQ */
22288 VR128, VR128, VR128,
22289 /* VACQ */
22290 VR128, VR128, VR128, VR128,
22291 /* VAF */
22292 VR128, VR128, VR128,
22293 /* VAG */
22294 VR128, VR128, VR128,
22295 /* VAH */
22296 VR128, VR128, VR128,
22297 /* VAP */
22298 VR128, VR128, VR128, imm32zx8, imm32zx4,
22299 /* VAQ */
22300 VR128, VR128, VR128,
22301 /* VAVG */
22302 VR128, VR128, VR128, imm32zx4,
22303 /* VAVGB */
22304 VR128, VR128, VR128,
22305 /* VAVGF */
22306 VR128, VR128, VR128,
22307 /* VAVGG */
22308 VR128, VR128, VR128,
22309 /* VAVGH */
22310 VR128, VR128, VR128,
22311 /* VAVGL */
22312 VR128, VR128, VR128, imm32zx4,
22313 /* VAVGLB */
22314 VR128, VR128, VR128,
22315 /* VAVGLF */
22316 VR128, VR128, VR128,
22317 /* VAVGLG */
22318 VR128, VR128, VR128,
22319 /* VAVGLH */
22320 VR128, VR128, VR128,
22321 /* VBPERM */
22322 VR128, VR128, VR128,
22323 /* VCDG */
22324 VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
22325 /* VCDGB */
22326 VR128, VR128, imm32zx4, imm32zx4,
22327 /* VCDLG */
22328 VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
22329 /* VCDLGB */
22330 VR128, VR128, imm32zx4, imm32zx4,
22331 /* VCEFB */
22332 VR128, VR128, imm32zx4, imm32zx4,
22333 /* VCELFB */
22334 VR128, VR128, imm32zx4, imm32zx4,
22335 /* VCEQ */
22336 VR128, VR128, VR128, imm32zx4, imm32zx4,
22337 /* VCEQB */
22338 VR128, VR128, VR128,
22339 /* VCEQBS */
22340 VR128, VR128, VR128,
22341 /* VCEQF */
22342 VR128, VR128, VR128,
22343 /* VCEQFS */
22344 VR128, VR128, VR128,
22345 /* VCEQG */
22346 VR128, VR128, VR128,
22347 /* VCEQGS */
22348 VR128, VR128, VR128,
22349 /* VCEQH */
22350 VR128, VR128, VR128,
22351 /* VCEQHS */
22352 VR128, VR128, VR128,
22353 /* VCFEB */
22354 VR128, VR128, imm32zx4, imm32zx4,
22355 /* VCFN */
22356 VR128, VR128, imm32zx4, imm32zx4,
22357 /* VCFPL */
22358 VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
22359 /* VCFPS */
22360 VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
22361 /* VCGD */
22362 VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
22363 /* VCGDB */
22364 VR128, VR128, imm32zx4, imm32zx4,
22365 /* VCH */
22366 VR128, VR128, VR128, imm32zx4, imm32zx4,
22367 /* VCHB */
22368 VR128, VR128, VR128,
22369 /* VCHBS */
22370 VR128, VR128, VR128,
22371 /* VCHF */
22372 VR128, VR128, VR128,
22373 /* VCHFS */
22374 VR128, VR128, VR128,
22375 /* VCHG */
22376 VR128, VR128, VR128,
22377 /* VCHGS */
22378 VR128, VR128, VR128,
22379 /* VCHH */
22380 VR128, VR128, VR128,
22381 /* VCHHS */
22382 VR128, VR128, VR128,
22383 /* VCHL */
22384 VR128, VR128, VR128, imm32zx4, imm32zx4,
22385 /* VCHLB */
22386 VR128, VR128, VR128,
22387 /* VCHLBS */
22388 VR128, VR128, VR128,
22389 /* VCHLF */
22390 VR128, VR128, VR128,
22391 /* VCHLFS */
22392 VR128, VR128, VR128,
22393 /* VCHLG */
22394 VR128, VR128, VR128,
22395 /* VCHLGS */
22396 VR128, VR128, VR128,
22397 /* VCHLH */
22398 VR128, VR128, VR128,
22399 /* VCHLHS */
22400 VR128, VR128, VR128,
22401 /* VCKSM */
22402 VR128, VR128, VR128,
22403 /* VCLFEB */
22404 VR128, VR128, imm32zx4, imm32zx4,
22405 /* VCLFNH */
22406 VR128, VR128, imm32zx4, imm32zx4,
22407 /* VCLFNL */
22408 VR128, VR128, imm32zx4, imm32zx4,
22409 /* VCLFP */
22410 VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
22411 /* VCLGD */
22412 VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
22413 /* VCLGDB */
22414 VR128, VR128, imm32zx4, imm32zx4,
22415 /* VCLZ */
22416 VR128, VR128, imm32zx4,
22417 /* VCLZB */
22418 VR128, VR128,
22419 /* VCLZDP */
22420 VR128, VR128, imm32zx4,
22421 /* VCLZF */
22422 VR128, VR128,
22423 /* VCLZG */
22424 VR128, VR128,
22425 /* VCLZH */
22426 VR128, VR128,
22427 /* VCNF */
22428 VR128, VR128, imm32zx4, imm32zx4,
22429 /* VCP */
22430 VR128, VR128, imm32zx4,
22431 /* VCRNF */
22432 VR128, VR128, VR128, imm32zx4, imm32zx4,
22433 /* VCSFP */
22434 VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
22435 /* VCSPH */
22436 VR128, VR128, VR128, imm32zx4,
22437 /* VCTZ */
22438 VR128, VR128, imm32zx4,
22439 /* VCTZB */
22440 VR128, VR128,
22441 /* VCTZF */
22442 VR128, VR128,
22443 /* VCTZG */
22444 VR128, VR128,
22445 /* VCTZH */
22446 VR128, VR128,
22447 /* VCVB */
22448 GR32, VR128, imm32zx4,
22449 /* VCVBG */
22450 GR64, VR128, imm32zx4,
22451 /* VCVBGOpt */
22452 GR64, VR128, imm32zx4, imm32zx4,
22453 /* VCVBOpt */
22454 GR32, VR128, imm32zx4, imm32zx4,
22455 /* VCVD */
22456 VR128, GR32, imm32zx8, imm32zx4,
22457 /* VCVDG */
22458 VR128, GR64, imm32zx8, imm32zx4,
22459 /* VDP */
22460 VR128, VR128, VR128, imm32zx8, imm32zx4,
22461 /* VEC */
22462 VR128, VR128, imm32zx4,
22463 /* VECB */
22464 VR128, VR128,
22465 /* VECF */
22466 VR128, VR128,
22467 /* VECG */
22468 VR128, VR128,
22469 /* VECH */
22470 VR128, VR128,
22471 /* VECL */
22472 VR128, VR128, imm32zx4,
22473 /* VECLB */
22474 VR128, VR128,
22475 /* VECLF */
22476 VR128, VR128,
22477 /* VECLG */
22478 VR128, VR128,
22479 /* VECLH */
22480 VR128, VR128,
22481 /* VERIM */
22482 VR128, VR128, VR128, VR128, imm32zx8, imm32zx4,
22483 /* VERIMB */
22484 VR128, VR128, VR128, VR128, imm32zx8,
22485 /* VERIMF */
22486 VR128, VR128, VR128, VR128, imm32zx8,
22487 /* VERIMG */
22488 VR128, VR128, VR128, VR128, imm32zx8,
22489 /* VERIMH */
22490 VR128, VR128, VR128, VR128, imm32zx8,
22491 /* VERLL */
22492 VR128, VR128, ADDR32, disp12imm32, imm32zx4,
22493 /* VERLLB */
22494 VR128, VR128, ADDR32, disp12imm32,
22495 /* VERLLF */
22496 VR128, VR128, ADDR32, disp12imm32,
22497 /* VERLLG */
22498 VR128, VR128, ADDR32, disp12imm32,
22499 /* VERLLH */
22500 VR128, VR128, ADDR32, disp12imm32,
22501 /* VERLLV */
22502 VR128, VR128, VR128, imm32zx4,
22503 /* VERLLVB */
22504 VR128, VR128, VR128,
22505 /* VERLLVF */
22506 VR128, VR128, VR128,
22507 /* VERLLVG */
22508 VR128, VR128, VR128,
22509 /* VERLLVH */
22510 VR128, VR128, VR128,
22511 /* VESL */
22512 VR128, VR128, ADDR32, disp12imm32, imm32zx4,
22513 /* VESLB */
22514 VR128, VR128, ADDR32, disp12imm32,
22515 /* VESLF */
22516 VR128, VR128, ADDR32, disp12imm32,
22517 /* VESLG */
22518 VR128, VR128, ADDR32, disp12imm32,
22519 /* VESLH */
22520 VR128, VR128, ADDR32, disp12imm32,
22521 /* VESLV */
22522 VR128, VR128, VR128, imm32zx4,
22523 /* VESLVB */
22524 VR128, VR128, VR128,
22525 /* VESLVF */
22526 VR128, VR128, VR128,
22527 /* VESLVG */
22528 VR128, VR128, VR128,
22529 /* VESLVH */
22530 VR128, VR128, VR128,
22531 /* VESRA */
22532 VR128, VR128, ADDR32, disp12imm32, imm32zx4,
22533 /* VESRAB */
22534 VR128, VR128, ADDR32, disp12imm32,
22535 /* VESRAF */
22536 VR128, VR128, ADDR32, disp12imm32,
22537 /* VESRAG */
22538 VR128, VR128, ADDR32, disp12imm32,
22539 /* VESRAH */
22540 VR128, VR128, ADDR32, disp12imm32,
22541 /* VESRAV */
22542 VR128, VR128, VR128, imm32zx4,
22543 /* VESRAVB */
22544 VR128, VR128, VR128,
22545 /* VESRAVF */
22546 VR128, VR128, VR128,
22547 /* VESRAVG */
22548 VR128, VR128, VR128,
22549 /* VESRAVH */
22550 VR128, VR128, VR128,
22551 /* VESRL */
22552 VR128, VR128, ADDR32, disp12imm32, imm32zx4,
22553 /* VESRLB */
22554 VR128, VR128, ADDR32, disp12imm32,
22555 /* VESRLF */
22556 VR128, VR128, ADDR32, disp12imm32,
22557 /* VESRLG */
22558 VR128, VR128, ADDR32, disp12imm32,
22559 /* VESRLH */
22560 VR128, VR128, ADDR32, disp12imm32,
22561 /* VESRLV */
22562 VR128, VR128, VR128, imm32zx4,
22563 /* VESRLVB */
22564 VR128, VR128, VR128,
22565 /* VESRLVF */
22566 VR128, VR128, VR128,
22567 /* VESRLVG */
22568 VR128, VR128, VR128,
22569 /* VESRLVH */
22570 VR128, VR128, VR128,
22571 /* VFA */
22572 VR128, VR128, VR128, imm32zx4, imm32zx4,
22573 /* VFADB */
22574 VR128, VR128, VR128,
22575 /* VFAE */
22576 VR128, VR128, VR128, imm32zx4, imm32zx4,
22577 /* VFAEB */
22578 VR128, VR128, VR128, imm32zx4even_timm,
22579 /* VFAEBS */
22580 VR128, VR128, VR128, imm32zx4even_timm,
22581 /* VFAEF */
22582 VR128, VR128, VR128, imm32zx4even_timm,
22583 /* VFAEFS */
22584 VR128, VR128, VR128, imm32zx4even_timm,
22585 /* VFAEH */
22586 VR128, VR128, VR128, imm32zx4even_timm,
22587 /* VFAEHS */
22588 VR128, VR128, VR128, imm32zx4even_timm,
22589 /* VFAEZB */
22590 VR128, VR128, VR128, imm32zx4even_timm,
22591 /* VFAEZBS */
22592 VR128, VR128, VR128, imm32zx4even_timm,
22593 /* VFAEZF */
22594 VR128, VR128, VR128, imm32zx4even_timm,
22595 /* VFAEZFS */
22596 VR128, VR128, VR128, imm32zx4even_timm,
22597 /* VFAEZH */
22598 VR128, VR128, VR128, imm32zx4even_timm,
22599 /* VFAEZHS */
22600 VR128, VR128, VR128, imm32zx4even_timm,
22601 /* VFASB */
22602 VR128, VR128, VR128,
22603 /* VFCE */
22604 VR128, VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
22605 /* VFCEDB */
22606 VR128, VR128, VR128,
22607 /* VFCEDBS */
22608 VR128, VR128, VR128,
22609 /* VFCESB */
22610 VR128, VR128, VR128,
22611 /* VFCESBS */
22612 VR128, VR128, VR128,
22613 /* VFCH */
22614 VR128, VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
22615 /* VFCHDB */
22616 VR128, VR128, VR128,
22617 /* VFCHDBS */
22618 VR128, VR128, VR128,
22619 /* VFCHE */
22620 VR128, VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
22621 /* VFCHEDB */
22622 VR128, VR128, VR128,
22623 /* VFCHEDBS */
22624 VR128, VR128, VR128,
22625 /* VFCHESB */
22626 VR128, VR128, VR128,
22627 /* VFCHESBS */
22628 VR128, VR128, VR128,
22629 /* VFCHSB */
22630 VR128, VR128, VR128,
22631 /* VFCHSBS */
22632 VR128, VR128, VR128,
22633 /* VFD */
22634 VR128, VR128, VR128, imm32zx4, imm32zx4,
22635 /* VFDDB */
22636 VR128, VR128, VR128,
22637 /* VFDSB */
22638 VR128, VR128, VR128,
22639 /* VFEE */
22640 VR128, VR128, VR128, imm32zx4, imm32zx4,
22641 /* VFEEB */
22642 VR128, VR128, VR128, imm32zx4,
22643 /* VFEEBS */
22644 VR128, VR128, VR128,
22645 /* VFEEF */
22646 VR128, VR128, VR128, imm32zx4,
22647 /* VFEEFS */
22648 VR128, VR128, VR128,
22649 /* VFEEH */
22650 VR128, VR128, VR128, imm32zx4,
22651 /* VFEEHS */
22652 VR128, VR128, VR128,
22653 /* VFEEZB */
22654 VR128, VR128, VR128,
22655 /* VFEEZBS */
22656 VR128, VR128, VR128,
22657 /* VFEEZF */
22658 VR128, VR128, VR128,
22659 /* VFEEZFS */
22660 VR128, VR128, VR128,
22661 /* VFEEZH */
22662 VR128, VR128, VR128,
22663 /* VFEEZHS */
22664 VR128, VR128, VR128,
22665 /* VFENE */
22666 VR128, VR128, VR128, imm32zx4, imm32zx4,
22667 /* VFENEB */
22668 VR128, VR128, VR128, imm32zx4,
22669 /* VFENEBS */
22670 VR128, VR128, VR128,
22671 /* VFENEF */
22672 VR128, VR128, VR128, imm32zx4,
22673 /* VFENEFS */
22674 VR128, VR128, VR128,
22675 /* VFENEH */
22676 VR128, VR128, VR128, imm32zx4,
22677 /* VFENEHS */
22678 VR128, VR128, VR128,
22679 /* VFENEZB */
22680 VR128, VR128, VR128,
22681 /* VFENEZBS */
22682 VR128, VR128, VR128,
22683 /* VFENEZF */
22684 VR128, VR128, VR128,
22685 /* VFENEZFS */
22686 VR128, VR128, VR128,
22687 /* VFENEZH */
22688 VR128, VR128, VR128,
22689 /* VFENEZHS */
22690 VR128, VR128, VR128,
22691 /* VFI */
22692 VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
22693 /* VFIDB */
22694 VR128, VR128, imm32zx4, imm32zx4,
22695 /* VFISB */
22696 VR128, VR128, imm32zx4, imm32zx4,
22697 /* VFKEDB */
22698 VR128, VR128, VR128,
22699 /* VFKEDBS */
22700 VR128, VR128, VR128,
22701 /* VFKESB */
22702 VR128, VR128, VR128,
22703 /* VFKESBS */
22704 VR128, VR128, VR128,
22705 /* VFKHDB */
22706 VR128, VR128, VR128,
22707 /* VFKHDBS */
22708 VR128, VR128, VR128,
22709 /* VFKHEDB */
22710 VR128, VR128, VR128,
22711 /* VFKHEDBS */
22712 VR128, VR128, VR128,
22713 /* VFKHESB */
22714 VR128, VR128, VR128,
22715 /* VFKHESBS */
22716 VR128, VR128, VR128,
22717 /* VFKHSB */
22718 VR128, VR128, VR128,
22719 /* VFKHSBS */
22720 VR128, VR128, VR128,
22721 /* VFLCDB */
22722 VR128, VR128,
22723 /* VFLCSB */
22724 VR128, VR128,
22725 /* VFLL */
22726 VR128, VR128, imm32zx4, imm32zx4,
22727 /* VFLLS */
22728 VR128, VR128,
22729 /* VFLNDB */
22730 VR128, VR128,
22731 /* VFLNSB */
22732 VR128, VR128,
22733 /* VFLPDB */
22734 VR128, VR128,
22735 /* VFLPSB */
22736 VR128, VR128,
22737 /* VFLR */
22738 VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
22739 /* VFLRD */
22740 VR128, VR128, imm32zx4, imm32zx4,
22741 /* VFM */
22742 VR128, VR128, VR128, imm32zx4, imm32zx4,
22743 /* VFMA */
22744 VR128, VR128, VR128, VR128, imm32zx4, imm32zx4,
22745 /* VFMADB */
22746 VR128, VR128, VR128, VR128,
22747 /* VFMASB */
22748 VR128, VR128, VR128, VR128,
22749 /* VFMAX */
22750 VR128, VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
22751 /* VFMAXDB */
22752 VR128, VR128, VR128, imm32zx4,
22753 /* VFMAXSB */
22754 VR128, VR128, VR128, imm32zx4,
22755 /* VFMDB */
22756 VR128, VR128, VR128,
22757 /* VFMIN */
22758 VR128, VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
22759 /* VFMINDB */
22760 VR128, VR128, VR128, imm32zx4,
22761 /* VFMINSB */
22762 VR128, VR128, VR128, imm32zx4,
22763 /* VFMS */
22764 VR128, VR128, VR128, VR128, imm32zx4, imm32zx4,
22765 /* VFMSB */
22766 VR128, VR128, VR128,
22767 /* VFMSDB */
22768 VR128, VR128, VR128, VR128,
22769 /* VFMSSB */
22770 VR128, VR128, VR128, VR128,
22771 /* VFNMA */
22772 VR128, VR128, VR128, VR128, imm32zx4, imm32zx4,
22773 /* VFNMADB */
22774 VR128, VR128, VR128, VR128,
22775 /* VFNMASB */
22776 VR128, VR128, VR128, VR128,
22777 /* VFNMS */
22778 VR128, VR128, VR128, VR128, imm32zx4, imm32zx4,
22779 /* VFNMSDB */
22780 VR128, VR128, VR128, VR128,
22781 /* VFNMSSB */
22782 VR128, VR128, VR128, VR128,
22783 /* VFPSO */
22784 VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
22785 /* VFPSODB */
22786 VR128, VR128, imm32zx4,
22787 /* VFPSOSB */
22788 VR128, VR128, imm32zx4,
22789 /* VFS */
22790 VR128, VR128, VR128, imm32zx4, imm32zx4,
22791 /* VFSDB */
22792 VR128, VR128, VR128,
22793 /* VFSQ */
22794 VR128, VR128, imm32zx4, imm32zx4,
22795 /* VFSQDB */
22796 VR128, VR128,
22797 /* VFSQSB */
22798 VR128, VR128,
22799 /* VFSSB */
22800 VR128, VR128, VR128,
22801 /* VFTCI */
22802 VR128, VR128, imm32zx12, imm32zx4, imm32zx4,
22803 /* VFTCIDB */
22804 VR128, VR128, imm32zx12,
22805 /* VFTCISB */
22806 VR128, VR128, imm32zx12,
22807 /* VGBM */
22808 VR128, imm32zx16_timm,
22809 /* VGEF */
22810 VR128, VR128, ADDR64, disp12imm64, VR128, imm32zx2,
22811 /* VGEG */
22812 VR128, VR128, ADDR64, disp12imm64, VR128, imm32zx1,
22813 /* VGFM */
22814 VR128, VR128, VR128, imm32zx4,
22815 /* VGFMA */
22816 VR128, VR128, VR128, VR128, imm32zx4,
22817 /* VGFMAB */
22818 VR128, VR128, VR128, VR128,
22819 /* VGFMAF */
22820 VR128, VR128, VR128, VR128,
22821 /* VGFMAG */
22822 VR128, VR128, VR128, VR128,
22823 /* VGFMAH */
22824 VR128, VR128, VR128, VR128,
22825 /* VGFMB */
22826 VR128, VR128, VR128,
22827 /* VGFMF */
22828 VR128, VR128, VR128,
22829 /* VGFMG */
22830 VR128, VR128, VR128,
22831 /* VGFMH */
22832 VR128, VR128, VR128,
22833 /* VGM */
22834 VR128, imm32zx8, imm32zx8, imm32zx4,
22835 /* VGMB */
22836 VR128, imm32zx8, imm32zx8,
22837 /* VGMF */
22838 VR128, imm32zx8, imm32zx8,
22839 /* VGMG */
22840 VR128, imm32zx8, imm32zx8,
22841 /* VGMH */
22842 VR128, imm32zx8, imm32zx8,
22843 /* VISTR */
22844 VR128, VR128, imm32zx4, imm32zx4,
22845 /* VISTRB */
22846 VR128, VR128, imm32zx4,
22847 /* VISTRBS */
22848 VR128, VR128,
22849 /* VISTRF */
22850 VR128, VR128, imm32zx4,
22851 /* VISTRFS */
22852 VR128, VR128,
22853 /* VISTRH */
22854 VR128, VR128, imm32zx4,
22855 /* VISTRHS */
22856 VR128, VR128,
22857 /* VL */
22858 VR128, ADDR64, disp12imm64, ADDR64,
22859 /* VLAlign */
22860 VR128, ADDR64, disp12imm64, ADDR64, imm32zx4,
22861 /* VLBB */
22862 VR128, ADDR64, disp12imm64, ADDR64, imm32zx4,
22863 /* VLBR */
22864 VR128, ADDR64, disp12imm64, ADDR64, imm32zx4,
22865 /* VLBRF */
22866 VR128, ADDR64, disp12imm64, ADDR64,
22867 /* VLBRG */
22868 VR128, ADDR64, disp12imm64, ADDR64,
22869 /* VLBRH */
22870 VR128, ADDR64, disp12imm64, ADDR64,
22871 /* VLBRQ */
22872 VR128, ADDR64, disp12imm64, ADDR64,
22873 /* VLBRREP */
22874 VR128, ADDR64, disp12imm64, ADDR64, imm32zx4,
22875 /* VLBRREPF */
22876 VR128, ADDR64, disp12imm64, ADDR64,
22877 /* VLBRREPG */
22878 VR128, ADDR64, disp12imm64, ADDR64,
22879 /* VLBRREPH */
22880 VR128, ADDR64, disp12imm64, ADDR64,
22881 /* VLC */
22882 VR128, VR128, imm32zx4,
22883 /* VLCB */
22884 VR128, VR128,
22885 /* VLCF */
22886 VR128, VR128,
22887 /* VLCG */
22888 VR128, VR128,
22889 /* VLCH */
22890 VR128, VR128,
22891 /* VLDE */
22892 VR128, VR128, imm32zx4, imm32zx4,
22893 /* VLDEB */
22894 VR128, VR128,
22895 /* VLEB */
22896 VR128, VR128, ADDR64, disp12imm64, ADDR64, imm32zx4,
22897 /* VLEBRF */
22898 VR128, VR128, ADDR64, disp12imm64, ADDR64, imm32zx2,
22899 /* VLEBRG */
22900 VR128, VR128, ADDR64, disp12imm64, ADDR64, imm32zx1,
22901 /* VLEBRH */
22902 VR128, VR128, ADDR64, disp12imm64, ADDR64, imm32zx3,
22903 /* VLED */
22904 VR128, VR128, imm32zx4, imm32zx4, imm32zx4,
22905 /* VLEDB */
22906 VR128, VR128, imm32zx4, imm32zx4,
22907 /* VLEF */
22908 VR128, VR128, ADDR64, disp12imm64, ADDR64, imm32zx2,
22909 /* VLEG */
22910 VR128, VR128, ADDR64, disp12imm64, ADDR64, imm32zx1,
22911 /* VLEH */
22912 VR128, VR128, ADDR64, disp12imm64, ADDR64, imm32zx3,
22913 /* VLEIB */
22914 VR128, VR128, imm32sx16trunc, imm32zx4,
22915 /* VLEIF */
22916 VR128, VR128, imm32sx16, imm32zx2,
22917 /* VLEIG */
22918 VR128, VR128, imm64sx16, imm32zx1,
22919 /* VLEIH */
22920 VR128, VR128, imm32sx16trunc, imm32zx3,
22921 /* VLER */
22922 VR128, ADDR64, disp12imm64, ADDR64, imm32zx4,
22923 /* VLERF */
22924 VR128, ADDR64, disp12imm64, ADDR64,
22925 /* VLERG */
22926 VR128, ADDR64, disp12imm64, ADDR64,
22927 /* VLERH */
22928 VR128, ADDR64, disp12imm64, ADDR64,
22929 /* VLGV */
22930 GR64, VR128, ADDR32, disp12imm32, imm32zx4,
22931 /* VLGVB */
22932 GR64, VR128, ADDR32, disp12imm32,
22933 /* VLGVF */
22934 GR64, VR128, ADDR32, disp12imm32,
22935 /* VLGVG */
22936 GR64, VR128, ADDR32, disp12imm32,
22937 /* VLGVH */
22938 GR64, VR128, ADDR32, disp12imm32,
22939 /* VLIP */
22940 VR128, imm32zx16, imm32zx4,
22941 /* VLL */
22942 VR128, GR32, ADDR64, disp12imm64,
22943 /* VLLEBRZ */
22944 VR128, ADDR64, disp12imm64, ADDR64, imm32zx4,
22945 /* VLLEBRZE */
22946 VR128, ADDR64, disp12imm64, ADDR64,
22947 /* VLLEBRZF */
22948 VR128, ADDR64, disp12imm64, ADDR64,
22949 /* VLLEBRZG */
22950 VR128, ADDR64, disp12imm64, ADDR64,
22951 /* VLLEBRZH */
22952 VR128, ADDR64, disp12imm64, ADDR64,
22953 /* VLLEZ */
22954 VR128, ADDR64, disp12imm64, ADDR64, imm32zx4,
22955 /* VLLEZB */
22956 VR128, ADDR64, disp12imm64, ADDR64,
22957 /* VLLEZF */
22958 VR128, ADDR64, disp12imm64, ADDR64,
22959 /* VLLEZG */
22960 VR128, ADDR64, disp12imm64, ADDR64,
22961 /* VLLEZH */
22962 VR128, ADDR64, disp12imm64, ADDR64,
22963 /* VLLEZLF */
22964 VR128, ADDR64, disp12imm64, ADDR64,
22965 /* VLM */
22966 VR128, VR128, ADDR64, disp12imm64,
22967 /* VLMAlign */
22968 VR128, VR128, ADDR64, disp12imm64, imm32zx4,
22969 /* VLP */
22970 VR128, VR128, imm32zx4,
22971 /* VLPB */
22972 VR128, VR128,
22973 /* VLPF */
22974 VR128, VR128,
22975 /* VLPG */
22976 VR128, VR128,
22977 /* VLPH */
22978 VR128, VR128,
22979 /* VLR */
22980 VR128, VR128,
22981 /* VLREP */
22982 VR128, ADDR64, disp12imm64, ADDR64, imm32zx4,
22983 /* VLREPB */
22984 VR128, ADDR64, disp12imm64, ADDR64,
22985 /* VLREPF */
22986 VR128, ADDR64, disp12imm64, ADDR64,
22987 /* VLREPG */
22988 VR128, ADDR64, disp12imm64, ADDR64,
22989 /* VLREPH */
22990 VR128, ADDR64, disp12imm64, ADDR64,
22991 /* VLRL */
22992 VR128, ADDR64, disp12imm64, imm32zx8,
22993 /* VLRLR */
22994 VR128, GR32, ADDR64, disp12imm64,
22995 /* VLVG */
22996 VR128, VR128, GR64, ADDR32, disp12imm32, imm32zx4,
22997 /* VLVGB */
22998 VR128, VR128, GR32, ADDR32, disp12imm32,
22999 /* VLVGF */
23000 VR128, VR128, GR32, ADDR32, disp12imm32,
23001 /* VLVGG */
23002 VR128, VR128, GR64, ADDR32, disp12imm32,
23003 /* VLVGH */
23004 VR128, VR128, GR32, ADDR32, disp12imm32,
23005 /* VLVGP */
23006 VR128, GR64, GR64,
23007 /* VMAE */
23008 VR128, VR128, VR128, VR128, imm32zx4,
23009 /* VMAEB */
23010 VR128, VR128, VR128, VR128,
23011 /* VMAEF */
23012 VR128, VR128, VR128, VR128,
23013 /* VMAEH */
23014 VR128, VR128, VR128, VR128,
23015 /* VMAH */
23016 VR128, VR128, VR128, VR128, imm32zx4,
23017 /* VMAHB */
23018 VR128, VR128, VR128, VR128,
23019 /* VMAHF */
23020 VR128, VR128, VR128, VR128,
23021 /* VMAHH */
23022 VR128, VR128, VR128, VR128,
23023 /* VMAL */
23024 VR128, VR128, VR128, VR128, imm32zx4,
23025 /* VMALB */
23026 VR128, VR128, VR128, VR128,
23027 /* VMALE */
23028 VR128, VR128, VR128, VR128, imm32zx4,
23029 /* VMALEB */
23030 VR128, VR128, VR128, VR128,
23031 /* VMALEF */
23032 VR128, VR128, VR128, VR128,
23033 /* VMALEH */
23034 VR128, VR128, VR128, VR128,
23035 /* VMALF */
23036 VR128, VR128, VR128, VR128,
23037 /* VMALH */
23038 VR128, VR128, VR128, VR128, imm32zx4,
23039 /* VMALHB */
23040 VR128, VR128, VR128, VR128,
23041 /* VMALHF */
23042 VR128, VR128, VR128, VR128,
23043 /* VMALHH */
23044 VR128, VR128, VR128, VR128,
23045 /* VMALHW */
23046 VR128, VR128, VR128, VR128,
23047 /* VMALO */
23048 VR128, VR128, VR128, VR128, imm32zx4,
23049 /* VMALOB */
23050 VR128, VR128, VR128, VR128,
23051 /* VMALOF */
23052 VR128, VR128, VR128, VR128,
23053 /* VMALOH */
23054 VR128, VR128, VR128, VR128,
23055 /* VMAO */
23056 VR128, VR128, VR128, VR128, imm32zx4,
23057 /* VMAOB */
23058 VR128, VR128, VR128, VR128,
23059 /* VMAOF */
23060 VR128, VR128, VR128, VR128,
23061 /* VMAOH */
23062 VR128, VR128, VR128, VR128,
23063 /* VME */
23064 VR128, VR128, VR128, imm32zx4,
23065 /* VMEB */
23066 VR128, VR128, VR128,
23067 /* VMEF */
23068 VR128, VR128, VR128,
23069 /* VMEH */
23070 VR128, VR128, VR128,
23071 /* VMH */
23072 VR128, VR128, VR128, imm32zx4,
23073 /* VMHB */
23074 VR128, VR128, VR128,
23075 /* VMHF */
23076 VR128, VR128, VR128,
23077 /* VMHH */
23078 VR128, VR128, VR128,
23079 /* VML */
23080 VR128, VR128, VR128, imm32zx4,
23081 /* VMLB */
23082 VR128, VR128, VR128,
23083 /* VMLE */
23084 VR128, VR128, VR128, imm32zx4,
23085 /* VMLEB */
23086 VR128, VR128, VR128,
23087 /* VMLEF */
23088 VR128, VR128, VR128,
23089 /* VMLEH */
23090 VR128, VR128, VR128,
23091 /* VMLF */
23092 VR128, VR128, VR128,
23093 /* VMLH */
23094 VR128, VR128, VR128, imm32zx4,
23095 /* VMLHB */
23096 VR128, VR128, VR128,
23097 /* VMLHF */
23098 VR128, VR128, VR128,
23099 /* VMLHH */
23100 VR128, VR128, VR128,
23101 /* VMLHW */
23102 VR128, VR128, VR128,
23103 /* VMLO */
23104 VR128, VR128, VR128, imm32zx4,
23105 /* VMLOB */
23106 VR128, VR128, VR128,
23107 /* VMLOF */
23108 VR128, VR128, VR128,
23109 /* VMLOH */
23110 VR128, VR128, VR128,
23111 /* VMN */
23112 VR128, VR128, VR128, imm32zx4,
23113 /* VMNB */
23114 VR128, VR128, VR128,
23115 /* VMNF */
23116 VR128, VR128, VR128,
23117 /* VMNG */
23118 VR128, VR128, VR128,
23119 /* VMNH */
23120 VR128, VR128, VR128,
23121 /* VMNL */
23122 VR128, VR128, VR128, imm32zx4,
23123 /* VMNLB */
23124 VR128, VR128, VR128,
23125 /* VMNLF */
23126 VR128, VR128, VR128,
23127 /* VMNLG */
23128 VR128, VR128, VR128,
23129 /* VMNLH */
23130 VR128, VR128, VR128,
23131 /* VMO */
23132 VR128, VR128, VR128, imm32zx4,
23133 /* VMOB */
23134 VR128, VR128, VR128,
23135 /* VMOF */
23136 VR128, VR128, VR128,
23137 /* VMOH */
23138 VR128, VR128, VR128,
23139 /* VMP */
23140 VR128, VR128, VR128, imm32zx8, imm32zx4,
23141 /* VMRH */
23142 VR128, VR128, VR128, imm32zx4,
23143 /* VMRHB */
23144 VR128, VR128, VR128,
23145 /* VMRHF */
23146 VR128, VR128, VR128,
23147 /* VMRHG */
23148 VR128, VR128, VR128,
23149 /* VMRHH */
23150 VR128, VR128, VR128,
23151 /* VMRL */
23152 VR128, VR128, VR128, imm32zx4,
23153 /* VMRLB */
23154 VR128, VR128, VR128,
23155 /* VMRLF */
23156 VR128, VR128, VR128,
23157 /* VMRLG */
23158 VR128, VR128, VR128,
23159 /* VMRLH */
23160 VR128, VR128, VR128,
23161 /* VMSL */
23162 VR128, VR128, VR128, VR128, imm32zx4, imm32zx4,
23163 /* VMSLG */
23164 VR128, VR128, VR128, VR128, imm32zx4_timm,
23165 /* VMSP */
23166 VR128, VR128, VR128, imm32zx8, imm32zx4,
23167 /* VMX */
23168 VR128, VR128, VR128, imm32zx4,
23169 /* VMXB */
23170 VR128, VR128, VR128,
23171 /* VMXF */
23172 VR128, VR128, VR128,
23173 /* VMXG */
23174 VR128, VR128, VR128,
23175 /* VMXH */
23176 VR128, VR128, VR128,
23177 /* VMXL */
23178 VR128, VR128, VR128, imm32zx4,
23179 /* VMXLB */
23180 VR128, VR128, VR128,
23181 /* VMXLF */
23182 VR128, VR128, VR128,
23183 /* VMXLG */
23184 VR128, VR128, VR128,
23185 /* VMXLH */
23186 VR128, VR128, VR128,
23187 /* VN */
23188 VR128, VR128, VR128,
23189 /* VNC */
23190 VR128, VR128, VR128,
23191 /* VNN */
23192 VR128, VR128, VR128,
23193 /* VNO */
23194 VR128, VR128, VR128,
23195 /* VNX */
23196 VR128, VR128, VR128,
23197 /* VO */
23198 VR128, VR128, VR128,
23199 /* VOC */
23200 VR128, VR128, VR128,
23201 /* VONE */
23202 VR128,
23203 /* VPDI */
23204 VR128, VR128, VR128, imm32zx4,
23205 /* VPERM */
23206 VR128, VR128, VR128, VR128,
23207 /* VPK */
23208 VR128, VR128, VR128, imm32zx4,
23209 /* VPKF */
23210 VR128, VR128, VR128,
23211 /* VPKG */
23212 VR128, VR128, VR128,
23213 /* VPKH */
23214 VR128, VR128, VR128,
23215 /* VPKLS */
23216 VR128, VR128, VR128, imm32zx4, imm32zx4,
23217 /* VPKLSF */
23218 VR128, VR128, VR128,
23219 /* VPKLSFS */
23220 VR128, VR128, VR128,
23221 /* VPKLSG */
23222 VR128, VR128, VR128,
23223 /* VPKLSGS */
23224 VR128, VR128, VR128,
23225 /* VPKLSH */
23226 VR128, VR128, VR128,
23227 /* VPKLSHS */
23228 VR128, VR128, VR128,
23229 /* VPKS */
23230 VR128, VR128, VR128, imm32zx4, imm32zx4,
23231 /* VPKSF */
23232 VR128, VR128, VR128,
23233 /* VPKSFS */
23234 VR128, VR128, VR128,
23235 /* VPKSG */
23236 VR128, VR128, VR128,
23237 /* VPKSGS */
23238 VR128, VR128, VR128,
23239 /* VPKSH */
23240 VR128, VR128, VR128,
23241 /* VPKSHS */
23242 VR128, VR128, VR128,
23243 /* VPKZ */
23244 VR128, ADDR64, disp12imm64, imm32zx8,
23245 /* VPKZR */
23246 VR128, VR128, VR128, imm32zx8, imm32zx4,
23247 /* VPOPCT */
23248 VR128, VR128, imm32zx4,
23249 /* VPOPCTB */
23250 VR128, VR128,
23251 /* VPOPCTF */
23252 VR128, VR128,
23253 /* VPOPCTG */
23254 VR128, VR128,
23255 /* VPOPCTH */
23256 VR128, VR128,
23257 /* VPSOP */
23258 VR128, VR128, imm32zx8, imm32zx8, imm32zx4,
23259 /* VREP */
23260 VR128, VR128, imm32zx16, imm32zx4,
23261 /* VREPB */
23262 VR128, VR128, imm32zx16,
23263 /* VREPF */
23264 VR128, VR128, imm32zx16,
23265 /* VREPG */
23266 VR128, VR128, imm32zx16,
23267 /* VREPH */
23268 VR128, VR128, imm32zx16,
23269 /* VREPI */
23270 VR128, imm32sx16, imm32zx4,
23271 /* VREPIB */
23272 VR128, imm32sx16_timm,
23273 /* VREPIF */
23274 VR128, imm32sx16_timm,
23275 /* VREPIG */
23276 VR128, imm32sx16_timm,
23277 /* VREPIH */
23278 VR128, imm32sx16_timm,
23279 /* VRP */
23280 VR128, VR128, VR128, imm32zx8, imm32zx4,
23281 /* VS */
23282 VR128, VR128, VR128, imm32zx4,
23283 /* VSB */
23284 VR128, VR128, VR128,
23285 /* VSBCBI */
23286 VR128, VR128, VR128, VR128, imm32zx4,
23287 /* VSBCBIQ */
23288 VR128, VR128, VR128, VR128,
23289 /* VSBI */
23290 VR128, VR128, VR128, VR128, imm32zx4,
23291 /* VSBIQ */
23292 VR128, VR128, VR128, VR128,
23293 /* VSCBI */
23294 VR128, VR128, VR128, imm32zx4,
23295 /* VSCBIB */
23296 VR128, VR128, VR128,
23297 /* VSCBIF */
23298 VR128, VR128, VR128,
23299 /* VSCBIG */
23300 VR128, VR128, VR128,
23301 /* VSCBIH */
23302 VR128, VR128, VR128,
23303 /* VSCBIQ */
23304 VR128, VR128, VR128,
23305 /* VSCEF */
23306 VR128, ADDR64, disp12imm64, VR128, imm32zx2,
23307 /* VSCEG */
23308 VR128, ADDR64, disp12imm64, VR128, imm32zx1,
23309 /* VSCHDP */
23310 VR128, VR128, VR128, imm32zx4,
23311 /* VSCHP */
23312 VR128, VR128, VR128, imm32zx4, imm32zx4,
23313 /* VSCHSP */
23314 VR128, VR128, VR128, imm32zx4,
23315 /* VSCHXP */
23316 VR128, VR128, VR128, imm32zx4,
23317 /* VSCSHP */
23318 VR128, VR128, VR128,
23319 /* VSDP */
23320 VR128, VR128, VR128, imm32zx8, imm32zx4,
23321 /* VSEG */
23322 VR128, VR128, imm32zx4,
23323 /* VSEGB */
23324 VR128, VR128,
23325 /* VSEGF */
23326 VR128, VR128,
23327 /* VSEGH */
23328 VR128, VR128,
23329 /* VSEL */
23330 VR128, VR128, VR128, VR128,
23331 /* VSF */
23332 VR128, VR128, VR128,
23333 /* VSG */
23334 VR128, VR128, VR128,
23335 /* VSH */
23336 VR128, VR128, VR128,
23337 /* VSL */
23338 VR128, VR128, VR128,
23339 /* VSLB */
23340 VR128, VR128, VR128,
23341 /* VSLD */
23342 VR128, VR128, VR128, imm32zx8,
23343 /* VSLDB */
23344 VR128, VR128, VR128, imm32zx8,
23345 /* VSP */
23346 VR128, VR128, VR128, imm32zx8, imm32zx4,
23347 /* VSQ */
23348 VR128, VR128, VR128,
23349 /* VSRA */
23350 VR128, VR128, VR128,
23351 /* VSRAB */
23352 VR128, VR128, VR128,
23353 /* VSRD */
23354 VR128, VR128, VR128, imm32zx8,
23355 /* VSRL */
23356 VR128, VR128, VR128,
23357 /* VSRLB */
23358 VR128, VR128, VR128,
23359 /* VSRP */
23360 VR128, VR128, imm32zx8, imm32zx8, imm32zx4,
23361 /* VSRPR */
23362 VR128, VR128, VR128, imm32zx8, imm32zx4,
23363 /* VST */
23364 VR128, ADDR64, disp12imm64, ADDR64,
23365 /* VSTAlign */
23366 VR128, ADDR64, disp12imm64, ADDR64, imm32zx4,
23367 /* VSTBR */
23368 VR128, ADDR64, disp12imm64, ADDR64, imm32zx4,
23369 /* VSTBRF */
23370 VR128, ADDR64, disp12imm64, ADDR64,
23371 /* VSTBRG */
23372 VR128, ADDR64, disp12imm64, ADDR64,
23373 /* VSTBRH */
23374 VR128, ADDR64, disp12imm64, ADDR64,
23375 /* VSTBRQ */
23376 VR128, ADDR64, disp12imm64, ADDR64,
23377 /* VSTEB */
23378 VR128, ADDR64, disp12imm64, ADDR64, imm32zx4,
23379 /* VSTEBRF */
23380 VR128, ADDR64, disp12imm64, ADDR64, imm32zx2,
23381 /* VSTEBRG */
23382 VR128, ADDR64, disp12imm64, ADDR64, imm32zx1,
23383 /* VSTEBRH */
23384 VR128, ADDR64, disp12imm64, ADDR64, imm32zx3,
23385 /* VSTEF */
23386 VR128, ADDR64, disp12imm64, ADDR64, imm32zx2,
23387 /* VSTEG */
23388 VR128, ADDR64, disp12imm64, ADDR64, imm32zx1,
23389 /* VSTEH */
23390 VR128, ADDR64, disp12imm64, ADDR64, imm32zx3,
23391 /* VSTER */
23392 VR128, ADDR64, disp12imm64, ADDR64, imm32zx4,
23393 /* VSTERF */
23394 VR128, ADDR64, disp12imm64, ADDR64,
23395 /* VSTERG */
23396 VR128, ADDR64, disp12imm64, ADDR64,
23397 /* VSTERH */
23398 VR128, ADDR64, disp12imm64, ADDR64,
23399 /* VSTL */
23400 VR128, GR32, ADDR64, disp12imm64,
23401 /* VSTM */
23402 VR128, VR128, ADDR64, disp12imm64,
23403 /* VSTMAlign */
23404 VR128, VR128, ADDR64, disp12imm64, imm32zx4,
23405 /* VSTRC */
23406 VR128, VR128, VR128, VR128, imm32zx4, imm32zx4,
23407 /* VSTRCB */
23408 VR128, VR128, VR128, VR128, imm32zx4even_timm,
23409 /* VSTRCBS */
23410 VR128, VR128, VR128, VR128, imm32zx4even_timm,
23411 /* VSTRCF */
23412 VR128, VR128, VR128, VR128, imm32zx4even_timm,
23413 /* VSTRCFS */
23414 VR128, VR128, VR128, VR128, imm32zx4even_timm,
23415 /* VSTRCH */
23416 VR128, VR128, VR128, VR128, imm32zx4even_timm,
23417 /* VSTRCHS */
23418 VR128, VR128, VR128, VR128, imm32zx4even_timm,
23419 /* VSTRCZB */
23420 VR128, VR128, VR128, VR128, imm32zx4even_timm,
23421 /* VSTRCZBS */
23422 VR128, VR128, VR128, VR128, imm32zx4even_timm,
23423 /* VSTRCZF */
23424 VR128, VR128, VR128, VR128, imm32zx4even_timm,
23425 /* VSTRCZFS */
23426 VR128, VR128, VR128, VR128, imm32zx4even_timm,
23427 /* VSTRCZH */
23428 VR128, VR128, VR128, VR128, imm32zx4even_timm,
23429 /* VSTRCZHS */
23430 VR128, VR128, VR128, VR128, imm32zx4even_timm,
23431 /* VSTRL */
23432 VR128, ADDR64, disp12imm64, imm32zx8,
23433 /* VSTRLR */
23434 VR128, GR32, ADDR64, disp12imm64,
23435 /* VSTRS */
23436 VR128, VR128, VR128, VR128, imm32zx4, imm32zx4,
23437 /* VSTRSB */
23438 VR128, VR128, VR128, VR128, imm32zx4,
23439 /* VSTRSF */
23440 VR128, VR128, VR128, VR128, imm32zx4,
23441 /* VSTRSH */
23442 VR128, VR128, VR128, VR128, imm32zx4,
23443 /* VSTRSZB */
23444 VR128, VR128, VR128, VR128,
23445 /* VSTRSZF */
23446 VR128, VR128, VR128, VR128,
23447 /* VSTRSZH */
23448 VR128, VR128, VR128, VR128,
23449 /* VSUM */
23450 VR128, VR128, VR128, imm32zx4,
23451 /* VSUMB */
23452 VR128, VR128, VR128,
23453 /* VSUMG */
23454 VR128, VR128, VR128, imm32zx4,
23455 /* VSUMGF */
23456 VR128, VR128, VR128,
23457 /* VSUMGH */
23458 VR128, VR128, VR128,
23459 /* VSUMH */
23460 VR128, VR128, VR128,
23461 /* VSUMQ */
23462 VR128, VR128, VR128, imm32zx4,
23463 /* VSUMQF */
23464 VR128, VR128, VR128,
23465 /* VSUMQG */
23466 VR128, VR128, VR128,
23467 /* VTM */
23468 VR128, VR128,
23469 /* VTP */
23470 VR128,
23471 /* VUPH */
23472 VR128, VR128, imm32zx4,
23473 /* VUPHB */
23474 VR128, VR128,
23475 /* VUPHF */
23476 VR128, VR128,
23477 /* VUPHH */
23478 VR128, VR128,
23479 /* VUPKZ */
23480 VR128, ADDR64, disp12imm64, imm32zx8,
23481 /* VUPKZH */
23482 VR128, VR128, imm32zx4,
23483 /* VUPKZL */
23484 VR128, VR128, imm32zx4,
23485 /* VUPL */
23486 VR128, VR128, imm32zx4,
23487 /* VUPLB */
23488 VR128, VR128,
23489 /* VUPLF */
23490 VR128, VR128,
23491 /* VUPLH */
23492 VR128, VR128, imm32zx4,
23493 /* VUPLHB */
23494 VR128, VR128,
23495 /* VUPLHF */
23496 VR128, VR128,
23497 /* VUPLHH */
23498 VR128, VR128,
23499 /* VUPLHW */
23500 VR128, VR128,
23501 /* VUPLL */
23502 VR128, VR128, imm32zx4,
23503 /* VUPLLB */
23504 VR128, VR128,
23505 /* VUPLLF */
23506 VR128, VR128,
23507 /* VUPLLH */
23508 VR128, VR128,
23509 /* VX */
23510 VR128, VR128, VR128,
23511 /* VZERO */
23512 VR128,
23513 /* WCDGB */
23514 VR64, VR64, imm32zx4, imm32zx4,
23515 /* WCDLGB */
23516 VR64, VR64, imm32zx4, imm32zx4,
23517 /* WCEFB */
23518 VR32, VR32, imm32zx4, imm32zx4,
23519 /* WCELFB */
23520 VR32, VR32, imm32zx4, imm32zx4,
23521 /* WCFEB */
23522 VR32, VR32, imm32zx4, imm32zx4,
23523 /* WCGDB */
23524 VR64, VR64, imm32zx4, imm32zx4,
23525 /* WCLFEB */
23526 VR32, VR32, imm32zx4, imm32zx4,
23527 /* WCLGDB */
23528 VR64, VR64, imm32zx4, imm32zx4,
23529 /* WFADB */
23530 VR64, VR64, VR64,
23531 /* WFASB */
23532 VR32, VR32, VR32,
23533 /* WFAXB */
23534 VR128, VR128, VR128,
23535 /* WFC */
23536 VR64, VR64, imm32zx4, imm32zx4,
23537 /* WFCDB */
23538 VR64, VR64,
23539 /* WFCEDB */
23540 VR64, VR64, VR64,
23541 /* WFCEDBS */
23542 VR64, VR64, VR64,
23543 /* WFCESB */
23544 VR32, VR32, VR32,
23545 /* WFCESBS */
23546 VR32, VR32, VR32,
23547 /* WFCEXB */
23548 VR128, VR128, VR128,
23549 /* WFCEXBS */
23550 VR128, VR128, VR128,
23551 /* WFCHDB */
23552 VR64, VR64, VR64,
23553 /* WFCHDBS */
23554 VR64, VR64, VR64,
23555 /* WFCHEDB */
23556 VR64, VR64, VR64,
23557 /* WFCHEDBS */
23558 VR64, VR64, VR64,
23559 /* WFCHESB */
23560 VR32, VR32, VR32,
23561 /* WFCHESBS */
23562 VR32, VR32, VR32,
23563 /* WFCHEXB */
23564 VR128, VR128, VR128,
23565 /* WFCHEXBS */
23566 VR128, VR128, VR128,
23567 /* WFCHSB */
23568 VR32, VR32, VR32,
23569 /* WFCHSBS */
23570 VR32, VR32, VR32,
23571 /* WFCHXB */
23572 VR128, VR128, VR128,
23573 /* WFCHXBS */
23574 VR128, VR128, VR128,
23575 /* WFCSB */
23576 VR32, VR32,
23577 /* WFCXB */
23578 VR128, VR128,
23579 /* WFDDB */
23580 VR64, VR64, VR64,
23581 /* WFDSB */
23582 VR32, VR32, VR32,
23583 /* WFDXB */
23584 VR128, VR128, VR128,
23585 /* WFIDB */
23586 VR64, VR64, imm32zx4, imm32zx4,
23587 /* WFISB */
23588 VR32, VR32, imm32zx4, imm32zx4,
23589 /* WFIXB */
23590 VR128, VR128, imm32zx4, imm32zx4,
23591 /* WFK */
23592 VR64, VR64, imm32zx4, imm32zx4,
23593 /* WFKDB */
23594 VR64, VR64,
23595 /* WFKEDB */
23596 VR64, VR64, VR64,
23597 /* WFKEDBS */
23598 VR64, VR64, VR64,
23599 /* WFKESB */
23600 VR32, VR32, VR32,
23601 /* WFKESBS */
23602 VR32, VR32, VR32,
23603 /* WFKEXB */
23604 VR128, VR128, VR128,
23605 /* WFKEXBS */
23606 VR128, VR128, VR128,
23607 /* WFKHDB */
23608 VR64, VR64, VR64,
23609 /* WFKHDBS */
23610 VR64, VR64, VR64,
23611 /* WFKHEDB */
23612 VR64, VR64, VR64,
23613 /* WFKHEDBS */
23614 VR64, VR64, VR64,
23615 /* WFKHESB */
23616 VR32, VR32, VR32,
23617 /* WFKHESBS */
23618 VR32, VR32, VR32,
23619 /* WFKHEXB */
23620 VR128, VR128, VR128,
23621 /* WFKHEXBS */
23622 VR128, VR128, VR128,
23623 /* WFKHSB */
23624 VR32, VR32, VR32,
23625 /* WFKHSBS */
23626 VR32, VR32, VR32,
23627 /* WFKHXB */
23628 VR128, VR128, VR128,
23629 /* WFKHXBS */
23630 VR128, VR128, VR128,
23631 /* WFKSB */
23632 VR32, VR32,
23633 /* WFKXB */
23634 VR128, VR128,
23635 /* WFLCDB */
23636 VR64, VR64,
23637 /* WFLCSB */
23638 VR32, VR32,
23639 /* WFLCXB */
23640 VR128, VR128,
23641 /* WFLLD */
23642 VR128, VR64,
23643 /* WFLLS */
23644 VR64, VR32,
23645 /* WFLNDB */
23646 VR64, VR64,
23647 /* WFLNSB */
23648 VR32, VR32,
23649 /* WFLNXB */
23650 VR128, VR128,
23651 /* WFLPDB */
23652 VR64, VR64,
23653 /* WFLPSB */
23654 VR32, VR32,
23655 /* WFLPXB */
23656 VR128, VR128,
23657 /* WFLRD */
23658 VR32, VR64, imm32zx4, imm32zx4,
23659 /* WFLRX */
23660 VR64, VR128, imm32zx4, imm32zx4,
23661 /* WFMADB */
23662 VR64, VR64, VR64, VR64,
23663 /* WFMASB */
23664 VR32, VR32, VR32, VR32,
23665 /* WFMAXB */
23666 VR128, VR128, VR128, VR128,
23667 /* WFMAXDB */
23668 VR64, VR64, VR64, imm32zx4,
23669 /* WFMAXSB */
23670 VR32, VR32, VR32, imm32zx4,
23671 /* WFMAXXB */
23672 VR128, VR128, VR128, imm32zx4,
23673 /* WFMDB */
23674 VR64, VR64, VR64,
23675 /* WFMINDB */
23676 VR64, VR64, VR64, imm32zx4,
23677 /* WFMINSB */
23678 VR32, VR32, VR32, imm32zx4,
23679 /* WFMINXB */
23680 VR128, VR128, VR128, imm32zx4,
23681 /* WFMSB */
23682 VR32, VR32, VR32,
23683 /* WFMSDB */
23684 VR64, VR64, VR64, VR64,
23685 /* WFMSSB */
23686 VR32, VR32, VR32, VR32,
23687 /* WFMSXB */
23688 VR128, VR128, VR128, VR128,
23689 /* WFMXB */
23690 VR128, VR128, VR128,
23691 /* WFNMADB */
23692 VR64, VR64, VR64, VR64,
23693 /* WFNMASB */
23694 VR32, VR32, VR32, VR32,
23695 /* WFNMAXB */
23696 VR128, VR128, VR128, VR128,
23697 /* WFNMSDB */
23698 VR64, VR64, VR64, VR64,
23699 /* WFNMSSB */
23700 VR32, VR32, VR32, VR32,
23701 /* WFNMSXB */
23702 VR128, VR128, VR128, VR128,
23703 /* WFPSODB */
23704 VR64, VR64, imm32zx4,
23705 /* WFPSOSB */
23706 VR32, VR32, imm32zx4,
23707 /* WFPSOXB */
23708 VR128, VR128, imm32zx4,
23709 /* WFSDB */
23710 VR64, VR64, VR64,
23711 /* WFSQDB */
23712 VR64, VR64,
23713 /* WFSQSB */
23714 VR32, VR32,
23715 /* WFSQXB */
23716 VR128, VR128,
23717 /* WFSSB */
23718 VR32, VR32, VR32,
23719 /* WFSXB */
23720 VR128, VR128, VR128,
23721 /* WFTCIDB */
23722 VR64, VR64, imm32zx12,
23723 /* WFTCISB */
23724 VR32, VR32, imm32zx12,
23725 /* WFTCIXB */
23726 VR128, VR128, imm32zx12,
23727 /* WLDEB */
23728 VR64, VR32,
23729 /* WLEDB */
23730 VR32, VR64, imm32zx4, imm32zx4,
23731 /* X */
23732 GR32, GR32, ADDR64, disp12imm64, ADDR64,
23733 /* XC */
23734 ADDR64, disp12imm64, len8imm64, ADDR64, disp12imm64,
23735 /* XG */
23736 GR64, GR64, ADDR64, disp20imm64, ADDR64,
23737 /* XGR */
23738 GR64, GR64, GR64,
23739 /* XGRK */
23740 GR64, GR64, GR64,
23741 /* XI */
23742 ADDR64, disp12imm64, imm32zx8,
23743 /* XIHF */
23744 GRH32, GRH32, uimm32,
23745 /* XILF */
23746 GR32, GR32, uimm32,
23747 /* XIY */
23748 ADDR64, disp20imm64, imm32zx8,
23749 /* XR */
23750 GR32, GR32, GR32,
23751 /* XRK */
23752 GR32, GR32, GR32,
23753 /* XSCH */
23754 /* XY */
23755 GR32, GR32, ADDR64, disp20imm64, ADDR64,
23756 /* ZAP */
23757 ADDR64, disp12imm64, len4imm64, ADDR64, disp12imm64, len4imm64,
23758 };
23759 return OpcodeOperandTypes[Offsets[Opcode] + OpIdx];
23760}
23761} // end namespace SystemZ
23762} // end namespace llvm
23763#endif // GET_INSTRINFO_OPERAND_TYPE
23764
23765#ifdef GET_INSTRINFO_MEM_OPERAND_SIZE
23766#undef GET_INSTRINFO_MEM_OPERAND_SIZE
23767namespace llvm {
23768namespace SystemZ {
23769LLVM_READONLY
23770static int getMemOperandSize(int OpType) {
23771 switch (OpType) {
23772 default: return 0;
23773 }
23774}
23775} // end namespace SystemZ
23776} // end namespace llvm
23777#endif // GET_INSTRINFO_MEM_OPERAND_SIZE
23778
23779#ifdef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP
23780#undef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP
23781namespace llvm {
23782namespace SystemZ {
23783LLVM_READONLY static unsigned
23784getLogicalOperandSize(uint16_t Opcode, uint16_t LogicalOpIdx) {
23785 return LogicalOpIdx;
23786}
23787LLVM_READONLY static inline unsigned
23788getLogicalOperandIdx(uint16_t Opcode, uint16_t LogicalOpIdx) {
23789 auto S = 0U;
23790 for (auto i = 0U; i < LogicalOpIdx; ++i)
23791 S += getLogicalOperandSize(Opcode, i);
23792 return S;
23793}
23794} // end namespace SystemZ
23795} // end namespace llvm
23796#endif // GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP
23797
23798#ifdef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP
23799#undef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP
23800namespace llvm {
23801namespace SystemZ {
23802LLVM_READONLY static int
23803getLogicalOperandType(uint16_t Opcode, uint16_t LogicalOpIdx) {
23804 return -1;
23805}
23806} // end namespace SystemZ
23807} // end namespace llvm
23808#endif // GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP
23809
23810#ifdef GET_INSTRINFO_MC_HELPER_DECLS
23811#undef GET_INSTRINFO_MC_HELPER_DECLS
23812
23813namespace llvm {
23814class MCInst;
23815class FeatureBitset;
23816
23817namespace SystemZ_MC {
23818
23819void verifyInstructionPredicates(unsigned Opcode, const FeatureBitset &Features);
23820
23821} // end namespace SystemZ_MC
23822} // end namespace llvm
23823
23824#endif // GET_INSTRINFO_MC_HELPER_DECLS
23825
23826#ifdef GET_INSTRINFO_MC_HELPERS
23827#undef GET_INSTRINFO_MC_HELPERS
23828
23829namespace llvm {
23830namespace SystemZ_MC {
23831
23832} // end namespace SystemZ_MC
23833} // end namespace llvm
23834
23835#endif // GET_GENISTRINFO_MC_HELPERS
23836
23837#if (defined(ENABLE_INSTR_PREDICATE_VERIFIER) && !defined(NDEBUG)) ||\
23838 defined(GET_AVAILABLE_OPCODE_CHECKER)
23839#define GET_COMPUTE_FEATURES
23840#endif
23841#ifdef GET_COMPUTE_FEATURES
23842#undef GET_COMPUTE_FEATURES
23843namespace llvm {
23844namespace SystemZ_MC {
23845
23846// Bits for subtarget features that participate in instruction matching.
23847enum SubtargetFeatureBits : uint8_t {
23848 Feature_FeatureSoftFloatBit = 34,
23849 Feature_FeatureBackChainBit = 1,
23850 Feature_FeatureUnalignedSymbolsBit = 37,
23851 Feature_FeatureDistinctOpsBit = 5,
23852 Feature_FeatureFastSerializationBit = 10,
23853 Feature_FeatureFPExtensionBit = 9,
23854 Feature_FeatureHighWordBit = 12,
23855 Feature_FeatureInterlockedAccess1Bit = 14,
23856 Feature_FeatureLoadStoreOnCondBit = 17,
23857 Feature_FeaturePopulationCountBit = 29,
23858 Feature_FeatureMessageSecurityAssist3Bit = 19,
23859 Feature_FeatureMessageSecurityAssist4Bit = 20,
23860 Feature_FeatureResetReferenceBitsMultipleBit = 33,
23861 Feature_FeatureExecutionHintBit = 8,
23862 Feature_FeatureLoadAndTrapBit = 15,
23863 Feature_FeatureMiscellaneousExtensionsBit = 25,
23864 Feature_FeatureProcessorAssistBit = 31,
23865 Feature_FeatureTransactionalExecutionBit = 36,
23866 Feature_FeatureDFPZonedConversionBit = 3,
23867 Feature_FeatureEnhancedDAT2Bit = 6,
23868 Feature_FeatureLoadAndZeroRightmostByteBit = 16,
23869 Feature_FeatureLoadStoreOnCond2Bit = 18,
23870 Feature_FeatureMessageSecurityAssist5Bit = 21,
23871 Feature_FeatureDFPPackedConversionBit = 2,
23872 Feature_FeatureVectorBit = 38,
23873 Feature_FeatureMiscellaneousExtensions2Bit = 26,
23874 Feature_FeatureGuardedStorageBit = 11,
23875 Feature_FeatureMessageSecurityAssist7Bit = 22,
23876 Feature_FeatureMessageSecurityAssist8Bit = 23,
23877 Feature_FeatureVectorEnhancements1Bit = 39,
23878 Feature_FeatureVectorPackedDecimalBit = 41,
23879 Feature_FeatureInsertReferenceBitsMultipleBit = 13,
23880 Feature_FeatureTestPendingExternalInterruptionBit = 35,
23881 Feature_FeatureMiscellaneousExtensions3Bit = 27,
23882 Feature_FeatureMessageSecurityAssist9Bit = 24,
23883 Feature_FeatureVectorEnhancements2Bit = 40,
23884 Feature_FeatureVectorPackedDecimalEnhancementBit = 42,
23885 Feature_FeatureEnhancedSortBit = 7,
23886 Feature_FeatureDeflateConversionBit = 4,
23887 Feature_FeatureVectorPackedDecimalEnhancement2Bit = 43,
23888 Feature_FeatureNNPAssistBit = 28,
23889 Feature_FeatureBEAREnhancementBit = 0,
23890 Feature_FeatureResetDATProtectionBit = 32,
23891 Feature_FeatureProcessorActivityInstrumentationBit = 30,
23892};
23893
23894inline FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) {
23895 FeatureBitset Features;
23896 if (FB[SystemZ::FeatureSoftFloat])
23897 Features.set(Feature_FeatureSoftFloatBit);
23898 if (FB[SystemZ::FeatureBackChain])
23899 Features.set(Feature_FeatureBackChainBit);
23900 if (FB[SystemZ::FeatureUnalignedSymbols])
23901 Features.set(Feature_FeatureUnalignedSymbolsBit);
23902 if (FB[SystemZ::FeatureDistinctOps])
23903 Features.set(Feature_FeatureDistinctOpsBit);
23904 if (FB[SystemZ::FeatureFastSerialization])
23905 Features.set(Feature_FeatureFastSerializationBit);
23906 if (FB[SystemZ::FeatureFPExtension])
23907 Features.set(Feature_FeatureFPExtensionBit);
23908 if (FB[SystemZ::FeatureHighWord])
23909 Features.set(Feature_FeatureHighWordBit);
23910 if (FB[SystemZ::FeatureInterlockedAccess1])
23911 Features.set(Feature_FeatureInterlockedAccess1Bit);
23912 if (FB[SystemZ::FeatureLoadStoreOnCond])
23913 Features.set(Feature_FeatureLoadStoreOnCondBit);
23914 if (FB[SystemZ::FeaturePopulationCount])
23915 Features.set(Feature_FeaturePopulationCountBit);
23916 if (FB[SystemZ::FeatureMessageSecurityAssist3])
23917 Features.set(Feature_FeatureMessageSecurityAssist3Bit);
23918 if (FB[SystemZ::FeatureMessageSecurityAssist4])
23919 Features.set(Feature_FeatureMessageSecurityAssist4Bit);
23920 if (FB[SystemZ::FeatureResetReferenceBitsMultiple])
23921 Features.set(Feature_FeatureResetReferenceBitsMultipleBit);
23922 if (FB[SystemZ::FeatureExecutionHint])
23923 Features.set(Feature_FeatureExecutionHintBit);
23924 if (FB[SystemZ::FeatureLoadAndTrap])
23925 Features.set(Feature_FeatureLoadAndTrapBit);
23926 if (FB[SystemZ::FeatureMiscellaneousExtensions])
23927 Features.set(Feature_FeatureMiscellaneousExtensionsBit);
23928 if (FB[SystemZ::FeatureProcessorAssist])
23929 Features.set(Feature_FeatureProcessorAssistBit);
23930 if (FB[SystemZ::FeatureTransactionalExecution])
23931 Features.set(Feature_FeatureTransactionalExecutionBit);
23932 if (FB[SystemZ::FeatureDFPZonedConversion])
23933 Features.set(Feature_FeatureDFPZonedConversionBit);
23934 if (FB[SystemZ::FeatureEnhancedDAT2])
23935 Features.set(Feature_FeatureEnhancedDAT2Bit);
23936 if (FB[SystemZ::FeatureLoadAndZeroRightmostByte])
23937 Features.set(Feature_FeatureLoadAndZeroRightmostByteBit);
23938 if (FB[SystemZ::FeatureLoadStoreOnCond2])
23939 Features.set(Feature_FeatureLoadStoreOnCond2Bit);
23940 if (FB[SystemZ::FeatureMessageSecurityAssist5])
23941 Features.set(Feature_FeatureMessageSecurityAssist5Bit);
23942 if (FB[SystemZ::FeatureDFPPackedConversion])
23943 Features.set(Feature_FeatureDFPPackedConversionBit);
23944 if (FB[SystemZ::FeatureVector])
23945 Features.set(Feature_FeatureVectorBit);
23946 if (FB[SystemZ::FeatureMiscellaneousExtensions2])
23947 Features.set(Feature_FeatureMiscellaneousExtensions2Bit);
23948 if (FB[SystemZ::FeatureGuardedStorage])
23949 Features.set(Feature_FeatureGuardedStorageBit);
23950 if (FB[SystemZ::FeatureMessageSecurityAssist7])
23951 Features.set(Feature_FeatureMessageSecurityAssist7Bit);
23952 if (FB[SystemZ::FeatureMessageSecurityAssist8])
23953 Features.set(Feature_FeatureMessageSecurityAssist8Bit);
23954 if (FB[SystemZ::FeatureVectorEnhancements1])
23955 Features.set(Feature_FeatureVectorEnhancements1Bit);
23956 if (FB[SystemZ::FeatureVectorPackedDecimal])
23957 Features.set(Feature_FeatureVectorPackedDecimalBit);
23958 if (FB[SystemZ::FeatureInsertReferenceBitsMultiple])
23959 Features.set(Feature_FeatureInsertReferenceBitsMultipleBit);
23960 if (FB[SystemZ::FeatureTestPendingExternalInterruption])
23961 Features.set(Feature_FeatureTestPendingExternalInterruptionBit);
23962 if (FB[SystemZ::FeatureMiscellaneousExtensions3])
23963 Features.set(Feature_FeatureMiscellaneousExtensions3Bit);
23964 if (FB[SystemZ::FeatureMessageSecurityAssist9])
23965 Features.set(Feature_FeatureMessageSecurityAssist9Bit);
23966 if (FB[SystemZ::FeatureVectorEnhancements2])
23967 Features.set(Feature_FeatureVectorEnhancements2Bit);
23968 if (FB[SystemZ::FeatureVectorPackedDecimalEnhancement])
23969 Features.set(Feature_FeatureVectorPackedDecimalEnhancementBit);
23970 if (FB[SystemZ::FeatureEnhancedSort])
23971 Features.set(Feature_FeatureEnhancedSortBit);
23972 if (FB[SystemZ::FeatureDeflateConversion])
23973 Features.set(Feature_FeatureDeflateConversionBit);
23974 if (FB[SystemZ::FeatureVectorPackedDecimalEnhancement2])
23975 Features.set(Feature_FeatureVectorPackedDecimalEnhancement2Bit);
23976 if (FB[SystemZ::FeatureNNPAssist])
23977 Features.set(Feature_FeatureNNPAssistBit);
23978 if (FB[SystemZ::FeatureBEAREnhancement])
23979 Features.set(Feature_FeatureBEAREnhancementBit);
23980 if (FB[SystemZ::FeatureResetDATProtection])
23981 Features.set(Feature_FeatureResetDATProtectionBit);
23982 if (FB[SystemZ::FeatureProcessorActivityInstrumentation])
23983 Features.set(Feature_FeatureProcessorActivityInstrumentationBit);
23984 return Features;
23985}
23986
23987inline FeatureBitset computeRequiredFeatures(unsigned Opcode) {
23988 enum : uint8_t {
23989 CEFBS_None,
23990 CEFBS_FeatureBEAREnhancement,
23991 CEFBS_FeatureDFPPackedConversion,
23992 CEFBS_FeatureDFPZonedConversion,
23993 CEFBS_FeatureDeflateConversion,
23994 CEFBS_FeatureDistinctOps,
23995 CEFBS_FeatureEnhancedDAT2,
23996 CEFBS_FeatureEnhancedSort,
23997 CEFBS_FeatureExecutionHint,
23998 CEFBS_FeatureFPExtension,
23999 CEFBS_FeatureGuardedStorage,
24000 CEFBS_FeatureHighWord,
24001 CEFBS_FeatureInsertReferenceBitsMultiple,
24002 CEFBS_FeatureInterlockedAccess1,
24003 CEFBS_FeatureLoadAndTrap,
24004 CEFBS_FeatureLoadAndZeroRightmostByte,
24005 CEFBS_FeatureLoadStoreOnCond,
24006 CEFBS_FeatureLoadStoreOnCond2,
24007 CEFBS_FeatureMessageSecurityAssist3,
24008 CEFBS_FeatureMessageSecurityAssist4,
24009 CEFBS_FeatureMessageSecurityAssist5,
24010 CEFBS_FeatureMessageSecurityAssist7,
24011 CEFBS_FeatureMessageSecurityAssist8,
24012 CEFBS_FeatureMessageSecurityAssist9,
24013 CEFBS_FeatureMiscellaneousExtensions,
24014 CEFBS_FeatureMiscellaneousExtensions2,
24015 CEFBS_FeatureMiscellaneousExtensions3,
24016 CEFBS_FeatureNNPAssist,
24017 CEFBS_FeaturePopulationCount,
24018 CEFBS_FeatureProcessorActivityInstrumentation,
24019 CEFBS_FeatureProcessorAssist,
24020 CEFBS_FeatureResetDATProtection,
24021 CEFBS_FeatureResetReferenceBitsMultiple,
24022 CEFBS_FeatureTestPendingExternalInterruption,
24023 CEFBS_FeatureTransactionalExecution,
24024 CEFBS_FeatureVector,
24025 CEFBS_FeatureVectorEnhancements1,
24026 CEFBS_FeatureVectorEnhancements2,
24027 CEFBS_FeatureVectorPackedDecimal,
24028 CEFBS_FeatureVectorPackedDecimalEnhancement,
24029 CEFBS_FeatureVectorPackedDecimalEnhancement2,
24030 CEFBS_FeatureHighWord_FeatureDistinctOps,
24031 CEFBS_FeatureVector_FeatureNNPAssist,
24032 };
24033
24034 static constexpr FeatureBitset FeatureBitsets[] = {
24035 {}, // CEFBS_None
24036 {Feature_FeatureBEAREnhancementBit, },
24037 {Feature_FeatureDFPPackedConversionBit, },
24038 {Feature_FeatureDFPZonedConversionBit, },
24039 {Feature_FeatureDeflateConversionBit, },
24040 {Feature_FeatureDistinctOpsBit, },
24041 {Feature_FeatureEnhancedDAT2Bit, },
24042 {Feature_FeatureEnhancedSortBit, },
24043 {Feature_FeatureExecutionHintBit, },
24044 {Feature_FeatureFPExtensionBit, },
24045 {Feature_FeatureGuardedStorageBit, },
24046 {Feature_FeatureHighWordBit, },
24047 {Feature_FeatureInsertReferenceBitsMultipleBit, },
24048 {Feature_FeatureInterlockedAccess1Bit, },
24049 {Feature_FeatureLoadAndTrapBit, },
24050 {Feature_FeatureLoadAndZeroRightmostByteBit, },
24051 {Feature_FeatureLoadStoreOnCondBit, },
24052 {Feature_FeatureLoadStoreOnCond2Bit, },
24053 {Feature_FeatureMessageSecurityAssist3Bit, },
24054 {Feature_FeatureMessageSecurityAssist4Bit, },
24055 {Feature_FeatureMessageSecurityAssist5Bit, },
24056 {Feature_FeatureMessageSecurityAssist7Bit, },
24057 {Feature_FeatureMessageSecurityAssist8Bit, },
24058 {Feature_FeatureMessageSecurityAssist9Bit, },
24059 {Feature_FeatureMiscellaneousExtensionsBit, },
24060 {Feature_FeatureMiscellaneousExtensions2Bit, },
24061 {Feature_FeatureMiscellaneousExtensions3Bit, },
24062 {Feature_FeatureNNPAssistBit, },
24063 {Feature_FeaturePopulationCountBit, },
24064 {Feature_FeatureProcessorActivityInstrumentationBit, },
24065 {Feature_FeatureProcessorAssistBit, },
24066 {Feature_FeatureResetDATProtectionBit, },
24067 {Feature_FeatureResetReferenceBitsMultipleBit, },
24068 {Feature_FeatureTestPendingExternalInterruptionBit, },
24069 {Feature_FeatureTransactionalExecutionBit, },
24070 {Feature_FeatureVectorBit, },
24071 {Feature_FeatureVectorEnhancements1Bit, },
24072 {Feature_FeatureVectorEnhancements2Bit, },
24073 {Feature_FeatureVectorPackedDecimalBit, },
24074 {Feature_FeatureVectorPackedDecimalEnhancementBit, },
24075 {Feature_FeatureVectorPackedDecimalEnhancement2Bit, },
24076 {Feature_FeatureHighWordBit, Feature_FeatureDistinctOpsBit, },
24077 {Feature_FeatureVectorBit, Feature_FeatureNNPAssistBit, },
24078 };
24079 static constexpr uint8_t RequiredFeaturesRefs[] = {
24080 CEFBS_None, // PHI = 0
24081 CEFBS_None, // INLINEASM = 1
24082 CEFBS_None, // INLINEASM_BR = 2
24083 CEFBS_None, // CFI_INSTRUCTION = 3
24084 CEFBS_None, // EH_LABEL = 4
24085 CEFBS_None, // GC_LABEL = 5
24086 CEFBS_None, // ANNOTATION_LABEL = 6
24087 CEFBS_None, // KILL = 7
24088 CEFBS_None, // EXTRACT_SUBREG = 8
24089 CEFBS_None, // INSERT_SUBREG = 9
24090 CEFBS_None, // IMPLICIT_DEF = 10
24091 CEFBS_None, // SUBREG_TO_REG = 11
24092 CEFBS_None, // COPY_TO_REGCLASS = 12
24093 CEFBS_None, // DBG_VALUE = 13
24094 CEFBS_None, // DBG_VALUE_LIST = 14
24095 CEFBS_None, // DBG_INSTR_REF = 15
24096 CEFBS_None, // DBG_PHI = 16
24097 CEFBS_None, // DBG_LABEL = 17
24098 CEFBS_None, // REG_SEQUENCE = 18
24099 CEFBS_None, // COPY = 19
24100 CEFBS_None, // BUNDLE = 20
24101 CEFBS_None, // LIFETIME_START = 21
24102 CEFBS_None, // LIFETIME_END = 22
24103 CEFBS_None, // PSEUDO_PROBE = 23
24104 CEFBS_None, // ARITH_FENCE = 24
24105 CEFBS_None, // STACKMAP = 25
24106 CEFBS_None, // FENTRY_CALL = 26
24107 CEFBS_None, // PATCHPOINT = 27
24108 CEFBS_None, // LOAD_STACK_GUARD = 28
24109 CEFBS_None, // PREALLOCATED_SETUP = 29
24110 CEFBS_None, // PREALLOCATED_ARG = 30
24111 CEFBS_None, // STATEPOINT = 31
24112 CEFBS_None, // LOCAL_ESCAPE = 32
24113 CEFBS_None, // FAULTING_OP = 33
24114 CEFBS_None, // PATCHABLE_OP = 34
24115 CEFBS_None, // PATCHABLE_FUNCTION_ENTER = 35
24116 CEFBS_None, // PATCHABLE_RET = 36
24117 CEFBS_None, // PATCHABLE_FUNCTION_EXIT = 37
24118 CEFBS_None, // PATCHABLE_TAIL_CALL = 38
24119 CEFBS_None, // PATCHABLE_EVENT_CALL = 39
24120 CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL = 40
24121 CEFBS_None, // ICALL_BRANCH_FUNNEL = 41
24122 CEFBS_None, // MEMBARRIER = 42
24123 CEFBS_None, // JUMP_TABLE_DEBUG_INFO = 43
24124 CEFBS_None, // CONVERGENCECTRL_ENTRY = 44
24125 CEFBS_None, // CONVERGENCECTRL_ANCHOR = 45
24126 CEFBS_None, // CONVERGENCECTRL_LOOP = 46
24127 CEFBS_None, // CONVERGENCECTRL_GLUE = 47
24128 CEFBS_None, // G_ASSERT_SEXT = 48
24129 CEFBS_None, // G_ASSERT_ZEXT = 49
24130 CEFBS_None, // G_ASSERT_ALIGN = 50
24131 CEFBS_None, // G_ADD = 51
24132 CEFBS_None, // G_SUB = 52
24133 CEFBS_None, // G_MUL = 53
24134 CEFBS_None, // G_SDIV = 54
24135 CEFBS_None, // G_UDIV = 55
24136 CEFBS_None, // G_SREM = 56
24137 CEFBS_None, // G_UREM = 57
24138 CEFBS_None, // G_SDIVREM = 58
24139 CEFBS_None, // G_UDIVREM = 59
24140 CEFBS_None, // G_AND = 60
24141 CEFBS_None, // G_OR = 61
24142 CEFBS_None, // G_XOR = 62
24143 CEFBS_None, // G_IMPLICIT_DEF = 63
24144 CEFBS_None, // G_PHI = 64
24145 CEFBS_None, // G_FRAME_INDEX = 65
24146 CEFBS_None, // G_GLOBAL_VALUE = 66
24147 CEFBS_None, // G_PTRAUTH_GLOBAL_VALUE = 67
24148 CEFBS_None, // G_CONSTANT_POOL = 68
24149 CEFBS_None, // G_EXTRACT = 69
24150 CEFBS_None, // G_UNMERGE_VALUES = 70
24151 CEFBS_None, // G_INSERT = 71
24152 CEFBS_None, // G_MERGE_VALUES = 72
24153 CEFBS_None, // G_BUILD_VECTOR = 73
24154 CEFBS_None, // G_BUILD_VECTOR_TRUNC = 74
24155 CEFBS_None, // G_CONCAT_VECTORS = 75
24156 CEFBS_None, // G_PTRTOINT = 76
24157 CEFBS_None, // G_INTTOPTR = 77
24158 CEFBS_None, // G_BITCAST = 78
24159 CEFBS_None, // G_FREEZE = 79
24160 CEFBS_None, // G_CONSTANT_FOLD_BARRIER = 80
24161 CEFBS_None, // G_INTRINSIC_FPTRUNC_ROUND = 81
24162 CEFBS_None, // G_INTRINSIC_TRUNC = 82
24163 CEFBS_None, // G_INTRINSIC_ROUND = 83
24164 CEFBS_None, // G_INTRINSIC_LRINT = 84
24165 CEFBS_None, // G_INTRINSIC_LLRINT = 85
24166 CEFBS_None, // G_INTRINSIC_ROUNDEVEN = 86
24167 CEFBS_None, // G_READCYCLECOUNTER = 87
24168 CEFBS_None, // G_READSTEADYCOUNTER = 88
24169 CEFBS_None, // G_LOAD = 89
24170 CEFBS_None, // G_SEXTLOAD = 90
24171 CEFBS_None, // G_ZEXTLOAD = 91
24172 CEFBS_None, // G_INDEXED_LOAD = 92
24173 CEFBS_None, // G_INDEXED_SEXTLOAD = 93
24174 CEFBS_None, // G_INDEXED_ZEXTLOAD = 94
24175 CEFBS_None, // G_STORE = 95
24176 CEFBS_None, // G_INDEXED_STORE = 96
24177 CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 97
24178 CEFBS_None, // G_ATOMIC_CMPXCHG = 98
24179 CEFBS_None, // G_ATOMICRMW_XCHG = 99
24180 CEFBS_None, // G_ATOMICRMW_ADD = 100
24181 CEFBS_None, // G_ATOMICRMW_SUB = 101
24182 CEFBS_None, // G_ATOMICRMW_AND = 102
24183 CEFBS_None, // G_ATOMICRMW_NAND = 103
24184 CEFBS_None, // G_ATOMICRMW_OR = 104
24185 CEFBS_None, // G_ATOMICRMW_XOR = 105
24186 CEFBS_None, // G_ATOMICRMW_MAX = 106
24187 CEFBS_None, // G_ATOMICRMW_MIN = 107
24188 CEFBS_None, // G_ATOMICRMW_UMAX = 108
24189 CEFBS_None, // G_ATOMICRMW_UMIN = 109
24190 CEFBS_None, // G_ATOMICRMW_FADD = 110
24191 CEFBS_None, // G_ATOMICRMW_FSUB = 111
24192 CEFBS_None, // G_ATOMICRMW_FMAX = 112
24193 CEFBS_None, // G_ATOMICRMW_FMIN = 113
24194 CEFBS_None, // G_ATOMICRMW_UINC_WRAP = 114
24195 CEFBS_None, // G_ATOMICRMW_UDEC_WRAP = 115
24196 CEFBS_None, // G_FENCE = 116
24197 CEFBS_None, // G_PREFETCH = 117
24198 CEFBS_None, // G_BRCOND = 118
24199 CEFBS_None, // G_BRINDIRECT = 119
24200 CEFBS_None, // G_INVOKE_REGION_START = 120
24201 CEFBS_None, // G_INTRINSIC = 121
24202 CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS = 122
24203 CEFBS_None, // G_INTRINSIC_CONVERGENT = 123
24204 CEFBS_None, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 124
24205 CEFBS_None, // G_ANYEXT = 125
24206 CEFBS_None, // G_TRUNC = 126
24207 CEFBS_None, // G_CONSTANT = 127
24208 CEFBS_None, // G_FCONSTANT = 128
24209 CEFBS_None, // G_VASTART = 129
24210 CEFBS_None, // G_VAARG = 130
24211 CEFBS_None, // G_SEXT = 131
24212 CEFBS_None, // G_SEXT_INREG = 132
24213 CEFBS_None, // G_ZEXT = 133
24214 CEFBS_None, // G_SHL = 134
24215 CEFBS_None, // G_LSHR = 135
24216 CEFBS_None, // G_ASHR = 136
24217 CEFBS_None, // G_FSHL = 137
24218 CEFBS_None, // G_FSHR = 138
24219 CEFBS_None, // G_ROTR = 139
24220 CEFBS_None, // G_ROTL = 140
24221 CEFBS_None, // G_ICMP = 141
24222 CEFBS_None, // G_FCMP = 142
24223 CEFBS_None, // G_SCMP = 143
24224 CEFBS_None, // G_UCMP = 144
24225 CEFBS_None, // G_SELECT = 145
24226 CEFBS_None, // G_UADDO = 146
24227 CEFBS_None, // G_UADDE = 147
24228 CEFBS_None, // G_USUBO = 148
24229 CEFBS_None, // G_USUBE = 149
24230 CEFBS_None, // G_SADDO = 150
24231 CEFBS_None, // G_SADDE = 151
24232 CEFBS_None, // G_SSUBO = 152
24233 CEFBS_None, // G_SSUBE = 153
24234 CEFBS_None, // G_UMULO = 154
24235 CEFBS_None, // G_SMULO = 155
24236 CEFBS_None, // G_UMULH = 156
24237 CEFBS_None, // G_SMULH = 157
24238 CEFBS_None, // G_UADDSAT = 158
24239 CEFBS_None, // G_SADDSAT = 159
24240 CEFBS_None, // G_USUBSAT = 160
24241 CEFBS_None, // G_SSUBSAT = 161
24242 CEFBS_None, // G_USHLSAT = 162
24243 CEFBS_None, // G_SSHLSAT = 163
24244 CEFBS_None, // G_SMULFIX = 164
24245 CEFBS_None, // G_UMULFIX = 165
24246 CEFBS_None, // G_SMULFIXSAT = 166
24247 CEFBS_None, // G_UMULFIXSAT = 167
24248 CEFBS_None, // G_SDIVFIX = 168
24249 CEFBS_None, // G_UDIVFIX = 169
24250 CEFBS_None, // G_SDIVFIXSAT = 170
24251 CEFBS_None, // G_UDIVFIXSAT = 171
24252 CEFBS_None, // G_FADD = 172
24253 CEFBS_None, // G_FSUB = 173
24254 CEFBS_None, // G_FMUL = 174
24255 CEFBS_None, // G_FMA = 175
24256 CEFBS_None, // G_FMAD = 176
24257 CEFBS_None, // G_FDIV = 177
24258 CEFBS_None, // G_FREM = 178
24259 CEFBS_None, // G_FPOW = 179
24260 CEFBS_None, // G_FPOWI = 180
24261 CEFBS_None, // G_FEXP = 181
24262 CEFBS_None, // G_FEXP2 = 182
24263 CEFBS_None, // G_FEXP10 = 183
24264 CEFBS_None, // G_FLOG = 184
24265 CEFBS_None, // G_FLOG2 = 185
24266 CEFBS_None, // G_FLOG10 = 186
24267 CEFBS_None, // G_FLDEXP = 187
24268 CEFBS_None, // G_FFREXP = 188
24269 CEFBS_None, // G_FNEG = 189
24270 CEFBS_None, // G_FPEXT = 190
24271 CEFBS_None, // G_FPTRUNC = 191
24272 CEFBS_None, // G_FPTOSI = 192
24273 CEFBS_None, // G_FPTOUI = 193
24274 CEFBS_None, // G_SITOFP = 194
24275 CEFBS_None, // G_UITOFP = 195
24276 CEFBS_None, // G_FABS = 196
24277 CEFBS_None, // G_FCOPYSIGN = 197
24278 CEFBS_None, // G_IS_FPCLASS = 198
24279 CEFBS_None, // G_FCANONICALIZE = 199
24280 CEFBS_None, // G_FMINNUM = 200
24281 CEFBS_None, // G_FMAXNUM = 201
24282 CEFBS_None, // G_FMINNUM_IEEE = 202
24283 CEFBS_None, // G_FMAXNUM_IEEE = 203
24284 CEFBS_None, // G_FMINIMUM = 204
24285 CEFBS_None, // G_FMAXIMUM = 205
24286 CEFBS_None, // G_GET_FPENV = 206
24287 CEFBS_None, // G_SET_FPENV = 207
24288 CEFBS_None, // G_RESET_FPENV = 208
24289 CEFBS_None, // G_GET_FPMODE = 209
24290 CEFBS_None, // G_SET_FPMODE = 210
24291 CEFBS_None, // G_RESET_FPMODE = 211
24292 CEFBS_None, // G_PTR_ADD = 212
24293 CEFBS_None, // G_PTRMASK = 213
24294 CEFBS_None, // G_SMIN = 214
24295 CEFBS_None, // G_SMAX = 215
24296 CEFBS_None, // G_UMIN = 216
24297 CEFBS_None, // G_UMAX = 217
24298 CEFBS_None, // G_ABS = 218
24299 CEFBS_None, // G_LROUND = 219
24300 CEFBS_None, // G_LLROUND = 220
24301 CEFBS_None, // G_BR = 221
24302 CEFBS_None, // G_BRJT = 222
24303 CEFBS_None, // G_VSCALE = 223
24304 CEFBS_None, // G_INSERT_SUBVECTOR = 224
24305 CEFBS_None, // G_EXTRACT_SUBVECTOR = 225
24306 CEFBS_None, // G_INSERT_VECTOR_ELT = 226
24307 CEFBS_None, // G_EXTRACT_VECTOR_ELT = 227
24308 CEFBS_None, // G_SHUFFLE_VECTOR = 228
24309 CEFBS_None, // G_SPLAT_VECTOR = 229
24310 CEFBS_None, // G_VECTOR_COMPRESS = 230
24311 CEFBS_None, // G_CTTZ = 231
24312 CEFBS_None, // G_CTTZ_ZERO_UNDEF = 232
24313 CEFBS_None, // G_CTLZ = 233
24314 CEFBS_None, // G_CTLZ_ZERO_UNDEF = 234
24315 CEFBS_None, // G_CTPOP = 235
24316 CEFBS_None, // G_BSWAP = 236
24317 CEFBS_None, // G_BITREVERSE = 237
24318 CEFBS_None, // G_FCEIL = 238
24319 CEFBS_None, // G_FCOS = 239
24320 CEFBS_None, // G_FSIN = 240
24321 CEFBS_None, // G_FTAN = 241
24322 CEFBS_None, // G_FACOS = 242
24323 CEFBS_None, // G_FASIN = 243
24324 CEFBS_None, // G_FATAN = 244
24325 CEFBS_None, // G_FCOSH = 245
24326 CEFBS_None, // G_FSINH = 246
24327 CEFBS_None, // G_FTANH = 247
24328 CEFBS_None, // G_FSQRT = 248
24329 CEFBS_None, // G_FFLOOR = 249
24330 CEFBS_None, // G_FRINT = 250
24331 CEFBS_None, // G_FNEARBYINT = 251
24332 CEFBS_None, // G_ADDRSPACE_CAST = 252
24333 CEFBS_None, // G_BLOCK_ADDR = 253
24334 CEFBS_None, // G_JUMP_TABLE = 254
24335 CEFBS_None, // G_DYN_STACKALLOC = 255
24336 CEFBS_None, // G_STACKSAVE = 256
24337 CEFBS_None, // G_STACKRESTORE = 257
24338 CEFBS_None, // G_STRICT_FADD = 258
24339 CEFBS_None, // G_STRICT_FSUB = 259
24340 CEFBS_None, // G_STRICT_FMUL = 260
24341 CEFBS_None, // G_STRICT_FDIV = 261
24342 CEFBS_None, // G_STRICT_FREM = 262
24343 CEFBS_None, // G_STRICT_FMA = 263
24344 CEFBS_None, // G_STRICT_FSQRT = 264
24345 CEFBS_None, // G_STRICT_FLDEXP = 265
24346 CEFBS_None, // G_READ_REGISTER = 266
24347 CEFBS_None, // G_WRITE_REGISTER = 267
24348 CEFBS_None, // G_MEMCPY = 268
24349 CEFBS_None, // G_MEMCPY_INLINE = 269
24350 CEFBS_None, // G_MEMMOVE = 270
24351 CEFBS_None, // G_MEMSET = 271
24352 CEFBS_None, // G_BZERO = 272
24353 CEFBS_None, // G_TRAP = 273
24354 CEFBS_None, // G_DEBUGTRAP = 274
24355 CEFBS_None, // G_UBSANTRAP = 275
24356 CEFBS_None, // G_VECREDUCE_SEQ_FADD = 276
24357 CEFBS_None, // G_VECREDUCE_SEQ_FMUL = 277
24358 CEFBS_None, // G_VECREDUCE_FADD = 278
24359 CEFBS_None, // G_VECREDUCE_FMUL = 279
24360 CEFBS_None, // G_VECREDUCE_FMAX = 280
24361 CEFBS_None, // G_VECREDUCE_FMIN = 281
24362 CEFBS_None, // G_VECREDUCE_FMAXIMUM = 282
24363 CEFBS_None, // G_VECREDUCE_FMINIMUM = 283
24364 CEFBS_None, // G_VECREDUCE_ADD = 284
24365 CEFBS_None, // G_VECREDUCE_MUL = 285
24366 CEFBS_None, // G_VECREDUCE_AND = 286
24367 CEFBS_None, // G_VECREDUCE_OR = 287
24368 CEFBS_None, // G_VECREDUCE_XOR = 288
24369 CEFBS_None, // G_VECREDUCE_SMAX = 289
24370 CEFBS_None, // G_VECREDUCE_SMIN = 290
24371 CEFBS_None, // G_VECREDUCE_UMAX = 291
24372 CEFBS_None, // G_VECREDUCE_UMIN = 292
24373 CEFBS_None, // G_SBFX = 293
24374 CEFBS_None, // G_UBFX = 294
24375 CEFBS_None, // ADA_ENTRY = 295
24376 CEFBS_None, // ADA_ENTRY_VALUE = 296
24377 CEFBS_None, // ADB_MemFoldPseudo = 297
24378 CEFBS_None, // ADJCALLSTACKDOWN = 298
24379 CEFBS_None, // ADJCALLSTACKUP = 299
24380 CEFBS_None, // ADJDYNALLOC = 300
24381 CEFBS_None, // AEB_MemFoldPseudo = 301
24382 CEFBS_None, // AEXT128 = 302
24383 CEFBS_FeatureHighWord, // AFIMux = 303
24384 CEFBS_None, // AG_MemFoldPseudo = 304
24385 CEFBS_FeatureHighWord, // AHIMux = 305
24386 CEFBS_FeatureHighWord_FeatureDistinctOps, // AHIMuxK = 306
24387 CEFBS_None, // ALG_MemFoldPseudo = 307
24388 CEFBS_None, // AL_MemFoldPseudo = 308
24389 CEFBS_None, // ATOMIC_CMP_SWAPW = 309
24390 CEFBS_None, // ATOMIC_LOADW_AFI = 310
24391 CEFBS_None, // ATOMIC_LOADW_AR = 311
24392 CEFBS_None, // ATOMIC_LOADW_MAX = 312
24393 CEFBS_None, // ATOMIC_LOADW_MIN = 313
24394 CEFBS_None, // ATOMIC_LOADW_NILH = 314
24395 CEFBS_None, // ATOMIC_LOADW_NILHi = 315
24396 CEFBS_None, // ATOMIC_LOADW_NR = 316
24397 CEFBS_None, // ATOMIC_LOADW_NRi = 317
24398 CEFBS_None, // ATOMIC_LOADW_OILH = 318
24399 CEFBS_None, // ATOMIC_LOADW_OR = 319
24400 CEFBS_None, // ATOMIC_LOADW_SR = 320
24401 CEFBS_None, // ATOMIC_LOADW_UMAX = 321
24402 CEFBS_None, // ATOMIC_LOADW_UMIN = 322
24403 CEFBS_None, // ATOMIC_LOADW_XILF = 323
24404 CEFBS_None, // ATOMIC_LOADW_XR = 324
24405 CEFBS_None, // ATOMIC_SWAPW = 325
24406 CEFBS_None, // A_MemFoldPseudo = 326
24407 CEFBS_FeatureHighWord, // CFIMux = 327
24408 CEFBS_None, // CGIBCall = 328
24409 CEFBS_None, // CGIBReturn = 329
24410 CEFBS_None, // CGRBCall = 330
24411 CEFBS_None, // CGRBReturn = 331
24412 CEFBS_FeatureHighWord, // CHIMux = 332
24413 CEFBS_None, // CIBCall = 333
24414 CEFBS_None, // CIBReturn = 334
24415 CEFBS_None, // CLCImm = 335
24416 CEFBS_None, // CLCReg = 336
24417 CEFBS_FeatureHighWord, // CLFIMux = 337
24418 CEFBS_None, // CLGIBCall = 338
24419 CEFBS_None, // CLGIBReturn = 339
24420 CEFBS_None, // CLGRBCall = 340
24421 CEFBS_None, // CLGRBReturn = 341
24422 CEFBS_None, // CLIBCall = 342
24423 CEFBS_None, // CLIBReturn = 343
24424 CEFBS_FeatureHighWord, // CLMux = 344
24425 CEFBS_None, // CLRBCall = 345
24426 CEFBS_None, // CLRBReturn = 346
24427 CEFBS_None, // CLSTLoop = 347
24428 CEFBS_FeatureHighWord, // CMux = 348
24429 CEFBS_None, // CRBCall = 349
24430 CEFBS_None, // CRBReturn = 350
24431 CEFBS_None, // CallBASR = 351
24432 CEFBS_None, // CallBASR_STACKEXT = 352
24433 CEFBS_None, // CallBASR_XPLINK64 = 353
24434 CEFBS_None, // CallBCR = 354
24435 CEFBS_None, // CallBR = 355
24436 CEFBS_None, // CallBRASL = 356
24437 CEFBS_None, // CallBRASL_XPLINK64 = 357
24438 CEFBS_None, // CallBRCL = 358
24439 CEFBS_None, // CallJG = 359
24440 CEFBS_None, // CondReturn = 360
24441 CEFBS_None, // CondReturn_XPLINK = 361
24442 CEFBS_None, // CondStore16 = 362
24443 CEFBS_None, // CondStore16Inv = 363
24444 CEFBS_FeatureHighWord, // CondStore16Mux = 364
24445 CEFBS_FeatureHighWord, // CondStore16MuxInv = 365
24446 CEFBS_None, // CondStore32 = 366
24447 CEFBS_None, // CondStore32Inv = 367
24448 CEFBS_FeatureLoadStoreOnCond2, // CondStore32Mux = 368
24449 CEFBS_FeatureLoadStoreOnCond2, // CondStore32MuxInv = 369
24450 CEFBS_None, // CondStore64 = 370
24451 CEFBS_None, // CondStore64Inv = 371
24452 CEFBS_None, // CondStore8 = 372
24453 CEFBS_None, // CondStore8Inv = 373
24454 CEFBS_FeatureHighWord, // CondStore8Mux = 374
24455 CEFBS_FeatureHighWord, // CondStore8MuxInv = 375
24456 CEFBS_None, // CondStoreF32 = 376
24457 CEFBS_None, // CondStoreF32Inv = 377
24458 CEFBS_None, // CondStoreF64 = 378
24459 CEFBS_None, // CondStoreF64Inv = 379
24460 CEFBS_None, // CondTrap = 380
24461 CEFBS_None, // DDB_MemFoldPseudo = 381
24462 CEFBS_None, // DEB_MemFoldPseudo = 382
24463 CEFBS_None, // EXRL_Pseudo = 383
24464 CEFBS_None, // GOT = 384
24465 CEFBS_FeatureHighWord, // IIFMux = 385
24466 CEFBS_None, // IIHF64 = 386
24467 CEFBS_None, // IIHH64 = 387
24468 CEFBS_None, // IIHL64 = 388
24469 CEFBS_FeatureHighWord, // IIHMux = 389
24470 CEFBS_None, // IILF64 = 390
24471 CEFBS_None, // IILH64 = 391
24472 CEFBS_None, // IILL64 = 392
24473 CEFBS_FeatureHighWord, // IILMux = 393
24474 CEFBS_None, // L128 = 394
24475 CEFBS_FeatureHighWord, // LBMux = 395
24476 CEFBS_FeatureVector, // LEFR = 396
24477 CEFBS_FeatureVector, // LFER = 397
24478 CEFBS_FeatureHighWord, // LHIMux = 398
24479 CEFBS_FeatureHighWord, // LHMux = 399
24480 CEFBS_FeatureHighWord, // LLCMux = 400
24481 CEFBS_FeatureHighWord, // LLCRMux = 401
24482 CEFBS_FeatureHighWord, // LLHMux = 402
24483 CEFBS_FeatureHighWord, // LLHRMux = 403
24484 CEFBS_FeatureHighWord, // LMux = 404
24485 CEFBS_FeatureLoadStoreOnCond, // LOCG_MemFoldPseudo = 405
24486 CEFBS_FeatureLoadStoreOnCond2, // LOCHIMux = 406
24487 CEFBS_FeatureLoadStoreOnCond2, // LOCMux = 407
24488 CEFBS_FeatureLoadStoreOnCond2, // LOCMux_MemFoldPseudo = 408
24489 CEFBS_FeatureLoadStoreOnCond2, // LOCRMux = 409
24490 CEFBS_None, // LTDBRCompare_Pseudo = 410
24491 CEFBS_None, // LTEBRCompare_Pseudo = 411
24492 CEFBS_None, // LTXBRCompare_Pseudo = 412
24493 CEFBS_None, // LX = 413
24494 CEFBS_None, // MADB_MemFoldPseudo = 414
24495 CEFBS_None, // MAEB_MemFoldPseudo = 415
24496 CEFBS_None, // MDB_MemFoldPseudo = 416
24497 CEFBS_None, // MEEB_MemFoldPseudo = 417
24498 CEFBS_FeatureMiscellaneousExtensions2, // MSC_MemFoldPseudo = 418
24499 CEFBS_None, // MSDB_MemFoldPseudo = 419
24500 CEFBS_None, // MSEB_MemFoldPseudo = 420
24501 CEFBS_FeatureMiscellaneousExtensions2, // MSGC_MemFoldPseudo = 421
24502 CEFBS_None, // MVCImm = 422
24503 CEFBS_None, // MVCReg = 423
24504 CEFBS_None, // MVSTLoop = 424
24505 CEFBS_None, // MemsetImmImm = 425
24506 CEFBS_None, // MemsetImmReg = 426
24507 CEFBS_None, // MemsetRegImm = 427
24508 CEFBS_None, // MemsetRegReg = 428
24509 CEFBS_None, // NCImm = 429
24510 CEFBS_None, // NCReg = 430
24511 CEFBS_None, // NG_MemFoldPseudo = 431
24512 CEFBS_FeatureHighWord, // NIFMux = 432
24513 CEFBS_None, // NIHF64 = 433
24514 CEFBS_None, // NIHH64 = 434
24515 CEFBS_None, // NIHL64 = 435
24516 CEFBS_FeatureHighWord, // NIHMux = 436
24517 CEFBS_None, // NILF64 = 437
24518 CEFBS_None, // NILH64 = 438
24519 CEFBS_None, // NILL64 = 439
24520 CEFBS_FeatureHighWord, // NILMux = 440
24521 CEFBS_None, // N_MemFoldPseudo = 441
24522 CEFBS_None, // OCImm = 442
24523 CEFBS_None, // OCReg = 443
24524 CEFBS_None, // OG_MemFoldPseudo = 444
24525 CEFBS_FeatureHighWord, // OIFMux = 445
24526 CEFBS_None, // OIHF64 = 446
24527 CEFBS_None, // OIHH64 = 447
24528 CEFBS_None, // OIHL64 = 448
24529 CEFBS_FeatureHighWord, // OIHMux = 449
24530 CEFBS_None, // OILF64 = 450
24531 CEFBS_None, // OILH64 = 451
24532 CEFBS_None, // OILL64 = 452
24533 CEFBS_FeatureHighWord, // OILMux = 453
24534 CEFBS_None, // O_MemFoldPseudo = 454
24535 CEFBS_None, // PAIR128 = 455
24536 CEFBS_None, // PROBED_ALLOCA = 456
24537 CEFBS_None, // PROBED_STACKALLOC = 457
24538 CEFBS_FeatureHighWord, // RISBHH = 458
24539 CEFBS_FeatureHighWord, // RISBHL = 459
24540 CEFBS_FeatureHighWord, // RISBLH = 460
24541 CEFBS_FeatureHighWord, // RISBLL = 461
24542 CEFBS_FeatureHighWord, // RISBMux = 462
24543 CEFBS_None, // Return = 463
24544 CEFBS_None, // Return_XPLINK = 464
24545 CEFBS_FeatureVector, // SCmp128Hi = 465
24546 CEFBS_None, // SDB_MemFoldPseudo = 466
24547 CEFBS_None, // SEB_MemFoldPseudo = 467
24548 CEFBS_FeatureMiscellaneousExtensions3, // SELRMux = 468
24549 CEFBS_None, // SG_MemFoldPseudo = 469
24550 CEFBS_None, // SLG_MemFoldPseudo = 470
24551 CEFBS_None, // SL_MemFoldPseudo = 471
24552 CEFBS_None, // SRSTLoop = 472
24553 CEFBS_None, // ST128 = 473
24554 CEFBS_FeatureHighWord, // STCMux = 474
24555 CEFBS_FeatureHighWord, // STHMux = 475
24556 CEFBS_FeatureHighWord, // STMux = 476
24557 CEFBS_FeatureLoadStoreOnCond2, // STOCMux = 477
24558 CEFBS_None, // STX = 478
24559 CEFBS_None, // S_MemFoldPseudo = 479
24560 CEFBS_FeatureVector, // Select128 = 480
24561 CEFBS_None, // Select32 = 481
24562 CEFBS_None, // Select64 = 482
24563 CEFBS_None, // SelectF128 = 483
24564 CEFBS_None, // SelectF32 = 484
24565 CEFBS_None, // SelectF64 = 485
24566 CEFBS_FeatureVectorEnhancements1, // SelectVR128 = 486
24567 CEFBS_FeatureVector, // SelectVR32 = 487
24568 CEFBS_FeatureVector, // SelectVR64 = 488
24569 CEFBS_None, // Serialize = 489
24570 CEFBS_FeatureTransactionalExecution, // TBEGIN_nofloat = 490
24571 CEFBS_None, // TLS_GDCALL = 491
24572 CEFBS_None, // TLS_LDCALL = 492
24573 CEFBS_None, // TMHH64 = 493
24574 CEFBS_None, // TMHL64 = 494
24575 CEFBS_FeatureHighWord, // TMHMux = 495
24576 CEFBS_None, // TMLH64 = 496
24577 CEFBS_None, // TMLL64 = 497
24578 CEFBS_FeatureHighWord, // TMLMux = 498
24579 CEFBS_None, // Trap = 499
24580 CEFBS_FeatureVector, // UCmp128Hi = 500
24581 CEFBS_FeatureVector, // VL32 = 501
24582 CEFBS_FeatureVector, // VL64 = 502
24583 CEFBS_FeatureVector, // VLR32 = 503
24584 CEFBS_FeatureVector, // VLR64 = 504
24585 CEFBS_FeatureVector, // VLVGP32 = 505
24586 CEFBS_FeatureVector, // VST32 = 506
24587 CEFBS_FeatureVector, // VST64 = 507
24588 CEFBS_None, // XCImm = 508
24589 CEFBS_None, // XCReg = 509
24590 CEFBS_None, // XG_MemFoldPseudo = 510
24591 CEFBS_FeatureHighWord, // XIFMux = 511
24592 CEFBS_None, // XIHF64 = 512
24593 CEFBS_None, // XILF64 = 513
24594 CEFBS_None, // XPLINK_STACKALLOC = 514
24595 CEFBS_None, // X_MemFoldPseudo = 515
24596 CEFBS_None, // ZEXT128 = 516
24597 CEFBS_None, // A = 517
24598 CEFBS_None, // AD = 518
24599 CEFBS_None, // ADB = 519
24600 CEFBS_None, // ADBR = 520
24601 CEFBS_None, // ADR = 521
24602 CEFBS_None, // ADTR = 522
24603 CEFBS_FeatureFPExtension, // ADTRA = 523
24604 CEFBS_None, // AE = 524
24605 CEFBS_None, // AEB = 525
24606 CEFBS_None, // AEBR = 526
24607 CEFBS_None, // AER = 527
24608 CEFBS_None, // AFI = 528
24609 CEFBS_None, // AG = 529
24610 CEFBS_None, // AGF = 530
24611 CEFBS_None, // AGFI = 531
24612 CEFBS_None, // AGFR = 532
24613 CEFBS_FeatureMiscellaneousExtensions2, // AGH = 533
24614 CEFBS_None, // AGHI = 534
24615 CEFBS_FeatureDistinctOps, // AGHIK = 535
24616 CEFBS_None, // AGR = 536
24617 CEFBS_FeatureDistinctOps, // AGRK = 537
24618 CEFBS_None, // AGSI = 538
24619 CEFBS_None, // AH = 539
24620 CEFBS_FeatureHighWord, // AHHHR = 540
24621 CEFBS_FeatureHighWord, // AHHLR = 541
24622 CEFBS_None, // AHI = 542
24623 CEFBS_FeatureDistinctOps, // AHIK = 543
24624 CEFBS_None, // AHY = 544
24625 CEFBS_FeatureHighWord, // AIH = 545
24626 CEFBS_None, // AL = 546
24627 CEFBS_None, // ALC = 547
24628 CEFBS_None, // ALCG = 548
24629 CEFBS_None, // ALCGR = 549
24630 CEFBS_None, // ALCR = 550
24631 CEFBS_None, // ALFI = 551
24632 CEFBS_None, // ALG = 552
24633 CEFBS_None, // ALGF = 553
24634 CEFBS_None, // ALGFI = 554
24635 CEFBS_None, // ALGFR = 555
24636 CEFBS_FeatureDistinctOps, // ALGHSIK = 556
24637 CEFBS_None, // ALGR = 557
24638 CEFBS_FeatureDistinctOps, // ALGRK = 558
24639 CEFBS_None, // ALGSI = 559
24640 CEFBS_FeatureHighWord, // ALHHHR = 560
24641 CEFBS_FeatureHighWord, // ALHHLR = 561
24642 CEFBS_FeatureDistinctOps, // ALHSIK = 562
24643 CEFBS_None, // ALR = 563
24644 CEFBS_FeatureDistinctOps, // ALRK = 564
24645 CEFBS_None, // ALSI = 565
24646 CEFBS_FeatureHighWord, // ALSIH = 566
24647 CEFBS_FeatureHighWord, // ALSIHN = 567
24648 CEFBS_None, // ALY = 568
24649 CEFBS_None, // AP = 569
24650 CEFBS_None, // AR = 570
24651 CEFBS_FeatureDistinctOps, // ARK = 571
24652 CEFBS_None, // ASI = 572
24653 CEFBS_None, // AU = 573
24654 CEFBS_None, // AUR = 574
24655 CEFBS_None, // AW = 575
24656 CEFBS_None, // AWR = 576
24657 CEFBS_None, // AXBR = 577
24658 CEFBS_None, // AXR = 578
24659 CEFBS_None, // AXTR = 579
24660 CEFBS_FeatureFPExtension, // AXTRA = 580
24661 CEFBS_None, // AY = 581
24662 CEFBS_None, // B = 582
24663 CEFBS_None, // BAKR = 583
24664 CEFBS_None, // BAL = 584
24665 CEFBS_None, // BALR = 585
24666 CEFBS_None, // BAS = 586
24667 CEFBS_None, // BASR = 587
24668 CEFBS_None, // BASSM = 588
24669 CEFBS_None, // BAsmE = 589
24670 CEFBS_None, // BAsmH = 590
24671 CEFBS_None, // BAsmHE = 591
24672 CEFBS_None, // BAsmL = 592
24673 CEFBS_None, // BAsmLE = 593
24674 CEFBS_None, // BAsmLH = 594
24675 CEFBS_None, // BAsmM = 595
24676 CEFBS_None, // BAsmNE = 596
24677 CEFBS_None, // BAsmNH = 597
24678 CEFBS_None, // BAsmNHE = 598
24679 CEFBS_None, // BAsmNL = 599
24680 CEFBS_None, // BAsmNLE = 600
24681 CEFBS_None, // BAsmNLH = 601
24682 CEFBS_None, // BAsmNM = 602
24683 CEFBS_None, // BAsmNO = 603
24684 CEFBS_None, // BAsmNP = 604
24685 CEFBS_None, // BAsmNZ = 605
24686 CEFBS_None, // BAsmO = 606
24687 CEFBS_None, // BAsmP = 607
24688 CEFBS_None, // BAsmZ = 608
24689 CEFBS_None, // BC = 609
24690 CEFBS_None, // BCAsm = 610
24691 CEFBS_None, // BCR = 611
24692 CEFBS_None, // BCRAsm = 612
24693 CEFBS_None, // BCT = 613
24694 CEFBS_None, // BCTG = 614
24695 CEFBS_None, // BCTGR = 615
24696 CEFBS_None, // BCTR = 616
24697 CEFBS_FeatureMiscellaneousExtensions2, // BI = 617
24698 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmE = 618
24699 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmH = 619
24700 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmHE = 620
24701 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmL = 621
24702 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmLE = 622
24703 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmLH = 623
24704 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmM = 624
24705 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNE = 625
24706 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNH = 626
24707 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNHE = 627
24708 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNL = 628
24709 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNLE = 629
24710 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNLH = 630
24711 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNM = 631
24712 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNO = 632
24713 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNP = 633
24714 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmNZ = 634
24715 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmO = 635
24716 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmP = 636
24717 CEFBS_FeatureMiscellaneousExtensions2, // BIAsmZ = 637
24718 CEFBS_FeatureMiscellaneousExtensions2, // BIC = 638
24719 CEFBS_FeatureMiscellaneousExtensions2, // BICAsm = 639
24720 CEFBS_FeatureExecutionHint, // BPP = 640
24721 CEFBS_FeatureExecutionHint, // BPRP = 641
24722 CEFBS_None, // BR = 642
24723 CEFBS_None, // BRAS = 643
24724 CEFBS_None, // BRASL = 644
24725 CEFBS_None, // BRAsmE = 645
24726 CEFBS_None, // BRAsmH = 646
24727 CEFBS_None, // BRAsmHE = 647
24728 CEFBS_None, // BRAsmL = 648
24729 CEFBS_None, // BRAsmLE = 649
24730 CEFBS_None, // BRAsmLH = 650
24731 CEFBS_None, // BRAsmM = 651
24732 CEFBS_None, // BRAsmNE = 652
24733 CEFBS_None, // BRAsmNH = 653
24734 CEFBS_None, // BRAsmNHE = 654
24735 CEFBS_None, // BRAsmNL = 655
24736 CEFBS_None, // BRAsmNLE = 656
24737 CEFBS_None, // BRAsmNLH = 657
24738 CEFBS_None, // BRAsmNM = 658
24739 CEFBS_None, // BRAsmNO = 659
24740 CEFBS_None, // BRAsmNP = 660
24741 CEFBS_None, // BRAsmNZ = 661
24742 CEFBS_None, // BRAsmO = 662
24743 CEFBS_None, // BRAsmP = 663
24744 CEFBS_None, // BRAsmZ = 664
24745 CEFBS_None, // BRC = 665
24746 CEFBS_None, // BRCAsm = 666
24747 CEFBS_None, // BRCL = 667
24748 CEFBS_None, // BRCLAsm = 668
24749 CEFBS_None, // BRCT = 669
24750 CEFBS_None, // BRCTG = 670
24751 CEFBS_FeatureHighWord, // BRCTH = 671
24752 CEFBS_None, // BRXH = 672
24753 CEFBS_None, // BRXHG = 673
24754 CEFBS_None, // BRXLE = 674
24755 CEFBS_None, // BRXLG = 675
24756 CEFBS_None, // BSA = 676
24757 CEFBS_None, // BSG = 677
24758 CEFBS_None, // BSM = 678
24759 CEFBS_None, // BXH = 679
24760 CEFBS_None, // BXHG = 680
24761 CEFBS_None, // BXLE = 681
24762 CEFBS_None, // BXLEG = 682
24763 CEFBS_None, // C = 683
24764 CEFBS_None, // CD = 684
24765 CEFBS_None, // CDB = 685
24766 CEFBS_None, // CDBR = 686
24767 CEFBS_None, // CDFBR = 687
24768 CEFBS_FeatureFPExtension, // CDFBRA = 688
24769 CEFBS_None, // CDFR = 689
24770 CEFBS_FeatureFPExtension, // CDFTR = 690
24771 CEFBS_None, // CDGBR = 691
24772 CEFBS_FeatureFPExtension, // CDGBRA = 692
24773 CEFBS_None, // CDGR = 693
24774 CEFBS_None, // CDGTR = 694
24775 CEFBS_FeatureFPExtension, // CDGTRA = 695
24776 CEFBS_FeatureFPExtension, // CDLFBR = 696
24777 CEFBS_FeatureFPExtension, // CDLFTR = 697
24778 CEFBS_FeatureFPExtension, // CDLGBR = 698
24779 CEFBS_FeatureFPExtension, // CDLGTR = 699
24780 CEFBS_FeatureDFPPackedConversion, // CDPT = 700
24781 CEFBS_None, // CDR = 701
24782 CEFBS_None, // CDS = 702
24783 CEFBS_None, // CDSG = 703
24784 CEFBS_None, // CDSTR = 704
24785 CEFBS_None, // CDSY = 705
24786 CEFBS_None, // CDTR = 706
24787 CEFBS_None, // CDUTR = 707
24788 CEFBS_FeatureDFPZonedConversion, // CDZT = 708
24789 CEFBS_None, // CE = 709
24790 CEFBS_None, // CEB = 710
24791 CEFBS_None, // CEBR = 711
24792 CEFBS_None, // CEDTR = 712
24793 CEFBS_None, // CEFBR = 713
24794 CEFBS_FeatureFPExtension, // CEFBRA = 714
24795 CEFBS_None, // CEFR = 715
24796 CEFBS_None, // CEGBR = 716
24797 CEFBS_FeatureFPExtension, // CEGBRA = 717
24798 CEFBS_None, // CEGR = 718
24799 CEFBS_FeatureFPExtension, // CELFBR = 719
24800 CEFBS_FeatureFPExtension, // CELGBR = 720
24801 CEFBS_None, // CER = 721
24802 CEFBS_None, // CEXTR = 722
24803 CEFBS_None, // CFC = 723
24804 CEFBS_None, // CFDBR = 724
24805 CEFBS_FeatureFPExtension, // CFDBRA = 725
24806 CEFBS_None, // CFDR = 726
24807 CEFBS_FeatureFPExtension, // CFDTR = 727
24808 CEFBS_None, // CFEBR = 728
24809 CEFBS_FeatureFPExtension, // CFEBRA = 729
24810 CEFBS_None, // CFER = 730
24811 CEFBS_None, // CFI = 731
24812 CEFBS_None, // CFXBR = 732
24813 CEFBS_FeatureFPExtension, // CFXBRA = 733
24814 CEFBS_None, // CFXR = 734
24815 CEFBS_FeatureFPExtension, // CFXTR = 735
24816 CEFBS_None, // CG = 736
24817 CEFBS_None, // CGDBR = 737
24818 CEFBS_FeatureFPExtension, // CGDBRA = 738
24819 CEFBS_None, // CGDR = 739
24820 CEFBS_None, // CGDTR = 740
24821 CEFBS_FeatureFPExtension, // CGDTRA = 741
24822 CEFBS_None, // CGEBR = 742
24823 CEFBS_FeatureFPExtension, // CGEBRA = 743
24824 CEFBS_None, // CGER = 744
24825 CEFBS_None, // CGF = 745
24826 CEFBS_None, // CGFI = 746
24827 CEFBS_None, // CGFR = 747
24828 CEFBS_None, // CGFRL = 748
24829 CEFBS_None, // CGH = 749
24830 CEFBS_None, // CGHI = 750
24831 CEFBS_None, // CGHRL = 751
24832 CEFBS_None, // CGHSI = 752
24833 CEFBS_None, // CGIB = 753
24834 CEFBS_None, // CGIBAsm = 754
24835 CEFBS_None, // CGIBAsmE = 755
24836 CEFBS_None, // CGIBAsmH = 756
24837 CEFBS_None, // CGIBAsmHE = 757
24838 CEFBS_None, // CGIBAsmL = 758
24839 CEFBS_None, // CGIBAsmLE = 759
24840 CEFBS_None, // CGIBAsmLH = 760
24841 CEFBS_None, // CGIBAsmNE = 761
24842 CEFBS_None, // CGIBAsmNH = 762
24843 CEFBS_None, // CGIBAsmNHE = 763
24844 CEFBS_None, // CGIBAsmNL = 764
24845 CEFBS_None, // CGIBAsmNLE = 765
24846 CEFBS_None, // CGIBAsmNLH = 766
24847 CEFBS_None, // CGIJ = 767
24848 CEFBS_None, // CGIJAsm = 768
24849 CEFBS_None, // CGIJAsmE = 769
24850 CEFBS_None, // CGIJAsmH = 770
24851 CEFBS_None, // CGIJAsmHE = 771
24852 CEFBS_None, // CGIJAsmL = 772
24853 CEFBS_None, // CGIJAsmLE = 773
24854 CEFBS_None, // CGIJAsmLH = 774
24855 CEFBS_None, // CGIJAsmNE = 775
24856 CEFBS_None, // CGIJAsmNH = 776
24857 CEFBS_None, // CGIJAsmNHE = 777
24858 CEFBS_None, // CGIJAsmNL = 778
24859 CEFBS_None, // CGIJAsmNLE = 779
24860 CEFBS_None, // CGIJAsmNLH = 780
24861 CEFBS_None, // CGIT = 781
24862 CEFBS_None, // CGITAsm = 782
24863 CEFBS_None, // CGITAsmE = 783
24864 CEFBS_None, // CGITAsmH = 784
24865 CEFBS_None, // CGITAsmHE = 785
24866 CEFBS_None, // CGITAsmL = 786
24867 CEFBS_None, // CGITAsmLE = 787
24868 CEFBS_None, // CGITAsmLH = 788
24869 CEFBS_None, // CGITAsmNE = 789
24870 CEFBS_None, // CGITAsmNH = 790
24871 CEFBS_None, // CGITAsmNHE = 791
24872 CEFBS_None, // CGITAsmNL = 792
24873 CEFBS_None, // CGITAsmNLE = 793
24874 CEFBS_None, // CGITAsmNLH = 794
24875 CEFBS_None, // CGR = 795
24876 CEFBS_None, // CGRB = 796
24877 CEFBS_None, // CGRBAsm = 797
24878 CEFBS_None, // CGRBAsmE = 798
24879 CEFBS_None, // CGRBAsmH = 799
24880 CEFBS_None, // CGRBAsmHE = 800
24881 CEFBS_None, // CGRBAsmL = 801
24882 CEFBS_None, // CGRBAsmLE = 802
24883 CEFBS_None, // CGRBAsmLH = 803
24884 CEFBS_None, // CGRBAsmNE = 804
24885 CEFBS_None, // CGRBAsmNH = 805
24886 CEFBS_None, // CGRBAsmNHE = 806
24887 CEFBS_None, // CGRBAsmNL = 807
24888 CEFBS_None, // CGRBAsmNLE = 808
24889 CEFBS_None, // CGRBAsmNLH = 809
24890 CEFBS_None, // CGRJ = 810
24891 CEFBS_None, // CGRJAsm = 811
24892 CEFBS_None, // CGRJAsmE = 812
24893 CEFBS_None, // CGRJAsmH = 813
24894 CEFBS_None, // CGRJAsmHE = 814
24895 CEFBS_None, // CGRJAsmL = 815
24896 CEFBS_None, // CGRJAsmLE = 816
24897 CEFBS_None, // CGRJAsmLH = 817
24898 CEFBS_None, // CGRJAsmNE = 818
24899 CEFBS_None, // CGRJAsmNH = 819
24900 CEFBS_None, // CGRJAsmNHE = 820
24901 CEFBS_None, // CGRJAsmNL = 821
24902 CEFBS_None, // CGRJAsmNLE = 822
24903 CEFBS_None, // CGRJAsmNLH = 823
24904 CEFBS_None, // CGRL = 824
24905 CEFBS_None, // CGRT = 825
24906 CEFBS_None, // CGRTAsm = 826
24907 CEFBS_None, // CGRTAsmE = 827
24908 CEFBS_None, // CGRTAsmH = 828
24909 CEFBS_None, // CGRTAsmHE = 829
24910 CEFBS_None, // CGRTAsmL = 830
24911 CEFBS_None, // CGRTAsmLE = 831
24912 CEFBS_None, // CGRTAsmLH = 832
24913 CEFBS_None, // CGRTAsmNE = 833
24914 CEFBS_None, // CGRTAsmNH = 834
24915 CEFBS_None, // CGRTAsmNHE = 835
24916 CEFBS_None, // CGRTAsmNL = 836
24917 CEFBS_None, // CGRTAsmNLE = 837
24918 CEFBS_None, // CGRTAsmNLH = 838
24919 CEFBS_None, // CGXBR = 839
24920 CEFBS_FeatureFPExtension, // CGXBRA = 840
24921 CEFBS_None, // CGXR = 841
24922 CEFBS_None, // CGXTR = 842
24923 CEFBS_FeatureFPExtension, // CGXTRA = 843
24924 CEFBS_None, // CH = 844
24925 CEFBS_FeatureHighWord, // CHF = 845
24926 CEFBS_FeatureHighWord, // CHHR = 846
24927 CEFBS_None, // CHHSI = 847
24928 CEFBS_None, // CHI = 848
24929 CEFBS_FeatureHighWord, // CHLR = 849
24930 CEFBS_None, // CHRL = 850
24931 CEFBS_None, // CHSI = 851
24932 CEFBS_None, // CHY = 852
24933 CEFBS_None, // CIB = 853
24934 CEFBS_None, // CIBAsm = 854
24935 CEFBS_None, // CIBAsmE = 855
24936 CEFBS_None, // CIBAsmH = 856
24937 CEFBS_None, // CIBAsmHE = 857
24938 CEFBS_None, // CIBAsmL = 858
24939 CEFBS_None, // CIBAsmLE = 859
24940 CEFBS_None, // CIBAsmLH = 860
24941 CEFBS_None, // CIBAsmNE = 861
24942 CEFBS_None, // CIBAsmNH = 862
24943 CEFBS_None, // CIBAsmNHE = 863
24944 CEFBS_None, // CIBAsmNL = 864
24945 CEFBS_None, // CIBAsmNLE = 865
24946 CEFBS_None, // CIBAsmNLH = 866
24947 CEFBS_FeatureHighWord, // CIH = 867
24948 CEFBS_None, // CIJ = 868
24949 CEFBS_None, // CIJAsm = 869
24950 CEFBS_None, // CIJAsmE = 870
24951 CEFBS_None, // CIJAsmH = 871
24952 CEFBS_None, // CIJAsmHE = 872
24953 CEFBS_None, // CIJAsmL = 873
24954 CEFBS_None, // CIJAsmLE = 874
24955 CEFBS_None, // CIJAsmLH = 875
24956 CEFBS_None, // CIJAsmNE = 876
24957 CEFBS_None, // CIJAsmNH = 877
24958 CEFBS_None, // CIJAsmNHE = 878
24959 CEFBS_None, // CIJAsmNL = 879
24960 CEFBS_None, // CIJAsmNLE = 880
24961 CEFBS_None, // CIJAsmNLH = 881
24962 CEFBS_None, // CIT = 882
24963 CEFBS_None, // CITAsm = 883
24964 CEFBS_None, // CITAsmE = 884
24965 CEFBS_None, // CITAsmH = 885
24966 CEFBS_None, // CITAsmHE = 886
24967 CEFBS_None, // CITAsmL = 887
24968 CEFBS_None, // CITAsmLE = 888
24969 CEFBS_None, // CITAsmLH = 889
24970 CEFBS_None, // CITAsmNE = 890
24971 CEFBS_None, // CITAsmNH = 891
24972 CEFBS_None, // CITAsmNHE = 892
24973 CEFBS_None, // CITAsmNL = 893
24974 CEFBS_None, // CITAsmNLE = 894
24975 CEFBS_None, // CITAsmNLH = 895
24976 CEFBS_None, // CKSM = 896
24977 CEFBS_None, // CL = 897
24978 CEFBS_None, // CLC = 898
24979 CEFBS_None, // CLCL = 899
24980 CEFBS_None, // CLCLE = 900
24981 CEFBS_None, // CLCLU = 901
24982 CEFBS_FeatureFPExtension, // CLFDBR = 902
24983 CEFBS_FeatureFPExtension, // CLFDTR = 903
24984 CEFBS_FeatureFPExtension, // CLFEBR = 904
24985 CEFBS_None, // CLFHSI = 905
24986 CEFBS_None, // CLFI = 906
24987 CEFBS_None, // CLFIT = 907
24988 CEFBS_None, // CLFITAsm = 908
24989 CEFBS_None, // CLFITAsmE = 909
24990 CEFBS_None, // CLFITAsmH = 910
24991 CEFBS_None, // CLFITAsmHE = 911
24992 CEFBS_None, // CLFITAsmL = 912
24993 CEFBS_None, // CLFITAsmLE = 913
24994 CEFBS_None, // CLFITAsmLH = 914
24995 CEFBS_None, // CLFITAsmNE = 915
24996 CEFBS_None, // CLFITAsmNH = 916
24997 CEFBS_None, // CLFITAsmNHE = 917
24998 CEFBS_None, // CLFITAsmNL = 918
24999 CEFBS_None, // CLFITAsmNLE = 919
25000 CEFBS_None, // CLFITAsmNLH = 920
25001 CEFBS_FeatureFPExtension, // CLFXBR = 921
25002 CEFBS_FeatureFPExtension, // CLFXTR = 922
25003 CEFBS_None, // CLG = 923
25004 CEFBS_FeatureFPExtension, // CLGDBR = 924
25005 CEFBS_FeatureFPExtension, // CLGDTR = 925
25006 CEFBS_FeatureFPExtension, // CLGEBR = 926
25007 CEFBS_None, // CLGF = 927
25008 CEFBS_None, // CLGFI = 928
25009 CEFBS_None, // CLGFR = 929
25010 CEFBS_None, // CLGFRL = 930
25011 CEFBS_None, // CLGHRL = 931
25012 CEFBS_None, // CLGHSI = 932
25013 CEFBS_None, // CLGIB = 933
25014 CEFBS_None, // CLGIBAsm = 934
25015 CEFBS_None, // CLGIBAsmE = 935
25016 CEFBS_None, // CLGIBAsmH = 936
25017 CEFBS_None, // CLGIBAsmHE = 937
25018 CEFBS_None, // CLGIBAsmL = 938
25019 CEFBS_None, // CLGIBAsmLE = 939
25020 CEFBS_None, // CLGIBAsmLH = 940
25021 CEFBS_None, // CLGIBAsmNE = 941
25022 CEFBS_None, // CLGIBAsmNH = 942
25023 CEFBS_None, // CLGIBAsmNHE = 943
25024 CEFBS_None, // CLGIBAsmNL = 944
25025 CEFBS_None, // CLGIBAsmNLE = 945
25026 CEFBS_None, // CLGIBAsmNLH = 946
25027 CEFBS_None, // CLGIJ = 947
25028 CEFBS_None, // CLGIJAsm = 948
25029 CEFBS_None, // CLGIJAsmE = 949
25030 CEFBS_None, // CLGIJAsmH = 950
25031 CEFBS_None, // CLGIJAsmHE = 951
25032 CEFBS_None, // CLGIJAsmL = 952
25033 CEFBS_None, // CLGIJAsmLE = 953
25034 CEFBS_None, // CLGIJAsmLH = 954
25035 CEFBS_None, // CLGIJAsmNE = 955
25036 CEFBS_None, // CLGIJAsmNH = 956
25037 CEFBS_None, // CLGIJAsmNHE = 957
25038 CEFBS_None, // CLGIJAsmNL = 958
25039 CEFBS_None, // CLGIJAsmNLE = 959
25040 CEFBS_None, // CLGIJAsmNLH = 960
25041 CEFBS_None, // CLGIT = 961
25042 CEFBS_None, // CLGITAsm = 962
25043 CEFBS_None, // CLGITAsmE = 963
25044 CEFBS_None, // CLGITAsmH = 964
25045 CEFBS_None, // CLGITAsmHE = 965
25046 CEFBS_None, // CLGITAsmL = 966
25047 CEFBS_None, // CLGITAsmLE = 967
25048 CEFBS_None, // CLGITAsmLH = 968
25049 CEFBS_None, // CLGITAsmNE = 969
25050 CEFBS_None, // CLGITAsmNH = 970
25051 CEFBS_None, // CLGITAsmNHE = 971
25052 CEFBS_None, // CLGITAsmNL = 972
25053 CEFBS_None, // CLGITAsmNLE = 973
25054 CEFBS_None, // CLGITAsmNLH = 974
25055 CEFBS_None, // CLGR = 975
25056 CEFBS_None, // CLGRB = 976
25057 CEFBS_None, // CLGRBAsm = 977
25058 CEFBS_None, // CLGRBAsmE = 978
25059 CEFBS_None, // CLGRBAsmH = 979
25060 CEFBS_None, // CLGRBAsmHE = 980
25061 CEFBS_None, // CLGRBAsmL = 981
25062 CEFBS_None, // CLGRBAsmLE = 982
25063 CEFBS_None, // CLGRBAsmLH = 983
25064 CEFBS_None, // CLGRBAsmNE = 984
25065 CEFBS_None, // CLGRBAsmNH = 985
25066 CEFBS_None, // CLGRBAsmNHE = 986
25067 CEFBS_None, // CLGRBAsmNL = 987
25068 CEFBS_None, // CLGRBAsmNLE = 988
25069 CEFBS_None, // CLGRBAsmNLH = 989
25070 CEFBS_None, // CLGRJ = 990
25071 CEFBS_None, // CLGRJAsm = 991
25072 CEFBS_None, // CLGRJAsmE = 992
25073 CEFBS_None, // CLGRJAsmH = 993
25074 CEFBS_None, // CLGRJAsmHE = 994
25075 CEFBS_None, // CLGRJAsmL = 995
25076 CEFBS_None, // CLGRJAsmLE = 996
25077 CEFBS_None, // CLGRJAsmLH = 997
25078 CEFBS_None, // CLGRJAsmNE = 998
25079 CEFBS_None, // CLGRJAsmNH = 999
25080 CEFBS_None, // CLGRJAsmNHE = 1000
25081 CEFBS_None, // CLGRJAsmNL = 1001
25082 CEFBS_None, // CLGRJAsmNLE = 1002
25083 CEFBS_None, // CLGRJAsmNLH = 1003
25084 CEFBS_None, // CLGRL = 1004
25085 CEFBS_None, // CLGRT = 1005
25086 CEFBS_None, // CLGRTAsm = 1006
25087 CEFBS_None, // CLGRTAsmE = 1007
25088 CEFBS_None, // CLGRTAsmH = 1008
25089 CEFBS_None, // CLGRTAsmHE = 1009
25090 CEFBS_None, // CLGRTAsmL = 1010
25091 CEFBS_None, // CLGRTAsmLE = 1011
25092 CEFBS_None, // CLGRTAsmLH = 1012
25093 CEFBS_None, // CLGRTAsmNE = 1013
25094 CEFBS_None, // CLGRTAsmNH = 1014
25095 CEFBS_None, // CLGRTAsmNHE = 1015
25096 CEFBS_None, // CLGRTAsmNL = 1016
25097 CEFBS_None, // CLGRTAsmNLE = 1017
25098 CEFBS_None, // CLGRTAsmNLH = 1018
25099 CEFBS_FeatureMiscellaneousExtensions, // CLGT = 1019
25100 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsm = 1020
25101 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmE = 1021
25102 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmH = 1022
25103 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmHE = 1023
25104 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmL = 1024
25105 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmLE = 1025
25106 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmLH = 1026
25107 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNE = 1027
25108 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNH = 1028
25109 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNHE = 1029
25110 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNL = 1030
25111 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNLE = 1031
25112 CEFBS_FeatureMiscellaneousExtensions, // CLGTAsmNLH = 1032
25113 CEFBS_FeatureFPExtension, // CLGXBR = 1033
25114 CEFBS_FeatureFPExtension, // CLGXTR = 1034
25115 CEFBS_FeatureHighWord, // CLHF = 1035
25116 CEFBS_FeatureHighWord, // CLHHR = 1036
25117 CEFBS_None, // CLHHSI = 1037
25118 CEFBS_FeatureHighWord, // CLHLR = 1038
25119 CEFBS_None, // CLHRL = 1039
25120 CEFBS_None, // CLI = 1040
25121 CEFBS_None, // CLIB = 1041
25122 CEFBS_None, // CLIBAsm = 1042
25123 CEFBS_None, // CLIBAsmE = 1043
25124 CEFBS_None, // CLIBAsmH = 1044
25125 CEFBS_None, // CLIBAsmHE = 1045
25126 CEFBS_None, // CLIBAsmL = 1046
25127 CEFBS_None, // CLIBAsmLE = 1047
25128 CEFBS_None, // CLIBAsmLH = 1048
25129 CEFBS_None, // CLIBAsmNE = 1049
25130 CEFBS_None, // CLIBAsmNH = 1050
25131 CEFBS_None, // CLIBAsmNHE = 1051
25132 CEFBS_None, // CLIBAsmNL = 1052
25133 CEFBS_None, // CLIBAsmNLE = 1053
25134 CEFBS_None, // CLIBAsmNLH = 1054
25135 CEFBS_FeatureHighWord, // CLIH = 1055
25136 CEFBS_None, // CLIJ = 1056
25137 CEFBS_None, // CLIJAsm = 1057
25138 CEFBS_None, // CLIJAsmE = 1058
25139 CEFBS_None, // CLIJAsmH = 1059
25140 CEFBS_None, // CLIJAsmHE = 1060
25141 CEFBS_None, // CLIJAsmL = 1061
25142 CEFBS_None, // CLIJAsmLE = 1062
25143 CEFBS_None, // CLIJAsmLH = 1063
25144 CEFBS_None, // CLIJAsmNE = 1064
25145 CEFBS_None, // CLIJAsmNH = 1065
25146 CEFBS_None, // CLIJAsmNHE = 1066
25147 CEFBS_None, // CLIJAsmNL = 1067
25148 CEFBS_None, // CLIJAsmNLE = 1068
25149 CEFBS_None, // CLIJAsmNLH = 1069
25150 CEFBS_None, // CLIY = 1070
25151 CEFBS_None, // CLM = 1071
25152 CEFBS_None, // CLMH = 1072
25153 CEFBS_None, // CLMY = 1073
25154 CEFBS_None, // CLR = 1074
25155 CEFBS_None, // CLRB = 1075
25156 CEFBS_None, // CLRBAsm = 1076
25157 CEFBS_None, // CLRBAsmE = 1077
25158 CEFBS_None, // CLRBAsmH = 1078
25159 CEFBS_None, // CLRBAsmHE = 1079
25160 CEFBS_None, // CLRBAsmL = 1080
25161 CEFBS_None, // CLRBAsmLE = 1081
25162 CEFBS_None, // CLRBAsmLH = 1082
25163 CEFBS_None, // CLRBAsmNE = 1083
25164 CEFBS_None, // CLRBAsmNH = 1084
25165 CEFBS_None, // CLRBAsmNHE = 1085
25166 CEFBS_None, // CLRBAsmNL = 1086
25167 CEFBS_None, // CLRBAsmNLE = 1087
25168 CEFBS_None, // CLRBAsmNLH = 1088
25169 CEFBS_None, // CLRJ = 1089
25170 CEFBS_None, // CLRJAsm = 1090
25171 CEFBS_None, // CLRJAsmE = 1091
25172 CEFBS_None, // CLRJAsmH = 1092
25173 CEFBS_None, // CLRJAsmHE = 1093
25174 CEFBS_None, // CLRJAsmL = 1094
25175 CEFBS_None, // CLRJAsmLE = 1095
25176 CEFBS_None, // CLRJAsmLH = 1096
25177 CEFBS_None, // CLRJAsmNE = 1097
25178 CEFBS_None, // CLRJAsmNH = 1098
25179 CEFBS_None, // CLRJAsmNHE = 1099
25180 CEFBS_None, // CLRJAsmNL = 1100
25181 CEFBS_None, // CLRJAsmNLE = 1101
25182 CEFBS_None, // CLRJAsmNLH = 1102
25183 CEFBS_None, // CLRL = 1103
25184 CEFBS_None, // CLRT = 1104
25185 CEFBS_None, // CLRTAsm = 1105
25186 CEFBS_None, // CLRTAsmE = 1106
25187 CEFBS_None, // CLRTAsmH = 1107
25188 CEFBS_None, // CLRTAsmHE = 1108
25189 CEFBS_None, // CLRTAsmL = 1109
25190 CEFBS_None, // CLRTAsmLE = 1110
25191 CEFBS_None, // CLRTAsmLH = 1111
25192 CEFBS_None, // CLRTAsmNE = 1112
25193 CEFBS_None, // CLRTAsmNH = 1113
25194 CEFBS_None, // CLRTAsmNHE = 1114
25195 CEFBS_None, // CLRTAsmNL = 1115
25196 CEFBS_None, // CLRTAsmNLE = 1116
25197 CEFBS_None, // CLRTAsmNLH = 1117
25198 CEFBS_None, // CLST = 1118
25199 CEFBS_FeatureMiscellaneousExtensions, // CLT = 1119
25200 CEFBS_FeatureMiscellaneousExtensions, // CLTAsm = 1120
25201 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmE = 1121
25202 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmH = 1122
25203 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmHE = 1123
25204 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmL = 1124
25205 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmLE = 1125
25206 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmLH = 1126
25207 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNE = 1127
25208 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNH = 1128
25209 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNHE = 1129
25210 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNL = 1130
25211 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNLE = 1131
25212 CEFBS_FeatureMiscellaneousExtensions, // CLTAsmNLH = 1132
25213 CEFBS_None, // CLY = 1133
25214 CEFBS_None, // CMPSC = 1134
25215 CEFBS_None, // CP = 1135
25216 CEFBS_FeatureDFPPackedConversion, // CPDT = 1136
25217 CEFBS_None, // CPSDRdd = 1137
25218 CEFBS_None, // CPSDRds = 1138
25219 CEFBS_None, // CPSDRsd = 1139
25220 CEFBS_None, // CPSDRss = 1140
25221 CEFBS_FeatureDFPPackedConversion, // CPXT = 1141
25222 CEFBS_None, // CPYA = 1142
25223 CEFBS_None, // CR = 1143
25224 CEFBS_None, // CRB = 1144
25225 CEFBS_None, // CRBAsm = 1145
25226 CEFBS_None, // CRBAsmE = 1146
25227 CEFBS_None, // CRBAsmH = 1147
25228 CEFBS_None, // CRBAsmHE = 1148
25229 CEFBS_None, // CRBAsmL = 1149
25230 CEFBS_None, // CRBAsmLE = 1150
25231 CEFBS_None, // CRBAsmLH = 1151
25232 CEFBS_None, // CRBAsmNE = 1152
25233 CEFBS_None, // CRBAsmNH = 1153
25234 CEFBS_None, // CRBAsmNHE = 1154
25235 CEFBS_None, // CRBAsmNL = 1155
25236 CEFBS_None, // CRBAsmNLE = 1156
25237 CEFBS_None, // CRBAsmNLH = 1157
25238 CEFBS_FeatureEnhancedDAT2, // CRDTE = 1158
25239 CEFBS_FeatureEnhancedDAT2, // CRDTEOpt = 1159
25240 CEFBS_None, // CRJ = 1160
25241 CEFBS_None, // CRJAsm = 1161
25242 CEFBS_None, // CRJAsmE = 1162
25243 CEFBS_None, // CRJAsmH = 1163
25244 CEFBS_None, // CRJAsmHE = 1164
25245 CEFBS_None, // CRJAsmL = 1165
25246 CEFBS_None, // CRJAsmLE = 1166
25247 CEFBS_None, // CRJAsmLH = 1167
25248 CEFBS_None, // CRJAsmNE = 1168
25249 CEFBS_None, // CRJAsmNH = 1169
25250 CEFBS_None, // CRJAsmNHE = 1170
25251 CEFBS_None, // CRJAsmNL = 1171
25252 CEFBS_None, // CRJAsmNLE = 1172
25253 CEFBS_None, // CRJAsmNLH = 1173
25254 CEFBS_None, // CRL = 1174
25255 CEFBS_None, // CRT = 1175
25256 CEFBS_None, // CRTAsm = 1176
25257 CEFBS_None, // CRTAsmE = 1177
25258 CEFBS_None, // CRTAsmH = 1178
25259 CEFBS_None, // CRTAsmHE = 1179
25260 CEFBS_None, // CRTAsmL = 1180
25261 CEFBS_None, // CRTAsmLE = 1181
25262 CEFBS_None, // CRTAsmLH = 1182
25263 CEFBS_None, // CRTAsmNE = 1183
25264 CEFBS_None, // CRTAsmNH = 1184
25265 CEFBS_None, // CRTAsmNHE = 1185
25266 CEFBS_None, // CRTAsmNL = 1186
25267 CEFBS_None, // CRTAsmNLE = 1187
25268 CEFBS_None, // CRTAsmNLH = 1188
25269 CEFBS_None, // CS = 1189
25270 CEFBS_None, // CSCH = 1190
25271 CEFBS_None, // CSDTR = 1191
25272 CEFBS_None, // CSG = 1192
25273 CEFBS_None, // CSP = 1193
25274 CEFBS_None, // CSPG = 1194
25275 CEFBS_None, // CSST = 1195
25276 CEFBS_None, // CSXTR = 1196
25277 CEFBS_None, // CSY = 1197
25278 CEFBS_None, // CU12 = 1198
25279 CEFBS_None, // CU12Opt = 1199
25280 CEFBS_None, // CU14 = 1200
25281 CEFBS_None, // CU14Opt = 1201
25282 CEFBS_None, // CU21 = 1202
25283 CEFBS_None, // CU21Opt = 1203
25284 CEFBS_None, // CU24 = 1204
25285 CEFBS_None, // CU24Opt = 1205
25286 CEFBS_None, // CU41 = 1206
25287 CEFBS_None, // CU42 = 1207
25288 CEFBS_None, // CUDTR = 1208
25289 CEFBS_None, // CUSE = 1209
25290 CEFBS_None, // CUTFU = 1210
25291 CEFBS_None, // CUTFUOpt = 1211
25292 CEFBS_None, // CUUTF = 1212
25293 CEFBS_None, // CUUTFOpt = 1213
25294 CEFBS_None, // CUXTR = 1214
25295 CEFBS_None, // CVB = 1215
25296 CEFBS_None, // CVBG = 1216
25297 CEFBS_None, // CVBY = 1217
25298 CEFBS_None, // CVD = 1218
25299 CEFBS_None, // CVDG = 1219
25300 CEFBS_None, // CVDY = 1220
25301 CEFBS_None, // CXBR = 1221
25302 CEFBS_None, // CXFBR = 1222
25303 CEFBS_FeatureFPExtension, // CXFBRA = 1223
25304 CEFBS_None, // CXFR = 1224
25305 CEFBS_FeatureFPExtension, // CXFTR = 1225
25306 CEFBS_None, // CXGBR = 1226
25307 CEFBS_FeatureFPExtension, // CXGBRA = 1227
25308 CEFBS_None, // CXGR = 1228
25309 CEFBS_None, // CXGTR = 1229
25310 CEFBS_FeatureFPExtension, // CXGTRA = 1230
25311 CEFBS_FeatureFPExtension, // CXLFBR = 1231
25312 CEFBS_FeatureFPExtension, // CXLFTR = 1232
25313 CEFBS_FeatureFPExtension, // CXLGBR = 1233
25314 CEFBS_FeatureFPExtension, // CXLGTR = 1234
25315 CEFBS_FeatureDFPPackedConversion, // CXPT = 1235
25316 CEFBS_None, // CXR = 1236
25317 CEFBS_None, // CXSTR = 1237
25318 CEFBS_None, // CXTR = 1238
25319 CEFBS_None, // CXUTR = 1239
25320 CEFBS_FeatureDFPZonedConversion, // CXZT = 1240
25321 CEFBS_None, // CY = 1241
25322 CEFBS_FeatureDFPZonedConversion, // CZDT = 1242
25323 CEFBS_FeatureDFPZonedConversion, // CZXT = 1243
25324 CEFBS_None, // D = 1244
25325 CEFBS_None, // DD = 1245
25326 CEFBS_None, // DDB = 1246
25327 CEFBS_None, // DDBR = 1247
25328 CEFBS_None, // DDR = 1248
25329 CEFBS_None, // DDTR = 1249
25330 CEFBS_FeatureFPExtension, // DDTRA = 1250
25331 CEFBS_None, // DE = 1251
25332 CEFBS_None, // DEB = 1252
25333 CEFBS_None, // DEBR = 1253
25334 CEFBS_None, // DER = 1254
25335 CEFBS_FeatureDeflateConversion, // DFLTCC = 1255
25336 CEFBS_None, // DIAG = 1256
25337 CEFBS_None, // DIDBR = 1257
25338 CEFBS_None, // DIEBR = 1258
25339 CEFBS_None, // DL = 1259
25340 CEFBS_None, // DLG = 1260
25341 CEFBS_None, // DLGR = 1261
25342 CEFBS_None, // DLR = 1262
25343 CEFBS_None, // DP = 1263
25344 CEFBS_None, // DR = 1264
25345 CEFBS_None, // DSG = 1265
25346 CEFBS_None, // DSGF = 1266
25347 CEFBS_None, // DSGFR = 1267
25348 CEFBS_None, // DSGR = 1268
25349 CEFBS_None, // DXBR = 1269
25350 CEFBS_None, // DXR = 1270
25351 CEFBS_None, // DXTR = 1271
25352 CEFBS_FeatureFPExtension, // DXTRA = 1272
25353 CEFBS_None, // EAR = 1273
25354 CEFBS_None, // ECAG = 1274
25355 CEFBS_None, // ECCTR = 1275
25356 CEFBS_None, // ECPGA = 1276
25357 CEFBS_None, // ECTG = 1277
25358 CEFBS_None, // ED = 1278
25359 CEFBS_None, // EDMK = 1279
25360 CEFBS_None, // EEDTR = 1280
25361 CEFBS_None, // EEXTR = 1281
25362 CEFBS_None, // EFPC = 1282
25363 CEFBS_None, // EPAIR = 1283
25364 CEFBS_None, // EPAR = 1284
25365 CEFBS_None, // EPCTR = 1285
25366 CEFBS_None, // EPSW = 1286
25367 CEFBS_None, // EREG = 1287
25368 CEFBS_None, // EREGG = 1288
25369 CEFBS_None, // ESAIR = 1289
25370 CEFBS_None, // ESAR = 1290
25371 CEFBS_None, // ESDTR = 1291
25372 CEFBS_None, // ESEA = 1292
25373 CEFBS_None, // ESTA = 1293
25374 CEFBS_None, // ESXTR = 1294
25375 CEFBS_FeatureTransactionalExecution, // ETND = 1295
25376 CEFBS_None, // EX = 1296
25377 CEFBS_None, // EXRL = 1297
25378 CEFBS_None, // FIDBR = 1298
25379 CEFBS_FeatureFPExtension, // FIDBRA = 1299
25380 CEFBS_None, // FIDR = 1300
25381 CEFBS_None, // FIDTR = 1301
25382 CEFBS_None, // FIEBR = 1302
25383 CEFBS_FeatureFPExtension, // FIEBRA = 1303
25384 CEFBS_None, // FIER = 1304
25385 CEFBS_None, // FIXBR = 1305
25386 CEFBS_FeatureFPExtension, // FIXBRA = 1306
25387 CEFBS_None, // FIXR = 1307
25388 CEFBS_None, // FIXTR = 1308
25389 CEFBS_None, // FLOGR = 1309
25390 CEFBS_None, // HDR = 1310
25391 CEFBS_None, // HER = 1311
25392 CEFBS_None, // HSCH = 1312
25393 CEFBS_None, // IAC = 1313
25394 CEFBS_None, // IC = 1314
25395 CEFBS_None, // IC32 = 1315
25396 CEFBS_None, // IC32Y = 1316
25397 CEFBS_None, // ICM = 1317
25398 CEFBS_None, // ICMH = 1318
25399 CEFBS_None, // ICMY = 1319
25400 CEFBS_None, // ICY = 1320
25401 CEFBS_None, // IDTE = 1321
25402 CEFBS_None, // IDTEOpt = 1322
25403 CEFBS_None, // IEDTR = 1323
25404 CEFBS_None, // IEXTR = 1324
25405 CEFBS_None, // IIHF = 1325
25406 CEFBS_None, // IIHH = 1326
25407 CEFBS_None, // IIHL = 1327
25408 CEFBS_None, // IILF = 1328
25409 CEFBS_None, // IILH = 1329
25410 CEFBS_None, // IILL = 1330
25411 CEFBS_None, // IPK = 1331
25412 CEFBS_None, // IPM = 1332
25413 CEFBS_None, // IPTE = 1333
25414 CEFBS_None, // IPTEOpt = 1334
25415 CEFBS_None, // IPTEOptOpt = 1335
25416 CEFBS_FeatureInsertReferenceBitsMultiple, // IRBM = 1336
25417 CEFBS_None, // ISKE = 1337
25418 CEFBS_None, // IVSK = 1338
25419 CEFBS_None, // InsnE = 1339
25420 CEFBS_None, // InsnRI = 1340
25421 CEFBS_None, // InsnRIE = 1341
25422 CEFBS_None, // InsnRIL = 1342
25423 CEFBS_None, // InsnRILU = 1343
25424 CEFBS_None, // InsnRIS = 1344
25425 CEFBS_None, // InsnRR = 1345
25426 CEFBS_None, // InsnRRE = 1346
25427 CEFBS_None, // InsnRRF = 1347
25428 CEFBS_None, // InsnRRS = 1348
25429 CEFBS_None, // InsnRS = 1349
25430 CEFBS_None, // InsnRSE = 1350
25431 CEFBS_None, // InsnRSI = 1351
25432 CEFBS_None, // InsnRSY = 1352
25433 CEFBS_None, // InsnRX = 1353
25434 CEFBS_None, // InsnRXE = 1354
25435 CEFBS_None, // InsnRXF = 1355
25436 CEFBS_None, // InsnRXY = 1356
25437 CEFBS_None, // InsnS = 1357
25438 CEFBS_None, // InsnSI = 1358
25439 CEFBS_None, // InsnSIL = 1359
25440 CEFBS_None, // InsnSIY = 1360
25441 CEFBS_None, // InsnSS = 1361
25442 CEFBS_None, // InsnSSE = 1362
25443 CEFBS_None, // InsnSSF = 1363
25444 CEFBS_None, // InsnVRI = 1364
25445 CEFBS_None, // InsnVRR = 1365
25446 CEFBS_None, // InsnVRS = 1366
25447 CEFBS_None, // InsnVRV = 1367
25448 CEFBS_None, // InsnVRX = 1368
25449 CEFBS_None, // InsnVSI = 1369
25450 CEFBS_None, // J = 1370
25451 CEFBS_None, // JAsmE = 1371
25452 CEFBS_None, // JAsmH = 1372
25453 CEFBS_None, // JAsmHE = 1373
25454 CEFBS_None, // JAsmL = 1374
25455 CEFBS_None, // JAsmLE = 1375
25456 CEFBS_None, // JAsmLH = 1376
25457 CEFBS_None, // JAsmM = 1377
25458 CEFBS_None, // JAsmNE = 1378
25459 CEFBS_None, // JAsmNH = 1379
25460 CEFBS_None, // JAsmNHE = 1380
25461 CEFBS_None, // JAsmNL = 1381
25462 CEFBS_None, // JAsmNLE = 1382
25463 CEFBS_None, // JAsmNLH = 1383
25464 CEFBS_None, // JAsmNM = 1384
25465 CEFBS_None, // JAsmNO = 1385
25466 CEFBS_None, // JAsmNP = 1386
25467 CEFBS_None, // JAsmNZ = 1387
25468 CEFBS_None, // JAsmO = 1388
25469 CEFBS_None, // JAsmP = 1389
25470 CEFBS_None, // JAsmZ = 1390
25471 CEFBS_None, // JG = 1391
25472 CEFBS_None, // JGAsmE = 1392
25473 CEFBS_None, // JGAsmH = 1393
25474 CEFBS_None, // JGAsmHE = 1394
25475 CEFBS_None, // JGAsmL = 1395
25476 CEFBS_None, // JGAsmLE = 1396
25477 CEFBS_None, // JGAsmLH = 1397
25478 CEFBS_None, // JGAsmM = 1398
25479 CEFBS_None, // JGAsmNE = 1399
25480 CEFBS_None, // JGAsmNH = 1400
25481 CEFBS_None, // JGAsmNHE = 1401
25482 CEFBS_None, // JGAsmNL = 1402
25483 CEFBS_None, // JGAsmNLE = 1403
25484 CEFBS_None, // JGAsmNLH = 1404
25485 CEFBS_None, // JGAsmNM = 1405
25486 CEFBS_None, // JGAsmNO = 1406
25487 CEFBS_None, // JGAsmNP = 1407
25488 CEFBS_None, // JGAsmNZ = 1408
25489 CEFBS_None, // JGAsmO = 1409
25490 CEFBS_None, // JGAsmP = 1410
25491 CEFBS_None, // JGAsmZ = 1411
25492 CEFBS_None, // KDB = 1412
25493 CEFBS_None, // KDBR = 1413
25494 CEFBS_FeatureMessageSecurityAssist9, // KDSA = 1414
25495 CEFBS_None, // KDTR = 1415
25496 CEFBS_None, // KEB = 1416
25497 CEFBS_None, // KEBR = 1417
25498 CEFBS_None, // KIMD = 1418
25499 CEFBS_None, // KLMD = 1419
25500 CEFBS_None, // KM = 1420
25501 CEFBS_FeatureMessageSecurityAssist8, // KMA = 1421
25502 CEFBS_None, // KMAC = 1422
25503 CEFBS_None, // KMC = 1423
25504 CEFBS_FeatureMessageSecurityAssist4, // KMCTR = 1424
25505 CEFBS_FeatureMessageSecurityAssist4, // KMF = 1425
25506 CEFBS_FeatureMessageSecurityAssist4, // KMO = 1426
25507 CEFBS_None, // KXBR = 1427
25508 CEFBS_None, // KXTR = 1428
25509 CEFBS_None, // L = 1429
25510 CEFBS_None, // LA = 1430
25511 CEFBS_FeatureInterlockedAccess1, // LAA = 1431
25512 CEFBS_FeatureInterlockedAccess1, // LAAG = 1432
25513 CEFBS_FeatureInterlockedAccess1, // LAAL = 1433
25514 CEFBS_FeatureInterlockedAccess1, // LAALG = 1434
25515 CEFBS_None, // LAE = 1435
25516 CEFBS_None, // LAEY = 1436
25517 CEFBS_None, // LAM = 1437
25518 CEFBS_None, // LAMY = 1438
25519 CEFBS_FeatureInterlockedAccess1, // LAN = 1439
25520 CEFBS_FeatureInterlockedAccess1, // LANG = 1440
25521 CEFBS_FeatureInterlockedAccess1, // LAO = 1441
25522 CEFBS_FeatureInterlockedAccess1, // LAOG = 1442
25523 CEFBS_None, // LARL = 1443
25524 CEFBS_None, // LASP = 1444
25525 CEFBS_FeatureLoadAndTrap, // LAT = 1445
25526 CEFBS_FeatureInterlockedAccess1, // LAX = 1446
25527 CEFBS_FeatureInterlockedAccess1, // LAXG = 1447
25528 CEFBS_None, // LAY = 1448
25529 CEFBS_None, // LB = 1449
25530 CEFBS_FeatureBEAREnhancement, // LBEAR = 1450
25531 CEFBS_FeatureHighWord, // LBH = 1451
25532 CEFBS_None, // LBR = 1452
25533 CEFBS_FeatureVector, // LCBB = 1453
25534 CEFBS_None, // LCCTL = 1454
25535 CEFBS_None, // LCDBR = 1455
25536 CEFBS_None, // LCDFR = 1456
25537 CEFBS_None, // LCDFR_32 = 1457
25538 CEFBS_None, // LCDR = 1458
25539 CEFBS_None, // LCEBR = 1459
25540 CEFBS_None, // LCER = 1460
25541 CEFBS_None, // LCGFR = 1461
25542 CEFBS_None, // LCGR = 1462
25543 CEFBS_None, // LCR = 1463
25544 CEFBS_None, // LCTL = 1464
25545 CEFBS_None, // LCTLG = 1465
25546 CEFBS_None, // LCXBR = 1466
25547 CEFBS_None, // LCXR = 1467
25548 CEFBS_None, // LD = 1468
25549 CEFBS_None, // LDE = 1469
25550 CEFBS_None, // LDE32 = 1470
25551 CEFBS_None, // LDEB = 1471
25552 CEFBS_None, // LDEBR = 1472
25553 CEFBS_None, // LDER = 1473
25554 CEFBS_None, // LDETR = 1474
25555 CEFBS_None, // LDGR = 1475
25556 CEFBS_None, // LDR = 1476
25557 CEFBS_None, // LDR32 = 1477
25558 CEFBS_None, // LDXBR = 1478
25559 CEFBS_FeatureFPExtension, // LDXBRA = 1479
25560 CEFBS_None, // LDXR = 1480
25561 CEFBS_None, // LDXTR = 1481
25562 CEFBS_None, // LDY = 1482
25563 CEFBS_None, // LE = 1483
25564 CEFBS_None, // LEDBR = 1484
25565 CEFBS_FeatureFPExtension, // LEDBRA = 1485
25566 CEFBS_None, // LEDR = 1486
25567 CEFBS_None, // LEDTR = 1487
25568 CEFBS_None, // LER = 1488
25569 CEFBS_None, // LEXBR = 1489
25570 CEFBS_FeatureFPExtension, // LEXBRA = 1490
25571 CEFBS_None, // LEXR = 1491
25572 CEFBS_None, // LEY = 1492
25573 CEFBS_None, // LFAS = 1493
25574 CEFBS_FeatureHighWord, // LFH = 1494
25575 CEFBS_FeatureLoadAndTrap, // LFHAT = 1495
25576 CEFBS_None, // LFPC = 1496
25577 CEFBS_None, // LG = 1497
25578 CEFBS_FeatureLoadAndTrap, // LGAT = 1498
25579 CEFBS_None, // LGB = 1499
25580 CEFBS_None, // LGBR = 1500
25581 CEFBS_None, // LGDR = 1501
25582 CEFBS_None, // LGF = 1502
25583 CEFBS_None, // LGFI = 1503
25584 CEFBS_None, // LGFR = 1504
25585 CEFBS_None, // LGFRL = 1505
25586 CEFBS_FeatureGuardedStorage, // LGG = 1506
25587 CEFBS_None, // LGH = 1507
25588 CEFBS_None, // LGHI = 1508
25589 CEFBS_None, // LGHR = 1509
25590 CEFBS_None, // LGHRL = 1510
25591 CEFBS_None, // LGR = 1511
25592 CEFBS_None, // LGRL = 1512
25593 CEFBS_FeatureGuardedStorage, // LGSC = 1513
25594 CEFBS_None, // LH = 1514
25595 CEFBS_FeatureHighWord, // LHH = 1515
25596 CEFBS_None, // LHI = 1516
25597 CEFBS_None, // LHR = 1517
25598 CEFBS_None, // LHRL = 1518
25599 CEFBS_None, // LHY = 1519
25600 CEFBS_None, // LLC = 1520
25601 CEFBS_FeatureHighWord, // LLCH = 1521
25602 CEFBS_None, // LLCR = 1522
25603 CEFBS_None, // LLGC = 1523
25604 CEFBS_None, // LLGCR = 1524
25605 CEFBS_None, // LLGF = 1525
25606 CEFBS_FeatureLoadAndTrap, // LLGFAT = 1526
25607 CEFBS_None, // LLGFR = 1527
25608 CEFBS_None, // LLGFRL = 1528
25609 CEFBS_FeatureGuardedStorage, // LLGFSG = 1529
25610 CEFBS_None, // LLGH = 1530
25611 CEFBS_None, // LLGHR = 1531
25612 CEFBS_None, // LLGHRL = 1532
25613 CEFBS_None, // LLGT = 1533
25614 CEFBS_FeatureLoadAndTrap, // LLGTAT = 1534
25615 CEFBS_None, // LLGTR = 1535
25616 CEFBS_None, // LLH = 1536
25617 CEFBS_FeatureHighWord, // LLHH = 1537
25618 CEFBS_None, // LLHR = 1538
25619 CEFBS_None, // LLHRL = 1539
25620 CEFBS_None, // LLIHF = 1540
25621 CEFBS_None, // LLIHH = 1541
25622 CEFBS_None, // LLIHL = 1542
25623 CEFBS_None, // LLILF = 1543
25624 CEFBS_None, // LLILH = 1544
25625 CEFBS_None, // LLILL = 1545
25626 CEFBS_FeatureLoadAndZeroRightmostByte, // LLZRGF = 1546
25627 CEFBS_None, // LM = 1547
25628 CEFBS_None, // LMD = 1548
25629 CEFBS_None, // LMG = 1549
25630 CEFBS_None, // LMH = 1550
25631 CEFBS_None, // LMY = 1551
25632 CEFBS_None, // LNDBR = 1552
25633 CEFBS_None, // LNDFR = 1553
25634 CEFBS_None, // LNDFR_32 = 1554
25635 CEFBS_None, // LNDR = 1555
25636 CEFBS_None, // LNEBR = 1556
25637 CEFBS_None, // LNER = 1557
25638 CEFBS_None, // LNGFR = 1558
25639 CEFBS_None, // LNGR = 1559
25640 CEFBS_None, // LNR = 1560
25641 CEFBS_None, // LNXBR = 1561
25642 CEFBS_None, // LNXR = 1562
25643 CEFBS_FeatureLoadStoreOnCond, // LOC = 1563
25644 CEFBS_FeatureLoadStoreOnCond, // LOCAsm = 1564
25645 CEFBS_FeatureLoadStoreOnCond, // LOCAsmE = 1565
25646 CEFBS_FeatureLoadStoreOnCond, // LOCAsmH = 1566
25647 CEFBS_FeatureLoadStoreOnCond, // LOCAsmHE = 1567
25648 CEFBS_FeatureLoadStoreOnCond, // LOCAsmL = 1568
25649 CEFBS_FeatureLoadStoreOnCond, // LOCAsmLE = 1569
25650 CEFBS_FeatureLoadStoreOnCond, // LOCAsmLH = 1570
25651 CEFBS_FeatureLoadStoreOnCond, // LOCAsmM = 1571
25652 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNE = 1572
25653 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNH = 1573
25654 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNHE = 1574
25655 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNL = 1575
25656 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNLE = 1576
25657 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNLH = 1577
25658 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNM = 1578
25659 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNO = 1579
25660 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNP = 1580
25661 CEFBS_FeatureLoadStoreOnCond, // LOCAsmNZ = 1581
25662 CEFBS_FeatureLoadStoreOnCond, // LOCAsmO = 1582
25663 CEFBS_FeatureLoadStoreOnCond, // LOCAsmP = 1583
25664 CEFBS_FeatureLoadStoreOnCond, // LOCAsmZ = 1584
25665 CEFBS_FeatureLoadStoreOnCond2, // LOCFH = 1585
25666 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsm = 1586
25667 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmE = 1587
25668 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmH = 1588
25669 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmHE = 1589
25670 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmL = 1590
25671 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmLE = 1591
25672 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmLH = 1592
25673 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmM = 1593
25674 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNE = 1594
25675 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNH = 1595
25676 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNHE = 1596
25677 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNL = 1597
25678 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNLE = 1598
25679 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNLH = 1599
25680 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNM = 1600
25681 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNO = 1601
25682 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNP = 1602
25683 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmNZ = 1603
25684 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmO = 1604
25685 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmP = 1605
25686 CEFBS_FeatureLoadStoreOnCond2, // LOCFHAsmZ = 1606
25687 CEFBS_FeatureLoadStoreOnCond2, // LOCFHR = 1607
25688 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsm = 1608
25689 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmE = 1609
25690 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmH = 1610
25691 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmHE = 1611
25692 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmL = 1612
25693 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmLE = 1613
25694 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmLH = 1614
25695 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmM = 1615
25696 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNE = 1616
25697 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNH = 1617
25698 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNHE = 1618
25699 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNL = 1619
25700 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNLE = 1620
25701 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNLH = 1621
25702 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNM = 1622
25703 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNO = 1623
25704 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNP = 1624
25705 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmNZ = 1625
25706 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmO = 1626
25707 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmP = 1627
25708 CEFBS_FeatureLoadStoreOnCond2, // LOCFHRAsmZ = 1628
25709 CEFBS_FeatureLoadStoreOnCond, // LOCG = 1629
25710 CEFBS_FeatureLoadStoreOnCond, // LOCGAsm = 1630
25711 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmE = 1631
25712 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmH = 1632
25713 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmHE = 1633
25714 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmL = 1634
25715 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmLE = 1635
25716 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmLH = 1636
25717 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmM = 1637
25718 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNE = 1638
25719 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNH = 1639
25720 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNHE = 1640
25721 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNL = 1641
25722 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNLE = 1642
25723 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNLH = 1643
25724 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNM = 1644
25725 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNO = 1645
25726 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNP = 1646
25727 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmNZ = 1647
25728 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmO = 1648
25729 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmP = 1649
25730 CEFBS_FeatureLoadStoreOnCond, // LOCGAsmZ = 1650
25731 CEFBS_FeatureLoadStoreOnCond2, // LOCGHI = 1651
25732 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsm = 1652
25733 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmE = 1653
25734 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmH = 1654
25735 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmHE = 1655
25736 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmL = 1656
25737 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmLE = 1657
25738 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmLH = 1658
25739 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmM = 1659
25740 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNE = 1660
25741 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNH = 1661
25742 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNHE = 1662
25743 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNL = 1663
25744 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNLE = 1664
25745 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNLH = 1665
25746 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNM = 1666
25747 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNO = 1667
25748 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNP = 1668
25749 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmNZ = 1669
25750 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmO = 1670
25751 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmP = 1671
25752 CEFBS_FeatureLoadStoreOnCond2, // LOCGHIAsmZ = 1672
25753 CEFBS_FeatureLoadStoreOnCond, // LOCGR = 1673
25754 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsm = 1674
25755 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmE = 1675
25756 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmH = 1676
25757 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmHE = 1677
25758 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmL = 1678
25759 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmLE = 1679
25760 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmLH = 1680
25761 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmM = 1681
25762 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNE = 1682
25763 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNH = 1683
25764 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNHE = 1684
25765 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNL = 1685
25766 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNLE = 1686
25767 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNLH = 1687
25768 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNM = 1688
25769 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNO = 1689
25770 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNP = 1690
25771 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmNZ = 1691
25772 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmO = 1692
25773 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmP = 1693
25774 CEFBS_FeatureLoadStoreOnCond, // LOCGRAsmZ = 1694
25775 CEFBS_FeatureLoadStoreOnCond2, // LOCHHI = 1695
25776 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsm = 1696
25777 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmE = 1697
25778 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmH = 1698
25779 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmHE = 1699
25780 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmL = 1700
25781 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmLE = 1701
25782 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmLH = 1702
25783 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmM = 1703
25784 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNE = 1704
25785 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNH = 1705
25786 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNHE = 1706
25787 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNL = 1707
25788 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNLE = 1708
25789 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNLH = 1709
25790 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNM = 1710
25791 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNO = 1711
25792 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNP = 1712
25793 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmNZ = 1713
25794 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmO = 1714
25795 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmP = 1715
25796 CEFBS_FeatureLoadStoreOnCond2, // LOCHHIAsmZ = 1716
25797 CEFBS_FeatureLoadStoreOnCond2, // LOCHI = 1717
25798 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsm = 1718
25799 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmE = 1719
25800 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmH = 1720
25801 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmHE = 1721
25802 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmL = 1722
25803 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmLE = 1723
25804 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmLH = 1724
25805 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmM = 1725
25806 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNE = 1726
25807 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNH = 1727
25808 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNHE = 1728
25809 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNL = 1729
25810 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNLE = 1730
25811 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNLH = 1731
25812 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNM = 1732
25813 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNO = 1733
25814 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNP = 1734
25815 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmNZ = 1735
25816 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmO = 1736
25817 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmP = 1737
25818 CEFBS_FeatureLoadStoreOnCond2, // LOCHIAsmZ = 1738
25819 CEFBS_FeatureLoadStoreOnCond, // LOCR = 1739
25820 CEFBS_FeatureLoadStoreOnCond, // LOCRAsm = 1740
25821 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmE = 1741
25822 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmH = 1742
25823 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmHE = 1743
25824 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmL = 1744
25825 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmLE = 1745
25826 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmLH = 1746
25827 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmM = 1747
25828 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNE = 1748
25829 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNH = 1749
25830 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNHE = 1750
25831 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNL = 1751
25832 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNLE = 1752
25833 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNLH = 1753
25834 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNM = 1754
25835 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNO = 1755
25836 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNP = 1756
25837 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmNZ = 1757
25838 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmO = 1758
25839 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmP = 1759
25840 CEFBS_FeatureLoadStoreOnCond, // LOCRAsmZ = 1760
25841 CEFBS_None, // LPCTL = 1761
25842 CEFBS_FeatureInterlockedAccess1, // LPD = 1762
25843 CEFBS_None, // LPDBR = 1763
25844 CEFBS_None, // LPDFR = 1764
25845 CEFBS_None, // LPDFR_32 = 1765
25846 CEFBS_FeatureInterlockedAccess1, // LPDG = 1766
25847 CEFBS_None, // LPDR = 1767
25848 CEFBS_None, // LPEBR = 1768
25849 CEFBS_None, // LPER = 1769
25850 CEFBS_None, // LPGFR = 1770
25851 CEFBS_None, // LPGR = 1771
25852 CEFBS_None, // LPP = 1772
25853 CEFBS_None, // LPQ = 1773
25854 CEFBS_None, // LPR = 1774
25855 CEFBS_None, // LPSW = 1775
25856 CEFBS_None, // LPSWE = 1776
25857 CEFBS_FeatureBEAREnhancement, // LPSWEY = 1777
25858 CEFBS_None, // LPTEA = 1778
25859 CEFBS_None, // LPXBR = 1779
25860 CEFBS_None, // LPXR = 1780
25861 CEFBS_None, // LR = 1781
25862 CEFBS_None, // LRA = 1782
25863 CEFBS_None, // LRAG = 1783
25864 CEFBS_None, // LRAY = 1784
25865 CEFBS_None, // LRDR = 1785
25866 CEFBS_None, // LRER = 1786
25867 CEFBS_None, // LRL = 1787
25868 CEFBS_None, // LRV = 1788
25869 CEFBS_None, // LRVG = 1789
25870 CEFBS_None, // LRVGR = 1790
25871 CEFBS_None, // LRVH = 1791
25872 CEFBS_None, // LRVR = 1792
25873 CEFBS_None, // LSCTL = 1793
25874 CEFBS_None, // LT = 1794
25875 CEFBS_None, // LTDBR = 1795
25876 CEFBS_None, // LTDR = 1796
25877 CEFBS_None, // LTDTR = 1797
25878 CEFBS_None, // LTEBR = 1798
25879 CEFBS_None, // LTER = 1799
25880 CEFBS_None, // LTG = 1800
25881 CEFBS_None, // LTGF = 1801
25882 CEFBS_None, // LTGFR = 1802
25883 CEFBS_None, // LTGR = 1803
25884 CEFBS_None, // LTR = 1804
25885 CEFBS_None, // LTXBR = 1805
25886 CEFBS_None, // LTXR = 1806
25887 CEFBS_None, // LTXTR = 1807
25888 CEFBS_None, // LURA = 1808
25889 CEFBS_None, // LURAG = 1809
25890 CEFBS_None, // LXD = 1810
25891 CEFBS_None, // LXDB = 1811
25892 CEFBS_None, // LXDBR = 1812
25893 CEFBS_None, // LXDR = 1813
25894 CEFBS_None, // LXDTR = 1814
25895 CEFBS_None, // LXE = 1815
25896 CEFBS_None, // LXEB = 1816
25897 CEFBS_None, // LXEBR = 1817
25898 CEFBS_None, // LXER = 1818
25899 CEFBS_None, // LXR = 1819
25900 CEFBS_None, // LY = 1820
25901 CEFBS_None, // LZDR = 1821
25902 CEFBS_None, // LZER = 1822
25903 CEFBS_FeatureLoadAndZeroRightmostByte, // LZRF = 1823
25904 CEFBS_FeatureLoadAndZeroRightmostByte, // LZRG = 1824
25905 CEFBS_None, // LZXR = 1825
25906 CEFBS_None, // M = 1826
25907 CEFBS_None, // MAD = 1827
25908 CEFBS_None, // MADB = 1828
25909 CEFBS_None, // MADBR = 1829
25910 CEFBS_None, // MADR = 1830
25911 CEFBS_None, // MAE = 1831
25912 CEFBS_None, // MAEB = 1832
25913 CEFBS_None, // MAEBR = 1833
25914 CEFBS_None, // MAER = 1834
25915 CEFBS_None, // MAY = 1835
25916 CEFBS_None, // MAYH = 1836
25917 CEFBS_None, // MAYHR = 1837
25918 CEFBS_None, // MAYL = 1838
25919 CEFBS_None, // MAYLR = 1839
25920 CEFBS_None, // MAYR = 1840
25921 CEFBS_None, // MC = 1841
25922 CEFBS_None, // MD = 1842
25923 CEFBS_None, // MDB = 1843
25924 CEFBS_None, // MDBR = 1844
25925 CEFBS_None, // MDE = 1845
25926 CEFBS_None, // MDEB = 1846
25927 CEFBS_None, // MDEBR = 1847
25928 CEFBS_None, // MDER = 1848
25929 CEFBS_None, // MDR = 1849
25930 CEFBS_None, // MDTR = 1850
25931 CEFBS_FeatureFPExtension, // MDTRA = 1851
25932 CEFBS_None, // ME = 1852
25933 CEFBS_None, // MEE = 1853
25934 CEFBS_None, // MEEB = 1854
25935 CEFBS_None, // MEEBR = 1855
25936 CEFBS_None, // MEER = 1856
25937 CEFBS_None, // MER = 1857
25938 CEFBS_None, // MFY = 1858
25939 CEFBS_FeatureMiscellaneousExtensions2, // MG = 1859
25940 CEFBS_FeatureMiscellaneousExtensions2, // MGH = 1860
25941 CEFBS_None, // MGHI = 1861
25942 CEFBS_FeatureMiscellaneousExtensions2, // MGRK = 1862
25943 CEFBS_None, // MH = 1863
25944 CEFBS_None, // MHI = 1864
25945 CEFBS_None, // MHY = 1865
25946 CEFBS_None, // ML = 1866
25947 CEFBS_None, // MLG = 1867
25948 CEFBS_None, // MLGR = 1868
25949 CEFBS_None, // MLR = 1869
25950 CEFBS_None, // MP = 1870
25951 CEFBS_None, // MR = 1871
25952 CEFBS_None, // MS = 1872
25953 CEFBS_FeatureMiscellaneousExtensions2, // MSC = 1873
25954 CEFBS_None, // MSCH = 1874
25955 CEFBS_None, // MSD = 1875
25956 CEFBS_None, // MSDB = 1876
25957 CEFBS_None, // MSDBR = 1877
25958 CEFBS_None, // MSDR = 1878
25959 CEFBS_None, // MSE = 1879
25960 CEFBS_None, // MSEB = 1880
25961 CEFBS_None, // MSEBR = 1881
25962 CEFBS_None, // MSER = 1882
25963 CEFBS_None, // MSFI = 1883
25964 CEFBS_None, // MSG = 1884
25965 CEFBS_FeatureMiscellaneousExtensions2, // MSGC = 1885
25966 CEFBS_None, // MSGF = 1886
25967 CEFBS_None, // MSGFI = 1887
25968 CEFBS_None, // MSGFR = 1888
25969 CEFBS_None, // MSGR = 1889
25970 CEFBS_FeatureMiscellaneousExtensions2, // MSGRKC = 1890
25971 CEFBS_None, // MSR = 1891
25972 CEFBS_FeatureMiscellaneousExtensions2, // MSRKC = 1892
25973 CEFBS_None, // MSTA = 1893
25974 CEFBS_None, // MSY = 1894
25975 CEFBS_None, // MVC = 1895
25976 CEFBS_None, // MVCDK = 1896
25977 CEFBS_None, // MVCIN = 1897
25978 CEFBS_None, // MVCK = 1898
25979 CEFBS_None, // MVCL = 1899
25980 CEFBS_None, // MVCLE = 1900
25981 CEFBS_None, // MVCLU = 1901
25982 CEFBS_None, // MVCOS = 1902
25983 CEFBS_None, // MVCP = 1903
25984 CEFBS_FeatureMiscellaneousExtensions3, // MVCRL = 1904
25985 CEFBS_None, // MVCS = 1905
25986 CEFBS_None, // MVCSK = 1906
25987 CEFBS_None, // MVGHI = 1907
25988 CEFBS_None, // MVHHI = 1908
25989 CEFBS_None, // MVHI = 1909
25990 CEFBS_None, // MVI = 1910
25991 CEFBS_None, // MVIY = 1911
25992 CEFBS_None, // MVN = 1912
25993 CEFBS_None, // MVO = 1913
25994 CEFBS_None, // MVPG = 1914
25995 CEFBS_None, // MVST = 1915
25996 CEFBS_None, // MVZ = 1916
25997 CEFBS_None, // MXBR = 1917
25998 CEFBS_None, // MXD = 1918
25999 CEFBS_None, // MXDB = 1919
26000 CEFBS_None, // MXDBR = 1920
26001 CEFBS_None, // MXDR = 1921
26002 CEFBS_None, // MXR = 1922
26003 CEFBS_None, // MXTR = 1923
26004 CEFBS_FeatureFPExtension, // MXTRA = 1924
26005 CEFBS_None, // MY = 1925
26006 CEFBS_None, // MYH = 1926
26007 CEFBS_None, // MYHR = 1927
26008 CEFBS_None, // MYL = 1928
26009 CEFBS_None, // MYLR = 1929
26010 CEFBS_None, // MYR = 1930
26011 CEFBS_None, // N = 1931
26012 CEFBS_None, // NC = 1932
26013 CEFBS_FeatureMiscellaneousExtensions3, // NCGRK = 1933
26014 CEFBS_FeatureMiscellaneousExtensions3, // NCRK = 1934
26015 CEFBS_None, // NG = 1935
26016 CEFBS_None, // NGR = 1936
26017 CEFBS_FeatureDistinctOps, // NGRK = 1937
26018 CEFBS_None, // NI = 1938
26019 CEFBS_FeatureExecutionHint, // NIAI = 1939
26020 CEFBS_None, // NIHF = 1940
26021 CEFBS_None, // NIHH = 1941
26022 CEFBS_None, // NIHL = 1942
26023 CEFBS_None, // NILF = 1943
26024 CEFBS_None, // NILH = 1944
26025 CEFBS_None, // NILL = 1945
26026 CEFBS_None, // NIY = 1946
26027 CEFBS_FeatureMiscellaneousExtensions3, // NNGRK = 1947
26028 CEFBS_FeatureNNPAssist, // NNPA = 1948
26029 CEFBS_FeatureMiscellaneousExtensions3, // NNRK = 1949
26030 CEFBS_FeatureMiscellaneousExtensions3, // NOGRK = 1950
26031 CEFBS_None, // NOP = 1951
26032 CEFBS_None, // NOPR = 1952
26033 CEFBS_None, // NOP_bare = 1953
26034 CEFBS_FeatureMiscellaneousExtensions3, // NORK = 1954
26035 CEFBS_FeatureMiscellaneousExtensions3, // NOTGR = 1955
26036 CEFBS_FeatureMiscellaneousExtensions3, // NOTR = 1956
26037 CEFBS_None, // NR = 1957
26038 CEFBS_FeatureDistinctOps, // NRK = 1958
26039 CEFBS_FeatureTransactionalExecution, // NTSTG = 1959
26040 CEFBS_FeatureMiscellaneousExtensions3, // NXGRK = 1960
26041 CEFBS_FeatureMiscellaneousExtensions3, // NXRK = 1961
26042 CEFBS_None, // NY = 1962
26043 CEFBS_None, // O = 1963
26044 CEFBS_None, // OC = 1964
26045 CEFBS_FeatureMiscellaneousExtensions3, // OCGRK = 1965
26046 CEFBS_FeatureMiscellaneousExtensions3, // OCRK = 1966
26047 CEFBS_None, // OG = 1967
26048 CEFBS_None, // OGR = 1968
26049 CEFBS_FeatureDistinctOps, // OGRK = 1969
26050 CEFBS_None, // OI = 1970
26051 CEFBS_None, // OIHF = 1971
26052 CEFBS_None, // OIHH = 1972
26053 CEFBS_None, // OIHL = 1973
26054 CEFBS_None, // OILF = 1974
26055 CEFBS_None, // OILH = 1975
26056 CEFBS_None, // OILL = 1976
26057 CEFBS_None, // OIY = 1977
26058 CEFBS_None, // OR = 1978
26059 CEFBS_FeatureDistinctOps, // ORK = 1979
26060 CEFBS_None, // OY = 1980
26061 CEFBS_None, // PACK = 1981
26062 CEFBS_None, // PALB = 1982
26063 CEFBS_None, // PC = 1983
26064 CEFBS_FeatureMessageSecurityAssist4, // PCC = 1984
26065 CEFBS_FeatureMessageSecurityAssist3, // PCKMO = 1985
26066 CEFBS_None, // PFD = 1986
26067 CEFBS_None, // PFDRL = 1987
26068 CEFBS_None, // PFMF = 1988
26069 CEFBS_None, // PFPO = 1989
26070 CEFBS_None, // PGIN = 1990
26071 CEFBS_None, // PGOUT = 1991
26072 CEFBS_None, // PKA = 1992
26073 CEFBS_None, // PKU = 1993
26074 CEFBS_None, // PLO = 1994
26075 CEFBS_FeaturePopulationCount, // POPCNT = 1995
26076 CEFBS_FeatureMiscellaneousExtensions3, // POPCNTOpt = 1996
26077 CEFBS_FeatureProcessorAssist, // PPA = 1997
26078 CEFBS_FeatureMessageSecurityAssist5, // PPNO = 1998
26079 CEFBS_None, // PR = 1999
26080 CEFBS_FeatureMessageSecurityAssist7, // PRNO = 2000
26081 CEFBS_None, // PT = 2001
26082 CEFBS_None, // PTF = 2002
26083 CEFBS_None, // PTFF = 2003
26084 CEFBS_None, // PTI = 2004
26085 CEFBS_None, // PTLB = 2005
26086 CEFBS_None, // QADTR = 2006
26087 CEFBS_None, // QAXTR = 2007
26088 CEFBS_None, // QCTRI = 2008
26089 CEFBS_FeatureProcessorActivityInstrumentation, // QPACI = 2009
26090 CEFBS_None, // QSI = 2010
26091 CEFBS_None, // RCHP = 2011
26092 CEFBS_FeatureResetDATProtection, // RDP = 2012
26093 CEFBS_FeatureResetDATProtection, // RDPOpt = 2013
26094 CEFBS_None, // RISBG = 2014
26095 CEFBS_None, // RISBG32 = 2015
26096 CEFBS_FeatureMiscellaneousExtensions, // RISBGN = 2016
26097 CEFBS_FeatureMiscellaneousExtensions, // RISBGNZ = 2017
26098 CEFBS_None, // RISBGZ = 2018
26099 CEFBS_FeatureHighWord, // RISBHG = 2019
26100 CEFBS_FeatureHighWord, // RISBLG = 2020
26101 CEFBS_None, // RLL = 2021
26102 CEFBS_None, // RLLG = 2022
26103 CEFBS_None, // RNSBG = 2023
26104 CEFBS_None, // ROSBG = 2024
26105 CEFBS_None, // RP = 2025
26106 CEFBS_None, // RRBE = 2026
26107 CEFBS_FeatureResetReferenceBitsMultiple, // RRBM = 2027
26108 CEFBS_None, // RRDTR = 2028
26109 CEFBS_None, // RRXTR = 2029
26110 CEFBS_None, // RSCH = 2030
26111 CEFBS_None, // RXSBG = 2031
26112 CEFBS_None, // S = 2032
26113 CEFBS_None, // SAC = 2033
26114 CEFBS_None, // SACF = 2034
26115 CEFBS_None, // SAL = 2035
26116 CEFBS_None, // SAM24 = 2036
26117 CEFBS_None, // SAM31 = 2037
26118 CEFBS_None, // SAM64 = 2038
26119 CEFBS_None, // SAR = 2039
26120 CEFBS_None, // SCCTR = 2040
26121 CEFBS_None, // SCHM = 2041
26122 CEFBS_None, // SCK = 2042
26123 CEFBS_None, // SCKC = 2043
26124 CEFBS_None, // SCKPF = 2044
26125 CEFBS_None, // SD = 2045
26126 CEFBS_None, // SDB = 2046
26127 CEFBS_None, // SDBR = 2047
26128 CEFBS_None, // SDR = 2048
26129 CEFBS_None, // SDTR = 2049
26130 CEFBS_FeatureFPExtension, // SDTRA = 2050
26131 CEFBS_None, // SE = 2051
26132 CEFBS_None, // SEB = 2052
26133 CEFBS_None, // SEBR = 2053
26134 CEFBS_FeatureMiscellaneousExtensions3, // SELFHR = 2054
26135 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsm = 2055
26136 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmE = 2056
26137 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmH = 2057
26138 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmHE = 2058
26139 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmL = 2059
26140 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmLE = 2060
26141 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmLH = 2061
26142 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmM = 2062
26143 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNE = 2063
26144 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNH = 2064
26145 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNHE = 2065
26146 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNL = 2066
26147 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNLE = 2067
26148 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNLH = 2068
26149 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNM = 2069
26150 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNO = 2070
26151 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNP = 2071
26152 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmNZ = 2072
26153 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmO = 2073
26154 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmP = 2074
26155 CEFBS_FeatureMiscellaneousExtensions3, // SELFHRAsmZ = 2075
26156 CEFBS_FeatureMiscellaneousExtensions3, // SELGR = 2076
26157 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsm = 2077
26158 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmE = 2078
26159 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmH = 2079
26160 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmHE = 2080
26161 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmL = 2081
26162 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmLE = 2082
26163 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmLH = 2083
26164 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmM = 2084
26165 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNE = 2085
26166 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNH = 2086
26167 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNHE = 2087
26168 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNL = 2088
26169 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNLE = 2089
26170 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNLH = 2090
26171 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNM = 2091
26172 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNO = 2092
26173 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNP = 2093
26174 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmNZ = 2094
26175 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmO = 2095
26176 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmP = 2096
26177 CEFBS_FeatureMiscellaneousExtensions3, // SELGRAsmZ = 2097
26178 CEFBS_FeatureMiscellaneousExtensions3, // SELR = 2098
26179 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsm = 2099
26180 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmE = 2100
26181 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmH = 2101
26182 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmHE = 2102
26183 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmL = 2103
26184 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmLE = 2104
26185 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmLH = 2105
26186 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmM = 2106
26187 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNE = 2107
26188 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNH = 2108
26189 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNHE = 2109
26190 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNL = 2110
26191 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNLE = 2111
26192 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNLH = 2112
26193 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNM = 2113
26194 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNO = 2114
26195 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNP = 2115
26196 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmNZ = 2116
26197 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmO = 2117
26198 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmP = 2118
26199 CEFBS_FeatureMiscellaneousExtensions3, // SELRAsmZ = 2119
26200 CEFBS_None, // SER = 2120
26201 CEFBS_None, // SFASR = 2121
26202 CEFBS_None, // SFPC = 2122
26203 CEFBS_None, // SG = 2123
26204 CEFBS_None, // SGF = 2124
26205 CEFBS_None, // SGFR = 2125
26206 CEFBS_FeatureMiscellaneousExtensions2, // SGH = 2126
26207 CEFBS_None, // SGR = 2127
26208 CEFBS_FeatureDistinctOps, // SGRK = 2128
26209 CEFBS_None, // SH = 2129
26210 CEFBS_FeatureHighWord, // SHHHR = 2130
26211 CEFBS_FeatureHighWord, // SHHLR = 2131
26212 CEFBS_None, // SHY = 2132
26213 CEFBS_None, // SIE = 2133
26214 CEFBS_None, // SIGA = 2134
26215 CEFBS_None, // SIGP = 2135
26216 CEFBS_None, // SL = 2136
26217 CEFBS_None, // SLA = 2137
26218 CEFBS_None, // SLAG = 2138
26219 CEFBS_FeatureDistinctOps, // SLAK = 2139
26220 CEFBS_None, // SLB = 2140
26221 CEFBS_None, // SLBG = 2141
26222 CEFBS_None, // SLBGR = 2142
26223 CEFBS_None, // SLBR = 2143
26224 CEFBS_None, // SLDA = 2144
26225 CEFBS_None, // SLDL = 2145
26226 CEFBS_None, // SLDT = 2146
26227 CEFBS_None, // SLFI = 2147
26228 CEFBS_None, // SLG = 2148
26229 CEFBS_None, // SLGF = 2149
26230 CEFBS_None, // SLGFI = 2150
26231 CEFBS_None, // SLGFR = 2151
26232 CEFBS_None, // SLGR = 2152
26233 CEFBS_FeatureDistinctOps, // SLGRK = 2153
26234 CEFBS_FeatureHighWord, // SLHHHR = 2154
26235 CEFBS_FeatureHighWord, // SLHHLR = 2155
26236 CEFBS_None, // SLL = 2156
26237 CEFBS_None, // SLLG = 2157
26238 CEFBS_FeatureDistinctOps, // SLLK = 2158
26239 CEFBS_None, // SLR = 2159
26240 CEFBS_FeatureDistinctOps, // SLRK = 2160
26241 CEFBS_None, // SLXT = 2161
26242 CEFBS_None, // SLY = 2162
26243 CEFBS_FeatureEnhancedSort, // SORTL = 2163
26244 CEFBS_None, // SP = 2164
26245 CEFBS_None, // SPCTR = 2165
26246 CEFBS_None, // SPKA = 2166
26247 CEFBS_None, // SPM = 2167
26248 CEFBS_None, // SPT = 2168
26249 CEFBS_None, // SPX = 2169
26250 CEFBS_None, // SQD = 2170
26251 CEFBS_None, // SQDB = 2171
26252 CEFBS_None, // SQDBR = 2172
26253 CEFBS_None, // SQDR = 2173
26254 CEFBS_None, // SQE = 2174
26255 CEFBS_None, // SQEB = 2175
26256 CEFBS_None, // SQEBR = 2176
26257 CEFBS_None, // SQER = 2177
26258 CEFBS_None, // SQXBR = 2178
26259 CEFBS_None, // SQXR = 2179
26260 CEFBS_None, // SR = 2180
26261 CEFBS_None, // SRA = 2181
26262 CEFBS_None, // SRAG = 2182
26263 CEFBS_FeatureDistinctOps, // SRAK = 2183
26264 CEFBS_None, // SRDA = 2184
26265 CEFBS_None, // SRDL = 2185
26266 CEFBS_None, // SRDT = 2186
26267 CEFBS_FeatureDistinctOps, // SRK = 2187
26268 CEFBS_None, // SRL = 2188
26269 CEFBS_None, // SRLG = 2189
26270 CEFBS_FeatureDistinctOps, // SRLK = 2190
26271 CEFBS_None, // SRNM = 2191
26272 CEFBS_FeatureFPExtension, // SRNMB = 2192
26273 CEFBS_None, // SRNMT = 2193
26274 CEFBS_None, // SRP = 2194
26275 CEFBS_None, // SRST = 2195
26276 CEFBS_None, // SRSTU = 2196
26277 CEFBS_None, // SRXT = 2197
26278 CEFBS_None, // SSAIR = 2198
26279 CEFBS_None, // SSAR = 2199
26280 CEFBS_None, // SSCH = 2200
26281 CEFBS_None, // SSKE = 2201
26282 CEFBS_None, // SSKEOpt = 2202
26283 CEFBS_None, // SSM = 2203
26284 CEFBS_None, // ST = 2204
26285 CEFBS_None, // STAM = 2205
26286 CEFBS_None, // STAMY = 2206
26287 CEFBS_None, // STAP = 2207
26288 CEFBS_FeatureBEAREnhancement, // STBEAR = 2208
26289 CEFBS_None, // STC = 2209
26290 CEFBS_FeatureHighWord, // STCH = 2210
26291 CEFBS_None, // STCK = 2211
26292 CEFBS_None, // STCKC = 2212
26293 CEFBS_None, // STCKE = 2213
26294 CEFBS_None, // STCKF = 2214
26295 CEFBS_None, // STCM = 2215
26296 CEFBS_None, // STCMH = 2216
26297 CEFBS_None, // STCMY = 2217
26298 CEFBS_None, // STCPS = 2218
26299 CEFBS_None, // STCRW = 2219
26300 CEFBS_None, // STCTG = 2220
26301 CEFBS_None, // STCTL = 2221
26302 CEFBS_None, // STCY = 2222
26303 CEFBS_None, // STD = 2223
26304 CEFBS_None, // STDY = 2224
26305 CEFBS_None, // STE = 2225
26306 CEFBS_None, // STEY = 2226
26307 CEFBS_FeatureHighWord, // STFH = 2227
26308 CEFBS_None, // STFL = 2228
26309 CEFBS_None, // STFLE = 2229
26310 CEFBS_None, // STFPC = 2230
26311 CEFBS_None, // STG = 2231
26312 CEFBS_None, // STGRL = 2232
26313 CEFBS_FeatureGuardedStorage, // STGSC = 2233
26314 CEFBS_None, // STH = 2234
26315 CEFBS_FeatureHighWord, // STHH = 2235
26316 CEFBS_None, // STHRL = 2236
26317 CEFBS_None, // STHY = 2237
26318 CEFBS_None, // STIDP = 2238
26319 CEFBS_None, // STM = 2239
26320 CEFBS_None, // STMG = 2240
26321 CEFBS_None, // STMH = 2241
26322 CEFBS_None, // STMY = 2242
26323 CEFBS_None, // STNSM = 2243
26324 CEFBS_FeatureLoadStoreOnCond, // STOC = 2244
26325 CEFBS_FeatureLoadStoreOnCond, // STOCAsm = 2245
26326 CEFBS_FeatureLoadStoreOnCond, // STOCAsmE = 2246
26327 CEFBS_FeatureLoadStoreOnCond, // STOCAsmH = 2247
26328 CEFBS_FeatureLoadStoreOnCond, // STOCAsmHE = 2248
26329 CEFBS_FeatureLoadStoreOnCond, // STOCAsmL = 2249
26330 CEFBS_FeatureLoadStoreOnCond, // STOCAsmLE = 2250
26331 CEFBS_FeatureLoadStoreOnCond, // STOCAsmLH = 2251
26332 CEFBS_FeatureLoadStoreOnCond, // STOCAsmM = 2252
26333 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNE = 2253
26334 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNH = 2254
26335 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNHE = 2255
26336 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNL = 2256
26337 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNLE = 2257
26338 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNLH = 2258
26339 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNM = 2259
26340 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNO = 2260
26341 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNP = 2261
26342 CEFBS_FeatureLoadStoreOnCond, // STOCAsmNZ = 2262
26343 CEFBS_FeatureLoadStoreOnCond, // STOCAsmO = 2263
26344 CEFBS_FeatureLoadStoreOnCond, // STOCAsmP = 2264
26345 CEFBS_FeatureLoadStoreOnCond, // STOCAsmZ = 2265
26346 CEFBS_FeatureLoadStoreOnCond2, // STOCFH = 2266
26347 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsm = 2267
26348 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmE = 2268
26349 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmH = 2269
26350 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmHE = 2270
26351 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmL = 2271
26352 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmLE = 2272
26353 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmLH = 2273
26354 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmM = 2274
26355 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNE = 2275
26356 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNH = 2276
26357 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNHE = 2277
26358 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNL = 2278
26359 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNLE = 2279
26360 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNLH = 2280
26361 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNM = 2281
26362 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNO = 2282
26363 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNP = 2283
26364 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmNZ = 2284
26365 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmO = 2285
26366 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmP = 2286
26367 CEFBS_FeatureLoadStoreOnCond2, // STOCFHAsmZ = 2287
26368 CEFBS_FeatureLoadStoreOnCond, // STOCG = 2288
26369 CEFBS_FeatureLoadStoreOnCond, // STOCGAsm = 2289
26370 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmE = 2290
26371 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmH = 2291
26372 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmHE = 2292
26373 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmL = 2293
26374 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmLE = 2294
26375 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmLH = 2295
26376 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmM = 2296
26377 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNE = 2297
26378 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNH = 2298
26379 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNHE = 2299
26380 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNL = 2300
26381 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNLE = 2301
26382 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNLH = 2302
26383 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNM = 2303
26384 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNO = 2304
26385 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNP = 2305
26386 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmNZ = 2306
26387 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmO = 2307
26388 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmP = 2308
26389 CEFBS_FeatureLoadStoreOnCond, // STOCGAsmZ = 2309
26390 CEFBS_None, // STOSM = 2310
26391 CEFBS_None, // STPQ = 2311
26392 CEFBS_None, // STPT = 2312
26393 CEFBS_None, // STPX = 2313
26394 CEFBS_None, // STRAG = 2314
26395 CEFBS_None, // STRL = 2315
26396 CEFBS_None, // STRV = 2316
26397 CEFBS_None, // STRVG = 2317
26398 CEFBS_None, // STRVH = 2318
26399 CEFBS_None, // STSCH = 2319
26400 CEFBS_None, // STSI = 2320
26401 CEFBS_None, // STURA = 2321
26402 CEFBS_None, // STURG = 2322
26403 CEFBS_None, // STY = 2323
26404 CEFBS_None, // SU = 2324
26405 CEFBS_None, // SUR = 2325
26406 CEFBS_None, // SVC = 2326
26407 CEFBS_None, // SW = 2327
26408 CEFBS_None, // SWR = 2328
26409 CEFBS_None, // SXBR = 2329
26410 CEFBS_None, // SXR = 2330
26411 CEFBS_None, // SXTR = 2331
26412 CEFBS_FeatureFPExtension, // SXTRA = 2332
26413 CEFBS_None, // SY = 2333
26414 CEFBS_FeatureTransactionalExecution, // TABORT = 2334
26415 CEFBS_None, // TAM = 2335
26416 CEFBS_None, // TAR = 2336
26417 CEFBS_None, // TB = 2337
26418 CEFBS_None, // TBDR = 2338
26419 CEFBS_None, // TBEDR = 2339
26420 CEFBS_FeatureTransactionalExecution, // TBEGIN = 2340
26421 CEFBS_FeatureTransactionalExecution, // TBEGINC = 2341
26422 CEFBS_None, // TCDB = 2342
26423 CEFBS_None, // TCEB = 2343
26424 CEFBS_None, // TCXB = 2344
26425 CEFBS_None, // TDCDT = 2345
26426 CEFBS_None, // TDCET = 2346
26427 CEFBS_None, // TDCXT = 2347
26428 CEFBS_None, // TDGDT = 2348
26429 CEFBS_None, // TDGET = 2349
26430 CEFBS_None, // TDGXT = 2350
26431 CEFBS_FeatureTransactionalExecution, // TEND = 2351
26432 CEFBS_None, // THDER = 2352
26433 CEFBS_None, // THDR = 2353
26434 CEFBS_None, // TM = 2354
26435 CEFBS_None, // TMHH = 2355
26436 CEFBS_None, // TMHL = 2356
26437 CEFBS_None, // TMLH = 2357
26438 CEFBS_None, // TMLL = 2358
26439 CEFBS_None, // TMY = 2359
26440 CEFBS_None, // TP = 2360
26441 CEFBS_FeatureTestPendingExternalInterruption, // TPEI = 2361
26442 CEFBS_None, // TPI = 2362
26443 CEFBS_None, // TPROT = 2363
26444 CEFBS_None, // TR = 2364
26445 CEFBS_None, // TRACE = 2365
26446 CEFBS_None, // TRACG = 2366
26447 CEFBS_None, // TRAP2 = 2367
26448 CEFBS_None, // TRAP4 = 2368
26449 CEFBS_None, // TRE = 2369
26450 CEFBS_None, // TROO = 2370
26451 CEFBS_None, // TROOOpt = 2371
26452 CEFBS_None, // TROT = 2372
26453 CEFBS_None, // TROTOpt = 2373
26454 CEFBS_None, // TRT = 2374
26455 CEFBS_None, // TRTE = 2375
26456 CEFBS_None, // TRTEOpt = 2376
26457 CEFBS_None, // TRTO = 2377
26458 CEFBS_None, // TRTOOpt = 2378
26459 CEFBS_None, // TRTR = 2379
26460 CEFBS_None, // TRTRE = 2380
26461 CEFBS_None, // TRTREOpt = 2381
26462 CEFBS_None, // TRTT = 2382
26463 CEFBS_None, // TRTTOpt = 2383
26464 CEFBS_None, // TS = 2384
26465 CEFBS_None, // TSCH = 2385
26466 CEFBS_None, // UNPK = 2386
26467 CEFBS_None, // UNPKA = 2387
26468 CEFBS_None, // UNPKU = 2388
26469 CEFBS_None, // UPT = 2389
26470 CEFBS_FeatureVector, // VA = 2390
26471 CEFBS_FeatureVector, // VAB = 2391
26472 CEFBS_FeatureVector, // VAC = 2392
26473 CEFBS_FeatureVector, // VACC = 2393
26474 CEFBS_FeatureVector, // VACCB = 2394
26475 CEFBS_FeatureVector, // VACCC = 2395
26476 CEFBS_FeatureVector, // VACCCQ = 2396
26477 CEFBS_FeatureVector, // VACCF = 2397
26478 CEFBS_FeatureVector, // VACCG = 2398
26479 CEFBS_FeatureVector, // VACCH = 2399
26480 CEFBS_FeatureVector, // VACCQ = 2400
26481 CEFBS_FeatureVector, // VACQ = 2401
26482 CEFBS_FeatureVector, // VAF = 2402
26483 CEFBS_FeatureVector, // VAG = 2403
26484 CEFBS_FeatureVector, // VAH = 2404
26485 CEFBS_FeatureVectorPackedDecimal, // VAP = 2405
26486 CEFBS_FeatureVector, // VAQ = 2406
26487 CEFBS_FeatureVector, // VAVG = 2407
26488 CEFBS_FeatureVector, // VAVGB = 2408
26489 CEFBS_FeatureVector, // VAVGF = 2409
26490 CEFBS_FeatureVector, // VAVGG = 2410
26491 CEFBS_FeatureVector, // VAVGH = 2411
26492 CEFBS_FeatureVector, // VAVGL = 2412
26493 CEFBS_FeatureVector, // VAVGLB = 2413
26494 CEFBS_FeatureVector, // VAVGLF = 2414
26495 CEFBS_FeatureVector, // VAVGLG = 2415
26496 CEFBS_FeatureVector, // VAVGLH = 2416
26497 CEFBS_FeatureVectorEnhancements1, // VBPERM = 2417
26498 CEFBS_FeatureVector, // VCDG = 2418
26499 CEFBS_FeatureVector, // VCDGB = 2419
26500 CEFBS_FeatureVector, // VCDLG = 2420
26501 CEFBS_FeatureVector, // VCDLGB = 2421
26502 CEFBS_FeatureVectorEnhancements2, // VCEFB = 2422
26503 CEFBS_FeatureVectorEnhancements2, // VCELFB = 2423
26504 CEFBS_FeatureVector, // VCEQ = 2424
26505 CEFBS_FeatureVector, // VCEQB = 2425
26506 CEFBS_FeatureVector, // VCEQBS = 2426
26507 CEFBS_FeatureVector, // VCEQF = 2427
26508 CEFBS_FeatureVector, // VCEQFS = 2428
26509 CEFBS_FeatureVector, // VCEQG = 2429
26510 CEFBS_FeatureVector, // VCEQGS = 2430
26511 CEFBS_FeatureVector, // VCEQH = 2431
26512 CEFBS_FeatureVector, // VCEQHS = 2432
26513 CEFBS_FeatureVectorEnhancements2, // VCFEB = 2433
26514 CEFBS_FeatureVector_FeatureNNPAssist, // VCFN = 2434
26515 CEFBS_FeatureVectorEnhancements2, // VCFPL = 2435
26516 CEFBS_FeatureVectorEnhancements2, // VCFPS = 2436
26517 CEFBS_FeatureVector, // VCGD = 2437
26518 CEFBS_FeatureVector, // VCGDB = 2438
26519 CEFBS_FeatureVector, // VCH = 2439
26520 CEFBS_FeatureVector, // VCHB = 2440
26521 CEFBS_FeatureVector, // VCHBS = 2441
26522 CEFBS_FeatureVector, // VCHF = 2442
26523 CEFBS_FeatureVector, // VCHFS = 2443
26524 CEFBS_FeatureVector, // VCHG = 2444
26525 CEFBS_FeatureVector, // VCHGS = 2445
26526 CEFBS_FeatureVector, // VCHH = 2446
26527 CEFBS_FeatureVector, // VCHHS = 2447
26528 CEFBS_FeatureVector, // VCHL = 2448
26529 CEFBS_FeatureVector, // VCHLB = 2449
26530 CEFBS_FeatureVector, // VCHLBS = 2450
26531 CEFBS_FeatureVector, // VCHLF = 2451
26532 CEFBS_FeatureVector, // VCHLFS = 2452
26533 CEFBS_FeatureVector, // VCHLG = 2453
26534 CEFBS_FeatureVector, // VCHLGS = 2454
26535 CEFBS_FeatureVector, // VCHLH = 2455
26536 CEFBS_FeatureVector, // VCHLHS = 2456
26537 CEFBS_FeatureVector, // VCKSM = 2457
26538 CEFBS_FeatureVectorEnhancements2, // VCLFEB = 2458
26539 CEFBS_FeatureVector_FeatureNNPAssist, // VCLFNH = 2459
26540 CEFBS_FeatureVector_FeatureNNPAssist, // VCLFNL = 2460
26541 CEFBS_FeatureVectorEnhancements2, // VCLFP = 2461
26542 CEFBS_FeatureVector, // VCLGD = 2462
26543 CEFBS_FeatureVector, // VCLGDB = 2463
26544 CEFBS_FeatureVector, // VCLZ = 2464
26545 CEFBS_FeatureVector, // VCLZB = 2465
26546 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VCLZDP = 2466
26547 CEFBS_FeatureVector, // VCLZF = 2467
26548 CEFBS_FeatureVector, // VCLZG = 2468
26549 CEFBS_FeatureVector, // VCLZH = 2469
26550 CEFBS_FeatureVector_FeatureNNPAssist, // VCNF = 2470
26551 CEFBS_FeatureVectorPackedDecimal, // VCP = 2471
26552 CEFBS_FeatureVector_FeatureNNPAssist, // VCRNF = 2472
26553 CEFBS_FeatureVectorEnhancements2, // VCSFP = 2473
26554 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VCSPH = 2474
26555 CEFBS_FeatureVector, // VCTZ = 2475
26556 CEFBS_FeatureVector, // VCTZB = 2476
26557 CEFBS_FeatureVector, // VCTZF = 2477
26558 CEFBS_FeatureVector, // VCTZG = 2478
26559 CEFBS_FeatureVector, // VCTZH = 2479
26560 CEFBS_FeatureVectorPackedDecimal, // VCVB = 2480
26561 CEFBS_FeatureVectorPackedDecimal, // VCVBG = 2481
26562 CEFBS_FeatureVectorPackedDecimalEnhancement, // VCVBGOpt = 2482
26563 CEFBS_FeatureVectorPackedDecimalEnhancement, // VCVBOpt = 2483
26564 CEFBS_FeatureVectorPackedDecimal, // VCVD = 2484
26565 CEFBS_FeatureVectorPackedDecimal, // VCVDG = 2485
26566 CEFBS_FeatureVectorPackedDecimal, // VDP = 2486
26567 CEFBS_FeatureVector, // VEC = 2487
26568 CEFBS_FeatureVector, // VECB = 2488
26569 CEFBS_FeatureVector, // VECF = 2489
26570 CEFBS_FeatureVector, // VECG = 2490
26571 CEFBS_FeatureVector, // VECH = 2491
26572 CEFBS_FeatureVector, // VECL = 2492
26573 CEFBS_FeatureVector, // VECLB = 2493
26574 CEFBS_FeatureVector, // VECLF = 2494
26575 CEFBS_FeatureVector, // VECLG = 2495
26576 CEFBS_FeatureVector, // VECLH = 2496
26577 CEFBS_FeatureVector, // VERIM = 2497
26578 CEFBS_FeatureVector, // VERIMB = 2498
26579 CEFBS_FeatureVector, // VERIMF = 2499
26580 CEFBS_FeatureVector, // VERIMG = 2500
26581 CEFBS_FeatureVector, // VERIMH = 2501
26582 CEFBS_FeatureVector, // VERLL = 2502
26583 CEFBS_FeatureVector, // VERLLB = 2503
26584 CEFBS_FeatureVector, // VERLLF = 2504
26585 CEFBS_FeatureVector, // VERLLG = 2505
26586 CEFBS_FeatureVector, // VERLLH = 2506
26587 CEFBS_FeatureVector, // VERLLV = 2507
26588 CEFBS_FeatureVector, // VERLLVB = 2508
26589 CEFBS_FeatureVector, // VERLLVF = 2509
26590 CEFBS_FeatureVector, // VERLLVG = 2510
26591 CEFBS_FeatureVector, // VERLLVH = 2511
26592 CEFBS_FeatureVector, // VESL = 2512
26593 CEFBS_FeatureVector, // VESLB = 2513
26594 CEFBS_FeatureVector, // VESLF = 2514
26595 CEFBS_FeatureVector, // VESLG = 2515
26596 CEFBS_FeatureVector, // VESLH = 2516
26597 CEFBS_FeatureVector, // VESLV = 2517
26598 CEFBS_FeatureVector, // VESLVB = 2518
26599 CEFBS_FeatureVector, // VESLVF = 2519
26600 CEFBS_FeatureVector, // VESLVG = 2520
26601 CEFBS_FeatureVector, // VESLVH = 2521
26602 CEFBS_FeatureVector, // VESRA = 2522
26603 CEFBS_FeatureVector, // VESRAB = 2523
26604 CEFBS_FeatureVector, // VESRAF = 2524
26605 CEFBS_FeatureVector, // VESRAG = 2525
26606 CEFBS_FeatureVector, // VESRAH = 2526
26607 CEFBS_FeatureVector, // VESRAV = 2527
26608 CEFBS_FeatureVector, // VESRAVB = 2528
26609 CEFBS_FeatureVector, // VESRAVF = 2529
26610 CEFBS_FeatureVector, // VESRAVG = 2530
26611 CEFBS_FeatureVector, // VESRAVH = 2531
26612 CEFBS_FeatureVector, // VESRL = 2532
26613 CEFBS_FeatureVector, // VESRLB = 2533
26614 CEFBS_FeatureVector, // VESRLF = 2534
26615 CEFBS_FeatureVector, // VESRLG = 2535
26616 CEFBS_FeatureVector, // VESRLH = 2536
26617 CEFBS_FeatureVector, // VESRLV = 2537
26618 CEFBS_FeatureVector, // VESRLVB = 2538
26619 CEFBS_FeatureVector, // VESRLVF = 2539
26620 CEFBS_FeatureVector, // VESRLVG = 2540
26621 CEFBS_FeatureVector, // VESRLVH = 2541
26622 CEFBS_FeatureVector, // VFA = 2542
26623 CEFBS_FeatureVector, // VFADB = 2543
26624 CEFBS_FeatureVector, // VFAE = 2544
26625 CEFBS_FeatureVector, // VFAEB = 2545
26626 CEFBS_FeatureVector, // VFAEBS = 2546
26627 CEFBS_FeatureVector, // VFAEF = 2547
26628 CEFBS_FeatureVector, // VFAEFS = 2548
26629 CEFBS_FeatureVector, // VFAEH = 2549
26630 CEFBS_FeatureVector, // VFAEHS = 2550
26631 CEFBS_FeatureVector, // VFAEZB = 2551
26632 CEFBS_FeatureVector, // VFAEZBS = 2552
26633 CEFBS_FeatureVector, // VFAEZF = 2553
26634 CEFBS_FeatureVector, // VFAEZFS = 2554
26635 CEFBS_FeatureVector, // VFAEZH = 2555
26636 CEFBS_FeatureVector, // VFAEZHS = 2556
26637 CEFBS_FeatureVectorEnhancements1, // VFASB = 2557
26638 CEFBS_FeatureVector, // VFCE = 2558
26639 CEFBS_FeatureVector, // VFCEDB = 2559
26640 CEFBS_FeatureVector, // VFCEDBS = 2560
26641 CEFBS_FeatureVectorEnhancements1, // VFCESB = 2561
26642 CEFBS_FeatureVectorEnhancements1, // VFCESBS = 2562
26643 CEFBS_FeatureVector, // VFCH = 2563
26644 CEFBS_FeatureVector, // VFCHDB = 2564
26645 CEFBS_FeatureVector, // VFCHDBS = 2565
26646 CEFBS_FeatureVector, // VFCHE = 2566
26647 CEFBS_FeatureVector, // VFCHEDB = 2567
26648 CEFBS_FeatureVector, // VFCHEDBS = 2568
26649 CEFBS_FeatureVectorEnhancements1, // VFCHESB = 2569
26650 CEFBS_FeatureVectorEnhancements1, // VFCHESBS = 2570
26651 CEFBS_FeatureVectorEnhancements1, // VFCHSB = 2571
26652 CEFBS_FeatureVectorEnhancements1, // VFCHSBS = 2572
26653 CEFBS_FeatureVector, // VFD = 2573
26654 CEFBS_FeatureVector, // VFDDB = 2574
26655 CEFBS_FeatureVectorEnhancements1, // VFDSB = 2575
26656 CEFBS_FeatureVector, // VFEE = 2576
26657 CEFBS_FeatureVector, // VFEEB = 2577
26658 CEFBS_FeatureVector, // VFEEBS = 2578
26659 CEFBS_FeatureVector, // VFEEF = 2579
26660 CEFBS_FeatureVector, // VFEEFS = 2580
26661 CEFBS_FeatureVector, // VFEEH = 2581
26662 CEFBS_FeatureVector, // VFEEHS = 2582
26663 CEFBS_FeatureVector, // VFEEZB = 2583
26664 CEFBS_FeatureVector, // VFEEZBS = 2584
26665 CEFBS_FeatureVector, // VFEEZF = 2585
26666 CEFBS_FeatureVector, // VFEEZFS = 2586
26667 CEFBS_FeatureVector, // VFEEZH = 2587
26668 CEFBS_FeatureVector, // VFEEZHS = 2588
26669 CEFBS_FeatureVector, // VFENE = 2589
26670 CEFBS_FeatureVector, // VFENEB = 2590
26671 CEFBS_FeatureVector, // VFENEBS = 2591
26672 CEFBS_FeatureVector, // VFENEF = 2592
26673 CEFBS_FeatureVector, // VFENEFS = 2593
26674 CEFBS_FeatureVector, // VFENEH = 2594
26675 CEFBS_FeatureVector, // VFENEHS = 2595
26676 CEFBS_FeatureVector, // VFENEZB = 2596
26677 CEFBS_FeatureVector, // VFENEZBS = 2597
26678 CEFBS_FeatureVector, // VFENEZF = 2598
26679 CEFBS_FeatureVector, // VFENEZFS = 2599
26680 CEFBS_FeatureVector, // VFENEZH = 2600
26681 CEFBS_FeatureVector, // VFENEZHS = 2601
26682 CEFBS_FeatureVector, // VFI = 2602
26683 CEFBS_FeatureVector, // VFIDB = 2603
26684 CEFBS_FeatureVectorEnhancements1, // VFISB = 2604
26685 CEFBS_FeatureVectorEnhancements1, // VFKEDB = 2605
26686 CEFBS_FeatureVectorEnhancements1, // VFKEDBS = 2606
26687 CEFBS_FeatureVectorEnhancements1, // VFKESB = 2607
26688 CEFBS_FeatureVectorEnhancements1, // VFKESBS = 2608
26689 CEFBS_FeatureVectorEnhancements1, // VFKHDB = 2609
26690 CEFBS_FeatureVectorEnhancements1, // VFKHDBS = 2610
26691 CEFBS_FeatureVectorEnhancements1, // VFKHEDB = 2611
26692 CEFBS_FeatureVectorEnhancements1, // VFKHEDBS = 2612
26693 CEFBS_FeatureVectorEnhancements1, // VFKHESB = 2613
26694 CEFBS_FeatureVectorEnhancements1, // VFKHESBS = 2614
26695 CEFBS_FeatureVectorEnhancements1, // VFKHSB = 2615
26696 CEFBS_FeatureVectorEnhancements1, // VFKHSBS = 2616
26697 CEFBS_FeatureVector, // VFLCDB = 2617
26698 CEFBS_FeatureVectorEnhancements1, // VFLCSB = 2618
26699 CEFBS_FeatureVectorEnhancements1, // VFLL = 2619
26700 CEFBS_FeatureVectorEnhancements1, // VFLLS = 2620
26701 CEFBS_FeatureVector, // VFLNDB = 2621
26702 CEFBS_FeatureVectorEnhancements1, // VFLNSB = 2622
26703 CEFBS_FeatureVector, // VFLPDB = 2623
26704 CEFBS_FeatureVectorEnhancements1, // VFLPSB = 2624
26705 CEFBS_FeatureVectorEnhancements1, // VFLR = 2625
26706 CEFBS_FeatureVectorEnhancements1, // VFLRD = 2626
26707 CEFBS_FeatureVector, // VFM = 2627
26708 CEFBS_FeatureVector, // VFMA = 2628
26709 CEFBS_FeatureVector, // VFMADB = 2629
26710 CEFBS_FeatureVectorEnhancements1, // VFMASB = 2630
26711 CEFBS_FeatureVectorEnhancements1, // VFMAX = 2631
26712 CEFBS_FeatureVectorEnhancements1, // VFMAXDB = 2632
26713 CEFBS_FeatureVectorEnhancements1, // VFMAXSB = 2633
26714 CEFBS_FeatureVector, // VFMDB = 2634
26715 CEFBS_FeatureVectorEnhancements1, // VFMIN = 2635
26716 CEFBS_FeatureVectorEnhancements1, // VFMINDB = 2636
26717 CEFBS_FeatureVectorEnhancements1, // VFMINSB = 2637
26718 CEFBS_FeatureVector, // VFMS = 2638
26719 CEFBS_FeatureVectorEnhancements1, // VFMSB = 2639
26720 CEFBS_FeatureVector, // VFMSDB = 2640
26721 CEFBS_FeatureVectorEnhancements1, // VFMSSB = 2641
26722 CEFBS_FeatureVectorEnhancements1, // VFNMA = 2642
26723 CEFBS_FeatureVectorEnhancements1, // VFNMADB = 2643
26724 CEFBS_FeatureVectorEnhancements1, // VFNMASB = 2644
26725 CEFBS_FeatureVectorEnhancements1, // VFNMS = 2645
26726 CEFBS_FeatureVectorEnhancements1, // VFNMSDB = 2646
26727 CEFBS_FeatureVectorEnhancements1, // VFNMSSB = 2647
26728 CEFBS_FeatureVector, // VFPSO = 2648
26729 CEFBS_FeatureVector, // VFPSODB = 2649
26730 CEFBS_FeatureVectorEnhancements1, // VFPSOSB = 2650
26731 CEFBS_FeatureVector, // VFS = 2651
26732 CEFBS_FeatureVector, // VFSDB = 2652
26733 CEFBS_FeatureVector, // VFSQ = 2653
26734 CEFBS_FeatureVector, // VFSQDB = 2654
26735 CEFBS_FeatureVectorEnhancements1, // VFSQSB = 2655
26736 CEFBS_FeatureVectorEnhancements1, // VFSSB = 2656
26737 CEFBS_FeatureVector, // VFTCI = 2657
26738 CEFBS_FeatureVector, // VFTCIDB = 2658
26739 CEFBS_FeatureVectorEnhancements1, // VFTCISB = 2659
26740 CEFBS_FeatureVector, // VGBM = 2660
26741 CEFBS_FeatureVector, // VGEF = 2661
26742 CEFBS_FeatureVector, // VGEG = 2662
26743 CEFBS_FeatureVector, // VGFM = 2663
26744 CEFBS_FeatureVector, // VGFMA = 2664
26745 CEFBS_FeatureVector, // VGFMAB = 2665
26746 CEFBS_FeatureVector, // VGFMAF = 2666
26747 CEFBS_FeatureVector, // VGFMAG = 2667
26748 CEFBS_FeatureVector, // VGFMAH = 2668
26749 CEFBS_FeatureVector, // VGFMB = 2669
26750 CEFBS_FeatureVector, // VGFMF = 2670
26751 CEFBS_FeatureVector, // VGFMG = 2671
26752 CEFBS_FeatureVector, // VGFMH = 2672
26753 CEFBS_FeatureVector, // VGM = 2673
26754 CEFBS_FeatureVector, // VGMB = 2674
26755 CEFBS_FeatureVector, // VGMF = 2675
26756 CEFBS_FeatureVector, // VGMG = 2676
26757 CEFBS_FeatureVector, // VGMH = 2677
26758 CEFBS_FeatureVector, // VISTR = 2678
26759 CEFBS_FeatureVector, // VISTRB = 2679
26760 CEFBS_FeatureVector, // VISTRBS = 2680
26761 CEFBS_FeatureVector, // VISTRF = 2681
26762 CEFBS_FeatureVector, // VISTRFS = 2682
26763 CEFBS_FeatureVector, // VISTRH = 2683
26764 CEFBS_FeatureVector, // VISTRHS = 2684
26765 CEFBS_FeatureVector, // VL = 2685
26766 CEFBS_FeatureVector, // VLAlign = 2686
26767 CEFBS_FeatureVector, // VLBB = 2687
26768 CEFBS_FeatureVectorEnhancements2, // VLBR = 2688
26769 CEFBS_FeatureVectorEnhancements2, // VLBRF = 2689
26770 CEFBS_FeatureVectorEnhancements2, // VLBRG = 2690
26771 CEFBS_FeatureVectorEnhancements2, // VLBRH = 2691
26772 CEFBS_FeatureVectorEnhancements2, // VLBRQ = 2692
26773 CEFBS_FeatureVectorEnhancements2, // VLBRREP = 2693
26774 CEFBS_FeatureVectorEnhancements2, // VLBRREPF = 2694
26775 CEFBS_FeatureVectorEnhancements2, // VLBRREPG = 2695
26776 CEFBS_FeatureVectorEnhancements2, // VLBRREPH = 2696
26777 CEFBS_FeatureVector, // VLC = 2697
26778 CEFBS_FeatureVector, // VLCB = 2698
26779 CEFBS_FeatureVector, // VLCF = 2699
26780 CEFBS_FeatureVector, // VLCG = 2700
26781 CEFBS_FeatureVector, // VLCH = 2701
26782 CEFBS_FeatureVector, // VLDE = 2702
26783 CEFBS_FeatureVector, // VLDEB = 2703
26784 CEFBS_FeatureVector, // VLEB = 2704
26785 CEFBS_FeatureVectorEnhancements2, // VLEBRF = 2705
26786 CEFBS_FeatureVectorEnhancements2, // VLEBRG = 2706
26787 CEFBS_FeatureVectorEnhancements2, // VLEBRH = 2707
26788 CEFBS_FeatureVector, // VLED = 2708
26789 CEFBS_FeatureVector, // VLEDB = 2709
26790 CEFBS_FeatureVector, // VLEF = 2710
26791 CEFBS_FeatureVector, // VLEG = 2711
26792 CEFBS_FeatureVector, // VLEH = 2712
26793 CEFBS_FeatureVector, // VLEIB = 2713
26794 CEFBS_FeatureVector, // VLEIF = 2714
26795 CEFBS_FeatureVector, // VLEIG = 2715
26796 CEFBS_FeatureVector, // VLEIH = 2716
26797 CEFBS_FeatureVectorEnhancements2, // VLER = 2717
26798 CEFBS_FeatureVectorEnhancements2, // VLERF = 2718
26799 CEFBS_FeatureVectorEnhancements2, // VLERG = 2719
26800 CEFBS_FeatureVectorEnhancements2, // VLERH = 2720
26801 CEFBS_FeatureVector, // VLGV = 2721
26802 CEFBS_FeatureVector, // VLGVB = 2722
26803 CEFBS_FeatureVector, // VLGVF = 2723
26804 CEFBS_FeatureVector, // VLGVG = 2724
26805 CEFBS_FeatureVector, // VLGVH = 2725
26806 CEFBS_FeatureVectorPackedDecimal, // VLIP = 2726
26807 CEFBS_FeatureVector, // VLL = 2727
26808 CEFBS_FeatureVectorEnhancements2, // VLLEBRZ = 2728
26809 CEFBS_FeatureVectorEnhancements2, // VLLEBRZE = 2729
26810 CEFBS_FeatureVectorEnhancements2, // VLLEBRZF = 2730
26811 CEFBS_FeatureVectorEnhancements2, // VLLEBRZG = 2731
26812 CEFBS_FeatureVectorEnhancements2, // VLLEBRZH = 2732
26813 CEFBS_FeatureVector, // VLLEZ = 2733
26814 CEFBS_FeatureVector, // VLLEZB = 2734
26815 CEFBS_FeatureVector, // VLLEZF = 2735
26816 CEFBS_FeatureVector, // VLLEZG = 2736
26817 CEFBS_FeatureVector, // VLLEZH = 2737
26818 CEFBS_FeatureVectorEnhancements1, // VLLEZLF = 2738
26819 CEFBS_FeatureVector, // VLM = 2739
26820 CEFBS_FeatureVector, // VLMAlign = 2740
26821 CEFBS_FeatureVector, // VLP = 2741
26822 CEFBS_FeatureVector, // VLPB = 2742
26823 CEFBS_FeatureVector, // VLPF = 2743
26824 CEFBS_FeatureVector, // VLPG = 2744
26825 CEFBS_FeatureVector, // VLPH = 2745
26826 CEFBS_FeatureVector, // VLR = 2746
26827 CEFBS_FeatureVector, // VLREP = 2747
26828 CEFBS_FeatureVector, // VLREPB = 2748
26829 CEFBS_FeatureVector, // VLREPF = 2749
26830 CEFBS_FeatureVector, // VLREPG = 2750
26831 CEFBS_FeatureVector, // VLREPH = 2751
26832 CEFBS_FeatureVectorPackedDecimal, // VLRL = 2752
26833 CEFBS_FeatureVectorPackedDecimal, // VLRLR = 2753
26834 CEFBS_FeatureVector, // VLVG = 2754
26835 CEFBS_FeatureVector, // VLVGB = 2755
26836 CEFBS_FeatureVector, // VLVGF = 2756
26837 CEFBS_FeatureVector, // VLVGG = 2757
26838 CEFBS_FeatureVector, // VLVGH = 2758
26839 CEFBS_FeatureVector, // VLVGP = 2759
26840 CEFBS_FeatureVector, // VMAE = 2760
26841 CEFBS_FeatureVector, // VMAEB = 2761
26842 CEFBS_FeatureVector, // VMAEF = 2762
26843 CEFBS_FeatureVector, // VMAEH = 2763
26844 CEFBS_FeatureVector, // VMAH = 2764
26845 CEFBS_FeatureVector, // VMAHB = 2765
26846 CEFBS_FeatureVector, // VMAHF = 2766
26847 CEFBS_FeatureVector, // VMAHH = 2767
26848 CEFBS_FeatureVector, // VMAL = 2768
26849 CEFBS_FeatureVector, // VMALB = 2769
26850 CEFBS_FeatureVector, // VMALE = 2770
26851 CEFBS_FeatureVector, // VMALEB = 2771
26852 CEFBS_FeatureVector, // VMALEF = 2772
26853 CEFBS_FeatureVector, // VMALEH = 2773
26854 CEFBS_FeatureVector, // VMALF = 2774
26855 CEFBS_FeatureVector, // VMALH = 2775
26856 CEFBS_FeatureVector, // VMALHB = 2776
26857 CEFBS_FeatureVector, // VMALHF = 2777
26858 CEFBS_FeatureVector, // VMALHH = 2778
26859 CEFBS_FeatureVector, // VMALHW = 2779
26860 CEFBS_FeatureVector, // VMALO = 2780
26861 CEFBS_FeatureVector, // VMALOB = 2781
26862 CEFBS_FeatureVector, // VMALOF = 2782
26863 CEFBS_FeatureVector, // VMALOH = 2783
26864 CEFBS_FeatureVector, // VMAO = 2784
26865 CEFBS_FeatureVector, // VMAOB = 2785
26866 CEFBS_FeatureVector, // VMAOF = 2786
26867 CEFBS_FeatureVector, // VMAOH = 2787
26868 CEFBS_FeatureVector, // VME = 2788
26869 CEFBS_FeatureVector, // VMEB = 2789
26870 CEFBS_FeatureVector, // VMEF = 2790
26871 CEFBS_FeatureVector, // VMEH = 2791
26872 CEFBS_FeatureVector, // VMH = 2792
26873 CEFBS_FeatureVector, // VMHB = 2793
26874 CEFBS_FeatureVector, // VMHF = 2794
26875 CEFBS_FeatureVector, // VMHH = 2795
26876 CEFBS_FeatureVector, // VML = 2796
26877 CEFBS_FeatureVector, // VMLB = 2797
26878 CEFBS_FeatureVector, // VMLE = 2798
26879 CEFBS_FeatureVector, // VMLEB = 2799
26880 CEFBS_FeatureVector, // VMLEF = 2800
26881 CEFBS_FeatureVector, // VMLEH = 2801
26882 CEFBS_FeatureVector, // VMLF = 2802
26883 CEFBS_FeatureVector, // VMLH = 2803
26884 CEFBS_FeatureVector, // VMLHB = 2804
26885 CEFBS_FeatureVector, // VMLHF = 2805
26886 CEFBS_FeatureVector, // VMLHH = 2806
26887 CEFBS_FeatureVector, // VMLHW = 2807
26888 CEFBS_FeatureVector, // VMLO = 2808
26889 CEFBS_FeatureVector, // VMLOB = 2809
26890 CEFBS_FeatureVector, // VMLOF = 2810
26891 CEFBS_FeatureVector, // VMLOH = 2811
26892 CEFBS_FeatureVector, // VMN = 2812
26893 CEFBS_FeatureVector, // VMNB = 2813
26894 CEFBS_FeatureVector, // VMNF = 2814
26895 CEFBS_FeatureVector, // VMNG = 2815
26896 CEFBS_FeatureVector, // VMNH = 2816
26897 CEFBS_FeatureVector, // VMNL = 2817
26898 CEFBS_FeatureVector, // VMNLB = 2818
26899 CEFBS_FeatureVector, // VMNLF = 2819
26900 CEFBS_FeatureVector, // VMNLG = 2820
26901 CEFBS_FeatureVector, // VMNLH = 2821
26902 CEFBS_FeatureVector, // VMO = 2822
26903 CEFBS_FeatureVector, // VMOB = 2823
26904 CEFBS_FeatureVector, // VMOF = 2824
26905 CEFBS_FeatureVector, // VMOH = 2825
26906 CEFBS_FeatureVectorPackedDecimal, // VMP = 2826
26907 CEFBS_FeatureVector, // VMRH = 2827
26908 CEFBS_FeatureVector, // VMRHB = 2828
26909 CEFBS_FeatureVector, // VMRHF = 2829
26910 CEFBS_FeatureVector, // VMRHG = 2830
26911 CEFBS_FeatureVector, // VMRHH = 2831
26912 CEFBS_FeatureVector, // VMRL = 2832
26913 CEFBS_FeatureVector, // VMRLB = 2833
26914 CEFBS_FeatureVector, // VMRLF = 2834
26915 CEFBS_FeatureVector, // VMRLG = 2835
26916 CEFBS_FeatureVector, // VMRLH = 2836
26917 CEFBS_FeatureVectorEnhancements1, // VMSL = 2837
26918 CEFBS_FeatureVectorEnhancements1, // VMSLG = 2838
26919 CEFBS_FeatureVectorPackedDecimal, // VMSP = 2839
26920 CEFBS_FeatureVector, // VMX = 2840
26921 CEFBS_FeatureVector, // VMXB = 2841
26922 CEFBS_FeatureVector, // VMXF = 2842
26923 CEFBS_FeatureVector, // VMXG = 2843
26924 CEFBS_FeatureVector, // VMXH = 2844
26925 CEFBS_FeatureVector, // VMXL = 2845
26926 CEFBS_FeatureVector, // VMXLB = 2846
26927 CEFBS_FeatureVector, // VMXLF = 2847
26928 CEFBS_FeatureVector, // VMXLG = 2848
26929 CEFBS_FeatureVector, // VMXLH = 2849
26930 CEFBS_FeatureVector, // VN = 2850
26931 CEFBS_FeatureVector, // VNC = 2851
26932 CEFBS_FeatureVectorEnhancements1, // VNN = 2852
26933 CEFBS_FeatureVector, // VNO = 2853
26934 CEFBS_FeatureVectorEnhancements1, // VNX = 2854
26935 CEFBS_FeatureVector, // VO = 2855
26936 CEFBS_FeatureVectorEnhancements1, // VOC = 2856
26937 CEFBS_FeatureVector, // VONE = 2857
26938 CEFBS_FeatureVector, // VPDI = 2858
26939 CEFBS_FeatureVector, // VPERM = 2859
26940 CEFBS_FeatureVector, // VPK = 2860
26941 CEFBS_FeatureVector, // VPKF = 2861
26942 CEFBS_FeatureVector, // VPKG = 2862
26943 CEFBS_FeatureVector, // VPKH = 2863
26944 CEFBS_FeatureVector, // VPKLS = 2864
26945 CEFBS_FeatureVector, // VPKLSF = 2865
26946 CEFBS_FeatureVector, // VPKLSFS = 2866
26947 CEFBS_FeatureVector, // VPKLSG = 2867
26948 CEFBS_FeatureVector, // VPKLSGS = 2868
26949 CEFBS_FeatureVector, // VPKLSH = 2869
26950 CEFBS_FeatureVector, // VPKLSHS = 2870
26951 CEFBS_FeatureVector, // VPKS = 2871
26952 CEFBS_FeatureVector, // VPKSF = 2872
26953 CEFBS_FeatureVector, // VPKSFS = 2873
26954 CEFBS_FeatureVector, // VPKSG = 2874
26955 CEFBS_FeatureVector, // VPKSGS = 2875
26956 CEFBS_FeatureVector, // VPKSH = 2876
26957 CEFBS_FeatureVector, // VPKSHS = 2877
26958 CEFBS_FeatureVectorPackedDecimal, // VPKZ = 2878
26959 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VPKZR = 2879
26960 CEFBS_FeatureVector, // VPOPCT = 2880
26961 CEFBS_FeatureVectorEnhancements1, // VPOPCTB = 2881
26962 CEFBS_FeatureVectorEnhancements1, // VPOPCTF = 2882
26963 CEFBS_FeatureVectorEnhancements1, // VPOPCTG = 2883
26964 CEFBS_FeatureVectorEnhancements1, // VPOPCTH = 2884
26965 CEFBS_FeatureVectorPackedDecimal, // VPSOP = 2885
26966 CEFBS_FeatureVector, // VREP = 2886
26967 CEFBS_FeatureVector, // VREPB = 2887
26968 CEFBS_FeatureVector, // VREPF = 2888
26969 CEFBS_FeatureVector, // VREPG = 2889
26970 CEFBS_FeatureVector, // VREPH = 2890
26971 CEFBS_FeatureVector, // VREPI = 2891
26972 CEFBS_FeatureVector, // VREPIB = 2892
26973 CEFBS_FeatureVector, // VREPIF = 2893
26974 CEFBS_FeatureVector, // VREPIG = 2894
26975 CEFBS_FeatureVector, // VREPIH = 2895
26976 CEFBS_FeatureVectorPackedDecimal, // VRP = 2896
26977 CEFBS_FeatureVector, // VS = 2897
26978 CEFBS_FeatureVector, // VSB = 2898
26979 CEFBS_FeatureVector, // VSBCBI = 2899
26980 CEFBS_FeatureVector, // VSBCBIQ = 2900
26981 CEFBS_FeatureVector, // VSBI = 2901
26982 CEFBS_FeatureVector, // VSBIQ = 2902
26983 CEFBS_FeatureVector, // VSCBI = 2903
26984 CEFBS_FeatureVector, // VSCBIB = 2904
26985 CEFBS_FeatureVector, // VSCBIF = 2905
26986 CEFBS_FeatureVector, // VSCBIG = 2906
26987 CEFBS_FeatureVector, // VSCBIH = 2907
26988 CEFBS_FeatureVector, // VSCBIQ = 2908
26989 CEFBS_FeatureVector, // VSCEF = 2909
26990 CEFBS_FeatureVector, // VSCEG = 2910
26991 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSCHDP = 2911
26992 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSCHP = 2912
26993 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSCHSP = 2913
26994 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSCHXP = 2914
26995 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSCSHP = 2915
26996 CEFBS_FeatureVectorPackedDecimal, // VSDP = 2916
26997 CEFBS_FeatureVector, // VSEG = 2917
26998 CEFBS_FeatureVector, // VSEGB = 2918
26999 CEFBS_FeatureVector, // VSEGF = 2919
27000 CEFBS_FeatureVector, // VSEGH = 2920
27001 CEFBS_FeatureVector, // VSEL = 2921
27002 CEFBS_FeatureVector, // VSF = 2922
27003 CEFBS_FeatureVector, // VSG = 2923
27004 CEFBS_FeatureVector, // VSH = 2924
27005 CEFBS_FeatureVector, // VSL = 2925
27006 CEFBS_FeatureVector, // VSLB = 2926
27007 CEFBS_FeatureVectorEnhancements2, // VSLD = 2927
27008 CEFBS_FeatureVector, // VSLDB = 2928
27009 CEFBS_FeatureVectorPackedDecimal, // VSP = 2929
27010 CEFBS_FeatureVector, // VSQ = 2930
27011 CEFBS_FeatureVector, // VSRA = 2931
27012 CEFBS_FeatureVector, // VSRAB = 2932
27013 CEFBS_FeatureVectorEnhancements2, // VSRD = 2933
27014 CEFBS_FeatureVector, // VSRL = 2934
27015 CEFBS_FeatureVector, // VSRLB = 2935
27016 CEFBS_FeatureVectorPackedDecimal, // VSRP = 2936
27017 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VSRPR = 2937
27018 CEFBS_FeatureVector, // VST = 2938
27019 CEFBS_FeatureVector, // VSTAlign = 2939
27020 CEFBS_FeatureVectorEnhancements2, // VSTBR = 2940
27021 CEFBS_FeatureVectorEnhancements2, // VSTBRF = 2941
27022 CEFBS_FeatureVectorEnhancements2, // VSTBRG = 2942
27023 CEFBS_FeatureVectorEnhancements2, // VSTBRH = 2943
27024 CEFBS_FeatureVectorEnhancements2, // VSTBRQ = 2944
27025 CEFBS_FeatureVector, // VSTEB = 2945
27026 CEFBS_FeatureVectorEnhancements2, // VSTEBRF = 2946
27027 CEFBS_FeatureVectorEnhancements2, // VSTEBRG = 2947
27028 CEFBS_FeatureVectorEnhancements2, // VSTEBRH = 2948
27029 CEFBS_FeatureVector, // VSTEF = 2949
27030 CEFBS_FeatureVector, // VSTEG = 2950
27031 CEFBS_FeatureVector, // VSTEH = 2951
27032 CEFBS_FeatureVectorEnhancements2, // VSTER = 2952
27033 CEFBS_FeatureVectorEnhancements2, // VSTERF = 2953
27034 CEFBS_FeatureVectorEnhancements2, // VSTERG = 2954
27035 CEFBS_FeatureVectorEnhancements2, // VSTERH = 2955
27036 CEFBS_FeatureVector, // VSTL = 2956
27037 CEFBS_FeatureVector, // VSTM = 2957
27038 CEFBS_FeatureVector, // VSTMAlign = 2958
27039 CEFBS_FeatureVector, // VSTRC = 2959
27040 CEFBS_FeatureVector, // VSTRCB = 2960
27041 CEFBS_FeatureVector, // VSTRCBS = 2961
27042 CEFBS_FeatureVector, // VSTRCF = 2962
27043 CEFBS_FeatureVector, // VSTRCFS = 2963
27044 CEFBS_FeatureVector, // VSTRCH = 2964
27045 CEFBS_FeatureVector, // VSTRCHS = 2965
27046 CEFBS_FeatureVector, // VSTRCZB = 2966
27047 CEFBS_FeatureVector, // VSTRCZBS = 2967
27048 CEFBS_FeatureVector, // VSTRCZF = 2968
27049 CEFBS_FeatureVector, // VSTRCZFS = 2969
27050 CEFBS_FeatureVector, // VSTRCZH = 2970
27051 CEFBS_FeatureVector, // VSTRCZHS = 2971
27052 CEFBS_FeatureVectorPackedDecimal, // VSTRL = 2972
27053 CEFBS_FeatureVectorPackedDecimal, // VSTRLR = 2973
27054 CEFBS_FeatureVectorEnhancements2, // VSTRS = 2974
27055 CEFBS_FeatureVectorEnhancements2, // VSTRSB = 2975
27056 CEFBS_FeatureVectorEnhancements2, // VSTRSF = 2976
27057 CEFBS_FeatureVectorEnhancements2, // VSTRSH = 2977
27058 CEFBS_FeatureVectorEnhancements2, // VSTRSZB = 2978
27059 CEFBS_FeatureVectorEnhancements2, // VSTRSZF = 2979
27060 CEFBS_FeatureVectorEnhancements2, // VSTRSZH = 2980
27061 CEFBS_FeatureVector, // VSUM = 2981
27062 CEFBS_FeatureVector, // VSUMB = 2982
27063 CEFBS_FeatureVector, // VSUMG = 2983
27064 CEFBS_FeatureVector, // VSUMGF = 2984
27065 CEFBS_FeatureVector, // VSUMGH = 2985
27066 CEFBS_FeatureVector, // VSUMH = 2986
27067 CEFBS_FeatureVector, // VSUMQ = 2987
27068 CEFBS_FeatureVector, // VSUMQF = 2988
27069 CEFBS_FeatureVector, // VSUMQG = 2989
27070 CEFBS_FeatureVector, // VTM = 2990
27071 CEFBS_FeatureVectorPackedDecimal, // VTP = 2991
27072 CEFBS_FeatureVector, // VUPH = 2992
27073 CEFBS_FeatureVector, // VUPHB = 2993
27074 CEFBS_FeatureVector, // VUPHF = 2994
27075 CEFBS_FeatureVector, // VUPHH = 2995
27076 CEFBS_FeatureVectorPackedDecimal, // VUPKZ = 2996
27077 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VUPKZH = 2997
27078 CEFBS_FeatureVectorPackedDecimalEnhancement2, // VUPKZL = 2998
27079 CEFBS_FeatureVector, // VUPL = 2999
27080 CEFBS_FeatureVector, // VUPLB = 3000
27081 CEFBS_FeatureVector, // VUPLF = 3001
27082 CEFBS_FeatureVector, // VUPLH = 3002
27083 CEFBS_FeatureVector, // VUPLHB = 3003
27084 CEFBS_FeatureVector, // VUPLHF = 3004
27085 CEFBS_FeatureVector, // VUPLHH = 3005
27086 CEFBS_FeatureVector, // VUPLHW = 3006
27087 CEFBS_FeatureVector, // VUPLL = 3007
27088 CEFBS_FeatureVector, // VUPLLB = 3008
27089 CEFBS_FeatureVector, // VUPLLF = 3009
27090 CEFBS_FeatureVector, // VUPLLH = 3010
27091 CEFBS_FeatureVector, // VX = 3011
27092 CEFBS_FeatureVector, // VZERO = 3012
27093 CEFBS_FeatureVector, // WCDGB = 3013
27094 CEFBS_FeatureVector, // WCDLGB = 3014
27095 CEFBS_FeatureVectorEnhancements2, // WCEFB = 3015
27096 CEFBS_FeatureVectorEnhancements2, // WCELFB = 3016
27097 CEFBS_FeatureVectorEnhancements2, // WCFEB = 3017
27098 CEFBS_FeatureVector, // WCGDB = 3018
27099 CEFBS_FeatureVectorEnhancements2, // WCLFEB = 3019
27100 CEFBS_FeatureVector, // WCLGDB = 3020
27101 CEFBS_FeatureVector, // WFADB = 3021
27102 CEFBS_FeatureVectorEnhancements1, // WFASB = 3022
27103 CEFBS_FeatureVectorEnhancements1, // WFAXB = 3023
27104 CEFBS_FeatureVector, // WFC = 3024
27105 CEFBS_FeatureVector, // WFCDB = 3025
27106 CEFBS_FeatureVector, // WFCEDB = 3026
27107 CEFBS_FeatureVector, // WFCEDBS = 3027
27108 CEFBS_FeatureVectorEnhancements1, // WFCESB = 3028
27109 CEFBS_FeatureVectorEnhancements1, // WFCESBS = 3029
27110 CEFBS_FeatureVectorEnhancements1, // WFCEXB = 3030
27111 CEFBS_FeatureVectorEnhancements1, // WFCEXBS = 3031
27112 CEFBS_FeatureVector, // WFCHDB = 3032
27113 CEFBS_FeatureVector, // WFCHDBS = 3033
27114 CEFBS_FeatureVector, // WFCHEDB = 3034
27115 CEFBS_FeatureVector, // WFCHEDBS = 3035
27116 CEFBS_FeatureVectorEnhancements1, // WFCHESB = 3036
27117 CEFBS_FeatureVectorEnhancements1, // WFCHESBS = 3037
27118 CEFBS_FeatureVectorEnhancements1, // WFCHEXB = 3038
27119 CEFBS_FeatureVectorEnhancements1, // WFCHEXBS = 3039
27120 CEFBS_FeatureVectorEnhancements1, // WFCHSB = 3040
27121 CEFBS_FeatureVectorEnhancements1, // WFCHSBS = 3041
27122 CEFBS_FeatureVectorEnhancements1, // WFCHXB = 3042
27123 CEFBS_FeatureVectorEnhancements1, // WFCHXBS = 3043
27124 CEFBS_FeatureVectorEnhancements1, // WFCSB = 3044
27125 CEFBS_FeatureVectorEnhancements1, // WFCXB = 3045
27126 CEFBS_FeatureVector, // WFDDB = 3046
27127 CEFBS_FeatureVectorEnhancements1, // WFDSB = 3047
27128 CEFBS_FeatureVectorEnhancements1, // WFDXB = 3048
27129 CEFBS_FeatureVector, // WFIDB = 3049
27130 CEFBS_FeatureVectorEnhancements1, // WFISB = 3050
27131 CEFBS_FeatureVectorEnhancements1, // WFIXB = 3051
27132 CEFBS_FeatureVector, // WFK = 3052
27133 CEFBS_FeatureVector, // WFKDB = 3053
27134 CEFBS_FeatureVectorEnhancements1, // WFKEDB = 3054
27135 CEFBS_FeatureVectorEnhancements1, // WFKEDBS = 3055
27136 CEFBS_FeatureVectorEnhancements1, // WFKESB = 3056
27137 CEFBS_FeatureVectorEnhancements1, // WFKESBS = 3057
27138 CEFBS_FeatureVectorEnhancements1, // WFKEXB = 3058
27139 CEFBS_FeatureVectorEnhancements1, // WFKEXBS = 3059
27140 CEFBS_FeatureVectorEnhancements1, // WFKHDB = 3060
27141 CEFBS_FeatureVectorEnhancements1, // WFKHDBS = 3061
27142 CEFBS_FeatureVectorEnhancements1, // WFKHEDB = 3062
27143 CEFBS_FeatureVectorEnhancements1, // WFKHEDBS = 3063
27144 CEFBS_FeatureVectorEnhancements1, // WFKHESB = 3064
27145 CEFBS_FeatureVectorEnhancements1, // WFKHESBS = 3065
27146 CEFBS_FeatureVectorEnhancements1, // WFKHEXB = 3066
27147 CEFBS_FeatureVectorEnhancements1, // WFKHEXBS = 3067
27148 CEFBS_FeatureVectorEnhancements1, // WFKHSB = 3068
27149 CEFBS_FeatureVectorEnhancements1, // WFKHSBS = 3069
27150 CEFBS_FeatureVectorEnhancements1, // WFKHXB = 3070
27151 CEFBS_FeatureVectorEnhancements1, // WFKHXBS = 3071
27152 CEFBS_FeatureVectorEnhancements1, // WFKSB = 3072
27153 CEFBS_FeatureVectorEnhancements1, // WFKXB = 3073
27154 CEFBS_FeatureVector, // WFLCDB = 3074
27155 CEFBS_FeatureVectorEnhancements1, // WFLCSB = 3075
27156 CEFBS_FeatureVectorEnhancements1, // WFLCXB = 3076
27157 CEFBS_FeatureVectorEnhancements1, // WFLLD = 3077
27158 CEFBS_FeatureVectorEnhancements1, // WFLLS = 3078
27159 CEFBS_FeatureVector, // WFLNDB = 3079
27160 CEFBS_FeatureVectorEnhancements1, // WFLNSB = 3080
27161 CEFBS_FeatureVectorEnhancements1, // WFLNXB = 3081
27162 CEFBS_FeatureVector, // WFLPDB = 3082
27163 CEFBS_FeatureVectorEnhancements1, // WFLPSB = 3083
27164 CEFBS_FeatureVectorEnhancements1, // WFLPXB = 3084
27165 CEFBS_FeatureVectorEnhancements1, // WFLRD = 3085
27166 CEFBS_FeatureVectorEnhancements1, // WFLRX = 3086
27167 CEFBS_FeatureVector, // WFMADB = 3087
27168 CEFBS_FeatureVectorEnhancements1, // WFMASB = 3088
27169 CEFBS_FeatureVectorEnhancements1, // WFMAXB = 3089
27170 CEFBS_FeatureVectorEnhancements1, // WFMAXDB = 3090
27171 CEFBS_FeatureVectorEnhancements1, // WFMAXSB = 3091
27172 CEFBS_FeatureVectorEnhancements1, // WFMAXXB = 3092
27173 CEFBS_FeatureVector, // WFMDB = 3093
27174 CEFBS_FeatureVectorEnhancements1, // WFMINDB = 3094
27175 CEFBS_FeatureVectorEnhancements1, // WFMINSB = 3095
27176 CEFBS_FeatureVectorEnhancements1, // WFMINXB = 3096
27177 CEFBS_FeatureVectorEnhancements1, // WFMSB = 3097
27178 CEFBS_FeatureVector, // WFMSDB = 3098
27179 CEFBS_FeatureVectorEnhancements1, // WFMSSB = 3099
27180 CEFBS_FeatureVectorEnhancements1, // WFMSXB = 3100
27181 CEFBS_FeatureVectorEnhancements1, // WFMXB = 3101
27182 CEFBS_FeatureVectorEnhancements1, // WFNMADB = 3102
27183 CEFBS_FeatureVectorEnhancements1, // WFNMASB = 3103
27184 CEFBS_FeatureVectorEnhancements1, // WFNMAXB = 3104
27185 CEFBS_FeatureVectorEnhancements1, // WFNMSDB = 3105
27186 CEFBS_FeatureVectorEnhancements1, // WFNMSSB = 3106
27187 CEFBS_FeatureVectorEnhancements1, // WFNMSXB = 3107
27188 CEFBS_FeatureVector, // WFPSODB = 3108
27189 CEFBS_FeatureVectorEnhancements1, // WFPSOSB = 3109
27190 CEFBS_FeatureVectorEnhancements1, // WFPSOXB = 3110
27191 CEFBS_FeatureVector, // WFSDB = 3111
27192 CEFBS_FeatureVector, // WFSQDB = 3112
27193 CEFBS_FeatureVectorEnhancements1, // WFSQSB = 3113
27194 CEFBS_FeatureVectorEnhancements1, // WFSQXB = 3114
27195 CEFBS_FeatureVectorEnhancements1, // WFSSB = 3115
27196 CEFBS_FeatureVectorEnhancements1, // WFSXB = 3116
27197 CEFBS_FeatureVector, // WFTCIDB = 3117
27198 CEFBS_FeatureVectorEnhancements1, // WFTCISB = 3118
27199 CEFBS_FeatureVectorEnhancements1, // WFTCIXB = 3119
27200 CEFBS_FeatureVector, // WLDEB = 3120
27201 CEFBS_FeatureVector, // WLEDB = 3121
27202 CEFBS_None, // X = 3122
27203 CEFBS_None, // XC = 3123
27204 CEFBS_None, // XG = 3124
27205 CEFBS_None, // XGR = 3125
27206 CEFBS_FeatureDistinctOps, // XGRK = 3126
27207 CEFBS_None, // XI = 3127
27208 CEFBS_None, // XIHF = 3128
27209 CEFBS_None, // XILF = 3129
27210 CEFBS_None, // XIY = 3130
27211 CEFBS_None, // XR = 3131
27212 CEFBS_FeatureDistinctOps, // XRK = 3132
27213 CEFBS_None, // XSCH = 3133
27214 CEFBS_None, // XY = 3134
27215 CEFBS_None, // ZAP = 3135
27216 };
27217
27218 assert(Opcode < 3136);
27219 return FeatureBitsets[RequiredFeaturesRefs[Opcode]];
27220}
27221
27222} // end namespace SystemZ_MC
27223} // end namespace llvm
27224#endif // GET_COMPUTE_FEATURES
27225
27226#ifdef GET_AVAILABLE_OPCODE_CHECKER
27227#undef GET_AVAILABLE_OPCODE_CHECKER
27228namespace llvm {
27229namespace SystemZ_MC {
27230bool isOpcodeAvailable(unsigned Opcode, const FeatureBitset &Features) {
27231 FeatureBitset AvailableFeatures = computeAvailableFeatures(Features);
27232 FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode);
27233 FeatureBitset MissingFeatures =
27234 (AvailableFeatures & RequiredFeatures) ^
27235 RequiredFeatures;
27236 return !MissingFeatures.any();
27237}
27238} // end namespace SystemZ_MC
27239} // end namespace llvm
27240#endif // GET_AVAILABLE_OPCODE_CHECKER
27241
27242#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
27243#undef ENABLE_INSTR_PREDICATE_VERIFIER
27244#include <sstream>
27245
27246namespace llvm {
27247namespace SystemZ_MC {
27248
27249#ifndef NDEBUG
27250static const char *SubtargetFeatureNames[] = {
27251 "Feature_FeatureBEAREnhancement",
27252 "Feature_FeatureBackChain",
27253 "Feature_FeatureDFPPackedConversion",
27254 "Feature_FeatureDFPZonedConversion",
27255 "Feature_FeatureDeflateConversion",
27256 "Feature_FeatureDistinctOps",
27257 "Feature_FeatureEnhancedDAT2",
27258 "Feature_FeatureEnhancedSort",
27259 "Feature_FeatureExecutionHint",
27260 "Feature_FeatureFPExtension",
27261 "Feature_FeatureFastSerialization",
27262 "Feature_FeatureGuardedStorage",
27263 "Feature_FeatureHighWord",
27264 "Feature_FeatureInsertReferenceBitsMultiple",
27265 "Feature_FeatureInterlockedAccess1",
27266 "Feature_FeatureLoadAndTrap",
27267 "Feature_FeatureLoadAndZeroRightmostByte",
27268 "Feature_FeatureLoadStoreOnCond",
27269 "Feature_FeatureLoadStoreOnCond2",
27270 "Feature_FeatureMessageSecurityAssist3",
27271 "Feature_FeatureMessageSecurityAssist4",
27272 "Feature_FeatureMessageSecurityAssist5",
27273 "Feature_FeatureMessageSecurityAssist7",
27274 "Feature_FeatureMessageSecurityAssist8",
27275 "Feature_FeatureMessageSecurityAssist9",
27276 "Feature_FeatureMiscellaneousExtensions",
27277 "Feature_FeatureMiscellaneousExtensions2",
27278 "Feature_FeatureMiscellaneousExtensions3",
27279 "Feature_FeatureNNPAssist",
27280 "Feature_FeaturePopulationCount",
27281 "Feature_FeatureProcessorActivityInstrumentation",
27282 "Feature_FeatureProcessorAssist",
27283 "Feature_FeatureResetDATProtection",
27284 "Feature_FeatureResetReferenceBitsMultiple",
27285 "Feature_FeatureSoftFloat",
27286 "Feature_FeatureTestPendingExternalInterruption",
27287 "Feature_FeatureTransactionalExecution",
27288 "Feature_FeatureUnalignedSymbols",
27289 "Feature_FeatureVector",
27290 "Feature_FeatureVectorEnhancements1",
27291 "Feature_FeatureVectorEnhancements2",
27292 "Feature_FeatureVectorPackedDecimal",
27293 "Feature_FeatureVectorPackedDecimalEnhancement",
27294 "Feature_FeatureVectorPackedDecimalEnhancement2",
27295 nullptr
27296};
27297
27298#endif // NDEBUG
27299
27300void verifyInstructionPredicates(
27301 unsigned Opcode, const FeatureBitset &Features) {
27302#ifndef NDEBUG
27303 FeatureBitset AvailableFeatures = computeAvailableFeatures(Features);
27304 FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode);
27305 FeatureBitset MissingFeatures =
27306 (AvailableFeatures & RequiredFeatures) ^
27307 RequiredFeatures;
27308 if (MissingFeatures.any()) {
27309 std::ostringstream Msg;
27310 Msg << "Attempting to emit " << &SystemZInstrNameData[SystemZInstrNameIndices[Opcode]]
27311 << " instruction but the ";
27312 for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i)
27313 if (MissingFeatures.test(i))
27314 Msg << SubtargetFeatureNames[i] << " ";
27315 Msg << "predicate(s) are not met";
27316 report_fatal_error(Msg.str().c_str());
27317 }
27318#endif // NDEBUG
27319}
27320} // end namespace SystemZ_MC
27321} // end namespace llvm
27322#endif // ENABLE_INSTR_PREDICATE_VERIFIER
27323
27324#ifdef GET_INSTRMAP_INFO
27325#undef GET_INSTRMAP_INFO
27326namespace llvm {
27327
27328namespace SystemZ {
27329
27330enum DispSize {
27331 DispSize_12,
27332 DispSize_20
27333};
27334
27335enum MemType {
27336 MemType_target
27337};
27338
27339enum NumOpsValue {
27340 NumOpsValue_2
27341};
27342
27343enum OpType {
27344 OpType_mem
27345};
27346
27347// getDisp12Opcode
27348LLVM_READONLY
27349int getDisp12Opcode(uint16_t Opcode) {
27350static const uint16_t getDisp12OpcodeTable[][2] = {
27351 { SystemZ::AHY, SystemZ::AH },
27352 { SystemZ::ALY, SystemZ::AL },
27353 { SystemZ::AY, SystemZ::A },
27354 { SystemZ::CDSY, SystemZ::CDS },
27355 { SystemZ::CHY, SystemZ::CH },
27356 { SystemZ::CLIY, SystemZ::CLI },
27357 { SystemZ::CLMY, SystemZ::CLM },
27358 { SystemZ::CLY, SystemZ::CL },
27359 { SystemZ::CSY, SystemZ::CS },
27360 { SystemZ::CVBY, SystemZ::CVB },
27361 { SystemZ::CVDY, SystemZ::CVD },
27362 { SystemZ::CY, SystemZ::C },
27363 { SystemZ::IC32Y, SystemZ::IC32 },
27364 { SystemZ::ICMY, SystemZ::ICM },
27365 { SystemZ::ICY, SystemZ::IC },
27366 { SystemZ::LAEY, SystemZ::LAE },
27367 { SystemZ::LAMY, SystemZ::LAM },
27368 { SystemZ::LAY, SystemZ::LA },
27369 { SystemZ::LDY, SystemZ::LD },
27370 { SystemZ::LEY, SystemZ::LE },
27371 { SystemZ::LHY, SystemZ::LH },
27372 { SystemZ::LMY, SystemZ::LM },
27373 { SystemZ::LRAY, SystemZ::LRA },
27374 { SystemZ::LY, SystemZ::L },
27375 { SystemZ::MHY, SystemZ::MH },
27376 { SystemZ::MSY, SystemZ::MS },
27377 { SystemZ::MVIY, SystemZ::MVI },
27378 { SystemZ::NIY, SystemZ::NI },
27379 { SystemZ::NY, SystemZ::N },
27380 { SystemZ::OIY, SystemZ::OI },
27381 { SystemZ::OY, SystemZ::O },
27382 { SystemZ::SHY, SystemZ::SH },
27383 { SystemZ::SLY, SystemZ::SL },
27384 { SystemZ::STAMY, SystemZ::STAM },
27385 { SystemZ::STCMY, SystemZ::STCM },
27386 { SystemZ::STCY, SystemZ::STC },
27387 { SystemZ::STDY, SystemZ::STD },
27388 { SystemZ::STEY, SystemZ::STE },
27389 { SystemZ::STHY, SystemZ::STH },
27390 { SystemZ::STMY, SystemZ::STM },
27391 { SystemZ::STY, SystemZ::ST },
27392 { SystemZ::SY, SystemZ::S },
27393 { SystemZ::TMY, SystemZ::TM },
27394 { SystemZ::XIY, SystemZ::XI },
27395 { SystemZ::XY, SystemZ::X },
27396}; // End of getDisp12OpcodeTable
27397
27398 unsigned mid;
27399 unsigned start = 0;
27400 unsigned end = 45;
27401 while (start < end) {
27402 mid = start + (end - start) / 2;
27403 if (Opcode == getDisp12OpcodeTable[mid][0]) {
27404 break;
27405 }
27406 if (Opcode < getDisp12OpcodeTable[mid][0])
27407 end = mid;
27408 else
27409 start = mid + 1;
27410 }
27411 if (start == end)
27412 return -1; // Instruction doesn't exist in this table.
27413
27414 return getDisp12OpcodeTable[mid][1];
27415}
27416
27417// getDisp20Opcode
27418LLVM_READONLY
27419int getDisp20Opcode(uint16_t Opcode) {
27420static const uint16_t getDisp20OpcodeTable[][2] = {
27421 { SystemZ::A, SystemZ::AY },
27422 { SystemZ::AH, SystemZ::AHY },
27423 { SystemZ::AL, SystemZ::ALY },
27424 { SystemZ::C, SystemZ::CY },
27425 { SystemZ::CDS, SystemZ::CDSY },
27426 { SystemZ::CH, SystemZ::CHY },
27427 { SystemZ::CL, SystemZ::CLY },
27428 { SystemZ::CLI, SystemZ::CLIY },
27429 { SystemZ::CLM, SystemZ::CLMY },
27430 { SystemZ::CS, SystemZ::CSY },
27431 { SystemZ::CVB, SystemZ::CVBY },
27432 { SystemZ::CVD, SystemZ::CVDY },
27433 { SystemZ::IC, SystemZ::ICY },
27434 { SystemZ::IC32, SystemZ::IC32Y },
27435 { SystemZ::ICM, SystemZ::ICMY },
27436 { SystemZ::L, SystemZ::LY },
27437 { SystemZ::LA, SystemZ::LAY },
27438 { SystemZ::LAE, SystemZ::LAEY },
27439 { SystemZ::LAM, SystemZ::LAMY },
27440 { SystemZ::LD, SystemZ::LDY },
27441 { SystemZ::LE, SystemZ::LEY },
27442 { SystemZ::LH, SystemZ::LHY },
27443 { SystemZ::LM, SystemZ::LMY },
27444 { SystemZ::LRA, SystemZ::LRAY },
27445 { SystemZ::MH, SystemZ::MHY },
27446 { SystemZ::MS, SystemZ::MSY },
27447 { SystemZ::MVI, SystemZ::MVIY },
27448 { SystemZ::N, SystemZ::NY },
27449 { SystemZ::NI, SystemZ::NIY },
27450 { SystemZ::O, SystemZ::OY },
27451 { SystemZ::OI, SystemZ::OIY },
27452 { SystemZ::S, SystemZ::SY },
27453 { SystemZ::SH, SystemZ::SHY },
27454 { SystemZ::SL, SystemZ::SLY },
27455 { SystemZ::ST, SystemZ::STY },
27456 { SystemZ::STAM, SystemZ::STAMY },
27457 { SystemZ::STC, SystemZ::STCY },
27458 { SystemZ::STCM, SystemZ::STCMY },
27459 { SystemZ::STD, SystemZ::STDY },
27460 { SystemZ::STE, SystemZ::STEY },
27461 { SystemZ::STH, SystemZ::STHY },
27462 { SystemZ::STM, SystemZ::STMY },
27463 { SystemZ::TM, SystemZ::TMY },
27464 { SystemZ::X, SystemZ::XY },
27465 { SystemZ::XI, SystemZ::XIY },
27466}; // End of getDisp20OpcodeTable
27467
27468 unsigned mid;
27469 unsigned start = 0;
27470 unsigned end = 45;
27471 while (start < end) {
27472 mid = start + (end - start) / 2;
27473 if (Opcode == getDisp20OpcodeTable[mid][0]) {
27474 break;
27475 }
27476 if (Opcode < getDisp20OpcodeTable[mid][0])
27477 end = mid;
27478 else
27479 start = mid + 1;
27480 }
27481 if (start == end)
27482 return -1; // Instruction doesn't exist in this table.
27483
27484 return getDisp20OpcodeTable[mid][1];
27485}
27486
27487// getMemOpcode
27488LLVM_READONLY
27489int getMemOpcode(uint16_t Opcode) {
27490static const uint16_t getMemOpcodeTable[][2] = {
27491 { SystemZ::LLCRMux, SystemZ::LLCMux },
27492 { SystemZ::LLHRMux, SystemZ::LLHMux },
27493 { SystemZ::LOCRMux, SystemZ::LOCMux },
27494 { SystemZ::SELRMux, SystemZ::LOCMux_MemFoldPseudo },
27495 { SystemZ::ADBR, SystemZ::ADB },
27496 { SystemZ::ADR, SystemZ::AD },
27497 { SystemZ::AEBR, SystemZ::AEB },
27498 { SystemZ::AER, SystemZ::AE },
27499 { SystemZ::AGFR, SystemZ::AGF },
27500 { SystemZ::AGR, SystemZ::AG },
27501 { SystemZ::AGRK, SystemZ::AG_MemFoldPseudo },
27502 { SystemZ::ALCGR, SystemZ::ALCG },
27503 { SystemZ::ALCR, SystemZ::ALC },
27504 { SystemZ::ALGFR, SystemZ::ALGF },
27505 { SystemZ::ALGR, SystemZ::ALG },
27506 { SystemZ::ALGRK, SystemZ::ALG_MemFoldPseudo },
27507 { SystemZ::ALR, SystemZ::AL },
27508 { SystemZ::ALRK, SystemZ::AL_MemFoldPseudo },
27509 { SystemZ::AR, SystemZ::A },
27510 { SystemZ::ARK, SystemZ::A_MemFoldPseudo },
27511 { SystemZ::AUR, SystemZ::AU },
27512 { SystemZ::AWR, SystemZ::AW },
27513 { SystemZ::CDBR, SystemZ::CDB },
27514 { SystemZ::CDR, SystemZ::CD },
27515 { SystemZ::CEBR, SystemZ::CEB },
27516 { SystemZ::CER, SystemZ::CE },
27517 { SystemZ::CGFR, SystemZ::CGF },
27518 { SystemZ::CGR, SystemZ::CG },
27519 { SystemZ::CLGFR, SystemZ::CLGF },
27520 { SystemZ::CLGR, SystemZ::CLG },
27521 { SystemZ::CLR, SystemZ::CL },
27522 { SystemZ::CR, SystemZ::C },
27523 { SystemZ::DDBR, SystemZ::DDB },
27524 { SystemZ::DDR, SystemZ::DD },
27525 { SystemZ::DEBR, SystemZ::DEB },
27526 { SystemZ::DER, SystemZ::DE },
27527 { SystemZ::DLGR, SystemZ::DLG },
27528 { SystemZ::DLR, SystemZ::DL },
27529 { SystemZ::DR, SystemZ::D },
27530 { SystemZ::DSGFR, SystemZ::DSGF },
27531 { SystemZ::DSGR, SystemZ::DSG },
27532 { SystemZ::KDBR, SystemZ::KDB },
27533 { SystemZ::KEBR, SystemZ::KEB },
27534 { SystemZ::LBR, SystemZ::LB },
27535 { SystemZ::LDEBR, SystemZ::LDEB },
27536 { SystemZ::LDER, SystemZ::LDE },
27537 { SystemZ::LDR, SystemZ::LD },
27538 { SystemZ::LER, SystemZ::LE },
27539 { SystemZ::LGBR, SystemZ::LGB },
27540 { SystemZ::LGFR, SystemZ::LGF },
27541 { SystemZ::LGHR, SystemZ::LGH },
27542 { SystemZ::LGR, SystemZ::LG },
27543 { SystemZ::LHR, SystemZ::LH },
27544 { SystemZ::LLCR, SystemZ::LLC },
27545 { SystemZ::LLGCR, SystemZ::LLGC },
27546 { SystemZ::LLGFR, SystemZ::LLGF },
27547 { SystemZ::LLGHR, SystemZ::LLGH },
27548 { SystemZ::LLGTR, SystemZ::LLGT },
27549 { SystemZ::LLHR, SystemZ::LLH },
27550 { SystemZ::LOCFHR, SystemZ::LOCFH },
27551 { SystemZ::LOCGR, SystemZ::LOCG },
27552 { SystemZ::LOCR, SystemZ::LOC },
27553 { SystemZ::LR, SystemZ::L },
27554 { SystemZ::LRVGR, SystemZ::LRVG },
27555 { SystemZ::LRVR, SystemZ::LRV },
27556 { SystemZ::LTGFR, SystemZ::LTGF },
27557 { SystemZ::LTGR, SystemZ::LTG },
27558 { SystemZ::LTR, SystemZ::LT },
27559 { SystemZ::LXDBR, SystemZ::LXDB },
27560 { SystemZ::LXDR, SystemZ::LXD },
27561 { SystemZ::LXEBR, SystemZ::LXEB },
27562 { SystemZ::LXER, SystemZ::LXE },
27563 { SystemZ::MADBR, SystemZ::MADB },
27564 { SystemZ::MADR, SystemZ::MAD },
27565 { SystemZ::MAEBR, SystemZ::MAEB },
27566 { SystemZ::MAER, SystemZ::MAE },
27567 { SystemZ::MAYHR, SystemZ::MAYH },
27568 { SystemZ::MAYLR, SystemZ::MAYL },
27569 { SystemZ::MAYR, SystemZ::MAY },
27570 { SystemZ::MDBR, SystemZ::MDB },
27571 { SystemZ::MDEBR, SystemZ::MDEB },
27572 { SystemZ::MDER, SystemZ::MDE },
27573 { SystemZ::MDR, SystemZ::MD },
27574 { SystemZ::MEEBR, SystemZ::MEEB },
27575 { SystemZ::MEER, SystemZ::MEE },
27576 { SystemZ::MER, SystemZ::ME },
27577 { SystemZ::MLGR, SystemZ::MLG },
27578 { SystemZ::MLR, SystemZ::ML },
27579 { SystemZ::MR, SystemZ::M },
27580 { SystemZ::MSDBR, SystemZ::MSDB },
27581 { SystemZ::MSDR, SystemZ::MSD },
27582 { SystemZ::MSEBR, SystemZ::MSEB },
27583 { SystemZ::MSER, SystemZ::MSE },
27584 { SystemZ::MSGFR, SystemZ::MSGF },
27585 { SystemZ::MSGR, SystemZ::MSG },
27586 { SystemZ::MSGRKC, SystemZ::MSGC_MemFoldPseudo },
27587 { SystemZ::MSR, SystemZ::MS },
27588 { SystemZ::MSRKC, SystemZ::MSC_MemFoldPseudo },
27589 { SystemZ::MXDBR, SystemZ::MXDB },
27590 { SystemZ::MXDR, SystemZ::MXD },
27591 { SystemZ::MYHR, SystemZ::MYH },
27592 { SystemZ::MYLR, SystemZ::MYL },
27593 { SystemZ::MYR, SystemZ::MY },
27594 { SystemZ::NGR, SystemZ::NG },
27595 { SystemZ::NGRK, SystemZ::NG_MemFoldPseudo },
27596 { SystemZ::NR, SystemZ::N },
27597 { SystemZ::NRK, SystemZ::N_MemFoldPseudo },
27598 { SystemZ::OGR, SystemZ::OG },
27599 { SystemZ::OGRK, SystemZ::OG_MemFoldPseudo },
27600 { SystemZ::OR, SystemZ::O },
27601 { SystemZ::ORK, SystemZ::O_MemFoldPseudo },
27602 { SystemZ::SDBR, SystemZ::SDB },
27603 { SystemZ::SDR, SystemZ::SD },
27604 { SystemZ::SEBR, SystemZ::SEB },
27605 { SystemZ::SELGR, SystemZ::LOCG_MemFoldPseudo },
27606 { SystemZ::SER, SystemZ::SE },
27607 { SystemZ::SGFR, SystemZ::SGF },
27608 { SystemZ::SGR, SystemZ::SG },
27609 { SystemZ::SGRK, SystemZ::SG_MemFoldPseudo },
27610 { SystemZ::SLBGR, SystemZ::SLBG },
27611 { SystemZ::SLBR, SystemZ::SLB },
27612 { SystemZ::SLGFR, SystemZ::SLGF },
27613 { SystemZ::SLGR, SystemZ::SLG },
27614 { SystemZ::SLGRK, SystemZ::SLG_MemFoldPseudo },
27615 { SystemZ::SLR, SystemZ::SL },
27616 { SystemZ::SLRK, SystemZ::SL_MemFoldPseudo },
27617 { SystemZ::SQDBR, SystemZ::SQDB },
27618 { SystemZ::SQDR, SystemZ::SQD },
27619 { SystemZ::SQEBR, SystemZ::SQEB },
27620 { SystemZ::SQER, SystemZ::SQE },
27621 { SystemZ::SR, SystemZ::S },
27622 { SystemZ::SRK, SystemZ::S_MemFoldPseudo },
27623 { SystemZ::SUR, SystemZ::SU },
27624 { SystemZ::SWR, SystemZ::SW },
27625 { SystemZ::WFADB, SystemZ::ADB_MemFoldPseudo },
27626 { SystemZ::WFASB, SystemZ::AEB_MemFoldPseudo },
27627 { SystemZ::WFCDB, SystemZ::CDB },
27628 { SystemZ::WFCSB, SystemZ::CEB },
27629 { SystemZ::WFDDB, SystemZ::DDB_MemFoldPseudo },
27630 { SystemZ::WFDSB, SystemZ::DEB_MemFoldPseudo },
27631 { SystemZ::WFKDB, SystemZ::KDB },
27632 { SystemZ::WFKSB, SystemZ::KEB },
27633 { SystemZ::WFMADB, SystemZ::MADB_MemFoldPseudo },
27634 { SystemZ::WFMASB, SystemZ::MAEB_MemFoldPseudo },
27635 { SystemZ::WFMDB, SystemZ::MDB_MemFoldPseudo },
27636 { SystemZ::WFMSB, SystemZ::MEEB_MemFoldPseudo },
27637 { SystemZ::WFMSDB, SystemZ::MSDB_MemFoldPseudo },
27638 { SystemZ::WFMSSB, SystemZ::MSEB_MemFoldPseudo },
27639 { SystemZ::WFSDB, SystemZ::SDB_MemFoldPseudo },
27640 { SystemZ::WFSQDB, SystemZ::SQDB },
27641 { SystemZ::WFSQSB, SystemZ::SQEB },
27642 { SystemZ::WFSSB, SystemZ::SEB_MemFoldPseudo },
27643 { SystemZ::WLDEB, SystemZ::LDEB },
27644 { SystemZ::XGR, SystemZ::XG },
27645 { SystemZ::XGRK, SystemZ::XG_MemFoldPseudo },
27646 { SystemZ::XR, SystemZ::X },
27647 { SystemZ::XRK, SystemZ::X_MemFoldPseudo },
27648}; // End of getMemOpcodeTable
27649
27650 unsigned mid;
27651 unsigned start = 0;
27652 unsigned end = 157;
27653 while (start < end) {
27654 mid = start + (end - start) / 2;
27655 if (Opcode == getMemOpcodeTable[mid][0]) {
27656 break;
27657 }
27658 if (Opcode < getMemOpcodeTable[mid][0])
27659 end = mid;
27660 else
27661 start = mid + 1;
27662 }
27663 if (start == end)
27664 return -1; // Instruction doesn't exist in this table.
27665
27666 return getMemOpcodeTable[mid][1];
27667}
27668
27669// getTargetMemOpcode
27670LLVM_READONLY
27671int getTargetMemOpcode(uint16_t Opcode) {
27672static const uint16_t getTargetMemOpcodeTable[][2] = {
27673 { SystemZ::ADB_MemFoldPseudo, SystemZ::ADB },
27674 { SystemZ::AEB_MemFoldPseudo, SystemZ::AEB },
27675 { SystemZ::AG_MemFoldPseudo, SystemZ::AG },
27676 { SystemZ::ALG_MemFoldPseudo, SystemZ::ALG },
27677 { SystemZ::AL_MemFoldPseudo, SystemZ::AL },
27678 { SystemZ::A_MemFoldPseudo, SystemZ::A },
27679 { SystemZ::DDB_MemFoldPseudo, SystemZ::DDB },
27680 { SystemZ::DEB_MemFoldPseudo, SystemZ::DEB },
27681 { SystemZ::LOCG_MemFoldPseudo, SystemZ::LOCG },
27682 { SystemZ::LOCMux_MemFoldPseudo, SystemZ::LOCMux },
27683 { SystemZ::MADB_MemFoldPseudo, SystemZ::MADB },
27684 { SystemZ::MAEB_MemFoldPseudo, SystemZ::MAEB },
27685 { SystemZ::MDB_MemFoldPseudo, SystemZ::MDB },
27686 { SystemZ::MEEB_MemFoldPseudo, SystemZ::MEEB },
27687 { SystemZ::MSC_MemFoldPseudo, SystemZ::MSC },
27688 { SystemZ::MSDB_MemFoldPseudo, SystemZ::MSDB },
27689 { SystemZ::MSEB_MemFoldPseudo, SystemZ::MSEB },
27690 { SystemZ::MSGC_MemFoldPseudo, SystemZ::MSGC },
27691 { SystemZ::NG_MemFoldPseudo, SystemZ::NG },
27692 { SystemZ::N_MemFoldPseudo, SystemZ::N },
27693 { SystemZ::OG_MemFoldPseudo, SystemZ::OG },
27694 { SystemZ::O_MemFoldPseudo, SystemZ::O },
27695 { SystemZ::SDB_MemFoldPseudo, SystemZ::SDB },
27696 { SystemZ::SEB_MemFoldPseudo, SystemZ::SEB },
27697 { SystemZ::SG_MemFoldPseudo, SystemZ::SG },
27698 { SystemZ::SLG_MemFoldPseudo, SystemZ::SLG },
27699 { SystemZ::SL_MemFoldPseudo, SystemZ::SL },
27700 { SystemZ::S_MemFoldPseudo, SystemZ::S },
27701 { SystemZ::XG_MemFoldPseudo, SystemZ::XG },
27702 { SystemZ::X_MemFoldPseudo, SystemZ::X },
27703}; // End of getTargetMemOpcodeTable
27704
27705 unsigned mid;
27706 unsigned start = 0;
27707 unsigned end = 30;
27708 while (start < end) {
27709 mid = start + (end - start) / 2;
27710 if (Opcode == getTargetMemOpcodeTable[mid][0]) {
27711 break;
27712 }
27713 if (Opcode < getTargetMemOpcodeTable[mid][0])
27714 end = mid;
27715 else
27716 start = mid + 1;
27717 }
27718 if (start == end)
27719 return -1; // Instruction doesn't exist in this table.
27720
27721 return getTargetMemOpcodeTable[mid][1];
27722}
27723
27724// getTwoOperandOpcode
27725LLVM_READONLY
27726int getTwoOperandOpcode(uint16_t Opcode) {
27727static const uint16_t getTwoOperandOpcodeTable[][2] = {
27728 { SystemZ::AHIMuxK, SystemZ::AHIMux },
27729 { SystemZ::SELRMux, SystemZ::LOCRMux },
27730 { SystemZ::AGHIK, SystemZ::AGHI },
27731 { SystemZ::AGRK, SystemZ::AGR },
27732 { SystemZ::AHIK, SystemZ::AHI },
27733 { SystemZ::ALGRK, SystemZ::ALGR },
27734 { SystemZ::ALRK, SystemZ::ALR },
27735 { SystemZ::ARK, SystemZ::AR },
27736 { SystemZ::NGRK, SystemZ::NGR },
27737 { SystemZ::NRK, SystemZ::NR },
27738 { SystemZ::OGRK, SystemZ::OGR },
27739 { SystemZ::ORK, SystemZ::OR },
27740 { SystemZ::SELFHR, SystemZ::LOCFHR },
27741 { SystemZ::SELGR, SystemZ::LOCGR },
27742 { SystemZ::SELR, SystemZ::LOCR },
27743 { SystemZ::SGRK, SystemZ::SGR },
27744 { SystemZ::SLAK, SystemZ::SLA },
27745 { SystemZ::SLGRK, SystemZ::SLGR },
27746 { SystemZ::SLLK, SystemZ::SLL },
27747 { SystemZ::SLRK, SystemZ::SLR },
27748 { SystemZ::SRAK, SystemZ::SRA },
27749 { SystemZ::SRK, SystemZ::SR },
27750 { SystemZ::SRLK, SystemZ::SRL },
27751 { SystemZ::XGRK, SystemZ::XGR },
27752 { SystemZ::XRK, SystemZ::XR },
27753}; // End of getTwoOperandOpcodeTable
27754
27755 unsigned mid;
27756 unsigned start = 0;
27757 unsigned end = 25;
27758 while (start < end) {
27759 mid = start + (end - start) / 2;
27760 if (Opcode == getTwoOperandOpcodeTable[mid][0]) {
27761 break;
27762 }
27763 if (Opcode < getTwoOperandOpcodeTable[mid][0])
27764 end = mid;
27765 else
27766 start = mid + 1;
27767 }
27768 if (start == end)
27769 return -1; // Instruction doesn't exist in this table.
27770
27771 return getTwoOperandOpcodeTable[mid][1];
27772}
27773
27774} // end namespace SystemZ
27775} // end namespace llvm
27776#endif // GET_INSTRMAP_INFO
27777
27778