| 1 | // This was created from include/llvm/IR/IntrinsicsHexagon.h |
|---|---|
| 2 | |
| 3 | #ifdef GET_SCALAR_INTRINSICS |
| 4 | {.Opcode: Hexagon::A2_abs, .IntId: Intrinsic::hexagon_A2_abs}, |
| 5 | {.Opcode: Hexagon::A2_absp, .IntId: Intrinsic::hexagon_A2_absp}, |
| 6 | {.Opcode: Hexagon::A2_abssat, .IntId: Intrinsic::hexagon_A2_abssat}, |
| 7 | {.Opcode: Hexagon::A2_add, .IntId: Intrinsic::hexagon_A2_add}, |
| 8 | {.Opcode: Hexagon::A2_addh_h16_hh, .IntId: Intrinsic::hexagon_A2_addh_h16_hh}, |
| 9 | {.Opcode: Hexagon::A2_addh_h16_hl, .IntId: Intrinsic::hexagon_A2_addh_h16_hl}, |
| 10 | {.Opcode: Hexagon::A2_addh_h16_lh, .IntId: Intrinsic::hexagon_A2_addh_h16_lh}, |
| 11 | {.Opcode: Hexagon::A2_addh_h16_ll, .IntId: Intrinsic::hexagon_A2_addh_h16_ll}, |
| 12 | {.Opcode: Hexagon::A2_addh_h16_sat_hh, .IntId: Intrinsic::hexagon_A2_addh_h16_sat_hh}, |
| 13 | {.Opcode: Hexagon::A2_addh_h16_sat_hl, .IntId: Intrinsic::hexagon_A2_addh_h16_sat_hl}, |
| 14 | {.Opcode: Hexagon::A2_addh_h16_sat_lh, .IntId: Intrinsic::hexagon_A2_addh_h16_sat_lh}, |
| 15 | {.Opcode: Hexagon::A2_addh_h16_sat_ll, .IntId: Intrinsic::hexagon_A2_addh_h16_sat_ll}, |
| 16 | {.Opcode: Hexagon::A2_addh_l16_hl, .IntId: Intrinsic::hexagon_A2_addh_l16_hl}, |
| 17 | {.Opcode: Hexagon::A2_addh_l16_ll, .IntId: Intrinsic::hexagon_A2_addh_l16_ll}, |
| 18 | {.Opcode: Hexagon::A2_addh_l16_sat_hl, .IntId: Intrinsic::hexagon_A2_addh_l16_sat_hl}, |
| 19 | {.Opcode: Hexagon::A2_addh_l16_sat_ll, .IntId: Intrinsic::hexagon_A2_addh_l16_sat_ll}, |
| 20 | {.Opcode: Hexagon::A2_addi, .IntId: Intrinsic::hexagon_A2_addi}, |
| 21 | {.Opcode: Hexagon::A2_addp, .IntId: Intrinsic::hexagon_A2_addp}, |
| 22 | {.Opcode: Hexagon::A2_addpsat, .IntId: Intrinsic::hexagon_A2_addpsat}, |
| 23 | {.Opcode: Hexagon::A2_addsat, .IntId: Intrinsic::hexagon_A2_addsat}, |
| 24 | {.Opcode: Hexagon::A2_addsp, .IntId: Intrinsic::hexagon_A2_addsp}, |
| 25 | {.Opcode: Hexagon::A2_and, .IntId: Intrinsic::hexagon_A2_and}, |
| 26 | {.Opcode: Hexagon::A2_andir, .IntId: Intrinsic::hexagon_A2_andir}, |
| 27 | {.Opcode: Hexagon::A2_andp, .IntId: Intrinsic::hexagon_A2_andp}, |
| 28 | {.Opcode: Hexagon::A2_aslh, .IntId: Intrinsic::hexagon_A2_aslh}, |
| 29 | {.Opcode: Hexagon::A2_asrh, .IntId: Intrinsic::hexagon_A2_asrh}, |
| 30 | {.Opcode: Hexagon::A2_combine_hh, .IntId: Intrinsic::hexagon_A2_combine_hh}, |
| 31 | {.Opcode: Hexagon::A2_combine_hl, .IntId: Intrinsic::hexagon_A2_combine_hl}, |
| 32 | {.Opcode: Hexagon::A2_combine_lh, .IntId: Intrinsic::hexagon_A2_combine_lh}, |
| 33 | {.Opcode: Hexagon::A2_combine_ll, .IntId: Intrinsic::hexagon_A2_combine_ll}, |
| 34 | {.Opcode: Hexagon::A2_combineii, .IntId: Intrinsic::hexagon_A2_combineii}, |
| 35 | {.Opcode: Hexagon::A2_combinew, .IntId: Intrinsic::hexagon_A2_combinew}, |
| 36 | {.Opcode: Hexagon::A2_max, .IntId: Intrinsic::hexagon_A2_max}, |
| 37 | {.Opcode: Hexagon::A2_maxp, .IntId: Intrinsic::hexagon_A2_maxp}, |
| 38 | {.Opcode: Hexagon::A2_maxu, .IntId: Intrinsic::hexagon_A2_maxu}, |
| 39 | {.Opcode: Hexagon::A2_maxup, .IntId: Intrinsic::hexagon_A2_maxup}, |
| 40 | {.Opcode: Hexagon::A2_min, .IntId: Intrinsic::hexagon_A2_min}, |
| 41 | {.Opcode: Hexagon::A2_minp, .IntId: Intrinsic::hexagon_A2_minp}, |
| 42 | {.Opcode: Hexagon::A2_minu, .IntId: Intrinsic::hexagon_A2_minu}, |
| 43 | {.Opcode: Hexagon::A2_minup, .IntId: Intrinsic::hexagon_A2_minup}, |
| 44 | {.Opcode: Hexagon::A2_neg, .IntId: Intrinsic::hexagon_A2_neg}, |
| 45 | {.Opcode: Hexagon::A2_negp, .IntId: Intrinsic::hexagon_A2_negp}, |
| 46 | {.Opcode: Hexagon::A2_negsat, .IntId: Intrinsic::hexagon_A2_negsat}, |
| 47 | {.Opcode: Hexagon::A2_not, .IntId: Intrinsic::hexagon_A2_not}, |
| 48 | {.Opcode: Hexagon::A2_notp, .IntId: Intrinsic::hexagon_A2_notp}, |
| 49 | {.Opcode: Hexagon::A2_or, .IntId: Intrinsic::hexagon_A2_or}, |
| 50 | {.Opcode: Hexagon::A2_orir, .IntId: Intrinsic::hexagon_A2_orir}, |
| 51 | {.Opcode: Hexagon::A2_orp, .IntId: Intrinsic::hexagon_A2_orp}, |
| 52 | {.Opcode: Hexagon::A2_roundsat, .IntId: Intrinsic::hexagon_A2_roundsat}, |
| 53 | {.Opcode: Hexagon::A2_sat, .IntId: Intrinsic::hexagon_A2_sat}, |
| 54 | {.Opcode: Hexagon::A2_satb, .IntId: Intrinsic::hexagon_A2_satb}, |
| 55 | {.Opcode: Hexagon::A2_sath, .IntId: Intrinsic::hexagon_A2_sath}, |
| 56 | {.Opcode: Hexagon::A2_satub, .IntId: Intrinsic::hexagon_A2_satub}, |
| 57 | {.Opcode: Hexagon::A2_satuh, .IntId: Intrinsic::hexagon_A2_satuh}, |
| 58 | {.Opcode: Hexagon::A2_sub, .IntId: Intrinsic::hexagon_A2_sub}, |
| 59 | {.Opcode: Hexagon::A2_subh_h16_hh, .IntId: Intrinsic::hexagon_A2_subh_h16_hh}, |
| 60 | {.Opcode: Hexagon::A2_subh_h16_hl, .IntId: Intrinsic::hexagon_A2_subh_h16_hl}, |
| 61 | {.Opcode: Hexagon::A2_subh_h16_lh, .IntId: Intrinsic::hexagon_A2_subh_h16_lh}, |
| 62 | {.Opcode: Hexagon::A2_subh_h16_ll, .IntId: Intrinsic::hexagon_A2_subh_h16_ll}, |
| 63 | {.Opcode: Hexagon::A2_subh_h16_sat_hh, .IntId: Intrinsic::hexagon_A2_subh_h16_sat_hh}, |
| 64 | {.Opcode: Hexagon::A2_subh_h16_sat_hl, .IntId: Intrinsic::hexagon_A2_subh_h16_sat_hl}, |
| 65 | {.Opcode: Hexagon::A2_subh_h16_sat_lh, .IntId: Intrinsic::hexagon_A2_subh_h16_sat_lh}, |
| 66 | {.Opcode: Hexagon::A2_subh_h16_sat_ll, .IntId: Intrinsic::hexagon_A2_subh_h16_sat_ll}, |
| 67 | {.Opcode: Hexagon::A2_subh_l16_hl, .IntId: Intrinsic::hexagon_A2_subh_l16_hl}, |
| 68 | {.Opcode: Hexagon::A2_subh_l16_ll, .IntId: Intrinsic::hexagon_A2_subh_l16_ll}, |
| 69 | {.Opcode: Hexagon::A2_subh_l16_sat_hl, .IntId: Intrinsic::hexagon_A2_subh_l16_sat_hl}, |
| 70 | {.Opcode: Hexagon::A2_subh_l16_sat_ll, .IntId: Intrinsic::hexagon_A2_subh_l16_sat_ll}, |
| 71 | {.Opcode: Hexagon::A2_subp, .IntId: Intrinsic::hexagon_A2_subp}, |
| 72 | {.Opcode: Hexagon::A2_subri, .IntId: Intrinsic::hexagon_A2_subri}, |
| 73 | {.Opcode: Hexagon::A2_subsat, .IntId: Intrinsic::hexagon_A2_subsat}, |
| 74 | {.Opcode: Hexagon::A2_svaddh, .IntId: Intrinsic::hexagon_A2_svaddh}, |
| 75 | {.Opcode: Hexagon::A2_svaddhs, .IntId: Intrinsic::hexagon_A2_svaddhs}, |
| 76 | {.Opcode: Hexagon::A2_svadduhs, .IntId: Intrinsic::hexagon_A2_svadduhs}, |
| 77 | {.Opcode: Hexagon::A2_svavgh, .IntId: Intrinsic::hexagon_A2_svavgh}, |
| 78 | {.Opcode: Hexagon::A2_svavghs, .IntId: Intrinsic::hexagon_A2_svavghs}, |
| 79 | {.Opcode: Hexagon::A2_svnavgh, .IntId: Intrinsic::hexagon_A2_svnavgh}, |
| 80 | {.Opcode: Hexagon::A2_svsubh, .IntId: Intrinsic::hexagon_A2_svsubh}, |
| 81 | {.Opcode: Hexagon::A2_svsubhs, .IntId: Intrinsic::hexagon_A2_svsubhs}, |
| 82 | {.Opcode: Hexagon::A2_svsubuhs, .IntId: Intrinsic::hexagon_A2_svsubuhs}, |
| 83 | {.Opcode: Hexagon::A2_swiz, .IntId: Intrinsic::hexagon_A2_swiz}, |
| 84 | {.Opcode: Hexagon::A2_sxtb, .IntId: Intrinsic::hexagon_A2_sxtb}, |
| 85 | {.Opcode: Hexagon::A2_sxth, .IntId: Intrinsic::hexagon_A2_sxth}, |
| 86 | {.Opcode: Hexagon::A2_sxtw, .IntId: Intrinsic::hexagon_A2_sxtw}, |
| 87 | {.Opcode: Hexagon::A2_tfr, .IntId: Intrinsic::hexagon_A2_tfr}, |
| 88 | {.Opcode: Hexagon::A2_tfrih, .IntId: Intrinsic::hexagon_A2_tfrih}, |
| 89 | {.Opcode: Hexagon::A2_tfril, .IntId: Intrinsic::hexagon_A2_tfril}, |
| 90 | {.Opcode: Hexagon::A2_tfrp, .IntId: Intrinsic::hexagon_A2_tfrp}, |
| 91 | {.Opcode: Hexagon::A2_tfrpi, .IntId: Intrinsic::hexagon_A2_tfrpi}, |
| 92 | {.Opcode: Hexagon::A2_tfrsi, .IntId: Intrinsic::hexagon_A2_tfrsi}, |
| 93 | {.Opcode: Hexagon::A2_vabsh, .IntId: Intrinsic::hexagon_A2_vabsh}, |
| 94 | {.Opcode: Hexagon::A2_vabshsat, .IntId: Intrinsic::hexagon_A2_vabshsat}, |
| 95 | {.Opcode: Hexagon::A2_vabsw, .IntId: Intrinsic::hexagon_A2_vabsw}, |
| 96 | {.Opcode: Hexagon::A2_vabswsat, .IntId: Intrinsic::hexagon_A2_vabswsat}, |
| 97 | {.Opcode: Hexagon::A2_vaddb_map, .IntId: Intrinsic::hexagon_A2_vaddb_map}, |
| 98 | {.Opcode: Hexagon::A2_vaddh, .IntId: Intrinsic::hexagon_A2_vaddh}, |
| 99 | {.Opcode: Hexagon::A2_vaddhs, .IntId: Intrinsic::hexagon_A2_vaddhs}, |
| 100 | {.Opcode: Hexagon::A2_vaddub, .IntId: Intrinsic::hexagon_A2_vaddub}, |
| 101 | {.Opcode: Hexagon::A2_vaddubs, .IntId: Intrinsic::hexagon_A2_vaddubs}, |
| 102 | {.Opcode: Hexagon::A2_vadduhs, .IntId: Intrinsic::hexagon_A2_vadduhs}, |
| 103 | {.Opcode: Hexagon::A2_vaddw, .IntId: Intrinsic::hexagon_A2_vaddw}, |
| 104 | {.Opcode: Hexagon::A2_vaddws, .IntId: Intrinsic::hexagon_A2_vaddws}, |
| 105 | {.Opcode: Hexagon::A2_vavgh, .IntId: Intrinsic::hexagon_A2_vavgh}, |
| 106 | {.Opcode: Hexagon::A2_vavghcr, .IntId: Intrinsic::hexagon_A2_vavghcr}, |
| 107 | {.Opcode: Hexagon::A2_vavghr, .IntId: Intrinsic::hexagon_A2_vavghr}, |
| 108 | {.Opcode: Hexagon::A2_vavgub, .IntId: Intrinsic::hexagon_A2_vavgub}, |
| 109 | {.Opcode: Hexagon::A2_vavgubr, .IntId: Intrinsic::hexagon_A2_vavgubr}, |
| 110 | {.Opcode: Hexagon::A2_vavguh, .IntId: Intrinsic::hexagon_A2_vavguh}, |
| 111 | {.Opcode: Hexagon::A2_vavguhr, .IntId: Intrinsic::hexagon_A2_vavguhr}, |
| 112 | {.Opcode: Hexagon::A2_vavguw, .IntId: Intrinsic::hexagon_A2_vavguw}, |
| 113 | {.Opcode: Hexagon::A2_vavguwr, .IntId: Intrinsic::hexagon_A2_vavguwr}, |
| 114 | {.Opcode: Hexagon::A2_vavgw, .IntId: Intrinsic::hexagon_A2_vavgw}, |
| 115 | {.Opcode: Hexagon::A2_vavgwcr, .IntId: Intrinsic::hexagon_A2_vavgwcr}, |
| 116 | {.Opcode: Hexagon::A2_vavgwr, .IntId: Intrinsic::hexagon_A2_vavgwr}, |
| 117 | {.Opcode: Hexagon::A2_vcmpbeq, .IntId: Intrinsic::hexagon_A2_vcmpbeq}, |
| 118 | {.Opcode: Hexagon::A2_vcmpbgtu, .IntId: Intrinsic::hexagon_A2_vcmpbgtu}, |
| 119 | {.Opcode: Hexagon::A2_vcmpheq, .IntId: Intrinsic::hexagon_A2_vcmpheq}, |
| 120 | {.Opcode: Hexagon::A2_vcmphgt, .IntId: Intrinsic::hexagon_A2_vcmphgt}, |
| 121 | {.Opcode: Hexagon::A2_vcmphgtu, .IntId: Intrinsic::hexagon_A2_vcmphgtu}, |
| 122 | {.Opcode: Hexagon::A2_vcmpweq, .IntId: Intrinsic::hexagon_A2_vcmpweq}, |
| 123 | {.Opcode: Hexagon::A2_vcmpwgt, .IntId: Intrinsic::hexagon_A2_vcmpwgt}, |
| 124 | {.Opcode: Hexagon::A2_vcmpwgtu, .IntId: Intrinsic::hexagon_A2_vcmpwgtu}, |
| 125 | {.Opcode: Hexagon::A2_vconj, .IntId: Intrinsic::hexagon_A2_vconj}, |
| 126 | {.Opcode: Hexagon::A2_vmaxb, .IntId: Intrinsic::hexagon_A2_vmaxb}, |
| 127 | {.Opcode: Hexagon::A2_vmaxh, .IntId: Intrinsic::hexagon_A2_vmaxh}, |
| 128 | {.Opcode: Hexagon::A2_vmaxub, .IntId: Intrinsic::hexagon_A2_vmaxub}, |
| 129 | {.Opcode: Hexagon::A2_vmaxuh, .IntId: Intrinsic::hexagon_A2_vmaxuh}, |
| 130 | {.Opcode: Hexagon::A2_vmaxuw, .IntId: Intrinsic::hexagon_A2_vmaxuw}, |
| 131 | {.Opcode: Hexagon::A2_vmaxw, .IntId: Intrinsic::hexagon_A2_vmaxw}, |
| 132 | {.Opcode: Hexagon::A2_vminb, .IntId: Intrinsic::hexagon_A2_vminb}, |
| 133 | {.Opcode: Hexagon::A2_vminh, .IntId: Intrinsic::hexagon_A2_vminh}, |
| 134 | {.Opcode: Hexagon::A2_vminub, .IntId: Intrinsic::hexagon_A2_vminub}, |
| 135 | {.Opcode: Hexagon::A2_vminuh, .IntId: Intrinsic::hexagon_A2_vminuh}, |
| 136 | {.Opcode: Hexagon::A2_vminuw, .IntId: Intrinsic::hexagon_A2_vminuw}, |
| 137 | {.Opcode: Hexagon::A2_vminw, .IntId: Intrinsic::hexagon_A2_vminw}, |
| 138 | {.Opcode: Hexagon::A2_vnavgh, .IntId: Intrinsic::hexagon_A2_vnavgh}, |
| 139 | {.Opcode: Hexagon::A2_vnavghcr, .IntId: Intrinsic::hexagon_A2_vnavghcr}, |
| 140 | {.Opcode: Hexagon::A2_vnavghr, .IntId: Intrinsic::hexagon_A2_vnavghr}, |
| 141 | {.Opcode: Hexagon::A2_vnavgw, .IntId: Intrinsic::hexagon_A2_vnavgw}, |
| 142 | {.Opcode: Hexagon::A2_vnavgwcr, .IntId: Intrinsic::hexagon_A2_vnavgwcr}, |
| 143 | {.Opcode: Hexagon::A2_vnavgwr, .IntId: Intrinsic::hexagon_A2_vnavgwr}, |
| 144 | {.Opcode: Hexagon::A2_vraddub, .IntId: Intrinsic::hexagon_A2_vraddub}, |
| 145 | {.Opcode: Hexagon::A2_vraddub_acc, .IntId: Intrinsic::hexagon_A2_vraddub_acc}, |
| 146 | {.Opcode: Hexagon::A2_vrsadub, .IntId: Intrinsic::hexagon_A2_vrsadub}, |
| 147 | {.Opcode: Hexagon::A2_vrsadub_acc, .IntId: Intrinsic::hexagon_A2_vrsadub_acc}, |
| 148 | {.Opcode: Hexagon::A2_vsubb_map, .IntId: Intrinsic::hexagon_A2_vsubb_map}, |
| 149 | {.Opcode: Hexagon::A2_vsubh, .IntId: Intrinsic::hexagon_A2_vsubh}, |
| 150 | {.Opcode: Hexagon::A2_vsubhs, .IntId: Intrinsic::hexagon_A2_vsubhs}, |
| 151 | {.Opcode: Hexagon::A2_vsubub, .IntId: Intrinsic::hexagon_A2_vsubub}, |
| 152 | {.Opcode: Hexagon::A2_vsububs, .IntId: Intrinsic::hexagon_A2_vsububs}, |
| 153 | {.Opcode: Hexagon::A2_vsubuhs, .IntId: Intrinsic::hexagon_A2_vsubuhs}, |
| 154 | {.Opcode: Hexagon::A2_vsubw, .IntId: Intrinsic::hexagon_A2_vsubw}, |
| 155 | {.Opcode: Hexagon::A2_vsubws, .IntId: Intrinsic::hexagon_A2_vsubws}, |
| 156 | {.Opcode: Hexagon::A2_xor, .IntId: Intrinsic::hexagon_A2_xor}, |
| 157 | {.Opcode: Hexagon::A2_xorp, .IntId: Intrinsic::hexagon_A2_xorp}, |
| 158 | {.Opcode: Hexagon::A2_zxtb, .IntId: Intrinsic::hexagon_A2_zxtb}, |
| 159 | {.Opcode: Hexagon::A2_zxth, .IntId: Intrinsic::hexagon_A2_zxth}, |
| 160 | {.Opcode: Hexagon::A4_andn, .IntId: Intrinsic::hexagon_A4_andn}, |
| 161 | {.Opcode: Hexagon::A4_andnp, .IntId: Intrinsic::hexagon_A4_andnp}, |
| 162 | {.Opcode: Hexagon::A4_bitsplit, .IntId: Intrinsic::hexagon_A4_bitsplit}, |
| 163 | {.Opcode: Hexagon::A4_bitspliti, .IntId: Intrinsic::hexagon_A4_bitspliti}, |
| 164 | {.Opcode: Hexagon::A4_boundscheck, .IntId: Intrinsic::hexagon_A4_boundscheck}, |
| 165 | {.Opcode: Hexagon::A4_cmpbeq, .IntId: Intrinsic::hexagon_A4_cmpbeq}, |
| 166 | {.Opcode: Hexagon::A4_cmpbeqi, .IntId: Intrinsic::hexagon_A4_cmpbeqi}, |
| 167 | {.Opcode: Hexagon::A4_cmpbgt, .IntId: Intrinsic::hexagon_A4_cmpbgt}, |
| 168 | {.Opcode: Hexagon::A4_cmpbgti, .IntId: Intrinsic::hexagon_A4_cmpbgti}, |
| 169 | {.Opcode: Hexagon::A4_cmpbgtu, .IntId: Intrinsic::hexagon_A4_cmpbgtu}, |
| 170 | {.Opcode: Hexagon::A4_cmpbgtui, .IntId: Intrinsic::hexagon_A4_cmpbgtui}, |
| 171 | {.Opcode: Hexagon::A4_cmpheq, .IntId: Intrinsic::hexagon_A4_cmpheq}, |
| 172 | {.Opcode: Hexagon::A4_cmpheqi, .IntId: Intrinsic::hexagon_A4_cmpheqi}, |
| 173 | {.Opcode: Hexagon::A4_cmphgt, .IntId: Intrinsic::hexagon_A4_cmphgt}, |
| 174 | {.Opcode: Hexagon::A4_cmphgti, .IntId: Intrinsic::hexagon_A4_cmphgti}, |
| 175 | {.Opcode: Hexagon::A4_cmphgtu, .IntId: Intrinsic::hexagon_A4_cmphgtu}, |
| 176 | {.Opcode: Hexagon::A4_cmphgtui, .IntId: Intrinsic::hexagon_A4_cmphgtui}, |
| 177 | {.Opcode: Hexagon::A4_combineir, .IntId: Intrinsic::hexagon_A4_combineir}, |
| 178 | {.Opcode: Hexagon::A4_combineri, .IntId: Intrinsic::hexagon_A4_combineri}, |
| 179 | {.Opcode: Hexagon::A4_cround_ri, .IntId: Intrinsic::hexagon_A4_cround_ri}, |
| 180 | {.Opcode: Hexagon::A4_cround_rr, .IntId: Intrinsic::hexagon_A4_cround_rr}, |
| 181 | {.Opcode: Hexagon::A4_modwrapu, .IntId: Intrinsic::hexagon_A4_modwrapu}, |
| 182 | {.Opcode: Hexagon::A4_orn, .IntId: Intrinsic::hexagon_A4_orn}, |
| 183 | {.Opcode: Hexagon::A4_ornp, .IntId: Intrinsic::hexagon_A4_ornp}, |
| 184 | {.Opcode: Hexagon::A4_rcmpeq, .IntId: Intrinsic::hexagon_A4_rcmpeq}, |
| 185 | {.Opcode: Hexagon::A4_rcmpeqi, .IntId: Intrinsic::hexagon_A4_rcmpeqi}, |
| 186 | {.Opcode: Hexagon::A4_rcmpneq, .IntId: Intrinsic::hexagon_A4_rcmpneq}, |
| 187 | {.Opcode: Hexagon::A4_rcmpneqi, .IntId: Intrinsic::hexagon_A4_rcmpneqi}, |
| 188 | {.Opcode: Hexagon::A4_round_ri, .IntId: Intrinsic::hexagon_A4_round_ri}, |
| 189 | {.Opcode: Hexagon::A4_round_ri_sat, .IntId: Intrinsic::hexagon_A4_round_ri_sat}, |
| 190 | {.Opcode: Hexagon::A4_round_rr, .IntId: Intrinsic::hexagon_A4_round_rr}, |
| 191 | {.Opcode: Hexagon::A4_round_rr_sat, .IntId: Intrinsic::hexagon_A4_round_rr_sat}, |
| 192 | {.Opcode: Hexagon::A4_tlbmatch, .IntId: Intrinsic::hexagon_A4_tlbmatch}, |
| 193 | {.Opcode: Hexagon::A4_vcmpbeq_any, .IntId: Intrinsic::hexagon_A4_vcmpbeq_any}, |
| 194 | {.Opcode: Hexagon::A4_vcmpbeqi, .IntId: Intrinsic::hexagon_A4_vcmpbeqi}, |
| 195 | {.Opcode: Hexagon::A4_vcmpbgt, .IntId: Intrinsic::hexagon_A4_vcmpbgt}, |
| 196 | {.Opcode: Hexagon::A4_vcmpbgti, .IntId: Intrinsic::hexagon_A4_vcmpbgti}, |
| 197 | {.Opcode: Hexagon::A4_vcmpbgtui, .IntId: Intrinsic::hexagon_A4_vcmpbgtui}, |
| 198 | {.Opcode: Hexagon::A4_vcmpheqi, .IntId: Intrinsic::hexagon_A4_vcmpheqi}, |
| 199 | {.Opcode: Hexagon::A4_vcmphgti, .IntId: Intrinsic::hexagon_A4_vcmphgti}, |
| 200 | {.Opcode: Hexagon::A4_vcmphgtui, .IntId: Intrinsic::hexagon_A4_vcmphgtui}, |
| 201 | {.Opcode: Hexagon::A4_vcmpweqi, .IntId: Intrinsic::hexagon_A4_vcmpweqi}, |
| 202 | {.Opcode: Hexagon::A4_vcmpwgti, .IntId: Intrinsic::hexagon_A4_vcmpwgti}, |
| 203 | {.Opcode: Hexagon::A4_vcmpwgtui, .IntId: Intrinsic::hexagon_A4_vcmpwgtui}, |
| 204 | {.Opcode: Hexagon::A4_vrmaxh, .IntId: Intrinsic::hexagon_A4_vrmaxh}, |
| 205 | {.Opcode: Hexagon::A4_vrmaxuh, .IntId: Intrinsic::hexagon_A4_vrmaxuh}, |
| 206 | {.Opcode: Hexagon::A4_vrmaxuw, .IntId: Intrinsic::hexagon_A4_vrmaxuw}, |
| 207 | {.Opcode: Hexagon::A4_vrmaxw, .IntId: Intrinsic::hexagon_A4_vrmaxw}, |
| 208 | {.Opcode: Hexagon::A4_vrminh, .IntId: Intrinsic::hexagon_A4_vrminh}, |
| 209 | {.Opcode: Hexagon::A4_vrminuh, .IntId: Intrinsic::hexagon_A4_vrminuh}, |
| 210 | {.Opcode: Hexagon::A4_vrminuw, .IntId: Intrinsic::hexagon_A4_vrminuw}, |
| 211 | {.Opcode: Hexagon::A4_vrminw, .IntId: Intrinsic::hexagon_A4_vrminw}, |
| 212 | {.Opcode: Hexagon::A5_vaddhubs, .IntId: Intrinsic::hexagon_A5_vaddhubs}, |
| 213 | {.Opcode: Hexagon::A6_vcmpbeq_notany, .IntId: Intrinsic::hexagon_A6_vcmpbeq_notany}, |
| 214 | {.Opcode: Hexagon::A7_clip, .IntId: Intrinsic::hexagon_A7_clip}, |
| 215 | {.Opcode: Hexagon::A7_croundd_ri, .IntId: Intrinsic::hexagon_A7_croundd_ri}, |
| 216 | {.Opcode: Hexagon::A7_croundd_rr, .IntId: Intrinsic::hexagon_A7_croundd_rr}, |
| 217 | {.Opcode: Hexagon::A7_vclip, .IntId: Intrinsic::hexagon_A7_vclip}, |
| 218 | {.Opcode: Hexagon::C2_all8, .IntId: Intrinsic::hexagon_C2_all8}, |
| 219 | {.Opcode: Hexagon::C2_and, .IntId: Intrinsic::hexagon_C2_and}, |
| 220 | {.Opcode: Hexagon::C2_andn, .IntId: Intrinsic::hexagon_C2_andn}, |
| 221 | {.Opcode: Hexagon::C2_any8, .IntId: Intrinsic::hexagon_C2_any8}, |
| 222 | {.Opcode: Hexagon::C2_bitsclr, .IntId: Intrinsic::hexagon_C2_bitsclr}, |
| 223 | {.Opcode: Hexagon::C2_bitsclri, .IntId: Intrinsic::hexagon_C2_bitsclri}, |
| 224 | {.Opcode: Hexagon::C2_bitsset, .IntId: Intrinsic::hexagon_C2_bitsset}, |
| 225 | {.Opcode: Hexagon::C2_cmpeq, .IntId: Intrinsic::hexagon_C2_cmpeq}, |
| 226 | {.Opcode: Hexagon::C2_cmpeqi, .IntId: Intrinsic::hexagon_C2_cmpeqi}, |
| 227 | {.Opcode: Hexagon::C2_cmpeqp, .IntId: Intrinsic::hexagon_C2_cmpeqp}, |
| 228 | {.Opcode: Hexagon::C2_cmpgei, .IntId: Intrinsic::hexagon_C2_cmpgei}, |
| 229 | {.Opcode: Hexagon::C2_cmpgeui, .IntId: Intrinsic::hexagon_C2_cmpgeui}, |
| 230 | {.Opcode: Hexagon::C2_cmpgt, .IntId: Intrinsic::hexagon_C2_cmpgt}, |
| 231 | {.Opcode: Hexagon::C2_cmpgti, .IntId: Intrinsic::hexagon_C2_cmpgti}, |
| 232 | {.Opcode: Hexagon::C2_cmpgtp, .IntId: Intrinsic::hexagon_C2_cmpgtp}, |
| 233 | {.Opcode: Hexagon::C2_cmpgtu, .IntId: Intrinsic::hexagon_C2_cmpgtu}, |
| 234 | {.Opcode: Hexagon::C2_cmpgtui, .IntId: Intrinsic::hexagon_C2_cmpgtui}, |
| 235 | {.Opcode: Hexagon::C2_cmpgtup, .IntId: Intrinsic::hexagon_C2_cmpgtup}, |
| 236 | {.Opcode: Hexagon::C2_cmplt, .IntId: Intrinsic::hexagon_C2_cmplt}, |
| 237 | {.Opcode: Hexagon::C2_cmpltu, .IntId: Intrinsic::hexagon_C2_cmpltu}, |
| 238 | {.Opcode: Hexagon::C2_mask, .IntId: Intrinsic::hexagon_C2_mask}, |
| 239 | {.Opcode: Hexagon::C2_mux, .IntId: Intrinsic::hexagon_C2_mux}, |
| 240 | {.Opcode: Hexagon::C2_muxii, .IntId: Intrinsic::hexagon_C2_muxii}, |
| 241 | {.Opcode: Hexagon::C2_muxir, .IntId: Intrinsic::hexagon_C2_muxir}, |
| 242 | {.Opcode: Hexagon::C2_muxri, .IntId: Intrinsic::hexagon_C2_muxri}, |
| 243 | {.Opcode: Hexagon::C2_not, .IntId: Intrinsic::hexagon_C2_not}, |
| 244 | {.Opcode: Hexagon::C2_or, .IntId: Intrinsic::hexagon_C2_or}, |
| 245 | {.Opcode: Hexagon::C2_orn, .IntId: Intrinsic::hexagon_C2_orn}, |
| 246 | {.Opcode: Hexagon::C2_pxfer_map, .IntId: Intrinsic::hexagon_C2_pxfer_map}, |
| 247 | {.Opcode: Hexagon::C2_tfrpr, .IntId: Intrinsic::hexagon_C2_tfrpr}, |
| 248 | {.Opcode: Hexagon::C2_tfrrp, .IntId: Intrinsic::hexagon_C2_tfrrp}, |
| 249 | {.Opcode: Hexagon::C2_vitpack, .IntId: Intrinsic::hexagon_C2_vitpack}, |
| 250 | {.Opcode: Hexagon::C2_vmux, .IntId: Intrinsic::hexagon_C2_vmux}, |
| 251 | {.Opcode: Hexagon::C2_xor, .IntId: Intrinsic::hexagon_C2_xor}, |
| 252 | {.Opcode: Hexagon::C4_and_and, .IntId: Intrinsic::hexagon_C4_and_and}, |
| 253 | {.Opcode: Hexagon::C4_and_andn, .IntId: Intrinsic::hexagon_C4_and_andn}, |
| 254 | {.Opcode: Hexagon::C4_and_or, .IntId: Intrinsic::hexagon_C4_and_or}, |
| 255 | {.Opcode: Hexagon::C4_and_orn, .IntId: Intrinsic::hexagon_C4_and_orn}, |
| 256 | {.Opcode: Hexagon::C4_cmplte, .IntId: Intrinsic::hexagon_C4_cmplte}, |
| 257 | {.Opcode: Hexagon::C4_cmpltei, .IntId: Intrinsic::hexagon_C4_cmpltei}, |
| 258 | {.Opcode: Hexagon::C4_cmplteu, .IntId: Intrinsic::hexagon_C4_cmplteu}, |
| 259 | {.Opcode: Hexagon::C4_cmplteui, .IntId: Intrinsic::hexagon_C4_cmplteui}, |
| 260 | {.Opcode: Hexagon::C4_cmpneq, .IntId: Intrinsic::hexagon_C4_cmpneq}, |
| 261 | {.Opcode: Hexagon::C4_cmpneqi, .IntId: Intrinsic::hexagon_C4_cmpneqi}, |
| 262 | {.Opcode: Hexagon::C4_fastcorner9, .IntId: Intrinsic::hexagon_C4_fastcorner9}, |
| 263 | {.Opcode: Hexagon::C4_fastcorner9_not, .IntId: Intrinsic::hexagon_C4_fastcorner9_not}, |
| 264 | {.Opcode: Hexagon::C4_nbitsclr, .IntId: Intrinsic::hexagon_C4_nbitsclr}, |
| 265 | {.Opcode: Hexagon::C4_nbitsclri, .IntId: Intrinsic::hexagon_C4_nbitsclri}, |
| 266 | {.Opcode: Hexagon::C4_nbitsset, .IntId: Intrinsic::hexagon_C4_nbitsset}, |
| 267 | {.Opcode: Hexagon::C4_or_and, .IntId: Intrinsic::hexagon_C4_or_and}, |
| 268 | {.Opcode: Hexagon::C4_or_andn, .IntId: Intrinsic::hexagon_C4_or_andn}, |
| 269 | {.Opcode: Hexagon::C4_or_or, .IntId: Intrinsic::hexagon_C4_or_or}, |
| 270 | {.Opcode: Hexagon::C4_or_orn, .IntId: Intrinsic::hexagon_C4_or_orn}, |
| 271 | {.Opcode: Hexagon::F2_conv_d2df, .IntId: Intrinsic::hexagon_F2_conv_d2df}, |
| 272 | {.Opcode: Hexagon::F2_conv_d2sf, .IntId: Intrinsic::hexagon_F2_conv_d2sf}, |
| 273 | {.Opcode: Hexagon::F2_conv_df2d, .IntId: Intrinsic::hexagon_F2_conv_df2d}, |
| 274 | {.Opcode: Hexagon::F2_conv_df2d_chop, .IntId: Intrinsic::hexagon_F2_conv_df2d_chop}, |
| 275 | {.Opcode: Hexagon::F2_conv_df2sf, .IntId: Intrinsic::hexagon_F2_conv_df2sf}, |
| 276 | {.Opcode: Hexagon::F2_conv_df2ud, .IntId: Intrinsic::hexagon_F2_conv_df2ud}, |
| 277 | {.Opcode: Hexagon::F2_conv_df2ud_chop, .IntId: Intrinsic::hexagon_F2_conv_df2ud_chop}, |
| 278 | {.Opcode: Hexagon::F2_conv_df2uw, .IntId: Intrinsic::hexagon_F2_conv_df2uw}, |
| 279 | {.Opcode: Hexagon::F2_conv_df2uw_chop, .IntId: Intrinsic::hexagon_F2_conv_df2uw_chop}, |
| 280 | {.Opcode: Hexagon::F2_conv_df2w, .IntId: Intrinsic::hexagon_F2_conv_df2w}, |
| 281 | {.Opcode: Hexagon::F2_conv_df2w_chop, .IntId: Intrinsic::hexagon_F2_conv_df2w_chop}, |
| 282 | {.Opcode: Hexagon::F2_conv_sf2d, .IntId: Intrinsic::hexagon_F2_conv_sf2d}, |
| 283 | {.Opcode: Hexagon::F2_conv_sf2d_chop, .IntId: Intrinsic::hexagon_F2_conv_sf2d_chop}, |
| 284 | {.Opcode: Hexagon::F2_conv_sf2df, .IntId: Intrinsic::hexagon_F2_conv_sf2df}, |
| 285 | {.Opcode: Hexagon::F2_conv_sf2ud, .IntId: Intrinsic::hexagon_F2_conv_sf2ud}, |
| 286 | {.Opcode: Hexagon::F2_conv_sf2ud_chop, .IntId: Intrinsic::hexagon_F2_conv_sf2ud_chop}, |
| 287 | {.Opcode: Hexagon::F2_conv_sf2uw, .IntId: Intrinsic::hexagon_F2_conv_sf2uw}, |
| 288 | {.Opcode: Hexagon::F2_conv_sf2uw_chop, .IntId: Intrinsic::hexagon_F2_conv_sf2uw_chop}, |
| 289 | {.Opcode: Hexagon::F2_conv_sf2w, .IntId: Intrinsic::hexagon_F2_conv_sf2w}, |
| 290 | {.Opcode: Hexagon::F2_conv_sf2w_chop, .IntId: Intrinsic::hexagon_F2_conv_sf2w_chop}, |
| 291 | {.Opcode: Hexagon::F2_conv_ud2df, .IntId: Intrinsic::hexagon_F2_conv_ud2df}, |
| 292 | {.Opcode: Hexagon::F2_conv_ud2sf, .IntId: Intrinsic::hexagon_F2_conv_ud2sf}, |
| 293 | {.Opcode: Hexagon::F2_conv_uw2df, .IntId: Intrinsic::hexagon_F2_conv_uw2df}, |
| 294 | {.Opcode: Hexagon::F2_conv_uw2sf, .IntId: Intrinsic::hexagon_F2_conv_uw2sf}, |
| 295 | {.Opcode: Hexagon::F2_conv_w2df, .IntId: Intrinsic::hexagon_F2_conv_w2df}, |
| 296 | {.Opcode: Hexagon::F2_conv_w2sf, .IntId: Intrinsic::hexagon_F2_conv_w2sf}, |
| 297 | {.Opcode: Hexagon::F2_dfadd, .IntId: Intrinsic::hexagon_F2_dfadd}, |
| 298 | {.Opcode: Hexagon::F2_dfclass, .IntId: Intrinsic::hexagon_F2_dfclass}, |
| 299 | {.Opcode: Hexagon::F2_dfcmpeq, .IntId: Intrinsic::hexagon_F2_dfcmpeq}, |
| 300 | {.Opcode: Hexagon::F2_dfcmpge, .IntId: Intrinsic::hexagon_F2_dfcmpge}, |
| 301 | {.Opcode: Hexagon::F2_dfcmpgt, .IntId: Intrinsic::hexagon_F2_dfcmpgt}, |
| 302 | {.Opcode: Hexagon::F2_dfcmpuo, .IntId: Intrinsic::hexagon_F2_dfcmpuo}, |
| 303 | {.Opcode: Hexagon::F2_dfimm_n, .IntId: Intrinsic::hexagon_F2_dfimm_n}, |
| 304 | {.Opcode: Hexagon::F2_dfimm_p, .IntId: Intrinsic::hexagon_F2_dfimm_p}, |
| 305 | {.Opcode: Hexagon::F2_dfmax, .IntId: Intrinsic::hexagon_F2_dfmax}, |
| 306 | {.Opcode: Hexagon::F2_dfmin, .IntId: Intrinsic::hexagon_F2_dfmin}, |
| 307 | {.Opcode: Hexagon::F2_dfmpyfix, .IntId: Intrinsic::hexagon_F2_dfmpyfix}, |
| 308 | {.Opcode: Hexagon::F2_dfmpyhh, .IntId: Intrinsic::hexagon_F2_dfmpyhh}, |
| 309 | {.Opcode: Hexagon::F2_dfmpylh, .IntId: Intrinsic::hexagon_F2_dfmpylh}, |
| 310 | {.Opcode: Hexagon::F2_dfmpyll, .IntId: Intrinsic::hexagon_F2_dfmpyll}, |
| 311 | {.Opcode: Hexagon::F2_dfsub, .IntId: Intrinsic::hexagon_F2_dfsub}, |
| 312 | {.Opcode: Hexagon::F2_sfadd, .IntId: Intrinsic::hexagon_F2_sfadd}, |
| 313 | {.Opcode: Hexagon::F2_sfclass, .IntId: Intrinsic::hexagon_F2_sfclass}, |
| 314 | {.Opcode: Hexagon::F2_sfcmpeq, .IntId: Intrinsic::hexagon_F2_sfcmpeq}, |
| 315 | {.Opcode: Hexagon::F2_sfcmpge, .IntId: Intrinsic::hexagon_F2_sfcmpge}, |
| 316 | {.Opcode: Hexagon::F2_sfcmpgt, .IntId: Intrinsic::hexagon_F2_sfcmpgt}, |
| 317 | {.Opcode: Hexagon::F2_sfcmpuo, .IntId: Intrinsic::hexagon_F2_sfcmpuo}, |
| 318 | {.Opcode: Hexagon::F2_sffixupd, .IntId: Intrinsic::hexagon_F2_sffixupd}, |
| 319 | {.Opcode: Hexagon::F2_sffixupn, .IntId: Intrinsic::hexagon_F2_sffixupn}, |
| 320 | {.Opcode: Hexagon::F2_sffixupr, .IntId: Intrinsic::hexagon_F2_sffixupr}, |
| 321 | {.Opcode: Hexagon::F2_sffma, .IntId: Intrinsic::hexagon_F2_sffma}, |
| 322 | {.Opcode: Hexagon::F2_sffma_lib, .IntId: Intrinsic::hexagon_F2_sffma_lib}, |
| 323 | {.Opcode: Hexagon::F2_sffma_sc, .IntId: Intrinsic::hexagon_F2_sffma_sc}, |
| 324 | {.Opcode: Hexagon::F2_sffms, .IntId: Intrinsic::hexagon_F2_sffms}, |
| 325 | {.Opcode: Hexagon::F2_sffms_lib, .IntId: Intrinsic::hexagon_F2_sffms_lib}, |
| 326 | {.Opcode: Hexagon::F2_sfimm_n, .IntId: Intrinsic::hexagon_F2_sfimm_n}, |
| 327 | {.Opcode: Hexagon::F2_sfimm_p, .IntId: Intrinsic::hexagon_F2_sfimm_p}, |
| 328 | {.Opcode: Hexagon::F2_sfmax, .IntId: Intrinsic::hexagon_F2_sfmax}, |
| 329 | {.Opcode: Hexagon::F2_sfmin, .IntId: Intrinsic::hexagon_F2_sfmin}, |
| 330 | {.Opcode: Hexagon::F2_sfmpy, .IntId: Intrinsic::hexagon_F2_sfmpy}, |
| 331 | {.Opcode: Hexagon::F2_sfsub, .IntId: Intrinsic::hexagon_F2_sfsub}, |
| 332 | {.Opcode: Hexagon::L2_loadrb_pbr, .IntId: Intrinsic::hexagon_L2_loadrb_pbr}, |
| 333 | {.Opcode: Hexagon::L2_loadrb_pci, .IntId: Intrinsic::hexagon_L2_loadrb_pci}, |
| 334 | {.Opcode: Hexagon::L2_loadrb_pcr, .IntId: Intrinsic::hexagon_L2_loadrb_pcr}, |
| 335 | {.Opcode: Hexagon::L2_loadrd_pbr, .IntId: Intrinsic::hexagon_L2_loadrd_pbr}, |
| 336 | {.Opcode: Hexagon::L2_loadrd_pci, .IntId: Intrinsic::hexagon_L2_loadrd_pci}, |
| 337 | {.Opcode: Hexagon::L2_loadrd_pcr, .IntId: Intrinsic::hexagon_L2_loadrd_pcr}, |
| 338 | {.Opcode: Hexagon::L2_loadrh_pbr, .IntId: Intrinsic::hexagon_L2_loadrh_pbr}, |
| 339 | {.Opcode: Hexagon::L2_loadrh_pci, .IntId: Intrinsic::hexagon_L2_loadrh_pci}, |
| 340 | {.Opcode: Hexagon::L2_loadrh_pcr, .IntId: Intrinsic::hexagon_L2_loadrh_pcr}, |
| 341 | {.Opcode: Hexagon::L2_loadri_pbr, .IntId: Intrinsic::hexagon_L2_loadri_pbr}, |
| 342 | {.Opcode: Hexagon::L2_loadri_pci, .IntId: Intrinsic::hexagon_L2_loadri_pci}, |
| 343 | {.Opcode: Hexagon::L2_loadri_pcr, .IntId: Intrinsic::hexagon_L2_loadri_pcr}, |
| 344 | {.Opcode: Hexagon::L2_loadrub_pbr, .IntId: Intrinsic::hexagon_L2_loadrub_pbr}, |
| 345 | {.Opcode: Hexagon::L2_loadrub_pci, .IntId: Intrinsic::hexagon_L2_loadrub_pci}, |
| 346 | {.Opcode: Hexagon::L2_loadrub_pcr, .IntId: Intrinsic::hexagon_L2_loadrub_pcr}, |
| 347 | {.Opcode: Hexagon::L2_loadruh_pbr, .IntId: Intrinsic::hexagon_L2_loadruh_pbr}, |
| 348 | {.Opcode: Hexagon::L2_loadruh_pci, .IntId: Intrinsic::hexagon_L2_loadruh_pci}, |
| 349 | {.Opcode: Hexagon::L2_loadruh_pcr, .IntId: Intrinsic::hexagon_L2_loadruh_pcr}, |
| 350 | {.Opcode: Hexagon::L2_loadw_locked, .IntId: Intrinsic::hexagon_L2_loadw_locked}, |
| 351 | {.Opcode: Hexagon::L4_loadd_locked, .IntId: Intrinsic::hexagon_L4_loadd_locked}, |
| 352 | {.Opcode: Hexagon::M2_acci, .IntId: Intrinsic::hexagon_M2_acci}, |
| 353 | {.Opcode: Hexagon::M2_accii, .IntId: Intrinsic::hexagon_M2_accii}, |
| 354 | {.Opcode: Hexagon::M2_cmaci_s0, .IntId: Intrinsic::hexagon_M2_cmaci_s0}, |
| 355 | {.Opcode: Hexagon::M2_cmacr_s0, .IntId: Intrinsic::hexagon_M2_cmacr_s0}, |
| 356 | {.Opcode: Hexagon::M2_cmacs_s0, .IntId: Intrinsic::hexagon_M2_cmacs_s0}, |
| 357 | {.Opcode: Hexagon::M2_cmacs_s1, .IntId: Intrinsic::hexagon_M2_cmacs_s1}, |
| 358 | {.Opcode: Hexagon::M2_cmacsc_s0, .IntId: Intrinsic::hexagon_M2_cmacsc_s0}, |
| 359 | {.Opcode: Hexagon::M2_cmacsc_s1, .IntId: Intrinsic::hexagon_M2_cmacsc_s1}, |
| 360 | {.Opcode: Hexagon::M2_cmpyi_s0, .IntId: Intrinsic::hexagon_M2_cmpyi_s0}, |
| 361 | {.Opcode: Hexagon::M2_cmpyr_s0, .IntId: Intrinsic::hexagon_M2_cmpyr_s0}, |
| 362 | {.Opcode: Hexagon::M2_cmpyrs_s0, .IntId: Intrinsic::hexagon_M2_cmpyrs_s0}, |
| 363 | {.Opcode: Hexagon::M2_cmpyrs_s1, .IntId: Intrinsic::hexagon_M2_cmpyrs_s1}, |
| 364 | {.Opcode: Hexagon::M2_cmpyrsc_s0, .IntId: Intrinsic::hexagon_M2_cmpyrsc_s0}, |
| 365 | {.Opcode: Hexagon::M2_cmpyrsc_s1, .IntId: Intrinsic::hexagon_M2_cmpyrsc_s1}, |
| 366 | {.Opcode: Hexagon::M2_cmpys_s0, .IntId: Intrinsic::hexagon_M2_cmpys_s0}, |
| 367 | {.Opcode: Hexagon::M2_cmpys_s1, .IntId: Intrinsic::hexagon_M2_cmpys_s1}, |
| 368 | {.Opcode: Hexagon::M2_cmpysc_s0, .IntId: Intrinsic::hexagon_M2_cmpysc_s0}, |
| 369 | {.Opcode: Hexagon::M2_cmpysc_s1, .IntId: Intrinsic::hexagon_M2_cmpysc_s1}, |
| 370 | {.Opcode: Hexagon::M2_cnacs_s0, .IntId: Intrinsic::hexagon_M2_cnacs_s0}, |
| 371 | {.Opcode: Hexagon::M2_cnacs_s1, .IntId: Intrinsic::hexagon_M2_cnacs_s1}, |
| 372 | {.Opcode: Hexagon::M2_cnacsc_s0, .IntId: Intrinsic::hexagon_M2_cnacsc_s0}, |
| 373 | {.Opcode: Hexagon::M2_cnacsc_s1, .IntId: Intrinsic::hexagon_M2_cnacsc_s1}, |
| 374 | {.Opcode: Hexagon::M2_dpmpyss_acc_s0, .IntId: Intrinsic::hexagon_M2_dpmpyss_acc_s0}, |
| 375 | {.Opcode: Hexagon::M2_dpmpyss_nac_s0, .IntId: Intrinsic::hexagon_M2_dpmpyss_nac_s0}, |
| 376 | {.Opcode: Hexagon::M2_dpmpyss_rnd_s0, .IntId: Intrinsic::hexagon_M2_dpmpyss_rnd_s0}, |
| 377 | {.Opcode: Hexagon::M2_dpmpyss_s0, .IntId: Intrinsic::hexagon_M2_dpmpyss_s0}, |
| 378 | {.Opcode: Hexagon::M2_dpmpyuu_acc_s0, .IntId: Intrinsic::hexagon_M2_dpmpyuu_acc_s0}, |
| 379 | {.Opcode: Hexagon::M2_dpmpyuu_nac_s0, .IntId: Intrinsic::hexagon_M2_dpmpyuu_nac_s0}, |
| 380 | {.Opcode: Hexagon::M2_dpmpyuu_s0, .IntId: Intrinsic::hexagon_M2_dpmpyuu_s0}, |
| 381 | {.Opcode: Hexagon::M2_hmmpyh_rs1, .IntId: Intrinsic::hexagon_M2_hmmpyh_rs1}, |
| 382 | {.Opcode: Hexagon::M2_hmmpyh_s1, .IntId: Intrinsic::hexagon_M2_hmmpyh_s1}, |
| 383 | {.Opcode: Hexagon::M2_hmmpyl_rs1, .IntId: Intrinsic::hexagon_M2_hmmpyl_rs1}, |
| 384 | {.Opcode: Hexagon::M2_hmmpyl_s1, .IntId: Intrinsic::hexagon_M2_hmmpyl_s1}, |
| 385 | {.Opcode: Hexagon::M2_maci, .IntId: Intrinsic::hexagon_M2_maci}, |
| 386 | {.Opcode: Hexagon::M2_macsin, .IntId: Intrinsic::hexagon_M2_macsin}, |
| 387 | {.Opcode: Hexagon::M2_macsip, .IntId: Intrinsic::hexagon_M2_macsip}, |
| 388 | {.Opcode: Hexagon::M2_mmachs_rs0, .IntId: Intrinsic::hexagon_M2_mmachs_rs0}, |
| 389 | {.Opcode: Hexagon::M2_mmachs_rs1, .IntId: Intrinsic::hexagon_M2_mmachs_rs1}, |
| 390 | {.Opcode: Hexagon::M2_mmachs_s0, .IntId: Intrinsic::hexagon_M2_mmachs_s0}, |
| 391 | {.Opcode: Hexagon::M2_mmachs_s1, .IntId: Intrinsic::hexagon_M2_mmachs_s1}, |
| 392 | {.Opcode: Hexagon::M2_mmacls_rs0, .IntId: Intrinsic::hexagon_M2_mmacls_rs0}, |
| 393 | {.Opcode: Hexagon::M2_mmacls_rs1, .IntId: Intrinsic::hexagon_M2_mmacls_rs1}, |
| 394 | {.Opcode: Hexagon::M2_mmacls_s0, .IntId: Intrinsic::hexagon_M2_mmacls_s0}, |
| 395 | {.Opcode: Hexagon::M2_mmacls_s1, .IntId: Intrinsic::hexagon_M2_mmacls_s1}, |
| 396 | {.Opcode: Hexagon::M2_mmacuhs_rs0, .IntId: Intrinsic::hexagon_M2_mmacuhs_rs0}, |
| 397 | {.Opcode: Hexagon::M2_mmacuhs_rs1, .IntId: Intrinsic::hexagon_M2_mmacuhs_rs1}, |
| 398 | {.Opcode: Hexagon::M2_mmacuhs_s0, .IntId: Intrinsic::hexagon_M2_mmacuhs_s0}, |
| 399 | {.Opcode: Hexagon::M2_mmacuhs_s1, .IntId: Intrinsic::hexagon_M2_mmacuhs_s1}, |
| 400 | {.Opcode: Hexagon::M2_mmaculs_rs0, .IntId: Intrinsic::hexagon_M2_mmaculs_rs0}, |
| 401 | {.Opcode: Hexagon::M2_mmaculs_rs1, .IntId: Intrinsic::hexagon_M2_mmaculs_rs1}, |
| 402 | {.Opcode: Hexagon::M2_mmaculs_s0, .IntId: Intrinsic::hexagon_M2_mmaculs_s0}, |
| 403 | {.Opcode: Hexagon::M2_mmaculs_s1, .IntId: Intrinsic::hexagon_M2_mmaculs_s1}, |
| 404 | {.Opcode: Hexagon::M2_mmpyh_rs0, .IntId: Intrinsic::hexagon_M2_mmpyh_rs0}, |
| 405 | {.Opcode: Hexagon::M2_mmpyh_rs1, .IntId: Intrinsic::hexagon_M2_mmpyh_rs1}, |
| 406 | {.Opcode: Hexagon::M2_mmpyh_s0, .IntId: Intrinsic::hexagon_M2_mmpyh_s0}, |
| 407 | {.Opcode: Hexagon::M2_mmpyh_s1, .IntId: Intrinsic::hexagon_M2_mmpyh_s1}, |
| 408 | {.Opcode: Hexagon::M2_mmpyl_rs0, .IntId: Intrinsic::hexagon_M2_mmpyl_rs0}, |
| 409 | {.Opcode: Hexagon::M2_mmpyl_rs1, .IntId: Intrinsic::hexagon_M2_mmpyl_rs1}, |
| 410 | {.Opcode: Hexagon::M2_mmpyl_s0, .IntId: Intrinsic::hexagon_M2_mmpyl_s0}, |
| 411 | {.Opcode: Hexagon::M2_mmpyl_s1, .IntId: Intrinsic::hexagon_M2_mmpyl_s1}, |
| 412 | {.Opcode: Hexagon::M2_mmpyuh_rs0, .IntId: Intrinsic::hexagon_M2_mmpyuh_rs0}, |
| 413 | {.Opcode: Hexagon::M2_mmpyuh_rs1, .IntId: Intrinsic::hexagon_M2_mmpyuh_rs1}, |
| 414 | {.Opcode: Hexagon::M2_mmpyuh_s0, .IntId: Intrinsic::hexagon_M2_mmpyuh_s0}, |
| 415 | {.Opcode: Hexagon::M2_mmpyuh_s1, .IntId: Intrinsic::hexagon_M2_mmpyuh_s1}, |
| 416 | {.Opcode: Hexagon::M2_mmpyul_rs0, .IntId: Intrinsic::hexagon_M2_mmpyul_rs0}, |
| 417 | {.Opcode: Hexagon::M2_mmpyul_rs1, .IntId: Intrinsic::hexagon_M2_mmpyul_rs1}, |
| 418 | {.Opcode: Hexagon::M2_mmpyul_s0, .IntId: Intrinsic::hexagon_M2_mmpyul_s0}, |
| 419 | {.Opcode: Hexagon::M2_mmpyul_s1, .IntId: Intrinsic::hexagon_M2_mmpyul_s1}, |
| 420 | {.Opcode: Hexagon::M2_mnaci, .IntId: Intrinsic::hexagon_M2_mnaci}, |
| 421 | {.Opcode: Hexagon::M2_mpy_acc_hh_s0, .IntId: Intrinsic::hexagon_M2_mpy_acc_hh_s0}, |
| 422 | {.Opcode: Hexagon::M2_mpy_acc_hh_s1, .IntId: Intrinsic::hexagon_M2_mpy_acc_hh_s1}, |
| 423 | {.Opcode: Hexagon::M2_mpy_acc_hl_s0, .IntId: Intrinsic::hexagon_M2_mpy_acc_hl_s0}, |
| 424 | {.Opcode: Hexagon::M2_mpy_acc_hl_s1, .IntId: Intrinsic::hexagon_M2_mpy_acc_hl_s1}, |
| 425 | {.Opcode: Hexagon::M2_mpy_acc_lh_s0, .IntId: Intrinsic::hexagon_M2_mpy_acc_lh_s0}, |
| 426 | {.Opcode: Hexagon::M2_mpy_acc_lh_s1, .IntId: Intrinsic::hexagon_M2_mpy_acc_lh_s1}, |
| 427 | {.Opcode: Hexagon::M2_mpy_acc_ll_s0, .IntId: Intrinsic::hexagon_M2_mpy_acc_ll_s0}, |
| 428 | {.Opcode: Hexagon::M2_mpy_acc_ll_s1, .IntId: Intrinsic::hexagon_M2_mpy_acc_ll_s1}, |
| 429 | {.Opcode: Hexagon::M2_mpy_acc_sat_hh_s0, .IntId: Intrinsic::hexagon_M2_mpy_acc_sat_hh_s0}, |
| 430 | {.Opcode: Hexagon::M2_mpy_acc_sat_hh_s1, .IntId: Intrinsic::hexagon_M2_mpy_acc_sat_hh_s1}, |
| 431 | {.Opcode: Hexagon::M2_mpy_acc_sat_hl_s0, .IntId: Intrinsic::hexagon_M2_mpy_acc_sat_hl_s0}, |
| 432 | {.Opcode: Hexagon::M2_mpy_acc_sat_hl_s1, .IntId: Intrinsic::hexagon_M2_mpy_acc_sat_hl_s1}, |
| 433 | {.Opcode: Hexagon::M2_mpy_acc_sat_lh_s0, .IntId: Intrinsic::hexagon_M2_mpy_acc_sat_lh_s0}, |
| 434 | {.Opcode: Hexagon::M2_mpy_acc_sat_lh_s1, .IntId: Intrinsic::hexagon_M2_mpy_acc_sat_lh_s1}, |
| 435 | {.Opcode: Hexagon::M2_mpy_acc_sat_ll_s0, .IntId: Intrinsic::hexagon_M2_mpy_acc_sat_ll_s0}, |
| 436 | {.Opcode: Hexagon::M2_mpy_acc_sat_ll_s1, .IntId: Intrinsic::hexagon_M2_mpy_acc_sat_ll_s1}, |
| 437 | {.Opcode: Hexagon::M2_mpy_hh_s0, .IntId: Intrinsic::hexagon_M2_mpy_hh_s0}, |
| 438 | {.Opcode: Hexagon::M2_mpy_hh_s1, .IntId: Intrinsic::hexagon_M2_mpy_hh_s1}, |
| 439 | {.Opcode: Hexagon::M2_mpy_hl_s0, .IntId: Intrinsic::hexagon_M2_mpy_hl_s0}, |
| 440 | {.Opcode: Hexagon::M2_mpy_hl_s1, .IntId: Intrinsic::hexagon_M2_mpy_hl_s1}, |
| 441 | {.Opcode: Hexagon::M2_mpy_lh_s0, .IntId: Intrinsic::hexagon_M2_mpy_lh_s0}, |
| 442 | {.Opcode: Hexagon::M2_mpy_lh_s1, .IntId: Intrinsic::hexagon_M2_mpy_lh_s1}, |
| 443 | {.Opcode: Hexagon::M2_mpy_ll_s0, .IntId: Intrinsic::hexagon_M2_mpy_ll_s0}, |
| 444 | {.Opcode: Hexagon::M2_mpy_ll_s1, .IntId: Intrinsic::hexagon_M2_mpy_ll_s1}, |
| 445 | {.Opcode: Hexagon::M2_mpy_nac_hh_s0, .IntId: Intrinsic::hexagon_M2_mpy_nac_hh_s0}, |
| 446 | {.Opcode: Hexagon::M2_mpy_nac_hh_s1, .IntId: Intrinsic::hexagon_M2_mpy_nac_hh_s1}, |
| 447 | {.Opcode: Hexagon::M2_mpy_nac_hl_s0, .IntId: Intrinsic::hexagon_M2_mpy_nac_hl_s0}, |
| 448 | {.Opcode: Hexagon::M2_mpy_nac_hl_s1, .IntId: Intrinsic::hexagon_M2_mpy_nac_hl_s1}, |
| 449 | {.Opcode: Hexagon::M2_mpy_nac_lh_s0, .IntId: Intrinsic::hexagon_M2_mpy_nac_lh_s0}, |
| 450 | {.Opcode: Hexagon::M2_mpy_nac_lh_s1, .IntId: Intrinsic::hexagon_M2_mpy_nac_lh_s1}, |
| 451 | {.Opcode: Hexagon::M2_mpy_nac_ll_s0, .IntId: Intrinsic::hexagon_M2_mpy_nac_ll_s0}, |
| 452 | {.Opcode: Hexagon::M2_mpy_nac_ll_s1, .IntId: Intrinsic::hexagon_M2_mpy_nac_ll_s1}, |
| 453 | {.Opcode: Hexagon::M2_mpy_nac_sat_hh_s0, .IntId: Intrinsic::hexagon_M2_mpy_nac_sat_hh_s0}, |
| 454 | {.Opcode: Hexagon::M2_mpy_nac_sat_hh_s1, .IntId: Intrinsic::hexagon_M2_mpy_nac_sat_hh_s1}, |
| 455 | {.Opcode: Hexagon::M2_mpy_nac_sat_hl_s0, .IntId: Intrinsic::hexagon_M2_mpy_nac_sat_hl_s0}, |
| 456 | {.Opcode: Hexagon::M2_mpy_nac_sat_hl_s1, .IntId: Intrinsic::hexagon_M2_mpy_nac_sat_hl_s1}, |
| 457 | {.Opcode: Hexagon::M2_mpy_nac_sat_lh_s0, .IntId: Intrinsic::hexagon_M2_mpy_nac_sat_lh_s0}, |
| 458 | {.Opcode: Hexagon::M2_mpy_nac_sat_lh_s1, .IntId: Intrinsic::hexagon_M2_mpy_nac_sat_lh_s1}, |
| 459 | {.Opcode: Hexagon::M2_mpy_nac_sat_ll_s0, .IntId: Intrinsic::hexagon_M2_mpy_nac_sat_ll_s0}, |
| 460 | {.Opcode: Hexagon::M2_mpy_nac_sat_ll_s1, .IntId: Intrinsic::hexagon_M2_mpy_nac_sat_ll_s1}, |
| 461 | {.Opcode: Hexagon::M2_mpy_rnd_hh_s0, .IntId: Intrinsic::hexagon_M2_mpy_rnd_hh_s0}, |
| 462 | {.Opcode: Hexagon::M2_mpy_rnd_hh_s1, .IntId: Intrinsic::hexagon_M2_mpy_rnd_hh_s1}, |
| 463 | {.Opcode: Hexagon::M2_mpy_rnd_hl_s0, .IntId: Intrinsic::hexagon_M2_mpy_rnd_hl_s0}, |
| 464 | {.Opcode: Hexagon::M2_mpy_rnd_hl_s1, .IntId: Intrinsic::hexagon_M2_mpy_rnd_hl_s1}, |
| 465 | {.Opcode: Hexagon::M2_mpy_rnd_lh_s0, .IntId: Intrinsic::hexagon_M2_mpy_rnd_lh_s0}, |
| 466 | {.Opcode: Hexagon::M2_mpy_rnd_lh_s1, .IntId: Intrinsic::hexagon_M2_mpy_rnd_lh_s1}, |
| 467 | {.Opcode: Hexagon::M2_mpy_rnd_ll_s0, .IntId: Intrinsic::hexagon_M2_mpy_rnd_ll_s0}, |
| 468 | {.Opcode: Hexagon::M2_mpy_rnd_ll_s1, .IntId: Intrinsic::hexagon_M2_mpy_rnd_ll_s1}, |
| 469 | {.Opcode: Hexagon::M2_mpy_sat_hh_s0, .IntId: Intrinsic::hexagon_M2_mpy_sat_hh_s0}, |
| 470 | {.Opcode: Hexagon::M2_mpy_sat_hh_s1, .IntId: Intrinsic::hexagon_M2_mpy_sat_hh_s1}, |
| 471 | {.Opcode: Hexagon::M2_mpy_sat_hl_s0, .IntId: Intrinsic::hexagon_M2_mpy_sat_hl_s0}, |
| 472 | {.Opcode: Hexagon::M2_mpy_sat_hl_s1, .IntId: Intrinsic::hexagon_M2_mpy_sat_hl_s1}, |
| 473 | {.Opcode: Hexagon::M2_mpy_sat_lh_s0, .IntId: Intrinsic::hexagon_M2_mpy_sat_lh_s0}, |
| 474 | {.Opcode: Hexagon::M2_mpy_sat_lh_s1, .IntId: Intrinsic::hexagon_M2_mpy_sat_lh_s1}, |
| 475 | {.Opcode: Hexagon::M2_mpy_sat_ll_s0, .IntId: Intrinsic::hexagon_M2_mpy_sat_ll_s0}, |
| 476 | {.Opcode: Hexagon::M2_mpy_sat_ll_s1, .IntId: Intrinsic::hexagon_M2_mpy_sat_ll_s1}, |
| 477 | {.Opcode: Hexagon::M2_mpy_sat_rnd_hh_s0, .IntId: Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s0}, |
| 478 | {.Opcode: Hexagon::M2_mpy_sat_rnd_hh_s1, .IntId: Intrinsic::hexagon_M2_mpy_sat_rnd_hh_s1}, |
| 479 | {.Opcode: Hexagon::M2_mpy_sat_rnd_hl_s0, .IntId: Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s0}, |
| 480 | {.Opcode: Hexagon::M2_mpy_sat_rnd_hl_s1, .IntId: Intrinsic::hexagon_M2_mpy_sat_rnd_hl_s1}, |
| 481 | {.Opcode: Hexagon::M2_mpy_sat_rnd_lh_s0, .IntId: Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s0}, |
| 482 | {.Opcode: Hexagon::M2_mpy_sat_rnd_lh_s1, .IntId: Intrinsic::hexagon_M2_mpy_sat_rnd_lh_s1}, |
| 483 | {.Opcode: Hexagon::M2_mpy_sat_rnd_ll_s0, .IntId: Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s0}, |
| 484 | {.Opcode: Hexagon::M2_mpy_sat_rnd_ll_s1, .IntId: Intrinsic::hexagon_M2_mpy_sat_rnd_ll_s1}, |
| 485 | {.Opcode: Hexagon::M2_mpy_up, .IntId: Intrinsic::hexagon_M2_mpy_up}, |
| 486 | {.Opcode: Hexagon::M2_mpy_up_s1, .IntId: Intrinsic::hexagon_M2_mpy_up_s1}, |
| 487 | {.Opcode: Hexagon::M2_mpy_up_s1_sat, .IntId: Intrinsic::hexagon_M2_mpy_up_s1_sat}, |
| 488 | {.Opcode: Hexagon::M2_mpyd_acc_hh_s0, .IntId: Intrinsic::hexagon_M2_mpyd_acc_hh_s0}, |
| 489 | {.Opcode: Hexagon::M2_mpyd_acc_hh_s1, .IntId: Intrinsic::hexagon_M2_mpyd_acc_hh_s1}, |
| 490 | {.Opcode: Hexagon::M2_mpyd_acc_hl_s0, .IntId: Intrinsic::hexagon_M2_mpyd_acc_hl_s0}, |
| 491 | {.Opcode: Hexagon::M2_mpyd_acc_hl_s1, .IntId: Intrinsic::hexagon_M2_mpyd_acc_hl_s1}, |
| 492 | {.Opcode: Hexagon::M2_mpyd_acc_lh_s0, .IntId: Intrinsic::hexagon_M2_mpyd_acc_lh_s0}, |
| 493 | {.Opcode: Hexagon::M2_mpyd_acc_lh_s1, .IntId: Intrinsic::hexagon_M2_mpyd_acc_lh_s1}, |
| 494 | {.Opcode: Hexagon::M2_mpyd_acc_ll_s0, .IntId: Intrinsic::hexagon_M2_mpyd_acc_ll_s0}, |
| 495 | {.Opcode: Hexagon::M2_mpyd_acc_ll_s1, .IntId: Intrinsic::hexagon_M2_mpyd_acc_ll_s1}, |
| 496 | {.Opcode: Hexagon::M2_mpyd_hh_s0, .IntId: Intrinsic::hexagon_M2_mpyd_hh_s0}, |
| 497 | {.Opcode: Hexagon::M2_mpyd_hh_s1, .IntId: Intrinsic::hexagon_M2_mpyd_hh_s1}, |
| 498 | {.Opcode: Hexagon::M2_mpyd_hl_s0, .IntId: Intrinsic::hexagon_M2_mpyd_hl_s0}, |
| 499 | {.Opcode: Hexagon::M2_mpyd_hl_s1, .IntId: Intrinsic::hexagon_M2_mpyd_hl_s1}, |
| 500 | {.Opcode: Hexagon::M2_mpyd_lh_s0, .IntId: Intrinsic::hexagon_M2_mpyd_lh_s0}, |
| 501 | {.Opcode: Hexagon::M2_mpyd_lh_s1, .IntId: Intrinsic::hexagon_M2_mpyd_lh_s1}, |
| 502 | {.Opcode: Hexagon::M2_mpyd_ll_s0, .IntId: Intrinsic::hexagon_M2_mpyd_ll_s0}, |
| 503 | {.Opcode: Hexagon::M2_mpyd_ll_s1, .IntId: Intrinsic::hexagon_M2_mpyd_ll_s1}, |
| 504 | {.Opcode: Hexagon::M2_mpyd_nac_hh_s0, .IntId: Intrinsic::hexagon_M2_mpyd_nac_hh_s0}, |
| 505 | {.Opcode: Hexagon::M2_mpyd_nac_hh_s1, .IntId: Intrinsic::hexagon_M2_mpyd_nac_hh_s1}, |
| 506 | {.Opcode: Hexagon::M2_mpyd_nac_hl_s0, .IntId: Intrinsic::hexagon_M2_mpyd_nac_hl_s0}, |
| 507 | {.Opcode: Hexagon::M2_mpyd_nac_hl_s1, .IntId: Intrinsic::hexagon_M2_mpyd_nac_hl_s1}, |
| 508 | {.Opcode: Hexagon::M2_mpyd_nac_lh_s0, .IntId: Intrinsic::hexagon_M2_mpyd_nac_lh_s0}, |
| 509 | {.Opcode: Hexagon::M2_mpyd_nac_lh_s1, .IntId: Intrinsic::hexagon_M2_mpyd_nac_lh_s1}, |
| 510 | {.Opcode: Hexagon::M2_mpyd_nac_ll_s0, .IntId: Intrinsic::hexagon_M2_mpyd_nac_ll_s0}, |
| 511 | {.Opcode: Hexagon::M2_mpyd_nac_ll_s1, .IntId: Intrinsic::hexagon_M2_mpyd_nac_ll_s1}, |
| 512 | {.Opcode: Hexagon::M2_mpyd_rnd_hh_s0, .IntId: Intrinsic::hexagon_M2_mpyd_rnd_hh_s0}, |
| 513 | {.Opcode: Hexagon::M2_mpyd_rnd_hh_s1, .IntId: Intrinsic::hexagon_M2_mpyd_rnd_hh_s1}, |
| 514 | {.Opcode: Hexagon::M2_mpyd_rnd_hl_s0, .IntId: Intrinsic::hexagon_M2_mpyd_rnd_hl_s0}, |
| 515 | {.Opcode: Hexagon::M2_mpyd_rnd_hl_s1, .IntId: Intrinsic::hexagon_M2_mpyd_rnd_hl_s1}, |
| 516 | {.Opcode: Hexagon::M2_mpyd_rnd_lh_s0, .IntId: Intrinsic::hexagon_M2_mpyd_rnd_lh_s0}, |
| 517 | {.Opcode: Hexagon::M2_mpyd_rnd_lh_s1, .IntId: Intrinsic::hexagon_M2_mpyd_rnd_lh_s1}, |
| 518 | {.Opcode: Hexagon::M2_mpyd_rnd_ll_s0, .IntId: Intrinsic::hexagon_M2_mpyd_rnd_ll_s0}, |
| 519 | {.Opcode: Hexagon::M2_mpyd_rnd_ll_s1, .IntId: Intrinsic::hexagon_M2_mpyd_rnd_ll_s1}, |
| 520 | {.Opcode: Hexagon::M2_mpyi, .IntId: Intrinsic::hexagon_M2_mpyi}, |
| 521 | {.Opcode: Hexagon::M2_mpysmi, .IntId: Intrinsic::hexagon_M2_mpysmi}, |
| 522 | {.Opcode: Hexagon::M2_mpysu_up, .IntId: Intrinsic::hexagon_M2_mpysu_up}, |
| 523 | {.Opcode: Hexagon::M2_mpyu_acc_hh_s0, .IntId: Intrinsic::hexagon_M2_mpyu_acc_hh_s0}, |
| 524 | {.Opcode: Hexagon::M2_mpyu_acc_hh_s1, .IntId: Intrinsic::hexagon_M2_mpyu_acc_hh_s1}, |
| 525 | {.Opcode: Hexagon::M2_mpyu_acc_hl_s0, .IntId: Intrinsic::hexagon_M2_mpyu_acc_hl_s0}, |
| 526 | {.Opcode: Hexagon::M2_mpyu_acc_hl_s1, .IntId: Intrinsic::hexagon_M2_mpyu_acc_hl_s1}, |
| 527 | {.Opcode: Hexagon::M2_mpyu_acc_lh_s0, .IntId: Intrinsic::hexagon_M2_mpyu_acc_lh_s0}, |
| 528 | {.Opcode: Hexagon::M2_mpyu_acc_lh_s1, .IntId: Intrinsic::hexagon_M2_mpyu_acc_lh_s1}, |
| 529 | {.Opcode: Hexagon::M2_mpyu_acc_ll_s0, .IntId: Intrinsic::hexagon_M2_mpyu_acc_ll_s0}, |
| 530 | {.Opcode: Hexagon::M2_mpyu_acc_ll_s1, .IntId: Intrinsic::hexagon_M2_mpyu_acc_ll_s1}, |
| 531 | {.Opcode: Hexagon::M2_mpyu_hh_s0, .IntId: Intrinsic::hexagon_M2_mpyu_hh_s0}, |
| 532 | {.Opcode: Hexagon::M2_mpyu_hh_s1, .IntId: Intrinsic::hexagon_M2_mpyu_hh_s1}, |
| 533 | {.Opcode: Hexagon::M2_mpyu_hl_s0, .IntId: Intrinsic::hexagon_M2_mpyu_hl_s0}, |
| 534 | {.Opcode: Hexagon::M2_mpyu_hl_s1, .IntId: Intrinsic::hexagon_M2_mpyu_hl_s1}, |
| 535 | {.Opcode: Hexagon::M2_mpyu_lh_s0, .IntId: Intrinsic::hexagon_M2_mpyu_lh_s0}, |
| 536 | {.Opcode: Hexagon::M2_mpyu_lh_s1, .IntId: Intrinsic::hexagon_M2_mpyu_lh_s1}, |
| 537 | {.Opcode: Hexagon::M2_mpyu_ll_s0, .IntId: Intrinsic::hexagon_M2_mpyu_ll_s0}, |
| 538 | {.Opcode: Hexagon::M2_mpyu_ll_s1, .IntId: Intrinsic::hexagon_M2_mpyu_ll_s1}, |
| 539 | {.Opcode: Hexagon::M2_mpyu_nac_hh_s0, .IntId: Intrinsic::hexagon_M2_mpyu_nac_hh_s0}, |
| 540 | {.Opcode: Hexagon::M2_mpyu_nac_hh_s1, .IntId: Intrinsic::hexagon_M2_mpyu_nac_hh_s1}, |
| 541 | {.Opcode: Hexagon::M2_mpyu_nac_hl_s0, .IntId: Intrinsic::hexagon_M2_mpyu_nac_hl_s0}, |
| 542 | {.Opcode: Hexagon::M2_mpyu_nac_hl_s1, .IntId: Intrinsic::hexagon_M2_mpyu_nac_hl_s1}, |
| 543 | {.Opcode: Hexagon::M2_mpyu_nac_lh_s0, .IntId: Intrinsic::hexagon_M2_mpyu_nac_lh_s0}, |
| 544 | {.Opcode: Hexagon::M2_mpyu_nac_lh_s1, .IntId: Intrinsic::hexagon_M2_mpyu_nac_lh_s1}, |
| 545 | {.Opcode: Hexagon::M2_mpyu_nac_ll_s0, .IntId: Intrinsic::hexagon_M2_mpyu_nac_ll_s0}, |
| 546 | {.Opcode: Hexagon::M2_mpyu_nac_ll_s1, .IntId: Intrinsic::hexagon_M2_mpyu_nac_ll_s1}, |
| 547 | {.Opcode: Hexagon::M2_mpyu_up, .IntId: Intrinsic::hexagon_M2_mpyu_up}, |
| 548 | {.Opcode: Hexagon::M2_mpyud_acc_hh_s0, .IntId: Intrinsic::hexagon_M2_mpyud_acc_hh_s0}, |
| 549 | {.Opcode: Hexagon::M2_mpyud_acc_hh_s1, .IntId: Intrinsic::hexagon_M2_mpyud_acc_hh_s1}, |
| 550 | {.Opcode: Hexagon::M2_mpyud_acc_hl_s0, .IntId: Intrinsic::hexagon_M2_mpyud_acc_hl_s0}, |
| 551 | {.Opcode: Hexagon::M2_mpyud_acc_hl_s1, .IntId: Intrinsic::hexagon_M2_mpyud_acc_hl_s1}, |
| 552 | {.Opcode: Hexagon::M2_mpyud_acc_lh_s0, .IntId: Intrinsic::hexagon_M2_mpyud_acc_lh_s0}, |
| 553 | {.Opcode: Hexagon::M2_mpyud_acc_lh_s1, .IntId: Intrinsic::hexagon_M2_mpyud_acc_lh_s1}, |
| 554 | {.Opcode: Hexagon::M2_mpyud_acc_ll_s0, .IntId: Intrinsic::hexagon_M2_mpyud_acc_ll_s0}, |
| 555 | {.Opcode: Hexagon::M2_mpyud_acc_ll_s1, .IntId: Intrinsic::hexagon_M2_mpyud_acc_ll_s1}, |
| 556 | {.Opcode: Hexagon::M2_mpyud_hh_s0, .IntId: Intrinsic::hexagon_M2_mpyud_hh_s0}, |
| 557 | {.Opcode: Hexagon::M2_mpyud_hh_s1, .IntId: Intrinsic::hexagon_M2_mpyud_hh_s1}, |
| 558 | {.Opcode: Hexagon::M2_mpyud_hl_s0, .IntId: Intrinsic::hexagon_M2_mpyud_hl_s0}, |
| 559 | {.Opcode: Hexagon::M2_mpyud_hl_s1, .IntId: Intrinsic::hexagon_M2_mpyud_hl_s1}, |
| 560 | {.Opcode: Hexagon::M2_mpyud_lh_s0, .IntId: Intrinsic::hexagon_M2_mpyud_lh_s0}, |
| 561 | {.Opcode: Hexagon::M2_mpyud_lh_s1, .IntId: Intrinsic::hexagon_M2_mpyud_lh_s1}, |
| 562 | {.Opcode: Hexagon::M2_mpyud_ll_s0, .IntId: Intrinsic::hexagon_M2_mpyud_ll_s0}, |
| 563 | {.Opcode: Hexagon::M2_mpyud_ll_s1, .IntId: Intrinsic::hexagon_M2_mpyud_ll_s1}, |
| 564 | {.Opcode: Hexagon::M2_mpyud_nac_hh_s0, .IntId: Intrinsic::hexagon_M2_mpyud_nac_hh_s0}, |
| 565 | {.Opcode: Hexagon::M2_mpyud_nac_hh_s1, .IntId: Intrinsic::hexagon_M2_mpyud_nac_hh_s1}, |
| 566 | {.Opcode: Hexagon::M2_mpyud_nac_hl_s0, .IntId: Intrinsic::hexagon_M2_mpyud_nac_hl_s0}, |
| 567 | {.Opcode: Hexagon::M2_mpyud_nac_hl_s1, .IntId: Intrinsic::hexagon_M2_mpyud_nac_hl_s1}, |
| 568 | {.Opcode: Hexagon::M2_mpyud_nac_lh_s0, .IntId: Intrinsic::hexagon_M2_mpyud_nac_lh_s0}, |
| 569 | {.Opcode: Hexagon::M2_mpyud_nac_lh_s1, .IntId: Intrinsic::hexagon_M2_mpyud_nac_lh_s1}, |
| 570 | {.Opcode: Hexagon::M2_mpyud_nac_ll_s0, .IntId: Intrinsic::hexagon_M2_mpyud_nac_ll_s0}, |
| 571 | {.Opcode: Hexagon::M2_mpyud_nac_ll_s1, .IntId: Intrinsic::hexagon_M2_mpyud_nac_ll_s1}, |
| 572 | {.Opcode: Hexagon::M2_mpyui, .IntId: Intrinsic::hexagon_M2_mpyui}, |
| 573 | {.Opcode: Hexagon::M2_nacci, .IntId: Intrinsic::hexagon_M2_nacci}, |
| 574 | {.Opcode: Hexagon::M2_naccii, .IntId: Intrinsic::hexagon_M2_naccii}, |
| 575 | {.Opcode: Hexagon::M2_subacc, .IntId: Intrinsic::hexagon_M2_subacc}, |
| 576 | {.Opcode: Hexagon::M2_vabsdiffh, .IntId: Intrinsic::hexagon_M2_vabsdiffh}, |
| 577 | {.Opcode: Hexagon::M2_vabsdiffw, .IntId: Intrinsic::hexagon_M2_vabsdiffw}, |
| 578 | {.Opcode: Hexagon::M2_vcmac_s0_sat_i, .IntId: Intrinsic::hexagon_M2_vcmac_s0_sat_i}, |
| 579 | {.Opcode: Hexagon::M2_vcmac_s0_sat_r, .IntId: Intrinsic::hexagon_M2_vcmac_s0_sat_r}, |
| 580 | {.Opcode: Hexagon::M2_vcmpy_s0_sat_i, .IntId: Intrinsic::hexagon_M2_vcmpy_s0_sat_i}, |
| 581 | {.Opcode: Hexagon::M2_vcmpy_s0_sat_r, .IntId: Intrinsic::hexagon_M2_vcmpy_s0_sat_r}, |
| 582 | {.Opcode: Hexagon::M2_vcmpy_s1_sat_i, .IntId: Intrinsic::hexagon_M2_vcmpy_s1_sat_i}, |
| 583 | {.Opcode: Hexagon::M2_vcmpy_s1_sat_r, .IntId: Intrinsic::hexagon_M2_vcmpy_s1_sat_r}, |
| 584 | {.Opcode: Hexagon::M2_vdmacs_s0, .IntId: Intrinsic::hexagon_M2_vdmacs_s0}, |
| 585 | {.Opcode: Hexagon::M2_vdmacs_s1, .IntId: Intrinsic::hexagon_M2_vdmacs_s1}, |
| 586 | {.Opcode: Hexagon::M2_vdmpyrs_s0, .IntId: Intrinsic::hexagon_M2_vdmpyrs_s0}, |
| 587 | {.Opcode: Hexagon::M2_vdmpyrs_s1, .IntId: Intrinsic::hexagon_M2_vdmpyrs_s1}, |
| 588 | {.Opcode: Hexagon::M2_vdmpys_s0, .IntId: Intrinsic::hexagon_M2_vdmpys_s0}, |
| 589 | {.Opcode: Hexagon::M2_vdmpys_s1, .IntId: Intrinsic::hexagon_M2_vdmpys_s1}, |
| 590 | {.Opcode: Hexagon::M2_vmac2, .IntId: Intrinsic::hexagon_M2_vmac2}, |
| 591 | {.Opcode: Hexagon::M2_vmac2es, .IntId: Intrinsic::hexagon_M2_vmac2es}, |
| 592 | {.Opcode: Hexagon::M2_vmac2es_s0, .IntId: Intrinsic::hexagon_M2_vmac2es_s0}, |
| 593 | {.Opcode: Hexagon::M2_vmac2es_s1, .IntId: Intrinsic::hexagon_M2_vmac2es_s1}, |
| 594 | {.Opcode: Hexagon::M2_vmac2s_s0, .IntId: Intrinsic::hexagon_M2_vmac2s_s0}, |
| 595 | {.Opcode: Hexagon::M2_vmac2s_s1, .IntId: Intrinsic::hexagon_M2_vmac2s_s1}, |
| 596 | {.Opcode: Hexagon::M2_vmac2su_s0, .IntId: Intrinsic::hexagon_M2_vmac2su_s0}, |
| 597 | {.Opcode: Hexagon::M2_vmac2su_s1, .IntId: Intrinsic::hexagon_M2_vmac2su_s1}, |
| 598 | {.Opcode: Hexagon::M2_vmpy2es_s0, .IntId: Intrinsic::hexagon_M2_vmpy2es_s0}, |
| 599 | {.Opcode: Hexagon::M2_vmpy2es_s1, .IntId: Intrinsic::hexagon_M2_vmpy2es_s1}, |
| 600 | {.Opcode: Hexagon::M2_vmpy2s_s0, .IntId: Intrinsic::hexagon_M2_vmpy2s_s0}, |
| 601 | {.Opcode: Hexagon::M2_vmpy2s_s0pack, .IntId: Intrinsic::hexagon_M2_vmpy2s_s0pack}, |
| 602 | {.Opcode: Hexagon::M2_vmpy2s_s1, .IntId: Intrinsic::hexagon_M2_vmpy2s_s1}, |
| 603 | {.Opcode: Hexagon::M2_vmpy2s_s1pack, .IntId: Intrinsic::hexagon_M2_vmpy2s_s1pack}, |
| 604 | {.Opcode: Hexagon::M2_vmpy2su_s0, .IntId: Intrinsic::hexagon_M2_vmpy2su_s0}, |
| 605 | {.Opcode: Hexagon::M2_vmpy2su_s1, .IntId: Intrinsic::hexagon_M2_vmpy2su_s1}, |
| 606 | {.Opcode: Hexagon::M2_vraddh, .IntId: Intrinsic::hexagon_M2_vraddh}, |
| 607 | {.Opcode: Hexagon::M2_vradduh, .IntId: Intrinsic::hexagon_M2_vradduh}, |
| 608 | {.Opcode: Hexagon::M2_vrcmaci_s0, .IntId: Intrinsic::hexagon_M2_vrcmaci_s0}, |
| 609 | {.Opcode: Hexagon::M2_vrcmaci_s0c, .IntId: Intrinsic::hexagon_M2_vrcmaci_s0c}, |
| 610 | {.Opcode: Hexagon::M2_vrcmacr_s0, .IntId: Intrinsic::hexagon_M2_vrcmacr_s0}, |
| 611 | {.Opcode: Hexagon::M2_vrcmacr_s0c, .IntId: Intrinsic::hexagon_M2_vrcmacr_s0c}, |
| 612 | {.Opcode: Hexagon::M2_vrcmpyi_s0, .IntId: Intrinsic::hexagon_M2_vrcmpyi_s0}, |
| 613 | {.Opcode: Hexagon::M2_vrcmpyi_s0c, .IntId: Intrinsic::hexagon_M2_vrcmpyi_s0c}, |
| 614 | {.Opcode: Hexagon::M2_vrcmpyr_s0, .IntId: Intrinsic::hexagon_M2_vrcmpyr_s0}, |
| 615 | {.Opcode: Hexagon::M2_vrcmpyr_s0c, .IntId: Intrinsic::hexagon_M2_vrcmpyr_s0c}, |
| 616 | {.Opcode: Hexagon::M2_vrcmpys_acc_s1, .IntId: Intrinsic::hexagon_M2_vrcmpys_acc_s1}, |
| 617 | {.Opcode: Hexagon::M2_vrcmpys_s1, .IntId: Intrinsic::hexagon_M2_vrcmpys_s1}, |
| 618 | {.Opcode: Hexagon::M2_vrcmpys_s1rp, .IntId: Intrinsic::hexagon_M2_vrcmpys_s1rp}, |
| 619 | {.Opcode: Hexagon::M2_vrmac_s0, .IntId: Intrinsic::hexagon_M2_vrmac_s0}, |
| 620 | {.Opcode: Hexagon::M2_vrmpy_s0, .IntId: Intrinsic::hexagon_M2_vrmpy_s0}, |
| 621 | {.Opcode: Hexagon::M2_xor_xacc, .IntId: Intrinsic::hexagon_M2_xor_xacc}, |
| 622 | {.Opcode: Hexagon::M4_and_and, .IntId: Intrinsic::hexagon_M4_and_and}, |
| 623 | {.Opcode: Hexagon::M4_and_andn, .IntId: Intrinsic::hexagon_M4_and_andn}, |
| 624 | {.Opcode: Hexagon::M4_and_or, .IntId: Intrinsic::hexagon_M4_and_or}, |
| 625 | {.Opcode: Hexagon::M4_and_xor, .IntId: Intrinsic::hexagon_M4_and_xor}, |
| 626 | {.Opcode: Hexagon::M4_cmpyi_wh, .IntId: Intrinsic::hexagon_M4_cmpyi_wh}, |
| 627 | {.Opcode: Hexagon::M4_cmpyi_whc, .IntId: Intrinsic::hexagon_M4_cmpyi_whc}, |
| 628 | {.Opcode: Hexagon::M4_cmpyr_wh, .IntId: Intrinsic::hexagon_M4_cmpyr_wh}, |
| 629 | {.Opcode: Hexagon::M4_cmpyr_whc, .IntId: Intrinsic::hexagon_M4_cmpyr_whc}, |
| 630 | {.Opcode: Hexagon::M4_mac_up_s1_sat, .IntId: Intrinsic::hexagon_M4_mac_up_s1_sat}, |
| 631 | {.Opcode: Hexagon::M4_mpyri_addi, .IntId: Intrinsic::hexagon_M4_mpyri_addi}, |
| 632 | {.Opcode: Hexagon::M4_mpyri_addr, .IntId: Intrinsic::hexagon_M4_mpyri_addr}, |
| 633 | {.Opcode: Hexagon::M4_mpyri_addr_u2, .IntId: Intrinsic::hexagon_M4_mpyri_addr_u2}, |
| 634 | {.Opcode: Hexagon::M4_mpyrr_addi, .IntId: Intrinsic::hexagon_M4_mpyrr_addi}, |
| 635 | {.Opcode: Hexagon::M4_mpyrr_addr, .IntId: Intrinsic::hexagon_M4_mpyrr_addr}, |
| 636 | {.Opcode: Hexagon::M4_nac_up_s1_sat, .IntId: Intrinsic::hexagon_M4_nac_up_s1_sat}, |
| 637 | {.Opcode: Hexagon::M4_or_and, .IntId: Intrinsic::hexagon_M4_or_and}, |
| 638 | {.Opcode: Hexagon::M4_or_andn, .IntId: Intrinsic::hexagon_M4_or_andn}, |
| 639 | {.Opcode: Hexagon::M4_or_or, .IntId: Intrinsic::hexagon_M4_or_or}, |
| 640 | {.Opcode: Hexagon::M4_or_xor, .IntId: Intrinsic::hexagon_M4_or_xor}, |
| 641 | {.Opcode: Hexagon::M4_pmpyw, .IntId: Intrinsic::hexagon_M4_pmpyw}, |
| 642 | {.Opcode: Hexagon::M4_pmpyw_acc, .IntId: Intrinsic::hexagon_M4_pmpyw_acc}, |
| 643 | {.Opcode: Hexagon::M4_vpmpyh, .IntId: Intrinsic::hexagon_M4_vpmpyh}, |
| 644 | {.Opcode: Hexagon::M4_vpmpyh_acc, .IntId: Intrinsic::hexagon_M4_vpmpyh_acc}, |
| 645 | {.Opcode: Hexagon::M4_vrmpyeh_acc_s0, .IntId: Intrinsic::hexagon_M4_vrmpyeh_acc_s0}, |
| 646 | {.Opcode: Hexagon::M4_vrmpyeh_acc_s1, .IntId: Intrinsic::hexagon_M4_vrmpyeh_acc_s1}, |
| 647 | {.Opcode: Hexagon::M4_vrmpyeh_s0, .IntId: Intrinsic::hexagon_M4_vrmpyeh_s0}, |
| 648 | {.Opcode: Hexagon::M4_vrmpyeh_s1, .IntId: Intrinsic::hexagon_M4_vrmpyeh_s1}, |
| 649 | {.Opcode: Hexagon::M4_vrmpyoh_acc_s0, .IntId: Intrinsic::hexagon_M4_vrmpyoh_acc_s0}, |
| 650 | {.Opcode: Hexagon::M4_vrmpyoh_acc_s1, .IntId: Intrinsic::hexagon_M4_vrmpyoh_acc_s1}, |
| 651 | {.Opcode: Hexagon::M4_vrmpyoh_s0, .IntId: Intrinsic::hexagon_M4_vrmpyoh_s0}, |
| 652 | {.Opcode: Hexagon::M4_vrmpyoh_s1, .IntId: Intrinsic::hexagon_M4_vrmpyoh_s1}, |
| 653 | {.Opcode: Hexagon::M4_xor_and, .IntId: Intrinsic::hexagon_M4_xor_and}, |
| 654 | {.Opcode: Hexagon::M4_xor_andn, .IntId: Intrinsic::hexagon_M4_xor_andn}, |
| 655 | {.Opcode: Hexagon::M4_xor_or, .IntId: Intrinsic::hexagon_M4_xor_or}, |
| 656 | {.Opcode: Hexagon::M4_xor_xacc, .IntId: Intrinsic::hexagon_M4_xor_xacc}, |
| 657 | {.Opcode: Hexagon::M5_vdmacbsu, .IntId: Intrinsic::hexagon_M5_vdmacbsu}, |
| 658 | {.Opcode: Hexagon::M5_vdmpybsu, .IntId: Intrinsic::hexagon_M5_vdmpybsu}, |
| 659 | {.Opcode: Hexagon::M5_vmacbsu, .IntId: Intrinsic::hexagon_M5_vmacbsu}, |
| 660 | {.Opcode: Hexagon::M5_vmacbuu, .IntId: Intrinsic::hexagon_M5_vmacbuu}, |
| 661 | {.Opcode: Hexagon::M5_vmpybsu, .IntId: Intrinsic::hexagon_M5_vmpybsu}, |
| 662 | {.Opcode: Hexagon::M5_vmpybuu, .IntId: Intrinsic::hexagon_M5_vmpybuu}, |
| 663 | {.Opcode: Hexagon::M5_vrmacbsu, .IntId: Intrinsic::hexagon_M5_vrmacbsu}, |
| 664 | {.Opcode: Hexagon::M5_vrmacbuu, .IntId: Intrinsic::hexagon_M5_vrmacbuu}, |
| 665 | {.Opcode: Hexagon::M5_vrmpybsu, .IntId: Intrinsic::hexagon_M5_vrmpybsu}, |
| 666 | {.Opcode: Hexagon::M5_vrmpybuu, .IntId: Intrinsic::hexagon_M5_vrmpybuu}, |
| 667 | {.Opcode: Hexagon::M6_vabsdiffb, .IntId: Intrinsic::hexagon_M6_vabsdiffb}, |
| 668 | {.Opcode: Hexagon::M6_vabsdiffub, .IntId: Intrinsic::hexagon_M6_vabsdiffub}, |
| 669 | {.Opcode: Hexagon::M7_dcmpyiw, .IntId: Intrinsic::hexagon_M7_dcmpyiw}, |
| 670 | {.Opcode: Hexagon::M7_dcmpyiw_acc, .IntId: Intrinsic::hexagon_M7_dcmpyiw_acc}, |
| 671 | {.Opcode: Hexagon::M7_dcmpyiwc, .IntId: Intrinsic::hexagon_M7_dcmpyiwc}, |
| 672 | {.Opcode: Hexagon::M7_dcmpyiwc_acc, .IntId: Intrinsic::hexagon_M7_dcmpyiwc_acc}, |
| 673 | {.Opcode: Hexagon::M7_dcmpyrw, .IntId: Intrinsic::hexagon_M7_dcmpyrw}, |
| 674 | {.Opcode: Hexagon::M7_dcmpyrw_acc, .IntId: Intrinsic::hexagon_M7_dcmpyrw_acc}, |
| 675 | {.Opcode: Hexagon::M7_dcmpyrwc, .IntId: Intrinsic::hexagon_M7_dcmpyrwc}, |
| 676 | {.Opcode: Hexagon::M7_dcmpyrwc_acc, .IntId: Intrinsic::hexagon_M7_dcmpyrwc_acc}, |
| 677 | {.Opcode: Hexagon::M7_vdmpy, .IntId: Intrinsic::hexagon_M7_vdmpy}, |
| 678 | {.Opcode: Hexagon::M7_vdmpy_acc, .IntId: Intrinsic::hexagon_M7_vdmpy_acc}, |
| 679 | {.Opcode: Hexagon::M7_wcmpyiw, .IntId: Intrinsic::hexagon_M7_wcmpyiw}, |
| 680 | {.Opcode: Hexagon::M7_wcmpyiw_rnd, .IntId: Intrinsic::hexagon_M7_wcmpyiw_rnd}, |
| 681 | {.Opcode: Hexagon::M7_wcmpyiwc, .IntId: Intrinsic::hexagon_M7_wcmpyiwc}, |
| 682 | {.Opcode: Hexagon::M7_wcmpyiwc_rnd, .IntId: Intrinsic::hexagon_M7_wcmpyiwc_rnd}, |
| 683 | {.Opcode: Hexagon::M7_wcmpyrw, .IntId: Intrinsic::hexagon_M7_wcmpyrw}, |
| 684 | {.Opcode: Hexagon::M7_wcmpyrw_rnd, .IntId: Intrinsic::hexagon_M7_wcmpyrw_rnd}, |
| 685 | {.Opcode: Hexagon::M7_wcmpyrwc, .IntId: Intrinsic::hexagon_M7_wcmpyrwc}, |
| 686 | {.Opcode: Hexagon::M7_wcmpyrwc_rnd, .IntId: Intrinsic::hexagon_M7_wcmpyrwc_rnd}, |
| 687 | {.Opcode: Hexagon::S2_addasl_rrri, .IntId: Intrinsic::hexagon_S2_addasl_rrri}, |
| 688 | {.Opcode: Hexagon::S2_asl_i_p, .IntId: Intrinsic::hexagon_S2_asl_i_p}, |
| 689 | {.Opcode: Hexagon::S2_asl_i_p_acc, .IntId: Intrinsic::hexagon_S2_asl_i_p_acc}, |
| 690 | {.Opcode: Hexagon::S2_asl_i_p_and, .IntId: Intrinsic::hexagon_S2_asl_i_p_and}, |
| 691 | {.Opcode: Hexagon::S2_asl_i_p_nac, .IntId: Intrinsic::hexagon_S2_asl_i_p_nac}, |
| 692 | {.Opcode: Hexagon::S2_asl_i_p_or, .IntId: Intrinsic::hexagon_S2_asl_i_p_or}, |
| 693 | {.Opcode: Hexagon::S2_asl_i_p_xacc, .IntId: Intrinsic::hexagon_S2_asl_i_p_xacc}, |
| 694 | {.Opcode: Hexagon::S2_asl_i_r, .IntId: Intrinsic::hexagon_S2_asl_i_r}, |
| 695 | {.Opcode: Hexagon::S2_asl_i_r_acc, .IntId: Intrinsic::hexagon_S2_asl_i_r_acc}, |
| 696 | {.Opcode: Hexagon::S2_asl_i_r_and, .IntId: Intrinsic::hexagon_S2_asl_i_r_and}, |
| 697 | {.Opcode: Hexagon::S2_asl_i_r_nac, .IntId: Intrinsic::hexagon_S2_asl_i_r_nac}, |
| 698 | {.Opcode: Hexagon::S2_asl_i_r_or, .IntId: Intrinsic::hexagon_S2_asl_i_r_or}, |
| 699 | {.Opcode: Hexagon::S2_asl_i_r_sat, .IntId: Intrinsic::hexagon_S2_asl_i_r_sat}, |
| 700 | {.Opcode: Hexagon::S2_asl_i_r_xacc, .IntId: Intrinsic::hexagon_S2_asl_i_r_xacc}, |
| 701 | {.Opcode: Hexagon::S2_asl_i_vh, .IntId: Intrinsic::hexagon_S2_asl_i_vh}, |
| 702 | {.Opcode: Hexagon::S2_asl_i_vw, .IntId: Intrinsic::hexagon_S2_asl_i_vw}, |
| 703 | {.Opcode: Hexagon::S2_asl_r_p, .IntId: Intrinsic::hexagon_S2_asl_r_p}, |
| 704 | {.Opcode: Hexagon::S2_asl_r_p_acc, .IntId: Intrinsic::hexagon_S2_asl_r_p_acc}, |
| 705 | {.Opcode: Hexagon::S2_asl_r_p_and, .IntId: Intrinsic::hexagon_S2_asl_r_p_and}, |
| 706 | {.Opcode: Hexagon::S2_asl_r_p_nac, .IntId: Intrinsic::hexagon_S2_asl_r_p_nac}, |
| 707 | {.Opcode: Hexagon::S2_asl_r_p_or, .IntId: Intrinsic::hexagon_S2_asl_r_p_or}, |
| 708 | {.Opcode: Hexagon::S2_asl_r_p_xor, .IntId: Intrinsic::hexagon_S2_asl_r_p_xor}, |
| 709 | {.Opcode: Hexagon::S2_asl_r_r, .IntId: Intrinsic::hexagon_S2_asl_r_r}, |
| 710 | {.Opcode: Hexagon::S2_asl_r_r_acc, .IntId: Intrinsic::hexagon_S2_asl_r_r_acc}, |
| 711 | {.Opcode: Hexagon::S2_asl_r_r_and, .IntId: Intrinsic::hexagon_S2_asl_r_r_and}, |
| 712 | {.Opcode: Hexagon::S2_asl_r_r_nac, .IntId: Intrinsic::hexagon_S2_asl_r_r_nac}, |
| 713 | {.Opcode: Hexagon::S2_asl_r_r_or, .IntId: Intrinsic::hexagon_S2_asl_r_r_or}, |
| 714 | {.Opcode: Hexagon::S2_asl_r_r_sat, .IntId: Intrinsic::hexagon_S2_asl_r_r_sat}, |
| 715 | {.Opcode: Hexagon::S2_asl_r_vh, .IntId: Intrinsic::hexagon_S2_asl_r_vh}, |
| 716 | {.Opcode: Hexagon::S2_asl_r_vw, .IntId: Intrinsic::hexagon_S2_asl_r_vw}, |
| 717 | {.Opcode: Hexagon::S2_asr_i_p, .IntId: Intrinsic::hexagon_S2_asr_i_p}, |
| 718 | {.Opcode: Hexagon::S2_asr_i_p_acc, .IntId: Intrinsic::hexagon_S2_asr_i_p_acc}, |
| 719 | {.Opcode: Hexagon::S2_asr_i_p_and, .IntId: Intrinsic::hexagon_S2_asr_i_p_and}, |
| 720 | {.Opcode: Hexagon::S2_asr_i_p_nac, .IntId: Intrinsic::hexagon_S2_asr_i_p_nac}, |
| 721 | {.Opcode: Hexagon::S2_asr_i_p_or, .IntId: Intrinsic::hexagon_S2_asr_i_p_or}, |
| 722 | {.Opcode: Hexagon::S2_asr_i_p_rnd, .IntId: Intrinsic::hexagon_S2_asr_i_p_rnd}, |
| 723 | {.Opcode: Hexagon::S2_asr_i_p_rnd_goodsyntax, .IntId: Intrinsic::hexagon_S2_asr_i_p_rnd_goodsyntax}, |
| 724 | {.Opcode: Hexagon::S2_asr_i_r, .IntId: Intrinsic::hexagon_S2_asr_i_r}, |
| 725 | {.Opcode: Hexagon::S2_asr_i_r_acc, .IntId: Intrinsic::hexagon_S2_asr_i_r_acc}, |
| 726 | {.Opcode: Hexagon::S2_asr_i_r_and, .IntId: Intrinsic::hexagon_S2_asr_i_r_and}, |
| 727 | {.Opcode: Hexagon::S2_asr_i_r_nac, .IntId: Intrinsic::hexagon_S2_asr_i_r_nac}, |
| 728 | {.Opcode: Hexagon::S2_asr_i_r_or, .IntId: Intrinsic::hexagon_S2_asr_i_r_or}, |
| 729 | {.Opcode: Hexagon::S2_asr_i_r_rnd, .IntId: Intrinsic::hexagon_S2_asr_i_r_rnd}, |
| 730 | {.Opcode: Hexagon::S2_asr_i_r_rnd_goodsyntax, .IntId: Intrinsic::hexagon_S2_asr_i_r_rnd_goodsyntax}, |
| 731 | {.Opcode: Hexagon::S2_asr_i_svw_trun, .IntId: Intrinsic::hexagon_S2_asr_i_svw_trun}, |
| 732 | {.Opcode: Hexagon::S2_asr_i_vh, .IntId: Intrinsic::hexagon_S2_asr_i_vh}, |
| 733 | {.Opcode: Hexagon::S2_asr_i_vw, .IntId: Intrinsic::hexagon_S2_asr_i_vw}, |
| 734 | {.Opcode: Hexagon::S2_asr_r_p, .IntId: Intrinsic::hexagon_S2_asr_r_p}, |
| 735 | {.Opcode: Hexagon::S2_asr_r_p_acc, .IntId: Intrinsic::hexagon_S2_asr_r_p_acc}, |
| 736 | {.Opcode: Hexagon::S2_asr_r_p_and, .IntId: Intrinsic::hexagon_S2_asr_r_p_and}, |
| 737 | {.Opcode: Hexagon::S2_asr_r_p_nac, .IntId: Intrinsic::hexagon_S2_asr_r_p_nac}, |
| 738 | {.Opcode: Hexagon::S2_asr_r_p_or, .IntId: Intrinsic::hexagon_S2_asr_r_p_or}, |
| 739 | {.Opcode: Hexagon::S2_asr_r_p_xor, .IntId: Intrinsic::hexagon_S2_asr_r_p_xor}, |
| 740 | {.Opcode: Hexagon::S2_asr_r_r, .IntId: Intrinsic::hexagon_S2_asr_r_r}, |
| 741 | {.Opcode: Hexagon::S2_asr_r_r_acc, .IntId: Intrinsic::hexagon_S2_asr_r_r_acc}, |
| 742 | {.Opcode: Hexagon::S2_asr_r_r_and, .IntId: Intrinsic::hexagon_S2_asr_r_r_and}, |
| 743 | {.Opcode: Hexagon::S2_asr_r_r_nac, .IntId: Intrinsic::hexagon_S2_asr_r_r_nac}, |
| 744 | {.Opcode: Hexagon::S2_asr_r_r_or, .IntId: Intrinsic::hexagon_S2_asr_r_r_or}, |
| 745 | {.Opcode: Hexagon::S2_asr_r_r_sat, .IntId: Intrinsic::hexagon_S2_asr_r_r_sat}, |
| 746 | {.Opcode: Hexagon::S2_asr_r_svw_trun, .IntId: Intrinsic::hexagon_S2_asr_r_svw_trun}, |
| 747 | {.Opcode: Hexagon::S2_asr_r_vh, .IntId: Intrinsic::hexagon_S2_asr_r_vh}, |
| 748 | {.Opcode: Hexagon::S2_asr_r_vw, .IntId: Intrinsic::hexagon_S2_asr_r_vw}, |
| 749 | {.Opcode: Hexagon::S2_brev, .IntId: Intrinsic::hexagon_S2_brev}, |
| 750 | {.Opcode: Hexagon::S2_brevp, .IntId: Intrinsic::hexagon_S2_brevp}, |
| 751 | {.Opcode: Hexagon::S2_cl0, .IntId: Intrinsic::hexagon_S2_cl0}, |
| 752 | {.Opcode: Hexagon::S2_cl0p, .IntId: Intrinsic::hexagon_S2_cl0p}, |
| 753 | {.Opcode: Hexagon::S2_cl1, .IntId: Intrinsic::hexagon_S2_cl1}, |
| 754 | {.Opcode: Hexagon::S2_cl1p, .IntId: Intrinsic::hexagon_S2_cl1p}, |
| 755 | {.Opcode: Hexagon::S2_clb, .IntId: Intrinsic::hexagon_S2_clb}, |
| 756 | {.Opcode: Hexagon::S2_clbnorm, .IntId: Intrinsic::hexagon_S2_clbnorm}, |
| 757 | {.Opcode: Hexagon::S2_clbp, .IntId: Intrinsic::hexagon_S2_clbp}, |
| 758 | {.Opcode: Hexagon::S2_clrbit_i, .IntId: Intrinsic::hexagon_S2_clrbit_i}, |
| 759 | {.Opcode: Hexagon::S2_clrbit_r, .IntId: Intrinsic::hexagon_S2_clrbit_r}, |
| 760 | {.Opcode: Hexagon::S2_ct0, .IntId: Intrinsic::hexagon_S2_ct0}, |
| 761 | {.Opcode: Hexagon::S2_ct0p, .IntId: Intrinsic::hexagon_S2_ct0p}, |
| 762 | {.Opcode: Hexagon::S2_ct1, .IntId: Intrinsic::hexagon_S2_ct1}, |
| 763 | {.Opcode: Hexagon::S2_ct1p, .IntId: Intrinsic::hexagon_S2_ct1p}, |
| 764 | {.Opcode: Hexagon::S2_deinterleave, .IntId: Intrinsic::hexagon_S2_deinterleave}, |
| 765 | {.Opcode: Hexagon::S2_extractu, .IntId: Intrinsic::hexagon_S2_extractu}, |
| 766 | {.Opcode: Hexagon::S2_extractu_rp, .IntId: Intrinsic::hexagon_S2_extractu_rp}, |
| 767 | {.Opcode: Hexagon::S2_extractup, .IntId: Intrinsic::hexagon_S2_extractup}, |
| 768 | {.Opcode: Hexagon::S2_extractup_rp, .IntId: Intrinsic::hexagon_S2_extractup_rp}, |
| 769 | {.Opcode: Hexagon::S2_insert, .IntId: Intrinsic::hexagon_S2_insert}, |
| 770 | {.Opcode: Hexagon::S2_insert_rp, .IntId: Intrinsic::hexagon_S2_insert_rp}, |
| 771 | {.Opcode: Hexagon::S2_insertp, .IntId: Intrinsic::hexagon_S2_insertp}, |
| 772 | {.Opcode: Hexagon::S2_insertp_rp, .IntId: Intrinsic::hexagon_S2_insertp_rp}, |
| 773 | {.Opcode: Hexagon::S2_interleave, .IntId: Intrinsic::hexagon_S2_interleave}, |
| 774 | {.Opcode: Hexagon::S2_lfsp, .IntId: Intrinsic::hexagon_S2_lfsp}, |
| 775 | {.Opcode: Hexagon::S2_lsl_r_p, .IntId: Intrinsic::hexagon_S2_lsl_r_p}, |
| 776 | {.Opcode: Hexagon::S2_lsl_r_p_acc, .IntId: Intrinsic::hexagon_S2_lsl_r_p_acc}, |
| 777 | {.Opcode: Hexagon::S2_lsl_r_p_and, .IntId: Intrinsic::hexagon_S2_lsl_r_p_and}, |
| 778 | {.Opcode: Hexagon::S2_lsl_r_p_nac, .IntId: Intrinsic::hexagon_S2_lsl_r_p_nac}, |
| 779 | {.Opcode: Hexagon::S2_lsl_r_p_or, .IntId: Intrinsic::hexagon_S2_lsl_r_p_or}, |
| 780 | {.Opcode: Hexagon::S2_lsl_r_p_xor, .IntId: Intrinsic::hexagon_S2_lsl_r_p_xor}, |
| 781 | {.Opcode: Hexagon::S2_lsl_r_r, .IntId: Intrinsic::hexagon_S2_lsl_r_r}, |
| 782 | {.Opcode: Hexagon::S2_lsl_r_r_acc, .IntId: Intrinsic::hexagon_S2_lsl_r_r_acc}, |
| 783 | {.Opcode: Hexagon::S2_lsl_r_r_and, .IntId: Intrinsic::hexagon_S2_lsl_r_r_and}, |
| 784 | {.Opcode: Hexagon::S2_lsl_r_r_nac, .IntId: Intrinsic::hexagon_S2_lsl_r_r_nac}, |
| 785 | {.Opcode: Hexagon::S2_lsl_r_r_or, .IntId: Intrinsic::hexagon_S2_lsl_r_r_or}, |
| 786 | {.Opcode: Hexagon::S2_lsl_r_vh, .IntId: Intrinsic::hexagon_S2_lsl_r_vh}, |
| 787 | {.Opcode: Hexagon::S2_lsl_r_vw, .IntId: Intrinsic::hexagon_S2_lsl_r_vw}, |
| 788 | {.Opcode: Hexagon::S2_lsr_i_p, .IntId: Intrinsic::hexagon_S2_lsr_i_p}, |
| 789 | {.Opcode: Hexagon::S2_lsr_i_p_acc, .IntId: Intrinsic::hexagon_S2_lsr_i_p_acc}, |
| 790 | {.Opcode: Hexagon::S2_lsr_i_p_and, .IntId: Intrinsic::hexagon_S2_lsr_i_p_and}, |
| 791 | {.Opcode: Hexagon::S2_lsr_i_p_nac, .IntId: Intrinsic::hexagon_S2_lsr_i_p_nac}, |
| 792 | {.Opcode: Hexagon::S2_lsr_i_p_or, .IntId: Intrinsic::hexagon_S2_lsr_i_p_or}, |
| 793 | {.Opcode: Hexagon::S2_lsr_i_p_xacc, .IntId: Intrinsic::hexagon_S2_lsr_i_p_xacc}, |
| 794 | {.Opcode: Hexagon::S2_lsr_i_r, .IntId: Intrinsic::hexagon_S2_lsr_i_r}, |
| 795 | {.Opcode: Hexagon::S2_lsr_i_r_acc, .IntId: Intrinsic::hexagon_S2_lsr_i_r_acc}, |
| 796 | {.Opcode: Hexagon::S2_lsr_i_r_and, .IntId: Intrinsic::hexagon_S2_lsr_i_r_and}, |
| 797 | {.Opcode: Hexagon::S2_lsr_i_r_nac, .IntId: Intrinsic::hexagon_S2_lsr_i_r_nac}, |
| 798 | {.Opcode: Hexagon::S2_lsr_i_r_or, .IntId: Intrinsic::hexagon_S2_lsr_i_r_or}, |
| 799 | {.Opcode: Hexagon::S2_lsr_i_r_xacc, .IntId: Intrinsic::hexagon_S2_lsr_i_r_xacc}, |
| 800 | {.Opcode: Hexagon::S2_lsr_i_vh, .IntId: Intrinsic::hexagon_S2_lsr_i_vh}, |
| 801 | {.Opcode: Hexagon::S2_lsr_i_vw, .IntId: Intrinsic::hexagon_S2_lsr_i_vw}, |
| 802 | {.Opcode: Hexagon::S2_lsr_r_p, .IntId: Intrinsic::hexagon_S2_lsr_r_p}, |
| 803 | {.Opcode: Hexagon::S2_lsr_r_p_acc, .IntId: Intrinsic::hexagon_S2_lsr_r_p_acc}, |
| 804 | {.Opcode: Hexagon::S2_lsr_r_p_and, .IntId: Intrinsic::hexagon_S2_lsr_r_p_and}, |
| 805 | {.Opcode: Hexagon::S2_lsr_r_p_nac, .IntId: Intrinsic::hexagon_S2_lsr_r_p_nac}, |
| 806 | {.Opcode: Hexagon::S2_lsr_r_p_or, .IntId: Intrinsic::hexagon_S2_lsr_r_p_or}, |
| 807 | {.Opcode: Hexagon::S2_lsr_r_p_xor, .IntId: Intrinsic::hexagon_S2_lsr_r_p_xor}, |
| 808 | {.Opcode: Hexagon::S2_lsr_r_r, .IntId: Intrinsic::hexagon_S2_lsr_r_r}, |
| 809 | {.Opcode: Hexagon::S2_lsr_r_r_acc, .IntId: Intrinsic::hexagon_S2_lsr_r_r_acc}, |
| 810 | {.Opcode: Hexagon::S2_lsr_r_r_and, .IntId: Intrinsic::hexagon_S2_lsr_r_r_and}, |
| 811 | {.Opcode: Hexagon::S2_lsr_r_r_nac, .IntId: Intrinsic::hexagon_S2_lsr_r_r_nac}, |
| 812 | {.Opcode: Hexagon::S2_lsr_r_r_or, .IntId: Intrinsic::hexagon_S2_lsr_r_r_or}, |
| 813 | {.Opcode: Hexagon::S2_lsr_r_vh, .IntId: Intrinsic::hexagon_S2_lsr_r_vh}, |
| 814 | {.Opcode: Hexagon::S2_lsr_r_vw, .IntId: Intrinsic::hexagon_S2_lsr_r_vw}, |
| 815 | {.Opcode: Hexagon::S2_mask, .IntId: Intrinsic::hexagon_S2_mask}, |
| 816 | {.Opcode: Hexagon::S2_packhl, .IntId: Intrinsic::hexagon_S2_packhl}, |
| 817 | {.Opcode: Hexagon::S2_parityp, .IntId: Intrinsic::hexagon_S2_parityp}, |
| 818 | {.Opcode: Hexagon::S2_setbit_i, .IntId: Intrinsic::hexagon_S2_setbit_i}, |
| 819 | {.Opcode: Hexagon::S2_setbit_r, .IntId: Intrinsic::hexagon_S2_setbit_r}, |
| 820 | {.Opcode: Hexagon::S2_shuffeb, .IntId: Intrinsic::hexagon_S2_shuffeb}, |
| 821 | {.Opcode: Hexagon::S2_shuffeh, .IntId: Intrinsic::hexagon_S2_shuffeh}, |
| 822 | {.Opcode: Hexagon::S2_shuffob, .IntId: Intrinsic::hexagon_S2_shuffob}, |
| 823 | {.Opcode: Hexagon::S2_shuffoh, .IntId: Intrinsic::hexagon_S2_shuffoh}, |
| 824 | {.Opcode: Hexagon::S2_storerb_pbr, .IntId: Intrinsic::hexagon_S2_storerb_pbr}, |
| 825 | {.Opcode: Hexagon::S2_storerb_pci, .IntId: Intrinsic::hexagon_S2_storerb_pci}, |
| 826 | {.Opcode: Hexagon::S2_storerb_pcr, .IntId: Intrinsic::hexagon_S2_storerb_pcr}, |
| 827 | {.Opcode: Hexagon::S2_storerd_pbr, .IntId: Intrinsic::hexagon_S2_storerd_pbr}, |
| 828 | {.Opcode: Hexagon::S2_storerd_pci, .IntId: Intrinsic::hexagon_S2_storerd_pci}, |
| 829 | {.Opcode: Hexagon::S2_storerd_pcr, .IntId: Intrinsic::hexagon_S2_storerd_pcr}, |
| 830 | {.Opcode: Hexagon::S2_storerf_pbr, .IntId: Intrinsic::hexagon_S2_storerf_pbr}, |
| 831 | {.Opcode: Hexagon::S2_storerf_pci, .IntId: Intrinsic::hexagon_S2_storerf_pci}, |
| 832 | {.Opcode: Hexagon::S2_storerf_pcr, .IntId: Intrinsic::hexagon_S2_storerf_pcr}, |
| 833 | {.Opcode: Hexagon::S2_storerh_pbr, .IntId: Intrinsic::hexagon_S2_storerh_pbr}, |
| 834 | {.Opcode: Hexagon::S2_storerh_pci, .IntId: Intrinsic::hexagon_S2_storerh_pci}, |
| 835 | {.Opcode: Hexagon::S2_storerh_pcr, .IntId: Intrinsic::hexagon_S2_storerh_pcr}, |
| 836 | {.Opcode: Hexagon::S2_storeri_pbr, .IntId: Intrinsic::hexagon_S2_storeri_pbr}, |
| 837 | {.Opcode: Hexagon::S2_storeri_pci, .IntId: Intrinsic::hexagon_S2_storeri_pci}, |
| 838 | {.Opcode: Hexagon::S2_storeri_pcr, .IntId: Intrinsic::hexagon_S2_storeri_pcr}, |
| 839 | {.Opcode: Hexagon::S2_storew_locked, .IntId: Intrinsic::hexagon_S2_storew_locked}, |
| 840 | {.Opcode: Hexagon::S2_svsathb, .IntId: Intrinsic::hexagon_S2_svsathb}, |
| 841 | {.Opcode: Hexagon::S2_svsathub, .IntId: Intrinsic::hexagon_S2_svsathub}, |
| 842 | {.Opcode: Hexagon::S2_tableidxb_goodsyntax, .IntId: Intrinsic::hexagon_S2_tableidxb_goodsyntax}, |
| 843 | {.Opcode: Hexagon::S2_tableidxd_goodsyntax, .IntId: Intrinsic::hexagon_S2_tableidxd_goodsyntax}, |
| 844 | {.Opcode: Hexagon::S2_tableidxh_goodsyntax, .IntId: Intrinsic::hexagon_S2_tableidxh_goodsyntax}, |
| 845 | {.Opcode: Hexagon::S2_tableidxw_goodsyntax, .IntId: Intrinsic::hexagon_S2_tableidxw_goodsyntax}, |
| 846 | {.Opcode: Hexagon::S2_togglebit_i, .IntId: Intrinsic::hexagon_S2_togglebit_i}, |
| 847 | {.Opcode: Hexagon::S2_togglebit_r, .IntId: Intrinsic::hexagon_S2_togglebit_r}, |
| 848 | {.Opcode: Hexagon::S2_tstbit_i, .IntId: Intrinsic::hexagon_S2_tstbit_i}, |
| 849 | {.Opcode: Hexagon::S2_tstbit_r, .IntId: Intrinsic::hexagon_S2_tstbit_r}, |
| 850 | {.Opcode: Hexagon::S2_valignib, .IntId: Intrinsic::hexagon_S2_valignib}, |
| 851 | {.Opcode: Hexagon::S2_valignrb, .IntId: Intrinsic::hexagon_S2_valignrb}, |
| 852 | {.Opcode: Hexagon::S2_vcnegh, .IntId: Intrinsic::hexagon_S2_vcnegh}, |
| 853 | {.Opcode: Hexagon::S2_vcrotate, .IntId: Intrinsic::hexagon_S2_vcrotate}, |
| 854 | {.Opcode: Hexagon::S2_vrcnegh, .IntId: Intrinsic::hexagon_S2_vrcnegh}, |
| 855 | {.Opcode: Hexagon::S2_vrndpackwh, .IntId: Intrinsic::hexagon_S2_vrndpackwh}, |
| 856 | {.Opcode: Hexagon::S2_vrndpackwhs, .IntId: Intrinsic::hexagon_S2_vrndpackwhs}, |
| 857 | {.Opcode: Hexagon::S2_vsathb, .IntId: Intrinsic::hexagon_S2_vsathb}, |
| 858 | {.Opcode: Hexagon::S2_vsathb_nopack, .IntId: Intrinsic::hexagon_S2_vsathb_nopack}, |
| 859 | {.Opcode: Hexagon::S2_vsathub, .IntId: Intrinsic::hexagon_S2_vsathub}, |
| 860 | {.Opcode: Hexagon::S2_vsathub_nopack, .IntId: Intrinsic::hexagon_S2_vsathub_nopack}, |
| 861 | {.Opcode: Hexagon::S2_vsatwh, .IntId: Intrinsic::hexagon_S2_vsatwh}, |
| 862 | {.Opcode: Hexagon::S2_vsatwh_nopack, .IntId: Intrinsic::hexagon_S2_vsatwh_nopack}, |
| 863 | {.Opcode: Hexagon::S2_vsatwuh, .IntId: Intrinsic::hexagon_S2_vsatwuh}, |
| 864 | {.Opcode: Hexagon::S2_vsatwuh_nopack, .IntId: Intrinsic::hexagon_S2_vsatwuh_nopack}, |
| 865 | {.Opcode: Hexagon::S2_vsplatrb, .IntId: Intrinsic::hexagon_S2_vsplatrb}, |
| 866 | {.Opcode: Hexagon::S2_vsplatrh, .IntId: Intrinsic::hexagon_S2_vsplatrh}, |
| 867 | {.Opcode: Hexagon::S2_vspliceib, .IntId: Intrinsic::hexagon_S2_vspliceib}, |
| 868 | {.Opcode: Hexagon::S2_vsplicerb, .IntId: Intrinsic::hexagon_S2_vsplicerb}, |
| 869 | {.Opcode: Hexagon::S2_vsxtbh, .IntId: Intrinsic::hexagon_S2_vsxtbh}, |
| 870 | {.Opcode: Hexagon::S2_vsxthw, .IntId: Intrinsic::hexagon_S2_vsxthw}, |
| 871 | {.Opcode: Hexagon::S2_vtrunehb, .IntId: Intrinsic::hexagon_S2_vtrunehb}, |
| 872 | {.Opcode: Hexagon::S2_vtrunewh, .IntId: Intrinsic::hexagon_S2_vtrunewh}, |
| 873 | {.Opcode: Hexagon::S2_vtrunohb, .IntId: Intrinsic::hexagon_S2_vtrunohb}, |
| 874 | {.Opcode: Hexagon::S2_vtrunowh, .IntId: Intrinsic::hexagon_S2_vtrunowh}, |
| 875 | {.Opcode: Hexagon::S2_vzxtbh, .IntId: Intrinsic::hexagon_S2_vzxtbh}, |
| 876 | {.Opcode: Hexagon::S2_vzxthw, .IntId: Intrinsic::hexagon_S2_vzxthw}, |
| 877 | {.Opcode: Hexagon::S4_addaddi, .IntId: Intrinsic::hexagon_S4_addaddi}, |
| 878 | {.Opcode: Hexagon::S4_addi_asl_ri, .IntId: Intrinsic::hexagon_S4_addi_asl_ri}, |
| 879 | {.Opcode: Hexagon::S4_addi_lsr_ri, .IntId: Intrinsic::hexagon_S4_addi_lsr_ri}, |
| 880 | {.Opcode: Hexagon::S4_andi_asl_ri, .IntId: Intrinsic::hexagon_S4_andi_asl_ri}, |
| 881 | {.Opcode: Hexagon::S4_andi_lsr_ri, .IntId: Intrinsic::hexagon_S4_andi_lsr_ri}, |
| 882 | {.Opcode: Hexagon::S4_clbaddi, .IntId: Intrinsic::hexagon_S4_clbaddi}, |
| 883 | {.Opcode: Hexagon::S4_clbpaddi, .IntId: Intrinsic::hexagon_S4_clbpaddi}, |
| 884 | {.Opcode: Hexagon::S4_clbpnorm, .IntId: Intrinsic::hexagon_S4_clbpnorm}, |
| 885 | {.Opcode: Hexagon::S4_extract, .IntId: Intrinsic::hexagon_S4_extract}, |
| 886 | {.Opcode: Hexagon::S4_extract_rp, .IntId: Intrinsic::hexagon_S4_extract_rp}, |
| 887 | {.Opcode: Hexagon::S4_extractp, .IntId: Intrinsic::hexagon_S4_extractp}, |
| 888 | {.Opcode: Hexagon::S4_extractp_rp, .IntId: Intrinsic::hexagon_S4_extractp_rp}, |
| 889 | {.Opcode: Hexagon::S4_lsli, .IntId: Intrinsic::hexagon_S4_lsli}, |
| 890 | {.Opcode: Hexagon::S4_ntstbit_i, .IntId: Intrinsic::hexagon_S4_ntstbit_i}, |
| 891 | {.Opcode: Hexagon::S4_ntstbit_r, .IntId: Intrinsic::hexagon_S4_ntstbit_r}, |
| 892 | {.Opcode: Hexagon::S4_or_andi, .IntId: Intrinsic::hexagon_S4_or_andi}, |
| 893 | {.Opcode: Hexagon::S4_or_andix, .IntId: Intrinsic::hexagon_S4_or_andix}, |
| 894 | {.Opcode: Hexagon::S4_or_ori, .IntId: Intrinsic::hexagon_S4_or_ori}, |
| 895 | {.Opcode: Hexagon::S4_ori_asl_ri, .IntId: Intrinsic::hexagon_S4_ori_asl_ri}, |
| 896 | {.Opcode: Hexagon::S4_ori_lsr_ri, .IntId: Intrinsic::hexagon_S4_ori_lsr_ri}, |
| 897 | {.Opcode: Hexagon::S4_parity, .IntId: Intrinsic::hexagon_S4_parity}, |
| 898 | {.Opcode: Hexagon::S4_stored_locked, .IntId: Intrinsic::hexagon_S4_stored_locked}, |
| 899 | {.Opcode: Hexagon::S4_subaddi, .IntId: Intrinsic::hexagon_S4_subaddi}, |
| 900 | {.Opcode: Hexagon::S4_subi_asl_ri, .IntId: Intrinsic::hexagon_S4_subi_asl_ri}, |
| 901 | {.Opcode: Hexagon::S4_subi_lsr_ri, .IntId: Intrinsic::hexagon_S4_subi_lsr_ri}, |
| 902 | {.Opcode: Hexagon::S4_vrcrotate, .IntId: Intrinsic::hexagon_S4_vrcrotate}, |
| 903 | {.Opcode: Hexagon::S4_vrcrotate_acc, .IntId: Intrinsic::hexagon_S4_vrcrotate_acc}, |
| 904 | {.Opcode: Hexagon::S4_vxaddsubh, .IntId: Intrinsic::hexagon_S4_vxaddsubh}, |
| 905 | {.Opcode: Hexagon::S4_vxaddsubhr, .IntId: Intrinsic::hexagon_S4_vxaddsubhr}, |
| 906 | {.Opcode: Hexagon::S4_vxaddsubw, .IntId: Intrinsic::hexagon_S4_vxaddsubw}, |
| 907 | {.Opcode: Hexagon::S4_vxsubaddh, .IntId: Intrinsic::hexagon_S4_vxsubaddh}, |
| 908 | {.Opcode: Hexagon::S4_vxsubaddhr, .IntId: Intrinsic::hexagon_S4_vxsubaddhr}, |
| 909 | {.Opcode: Hexagon::S4_vxsubaddw, .IntId: Intrinsic::hexagon_S4_vxsubaddw}, |
| 910 | {.Opcode: Hexagon::S5_asrhub_rnd_sat_goodsyntax, .IntId: Intrinsic::hexagon_S5_asrhub_rnd_sat_goodsyntax}, |
| 911 | {.Opcode: Hexagon::S5_asrhub_sat, .IntId: Intrinsic::hexagon_S5_asrhub_sat}, |
| 912 | {.Opcode: Hexagon::S5_popcountp, .IntId: Intrinsic::hexagon_S5_popcountp}, |
| 913 | {.Opcode: Hexagon::S5_vasrhrnd_goodsyntax, .IntId: Intrinsic::hexagon_S5_vasrhrnd_goodsyntax}, |
| 914 | {.Opcode: Hexagon::S6_rol_i_p, .IntId: Intrinsic::hexagon_S6_rol_i_p}, |
| 915 | {.Opcode: Hexagon::S6_rol_i_p_acc, .IntId: Intrinsic::hexagon_S6_rol_i_p_acc}, |
| 916 | {.Opcode: Hexagon::S6_rol_i_p_and, .IntId: Intrinsic::hexagon_S6_rol_i_p_and}, |
| 917 | {.Opcode: Hexagon::S6_rol_i_p_nac, .IntId: Intrinsic::hexagon_S6_rol_i_p_nac}, |
| 918 | {.Opcode: Hexagon::S6_rol_i_p_or, .IntId: Intrinsic::hexagon_S6_rol_i_p_or}, |
| 919 | {.Opcode: Hexagon::S6_rol_i_p_xacc, .IntId: Intrinsic::hexagon_S6_rol_i_p_xacc}, |
| 920 | {.Opcode: Hexagon::S6_rol_i_r, .IntId: Intrinsic::hexagon_S6_rol_i_r}, |
| 921 | {.Opcode: Hexagon::S6_rol_i_r_acc, .IntId: Intrinsic::hexagon_S6_rol_i_r_acc}, |
| 922 | {.Opcode: Hexagon::S6_rol_i_r_and, .IntId: Intrinsic::hexagon_S6_rol_i_r_and}, |
| 923 | {.Opcode: Hexagon::S6_rol_i_r_nac, .IntId: Intrinsic::hexagon_S6_rol_i_r_nac}, |
| 924 | {.Opcode: Hexagon::S6_rol_i_r_or, .IntId: Intrinsic::hexagon_S6_rol_i_r_or}, |
| 925 | {.Opcode: Hexagon::S6_rol_i_r_xacc, .IntId: Intrinsic::hexagon_S6_rol_i_r_xacc}, |
| 926 | {.Opcode: Hexagon::S6_vsplatrbp, .IntId: Intrinsic::hexagon_S6_vsplatrbp}, |
| 927 | {.Opcode: Hexagon::S6_vtrunehb_ppp, .IntId: Intrinsic::hexagon_S6_vtrunehb_ppp}, |
| 928 | {.Opcode: Hexagon::S6_vtrunohb_ppp, .IntId: Intrinsic::hexagon_S6_vtrunohb_ppp}, |
| 929 | {.Opcode: Hexagon::Y2_dccleana, .IntId: Intrinsic::hexagon_Y2_dccleana}, |
| 930 | {.Opcode: Hexagon::Y2_dccleaninva, .IntId: Intrinsic::hexagon_Y2_dccleaninva}, |
| 931 | {.Opcode: Hexagon::Y2_dcfetch, .IntId: Intrinsic::hexagon_Y2_dcfetch}, |
| 932 | {.Opcode: Hexagon::Y2_dcinva, .IntId: Intrinsic::hexagon_Y2_dcinva}, |
| 933 | {.Opcode: Hexagon::Y2_dczeroa, .IntId: Intrinsic::hexagon_Y2_dczeroa}, |
| 934 | {.Opcode: Hexagon::Y4_l2fetch, .IntId: Intrinsic::hexagon_Y4_l2fetch}, |
| 935 | {.Opcode: Hexagon::Y5_l2fetch, .IntId: Intrinsic::hexagon_Y5_l2fetch}, |
| 936 | {.Opcode: Hexagon::Y6_dmlink, .IntId: Intrinsic::hexagon_Y6_dmlink}, |
| 937 | {.Opcode: Hexagon::Y6_dmpause, .IntId: Intrinsic::hexagon_Y6_dmpause}, |
| 938 | {.Opcode: Hexagon::Y6_dmpoll, .IntId: Intrinsic::hexagon_Y6_dmpoll}, |
| 939 | {.Opcode: Hexagon::Y6_dmresume, .IntId: Intrinsic::hexagon_Y6_dmresume}, |
| 940 | {.Opcode: Hexagon::Y6_dmstart, .IntId: Intrinsic::hexagon_Y6_dmstart}, |
| 941 | {.Opcode: Hexagon::Y6_dmwait, .IntId: Intrinsic::hexagon_Y6_dmwait}, |
| 942 | #endif // GET_SCALAR_INTRINSICS |
| 943 | |
| 944 | #ifdef GET_HVX_INTRINSICS |
| 945 | {Hexagon::V6_extractw, Intrinsic::hexagon_V6_extractw, Intrinsic::hexagon_V6_extractw_128B}, |
| 946 | {Hexagon::V6_hi, Intrinsic::hexagon_V6_hi, Intrinsic::hexagon_V6_hi_128B}, |
| 947 | {Hexagon::V6_lo, Intrinsic::hexagon_V6_lo, Intrinsic::hexagon_V6_lo_128B}, |
| 948 | {Hexagon::V6_lvsplatb, Intrinsic::hexagon_V6_lvsplatb, Intrinsic::hexagon_V6_lvsplatb_128B}, |
| 949 | {Hexagon::V6_lvsplath, Intrinsic::hexagon_V6_lvsplath, Intrinsic::hexagon_V6_lvsplath_128B}, |
| 950 | {Hexagon::V6_lvsplatw, Intrinsic::hexagon_V6_lvsplatw, Intrinsic::hexagon_V6_lvsplatw_128B}, |
| 951 | {Hexagon::V6_pred_and, Intrinsic::hexagon_V6_pred_and, Intrinsic::hexagon_V6_pred_and_128B}, |
| 952 | {Hexagon::V6_pred_and_n, Intrinsic::hexagon_V6_pred_and_n, Intrinsic::hexagon_V6_pred_and_n_128B}, |
| 953 | {Hexagon::V6_pred_not, Intrinsic::hexagon_V6_pred_not, Intrinsic::hexagon_V6_pred_not_128B}, |
| 954 | {Hexagon::V6_pred_or, Intrinsic::hexagon_V6_pred_or, Intrinsic::hexagon_V6_pred_or_128B}, |
| 955 | {Hexagon::V6_pred_or_n, Intrinsic::hexagon_V6_pred_or_n, Intrinsic::hexagon_V6_pred_or_n_128B}, |
| 956 | {Hexagon::V6_pred_scalar2, Intrinsic::hexagon_V6_pred_scalar2, Intrinsic::hexagon_V6_pred_scalar2_128B}, |
| 957 | {Hexagon::V6_pred_scalar2v2, Intrinsic::hexagon_V6_pred_scalar2v2, Intrinsic::hexagon_V6_pred_scalar2v2_128B}, |
| 958 | {Hexagon::V6_pred_xor, Intrinsic::hexagon_V6_pred_xor, Intrinsic::hexagon_V6_pred_xor_128B}, |
| 959 | {Hexagon::V6_shuffeqh, Intrinsic::hexagon_V6_shuffeqh, Intrinsic::hexagon_V6_shuffeqh_128B}, |
| 960 | {Hexagon::V6_shuffeqw, Intrinsic::hexagon_V6_shuffeqw, Intrinsic::hexagon_V6_shuffeqw_128B}, |
| 961 | {Hexagon::V6_v6mpyhubs10, Intrinsic::hexagon_V6_v6mpyhubs10, Intrinsic::hexagon_V6_v6mpyhubs10_128B}, |
| 962 | {Hexagon::V6_v6mpyhubs10_vxx, Intrinsic::hexagon_V6_v6mpyhubs10_vxx, Intrinsic::hexagon_V6_v6mpyhubs10_vxx_128B}, |
| 963 | {Hexagon::V6_v6mpyvubs10, Intrinsic::hexagon_V6_v6mpyvubs10, Intrinsic::hexagon_V6_v6mpyvubs10_128B}, |
| 964 | {Hexagon::V6_v6mpyvubs10_vxx, Intrinsic::hexagon_V6_v6mpyvubs10_vxx, Intrinsic::hexagon_V6_v6mpyvubs10_vxx_128B}, |
| 965 | {Hexagon::V6_vL32b_npred_ai, Intrinsic::hexagon_V6_vL32b_npred_ai, Intrinsic::hexagon_V6_vL32b_npred_ai_128B}, |
| 966 | {Hexagon::V6_vL32b_npred_pi, Intrinsic::hexagon_V6_vL32b_npred_pi, Intrinsic::hexagon_V6_vL32b_npred_pi_128B}, |
| 967 | {Hexagon::V6_vL32b_npred_ppu, Intrinsic::hexagon_V6_vL32b_npred_ppu, Intrinsic::hexagon_V6_vL32b_npred_ppu_128B}, |
| 968 | {Hexagon::V6_vL32b_nt_npred_ai, Intrinsic::hexagon_V6_vL32b_nt_npred_ai, Intrinsic::hexagon_V6_vL32b_nt_npred_ai_128B}, |
| 969 | {Hexagon::V6_vL32b_nt_npred_pi, Intrinsic::hexagon_V6_vL32b_nt_npred_pi, Intrinsic::hexagon_V6_vL32b_nt_npred_pi_128B}, |
| 970 | {Hexagon::V6_vL32b_nt_npred_ppu, Intrinsic::hexagon_V6_vL32b_nt_npred_ppu, Intrinsic::hexagon_V6_vL32b_nt_npred_ppu_128B}, |
| 971 | {Hexagon::V6_vL32b_nt_pred_ai, Intrinsic::hexagon_V6_vL32b_nt_pred_ai, Intrinsic::hexagon_V6_vL32b_nt_pred_ai_128B}, |
| 972 | {Hexagon::V6_vL32b_nt_pred_pi, Intrinsic::hexagon_V6_vL32b_nt_pred_pi, Intrinsic::hexagon_V6_vL32b_nt_pred_pi_128B}, |
| 973 | {Hexagon::V6_vL32b_nt_pred_ppu, Intrinsic::hexagon_V6_vL32b_nt_pred_ppu, Intrinsic::hexagon_V6_vL32b_nt_pred_ppu_128B}, |
| 974 | {Hexagon::V6_vL32b_pred_ai, Intrinsic::hexagon_V6_vL32b_pred_ai, Intrinsic::hexagon_V6_vL32b_pred_ai_128B}, |
| 975 | {Hexagon::V6_vL32b_pred_pi, Intrinsic::hexagon_V6_vL32b_pred_pi, Intrinsic::hexagon_V6_vL32b_pred_pi_128B}, |
| 976 | {Hexagon::V6_vL32b_pred_ppu, Intrinsic::hexagon_V6_vL32b_pred_ppu, Intrinsic::hexagon_V6_vL32b_pred_ppu_128B}, |
| 977 | {Hexagon::V6_vS32Ub_npred_ai, Intrinsic::hexagon_V6_vS32Ub_npred_ai, Intrinsic::hexagon_V6_vS32Ub_npred_ai_128B}, |
| 978 | {Hexagon::V6_vS32Ub_npred_pi, Intrinsic::hexagon_V6_vS32Ub_npred_pi, Intrinsic::hexagon_V6_vS32Ub_npred_pi_128B}, |
| 979 | {Hexagon::V6_vS32Ub_npred_ppu, Intrinsic::hexagon_V6_vS32Ub_npred_ppu, Intrinsic::hexagon_V6_vS32Ub_npred_ppu_128B}, |
| 980 | {Hexagon::V6_vS32Ub_pred_ai, Intrinsic::hexagon_V6_vS32Ub_pred_ai, Intrinsic::hexagon_V6_vS32Ub_pred_ai_128B}, |
| 981 | {Hexagon::V6_vS32Ub_pred_pi, Intrinsic::hexagon_V6_vS32Ub_pred_pi, Intrinsic::hexagon_V6_vS32Ub_pred_pi_128B}, |
| 982 | {Hexagon::V6_vS32Ub_pred_ppu, Intrinsic::hexagon_V6_vS32Ub_pred_ppu, Intrinsic::hexagon_V6_vS32Ub_pred_ppu_128B}, |
| 983 | {Hexagon::V6_vS32b_npred_ai, Intrinsic::hexagon_V6_vS32b_npred_ai, Intrinsic::hexagon_V6_vS32b_npred_ai_128B}, |
| 984 | {Hexagon::V6_vS32b_npred_pi, Intrinsic::hexagon_V6_vS32b_npred_pi, Intrinsic::hexagon_V6_vS32b_npred_pi_128B}, |
| 985 | {Hexagon::V6_vS32b_npred_ppu, Intrinsic::hexagon_V6_vS32b_npred_ppu, Intrinsic::hexagon_V6_vS32b_npred_ppu_128B}, |
| 986 | {Hexagon::V6_vS32b_nqpred_ai, Intrinsic::hexagon_V6_vS32b_nqpred_ai, Intrinsic::hexagon_V6_vS32b_nqpred_ai_128B}, |
| 987 | {Hexagon::V6_vS32b_nt_npred_ai, Intrinsic::hexagon_V6_vS32b_nt_npred_ai, Intrinsic::hexagon_V6_vS32b_nt_npred_ai_128B}, |
| 988 | {Hexagon::V6_vS32b_nt_npred_pi, Intrinsic::hexagon_V6_vS32b_nt_npred_pi, Intrinsic::hexagon_V6_vS32b_nt_npred_pi_128B}, |
| 989 | {Hexagon::V6_vS32b_nt_npred_ppu, Intrinsic::hexagon_V6_vS32b_nt_npred_ppu, Intrinsic::hexagon_V6_vS32b_nt_npred_ppu_128B}, |
| 990 | {Hexagon::V6_vS32b_nt_nqpred_ai, Intrinsic::hexagon_V6_vS32b_nt_nqpred_ai, Intrinsic::hexagon_V6_vS32b_nt_nqpred_ai_128B}, |
| 991 | {Hexagon::V6_vS32b_nt_pred_ai, Intrinsic::hexagon_V6_vS32b_nt_pred_ai, Intrinsic::hexagon_V6_vS32b_nt_pred_ai_128B}, |
| 992 | {Hexagon::V6_vS32b_nt_pred_pi, Intrinsic::hexagon_V6_vS32b_nt_pred_pi, Intrinsic::hexagon_V6_vS32b_nt_pred_pi_128B}, |
| 993 | {Hexagon::V6_vS32b_nt_pred_ppu, Intrinsic::hexagon_V6_vS32b_nt_pred_ppu, Intrinsic::hexagon_V6_vS32b_nt_pred_ppu_128B}, |
| 994 | {Hexagon::V6_vS32b_nt_qpred_ai, Intrinsic::hexagon_V6_vS32b_nt_qpred_ai, Intrinsic::hexagon_V6_vS32b_nt_qpred_ai_128B}, |
| 995 | {Hexagon::V6_vS32b_pred_ai, Intrinsic::hexagon_V6_vS32b_pred_ai, Intrinsic::hexagon_V6_vS32b_pred_ai_128B}, |
| 996 | {Hexagon::V6_vS32b_pred_pi, Intrinsic::hexagon_V6_vS32b_pred_pi, Intrinsic::hexagon_V6_vS32b_pred_pi_128B}, |
| 997 | {Hexagon::V6_vS32b_pred_ppu, Intrinsic::hexagon_V6_vS32b_pred_ppu, Intrinsic::hexagon_V6_vS32b_pred_ppu_128B}, |
| 998 | {Hexagon::V6_vS32b_qpred_ai, Intrinsic::hexagon_V6_vS32b_qpred_ai, Intrinsic::hexagon_V6_vS32b_qpred_ai_128B}, |
| 999 | {Hexagon::V6_vabs_hf, Intrinsic::hexagon_V6_vabs_hf, Intrinsic::hexagon_V6_vabs_hf_128B}, |
| 1000 | {Hexagon::V6_vabs_sf, Intrinsic::hexagon_V6_vabs_sf, Intrinsic::hexagon_V6_vabs_sf_128B}, |
| 1001 | {Hexagon::V6_vabsb, Intrinsic::hexagon_V6_vabsb, Intrinsic::hexagon_V6_vabsb_128B}, |
| 1002 | {Hexagon::V6_vabsb_sat, Intrinsic::hexagon_V6_vabsb_sat, Intrinsic::hexagon_V6_vabsb_sat_128B}, |
| 1003 | {Hexagon::V6_vabsdiffh, Intrinsic::hexagon_V6_vabsdiffh, Intrinsic::hexagon_V6_vabsdiffh_128B}, |
| 1004 | {Hexagon::V6_vabsdiffub, Intrinsic::hexagon_V6_vabsdiffub, Intrinsic::hexagon_V6_vabsdiffub_128B}, |
| 1005 | {Hexagon::V6_vabsdiffuh, Intrinsic::hexagon_V6_vabsdiffuh, Intrinsic::hexagon_V6_vabsdiffuh_128B}, |
| 1006 | {Hexagon::V6_vabsdiffw, Intrinsic::hexagon_V6_vabsdiffw, Intrinsic::hexagon_V6_vabsdiffw_128B}, |
| 1007 | {Hexagon::V6_vabsh, Intrinsic::hexagon_V6_vabsh, Intrinsic::hexagon_V6_vabsh_128B}, |
| 1008 | {Hexagon::V6_vabsh_sat, Intrinsic::hexagon_V6_vabsh_sat, Intrinsic::hexagon_V6_vabsh_sat_128B}, |
| 1009 | {Hexagon::V6_vabsw, Intrinsic::hexagon_V6_vabsw, Intrinsic::hexagon_V6_vabsw_128B}, |
| 1010 | {Hexagon::V6_vabsw_sat, Intrinsic::hexagon_V6_vabsw_sat, Intrinsic::hexagon_V6_vabsw_sat_128B}, |
| 1011 | {Hexagon::V6_vadd_hf, Intrinsic::hexagon_V6_vadd_hf, Intrinsic::hexagon_V6_vadd_hf_128B}, |
| 1012 | {Hexagon::V6_vadd_hf_hf, Intrinsic::hexagon_V6_vadd_hf_hf, Intrinsic::hexagon_V6_vadd_hf_hf_128B}, |
| 1013 | {Hexagon::V6_vadd_qf16, Intrinsic::hexagon_V6_vadd_qf16, Intrinsic::hexagon_V6_vadd_qf16_128B}, |
| 1014 | {Hexagon::V6_vadd_qf16_mix, Intrinsic::hexagon_V6_vadd_qf16_mix, Intrinsic::hexagon_V6_vadd_qf16_mix_128B}, |
| 1015 | {Hexagon::V6_vadd_qf32, Intrinsic::hexagon_V6_vadd_qf32, Intrinsic::hexagon_V6_vadd_qf32_128B}, |
| 1016 | {Hexagon::V6_vadd_qf32_mix, Intrinsic::hexagon_V6_vadd_qf32_mix, Intrinsic::hexagon_V6_vadd_qf32_mix_128B}, |
| 1017 | {Hexagon::V6_vadd_sf, Intrinsic::hexagon_V6_vadd_sf, Intrinsic::hexagon_V6_vadd_sf_128B}, |
| 1018 | {Hexagon::V6_vadd_sf_bf, Intrinsic::hexagon_V6_vadd_sf_bf, Intrinsic::hexagon_V6_vadd_sf_bf_128B}, |
| 1019 | {Hexagon::V6_vadd_sf_hf, Intrinsic::hexagon_V6_vadd_sf_hf, Intrinsic::hexagon_V6_vadd_sf_hf_128B}, |
| 1020 | {Hexagon::V6_vadd_sf_sf, Intrinsic::hexagon_V6_vadd_sf_sf, Intrinsic::hexagon_V6_vadd_sf_sf_128B}, |
| 1021 | {Hexagon::V6_vaddb, Intrinsic::hexagon_V6_vaddb, Intrinsic::hexagon_V6_vaddb_128B}, |
| 1022 | {Hexagon::V6_vaddb_dv, Intrinsic::hexagon_V6_vaddb_dv, Intrinsic::hexagon_V6_vaddb_dv_128B}, |
| 1023 | {Hexagon::V6_vaddbnq, Intrinsic::hexagon_V6_vaddbnq, Intrinsic::hexagon_V6_vaddbnq_128B}, |
| 1024 | {Hexagon::V6_vaddbq, Intrinsic::hexagon_V6_vaddbq, Intrinsic::hexagon_V6_vaddbq_128B}, |
| 1025 | {Hexagon::V6_vaddbsat, Intrinsic::hexagon_V6_vaddbsat, Intrinsic::hexagon_V6_vaddbsat_128B}, |
| 1026 | {Hexagon::V6_vaddbsat_dv, Intrinsic::hexagon_V6_vaddbsat_dv, Intrinsic::hexagon_V6_vaddbsat_dv_128B}, |
| 1027 | {Hexagon::V6_vaddcarry, Intrinsic::hexagon_V6_vaddcarry, Intrinsic::hexagon_V6_vaddcarry_128B}, |
| 1028 | {Hexagon::V6_vaddcarryo, Intrinsic::hexagon_V6_vaddcarryo, Intrinsic::hexagon_V6_vaddcarryo_128B}, |
| 1029 | {Hexagon::V6_vaddcarrysat, Intrinsic::hexagon_V6_vaddcarrysat, Intrinsic::hexagon_V6_vaddcarrysat_128B}, |
| 1030 | {Hexagon::V6_vaddclbh, Intrinsic::hexagon_V6_vaddclbh, Intrinsic::hexagon_V6_vaddclbh_128B}, |
| 1031 | {Hexagon::V6_vaddclbw, Intrinsic::hexagon_V6_vaddclbw, Intrinsic::hexagon_V6_vaddclbw_128B}, |
| 1032 | {Hexagon::V6_vaddh, Intrinsic::hexagon_V6_vaddh, Intrinsic::hexagon_V6_vaddh_128B}, |
| 1033 | {Hexagon::V6_vaddh_dv, Intrinsic::hexagon_V6_vaddh_dv, Intrinsic::hexagon_V6_vaddh_dv_128B}, |
| 1034 | {Hexagon::V6_vaddhnq, Intrinsic::hexagon_V6_vaddhnq, Intrinsic::hexagon_V6_vaddhnq_128B}, |
| 1035 | {Hexagon::V6_vaddhq, Intrinsic::hexagon_V6_vaddhq, Intrinsic::hexagon_V6_vaddhq_128B}, |
| 1036 | {Hexagon::V6_vaddhsat, Intrinsic::hexagon_V6_vaddhsat, Intrinsic::hexagon_V6_vaddhsat_128B}, |
| 1037 | {Hexagon::V6_vaddhsat_dv, Intrinsic::hexagon_V6_vaddhsat_dv, Intrinsic::hexagon_V6_vaddhsat_dv_128B}, |
| 1038 | {Hexagon::V6_vaddhw, Intrinsic::hexagon_V6_vaddhw, Intrinsic::hexagon_V6_vaddhw_128B}, |
| 1039 | {Hexagon::V6_vaddhw_acc, Intrinsic::hexagon_V6_vaddhw_acc, Intrinsic::hexagon_V6_vaddhw_acc_128B}, |
| 1040 | {Hexagon::V6_vaddubh, Intrinsic::hexagon_V6_vaddubh, Intrinsic::hexagon_V6_vaddubh_128B}, |
| 1041 | {Hexagon::V6_vaddubh_acc, Intrinsic::hexagon_V6_vaddubh_acc, Intrinsic::hexagon_V6_vaddubh_acc_128B}, |
| 1042 | {Hexagon::V6_vaddubsat, Intrinsic::hexagon_V6_vaddubsat, Intrinsic::hexagon_V6_vaddubsat_128B}, |
| 1043 | {Hexagon::V6_vaddubsat_dv, Intrinsic::hexagon_V6_vaddubsat_dv, Intrinsic::hexagon_V6_vaddubsat_dv_128B}, |
| 1044 | {Hexagon::V6_vaddububb_sat, Intrinsic::hexagon_V6_vaddububb_sat, Intrinsic::hexagon_V6_vaddububb_sat_128B}, |
| 1045 | {Hexagon::V6_vadduhsat, Intrinsic::hexagon_V6_vadduhsat, Intrinsic::hexagon_V6_vadduhsat_128B}, |
| 1046 | {Hexagon::V6_vadduhsat_dv, Intrinsic::hexagon_V6_vadduhsat_dv, Intrinsic::hexagon_V6_vadduhsat_dv_128B}, |
| 1047 | {Hexagon::V6_vadduhw, Intrinsic::hexagon_V6_vadduhw, Intrinsic::hexagon_V6_vadduhw_128B}, |
| 1048 | {Hexagon::V6_vadduhw_acc, Intrinsic::hexagon_V6_vadduhw_acc, Intrinsic::hexagon_V6_vadduhw_acc_128B}, |
| 1049 | {Hexagon::V6_vadduwsat, Intrinsic::hexagon_V6_vadduwsat, Intrinsic::hexagon_V6_vadduwsat_128B}, |
| 1050 | {Hexagon::V6_vadduwsat_dv, Intrinsic::hexagon_V6_vadduwsat_dv, Intrinsic::hexagon_V6_vadduwsat_dv_128B}, |
| 1051 | {Hexagon::V6_vaddw, Intrinsic::hexagon_V6_vaddw, Intrinsic::hexagon_V6_vaddw_128B}, |
| 1052 | {Hexagon::V6_vaddw_dv, Intrinsic::hexagon_V6_vaddw_dv, Intrinsic::hexagon_V6_vaddw_dv_128B}, |
| 1053 | {Hexagon::V6_vaddwnq, Intrinsic::hexagon_V6_vaddwnq, Intrinsic::hexagon_V6_vaddwnq_128B}, |
| 1054 | {Hexagon::V6_vaddwq, Intrinsic::hexagon_V6_vaddwq, Intrinsic::hexagon_V6_vaddwq_128B}, |
| 1055 | {Hexagon::V6_vaddwsat, Intrinsic::hexagon_V6_vaddwsat, Intrinsic::hexagon_V6_vaddwsat_128B}, |
| 1056 | {Hexagon::V6_vaddwsat_dv, Intrinsic::hexagon_V6_vaddwsat_dv, Intrinsic::hexagon_V6_vaddwsat_dv_128B}, |
| 1057 | {Hexagon::V6_valignb, Intrinsic::hexagon_V6_valignb, Intrinsic::hexagon_V6_valignb_128B}, |
| 1058 | {Hexagon::V6_valignbi, Intrinsic::hexagon_V6_valignbi, Intrinsic::hexagon_V6_valignbi_128B}, |
| 1059 | {Hexagon::V6_vand, Intrinsic::hexagon_V6_vand, Intrinsic::hexagon_V6_vand_128B}, |
| 1060 | {Hexagon::V6_vandnqrt, Intrinsic::hexagon_V6_vandnqrt, Intrinsic::hexagon_V6_vandnqrt_128B}, |
| 1061 | {Hexagon::V6_vandnqrt_acc, Intrinsic::hexagon_V6_vandnqrt_acc, Intrinsic::hexagon_V6_vandnqrt_acc_128B}, |
| 1062 | {Hexagon::V6_vandqrt, Intrinsic::hexagon_V6_vandqrt, Intrinsic::hexagon_V6_vandqrt_128B}, |
| 1063 | {Hexagon::V6_vandqrt_acc, Intrinsic::hexagon_V6_vandqrt_acc, Intrinsic::hexagon_V6_vandqrt_acc_128B}, |
| 1064 | {Hexagon::V6_vandvnqv, Intrinsic::hexagon_V6_vandvnqv, Intrinsic::hexagon_V6_vandvnqv_128B}, |
| 1065 | {Hexagon::V6_vandvqv, Intrinsic::hexagon_V6_vandvqv, Intrinsic::hexagon_V6_vandvqv_128B}, |
| 1066 | {Hexagon::V6_vandvrt, Intrinsic::hexagon_V6_vandvrt, Intrinsic::hexagon_V6_vandvrt_128B}, |
| 1067 | {Hexagon::V6_vandvrt_acc, Intrinsic::hexagon_V6_vandvrt_acc, Intrinsic::hexagon_V6_vandvrt_acc_128B}, |
| 1068 | {Hexagon::V6_vaslh, Intrinsic::hexagon_V6_vaslh, Intrinsic::hexagon_V6_vaslh_128B}, |
| 1069 | {Hexagon::V6_vaslh_acc, Intrinsic::hexagon_V6_vaslh_acc, Intrinsic::hexagon_V6_vaslh_acc_128B}, |
| 1070 | {Hexagon::V6_vaslhv, Intrinsic::hexagon_V6_vaslhv, Intrinsic::hexagon_V6_vaslhv_128B}, |
| 1071 | {Hexagon::V6_vaslw, Intrinsic::hexagon_V6_vaslw, Intrinsic::hexagon_V6_vaslw_128B}, |
| 1072 | {Hexagon::V6_vaslw_acc, Intrinsic::hexagon_V6_vaslw_acc, Intrinsic::hexagon_V6_vaslw_acc_128B}, |
| 1073 | {Hexagon::V6_vaslwv, Intrinsic::hexagon_V6_vaslwv, Intrinsic::hexagon_V6_vaslwv_128B}, |
| 1074 | {Hexagon::V6_vasr_into, Intrinsic::hexagon_V6_vasr_into, Intrinsic::hexagon_V6_vasr_into_128B}, |
| 1075 | {Hexagon::V6_vasrh, Intrinsic::hexagon_V6_vasrh, Intrinsic::hexagon_V6_vasrh_128B}, |
| 1076 | {Hexagon::V6_vasrh_acc, Intrinsic::hexagon_V6_vasrh_acc, Intrinsic::hexagon_V6_vasrh_acc_128B}, |
| 1077 | {Hexagon::V6_vasrhbrndsat, Intrinsic::hexagon_V6_vasrhbrndsat, Intrinsic::hexagon_V6_vasrhbrndsat_128B}, |
| 1078 | {Hexagon::V6_vasrhbsat, Intrinsic::hexagon_V6_vasrhbsat, Intrinsic::hexagon_V6_vasrhbsat_128B}, |
| 1079 | {Hexagon::V6_vasrhubrndsat, Intrinsic::hexagon_V6_vasrhubrndsat, Intrinsic::hexagon_V6_vasrhubrndsat_128B}, |
| 1080 | {Hexagon::V6_vasrhubsat, Intrinsic::hexagon_V6_vasrhubsat, Intrinsic::hexagon_V6_vasrhubsat_128B}, |
| 1081 | {Hexagon::V6_vasrhv, Intrinsic::hexagon_V6_vasrhv, Intrinsic::hexagon_V6_vasrhv_128B}, |
| 1082 | {Hexagon::V6_vasruhubrndsat, Intrinsic::hexagon_V6_vasruhubrndsat, Intrinsic::hexagon_V6_vasruhubrndsat_128B}, |
| 1083 | {Hexagon::V6_vasruhubsat, Intrinsic::hexagon_V6_vasruhubsat, Intrinsic::hexagon_V6_vasruhubsat_128B}, |
| 1084 | {Hexagon::V6_vasruwuhrndsat, Intrinsic::hexagon_V6_vasruwuhrndsat, Intrinsic::hexagon_V6_vasruwuhrndsat_128B}, |
| 1085 | {Hexagon::V6_vasruwuhsat, Intrinsic::hexagon_V6_vasruwuhsat, Intrinsic::hexagon_V6_vasruwuhsat_128B}, |
| 1086 | {Hexagon::V6_vasrvuhubrndsat, Intrinsic::hexagon_V6_vasrvuhubrndsat, Intrinsic::hexagon_V6_vasrvuhubrndsat_128B}, |
| 1087 | {Hexagon::V6_vasrvuhubsat, Intrinsic::hexagon_V6_vasrvuhubsat, Intrinsic::hexagon_V6_vasrvuhubsat_128B}, |
| 1088 | {Hexagon::V6_vasrvwuhrndsat, Intrinsic::hexagon_V6_vasrvwuhrndsat, Intrinsic::hexagon_V6_vasrvwuhrndsat_128B}, |
| 1089 | {Hexagon::V6_vasrvwuhsat, Intrinsic::hexagon_V6_vasrvwuhsat, Intrinsic::hexagon_V6_vasrvwuhsat_128B}, |
| 1090 | {Hexagon::V6_vasrw, Intrinsic::hexagon_V6_vasrw, Intrinsic::hexagon_V6_vasrw_128B}, |
| 1091 | {Hexagon::V6_vasrw_acc, Intrinsic::hexagon_V6_vasrw_acc, Intrinsic::hexagon_V6_vasrw_acc_128B}, |
| 1092 | {Hexagon::V6_vasrwh, Intrinsic::hexagon_V6_vasrwh, Intrinsic::hexagon_V6_vasrwh_128B}, |
| 1093 | {Hexagon::V6_vasrwhrndsat, Intrinsic::hexagon_V6_vasrwhrndsat, Intrinsic::hexagon_V6_vasrwhrndsat_128B}, |
| 1094 | {Hexagon::V6_vasrwhsat, Intrinsic::hexagon_V6_vasrwhsat, Intrinsic::hexagon_V6_vasrwhsat_128B}, |
| 1095 | {Hexagon::V6_vasrwuhrndsat, Intrinsic::hexagon_V6_vasrwuhrndsat, Intrinsic::hexagon_V6_vasrwuhrndsat_128B}, |
| 1096 | {Hexagon::V6_vasrwuhsat, Intrinsic::hexagon_V6_vasrwuhsat, Intrinsic::hexagon_V6_vasrwuhsat_128B}, |
| 1097 | {Hexagon::V6_vasrwv, Intrinsic::hexagon_V6_vasrwv, Intrinsic::hexagon_V6_vasrwv_128B}, |
| 1098 | {Hexagon::V6_vassign, Intrinsic::hexagon_V6_vassign, Intrinsic::hexagon_V6_vassign_128B}, |
| 1099 | {Hexagon::V6_vassign_fp, Intrinsic::hexagon_V6_vassign_fp, Intrinsic::hexagon_V6_vassign_fp_128B}, |
| 1100 | {Hexagon::V6_vassignp, Intrinsic::hexagon_V6_vassignp, Intrinsic::hexagon_V6_vassignp_128B}, |
| 1101 | {Hexagon::V6_vavgb, Intrinsic::hexagon_V6_vavgb, Intrinsic::hexagon_V6_vavgb_128B}, |
| 1102 | {Hexagon::V6_vavgbrnd, Intrinsic::hexagon_V6_vavgbrnd, Intrinsic::hexagon_V6_vavgbrnd_128B}, |
| 1103 | {Hexagon::V6_vavgh, Intrinsic::hexagon_V6_vavgh, Intrinsic::hexagon_V6_vavgh_128B}, |
| 1104 | {Hexagon::V6_vavghrnd, Intrinsic::hexagon_V6_vavghrnd, Intrinsic::hexagon_V6_vavghrnd_128B}, |
| 1105 | {Hexagon::V6_vavgub, Intrinsic::hexagon_V6_vavgub, Intrinsic::hexagon_V6_vavgub_128B}, |
| 1106 | {Hexagon::V6_vavgubrnd, Intrinsic::hexagon_V6_vavgubrnd, Intrinsic::hexagon_V6_vavgubrnd_128B}, |
| 1107 | {Hexagon::V6_vavguh, Intrinsic::hexagon_V6_vavguh, Intrinsic::hexagon_V6_vavguh_128B}, |
| 1108 | {Hexagon::V6_vavguhrnd, Intrinsic::hexagon_V6_vavguhrnd, Intrinsic::hexagon_V6_vavguhrnd_128B}, |
| 1109 | {Hexagon::V6_vavguw, Intrinsic::hexagon_V6_vavguw, Intrinsic::hexagon_V6_vavguw_128B}, |
| 1110 | {Hexagon::V6_vavguwrnd, Intrinsic::hexagon_V6_vavguwrnd, Intrinsic::hexagon_V6_vavguwrnd_128B}, |
| 1111 | {Hexagon::V6_vavgw, Intrinsic::hexagon_V6_vavgw, Intrinsic::hexagon_V6_vavgw_128B}, |
| 1112 | {Hexagon::V6_vavgwrnd, Intrinsic::hexagon_V6_vavgwrnd, Intrinsic::hexagon_V6_vavgwrnd_128B}, |
| 1113 | {Hexagon::V6_vcl0h, Intrinsic::hexagon_V6_vcl0h, Intrinsic::hexagon_V6_vcl0h_128B}, |
| 1114 | {Hexagon::V6_vcl0w, Intrinsic::hexagon_V6_vcl0w, Intrinsic::hexagon_V6_vcl0w_128B}, |
| 1115 | {Hexagon::V6_vcombine, Intrinsic::hexagon_V6_vcombine, Intrinsic::hexagon_V6_vcombine_128B}, |
| 1116 | {Hexagon::V6_vconv_h_hf, Intrinsic::hexagon_V6_vconv_h_hf, Intrinsic::hexagon_V6_vconv_h_hf_128B}, |
| 1117 | {Hexagon::V6_vconv_hf_h, Intrinsic::hexagon_V6_vconv_hf_h, Intrinsic::hexagon_V6_vconv_hf_h_128B}, |
| 1118 | {Hexagon::V6_vconv_hf_qf16, Intrinsic::hexagon_V6_vconv_hf_qf16, Intrinsic::hexagon_V6_vconv_hf_qf16_128B}, |
| 1119 | {Hexagon::V6_vconv_hf_qf32, Intrinsic::hexagon_V6_vconv_hf_qf32, Intrinsic::hexagon_V6_vconv_hf_qf32_128B}, |
| 1120 | {Hexagon::V6_vconv_sf_qf32, Intrinsic::hexagon_V6_vconv_sf_qf32, Intrinsic::hexagon_V6_vconv_sf_qf32_128B}, |
| 1121 | {Hexagon::V6_vconv_sf_w, Intrinsic::hexagon_V6_vconv_sf_w, Intrinsic::hexagon_V6_vconv_sf_w_128B}, |
| 1122 | {Hexagon::V6_vconv_w_sf, Intrinsic::hexagon_V6_vconv_w_sf, Intrinsic::hexagon_V6_vconv_w_sf_128B}, |
| 1123 | {Hexagon::V6_vcvt_b_hf, Intrinsic::hexagon_V6_vcvt_b_hf, Intrinsic::hexagon_V6_vcvt_b_hf_128B}, |
| 1124 | {Hexagon::V6_vcvt_bf_sf, Intrinsic::hexagon_V6_vcvt_bf_sf, Intrinsic::hexagon_V6_vcvt_bf_sf_128B}, |
| 1125 | {Hexagon::V6_vcvt_h_hf, Intrinsic::hexagon_V6_vcvt_h_hf, Intrinsic::hexagon_V6_vcvt_h_hf_128B}, |
| 1126 | {Hexagon::V6_vcvt_hf_b, Intrinsic::hexagon_V6_vcvt_hf_b, Intrinsic::hexagon_V6_vcvt_hf_b_128B}, |
| 1127 | {Hexagon::V6_vcvt_hf_h, Intrinsic::hexagon_V6_vcvt_hf_h, Intrinsic::hexagon_V6_vcvt_hf_h_128B}, |
| 1128 | {Hexagon::V6_vcvt_hf_sf, Intrinsic::hexagon_V6_vcvt_hf_sf, Intrinsic::hexagon_V6_vcvt_hf_sf_128B}, |
| 1129 | {Hexagon::V6_vcvt_hf_ub, Intrinsic::hexagon_V6_vcvt_hf_ub, Intrinsic::hexagon_V6_vcvt_hf_ub_128B}, |
| 1130 | {Hexagon::V6_vcvt_hf_uh, Intrinsic::hexagon_V6_vcvt_hf_uh, Intrinsic::hexagon_V6_vcvt_hf_uh_128B}, |
| 1131 | {Hexagon::V6_vcvt_sf_hf, Intrinsic::hexagon_V6_vcvt_sf_hf, Intrinsic::hexagon_V6_vcvt_sf_hf_128B}, |
| 1132 | {Hexagon::V6_vcvt_ub_hf, Intrinsic::hexagon_V6_vcvt_ub_hf, Intrinsic::hexagon_V6_vcvt_ub_hf_128B}, |
| 1133 | {Hexagon::V6_vcvt_uh_hf, Intrinsic::hexagon_V6_vcvt_uh_hf, Intrinsic::hexagon_V6_vcvt_uh_hf_128B}, |
| 1134 | {Hexagon::V6_vd0, Intrinsic::hexagon_V6_vd0, Intrinsic::hexagon_V6_vd0_128B}, |
| 1135 | {Hexagon::V6_vdd0, Intrinsic::hexagon_V6_vdd0, Intrinsic::hexagon_V6_vdd0_128B}, |
| 1136 | {Hexagon::V6_vdealb, Intrinsic::hexagon_V6_vdealb, Intrinsic::hexagon_V6_vdealb_128B}, |
| 1137 | {Hexagon::V6_vdealb4w, Intrinsic::hexagon_V6_vdealb4w, Intrinsic::hexagon_V6_vdealb4w_128B}, |
| 1138 | {Hexagon::V6_vdealh, Intrinsic::hexagon_V6_vdealh, Intrinsic::hexagon_V6_vdealh_128B}, |
| 1139 | {Hexagon::V6_vdealvdd, Intrinsic::hexagon_V6_vdealvdd, Intrinsic::hexagon_V6_vdealvdd_128B}, |
| 1140 | {Hexagon::V6_vdelta, Intrinsic::hexagon_V6_vdelta, Intrinsic::hexagon_V6_vdelta_128B}, |
| 1141 | {Hexagon::V6_vdmpy_sf_hf, Intrinsic::hexagon_V6_vdmpy_sf_hf, Intrinsic::hexagon_V6_vdmpy_sf_hf_128B}, |
| 1142 | {Hexagon::V6_vdmpy_sf_hf_acc, Intrinsic::hexagon_V6_vdmpy_sf_hf_acc, Intrinsic::hexagon_V6_vdmpy_sf_hf_acc_128B}, |
| 1143 | {Hexagon::V6_vdmpybus, Intrinsic::hexagon_V6_vdmpybus, Intrinsic::hexagon_V6_vdmpybus_128B}, |
| 1144 | {Hexagon::V6_vdmpybus_acc, Intrinsic::hexagon_V6_vdmpybus_acc, Intrinsic::hexagon_V6_vdmpybus_acc_128B}, |
| 1145 | {Hexagon::V6_vdmpybus_dv, Intrinsic::hexagon_V6_vdmpybus_dv, Intrinsic::hexagon_V6_vdmpybus_dv_128B}, |
| 1146 | {Hexagon::V6_vdmpybus_dv_acc, Intrinsic::hexagon_V6_vdmpybus_dv_acc, Intrinsic::hexagon_V6_vdmpybus_dv_acc_128B}, |
| 1147 | {Hexagon::V6_vdmpyhb, Intrinsic::hexagon_V6_vdmpyhb, Intrinsic::hexagon_V6_vdmpyhb_128B}, |
| 1148 | {Hexagon::V6_vdmpyhb_acc, Intrinsic::hexagon_V6_vdmpyhb_acc, Intrinsic::hexagon_V6_vdmpyhb_acc_128B}, |
| 1149 | {Hexagon::V6_vdmpyhb_dv, Intrinsic::hexagon_V6_vdmpyhb_dv, Intrinsic::hexagon_V6_vdmpyhb_dv_128B}, |
| 1150 | {Hexagon::V6_vdmpyhb_dv_acc, Intrinsic::hexagon_V6_vdmpyhb_dv_acc, Intrinsic::hexagon_V6_vdmpyhb_dv_acc_128B}, |
| 1151 | {Hexagon::V6_vdmpyhisat, Intrinsic::hexagon_V6_vdmpyhisat, Intrinsic::hexagon_V6_vdmpyhisat_128B}, |
| 1152 | {Hexagon::V6_vdmpyhisat_acc, Intrinsic::hexagon_V6_vdmpyhisat_acc, Intrinsic::hexagon_V6_vdmpyhisat_acc_128B}, |
| 1153 | {Hexagon::V6_vdmpyhsat, Intrinsic::hexagon_V6_vdmpyhsat, Intrinsic::hexagon_V6_vdmpyhsat_128B}, |
| 1154 | {Hexagon::V6_vdmpyhsat_acc, Intrinsic::hexagon_V6_vdmpyhsat_acc, Intrinsic::hexagon_V6_vdmpyhsat_acc_128B}, |
| 1155 | {Hexagon::V6_vdmpyhsuisat, Intrinsic::hexagon_V6_vdmpyhsuisat, Intrinsic::hexagon_V6_vdmpyhsuisat_128B}, |
| 1156 | {Hexagon::V6_vdmpyhsuisat_acc, Intrinsic::hexagon_V6_vdmpyhsuisat_acc, Intrinsic::hexagon_V6_vdmpyhsuisat_acc_128B}, |
| 1157 | {Hexagon::V6_vdmpyhsusat, Intrinsic::hexagon_V6_vdmpyhsusat, Intrinsic::hexagon_V6_vdmpyhsusat_128B}, |
| 1158 | {Hexagon::V6_vdmpyhsusat_acc, Intrinsic::hexagon_V6_vdmpyhsusat_acc, Intrinsic::hexagon_V6_vdmpyhsusat_acc_128B}, |
| 1159 | {Hexagon::V6_vdmpyhvsat, Intrinsic::hexagon_V6_vdmpyhvsat, Intrinsic::hexagon_V6_vdmpyhvsat_128B}, |
| 1160 | {Hexagon::V6_vdmpyhvsat_acc, Intrinsic::hexagon_V6_vdmpyhvsat_acc, Intrinsic::hexagon_V6_vdmpyhvsat_acc_128B}, |
| 1161 | {Hexagon::V6_vdsaduh, Intrinsic::hexagon_V6_vdsaduh, Intrinsic::hexagon_V6_vdsaduh_128B}, |
| 1162 | {Hexagon::V6_vdsaduh_acc, Intrinsic::hexagon_V6_vdsaduh_acc, Intrinsic::hexagon_V6_vdsaduh_acc_128B}, |
| 1163 | {Hexagon::V6_veqb, Intrinsic::hexagon_V6_veqb, Intrinsic::hexagon_V6_veqb_128B}, |
| 1164 | {Hexagon::V6_veqb_and, Intrinsic::hexagon_V6_veqb_and, Intrinsic::hexagon_V6_veqb_and_128B}, |
| 1165 | {Hexagon::V6_veqb_or, Intrinsic::hexagon_V6_veqb_or, Intrinsic::hexagon_V6_veqb_or_128B}, |
| 1166 | {Hexagon::V6_veqb_xor, Intrinsic::hexagon_V6_veqb_xor, Intrinsic::hexagon_V6_veqb_xor_128B}, |
| 1167 | {Hexagon::V6_veqh, Intrinsic::hexagon_V6_veqh, Intrinsic::hexagon_V6_veqh_128B}, |
| 1168 | {Hexagon::V6_veqh_and, Intrinsic::hexagon_V6_veqh_and, Intrinsic::hexagon_V6_veqh_and_128B}, |
| 1169 | {Hexagon::V6_veqh_or, Intrinsic::hexagon_V6_veqh_or, Intrinsic::hexagon_V6_veqh_or_128B}, |
| 1170 | {Hexagon::V6_veqh_xor, Intrinsic::hexagon_V6_veqh_xor, Intrinsic::hexagon_V6_veqh_xor_128B}, |
| 1171 | {Hexagon::V6_veqw, Intrinsic::hexagon_V6_veqw, Intrinsic::hexagon_V6_veqw_128B}, |
| 1172 | {Hexagon::V6_veqw_and, Intrinsic::hexagon_V6_veqw_and, Intrinsic::hexagon_V6_veqw_and_128B}, |
| 1173 | {Hexagon::V6_veqw_or, Intrinsic::hexagon_V6_veqw_or, Intrinsic::hexagon_V6_veqw_or_128B}, |
| 1174 | {Hexagon::V6_veqw_xor, Intrinsic::hexagon_V6_veqw_xor, Intrinsic::hexagon_V6_veqw_xor_128B}, |
| 1175 | {Hexagon::V6_vfmax_hf, Intrinsic::hexagon_V6_vfmax_hf, Intrinsic::hexagon_V6_vfmax_hf_128B}, |
| 1176 | {Hexagon::V6_vfmax_sf, Intrinsic::hexagon_V6_vfmax_sf, Intrinsic::hexagon_V6_vfmax_sf_128B}, |
| 1177 | {Hexagon::V6_vfmin_hf, Intrinsic::hexagon_V6_vfmin_hf, Intrinsic::hexagon_V6_vfmin_hf_128B}, |
| 1178 | {Hexagon::V6_vfmin_sf, Intrinsic::hexagon_V6_vfmin_sf, Intrinsic::hexagon_V6_vfmin_sf_128B}, |
| 1179 | {Hexagon::V6_vfneg_hf, Intrinsic::hexagon_V6_vfneg_hf, Intrinsic::hexagon_V6_vfneg_hf_128B}, |
| 1180 | {Hexagon::V6_vfneg_sf, Intrinsic::hexagon_V6_vfneg_sf, Intrinsic::hexagon_V6_vfneg_sf_128B}, |
| 1181 | {Hexagon::V6_vgathermh, Intrinsic::hexagon_V6_vgathermh, Intrinsic::hexagon_V6_vgathermh_128B}, |
| 1182 | {Hexagon::V6_vgathermhq, Intrinsic::hexagon_V6_vgathermhq, Intrinsic::hexagon_V6_vgathermhq_128B}, |
| 1183 | {Hexagon::V6_vgathermhw, Intrinsic::hexagon_V6_vgathermhw, Intrinsic::hexagon_V6_vgathermhw_128B}, |
| 1184 | {Hexagon::V6_vgathermhwq, Intrinsic::hexagon_V6_vgathermhwq, Intrinsic::hexagon_V6_vgathermhwq_128B}, |
| 1185 | {Hexagon::V6_vgathermw, Intrinsic::hexagon_V6_vgathermw, Intrinsic::hexagon_V6_vgathermw_128B}, |
| 1186 | {Hexagon::V6_vgathermwq, Intrinsic::hexagon_V6_vgathermwq, Intrinsic::hexagon_V6_vgathermwq_128B}, |
| 1187 | {Hexagon::V6_vgtb, Intrinsic::hexagon_V6_vgtb, Intrinsic::hexagon_V6_vgtb_128B}, |
| 1188 | {Hexagon::V6_vgtb_and, Intrinsic::hexagon_V6_vgtb_and, Intrinsic::hexagon_V6_vgtb_and_128B}, |
| 1189 | {Hexagon::V6_vgtb_or, Intrinsic::hexagon_V6_vgtb_or, Intrinsic::hexagon_V6_vgtb_or_128B}, |
| 1190 | {Hexagon::V6_vgtb_xor, Intrinsic::hexagon_V6_vgtb_xor, Intrinsic::hexagon_V6_vgtb_xor_128B}, |
| 1191 | {Hexagon::V6_vgtbf, Intrinsic::hexagon_V6_vgtbf, Intrinsic::hexagon_V6_vgtbf_128B}, |
| 1192 | {Hexagon::V6_vgtbf_and, Intrinsic::hexagon_V6_vgtbf_and, Intrinsic::hexagon_V6_vgtbf_and_128B}, |
| 1193 | {Hexagon::V6_vgtbf_or, Intrinsic::hexagon_V6_vgtbf_or, Intrinsic::hexagon_V6_vgtbf_or_128B}, |
| 1194 | {Hexagon::V6_vgtbf_xor, Intrinsic::hexagon_V6_vgtbf_xor, Intrinsic::hexagon_V6_vgtbf_xor_128B}, |
| 1195 | {Hexagon::V6_vgth, Intrinsic::hexagon_V6_vgth, Intrinsic::hexagon_V6_vgth_128B}, |
| 1196 | {Hexagon::V6_vgth_and, Intrinsic::hexagon_V6_vgth_and, Intrinsic::hexagon_V6_vgth_and_128B}, |
| 1197 | {Hexagon::V6_vgth_or, Intrinsic::hexagon_V6_vgth_or, Intrinsic::hexagon_V6_vgth_or_128B}, |
| 1198 | {Hexagon::V6_vgth_xor, Intrinsic::hexagon_V6_vgth_xor, Intrinsic::hexagon_V6_vgth_xor_128B}, |
| 1199 | {Hexagon::V6_vgthf, Intrinsic::hexagon_V6_vgthf, Intrinsic::hexagon_V6_vgthf_128B}, |
| 1200 | {Hexagon::V6_vgthf_and, Intrinsic::hexagon_V6_vgthf_and, Intrinsic::hexagon_V6_vgthf_and_128B}, |
| 1201 | {Hexagon::V6_vgthf_or, Intrinsic::hexagon_V6_vgthf_or, Intrinsic::hexagon_V6_vgthf_or_128B}, |
| 1202 | {Hexagon::V6_vgthf_xor, Intrinsic::hexagon_V6_vgthf_xor, Intrinsic::hexagon_V6_vgthf_xor_128B}, |
| 1203 | {Hexagon::V6_vgtsf, Intrinsic::hexagon_V6_vgtsf, Intrinsic::hexagon_V6_vgtsf_128B}, |
| 1204 | {Hexagon::V6_vgtsf_and, Intrinsic::hexagon_V6_vgtsf_and, Intrinsic::hexagon_V6_vgtsf_and_128B}, |
| 1205 | {Hexagon::V6_vgtsf_or, Intrinsic::hexagon_V6_vgtsf_or, Intrinsic::hexagon_V6_vgtsf_or_128B}, |
| 1206 | {Hexagon::V6_vgtsf_xor, Intrinsic::hexagon_V6_vgtsf_xor, Intrinsic::hexagon_V6_vgtsf_xor_128B}, |
| 1207 | {Hexagon::V6_vgtub, Intrinsic::hexagon_V6_vgtub, Intrinsic::hexagon_V6_vgtub_128B}, |
| 1208 | {Hexagon::V6_vgtub_and, Intrinsic::hexagon_V6_vgtub_and, Intrinsic::hexagon_V6_vgtub_and_128B}, |
| 1209 | {Hexagon::V6_vgtub_or, Intrinsic::hexagon_V6_vgtub_or, Intrinsic::hexagon_V6_vgtub_or_128B}, |
| 1210 | {Hexagon::V6_vgtub_xor, Intrinsic::hexagon_V6_vgtub_xor, Intrinsic::hexagon_V6_vgtub_xor_128B}, |
| 1211 | {Hexagon::V6_vgtuh, Intrinsic::hexagon_V6_vgtuh, Intrinsic::hexagon_V6_vgtuh_128B}, |
| 1212 | {Hexagon::V6_vgtuh_and, Intrinsic::hexagon_V6_vgtuh_and, Intrinsic::hexagon_V6_vgtuh_and_128B}, |
| 1213 | {Hexagon::V6_vgtuh_or, Intrinsic::hexagon_V6_vgtuh_or, Intrinsic::hexagon_V6_vgtuh_or_128B}, |
| 1214 | {Hexagon::V6_vgtuh_xor, Intrinsic::hexagon_V6_vgtuh_xor, Intrinsic::hexagon_V6_vgtuh_xor_128B}, |
| 1215 | {Hexagon::V6_vgtuw, Intrinsic::hexagon_V6_vgtuw, Intrinsic::hexagon_V6_vgtuw_128B}, |
| 1216 | {Hexagon::V6_vgtuw_and, Intrinsic::hexagon_V6_vgtuw_and, Intrinsic::hexagon_V6_vgtuw_and_128B}, |
| 1217 | {Hexagon::V6_vgtuw_or, Intrinsic::hexagon_V6_vgtuw_or, Intrinsic::hexagon_V6_vgtuw_or_128B}, |
| 1218 | {Hexagon::V6_vgtuw_xor, Intrinsic::hexagon_V6_vgtuw_xor, Intrinsic::hexagon_V6_vgtuw_xor_128B}, |
| 1219 | {Hexagon::V6_vgtw, Intrinsic::hexagon_V6_vgtw, Intrinsic::hexagon_V6_vgtw_128B}, |
| 1220 | {Hexagon::V6_vgtw_and, Intrinsic::hexagon_V6_vgtw_and, Intrinsic::hexagon_V6_vgtw_and_128B}, |
| 1221 | {Hexagon::V6_vgtw_or, Intrinsic::hexagon_V6_vgtw_or, Intrinsic::hexagon_V6_vgtw_or_128B}, |
| 1222 | {Hexagon::V6_vgtw_xor, Intrinsic::hexagon_V6_vgtw_xor, Intrinsic::hexagon_V6_vgtw_xor_128B}, |
| 1223 | {Hexagon::V6_vinsertwr, Intrinsic::hexagon_V6_vinsertwr, Intrinsic::hexagon_V6_vinsertwr_128B}, |
| 1224 | {Hexagon::V6_vlalignb, Intrinsic::hexagon_V6_vlalignb, Intrinsic::hexagon_V6_vlalignb_128B}, |
| 1225 | {Hexagon::V6_vlalignbi, Intrinsic::hexagon_V6_vlalignbi, Intrinsic::hexagon_V6_vlalignbi_128B}, |
| 1226 | {Hexagon::V6_vlsrb, Intrinsic::hexagon_V6_vlsrb, Intrinsic::hexagon_V6_vlsrb_128B}, |
| 1227 | {Hexagon::V6_vlsrh, Intrinsic::hexagon_V6_vlsrh, Intrinsic::hexagon_V6_vlsrh_128B}, |
| 1228 | {Hexagon::V6_vlsrhv, Intrinsic::hexagon_V6_vlsrhv, Intrinsic::hexagon_V6_vlsrhv_128B}, |
| 1229 | {Hexagon::V6_vlsrw, Intrinsic::hexagon_V6_vlsrw, Intrinsic::hexagon_V6_vlsrw_128B}, |
| 1230 | {Hexagon::V6_vlsrwv, Intrinsic::hexagon_V6_vlsrwv, Intrinsic::hexagon_V6_vlsrwv_128B}, |
| 1231 | {Hexagon::V6_vlut4, Intrinsic::hexagon_V6_vlut4, Intrinsic::hexagon_V6_vlut4_128B}, |
| 1232 | {Hexagon::V6_vlutvvb, Intrinsic::hexagon_V6_vlutvvb, Intrinsic::hexagon_V6_vlutvvb_128B}, |
| 1233 | {Hexagon::V6_vlutvvb_nm, Intrinsic::hexagon_V6_vlutvvb_nm, Intrinsic::hexagon_V6_vlutvvb_nm_128B}, |
| 1234 | {Hexagon::V6_vlutvvb_oracc, Intrinsic::hexagon_V6_vlutvvb_oracc, Intrinsic::hexagon_V6_vlutvvb_oracc_128B}, |
| 1235 | {Hexagon::V6_vlutvvb_oracci, Intrinsic::hexagon_V6_vlutvvb_oracci, Intrinsic::hexagon_V6_vlutvvb_oracci_128B}, |
| 1236 | {Hexagon::V6_vlutvvbi, Intrinsic::hexagon_V6_vlutvvbi, Intrinsic::hexagon_V6_vlutvvbi_128B}, |
| 1237 | {Hexagon::V6_vlutvwh, Intrinsic::hexagon_V6_vlutvwh, Intrinsic::hexagon_V6_vlutvwh_128B}, |
| 1238 | {Hexagon::V6_vlutvwh_nm, Intrinsic::hexagon_V6_vlutvwh_nm, Intrinsic::hexagon_V6_vlutvwh_nm_128B}, |
| 1239 | {Hexagon::V6_vlutvwh_oracc, Intrinsic::hexagon_V6_vlutvwh_oracc, Intrinsic::hexagon_V6_vlutvwh_oracc_128B}, |
| 1240 | {Hexagon::V6_vlutvwh_oracci, Intrinsic::hexagon_V6_vlutvwh_oracci, Intrinsic::hexagon_V6_vlutvwh_oracci_128B}, |
| 1241 | {Hexagon::V6_vlutvwhi, Intrinsic::hexagon_V6_vlutvwhi, Intrinsic::hexagon_V6_vlutvwhi_128B}, |
| 1242 | {Hexagon::V6_vmax_bf, Intrinsic::hexagon_V6_vmax_bf, Intrinsic::hexagon_V6_vmax_bf_128B}, |
| 1243 | {Hexagon::V6_vmax_hf, Intrinsic::hexagon_V6_vmax_hf, Intrinsic::hexagon_V6_vmax_hf_128B}, |
| 1244 | {Hexagon::V6_vmax_sf, Intrinsic::hexagon_V6_vmax_sf, Intrinsic::hexagon_V6_vmax_sf_128B}, |
| 1245 | {Hexagon::V6_vmaxb, Intrinsic::hexagon_V6_vmaxb, Intrinsic::hexagon_V6_vmaxb_128B}, |
| 1246 | {Hexagon::V6_vmaxh, Intrinsic::hexagon_V6_vmaxh, Intrinsic::hexagon_V6_vmaxh_128B}, |
| 1247 | {Hexagon::V6_vmaxub, Intrinsic::hexagon_V6_vmaxub, Intrinsic::hexagon_V6_vmaxub_128B}, |
| 1248 | {Hexagon::V6_vmaxuh, Intrinsic::hexagon_V6_vmaxuh, Intrinsic::hexagon_V6_vmaxuh_128B}, |
| 1249 | {Hexagon::V6_vmaxw, Intrinsic::hexagon_V6_vmaxw, Intrinsic::hexagon_V6_vmaxw_128B}, |
| 1250 | {Hexagon::V6_vmin_bf, Intrinsic::hexagon_V6_vmin_bf, Intrinsic::hexagon_V6_vmin_bf_128B}, |
| 1251 | {Hexagon::V6_vmin_hf, Intrinsic::hexagon_V6_vmin_hf, Intrinsic::hexagon_V6_vmin_hf_128B}, |
| 1252 | {Hexagon::V6_vmin_sf, Intrinsic::hexagon_V6_vmin_sf, Intrinsic::hexagon_V6_vmin_sf_128B}, |
| 1253 | {Hexagon::V6_vminb, Intrinsic::hexagon_V6_vminb, Intrinsic::hexagon_V6_vminb_128B}, |
| 1254 | {Hexagon::V6_vminh, Intrinsic::hexagon_V6_vminh, Intrinsic::hexagon_V6_vminh_128B}, |
| 1255 | {Hexagon::V6_vminub, Intrinsic::hexagon_V6_vminub, Intrinsic::hexagon_V6_vminub_128B}, |
| 1256 | {Hexagon::V6_vminuh, Intrinsic::hexagon_V6_vminuh, Intrinsic::hexagon_V6_vminuh_128B}, |
| 1257 | {Hexagon::V6_vminw, Intrinsic::hexagon_V6_vminw, Intrinsic::hexagon_V6_vminw_128B}, |
| 1258 | {Hexagon::V6_vmpabus, Intrinsic::hexagon_V6_vmpabus, Intrinsic::hexagon_V6_vmpabus_128B}, |
| 1259 | {Hexagon::V6_vmpabus_acc, Intrinsic::hexagon_V6_vmpabus_acc, Intrinsic::hexagon_V6_vmpabus_acc_128B}, |
| 1260 | {Hexagon::V6_vmpabusv, Intrinsic::hexagon_V6_vmpabusv, Intrinsic::hexagon_V6_vmpabusv_128B}, |
| 1261 | {Hexagon::V6_vmpabuu, Intrinsic::hexagon_V6_vmpabuu, Intrinsic::hexagon_V6_vmpabuu_128B}, |
| 1262 | {Hexagon::V6_vmpabuu_acc, Intrinsic::hexagon_V6_vmpabuu_acc, Intrinsic::hexagon_V6_vmpabuu_acc_128B}, |
| 1263 | {Hexagon::V6_vmpabuuv, Intrinsic::hexagon_V6_vmpabuuv, Intrinsic::hexagon_V6_vmpabuuv_128B}, |
| 1264 | {Hexagon::V6_vmpahb, Intrinsic::hexagon_V6_vmpahb, Intrinsic::hexagon_V6_vmpahb_128B}, |
| 1265 | {Hexagon::V6_vmpahb_acc, Intrinsic::hexagon_V6_vmpahb_acc, Intrinsic::hexagon_V6_vmpahb_acc_128B}, |
| 1266 | {Hexagon::V6_vmpahhsat, Intrinsic::hexagon_V6_vmpahhsat, Intrinsic::hexagon_V6_vmpahhsat_128B}, |
| 1267 | {Hexagon::V6_vmpauhb, Intrinsic::hexagon_V6_vmpauhb, Intrinsic::hexagon_V6_vmpauhb_128B}, |
| 1268 | {Hexagon::V6_vmpauhb_acc, Intrinsic::hexagon_V6_vmpauhb_acc, Intrinsic::hexagon_V6_vmpauhb_acc_128B}, |
| 1269 | {Hexagon::V6_vmpauhuhsat, Intrinsic::hexagon_V6_vmpauhuhsat, Intrinsic::hexagon_V6_vmpauhuhsat_128B}, |
| 1270 | {Hexagon::V6_vmpsuhuhsat, Intrinsic::hexagon_V6_vmpsuhuhsat, Intrinsic::hexagon_V6_vmpsuhuhsat_128B}, |
| 1271 | {Hexagon::V6_vmpy_hf_hf, Intrinsic::hexagon_V6_vmpy_hf_hf, Intrinsic::hexagon_V6_vmpy_hf_hf_128B}, |
| 1272 | {Hexagon::V6_vmpy_hf_hf_acc, Intrinsic::hexagon_V6_vmpy_hf_hf_acc, Intrinsic::hexagon_V6_vmpy_hf_hf_acc_128B}, |
| 1273 | {Hexagon::V6_vmpy_qf16, Intrinsic::hexagon_V6_vmpy_qf16, Intrinsic::hexagon_V6_vmpy_qf16_128B}, |
| 1274 | {Hexagon::V6_vmpy_qf16_hf, Intrinsic::hexagon_V6_vmpy_qf16_hf, Intrinsic::hexagon_V6_vmpy_qf16_hf_128B}, |
| 1275 | {Hexagon::V6_vmpy_qf16_mix_hf, Intrinsic::hexagon_V6_vmpy_qf16_mix_hf, Intrinsic::hexagon_V6_vmpy_qf16_mix_hf_128B}, |
| 1276 | {Hexagon::V6_vmpy_qf32, Intrinsic::hexagon_V6_vmpy_qf32, Intrinsic::hexagon_V6_vmpy_qf32_128B}, |
| 1277 | {Hexagon::V6_vmpy_qf32_hf, Intrinsic::hexagon_V6_vmpy_qf32_hf, Intrinsic::hexagon_V6_vmpy_qf32_hf_128B}, |
| 1278 | {Hexagon::V6_vmpy_qf32_mix_hf, Intrinsic::hexagon_V6_vmpy_qf32_mix_hf, Intrinsic::hexagon_V6_vmpy_qf32_mix_hf_128B}, |
| 1279 | {Hexagon::V6_vmpy_qf32_qf16, Intrinsic::hexagon_V6_vmpy_qf32_qf16, Intrinsic::hexagon_V6_vmpy_qf32_qf16_128B}, |
| 1280 | {Hexagon::V6_vmpy_qf32_sf, Intrinsic::hexagon_V6_vmpy_qf32_sf, Intrinsic::hexagon_V6_vmpy_qf32_sf_128B}, |
| 1281 | {Hexagon::V6_vmpy_sf_bf, Intrinsic::hexagon_V6_vmpy_sf_bf, Intrinsic::hexagon_V6_vmpy_sf_bf_128B}, |
| 1282 | {Hexagon::V6_vmpy_sf_bf_acc, Intrinsic::hexagon_V6_vmpy_sf_bf_acc, Intrinsic::hexagon_V6_vmpy_sf_bf_acc_128B}, |
| 1283 | {Hexagon::V6_vmpy_sf_hf, Intrinsic::hexagon_V6_vmpy_sf_hf, Intrinsic::hexagon_V6_vmpy_sf_hf_128B}, |
| 1284 | {Hexagon::V6_vmpy_sf_hf_acc, Intrinsic::hexagon_V6_vmpy_sf_hf_acc, Intrinsic::hexagon_V6_vmpy_sf_hf_acc_128B}, |
| 1285 | {Hexagon::V6_vmpy_sf_sf, Intrinsic::hexagon_V6_vmpy_sf_sf, Intrinsic::hexagon_V6_vmpy_sf_sf_128B}, |
| 1286 | {Hexagon::V6_vmpybus, Intrinsic::hexagon_V6_vmpybus, Intrinsic::hexagon_V6_vmpybus_128B}, |
| 1287 | {Hexagon::V6_vmpybus_acc, Intrinsic::hexagon_V6_vmpybus_acc, Intrinsic::hexagon_V6_vmpybus_acc_128B}, |
| 1288 | {Hexagon::V6_vmpybusv, Intrinsic::hexagon_V6_vmpybusv, Intrinsic::hexagon_V6_vmpybusv_128B}, |
| 1289 | {Hexagon::V6_vmpybusv_acc, Intrinsic::hexagon_V6_vmpybusv_acc, Intrinsic::hexagon_V6_vmpybusv_acc_128B}, |
| 1290 | {Hexagon::V6_vmpybv, Intrinsic::hexagon_V6_vmpybv, Intrinsic::hexagon_V6_vmpybv_128B}, |
| 1291 | {Hexagon::V6_vmpybv_acc, Intrinsic::hexagon_V6_vmpybv_acc, Intrinsic::hexagon_V6_vmpybv_acc_128B}, |
| 1292 | {Hexagon::V6_vmpyewuh, Intrinsic::hexagon_V6_vmpyewuh, Intrinsic::hexagon_V6_vmpyewuh_128B}, |
| 1293 | {Hexagon::V6_vmpyewuh_64, Intrinsic::hexagon_V6_vmpyewuh_64, Intrinsic::hexagon_V6_vmpyewuh_64_128B}, |
| 1294 | {Hexagon::V6_vmpyh, Intrinsic::hexagon_V6_vmpyh, Intrinsic::hexagon_V6_vmpyh_128B}, |
| 1295 | {Hexagon::V6_vmpyh_acc, Intrinsic::hexagon_V6_vmpyh_acc, Intrinsic::hexagon_V6_vmpyh_acc_128B}, |
| 1296 | {Hexagon::V6_vmpyhsat_acc, Intrinsic::hexagon_V6_vmpyhsat_acc, Intrinsic::hexagon_V6_vmpyhsat_acc_128B}, |
| 1297 | {Hexagon::V6_vmpyhsrs, Intrinsic::hexagon_V6_vmpyhsrs, Intrinsic::hexagon_V6_vmpyhsrs_128B}, |
| 1298 | {Hexagon::V6_vmpyhss, Intrinsic::hexagon_V6_vmpyhss, Intrinsic::hexagon_V6_vmpyhss_128B}, |
| 1299 | {Hexagon::V6_vmpyhus, Intrinsic::hexagon_V6_vmpyhus, Intrinsic::hexagon_V6_vmpyhus_128B}, |
| 1300 | {Hexagon::V6_vmpyhus_acc, Intrinsic::hexagon_V6_vmpyhus_acc, Intrinsic::hexagon_V6_vmpyhus_acc_128B}, |
| 1301 | {Hexagon::V6_vmpyhv, Intrinsic::hexagon_V6_vmpyhv, Intrinsic::hexagon_V6_vmpyhv_128B}, |
| 1302 | {Hexagon::V6_vmpyhv_acc, Intrinsic::hexagon_V6_vmpyhv_acc, Intrinsic::hexagon_V6_vmpyhv_acc_128B}, |
| 1303 | {Hexagon::V6_vmpyhvsrs, Intrinsic::hexagon_V6_vmpyhvsrs, Intrinsic::hexagon_V6_vmpyhvsrs_128B}, |
| 1304 | {Hexagon::V6_vmpyieoh, Intrinsic::hexagon_V6_vmpyieoh, Intrinsic::hexagon_V6_vmpyieoh_128B}, |
| 1305 | {Hexagon::V6_vmpyiewh_acc, Intrinsic::hexagon_V6_vmpyiewh_acc, Intrinsic::hexagon_V6_vmpyiewh_acc_128B}, |
| 1306 | {Hexagon::V6_vmpyiewuh, Intrinsic::hexagon_V6_vmpyiewuh, Intrinsic::hexagon_V6_vmpyiewuh_128B}, |
| 1307 | {Hexagon::V6_vmpyiewuh_acc, Intrinsic::hexagon_V6_vmpyiewuh_acc, Intrinsic::hexagon_V6_vmpyiewuh_acc_128B}, |
| 1308 | {Hexagon::V6_vmpyih, Intrinsic::hexagon_V6_vmpyih, Intrinsic::hexagon_V6_vmpyih_128B}, |
| 1309 | {Hexagon::V6_vmpyih_acc, Intrinsic::hexagon_V6_vmpyih_acc, Intrinsic::hexagon_V6_vmpyih_acc_128B}, |
| 1310 | {Hexagon::V6_vmpyihb, Intrinsic::hexagon_V6_vmpyihb, Intrinsic::hexagon_V6_vmpyihb_128B}, |
| 1311 | {Hexagon::V6_vmpyihb_acc, Intrinsic::hexagon_V6_vmpyihb_acc, Intrinsic::hexagon_V6_vmpyihb_acc_128B}, |
| 1312 | {Hexagon::V6_vmpyiowh, Intrinsic::hexagon_V6_vmpyiowh, Intrinsic::hexagon_V6_vmpyiowh_128B}, |
| 1313 | {Hexagon::V6_vmpyiwb, Intrinsic::hexagon_V6_vmpyiwb, Intrinsic::hexagon_V6_vmpyiwb_128B}, |
| 1314 | {Hexagon::V6_vmpyiwb_acc, Intrinsic::hexagon_V6_vmpyiwb_acc, Intrinsic::hexagon_V6_vmpyiwb_acc_128B}, |
| 1315 | {Hexagon::V6_vmpyiwh, Intrinsic::hexagon_V6_vmpyiwh, Intrinsic::hexagon_V6_vmpyiwh_128B}, |
| 1316 | {Hexagon::V6_vmpyiwh_acc, Intrinsic::hexagon_V6_vmpyiwh_acc, Intrinsic::hexagon_V6_vmpyiwh_acc_128B}, |
| 1317 | {Hexagon::V6_vmpyiwub, Intrinsic::hexagon_V6_vmpyiwub, Intrinsic::hexagon_V6_vmpyiwub_128B}, |
| 1318 | {Hexagon::V6_vmpyiwub_acc, Intrinsic::hexagon_V6_vmpyiwub_acc, Intrinsic::hexagon_V6_vmpyiwub_acc_128B}, |
| 1319 | {Hexagon::V6_vmpyowh, Intrinsic::hexagon_V6_vmpyowh, Intrinsic::hexagon_V6_vmpyowh_128B}, |
| 1320 | {Hexagon::V6_vmpyowh_64_acc, Intrinsic::hexagon_V6_vmpyowh_64_acc, Intrinsic::hexagon_V6_vmpyowh_64_acc_128B}, |
| 1321 | {Hexagon::V6_vmpyowh_rnd, Intrinsic::hexagon_V6_vmpyowh_rnd, Intrinsic::hexagon_V6_vmpyowh_rnd_128B}, |
| 1322 | {Hexagon::V6_vmpyowh_rnd_sacc, Intrinsic::hexagon_V6_vmpyowh_rnd_sacc, Intrinsic::hexagon_V6_vmpyowh_rnd_sacc_128B}, |
| 1323 | {Hexagon::V6_vmpyowh_sacc, Intrinsic::hexagon_V6_vmpyowh_sacc, Intrinsic::hexagon_V6_vmpyowh_sacc_128B}, |
| 1324 | {Hexagon::V6_vmpyub, Intrinsic::hexagon_V6_vmpyub, Intrinsic::hexagon_V6_vmpyub_128B}, |
| 1325 | {Hexagon::V6_vmpyub_acc, Intrinsic::hexagon_V6_vmpyub_acc, Intrinsic::hexagon_V6_vmpyub_acc_128B}, |
| 1326 | {Hexagon::V6_vmpyubv, Intrinsic::hexagon_V6_vmpyubv, Intrinsic::hexagon_V6_vmpyubv_128B}, |
| 1327 | {Hexagon::V6_vmpyubv_acc, Intrinsic::hexagon_V6_vmpyubv_acc, Intrinsic::hexagon_V6_vmpyubv_acc_128B}, |
| 1328 | {Hexagon::V6_vmpyuh, Intrinsic::hexagon_V6_vmpyuh, Intrinsic::hexagon_V6_vmpyuh_128B}, |
| 1329 | {Hexagon::V6_vmpyuh_acc, Intrinsic::hexagon_V6_vmpyuh_acc, Intrinsic::hexagon_V6_vmpyuh_acc_128B}, |
| 1330 | {Hexagon::V6_vmpyuhe, Intrinsic::hexagon_V6_vmpyuhe, Intrinsic::hexagon_V6_vmpyuhe_128B}, |
| 1331 | {Hexagon::V6_vmpyuhe_acc, Intrinsic::hexagon_V6_vmpyuhe_acc, Intrinsic::hexagon_V6_vmpyuhe_acc_128B}, |
| 1332 | {Hexagon::V6_vmpyuhv, Intrinsic::hexagon_V6_vmpyuhv, Intrinsic::hexagon_V6_vmpyuhv_128B}, |
| 1333 | {Hexagon::V6_vmpyuhv_acc, Intrinsic::hexagon_V6_vmpyuhv_acc, Intrinsic::hexagon_V6_vmpyuhv_acc_128B}, |
| 1334 | {Hexagon::V6_vmpyuhvs, Intrinsic::hexagon_V6_vmpyuhvs, Intrinsic::hexagon_V6_vmpyuhvs_128B}, |
| 1335 | {Hexagon::V6_vmux, Intrinsic::hexagon_V6_vmux, Intrinsic::hexagon_V6_vmux_128B}, |
| 1336 | {Hexagon::V6_vnavgb, Intrinsic::hexagon_V6_vnavgb, Intrinsic::hexagon_V6_vnavgb_128B}, |
| 1337 | {Hexagon::V6_vnavgh, Intrinsic::hexagon_V6_vnavgh, Intrinsic::hexagon_V6_vnavgh_128B}, |
| 1338 | {Hexagon::V6_vnavgub, Intrinsic::hexagon_V6_vnavgub, Intrinsic::hexagon_V6_vnavgub_128B}, |
| 1339 | {Hexagon::V6_vnavgw, Intrinsic::hexagon_V6_vnavgw, Intrinsic::hexagon_V6_vnavgw_128B}, |
| 1340 | {Hexagon::V6_vnormamth, Intrinsic::hexagon_V6_vnormamth, Intrinsic::hexagon_V6_vnormamth_128B}, |
| 1341 | {Hexagon::V6_vnormamtw, Intrinsic::hexagon_V6_vnormamtw, Intrinsic::hexagon_V6_vnormamtw_128B}, |
| 1342 | {Hexagon::V6_vnot, Intrinsic::hexagon_V6_vnot, Intrinsic::hexagon_V6_vnot_128B}, |
| 1343 | {Hexagon::V6_vor, Intrinsic::hexagon_V6_vor, Intrinsic::hexagon_V6_vor_128B}, |
| 1344 | {Hexagon::V6_vpackeb, Intrinsic::hexagon_V6_vpackeb, Intrinsic::hexagon_V6_vpackeb_128B}, |
| 1345 | {Hexagon::V6_vpackeh, Intrinsic::hexagon_V6_vpackeh, Intrinsic::hexagon_V6_vpackeh_128B}, |
| 1346 | {Hexagon::V6_vpackhb_sat, Intrinsic::hexagon_V6_vpackhb_sat, Intrinsic::hexagon_V6_vpackhb_sat_128B}, |
| 1347 | {Hexagon::V6_vpackhub_sat, Intrinsic::hexagon_V6_vpackhub_sat, Intrinsic::hexagon_V6_vpackhub_sat_128B}, |
| 1348 | {Hexagon::V6_vpackob, Intrinsic::hexagon_V6_vpackob, Intrinsic::hexagon_V6_vpackob_128B}, |
| 1349 | {Hexagon::V6_vpackoh, Intrinsic::hexagon_V6_vpackoh, Intrinsic::hexagon_V6_vpackoh_128B}, |
| 1350 | {Hexagon::V6_vpackwh_sat, Intrinsic::hexagon_V6_vpackwh_sat, Intrinsic::hexagon_V6_vpackwh_sat_128B}, |
| 1351 | {Hexagon::V6_vpackwuh_sat, Intrinsic::hexagon_V6_vpackwuh_sat, Intrinsic::hexagon_V6_vpackwuh_sat_128B}, |
| 1352 | {Hexagon::V6_vpopcounth, Intrinsic::hexagon_V6_vpopcounth, Intrinsic::hexagon_V6_vpopcounth_128B}, |
| 1353 | {Hexagon::V6_vprefixqb, Intrinsic::hexagon_V6_vprefixqb, Intrinsic::hexagon_V6_vprefixqb_128B}, |
| 1354 | {Hexagon::V6_vprefixqh, Intrinsic::hexagon_V6_vprefixqh, Intrinsic::hexagon_V6_vprefixqh_128B}, |
| 1355 | {Hexagon::V6_vprefixqw, Intrinsic::hexagon_V6_vprefixqw, Intrinsic::hexagon_V6_vprefixqw_128B}, |
| 1356 | {Hexagon::V6_vrdelta, Intrinsic::hexagon_V6_vrdelta, Intrinsic::hexagon_V6_vrdelta_128B}, |
| 1357 | {Hexagon::V6_vrmpybub_rtt, Intrinsic::hexagon_V6_vrmpybub_rtt, Intrinsic::hexagon_V6_vrmpybub_rtt_128B}, |
| 1358 | {Hexagon::V6_vrmpybub_rtt_acc, Intrinsic::hexagon_V6_vrmpybub_rtt_acc, Intrinsic::hexagon_V6_vrmpybub_rtt_acc_128B}, |
| 1359 | {Hexagon::V6_vrmpybus, Intrinsic::hexagon_V6_vrmpybus, Intrinsic::hexagon_V6_vrmpybus_128B}, |
| 1360 | {Hexagon::V6_vrmpybus_acc, Intrinsic::hexagon_V6_vrmpybus_acc, Intrinsic::hexagon_V6_vrmpybus_acc_128B}, |
| 1361 | {Hexagon::V6_vrmpybusi, Intrinsic::hexagon_V6_vrmpybusi, Intrinsic::hexagon_V6_vrmpybusi_128B}, |
| 1362 | {Hexagon::V6_vrmpybusi_acc, Intrinsic::hexagon_V6_vrmpybusi_acc, Intrinsic::hexagon_V6_vrmpybusi_acc_128B}, |
| 1363 | {Hexagon::V6_vrmpybusv, Intrinsic::hexagon_V6_vrmpybusv, Intrinsic::hexagon_V6_vrmpybusv_128B}, |
| 1364 | {Hexagon::V6_vrmpybusv_acc, Intrinsic::hexagon_V6_vrmpybusv_acc, Intrinsic::hexagon_V6_vrmpybusv_acc_128B}, |
| 1365 | {Hexagon::V6_vrmpybv, Intrinsic::hexagon_V6_vrmpybv, Intrinsic::hexagon_V6_vrmpybv_128B}, |
| 1366 | {Hexagon::V6_vrmpybv_acc, Intrinsic::hexagon_V6_vrmpybv_acc, Intrinsic::hexagon_V6_vrmpybv_acc_128B}, |
| 1367 | {Hexagon::V6_vrmpyub, Intrinsic::hexagon_V6_vrmpyub, Intrinsic::hexagon_V6_vrmpyub_128B}, |
| 1368 | {Hexagon::V6_vrmpyub_acc, Intrinsic::hexagon_V6_vrmpyub_acc, Intrinsic::hexagon_V6_vrmpyub_acc_128B}, |
| 1369 | {Hexagon::V6_vrmpyub_rtt, Intrinsic::hexagon_V6_vrmpyub_rtt, Intrinsic::hexagon_V6_vrmpyub_rtt_128B}, |
| 1370 | {Hexagon::V6_vrmpyub_rtt_acc, Intrinsic::hexagon_V6_vrmpyub_rtt_acc, Intrinsic::hexagon_V6_vrmpyub_rtt_acc_128B}, |
| 1371 | {Hexagon::V6_vrmpyubi, Intrinsic::hexagon_V6_vrmpyubi, Intrinsic::hexagon_V6_vrmpyubi_128B}, |
| 1372 | {Hexagon::V6_vrmpyubi_acc, Intrinsic::hexagon_V6_vrmpyubi_acc, Intrinsic::hexagon_V6_vrmpyubi_acc_128B}, |
| 1373 | {Hexagon::V6_vrmpyubv, Intrinsic::hexagon_V6_vrmpyubv, Intrinsic::hexagon_V6_vrmpyubv_128B}, |
| 1374 | {Hexagon::V6_vrmpyubv_acc, Intrinsic::hexagon_V6_vrmpyubv_acc, Intrinsic::hexagon_V6_vrmpyubv_acc_128B}, |
| 1375 | {Hexagon::V6_vror, Intrinsic::hexagon_V6_vror, Intrinsic::hexagon_V6_vror_128B}, |
| 1376 | {Hexagon::V6_vrotr, Intrinsic::hexagon_V6_vrotr, Intrinsic::hexagon_V6_vrotr_128B}, |
| 1377 | {Hexagon::V6_vroundhb, Intrinsic::hexagon_V6_vroundhb, Intrinsic::hexagon_V6_vroundhb_128B}, |
| 1378 | {Hexagon::V6_vroundhub, Intrinsic::hexagon_V6_vroundhub, Intrinsic::hexagon_V6_vroundhub_128B}, |
| 1379 | {Hexagon::V6_vrounduhub, Intrinsic::hexagon_V6_vrounduhub, Intrinsic::hexagon_V6_vrounduhub_128B}, |
| 1380 | {Hexagon::V6_vrounduwuh, Intrinsic::hexagon_V6_vrounduwuh, Intrinsic::hexagon_V6_vrounduwuh_128B}, |
| 1381 | {Hexagon::V6_vroundwh, Intrinsic::hexagon_V6_vroundwh, Intrinsic::hexagon_V6_vroundwh_128B}, |
| 1382 | {Hexagon::V6_vroundwuh, Intrinsic::hexagon_V6_vroundwuh, Intrinsic::hexagon_V6_vroundwuh_128B}, |
| 1383 | {Hexagon::V6_vrsadubi, Intrinsic::hexagon_V6_vrsadubi, Intrinsic::hexagon_V6_vrsadubi_128B}, |
| 1384 | {Hexagon::V6_vrsadubi_acc, Intrinsic::hexagon_V6_vrsadubi_acc, Intrinsic::hexagon_V6_vrsadubi_acc_128B}, |
| 1385 | {Hexagon::V6_vsatdw, Intrinsic::hexagon_V6_vsatdw, Intrinsic::hexagon_V6_vsatdw_128B}, |
| 1386 | {Hexagon::V6_vsathub, Intrinsic::hexagon_V6_vsathub, Intrinsic::hexagon_V6_vsathub_128B}, |
| 1387 | {Hexagon::V6_vsatuwuh, Intrinsic::hexagon_V6_vsatuwuh, Intrinsic::hexagon_V6_vsatuwuh_128B}, |
| 1388 | {Hexagon::V6_vsatwh, Intrinsic::hexagon_V6_vsatwh, Intrinsic::hexagon_V6_vsatwh_128B}, |
| 1389 | {Hexagon::V6_vsb, Intrinsic::hexagon_V6_vsb, Intrinsic::hexagon_V6_vsb_128B}, |
| 1390 | {Hexagon::V6_vscattermh, Intrinsic::hexagon_V6_vscattermh, Intrinsic::hexagon_V6_vscattermh_128B}, |
| 1391 | {Hexagon::V6_vscattermh_add, Intrinsic::hexagon_V6_vscattermh_add, Intrinsic::hexagon_V6_vscattermh_add_128B}, |
| 1392 | {Hexagon::V6_vscattermhq, Intrinsic::hexagon_V6_vscattermhq, Intrinsic::hexagon_V6_vscattermhq_128B}, |
| 1393 | {Hexagon::V6_vscattermhw, Intrinsic::hexagon_V6_vscattermhw, Intrinsic::hexagon_V6_vscattermhw_128B}, |
| 1394 | {Hexagon::V6_vscattermhw_add, Intrinsic::hexagon_V6_vscattermhw_add, Intrinsic::hexagon_V6_vscattermhw_add_128B}, |
| 1395 | {Hexagon::V6_vscattermhwq, Intrinsic::hexagon_V6_vscattermhwq, Intrinsic::hexagon_V6_vscattermhwq_128B}, |
| 1396 | {Hexagon::V6_vscattermw, Intrinsic::hexagon_V6_vscattermw, Intrinsic::hexagon_V6_vscattermw_128B}, |
| 1397 | {Hexagon::V6_vscattermw_add, Intrinsic::hexagon_V6_vscattermw_add, Intrinsic::hexagon_V6_vscattermw_add_128B}, |
| 1398 | {Hexagon::V6_vscattermwq, Intrinsic::hexagon_V6_vscattermwq, Intrinsic::hexagon_V6_vscattermwq_128B}, |
| 1399 | {Hexagon::V6_vsh, Intrinsic::hexagon_V6_vsh, Intrinsic::hexagon_V6_vsh_128B}, |
| 1400 | {Hexagon::V6_vshufeh, Intrinsic::hexagon_V6_vshufeh, Intrinsic::hexagon_V6_vshufeh_128B}, |
| 1401 | {Hexagon::V6_vshuffb, Intrinsic::hexagon_V6_vshuffb, Intrinsic::hexagon_V6_vshuffb_128B}, |
| 1402 | {Hexagon::V6_vshuffeb, Intrinsic::hexagon_V6_vshuffeb, Intrinsic::hexagon_V6_vshuffeb_128B}, |
| 1403 | {Hexagon::V6_vshuffh, Intrinsic::hexagon_V6_vshuffh, Intrinsic::hexagon_V6_vshuffh_128B}, |
| 1404 | {Hexagon::V6_vshuffob, Intrinsic::hexagon_V6_vshuffob, Intrinsic::hexagon_V6_vshuffob_128B}, |
| 1405 | {Hexagon::V6_vshuffvdd, Intrinsic::hexagon_V6_vshuffvdd, Intrinsic::hexagon_V6_vshuffvdd_128B}, |
| 1406 | {Hexagon::V6_vshufoeb, Intrinsic::hexagon_V6_vshufoeb, Intrinsic::hexagon_V6_vshufoeb_128B}, |
| 1407 | {Hexagon::V6_vshufoeh, Intrinsic::hexagon_V6_vshufoeh, Intrinsic::hexagon_V6_vshufoeh_128B}, |
| 1408 | {Hexagon::V6_vshufoh, Intrinsic::hexagon_V6_vshufoh, Intrinsic::hexagon_V6_vshufoh_128B}, |
| 1409 | {Hexagon::V6_vsub_hf, Intrinsic::hexagon_V6_vsub_hf, Intrinsic::hexagon_V6_vsub_hf_128B}, |
| 1410 | {Hexagon::V6_vsub_hf_hf, Intrinsic::hexagon_V6_vsub_hf_hf, Intrinsic::hexagon_V6_vsub_hf_hf_128B}, |
| 1411 | {Hexagon::V6_vsub_qf16, Intrinsic::hexagon_V6_vsub_qf16, Intrinsic::hexagon_V6_vsub_qf16_128B}, |
| 1412 | {Hexagon::V6_vsub_qf16_mix, Intrinsic::hexagon_V6_vsub_qf16_mix, Intrinsic::hexagon_V6_vsub_qf16_mix_128B}, |
| 1413 | {Hexagon::V6_vsub_qf32, Intrinsic::hexagon_V6_vsub_qf32, Intrinsic::hexagon_V6_vsub_qf32_128B}, |
| 1414 | {Hexagon::V6_vsub_qf32_mix, Intrinsic::hexagon_V6_vsub_qf32_mix, Intrinsic::hexagon_V6_vsub_qf32_mix_128B}, |
| 1415 | {Hexagon::V6_vsub_sf, Intrinsic::hexagon_V6_vsub_sf, Intrinsic::hexagon_V6_vsub_sf_128B}, |
| 1416 | {Hexagon::V6_vsub_sf_bf, Intrinsic::hexagon_V6_vsub_sf_bf, Intrinsic::hexagon_V6_vsub_sf_bf_128B}, |
| 1417 | {Hexagon::V6_vsub_sf_hf, Intrinsic::hexagon_V6_vsub_sf_hf, Intrinsic::hexagon_V6_vsub_sf_hf_128B}, |
| 1418 | {Hexagon::V6_vsub_sf_sf, Intrinsic::hexagon_V6_vsub_sf_sf, Intrinsic::hexagon_V6_vsub_sf_sf_128B}, |
| 1419 | {Hexagon::V6_vsubb, Intrinsic::hexagon_V6_vsubb, Intrinsic::hexagon_V6_vsubb_128B}, |
| 1420 | {Hexagon::V6_vsubb_dv, Intrinsic::hexagon_V6_vsubb_dv, Intrinsic::hexagon_V6_vsubb_dv_128B}, |
| 1421 | {Hexagon::V6_vsubbnq, Intrinsic::hexagon_V6_vsubbnq, Intrinsic::hexagon_V6_vsubbnq_128B}, |
| 1422 | {Hexagon::V6_vsubbq, Intrinsic::hexagon_V6_vsubbq, Intrinsic::hexagon_V6_vsubbq_128B}, |
| 1423 | {Hexagon::V6_vsubbsat, Intrinsic::hexagon_V6_vsubbsat, Intrinsic::hexagon_V6_vsubbsat_128B}, |
| 1424 | {Hexagon::V6_vsubbsat_dv, Intrinsic::hexagon_V6_vsubbsat_dv, Intrinsic::hexagon_V6_vsubbsat_dv_128B}, |
| 1425 | {Hexagon::V6_vsubcarry, Intrinsic::hexagon_V6_vsubcarry, Intrinsic::hexagon_V6_vsubcarry_128B}, |
| 1426 | {Hexagon::V6_vsubcarryo, Intrinsic::hexagon_V6_vsubcarryo, Intrinsic::hexagon_V6_vsubcarryo_128B}, |
| 1427 | {Hexagon::V6_vsubh, Intrinsic::hexagon_V6_vsubh, Intrinsic::hexagon_V6_vsubh_128B}, |
| 1428 | {Hexagon::V6_vsubh_dv, Intrinsic::hexagon_V6_vsubh_dv, Intrinsic::hexagon_V6_vsubh_dv_128B}, |
| 1429 | {Hexagon::V6_vsubhnq, Intrinsic::hexagon_V6_vsubhnq, Intrinsic::hexagon_V6_vsubhnq_128B}, |
| 1430 | {Hexagon::V6_vsubhq, Intrinsic::hexagon_V6_vsubhq, Intrinsic::hexagon_V6_vsubhq_128B}, |
| 1431 | {Hexagon::V6_vsubhsat, Intrinsic::hexagon_V6_vsubhsat, Intrinsic::hexagon_V6_vsubhsat_128B}, |
| 1432 | {Hexagon::V6_vsubhsat_dv, Intrinsic::hexagon_V6_vsubhsat_dv, Intrinsic::hexagon_V6_vsubhsat_dv_128B}, |
| 1433 | {Hexagon::V6_vsubhw, Intrinsic::hexagon_V6_vsubhw, Intrinsic::hexagon_V6_vsubhw_128B}, |
| 1434 | {Hexagon::V6_vsububh, Intrinsic::hexagon_V6_vsububh, Intrinsic::hexagon_V6_vsububh_128B}, |
| 1435 | {Hexagon::V6_vsububsat, Intrinsic::hexagon_V6_vsububsat, Intrinsic::hexagon_V6_vsububsat_128B}, |
| 1436 | {Hexagon::V6_vsububsat_dv, Intrinsic::hexagon_V6_vsububsat_dv, Intrinsic::hexagon_V6_vsububsat_dv_128B}, |
| 1437 | {Hexagon::V6_vsubububb_sat, Intrinsic::hexagon_V6_vsubububb_sat, Intrinsic::hexagon_V6_vsubububb_sat_128B}, |
| 1438 | {Hexagon::V6_vsubuhsat, Intrinsic::hexagon_V6_vsubuhsat, Intrinsic::hexagon_V6_vsubuhsat_128B}, |
| 1439 | {Hexagon::V6_vsubuhsat_dv, Intrinsic::hexagon_V6_vsubuhsat_dv, Intrinsic::hexagon_V6_vsubuhsat_dv_128B}, |
| 1440 | {Hexagon::V6_vsubuhw, Intrinsic::hexagon_V6_vsubuhw, Intrinsic::hexagon_V6_vsubuhw_128B}, |
| 1441 | {Hexagon::V6_vsubuwsat, Intrinsic::hexagon_V6_vsubuwsat, Intrinsic::hexagon_V6_vsubuwsat_128B}, |
| 1442 | {Hexagon::V6_vsubuwsat_dv, Intrinsic::hexagon_V6_vsubuwsat_dv, Intrinsic::hexagon_V6_vsubuwsat_dv_128B}, |
| 1443 | {Hexagon::V6_vsubw, Intrinsic::hexagon_V6_vsubw, Intrinsic::hexagon_V6_vsubw_128B}, |
| 1444 | {Hexagon::V6_vsubw_dv, Intrinsic::hexagon_V6_vsubw_dv, Intrinsic::hexagon_V6_vsubw_dv_128B}, |
| 1445 | {Hexagon::V6_vsubwnq, Intrinsic::hexagon_V6_vsubwnq, Intrinsic::hexagon_V6_vsubwnq_128B}, |
| 1446 | {Hexagon::V6_vsubwq, Intrinsic::hexagon_V6_vsubwq, Intrinsic::hexagon_V6_vsubwq_128B}, |
| 1447 | {Hexagon::V6_vsubwsat, Intrinsic::hexagon_V6_vsubwsat, Intrinsic::hexagon_V6_vsubwsat_128B}, |
| 1448 | {Hexagon::V6_vsubwsat_dv, Intrinsic::hexagon_V6_vsubwsat_dv, Intrinsic::hexagon_V6_vsubwsat_dv_128B}, |
| 1449 | {Hexagon::V6_vswap, Intrinsic::hexagon_V6_vswap, Intrinsic::hexagon_V6_vswap_128B}, |
| 1450 | {Hexagon::V6_vtmpyb, Intrinsic::hexagon_V6_vtmpyb, Intrinsic::hexagon_V6_vtmpyb_128B}, |
| 1451 | {Hexagon::V6_vtmpyb_acc, Intrinsic::hexagon_V6_vtmpyb_acc, Intrinsic::hexagon_V6_vtmpyb_acc_128B}, |
| 1452 | {Hexagon::V6_vtmpybus, Intrinsic::hexagon_V6_vtmpybus, Intrinsic::hexagon_V6_vtmpybus_128B}, |
| 1453 | {Hexagon::V6_vtmpybus_acc, Intrinsic::hexagon_V6_vtmpybus_acc, Intrinsic::hexagon_V6_vtmpybus_acc_128B}, |
| 1454 | {Hexagon::V6_vtmpyhb, Intrinsic::hexagon_V6_vtmpyhb, Intrinsic::hexagon_V6_vtmpyhb_128B}, |
| 1455 | {Hexagon::V6_vtmpyhb_acc, Intrinsic::hexagon_V6_vtmpyhb_acc, Intrinsic::hexagon_V6_vtmpyhb_acc_128B}, |
| 1456 | {Hexagon::V6_vunpackb, Intrinsic::hexagon_V6_vunpackb, Intrinsic::hexagon_V6_vunpackb_128B}, |
| 1457 | {Hexagon::V6_vunpackh, Intrinsic::hexagon_V6_vunpackh, Intrinsic::hexagon_V6_vunpackh_128B}, |
| 1458 | {Hexagon::V6_vunpackob, Intrinsic::hexagon_V6_vunpackob, Intrinsic::hexagon_V6_vunpackob_128B}, |
| 1459 | {Hexagon::V6_vunpackoh, Intrinsic::hexagon_V6_vunpackoh, Intrinsic::hexagon_V6_vunpackoh_128B}, |
| 1460 | {Hexagon::V6_vunpackub, Intrinsic::hexagon_V6_vunpackub, Intrinsic::hexagon_V6_vunpackub_128B}, |
| 1461 | {Hexagon::V6_vunpackuh, Intrinsic::hexagon_V6_vunpackuh, Intrinsic::hexagon_V6_vunpackuh_128B}, |
| 1462 | {Hexagon::V6_vxor, Intrinsic::hexagon_V6_vxor, Intrinsic::hexagon_V6_vxor_128B}, |
| 1463 | {Hexagon::V6_vzb, Intrinsic::hexagon_V6_vzb, Intrinsic::hexagon_V6_vzb_128B}, |
| 1464 | {Hexagon::V6_vzh, Intrinsic::hexagon_V6_vzh, Intrinsic::hexagon_V6_vzh_128B}, |
| 1465 | #endif // GET_HVX_INTRINSICS |
| 1466 |
Generated while processing llvm_projects/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
Generated on 2024-Oct-10 from project llvm_projects revision release-19.x-64075837b
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