1 | //===- MipsMulMulBugPass.cpp - Mips VR4300 mulmul bugfix pass -------------===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // Early revisions of the VR4300 have a hardware bug where two consecutive |
10 | // multiplications can produce an incorrect result in the second multiply. |
11 | // |
12 | // This pass scans for mul instructions in each basic block and inserts |
13 | // a nop whenever the following conditions are met: |
14 | // |
15 | // - The current instruction is a single or double-precision floating-point |
16 | // mul instruction. |
17 | // - The next instruction is either a mul instruction (any kind) |
18 | // or a branch instruction. |
19 | //===----------------------------------------------------------------------===// |
20 | |
21 | #include "Mips.h" |
22 | #include "MipsInstrInfo.h" |
23 | #include "MipsSubtarget.h" |
24 | #include "llvm/CodeGen/MachineBasicBlock.h" |
25 | #include "llvm/CodeGen/MachineFunction.h" |
26 | #include "llvm/CodeGen/MachineFunctionPass.h" |
27 | #include "llvm/Support/CommandLine.h" |
28 | #include "llvm/Support/Debug.h" |
29 | #include "llvm/Target/TargetMachine.h" |
30 | |
31 | #define DEBUG_TYPE "mips-vr4300-mulmul-fix" |
32 | |
33 | using namespace llvm; |
34 | |
35 | namespace { |
36 | |
37 | class MipsMulMulBugFix : public MachineFunctionPass { |
38 | public: |
39 | MipsMulMulBugFix() : MachineFunctionPass(ID) { |
40 | initializeMipsMulMulBugFixPass(*PassRegistry::getPassRegistry()); |
41 | } |
42 | |
43 | StringRef getPassName() const override { return "Mips VR4300 mulmul bugfix" ; } |
44 | |
45 | MachineFunctionProperties getRequiredProperties() const override { |
46 | return MachineFunctionProperties().set( |
47 | MachineFunctionProperties::Property::NoVRegs); |
48 | } |
49 | |
50 | bool runOnMachineFunction(MachineFunction &MF) override; |
51 | |
52 | static char ID; |
53 | |
54 | private: |
55 | bool fixMulMulBB(MachineBasicBlock &MBB, const MipsInstrInfo &MipsII); |
56 | }; |
57 | |
58 | } // namespace |
59 | |
60 | INITIALIZE_PASS(MipsMulMulBugFix, "mips-vr4300-mulmul-fix" , |
61 | "Mips VR4300 mulmul bugfix" , false, false) |
62 | |
63 | char MipsMulMulBugFix::ID = 0; |
64 | |
65 | bool MipsMulMulBugFix::runOnMachineFunction(MachineFunction &MF) { |
66 | const MipsInstrInfo &MipsII = |
67 | *static_cast<const MipsInstrInfo *>(MF.getSubtarget().getInstrInfo()); |
68 | |
69 | bool Modified = false; |
70 | |
71 | for (auto &MBB : MF) |
72 | Modified |= fixMulMulBB(MBB, MipsII); |
73 | |
74 | return Modified; |
75 | } |
76 | |
77 | static bool isFirstMul(const MachineInstr &MI) { |
78 | switch (MI.getOpcode()) { |
79 | case Mips::FMUL_S: |
80 | case Mips::FMUL_D: |
81 | case Mips::FMUL_D32: |
82 | case Mips::FMUL_D64: |
83 | return true; |
84 | default: |
85 | return false; |
86 | } |
87 | } |
88 | |
89 | static bool isSecondMulOrBranch(const MachineInstr &MI) { |
90 | if (MI.isBranch() || MI.isIndirectBranch() || MI.isCall()) |
91 | return true; |
92 | |
93 | switch (MI.getOpcode()) { |
94 | case Mips::MUL: |
95 | case Mips::FMUL_S: |
96 | case Mips::FMUL_D: |
97 | case Mips::FMUL_D32: |
98 | case Mips::FMUL_D64: |
99 | case Mips::MULT: |
100 | case Mips::MULTu: |
101 | case Mips::DMULT: |
102 | case Mips::DMULTu: |
103 | return true; |
104 | default: |
105 | return false; |
106 | } |
107 | } |
108 | |
109 | bool MipsMulMulBugFix::fixMulMulBB(MachineBasicBlock &MBB, |
110 | const MipsInstrInfo &MipsII) { |
111 | bool Modified = false; |
112 | |
113 | MachineBasicBlock::instr_iterator NextMII; |
114 | |
115 | // Iterate through the instructions in the basic block |
116 | for (MachineBasicBlock::instr_iterator MII = MBB.instr_begin(), |
117 | E = MBB.instr_end(); |
118 | MII != E; MII = NextMII) { |
119 | |
120 | NextMII = next_nodbg(It: MII, End: E); |
121 | |
122 | // Trigger when the current instruction is a mul and the next instruction |
123 | // is either a mul or a branch in case the branch target start with a mul |
124 | if (NextMII != E && isFirstMul(MI: *MII) && isSecondMulOrBranch(MI: *NextMII)) { |
125 | LLVM_DEBUG(dbgs() << "Found mulmul!\n" ); |
126 | |
127 | const MCInstrDesc &NewMCID = MipsII.get(Opcode: Mips::NOP); |
128 | BuildMI(BB&: MBB, I: NextMII, MIMD: DebugLoc(), MCID: NewMCID); |
129 | Modified = true; |
130 | } |
131 | } |
132 | |
133 | return Modified; |
134 | } |
135 | |
136 | FunctionPass *llvm::createMipsMulMulBugPass() { return new MipsMulMulBugFix(); } |
137 | |