1 | //===-- PPCCallLowering.h - Call lowering for GlobalISel -------*- C++ -*-===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | /// |
9 | /// \file |
10 | /// This file describes how to lower LLVM calls to machine code calls. |
11 | /// |
12 | //===----------------------------------------------------------------------===// |
13 | |
14 | #ifndef LLVM_LIB_TARGET_POWERPC_GISEL_PPCCALLLOWERING_H |
15 | #define LLVM_LIB_TARGET_POWERPC_GISEL_PPCCALLLOWERING_H |
16 | |
17 | #include "PPCISelLowering.h" |
18 | #include "llvm/CodeGen/GlobalISel/CallLowering.h" |
19 | #include "llvm/IR/CallingConv.h" |
20 | |
21 | namespace llvm { |
22 | |
23 | class PPCTargetLowering; |
24 | |
25 | class PPCCallLowering : public CallLowering { |
26 | public: |
27 | PPCCallLowering(const PPCTargetLowering &TLI); |
28 | |
29 | bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, |
30 | ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI, |
31 | Register SwiftErrorVReg) const override; |
32 | bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, |
33 | ArrayRef<ArrayRef<Register>> VRegs, |
34 | FunctionLoweringInfo &FLI) const override; |
35 | bool lowerCall(MachineIRBuilder &MIRBuilder, |
36 | CallLoweringInfo &Info) const override; |
37 | }; |
38 | |
39 | class PPCIncomingValueHandler : public CallLowering::IncomingValueHandler { |
40 | public: |
41 | PPCIncomingValueHandler(MachineIRBuilder &MIRBuilder, |
42 | MachineRegisterInfo &MRI) |
43 | : CallLowering::IncomingValueHandler(MIRBuilder, MRI) {} |
44 | |
45 | uint64_t StackUsed; |
46 | |
47 | private: |
48 | void assignValueToReg(Register ValVReg, Register PhysReg, |
49 | const CCValAssign &VA) override; |
50 | |
51 | void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, |
52 | const MachinePointerInfo &MPO, |
53 | const CCValAssign &VA) override; |
54 | |
55 | Register getStackAddress(uint64_t Size, int64_t Offset, |
56 | MachinePointerInfo &MPO, |
57 | ISD::ArgFlagsTy Flags) override; |
58 | |
59 | virtual void markPhysRegUsed(unsigned PhysReg) = 0; |
60 | }; |
61 | |
62 | class FormalArgHandler : public PPCIncomingValueHandler { |
63 | |
64 | void markPhysRegUsed(unsigned PhysReg) override; |
65 | |
66 | public: |
67 | FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) |
68 | : PPCIncomingValueHandler(MIRBuilder, MRI) {} |
69 | }; |
70 | |
71 | } // end namespace llvm |
72 | |
73 | #endif |
74 | |