1//===-- SystemZSelectionDAGInfo.cpp - SystemZ SelectionDAG Info -----------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the SystemZSelectionDAGInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SystemZTargetMachine.h"
14#include "llvm/CodeGen/SelectionDAG.h"
15
16using namespace llvm;
17
18#define DEBUG_TYPE "systemz-selectiondag-info"
19
20static unsigned getMemMemLenAdj(unsigned Op) {
21 return Op == SystemZISD::MEMSET_MVC ? 2 : 1;
22}
23
24static SDValue createMemMemNode(SelectionDAG &DAG, const SDLoc &DL, unsigned Op,
25 SDValue Chain, SDValue Dst, SDValue Src,
26 SDValue LenAdj, SDValue Byte) {
27 SDVTList VTs = Op == SystemZISD::CLC ? DAG.getVTList(VT1: MVT::i32, VT2: MVT::Other)
28 : DAG.getVTList(VT: MVT::Other);
29 SmallVector<SDValue, 6> Ops;
30 if (Op == SystemZISD::MEMSET_MVC)
31 Ops = { Chain, Dst, LenAdj, Byte };
32 else
33 Ops = { Chain, Dst, Src, LenAdj };
34 return DAG.getNode(Opcode: Op, DL, VTList: VTs, Ops);
35}
36
37// Emit a mem-mem operation after subtracting one (or two for memset) from
38// size, which will be added back during pseudo expansion. As the Reg case
39// emitted here may be converted by DAGCombiner into having an Imm length,
40// they are both emitted the same way.
41static SDValue emitMemMemImm(SelectionDAG &DAG, const SDLoc &DL, unsigned Op,
42 SDValue Chain, SDValue Dst, SDValue Src,
43 uint64_t Size, SDValue Byte = SDValue()) {
44 unsigned Adj = getMemMemLenAdj(Op);
45 assert(Size >= Adj && "Adjusted length overflow.");
46 SDValue LenAdj = DAG.getConstant(Val: Size - Adj, DL, VT: Dst.getValueType());
47 return createMemMemNode(DAG, DL, Op, Chain, Dst, Src, LenAdj, Byte);
48}
49
50static SDValue emitMemMemReg(SelectionDAG &DAG, const SDLoc &DL, unsigned Op,
51 SDValue Chain, SDValue Dst, SDValue Src,
52 SDValue Size, SDValue Byte = SDValue()) {
53 int64_t Adj = getMemMemLenAdj(Op);
54 SDValue LenAdj = DAG.getNode(Opcode: ISD::ADD, DL, VT: MVT::i64,
55 N1: DAG.getZExtOrTrunc(Op: Size, DL, VT: MVT::i64),
56 N2: DAG.getConstant(Val: 0 - Adj, DL, VT: MVT::i64));
57 return createMemMemNode(DAG, DL, Op, Chain, Dst, Src, LenAdj, Byte);
58}
59
60SDValue SystemZSelectionDAGInfo::EmitTargetCodeForMemcpy(
61 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst, SDValue Src,
62 SDValue Size, Align Alignment, bool IsVolatile, bool AlwaysInline,
63 MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const {
64 if (IsVolatile)
65 return SDValue();
66
67 if (auto *CSize = dyn_cast<ConstantSDNode>(Val&: Size))
68 return emitMemMemImm(DAG, DL, Op: SystemZISD::MVC, Chain, Dst, Src,
69 Size: CSize->getZExtValue());
70
71 return emitMemMemReg(DAG, DL, Op: SystemZISD::MVC, Chain, Dst, Src, Size);
72}
73
74// Handle a memset of 1, 2, 4 or 8 bytes with the operands given by
75// Chain, Dst, ByteVal and Size. These cases are expected to use
76// MVI, MVHHI, MVHI and MVGHI respectively.
77static SDValue memsetStore(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
78 SDValue Dst, uint64_t ByteVal, uint64_t Size,
79 Align Alignment, MachinePointerInfo DstPtrInfo) {
80 uint64_t StoreVal = ByteVal;
81 for (unsigned I = 1; I < Size; ++I)
82 StoreVal |= ByteVal << (I * 8);
83 return DAG.getStore(
84 Chain, dl: DL, Val: DAG.getConstant(Val: StoreVal, DL, VT: MVT::getIntegerVT(BitWidth: Size * 8)),
85 Ptr: Dst, PtrInfo: DstPtrInfo, Alignment);
86}
87
88SDValue SystemZSelectionDAGInfo::EmitTargetCodeForMemset(
89 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dst,
90 SDValue Byte, SDValue Size, Align Alignment, bool IsVolatile,
91 bool AlwaysInline, MachinePointerInfo DstPtrInfo) const {
92 EVT PtrVT = Dst.getValueType();
93
94 if (IsVolatile)
95 return SDValue();
96
97 auto *CByte = dyn_cast<ConstantSDNode>(Val&: Byte);
98 if (auto *CSize = dyn_cast<ConstantSDNode>(Val&: Size)) {
99 uint64_t Bytes = CSize->getZExtValue();
100 if (Bytes == 0)
101 return SDValue();
102 if (CByte) {
103 // Handle cases that can be done using at most two of
104 // MVI, MVHI, MVHHI and MVGHI. The latter two can only be
105 // used if ByteVal is all zeros or all ones; in other cases,
106 // we can move at most 2 halfwords.
107 uint64_t ByteVal = CByte->getZExtValue();
108 if (ByteVal == 0 || ByteVal == 255
109 ? Bytes <= 16 && llvm::popcount(Value: Bytes) <= 2
110 : Bytes <= 4) {
111 unsigned Size1 = Bytes == 16 ? 8 : llvm::bit_floor(Value: Bytes);
112 unsigned Size2 = Bytes - Size1;
113 SDValue Chain1 = memsetStore(DAG, DL, Chain, Dst, ByteVal, Size: Size1,
114 Alignment, DstPtrInfo);
115 if (Size2 == 0)
116 return Chain1;
117 Dst = DAG.getNode(Opcode: ISD::ADD, DL, VT: PtrVT, N1: Dst,
118 N2: DAG.getConstant(Val: Size1, DL, VT: PtrVT));
119 DstPtrInfo = DstPtrInfo.getWithOffset(O: Size1);
120 SDValue Chain2 =
121 memsetStore(DAG, DL, Chain, Dst, ByteVal, Size: Size2,
122 Alignment: std::min(a: Alignment, b: Align(Size1)), DstPtrInfo);
123 return DAG.getNode(Opcode: ISD::TokenFactor, DL, VT: MVT::Other, N1: Chain1, N2: Chain2);
124 }
125 } else {
126 // Handle one and two bytes using STC.
127 if (Bytes <= 2) {
128 SDValue Chain1 =
129 DAG.getStore(Chain, dl: DL, Val: Byte, Ptr: Dst, PtrInfo: DstPtrInfo, Alignment);
130 if (Bytes == 1)
131 return Chain1;
132 SDValue Dst2 = DAG.getNode(Opcode: ISD::ADD, DL, VT: PtrVT, N1: Dst,
133 N2: DAG.getConstant(Val: 1, DL, VT: PtrVT));
134 SDValue Chain2 = DAG.getStore(Chain, dl: DL, Val: Byte, Ptr: Dst2,
135 PtrInfo: DstPtrInfo.getWithOffset(O: 1), Alignment: Align(1));
136 return DAG.getNode(Opcode: ISD::TokenFactor, DL, VT: MVT::Other, N1: Chain1, N2: Chain2);
137 }
138 }
139 assert(Bytes >= 2 && "Should have dealt with 0- and 1-byte cases already");
140
141 // Handle the special case of a memset of 0, which can use XC.
142 if (CByte && CByte->getZExtValue() == 0)
143 return emitMemMemImm(DAG, DL, Op: SystemZISD::XC, Chain, Dst, Src: Dst, Size: Bytes);
144
145 return emitMemMemImm(DAG, DL, Op: SystemZISD::MEMSET_MVC, Chain, Dst, Src: SDValue(),
146 Size: Bytes, Byte: DAG.getAnyExtOrTrunc(Op: Byte, DL, VT: MVT::i32));
147 }
148
149 // Variable length
150 if (CByte && CByte->getZExtValue() == 0)
151 // Handle the special case of a variable length memset of 0 with XC.
152 return emitMemMemReg(DAG, DL, Op: SystemZISD::XC, Chain, Dst, Src: Dst, Size);
153
154 return emitMemMemReg(DAG, DL, Op: SystemZISD::MEMSET_MVC, Chain, Dst, Src: SDValue(),
155 Size, Byte: DAG.getAnyExtOrTrunc(Op: Byte, DL, VT: MVT::i32));
156}
157
158// Convert the current CC value into an integer that is 0 if CC == 0,
159// greater than zero if CC == 1 and less than zero if CC >= 2.
160// The sequence starts with IPM, which puts CC into bits 29 and 28
161// of an integer and clears bits 30 and 31.
162static SDValue addIPMSequence(const SDLoc &DL, SDValue CCReg,
163 SelectionDAG &DAG) {
164 SDValue IPM = DAG.getNode(Opcode: SystemZISD::IPM, DL, VT: MVT::i32, Operand: CCReg);
165 SDValue SHL = DAG.getNode(Opcode: ISD::SHL, DL, VT: MVT::i32, N1: IPM,
166 N2: DAG.getConstant(Val: 30 - SystemZ::IPM_CC, DL, VT: MVT::i32));
167 SDValue SRA = DAG.getNode(Opcode: ISD::SRA, DL, VT: MVT::i32, N1: SHL,
168 N2: DAG.getConstant(Val: 30, DL, VT: MVT::i32));
169 return SRA;
170}
171
172std::pair<SDValue, SDValue> SystemZSelectionDAGInfo::EmitTargetCodeForMemcmp(
173 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1,
174 SDValue Src2, SDValue Size, MachinePointerInfo Op1PtrInfo,
175 MachinePointerInfo Op2PtrInfo) const {
176 SDValue CCReg;
177 // Swap operands to invert CC == 1 vs. CC == 2 cases.
178 if (auto *CSize = dyn_cast<ConstantSDNode>(Val&: Size)) {
179 uint64_t Bytes = CSize->getZExtValue();
180 assert(Bytes > 0 && "Caller should have handled 0-size case");
181 CCReg = emitMemMemImm(DAG, DL, Op: SystemZISD::CLC, Chain, Dst: Src2, Src: Src1, Size: Bytes);
182 } else
183 CCReg = emitMemMemReg(DAG, DL, Op: SystemZISD::CLC, Chain, Dst: Src2, Src: Src1, Size);
184 Chain = CCReg.getValue(R: 1);
185 return std::make_pair(x: addIPMSequence(DL, CCReg, DAG), y&: Chain);
186}
187
188std::pair<SDValue, SDValue> SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(
189 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src,
190 SDValue Char, SDValue Length, MachinePointerInfo SrcPtrInfo) const {
191 // Use SRST to find the character. End is its address on success.
192 EVT PtrVT = Src.getValueType();
193 SDVTList VTs = DAG.getVTList(VT1: PtrVT, VT2: MVT::i32, VT3: MVT::Other);
194 Length = DAG.getZExtOrTrunc(Op: Length, DL, VT: PtrVT);
195 Char = DAG.getZExtOrTrunc(Op: Char, DL, VT: MVT::i32);
196 Char = DAG.getNode(Opcode: ISD::AND, DL, VT: MVT::i32, N1: Char,
197 N2: DAG.getConstant(Val: 255, DL, VT: MVT::i32));
198 SDValue Limit = DAG.getNode(Opcode: ISD::ADD, DL, VT: PtrVT, N1: Src, N2: Length);
199 SDValue End = DAG.getNode(Opcode: SystemZISD::SEARCH_STRING, DL, VTList: VTs, N1: Chain,
200 N2: Limit, N3: Src, N4: Char);
201 SDValue CCReg = End.getValue(R: 1);
202 Chain = End.getValue(R: 2);
203
204 // Now select between End and null, depending on whether the character
205 // was found.
206 SDValue Ops[] = {
207 End, DAG.getConstant(Val: 0, DL, VT: PtrVT),
208 DAG.getTargetConstant(Val: SystemZ::CCMASK_SRST, DL, VT: MVT::i32),
209 DAG.getTargetConstant(Val: SystemZ::CCMASK_SRST_FOUND, DL, VT: MVT::i32), CCReg};
210 End = DAG.getNode(Opcode: SystemZISD::SELECT_CCMASK, DL, VT: PtrVT, Ops);
211 return std::make_pair(x&: End, y&: Chain);
212}
213
214std::pair<SDValue, SDValue> SystemZSelectionDAGInfo::EmitTargetCodeForStrcpy(
215 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dest,
216 SDValue Src, MachinePointerInfo DestPtrInfo, MachinePointerInfo SrcPtrInfo,
217 bool isStpcpy) const {
218 SDVTList VTs = DAG.getVTList(VT1: Dest.getValueType(), VT2: MVT::Other);
219 SDValue EndDest = DAG.getNode(Opcode: SystemZISD::STPCPY, DL, VTList: VTs, N1: Chain, N2: Dest, N3: Src,
220 N4: DAG.getConstant(Val: 0, DL, VT: MVT::i32));
221 return std::make_pair(x&: isStpcpy ? EndDest : Dest, y: EndDest.getValue(R: 1));
222}
223
224std::pair<SDValue, SDValue> SystemZSelectionDAGInfo::EmitTargetCodeForStrcmp(
225 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1,
226 SDValue Src2, MachinePointerInfo Op1PtrInfo,
227 MachinePointerInfo Op2PtrInfo) const {
228 SDVTList VTs = DAG.getVTList(VT1: Src1.getValueType(), VT2: MVT::i32, VT3: MVT::Other);
229 // Swap operands to invert CC == 1 vs. CC == 2 cases.
230 SDValue Unused = DAG.getNode(Opcode: SystemZISD::STRCMP, DL, VTList: VTs, N1: Chain, N2: Src2, N3: Src1,
231 N4: DAG.getConstant(Val: 0, DL, VT: MVT::i32));
232 SDValue CCReg = Unused.getValue(R: 1);
233 Chain = Unused.getValue(R: 2);
234 return std::make_pair(x: addIPMSequence(DL, CCReg, DAG), y&: Chain);
235}
236
237// Search from Src for a null character, stopping once Src reaches Limit.
238// Return a pair of values, the first being the number of nonnull characters
239// and the second being the out chain.
240//
241// This can be used for strlen by setting Limit to 0.
242static std::pair<SDValue, SDValue> getBoundedStrlen(SelectionDAG &DAG,
243 const SDLoc &DL,
244 SDValue Chain, SDValue Src,
245 SDValue Limit) {
246 EVT PtrVT = Src.getValueType();
247 SDVTList VTs = DAG.getVTList(VT1: PtrVT, VT2: MVT::i32, VT3: MVT::Other);
248 SDValue End = DAG.getNode(Opcode: SystemZISD::SEARCH_STRING, DL, VTList: VTs, N1: Chain,
249 N2: Limit, N3: Src, N4: DAG.getConstant(Val: 0, DL, VT: MVT::i32));
250 Chain = End.getValue(R: 2);
251 SDValue Len = DAG.getNode(Opcode: ISD::SUB, DL, VT: PtrVT, N1: End, N2: Src);
252 return std::make_pair(x&: Len, y&: Chain);
253}
254
255std::pair<SDValue, SDValue> SystemZSelectionDAGInfo::EmitTargetCodeForStrlen(
256 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src,
257 MachinePointerInfo SrcPtrInfo) const {
258 EVT PtrVT = Src.getValueType();
259 return getBoundedStrlen(DAG, DL, Chain, Src, Limit: DAG.getConstant(Val: 0, DL, VT: PtrVT));
260}
261
262std::pair<SDValue, SDValue> SystemZSelectionDAGInfo::EmitTargetCodeForStrnlen(
263 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src,
264 SDValue MaxLength, MachinePointerInfo SrcPtrInfo) const {
265 EVT PtrVT = Src.getValueType();
266 MaxLength = DAG.getZExtOrTrunc(Op: MaxLength, DL, VT: PtrVT);
267 SDValue Limit = DAG.getNode(Opcode: ISD::ADD, DL, VT: PtrVT, N1: Src, N2: MaxLength);
268 return getBoundedStrlen(DAG, DL, Chain, Src, Limit);
269}
270