1 | //===-- SystemZTargetTransformInfo.h - SystemZ-specific TTI ---------------===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | |
9 | #ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZTARGETTRANSFORMINFO_H |
10 | #define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZTARGETTRANSFORMINFO_H |
11 | |
12 | #include "SystemZTargetMachine.h" |
13 | #include "llvm/Analysis/TargetTransformInfo.h" |
14 | #include "llvm/CodeGen/BasicTTIImpl.h" |
15 | |
16 | namespace llvm { |
17 | |
18 | class SystemZTTIImpl : public BasicTTIImplBase<SystemZTTIImpl> { |
19 | typedef BasicTTIImplBase<SystemZTTIImpl> BaseT; |
20 | typedef TargetTransformInfo TTI; |
21 | friend BaseT; |
22 | |
23 | const SystemZSubtarget *ST; |
24 | const SystemZTargetLowering *TLI; |
25 | |
26 | const SystemZSubtarget *getST() const { return ST; } |
27 | const SystemZTargetLowering *getTLI() const { return TLI; } |
28 | |
29 | unsigned const LIBCALL_COST = 30; |
30 | |
31 | bool isInt128InVR(Type *Ty) { return Ty->isIntegerTy(Bitwidth: 128) && ST->hasVector(); } |
32 | |
33 | public: |
34 | explicit SystemZTTIImpl(const SystemZTargetMachine *TM, const Function &F) |
35 | : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)), |
36 | TLI(ST->getTargetLowering()) {} |
37 | |
38 | /// \name Scalar TTI Implementations |
39 | /// @{ |
40 | |
41 | unsigned getInliningThresholdMultiplier() const { return 3; } |
42 | unsigned adjustInliningThreshold(const CallBase *CB) const; |
43 | |
44 | InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, |
45 | TTI::TargetCostKind CostKind); |
46 | |
47 | InstructionCost getIntImmCostInst(unsigned Opcode, unsigned Idx, |
48 | const APInt &Imm, Type *Ty, |
49 | TTI::TargetCostKind CostKind, |
50 | Instruction *Inst = nullptr); |
51 | InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, |
52 | const APInt &Imm, Type *Ty, |
53 | TTI::TargetCostKind CostKind); |
54 | |
55 | TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth); |
56 | |
57 | void (Loop *L, ScalarEvolution &SE, |
58 | TTI::UnrollingPreferences &UP, |
59 | OptimizationRemarkEmitter *ORE); |
60 | |
61 | void getPeelingPreferences(Loop *L, ScalarEvolution &SE, |
62 | TTI::PeelingPreferences &PP); |
63 | |
64 | bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1, |
65 | const TargetTransformInfo::LSRCost &C2); |
66 | /// @} |
67 | |
68 | /// \name Vector TTI Implementations |
69 | /// @{ |
70 | |
71 | unsigned getNumberOfRegisters(unsigned ClassID) const; |
72 | TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const; |
73 | |
74 | unsigned getCacheLineSize() const override { return 256; } |
75 | unsigned getPrefetchDistance() const override { return 4500; } |
76 | unsigned getMinPrefetchStride(unsigned NumMemAccesses, |
77 | unsigned NumStridedMemAccesses, |
78 | unsigned NumPrefetches, |
79 | bool HasCall) const override; |
80 | bool enableWritePrefetching() const override { return true; } |
81 | |
82 | bool hasDivRemOp(Type *DataType, bool IsSigned); |
83 | bool prefersVectorizedAddressing() { return false; } |
84 | bool LSRWithInstrQueries() { return true; } |
85 | bool supportsEfficientVectorElementLoadStore() { return true; } |
86 | bool enableInterleavedAccessVectorization() { return true; } |
87 | |
88 | InstructionCost getArithmeticInstrCost( |
89 | unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, |
90 | TTI::OperandValueInfo Op1Info = {.Kind: TTI::OK_AnyValue, .Properties: TTI::OP_None}, |
91 | TTI::OperandValueInfo Op2Info = {.Kind: TTI::OK_AnyValue, .Properties: TTI::OP_None}, |
92 | ArrayRef<const Value *> Args = std::nullopt, |
93 | const Instruction *CxtI = nullptr); |
94 | InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *Tp, |
95 | ArrayRef<int> Mask, |
96 | TTI::TargetCostKind CostKind, int Index, |
97 | VectorType *SubTp, |
98 | ArrayRef<const Value *> Args = std::nullopt, |
99 | const Instruction *CxtI = nullptr); |
100 | unsigned getVectorTruncCost(Type *SrcTy, Type *DstTy); |
101 | unsigned getVectorBitmaskConversionCost(Type *SrcTy, Type *DstTy); |
102 | unsigned getBoolVecToIntConversionCost(unsigned Opcode, Type *Dst, |
103 | const Instruction *I); |
104 | InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, |
105 | TTI::CastContextHint CCH, |
106 | TTI::TargetCostKind CostKind, |
107 | const Instruction *I = nullptr); |
108 | InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, |
109 | CmpInst::Predicate VecPred, |
110 | TTI::TargetCostKind CostKind, |
111 | const Instruction *I = nullptr); |
112 | using BaseT::getVectorInstrCost; |
113 | InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, |
114 | TTI::TargetCostKind CostKind, |
115 | unsigned Index, Value *Op0, Value *Op1); |
116 | bool isFoldableLoad(const LoadInst *Ld, const Instruction *&FoldedValue); |
117 | InstructionCost |
118 | getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, |
119 | unsigned AddressSpace, TTI::TargetCostKind CostKind, |
120 | TTI::OperandValueInfo OpInfo = {.Kind: TTI::OK_AnyValue, .Properties: TTI::OP_None}, |
121 | const Instruction *I = nullptr); |
122 | |
123 | InstructionCost getInterleavedMemoryOpCost( |
124 | unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices, |
125 | Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, |
126 | bool UseMaskForCond = false, bool UseMaskForGaps = false); |
127 | |
128 | InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, |
129 | TTI::TargetCostKind CostKind); |
130 | |
131 | bool shouldExpandReduction(const IntrinsicInst *II) const; |
132 | /// @} |
133 | }; |
134 | |
135 | } // end namespace llvm |
136 | |
137 | #endif |
138 | |