1//- WebAssemblyISelLowering.h - WebAssembly DAG Lowering Interface -*- C++ -*-//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file defines the interfaces that WebAssembly uses to lower LLVM
11/// code into a selection DAG.
12///
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H
16#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H
17
18#include "llvm/CodeGen/TargetLowering.h"
19
20namespace llvm {
21
22namespace WebAssemblyISD {
23
24enum NodeType : unsigned {
25 FIRST_NUMBER = ISD::BUILTIN_OP_END,
26#define HANDLE_NODETYPE(NODE) NODE,
27#define HANDLE_MEM_NODETYPE(NODE)
28#include "WebAssemblyISD.def"
29 FIRST_MEM_OPCODE = ISD::FIRST_TARGET_MEMORY_OPCODE,
30#undef HANDLE_NODETYPE
31#undef HANDLE_MEM_NODETYPE
32#define HANDLE_NODETYPE(NODE)
33#define HANDLE_MEM_NODETYPE(NODE) NODE,
34#include "WebAssemblyISD.def"
35#undef HANDLE_NODETYPE
36#undef HANDLE_MEM_NODETYPE
37};
38
39} // end namespace WebAssemblyISD
40
41class WebAssemblySubtarget;
42
43class WebAssemblyTargetLowering final : public TargetLowering {
44public:
45 WebAssemblyTargetLowering(const TargetMachine &TM,
46 const WebAssemblySubtarget &STI);
47
48 MVT getPointerTy(const DataLayout &DL, uint32_t AS = 0) const override;
49 MVT getPointerMemTy(const DataLayout &DL, uint32_t AS = 0) const override;
50
51private:
52 /// Keep a pointer to the WebAssemblySubtarget around so that we can make the
53 /// right decision when generating code for different targets.
54 const WebAssemblySubtarget *Subtarget;
55
56 AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *) const override;
57 bool shouldScalarizeBinop(SDValue VecOp) const override;
58 FastISel *createFastISel(FunctionLoweringInfo &FuncInfo,
59 const TargetLibraryInfo *LibInfo) const override;
60 MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override;
61 MachineBasicBlock *
62 EmitInstrWithCustomInserter(MachineInstr &MI,
63 MachineBasicBlock *MBB) const override;
64 const char *getTargetNodeName(unsigned Opcode) const override;
65 std::pair<unsigned, const TargetRegisterClass *>
66 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
67 StringRef Constraint, MVT VT) const override;
68 bool isCheapToSpeculateCttz(Type *Ty) const override;
69 bool isCheapToSpeculateCtlz(Type *Ty) const override;
70 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
71 unsigned AS,
72 Instruction *I = nullptr) const override;
73 bool allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace, Align Alignment,
74 MachineMemOperand::Flags Flags,
75 unsigned *Fast) const override;
76 bool isIntDivCheap(EVT VT, AttributeList Attr) const override;
77 bool isVectorLoadExtDesirable(SDValue ExtVal) const override;
78 bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
79 bool shouldSinkOperands(Instruction *I,
80 SmallVectorImpl<Use *> &Ops) const override;
81 EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
82 EVT VT) const override;
83 bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
84 MachineFunction &MF,
85 unsigned Intrinsic) const override;
86
87 void computeKnownBitsForTargetNode(const SDValue Op, KnownBits &Known,
88 const APInt &DemandedElts,
89 const SelectionDAG &DAG,
90 unsigned Depth) const override;
91
92 TargetLoweringBase::LegalizeTypeAction
93 getPreferredVectorAction(MVT VT) const override;
94
95 SDValue LowerCall(CallLoweringInfo &CLI,
96 SmallVectorImpl<SDValue> &InVals) const override;
97 bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
98 bool isVarArg,
99 const SmallVectorImpl<ISD::OutputArg> &Outs,
100 LLVMContext &Context) const override;
101 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
102 const SmallVectorImpl<ISD::OutputArg> &Outs,
103 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
104 SelectionDAG &DAG) const override;
105 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
106 bool IsVarArg,
107 const SmallVectorImpl<ISD::InputArg> &Ins,
108 const SDLoc &DL, SelectionDAG &DAG,
109 SmallVectorImpl<SDValue> &InVals) const override;
110
111 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
112 SelectionDAG &DAG) const override;
113
114 bool
115 shouldSimplifyDemandedVectorElts(SDValue Op,
116 const TargetLoweringOpt &TLO) const override;
117
118 // Custom lowering hooks.
119 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
120 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
121 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
122 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
123 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
124 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
125 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const;
126 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
127 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
128 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const;
129 SDValue LowerCopyToReg(SDValue Op, SelectionDAG &DAG) const;
130 SDValue LowerIntrinsic(SDValue Op, SelectionDAG &DAG) const;
131 SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
132 SDValue LowerEXTEND_VECTOR_INREG(SDValue Op, SelectionDAG &DAG) const;
133 SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
134 SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
135 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
136 SDValue LowerAccessVectorElement(SDValue Op, SelectionDAG &DAG) const;
137 SDValue LowerShift(SDValue Op, SelectionDAG &DAG) const;
138 SDValue LowerFP_TO_INT_SAT(SDValue Op, SelectionDAG &DAG) const;
139 SDValue LowerLoad(SDValue Op, SelectionDAG &DAG) const;
140 SDValue LowerStore(SDValue Op, SelectionDAG &DAG) const;
141
142 // Custom DAG combine hooks
143 SDValue
144 PerformDAGCombine(SDNode *N,
145 TargetLowering::DAGCombinerInfo &DCI) const override;
146};
147
148namespace WebAssembly {
149FastISel *createFastISel(FunctionLoweringInfo &funcInfo,
150 const TargetLibraryInfo *libInfo);
151} // end namespace WebAssembly
152
153} // end namespace llvm
154
155#endif
156