| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
|---|---|
| 2 | |* *| |
| 3 | |* Intrinsic Function Source Fragment *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | #ifndef LLVM_IR_INTRINSIC_NVVM_ENUMS_H |
| 10 | #define LLVM_IR_INTRINSIC_NVVM_ENUMS_H |
| 11 | |
| 12 | namespace llvm::Intrinsic { |
| 13 | |
| 14 | enum NVVMIntrinsics : unsigned { |
| 15 | // Enum values for intrinsics. |
| 16 | nvvm_activemask = 8623, // llvm.nvvm.activemask (IntrinsicsNVVM.td:2505) |
| 17 | nvvm_add_rm_d, // llvm.nvvm.add.rm.d (IntrinsicsNVVM.td:1605) |
| 18 | nvvm_add_rm_f, // llvm.nvvm.add.rm.f (IntrinsicsNVVM.td:1601) |
| 19 | nvvm_add_rm_ftz_f, // llvm.nvvm.add.rm.ftz.f (IntrinsicsNVVM.td:1601) |
| 20 | nvvm_add_rm_ftz_sat_f, // llvm.nvvm.add.rm.ftz.sat.f (IntrinsicsNVVM.td:1601) |
| 21 | nvvm_add_rm_sat_f, // llvm.nvvm.add.rm.sat.f (IntrinsicsNVVM.td:1601) |
| 22 | nvvm_add_rn_d, // llvm.nvvm.add.rn.d (IntrinsicsNVVM.td:1605) |
| 23 | nvvm_add_rn_f, // llvm.nvvm.add.rn.f (IntrinsicsNVVM.td:1601) |
| 24 | nvvm_add_rn_ftz_f, // llvm.nvvm.add.rn.ftz.f (IntrinsicsNVVM.td:1601) |
| 25 | nvvm_add_rn_ftz_sat_f, // llvm.nvvm.add.rn.ftz.sat.f (IntrinsicsNVVM.td:1601) |
| 26 | nvvm_add_rn_ftz_sat_f16, // llvm.nvvm.add.rn.ftz.sat.f16 (IntrinsicsNVVM.td:1610) |
| 27 | nvvm_add_rn_ftz_sat_v2f16, // llvm.nvvm.add.rn.ftz.sat.v2f16 (IntrinsicsNVVM.td:1613) |
| 28 | nvvm_add_rn_sat_f, // llvm.nvvm.add.rn.sat.f (IntrinsicsNVVM.td:1601) |
| 29 | nvvm_add_rn_sat_f16, // llvm.nvvm.add.rn.sat.f16 (IntrinsicsNVVM.td:1610) |
| 30 | nvvm_add_rn_sat_v2f16, // llvm.nvvm.add.rn.sat.v2f16 (IntrinsicsNVVM.td:1613) |
| 31 | nvvm_add_rp_d, // llvm.nvvm.add.rp.d (IntrinsicsNVVM.td:1605) |
| 32 | nvvm_add_rp_f, // llvm.nvvm.add.rp.f (IntrinsicsNVVM.td:1601) |
| 33 | nvvm_add_rp_ftz_f, // llvm.nvvm.add.rp.ftz.f (IntrinsicsNVVM.td:1601) |
| 34 | nvvm_add_rp_ftz_sat_f, // llvm.nvvm.add.rp.ftz.sat.f (IntrinsicsNVVM.td:1601) |
| 35 | nvvm_add_rp_sat_f, // llvm.nvvm.add.rp.sat.f (IntrinsicsNVVM.td:1601) |
| 36 | nvvm_add_rz_d, // llvm.nvvm.add.rz.d (IntrinsicsNVVM.td:1605) |
| 37 | nvvm_add_rz_f, // llvm.nvvm.add.rz.f (IntrinsicsNVVM.td:1601) |
| 38 | nvvm_add_rz_ftz_f, // llvm.nvvm.add.rz.ftz.f (IntrinsicsNVVM.td:1601) |
| 39 | nvvm_add_rz_ftz_sat_f, // llvm.nvvm.add.rz.ftz.sat.f (IntrinsicsNVVM.td:1601) |
| 40 | nvvm_add_rz_sat_f, // llvm.nvvm.add.rz.sat.f (IntrinsicsNVVM.td:1601) |
| 41 | nvvm_applypriority_L2_evict_normal, // llvm.nvvm.applypriority.L2.evict.normal (IntrinsicsNVVM.td:2988) |
| 42 | nvvm_applypriority_global_L2_evict_normal, // llvm.nvvm.applypriority.global.L2.evict.normal (IntrinsicsNVVM.td:2985) |
| 43 | nvvm_atomic_add_gen_f_cta, // llvm.nvvm.atomic.add.gen.f.cta (IntrinsicsNVVM.td:1887) |
| 44 | nvvm_atomic_add_gen_f_sys, // llvm.nvvm.atomic.add.gen.f.sys (IntrinsicsNVVM.td:1888) |
| 45 | nvvm_atomic_add_gen_i_cta, // llvm.nvvm.atomic.add.gen.i.cta (IntrinsicsNVVM.td:1887) |
| 46 | nvvm_atomic_add_gen_i_sys, // llvm.nvvm.atomic.add.gen.i.sys (IntrinsicsNVVM.td:1888) |
| 47 | nvvm_atomic_and_gen_i_cta, // llvm.nvvm.atomic.and.gen.i.cta (IntrinsicsNVVM.td:1887) |
| 48 | nvvm_atomic_and_gen_i_sys, // llvm.nvvm.atomic.and.gen.i.sys (IntrinsicsNVVM.td:1888) |
| 49 | nvvm_atomic_cas_gen_i_cta, // llvm.nvvm.atomic.cas.gen.i.cta (IntrinsicsNVVM.td:1891) |
| 50 | nvvm_atomic_cas_gen_i_sys, // llvm.nvvm.atomic.cas.gen.i.sys (IntrinsicsNVVM.td:1892) |
| 51 | nvvm_atomic_dec_gen_i_cta, // llvm.nvvm.atomic.dec.gen.i.cta (IntrinsicsNVVM.td:1887) |
| 52 | nvvm_atomic_dec_gen_i_sys, // llvm.nvvm.atomic.dec.gen.i.sys (IntrinsicsNVVM.td:1888) |
| 53 | nvvm_atomic_exch_gen_i_cta, // llvm.nvvm.atomic.exch.gen.i.cta (IntrinsicsNVVM.td:1887) |
| 54 | nvvm_atomic_exch_gen_i_sys, // llvm.nvvm.atomic.exch.gen.i.sys (IntrinsicsNVVM.td:1888) |
| 55 | nvvm_atomic_inc_gen_i_cta, // llvm.nvvm.atomic.inc.gen.i.cta (IntrinsicsNVVM.td:1887) |
| 56 | nvvm_atomic_inc_gen_i_sys, // llvm.nvvm.atomic.inc.gen.i.sys (IntrinsicsNVVM.td:1888) |
| 57 | nvvm_atomic_max_gen_i_cta, // llvm.nvvm.atomic.max.gen.i.cta (IntrinsicsNVVM.td:1887) |
| 58 | nvvm_atomic_max_gen_i_sys, // llvm.nvvm.atomic.max.gen.i.sys (IntrinsicsNVVM.td:1888) |
| 59 | nvvm_atomic_min_gen_i_cta, // llvm.nvvm.atomic.min.gen.i.cta (IntrinsicsNVVM.td:1887) |
| 60 | nvvm_atomic_min_gen_i_sys, // llvm.nvvm.atomic.min.gen.i.sys (IntrinsicsNVVM.td:1888) |
| 61 | nvvm_atomic_or_gen_i_cta, // llvm.nvvm.atomic.or.gen.i.cta (IntrinsicsNVVM.td:1887) |
| 62 | nvvm_atomic_or_gen_i_sys, // llvm.nvvm.atomic.or.gen.i.sys (IntrinsicsNVVM.td:1888) |
| 63 | nvvm_atomic_xor_gen_i_cta, // llvm.nvvm.atomic.xor.gen.i.cta (IntrinsicsNVVM.td:1887) |
| 64 | nvvm_atomic_xor_gen_i_sys, // llvm.nvvm.atomic.xor.gen.i.sys (IntrinsicsNVVM.td:1888) |
| 65 | nvvm_bar_warp_sync, // llvm.nvvm.bar.warp.sync (IntrinsicsNVVM.td:1912) |
| 66 | nvvm_barrier_cluster_arrive, // llvm.nvvm.barrier.cluster.arrive (IntrinsicsNVVM.td:1943) |
| 67 | nvvm_barrier_cluster_arrive_aligned, // llvm.nvvm.barrier.cluster.arrive.aligned (IntrinsicsNVVM.td:1948) |
| 68 | nvvm_barrier_cluster_arrive_relaxed, // llvm.nvvm.barrier.cluster.arrive.relaxed (IntrinsicsNVVM.td:1944) |
| 69 | nvvm_barrier_cluster_arrive_relaxed_aligned, // llvm.nvvm.barrier.cluster.arrive.relaxed.aligned (IntrinsicsNVVM.td:1949) |
| 70 | nvvm_barrier_cluster_wait, // llvm.nvvm.barrier.cluster.wait (IntrinsicsNVVM.td:1945) |
| 71 | nvvm_barrier_cluster_wait_aligned, // llvm.nvvm.barrier.cluster.wait.aligned (IntrinsicsNVVM.td:1950) |
| 72 | nvvm_barrier_cta_arrive_aligned_count, // llvm.nvvm.barrier.cta.arrive.aligned.count (IntrinsicsNVVM.td:1920) |
| 73 | nvvm_barrier_cta_arrive_count, // llvm.nvvm.barrier.cta.arrive.count (IntrinsicsNVVM.td:1920) |
| 74 | nvvm_barrier_cta_red_and_aligned_all, // llvm.nvvm.barrier.cta.red.and.aligned.all (IntrinsicsNVVM.td:1923) |
| 75 | nvvm_barrier_cta_red_and_aligned_count, // llvm.nvvm.barrier.cta.red.and.aligned.count (IntrinsicsNVVM.td:1920) |
| 76 | nvvm_barrier_cta_red_and_all, // llvm.nvvm.barrier.cta.red.and.all (IntrinsicsNVVM.td:1923) |
| 77 | nvvm_barrier_cta_red_and_count, // llvm.nvvm.barrier.cta.red.and.count (IntrinsicsNVVM.td:1920) |
| 78 | nvvm_barrier_cta_red_or_aligned_all, // llvm.nvvm.barrier.cta.red.or.aligned.all (IntrinsicsNVVM.td:1923) |
| 79 | nvvm_barrier_cta_red_or_aligned_count, // llvm.nvvm.barrier.cta.red.or.aligned.count (IntrinsicsNVVM.td:1920) |
| 80 | nvvm_barrier_cta_red_or_all, // llvm.nvvm.barrier.cta.red.or.all (IntrinsicsNVVM.td:1923) |
| 81 | nvvm_barrier_cta_red_or_count, // llvm.nvvm.barrier.cta.red.or.count (IntrinsicsNVVM.td:1920) |
| 82 | nvvm_barrier_cta_red_popc_aligned_all, // llvm.nvvm.barrier.cta.red.popc.aligned.all (IntrinsicsNVVM.td:1923) |
| 83 | nvvm_barrier_cta_red_popc_aligned_count, // llvm.nvvm.barrier.cta.red.popc.aligned.count (IntrinsicsNVVM.td:1920) |
| 84 | nvvm_barrier_cta_red_popc_all, // llvm.nvvm.barrier.cta.red.popc.all (IntrinsicsNVVM.td:1923) |
| 85 | nvvm_barrier_cta_red_popc_count, // llvm.nvvm.barrier.cta.red.popc.count (IntrinsicsNVVM.td:1920) |
| 86 | nvvm_barrier_cta_sync_aligned_all, // llvm.nvvm.barrier.cta.sync.aligned.all (IntrinsicsNVVM.td:1923) |
| 87 | nvvm_barrier_cta_sync_aligned_count, // llvm.nvvm.barrier.cta.sync.aligned.count (IntrinsicsNVVM.td:1920) |
| 88 | nvvm_barrier_cta_sync_all, // llvm.nvvm.barrier.cta.sync.all (IntrinsicsNVVM.td:1923) |
| 89 | nvvm_barrier_cta_sync_count, // llvm.nvvm.barrier.cta.sync.count (IntrinsicsNVVM.td:1920) |
| 90 | nvvm_bf16x2_to_e2m1x2_rn_relu_satfinite, // llvm.nvvm.bf16x2.to.e2m1x2.rn.relu.satfinite (IntrinsicsNVVM.td:1821) |
| 91 | nvvm_bf16x2_to_e2m1x2_rn_satfinite, // llvm.nvvm.bf16x2.to.e2m1x2.rn.satfinite (IntrinsicsNVVM.td:1821) |
| 92 | nvvm_bf16x2_to_e2m3x2_rn_relu_satfinite, // llvm.nvvm.bf16x2.to.e2m3x2.rn.relu.satfinite (IntrinsicsNVVM.td:1844) |
| 93 | nvvm_bf16x2_to_e2m3x2_rn_satfinite, // llvm.nvvm.bf16x2.to.e2m3x2.rn.satfinite (IntrinsicsNVVM.td:1844) |
| 94 | nvvm_bf16x2_to_e3m2x2_rn_relu_satfinite, // llvm.nvvm.bf16x2.to.e3m2x2.rn.relu.satfinite (IntrinsicsNVVM.td:1844) |
| 95 | nvvm_bf16x2_to_e3m2x2_rn_satfinite, // llvm.nvvm.bf16x2.to.e3m2x2.rn.satfinite (IntrinsicsNVVM.td:1844) |
| 96 | nvvm_bf16x2_to_e4m3x2_rn_relu_satfinite, // llvm.nvvm.bf16x2.to.e4m3x2.rn.relu.satfinite (IntrinsicsNVVM.td:1796) |
| 97 | nvvm_bf16x2_to_e4m3x2_rn_satfinite, // llvm.nvvm.bf16x2.to.e4m3x2.rn.satfinite (IntrinsicsNVVM.td:1796) |
| 98 | nvvm_bf16x2_to_e5m2x2_rn_relu_satfinite, // llvm.nvvm.bf16x2.to.e5m2x2.rn.relu.satfinite (IntrinsicsNVVM.td:1796) |
| 99 | nvvm_bf16x2_to_e5m2x2_rn_satfinite, // llvm.nvvm.bf16x2.to.e5m2x2.rn.satfinite (IntrinsicsNVVM.td:1796) |
| 100 | nvvm_bf16x2_to_s2f6x2_rn_relu_satfinite_scale_n2_ue8m0, // llvm.nvvm.bf16x2.to.s2f6x2.rn.relu.satfinite.scale.n2.ue8m0 (IntrinsicsNVVM.td:1774) |
| 101 | nvvm_bf16x2_to_s2f6x2_rn_satfinite_scale_n2_ue8m0, // llvm.nvvm.bf16x2.to.s2f6x2.rn.satfinite.scale.n2.ue8m0 (IntrinsicsNVVM.td:1774) |
| 102 | nvvm_bf16x2_to_ue8m0x2_rp, // llvm.nvvm.bf16x2.to.ue8m0x2.rp (IntrinsicsNVVM.td:1865) |
| 103 | nvvm_bf16x2_to_ue8m0x2_rp_satfinite, // llvm.nvvm.bf16x2.to.ue8m0x2.rp.satfinite (IntrinsicsNVVM.td:1865) |
| 104 | nvvm_bf16x2_to_ue8m0x2_rz, // llvm.nvvm.bf16x2.to.ue8m0x2.rz (IntrinsicsNVVM.td:1865) |
| 105 | nvvm_bf16x2_to_ue8m0x2_rz_satfinite, // llvm.nvvm.bf16x2.to.ue8m0x2.rz.satfinite (IntrinsicsNVVM.td:1865) |
| 106 | nvvm_bf2h_rn, // llvm.nvvm.bf2h.rn (IntrinsicsNVVM.td:1726) |
| 107 | nvvm_bf2h_rn_ftz, // llvm.nvvm.bf2h.rn.ftz (IntrinsicsNVVM.td:1726) |
| 108 | nvvm_bmsk_clamp, // llvm.nvvm.bmsk.clamp (IntrinsicsNVVM.td:1662) |
| 109 | nvvm_bmsk_wrap, // llvm.nvvm.bmsk.wrap (IntrinsicsNVVM.td:1662) |
| 110 | nvvm_ceil_d, // llvm.nvvm.ceil.d (IntrinsicsNVVM.td:1423) |
| 111 | nvvm_ceil_f, // llvm.nvvm.ceil.f (IntrinsicsNVVM.td:1421) |
| 112 | nvvm_ceil_ftz_f, // llvm.nvvm.ceil.ftz.f (IntrinsicsNVVM.td:1421) |
| 113 | nvvm_clusterlaunchcontrol_query_cancel_get_first_ctaid_x, // llvm.nvvm.clusterlaunchcontrol.query_cancel.get_first_ctaid.x (IntrinsicsNVVM.td:3253) |
| 114 | nvvm_clusterlaunchcontrol_query_cancel_get_first_ctaid_y, // llvm.nvvm.clusterlaunchcontrol.query_cancel.get_first_ctaid.y (IntrinsicsNVVM.td:3253) |
| 115 | nvvm_clusterlaunchcontrol_query_cancel_get_first_ctaid_z, // llvm.nvvm.clusterlaunchcontrol.query_cancel.get_first_ctaid.z (IntrinsicsNVVM.td:3253) |
| 116 | nvvm_clusterlaunchcontrol_query_cancel_is_canceled, // llvm.nvvm.clusterlaunchcontrol.query_cancel.is_canceled (IntrinsicsNVVM.td:3248) |
| 117 | nvvm_clusterlaunchcontrol_try_cancel_async_multicast_shared, // llvm.nvvm.clusterlaunchcontrol.try_cancel.async.multicast.shared (IntrinsicsNVVM.td:3241) |
| 118 | nvvm_clusterlaunchcontrol_try_cancel_async_shared, // llvm.nvvm.clusterlaunchcontrol.try_cancel.async.shared (IntrinsicsNVVM.td:3236) |
| 119 | nvvm_compiler_error, // llvm.nvvm.compiler.error (IntrinsicsNVVM.td:2193) |
| 120 | nvvm_compiler_warn, // llvm.nvvm.compiler.warn (IntrinsicsNVVM.td:2194) |
| 121 | nvvm_cos_approx_f, // llvm.nvvm.cos.approx.f (IntrinsicsNVVM.td:1493) |
| 122 | nvvm_cos_approx_ftz_f, // llvm.nvvm.cos.approx.ftz.f (IntrinsicsNVVM.td:1493) |
| 123 | nvvm_cp_async_bulk_commit_group, // llvm.nvvm.cp.async.bulk.commit.group (IntrinsicsNVVM.td:2047) |
| 124 | nvvm_cp_async_bulk_global_to_shared_cluster, // llvm.nvvm.cp.async.bulk.global.to.shared.cluster (IntrinsicsNVVM.td:3000) |
| 125 | nvvm_cp_async_bulk_global_to_shared_cta, // llvm.nvvm.cp.async.bulk.global.to.shared.cta (IntrinsicsNVVM.td:3014) |
| 126 | nvvm_cp_async_bulk_prefetch_L2, // llvm.nvvm.cp.async.bulk.prefetch.L2 (IntrinsicsNVVM.td:3060) |
| 127 | nvvm_cp_async_bulk_shared_cta_to_cluster, // llvm.nvvm.cp.async.bulk.shared.cta.to.cluster (IntrinsicsNVVM.td:3026) |
| 128 | nvvm_cp_async_bulk_shared_cta_to_global, // llvm.nvvm.cp.async.bulk.shared.cta.to.global (IntrinsicsNVVM.td:3036) |
| 129 | nvvm_cp_async_bulk_shared_cta_to_global_bytemask, // llvm.nvvm.cp.async.bulk.shared.cta.to.global.bytemask (IntrinsicsNVVM.td:3047) |
| 130 | nvvm_cp_async_bulk_tensor_g2s_cta_im2col_3d, // llvm.nvvm.cp.async.bulk.tensor.g2s.cta.im2col.3d (IntrinsicsNVVM.td:2914) |
| 131 | nvvm_cp_async_bulk_tensor_g2s_cta_im2col_4d, // llvm.nvvm.cp.async.bulk.tensor.g2s.cta.im2col.4d (IntrinsicsNVVM.td:2914) |
| 132 | nvvm_cp_async_bulk_tensor_g2s_cta_im2col_5d, // llvm.nvvm.cp.async.bulk.tensor.g2s.cta.im2col.5d (IntrinsicsNVVM.td:2914) |
| 133 | nvvm_cp_async_bulk_tensor_g2s_cta_im2col_w_128_3d, // llvm.nvvm.cp.async.bulk.tensor.g2s.cta.im2col.w.128.3d (IntrinsicsNVVM.td:2914) |
| 134 | nvvm_cp_async_bulk_tensor_g2s_cta_im2col_w_128_4d, // llvm.nvvm.cp.async.bulk.tensor.g2s.cta.im2col.w.128.4d (IntrinsicsNVVM.td:2914) |
| 135 | nvvm_cp_async_bulk_tensor_g2s_cta_im2col_w_128_5d, // llvm.nvvm.cp.async.bulk.tensor.g2s.cta.im2col.w.128.5d (IntrinsicsNVVM.td:2914) |
| 136 | nvvm_cp_async_bulk_tensor_g2s_cta_im2col_w_3d, // llvm.nvvm.cp.async.bulk.tensor.g2s.cta.im2col.w.3d (IntrinsicsNVVM.td:2914) |
| 137 | nvvm_cp_async_bulk_tensor_g2s_cta_im2col_w_4d, // llvm.nvvm.cp.async.bulk.tensor.g2s.cta.im2col.w.4d (IntrinsicsNVVM.td:2914) |
| 138 | nvvm_cp_async_bulk_tensor_g2s_cta_im2col_w_5d, // llvm.nvvm.cp.async.bulk.tensor.g2s.cta.im2col.w.5d (IntrinsicsNVVM.td:2914) |
| 139 | nvvm_cp_async_bulk_tensor_g2s_cta_tile_1d, // llvm.nvvm.cp.async.bulk.tensor.g2s.cta.tile.1d (IntrinsicsNVVM.td:2914) |
| 140 | nvvm_cp_async_bulk_tensor_g2s_cta_tile_2d, // llvm.nvvm.cp.async.bulk.tensor.g2s.cta.tile.2d (IntrinsicsNVVM.td:2914) |
| 141 | nvvm_cp_async_bulk_tensor_g2s_cta_tile_3d, // llvm.nvvm.cp.async.bulk.tensor.g2s.cta.tile.3d (IntrinsicsNVVM.td:2914) |
| 142 | nvvm_cp_async_bulk_tensor_g2s_cta_tile_4d, // llvm.nvvm.cp.async.bulk.tensor.g2s.cta.tile.4d (IntrinsicsNVVM.td:2914) |
| 143 | nvvm_cp_async_bulk_tensor_g2s_cta_tile_5d, // llvm.nvvm.cp.async.bulk.tensor.g2s.cta.tile.5d (IntrinsicsNVVM.td:2914) |
| 144 | nvvm_cp_async_bulk_tensor_g2s_cta_tile_gather4_2d, // llvm.nvvm.cp.async.bulk.tensor.g2s.cta.tile.gather4.2d (IntrinsicsNVVM.td:2945) |
| 145 | nvvm_cp_async_bulk_tensor_g2s_im2col_3d, // llvm.nvvm.cp.async.bulk.tensor.g2s.im2col.3d (IntrinsicsNVVM.td:2902) |
| 146 | nvvm_cp_async_bulk_tensor_g2s_im2col_4d, // llvm.nvvm.cp.async.bulk.tensor.g2s.im2col.4d (IntrinsicsNVVM.td:2902) |
| 147 | nvvm_cp_async_bulk_tensor_g2s_im2col_5d, // llvm.nvvm.cp.async.bulk.tensor.g2s.im2col.5d (IntrinsicsNVVM.td:2902) |
| 148 | nvvm_cp_async_bulk_tensor_g2s_im2col_w_128_3d, // llvm.nvvm.cp.async.bulk.tensor.g2s.im2col.w.128.3d (IntrinsicsNVVM.td:2902) |
| 149 | nvvm_cp_async_bulk_tensor_g2s_im2col_w_128_4d, // llvm.nvvm.cp.async.bulk.tensor.g2s.im2col.w.128.4d (IntrinsicsNVVM.td:2902) |
| 150 | nvvm_cp_async_bulk_tensor_g2s_im2col_w_128_5d, // llvm.nvvm.cp.async.bulk.tensor.g2s.im2col.w.128.5d (IntrinsicsNVVM.td:2902) |
| 151 | nvvm_cp_async_bulk_tensor_g2s_im2col_w_3d, // llvm.nvvm.cp.async.bulk.tensor.g2s.im2col.w.3d (IntrinsicsNVVM.td:2902) |
| 152 | nvvm_cp_async_bulk_tensor_g2s_im2col_w_4d, // llvm.nvvm.cp.async.bulk.tensor.g2s.im2col.w.4d (IntrinsicsNVVM.td:2902) |
| 153 | nvvm_cp_async_bulk_tensor_g2s_im2col_w_5d, // llvm.nvvm.cp.async.bulk.tensor.g2s.im2col.w.5d (IntrinsicsNVVM.td:2902) |
| 154 | nvvm_cp_async_bulk_tensor_g2s_tile_1d, // llvm.nvvm.cp.async.bulk.tensor.g2s.tile.1d (IntrinsicsNVVM.td:2902) |
| 155 | nvvm_cp_async_bulk_tensor_g2s_tile_2d, // llvm.nvvm.cp.async.bulk.tensor.g2s.tile.2d (IntrinsicsNVVM.td:2902) |
| 156 | nvvm_cp_async_bulk_tensor_g2s_tile_3d, // llvm.nvvm.cp.async.bulk.tensor.g2s.tile.3d (IntrinsicsNVVM.td:2902) |
| 157 | nvvm_cp_async_bulk_tensor_g2s_tile_4d, // llvm.nvvm.cp.async.bulk.tensor.g2s.tile.4d (IntrinsicsNVVM.td:2902) |
| 158 | nvvm_cp_async_bulk_tensor_g2s_tile_5d, // llvm.nvvm.cp.async.bulk.tensor.g2s.tile.5d (IntrinsicsNVVM.td:2902) |
| 159 | nvvm_cp_async_bulk_tensor_g2s_tile_gather4_2d, // llvm.nvvm.cp.async.bulk.tensor.g2s.tile.gather4.2d (IntrinsicsNVVM.td:2928) |
| 160 | nvvm_cp_async_bulk_tensor_prefetch_im2col_3d, // llvm.nvvm.cp.async.bulk.tensor.prefetch.im2col.3d (IntrinsicsNVVM.td:2905) |
| 161 | nvvm_cp_async_bulk_tensor_prefetch_im2col_4d, // llvm.nvvm.cp.async.bulk.tensor.prefetch.im2col.4d (IntrinsicsNVVM.td:2905) |
| 162 | nvvm_cp_async_bulk_tensor_prefetch_im2col_5d, // llvm.nvvm.cp.async.bulk.tensor.prefetch.im2col.5d (IntrinsicsNVVM.td:2905) |
| 163 | nvvm_cp_async_bulk_tensor_prefetch_im2col_w_128_3d, // llvm.nvvm.cp.async.bulk.tensor.prefetch.im2col.w.128.3d (IntrinsicsNVVM.td:2905) |
| 164 | nvvm_cp_async_bulk_tensor_prefetch_im2col_w_128_4d, // llvm.nvvm.cp.async.bulk.tensor.prefetch.im2col.w.128.4d (IntrinsicsNVVM.td:2905) |
| 165 | nvvm_cp_async_bulk_tensor_prefetch_im2col_w_128_5d, // llvm.nvvm.cp.async.bulk.tensor.prefetch.im2col.w.128.5d (IntrinsicsNVVM.td:2905) |
| 166 | nvvm_cp_async_bulk_tensor_prefetch_im2col_w_3d, // llvm.nvvm.cp.async.bulk.tensor.prefetch.im2col.w.3d (IntrinsicsNVVM.td:2905) |
| 167 | nvvm_cp_async_bulk_tensor_prefetch_im2col_w_4d, // llvm.nvvm.cp.async.bulk.tensor.prefetch.im2col.w.4d (IntrinsicsNVVM.td:2905) |
| 168 | nvvm_cp_async_bulk_tensor_prefetch_im2col_w_5d, // llvm.nvvm.cp.async.bulk.tensor.prefetch.im2col.w.5d (IntrinsicsNVVM.td:2905) |
| 169 | nvvm_cp_async_bulk_tensor_prefetch_tile_1d, // llvm.nvvm.cp.async.bulk.tensor.prefetch.tile.1d (IntrinsicsNVVM.td:2905) |
| 170 | nvvm_cp_async_bulk_tensor_prefetch_tile_2d, // llvm.nvvm.cp.async.bulk.tensor.prefetch.tile.2d (IntrinsicsNVVM.td:2905) |
| 171 | nvvm_cp_async_bulk_tensor_prefetch_tile_3d, // llvm.nvvm.cp.async.bulk.tensor.prefetch.tile.3d (IntrinsicsNVVM.td:2905) |
| 172 | nvvm_cp_async_bulk_tensor_prefetch_tile_4d, // llvm.nvvm.cp.async.bulk.tensor.prefetch.tile.4d (IntrinsicsNVVM.td:2905) |
| 173 | nvvm_cp_async_bulk_tensor_prefetch_tile_5d, // llvm.nvvm.cp.async.bulk.tensor.prefetch.tile.5d (IntrinsicsNVVM.td:2905) |
| 174 | nvvm_cp_async_bulk_tensor_prefetch_tile_gather4_2d, // llvm.nvvm.cp.async.bulk.tensor.prefetch.tile.gather4.2d (IntrinsicsNVVM.td:2958) |
| 175 | nvvm_cp_async_bulk_tensor_reduce_add_im2col_3d, // llvm.nvvm.cp.async.bulk.tensor.reduce.add.im2col.3d (IntrinsicsNVVM.td:2850) |
| 176 | nvvm_cp_async_bulk_tensor_reduce_add_im2col_4d, // llvm.nvvm.cp.async.bulk.tensor.reduce.add.im2col.4d (IntrinsicsNVVM.td:2850) |
| 177 | nvvm_cp_async_bulk_tensor_reduce_add_im2col_5d, // llvm.nvvm.cp.async.bulk.tensor.reduce.add.im2col.5d (IntrinsicsNVVM.td:2850) |
| 178 | nvvm_cp_async_bulk_tensor_reduce_add_tile_1d, // llvm.nvvm.cp.async.bulk.tensor.reduce.add.tile.1d (IntrinsicsNVVM.td:2850) |
| 179 | nvvm_cp_async_bulk_tensor_reduce_add_tile_2d, // llvm.nvvm.cp.async.bulk.tensor.reduce.add.tile.2d (IntrinsicsNVVM.td:2850) |
| 180 | nvvm_cp_async_bulk_tensor_reduce_add_tile_3d, // llvm.nvvm.cp.async.bulk.tensor.reduce.add.tile.3d (IntrinsicsNVVM.td:2850) |
| 181 | nvvm_cp_async_bulk_tensor_reduce_add_tile_4d, // llvm.nvvm.cp.async.bulk.tensor.reduce.add.tile.4d (IntrinsicsNVVM.td:2850) |
| 182 | nvvm_cp_async_bulk_tensor_reduce_add_tile_5d, // llvm.nvvm.cp.async.bulk.tensor.reduce.add.tile.5d (IntrinsicsNVVM.td:2850) |
| 183 | nvvm_cp_async_bulk_tensor_reduce_and_im2col_3d, // llvm.nvvm.cp.async.bulk.tensor.reduce.and.im2col.3d (IntrinsicsNVVM.td:2850) |
| 184 | nvvm_cp_async_bulk_tensor_reduce_and_im2col_4d, // llvm.nvvm.cp.async.bulk.tensor.reduce.and.im2col.4d (IntrinsicsNVVM.td:2850) |
| 185 | nvvm_cp_async_bulk_tensor_reduce_and_im2col_5d, // llvm.nvvm.cp.async.bulk.tensor.reduce.and.im2col.5d (IntrinsicsNVVM.td:2850) |
| 186 | nvvm_cp_async_bulk_tensor_reduce_and_tile_1d, // llvm.nvvm.cp.async.bulk.tensor.reduce.and.tile.1d (IntrinsicsNVVM.td:2850) |
| 187 | nvvm_cp_async_bulk_tensor_reduce_and_tile_2d, // llvm.nvvm.cp.async.bulk.tensor.reduce.and.tile.2d (IntrinsicsNVVM.td:2850) |
| 188 | nvvm_cp_async_bulk_tensor_reduce_and_tile_3d, // llvm.nvvm.cp.async.bulk.tensor.reduce.and.tile.3d (IntrinsicsNVVM.td:2850) |
| 189 | nvvm_cp_async_bulk_tensor_reduce_and_tile_4d, // llvm.nvvm.cp.async.bulk.tensor.reduce.and.tile.4d (IntrinsicsNVVM.td:2850) |
| 190 | nvvm_cp_async_bulk_tensor_reduce_and_tile_5d, // llvm.nvvm.cp.async.bulk.tensor.reduce.and.tile.5d (IntrinsicsNVVM.td:2850) |
| 191 | nvvm_cp_async_bulk_tensor_reduce_dec_im2col_3d, // llvm.nvvm.cp.async.bulk.tensor.reduce.dec.im2col.3d (IntrinsicsNVVM.td:2850) |
| 192 | nvvm_cp_async_bulk_tensor_reduce_dec_im2col_4d, // llvm.nvvm.cp.async.bulk.tensor.reduce.dec.im2col.4d (IntrinsicsNVVM.td:2850) |
| 193 | nvvm_cp_async_bulk_tensor_reduce_dec_im2col_5d, // llvm.nvvm.cp.async.bulk.tensor.reduce.dec.im2col.5d (IntrinsicsNVVM.td:2850) |
| 194 | nvvm_cp_async_bulk_tensor_reduce_dec_tile_1d, // llvm.nvvm.cp.async.bulk.tensor.reduce.dec.tile.1d (IntrinsicsNVVM.td:2850) |
| 195 | nvvm_cp_async_bulk_tensor_reduce_dec_tile_2d, // llvm.nvvm.cp.async.bulk.tensor.reduce.dec.tile.2d (IntrinsicsNVVM.td:2850) |
| 196 | nvvm_cp_async_bulk_tensor_reduce_dec_tile_3d, // llvm.nvvm.cp.async.bulk.tensor.reduce.dec.tile.3d (IntrinsicsNVVM.td:2850) |
| 197 | nvvm_cp_async_bulk_tensor_reduce_dec_tile_4d, // llvm.nvvm.cp.async.bulk.tensor.reduce.dec.tile.4d (IntrinsicsNVVM.td:2850) |
| 198 | nvvm_cp_async_bulk_tensor_reduce_dec_tile_5d, // llvm.nvvm.cp.async.bulk.tensor.reduce.dec.tile.5d (IntrinsicsNVVM.td:2850) |
| 199 | nvvm_cp_async_bulk_tensor_reduce_inc_im2col_3d, // llvm.nvvm.cp.async.bulk.tensor.reduce.inc.im2col.3d (IntrinsicsNVVM.td:2850) |
| 200 | nvvm_cp_async_bulk_tensor_reduce_inc_im2col_4d, // llvm.nvvm.cp.async.bulk.tensor.reduce.inc.im2col.4d (IntrinsicsNVVM.td:2850) |
| 201 | nvvm_cp_async_bulk_tensor_reduce_inc_im2col_5d, // llvm.nvvm.cp.async.bulk.tensor.reduce.inc.im2col.5d (IntrinsicsNVVM.td:2850) |
| 202 | nvvm_cp_async_bulk_tensor_reduce_inc_tile_1d, // llvm.nvvm.cp.async.bulk.tensor.reduce.inc.tile.1d (IntrinsicsNVVM.td:2850) |
| 203 | nvvm_cp_async_bulk_tensor_reduce_inc_tile_2d, // llvm.nvvm.cp.async.bulk.tensor.reduce.inc.tile.2d (IntrinsicsNVVM.td:2850) |
| 204 | nvvm_cp_async_bulk_tensor_reduce_inc_tile_3d, // llvm.nvvm.cp.async.bulk.tensor.reduce.inc.tile.3d (IntrinsicsNVVM.td:2850) |
| 205 | nvvm_cp_async_bulk_tensor_reduce_inc_tile_4d, // llvm.nvvm.cp.async.bulk.tensor.reduce.inc.tile.4d (IntrinsicsNVVM.td:2850) |
| 206 | nvvm_cp_async_bulk_tensor_reduce_inc_tile_5d, // llvm.nvvm.cp.async.bulk.tensor.reduce.inc.tile.5d (IntrinsicsNVVM.td:2850) |
| 207 | nvvm_cp_async_bulk_tensor_reduce_max_im2col_3d, // llvm.nvvm.cp.async.bulk.tensor.reduce.max.im2col.3d (IntrinsicsNVVM.td:2850) |
| 208 | nvvm_cp_async_bulk_tensor_reduce_max_im2col_4d, // llvm.nvvm.cp.async.bulk.tensor.reduce.max.im2col.4d (IntrinsicsNVVM.td:2850) |
| 209 | nvvm_cp_async_bulk_tensor_reduce_max_im2col_5d, // llvm.nvvm.cp.async.bulk.tensor.reduce.max.im2col.5d (IntrinsicsNVVM.td:2850) |
| 210 | nvvm_cp_async_bulk_tensor_reduce_max_tile_1d, // llvm.nvvm.cp.async.bulk.tensor.reduce.max.tile.1d (IntrinsicsNVVM.td:2850) |
| 211 | nvvm_cp_async_bulk_tensor_reduce_max_tile_2d, // llvm.nvvm.cp.async.bulk.tensor.reduce.max.tile.2d (IntrinsicsNVVM.td:2850) |
| 212 | nvvm_cp_async_bulk_tensor_reduce_max_tile_3d, // llvm.nvvm.cp.async.bulk.tensor.reduce.max.tile.3d (IntrinsicsNVVM.td:2850) |
| 213 | nvvm_cp_async_bulk_tensor_reduce_max_tile_4d, // llvm.nvvm.cp.async.bulk.tensor.reduce.max.tile.4d (IntrinsicsNVVM.td:2850) |
| 214 | nvvm_cp_async_bulk_tensor_reduce_max_tile_5d, // llvm.nvvm.cp.async.bulk.tensor.reduce.max.tile.5d (IntrinsicsNVVM.td:2850) |
| 215 | nvvm_cp_async_bulk_tensor_reduce_min_im2col_3d, // llvm.nvvm.cp.async.bulk.tensor.reduce.min.im2col.3d (IntrinsicsNVVM.td:2850) |
| 216 | nvvm_cp_async_bulk_tensor_reduce_min_im2col_4d, // llvm.nvvm.cp.async.bulk.tensor.reduce.min.im2col.4d (IntrinsicsNVVM.td:2850) |
| 217 | nvvm_cp_async_bulk_tensor_reduce_min_im2col_5d, // llvm.nvvm.cp.async.bulk.tensor.reduce.min.im2col.5d (IntrinsicsNVVM.td:2850) |
| 218 | nvvm_cp_async_bulk_tensor_reduce_min_tile_1d, // llvm.nvvm.cp.async.bulk.tensor.reduce.min.tile.1d (IntrinsicsNVVM.td:2850) |
| 219 | nvvm_cp_async_bulk_tensor_reduce_min_tile_2d, // llvm.nvvm.cp.async.bulk.tensor.reduce.min.tile.2d (IntrinsicsNVVM.td:2850) |
| 220 | nvvm_cp_async_bulk_tensor_reduce_min_tile_3d, // llvm.nvvm.cp.async.bulk.tensor.reduce.min.tile.3d (IntrinsicsNVVM.td:2850) |
| 221 | nvvm_cp_async_bulk_tensor_reduce_min_tile_4d, // llvm.nvvm.cp.async.bulk.tensor.reduce.min.tile.4d (IntrinsicsNVVM.td:2850) |
| 222 | nvvm_cp_async_bulk_tensor_reduce_min_tile_5d, // llvm.nvvm.cp.async.bulk.tensor.reduce.min.tile.5d (IntrinsicsNVVM.td:2850) |
| 223 | nvvm_cp_async_bulk_tensor_reduce_or_im2col_3d, // llvm.nvvm.cp.async.bulk.tensor.reduce.or.im2col.3d (IntrinsicsNVVM.td:2850) |
| 224 | nvvm_cp_async_bulk_tensor_reduce_or_im2col_4d, // llvm.nvvm.cp.async.bulk.tensor.reduce.or.im2col.4d (IntrinsicsNVVM.td:2850) |
| 225 | nvvm_cp_async_bulk_tensor_reduce_or_im2col_5d, // llvm.nvvm.cp.async.bulk.tensor.reduce.or.im2col.5d (IntrinsicsNVVM.td:2850) |
| 226 | nvvm_cp_async_bulk_tensor_reduce_or_tile_1d, // llvm.nvvm.cp.async.bulk.tensor.reduce.or.tile.1d (IntrinsicsNVVM.td:2850) |
| 227 | nvvm_cp_async_bulk_tensor_reduce_or_tile_2d, // llvm.nvvm.cp.async.bulk.tensor.reduce.or.tile.2d (IntrinsicsNVVM.td:2850) |
| 228 | nvvm_cp_async_bulk_tensor_reduce_or_tile_3d, // llvm.nvvm.cp.async.bulk.tensor.reduce.or.tile.3d (IntrinsicsNVVM.td:2850) |
| 229 | nvvm_cp_async_bulk_tensor_reduce_or_tile_4d, // llvm.nvvm.cp.async.bulk.tensor.reduce.or.tile.4d (IntrinsicsNVVM.td:2850) |
| 230 | nvvm_cp_async_bulk_tensor_reduce_or_tile_5d, // llvm.nvvm.cp.async.bulk.tensor.reduce.or.tile.5d (IntrinsicsNVVM.td:2850) |
| 231 | nvvm_cp_async_bulk_tensor_reduce_xor_im2col_3d, // llvm.nvvm.cp.async.bulk.tensor.reduce.xor.im2col.3d (IntrinsicsNVVM.td:2850) |
| 232 | nvvm_cp_async_bulk_tensor_reduce_xor_im2col_4d, // llvm.nvvm.cp.async.bulk.tensor.reduce.xor.im2col.4d (IntrinsicsNVVM.td:2850) |
| 233 | nvvm_cp_async_bulk_tensor_reduce_xor_im2col_5d, // llvm.nvvm.cp.async.bulk.tensor.reduce.xor.im2col.5d (IntrinsicsNVVM.td:2850) |
| 234 | nvvm_cp_async_bulk_tensor_reduce_xor_tile_1d, // llvm.nvvm.cp.async.bulk.tensor.reduce.xor.tile.1d (IntrinsicsNVVM.td:2850) |
| 235 | nvvm_cp_async_bulk_tensor_reduce_xor_tile_2d, // llvm.nvvm.cp.async.bulk.tensor.reduce.xor.tile.2d (IntrinsicsNVVM.td:2850) |
| 236 | nvvm_cp_async_bulk_tensor_reduce_xor_tile_3d, // llvm.nvvm.cp.async.bulk.tensor.reduce.xor.tile.3d (IntrinsicsNVVM.td:2850) |
| 237 | nvvm_cp_async_bulk_tensor_reduce_xor_tile_4d, // llvm.nvvm.cp.async.bulk.tensor.reduce.xor.tile.4d (IntrinsicsNVVM.td:2850) |
| 238 | nvvm_cp_async_bulk_tensor_reduce_xor_tile_5d, // llvm.nvvm.cp.async.bulk.tensor.reduce.xor.tile.5d (IntrinsicsNVVM.td:2850) |
| 239 | nvvm_cp_async_bulk_tensor_s2g_im2col_3d, // llvm.nvvm.cp.async.bulk.tensor.s2g.im2col.3d (IntrinsicsNVVM.td:2839) |
| 240 | nvvm_cp_async_bulk_tensor_s2g_im2col_4d, // llvm.nvvm.cp.async.bulk.tensor.s2g.im2col.4d (IntrinsicsNVVM.td:2839) |
| 241 | nvvm_cp_async_bulk_tensor_s2g_im2col_5d, // llvm.nvvm.cp.async.bulk.tensor.s2g.im2col.5d (IntrinsicsNVVM.td:2839) |
| 242 | nvvm_cp_async_bulk_tensor_s2g_tile_1d, // llvm.nvvm.cp.async.bulk.tensor.s2g.tile.1d (IntrinsicsNVVM.td:2839) |
| 243 | nvvm_cp_async_bulk_tensor_s2g_tile_2d, // llvm.nvvm.cp.async.bulk.tensor.s2g.tile.2d (IntrinsicsNVVM.td:2839) |
| 244 | nvvm_cp_async_bulk_tensor_s2g_tile_3d, // llvm.nvvm.cp.async.bulk.tensor.s2g.tile.3d (IntrinsicsNVVM.td:2839) |
| 245 | nvvm_cp_async_bulk_tensor_s2g_tile_4d, // llvm.nvvm.cp.async.bulk.tensor.s2g.tile.4d (IntrinsicsNVVM.td:2839) |
| 246 | nvvm_cp_async_bulk_tensor_s2g_tile_5d, // llvm.nvvm.cp.async.bulk.tensor.s2g.tile.5d (IntrinsicsNVVM.td:2839) |
| 247 | nvvm_cp_async_bulk_tensor_s2g_tile_scatter4_2d, // llvm.nvvm.cp.async.bulk.tensor.s2g.tile.scatter4.2d (IntrinsicsNVVM.td:2862) |
| 248 | nvvm_cp_async_bulk_wait_group, // llvm.nvvm.cp.async.bulk.wait.group (IntrinsicsNVVM.td:2049) |
| 249 | nvvm_cp_async_bulk_wait_group_read, // llvm.nvvm.cp.async.bulk.wait.group.read (IntrinsicsNVVM.td:2052) |
| 250 | nvvm_cp_async_ca_shared_global_16, // llvm.nvvm.cp.async.ca.shared.global.16 (IntrinsicsNVVM.td:2029) |
| 251 | nvvm_cp_async_ca_shared_global_16_s, // llvm.nvvm.cp.async.ca.shared.global.16.s (IntrinsicsNVVM.td:2030) |
| 252 | nvvm_cp_async_ca_shared_global_4, // llvm.nvvm.cp.async.ca.shared.global.4 (IntrinsicsNVVM.td:2029) |
| 253 | nvvm_cp_async_ca_shared_global_4_s, // llvm.nvvm.cp.async.ca.shared.global.4.s (IntrinsicsNVVM.td:2030) |
| 254 | nvvm_cp_async_ca_shared_global_8, // llvm.nvvm.cp.async.ca.shared.global.8 (IntrinsicsNVVM.td:2029) |
| 255 | nvvm_cp_async_ca_shared_global_8_s, // llvm.nvvm.cp.async.ca.shared.global.8.s (IntrinsicsNVVM.td:2030) |
| 256 | nvvm_cp_async_cg_shared_global_16, // llvm.nvvm.cp.async.cg.shared.global.16 (IntrinsicsNVVM.td:2029) |
| 257 | nvvm_cp_async_cg_shared_global_16_s, // llvm.nvvm.cp.async.cg.shared.global.16.s (IntrinsicsNVVM.td:2030) |
| 258 | nvvm_cp_async_commit_group, // llvm.nvvm.cp.async.commit.group (IntrinsicsNVVM.td:2039) |
| 259 | nvvm_cp_async_mbarrier_arrive, // llvm.nvvm.cp.async.mbarrier.arrive (IntrinsicsNVVM.td:2016) |
| 260 | nvvm_cp_async_mbarrier_arrive_noinc, // llvm.nvvm.cp.async.mbarrier.arrive.noinc (IntrinsicsNVVM.td:2020) |
| 261 | nvvm_cp_async_mbarrier_arrive_noinc_shared, // llvm.nvvm.cp.async.mbarrier.arrive.noinc.shared (IntrinsicsNVVM.td:2022) |
| 262 | nvvm_cp_async_mbarrier_arrive_shared, // llvm.nvvm.cp.async.mbarrier.arrive.shared (IntrinsicsNVVM.td:2018) |
| 263 | nvvm_cp_async_wait_all, // llvm.nvvm.cp.async.wait.all (IntrinsicsNVVM.td:2044) |
| 264 | nvvm_cp_async_wait_group, // llvm.nvvm.cp.async.wait.group (IntrinsicsNVVM.td:2041) |
| 265 | nvvm_d2f_rm, // llvm.nvvm.d2f.rm (IntrinsicsNVVM.td:1688) |
| 266 | nvvm_d2f_rm_ftz, // llvm.nvvm.d2f.rm.ftz (IntrinsicsNVVM.td:1688) |
| 267 | nvvm_d2f_rn, // llvm.nvvm.d2f.rn (IntrinsicsNVVM.td:1688) |
| 268 | nvvm_d2f_rn_ftz, // llvm.nvvm.d2f.rn.ftz (IntrinsicsNVVM.td:1688) |
| 269 | nvvm_d2f_rp, // llvm.nvvm.d2f.rp (IntrinsicsNVVM.td:1688) |
| 270 | nvvm_d2f_rp_ftz, // llvm.nvvm.d2f.rp.ftz (IntrinsicsNVVM.td:1688) |
| 271 | nvvm_d2f_rz, // llvm.nvvm.d2f.rz (IntrinsicsNVVM.td:1688) |
| 272 | nvvm_d2f_rz_ftz, // llvm.nvvm.d2f.rz.ftz (IntrinsicsNVVM.td:1688) |
| 273 | nvvm_d2i_hi, // llvm.nvvm.d2i.hi (IntrinsicsNVVM.td:1683) |
| 274 | nvvm_d2i_lo, // llvm.nvvm.d2i.lo (IntrinsicsNVVM.td:1681) |
| 275 | nvvm_d2i_rm, // llvm.nvvm.d2i.rm (IntrinsicsNVVM.td:1693) |
| 276 | nvvm_d2i_rn, // llvm.nvvm.d2i.rn (IntrinsicsNVVM.td:1693) |
| 277 | nvvm_d2i_rp, // llvm.nvvm.d2i.rp (IntrinsicsNVVM.td:1693) |
| 278 | nvvm_d2i_rz, // llvm.nvvm.d2i.rz (IntrinsicsNVVM.td:1693) |
| 279 | nvvm_d2ll_rm, // llvm.nvvm.d2ll.rm (IntrinsicsNVVM.td:1710) |
| 280 | nvvm_d2ll_rn, // llvm.nvvm.d2ll.rn (IntrinsicsNVVM.td:1710) |
| 281 | nvvm_d2ll_rp, // llvm.nvvm.d2ll.rp (IntrinsicsNVVM.td:1710) |
| 282 | nvvm_d2ll_rz, // llvm.nvvm.d2ll.rz (IntrinsicsNVVM.td:1710) |
| 283 | nvvm_d2ui_rm, // llvm.nvvm.d2ui.rm (IntrinsicsNVVM.td:1693) |
| 284 | nvvm_d2ui_rn, // llvm.nvvm.d2ui.rn (IntrinsicsNVVM.td:1693) |
| 285 | nvvm_d2ui_rp, // llvm.nvvm.d2ui.rp (IntrinsicsNVVM.td:1693) |
| 286 | nvvm_d2ui_rz, // llvm.nvvm.d2ui.rz (IntrinsicsNVVM.td:1693) |
| 287 | nvvm_d2ull_rm, // llvm.nvvm.d2ull.rm (IntrinsicsNVVM.td:1710) |
| 288 | nvvm_d2ull_rn, // llvm.nvvm.d2ull.rn (IntrinsicsNVVM.td:1710) |
| 289 | nvvm_d2ull_rp, // llvm.nvvm.d2ull.rp (IntrinsicsNVVM.td:1710) |
| 290 | nvvm_d2ull_rz, // llvm.nvvm.d2ull.rz (IntrinsicsNVVM.td:1710) |
| 291 | nvvm_discard_L2, // llvm.nvvm.discard.L2 (IntrinsicsNVVM.td:2995) |
| 292 | nvvm_discard_global_L2, // llvm.nvvm.discard.global.L2 (IntrinsicsNVVM.td:2994) |
| 293 | nvvm_div_approx_f, // llvm.nvvm.div.approx.f (IntrinsicsNVVM.td:1385) |
| 294 | nvvm_div_approx_ftz_f, // llvm.nvvm.div.approx.ftz.f (IntrinsicsNVVM.td:1385) |
| 295 | nvvm_div_full, // llvm.nvvm.div.full (IntrinsicsNVVM.td:1388) |
| 296 | nvvm_div_full_ftz, // llvm.nvvm.div.full.ftz (IntrinsicsNVVM.td:1388) |
| 297 | nvvm_div_rm_d, // llvm.nvvm.div.rm.d (IntrinsicsNVVM.td:1397) |
| 298 | nvvm_div_rm_f, // llvm.nvvm.div.rm.f (IntrinsicsNVVM.td:1394) |
| 299 | nvvm_div_rm_ftz_f, // llvm.nvvm.div.rm.ftz.f (IntrinsicsNVVM.td:1394) |
| 300 | nvvm_div_rn_d, // llvm.nvvm.div.rn.d (IntrinsicsNVVM.td:1397) |
| 301 | nvvm_div_rn_f, // llvm.nvvm.div.rn.f (IntrinsicsNVVM.td:1394) |
| 302 | nvvm_div_rn_ftz_f, // llvm.nvvm.div.rn.ftz.f (IntrinsicsNVVM.td:1394) |
| 303 | nvvm_div_rp_d, // llvm.nvvm.div.rp.d (IntrinsicsNVVM.td:1397) |
| 304 | nvvm_div_rp_f, // llvm.nvvm.div.rp.f (IntrinsicsNVVM.td:1394) |
| 305 | nvvm_div_rp_ftz_f, // llvm.nvvm.div.rp.ftz.f (IntrinsicsNVVM.td:1394) |
| 306 | nvvm_div_rz_d, // llvm.nvvm.div.rz.d (IntrinsicsNVVM.td:1397) |
| 307 | nvvm_div_rz_f, // llvm.nvvm.div.rz.f (IntrinsicsNVVM.td:1394) |
| 308 | nvvm_div_rz_ftz_f, // llvm.nvvm.div.rz.ftz.f (IntrinsicsNVVM.td:1394) |
| 309 | nvvm_e2m1x2_to_f16x2_rn, // llvm.nvvm.e2m1x2.to.f16x2.rn (IntrinsicsNVVM.td:1815) |
| 310 | nvvm_e2m1x2_to_f16x2_rn_relu, // llvm.nvvm.e2m1x2.to.f16x2.rn.relu (IntrinsicsNVVM.td:1815) |
| 311 | nvvm_e2m3x2_to_f16x2_rn, // llvm.nvvm.e2m3x2.to.f16x2.rn (IntrinsicsNVVM.td:1838) |
| 312 | nvvm_e2m3x2_to_f16x2_rn_relu, // llvm.nvvm.e2m3x2.to.f16x2.rn.relu (IntrinsicsNVVM.td:1838) |
| 313 | nvvm_e3m2x2_to_f16x2_rn, // llvm.nvvm.e3m2x2.to.f16x2.rn (IntrinsicsNVVM.td:1838) |
| 314 | nvvm_e3m2x2_to_f16x2_rn_relu, // llvm.nvvm.e3m2x2.to.f16x2.rn.relu (IntrinsicsNVVM.td:1838) |
| 315 | nvvm_e4m3x2_to_f16x2_rn, // llvm.nvvm.e4m3x2.to.f16x2.rn (IntrinsicsNVVM.td:1793) |
| 316 | nvvm_e4m3x2_to_f16x2_rn_relu, // llvm.nvvm.e4m3x2.to.f16x2.rn.relu (IntrinsicsNVVM.td:1793) |
| 317 | nvvm_e5m2x2_to_f16x2_rn, // llvm.nvvm.e5m2x2.to.f16x2.rn (IntrinsicsNVVM.td:1793) |
| 318 | nvvm_e5m2x2_to_f16x2_rn_relu, // llvm.nvvm.e5m2x2.to.f16x2.rn.relu (IntrinsicsNVVM.td:1793) |
| 319 | nvvm_elect_sync, // llvm.nvvm.elect.sync (IntrinsicsNVVM.td:2535) |
| 320 | nvvm_ex2_approx, // llvm.nvvm.ex2.approx (IntrinsicsNVVM.td:1477) |
| 321 | nvvm_ex2_approx_ftz, // llvm.nvvm.ex2.approx.ftz (IntrinsicsNVVM.td:1477) |
| 322 | nvvm_exit, // llvm.nvvm.exit (IntrinsicsNVVM.td:2819) |
| 323 | nvvm_f16x2_to_e2m1x2_rn_relu_satfinite, // llvm.nvvm.f16x2.to.e2m1x2.rn.relu.satfinite (IntrinsicsNVVM.td:1818) |
| 324 | nvvm_f16x2_to_e2m1x2_rn_satfinite, // llvm.nvvm.f16x2.to.e2m1x2.rn.satfinite (IntrinsicsNVVM.td:1818) |
| 325 | nvvm_f16x2_to_e2m3x2_rn_relu_satfinite, // llvm.nvvm.f16x2.to.e2m3x2.rn.relu.satfinite (IntrinsicsNVVM.td:1841) |
| 326 | nvvm_f16x2_to_e2m3x2_rn_satfinite, // llvm.nvvm.f16x2.to.e2m3x2.rn.satfinite (IntrinsicsNVVM.td:1841) |
| 327 | nvvm_f16x2_to_e3m2x2_rn_relu_satfinite, // llvm.nvvm.f16x2.to.e3m2x2.rn.relu.satfinite (IntrinsicsNVVM.td:1841) |
| 328 | nvvm_f16x2_to_e3m2x2_rn_satfinite, // llvm.nvvm.f16x2.to.e3m2x2.rn.satfinite (IntrinsicsNVVM.td:1841) |
| 329 | nvvm_f16x2_to_e4m3x2_rn, // llvm.nvvm.f16x2.to.e4m3x2.rn (IntrinsicsNVVM.td:1790) |
| 330 | nvvm_f16x2_to_e4m3x2_rn_relu, // llvm.nvvm.f16x2.to.e4m3x2.rn.relu (IntrinsicsNVVM.td:1790) |
| 331 | nvvm_f16x2_to_e5m2x2_rn, // llvm.nvvm.f16x2.to.e5m2x2.rn (IntrinsicsNVVM.td:1790) |
| 332 | nvvm_f16x2_to_e5m2x2_rn_relu, // llvm.nvvm.f16x2.to.e5m2x2.rn.relu (IntrinsicsNVVM.td:1790) |
| 333 | nvvm_f2bf16_rn, // llvm.nvvm.f2bf16.rn (IntrinsicsNVVM.td:1739) |
| 334 | nvvm_f2bf16_rn_relu, // llvm.nvvm.f2bf16.rn.relu (IntrinsicsNVVM.td:1739) |
| 335 | nvvm_f2bf16_rn_relu_satfinite, // llvm.nvvm.f2bf16.rn.relu.satfinite (IntrinsicsNVVM.td:1739) |
| 336 | nvvm_f2bf16_rn_satfinite, // llvm.nvvm.f2bf16.rn.satfinite (IntrinsicsNVVM.td:1739) |
| 337 | nvvm_f2bf16_rz, // llvm.nvvm.f2bf16.rz (IntrinsicsNVVM.td:1739) |
| 338 | nvvm_f2bf16_rz_relu, // llvm.nvvm.f2bf16.rz.relu (IntrinsicsNVVM.td:1739) |
| 339 | nvvm_f2bf16_rz_relu_satfinite, // llvm.nvvm.f2bf16.rz.relu.satfinite (IntrinsicsNVVM.td:1739) |
| 340 | nvvm_f2bf16_rz_satfinite, // llvm.nvvm.f2bf16.rz.satfinite (IntrinsicsNVVM.td:1739) |
| 341 | nvvm_f2f16_rn, // llvm.nvvm.f2f16.rn (IntrinsicsNVVM.td:1742) |
| 342 | nvvm_f2f16_rn_relu, // llvm.nvvm.f2f16.rn.relu (IntrinsicsNVVM.td:1742) |
| 343 | nvvm_f2f16_rn_relu_satfinite, // llvm.nvvm.f2f16.rn.relu.satfinite (IntrinsicsNVVM.td:1742) |
| 344 | nvvm_f2f16_rn_satfinite, // llvm.nvvm.f2f16.rn.satfinite (IntrinsicsNVVM.td:1742) |
| 345 | nvvm_f2f16_rz, // llvm.nvvm.f2f16.rz (IntrinsicsNVVM.td:1742) |
| 346 | nvvm_f2f16_rz_relu, // llvm.nvvm.f2f16.rz.relu (IntrinsicsNVVM.td:1742) |
| 347 | nvvm_f2f16_rz_relu_satfinite, // llvm.nvvm.f2f16.rz.relu.satfinite (IntrinsicsNVVM.td:1742) |
| 348 | nvvm_f2f16_rz_satfinite, // llvm.nvvm.f2f16.rz.satfinite (IntrinsicsNVVM.td:1742) |
| 349 | nvvm_f2h_rn, // llvm.nvvm.f2h.rn (IntrinsicsNVVM.td:1723) |
| 350 | nvvm_f2h_rn_ftz, // llvm.nvvm.f2h.rn.ftz (IntrinsicsNVVM.td:1723) |
| 351 | nvvm_f2i_rm, // llvm.nvvm.f2i.rm (IntrinsicsNVVM.td:1700) |
| 352 | nvvm_f2i_rm_ftz, // llvm.nvvm.f2i.rm.ftz (IntrinsicsNVVM.td:1700) |
| 353 | nvvm_f2i_rn, // llvm.nvvm.f2i.rn (IntrinsicsNVVM.td:1700) |
| 354 | nvvm_f2i_rn_ftz, // llvm.nvvm.f2i.rn.ftz (IntrinsicsNVVM.td:1700) |
| 355 | nvvm_f2i_rp, // llvm.nvvm.f2i.rp (IntrinsicsNVVM.td:1700) |
| 356 | nvvm_f2i_rp_ftz, // llvm.nvvm.f2i.rp.ftz (IntrinsicsNVVM.td:1700) |
| 357 | nvvm_f2i_rz, // llvm.nvvm.f2i.rz (IntrinsicsNVVM.td:1700) |
| 358 | nvvm_f2i_rz_ftz, // llvm.nvvm.f2i.rz.ftz (IntrinsicsNVVM.td:1700) |
| 359 | nvvm_f2ll_rm, // llvm.nvvm.f2ll.rm (IntrinsicsNVVM.td:1707) |
| 360 | nvvm_f2ll_rm_ftz, // llvm.nvvm.f2ll.rm.ftz (IntrinsicsNVVM.td:1707) |
| 361 | nvvm_f2ll_rn, // llvm.nvvm.f2ll.rn (IntrinsicsNVVM.td:1707) |
| 362 | nvvm_f2ll_rn_ftz, // llvm.nvvm.f2ll.rn.ftz (IntrinsicsNVVM.td:1707) |
| 363 | nvvm_f2ll_rp, // llvm.nvvm.f2ll.rp (IntrinsicsNVVM.td:1707) |
| 364 | nvvm_f2ll_rp_ftz, // llvm.nvvm.f2ll.rp.ftz (IntrinsicsNVVM.td:1707) |
| 365 | nvvm_f2ll_rz, // llvm.nvvm.f2ll.rz (IntrinsicsNVVM.td:1707) |
| 366 | nvvm_f2ll_rz_ftz, // llvm.nvvm.f2ll.rz.ftz (IntrinsicsNVVM.td:1707) |
| 367 | nvvm_f2tf32_rn, // llvm.nvvm.f2tf32.rn (IntrinsicsNVVM.td:1766) |
| 368 | nvvm_f2tf32_rn_relu, // llvm.nvvm.f2tf32.rn.relu (IntrinsicsNVVM.td:1766) |
| 369 | nvvm_f2tf32_rn_relu_satfinite, // llvm.nvvm.f2tf32.rn.relu.satfinite (IntrinsicsNVVM.td:1766) |
| 370 | nvvm_f2tf32_rn_satfinite, // llvm.nvvm.f2tf32.rn.satfinite (IntrinsicsNVVM.td:1766) |
| 371 | nvvm_f2tf32_rna, // llvm.nvvm.f2tf32.rna (IntrinsicsNVVM.td:1761) |
| 372 | nvvm_f2tf32_rna_satfinite, // llvm.nvvm.f2tf32.rna.satfinite (IntrinsicsNVVM.td:1761) |
| 373 | nvvm_f2tf32_rz, // llvm.nvvm.f2tf32.rz (IntrinsicsNVVM.td:1766) |
| 374 | nvvm_f2tf32_rz_relu, // llvm.nvvm.f2tf32.rz.relu (IntrinsicsNVVM.td:1766) |
| 375 | nvvm_f2tf32_rz_relu_satfinite, // llvm.nvvm.f2tf32.rz.relu.satfinite (IntrinsicsNVVM.td:1766) |
| 376 | nvvm_f2tf32_rz_satfinite, // llvm.nvvm.f2tf32.rz.satfinite (IntrinsicsNVVM.td:1766) |
| 377 | nvvm_f2ui_rm, // llvm.nvvm.f2ui.rm (IntrinsicsNVVM.td:1700) |
| 378 | nvvm_f2ui_rm_ftz, // llvm.nvvm.f2ui.rm.ftz (IntrinsicsNVVM.td:1700) |
| 379 | nvvm_f2ui_rn, // llvm.nvvm.f2ui.rn (IntrinsicsNVVM.td:1700) |
| 380 | nvvm_f2ui_rn_ftz, // llvm.nvvm.f2ui.rn.ftz (IntrinsicsNVVM.td:1700) |
| 381 | nvvm_f2ui_rp, // llvm.nvvm.f2ui.rp (IntrinsicsNVVM.td:1700) |
| 382 | nvvm_f2ui_rp_ftz, // llvm.nvvm.f2ui.rp.ftz (IntrinsicsNVVM.td:1700) |
| 383 | nvvm_f2ui_rz, // llvm.nvvm.f2ui.rz (IntrinsicsNVVM.td:1700) |
| 384 | nvvm_f2ui_rz_ftz, // llvm.nvvm.f2ui.rz.ftz (IntrinsicsNVVM.td:1700) |
| 385 | nvvm_f2ull_rm, // llvm.nvvm.f2ull.rm (IntrinsicsNVVM.td:1707) |
| 386 | nvvm_f2ull_rm_ftz, // llvm.nvvm.f2ull.rm.ftz (IntrinsicsNVVM.td:1707) |
| 387 | nvvm_f2ull_rn, // llvm.nvvm.f2ull.rn (IntrinsicsNVVM.td:1707) |
| 388 | nvvm_f2ull_rn_ftz, // llvm.nvvm.f2ull.rn.ftz (IntrinsicsNVVM.td:1707) |
| 389 | nvvm_f2ull_rp, // llvm.nvvm.f2ull.rp (IntrinsicsNVVM.td:1707) |
| 390 | nvvm_f2ull_rp_ftz, // llvm.nvvm.f2ull.rp.ftz (IntrinsicsNVVM.td:1707) |
| 391 | nvvm_f2ull_rz, // llvm.nvvm.f2ull.rz (IntrinsicsNVVM.td:1707) |
| 392 | nvvm_f2ull_rz_ftz, // llvm.nvvm.f2ull.rz.ftz (IntrinsicsNVVM.td:1707) |
| 393 | nvvm_f32x4_to_e2m1x4_rs_relu_satfinite, // llvm.nvvm.f32x4.to.e2m1x4.rs.relu.satfinite (IntrinsicsNVVM.td:1828) |
| 394 | nvvm_f32x4_to_e2m1x4_rs_satfinite, // llvm.nvvm.f32x4.to.e2m1x4.rs.satfinite (IntrinsicsNVVM.td:1828) |
| 395 | nvvm_f32x4_to_e2m3x4_rs_relu_satfinite, // llvm.nvvm.f32x4.to.e2m3x4.rs.relu.satfinite (IntrinsicsNVVM.td:1853) |
| 396 | nvvm_f32x4_to_e2m3x4_rs_satfinite, // llvm.nvvm.f32x4.to.e2m3x4.rs.satfinite (IntrinsicsNVVM.td:1853) |
| 397 | nvvm_f32x4_to_e3m2x4_rs_relu_satfinite, // llvm.nvvm.f32x4.to.e3m2x4.rs.relu.satfinite (IntrinsicsNVVM.td:1853) |
| 398 | nvvm_f32x4_to_e3m2x4_rs_satfinite, // llvm.nvvm.f32x4.to.e3m2x4.rs.satfinite (IntrinsicsNVVM.td:1853) |
| 399 | nvvm_f32x4_to_e4m3x4_rs_relu_satfinite, // llvm.nvvm.f32x4.to.e4m3x4.rs.relu.satfinite (IntrinsicsNVVM.td:1805) |
| 400 | nvvm_f32x4_to_e4m3x4_rs_satfinite, // llvm.nvvm.f32x4.to.e4m3x4.rs.satfinite (IntrinsicsNVVM.td:1805) |
| 401 | nvvm_f32x4_to_e5m2x4_rs_relu_satfinite, // llvm.nvvm.f32x4.to.e5m2x4.rs.relu.satfinite (IntrinsicsNVVM.td:1805) |
| 402 | nvvm_f32x4_to_e5m2x4_rs_satfinite, // llvm.nvvm.f32x4.to.e5m2x4.rs.satfinite (IntrinsicsNVVM.td:1805) |
| 403 | nvvm_fabs, // llvm.nvvm.fabs (IntrinsicsNVVM.td:1431) |
| 404 | nvvm_fabs_ftz, // llvm.nvvm.fabs.ftz (IntrinsicsNVVM.td:1431) |
| 405 | nvvm_fence_acquire_sync_restrict_space_cluster_scope_cluster, // llvm.nvvm.fence.acquire.sync_restrict.space.cluster.scope.cluster (IntrinsicsNVVM.td:1967) |
| 406 | nvvm_fence_mbarrier_init_release_cluster, // llvm.nvvm.fence.mbarrier_init.release.cluster (IntrinsicsNVVM.td:1963) |
| 407 | nvvm_fence_proxy_alias, // llvm.nvvm.fence.proxy.alias (IntrinsicsNVVM.td:2008) |
| 408 | nvvm_fence_proxy_async, // llvm.nvvm.fence.proxy.async (IntrinsicsNVVM.td:2008) |
| 409 | nvvm_fence_proxy_async_global, // llvm.nvvm.fence.proxy.async.global (IntrinsicsNVVM.td:2008) |
| 410 | nvvm_fence_proxy_async_shared_cluster, // llvm.nvvm.fence.proxy.async.shared_cluster (IntrinsicsNVVM.td:2008) |
| 411 | nvvm_fence_proxy_async_shared_cta, // llvm.nvvm.fence.proxy.async.shared_cta (IntrinsicsNVVM.td:2008) |
| 412 | nvvm_fence_proxy_async_generic_acquire_sync_restrict_space_cluster_scope_cluster, // llvm.nvvm.fence.proxy.async_generic.acquire.sync_restrict.space.cluster.scope.cluster (IntrinsicsNVVM.td:1979) |
| 413 | nvvm_fence_proxy_async_generic_release_sync_restrict_space_cta_scope_cluster, // llvm.nvvm.fence.proxy.async_generic.release.sync_restrict.space.cta.scope.cluster (IntrinsicsNVVM.td:1983) |
| 414 | nvvm_fence_proxy_tensormap_generic_acquire_cluster, // llvm.nvvm.fence.proxy.tensormap_generic.acquire.cluster (IntrinsicsNVVM.td:1994) |
| 415 | nvvm_fence_proxy_tensormap_generic_acquire_cta, // llvm.nvvm.fence.proxy.tensormap_generic.acquire.cta (IntrinsicsNVVM.td:1994) |
| 416 | nvvm_fence_proxy_tensormap_generic_acquire_gpu, // llvm.nvvm.fence.proxy.tensormap_generic.acquire.gpu (IntrinsicsNVVM.td:1994) |
| 417 | nvvm_fence_proxy_tensormap_generic_acquire_sys, // llvm.nvvm.fence.proxy.tensormap_generic.acquire.sys (IntrinsicsNVVM.td:1994) |
| 418 | nvvm_fence_proxy_tensormap_generic_release_cluster, // llvm.nvvm.fence.proxy.tensormap_generic.release.cluster (IntrinsicsNVVM.td:1989) |
| 419 | nvvm_fence_proxy_tensormap_generic_release_cta, // llvm.nvvm.fence.proxy.tensormap_generic.release.cta (IntrinsicsNVVM.td:1989) |
| 420 | nvvm_fence_proxy_tensormap_generic_release_gpu, // llvm.nvvm.fence.proxy.tensormap_generic.release.gpu (IntrinsicsNVVM.td:1989) |
| 421 | nvvm_fence_proxy_tensormap_generic_release_sys, // llvm.nvvm.fence.proxy.tensormap_generic.release.sys (IntrinsicsNVVM.td:1989) |
| 422 | nvvm_fence_release_sync_restrict_space_cta_scope_cluster, // llvm.nvvm.fence.release.sync_restrict.space.cta.scope.cluster (IntrinsicsNVVM.td:1971) |
| 423 | nvvm_fence_sc_cluster, // llvm.nvvm.fence.sc.cluster (IntrinsicsNVVM.td:1960) |
| 424 | nvvm_ff_to_e2m1x2_rn_relu_satfinite, // llvm.nvvm.ff.to.e2m1x2.rn.relu.satfinite (IntrinsicsNVVM.td:1812) |
| 425 | nvvm_ff_to_e2m1x2_rn_satfinite, // llvm.nvvm.ff.to.e2m1x2.rn.satfinite (IntrinsicsNVVM.td:1812) |
| 426 | nvvm_ff_to_e2m3x2_rn_relu_satfinite, // llvm.nvvm.ff.to.e2m3x2.rn.relu.satfinite (IntrinsicsNVVM.td:1835) |
| 427 | nvvm_ff_to_e2m3x2_rn_satfinite, // llvm.nvvm.ff.to.e2m3x2.rn.satfinite (IntrinsicsNVVM.td:1835) |
| 428 | nvvm_ff_to_e3m2x2_rn_relu_satfinite, // llvm.nvvm.ff.to.e3m2x2.rn.relu.satfinite (IntrinsicsNVVM.td:1835) |
| 429 | nvvm_ff_to_e3m2x2_rn_satfinite, // llvm.nvvm.ff.to.e3m2x2.rn.satfinite (IntrinsicsNVVM.td:1835) |
| 430 | nvvm_ff_to_e4m3x2_rn, // llvm.nvvm.ff.to.e4m3x2.rn (IntrinsicsNVVM.td:1787) |
| 431 | nvvm_ff_to_e4m3x2_rn_relu, // llvm.nvvm.ff.to.e4m3x2.rn.relu (IntrinsicsNVVM.td:1787) |
| 432 | nvvm_ff_to_e5m2x2_rn, // llvm.nvvm.ff.to.e5m2x2.rn (IntrinsicsNVVM.td:1787) |
| 433 | nvvm_ff_to_e5m2x2_rn_relu, // llvm.nvvm.ff.to.e5m2x2.rn.relu (IntrinsicsNVVM.td:1787) |
| 434 | nvvm_ff_to_s2f6x2_rn_relu_satfinite_scale_n2_ue8m0, // llvm.nvvm.ff.to.s2f6x2.rn.relu.satfinite.scale.n2.ue8m0 (IntrinsicsNVVM.td:1771) |
| 435 | nvvm_ff_to_s2f6x2_rn_satfinite_scale_n2_ue8m0, // llvm.nvvm.ff.to.s2f6x2.rn.satfinite.scale.n2.ue8m0 (IntrinsicsNVVM.td:1771) |
| 436 | nvvm_ff_to_ue8m0x2_rp, // llvm.nvvm.ff.to.ue8m0x2.rp (IntrinsicsNVVM.td:1862) |
| 437 | nvvm_ff_to_ue8m0x2_rp_satfinite, // llvm.nvvm.ff.to.ue8m0x2.rp.satfinite (IntrinsicsNVVM.td:1862) |
| 438 | nvvm_ff_to_ue8m0x2_rz, // llvm.nvvm.ff.to.ue8m0x2.rz (IntrinsicsNVVM.td:1862) |
| 439 | nvvm_ff_to_ue8m0x2_rz_satfinite, // llvm.nvvm.ff.to.ue8m0x2.rz.satfinite (IntrinsicsNVVM.td:1862) |
| 440 | nvvm_ff2bf16x2_rn, // llvm.nvvm.ff2bf16x2.rn (IntrinsicsNVVM.td:1733) |
| 441 | nvvm_ff2bf16x2_rn_relu, // llvm.nvvm.ff2bf16x2.rn.relu (IntrinsicsNVVM.td:1733) |
| 442 | nvvm_ff2bf16x2_rn_relu_satfinite, // llvm.nvvm.ff2bf16x2.rn.relu.satfinite (IntrinsicsNVVM.td:1733) |
| 443 | nvvm_ff2bf16x2_rn_satfinite, // llvm.nvvm.ff2bf16x2.rn.satfinite (IntrinsicsNVVM.td:1733) |
| 444 | nvvm_ff2bf16x2_rs, // llvm.nvvm.ff2bf16x2.rs (IntrinsicsNVVM.td:1755) |
| 445 | nvvm_ff2bf16x2_rs_relu, // llvm.nvvm.ff2bf16x2.rs.relu (IntrinsicsNVVM.td:1755) |
| 446 | nvvm_ff2bf16x2_rs_relu_satfinite, // llvm.nvvm.ff2bf16x2.rs.relu.satfinite (IntrinsicsNVVM.td:1755) |
| 447 | nvvm_ff2bf16x2_rs_satfinite, // llvm.nvvm.ff2bf16x2.rs.satfinite (IntrinsicsNVVM.td:1755) |
| 448 | nvvm_ff2bf16x2_rz, // llvm.nvvm.ff2bf16x2.rz (IntrinsicsNVVM.td:1733) |
| 449 | nvvm_ff2bf16x2_rz_relu, // llvm.nvvm.ff2bf16x2.rz.relu (IntrinsicsNVVM.td:1733) |
| 450 | nvvm_ff2bf16x2_rz_relu_satfinite, // llvm.nvvm.ff2bf16x2.rz.relu.satfinite (IntrinsicsNVVM.td:1733) |
| 451 | nvvm_ff2bf16x2_rz_satfinite, // llvm.nvvm.ff2bf16x2.rz.satfinite (IntrinsicsNVVM.td:1733) |
| 452 | nvvm_ff2f16x2_rn, // llvm.nvvm.ff2f16x2.rn (IntrinsicsNVVM.td:1736) |
| 453 | nvvm_ff2f16x2_rn_relu, // llvm.nvvm.ff2f16x2.rn.relu (IntrinsicsNVVM.td:1736) |
| 454 | nvvm_ff2f16x2_rn_relu_satfinite, // llvm.nvvm.ff2f16x2.rn.relu.satfinite (IntrinsicsNVVM.td:1736) |
| 455 | nvvm_ff2f16x2_rn_satfinite, // llvm.nvvm.ff2f16x2.rn.satfinite (IntrinsicsNVVM.td:1736) |
| 456 | nvvm_ff2f16x2_rs, // llvm.nvvm.ff2f16x2.rs (IntrinsicsNVVM.td:1752) |
| 457 | nvvm_ff2f16x2_rs_relu, // llvm.nvvm.ff2f16x2.rs.relu (IntrinsicsNVVM.td:1752) |
| 458 | nvvm_ff2f16x2_rs_relu_satfinite, // llvm.nvvm.ff2f16x2.rs.relu.satfinite (IntrinsicsNVVM.td:1752) |
| 459 | nvvm_ff2f16x2_rs_satfinite, // llvm.nvvm.ff2f16x2.rs.satfinite (IntrinsicsNVVM.td:1752) |
| 460 | nvvm_ff2f16x2_rz, // llvm.nvvm.ff2f16x2.rz (IntrinsicsNVVM.td:1736) |
| 461 | nvvm_ff2f16x2_rz_relu, // llvm.nvvm.ff2f16x2.rz.relu (IntrinsicsNVVM.td:1736) |
| 462 | nvvm_ff2f16x2_rz_relu_satfinite, // llvm.nvvm.ff2f16x2.rz.relu.satfinite (IntrinsicsNVVM.td:1736) |
| 463 | nvvm_ff2f16x2_rz_satfinite, // llvm.nvvm.ff2f16x2.rz.satfinite (IntrinsicsNVVM.td:1736) |
| 464 | nvvm_flo_s, // llvm.nvvm.flo.s (IntrinsicsNVVM.td:1646) |
| 465 | nvvm_flo_u, // llvm.nvvm.flo.u (IntrinsicsNVVM.td:1646) |
| 466 | nvvm_floor_d, // llvm.nvvm.floor.d (IntrinsicsNVVM.td:1423) |
| 467 | nvvm_floor_f, // llvm.nvvm.floor.f (IntrinsicsNVVM.td:1421) |
| 468 | nvvm_floor_ftz_f, // llvm.nvvm.floor.ftz.f (IntrinsicsNVVM.td:1421) |
| 469 | nvvm_fma_rm_d, // llvm.nvvm.fma.rm.d (IntrinsicsNVVM.td:1535) |
| 470 | nvvm_fma_rm_f, // llvm.nvvm.fma.rm.f (IntrinsicsNVVM.td:1530) |
| 471 | nvvm_fma_rm_ftz_f, // llvm.nvvm.fma.rm.ftz.f (IntrinsicsNVVM.td:1530) |
| 472 | nvvm_fma_rm_ftz_sat_f, // llvm.nvvm.fma.rm.ftz.sat.f (IntrinsicsNVVM.td:1530) |
| 473 | nvvm_fma_rm_sat_f, // llvm.nvvm.fma.rm.sat.f (IntrinsicsNVVM.td:1530) |
| 474 | nvvm_fma_rn_bf16, // llvm.nvvm.fma.rn.bf16 (IntrinsicsNVVM.td:1513) |
| 475 | nvvm_fma_rn_bf16x2, // llvm.nvvm.fma.rn.bf16x2 (IntrinsicsNVVM.td:1517) |
| 476 | nvvm_fma_rn_d, // llvm.nvvm.fma.rn.d (IntrinsicsNVVM.td:1535) |
| 477 | nvvm_fma_rn_f, // llvm.nvvm.fma.rn.f (IntrinsicsNVVM.td:1530) |
| 478 | nvvm_fma_rn_f16, // llvm.nvvm.fma.rn.f16 (IntrinsicsNVVM.td:1502) |
| 479 | nvvm_fma_rn_f16x2, // llvm.nvvm.fma.rn.f16x2 (IntrinsicsNVVM.td:1506) |
| 480 | nvvm_fma_rn_ftz_f, // llvm.nvvm.fma.rn.ftz.f (IntrinsicsNVVM.td:1530) |
| 481 | nvvm_fma_rn_ftz_f16, // llvm.nvvm.fma.rn.ftz.f16 (IntrinsicsNVVM.td:1502) |
| 482 | nvvm_fma_rn_ftz_f16x2, // llvm.nvvm.fma.rn.ftz.f16x2 (IntrinsicsNVVM.td:1506) |
| 483 | nvvm_fma_rn_ftz_relu_f16, // llvm.nvvm.fma.rn.ftz.relu.f16 (IntrinsicsNVVM.td:1502) |
| 484 | nvvm_fma_rn_ftz_relu_f16x2, // llvm.nvvm.fma.rn.ftz.relu.f16x2 (IntrinsicsNVVM.td:1506) |
| 485 | nvvm_fma_rn_ftz_sat_f, // llvm.nvvm.fma.rn.ftz.sat.f (IntrinsicsNVVM.td:1530) |
| 486 | nvvm_fma_rn_ftz_sat_f16, // llvm.nvvm.fma.rn.ftz.sat.f16 (IntrinsicsNVVM.td:1502) |
| 487 | nvvm_fma_rn_ftz_sat_f16x2, // llvm.nvvm.fma.rn.ftz.sat.f16x2 (IntrinsicsNVVM.td:1506) |
| 488 | nvvm_fma_rn_oob, // llvm.nvvm.fma.rn.oob (IntrinsicsNVVM.td:1523) |
| 489 | nvvm_fma_rn_oob_relu, // llvm.nvvm.fma.rn.oob.relu (IntrinsicsNVVM.td:1523) |
| 490 | nvvm_fma_rn_relu_bf16, // llvm.nvvm.fma.rn.relu.bf16 (IntrinsicsNVVM.td:1513) |
| 491 | nvvm_fma_rn_relu_bf16x2, // llvm.nvvm.fma.rn.relu.bf16x2 (IntrinsicsNVVM.td:1517) |
| 492 | nvvm_fma_rn_relu_f16, // llvm.nvvm.fma.rn.relu.f16 (IntrinsicsNVVM.td:1502) |
| 493 | nvvm_fma_rn_relu_f16x2, // llvm.nvvm.fma.rn.relu.f16x2 (IntrinsicsNVVM.td:1506) |
| 494 | nvvm_fma_rn_sat_f, // llvm.nvvm.fma.rn.sat.f (IntrinsicsNVVM.td:1530) |
| 495 | nvvm_fma_rn_sat_f16, // llvm.nvvm.fma.rn.sat.f16 (IntrinsicsNVVM.td:1502) |
| 496 | nvvm_fma_rn_sat_f16x2, // llvm.nvvm.fma.rn.sat.f16x2 (IntrinsicsNVVM.td:1506) |
| 497 | nvvm_fma_rp_d, // llvm.nvvm.fma.rp.d (IntrinsicsNVVM.td:1535) |
| 498 | nvvm_fma_rp_f, // llvm.nvvm.fma.rp.f (IntrinsicsNVVM.td:1530) |
| 499 | nvvm_fma_rp_ftz_f, // llvm.nvvm.fma.rp.ftz.f (IntrinsicsNVVM.td:1530) |
| 500 | nvvm_fma_rp_ftz_sat_f, // llvm.nvvm.fma.rp.ftz.sat.f (IntrinsicsNVVM.td:1530) |
| 501 | nvvm_fma_rp_sat_f, // llvm.nvvm.fma.rp.sat.f (IntrinsicsNVVM.td:1530) |
| 502 | nvvm_fma_rz_d, // llvm.nvvm.fma.rz.d (IntrinsicsNVVM.td:1535) |
| 503 | nvvm_fma_rz_f, // llvm.nvvm.fma.rz.f (IntrinsicsNVVM.td:1530) |
| 504 | nvvm_fma_rz_ftz_f, // llvm.nvvm.fma.rz.ftz.f (IntrinsicsNVVM.td:1530) |
| 505 | nvvm_fma_rz_ftz_sat_f, // llvm.nvvm.fma.rz.ftz.sat.f (IntrinsicsNVVM.td:1530) |
| 506 | nvvm_fma_rz_sat_f, // llvm.nvvm.fma.rz.sat.f (IntrinsicsNVVM.td:1530) |
| 507 | nvvm_fmax_bf16, // llvm.nvvm.fmax.bf16 (IntrinsicsNVVM.td:1332) |
| 508 | nvvm_fmax_bf16x2, // llvm.nvvm.fmax.bf16x2 (IntrinsicsNVVM.td:1335) |
| 509 | nvvm_fmax_d, // llvm.nvvm.fmax.d (IntrinsicsNVVM.td:1317) |
| 510 | nvvm_fmax_f, // llvm.nvvm.fmax.f (IntrinsicsNVVM.td:1323) |
| 511 | nvvm_fmax_f16, // llvm.nvvm.fmax.f16 (IntrinsicsNVVM.td:1326) |
| 512 | nvvm_fmax_f16x2, // llvm.nvvm.fmax.f16x2 (IntrinsicsNVVM.td:1329) |
| 513 | nvvm_fmax_ftz_bf16, // llvm.nvvm.fmax.ftz.bf16 (IntrinsicsNVVM.td:1332) |
| 514 | nvvm_fmax_ftz_bf16x2, // llvm.nvvm.fmax.ftz.bf16x2 (IntrinsicsNVVM.td:1335) |
| 515 | nvvm_fmax_ftz_f, // llvm.nvvm.fmax.ftz.f (IntrinsicsNVVM.td:1323) |
| 516 | nvvm_fmax_ftz_f16, // llvm.nvvm.fmax.ftz.f16 (IntrinsicsNVVM.td:1326) |
| 517 | nvvm_fmax_ftz_f16x2, // llvm.nvvm.fmax.ftz.f16x2 (IntrinsicsNVVM.td:1329) |
| 518 | nvvm_fmax_ftz_nan_bf16, // llvm.nvvm.fmax.ftz.nan.bf16 (IntrinsicsNVVM.td:1332) |
| 519 | nvvm_fmax_ftz_nan_bf16x2, // llvm.nvvm.fmax.ftz.nan.bf16x2 (IntrinsicsNVVM.td:1335) |
| 520 | nvvm_fmax_ftz_nan_f, // llvm.nvvm.fmax.ftz.nan.f (IntrinsicsNVVM.td:1323) |
| 521 | nvvm_fmax_ftz_nan_f16, // llvm.nvvm.fmax.ftz.nan.f16 (IntrinsicsNVVM.td:1326) |
| 522 | nvvm_fmax_ftz_nan_f16x2, // llvm.nvvm.fmax.ftz.nan.f16x2 (IntrinsicsNVVM.td:1329) |
| 523 | nvvm_fmax_ftz_nan_xorsign_abs_bf16, // llvm.nvvm.fmax.ftz.nan.xorsign.abs.bf16 (IntrinsicsNVVM.td:1332) |
| 524 | nvvm_fmax_ftz_nan_xorsign_abs_bf16x2, // llvm.nvvm.fmax.ftz.nan.xorsign.abs.bf16x2 (IntrinsicsNVVM.td:1335) |
| 525 | nvvm_fmax_ftz_nan_xorsign_abs_f, // llvm.nvvm.fmax.ftz.nan.xorsign.abs.f (IntrinsicsNVVM.td:1323) |
| 526 | nvvm_fmax_ftz_nan_xorsign_abs_f16, // llvm.nvvm.fmax.ftz.nan.xorsign.abs.f16 (IntrinsicsNVVM.td:1326) |
| 527 | nvvm_fmax_ftz_nan_xorsign_abs_f16x2, // llvm.nvvm.fmax.ftz.nan.xorsign.abs.f16x2 (IntrinsicsNVVM.td:1329) |
| 528 | nvvm_fmax_ftz_xorsign_abs_bf16, // llvm.nvvm.fmax.ftz.xorsign.abs.bf16 (IntrinsicsNVVM.td:1332) |
| 529 | nvvm_fmax_ftz_xorsign_abs_bf16x2, // llvm.nvvm.fmax.ftz.xorsign.abs.bf16x2 (IntrinsicsNVVM.td:1335) |
| 530 | nvvm_fmax_ftz_xorsign_abs_f, // llvm.nvvm.fmax.ftz.xorsign.abs.f (IntrinsicsNVVM.td:1323) |
| 531 | nvvm_fmax_ftz_xorsign_abs_f16, // llvm.nvvm.fmax.ftz.xorsign.abs.f16 (IntrinsicsNVVM.td:1326) |
| 532 | nvvm_fmax_ftz_xorsign_abs_f16x2, // llvm.nvvm.fmax.ftz.xorsign.abs.f16x2 (IntrinsicsNVVM.td:1329) |
| 533 | nvvm_fmax_nan_bf16, // llvm.nvvm.fmax.nan.bf16 (IntrinsicsNVVM.td:1332) |
| 534 | nvvm_fmax_nan_bf16x2, // llvm.nvvm.fmax.nan.bf16x2 (IntrinsicsNVVM.td:1335) |
| 535 | nvvm_fmax_nan_f, // llvm.nvvm.fmax.nan.f (IntrinsicsNVVM.td:1323) |
| 536 | nvvm_fmax_nan_f16, // llvm.nvvm.fmax.nan.f16 (IntrinsicsNVVM.td:1326) |
| 537 | nvvm_fmax_nan_f16x2, // llvm.nvvm.fmax.nan.f16x2 (IntrinsicsNVVM.td:1329) |
| 538 | nvvm_fmax_nan_xorsign_abs_bf16, // llvm.nvvm.fmax.nan.xorsign.abs.bf16 (IntrinsicsNVVM.td:1332) |
| 539 | nvvm_fmax_nan_xorsign_abs_bf16x2, // llvm.nvvm.fmax.nan.xorsign.abs.bf16x2 (IntrinsicsNVVM.td:1335) |
| 540 | nvvm_fmax_nan_xorsign_abs_f, // llvm.nvvm.fmax.nan.xorsign.abs.f (IntrinsicsNVVM.td:1323) |
| 541 | nvvm_fmax_nan_xorsign_abs_f16, // llvm.nvvm.fmax.nan.xorsign.abs.f16 (IntrinsicsNVVM.td:1326) |
| 542 | nvvm_fmax_nan_xorsign_abs_f16x2, // llvm.nvvm.fmax.nan.xorsign.abs.f16x2 (IntrinsicsNVVM.td:1329) |
| 543 | nvvm_fmax_xorsign_abs_bf16, // llvm.nvvm.fmax.xorsign.abs.bf16 (IntrinsicsNVVM.td:1332) |
| 544 | nvvm_fmax_xorsign_abs_bf16x2, // llvm.nvvm.fmax.xorsign.abs.bf16x2 (IntrinsicsNVVM.td:1335) |
| 545 | nvvm_fmax_xorsign_abs_f, // llvm.nvvm.fmax.xorsign.abs.f (IntrinsicsNVVM.td:1323) |
| 546 | nvvm_fmax_xorsign_abs_f16, // llvm.nvvm.fmax.xorsign.abs.f16 (IntrinsicsNVVM.td:1326) |
| 547 | nvvm_fmax_xorsign_abs_f16x2, // llvm.nvvm.fmax.xorsign.abs.f16x2 (IntrinsicsNVVM.td:1329) |
| 548 | nvvm_fmin_bf16, // llvm.nvvm.fmin.bf16 (IntrinsicsNVVM.td:1332) |
| 549 | nvvm_fmin_bf16x2, // llvm.nvvm.fmin.bf16x2 (IntrinsicsNVVM.td:1335) |
| 550 | nvvm_fmin_d, // llvm.nvvm.fmin.d (IntrinsicsNVVM.td:1317) |
| 551 | nvvm_fmin_f, // llvm.nvvm.fmin.f (IntrinsicsNVVM.td:1323) |
| 552 | nvvm_fmin_f16, // llvm.nvvm.fmin.f16 (IntrinsicsNVVM.td:1326) |
| 553 | nvvm_fmin_f16x2, // llvm.nvvm.fmin.f16x2 (IntrinsicsNVVM.td:1329) |
| 554 | nvvm_fmin_ftz_bf16, // llvm.nvvm.fmin.ftz.bf16 (IntrinsicsNVVM.td:1332) |
| 555 | nvvm_fmin_ftz_bf16x2, // llvm.nvvm.fmin.ftz.bf16x2 (IntrinsicsNVVM.td:1335) |
| 556 | nvvm_fmin_ftz_f, // llvm.nvvm.fmin.ftz.f (IntrinsicsNVVM.td:1323) |
| 557 | nvvm_fmin_ftz_f16, // llvm.nvvm.fmin.ftz.f16 (IntrinsicsNVVM.td:1326) |
| 558 | nvvm_fmin_ftz_f16x2, // llvm.nvvm.fmin.ftz.f16x2 (IntrinsicsNVVM.td:1329) |
| 559 | nvvm_fmin_ftz_nan_bf16, // llvm.nvvm.fmin.ftz.nan.bf16 (IntrinsicsNVVM.td:1332) |
| 560 | nvvm_fmin_ftz_nan_bf16x2, // llvm.nvvm.fmin.ftz.nan.bf16x2 (IntrinsicsNVVM.td:1335) |
| 561 | nvvm_fmin_ftz_nan_f, // llvm.nvvm.fmin.ftz.nan.f (IntrinsicsNVVM.td:1323) |
| 562 | nvvm_fmin_ftz_nan_f16, // llvm.nvvm.fmin.ftz.nan.f16 (IntrinsicsNVVM.td:1326) |
| 563 | nvvm_fmin_ftz_nan_f16x2, // llvm.nvvm.fmin.ftz.nan.f16x2 (IntrinsicsNVVM.td:1329) |
| 564 | nvvm_fmin_ftz_nan_xorsign_abs_bf16, // llvm.nvvm.fmin.ftz.nan.xorsign.abs.bf16 (IntrinsicsNVVM.td:1332) |
| 565 | nvvm_fmin_ftz_nan_xorsign_abs_bf16x2, // llvm.nvvm.fmin.ftz.nan.xorsign.abs.bf16x2 (IntrinsicsNVVM.td:1335) |
| 566 | nvvm_fmin_ftz_nan_xorsign_abs_f, // llvm.nvvm.fmin.ftz.nan.xorsign.abs.f (IntrinsicsNVVM.td:1323) |
| 567 | nvvm_fmin_ftz_nan_xorsign_abs_f16, // llvm.nvvm.fmin.ftz.nan.xorsign.abs.f16 (IntrinsicsNVVM.td:1326) |
| 568 | nvvm_fmin_ftz_nan_xorsign_abs_f16x2, // llvm.nvvm.fmin.ftz.nan.xorsign.abs.f16x2 (IntrinsicsNVVM.td:1329) |
| 569 | nvvm_fmin_ftz_xorsign_abs_bf16, // llvm.nvvm.fmin.ftz.xorsign.abs.bf16 (IntrinsicsNVVM.td:1332) |
| 570 | nvvm_fmin_ftz_xorsign_abs_bf16x2, // llvm.nvvm.fmin.ftz.xorsign.abs.bf16x2 (IntrinsicsNVVM.td:1335) |
| 571 | nvvm_fmin_ftz_xorsign_abs_f, // llvm.nvvm.fmin.ftz.xorsign.abs.f (IntrinsicsNVVM.td:1323) |
| 572 | nvvm_fmin_ftz_xorsign_abs_f16, // llvm.nvvm.fmin.ftz.xorsign.abs.f16 (IntrinsicsNVVM.td:1326) |
| 573 | nvvm_fmin_ftz_xorsign_abs_f16x2, // llvm.nvvm.fmin.ftz.xorsign.abs.f16x2 (IntrinsicsNVVM.td:1329) |
| 574 | nvvm_fmin_nan_bf16, // llvm.nvvm.fmin.nan.bf16 (IntrinsicsNVVM.td:1332) |
| 575 | nvvm_fmin_nan_bf16x2, // llvm.nvvm.fmin.nan.bf16x2 (IntrinsicsNVVM.td:1335) |
| 576 | nvvm_fmin_nan_f, // llvm.nvvm.fmin.nan.f (IntrinsicsNVVM.td:1323) |
| 577 | nvvm_fmin_nan_f16, // llvm.nvvm.fmin.nan.f16 (IntrinsicsNVVM.td:1326) |
| 578 | nvvm_fmin_nan_f16x2, // llvm.nvvm.fmin.nan.f16x2 (IntrinsicsNVVM.td:1329) |
| 579 | nvvm_fmin_nan_xorsign_abs_bf16, // llvm.nvvm.fmin.nan.xorsign.abs.bf16 (IntrinsicsNVVM.td:1332) |
| 580 | nvvm_fmin_nan_xorsign_abs_bf16x2, // llvm.nvvm.fmin.nan.xorsign.abs.bf16x2 (IntrinsicsNVVM.td:1335) |
| 581 | nvvm_fmin_nan_xorsign_abs_f, // llvm.nvvm.fmin.nan.xorsign.abs.f (IntrinsicsNVVM.td:1323) |
| 582 | nvvm_fmin_nan_xorsign_abs_f16, // llvm.nvvm.fmin.nan.xorsign.abs.f16 (IntrinsicsNVVM.td:1326) |
| 583 | nvvm_fmin_nan_xorsign_abs_f16x2, // llvm.nvvm.fmin.nan.xorsign.abs.f16x2 (IntrinsicsNVVM.td:1329) |
| 584 | nvvm_fmin_xorsign_abs_bf16, // llvm.nvvm.fmin.xorsign.abs.bf16 (IntrinsicsNVVM.td:1332) |
| 585 | nvvm_fmin_xorsign_abs_bf16x2, // llvm.nvvm.fmin.xorsign.abs.bf16x2 (IntrinsicsNVVM.td:1335) |
| 586 | nvvm_fmin_xorsign_abs_f, // llvm.nvvm.fmin.xorsign.abs.f (IntrinsicsNVVM.td:1323) |
| 587 | nvvm_fmin_xorsign_abs_f16, // llvm.nvvm.fmin.xorsign.abs.f16 (IntrinsicsNVVM.td:1326) |
| 588 | nvvm_fmin_xorsign_abs_f16x2, // llvm.nvvm.fmin.xorsign.abs.f16x2 (IntrinsicsNVVM.td:1329) |
| 589 | nvvm_fns, // llvm.nvvm.fns (IntrinsicsNVVM.td:1668) |
| 590 | nvvm_fshl_clamp, // llvm.nvvm.fshl.clamp (IntrinsicsNVVM.td:1638) |
| 591 | nvvm_fshr_clamp, // llvm.nvvm.fshr.clamp (IntrinsicsNVVM.td:1638) |
| 592 | nvvm_getctarank, // llvm.nvvm.getctarank (IntrinsicsNVVM.td:2800) |
| 593 | nvvm_getctarank_shared_cluster, // llvm.nvvm.getctarank.shared.cluster (IntrinsicsNVVM.td:2802) |
| 594 | nvvm_griddepcontrol_launch_dependents, // llvm.nvvm.griddepcontrol.launch.dependents (IntrinsicsNVVM.td:3069) |
| 595 | nvvm_griddepcontrol_wait, // llvm.nvvm.griddepcontrol.wait (IntrinsicsNVVM.td:3070) |
| 596 | nvvm_i2d_rm, // llvm.nvvm.i2d.rm (IntrinsicsNVVM.td:1696) |
| 597 | nvvm_i2d_rn, // llvm.nvvm.i2d.rn (IntrinsicsNVVM.td:1696) |
| 598 | nvvm_i2d_rp, // llvm.nvvm.i2d.rp (IntrinsicsNVVM.td:1696) |
| 599 | nvvm_i2d_rz, // llvm.nvvm.i2d.rz (IntrinsicsNVVM.td:1696) |
| 600 | nvvm_i2f_rm, // llvm.nvvm.i2f.rm (IntrinsicsNVVM.td:1703) |
| 601 | nvvm_i2f_rn, // llvm.nvvm.i2f.rn (IntrinsicsNVVM.td:1703) |
| 602 | nvvm_i2f_rp, // llvm.nvvm.i2f.rp (IntrinsicsNVVM.td:1703) |
| 603 | nvvm_i2f_rz, // llvm.nvvm.i2f.rz (IntrinsicsNVVM.td:1703) |
| 604 | nvvm_idp2a_s_s, // llvm.nvvm.idp2a.s.s (IntrinsicsNVVM.td:1627) |
| 605 | nvvm_idp2a_s_u, // llvm.nvvm.idp2a.s.u (IntrinsicsNVVM.td:1627) |
| 606 | nvvm_idp2a_u_s, // llvm.nvvm.idp2a.u.s (IntrinsicsNVVM.td:1627) |
| 607 | nvvm_idp2a_u_u, // llvm.nvvm.idp2a.u.u (IntrinsicsNVVM.td:1627) |
| 608 | nvvm_idp4a_s_s, // llvm.nvvm.idp4a.s.s (IntrinsicsNVVM.td:1624) |
| 609 | nvvm_idp4a_s_u, // llvm.nvvm.idp4a.s.u (IntrinsicsNVVM.td:1624) |
| 610 | nvvm_idp4a_u_s, // llvm.nvvm.idp4a.u.s (IntrinsicsNVVM.td:1624) |
| 611 | nvvm_idp4a_u_u, // llvm.nvvm.idp4a.u.u (IntrinsicsNVVM.td:1624) |
| 612 | nvvm_internal_addrspace_wrap, // llvm.nvvm.internal.addrspace.wrap (IntrinsicsNVVM.td:2171) |
| 613 | nvvm_is_explicit_cluster, // llvm.nvvm.is_explicit_cluster (IntrinsicsNVVM.td:2806) |
| 614 | nvvm_isspacep_const, // llvm.nvvm.isspacep.const (IntrinsicsNVVM.td:2200) |
| 615 | nvvm_isspacep_global, // llvm.nvvm.isspacep.global (IntrinsicsNVVM.td:2200) |
| 616 | nvvm_isspacep_local, // llvm.nvvm.isspacep.local (IntrinsicsNVVM.td:2200) |
| 617 | nvvm_isspacep_shared, // llvm.nvvm.isspacep.shared (IntrinsicsNVVM.td:2200) |
| 618 | nvvm_isspacep_shared_cluster, // llvm.nvvm.isspacep.shared.cluster (IntrinsicsNVVM.td:2200) |
| 619 | nvvm_istypep_sampler, // llvm.nvvm.istypep.sampler (IntrinsicsNVVM.td:2313) |
| 620 | nvvm_istypep_surface, // llvm.nvvm.istypep.surface (IntrinsicsNVVM.td:2313) |
| 621 | nvvm_istypep_texture, // llvm.nvvm.istypep.texture (IntrinsicsNVVM.td:2313) |
| 622 | nvvm_ldmatrix_sync_aligned_m16n16_x1_trans_b8, // llvm.nvvm.ldmatrix.sync.aligned.m16n16.x1.trans.b8 (IntrinsicsNVVM.td:2767) |
| 623 | nvvm_ldmatrix_sync_aligned_m16n16_x1_trans_b8x16_b4x16_p64, // llvm.nvvm.ldmatrix.sync.aligned.m16n16.x1.trans.b8x16.b4x16_p64 (IntrinsicsNVVM.td:2767) |
| 624 | nvvm_ldmatrix_sync_aligned_m16n16_x1_trans_b8x16_b6x16_p32, // llvm.nvvm.ldmatrix.sync.aligned.m16n16.x1.trans.b8x16.b6x16_p32 (IntrinsicsNVVM.td:2767) |
| 625 | nvvm_ldmatrix_sync_aligned_m16n16_x2_trans_b8, // llvm.nvvm.ldmatrix.sync.aligned.m16n16.x2.trans.b8 (IntrinsicsNVVM.td:2767) |
| 626 | nvvm_ldmatrix_sync_aligned_m16n16_x2_trans_b8x16_b4x16_p64, // llvm.nvvm.ldmatrix.sync.aligned.m16n16.x2.trans.b8x16.b4x16_p64 (IntrinsicsNVVM.td:2767) |
| 627 | nvvm_ldmatrix_sync_aligned_m16n16_x2_trans_b8x16_b6x16_p32, // llvm.nvvm.ldmatrix.sync.aligned.m16n16.x2.trans.b8x16.b6x16_p32 (IntrinsicsNVVM.td:2767) |
| 628 | nvvm_ldmatrix_sync_aligned_m8n16_x1_b8x16_b4x16_p64, // llvm.nvvm.ldmatrix.sync.aligned.m8n16.x1.b8x16.b4x16_p64 (IntrinsicsNVVM.td:2767) |
| 629 | nvvm_ldmatrix_sync_aligned_m8n16_x1_b8x16_b6x16_p32, // llvm.nvvm.ldmatrix.sync.aligned.m8n16.x1.b8x16.b6x16_p32 (IntrinsicsNVVM.td:2767) |
| 630 | nvvm_ldmatrix_sync_aligned_m8n16_x2_b8x16_b4x16_p64, // llvm.nvvm.ldmatrix.sync.aligned.m8n16.x2.b8x16.b4x16_p64 (IntrinsicsNVVM.td:2767) |
| 631 | nvvm_ldmatrix_sync_aligned_m8n16_x2_b8x16_b6x16_p32, // llvm.nvvm.ldmatrix.sync.aligned.m8n16.x2.b8x16.b6x16_p32 (IntrinsicsNVVM.td:2767) |
| 632 | nvvm_ldmatrix_sync_aligned_m8n16_x4_b8x16_b4x16_p64, // llvm.nvvm.ldmatrix.sync.aligned.m8n16.x4.b8x16.b4x16_p64 (IntrinsicsNVVM.td:2767) |
| 633 | nvvm_ldmatrix_sync_aligned_m8n16_x4_b8x16_b6x16_p32, // llvm.nvvm.ldmatrix.sync.aligned.m8n16.x4.b8x16.b6x16_p32 (IntrinsicsNVVM.td:2767) |
| 634 | nvvm_ldmatrix_sync_aligned_m8n8_x1_b16, // llvm.nvvm.ldmatrix.sync.aligned.m8n8.x1.b16 (IntrinsicsNVVM.td:2767) |
| 635 | nvvm_ldmatrix_sync_aligned_m8n8_x1_trans_b16, // llvm.nvvm.ldmatrix.sync.aligned.m8n8.x1.trans.b16 (IntrinsicsNVVM.td:2767) |
| 636 | nvvm_ldmatrix_sync_aligned_m8n8_x2_b16, // llvm.nvvm.ldmatrix.sync.aligned.m8n8.x2.b16 (IntrinsicsNVVM.td:2767) |
| 637 | nvvm_ldmatrix_sync_aligned_m8n8_x2_trans_b16, // llvm.nvvm.ldmatrix.sync.aligned.m8n8.x2.trans.b16 (IntrinsicsNVVM.td:2767) |
| 638 | nvvm_ldmatrix_sync_aligned_m8n8_x4_b16, // llvm.nvvm.ldmatrix.sync.aligned.m8n8.x4.b16 (IntrinsicsNVVM.td:2767) |
| 639 | nvvm_ldmatrix_sync_aligned_m8n8_x4_trans_b16, // llvm.nvvm.ldmatrix.sync.aligned.m8n8.x4.trans.b16 (IntrinsicsNVVM.td:2767) |
| 640 | nvvm_ldu_global_f, // llvm.nvvm.ldu.global.f (IntrinsicsNVVM.td:2156) |
| 641 | nvvm_ldu_global_i, // llvm.nvvm.ldu.global.i (IntrinsicsNVVM.td:2155) |
| 642 | nvvm_ldu_global_p, // llvm.nvvm.ldu.global.p (IntrinsicsNVVM.td:2157) |
| 643 | nvvm_lg2_approx_d, // llvm.nvvm.lg2.approx.d (IntrinsicsNVVM.td:1484) |
| 644 | nvvm_lg2_approx_f, // llvm.nvvm.lg2.approx.f (IntrinsicsNVVM.td:1481) |
| 645 | nvvm_lg2_approx_ftz_f, // llvm.nvvm.lg2.approx.ftz.f (IntrinsicsNVVM.td:1481) |
| 646 | nvvm_ll2d_rm, // llvm.nvvm.ll2d.rm (IntrinsicsNVVM.td:1716) |
| 647 | nvvm_ll2d_rn, // llvm.nvvm.ll2d.rn (IntrinsicsNVVM.td:1716) |
| 648 | nvvm_ll2d_rp, // llvm.nvvm.ll2d.rp (IntrinsicsNVVM.td:1716) |
| 649 | nvvm_ll2d_rz, // llvm.nvvm.ll2d.rz (IntrinsicsNVVM.td:1716) |
| 650 | nvvm_ll2f_rm, // llvm.nvvm.ll2f.rm (IntrinsicsNVVM.td:1713) |
| 651 | nvvm_ll2f_rn, // llvm.nvvm.ll2f.rn (IntrinsicsNVVM.td:1713) |
| 652 | nvvm_ll2f_rp, // llvm.nvvm.ll2f.rp (IntrinsicsNVVM.td:1713) |
| 653 | nvvm_ll2f_rz, // llvm.nvvm.ll2f.rz (IntrinsicsNVVM.td:1713) |
| 654 | nvvm_lohi_i2d, // llvm.nvvm.lohi.i2d (IntrinsicsNVVM.td:1678) |
| 655 | nvvm_mapa, // llvm.nvvm.mapa (IntrinsicsNVVM.td:2792) |
| 656 | nvvm_mapa_shared_cluster, // llvm.nvvm.mapa.shared.cluster (IntrinsicsNVVM.td:2794) |
| 657 | nvvm_match_all_sync_i32p, // llvm.nvvm.match.all.sync.i32p (IntrinsicsNVVM.td:2525) |
| 658 | nvvm_match_all_sync_i64p, // llvm.nvvm.match.all.sync.i64p (IntrinsicsNVVM.td:2528) |
| 659 | nvvm_match_any_sync_i32, // llvm.nvvm.match.any.sync.i32 (IntrinsicsNVVM.td:2514) |
| 660 | nvvm_match_any_sync_i64, // llvm.nvvm.match.any.sync.i64 (IntrinsicsNVVM.td:2517) |
| 661 | nvvm_mbarrier_arrive, // llvm.nvvm.mbarrier.arrive (IntrinsicsNVVM.td:2071) |
| 662 | nvvm_mbarrier_arrive_drop, // llvm.nvvm.mbarrier.arrive.drop (IntrinsicsNVVM.td:2071) |
| 663 | nvvm_mbarrier_arrive_drop_expect_tx_relaxed_scope_cluster_space_cluster, // llvm.nvvm.mbarrier.arrive.drop.expect.tx.relaxed.scope.cluster.space.cluster (IntrinsicsNVVM.td:2119) |
| 664 | nvvm_mbarrier_arrive_drop_expect_tx_relaxed_scope_cluster_space_cta, // llvm.nvvm.mbarrier.arrive.drop.expect.tx.relaxed.scope.cluster.space.cta (IntrinsicsNVVM.td:2119) |
| 665 | nvvm_mbarrier_arrive_drop_expect_tx_relaxed_scope_cta_space_cluster, // llvm.nvvm.mbarrier.arrive.drop.expect.tx.relaxed.scope.cta.space.cluster (IntrinsicsNVVM.td:2119) |
| 666 | nvvm_mbarrier_arrive_drop_expect_tx_relaxed_scope_cta_space_cta, // llvm.nvvm.mbarrier.arrive.drop.expect.tx.relaxed.scope.cta.space.cta (IntrinsicsNVVM.td:2119) |
| 667 | nvvm_mbarrier_arrive_drop_expect_tx_scope_cluster_space_cluster, // llvm.nvvm.mbarrier.arrive.drop.expect.tx.scope.cluster.space.cluster (IntrinsicsNVVM.td:2116) |
| 668 | nvvm_mbarrier_arrive_drop_expect_tx_scope_cluster_space_cta, // llvm.nvvm.mbarrier.arrive.drop.expect.tx.scope.cluster.space.cta (IntrinsicsNVVM.td:2116) |
| 669 | nvvm_mbarrier_arrive_drop_expect_tx_scope_cta_space_cluster, // llvm.nvvm.mbarrier.arrive.drop.expect.tx.scope.cta.space.cluster (IntrinsicsNVVM.td:2116) |
| 670 | nvvm_mbarrier_arrive_drop_expect_tx_scope_cta_space_cta, // llvm.nvvm.mbarrier.arrive.drop.expect.tx.scope.cta.space.cta (IntrinsicsNVVM.td:2116) |
| 671 | nvvm_mbarrier_arrive_drop_noComplete, // llvm.nvvm.mbarrier.arrive.drop.noComplete (IntrinsicsNVVM.td:2073) |
| 672 | nvvm_mbarrier_arrive_drop_noComplete_shared, // llvm.nvvm.mbarrier.arrive.drop.noComplete.shared (IntrinsicsNVVM.td:2073) |
| 673 | nvvm_mbarrier_arrive_drop_relaxed_scope_cluster_space_cluster, // llvm.nvvm.mbarrier.arrive.drop.relaxed.scope.cluster.space.cluster (IntrinsicsNVVM.td:2119) |
| 674 | nvvm_mbarrier_arrive_drop_relaxed_scope_cluster_space_cta, // llvm.nvvm.mbarrier.arrive.drop.relaxed.scope.cluster.space.cta (IntrinsicsNVVM.td:2119) |
| 675 | nvvm_mbarrier_arrive_drop_relaxed_scope_cta_space_cluster, // llvm.nvvm.mbarrier.arrive.drop.relaxed.scope.cta.space.cluster (IntrinsicsNVVM.td:2119) |
| 676 | nvvm_mbarrier_arrive_drop_relaxed_scope_cta_space_cta, // llvm.nvvm.mbarrier.arrive.drop.relaxed.scope.cta.space.cta (IntrinsicsNVVM.td:2119) |
| 677 | nvvm_mbarrier_arrive_drop_scope_cluster_space_cluster, // llvm.nvvm.mbarrier.arrive.drop.scope.cluster.space.cluster (IntrinsicsNVVM.td:2116) |
| 678 | nvvm_mbarrier_arrive_drop_scope_cluster_space_cta, // llvm.nvvm.mbarrier.arrive.drop.scope.cluster.space.cta (IntrinsicsNVVM.td:2116) |
| 679 | nvvm_mbarrier_arrive_drop_scope_cta_space_cluster, // llvm.nvvm.mbarrier.arrive.drop.scope.cta.space.cluster (IntrinsicsNVVM.td:2116) |
| 680 | nvvm_mbarrier_arrive_drop_scope_cta_space_cta, // llvm.nvvm.mbarrier.arrive.drop.scope.cta.space.cta (IntrinsicsNVVM.td:2116) |
| 681 | nvvm_mbarrier_arrive_drop_shared, // llvm.nvvm.mbarrier.arrive.drop.shared (IntrinsicsNVVM.td:2071) |
| 682 | nvvm_mbarrier_arrive_expect_tx_relaxed_scope_cluster_space_cluster, // llvm.nvvm.mbarrier.arrive.expect.tx.relaxed.scope.cluster.space.cluster (IntrinsicsNVVM.td:2119) |
| 683 | nvvm_mbarrier_arrive_expect_tx_relaxed_scope_cluster_space_cta, // llvm.nvvm.mbarrier.arrive.expect.tx.relaxed.scope.cluster.space.cta (IntrinsicsNVVM.td:2119) |
| 684 | nvvm_mbarrier_arrive_expect_tx_relaxed_scope_cta_space_cluster, // llvm.nvvm.mbarrier.arrive.expect.tx.relaxed.scope.cta.space.cluster (IntrinsicsNVVM.td:2119) |
| 685 | nvvm_mbarrier_arrive_expect_tx_relaxed_scope_cta_space_cta, // llvm.nvvm.mbarrier.arrive.expect.tx.relaxed.scope.cta.space.cta (IntrinsicsNVVM.td:2119) |
| 686 | nvvm_mbarrier_arrive_expect_tx_scope_cluster_space_cluster, // llvm.nvvm.mbarrier.arrive.expect.tx.scope.cluster.space.cluster (IntrinsicsNVVM.td:2116) |
| 687 | nvvm_mbarrier_arrive_expect_tx_scope_cluster_space_cta, // llvm.nvvm.mbarrier.arrive.expect.tx.scope.cluster.space.cta (IntrinsicsNVVM.td:2116) |
| 688 | nvvm_mbarrier_arrive_expect_tx_scope_cta_space_cluster, // llvm.nvvm.mbarrier.arrive.expect.tx.scope.cta.space.cluster (IntrinsicsNVVM.td:2116) |
| 689 | nvvm_mbarrier_arrive_expect_tx_scope_cta_space_cta, // llvm.nvvm.mbarrier.arrive.expect.tx.scope.cta.space.cta (IntrinsicsNVVM.td:2116) |
| 690 | nvvm_mbarrier_arrive_noComplete, // llvm.nvvm.mbarrier.arrive.noComplete (IntrinsicsNVVM.td:2073) |
| 691 | nvvm_mbarrier_arrive_noComplete_shared, // llvm.nvvm.mbarrier.arrive.noComplete.shared (IntrinsicsNVVM.td:2073) |
| 692 | nvvm_mbarrier_arrive_relaxed_scope_cluster_space_cluster, // llvm.nvvm.mbarrier.arrive.relaxed.scope.cluster.space.cluster (IntrinsicsNVVM.td:2119) |
| 693 | nvvm_mbarrier_arrive_relaxed_scope_cluster_space_cta, // llvm.nvvm.mbarrier.arrive.relaxed.scope.cluster.space.cta (IntrinsicsNVVM.td:2119) |
| 694 | nvvm_mbarrier_arrive_relaxed_scope_cta_space_cluster, // llvm.nvvm.mbarrier.arrive.relaxed.scope.cta.space.cluster (IntrinsicsNVVM.td:2119) |
| 695 | nvvm_mbarrier_arrive_relaxed_scope_cta_space_cta, // llvm.nvvm.mbarrier.arrive.relaxed.scope.cta.space.cta (IntrinsicsNVVM.td:2119) |
| 696 | nvvm_mbarrier_arrive_scope_cluster_space_cluster, // llvm.nvvm.mbarrier.arrive.scope.cluster.space.cluster (IntrinsicsNVVM.td:2116) |
| 697 | nvvm_mbarrier_arrive_scope_cluster_space_cta, // llvm.nvvm.mbarrier.arrive.scope.cluster.space.cta (IntrinsicsNVVM.td:2116) |
| 698 | nvvm_mbarrier_arrive_scope_cta_space_cluster, // llvm.nvvm.mbarrier.arrive.scope.cta.space.cluster (IntrinsicsNVVM.td:2116) |
| 699 | nvvm_mbarrier_arrive_scope_cta_space_cta, // llvm.nvvm.mbarrier.arrive.scope.cta.space.cta (IntrinsicsNVVM.td:2116) |
| 700 | nvvm_mbarrier_arrive_shared, // llvm.nvvm.mbarrier.arrive.shared (IntrinsicsNVVM.td:2071) |
| 701 | nvvm_mbarrier_complete_tx_scope_cluster_space_cluster, // llvm.nvvm.mbarrier.complete.tx.scope.cluster.space.cluster (IntrinsicsNVVM.td:2093) |
| 702 | nvvm_mbarrier_complete_tx_scope_cluster_space_cta, // llvm.nvvm.mbarrier.complete.tx.scope.cluster.space.cta (IntrinsicsNVVM.td:2093) |
| 703 | nvvm_mbarrier_complete_tx_scope_cta_space_cluster, // llvm.nvvm.mbarrier.complete.tx.scope.cta.space.cluster (IntrinsicsNVVM.td:2093) |
| 704 | nvvm_mbarrier_complete_tx_scope_cta_space_cta, // llvm.nvvm.mbarrier.complete.tx.scope.cta.space.cta (IntrinsicsNVVM.td:2093) |
| 705 | nvvm_mbarrier_expect_tx_scope_cluster_space_cluster, // llvm.nvvm.mbarrier.expect.tx.scope.cluster.space.cluster (IntrinsicsNVVM.td:2093) |
| 706 | nvvm_mbarrier_expect_tx_scope_cluster_space_cta, // llvm.nvvm.mbarrier.expect.tx.scope.cluster.space.cta (IntrinsicsNVVM.td:2093) |
| 707 | nvvm_mbarrier_expect_tx_scope_cta_space_cluster, // llvm.nvvm.mbarrier.expect.tx.scope.cta.space.cluster (IntrinsicsNVVM.td:2093) |
| 708 | nvvm_mbarrier_expect_tx_scope_cta_space_cta, // llvm.nvvm.mbarrier.expect.tx.scope.cta.space.cta (IntrinsicsNVVM.td:2093) |
| 709 | nvvm_mbarrier_init, // llvm.nvvm.mbarrier.init (IntrinsicsNVVM.td:2060) |
| 710 | nvvm_mbarrier_init_shared, // llvm.nvvm.mbarrier.init.shared (IntrinsicsNVVM.td:2060) |
| 711 | nvvm_mbarrier_inval, // llvm.nvvm.mbarrier.inval (IntrinsicsNVVM.td:2064) |
| 712 | nvvm_mbarrier_inval_shared, // llvm.nvvm.mbarrier.inval.shared (IntrinsicsNVVM.td:2064) |
| 713 | nvvm_mbarrier_pending_count, // llvm.nvvm.mbarrier.pending.count (IntrinsicsNVVM.td:2082) |
| 714 | nvvm_mbarrier_test_wait, // llvm.nvvm.mbarrier.test.wait (IntrinsicsNVVM.td:2077) |
| 715 | nvvm_mbarrier_test_wait_parity_relaxed_scope_cluster_space_cta, // llvm.nvvm.mbarrier.test.wait.parity.relaxed.scope.cluster.space.cta (IntrinsicsNVVM.td:2143) |
| 716 | nvvm_mbarrier_test_wait_parity_relaxed_scope_cta_space_cta, // llvm.nvvm.mbarrier.test.wait.parity.relaxed.scope.cta.space.cta (IntrinsicsNVVM.td:2143) |
| 717 | nvvm_mbarrier_test_wait_parity_scope_cluster_space_cta, // llvm.nvvm.mbarrier.test.wait.parity.scope.cluster.space.cta (IntrinsicsNVVM.td:2140) |
| 718 | nvvm_mbarrier_test_wait_parity_scope_cta_space_cta, // llvm.nvvm.mbarrier.test.wait.parity.scope.cta.space.cta (IntrinsicsNVVM.td:2140) |
| 719 | nvvm_mbarrier_test_wait_relaxed_scope_cluster_space_cta, // llvm.nvvm.mbarrier.test.wait.relaxed.scope.cluster.space.cta (IntrinsicsNVVM.td:2143) |
| 720 | nvvm_mbarrier_test_wait_relaxed_scope_cta_space_cta, // llvm.nvvm.mbarrier.test.wait.relaxed.scope.cta.space.cta (IntrinsicsNVVM.td:2143) |
| 721 | nvvm_mbarrier_test_wait_scope_cluster_space_cta, // llvm.nvvm.mbarrier.test.wait.scope.cluster.space.cta (IntrinsicsNVVM.td:2140) |
| 722 | nvvm_mbarrier_test_wait_scope_cta_space_cta, // llvm.nvvm.mbarrier.test.wait.scope.cta.space.cta (IntrinsicsNVVM.td:2140) |
| 723 | nvvm_mbarrier_test_wait_shared, // llvm.nvvm.mbarrier.test.wait.shared (IntrinsicsNVVM.td:2077) |
| 724 | nvvm_mbarrier_try_wait_parity_relaxed_scope_cluster_space_cta, // llvm.nvvm.mbarrier.try.wait.parity.relaxed.scope.cluster.space.cta (IntrinsicsNVVM.td:2143) |
| 725 | nvvm_mbarrier_try_wait_parity_relaxed_scope_cta_space_cta, // llvm.nvvm.mbarrier.try.wait.parity.relaxed.scope.cta.space.cta (IntrinsicsNVVM.td:2143) |
| 726 | nvvm_mbarrier_try_wait_parity_scope_cluster_space_cta, // llvm.nvvm.mbarrier.try.wait.parity.scope.cluster.space.cta (IntrinsicsNVVM.td:2140) |
| 727 | nvvm_mbarrier_try_wait_parity_scope_cta_space_cta, // llvm.nvvm.mbarrier.try.wait.parity.scope.cta.space.cta (IntrinsicsNVVM.td:2140) |
| 728 | nvvm_mbarrier_try_wait_parity_tl_relaxed_scope_cluster_space_cta, // llvm.nvvm.mbarrier.try.wait.parity.tl.relaxed.scope.cluster.space.cta (IntrinsicsNVVM.td:2143) |
| 729 | nvvm_mbarrier_try_wait_parity_tl_relaxed_scope_cta_space_cta, // llvm.nvvm.mbarrier.try.wait.parity.tl.relaxed.scope.cta.space.cta (IntrinsicsNVVM.td:2143) |
| 730 | nvvm_mbarrier_try_wait_parity_tl_scope_cluster_space_cta, // llvm.nvvm.mbarrier.try.wait.parity.tl.scope.cluster.space.cta (IntrinsicsNVVM.td:2140) |
| 731 | nvvm_mbarrier_try_wait_parity_tl_scope_cta_space_cta, // llvm.nvvm.mbarrier.try.wait.parity.tl.scope.cta.space.cta (IntrinsicsNVVM.td:2140) |
| 732 | nvvm_mbarrier_try_wait_relaxed_scope_cluster_space_cta, // llvm.nvvm.mbarrier.try.wait.relaxed.scope.cluster.space.cta (IntrinsicsNVVM.td:2143) |
| 733 | nvvm_mbarrier_try_wait_relaxed_scope_cta_space_cta, // llvm.nvvm.mbarrier.try.wait.relaxed.scope.cta.space.cta (IntrinsicsNVVM.td:2143) |
| 734 | nvvm_mbarrier_try_wait_scope_cluster_space_cta, // llvm.nvvm.mbarrier.try.wait.scope.cluster.space.cta (IntrinsicsNVVM.td:2140) |
| 735 | nvvm_mbarrier_try_wait_scope_cta_space_cta, // llvm.nvvm.mbarrier.try.wait.scope.cta.space.cta (IntrinsicsNVVM.td:2140) |
| 736 | nvvm_mbarrier_try_wait_tl_relaxed_scope_cluster_space_cta, // llvm.nvvm.mbarrier.try.wait.tl.relaxed.scope.cluster.space.cta (IntrinsicsNVVM.td:2143) |
| 737 | nvvm_mbarrier_try_wait_tl_relaxed_scope_cta_space_cta, // llvm.nvvm.mbarrier.try.wait.tl.relaxed.scope.cta.space.cta (IntrinsicsNVVM.td:2143) |
| 738 | nvvm_mbarrier_try_wait_tl_scope_cluster_space_cta, // llvm.nvvm.mbarrier.try.wait.tl.scope.cluster.space.cta (IntrinsicsNVVM.td:2140) |
| 739 | nvvm_mbarrier_try_wait_tl_scope_cta_space_cta, // llvm.nvvm.mbarrier.try.wait.tl.scope.cta.space.cta (IntrinsicsNVVM.td:2140) |
| 740 | nvvm_membar_cta, // llvm.nvvm.membar.cta (IntrinsicsNVVM.td:1957) |
| 741 | nvvm_membar_gl, // llvm.nvvm.membar.gl (IntrinsicsNVVM.td:1958) |
| 742 | nvvm_membar_sys, // llvm.nvvm.membar.sys (IntrinsicsNVVM.td:1959) |
| 743 | nvvm_mma_and_popc_m16n8k128_row_col_b1, // llvm.nvvm.mma.and.popc.m16n8k128.row.col.b1 (IntrinsicsNVVM.td:2636) |
| 744 | nvvm_mma_and_popc_m16n8k256_row_col_b1, // llvm.nvvm.mma.and.popc.m16n8k256.row.col.b1 (IntrinsicsNVVM.td:2636) |
| 745 | nvvm_mma_and_popc_m8n8k128_row_col_b1, // llvm.nvvm.mma.and.popc.m8n8k128.row.col.b1 (IntrinsicsNVVM.td:2636) |
| 746 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e2m1_e2m1_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e2m1.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 747 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e2m1_e2m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e2m1.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 748 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e2m1_e3m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e2m1.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 749 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e2m1_e4m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e2m1.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 750 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e2m1_e5m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e2m1.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 751 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e2m3_e2m1_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e2m3.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 752 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e2m3_e2m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e2m3.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 753 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e2m3_e3m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e2m3.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 754 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e2m3_e4m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e2m3.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 755 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e2m3_e5m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e2m3.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 756 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e3m2_e2m1_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e3m2.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 757 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e3m2_e2m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e3m2.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 758 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e3m2_e3m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e3m2.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 759 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e3m2_e4m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e3m2.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 760 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e3m2_e5m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e3m2.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 761 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e4m3_e2m1_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e4m3.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 762 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e4m3_e2m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e4m3.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 763 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e4m3_e3m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e4m3.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 764 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e4m3_e4m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e4m3.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 765 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e4m3_e5m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e4m3.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 766 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e5m2_e2m1_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e5m2.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 767 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e5m2_e2m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e5m2.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 768 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e5m2_e3m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e5m2.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 769 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e5m2_e4m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e5m2.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 770 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_f32_e5m2_e5m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.f32.e5m2.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 771 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e2m1_e2m1_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e2m1.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 772 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e2m1_e2m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e2m1.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 773 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e2m1_e3m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e2m1.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 774 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e2m1_e4m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e2m1.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 775 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e2m1_e5m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e2m1.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 776 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e2m3_e2m1_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e2m3.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 777 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e2m3_e2m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e2m3.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 778 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e2m3_e3m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e2m3.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 779 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e2m3_e4m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e2m3.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 780 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e2m3_e5m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e2m3.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 781 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e3m2_e2m1_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e3m2.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 782 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e3m2_e2m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e3m2.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 783 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e3m2_e3m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e3m2.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 784 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e3m2_e4m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e3m2.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 785 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e3m2_e5m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e3m2.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 786 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e4m3_e2m1_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e4m3.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 787 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e4m3_e2m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e4m3.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 788 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e4m3_e3m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e4m3.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 789 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e4m3_e4m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e4m3.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 790 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e4m3_e5m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e4m3.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 791 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e5m2_e2m1_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e5m2.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 792 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e5m2_e2m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e5m2.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 793 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e5m2_e3m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e5m2.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 794 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e5m2_e4m3_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e5m2.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 795 | nvvm_mma_block_scale_m16n8k32_row_col_mxf8f6f4_scale_1x_f32_e5m2_e5m2_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k32.row.col.mxf8f6f4.scale.1x.f32.e5m2.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 796 | nvvm_mma_block_scale_m16n8k64_row_col_mxf4_f32_e2m1_e2m1_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k64.row.col.mxf4.f32.e2m1.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 797 | nvvm_mma_block_scale_m16n8k64_row_col_mxf4_scale_2x_f32_e2m1_e2m1_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k64.row.col.mxf4.scale.2x.f32.e2m1.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 798 | nvvm_mma_block_scale_m16n8k64_row_col_mxf4nvf4_scale_2x_f32_e2m1_e2m1_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k64.row.col.mxf4nvf4.scale.2x.f32.e2m1.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 799 | nvvm_mma_block_scale_m16n8k64_row_col_mxf4nvf4_scale_4x_f32_e2m1_e2m1_f32_ue4m3, // llvm.nvvm.mma.block.scale.m16n8k64.row.col.mxf4nvf4.scale.4x.f32.e2m1.e2m1.f32.ue4m3 (IntrinsicsNVVM.td:2662) |
| 800 | nvvm_mma_block_scale_m16n8k64_row_col_mxf4nvf4_scale_4x_f32_e2m1_e2m1_f32_ue8m0, // llvm.nvvm.mma.block.scale.m16n8k64.row.col.mxf4nvf4.scale.4x.f32.e2m1.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2662) |
| 801 | nvvm_mma_m16n8k16_row_col_bf16, // llvm.nvvm.mma.m16n8k16.row.col.bf16 (IntrinsicsNVVM.td:2636) |
| 802 | nvvm_mma_m16n8k16_row_col_f16_e4m3_e4m3_f16, // llvm.nvvm.mma.m16n8k16.row.col.f16.e4m3.e4m3.f16 (IntrinsicsNVVM.td:2636) |
| 803 | nvvm_mma_m16n8k16_row_col_f16_e4m3_e5m2_f16, // llvm.nvvm.mma.m16n8k16.row.col.f16.e4m3.e5m2.f16 (IntrinsicsNVVM.td:2636) |
| 804 | nvvm_mma_m16n8k16_row_col_f16_e5m2_e4m3_f16, // llvm.nvvm.mma.m16n8k16.row.col.f16.e5m2.e4m3.f16 (IntrinsicsNVVM.td:2636) |
| 805 | nvvm_mma_m16n8k16_row_col_f16_e5m2_e5m2_f16, // llvm.nvvm.mma.m16n8k16.row.col.f16.e5m2.e5m2.f16 (IntrinsicsNVVM.td:2636) |
| 806 | nvvm_mma_m16n8k16_row_col_f16_f16, // llvm.nvvm.mma.m16n8k16.row.col.f16.f16 (IntrinsicsNVVM.td:2636) |
| 807 | nvvm_mma_m16n8k16_row_col_f32_e4m3_e4m3_f32, // llvm.nvvm.mma.m16n8k16.row.col.f32.e4m3.e4m3.f32 (IntrinsicsNVVM.td:2636) |
| 808 | nvvm_mma_m16n8k16_row_col_f32_e4m3_e5m2_f32, // llvm.nvvm.mma.m16n8k16.row.col.f32.e4m3.e5m2.f32 (IntrinsicsNVVM.td:2636) |
| 809 | nvvm_mma_m16n8k16_row_col_f32_e5m2_e4m3_f32, // llvm.nvvm.mma.m16n8k16.row.col.f32.e5m2.e4m3.f32 (IntrinsicsNVVM.td:2636) |
| 810 | nvvm_mma_m16n8k16_row_col_f32_e5m2_e5m2_f32, // llvm.nvvm.mma.m16n8k16.row.col.f32.e5m2.e5m2.f32 (IntrinsicsNVVM.td:2636) |
| 811 | nvvm_mma_m16n8k16_row_col_f32_f32, // llvm.nvvm.mma.m16n8k16.row.col.f32.f32 (IntrinsicsNVVM.td:2636) |
| 812 | nvvm_mma_m16n8k16_row_col_f64, // llvm.nvvm.mma.m16n8k16.row.col.f64 (IntrinsicsNVVM.td:2636) |
| 813 | nvvm_mma_m16n8k16_row_col_s8, // llvm.nvvm.mma.m16n8k16.row.col.s8 (IntrinsicsNVVM.td:2636) |
| 814 | nvvm_mma_m16n8k16_row_col_s8_u8, // llvm.nvvm.mma.m16n8k16.row.col.s8.u8 (IntrinsicsNVVM.td:2636) |
| 815 | nvvm_mma_m16n8k16_row_col_satfinite_s8, // llvm.nvvm.mma.m16n8k16.row.col.satfinite.s8 (IntrinsicsNVVM.td:2636) |
| 816 | nvvm_mma_m16n8k16_row_col_satfinite_s8_u8, // llvm.nvvm.mma.m16n8k16.row.col.satfinite.s8.u8 (IntrinsicsNVVM.td:2636) |
| 817 | nvvm_mma_m16n8k16_row_col_satfinite_u8, // llvm.nvvm.mma.m16n8k16.row.col.satfinite.u8 (IntrinsicsNVVM.td:2636) |
| 818 | nvvm_mma_m16n8k16_row_col_satfinite_u8_s8, // llvm.nvvm.mma.m16n8k16.row.col.satfinite.u8.s8 (IntrinsicsNVVM.td:2636) |
| 819 | nvvm_mma_m16n8k16_row_col_u8, // llvm.nvvm.mma.m16n8k16.row.col.u8 (IntrinsicsNVVM.td:2636) |
| 820 | nvvm_mma_m16n8k16_row_col_u8_s8, // llvm.nvvm.mma.m16n8k16.row.col.u8.s8 (IntrinsicsNVVM.td:2636) |
| 821 | nvvm_mma_m16n8k32_row_col_f16_e4m3_e4m3_f16, // llvm.nvvm.mma.m16n8k32.row.col.f16.e4m3.e4m3.f16 (IntrinsicsNVVM.td:2636) |
| 822 | nvvm_mma_m16n8k32_row_col_f16_e4m3_e5m2_f16, // llvm.nvvm.mma.m16n8k32.row.col.f16.e4m3.e5m2.f16 (IntrinsicsNVVM.td:2636) |
| 823 | nvvm_mma_m16n8k32_row_col_f16_e5m2_e4m3_f16, // llvm.nvvm.mma.m16n8k32.row.col.f16.e5m2.e4m3.f16 (IntrinsicsNVVM.td:2636) |
| 824 | nvvm_mma_m16n8k32_row_col_f16_e5m2_e5m2_f16, // llvm.nvvm.mma.m16n8k32.row.col.f16.e5m2.e5m2.f16 (IntrinsicsNVVM.td:2636) |
| 825 | nvvm_mma_m16n8k32_row_col_f32_e4m3_e4m3_f32, // llvm.nvvm.mma.m16n8k32.row.col.f32.e4m3.e4m3.f32 (IntrinsicsNVVM.td:2636) |
| 826 | nvvm_mma_m16n8k32_row_col_f32_e4m3_e5m2_f32, // llvm.nvvm.mma.m16n8k32.row.col.f32.e4m3.e5m2.f32 (IntrinsicsNVVM.td:2636) |
| 827 | nvvm_mma_m16n8k32_row_col_f32_e5m2_e4m3_f32, // llvm.nvvm.mma.m16n8k32.row.col.f32.e5m2.e4m3.f32 (IntrinsicsNVVM.td:2636) |
| 828 | nvvm_mma_m16n8k32_row_col_f32_e5m2_e5m2_f32, // llvm.nvvm.mma.m16n8k32.row.col.f32.e5m2.e5m2.f32 (IntrinsicsNVVM.td:2636) |
| 829 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e2m1_e2m1_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e2m1.e2m1.f16 (IntrinsicsNVVM.td:2636) |
| 830 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e2m1_e2m3_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e2m1.e2m3.f16 (IntrinsicsNVVM.td:2636) |
| 831 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e2m1_e3m2_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e2m1.e3m2.f16 (IntrinsicsNVVM.td:2636) |
| 832 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e2m1_e4m3_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e2m1.e4m3.f16 (IntrinsicsNVVM.td:2636) |
| 833 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e2m1_e5m2_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e2m1.e5m2.f16 (IntrinsicsNVVM.td:2636) |
| 834 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e2m3_e2m1_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e2m3.e2m1.f16 (IntrinsicsNVVM.td:2636) |
| 835 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e2m3_e2m3_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e2m3.e2m3.f16 (IntrinsicsNVVM.td:2636) |
| 836 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e2m3_e3m2_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e2m3.e3m2.f16 (IntrinsicsNVVM.td:2636) |
| 837 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e2m3_e4m3_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e2m3.e4m3.f16 (IntrinsicsNVVM.td:2636) |
| 838 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e2m3_e5m2_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e2m3.e5m2.f16 (IntrinsicsNVVM.td:2636) |
| 839 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e3m2_e2m1_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e3m2.e2m1.f16 (IntrinsicsNVVM.td:2636) |
| 840 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e3m2_e2m3_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e3m2.e2m3.f16 (IntrinsicsNVVM.td:2636) |
| 841 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e3m2_e3m2_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e3m2.e3m2.f16 (IntrinsicsNVVM.td:2636) |
| 842 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e3m2_e4m3_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e3m2.e4m3.f16 (IntrinsicsNVVM.td:2636) |
| 843 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e3m2_e5m2_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e3m2.e5m2.f16 (IntrinsicsNVVM.td:2636) |
| 844 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e4m3_e2m1_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e4m3.e2m1.f16 (IntrinsicsNVVM.td:2636) |
| 845 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e4m3_e2m3_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e4m3.e2m3.f16 (IntrinsicsNVVM.td:2636) |
| 846 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e4m3_e3m2_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e4m3.e3m2.f16 (IntrinsicsNVVM.td:2636) |
| 847 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e4m3_e4m3_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e4m3.e4m3.f16 (IntrinsicsNVVM.td:2636) |
| 848 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e4m3_e5m2_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e4m3.e5m2.f16 (IntrinsicsNVVM.td:2636) |
| 849 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e5m2_e2m1_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e5m2.e2m1.f16 (IntrinsicsNVVM.td:2636) |
| 850 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e5m2_e2m3_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e5m2.e2m3.f16 (IntrinsicsNVVM.td:2636) |
| 851 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e5m2_e3m2_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e5m2.e3m2.f16 (IntrinsicsNVVM.td:2636) |
| 852 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e5m2_e4m3_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e5m2.e4m3.f16 (IntrinsicsNVVM.td:2636) |
| 853 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f16_e5m2_e5m2_f16, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f16.e5m2.e5m2.f16 (IntrinsicsNVVM.td:2636) |
| 854 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e2m1_e2m1_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e2m1.e2m1.f32 (IntrinsicsNVVM.td:2636) |
| 855 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e2m1_e2m3_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e2m1.e2m3.f32 (IntrinsicsNVVM.td:2636) |
| 856 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e2m1_e3m2_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e2m1.e3m2.f32 (IntrinsicsNVVM.td:2636) |
| 857 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e2m1_e4m3_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e2m1.e4m3.f32 (IntrinsicsNVVM.td:2636) |
| 858 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e2m1_e5m2_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e2m1.e5m2.f32 (IntrinsicsNVVM.td:2636) |
| 859 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e2m3_e2m1_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e2m3.e2m1.f32 (IntrinsicsNVVM.td:2636) |
| 860 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e2m3_e2m3_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e2m3.e2m3.f32 (IntrinsicsNVVM.td:2636) |
| 861 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e2m3_e3m2_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e2m3.e3m2.f32 (IntrinsicsNVVM.td:2636) |
| 862 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e2m3_e4m3_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e2m3.e4m3.f32 (IntrinsicsNVVM.td:2636) |
| 863 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e2m3_e5m2_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e2m3.e5m2.f32 (IntrinsicsNVVM.td:2636) |
| 864 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e3m2_e2m1_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e3m2.e2m1.f32 (IntrinsicsNVVM.td:2636) |
| 865 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e3m2_e2m3_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e3m2.e2m3.f32 (IntrinsicsNVVM.td:2636) |
| 866 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e3m2_e3m2_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e3m2.e3m2.f32 (IntrinsicsNVVM.td:2636) |
| 867 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e3m2_e4m3_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e3m2.e4m3.f32 (IntrinsicsNVVM.td:2636) |
| 868 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e3m2_e5m2_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e3m2.e5m2.f32 (IntrinsicsNVVM.td:2636) |
| 869 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e4m3_e2m1_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e4m3.e2m1.f32 (IntrinsicsNVVM.td:2636) |
| 870 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e4m3_e2m3_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e4m3.e2m3.f32 (IntrinsicsNVVM.td:2636) |
| 871 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e4m3_e3m2_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e4m3.e3m2.f32 (IntrinsicsNVVM.td:2636) |
| 872 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e4m3_e4m3_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e4m3.e4m3.f32 (IntrinsicsNVVM.td:2636) |
| 873 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e4m3_e5m2_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e4m3.e5m2.f32 (IntrinsicsNVVM.td:2636) |
| 874 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e5m2_e2m1_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e5m2.e2m1.f32 (IntrinsicsNVVM.td:2636) |
| 875 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e5m2_e2m3_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e5m2.e2m3.f32 (IntrinsicsNVVM.td:2636) |
| 876 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e5m2_e3m2_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e5m2.e3m2.f32 (IntrinsicsNVVM.td:2636) |
| 877 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e5m2_e4m3_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e5m2.e4m3.f32 (IntrinsicsNVVM.td:2636) |
| 878 | nvvm_mma_m16n8k32_row_col_kind_f8f6f4_f32_e5m2_e5m2_f32, // llvm.nvvm.mma.m16n8k32.row.col.kind.f8f6f4.f32.e5m2.e5m2.f32 (IntrinsicsNVVM.td:2636) |
| 879 | nvvm_mma_m16n8k32_row_col_s4, // llvm.nvvm.mma.m16n8k32.row.col.s4 (IntrinsicsNVVM.td:2636) |
| 880 | nvvm_mma_m16n8k32_row_col_s4_u4, // llvm.nvvm.mma.m16n8k32.row.col.s4.u4 (IntrinsicsNVVM.td:2636) |
| 881 | nvvm_mma_m16n8k32_row_col_s8, // llvm.nvvm.mma.m16n8k32.row.col.s8 (IntrinsicsNVVM.td:2636) |
| 882 | nvvm_mma_m16n8k32_row_col_s8_u8, // llvm.nvvm.mma.m16n8k32.row.col.s8.u8 (IntrinsicsNVVM.td:2636) |
| 883 | nvvm_mma_m16n8k32_row_col_satfinite_s4, // llvm.nvvm.mma.m16n8k32.row.col.satfinite.s4 (IntrinsicsNVVM.td:2636) |
| 884 | nvvm_mma_m16n8k32_row_col_satfinite_s4_u4, // llvm.nvvm.mma.m16n8k32.row.col.satfinite.s4.u4 (IntrinsicsNVVM.td:2636) |
| 885 | nvvm_mma_m16n8k32_row_col_satfinite_s8, // llvm.nvvm.mma.m16n8k32.row.col.satfinite.s8 (IntrinsicsNVVM.td:2636) |
| 886 | nvvm_mma_m16n8k32_row_col_satfinite_s8_u8, // llvm.nvvm.mma.m16n8k32.row.col.satfinite.s8.u8 (IntrinsicsNVVM.td:2636) |
| 887 | nvvm_mma_m16n8k32_row_col_satfinite_u4, // llvm.nvvm.mma.m16n8k32.row.col.satfinite.u4 (IntrinsicsNVVM.td:2636) |
| 888 | nvvm_mma_m16n8k32_row_col_satfinite_u4_s4, // llvm.nvvm.mma.m16n8k32.row.col.satfinite.u4.s4 (IntrinsicsNVVM.td:2636) |
| 889 | nvvm_mma_m16n8k32_row_col_satfinite_u8, // llvm.nvvm.mma.m16n8k32.row.col.satfinite.u8 (IntrinsicsNVVM.td:2636) |
| 890 | nvvm_mma_m16n8k32_row_col_satfinite_u8_s8, // llvm.nvvm.mma.m16n8k32.row.col.satfinite.u8.s8 (IntrinsicsNVVM.td:2636) |
| 891 | nvvm_mma_m16n8k32_row_col_u4, // llvm.nvvm.mma.m16n8k32.row.col.u4 (IntrinsicsNVVM.td:2636) |
| 892 | nvvm_mma_m16n8k32_row_col_u4_s4, // llvm.nvvm.mma.m16n8k32.row.col.u4.s4 (IntrinsicsNVVM.td:2636) |
| 893 | nvvm_mma_m16n8k32_row_col_u8, // llvm.nvvm.mma.m16n8k32.row.col.u8 (IntrinsicsNVVM.td:2636) |
| 894 | nvvm_mma_m16n8k32_row_col_u8_s8, // llvm.nvvm.mma.m16n8k32.row.col.u8.s8 (IntrinsicsNVVM.td:2636) |
| 895 | nvvm_mma_m16n8k4_row_col_f64, // llvm.nvvm.mma.m16n8k4.row.col.f64 (IntrinsicsNVVM.td:2636) |
| 896 | nvvm_mma_m16n8k4_row_col_tf32, // llvm.nvvm.mma.m16n8k4.row.col.tf32 (IntrinsicsNVVM.td:2636) |
| 897 | nvvm_mma_m16n8k64_row_col_s4, // llvm.nvvm.mma.m16n8k64.row.col.s4 (IntrinsicsNVVM.td:2636) |
| 898 | nvvm_mma_m16n8k64_row_col_s4_u4, // llvm.nvvm.mma.m16n8k64.row.col.s4.u4 (IntrinsicsNVVM.td:2636) |
| 899 | nvvm_mma_m16n8k64_row_col_satfinite_s4, // llvm.nvvm.mma.m16n8k64.row.col.satfinite.s4 (IntrinsicsNVVM.td:2636) |
| 900 | nvvm_mma_m16n8k64_row_col_satfinite_s4_u4, // llvm.nvvm.mma.m16n8k64.row.col.satfinite.s4.u4 (IntrinsicsNVVM.td:2636) |
| 901 | nvvm_mma_m16n8k64_row_col_satfinite_u4, // llvm.nvvm.mma.m16n8k64.row.col.satfinite.u4 (IntrinsicsNVVM.td:2636) |
| 902 | nvvm_mma_m16n8k64_row_col_satfinite_u4_s4, // llvm.nvvm.mma.m16n8k64.row.col.satfinite.u4.s4 (IntrinsicsNVVM.td:2636) |
| 903 | nvvm_mma_m16n8k64_row_col_u4, // llvm.nvvm.mma.m16n8k64.row.col.u4 (IntrinsicsNVVM.td:2636) |
| 904 | nvvm_mma_m16n8k64_row_col_u4_s4, // llvm.nvvm.mma.m16n8k64.row.col.u4.s4 (IntrinsicsNVVM.td:2636) |
| 905 | nvvm_mma_m16n8k8_row_col_bf16, // llvm.nvvm.mma.m16n8k8.row.col.bf16 (IntrinsicsNVVM.td:2636) |
| 906 | nvvm_mma_m16n8k8_row_col_f16_f16, // llvm.nvvm.mma.m16n8k8.row.col.f16.f16 (IntrinsicsNVVM.td:2636) |
| 907 | nvvm_mma_m16n8k8_row_col_f32_f32, // llvm.nvvm.mma.m16n8k8.row.col.f32.f32 (IntrinsicsNVVM.td:2636) |
| 908 | nvvm_mma_m16n8k8_row_col_f64, // llvm.nvvm.mma.m16n8k8.row.col.f64 (IntrinsicsNVVM.td:2636) |
| 909 | nvvm_mma_m16n8k8_row_col_tf32, // llvm.nvvm.mma.m16n8k8.row.col.tf32 (IntrinsicsNVVM.td:2636) |
| 910 | nvvm_mma_m8n8k16_row_col_s8, // llvm.nvvm.mma.m8n8k16.row.col.s8 (IntrinsicsNVVM.td:2636) |
| 911 | nvvm_mma_m8n8k16_row_col_s8_u8, // llvm.nvvm.mma.m8n8k16.row.col.s8.u8 (IntrinsicsNVVM.td:2636) |
| 912 | nvvm_mma_m8n8k16_row_col_satfinite_s8, // llvm.nvvm.mma.m8n8k16.row.col.satfinite.s8 (IntrinsicsNVVM.td:2636) |
| 913 | nvvm_mma_m8n8k16_row_col_satfinite_s8_u8, // llvm.nvvm.mma.m8n8k16.row.col.satfinite.s8.u8 (IntrinsicsNVVM.td:2636) |
| 914 | nvvm_mma_m8n8k16_row_col_satfinite_u8, // llvm.nvvm.mma.m8n8k16.row.col.satfinite.u8 (IntrinsicsNVVM.td:2636) |
| 915 | nvvm_mma_m8n8k16_row_col_satfinite_u8_s8, // llvm.nvvm.mma.m8n8k16.row.col.satfinite.u8.s8 (IntrinsicsNVVM.td:2636) |
| 916 | nvvm_mma_m8n8k16_row_col_u8, // llvm.nvvm.mma.m8n8k16.row.col.u8 (IntrinsicsNVVM.td:2636) |
| 917 | nvvm_mma_m8n8k16_row_col_u8_s8, // llvm.nvvm.mma.m8n8k16.row.col.u8.s8 (IntrinsicsNVVM.td:2636) |
| 918 | nvvm_mma_m8n8k32_row_col_s4, // llvm.nvvm.mma.m8n8k32.row.col.s4 (IntrinsicsNVVM.td:2636) |
| 919 | nvvm_mma_m8n8k32_row_col_s4_u4, // llvm.nvvm.mma.m8n8k32.row.col.s4.u4 (IntrinsicsNVVM.td:2636) |
| 920 | nvvm_mma_m8n8k32_row_col_satfinite_s4, // llvm.nvvm.mma.m8n8k32.row.col.satfinite.s4 (IntrinsicsNVVM.td:2636) |
| 921 | nvvm_mma_m8n8k32_row_col_satfinite_s4_u4, // llvm.nvvm.mma.m8n8k32.row.col.satfinite.s4.u4 (IntrinsicsNVVM.td:2636) |
| 922 | nvvm_mma_m8n8k32_row_col_satfinite_u4, // llvm.nvvm.mma.m8n8k32.row.col.satfinite.u4 (IntrinsicsNVVM.td:2636) |
| 923 | nvvm_mma_m8n8k32_row_col_satfinite_u4_s4, // llvm.nvvm.mma.m8n8k32.row.col.satfinite.u4.s4 (IntrinsicsNVVM.td:2636) |
| 924 | nvvm_mma_m8n8k32_row_col_u4, // llvm.nvvm.mma.m8n8k32.row.col.u4 (IntrinsicsNVVM.td:2636) |
| 925 | nvvm_mma_m8n8k32_row_col_u4_s4, // llvm.nvvm.mma.m8n8k32.row.col.u4.s4 (IntrinsicsNVVM.td:2636) |
| 926 | nvvm_mma_m8n8k4_col_col_f16_f16, // llvm.nvvm.mma.m8n8k4.col.col.f16.f16 (IntrinsicsNVVM.td:2636) |
| 927 | nvvm_mma_m8n8k4_col_col_f32_f16, // llvm.nvvm.mma.m8n8k4.col.col.f32.f16 (IntrinsicsNVVM.td:2636) |
| 928 | nvvm_mma_m8n8k4_col_col_f32_f32, // llvm.nvvm.mma.m8n8k4.col.col.f32.f32 (IntrinsicsNVVM.td:2636) |
| 929 | nvvm_mma_m8n8k4_col_row_f16_f16, // llvm.nvvm.mma.m8n8k4.col.row.f16.f16 (IntrinsicsNVVM.td:2636) |
| 930 | nvvm_mma_m8n8k4_col_row_f32_f16, // llvm.nvvm.mma.m8n8k4.col.row.f32.f16 (IntrinsicsNVVM.td:2636) |
| 931 | nvvm_mma_m8n8k4_col_row_f32_f32, // llvm.nvvm.mma.m8n8k4.col.row.f32.f32 (IntrinsicsNVVM.td:2636) |
| 932 | nvvm_mma_m8n8k4_row_col_f16_f16, // llvm.nvvm.mma.m8n8k4.row.col.f16.f16 (IntrinsicsNVVM.td:2636) |
| 933 | nvvm_mma_m8n8k4_row_col_f32_f16, // llvm.nvvm.mma.m8n8k4.row.col.f32.f16 (IntrinsicsNVVM.td:2636) |
| 934 | nvvm_mma_m8n8k4_row_col_f32_f32, // llvm.nvvm.mma.m8n8k4.row.col.f32.f32 (IntrinsicsNVVM.td:2636) |
| 935 | nvvm_mma_m8n8k4_row_col_f64, // llvm.nvvm.mma.m8n8k4.row.col.f64 (IntrinsicsNVVM.td:2636) |
| 936 | nvvm_mma_m8n8k4_row_row_f16_f16, // llvm.nvvm.mma.m8n8k4.row.row.f16.f16 (IntrinsicsNVVM.td:2636) |
| 937 | nvvm_mma_m8n8k4_row_row_f32_f16, // llvm.nvvm.mma.m8n8k4.row.row.f32.f16 (IntrinsicsNVVM.td:2636) |
| 938 | nvvm_mma_m8n8k4_row_row_f32_f32, // llvm.nvvm.mma.m8n8k4.row.row.f32.f32 (IntrinsicsNVVM.td:2636) |
| 939 | nvvm_mma_sp_m16n8k128_row_col_s4, // llvm.nvvm.mma.sp.m16n8k128.row.col.s4 (IntrinsicsNVVM.td:2709) |
| 940 | nvvm_mma_sp_m16n8k128_row_col_s4_u4, // llvm.nvvm.mma.sp.m16n8k128.row.col.s4.u4 (IntrinsicsNVVM.td:2709) |
| 941 | nvvm_mma_sp_m16n8k128_row_col_satfinite_s4, // llvm.nvvm.mma.sp.m16n8k128.row.col.satfinite.s4 (IntrinsicsNVVM.td:2709) |
| 942 | nvvm_mma_sp_m16n8k128_row_col_satfinite_s4_u4, // llvm.nvvm.mma.sp.m16n8k128.row.col.satfinite.s4.u4 (IntrinsicsNVVM.td:2709) |
| 943 | nvvm_mma_sp_m16n8k128_row_col_satfinite_u4, // llvm.nvvm.mma.sp.m16n8k128.row.col.satfinite.u4 (IntrinsicsNVVM.td:2709) |
| 944 | nvvm_mma_sp_m16n8k128_row_col_satfinite_u4_s4, // llvm.nvvm.mma.sp.m16n8k128.row.col.satfinite.u4.s4 (IntrinsicsNVVM.td:2709) |
| 945 | nvvm_mma_sp_m16n8k128_row_col_u4, // llvm.nvvm.mma.sp.m16n8k128.row.col.u4 (IntrinsicsNVVM.td:2709) |
| 946 | nvvm_mma_sp_m16n8k128_row_col_u4_s4, // llvm.nvvm.mma.sp.m16n8k128.row.col.u4.s4 (IntrinsicsNVVM.td:2709) |
| 947 | nvvm_mma_sp_m16n8k16_row_col_bf16, // llvm.nvvm.mma.sp.m16n8k16.row.col.bf16 (IntrinsicsNVVM.td:2709) |
| 948 | nvvm_mma_sp_m16n8k16_row_col_f16_f16, // llvm.nvvm.mma.sp.m16n8k16.row.col.f16.f16 (IntrinsicsNVVM.td:2709) |
| 949 | nvvm_mma_sp_m16n8k16_row_col_f32_f32, // llvm.nvvm.mma.sp.m16n8k16.row.col.f32.f32 (IntrinsicsNVVM.td:2709) |
| 950 | nvvm_mma_sp_m16n8k16_row_col_tf32, // llvm.nvvm.mma.sp.m16n8k16.row.col.tf32 (IntrinsicsNVVM.td:2709) |
| 951 | nvvm_mma_sp_m16n8k32_row_col_bf16, // llvm.nvvm.mma.sp.m16n8k32.row.col.bf16 (IntrinsicsNVVM.td:2709) |
| 952 | nvvm_mma_sp_m16n8k32_row_col_f16_f16, // llvm.nvvm.mma.sp.m16n8k32.row.col.f16.f16 (IntrinsicsNVVM.td:2709) |
| 953 | nvvm_mma_sp_m16n8k32_row_col_f32_f32, // llvm.nvvm.mma.sp.m16n8k32.row.col.f32.f32 (IntrinsicsNVVM.td:2709) |
| 954 | nvvm_mma_sp_m16n8k32_row_col_s8, // llvm.nvvm.mma.sp.m16n8k32.row.col.s8 (IntrinsicsNVVM.td:2709) |
| 955 | nvvm_mma_sp_m16n8k32_row_col_s8_u8, // llvm.nvvm.mma.sp.m16n8k32.row.col.s8.u8 (IntrinsicsNVVM.td:2709) |
| 956 | nvvm_mma_sp_m16n8k32_row_col_satfinite_s8, // llvm.nvvm.mma.sp.m16n8k32.row.col.satfinite.s8 (IntrinsicsNVVM.td:2709) |
| 957 | nvvm_mma_sp_m16n8k32_row_col_satfinite_s8_u8, // llvm.nvvm.mma.sp.m16n8k32.row.col.satfinite.s8.u8 (IntrinsicsNVVM.td:2709) |
| 958 | nvvm_mma_sp_m16n8k32_row_col_satfinite_u8, // llvm.nvvm.mma.sp.m16n8k32.row.col.satfinite.u8 (IntrinsicsNVVM.td:2709) |
| 959 | nvvm_mma_sp_m16n8k32_row_col_satfinite_u8_s8, // llvm.nvvm.mma.sp.m16n8k32.row.col.satfinite.u8.s8 (IntrinsicsNVVM.td:2709) |
| 960 | nvvm_mma_sp_m16n8k32_row_col_u8, // llvm.nvvm.mma.sp.m16n8k32.row.col.u8 (IntrinsicsNVVM.td:2709) |
| 961 | nvvm_mma_sp_m16n8k32_row_col_u8_s8, // llvm.nvvm.mma.sp.m16n8k32.row.col.u8.s8 (IntrinsicsNVVM.td:2709) |
| 962 | nvvm_mma_sp_m16n8k64_row_col_f32_e4m3_e4m3_f32, // llvm.nvvm.mma.sp.m16n8k64.row.col.f32.e4m3.e4m3.f32 (IntrinsicsNVVM.td:2709) |
| 963 | nvvm_mma_sp_m16n8k64_row_col_f32_e4m3_e5m2_f32, // llvm.nvvm.mma.sp.m16n8k64.row.col.f32.e4m3.e5m2.f32 (IntrinsicsNVVM.td:2709) |
| 964 | nvvm_mma_sp_m16n8k64_row_col_f32_e5m2_e4m3_f32, // llvm.nvvm.mma.sp.m16n8k64.row.col.f32.e5m2.e4m3.f32 (IntrinsicsNVVM.td:2709) |
| 965 | nvvm_mma_sp_m16n8k64_row_col_f32_e5m2_e5m2_f32, // llvm.nvvm.mma.sp.m16n8k64.row.col.f32.e5m2.e5m2.f32 (IntrinsicsNVVM.td:2709) |
| 966 | nvvm_mma_sp_m16n8k64_row_col_s4, // llvm.nvvm.mma.sp.m16n8k64.row.col.s4 (IntrinsicsNVVM.td:2709) |
| 967 | nvvm_mma_sp_m16n8k64_row_col_s4_u4, // llvm.nvvm.mma.sp.m16n8k64.row.col.s4.u4 (IntrinsicsNVVM.td:2709) |
| 968 | nvvm_mma_sp_m16n8k64_row_col_s8, // llvm.nvvm.mma.sp.m16n8k64.row.col.s8 (IntrinsicsNVVM.td:2709) |
| 969 | nvvm_mma_sp_m16n8k64_row_col_s8_u8, // llvm.nvvm.mma.sp.m16n8k64.row.col.s8.u8 (IntrinsicsNVVM.td:2709) |
| 970 | nvvm_mma_sp_m16n8k64_row_col_satfinite_s4, // llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.s4 (IntrinsicsNVVM.td:2709) |
| 971 | nvvm_mma_sp_m16n8k64_row_col_satfinite_s4_u4, // llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.s4.u4 (IntrinsicsNVVM.td:2709) |
| 972 | nvvm_mma_sp_m16n8k64_row_col_satfinite_s8, // llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.s8 (IntrinsicsNVVM.td:2709) |
| 973 | nvvm_mma_sp_m16n8k64_row_col_satfinite_s8_u8, // llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.s8.u8 (IntrinsicsNVVM.td:2709) |
| 974 | nvvm_mma_sp_m16n8k64_row_col_satfinite_u4, // llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.u4 (IntrinsicsNVVM.td:2709) |
| 975 | nvvm_mma_sp_m16n8k64_row_col_satfinite_u4_s4, // llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.u4.s4 (IntrinsicsNVVM.td:2709) |
| 976 | nvvm_mma_sp_m16n8k64_row_col_satfinite_u8, // llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.u8 (IntrinsicsNVVM.td:2709) |
| 977 | nvvm_mma_sp_m16n8k64_row_col_satfinite_u8_s8, // llvm.nvvm.mma.sp.m16n8k64.row.col.satfinite.u8.s8 (IntrinsicsNVVM.td:2709) |
| 978 | nvvm_mma_sp_m16n8k64_row_col_u4, // llvm.nvvm.mma.sp.m16n8k64.row.col.u4 (IntrinsicsNVVM.td:2709) |
| 979 | nvvm_mma_sp_m16n8k64_row_col_u4_s4, // llvm.nvvm.mma.sp.m16n8k64.row.col.u4.s4 (IntrinsicsNVVM.td:2709) |
| 980 | nvvm_mma_sp_m16n8k64_row_col_u8, // llvm.nvvm.mma.sp.m16n8k64.row.col.u8 (IntrinsicsNVVM.td:2709) |
| 981 | nvvm_mma_sp_m16n8k64_row_col_u8_s8, // llvm.nvvm.mma.sp.m16n8k64.row.col.u8.s8 (IntrinsicsNVVM.td:2709) |
| 982 | nvvm_mma_sp_m16n8k8_row_col_tf32, // llvm.nvvm.mma.sp.m16n8k8.row.col.tf32 (IntrinsicsNVVM.td:2709) |
| 983 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k128_row_col_mxf4_f32_e2m1_e2m1_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k128.row.col.mxf4.f32.e2m1.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 984 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k128_row_col_mxf4_scale_2x_f32_e2m1_e2m1_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k128.row.col.mxf4.scale.2x.f32.e2m1.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 985 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k128_row_col_mxf4nvf4_scale_2x_f32_e2m1_e2m1_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k128.row.col.mxf4nvf4.scale.2x.f32.e2m1.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 986 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k128_row_col_mxf4nvf4_scale_4x_f32_e2m1_e2m1_f32_ue4m3, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k128.row.col.mxf4nvf4.scale.4x.f32.e2m1.e2m1.f32.ue4m3 (IntrinsicsNVVM.td:2748) |
| 987 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k128_row_col_mxf4nvf4_scale_4x_f32_e2m1_e2m1_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k128.row.col.mxf4nvf4.scale.4x.f32.e2m1.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 988 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e2m1_e2m1_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e2m1.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 989 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e2m1_e2m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e2m1.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 990 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e2m1_e3m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e2m1.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 991 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e2m1_e4m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e2m1.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 992 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e2m1_e5m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e2m1.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 993 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e2m3_e2m1_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e2m3.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 994 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e2m3_e2m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e2m3.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 995 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e2m3_e3m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e2m3.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 996 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e2m3_e4m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e2m3.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 997 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e2m3_e5m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e2m3.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 998 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e3m2_e2m1_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e3m2.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 999 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e3m2_e2m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e3m2.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1000 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e3m2_e3m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e3m2.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1001 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e3m2_e4m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e3m2.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1002 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e3m2_e5m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e3m2.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1003 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e4m3_e2m1_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e4m3.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1004 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e4m3_e2m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e4m3.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1005 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e4m3_e3m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e4m3.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1006 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e4m3_e4m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e4m3.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1007 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e4m3_e5m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e4m3.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1008 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e5m2_e2m1_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e5m2.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1009 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e5m2_e2m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e5m2.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1010 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e5m2_e3m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e5m2.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1011 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e5m2_e4m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e5m2.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1012 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_f32_e5m2_e5m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.f32.e5m2.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1013 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e2m1_e2m1_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e2m1.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1014 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e2m1_e2m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e2m1.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1015 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e2m1_e3m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e2m1.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1016 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e2m1_e4m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e2m1.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1017 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e2m1_e5m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e2m1.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1018 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e2m3_e2m1_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e2m3.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1019 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e2m3_e2m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e2m3.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1020 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e2m3_e3m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e2m3.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1021 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e2m3_e4m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e2m3.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1022 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e2m3_e5m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e2m3.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1023 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e3m2_e2m1_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e3m2.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1024 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e3m2_e2m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e3m2.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1025 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e3m2_e3m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e3m2.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1026 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e3m2_e4m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e3m2.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1027 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e3m2_e5m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e3m2.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1028 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e4m3_e2m1_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e4m3.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1029 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e4m3_e2m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e4m3.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1030 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e4m3_e3m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e4m3.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1031 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e4m3_e4m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e4m3.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1032 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e4m3_e5m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e4m3.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1033 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e5m2_e2m1_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e5m2.e2m1.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1034 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e5m2_e2m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e5m2.e2m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1035 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e5m2_e3m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e5m2.e3m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1036 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e5m2_e4m3_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e5m2.e4m3.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1037 | nvvm_mma_sp_ordered_metadata_block_scale_m16n8k64_row_col_mxf8f6f4_scale_1x_f32_e5m2_e5m2_f32_ue8m0, // llvm.nvvm.mma.sp.ordered.metadata.block.scale.m16n8k64.row.col.mxf8f6f4.scale.1x.f32.e5m2.e5m2.f32.ue8m0 (IntrinsicsNVVM.td:2748) |
| 1038 | nvvm_mma_sp_ordered_metadata_m16n8k128_row_col_s4, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k128.row.col.s4 (IntrinsicsNVVM.td:2709) |
| 1039 | nvvm_mma_sp_ordered_metadata_m16n8k128_row_col_s4_u4, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k128.row.col.s4.u4 (IntrinsicsNVVM.td:2709) |
| 1040 | nvvm_mma_sp_ordered_metadata_m16n8k128_row_col_satfinite_s4, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k128.row.col.satfinite.s4 (IntrinsicsNVVM.td:2709) |
| 1041 | nvvm_mma_sp_ordered_metadata_m16n8k128_row_col_satfinite_s4_u4, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k128.row.col.satfinite.s4.u4 (IntrinsicsNVVM.td:2709) |
| 1042 | nvvm_mma_sp_ordered_metadata_m16n8k128_row_col_satfinite_u4, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k128.row.col.satfinite.u4 (IntrinsicsNVVM.td:2709) |
| 1043 | nvvm_mma_sp_ordered_metadata_m16n8k128_row_col_satfinite_u4_s4, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k128.row.col.satfinite.u4.s4 (IntrinsicsNVVM.td:2709) |
| 1044 | nvvm_mma_sp_ordered_metadata_m16n8k128_row_col_u4, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k128.row.col.u4 (IntrinsicsNVVM.td:2709) |
| 1045 | nvvm_mma_sp_ordered_metadata_m16n8k128_row_col_u4_s4, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k128.row.col.u4.s4 (IntrinsicsNVVM.td:2709) |
| 1046 | nvvm_mma_sp_ordered_metadata_m16n8k16_row_col_bf16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k16.row.col.bf16 (IntrinsicsNVVM.td:2709) |
| 1047 | nvvm_mma_sp_ordered_metadata_m16n8k16_row_col_f16_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k16.row.col.f16.f16 (IntrinsicsNVVM.td:2709) |
| 1048 | nvvm_mma_sp_ordered_metadata_m16n8k16_row_col_f32_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k16.row.col.f32.f32 (IntrinsicsNVVM.td:2709) |
| 1049 | nvvm_mma_sp_ordered_metadata_m16n8k16_row_col_tf32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k16.row.col.tf32 (IntrinsicsNVVM.td:2709) |
| 1050 | nvvm_mma_sp_ordered_metadata_m16n8k32_row_col_bf16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k32.row.col.bf16 (IntrinsicsNVVM.td:2709) |
| 1051 | nvvm_mma_sp_ordered_metadata_m16n8k32_row_col_f16_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k32.row.col.f16.f16 (IntrinsicsNVVM.td:2709) |
| 1052 | nvvm_mma_sp_ordered_metadata_m16n8k32_row_col_f32_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k32.row.col.f32.f32 (IntrinsicsNVVM.td:2709) |
| 1053 | nvvm_mma_sp_ordered_metadata_m16n8k32_row_col_s8, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k32.row.col.s8 (IntrinsicsNVVM.td:2709) |
| 1054 | nvvm_mma_sp_ordered_metadata_m16n8k32_row_col_s8_u8, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k32.row.col.s8.u8 (IntrinsicsNVVM.td:2709) |
| 1055 | nvvm_mma_sp_ordered_metadata_m16n8k32_row_col_satfinite_s8, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k32.row.col.satfinite.s8 (IntrinsicsNVVM.td:2709) |
| 1056 | nvvm_mma_sp_ordered_metadata_m16n8k32_row_col_satfinite_s8_u8, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k32.row.col.satfinite.s8.u8 (IntrinsicsNVVM.td:2709) |
| 1057 | nvvm_mma_sp_ordered_metadata_m16n8k32_row_col_satfinite_u8, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k32.row.col.satfinite.u8 (IntrinsicsNVVM.td:2709) |
| 1058 | nvvm_mma_sp_ordered_metadata_m16n8k32_row_col_satfinite_u8_s8, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k32.row.col.satfinite.u8.s8 (IntrinsicsNVVM.td:2709) |
| 1059 | nvvm_mma_sp_ordered_metadata_m16n8k32_row_col_u8, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k32.row.col.u8 (IntrinsicsNVVM.td:2709) |
| 1060 | nvvm_mma_sp_ordered_metadata_m16n8k32_row_col_u8_s8, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k32.row.col.u8.s8 (IntrinsicsNVVM.td:2709) |
| 1061 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_f32_e4m3_e4m3_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.f32.e4m3.e4m3.f32 (IntrinsicsNVVM.td:2709) |
| 1062 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_f32_e4m3_e5m2_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.f32.e4m3.e5m2.f32 (IntrinsicsNVVM.td:2709) |
| 1063 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_f32_e5m2_e4m3_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.f32.e5m2.e4m3.f32 (IntrinsicsNVVM.td:2709) |
| 1064 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_f32_e5m2_e5m2_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.f32.e5m2.e5m2.f32 (IntrinsicsNVVM.td:2709) |
| 1065 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e2m1_e2m1_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e2m1.e2m1.f16 (IntrinsicsNVVM.td:2709) |
| 1066 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e2m1_e2m3_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e2m1.e2m3.f16 (IntrinsicsNVVM.td:2709) |
| 1067 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e2m1_e3m2_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e2m1.e3m2.f16 (IntrinsicsNVVM.td:2709) |
| 1068 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e2m1_e4m3_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e2m1.e4m3.f16 (IntrinsicsNVVM.td:2709) |
| 1069 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e2m1_e5m2_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e2m1.e5m2.f16 (IntrinsicsNVVM.td:2709) |
| 1070 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e2m3_e2m1_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e2m3.e2m1.f16 (IntrinsicsNVVM.td:2709) |
| 1071 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e2m3_e2m3_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e2m3.e2m3.f16 (IntrinsicsNVVM.td:2709) |
| 1072 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e2m3_e3m2_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e2m3.e3m2.f16 (IntrinsicsNVVM.td:2709) |
| 1073 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e2m3_e4m3_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e2m3.e4m3.f16 (IntrinsicsNVVM.td:2709) |
| 1074 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e2m3_e5m2_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e2m3.e5m2.f16 (IntrinsicsNVVM.td:2709) |
| 1075 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e3m2_e2m1_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e3m2.e2m1.f16 (IntrinsicsNVVM.td:2709) |
| 1076 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e3m2_e2m3_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e3m2.e2m3.f16 (IntrinsicsNVVM.td:2709) |
| 1077 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e3m2_e3m2_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e3m2.e3m2.f16 (IntrinsicsNVVM.td:2709) |
| 1078 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e3m2_e4m3_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e3m2.e4m3.f16 (IntrinsicsNVVM.td:2709) |
| 1079 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e3m2_e5m2_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e3m2.e5m2.f16 (IntrinsicsNVVM.td:2709) |
| 1080 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e4m3_e2m1_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e4m3.e2m1.f16 (IntrinsicsNVVM.td:2709) |
| 1081 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e4m3_e2m3_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e4m3.e2m3.f16 (IntrinsicsNVVM.td:2709) |
| 1082 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e4m3_e3m2_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e4m3.e3m2.f16 (IntrinsicsNVVM.td:2709) |
| 1083 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e4m3_e4m3_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e4m3.e4m3.f16 (IntrinsicsNVVM.td:2709) |
| 1084 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e4m3_e5m2_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e4m3.e5m2.f16 (IntrinsicsNVVM.td:2709) |
| 1085 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e5m2_e2m1_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e5m2.e2m1.f16 (IntrinsicsNVVM.td:2709) |
| 1086 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e5m2_e2m3_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e5m2.e2m3.f16 (IntrinsicsNVVM.td:2709) |
| 1087 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e5m2_e3m2_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e5m2.e3m2.f16 (IntrinsicsNVVM.td:2709) |
| 1088 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e5m2_e4m3_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e5m2.e4m3.f16 (IntrinsicsNVVM.td:2709) |
| 1089 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f16_e5m2_e5m2_f16, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f16.e5m2.e5m2.f16 (IntrinsicsNVVM.td:2709) |
| 1090 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e2m1_e2m1_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e2m1.e2m1.f32 (IntrinsicsNVVM.td:2709) |
| 1091 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e2m1_e2m3_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e2m1.e2m3.f32 (IntrinsicsNVVM.td:2709) |
| 1092 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e2m1_e3m2_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e2m1.e3m2.f32 (IntrinsicsNVVM.td:2709) |
| 1093 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e2m1_e4m3_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e2m1.e4m3.f32 (IntrinsicsNVVM.td:2709) |
| 1094 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e2m1_e5m2_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e2m1.e5m2.f32 (IntrinsicsNVVM.td:2709) |
| 1095 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e2m3_e2m1_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e2m3.e2m1.f32 (IntrinsicsNVVM.td:2709) |
| 1096 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e2m3_e2m3_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e2m3.e2m3.f32 (IntrinsicsNVVM.td:2709) |
| 1097 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e2m3_e3m2_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e2m3.e3m2.f32 (IntrinsicsNVVM.td:2709) |
| 1098 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e2m3_e4m3_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e2m3.e4m3.f32 (IntrinsicsNVVM.td:2709) |
| 1099 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e2m3_e5m2_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e2m3.e5m2.f32 (IntrinsicsNVVM.td:2709) |
| 1100 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e3m2_e2m1_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e3m2.e2m1.f32 (IntrinsicsNVVM.td:2709) |
| 1101 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e3m2_e2m3_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e3m2.e2m3.f32 (IntrinsicsNVVM.td:2709) |
| 1102 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e3m2_e3m2_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e3m2.e3m2.f32 (IntrinsicsNVVM.td:2709) |
| 1103 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e3m2_e4m3_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e3m2.e4m3.f32 (IntrinsicsNVVM.td:2709) |
| 1104 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e3m2_e5m2_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e3m2.e5m2.f32 (IntrinsicsNVVM.td:2709) |
| 1105 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e4m3_e2m1_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e4m3.e2m1.f32 (IntrinsicsNVVM.td:2709) |
| 1106 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e4m3_e2m3_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e4m3.e2m3.f32 (IntrinsicsNVVM.td:2709) |
| 1107 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e4m3_e3m2_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e4m3.e3m2.f32 (IntrinsicsNVVM.td:2709) |
| 1108 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e4m3_e4m3_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e4m3.e4m3.f32 (IntrinsicsNVVM.td:2709) |
| 1109 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e4m3_e5m2_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e4m3.e5m2.f32 (IntrinsicsNVVM.td:2709) |
| 1110 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e5m2_e2m1_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e5m2.e2m1.f32 (IntrinsicsNVVM.td:2709) |
| 1111 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e5m2_e2m3_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e5m2.e2m3.f32 (IntrinsicsNVVM.td:2709) |
| 1112 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e5m2_e3m2_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e5m2.e3m2.f32 (IntrinsicsNVVM.td:2709) |
| 1113 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e5m2_e4m3_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e5m2.e4m3.f32 (IntrinsicsNVVM.td:2709) |
| 1114 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_kind_f8f6f4_f32_e5m2_e5m2_f32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.kind.f8f6f4.f32.e5m2.e5m2.f32 (IntrinsicsNVVM.td:2709) |
| 1115 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_s4, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.s4 (IntrinsicsNVVM.td:2709) |
| 1116 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_s4_u4, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.s4.u4 (IntrinsicsNVVM.td:2709) |
| 1117 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_s8, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.s8 (IntrinsicsNVVM.td:2709) |
| 1118 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_s8_u8, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.s8.u8 (IntrinsicsNVVM.td:2709) |
| 1119 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_satfinite_s4, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.satfinite.s4 (IntrinsicsNVVM.td:2709) |
| 1120 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_satfinite_s4_u4, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.satfinite.s4.u4 (IntrinsicsNVVM.td:2709) |
| 1121 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_satfinite_s8, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.satfinite.s8 (IntrinsicsNVVM.td:2709) |
| 1122 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_satfinite_s8_u8, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.satfinite.s8.u8 (IntrinsicsNVVM.td:2709) |
| 1123 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_satfinite_u4, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.satfinite.u4 (IntrinsicsNVVM.td:2709) |
| 1124 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_satfinite_u4_s4, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.satfinite.u4.s4 (IntrinsicsNVVM.td:2709) |
| 1125 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_satfinite_u8, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.satfinite.u8 (IntrinsicsNVVM.td:2709) |
| 1126 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_satfinite_u8_s8, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.satfinite.u8.s8 (IntrinsicsNVVM.td:2709) |
| 1127 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_u4, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.u4 (IntrinsicsNVVM.td:2709) |
| 1128 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_u4_s4, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.u4.s4 (IntrinsicsNVVM.td:2709) |
| 1129 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_u8, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.u8 (IntrinsicsNVVM.td:2709) |
| 1130 | nvvm_mma_sp_ordered_metadata_m16n8k64_row_col_u8_s8, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k64.row.col.u8.s8 (IntrinsicsNVVM.td:2709) |
| 1131 | nvvm_mma_sp_ordered_metadata_m16n8k8_row_col_tf32, // llvm.nvvm.mma.sp.ordered.metadata.m16n8k8.row.col.tf32 (IntrinsicsNVVM.td:2709) |
| 1132 | nvvm_mma_xor_popc_m16n8k128_row_col_b1, // llvm.nvvm.mma.xor.popc.m16n8k128.row.col.b1 (IntrinsicsNVVM.td:2636) |
| 1133 | nvvm_mma_xor_popc_m16n8k256_row_col_b1, // llvm.nvvm.mma.xor.popc.m16n8k256.row.col.b1 (IntrinsicsNVVM.td:2636) |
| 1134 | nvvm_mma_xor_popc_m8n8k128_row_col_b1, // llvm.nvvm.mma.xor.popc.m8n8k128.row.col.b1 (IntrinsicsNVVM.td:2636) |
| 1135 | nvvm_move_double, // llvm.nvvm.move.double (IntrinsicsNVVM.td:2182) |
| 1136 | nvvm_move_float, // llvm.nvvm.move.float (IntrinsicsNVVM.td:2181) |
| 1137 | nvvm_move_i16, // llvm.nvvm.move.i16 (IntrinsicsNVVM.td:2178) |
| 1138 | nvvm_move_i32, // llvm.nvvm.move.i32 (IntrinsicsNVVM.td:2179) |
| 1139 | nvvm_move_i64, // llvm.nvvm.move.i64 (IntrinsicsNVVM.td:2180) |
| 1140 | nvvm_move_ptr, // llvm.nvvm.move.ptr (IntrinsicsNVVM.td:2183) |
| 1141 | nvvm_mul_rm_d, // llvm.nvvm.mul.rm.d (IntrinsicsNVVM.td:1367) |
| 1142 | nvvm_mul_rm_f, // llvm.nvvm.mul.rm.f (IntrinsicsNVVM.td:1364) |
| 1143 | nvvm_mul_rm_ftz_f, // llvm.nvvm.mul.rm.ftz.f (IntrinsicsNVVM.td:1364) |
| 1144 | nvvm_mul_rn_d, // llvm.nvvm.mul.rn.d (IntrinsicsNVVM.td:1367) |
| 1145 | nvvm_mul_rn_f, // llvm.nvvm.mul.rn.f (IntrinsicsNVVM.td:1364) |
| 1146 | nvvm_mul_rn_ftz_f, // llvm.nvvm.mul.rn.ftz.f (IntrinsicsNVVM.td:1364) |
| 1147 | nvvm_mul_rn_ftz_sat_f16, // llvm.nvvm.mul.rn.ftz.sat.f16 (IntrinsicsNVVM.td:1372) |
| 1148 | nvvm_mul_rn_ftz_sat_v2f16, // llvm.nvvm.mul.rn.ftz.sat.v2f16 (IntrinsicsNVVM.td:1375) |
| 1149 | nvvm_mul_rn_sat_f16, // llvm.nvvm.mul.rn.sat.f16 (IntrinsicsNVVM.td:1372) |
| 1150 | nvvm_mul_rn_sat_v2f16, // llvm.nvvm.mul.rn.sat.v2f16 (IntrinsicsNVVM.td:1375) |
| 1151 | nvvm_mul_rp_d, // llvm.nvvm.mul.rp.d (IntrinsicsNVVM.td:1367) |
| 1152 | nvvm_mul_rp_f, // llvm.nvvm.mul.rp.f (IntrinsicsNVVM.td:1364) |
| 1153 | nvvm_mul_rp_ftz_f, // llvm.nvvm.mul.rp.ftz.f (IntrinsicsNVVM.td:1364) |
| 1154 | nvvm_mul_rz_d, // llvm.nvvm.mul.rz.d (IntrinsicsNVVM.td:1367) |
| 1155 | nvvm_mul_rz_f, // llvm.nvvm.mul.rz.f (IntrinsicsNVVM.td:1364) |
| 1156 | nvvm_mul_rz_ftz_f, // llvm.nvvm.mul.rz.ftz.f (IntrinsicsNVVM.td:1364) |
| 1157 | nvvm_mul24_i, // llvm.nvvm.mul24.i (IntrinsicsNVVM.td:1358) |
| 1158 | nvvm_mul24_ui, // llvm.nvvm.mul24.ui (IntrinsicsNVVM.td:1358) |
| 1159 | nvvm_mulhi_i, // llvm.nvvm.mulhi.i (IntrinsicsNVVM.td:1352) |
| 1160 | nvvm_mulhi_ll, // llvm.nvvm.mulhi.ll (IntrinsicsNVVM.td:1355) |
| 1161 | nvvm_mulhi_s, // llvm.nvvm.mulhi.s (IntrinsicsNVVM.td:1349) |
| 1162 | nvvm_mulhi_ui, // llvm.nvvm.mulhi.ui (IntrinsicsNVVM.td:1352) |
| 1163 | nvvm_mulhi_ull, // llvm.nvvm.mulhi.ull (IntrinsicsNVVM.td:1355) |
| 1164 | nvvm_mulhi_us, // llvm.nvvm.mulhi.us (IntrinsicsNVVM.td:1349) |
| 1165 | nvvm_nanosleep, // llvm.nvvm.nanosleep (IntrinsicsNVVM.td:1300) |
| 1166 | nvvm_neg_bf16, // llvm.nvvm.neg.bf16 (IntrinsicsNVVM.td:1437) |
| 1167 | nvvm_neg_bf16x2, // llvm.nvvm.neg.bf16x2 (IntrinsicsNVVM.td:1439) |
| 1168 | nvvm_pm_event_mask, // llvm.nvvm.pm.event.mask (IntrinsicsNVVM.td:1307) |
| 1169 | nvvm_prefetch_L1, // llvm.nvvm.prefetch.L1 (IntrinsicsNVVM.td:2969) |
| 1170 | nvvm_prefetch_L2, // llvm.nvvm.prefetch.L2 (IntrinsicsNVVM.td:2969) |
| 1171 | nvvm_prefetch_global_L1, // llvm.nvvm.prefetch.global.L1 (IntrinsicsNVVM.td:2970) |
| 1172 | nvvm_prefetch_global_L2, // llvm.nvvm.prefetch.global.L2 (IntrinsicsNVVM.td:2970) |
| 1173 | nvvm_prefetch_global_L2_evict_last, // llvm.nvvm.prefetch.global.L2.evict.last (IntrinsicsNVVM.td:2977) |
| 1174 | nvvm_prefetch_global_L2_evict_normal, // llvm.nvvm.prefetch.global.L2.evict.normal (IntrinsicsNVVM.td:2977) |
| 1175 | nvvm_prefetch_local_L1, // llvm.nvvm.prefetch.local.L1 (IntrinsicsNVVM.td:2971) |
| 1176 | nvvm_prefetch_local_L2, // llvm.nvvm.prefetch.local.L2 (IntrinsicsNVVM.td:2971) |
| 1177 | nvvm_prefetch_tensormap, // llvm.nvvm.prefetch.tensormap (IntrinsicsNVVM.td:2974) |
| 1178 | nvvm_prefetchu_L1, // llvm.nvvm.prefetchu.L1 (IntrinsicsNVVM.td:2979) |
| 1179 | nvvm_prmt, // llvm.nvvm.prmt (IntrinsicsNVVM.td:1283) |
| 1180 | nvvm_prmt_b4e, // llvm.nvvm.prmt.b4e (IntrinsicsNVVM.td:1287) |
| 1181 | nvvm_prmt_ecl, // llvm.nvvm.prmt.ecl (IntrinsicsNVVM.td:1294) |
| 1182 | nvvm_prmt_ecr, // llvm.nvvm.prmt.ecr (IntrinsicsNVVM.td:1294) |
| 1183 | nvvm_prmt_f4e, // llvm.nvvm.prmt.f4e (IntrinsicsNVVM.td:1287) |
| 1184 | nvvm_prmt_rc16, // llvm.nvvm.prmt.rc16 (IntrinsicsNVVM.td:1294) |
| 1185 | nvvm_prmt_rc8, // llvm.nvvm.prmt.rc8 (IntrinsicsNVVM.td:1294) |
| 1186 | nvvm_rcp_approx_ftz_d, // llvm.nvvm.rcp.approx.ftz.d (IntrinsicsNVVM.td:1555) |
| 1187 | nvvm_rcp_approx_ftz_f, // llvm.nvvm.rcp.approx.ftz.f (IntrinsicsNVVM.td:1553) |
| 1188 | nvvm_rcp_rm_d, // llvm.nvvm.rcp.rm.d (IntrinsicsNVVM.td:1549) |
| 1189 | nvvm_rcp_rm_f, // llvm.nvvm.rcp.rm.f (IntrinsicsNVVM.td:1546) |
| 1190 | nvvm_rcp_rm_ftz_f, // llvm.nvvm.rcp.rm.ftz.f (IntrinsicsNVVM.td:1546) |
| 1191 | nvvm_rcp_rn_d, // llvm.nvvm.rcp.rn.d (IntrinsicsNVVM.td:1549) |
| 1192 | nvvm_rcp_rn_f, // llvm.nvvm.rcp.rn.f (IntrinsicsNVVM.td:1546) |
| 1193 | nvvm_rcp_rn_ftz_f, // llvm.nvvm.rcp.rn.ftz.f (IntrinsicsNVVM.td:1546) |
| 1194 | nvvm_rcp_rp_d, // llvm.nvvm.rcp.rp.d (IntrinsicsNVVM.td:1549) |
| 1195 | nvvm_rcp_rp_f, // llvm.nvvm.rcp.rp.f (IntrinsicsNVVM.td:1546) |
| 1196 | nvvm_rcp_rp_ftz_f, // llvm.nvvm.rcp.rp.ftz.f (IntrinsicsNVVM.td:1546) |
| 1197 | nvvm_rcp_rz_d, // llvm.nvvm.rcp.rz.d (IntrinsicsNVVM.td:1549) |
| 1198 | nvvm_rcp_rz_f, // llvm.nvvm.rcp.rz.f (IntrinsicsNVVM.td:1546) |
| 1199 | nvvm_rcp_rz_ftz_f, // llvm.nvvm.rcp.rz.ftz.f (IntrinsicsNVVM.td:1546) |
| 1200 | nvvm_read_ptx_sreg_aggr_smem_size, // llvm.nvvm.read.ptx.sreg.aggr_smem_size (IntrinsicsNVVM.td:2457) |
| 1201 | nvvm_read_ptx_sreg_clock, // llvm.nvvm.read.ptx.sreg.clock (IntrinsicsNVVM.td:2425) |
| 1202 | nvvm_read_ptx_sreg_clock64, // llvm.nvvm.read.ptx.sreg.clock64 (IntrinsicsNVVM.td:2426) |
| 1203 | nvvm_read_ptx_sreg_cluster_ctaid_w, // llvm.nvvm.read.ptx.sreg.cluster.ctaid.w (IntrinsicsNVVM.td:2373) |
| 1204 | nvvm_read_ptx_sreg_cluster_ctaid_x, // llvm.nvvm.read.ptx.sreg.cluster.ctaid.x (IntrinsicsNVVM.td:2373) |
| 1205 | nvvm_read_ptx_sreg_cluster_ctaid_y, // llvm.nvvm.read.ptx.sreg.cluster.ctaid.y (IntrinsicsNVVM.td:2373) |
| 1206 | nvvm_read_ptx_sreg_cluster_ctaid_z, // llvm.nvvm.read.ptx.sreg.cluster.ctaid.z (IntrinsicsNVVM.td:2373) |
| 1207 | nvvm_read_ptx_sreg_cluster_ctarank, // llvm.nvvm.read.ptx.sreg.cluster.ctarank (IntrinsicsNVVM.td:2452) |
| 1208 | nvvm_read_ptx_sreg_cluster_nctaid_w, // llvm.nvvm.read.ptx.sreg.cluster.nctaid.w (IntrinsicsNVVM.td:2373) |
| 1209 | nvvm_read_ptx_sreg_cluster_nctaid_x, // llvm.nvvm.read.ptx.sreg.cluster.nctaid.x (IntrinsicsNVVM.td:2373) |
| 1210 | nvvm_read_ptx_sreg_cluster_nctaid_y, // llvm.nvvm.read.ptx.sreg.cluster.nctaid.y (IntrinsicsNVVM.td:2373) |
| 1211 | nvvm_read_ptx_sreg_cluster_nctaid_z, // llvm.nvvm.read.ptx.sreg.cluster.nctaid.z (IntrinsicsNVVM.td:2373) |
| 1212 | nvvm_read_ptx_sreg_cluster_nctarank, // llvm.nvvm.read.ptx.sreg.cluster.nctarank (IntrinsicsNVVM.td:2453) |
| 1213 | nvvm_read_ptx_sreg_clusterid_w, // llvm.nvvm.read.ptx.sreg.clusterid.w (IntrinsicsNVVM.td:2373) |
| 1214 | nvvm_read_ptx_sreg_clusterid_x, // llvm.nvvm.read.ptx.sreg.clusterid.x (IntrinsicsNVVM.td:2373) |
| 1215 | nvvm_read_ptx_sreg_clusterid_y, // llvm.nvvm.read.ptx.sreg.clusterid.y (IntrinsicsNVVM.td:2373) |
| 1216 | nvvm_read_ptx_sreg_clusterid_z, // llvm.nvvm.read.ptx.sreg.clusterid.z (IntrinsicsNVVM.td:2373) |
| 1217 | nvvm_read_ptx_sreg_ctaid_w, // llvm.nvvm.read.ptx.sreg.ctaid.w (IntrinsicsNVVM.td:2364) |
| 1218 | nvvm_read_ptx_sreg_ctaid_x, // llvm.nvvm.read.ptx.sreg.ctaid.x (IntrinsicsNVVM.td:2364) |
| 1219 | nvvm_read_ptx_sreg_ctaid_y, // llvm.nvvm.read.ptx.sreg.ctaid.y (IntrinsicsNVVM.td:2364) |
| 1220 | nvvm_read_ptx_sreg_ctaid_z, // llvm.nvvm.read.ptx.sreg.ctaid.z (IntrinsicsNVVM.td:2364) |
| 1221 | nvvm_read_ptx_sreg_dynamic_smem_size, // llvm.nvvm.read.ptx.sreg.dynamic_smem_size (IntrinsicsNVVM.td:2459) |
| 1222 | nvvm_read_ptx_sreg_envreg0, // llvm.nvvm.read.ptx.sreg.envreg0 (IntrinsicsNVVM.td:2438) |
| 1223 | nvvm_read_ptx_sreg_envreg1, // llvm.nvvm.read.ptx.sreg.envreg1 (IntrinsicsNVVM.td:2438) |
| 1224 | nvvm_read_ptx_sreg_envreg10, // llvm.nvvm.read.ptx.sreg.envreg10 (IntrinsicsNVVM.td:2438) |
| 1225 | nvvm_read_ptx_sreg_envreg11, // llvm.nvvm.read.ptx.sreg.envreg11 (IntrinsicsNVVM.td:2438) |
| 1226 | nvvm_read_ptx_sreg_envreg12, // llvm.nvvm.read.ptx.sreg.envreg12 (IntrinsicsNVVM.td:2438) |
| 1227 | nvvm_read_ptx_sreg_envreg13, // llvm.nvvm.read.ptx.sreg.envreg13 (IntrinsicsNVVM.td:2438) |
| 1228 | nvvm_read_ptx_sreg_envreg14, // llvm.nvvm.read.ptx.sreg.envreg14 (IntrinsicsNVVM.td:2438) |
| 1229 | nvvm_read_ptx_sreg_envreg15, // llvm.nvvm.read.ptx.sreg.envreg15 (IntrinsicsNVVM.td:2438) |
| 1230 | nvvm_read_ptx_sreg_envreg16, // llvm.nvvm.read.ptx.sreg.envreg16 (IntrinsicsNVVM.td:2438) |
| 1231 | nvvm_read_ptx_sreg_envreg17, // llvm.nvvm.read.ptx.sreg.envreg17 (IntrinsicsNVVM.td:2438) |
| 1232 | nvvm_read_ptx_sreg_envreg18, // llvm.nvvm.read.ptx.sreg.envreg18 (IntrinsicsNVVM.td:2438) |
| 1233 | nvvm_read_ptx_sreg_envreg19, // llvm.nvvm.read.ptx.sreg.envreg19 (IntrinsicsNVVM.td:2438) |
| 1234 | nvvm_read_ptx_sreg_envreg2, // llvm.nvvm.read.ptx.sreg.envreg2 (IntrinsicsNVVM.td:2438) |
| 1235 | nvvm_read_ptx_sreg_envreg20, // llvm.nvvm.read.ptx.sreg.envreg20 (IntrinsicsNVVM.td:2438) |
| 1236 | nvvm_read_ptx_sreg_envreg21, // llvm.nvvm.read.ptx.sreg.envreg21 (IntrinsicsNVVM.td:2438) |
| 1237 | nvvm_read_ptx_sreg_envreg22, // llvm.nvvm.read.ptx.sreg.envreg22 (IntrinsicsNVVM.td:2438) |
| 1238 | nvvm_read_ptx_sreg_envreg23, // llvm.nvvm.read.ptx.sreg.envreg23 (IntrinsicsNVVM.td:2438) |
| 1239 | nvvm_read_ptx_sreg_envreg24, // llvm.nvvm.read.ptx.sreg.envreg24 (IntrinsicsNVVM.td:2438) |
| 1240 | nvvm_read_ptx_sreg_envreg25, // llvm.nvvm.read.ptx.sreg.envreg25 (IntrinsicsNVVM.td:2438) |
| 1241 | nvvm_read_ptx_sreg_envreg26, // llvm.nvvm.read.ptx.sreg.envreg26 (IntrinsicsNVVM.td:2438) |
| 1242 | nvvm_read_ptx_sreg_envreg27, // llvm.nvvm.read.ptx.sreg.envreg27 (IntrinsicsNVVM.td:2438) |
| 1243 | nvvm_read_ptx_sreg_envreg28, // llvm.nvvm.read.ptx.sreg.envreg28 (IntrinsicsNVVM.td:2438) |
| 1244 | nvvm_read_ptx_sreg_envreg29, // llvm.nvvm.read.ptx.sreg.envreg29 (IntrinsicsNVVM.td:2438) |
| 1245 | nvvm_read_ptx_sreg_envreg3, // llvm.nvvm.read.ptx.sreg.envreg3 (IntrinsicsNVVM.td:2438) |
| 1246 | nvvm_read_ptx_sreg_envreg30, // llvm.nvvm.read.ptx.sreg.envreg30 (IntrinsicsNVVM.td:2438) |
| 1247 | nvvm_read_ptx_sreg_envreg31, // llvm.nvvm.read.ptx.sreg.envreg31 (IntrinsicsNVVM.td:2438) |
| 1248 | nvvm_read_ptx_sreg_envreg4, // llvm.nvvm.read.ptx.sreg.envreg4 (IntrinsicsNVVM.td:2438) |
| 1249 | nvvm_read_ptx_sreg_envreg5, // llvm.nvvm.read.ptx.sreg.envreg5 (IntrinsicsNVVM.td:2438) |
| 1250 | nvvm_read_ptx_sreg_envreg6, // llvm.nvvm.read.ptx.sreg.envreg6 (IntrinsicsNVVM.td:2438) |
| 1251 | nvvm_read_ptx_sreg_envreg7, // llvm.nvvm.read.ptx.sreg.envreg7 (IntrinsicsNVVM.td:2438) |
| 1252 | nvvm_read_ptx_sreg_envreg8, // llvm.nvvm.read.ptx.sreg.envreg8 (IntrinsicsNVVM.td:2438) |
| 1253 | nvvm_read_ptx_sreg_envreg9, // llvm.nvvm.read.ptx.sreg.envreg9 (IntrinsicsNVVM.td:2438) |
| 1254 | nvvm_read_ptx_sreg_globaltimer, // llvm.nvvm.read.ptx.sreg.globaltimer (IntrinsicsNVVM.td:2428) |
| 1255 | nvvm_read_ptx_sreg_globaltimer_lo, // llvm.nvvm.read.ptx.sreg.globaltimer.lo (IntrinsicsNVVM.td:2429) |
| 1256 | nvvm_read_ptx_sreg_gridid, // llvm.nvvm.read.ptx.sreg.gridid (IntrinsicsNVVM.td:2417) |
| 1257 | nvvm_read_ptx_sreg_laneid, // llvm.nvvm.read.ptx.sreg.laneid (IntrinsicsNVVM.td:2406) |
| 1258 | nvvm_read_ptx_sreg_lanemask_eq, // llvm.nvvm.read.ptx.sreg.lanemask.eq (IntrinsicsNVVM.td:2419) |
| 1259 | nvvm_read_ptx_sreg_lanemask_ge, // llvm.nvvm.read.ptx.sreg.lanemask.ge (IntrinsicsNVVM.td:2422) |
| 1260 | nvvm_read_ptx_sreg_lanemask_gt, // llvm.nvvm.read.ptx.sreg.lanemask.gt (IntrinsicsNVVM.td:2423) |
| 1261 | nvvm_read_ptx_sreg_lanemask_le, // llvm.nvvm.read.ptx.sreg.lanemask.le (IntrinsicsNVVM.td:2420) |
| 1262 | nvvm_read_ptx_sreg_lanemask_lt, // llvm.nvvm.read.ptx.sreg.lanemask.lt (IntrinsicsNVVM.td:2421) |
| 1263 | nvvm_read_ptx_sreg_nclusterid_w, // llvm.nvvm.read.ptx.sreg.nclusterid.w (IntrinsicsNVVM.td:2373) |
| 1264 | nvvm_read_ptx_sreg_nclusterid_x, // llvm.nvvm.read.ptx.sreg.nclusterid.x (IntrinsicsNVVM.td:2373) |
| 1265 | nvvm_read_ptx_sreg_nclusterid_y, // llvm.nvvm.read.ptx.sreg.nclusterid.y (IntrinsicsNVVM.td:2373) |
| 1266 | nvvm_read_ptx_sreg_nclusterid_z, // llvm.nvvm.read.ptx.sreg.nclusterid.z (IntrinsicsNVVM.td:2373) |
| 1267 | nvvm_read_ptx_sreg_nctaid_w, // llvm.nvvm.read.ptx.sreg.nctaid.w (IntrinsicsNVVM.td:2364) |
| 1268 | nvvm_read_ptx_sreg_nctaid_x, // llvm.nvvm.read.ptx.sreg.nctaid.x (IntrinsicsNVVM.td:2364) |
| 1269 | nvvm_read_ptx_sreg_nctaid_y, // llvm.nvvm.read.ptx.sreg.nctaid.y (IntrinsicsNVVM.td:2364) |
| 1270 | nvvm_read_ptx_sreg_nctaid_z, // llvm.nvvm.read.ptx.sreg.nctaid.z (IntrinsicsNVVM.td:2364) |
| 1271 | nvvm_read_ptx_sreg_nsmid, // llvm.nvvm.read.ptx.sreg.nsmid (IntrinsicsNVVM.td:2416) |
| 1272 | nvvm_read_ptx_sreg_ntid_w, // llvm.nvvm.read.ptx.sreg.ntid.w (IntrinsicsNVVM.td:2364) |
| 1273 | nvvm_read_ptx_sreg_ntid_x, // llvm.nvvm.read.ptx.sreg.ntid.x (IntrinsicsNVVM.td:2364) |
| 1274 | nvvm_read_ptx_sreg_ntid_y, // llvm.nvvm.read.ptx.sreg.ntid.y (IntrinsicsNVVM.td:2364) |
| 1275 | nvvm_read_ptx_sreg_ntid_z, // llvm.nvvm.read.ptx.sreg.ntid.z (IntrinsicsNVVM.td:2364) |
| 1276 | nvvm_read_ptx_sreg_nwarpid, // llvm.nvvm.read.ptx.sreg.nwarpid (IntrinsicsNVVM.td:2410) |
| 1277 | nvvm_read_ptx_sreg_pm0, // llvm.nvvm.read.ptx.sreg.pm0 (IntrinsicsNVVM.td:2432) |
| 1278 | nvvm_read_ptx_sreg_pm1, // llvm.nvvm.read.ptx.sreg.pm1 (IntrinsicsNVVM.td:2432) |
| 1279 | nvvm_read_ptx_sreg_pm2, // llvm.nvvm.read.ptx.sreg.pm2 (IntrinsicsNVVM.td:2432) |
| 1280 | nvvm_read_ptx_sreg_pm3, // llvm.nvvm.read.ptx.sreg.pm3 (IntrinsicsNVVM.td:2432) |
| 1281 | nvvm_read_ptx_sreg_pm4, // llvm.nvvm.read.ptx.sreg.pm4 (IntrinsicsNVVM.td:2432) |
| 1282 | nvvm_read_ptx_sreg_smid, // llvm.nvvm.read.ptx.sreg.smid (IntrinsicsNVVM.td:2415) |
| 1283 | nvvm_read_ptx_sreg_tid_w, // llvm.nvvm.read.ptx.sreg.tid.w (IntrinsicsNVVM.td:2364) |
| 1284 | nvvm_read_ptx_sreg_tid_x, // llvm.nvvm.read.ptx.sreg.tid.x (IntrinsicsNVVM.td:2364) |
| 1285 | nvvm_read_ptx_sreg_tid_y, // llvm.nvvm.read.ptx.sreg.tid.y (IntrinsicsNVVM.td:2364) |
| 1286 | nvvm_read_ptx_sreg_tid_z, // llvm.nvvm.read.ptx.sreg.tid.z (IntrinsicsNVVM.td:2364) |
| 1287 | nvvm_read_ptx_sreg_total_smem_size, // llvm.nvvm.read.ptx.sreg.total_smem_size (IntrinsicsNVVM.td:2455) |
| 1288 | nvvm_read_ptx_sreg_warpid, // llvm.nvvm.read.ptx.sreg.warpid (IntrinsicsNVVM.td:2409) |
| 1289 | nvvm_read_ptx_sreg_warpsize, // llvm.nvvm.read.ptx.sreg.warpsize (IntrinsicsNVVM.td:2434) |
| 1290 | nvvm_redux_sync_add, // llvm.nvvm.redux.sync.add (IntrinsicsNVVM.td:2546) |
| 1291 | nvvm_redux_sync_and, // llvm.nvvm.redux.sync.and (IntrinsicsNVVM.td:2546) |
| 1292 | nvvm_redux_sync_fmax, // llvm.nvvm.redux.sync.fmax (IntrinsicsNVVM.td:2553) |
| 1293 | nvvm_redux_sync_fmax_NaN, // llvm.nvvm.redux.sync.fmax.NaN (IntrinsicsNVVM.td:2553) |
| 1294 | nvvm_redux_sync_fmax_abs, // llvm.nvvm.redux.sync.fmax.abs (IntrinsicsNVVM.td:2553) |
| 1295 | nvvm_redux_sync_fmax_abs_NaN, // llvm.nvvm.redux.sync.fmax.abs.NaN (IntrinsicsNVVM.td:2553) |
| 1296 | nvvm_redux_sync_fmin, // llvm.nvvm.redux.sync.fmin (IntrinsicsNVVM.td:2553) |
| 1297 | nvvm_redux_sync_fmin_NaN, // llvm.nvvm.redux.sync.fmin.NaN (IntrinsicsNVVM.td:2553) |
| 1298 | nvvm_redux_sync_fmin_abs, // llvm.nvvm.redux.sync.fmin.abs (IntrinsicsNVVM.td:2553) |
| 1299 | nvvm_redux_sync_fmin_abs_NaN, // llvm.nvvm.redux.sync.fmin.abs.NaN (IntrinsicsNVVM.td:2553) |
| 1300 | nvvm_redux_sync_max, // llvm.nvvm.redux.sync.max (IntrinsicsNVVM.td:2546) |
| 1301 | nvvm_redux_sync_min, // llvm.nvvm.redux.sync.min (IntrinsicsNVVM.td:2546) |
| 1302 | nvvm_redux_sync_or, // llvm.nvvm.redux.sync.or (IntrinsicsNVVM.td:2546) |
| 1303 | nvvm_redux_sync_umax, // llvm.nvvm.redux.sync.umax (IntrinsicsNVVM.td:2546) |
| 1304 | nvvm_redux_sync_umin, // llvm.nvvm.redux.sync.umin (IntrinsicsNVVM.td:2546) |
| 1305 | nvvm_redux_sync_xor, // llvm.nvvm.redux.sync.xor (IntrinsicsNVVM.td:2546) |
| 1306 | nvvm_reflect, // llvm.nvvm.reflect (IntrinsicsNVVM.td:2196) |
| 1307 | nvvm_round_d, // llvm.nvvm.round.d (IntrinsicsNVVM.td:1449) |
| 1308 | nvvm_round_f, // llvm.nvvm.round.f (IntrinsicsNVVM.td:1446) |
| 1309 | nvvm_round_ftz_f, // llvm.nvvm.round.ftz.f (IntrinsicsNVVM.td:1446) |
| 1310 | nvvm_rsqrt_approx_d, // llvm.nvvm.rsqrt.approx.d (IntrinsicsNVVM.td:1587) |
| 1311 | nvvm_rsqrt_approx_f, // llvm.nvvm.rsqrt.approx.f (IntrinsicsNVVM.td:1585) |
| 1312 | nvvm_rsqrt_approx_ftz_d, // llvm.nvvm.rsqrt.approx.ftz.d (IntrinsicsNVVM.td:1587) |
| 1313 | nvvm_rsqrt_approx_ftz_f, // llvm.nvvm.rsqrt.approx.ftz.f (IntrinsicsNVVM.td:1585) |
| 1314 | nvvm_s2f6x2_to_bf16x2_rn_relu_satfinite_scale_n2_ue8m0, // llvm.nvvm.s2f6x2.to.bf16x2.rn.relu.satfinite.scale.n2.ue8m0 (IntrinsicsNVVM.td:1777) |
| 1315 | nvvm_s2f6x2_to_bf16x2_rn_relu_scale_n2_ue8m0, // llvm.nvvm.s2f6x2.to.bf16x2.rn.relu.scale.n2.ue8m0 (IntrinsicsNVVM.td:1781) |
| 1316 | nvvm_s2f6x2_to_bf16x2_rn_satfinite_scale_n2_ue8m0, // llvm.nvvm.s2f6x2.to.bf16x2.rn.satfinite.scale.n2.ue8m0 (IntrinsicsNVVM.td:1777) |
| 1317 | nvvm_s2f6x2_to_bf16x2_rn_scale_n2_ue8m0, // llvm.nvvm.s2f6x2.to.bf16x2.rn.scale.n2.ue8m0 (IntrinsicsNVVM.td:1781) |
| 1318 | nvvm_sad_i, // llvm.nvvm.sad.i (IntrinsicsNVVM.td:1409) |
| 1319 | nvvm_sad_ll, // llvm.nvvm.sad.ll (IntrinsicsNVVM.td:1412) |
| 1320 | nvvm_sad_s, // llvm.nvvm.sad.s (IntrinsicsNVVM.td:1406) |
| 1321 | nvvm_sad_ui, // llvm.nvvm.sad.ui (IntrinsicsNVVM.td:1409) |
| 1322 | nvvm_sad_ull, // llvm.nvvm.sad.ull (IntrinsicsNVVM.td:1412) |
| 1323 | nvvm_sad_us, // llvm.nvvm.sad.us (IntrinsicsNVVM.td:1406) |
| 1324 | nvvm_saturate_d, // llvm.nvvm.saturate.d (IntrinsicsNVVM.td:1469) |
| 1325 | nvvm_saturate_f, // llvm.nvvm.saturate.f (IntrinsicsNVVM.td:1466) |
| 1326 | nvvm_saturate_ftz_f, // llvm.nvvm.saturate.ftz.f (IntrinsicsNVVM.td:1466) |
| 1327 | nvvm_setmaxnreg_dec_sync_aligned_u32, // llvm.nvvm.setmaxnreg.dec.sync.aligned.u32 (IntrinsicsNVVM.td:2813) |
| 1328 | nvvm_setmaxnreg_inc_sync_aligned_u32, // llvm.nvvm.setmaxnreg.inc.sync.aligned.u32 (IntrinsicsNVVM.td:2813) |
| 1329 | nvvm_sext_clamp, // llvm.nvvm.sext.clamp (IntrinsicsNVVM.td:1655) |
| 1330 | nvvm_sext_wrap, // llvm.nvvm.sext.wrap (IntrinsicsNVVM.td:1655) |
| 1331 | nvvm_shfl_bfly_f32, // llvm.nvvm.shfl.bfly.f32 (IntrinsicsNVVM.td:2473) |
| 1332 | nvvm_shfl_bfly_f32p, // llvm.nvvm.shfl.bfly.f32p (IntrinsicsNVVM.td:2475) |
| 1333 | nvvm_shfl_bfly_i32, // llvm.nvvm.shfl.bfly.i32 (IntrinsicsNVVM.td:2473) |
| 1334 | nvvm_shfl_bfly_i32p, // llvm.nvvm.shfl.bfly.i32p (IntrinsicsNVVM.td:2475) |
| 1335 | nvvm_shfl_down_f32, // llvm.nvvm.shfl.down.f32 (IntrinsicsNVVM.td:2473) |
| 1336 | nvvm_shfl_down_f32p, // llvm.nvvm.shfl.down.f32p (IntrinsicsNVVM.td:2475) |
| 1337 | nvvm_shfl_down_i32, // llvm.nvvm.shfl.down.i32 (IntrinsicsNVVM.td:2473) |
| 1338 | nvvm_shfl_down_i32p, // llvm.nvvm.shfl.down.i32p (IntrinsicsNVVM.td:2475) |
| 1339 | nvvm_shfl_idx_f32, // llvm.nvvm.shfl.idx.f32 (IntrinsicsNVVM.td:2473) |
| 1340 | nvvm_shfl_idx_f32p, // llvm.nvvm.shfl.idx.f32p (IntrinsicsNVVM.td:2475) |
| 1341 | nvvm_shfl_idx_i32, // llvm.nvvm.shfl.idx.i32 (IntrinsicsNVVM.td:2473) |
| 1342 | nvvm_shfl_idx_i32p, // llvm.nvvm.shfl.idx.i32p (IntrinsicsNVVM.td:2475) |
| 1343 | nvvm_shfl_sync_bfly_f32, // llvm.nvvm.shfl.sync.bfly.f32 (IntrinsicsNVVM.td:2473) |
| 1344 | nvvm_shfl_sync_bfly_f32p, // llvm.nvvm.shfl.sync.bfly.f32p (IntrinsicsNVVM.td:2475) |
| 1345 | nvvm_shfl_sync_bfly_i32, // llvm.nvvm.shfl.sync.bfly.i32 (IntrinsicsNVVM.td:2473) |
| 1346 | nvvm_shfl_sync_bfly_i32p, // llvm.nvvm.shfl.sync.bfly.i32p (IntrinsicsNVVM.td:2475) |
| 1347 | nvvm_shfl_sync_down_f32, // llvm.nvvm.shfl.sync.down.f32 (IntrinsicsNVVM.td:2473) |
| 1348 | nvvm_shfl_sync_down_f32p, // llvm.nvvm.shfl.sync.down.f32p (IntrinsicsNVVM.td:2475) |
| 1349 | nvvm_shfl_sync_down_i32, // llvm.nvvm.shfl.sync.down.i32 (IntrinsicsNVVM.td:2473) |
| 1350 | nvvm_shfl_sync_down_i32p, // llvm.nvvm.shfl.sync.down.i32p (IntrinsicsNVVM.td:2475) |
| 1351 | nvvm_shfl_sync_idx_f32, // llvm.nvvm.shfl.sync.idx.f32 (IntrinsicsNVVM.td:2473) |
| 1352 | nvvm_shfl_sync_idx_f32p, // llvm.nvvm.shfl.sync.idx.f32p (IntrinsicsNVVM.td:2475) |
| 1353 | nvvm_shfl_sync_idx_i32, // llvm.nvvm.shfl.sync.idx.i32 (IntrinsicsNVVM.td:2473) |
| 1354 | nvvm_shfl_sync_idx_i32p, // llvm.nvvm.shfl.sync.idx.i32p (IntrinsicsNVVM.td:2475) |
| 1355 | nvvm_shfl_sync_up_f32, // llvm.nvvm.shfl.sync.up.f32 (IntrinsicsNVVM.td:2473) |
| 1356 | nvvm_shfl_sync_up_f32p, // llvm.nvvm.shfl.sync.up.f32p (IntrinsicsNVVM.td:2475) |
| 1357 | nvvm_shfl_sync_up_i32, // llvm.nvvm.shfl.sync.up.i32 (IntrinsicsNVVM.td:2473) |
| 1358 | nvvm_shfl_sync_up_i32p, // llvm.nvvm.shfl.sync.up.i32p (IntrinsicsNVVM.td:2475) |
| 1359 | nvvm_shfl_up_f32, // llvm.nvvm.shfl.up.f32 (IntrinsicsNVVM.td:2473) |
| 1360 | nvvm_shfl_up_f32p, // llvm.nvvm.shfl.up.f32p (IntrinsicsNVVM.td:2475) |
| 1361 | nvvm_shfl_up_i32, // llvm.nvvm.shfl.up.i32 (IntrinsicsNVVM.td:2473) |
| 1362 | nvvm_shfl_up_i32p, // llvm.nvvm.shfl.up.i32p (IntrinsicsNVVM.td:2475) |
| 1363 | nvvm_sin_approx_f, // llvm.nvvm.sin.approx.f (IntrinsicsNVVM.td:1493) |
| 1364 | nvvm_sin_approx_ftz_f, // llvm.nvvm.sin.approx.ftz.f (IntrinsicsNVVM.td:1493) |
| 1365 | nvvm_sqrt_approx_f, // llvm.nvvm.sqrt.approx.f (IntrinsicsNVVM.td:1576) |
| 1366 | nvvm_sqrt_approx_ftz_f, // llvm.nvvm.sqrt.approx.ftz.f (IntrinsicsNVVM.td:1576) |
| 1367 | nvvm_sqrt_f, // llvm.nvvm.sqrt.f (IntrinsicsNVVM.td:1572) |
| 1368 | nvvm_sqrt_rm_d, // llvm.nvvm.sqrt.rm.d (IntrinsicsNVVM.td:1568) |
| 1369 | nvvm_sqrt_rm_f, // llvm.nvvm.sqrt.rm.f (IntrinsicsNVVM.td:1565) |
| 1370 | nvvm_sqrt_rm_ftz_f, // llvm.nvvm.sqrt.rm.ftz.f (IntrinsicsNVVM.td:1565) |
| 1371 | nvvm_sqrt_rn_d, // llvm.nvvm.sqrt.rn.d (IntrinsicsNVVM.td:1568) |
| 1372 | nvvm_sqrt_rn_f, // llvm.nvvm.sqrt.rn.f (IntrinsicsNVVM.td:1565) |
| 1373 | nvvm_sqrt_rn_ftz_f, // llvm.nvvm.sqrt.rn.ftz.f (IntrinsicsNVVM.td:1565) |
| 1374 | nvvm_sqrt_rp_d, // llvm.nvvm.sqrt.rp.d (IntrinsicsNVVM.td:1568) |
| 1375 | nvvm_sqrt_rp_f, // llvm.nvvm.sqrt.rp.f (IntrinsicsNVVM.td:1565) |
| 1376 | nvvm_sqrt_rp_ftz_f, // llvm.nvvm.sqrt.rp.ftz.f (IntrinsicsNVVM.td:1565) |
| 1377 | nvvm_sqrt_rz_d, // llvm.nvvm.sqrt.rz.d (IntrinsicsNVVM.td:1568) |
| 1378 | nvvm_sqrt_rz_f, // llvm.nvvm.sqrt.rz.f (IntrinsicsNVVM.td:1565) |
| 1379 | nvvm_sqrt_rz_ftz_f, // llvm.nvvm.sqrt.rz.ftz.f (IntrinsicsNVVM.td:1565) |
| 1380 | nvvm_st_bulk, // llvm.nvvm.st.bulk (IntrinsicsNVVM.td:3223) |
| 1381 | nvvm_st_bulk_shared_cta, // llvm.nvvm.st.bulk.shared.cta (IntrinsicsNVVM.td:3226) |
| 1382 | nvvm_stmatrix_sync_aligned_m16n8_x1_trans_b8, // llvm.nvvm.stmatrix.sync.aligned.m16n8.x1.trans.b8 (IntrinsicsNVVM.td:2784) |
| 1383 | nvvm_stmatrix_sync_aligned_m16n8_x2_trans_b8, // llvm.nvvm.stmatrix.sync.aligned.m16n8.x2.trans.b8 (IntrinsicsNVVM.td:2784) |
| 1384 | nvvm_stmatrix_sync_aligned_m16n8_x4_trans_b8, // llvm.nvvm.stmatrix.sync.aligned.m16n8.x4.trans.b8 (IntrinsicsNVVM.td:2784) |
| 1385 | nvvm_stmatrix_sync_aligned_m8n8_x1_b16, // llvm.nvvm.stmatrix.sync.aligned.m8n8.x1.b16 (IntrinsicsNVVM.td:2784) |
| 1386 | nvvm_stmatrix_sync_aligned_m8n8_x1_trans_b16, // llvm.nvvm.stmatrix.sync.aligned.m8n8.x1.trans.b16 (IntrinsicsNVVM.td:2784) |
| 1387 | nvvm_stmatrix_sync_aligned_m8n8_x2_b16, // llvm.nvvm.stmatrix.sync.aligned.m8n8.x2.b16 (IntrinsicsNVVM.td:2784) |
| 1388 | nvvm_stmatrix_sync_aligned_m8n8_x2_trans_b16, // llvm.nvvm.stmatrix.sync.aligned.m8n8.x2.trans.b16 (IntrinsicsNVVM.td:2784) |
| 1389 | nvvm_stmatrix_sync_aligned_m8n8_x4_b16, // llvm.nvvm.stmatrix.sync.aligned.m8n8.x4.b16 (IntrinsicsNVVM.td:2784) |
| 1390 | nvvm_stmatrix_sync_aligned_m8n8_x4_trans_b16, // llvm.nvvm.stmatrix.sync.aligned.m8n8.x4.trans.b16 (IntrinsicsNVVM.td:2784) |
| 1391 | nvvm_suld_1d_array_i16_clamp, // llvm.nvvm.suld.1d.array.i16.clamp (IntrinsicsNVVM.td:2277) |
| 1392 | nvvm_suld_1d_array_i16_trap, // llvm.nvvm.suld.1d.array.i16.trap (IntrinsicsNVVM.td:2277) |
| 1393 | nvvm_suld_1d_array_i16_zero, // llvm.nvvm.suld.1d.array.i16.zero (IntrinsicsNVVM.td:2277) |
| 1394 | nvvm_suld_1d_array_i32_clamp, // llvm.nvvm.suld.1d.array.i32.clamp (IntrinsicsNVVM.td:2277) |
| 1395 | nvvm_suld_1d_array_i32_trap, // llvm.nvvm.suld.1d.array.i32.trap (IntrinsicsNVVM.td:2277) |
| 1396 | nvvm_suld_1d_array_i32_zero, // llvm.nvvm.suld.1d.array.i32.zero (IntrinsicsNVVM.td:2277) |
| 1397 | nvvm_suld_1d_array_i64_clamp, // llvm.nvvm.suld.1d.array.i64.clamp (IntrinsicsNVVM.td:2277) |
| 1398 | nvvm_suld_1d_array_i64_trap, // llvm.nvvm.suld.1d.array.i64.trap (IntrinsicsNVVM.td:2277) |
| 1399 | nvvm_suld_1d_array_i64_zero, // llvm.nvvm.suld.1d.array.i64.zero (IntrinsicsNVVM.td:2277) |
| 1400 | nvvm_suld_1d_array_i8_clamp, // llvm.nvvm.suld.1d.array.i8.clamp (IntrinsicsNVVM.td:2277) |
| 1401 | nvvm_suld_1d_array_i8_trap, // llvm.nvvm.suld.1d.array.i8.trap (IntrinsicsNVVM.td:2277) |
| 1402 | nvvm_suld_1d_array_i8_zero, // llvm.nvvm.suld.1d.array.i8.zero (IntrinsicsNVVM.td:2277) |
| 1403 | nvvm_suld_1d_array_v2i16_clamp, // llvm.nvvm.suld.1d.array.v2i16.clamp (IntrinsicsNVVM.td:2277) |
| 1404 | nvvm_suld_1d_array_v2i16_trap, // llvm.nvvm.suld.1d.array.v2i16.trap (IntrinsicsNVVM.td:2277) |
| 1405 | nvvm_suld_1d_array_v2i16_zero, // llvm.nvvm.suld.1d.array.v2i16.zero (IntrinsicsNVVM.td:2277) |
| 1406 | nvvm_suld_1d_array_v2i32_clamp, // llvm.nvvm.suld.1d.array.v2i32.clamp (IntrinsicsNVVM.td:2277) |
| 1407 | nvvm_suld_1d_array_v2i32_trap, // llvm.nvvm.suld.1d.array.v2i32.trap (IntrinsicsNVVM.td:2277) |
| 1408 | nvvm_suld_1d_array_v2i32_zero, // llvm.nvvm.suld.1d.array.v2i32.zero (IntrinsicsNVVM.td:2277) |
| 1409 | nvvm_suld_1d_array_v2i64_clamp, // llvm.nvvm.suld.1d.array.v2i64.clamp (IntrinsicsNVVM.td:2277) |
| 1410 | nvvm_suld_1d_array_v2i64_trap, // llvm.nvvm.suld.1d.array.v2i64.trap (IntrinsicsNVVM.td:2277) |
| 1411 | nvvm_suld_1d_array_v2i64_zero, // llvm.nvvm.suld.1d.array.v2i64.zero (IntrinsicsNVVM.td:2277) |
| 1412 | nvvm_suld_1d_array_v2i8_clamp, // llvm.nvvm.suld.1d.array.v2i8.clamp (IntrinsicsNVVM.td:2277) |
| 1413 | nvvm_suld_1d_array_v2i8_trap, // llvm.nvvm.suld.1d.array.v2i8.trap (IntrinsicsNVVM.td:2277) |
| 1414 | nvvm_suld_1d_array_v2i8_zero, // llvm.nvvm.suld.1d.array.v2i8.zero (IntrinsicsNVVM.td:2277) |
| 1415 | nvvm_suld_1d_array_v4i16_clamp, // llvm.nvvm.suld.1d.array.v4i16.clamp (IntrinsicsNVVM.td:2277) |
| 1416 | nvvm_suld_1d_array_v4i16_trap, // llvm.nvvm.suld.1d.array.v4i16.trap (IntrinsicsNVVM.td:2277) |
| 1417 | nvvm_suld_1d_array_v4i16_zero, // llvm.nvvm.suld.1d.array.v4i16.zero (IntrinsicsNVVM.td:2277) |
| 1418 | nvvm_suld_1d_array_v4i32_clamp, // llvm.nvvm.suld.1d.array.v4i32.clamp (IntrinsicsNVVM.td:2277) |
| 1419 | nvvm_suld_1d_array_v4i32_trap, // llvm.nvvm.suld.1d.array.v4i32.trap (IntrinsicsNVVM.td:2277) |
| 1420 | nvvm_suld_1d_array_v4i32_zero, // llvm.nvvm.suld.1d.array.v4i32.zero (IntrinsicsNVVM.td:2277) |
| 1421 | nvvm_suld_1d_array_v4i8_clamp, // llvm.nvvm.suld.1d.array.v4i8.clamp (IntrinsicsNVVM.td:2277) |
| 1422 | nvvm_suld_1d_array_v4i8_trap, // llvm.nvvm.suld.1d.array.v4i8.trap (IntrinsicsNVVM.td:2277) |
| 1423 | nvvm_suld_1d_array_v4i8_zero, // llvm.nvvm.suld.1d.array.v4i8.zero (IntrinsicsNVVM.td:2277) |
| 1424 | nvvm_suld_1d_i16_clamp, // llvm.nvvm.suld.1d.i16.clamp (IntrinsicsNVVM.td:2273) |
| 1425 | nvvm_suld_1d_i16_trap, // llvm.nvvm.suld.1d.i16.trap (IntrinsicsNVVM.td:2273) |
| 1426 | nvvm_suld_1d_i16_zero, // llvm.nvvm.suld.1d.i16.zero (IntrinsicsNVVM.td:2273) |
| 1427 | nvvm_suld_1d_i32_clamp, // llvm.nvvm.suld.1d.i32.clamp (IntrinsicsNVVM.td:2273) |
| 1428 | nvvm_suld_1d_i32_trap, // llvm.nvvm.suld.1d.i32.trap (IntrinsicsNVVM.td:2273) |
| 1429 | nvvm_suld_1d_i32_zero, // llvm.nvvm.suld.1d.i32.zero (IntrinsicsNVVM.td:2273) |
| 1430 | nvvm_suld_1d_i64_clamp, // llvm.nvvm.suld.1d.i64.clamp (IntrinsicsNVVM.td:2273) |
| 1431 | nvvm_suld_1d_i64_trap, // llvm.nvvm.suld.1d.i64.trap (IntrinsicsNVVM.td:2273) |
| 1432 | nvvm_suld_1d_i64_zero, // llvm.nvvm.suld.1d.i64.zero (IntrinsicsNVVM.td:2273) |
| 1433 | nvvm_suld_1d_i8_clamp, // llvm.nvvm.suld.1d.i8.clamp (IntrinsicsNVVM.td:2273) |
| 1434 | nvvm_suld_1d_i8_trap, // llvm.nvvm.suld.1d.i8.trap (IntrinsicsNVVM.td:2273) |
| 1435 | nvvm_suld_1d_i8_zero, // llvm.nvvm.suld.1d.i8.zero (IntrinsicsNVVM.td:2273) |
| 1436 | nvvm_suld_1d_v2i16_clamp, // llvm.nvvm.suld.1d.v2i16.clamp (IntrinsicsNVVM.td:2273) |
| 1437 | nvvm_suld_1d_v2i16_trap, // llvm.nvvm.suld.1d.v2i16.trap (IntrinsicsNVVM.td:2273) |
| 1438 | nvvm_suld_1d_v2i16_zero, // llvm.nvvm.suld.1d.v2i16.zero (IntrinsicsNVVM.td:2273) |
| 1439 | nvvm_suld_1d_v2i32_clamp, // llvm.nvvm.suld.1d.v2i32.clamp (IntrinsicsNVVM.td:2273) |
| 1440 | nvvm_suld_1d_v2i32_trap, // llvm.nvvm.suld.1d.v2i32.trap (IntrinsicsNVVM.td:2273) |
| 1441 | nvvm_suld_1d_v2i32_zero, // llvm.nvvm.suld.1d.v2i32.zero (IntrinsicsNVVM.td:2273) |
| 1442 | nvvm_suld_1d_v2i64_clamp, // llvm.nvvm.suld.1d.v2i64.clamp (IntrinsicsNVVM.td:2273) |
| 1443 | nvvm_suld_1d_v2i64_trap, // llvm.nvvm.suld.1d.v2i64.trap (IntrinsicsNVVM.td:2273) |
| 1444 | nvvm_suld_1d_v2i64_zero, // llvm.nvvm.suld.1d.v2i64.zero (IntrinsicsNVVM.td:2273) |
| 1445 | nvvm_suld_1d_v2i8_clamp, // llvm.nvvm.suld.1d.v2i8.clamp (IntrinsicsNVVM.td:2273) |
| 1446 | nvvm_suld_1d_v2i8_trap, // llvm.nvvm.suld.1d.v2i8.trap (IntrinsicsNVVM.td:2273) |
| 1447 | nvvm_suld_1d_v2i8_zero, // llvm.nvvm.suld.1d.v2i8.zero (IntrinsicsNVVM.td:2273) |
| 1448 | nvvm_suld_1d_v4i16_clamp, // llvm.nvvm.suld.1d.v4i16.clamp (IntrinsicsNVVM.td:2273) |
| 1449 | nvvm_suld_1d_v4i16_trap, // llvm.nvvm.suld.1d.v4i16.trap (IntrinsicsNVVM.td:2273) |
| 1450 | nvvm_suld_1d_v4i16_zero, // llvm.nvvm.suld.1d.v4i16.zero (IntrinsicsNVVM.td:2273) |
| 1451 | nvvm_suld_1d_v4i32_clamp, // llvm.nvvm.suld.1d.v4i32.clamp (IntrinsicsNVVM.td:2273) |
| 1452 | nvvm_suld_1d_v4i32_trap, // llvm.nvvm.suld.1d.v4i32.trap (IntrinsicsNVVM.td:2273) |
| 1453 | nvvm_suld_1d_v4i32_zero, // llvm.nvvm.suld.1d.v4i32.zero (IntrinsicsNVVM.td:2273) |
| 1454 | nvvm_suld_1d_v4i8_clamp, // llvm.nvvm.suld.1d.v4i8.clamp (IntrinsicsNVVM.td:2273) |
| 1455 | nvvm_suld_1d_v4i8_trap, // llvm.nvvm.suld.1d.v4i8.trap (IntrinsicsNVVM.td:2273) |
| 1456 | nvvm_suld_1d_v4i8_zero, // llvm.nvvm.suld.1d.v4i8.zero (IntrinsicsNVVM.td:2273) |
| 1457 | nvvm_suld_2d_array_i16_clamp, // llvm.nvvm.suld.2d.array.i16.clamp (IntrinsicsNVVM.td:2285) |
| 1458 | nvvm_suld_2d_array_i16_trap, // llvm.nvvm.suld.2d.array.i16.trap (IntrinsicsNVVM.td:2285) |
| 1459 | nvvm_suld_2d_array_i16_zero, // llvm.nvvm.suld.2d.array.i16.zero (IntrinsicsNVVM.td:2285) |
| 1460 | nvvm_suld_2d_array_i32_clamp, // llvm.nvvm.suld.2d.array.i32.clamp (IntrinsicsNVVM.td:2285) |
| 1461 | nvvm_suld_2d_array_i32_trap, // llvm.nvvm.suld.2d.array.i32.trap (IntrinsicsNVVM.td:2285) |
| 1462 | nvvm_suld_2d_array_i32_zero, // llvm.nvvm.suld.2d.array.i32.zero (IntrinsicsNVVM.td:2285) |
| 1463 | nvvm_suld_2d_array_i64_clamp, // llvm.nvvm.suld.2d.array.i64.clamp (IntrinsicsNVVM.td:2285) |
| 1464 | nvvm_suld_2d_array_i64_trap, // llvm.nvvm.suld.2d.array.i64.trap (IntrinsicsNVVM.td:2285) |
| 1465 | nvvm_suld_2d_array_i64_zero, // llvm.nvvm.suld.2d.array.i64.zero (IntrinsicsNVVM.td:2285) |
| 1466 | nvvm_suld_2d_array_i8_clamp, // llvm.nvvm.suld.2d.array.i8.clamp (IntrinsicsNVVM.td:2285) |
| 1467 | nvvm_suld_2d_array_i8_trap, // llvm.nvvm.suld.2d.array.i8.trap (IntrinsicsNVVM.td:2285) |
| 1468 | nvvm_suld_2d_array_i8_zero, // llvm.nvvm.suld.2d.array.i8.zero (IntrinsicsNVVM.td:2285) |
| 1469 | nvvm_suld_2d_array_v2i16_clamp, // llvm.nvvm.suld.2d.array.v2i16.clamp (IntrinsicsNVVM.td:2285) |
| 1470 | nvvm_suld_2d_array_v2i16_trap, // llvm.nvvm.suld.2d.array.v2i16.trap (IntrinsicsNVVM.td:2285) |
| 1471 | nvvm_suld_2d_array_v2i16_zero, // llvm.nvvm.suld.2d.array.v2i16.zero (IntrinsicsNVVM.td:2285) |
| 1472 | nvvm_suld_2d_array_v2i32_clamp, // llvm.nvvm.suld.2d.array.v2i32.clamp (IntrinsicsNVVM.td:2285) |
| 1473 | nvvm_suld_2d_array_v2i32_trap, // llvm.nvvm.suld.2d.array.v2i32.trap (IntrinsicsNVVM.td:2285) |
| 1474 | nvvm_suld_2d_array_v2i32_zero, // llvm.nvvm.suld.2d.array.v2i32.zero (IntrinsicsNVVM.td:2285) |
| 1475 | nvvm_suld_2d_array_v2i64_clamp, // llvm.nvvm.suld.2d.array.v2i64.clamp (IntrinsicsNVVM.td:2285) |
| 1476 | nvvm_suld_2d_array_v2i64_trap, // llvm.nvvm.suld.2d.array.v2i64.trap (IntrinsicsNVVM.td:2285) |
| 1477 | nvvm_suld_2d_array_v2i64_zero, // llvm.nvvm.suld.2d.array.v2i64.zero (IntrinsicsNVVM.td:2285) |
| 1478 | nvvm_suld_2d_array_v2i8_clamp, // llvm.nvvm.suld.2d.array.v2i8.clamp (IntrinsicsNVVM.td:2285) |
| 1479 | nvvm_suld_2d_array_v2i8_trap, // llvm.nvvm.suld.2d.array.v2i8.trap (IntrinsicsNVVM.td:2285) |
| 1480 | nvvm_suld_2d_array_v2i8_zero, // llvm.nvvm.suld.2d.array.v2i8.zero (IntrinsicsNVVM.td:2285) |
| 1481 | nvvm_suld_2d_array_v4i16_clamp, // llvm.nvvm.suld.2d.array.v4i16.clamp (IntrinsicsNVVM.td:2285) |
| 1482 | nvvm_suld_2d_array_v4i16_trap, // llvm.nvvm.suld.2d.array.v4i16.trap (IntrinsicsNVVM.td:2285) |
| 1483 | nvvm_suld_2d_array_v4i16_zero, // llvm.nvvm.suld.2d.array.v4i16.zero (IntrinsicsNVVM.td:2285) |
| 1484 | nvvm_suld_2d_array_v4i32_clamp, // llvm.nvvm.suld.2d.array.v4i32.clamp (IntrinsicsNVVM.td:2285) |
| 1485 | nvvm_suld_2d_array_v4i32_trap, // llvm.nvvm.suld.2d.array.v4i32.trap (IntrinsicsNVVM.td:2285) |
| 1486 | nvvm_suld_2d_array_v4i32_zero, // llvm.nvvm.suld.2d.array.v4i32.zero (IntrinsicsNVVM.td:2285) |
| 1487 | nvvm_suld_2d_array_v4i8_clamp, // llvm.nvvm.suld.2d.array.v4i8.clamp (IntrinsicsNVVM.td:2285) |
| 1488 | nvvm_suld_2d_array_v4i8_trap, // llvm.nvvm.suld.2d.array.v4i8.trap (IntrinsicsNVVM.td:2285) |
| 1489 | nvvm_suld_2d_array_v4i8_zero, // llvm.nvvm.suld.2d.array.v4i8.zero (IntrinsicsNVVM.td:2285) |
| 1490 | nvvm_suld_2d_i16_clamp, // llvm.nvvm.suld.2d.i16.clamp (IntrinsicsNVVM.td:2281) |
| 1491 | nvvm_suld_2d_i16_trap, // llvm.nvvm.suld.2d.i16.trap (IntrinsicsNVVM.td:2281) |
| 1492 | nvvm_suld_2d_i16_zero, // llvm.nvvm.suld.2d.i16.zero (IntrinsicsNVVM.td:2281) |
| 1493 | nvvm_suld_2d_i32_clamp, // llvm.nvvm.suld.2d.i32.clamp (IntrinsicsNVVM.td:2281) |
| 1494 | nvvm_suld_2d_i32_trap, // llvm.nvvm.suld.2d.i32.trap (IntrinsicsNVVM.td:2281) |
| 1495 | nvvm_suld_2d_i32_zero, // llvm.nvvm.suld.2d.i32.zero (IntrinsicsNVVM.td:2281) |
| 1496 | nvvm_suld_2d_i64_clamp, // llvm.nvvm.suld.2d.i64.clamp (IntrinsicsNVVM.td:2281) |
| 1497 | nvvm_suld_2d_i64_trap, // llvm.nvvm.suld.2d.i64.trap (IntrinsicsNVVM.td:2281) |
| 1498 | nvvm_suld_2d_i64_zero, // llvm.nvvm.suld.2d.i64.zero (IntrinsicsNVVM.td:2281) |
| 1499 | nvvm_suld_2d_i8_clamp, // llvm.nvvm.suld.2d.i8.clamp (IntrinsicsNVVM.td:2281) |
| 1500 | nvvm_suld_2d_i8_trap, // llvm.nvvm.suld.2d.i8.trap (IntrinsicsNVVM.td:2281) |
| 1501 | nvvm_suld_2d_i8_zero, // llvm.nvvm.suld.2d.i8.zero (IntrinsicsNVVM.td:2281) |
| 1502 | nvvm_suld_2d_v2i16_clamp, // llvm.nvvm.suld.2d.v2i16.clamp (IntrinsicsNVVM.td:2281) |
| 1503 | nvvm_suld_2d_v2i16_trap, // llvm.nvvm.suld.2d.v2i16.trap (IntrinsicsNVVM.td:2281) |
| 1504 | nvvm_suld_2d_v2i16_zero, // llvm.nvvm.suld.2d.v2i16.zero (IntrinsicsNVVM.td:2281) |
| 1505 | nvvm_suld_2d_v2i32_clamp, // llvm.nvvm.suld.2d.v2i32.clamp (IntrinsicsNVVM.td:2281) |
| 1506 | nvvm_suld_2d_v2i32_trap, // llvm.nvvm.suld.2d.v2i32.trap (IntrinsicsNVVM.td:2281) |
| 1507 | nvvm_suld_2d_v2i32_zero, // llvm.nvvm.suld.2d.v2i32.zero (IntrinsicsNVVM.td:2281) |
| 1508 | nvvm_suld_2d_v2i64_clamp, // llvm.nvvm.suld.2d.v2i64.clamp (IntrinsicsNVVM.td:2281) |
| 1509 | nvvm_suld_2d_v2i64_trap, // llvm.nvvm.suld.2d.v2i64.trap (IntrinsicsNVVM.td:2281) |
| 1510 | nvvm_suld_2d_v2i64_zero, // llvm.nvvm.suld.2d.v2i64.zero (IntrinsicsNVVM.td:2281) |
| 1511 | nvvm_suld_2d_v2i8_clamp, // llvm.nvvm.suld.2d.v2i8.clamp (IntrinsicsNVVM.td:2281) |
| 1512 | nvvm_suld_2d_v2i8_trap, // llvm.nvvm.suld.2d.v2i8.trap (IntrinsicsNVVM.td:2281) |
| 1513 | nvvm_suld_2d_v2i8_zero, // llvm.nvvm.suld.2d.v2i8.zero (IntrinsicsNVVM.td:2281) |
| 1514 | nvvm_suld_2d_v4i16_clamp, // llvm.nvvm.suld.2d.v4i16.clamp (IntrinsicsNVVM.td:2281) |
| 1515 | nvvm_suld_2d_v4i16_trap, // llvm.nvvm.suld.2d.v4i16.trap (IntrinsicsNVVM.td:2281) |
| 1516 | nvvm_suld_2d_v4i16_zero, // llvm.nvvm.suld.2d.v4i16.zero (IntrinsicsNVVM.td:2281) |
| 1517 | nvvm_suld_2d_v4i32_clamp, // llvm.nvvm.suld.2d.v4i32.clamp (IntrinsicsNVVM.td:2281) |
| 1518 | nvvm_suld_2d_v4i32_trap, // llvm.nvvm.suld.2d.v4i32.trap (IntrinsicsNVVM.td:2281) |
| 1519 | nvvm_suld_2d_v4i32_zero, // llvm.nvvm.suld.2d.v4i32.zero (IntrinsicsNVVM.td:2281) |
| 1520 | nvvm_suld_2d_v4i8_clamp, // llvm.nvvm.suld.2d.v4i8.clamp (IntrinsicsNVVM.td:2281) |
| 1521 | nvvm_suld_2d_v4i8_trap, // llvm.nvvm.suld.2d.v4i8.trap (IntrinsicsNVVM.td:2281) |
| 1522 | nvvm_suld_2d_v4i8_zero, // llvm.nvvm.suld.2d.v4i8.zero (IntrinsicsNVVM.td:2281) |
| 1523 | nvvm_suld_3d_i16_clamp, // llvm.nvvm.suld.3d.i16.clamp (IntrinsicsNVVM.td:2289) |
| 1524 | nvvm_suld_3d_i16_trap, // llvm.nvvm.suld.3d.i16.trap (IntrinsicsNVVM.td:2289) |
| 1525 | nvvm_suld_3d_i16_zero, // llvm.nvvm.suld.3d.i16.zero (IntrinsicsNVVM.td:2289) |
| 1526 | nvvm_suld_3d_i32_clamp, // llvm.nvvm.suld.3d.i32.clamp (IntrinsicsNVVM.td:2289) |
| 1527 | nvvm_suld_3d_i32_trap, // llvm.nvvm.suld.3d.i32.trap (IntrinsicsNVVM.td:2289) |
| 1528 | nvvm_suld_3d_i32_zero, // llvm.nvvm.suld.3d.i32.zero (IntrinsicsNVVM.td:2289) |
| 1529 | nvvm_suld_3d_i64_clamp, // llvm.nvvm.suld.3d.i64.clamp (IntrinsicsNVVM.td:2289) |
| 1530 | nvvm_suld_3d_i64_trap, // llvm.nvvm.suld.3d.i64.trap (IntrinsicsNVVM.td:2289) |
| 1531 | nvvm_suld_3d_i64_zero, // llvm.nvvm.suld.3d.i64.zero (IntrinsicsNVVM.td:2289) |
| 1532 | nvvm_suld_3d_i8_clamp, // llvm.nvvm.suld.3d.i8.clamp (IntrinsicsNVVM.td:2289) |
| 1533 | nvvm_suld_3d_i8_trap, // llvm.nvvm.suld.3d.i8.trap (IntrinsicsNVVM.td:2289) |
| 1534 | nvvm_suld_3d_i8_zero, // llvm.nvvm.suld.3d.i8.zero (IntrinsicsNVVM.td:2289) |
| 1535 | nvvm_suld_3d_v2i16_clamp, // llvm.nvvm.suld.3d.v2i16.clamp (IntrinsicsNVVM.td:2289) |
| 1536 | nvvm_suld_3d_v2i16_trap, // llvm.nvvm.suld.3d.v2i16.trap (IntrinsicsNVVM.td:2289) |
| 1537 | nvvm_suld_3d_v2i16_zero, // llvm.nvvm.suld.3d.v2i16.zero (IntrinsicsNVVM.td:2289) |
| 1538 | nvvm_suld_3d_v2i32_clamp, // llvm.nvvm.suld.3d.v2i32.clamp (IntrinsicsNVVM.td:2289) |
| 1539 | nvvm_suld_3d_v2i32_trap, // llvm.nvvm.suld.3d.v2i32.trap (IntrinsicsNVVM.td:2289) |
| 1540 | nvvm_suld_3d_v2i32_zero, // llvm.nvvm.suld.3d.v2i32.zero (IntrinsicsNVVM.td:2289) |
| 1541 | nvvm_suld_3d_v2i64_clamp, // llvm.nvvm.suld.3d.v2i64.clamp (IntrinsicsNVVM.td:2289) |
| 1542 | nvvm_suld_3d_v2i64_trap, // llvm.nvvm.suld.3d.v2i64.trap (IntrinsicsNVVM.td:2289) |
| 1543 | nvvm_suld_3d_v2i64_zero, // llvm.nvvm.suld.3d.v2i64.zero (IntrinsicsNVVM.td:2289) |
| 1544 | nvvm_suld_3d_v2i8_clamp, // llvm.nvvm.suld.3d.v2i8.clamp (IntrinsicsNVVM.td:2289) |
| 1545 | nvvm_suld_3d_v2i8_trap, // llvm.nvvm.suld.3d.v2i8.trap (IntrinsicsNVVM.td:2289) |
| 1546 | nvvm_suld_3d_v2i8_zero, // llvm.nvvm.suld.3d.v2i8.zero (IntrinsicsNVVM.td:2289) |
| 1547 | nvvm_suld_3d_v4i16_clamp, // llvm.nvvm.suld.3d.v4i16.clamp (IntrinsicsNVVM.td:2289) |
| 1548 | nvvm_suld_3d_v4i16_trap, // llvm.nvvm.suld.3d.v4i16.trap (IntrinsicsNVVM.td:2289) |
| 1549 | nvvm_suld_3d_v4i16_zero, // llvm.nvvm.suld.3d.v4i16.zero (IntrinsicsNVVM.td:2289) |
| 1550 | nvvm_suld_3d_v4i32_clamp, // llvm.nvvm.suld.3d.v4i32.clamp (IntrinsicsNVVM.td:2289) |
| 1551 | nvvm_suld_3d_v4i32_trap, // llvm.nvvm.suld.3d.v4i32.trap (IntrinsicsNVVM.td:2289) |
| 1552 | nvvm_suld_3d_v4i32_zero, // llvm.nvvm.suld.3d.v4i32.zero (IntrinsicsNVVM.td:2289) |
| 1553 | nvvm_suld_3d_v4i8_clamp, // llvm.nvvm.suld.3d.v4i8.clamp (IntrinsicsNVVM.td:2289) |
| 1554 | nvvm_suld_3d_v4i8_trap, // llvm.nvvm.suld.3d.v4i8.trap (IntrinsicsNVVM.td:2289) |
| 1555 | nvvm_suld_3d_v4i8_zero, // llvm.nvvm.suld.3d.v4i8.zero (IntrinsicsNVVM.td:2289) |
| 1556 | nvvm_suq_array_size, // llvm.nvvm.suq.array.size (IntrinsicsNVVM.td:2307) |
| 1557 | nvvm_suq_channel_data_type, // llvm.nvvm.suq.channel.data.type (IntrinsicsNVVM.td:2307) |
| 1558 | nvvm_suq_channel_order, // llvm.nvvm.suq.channel.order (IntrinsicsNVVM.td:2307) |
| 1559 | nvvm_suq_depth, // llvm.nvvm.suq.depth (IntrinsicsNVVM.td:2307) |
| 1560 | nvvm_suq_height, // llvm.nvvm.suq.height (IntrinsicsNVVM.td:2307) |
| 1561 | nvvm_suq_width, // llvm.nvvm.suq.width (IntrinsicsNVVM.td:2307) |
| 1562 | nvvm_sust_b_1d_array_i16_clamp, // llvm.nvvm.sust.b.1d.array.i16.clamp (IntrinsicsNVVM.td:2324) |
| 1563 | nvvm_sust_b_1d_array_i16_trap, // llvm.nvvm.sust.b.1d.array.i16.trap (IntrinsicsNVVM.td:2324) |
| 1564 | nvvm_sust_b_1d_array_i16_zero, // llvm.nvvm.sust.b.1d.array.i16.zero (IntrinsicsNVVM.td:2324) |
| 1565 | nvvm_sust_b_1d_array_i32_clamp, // llvm.nvvm.sust.b.1d.array.i32.clamp (IntrinsicsNVVM.td:2324) |
| 1566 | nvvm_sust_b_1d_array_i32_trap, // llvm.nvvm.sust.b.1d.array.i32.trap (IntrinsicsNVVM.td:2324) |
| 1567 | nvvm_sust_b_1d_array_i32_zero, // llvm.nvvm.sust.b.1d.array.i32.zero (IntrinsicsNVVM.td:2324) |
| 1568 | nvvm_sust_b_1d_array_i64_clamp, // llvm.nvvm.sust.b.1d.array.i64.clamp (IntrinsicsNVVM.td:2324) |
| 1569 | nvvm_sust_b_1d_array_i64_trap, // llvm.nvvm.sust.b.1d.array.i64.trap (IntrinsicsNVVM.td:2324) |
| 1570 | nvvm_sust_b_1d_array_i64_zero, // llvm.nvvm.sust.b.1d.array.i64.zero (IntrinsicsNVVM.td:2324) |
| 1571 | nvvm_sust_b_1d_array_i8_clamp, // llvm.nvvm.sust.b.1d.array.i8.clamp (IntrinsicsNVVM.td:2324) |
| 1572 | nvvm_sust_b_1d_array_i8_trap, // llvm.nvvm.sust.b.1d.array.i8.trap (IntrinsicsNVVM.td:2324) |
| 1573 | nvvm_sust_b_1d_array_i8_zero, // llvm.nvvm.sust.b.1d.array.i8.zero (IntrinsicsNVVM.td:2324) |
| 1574 | nvvm_sust_b_1d_array_v2i16_clamp, // llvm.nvvm.sust.b.1d.array.v2i16.clamp (IntrinsicsNVVM.td:2324) |
| 1575 | nvvm_sust_b_1d_array_v2i16_trap, // llvm.nvvm.sust.b.1d.array.v2i16.trap (IntrinsicsNVVM.td:2324) |
| 1576 | nvvm_sust_b_1d_array_v2i16_zero, // llvm.nvvm.sust.b.1d.array.v2i16.zero (IntrinsicsNVVM.td:2324) |
| 1577 | nvvm_sust_b_1d_array_v2i32_clamp, // llvm.nvvm.sust.b.1d.array.v2i32.clamp (IntrinsicsNVVM.td:2324) |
| 1578 | nvvm_sust_b_1d_array_v2i32_trap, // llvm.nvvm.sust.b.1d.array.v2i32.trap (IntrinsicsNVVM.td:2324) |
| 1579 | nvvm_sust_b_1d_array_v2i32_zero, // llvm.nvvm.sust.b.1d.array.v2i32.zero (IntrinsicsNVVM.td:2324) |
| 1580 | nvvm_sust_b_1d_array_v2i64_clamp, // llvm.nvvm.sust.b.1d.array.v2i64.clamp (IntrinsicsNVVM.td:2324) |
| 1581 | nvvm_sust_b_1d_array_v2i64_trap, // llvm.nvvm.sust.b.1d.array.v2i64.trap (IntrinsicsNVVM.td:2324) |
| 1582 | nvvm_sust_b_1d_array_v2i64_zero, // llvm.nvvm.sust.b.1d.array.v2i64.zero (IntrinsicsNVVM.td:2324) |
| 1583 | nvvm_sust_b_1d_array_v2i8_clamp, // llvm.nvvm.sust.b.1d.array.v2i8.clamp (IntrinsicsNVVM.td:2324) |
| 1584 | nvvm_sust_b_1d_array_v2i8_trap, // llvm.nvvm.sust.b.1d.array.v2i8.trap (IntrinsicsNVVM.td:2324) |
| 1585 | nvvm_sust_b_1d_array_v2i8_zero, // llvm.nvvm.sust.b.1d.array.v2i8.zero (IntrinsicsNVVM.td:2324) |
| 1586 | nvvm_sust_b_1d_array_v4i16_clamp, // llvm.nvvm.sust.b.1d.array.v4i16.clamp (IntrinsicsNVVM.td:2324) |
| 1587 | nvvm_sust_b_1d_array_v4i16_trap, // llvm.nvvm.sust.b.1d.array.v4i16.trap (IntrinsicsNVVM.td:2324) |
| 1588 | nvvm_sust_b_1d_array_v4i16_zero, // llvm.nvvm.sust.b.1d.array.v4i16.zero (IntrinsicsNVVM.td:2324) |
| 1589 | nvvm_sust_b_1d_array_v4i32_clamp, // llvm.nvvm.sust.b.1d.array.v4i32.clamp (IntrinsicsNVVM.td:2324) |
| 1590 | nvvm_sust_b_1d_array_v4i32_trap, // llvm.nvvm.sust.b.1d.array.v4i32.trap (IntrinsicsNVVM.td:2324) |
| 1591 | nvvm_sust_b_1d_array_v4i32_zero, // llvm.nvvm.sust.b.1d.array.v4i32.zero (IntrinsicsNVVM.td:2324) |
| 1592 | nvvm_sust_b_1d_array_v4i8_clamp, // llvm.nvvm.sust.b.1d.array.v4i8.clamp (IntrinsicsNVVM.td:2324) |
| 1593 | nvvm_sust_b_1d_array_v4i8_trap, // llvm.nvvm.sust.b.1d.array.v4i8.trap (IntrinsicsNVVM.td:2324) |
| 1594 | nvvm_sust_b_1d_array_v4i8_zero, // llvm.nvvm.sust.b.1d.array.v4i8.zero (IntrinsicsNVVM.td:2324) |
| 1595 | nvvm_sust_b_1d_i16_clamp, // llvm.nvvm.sust.b.1d.i16.clamp (IntrinsicsNVVM.td:2321) |
| 1596 | nvvm_sust_b_1d_i16_trap, // llvm.nvvm.sust.b.1d.i16.trap (IntrinsicsNVVM.td:2321) |
| 1597 | nvvm_sust_b_1d_i16_zero, // llvm.nvvm.sust.b.1d.i16.zero (IntrinsicsNVVM.td:2321) |
| 1598 | nvvm_sust_b_1d_i32_clamp, // llvm.nvvm.sust.b.1d.i32.clamp (IntrinsicsNVVM.td:2321) |
| 1599 | nvvm_sust_b_1d_i32_trap, // llvm.nvvm.sust.b.1d.i32.trap (IntrinsicsNVVM.td:2321) |
| 1600 | nvvm_sust_b_1d_i32_zero, // llvm.nvvm.sust.b.1d.i32.zero (IntrinsicsNVVM.td:2321) |
| 1601 | nvvm_sust_b_1d_i64_clamp, // llvm.nvvm.sust.b.1d.i64.clamp (IntrinsicsNVVM.td:2321) |
| 1602 | nvvm_sust_b_1d_i64_trap, // llvm.nvvm.sust.b.1d.i64.trap (IntrinsicsNVVM.td:2321) |
| 1603 | nvvm_sust_b_1d_i64_zero, // llvm.nvvm.sust.b.1d.i64.zero (IntrinsicsNVVM.td:2321) |
| 1604 | nvvm_sust_b_1d_i8_clamp, // llvm.nvvm.sust.b.1d.i8.clamp (IntrinsicsNVVM.td:2321) |
| 1605 | nvvm_sust_b_1d_i8_trap, // llvm.nvvm.sust.b.1d.i8.trap (IntrinsicsNVVM.td:2321) |
| 1606 | nvvm_sust_b_1d_i8_zero, // llvm.nvvm.sust.b.1d.i8.zero (IntrinsicsNVVM.td:2321) |
| 1607 | nvvm_sust_b_1d_v2i16_clamp, // llvm.nvvm.sust.b.1d.v2i16.clamp (IntrinsicsNVVM.td:2321) |
| 1608 | nvvm_sust_b_1d_v2i16_trap, // llvm.nvvm.sust.b.1d.v2i16.trap (IntrinsicsNVVM.td:2321) |
| 1609 | nvvm_sust_b_1d_v2i16_zero, // llvm.nvvm.sust.b.1d.v2i16.zero (IntrinsicsNVVM.td:2321) |
| 1610 | nvvm_sust_b_1d_v2i32_clamp, // llvm.nvvm.sust.b.1d.v2i32.clamp (IntrinsicsNVVM.td:2321) |
| 1611 | nvvm_sust_b_1d_v2i32_trap, // llvm.nvvm.sust.b.1d.v2i32.trap (IntrinsicsNVVM.td:2321) |
| 1612 | nvvm_sust_b_1d_v2i32_zero, // llvm.nvvm.sust.b.1d.v2i32.zero (IntrinsicsNVVM.td:2321) |
| 1613 | nvvm_sust_b_1d_v2i64_clamp, // llvm.nvvm.sust.b.1d.v2i64.clamp (IntrinsicsNVVM.td:2321) |
| 1614 | nvvm_sust_b_1d_v2i64_trap, // llvm.nvvm.sust.b.1d.v2i64.trap (IntrinsicsNVVM.td:2321) |
| 1615 | nvvm_sust_b_1d_v2i64_zero, // llvm.nvvm.sust.b.1d.v2i64.zero (IntrinsicsNVVM.td:2321) |
| 1616 | nvvm_sust_b_1d_v2i8_clamp, // llvm.nvvm.sust.b.1d.v2i8.clamp (IntrinsicsNVVM.td:2321) |
| 1617 | nvvm_sust_b_1d_v2i8_trap, // llvm.nvvm.sust.b.1d.v2i8.trap (IntrinsicsNVVM.td:2321) |
| 1618 | nvvm_sust_b_1d_v2i8_zero, // llvm.nvvm.sust.b.1d.v2i8.zero (IntrinsicsNVVM.td:2321) |
| 1619 | nvvm_sust_b_1d_v4i16_clamp, // llvm.nvvm.sust.b.1d.v4i16.clamp (IntrinsicsNVVM.td:2321) |
| 1620 | nvvm_sust_b_1d_v4i16_trap, // llvm.nvvm.sust.b.1d.v4i16.trap (IntrinsicsNVVM.td:2321) |
| 1621 | nvvm_sust_b_1d_v4i16_zero, // llvm.nvvm.sust.b.1d.v4i16.zero (IntrinsicsNVVM.td:2321) |
| 1622 | nvvm_sust_b_1d_v4i32_clamp, // llvm.nvvm.sust.b.1d.v4i32.clamp (IntrinsicsNVVM.td:2321) |
| 1623 | nvvm_sust_b_1d_v4i32_trap, // llvm.nvvm.sust.b.1d.v4i32.trap (IntrinsicsNVVM.td:2321) |
| 1624 | nvvm_sust_b_1d_v4i32_zero, // llvm.nvvm.sust.b.1d.v4i32.zero (IntrinsicsNVVM.td:2321) |
| 1625 | nvvm_sust_b_1d_v4i8_clamp, // llvm.nvvm.sust.b.1d.v4i8.clamp (IntrinsicsNVVM.td:2321) |
| 1626 | nvvm_sust_b_1d_v4i8_trap, // llvm.nvvm.sust.b.1d.v4i8.trap (IntrinsicsNVVM.td:2321) |
| 1627 | nvvm_sust_b_1d_v4i8_zero, // llvm.nvvm.sust.b.1d.v4i8.zero (IntrinsicsNVVM.td:2321) |
| 1628 | nvvm_sust_b_2d_array_i16_clamp, // llvm.nvvm.sust.b.2d.array.i16.clamp (IntrinsicsNVVM.td:2330) |
| 1629 | nvvm_sust_b_2d_array_i16_trap, // llvm.nvvm.sust.b.2d.array.i16.trap (IntrinsicsNVVM.td:2330) |
| 1630 | nvvm_sust_b_2d_array_i16_zero, // llvm.nvvm.sust.b.2d.array.i16.zero (IntrinsicsNVVM.td:2330) |
| 1631 | nvvm_sust_b_2d_array_i32_clamp, // llvm.nvvm.sust.b.2d.array.i32.clamp (IntrinsicsNVVM.td:2330) |
| 1632 | nvvm_sust_b_2d_array_i32_trap, // llvm.nvvm.sust.b.2d.array.i32.trap (IntrinsicsNVVM.td:2330) |
| 1633 | nvvm_sust_b_2d_array_i32_zero, // llvm.nvvm.sust.b.2d.array.i32.zero (IntrinsicsNVVM.td:2330) |
| 1634 | nvvm_sust_b_2d_array_i64_clamp, // llvm.nvvm.sust.b.2d.array.i64.clamp (IntrinsicsNVVM.td:2330) |
| 1635 | nvvm_sust_b_2d_array_i64_trap, // llvm.nvvm.sust.b.2d.array.i64.trap (IntrinsicsNVVM.td:2330) |
| 1636 | nvvm_sust_b_2d_array_i64_zero, // llvm.nvvm.sust.b.2d.array.i64.zero (IntrinsicsNVVM.td:2330) |
| 1637 | nvvm_sust_b_2d_array_i8_clamp, // llvm.nvvm.sust.b.2d.array.i8.clamp (IntrinsicsNVVM.td:2330) |
| 1638 | nvvm_sust_b_2d_array_i8_trap, // llvm.nvvm.sust.b.2d.array.i8.trap (IntrinsicsNVVM.td:2330) |
| 1639 | nvvm_sust_b_2d_array_i8_zero, // llvm.nvvm.sust.b.2d.array.i8.zero (IntrinsicsNVVM.td:2330) |
| 1640 | nvvm_sust_b_2d_array_v2i16_clamp, // llvm.nvvm.sust.b.2d.array.v2i16.clamp (IntrinsicsNVVM.td:2330) |
| 1641 | nvvm_sust_b_2d_array_v2i16_trap, // llvm.nvvm.sust.b.2d.array.v2i16.trap (IntrinsicsNVVM.td:2330) |
| 1642 | nvvm_sust_b_2d_array_v2i16_zero, // llvm.nvvm.sust.b.2d.array.v2i16.zero (IntrinsicsNVVM.td:2330) |
| 1643 | nvvm_sust_b_2d_array_v2i32_clamp, // llvm.nvvm.sust.b.2d.array.v2i32.clamp (IntrinsicsNVVM.td:2330) |
| 1644 | nvvm_sust_b_2d_array_v2i32_trap, // llvm.nvvm.sust.b.2d.array.v2i32.trap (IntrinsicsNVVM.td:2330) |
| 1645 | nvvm_sust_b_2d_array_v2i32_zero, // llvm.nvvm.sust.b.2d.array.v2i32.zero (IntrinsicsNVVM.td:2330) |
| 1646 | nvvm_sust_b_2d_array_v2i64_clamp, // llvm.nvvm.sust.b.2d.array.v2i64.clamp (IntrinsicsNVVM.td:2330) |
| 1647 | nvvm_sust_b_2d_array_v2i64_trap, // llvm.nvvm.sust.b.2d.array.v2i64.trap (IntrinsicsNVVM.td:2330) |
| 1648 | nvvm_sust_b_2d_array_v2i64_zero, // llvm.nvvm.sust.b.2d.array.v2i64.zero (IntrinsicsNVVM.td:2330) |
| 1649 | nvvm_sust_b_2d_array_v2i8_clamp, // llvm.nvvm.sust.b.2d.array.v2i8.clamp (IntrinsicsNVVM.td:2330) |
| 1650 | nvvm_sust_b_2d_array_v2i8_trap, // llvm.nvvm.sust.b.2d.array.v2i8.trap (IntrinsicsNVVM.td:2330) |
| 1651 | nvvm_sust_b_2d_array_v2i8_zero, // llvm.nvvm.sust.b.2d.array.v2i8.zero (IntrinsicsNVVM.td:2330) |
| 1652 | nvvm_sust_b_2d_array_v4i16_clamp, // llvm.nvvm.sust.b.2d.array.v4i16.clamp (IntrinsicsNVVM.td:2330) |
| 1653 | nvvm_sust_b_2d_array_v4i16_trap, // llvm.nvvm.sust.b.2d.array.v4i16.trap (IntrinsicsNVVM.td:2330) |
| 1654 | nvvm_sust_b_2d_array_v4i16_zero, // llvm.nvvm.sust.b.2d.array.v4i16.zero (IntrinsicsNVVM.td:2330) |
| 1655 | nvvm_sust_b_2d_array_v4i32_clamp, // llvm.nvvm.sust.b.2d.array.v4i32.clamp (IntrinsicsNVVM.td:2330) |
| 1656 | nvvm_sust_b_2d_array_v4i32_trap, // llvm.nvvm.sust.b.2d.array.v4i32.trap (IntrinsicsNVVM.td:2330) |
| 1657 | nvvm_sust_b_2d_array_v4i32_zero, // llvm.nvvm.sust.b.2d.array.v4i32.zero (IntrinsicsNVVM.td:2330) |
| 1658 | nvvm_sust_b_2d_array_v4i8_clamp, // llvm.nvvm.sust.b.2d.array.v4i8.clamp (IntrinsicsNVVM.td:2330) |
| 1659 | nvvm_sust_b_2d_array_v4i8_trap, // llvm.nvvm.sust.b.2d.array.v4i8.trap (IntrinsicsNVVM.td:2330) |
| 1660 | nvvm_sust_b_2d_array_v4i8_zero, // llvm.nvvm.sust.b.2d.array.v4i8.zero (IntrinsicsNVVM.td:2330) |
| 1661 | nvvm_sust_b_2d_i16_clamp, // llvm.nvvm.sust.b.2d.i16.clamp (IntrinsicsNVVM.td:2327) |
| 1662 | nvvm_sust_b_2d_i16_trap, // llvm.nvvm.sust.b.2d.i16.trap (IntrinsicsNVVM.td:2327) |
| 1663 | nvvm_sust_b_2d_i16_zero, // llvm.nvvm.sust.b.2d.i16.zero (IntrinsicsNVVM.td:2327) |
| 1664 | nvvm_sust_b_2d_i32_clamp, // llvm.nvvm.sust.b.2d.i32.clamp (IntrinsicsNVVM.td:2327) |
| 1665 | nvvm_sust_b_2d_i32_trap, // llvm.nvvm.sust.b.2d.i32.trap (IntrinsicsNVVM.td:2327) |
| 1666 | nvvm_sust_b_2d_i32_zero, // llvm.nvvm.sust.b.2d.i32.zero (IntrinsicsNVVM.td:2327) |
| 1667 | nvvm_sust_b_2d_i64_clamp, // llvm.nvvm.sust.b.2d.i64.clamp (IntrinsicsNVVM.td:2327) |
| 1668 | nvvm_sust_b_2d_i64_trap, // llvm.nvvm.sust.b.2d.i64.trap (IntrinsicsNVVM.td:2327) |
| 1669 | nvvm_sust_b_2d_i64_zero, // llvm.nvvm.sust.b.2d.i64.zero (IntrinsicsNVVM.td:2327) |
| 1670 | nvvm_sust_b_2d_i8_clamp, // llvm.nvvm.sust.b.2d.i8.clamp (IntrinsicsNVVM.td:2327) |
| 1671 | nvvm_sust_b_2d_i8_trap, // llvm.nvvm.sust.b.2d.i8.trap (IntrinsicsNVVM.td:2327) |
| 1672 | nvvm_sust_b_2d_i8_zero, // llvm.nvvm.sust.b.2d.i8.zero (IntrinsicsNVVM.td:2327) |
| 1673 | nvvm_sust_b_2d_v2i16_clamp, // llvm.nvvm.sust.b.2d.v2i16.clamp (IntrinsicsNVVM.td:2327) |
| 1674 | nvvm_sust_b_2d_v2i16_trap, // llvm.nvvm.sust.b.2d.v2i16.trap (IntrinsicsNVVM.td:2327) |
| 1675 | nvvm_sust_b_2d_v2i16_zero, // llvm.nvvm.sust.b.2d.v2i16.zero (IntrinsicsNVVM.td:2327) |
| 1676 | nvvm_sust_b_2d_v2i32_clamp, // llvm.nvvm.sust.b.2d.v2i32.clamp (IntrinsicsNVVM.td:2327) |
| 1677 | nvvm_sust_b_2d_v2i32_trap, // llvm.nvvm.sust.b.2d.v2i32.trap (IntrinsicsNVVM.td:2327) |
| 1678 | nvvm_sust_b_2d_v2i32_zero, // llvm.nvvm.sust.b.2d.v2i32.zero (IntrinsicsNVVM.td:2327) |
| 1679 | nvvm_sust_b_2d_v2i64_clamp, // llvm.nvvm.sust.b.2d.v2i64.clamp (IntrinsicsNVVM.td:2327) |
| 1680 | nvvm_sust_b_2d_v2i64_trap, // llvm.nvvm.sust.b.2d.v2i64.trap (IntrinsicsNVVM.td:2327) |
| 1681 | nvvm_sust_b_2d_v2i64_zero, // llvm.nvvm.sust.b.2d.v2i64.zero (IntrinsicsNVVM.td:2327) |
| 1682 | nvvm_sust_b_2d_v2i8_clamp, // llvm.nvvm.sust.b.2d.v2i8.clamp (IntrinsicsNVVM.td:2327) |
| 1683 | nvvm_sust_b_2d_v2i8_trap, // llvm.nvvm.sust.b.2d.v2i8.trap (IntrinsicsNVVM.td:2327) |
| 1684 | nvvm_sust_b_2d_v2i8_zero, // llvm.nvvm.sust.b.2d.v2i8.zero (IntrinsicsNVVM.td:2327) |
| 1685 | nvvm_sust_b_2d_v4i16_clamp, // llvm.nvvm.sust.b.2d.v4i16.clamp (IntrinsicsNVVM.td:2327) |
| 1686 | nvvm_sust_b_2d_v4i16_trap, // llvm.nvvm.sust.b.2d.v4i16.trap (IntrinsicsNVVM.td:2327) |
| 1687 | nvvm_sust_b_2d_v4i16_zero, // llvm.nvvm.sust.b.2d.v4i16.zero (IntrinsicsNVVM.td:2327) |
| 1688 | nvvm_sust_b_2d_v4i32_clamp, // llvm.nvvm.sust.b.2d.v4i32.clamp (IntrinsicsNVVM.td:2327) |
| 1689 | nvvm_sust_b_2d_v4i32_trap, // llvm.nvvm.sust.b.2d.v4i32.trap (IntrinsicsNVVM.td:2327) |
| 1690 | nvvm_sust_b_2d_v4i32_zero, // llvm.nvvm.sust.b.2d.v4i32.zero (IntrinsicsNVVM.td:2327) |
| 1691 | nvvm_sust_b_2d_v4i8_clamp, // llvm.nvvm.sust.b.2d.v4i8.clamp (IntrinsicsNVVM.td:2327) |
| 1692 | nvvm_sust_b_2d_v4i8_trap, // llvm.nvvm.sust.b.2d.v4i8.trap (IntrinsicsNVVM.td:2327) |
| 1693 | nvvm_sust_b_2d_v4i8_zero, // llvm.nvvm.sust.b.2d.v4i8.zero (IntrinsicsNVVM.td:2327) |
| 1694 | nvvm_sust_b_3d_i16_clamp, // llvm.nvvm.sust.b.3d.i16.clamp (IntrinsicsNVVM.td:2333) |
| 1695 | nvvm_sust_b_3d_i16_trap, // llvm.nvvm.sust.b.3d.i16.trap (IntrinsicsNVVM.td:2333) |
| 1696 | nvvm_sust_b_3d_i16_zero, // llvm.nvvm.sust.b.3d.i16.zero (IntrinsicsNVVM.td:2333) |
| 1697 | nvvm_sust_b_3d_i32_clamp, // llvm.nvvm.sust.b.3d.i32.clamp (IntrinsicsNVVM.td:2333) |
| 1698 | nvvm_sust_b_3d_i32_trap, // llvm.nvvm.sust.b.3d.i32.trap (IntrinsicsNVVM.td:2333) |
| 1699 | nvvm_sust_b_3d_i32_zero, // llvm.nvvm.sust.b.3d.i32.zero (IntrinsicsNVVM.td:2333) |
| 1700 | nvvm_sust_b_3d_i64_clamp, // llvm.nvvm.sust.b.3d.i64.clamp (IntrinsicsNVVM.td:2333) |
| 1701 | nvvm_sust_b_3d_i64_trap, // llvm.nvvm.sust.b.3d.i64.trap (IntrinsicsNVVM.td:2333) |
| 1702 | nvvm_sust_b_3d_i64_zero, // llvm.nvvm.sust.b.3d.i64.zero (IntrinsicsNVVM.td:2333) |
| 1703 | nvvm_sust_b_3d_i8_clamp, // llvm.nvvm.sust.b.3d.i8.clamp (IntrinsicsNVVM.td:2333) |
| 1704 | nvvm_sust_b_3d_i8_trap, // llvm.nvvm.sust.b.3d.i8.trap (IntrinsicsNVVM.td:2333) |
| 1705 | nvvm_sust_b_3d_i8_zero, // llvm.nvvm.sust.b.3d.i8.zero (IntrinsicsNVVM.td:2333) |
| 1706 | nvvm_sust_b_3d_v2i16_clamp, // llvm.nvvm.sust.b.3d.v2i16.clamp (IntrinsicsNVVM.td:2333) |
| 1707 | nvvm_sust_b_3d_v2i16_trap, // llvm.nvvm.sust.b.3d.v2i16.trap (IntrinsicsNVVM.td:2333) |
| 1708 | nvvm_sust_b_3d_v2i16_zero, // llvm.nvvm.sust.b.3d.v2i16.zero (IntrinsicsNVVM.td:2333) |
| 1709 | nvvm_sust_b_3d_v2i32_clamp, // llvm.nvvm.sust.b.3d.v2i32.clamp (IntrinsicsNVVM.td:2333) |
| 1710 | nvvm_sust_b_3d_v2i32_trap, // llvm.nvvm.sust.b.3d.v2i32.trap (IntrinsicsNVVM.td:2333) |
| 1711 | nvvm_sust_b_3d_v2i32_zero, // llvm.nvvm.sust.b.3d.v2i32.zero (IntrinsicsNVVM.td:2333) |
| 1712 | nvvm_sust_b_3d_v2i64_clamp, // llvm.nvvm.sust.b.3d.v2i64.clamp (IntrinsicsNVVM.td:2333) |
| 1713 | nvvm_sust_b_3d_v2i64_trap, // llvm.nvvm.sust.b.3d.v2i64.trap (IntrinsicsNVVM.td:2333) |
| 1714 | nvvm_sust_b_3d_v2i64_zero, // llvm.nvvm.sust.b.3d.v2i64.zero (IntrinsicsNVVM.td:2333) |
| 1715 | nvvm_sust_b_3d_v2i8_clamp, // llvm.nvvm.sust.b.3d.v2i8.clamp (IntrinsicsNVVM.td:2333) |
| 1716 | nvvm_sust_b_3d_v2i8_trap, // llvm.nvvm.sust.b.3d.v2i8.trap (IntrinsicsNVVM.td:2333) |
| 1717 | nvvm_sust_b_3d_v2i8_zero, // llvm.nvvm.sust.b.3d.v2i8.zero (IntrinsicsNVVM.td:2333) |
| 1718 | nvvm_sust_b_3d_v4i16_clamp, // llvm.nvvm.sust.b.3d.v4i16.clamp (IntrinsicsNVVM.td:2333) |
| 1719 | nvvm_sust_b_3d_v4i16_trap, // llvm.nvvm.sust.b.3d.v4i16.trap (IntrinsicsNVVM.td:2333) |
| 1720 | nvvm_sust_b_3d_v4i16_zero, // llvm.nvvm.sust.b.3d.v4i16.zero (IntrinsicsNVVM.td:2333) |
| 1721 | nvvm_sust_b_3d_v4i32_clamp, // llvm.nvvm.sust.b.3d.v4i32.clamp (IntrinsicsNVVM.td:2333) |
| 1722 | nvvm_sust_b_3d_v4i32_trap, // llvm.nvvm.sust.b.3d.v4i32.trap (IntrinsicsNVVM.td:2333) |
| 1723 | nvvm_sust_b_3d_v4i32_zero, // llvm.nvvm.sust.b.3d.v4i32.zero (IntrinsicsNVVM.td:2333) |
| 1724 | nvvm_sust_b_3d_v4i8_clamp, // llvm.nvvm.sust.b.3d.v4i8.clamp (IntrinsicsNVVM.td:2333) |
| 1725 | nvvm_sust_b_3d_v4i8_trap, // llvm.nvvm.sust.b.3d.v4i8.trap (IntrinsicsNVVM.td:2333) |
| 1726 | nvvm_sust_b_3d_v4i8_zero, // llvm.nvvm.sust.b.3d.v4i8.zero (IntrinsicsNVVM.td:2333) |
| 1727 | nvvm_sust_p_1d_array_i16_trap, // llvm.nvvm.sust.p.1d.array.i16.trap (IntrinsicsNVVM.td:2324) |
| 1728 | nvvm_sust_p_1d_array_i32_trap, // llvm.nvvm.sust.p.1d.array.i32.trap (IntrinsicsNVVM.td:2324) |
| 1729 | nvvm_sust_p_1d_array_i8_trap, // llvm.nvvm.sust.p.1d.array.i8.trap (IntrinsicsNVVM.td:2324) |
| 1730 | nvvm_sust_p_1d_array_v2i16_trap, // llvm.nvvm.sust.p.1d.array.v2i16.trap (IntrinsicsNVVM.td:2324) |
| 1731 | nvvm_sust_p_1d_array_v2i32_trap, // llvm.nvvm.sust.p.1d.array.v2i32.trap (IntrinsicsNVVM.td:2324) |
| 1732 | nvvm_sust_p_1d_array_v2i8_trap, // llvm.nvvm.sust.p.1d.array.v2i8.trap (IntrinsicsNVVM.td:2324) |
| 1733 | nvvm_sust_p_1d_array_v4i16_trap, // llvm.nvvm.sust.p.1d.array.v4i16.trap (IntrinsicsNVVM.td:2324) |
| 1734 | nvvm_sust_p_1d_array_v4i32_trap, // llvm.nvvm.sust.p.1d.array.v4i32.trap (IntrinsicsNVVM.td:2324) |
| 1735 | nvvm_sust_p_1d_array_v4i8_trap, // llvm.nvvm.sust.p.1d.array.v4i8.trap (IntrinsicsNVVM.td:2324) |
| 1736 | nvvm_sust_p_1d_i16_trap, // llvm.nvvm.sust.p.1d.i16.trap (IntrinsicsNVVM.td:2321) |
| 1737 | nvvm_sust_p_1d_i32_trap, // llvm.nvvm.sust.p.1d.i32.trap (IntrinsicsNVVM.td:2321) |
| 1738 | nvvm_sust_p_1d_i8_trap, // llvm.nvvm.sust.p.1d.i8.trap (IntrinsicsNVVM.td:2321) |
| 1739 | nvvm_sust_p_1d_v2i16_trap, // llvm.nvvm.sust.p.1d.v2i16.trap (IntrinsicsNVVM.td:2321) |
| 1740 | nvvm_sust_p_1d_v2i32_trap, // llvm.nvvm.sust.p.1d.v2i32.trap (IntrinsicsNVVM.td:2321) |
| 1741 | nvvm_sust_p_1d_v2i8_trap, // llvm.nvvm.sust.p.1d.v2i8.trap (IntrinsicsNVVM.td:2321) |
| 1742 | nvvm_sust_p_1d_v4i16_trap, // llvm.nvvm.sust.p.1d.v4i16.trap (IntrinsicsNVVM.td:2321) |
| 1743 | nvvm_sust_p_1d_v4i32_trap, // llvm.nvvm.sust.p.1d.v4i32.trap (IntrinsicsNVVM.td:2321) |
| 1744 | nvvm_sust_p_1d_v4i8_trap, // llvm.nvvm.sust.p.1d.v4i8.trap (IntrinsicsNVVM.td:2321) |
| 1745 | nvvm_sust_p_2d_array_i16_trap, // llvm.nvvm.sust.p.2d.array.i16.trap (IntrinsicsNVVM.td:2330) |
| 1746 | nvvm_sust_p_2d_array_i32_trap, // llvm.nvvm.sust.p.2d.array.i32.trap (IntrinsicsNVVM.td:2330) |
| 1747 | nvvm_sust_p_2d_array_i8_trap, // llvm.nvvm.sust.p.2d.array.i8.trap (IntrinsicsNVVM.td:2330) |
| 1748 | nvvm_sust_p_2d_array_v2i16_trap, // llvm.nvvm.sust.p.2d.array.v2i16.trap (IntrinsicsNVVM.td:2330) |
| 1749 | nvvm_sust_p_2d_array_v2i32_trap, // llvm.nvvm.sust.p.2d.array.v2i32.trap (IntrinsicsNVVM.td:2330) |
| 1750 | nvvm_sust_p_2d_array_v2i8_trap, // llvm.nvvm.sust.p.2d.array.v2i8.trap (IntrinsicsNVVM.td:2330) |
| 1751 | nvvm_sust_p_2d_array_v4i16_trap, // llvm.nvvm.sust.p.2d.array.v4i16.trap (IntrinsicsNVVM.td:2330) |
| 1752 | nvvm_sust_p_2d_array_v4i32_trap, // llvm.nvvm.sust.p.2d.array.v4i32.trap (IntrinsicsNVVM.td:2330) |
| 1753 | nvvm_sust_p_2d_array_v4i8_trap, // llvm.nvvm.sust.p.2d.array.v4i8.trap (IntrinsicsNVVM.td:2330) |
| 1754 | nvvm_sust_p_2d_i16_trap, // llvm.nvvm.sust.p.2d.i16.trap (IntrinsicsNVVM.td:2327) |
| 1755 | nvvm_sust_p_2d_i32_trap, // llvm.nvvm.sust.p.2d.i32.trap (IntrinsicsNVVM.td:2327) |
| 1756 | nvvm_sust_p_2d_i8_trap, // llvm.nvvm.sust.p.2d.i8.trap (IntrinsicsNVVM.td:2327) |
| 1757 | nvvm_sust_p_2d_v2i16_trap, // llvm.nvvm.sust.p.2d.v2i16.trap (IntrinsicsNVVM.td:2327) |
| 1758 | nvvm_sust_p_2d_v2i32_trap, // llvm.nvvm.sust.p.2d.v2i32.trap (IntrinsicsNVVM.td:2327) |
| 1759 | nvvm_sust_p_2d_v2i8_trap, // llvm.nvvm.sust.p.2d.v2i8.trap (IntrinsicsNVVM.td:2327) |
| 1760 | nvvm_sust_p_2d_v4i16_trap, // llvm.nvvm.sust.p.2d.v4i16.trap (IntrinsicsNVVM.td:2327) |
| 1761 | nvvm_sust_p_2d_v4i32_trap, // llvm.nvvm.sust.p.2d.v4i32.trap (IntrinsicsNVVM.td:2327) |
| 1762 | nvvm_sust_p_2d_v4i8_trap, // llvm.nvvm.sust.p.2d.v4i8.trap (IntrinsicsNVVM.td:2327) |
| 1763 | nvvm_sust_p_3d_i16_trap, // llvm.nvvm.sust.p.3d.i16.trap (IntrinsicsNVVM.td:2333) |
| 1764 | nvvm_sust_p_3d_i32_trap, // llvm.nvvm.sust.p.3d.i32.trap (IntrinsicsNVVM.td:2333) |
| 1765 | nvvm_sust_p_3d_i8_trap, // llvm.nvvm.sust.p.3d.i8.trap (IntrinsicsNVVM.td:2333) |
| 1766 | nvvm_sust_p_3d_v2i16_trap, // llvm.nvvm.sust.p.3d.v2i16.trap (IntrinsicsNVVM.td:2333) |
| 1767 | nvvm_sust_p_3d_v2i32_trap, // llvm.nvvm.sust.p.3d.v2i32.trap (IntrinsicsNVVM.td:2333) |
| 1768 | nvvm_sust_p_3d_v2i8_trap, // llvm.nvvm.sust.p.3d.v2i8.trap (IntrinsicsNVVM.td:2333) |
| 1769 | nvvm_sust_p_3d_v4i16_trap, // llvm.nvvm.sust.p.3d.v4i16.trap (IntrinsicsNVVM.td:2333) |
| 1770 | nvvm_sust_p_3d_v4i32_trap, // llvm.nvvm.sust.p.3d.v4i32.trap (IntrinsicsNVVM.td:2333) |
| 1771 | nvvm_sust_p_3d_v4i8_trap, // llvm.nvvm.sust.p.3d.v4i8.trap (IntrinsicsNVVM.td:2333) |
| 1772 | nvvm_tcgen05_alloc_cg1, // llvm.nvvm.tcgen05.alloc.cg1 (IntrinsicsNVVM.td:3079) |
| 1773 | nvvm_tcgen05_alloc_cg2, // llvm.nvvm.tcgen05.alloc.cg2 (IntrinsicsNVVM.td:3079) |
| 1774 | nvvm_tcgen05_alloc_shared_cg1, // llvm.nvvm.tcgen05.alloc.shared.cg1 (IntrinsicsNVVM.td:3085) |
| 1775 | nvvm_tcgen05_alloc_shared_cg2, // llvm.nvvm.tcgen05.alloc.shared.cg2 (IntrinsicsNVVM.td:3085) |
| 1776 | nvvm_tcgen05_commit_cg1, // llvm.nvvm.tcgen05.commit.cg1 (IntrinsicsNVVM.td:3100) |
| 1777 | nvvm_tcgen05_commit_cg2, // llvm.nvvm.tcgen05.commit.cg2 (IntrinsicsNVVM.td:3100) |
| 1778 | nvvm_tcgen05_commit_mc_cg1, // llvm.nvvm.tcgen05.commit.mc.cg1 (IntrinsicsNVVM.td:3110) |
| 1779 | nvvm_tcgen05_commit_mc_cg2, // llvm.nvvm.tcgen05.commit.mc.cg2 (IntrinsicsNVVM.td:3110) |
| 1780 | nvvm_tcgen05_commit_mc_shared_cg1, // llvm.nvvm.tcgen05.commit.mc.shared.cg1 (IntrinsicsNVVM.td:3115) |
| 1781 | nvvm_tcgen05_commit_mc_shared_cg2, // llvm.nvvm.tcgen05.commit.mc.shared.cg2 (IntrinsicsNVVM.td:3115) |
| 1782 | nvvm_tcgen05_commit_shared_cg1, // llvm.nvvm.tcgen05.commit.shared.cg1 (IntrinsicsNVVM.td:3105) |
| 1783 | nvvm_tcgen05_commit_shared_cg2, // llvm.nvvm.tcgen05.commit.shared.cg2 (IntrinsicsNVVM.td:3105) |
| 1784 | nvvm_tcgen05_cp_128x128b_b4x16_p64_cg1, // llvm.nvvm.tcgen05.cp.128x128b.b4x16_p64.cg1 (IntrinsicsNVVM.td:3149) |
| 1785 | nvvm_tcgen05_cp_128x128b_b4x16_p64_cg2, // llvm.nvvm.tcgen05.cp.128x128b.b4x16_p64.cg2 (IntrinsicsNVVM.td:3149) |
| 1786 | nvvm_tcgen05_cp_128x128b_b6x16_p32_cg1, // llvm.nvvm.tcgen05.cp.128x128b.b6x16_p32.cg1 (IntrinsicsNVVM.td:3149) |
| 1787 | nvvm_tcgen05_cp_128x128b_b6x16_p32_cg2, // llvm.nvvm.tcgen05.cp.128x128b.b6x16_p32.cg2 (IntrinsicsNVVM.td:3149) |
| 1788 | nvvm_tcgen05_cp_128x128b_cg1, // llvm.nvvm.tcgen05.cp.128x128b.cg1 (IntrinsicsNVVM.td:3149) |
| 1789 | nvvm_tcgen05_cp_128x128b_cg2, // llvm.nvvm.tcgen05.cp.128x128b.cg2 (IntrinsicsNVVM.td:3149) |
| 1790 | nvvm_tcgen05_cp_128x256b_b4x16_p64_cg1, // llvm.nvvm.tcgen05.cp.128x256b.b4x16_p64.cg1 (IntrinsicsNVVM.td:3149) |
| 1791 | nvvm_tcgen05_cp_128x256b_b4x16_p64_cg2, // llvm.nvvm.tcgen05.cp.128x256b.b4x16_p64.cg2 (IntrinsicsNVVM.td:3149) |
| 1792 | nvvm_tcgen05_cp_128x256b_b6x16_p32_cg1, // llvm.nvvm.tcgen05.cp.128x256b.b6x16_p32.cg1 (IntrinsicsNVVM.td:3149) |
| 1793 | nvvm_tcgen05_cp_128x256b_b6x16_p32_cg2, // llvm.nvvm.tcgen05.cp.128x256b.b6x16_p32.cg2 (IntrinsicsNVVM.td:3149) |
| 1794 | nvvm_tcgen05_cp_128x256b_cg1, // llvm.nvvm.tcgen05.cp.128x256b.cg1 (IntrinsicsNVVM.td:3149) |
| 1795 | nvvm_tcgen05_cp_128x256b_cg2, // llvm.nvvm.tcgen05.cp.128x256b.cg2 (IntrinsicsNVVM.td:3149) |
| 1796 | nvvm_tcgen05_cp_32x128b_warpx4_b4x16_p64_cg1, // llvm.nvvm.tcgen05.cp.32x128b_warpx4.b4x16_p64.cg1 (IntrinsicsNVVM.td:3149) |
| 1797 | nvvm_tcgen05_cp_32x128b_warpx4_b4x16_p64_cg2, // llvm.nvvm.tcgen05.cp.32x128b_warpx4.b4x16_p64.cg2 (IntrinsicsNVVM.td:3149) |
| 1798 | nvvm_tcgen05_cp_32x128b_warpx4_b6x16_p32_cg1, // llvm.nvvm.tcgen05.cp.32x128b_warpx4.b6x16_p32.cg1 (IntrinsicsNVVM.td:3149) |
| 1799 | nvvm_tcgen05_cp_32x128b_warpx4_b6x16_p32_cg2, // llvm.nvvm.tcgen05.cp.32x128b_warpx4.b6x16_p32.cg2 (IntrinsicsNVVM.td:3149) |
| 1800 | nvvm_tcgen05_cp_32x128b_warpx4_cg1, // llvm.nvvm.tcgen05.cp.32x128b_warpx4.cg1 (IntrinsicsNVVM.td:3149) |
| 1801 | nvvm_tcgen05_cp_32x128b_warpx4_cg2, // llvm.nvvm.tcgen05.cp.32x128b_warpx4.cg2 (IntrinsicsNVVM.td:3149) |
| 1802 | nvvm_tcgen05_cp_4x256b_b4x16_p64_cg1, // llvm.nvvm.tcgen05.cp.4x256b.b4x16_p64.cg1 (IntrinsicsNVVM.td:3149) |
| 1803 | nvvm_tcgen05_cp_4x256b_b4x16_p64_cg2, // llvm.nvvm.tcgen05.cp.4x256b.b4x16_p64.cg2 (IntrinsicsNVVM.td:3149) |
| 1804 | nvvm_tcgen05_cp_4x256b_b6x16_p32_cg1, // llvm.nvvm.tcgen05.cp.4x256b.b6x16_p32.cg1 (IntrinsicsNVVM.td:3149) |
| 1805 | nvvm_tcgen05_cp_4x256b_b6x16_p32_cg2, // llvm.nvvm.tcgen05.cp.4x256b.b6x16_p32.cg2 (IntrinsicsNVVM.td:3149) |
| 1806 | nvvm_tcgen05_cp_4x256b_cg1, // llvm.nvvm.tcgen05.cp.4x256b.cg1 (IntrinsicsNVVM.td:3149) |
| 1807 | nvvm_tcgen05_cp_4x256b_cg2, // llvm.nvvm.tcgen05.cp.4x256b.cg2 (IntrinsicsNVVM.td:3149) |
| 1808 | nvvm_tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64_cg1, // llvm.nvvm.tcgen05.cp.64x128b_warpx2_01_23.b4x16_p64.cg1 (IntrinsicsNVVM.td:3149) |
| 1809 | nvvm_tcgen05_cp_64x128b_warpx2_01_23_b4x16_p64_cg2, // llvm.nvvm.tcgen05.cp.64x128b_warpx2_01_23.b4x16_p64.cg2 (IntrinsicsNVVM.td:3149) |
| 1810 | nvvm_tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32_cg1, // llvm.nvvm.tcgen05.cp.64x128b_warpx2_01_23.b6x16_p32.cg1 (IntrinsicsNVVM.td:3149) |
| 1811 | nvvm_tcgen05_cp_64x128b_warpx2_01_23_b6x16_p32_cg2, // llvm.nvvm.tcgen05.cp.64x128b_warpx2_01_23.b6x16_p32.cg2 (IntrinsicsNVVM.td:3149) |
| 1812 | nvvm_tcgen05_cp_64x128b_warpx2_01_23_cg1, // llvm.nvvm.tcgen05.cp.64x128b_warpx2_01_23.cg1 (IntrinsicsNVVM.td:3149) |
| 1813 | nvvm_tcgen05_cp_64x128b_warpx2_01_23_cg2, // llvm.nvvm.tcgen05.cp.64x128b_warpx2_01_23.cg2 (IntrinsicsNVVM.td:3149) |
| 1814 | nvvm_tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64_cg1, // llvm.nvvm.tcgen05.cp.64x128b_warpx2_02_13.b4x16_p64.cg1 (IntrinsicsNVVM.td:3149) |
| 1815 | nvvm_tcgen05_cp_64x128b_warpx2_02_13_b4x16_p64_cg2, // llvm.nvvm.tcgen05.cp.64x128b_warpx2_02_13.b4x16_p64.cg2 (IntrinsicsNVVM.td:3149) |
| 1816 | nvvm_tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32_cg1, // llvm.nvvm.tcgen05.cp.64x128b_warpx2_02_13.b6x16_p32.cg1 (IntrinsicsNVVM.td:3149) |
| 1817 | nvvm_tcgen05_cp_64x128b_warpx2_02_13_b6x16_p32_cg2, // llvm.nvvm.tcgen05.cp.64x128b_warpx2_02_13.b6x16_p32.cg2 (IntrinsicsNVVM.td:3149) |
| 1818 | nvvm_tcgen05_cp_64x128b_warpx2_02_13_cg1, // llvm.nvvm.tcgen05.cp.64x128b_warpx2_02_13.cg1 (IntrinsicsNVVM.td:3149) |
| 1819 | nvvm_tcgen05_cp_64x128b_warpx2_02_13_cg2, // llvm.nvvm.tcgen05.cp.64x128b_warpx2_02_13.cg2 (IntrinsicsNVVM.td:3149) |
| 1820 | nvvm_tcgen05_dealloc_cg1, // llvm.nvvm.tcgen05.dealloc.cg1 (IntrinsicsNVVM.td:3091) |
| 1821 | nvvm_tcgen05_dealloc_cg2, // llvm.nvvm.tcgen05.dealloc.cg2 (IntrinsicsNVVM.td:3091) |
| 1822 | nvvm_tcgen05_fence_after_thread_sync, // llvm.nvvm.tcgen05.fence.after.thread.sync (IntrinsicsNVVM.td:3135) |
| 1823 | nvvm_tcgen05_fence_before_thread_sync, // llvm.nvvm.tcgen05.fence.before.thread.sync (IntrinsicsNVVM.td:3133) |
| 1824 | nvvm_tcgen05_ld_16x128b_x1, // llvm.nvvm.tcgen05.ld.16x128b.x1 (IntrinsicsNVVM.td:3195) |
| 1825 | nvvm_tcgen05_ld_16x128b_x16, // llvm.nvvm.tcgen05.ld.16x128b.x16 (IntrinsicsNVVM.td:3195) |
| 1826 | nvvm_tcgen05_ld_16x128b_x2, // llvm.nvvm.tcgen05.ld.16x128b.x2 (IntrinsicsNVVM.td:3195) |
| 1827 | nvvm_tcgen05_ld_16x128b_x32, // llvm.nvvm.tcgen05.ld.16x128b.x32 (IntrinsicsNVVM.td:3195) |
| 1828 | nvvm_tcgen05_ld_16x128b_x4, // llvm.nvvm.tcgen05.ld.16x128b.x4 (IntrinsicsNVVM.td:3195) |
| 1829 | nvvm_tcgen05_ld_16x128b_x64, // llvm.nvvm.tcgen05.ld.16x128b.x64 (IntrinsicsNVVM.td:3195) |
| 1830 | nvvm_tcgen05_ld_16x128b_x8, // llvm.nvvm.tcgen05.ld.16x128b.x8 (IntrinsicsNVVM.td:3195) |
| 1831 | nvvm_tcgen05_ld_16x256b_x1, // llvm.nvvm.tcgen05.ld.16x256b.x1 (IntrinsicsNVVM.td:3195) |
| 1832 | nvvm_tcgen05_ld_16x256b_x16, // llvm.nvvm.tcgen05.ld.16x256b.x16 (IntrinsicsNVVM.td:3195) |
| 1833 | nvvm_tcgen05_ld_16x256b_x2, // llvm.nvvm.tcgen05.ld.16x256b.x2 (IntrinsicsNVVM.td:3195) |
| 1834 | nvvm_tcgen05_ld_16x256b_x32, // llvm.nvvm.tcgen05.ld.16x256b.x32 (IntrinsicsNVVM.td:3195) |
| 1835 | nvvm_tcgen05_ld_16x256b_x4, // llvm.nvvm.tcgen05.ld.16x256b.x4 (IntrinsicsNVVM.td:3195) |
| 1836 | nvvm_tcgen05_ld_16x256b_x8, // llvm.nvvm.tcgen05.ld.16x256b.x8 (IntrinsicsNVVM.td:3195) |
| 1837 | nvvm_tcgen05_ld_16x32bx2_x1, // llvm.nvvm.tcgen05.ld.16x32bx2.x1 (IntrinsicsNVVM.td:3195) |
| 1838 | nvvm_tcgen05_ld_16x32bx2_x128, // llvm.nvvm.tcgen05.ld.16x32bx2.x128 (IntrinsicsNVVM.td:3195) |
| 1839 | nvvm_tcgen05_ld_16x32bx2_x16, // llvm.nvvm.tcgen05.ld.16x32bx2.x16 (IntrinsicsNVVM.td:3195) |
| 1840 | nvvm_tcgen05_ld_16x32bx2_x2, // llvm.nvvm.tcgen05.ld.16x32bx2.x2 (IntrinsicsNVVM.td:3195) |
| 1841 | nvvm_tcgen05_ld_16x32bx2_x32, // llvm.nvvm.tcgen05.ld.16x32bx2.x32 (IntrinsicsNVVM.td:3195) |
| 1842 | nvvm_tcgen05_ld_16x32bx2_x4, // llvm.nvvm.tcgen05.ld.16x32bx2.x4 (IntrinsicsNVVM.td:3195) |
| 1843 | nvvm_tcgen05_ld_16x32bx2_x64, // llvm.nvvm.tcgen05.ld.16x32bx2.x64 (IntrinsicsNVVM.td:3195) |
| 1844 | nvvm_tcgen05_ld_16x32bx2_x8, // llvm.nvvm.tcgen05.ld.16x32bx2.x8 (IntrinsicsNVVM.td:3195) |
| 1845 | nvvm_tcgen05_ld_16x64b_x1, // llvm.nvvm.tcgen05.ld.16x64b.x1 (IntrinsicsNVVM.td:3195) |
| 1846 | nvvm_tcgen05_ld_16x64b_x128, // llvm.nvvm.tcgen05.ld.16x64b.x128 (IntrinsicsNVVM.td:3195) |
| 1847 | nvvm_tcgen05_ld_16x64b_x16, // llvm.nvvm.tcgen05.ld.16x64b.x16 (IntrinsicsNVVM.td:3195) |
| 1848 | nvvm_tcgen05_ld_16x64b_x2, // llvm.nvvm.tcgen05.ld.16x64b.x2 (IntrinsicsNVVM.td:3195) |
| 1849 | nvvm_tcgen05_ld_16x64b_x32, // llvm.nvvm.tcgen05.ld.16x64b.x32 (IntrinsicsNVVM.td:3195) |
| 1850 | nvvm_tcgen05_ld_16x64b_x4, // llvm.nvvm.tcgen05.ld.16x64b.x4 (IntrinsicsNVVM.td:3195) |
| 1851 | nvvm_tcgen05_ld_16x64b_x64, // llvm.nvvm.tcgen05.ld.16x64b.x64 (IntrinsicsNVVM.td:3195) |
| 1852 | nvvm_tcgen05_ld_16x64b_x8, // llvm.nvvm.tcgen05.ld.16x64b.x8 (IntrinsicsNVVM.td:3195) |
| 1853 | nvvm_tcgen05_ld_32x32b_x1, // llvm.nvvm.tcgen05.ld.32x32b.x1 (IntrinsicsNVVM.td:3195) |
| 1854 | nvvm_tcgen05_ld_32x32b_x128, // llvm.nvvm.tcgen05.ld.32x32b.x128 (IntrinsicsNVVM.td:3195) |
| 1855 | nvvm_tcgen05_ld_32x32b_x16, // llvm.nvvm.tcgen05.ld.32x32b.x16 (IntrinsicsNVVM.td:3195) |
| 1856 | nvvm_tcgen05_ld_32x32b_x2, // llvm.nvvm.tcgen05.ld.32x32b.x2 (IntrinsicsNVVM.td:3195) |
| 1857 | nvvm_tcgen05_ld_32x32b_x32, // llvm.nvvm.tcgen05.ld.32x32b.x32 (IntrinsicsNVVM.td:3195) |
| 1858 | nvvm_tcgen05_ld_32x32b_x4, // llvm.nvvm.tcgen05.ld.32x32b.x4 (IntrinsicsNVVM.td:3195) |
| 1859 | nvvm_tcgen05_ld_32x32b_x64, // llvm.nvvm.tcgen05.ld.32x32b.x64 (IntrinsicsNVVM.td:3195) |
| 1860 | nvvm_tcgen05_ld_32x32b_x8, // llvm.nvvm.tcgen05.ld.32x32b.x8 (IntrinsicsNVVM.td:3195) |
| 1861 | nvvm_tcgen05_ld_red_16x32bx2_x128_f32, // llvm.nvvm.tcgen05.ld.red.16x32bx2.x128.f32 (IntrinsicsNVVM.td:3210) |
| 1862 | nvvm_tcgen05_ld_red_16x32bx2_x128_i32, // llvm.nvvm.tcgen05.ld.red.16x32bx2.x128.i32 (IntrinsicsNVVM.td:3210) |
| 1863 | nvvm_tcgen05_ld_red_16x32bx2_x16_f32, // llvm.nvvm.tcgen05.ld.red.16x32bx2.x16.f32 (IntrinsicsNVVM.td:3210) |
| 1864 | nvvm_tcgen05_ld_red_16x32bx2_x16_i32, // llvm.nvvm.tcgen05.ld.red.16x32bx2.x16.i32 (IntrinsicsNVVM.td:3210) |
| 1865 | nvvm_tcgen05_ld_red_16x32bx2_x2_f32, // llvm.nvvm.tcgen05.ld.red.16x32bx2.x2.f32 (IntrinsicsNVVM.td:3210) |
| 1866 | nvvm_tcgen05_ld_red_16x32bx2_x2_i32, // llvm.nvvm.tcgen05.ld.red.16x32bx2.x2.i32 (IntrinsicsNVVM.td:3210) |
| 1867 | nvvm_tcgen05_ld_red_16x32bx2_x32_f32, // llvm.nvvm.tcgen05.ld.red.16x32bx2.x32.f32 (IntrinsicsNVVM.td:3210) |
| 1868 | nvvm_tcgen05_ld_red_16x32bx2_x32_i32, // llvm.nvvm.tcgen05.ld.red.16x32bx2.x32.i32 (IntrinsicsNVVM.td:3210) |
| 1869 | nvvm_tcgen05_ld_red_16x32bx2_x4_f32, // llvm.nvvm.tcgen05.ld.red.16x32bx2.x4.f32 (IntrinsicsNVVM.td:3210) |
| 1870 | nvvm_tcgen05_ld_red_16x32bx2_x4_i32, // llvm.nvvm.tcgen05.ld.red.16x32bx2.x4.i32 (IntrinsicsNVVM.td:3210) |
| 1871 | nvvm_tcgen05_ld_red_16x32bx2_x64_f32, // llvm.nvvm.tcgen05.ld.red.16x32bx2.x64.f32 (IntrinsicsNVVM.td:3210) |
| 1872 | nvvm_tcgen05_ld_red_16x32bx2_x64_i32, // llvm.nvvm.tcgen05.ld.red.16x32bx2.x64.i32 (IntrinsicsNVVM.td:3210) |
| 1873 | nvvm_tcgen05_ld_red_16x32bx2_x8_f32, // llvm.nvvm.tcgen05.ld.red.16x32bx2.x8.f32 (IntrinsicsNVVM.td:3210) |
| 1874 | nvvm_tcgen05_ld_red_16x32bx2_x8_i32, // llvm.nvvm.tcgen05.ld.red.16x32bx2.x8.i32 (IntrinsicsNVVM.td:3210) |
| 1875 | nvvm_tcgen05_ld_red_32x32b_x128_f32, // llvm.nvvm.tcgen05.ld.red.32x32b.x128.f32 (IntrinsicsNVVM.td:3210) |
| 1876 | nvvm_tcgen05_ld_red_32x32b_x128_i32, // llvm.nvvm.tcgen05.ld.red.32x32b.x128.i32 (IntrinsicsNVVM.td:3210) |
| 1877 | nvvm_tcgen05_ld_red_32x32b_x16_f32, // llvm.nvvm.tcgen05.ld.red.32x32b.x16.f32 (IntrinsicsNVVM.td:3210) |
| 1878 | nvvm_tcgen05_ld_red_32x32b_x16_i32, // llvm.nvvm.tcgen05.ld.red.32x32b.x16.i32 (IntrinsicsNVVM.td:3210) |
| 1879 | nvvm_tcgen05_ld_red_32x32b_x2_f32, // llvm.nvvm.tcgen05.ld.red.32x32b.x2.f32 (IntrinsicsNVVM.td:3210) |
| 1880 | nvvm_tcgen05_ld_red_32x32b_x2_i32, // llvm.nvvm.tcgen05.ld.red.32x32b.x2.i32 (IntrinsicsNVVM.td:3210) |
| 1881 | nvvm_tcgen05_ld_red_32x32b_x32_f32, // llvm.nvvm.tcgen05.ld.red.32x32b.x32.f32 (IntrinsicsNVVM.td:3210) |
| 1882 | nvvm_tcgen05_ld_red_32x32b_x32_i32, // llvm.nvvm.tcgen05.ld.red.32x32b.x32.i32 (IntrinsicsNVVM.td:3210) |
| 1883 | nvvm_tcgen05_ld_red_32x32b_x4_f32, // llvm.nvvm.tcgen05.ld.red.32x32b.x4.f32 (IntrinsicsNVVM.td:3210) |
| 1884 | nvvm_tcgen05_ld_red_32x32b_x4_i32, // llvm.nvvm.tcgen05.ld.red.32x32b.x4.i32 (IntrinsicsNVVM.td:3210) |
| 1885 | nvvm_tcgen05_ld_red_32x32b_x64_f32, // llvm.nvvm.tcgen05.ld.red.32x32b.x64.f32 (IntrinsicsNVVM.td:3210) |
| 1886 | nvvm_tcgen05_ld_red_32x32b_x64_i32, // llvm.nvvm.tcgen05.ld.red.32x32b.x64.i32 (IntrinsicsNVVM.td:3210) |
| 1887 | nvvm_tcgen05_ld_red_32x32b_x8_f32, // llvm.nvvm.tcgen05.ld.red.32x32b.x8.f32 (IntrinsicsNVVM.td:3210) |
| 1888 | nvvm_tcgen05_ld_red_32x32b_x8_i32, // llvm.nvvm.tcgen05.ld.red.32x32b.x8.i32 (IntrinsicsNVVM.td:3210) |
| 1889 | nvvm_tcgen05_mma_shared, // llvm.nvvm.tcgen05.mma.shared (IntrinsicsNVVM.td:3300) |
| 1890 | nvvm_tcgen05_mma_shared_disable_output_lane_cg1, // llvm.nvvm.tcgen05.mma.shared.disable_output_lane.cg1 (IntrinsicsNVVM.td:3337) |
| 1891 | nvvm_tcgen05_mma_shared_disable_output_lane_cg2, // llvm.nvvm.tcgen05.mma.shared.disable_output_lane.cg2 (IntrinsicsNVVM.td:3337) |
| 1892 | nvvm_tcgen05_mma_shared_mxf4_block_scale, // llvm.nvvm.tcgen05.mma.shared.mxf4.block_scale (IntrinsicsNVVM.td:3363) |
| 1893 | nvvm_tcgen05_mma_shared_mxf4_block_scale_block32, // llvm.nvvm.tcgen05.mma.shared.mxf4.block_scale.block32 (IntrinsicsNVVM.td:3363) |
| 1894 | nvvm_tcgen05_mma_shared_mxf4nvf4_block_scale_block16, // llvm.nvvm.tcgen05.mma.shared.mxf4nvf4.block_scale.block16 (IntrinsicsNVVM.td:3363) |
| 1895 | nvvm_tcgen05_mma_shared_mxf4nvf4_block_scale_block32, // llvm.nvvm.tcgen05.mma.shared.mxf4nvf4.block_scale.block32 (IntrinsicsNVVM.td:3363) |
| 1896 | nvvm_tcgen05_mma_shared_mxf8f6f4_block_scale, // llvm.nvvm.tcgen05.mma.shared.mxf8f6f4.block_scale (IntrinsicsNVVM.td:3363) |
| 1897 | nvvm_tcgen05_mma_shared_mxf8f6f4_block_scale_block32, // llvm.nvvm.tcgen05.mma.shared.mxf8f6f4.block_scale.block32 (IntrinsicsNVVM.td:3363) |
| 1898 | nvvm_tcgen05_mma_shared_scale_d, // llvm.nvvm.tcgen05.mma.shared.scale_d (IntrinsicsNVVM.td:3300) |
| 1899 | nvvm_tcgen05_mma_shared_scale_d_disable_output_lane_cg1, // llvm.nvvm.tcgen05.mma.shared.scale_d.disable_output_lane.cg1 (IntrinsicsNVVM.td:3337) |
| 1900 | nvvm_tcgen05_mma_shared_scale_d_disable_output_lane_cg2, // llvm.nvvm.tcgen05.mma.shared.scale_d.disable_output_lane.cg2 (IntrinsicsNVVM.td:3337) |
| 1901 | nvvm_tcgen05_mma_sp_shared, // llvm.nvvm.tcgen05.mma.sp.shared (IntrinsicsNVVM.td:3300) |
| 1902 | nvvm_tcgen05_mma_sp_shared_disable_output_lane_cg1, // llvm.nvvm.tcgen05.mma.sp.shared.disable_output_lane.cg1 (IntrinsicsNVVM.td:3337) |
| 1903 | nvvm_tcgen05_mma_sp_shared_disable_output_lane_cg2, // llvm.nvvm.tcgen05.mma.sp.shared.disable_output_lane.cg2 (IntrinsicsNVVM.td:3337) |
| 1904 | nvvm_tcgen05_mma_sp_shared_mxf4_block_scale, // llvm.nvvm.tcgen05.mma.sp.shared.mxf4.block_scale (IntrinsicsNVVM.td:3363) |
| 1905 | nvvm_tcgen05_mma_sp_shared_mxf4_block_scale_block32, // llvm.nvvm.tcgen05.mma.sp.shared.mxf4.block_scale.block32 (IntrinsicsNVVM.td:3363) |
| 1906 | nvvm_tcgen05_mma_sp_shared_mxf4nvf4_block_scale_block16, // llvm.nvvm.tcgen05.mma.sp.shared.mxf4nvf4.block_scale.block16 (IntrinsicsNVVM.td:3363) |
| 1907 | nvvm_tcgen05_mma_sp_shared_mxf4nvf4_block_scale_block32, // llvm.nvvm.tcgen05.mma.sp.shared.mxf4nvf4.block_scale.block32 (IntrinsicsNVVM.td:3363) |
| 1908 | nvvm_tcgen05_mma_sp_shared_mxf8f6f4_block_scale, // llvm.nvvm.tcgen05.mma.sp.shared.mxf8f6f4.block_scale (IntrinsicsNVVM.td:3363) |
| 1909 | nvvm_tcgen05_mma_sp_shared_mxf8f6f4_block_scale_block32, // llvm.nvvm.tcgen05.mma.sp.shared.mxf8f6f4.block_scale.block32 (IntrinsicsNVVM.td:3363) |
| 1910 | nvvm_tcgen05_mma_sp_shared_scale_d, // llvm.nvvm.tcgen05.mma.sp.shared.scale_d (IntrinsicsNVVM.td:3300) |
| 1911 | nvvm_tcgen05_mma_sp_shared_scale_d_disable_output_lane_cg1, // llvm.nvvm.tcgen05.mma.sp.shared.scale_d.disable_output_lane.cg1 (IntrinsicsNVVM.td:3337) |
| 1912 | nvvm_tcgen05_mma_sp_shared_scale_d_disable_output_lane_cg2, // llvm.nvvm.tcgen05.mma.sp.shared.scale_d.disable_output_lane.cg2 (IntrinsicsNVVM.td:3337) |
| 1913 | nvvm_tcgen05_mma_sp_tensor, // llvm.nvvm.tcgen05.mma.sp.tensor (IntrinsicsNVVM.td:3300) |
| 1914 | nvvm_tcgen05_mma_sp_tensor_ashift, // llvm.nvvm.tcgen05.mma.sp.tensor.ashift (IntrinsicsNVVM.td:3300) |
| 1915 | nvvm_tcgen05_mma_sp_tensor_disable_output_lane_cg1, // llvm.nvvm.tcgen05.mma.sp.tensor.disable_output_lane.cg1 (IntrinsicsNVVM.td:3337) |
| 1916 | nvvm_tcgen05_mma_sp_tensor_disable_output_lane_cg1_ashift, // llvm.nvvm.tcgen05.mma.sp.tensor.disable_output_lane.cg1.ashift (IntrinsicsNVVM.td:3337) |
| 1917 | nvvm_tcgen05_mma_sp_tensor_disable_output_lane_cg2, // llvm.nvvm.tcgen05.mma.sp.tensor.disable_output_lane.cg2 (IntrinsicsNVVM.td:3337) |
| 1918 | nvvm_tcgen05_mma_sp_tensor_disable_output_lane_cg2_ashift, // llvm.nvvm.tcgen05.mma.sp.tensor.disable_output_lane.cg2.ashift (IntrinsicsNVVM.td:3337) |
| 1919 | nvvm_tcgen05_mma_sp_tensor_mxf4_block_scale, // llvm.nvvm.tcgen05.mma.sp.tensor.mxf4.block_scale (IntrinsicsNVVM.td:3363) |
| 1920 | nvvm_tcgen05_mma_sp_tensor_mxf4_block_scale_block32, // llvm.nvvm.tcgen05.mma.sp.tensor.mxf4.block_scale.block32 (IntrinsicsNVVM.td:3363) |
| 1921 | nvvm_tcgen05_mma_sp_tensor_mxf4nvf4_block_scale_block16, // llvm.nvvm.tcgen05.mma.sp.tensor.mxf4nvf4.block_scale.block16 (IntrinsicsNVVM.td:3363) |
| 1922 | nvvm_tcgen05_mma_sp_tensor_mxf4nvf4_block_scale_block32, // llvm.nvvm.tcgen05.mma.sp.tensor.mxf4nvf4.block_scale.block32 (IntrinsicsNVVM.td:3363) |
| 1923 | nvvm_tcgen05_mma_sp_tensor_mxf8f6f4_block_scale, // llvm.nvvm.tcgen05.mma.sp.tensor.mxf8f6f4.block_scale (IntrinsicsNVVM.td:3363) |
| 1924 | nvvm_tcgen05_mma_sp_tensor_mxf8f6f4_block_scale_block32, // llvm.nvvm.tcgen05.mma.sp.tensor.mxf8f6f4.block_scale.block32 (IntrinsicsNVVM.td:3363) |
| 1925 | nvvm_tcgen05_mma_sp_tensor_scale_d, // llvm.nvvm.tcgen05.mma.sp.tensor.scale_d (IntrinsicsNVVM.td:3300) |
| 1926 | nvvm_tcgen05_mma_sp_tensor_scale_d_ashift, // llvm.nvvm.tcgen05.mma.sp.tensor.scale_d.ashift (IntrinsicsNVVM.td:3300) |
| 1927 | nvvm_tcgen05_mma_sp_tensor_scale_d_disable_output_lane_cg1, // llvm.nvvm.tcgen05.mma.sp.tensor.scale_d.disable_output_lane.cg1 (IntrinsicsNVVM.td:3337) |
| 1928 | nvvm_tcgen05_mma_sp_tensor_scale_d_disable_output_lane_cg1_ashift, // llvm.nvvm.tcgen05.mma.sp.tensor.scale_d.disable_output_lane.cg1.ashift (IntrinsicsNVVM.td:3337) |
| 1929 | nvvm_tcgen05_mma_sp_tensor_scale_d_disable_output_lane_cg2, // llvm.nvvm.tcgen05.mma.sp.tensor.scale_d.disable_output_lane.cg2 (IntrinsicsNVVM.td:3337) |
| 1930 | nvvm_tcgen05_mma_sp_tensor_scale_d_disable_output_lane_cg2_ashift, // llvm.nvvm.tcgen05.mma.sp.tensor.scale_d.disable_output_lane.cg2.ashift (IntrinsicsNVVM.td:3337) |
| 1931 | nvvm_tcgen05_mma_tensor, // llvm.nvvm.tcgen05.mma.tensor (IntrinsicsNVVM.td:3300) |
| 1932 | nvvm_tcgen05_mma_tensor_ashift, // llvm.nvvm.tcgen05.mma.tensor.ashift (IntrinsicsNVVM.td:3300) |
| 1933 | nvvm_tcgen05_mma_tensor_disable_output_lane_cg1, // llvm.nvvm.tcgen05.mma.tensor.disable_output_lane.cg1 (IntrinsicsNVVM.td:3337) |
| 1934 | nvvm_tcgen05_mma_tensor_disable_output_lane_cg1_ashift, // llvm.nvvm.tcgen05.mma.tensor.disable_output_lane.cg1.ashift (IntrinsicsNVVM.td:3337) |
| 1935 | nvvm_tcgen05_mma_tensor_disable_output_lane_cg2, // llvm.nvvm.tcgen05.mma.tensor.disable_output_lane.cg2 (IntrinsicsNVVM.td:3337) |
| 1936 | nvvm_tcgen05_mma_tensor_disable_output_lane_cg2_ashift, // llvm.nvvm.tcgen05.mma.tensor.disable_output_lane.cg2.ashift (IntrinsicsNVVM.td:3337) |
| 1937 | nvvm_tcgen05_mma_tensor_mxf4_block_scale, // llvm.nvvm.tcgen05.mma.tensor.mxf4.block_scale (IntrinsicsNVVM.td:3363) |
| 1938 | nvvm_tcgen05_mma_tensor_mxf4_block_scale_block32, // llvm.nvvm.tcgen05.mma.tensor.mxf4.block_scale.block32 (IntrinsicsNVVM.td:3363) |
| 1939 | nvvm_tcgen05_mma_tensor_mxf4nvf4_block_scale_block16, // llvm.nvvm.tcgen05.mma.tensor.mxf4nvf4.block_scale.block16 (IntrinsicsNVVM.td:3363) |
| 1940 | nvvm_tcgen05_mma_tensor_mxf4nvf4_block_scale_block32, // llvm.nvvm.tcgen05.mma.tensor.mxf4nvf4.block_scale.block32 (IntrinsicsNVVM.td:3363) |
| 1941 | nvvm_tcgen05_mma_tensor_mxf8f6f4_block_scale, // llvm.nvvm.tcgen05.mma.tensor.mxf8f6f4.block_scale (IntrinsicsNVVM.td:3363) |
| 1942 | nvvm_tcgen05_mma_tensor_mxf8f6f4_block_scale_block32, // llvm.nvvm.tcgen05.mma.tensor.mxf8f6f4.block_scale.block32 (IntrinsicsNVVM.td:3363) |
| 1943 | nvvm_tcgen05_mma_tensor_scale_d, // llvm.nvvm.tcgen05.mma.tensor.scale_d (IntrinsicsNVVM.td:3300) |
| 1944 | nvvm_tcgen05_mma_tensor_scale_d_ashift, // llvm.nvvm.tcgen05.mma.tensor.scale_d.ashift (IntrinsicsNVVM.td:3300) |
| 1945 | nvvm_tcgen05_mma_tensor_scale_d_disable_output_lane_cg1, // llvm.nvvm.tcgen05.mma.tensor.scale_d.disable_output_lane.cg1 (IntrinsicsNVVM.td:3337) |
| 1946 | nvvm_tcgen05_mma_tensor_scale_d_disable_output_lane_cg1_ashift, // llvm.nvvm.tcgen05.mma.tensor.scale_d.disable_output_lane.cg1.ashift (IntrinsicsNVVM.td:3337) |
| 1947 | nvvm_tcgen05_mma_tensor_scale_d_disable_output_lane_cg2, // llvm.nvvm.tcgen05.mma.tensor.scale_d.disable_output_lane.cg2 (IntrinsicsNVVM.td:3337) |
| 1948 | nvvm_tcgen05_mma_tensor_scale_d_disable_output_lane_cg2_ashift, // llvm.nvvm.tcgen05.mma.tensor.scale_d.disable_output_lane.cg2.ashift (IntrinsicsNVVM.td:3337) |
| 1949 | nvvm_tcgen05_mma_ws_shared, // llvm.nvvm.tcgen05.mma.ws.shared (IntrinsicsNVVM.td:3396) |
| 1950 | nvvm_tcgen05_mma_ws_shared_zero_col_mask, // llvm.nvvm.tcgen05.mma.ws.shared.zero_col_mask (IntrinsicsNVVM.td:3396) |
| 1951 | nvvm_tcgen05_mma_ws_sp_shared, // llvm.nvvm.tcgen05.mma.ws.sp.shared (IntrinsicsNVVM.td:3396) |
| 1952 | nvvm_tcgen05_mma_ws_sp_shared_zero_col_mask, // llvm.nvvm.tcgen05.mma.ws.sp.shared.zero_col_mask (IntrinsicsNVVM.td:3396) |
| 1953 | nvvm_tcgen05_mma_ws_sp_tensor, // llvm.nvvm.tcgen05.mma.ws.sp.tensor (IntrinsicsNVVM.td:3396) |
| 1954 | nvvm_tcgen05_mma_ws_sp_tensor_zero_col_mask, // llvm.nvvm.tcgen05.mma.ws.sp.tensor.zero_col_mask (IntrinsicsNVVM.td:3396) |
| 1955 | nvvm_tcgen05_mma_ws_tensor, // llvm.nvvm.tcgen05.mma.ws.tensor (IntrinsicsNVVM.td:3396) |
| 1956 | nvvm_tcgen05_mma_ws_tensor_zero_col_mask, // llvm.nvvm.tcgen05.mma.ws.tensor.zero_col_mask (IntrinsicsNVVM.td:3396) |
| 1957 | nvvm_tcgen05_relinq_alloc_permit_cg1, // llvm.nvvm.tcgen05.relinq.alloc.permit.cg1 (IntrinsicsNVVM.td:3097) |
| 1958 | nvvm_tcgen05_relinq_alloc_permit_cg2, // llvm.nvvm.tcgen05.relinq.alloc.permit.cg2 (IntrinsicsNVVM.td:3097) |
| 1959 | nvvm_tcgen05_shift_down_cg1, // llvm.nvvm.tcgen05.shift.down.cg1 (IntrinsicsNVVM.td:3120) |
| 1960 | nvvm_tcgen05_shift_down_cg2, // llvm.nvvm.tcgen05.shift.down.cg2 (IntrinsicsNVVM.td:3120) |
| 1961 | nvvm_tcgen05_st_16x128b_x1, // llvm.nvvm.tcgen05.st.16x128b.x1 (IntrinsicsNVVM.td:3197) |
| 1962 | nvvm_tcgen05_st_16x128b_x16, // llvm.nvvm.tcgen05.st.16x128b.x16 (IntrinsicsNVVM.td:3197) |
| 1963 | nvvm_tcgen05_st_16x128b_x2, // llvm.nvvm.tcgen05.st.16x128b.x2 (IntrinsicsNVVM.td:3197) |
| 1964 | nvvm_tcgen05_st_16x128b_x32, // llvm.nvvm.tcgen05.st.16x128b.x32 (IntrinsicsNVVM.td:3197) |
| 1965 | nvvm_tcgen05_st_16x128b_x4, // llvm.nvvm.tcgen05.st.16x128b.x4 (IntrinsicsNVVM.td:3197) |
| 1966 | nvvm_tcgen05_st_16x128b_x64, // llvm.nvvm.tcgen05.st.16x128b.x64 (IntrinsicsNVVM.td:3197) |
| 1967 | nvvm_tcgen05_st_16x128b_x8, // llvm.nvvm.tcgen05.st.16x128b.x8 (IntrinsicsNVVM.td:3197) |
| 1968 | nvvm_tcgen05_st_16x256b_x1, // llvm.nvvm.tcgen05.st.16x256b.x1 (IntrinsicsNVVM.td:3197) |
| 1969 | nvvm_tcgen05_st_16x256b_x16, // llvm.nvvm.tcgen05.st.16x256b.x16 (IntrinsicsNVVM.td:3197) |
| 1970 | nvvm_tcgen05_st_16x256b_x2, // llvm.nvvm.tcgen05.st.16x256b.x2 (IntrinsicsNVVM.td:3197) |
| 1971 | nvvm_tcgen05_st_16x256b_x32, // llvm.nvvm.tcgen05.st.16x256b.x32 (IntrinsicsNVVM.td:3197) |
| 1972 | nvvm_tcgen05_st_16x256b_x4, // llvm.nvvm.tcgen05.st.16x256b.x4 (IntrinsicsNVVM.td:3197) |
| 1973 | nvvm_tcgen05_st_16x256b_x8, // llvm.nvvm.tcgen05.st.16x256b.x8 (IntrinsicsNVVM.td:3197) |
| 1974 | nvvm_tcgen05_st_16x32bx2_x1, // llvm.nvvm.tcgen05.st.16x32bx2.x1 (IntrinsicsNVVM.td:3197) |
| 1975 | nvvm_tcgen05_st_16x32bx2_x128, // llvm.nvvm.tcgen05.st.16x32bx2.x128 (IntrinsicsNVVM.td:3197) |
| 1976 | nvvm_tcgen05_st_16x32bx2_x16, // llvm.nvvm.tcgen05.st.16x32bx2.x16 (IntrinsicsNVVM.td:3197) |
| 1977 | nvvm_tcgen05_st_16x32bx2_x2, // llvm.nvvm.tcgen05.st.16x32bx2.x2 (IntrinsicsNVVM.td:3197) |
| 1978 | nvvm_tcgen05_st_16x32bx2_x32, // llvm.nvvm.tcgen05.st.16x32bx2.x32 (IntrinsicsNVVM.td:3197) |
| 1979 | nvvm_tcgen05_st_16x32bx2_x4, // llvm.nvvm.tcgen05.st.16x32bx2.x4 (IntrinsicsNVVM.td:3197) |
| 1980 | nvvm_tcgen05_st_16x32bx2_x64, // llvm.nvvm.tcgen05.st.16x32bx2.x64 (IntrinsicsNVVM.td:3197) |
| 1981 | nvvm_tcgen05_st_16x32bx2_x8, // llvm.nvvm.tcgen05.st.16x32bx2.x8 (IntrinsicsNVVM.td:3197) |
| 1982 | nvvm_tcgen05_st_16x64b_x1, // llvm.nvvm.tcgen05.st.16x64b.x1 (IntrinsicsNVVM.td:3197) |
| 1983 | nvvm_tcgen05_st_16x64b_x128, // llvm.nvvm.tcgen05.st.16x64b.x128 (IntrinsicsNVVM.td:3197) |
| 1984 | nvvm_tcgen05_st_16x64b_x16, // llvm.nvvm.tcgen05.st.16x64b.x16 (IntrinsicsNVVM.td:3197) |
| 1985 | nvvm_tcgen05_st_16x64b_x2, // llvm.nvvm.tcgen05.st.16x64b.x2 (IntrinsicsNVVM.td:3197) |
| 1986 | nvvm_tcgen05_st_16x64b_x32, // llvm.nvvm.tcgen05.st.16x64b.x32 (IntrinsicsNVVM.td:3197) |
| 1987 | nvvm_tcgen05_st_16x64b_x4, // llvm.nvvm.tcgen05.st.16x64b.x4 (IntrinsicsNVVM.td:3197) |
| 1988 | nvvm_tcgen05_st_16x64b_x64, // llvm.nvvm.tcgen05.st.16x64b.x64 (IntrinsicsNVVM.td:3197) |
| 1989 | nvvm_tcgen05_st_16x64b_x8, // llvm.nvvm.tcgen05.st.16x64b.x8 (IntrinsicsNVVM.td:3197) |
| 1990 | nvvm_tcgen05_st_32x32b_x1, // llvm.nvvm.tcgen05.st.32x32b.x1 (IntrinsicsNVVM.td:3197) |
| 1991 | nvvm_tcgen05_st_32x32b_x128, // llvm.nvvm.tcgen05.st.32x32b.x128 (IntrinsicsNVVM.td:3197) |
| 1992 | nvvm_tcgen05_st_32x32b_x16, // llvm.nvvm.tcgen05.st.32x32b.x16 (IntrinsicsNVVM.td:3197) |
| 1993 | nvvm_tcgen05_st_32x32b_x2, // llvm.nvvm.tcgen05.st.32x32b.x2 (IntrinsicsNVVM.td:3197) |
| 1994 | nvvm_tcgen05_st_32x32b_x32, // llvm.nvvm.tcgen05.st.32x32b.x32 (IntrinsicsNVVM.td:3197) |
| 1995 | nvvm_tcgen05_st_32x32b_x4, // llvm.nvvm.tcgen05.st.32x32b.x4 (IntrinsicsNVVM.td:3197) |
| 1996 | nvvm_tcgen05_st_32x32b_x64, // llvm.nvvm.tcgen05.st.32x32b.x64 (IntrinsicsNVVM.td:3197) |
| 1997 | nvvm_tcgen05_st_32x32b_x8, // llvm.nvvm.tcgen05.st.32x32b.x8 (IntrinsicsNVVM.td:3197) |
| 1998 | nvvm_tcgen05_wait_ld, // llvm.nvvm.tcgen05.wait.ld (IntrinsicsNVVM.td:3127) |
| 1999 | nvvm_tcgen05_wait_st, // llvm.nvvm.tcgen05.wait.st (IntrinsicsNVVM.td:3129) |
| 2000 | nvvm_tensormap_replace_box_dim, // llvm.nvvm.tensormap.replace.box.dim (IntrinsicsNVVM.td:3419) |
| 2001 | nvvm_tensormap_replace_element_stride, // llvm.nvvm.tensormap.replace.element.stride (IntrinsicsNVVM.td:3419) |
| 2002 | nvvm_tensormap_replace_elemtype, // llvm.nvvm.tensormap.replace.elemtype (IntrinsicsNVVM.td:3424) |
| 2003 | nvvm_tensormap_replace_fill_mode, // llvm.nvvm.tensormap.replace.fill.mode (IntrinsicsNVVM.td:3448) |
| 2004 | nvvm_tensormap_replace_global_address, // llvm.nvvm.tensormap.replace.global.address (IntrinsicsNVVM.td:3408) |
| 2005 | nvvm_tensormap_replace_global_dim, // llvm.nvvm.tensormap.replace.global.dim (IntrinsicsNVVM.td:3419) |
| 2006 | nvvm_tensormap_replace_global_stride, // llvm.nvvm.tensormap.replace.global.stride (IntrinsicsNVVM.td:3416) |
| 2007 | nvvm_tensormap_replace_interleave_layout, // llvm.nvvm.tensormap.replace.interleave.layout (IntrinsicsNVVM.td:3430) |
| 2008 | nvvm_tensormap_replace_rank, // llvm.nvvm.tensormap.replace.rank (IntrinsicsNVVM.td:3410) |
| 2009 | nvvm_tensormap_replace_swizzle_atomicity, // llvm.nvvm.tensormap.replace.swizzle.atomicity (IntrinsicsNVVM.td:3442) |
| 2010 | nvvm_tensormap_replace_swizzle_mode, // llvm.nvvm.tensormap.replace.swizzle.mode (IntrinsicsNVVM.td:3436) |
| 2011 | nvvm_tex_1d_array_grad_v4f32_f32, // llvm.nvvm.tex.1d.array.grad.v4f32.f32 (IntrinsicsNVVM.td:2223) |
| 2012 | nvvm_tex_1d_array_grad_v4s32_f32, // llvm.nvvm.tex.1d.array.grad.v4s32.f32 (IntrinsicsNVVM.td:2223) |
| 2013 | nvvm_tex_1d_array_grad_v4u32_f32, // llvm.nvvm.tex.1d.array.grad.v4u32.f32 (IntrinsicsNVVM.td:2223) |
| 2014 | nvvm_tex_1d_array_level_v4f32_f32, // llvm.nvvm.tex.1d.array.level.v4f32.f32 (IntrinsicsNVVM.td:2221) |
| 2015 | nvvm_tex_1d_array_level_v4s32_f32, // llvm.nvvm.tex.1d.array.level.v4s32.f32 (IntrinsicsNVVM.td:2221) |
| 2016 | nvvm_tex_1d_array_level_v4u32_f32, // llvm.nvvm.tex.1d.array.level.v4u32.f32 (IntrinsicsNVVM.td:2221) |
| 2017 | nvvm_tex_1d_array_v4f32_f32, // llvm.nvvm.tex.1d.array.v4f32.f32 (IntrinsicsNVVM.td:2219) |
| 2018 | nvvm_tex_1d_array_v4f32_s32, // llvm.nvvm.tex.1d.array.v4f32.s32 (IntrinsicsNVVM.td:2217) |
| 2019 | nvvm_tex_1d_array_v4s32_f32, // llvm.nvvm.tex.1d.array.v4s32.f32 (IntrinsicsNVVM.td:2219) |
| 2020 | nvvm_tex_1d_array_v4s32_s32, // llvm.nvvm.tex.1d.array.v4s32.s32 (IntrinsicsNVVM.td:2217) |
| 2021 | nvvm_tex_1d_array_v4u32_f32, // llvm.nvvm.tex.1d.array.v4u32.f32 (IntrinsicsNVVM.td:2219) |
| 2022 | nvvm_tex_1d_array_v4u32_s32, // llvm.nvvm.tex.1d.array.v4u32.s32 (IntrinsicsNVVM.td:2217) |
| 2023 | nvvm_tex_1d_grad_v4f32_f32, // llvm.nvvm.tex.1d.grad.v4f32.f32 (IntrinsicsNVVM.td:2223) |
| 2024 | nvvm_tex_1d_grad_v4s32_f32, // llvm.nvvm.tex.1d.grad.v4s32.f32 (IntrinsicsNVVM.td:2223) |
| 2025 | nvvm_tex_1d_grad_v4u32_f32, // llvm.nvvm.tex.1d.grad.v4u32.f32 (IntrinsicsNVVM.td:2223) |
| 2026 | nvvm_tex_1d_level_v4f32_f32, // llvm.nvvm.tex.1d.level.v4f32.f32 (IntrinsicsNVVM.td:2221) |
| 2027 | nvvm_tex_1d_level_v4s32_f32, // llvm.nvvm.tex.1d.level.v4s32.f32 (IntrinsicsNVVM.td:2221) |
| 2028 | nvvm_tex_1d_level_v4u32_f32, // llvm.nvvm.tex.1d.level.v4u32.f32 (IntrinsicsNVVM.td:2221) |
| 2029 | nvvm_tex_1d_v4f32_f32, // llvm.nvvm.tex.1d.v4f32.f32 (IntrinsicsNVVM.td:2219) |
| 2030 | nvvm_tex_1d_v4f32_s32, // llvm.nvvm.tex.1d.v4f32.s32 (IntrinsicsNVVM.td:2217) |
| 2031 | nvvm_tex_1d_v4s32_f32, // llvm.nvvm.tex.1d.v4s32.f32 (IntrinsicsNVVM.td:2219) |
| 2032 | nvvm_tex_1d_v4s32_s32, // llvm.nvvm.tex.1d.v4s32.s32 (IntrinsicsNVVM.td:2217) |
| 2033 | nvvm_tex_1d_v4u32_f32, // llvm.nvvm.tex.1d.v4u32.f32 (IntrinsicsNVVM.td:2219) |
| 2034 | nvvm_tex_1d_v4u32_s32, // llvm.nvvm.tex.1d.v4u32.s32 (IntrinsicsNVVM.td:2217) |
| 2035 | nvvm_tex_2d_array_grad_v4f32_f32, // llvm.nvvm.tex.2d.array.grad.v4f32.f32 (IntrinsicsNVVM.td:2232) |
| 2036 | nvvm_tex_2d_array_grad_v4s32_f32, // llvm.nvvm.tex.2d.array.grad.v4s32.f32 (IntrinsicsNVVM.td:2232) |
| 2037 | nvvm_tex_2d_array_grad_v4u32_f32, // llvm.nvvm.tex.2d.array.grad.v4u32.f32 (IntrinsicsNVVM.td:2232) |
| 2038 | nvvm_tex_2d_array_level_v4f32_f32, // llvm.nvvm.tex.2d.array.level.v4f32.f32 (IntrinsicsNVVM.td:2230) |
| 2039 | nvvm_tex_2d_array_level_v4s32_f32, // llvm.nvvm.tex.2d.array.level.v4s32.f32 (IntrinsicsNVVM.td:2230) |
| 2040 | nvvm_tex_2d_array_level_v4u32_f32, // llvm.nvvm.tex.2d.array.level.v4u32.f32 (IntrinsicsNVVM.td:2230) |
| 2041 | nvvm_tex_2d_array_v4f32_f32, // llvm.nvvm.tex.2d.array.v4f32.f32 (IntrinsicsNVVM.td:2228) |
| 2042 | nvvm_tex_2d_array_v4f32_s32, // llvm.nvvm.tex.2d.array.v4f32.s32 (IntrinsicsNVVM.td:2226) |
| 2043 | nvvm_tex_2d_array_v4s32_f32, // llvm.nvvm.tex.2d.array.v4s32.f32 (IntrinsicsNVVM.td:2228) |
| 2044 | nvvm_tex_2d_array_v4s32_s32, // llvm.nvvm.tex.2d.array.v4s32.s32 (IntrinsicsNVVM.td:2226) |
| 2045 | nvvm_tex_2d_array_v4u32_f32, // llvm.nvvm.tex.2d.array.v4u32.f32 (IntrinsicsNVVM.td:2228) |
| 2046 | nvvm_tex_2d_array_v4u32_s32, // llvm.nvvm.tex.2d.array.v4u32.s32 (IntrinsicsNVVM.td:2226) |
| 2047 | nvvm_tex_2d_grad_v4f32_f32, // llvm.nvvm.tex.2d.grad.v4f32.f32 (IntrinsicsNVVM.td:2232) |
| 2048 | nvvm_tex_2d_grad_v4s32_f32, // llvm.nvvm.tex.2d.grad.v4s32.f32 (IntrinsicsNVVM.td:2232) |
| 2049 | nvvm_tex_2d_grad_v4u32_f32, // llvm.nvvm.tex.2d.grad.v4u32.f32 (IntrinsicsNVVM.td:2232) |
| 2050 | nvvm_tex_2d_level_v4f32_f32, // llvm.nvvm.tex.2d.level.v4f32.f32 (IntrinsicsNVVM.td:2230) |
| 2051 | nvvm_tex_2d_level_v4s32_f32, // llvm.nvvm.tex.2d.level.v4s32.f32 (IntrinsicsNVVM.td:2230) |
| 2052 | nvvm_tex_2d_level_v4u32_f32, // llvm.nvvm.tex.2d.level.v4u32.f32 (IntrinsicsNVVM.td:2230) |
| 2053 | nvvm_tex_2d_v4f32_f32, // llvm.nvvm.tex.2d.v4f32.f32 (IntrinsicsNVVM.td:2228) |
| 2054 | nvvm_tex_2d_v4f32_s32, // llvm.nvvm.tex.2d.v4f32.s32 (IntrinsicsNVVM.td:2226) |
| 2055 | nvvm_tex_2d_v4s32_f32, // llvm.nvvm.tex.2d.v4s32.f32 (IntrinsicsNVVM.td:2228) |
| 2056 | nvvm_tex_2d_v4s32_s32, // llvm.nvvm.tex.2d.v4s32.s32 (IntrinsicsNVVM.td:2226) |
| 2057 | nvvm_tex_2d_v4u32_f32, // llvm.nvvm.tex.2d.v4u32.f32 (IntrinsicsNVVM.td:2228) |
| 2058 | nvvm_tex_2d_v4u32_s32, // llvm.nvvm.tex.2d.v4u32.s32 (IntrinsicsNVVM.td:2226) |
| 2059 | nvvm_tex_3d_grad_v4f32_f32, // llvm.nvvm.tex.3d.grad.v4f32.f32 (IntrinsicsNVVM.td:2242) |
| 2060 | nvvm_tex_3d_grad_v4s32_f32, // llvm.nvvm.tex.3d.grad.v4s32.f32 (IntrinsicsNVVM.td:2242) |
| 2061 | nvvm_tex_3d_grad_v4u32_f32, // llvm.nvvm.tex.3d.grad.v4u32.f32 (IntrinsicsNVVM.td:2242) |
| 2062 | nvvm_tex_3d_level_v4f32_f32, // llvm.nvvm.tex.3d.level.v4f32.f32 (IntrinsicsNVVM.td:2240) |
| 2063 | nvvm_tex_3d_level_v4s32_f32, // llvm.nvvm.tex.3d.level.v4s32.f32 (IntrinsicsNVVM.td:2240) |
| 2064 | nvvm_tex_3d_level_v4u32_f32, // llvm.nvvm.tex.3d.level.v4u32.f32 (IntrinsicsNVVM.td:2240) |
| 2065 | nvvm_tex_3d_v4f32_f32, // llvm.nvvm.tex.3d.v4f32.f32 (IntrinsicsNVVM.td:2238) |
| 2066 | nvvm_tex_3d_v4f32_s32, // llvm.nvvm.tex.3d.v4f32.s32 (IntrinsicsNVVM.td:2236) |
| 2067 | nvvm_tex_3d_v4s32_f32, // llvm.nvvm.tex.3d.v4s32.f32 (IntrinsicsNVVM.td:2238) |
| 2068 | nvvm_tex_3d_v4s32_s32, // llvm.nvvm.tex.3d.v4s32.s32 (IntrinsicsNVVM.td:2236) |
| 2069 | nvvm_tex_3d_v4u32_f32, // llvm.nvvm.tex.3d.v4u32.f32 (IntrinsicsNVVM.td:2238) |
| 2070 | nvvm_tex_3d_v4u32_s32, // llvm.nvvm.tex.3d.v4u32.s32 (IntrinsicsNVVM.td:2236) |
| 2071 | nvvm_tex_cube_array_level_v4f32_f32, // llvm.nvvm.tex.cube.array.level.v4f32.f32 (IntrinsicsNVVM.td:2248) |
| 2072 | nvvm_tex_cube_array_level_v4s32_f32, // llvm.nvvm.tex.cube.array.level.v4s32.f32 (IntrinsicsNVVM.td:2248) |
| 2073 | nvvm_tex_cube_array_level_v4u32_f32, // llvm.nvvm.tex.cube.array.level.v4u32.f32 (IntrinsicsNVVM.td:2248) |
| 2074 | nvvm_tex_cube_array_v4f32_f32, // llvm.nvvm.tex.cube.array.v4f32.f32 (IntrinsicsNVVM.td:2246) |
| 2075 | nvvm_tex_cube_array_v4s32_f32, // llvm.nvvm.tex.cube.array.v4s32.f32 (IntrinsicsNVVM.td:2246) |
| 2076 | nvvm_tex_cube_array_v4u32_f32, // llvm.nvvm.tex.cube.array.v4u32.f32 (IntrinsicsNVVM.td:2246) |
| 2077 | nvvm_tex_cube_level_v4f32_f32, // llvm.nvvm.tex.cube.level.v4f32.f32 (IntrinsicsNVVM.td:2248) |
| 2078 | nvvm_tex_cube_level_v4s32_f32, // llvm.nvvm.tex.cube.level.v4s32.f32 (IntrinsicsNVVM.td:2248) |
| 2079 | nvvm_tex_cube_level_v4u32_f32, // llvm.nvvm.tex.cube.level.v4u32.f32 (IntrinsicsNVVM.td:2248) |
| 2080 | nvvm_tex_cube_v4f32_f32, // llvm.nvvm.tex.cube.v4f32.f32 (IntrinsicsNVVM.td:2246) |
| 2081 | nvvm_tex_cube_v4s32_f32, // llvm.nvvm.tex.cube.v4s32.f32 (IntrinsicsNVVM.td:2246) |
| 2082 | nvvm_tex_cube_v4u32_f32, // llvm.nvvm.tex.cube.v4u32.f32 (IntrinsicsNVVM.td:2246) |
| 2083 | nvvm_tex_unified_1d_array_grad_v4f32_f32, // llvm.nvvm.tex.unified.1d.array.grad.v4f32.f32 (IntrinsicsNVVM.td:2223) |
| 2084 | nvvm_tex_unified_1d_array_grad_v4s32_f32, // llvm.nvvm.tex.unified.1d.array.grad.v4s32.f32 (IntrinsicsNVVM.td:2223) |
| 2085 | nvvm_tex_unified_1d_array_grad_v4u32_f32, // llvm.nvvm.tex.unified.1d.array.grad.v4u32.f32 (IntrinsicsNVVM.td:2223) |
| 2086 | nvvm_tex_unified_1d_array_level_v4f32_f32, // llvm.nvvm.tex.unified.1d.array.level.v4f32.f32 (IntrinsicsNVVM.td:2221) |
| 2087 | nvvm_tex_unified_1d_array_level_v4s32_f32, // llvm.nvvm.tex.unified.1d.array.level.v4s32.f32 (IntrinsicsNVVM.td:2221) |
| 2088 | nvvm_tex_unified_1d_array_level_v4u32_f32, // llvm.nvvm.tex.unified.1d.array.level.v4u32.f32 (IntrinsicsNVVM.td:2221) |
| 2089 | nvvm_tex_unified_1d_array_v4f32_f32, // llvm.nvvm.tex.unified.1d.array.v4f32.f32 (IntrinsicsNVVM.td:2219) |
| 2090 | nvvm_tex_unified_1d_array_v4f32_s32, // llvm.nvvm.tex.unified.1d.array.v4f32.s32 (IntrinsicsNVVM.td:2217) |
| 2091 | nvvm_tex_unified_1d_array_v4s32_f32, // llvm.nvvm.tex.unified.1d.array.v4s32.f32 (IntrinsicsNVVM.td:2219) |
| 2092 | nvvm_tex_unified_1d_array_v4s32_s32, // llvm.nvvm.tex.unified.1d.array.v4s32.s32 (IntrinsicsNVVM.td:2217) |
| 2093 | nvvm_tex_unified_1d_array_v4u32_f32, // llvm.nvvm.tex.unified.1d.array.v4u32.f32 (IntrinsicsNVVM.td:2219) |
| 2094 | nvvm_tex_unified_1d_array_v4u32_s32, // llvm.nvvm.tex.unified.1d.array.v4u32.s32 (IntrinsicsNVVM.td:2217) |
| 2095 | nvvm_tex_unified_1d_grad_v4f32_f32, // llvm.nvvm.tex.unified.1d.grad.v4f32.f32 (IntrinsicsNVVM.td:2223) |
| 2096 | nvvm_tex_unified_1d_grad_v4s32_f32, // llvm.nvvm.tex.unified.1d.grad.v4s32.f32 (IntrinsicsNVVM.td:2223) |
| 2097 | nvvm_tex_unified_1d_grad_v4u32_f32, // llvm.nvvm.tex.unified.1d.grad.v4u32.f32 (IntrinsicsNVVM.td:2223) |
| 2098 | nvvm_tex_unified_1d_level_v4f32_f32, // llvm.nvvm.tex.unified.1d.level.v4f32.f32 (IntrinsicsNVVM.td:2221) |
| 2099 | nvvm_tex_unified_1d_level_v4s32_f32, // llvm.nvvm.tex.unified.1d.level.v4s32.f32 (IntrinsicsNVVM.td:2221) |
| 2100 | nvvm_tex_unified_1d_level_v4u32_f32, // llvm.nvvm.tex.unified.1d.level.v4u32.f32 (IntrinsicsNVVM.td:2221) |
| 2101 | nvvm_tex_unified_1d_v4f32_f32, // llvm.nvvm.tex.unified.1d.v4f32.f32 (IntrinsicsNVVM.td:2219) |
| 2102 | nvvm_tex_unified_1d_v4f32_s32, // llvm.nvvm.tex.unified.1d.v4f32.s32 (IntrinsicsNVVM.td:2217) |
| 2103 | nvvm_tex_unified_1d_v4s32_f32, // llvm.nvvm.tex.unified.1d.v4s32.f32 (IntrinsicsNVVM.td:2219) |
| 2104 | nvvm_tex_unified_1d_v4s32_s32, // llvm.nvvm.tex.unified.1d.v4s32.s32 (IntrinsicsNVVM.td:2217) |
| 2105 | nvvm_tex_unified_1d_v4u32_f32, // llvm.nvvm.tex.unified.1d.v4u32.f32 (IntrinsicsNVVM.td:2219) |
| 2106 | nvvm_tex_unified_1d_v4u32_s32, // llvm.nvvm.tex.unified.1d.v4u32.s32 (IntrinsicsNVVM.td:2217) |
| 2107 | nvvm_tex_unified_2d_array_grad_v4f32_f32, // llvm.nvvm.tex.unified.2d.array.grad.v4f32.f32 (IntrinsicsNVVM.td:2232) |
| 2108 | nvvm_tex_unified_2d_array_grad_v4s32_f32, // llvm.nvvm.tex.unified.2d.array.grad.v4s32.f32 (IntrinsicsNVVM.td:2232) |
| 2109 | nvvm_tex_unified_2d_array_grad_v4u32_f32, // llvm.nvvm.tex.unified.2d.array.grad.v4u32.f32 (IntrinsicsNVVM.td:2232) |
| 2110 | nvvm_tex_unified_2d_array_level_v4f32_f32, // llvm.nvvm.tex.unified.2d.array.level.v4f32.f32 (IntrinsicsNVVM.td:2230) |
| 2111 | nvvm_tex_unified_2d_array_level_v4s32_f32, // llvm.nvvm.tex.unified.2d.array.level.v4s32.f32 (IntrinsicsNVVM.td:2230) |
| 2112 | nvvm_tex_unified_2d_array_level_v4u32_f32, // llvm.nvvm.tex.unified.2d.array.level.v4u32.f32 (IntrinsicsNVVM.td:2230) |
| 2113 | nvvm_tex_unified_2d_array_v4f32_f32, // llvm.nvvm.tex.unified.2d.array.v4f32.f32 (IntrinsicsNVVM.td:2228) |
| 2114 | nvvm_tex_unified_2d_array_v4f32_s32, // llvm.nvvm.tex.unified.2d.array.v4f32.s32 (IntrinsicsNVVM.td:2226) |
| 2115 | nvvm_tex_unified_2d_array_v4s32_f32, // llvm.nvvm.tex.unified.2d.array.v4s32.f32 (IntrinsicsNVVM.td:2228) |
| 2116 | nvvm_tex_unified_2d_array_v4s32_s32, // llvm.nvvm.tex.unified.2d.array.v4s32.s32 (IntrinsicsNVVM.td:2226) |
| 2117 | nvvm_tex_unified_2d_array_v4u32_f32, // llvm.nvvm.tex.unified.2d.array.v4u32.f32 (IntrinsicsNVVM.td:2228) |
| 2118 | nvvm_tex_unified_2d_array_v4u32_s32, // llvm.nvvm.tex.unified.2d.array.v4u32.s32 (IntrinsicsNVVM.td:2226) |
| 2119 | nvvm_tex_unified_2d_grad_v4f32_f32, // llvm.nvvm.tex.unified.2d.grad.v4f32.f32 (IntrinsicsNVVM.td:2232) |
| 2120 | nvvm_tex_unified_2d_grad_v4s32_f32, // llvm.nvvm.tex.unified.2d.grad.v4s32.f32 (IntrinsicsNVVM.td:2232) |
| 2121 | nvvm_tex_unified_2d_grad_v4u32_f32, // llvm.nvvm.tex.unified.2d.grad.v4u32.f32 (IntrinsicsNVVM.td:2232) |
| 2122 | nvvm_tex_unified_2d_level_v4f32_f32, // llvm.nvvm.tex.unified.2d.level.v4f32.f32 (IntrinsicsNVVM.td:2230) |
| 2123 | nvvm_tex_unified_2d_level_v4s32_f32, // llvm.nvvm.tex.unified.2d.level.v4s32.f32 (IntrinsicsNVVM.td:2230) |
| 2124 | nvvm_tex_unified_2d_level_v4u32_f32, // llvm.nvvm.tex.unified.2d.level.v4u32.f32 (IntrinsicsNVVM.td:2230) |
| 2125 | nvvm_tex_unified_2d_v4f32_f32, // llvm.nvvm.tex.unified.2d.v4f32.f32 (IntrinsicsNVVM.td:2228) |
| 2126 | nvvm_tex_unified_2d_v4f32_s32, // llvm.nvvm.tex.unified.2d.v4f32.s32 (IntrinsicsNVVM.td:2226) |
| 2127 | nvvm_tex_unified_2d_v4s32_f32, // llvm.nvvm.tex.unified.2d.v4s32.f32 (IntrinsicsNVVM.td:2228) |
| 2128 | nvvm_tex_unified_2d_v4s32_s32, // llvm.nvvm.tex.unified.2d.v4s32.s32 (IntrinsicsNVVM.td:2226) |
| 2129 | nvvm_tex_unified_2d_v4u32_f32, // llvm.nvvm.tex.unified.2d.v4u32.f32 (IntrinsicsNVVM.td:2228) |
| 2130 | nvvm_tex_unified_2d_v4u32_s32, // llvm.nvvm.tex.unified.2d.v4u32.s32 (IntrinsicsNVVM.td:2226) |
| 2131 | nvvm_tex_unified_3d_grad_v4f32_f32, // llvm.nvvm.tex.unified.3d.grad.v4f32.f32 (IntrinsicsNVVM.td:2242) |
| 2132 | nvvm_tex_unified_3d_grad_v4s32_f32, // llvm.nvvm.tex.unified.3d.grad.v4s32.f32 (IntrinsicsNVVM.td:2242) |
| 2133 | nvvm_tex_unified_3d_grad_v4u32_f32, // llvm.nvvm.tex.unified.3d.grad.v4u32.f32 (IntrinsicsNVVM.td:2242) |
| 2134 | nvvm_tex_unified_3d_level_v4f32_f32, // llvm.nvvm.tex.unified.3d.level.v4f32.f32 (IntrinsicsNVVM.td:2240) |
| 2135 | nvvm_tex_unified_3d_level_v4s32_f32, // llvm.nvvm.tex.unified.3d.level.v4s32.f32 (IntrinsicsNVVM.td:2240) |
| 2136 | nvvm_tex_unified_3d_level_v4u32_f32, // llvm.nvvm.tex.unified.3d.level.v4u32.f32 (IntrinsicsNVVM.td:2240) |
| 2137 | nvvm_tex_unified_3d_v4f32_f32, // llvm.nvvm.tex.unified.3d.v4f32.f32 (IntrinsicsNVVM.td:2238) |
| 2138 | nvvm_tex_unified_3d_v4f32_s32, // llvm.nvvm.tex.unified.3d.v4f32.s32 (IntrinsicsNVVM.td:2236) |
| 2139 | nvvm_tex_unified_3d_v4s32_f32, // llvm.nvvm.tex.unified.3d.v4s32.f32 (IntrinsicsNVVM.td:2238) |
| 2140 | nvvm_tex_unified_3d_v4s32_s32, // llvm.nvvm.tex.unified.3d.v4s32.s32 (IntrinsicsNVVM.td:2236) |
| 2141 | nvvm_tex_unified_3d_v4u32_f32, // llvm.nvvm.tex.unified.3d.v4u32.f32 (IntrinsicsNVVM.td:2238) |
| 2142 | nvvm_tex_unified_3d_v4u32_s32, // llvm.nvvm.tex.unified.3d.v4u32.s32 (IntrinsicsNVVM.td:2236) |
| 2143 | nvvm_tex_unified_cube_array_grad_v4f32_f32, // llvm.nvvm.tex.unified.cube.array.grad.v4f32.f32 (IntrinsicsNVVM.td:2252) |
| 2144 | nvvm_tex_unified_cube_array_grad_v4s32_f32, // llvm.nvvm.tex.unified.cube.array.grad.v4s32.f32 (IntrinsicsNVVM.td:2252) |
| 2145 | nvvm_tex_unified_cube_array_grad_v4u32_f32, // llvm.nvvm.tex.unified.cube.array.grad.v4u32.f32 (IntrinsicsNVVM.td:2252) |
| 2146 | nvvm_tex_unified_cube_array_level_v4f32_f32, // llvm.nvvm.tex.unified.cube.array.level.v4f32.f32 (IntrinsicsNVVM.td:2248) |
| 2147 | nvvm_tex_unified_cube_array_level_v4s32_f32, // llvm.nvvm.tex.unified.cube.array.level.v4s32.f32 (IntrinsicsNVVM.td:2248) |
| 2148 | nvvm_tex_unified_cube_array_level_v4u32_f32, // llvm.nvvm.tex.unified.cube.array.level.v4u32.f32 (IntrinsicsNVVM.td:2248) |
| 2149 | nvvm_tex_unified_cube_array_v4f32_f32, // llvm.nvvm.tex.unified.cube.array.v4f32.f32 (IntrinsicsNVVM.td:2246) |
| 2150 | nvvm_tex_unified_cube_array_v4s32_f32, // llvm.nvvm.tex.unified.cube.array.v4s32.f32 (IntrinsicsNVVM.td:2246) |
| 2151 | nvvm_tex_unified_cube_array_v4u32_f32, // llvm.nvvm.tex.unified.cube.array.v4u32.f32 (IntrinsicsNVVM.td:2246) |
| 2152 | nvvm_tex_unified_cube_grad_v4f32_f32, // llvm.nvvm.tex.unified.cube.grad.v4f32.f32 (IntrinsicsNVVM.td:2252) |
| 2153 | nvvm_tex_unified_cube_grad_v4s32_f32, // llvm.nvvm.tex.unified.cube.grad.v4s32.f32 (IntrinsicsNVVM.td:2252) |
| 2154 | nvvm_tex_unified_cube_grad_v4u32_f32, // llvm.nvvm.tex.unified.cube.grad.v4u32.f32 (IntrinsicsNVVM.td:2252) |
| 2155 | nvvm_tex_unified_cube_level_v4f32_f32, // llvm.nvvm.tex.unified.cube.level.v4f32.f32 (IntrinsicsNVVM.td:2248) |
| 2156 | nvvm_tex_unified_cube_level_v4s32_f32, // llvm.nvvm.tex.unified.cube.level.v4s32.f32 (IntrinsicsNVVM.td:2248) |
| 2157 | nvvm_tex_unified_cube_level_v4u32_f32, // llvm.nvvm.tex.unified.cube.level.v4u32.f32 (IntrinsicsNVVM.td:2248) |
| 2158 | nvvm_tex_unified_cube_v4f32_f32, // llvm.nvvm.tex.unified.cube.v4f32.f32 (IntrinsicsNVVM.td:2246) |
| 2159 | nvvm_tex_unified_cube_v4s32_f32, // llvm.nvvm.tex.unified.cube.v4s32.f32 (IntrinsicsNVVM.td:2246) |
| 2160 | nvvm_tex_unified_cube_v4u32_f32, // llvm.nvvm.tex.unified.cube.v4u32.f32 (IntrinsicsNVVM.td:2246) |
| 2161 | nvvm_texsurf_handle, // llvm.nvvm.texsurf.handle (IntrinsicsNVVM.td:2187) |
| 2162 | nvvm_texsurf_handle_internal, // llvm.nvvm.texsurf.handle.internal (IntrinsicsNVVM.td:2189) |
| 2163 | nvvm_tld4_a_2d_v4f32_f32, // llvm.nvvm.tld4.a.2d.v4f32.f32 (IntrinsicsNVVM.td:2257) |
| 2164 | nvvm_tld4_a_2d_v4s32_f32, // llvm.nvvm.tld4.a.2d.v4s32.f32 (IntrinsicsNVVM.td:2257) |
| 2165 | nvvm_tld4_a_2d_v4u32_f32, // llvm.nvvm.tld4.a.2d.v4u32.f32 (IntrinsicsNVVM.td:2257) |
| 2166 | nvvm_tld4_b_2d_v4f32_f32, // llvm.nvvm.tld4.b.2d.v4f32.f32 (IntrinsicsNVVM.td:2257) |
| 2167 | nvvm_tld4_b_2d_v4s32_f32, // llvm.nvvm.tld4.b.2d.v4s32.f32 (IntrinsicsNVVM.td:2257) |
| 2168 | nvvm_tld4_b_2d_v4u32_f32, // llvm.nvvm.tld4.b.2d.v4u32.f32 (IntrinsicsNVVM.td:2257) |
| 2169 | nvvm_tld4_g_2d_v4f32_f32, // llvm.nvvm.tld4.g.2d.v4f32.f32 (IntrinsicsNVVM.td:2257) |
| 2170 | nvvm_tld4_g_2d_v4s32_f32, // llvm.nvvm.tld4.g.2d.v4s32.f32 (IntrinsicsNVVM.td:2257) |
| 2171 | nvvm_tld4_g_2d_v4u32_f32, // llvm.nvvm.tld4.g.2d.v4u32.f32 (IntrinsicsNVVM.td:2257) |
| 2172 | nvvm_tld4_r_2d_v4f32_f32, // llvm.nvvm.tld4.r.2d.v4f32.f32 (IntrinsicsNVVM.td:2257) |
| 2173 | nvvm_tld4_r_2d_v4s32_f32, // llvm.nvvm.tld4.r.2d.v4s32.f32 (IntrinsicsNVVM.td:2257) |
| 2174 | nvvm_tld4_r_2d_v4u32_f32, // llvm.nvvm.tld4.r.2d.v4u32.f32 (IntrinsicsNVVM.td:2257) |
| 2175 | nvvm_tld4_unified_a_2d_v4f32_f32, // llvm.nvvm.tld4.unified.a.2d.v4f32.f32 (IntrinsicsNVVM.td:2257) |
| 2176 | nvvm_tld4_unified_a_2d_v4s32_f32, // llvm.nvvm.tld4.unified.a.2d.v4s32.f32 (IntrinsicsNVVM.td:2257) |
| 2177 | nvvm_tld4_unified_a_2d_v4u32_f32, // llvm.nvvm.tld4.unified.a.2d.v4u32.f32 (IntrinsicsNVVM.td:2257) |
| 2178 | nvvm_tld4_unified_b_2d_v4f32_f32, // llvm.nvvm.tld4.unified.b.2d.v4f32.f32 (IntrinsicsNVVM.td:2257) |
| 2179 | nvvm_tld4_unified_b_2d_v4s32_f32, // llvm.nvvm.tld4.unified.b.2d.v4s32.f32 (IntrinsicsNVVM.td:2257) |
| 2180 | nvvm_tld4_unified_b_2d_v4u32_f32, // llvm.nvvm.tld4.unified.b.2d.v4u32.f32 (IntrinsicsNVVM.td:2257) |
| 2181 | nvvm_tld4_unified_g_2d_v4f32_f32, // llvm.nvvm.tld4.unified.g.2d.v4f32.f32 (IntrinsicsNVVM.td:2257) |
| 2182 | nvvm_tld4_unified_g_2d_v4s32_f32, // llvm.nvvm.tld4.unified.g.2d.v4s32.f32 (IntrinsicsNVVM.td:2257) |
| 2183 | nvvm_tld4_unified_g_2d_v4u32_f32, // llvm.nvvm.tld4.unified.g.2d.v4u32.f32 (IntrinsicsNVVM.td:2257) |
| 2184 | nvvm_tld4_unified_r_2d_v4f32_f32, // llvm.nvvm.tld4.unified.r.2d.v4f32.f32 (IntrinsicsNVVM.td:2257) |
| 2185 | nvvm_tld4_unified_r_2d_v4s32_f32, // llvm.nvvm.tld4.unified.r.2d.v4s32.f32 (IntrinsicsNVVM.td:2257) |
| 2186 | nvvm_tld4_unified_r_2d_v4u32_f32, // llvm.nvvm.tld4.unified.r.2d.v4u32.f32 (IntrinsicsNVVM.td:2257) |
| 2187 | nvvm_trunc_d, // llvm.nvvm.trunc.d (IntrinsicsNVVM.td:1459) |
| 2188 | nvvm_trunc_f, // llvm.nvvm.trunc.f (IntrinsicsNVVM.td:1456) |
| 2189 | nvvm_trunc_ftz_f, // llvm.nvvm.trunc.ftz.f (IntrinsicsNVVM.td:1456) |
| 2190 | nvvm_txq_array_size, // llvm.nvvm.txq.array.size (IntrinsicsNVVM.td:2300) |
| 2191 | nvvm_txq_channel_data_type, // llvm.nvvm.txq.channel.data.type (IntrinsicsNVVM.td:2300) |
| 2192 | nvvm_txq_channel_order, // llvm.nvvm.txq.channel.order (IntrinsicsNVVM.td:2300) |
| 2193 | nvvm_txq_depth, // llvm.nvvm.txq.depth (IntrinsicsNVVM.td:2300) |
| 2194 | nvvm_txq_height, // llvm.nvvm.txq.height (IntrinsicsNVVM.td:2300) |
| 2195 | nvvm_txq_num_mipmap_levels, // llvm.nvvm.txq.num.mipmap.levels (IntrinsicsNVVM.td:2300) |
| 2196 | nvvm_txq_num_samples, // llvm.nvvm.txq.num.samples (IntrinsicsNVVM.td:2300) |
| 2197 | nvvm_txq_width, // llvm.nvvm.txq.width (IntrinsicsNVVM.td:2300) |
| 2198 | nvvm_ue8m0x2_to_bf16x2, // llvm.nvvm.ue8m0x2.to.bf16x2 (IntrinsicsNVVM.td:1871) |
| 2199 | nvvm_ui2d_rm, // llvm.nvvm.ui2d.rm (IntrinsicsNVVM.td:1696) |
| 2200 | nvvm_ui2d_rn, // llvm.nvvm.ui2d.rn (IntrinsicsNVVM.td:1696) |
| 2201 | nvvm_ui2d_rp, // llvm.nvvm.ui2d.rp (IntrinsicsNVVM.td:1696) |
| 2202 | nvvm_ui2d_rz, // llvm.nvvm.ui2d.rz (IntrinsicsNVVM.td:1696) |
| 2203 | nvvm_ui2f_rm, // llvm.nvvm.ui2f.rm (IntrinsicsNVVM.td:1703) |
| 2204 | nvvm_ui2f_rn, // llvm.nvvm.ui2f.rn (IntrinsicsNVVM.td:1703) |
| 2205 | nvvm_ui2f_rp, // llvm.nvvm.ui2f.rp (IntrinsicsNVVM.td:1703) |
| 2206 | nvvm_ui2f_rz, // llvm.nvvm.ui2f.rz (IntrinsicsNVVM.td:1703) |
| 2207 | nvvm_ull2d_rm, // llvm.nvvm.ull2d.rm (IntrinsicsNVVM.td:1716) |
| 2208 | nvvm_ull2d_rn, // llvm.nvvm.ull2d.rn (IntrinsicsNVVM.td:1716) |
| 2209 | nvvm_ull2d_rp, // llvm.nvvm.ull2d.rp (IntrinsicsNVVM.td:1716) |
| 2210 | nvvm_ull2d_rz, // llvm.nvvm.ull2d.rz (IntrinsicsNVVM.td:1716) |
| 2211 | nvvm_ull2f_rm, // llvm.nvvm.ull2f.rm (IntrinsicsNVVM.td:1713) |
| 2212 | nvvm_ull2f_rn, // llvm.nvvm.ull2f.rn (IntrinsicsNVVM.td:1713) |
| 2213 | nvvm_ull2f_rp, // llvm.nvvm.ull2f.rp (IntrinsicsNVVM.td:1713) |
| 2214 | nvvm_ull2f_rz, // llvm.nvvm.ull2f.rz (IntrinsicsNVVM.td:1713) |
| 2215 | nvvm_vote_all, // llvm.nvvm.vote.all (IntrinsicsNVVM.td:2486) |
| 2216 | nvvm_vote_all_sync, // llvm.nvvm.vote.all.sync (IntrinsicsNVVM.td:2496) |
| 2217 | nvvm_vote_any, // llvm.nvvm.vote.any (IntrinsicsNVVM.td:2487) |
| 2218 | nvvm_vote_any_sync, // llvm.nvvm.vote.any.sync (IntrinsicsNVVM.td:2497) |
| 2219 | nvvm_vote_ballot, // llvm.nvvm.vote.ballot (IntrinsicsNVVM.td:2489) |
| 2220 | nvvm_vote_ballot_sync, // llvm.nvvm.vote.ballot.sync (IntrinsicsNVVM.td:2499) |
| 2221 | nvvm_vote_uni, // llvm.nvvm.vote.uni (IntrinsicsNVVM.td:2488) |
| 2222 | nvvm_vote_uni_sync, // llvm.nvvm.vote.uni.sync (IntrinsicsNVVM.td:2498) |
| 2223 | nvvm_wgmma_commit_group_sync_aligned, // llvm.nvvm.wgmma.commit_group.sync.aligned (IntrinsicsNVVM.td:2564) |
| 2224 | nvvm_wgmma_fence_sync_aligned, // llvm.nvvm.wgmma.fence.sync.aligned (IntrinsicsNVVM.td:2561) |
| 2225 | nvvm_wgmma_wait_group_sync_aligned, // llvm.nvvm.wgmma.wait_group.sync.aligned (IntrinsicsNVVM.td:2568) |
| 2226 | nvvm_wmma_m16n16k16_load_a_bf16_col, // llvm.nvvm.wmma.m16n16k16.load.a.col.bf16 (IntrinsicsNVVM.td:2596) |
| 2227 | nvvm_wmma_m16n16k16_load_a_f16_col, // llvm.nvvm.wmma.m16n16k16.load.a.col.f16 (IntrinsicsNVVM.td:2596) |
| 2228 | nvvm_wmma_m16n16k16_load_a_s8_col, // llvm.nvvm.wmma.m16n16k16.load.a.col.s8 (IntrinsicsNVVM.td:2596) |
| 2229 | nvvm_wmma_m16n16k16_load_a_bf16_col_stride, // llvm.nvvm.wmma.m16n16k16.load.a.col.stride.bf16 (IntrinsicsNVVM.td:2596) |
| 2230 | nvvm_wmma_m16n16k16_load_a_f16_col_stride, // llvm.nvvm.wmma.m16n16k16.load.a.col.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2231 | nvvm_wmma_m16n16k16_load_a_s8_col_stride, // llvm.nvvm.wmma.m16n16k16.load.a.col.stride.s8 (IntrinsicsNVVM.td:2596) |
| 2232 | nvvm_wmma_m16n16k16_load_a_u8_col_stride, // llvm.nvvm.wmma.m16n16k16.load.a.col.stride.u8 (IntrinsicsNVVM.td:2596) |
| 2233 | nvvm_wmma_m16n16k16_load_a_u8_col, // llvm.nvvm.wmma.m16n16k16.load.a.col.u8 (IntrinsicsNVVM.td:2596) |
| 2234 | nvvm_wmma_m16n16k16_load_a_bf16_row, // llvm.nvvm.wmma.m16n16k16.load.a.row.bf16 (IntrinsicsNVVM.td:2596) |
| 2235 | nvvm_wmma_m16n16k16_load_a_f16_row, // llvm.nvvm.wmma.m16n16k16.load.a.row.f16 (IntrinsicsNVVM.td:2596) |
| 2236 | nvvm_wmma_m16n16k16_load_a_s8_row, // llvm.nvvm.wmma.m16n16k16.load.a.row.s8 (IntrinsicsNVVM.td:2596) |
| 2237 | nvvm_wmma_m16n16k16_load_a_bf16_row_stride, // llvm.nvvm.wmma.m16n16k16.load.a.row.stride.bf16 (IntrinsicsNVVM.td:2596) |
| 2238 | nvvm_wmma_m16n16k16_load_a_f16_row_stride, // llvm.nvvm.wmma.m16n16k16.load.a.row.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2239 | nvvm_wmma_m16n16k16_load_a_s8_row_stride, // llvm.nvvm.wmma.m16n16k16.load.a.row.stride.s8 (IntrinsicsNVVM.td:2596) |
| 2240 | nvvm_wmma_m16n16k16_load_a_u8_row_stride, // llvm.nvvm.wmma.m16n16k16.load.a.row.stride.u8 (IntrinsicsNVVM.td:2596) |
| 2241 | nvvm_wmma_m16n16k16_load_a_u8_row, // llvm.nvvm.wmma.m16n16k16.load.a.row.u8 (IntrinsicsNVVM.td:2596) |
| 2242 | nvvm_wmma_m16n16k16_load_b_bf16_col, // llvm.nvvm.wmma.m16n16k16.load.b.col.bf16 (IntrinsicsNVVM.td:2596) |
| 2243 | nvvm_wmma_m16n16k16_load_b_f16_col, // llvm.nvvm.wmma.m16n16k16.load.b.col.f16 (IntrinsicsNVVM.td:2596) |
| 2244 | nvvm_wmma_m16n16k16_load_b_s8_col, // llvm.nvvm.wmma.m16n16k16.load.b.col.s8 (IntrinsicsNVVM.td:2596) |
| 2245 | nvvm_wmma_m16n16k16_load_b_bf16_col_stride, // llvm.nvvm.wmma.m16n16k16.load.b.col.stride.bf16 (IntrinsicsNVVM.td:2596) |
| 2246 | nvvm_wmma_m16n16k16_load_b_f16_col_stride, // llvm.nvvm.wmma.m16n16k16.load.b.col.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2247 | nvvm_wmma_m16n16k16_load_b_s8_col_stride, // llvm.nvvm.wmma.m16n16k16.load.b.col.stride.s8 (IntrinsicsNVVM.td:2596) |
| 2248 | nvvm_wmma_m16n16k16_load_b_u8_col_stride, // llvm.nvvm.wmma.m16n16k16.load.b.col.stride.u8 (IntrinsicsNVVM.td:2596) |
| 2249 | nvvm_wmma_m16n16k16_load_b_u8_col, // llvm.nvvm.wmma.m16n16k16.load.b.col.u8 (IntrinsicsNVVM.td:2596) |
| 2250 | nvvm_wmma_m16n16k16_load_b_bf16_row, // llvm.nvvm.wmma.m16n16k16.load.b.row.bf16 (IntrinsicsNVVM.td:2596) |
| 2251 | nvvm_wmma_m16n16k16_load_b_f16_row, // llvm.nvvm.wmma.m16n16k16.load.b.row.f16 (IntrinsicsNVVM.td:2596) |
| 2252 | nvvm_wmma_m16n16k16_load_b_s8_row, // llvm.nvvm.wmma.m16n16k16.load.b.row.s8 (IntrinsicsNVVM.td:2596) |
| 2253 | nvvm_wmma_m16n16k16_load_b_bf16_row_stride, // llvm.nvvm.wmma.m16n16k16.load.b.row.stride.bf16 (IntrinsicsNVVM.td:2596) |
| 2254 | nvvm_wmma_m16n16k16_load_b_f16_row_stride, // llvm.nvvm.wmma.m16n16k16.load.b.row.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2255 | nvvm_wmma_m16n16k16_load_b_s8_row_stride, // llvm.nvvm.wmma.m16n16k16.load.b.row.stride.s8 (IntrinsicsNVVM.td:2596) |
| 2256 | nvvm_wmma_m16n16k16_load_b_u8_row_stride, // llvm.nvvm.wmma.m16n16k16.load.b.row.stride.u8 (IntrinsicsNVVM.td:2596) |
| 2257 | nvvm_wmma_m16n16k16_load_b_u8_row, // llvm.nvvm.wmma.m16n16k16.load.b.row.u8 (IntrinsicsNVVM.td:2596) |
| 2258 | nvvm_wmma_m16n16k16_load_c_f16_col, // llvm.nvvm.wmma.m16n16k16.load.c.col.f16 (IntrinsicsNVVM.td:2596) |
| 2259 | nvvm_wmma_m16n16k16_load_c_f32_col, // llvm.nvvm.wmma.m16n16k16.load.c.col.f32 (IntrinsicsNVVM.td:2596) |
| 2260 | nvvm_wmma_m16n16k16_load_c_s32_col, // llvm.nvvm.wmma.m16n16k16.load.c.col.s32 (IntrinsicsNVVM.td:2596) |
| 2261 | nvvm_wmma_m16n16k16_load_c_f16_col_stride, // llvm.nvvm.wmma.m16n16k16.load.c.col.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2262 | nvvm_wmma_m16n16k16_load_c_f32_col_stride, // llvm.nvvm.wmma.m16n16k16.load.c.col.stride.f32 (IntrinsicsNVVM.td:2596) |
| 2263 | nvvm_wmma_m16n16k16_load_c_s32_col_stride, // llvm.nvvm.wmma.m16n16k16.load.c.col.stride.s32 (IntrinsicsNVVM.td:2596) |
| 2264 | nvvm_wmma_m16n16k16_load_c_f16_row, // llvm.nvvm.wmma.m16n16k16.load.c.row.f16 (IntrinsicsNVVM.td:2596) |
| 2265 | nvvm_wmma_m16n16k16_load_c_f32_row, // llvm.nvvm.wmma.m16n16k16.load.c.row.f32 (IntrinsicsNVVM.td:2596) |
| 2266 | nvvm_wmma_m16n16k16_load_c_s32_row, // llvm.nvvm.wmma.m16n16k16.load.c.row.s32 (IntrinsicsNVVM.td:2596) |
| 2267 | nvvm_wmma_m16n16k16_load_c_f16_row_stride, // llvm.nvvm.wmma.m16n16k16.load.c.row.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2268 | nvvm_wmma_m16n16k16_load_c_f32_row_stride, // llvm.nvvm.wmma.m16n16k16.load.c.row.stride.f32 (IntrinsicsNVVM.td:2596) |
| 2269 | nvvm_wmma_m16n16k16_load_c_s32_row_stride, // llvm.nvvm.wmma.m16n16k16.load.c.row.stride.s32 (IntrinsicsNVVM.td:2596) |
| 2270 | nvvm_wmma_m16n16k16_mma_col_col_bf16, // llvm.nvvm.wmma.m16n16k16.mma.col.col.bf16 (IntrinsicsNVVM.td:2618) |
| 2271 | nvvm_wmma_m16n16k16_mma_col_col_f16_f16, // llvm.nvvm.wmma.m16n16k16.mma.col.col.f16.f16 (IntrinsicsNVVM.td:2618) |
| 2272 | nvvm_wmma_m16n16k16_mma_col_col_f16_f16_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.col.col.f16.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2273 | nvvm_wmma_m16n16k16_mma_col_col_f16_f32, // llvm.nvvm.wmma.m16n16k16.mma.col.col.f16.f32 (IntrinsicsNVVM.td:2618) |
| 2274 | nvvm_wmma_m16n16k16_mma_col_col_f16_f32_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.col.col.f16.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2275 | nvvm_wmma_m16n16k16_mma_col_col_f32_f16, // llvm.nvvm.wmma.m16n16k16.mma.col.col.f32.f16 (IntrinsicsNVVM.td:2618) |
| 2276 | nvvm_wmma_m16n16k16_mma_col_col_f32_f16_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.col.col.f32.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2277 | nvvm_wmma_m16n16k16_mma_col_col_f32_f32, // llvm.nvvm.wmma.m16n16k16.mma.col.col.f32.f32 (IntrinsicsNVVM.td:2618) |
| 2278 | nvvm_wmma_m16n16k16_mma_col_col_f32_f32_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.col.col.f32.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2279 | nvvm_wmma_m16n16k16_mma_col_col_s8, // llvm.nvvm.wmma.m16n16k16.mma.col.col.s8 (IntrinsicsNVVM.td:2618) |
| 2280 | nvvm_wmma_m16n16k16_mma_col_col_s8_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.col.col.s8.satfinite (IntrinsicsNVVM.td:2618) |
| 2281 | nvvm_wmma_m16n16k16_mma_col_col_u8, // llvm.nvvm.wmma.m16n16k16.mma.col.col.u8 (IntrinsicsNVVM.td:2618) |
| 2282 | nvvm_wmma_m16n16k16_mma_col_col_u8_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.col.col.u8.satfinite (IntrinsicsNVVM.td:2618) |
| 2283 | nvvm_wmma_m16n16k16_mma_col_row_bf16, // llvm.nvvm.wmma.m16n16k16.mma.col.row.bf16 (IntrinsicsNVVM.td:2618) |
| 2284 | nvvm_wmma_m16n16k16_mma_col_row_f16_f16, // llvm.nvvm.wmma.m16n16k16.mma.col.row.f16.f16 (IntrinsicsNVVM.td:2618) |
| 2285 | nvvm_wmma_m16n16k16_mma_col_row_f16_f16_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.col.row.f16.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2286 | nvvm_wmma_m16n16k16_mma_col_row_f16_f32, // llvm.nvvm.wmma.m16n16k16.mma.col.row.f16.f32 (IntrinsicsNVVM.td:2618) |
| 2287 | nvvm_wmma_m16n16k16_mma_col_row_f16_f32_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.col.row.f16.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2288 | nvvm_wmma_m16n16k16_mma_col_row_f32_f16, // llvm.nvvm.wmma.m16n16k16.mma.col.row.f32.f16 (IntrinsicsNVVM.td:2618) |
| 2289 | nvvm_wmma_m16n16k16_mma_col_row_f32_f16_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.col.row.f32.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2290 | nvvm_wmma_m16n16k16_mma_col_row_f32_f32, // llvm.nvvm.wmma.m16n16k16.mma.col.row.f32.f32 (IntrinsicsNVVM.td:2618) |
| 2291 | nvvm_wmma_m16n16k16_mma_col_row_f32_f32_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.col.row.f32.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2292 | nvvm_wmma_m16n16k16_mma_col_row_s8, // llvm.nvvm.wmma.m16n16k16.mma.col.row.s8 (IntrinsicsNVVM.td:2618) |
| 2293 | nvvm_wmma_m16n16k16_mma_col_row_s8_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.col.row.s8.satfinite (IntrinsicsNVVM.td:2618) |
| 2294 | nvvm_wmma_m16n16k16_mma_col_row_u8, // llvm.nvvm.wmma.m16n16k16.mma.col.row.u8 (IntrinsicsNVVM.td:2618) |
| 2295 | nvvm_wmma_m16n16k16_mma_col_row_u8_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.col.row.u8.satfinite (IntrinsicsNVVM.td:2618) |
| 2296 | nvvm_wmma_m16n16k16_mma_row_col_bf16, // llvm.nvvm.wmma.m16n16k16.mma.row.col.bf16 (IntrinsicsNVVM.td:2618) |
| 2297 | nvvm_wmma_m16n16k16_mma_row_col_f16_f16, // llvm.nvvm.wmma.m16n16k16.mma.row.col.f16.f16 (IntrinsicsNVVM.td:2618) |
| 2298 | nvvm_wmma_m16n16k16_mma_row_col_f16_f16_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.row.col.f16.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2299 | nvvm_wmma_m16n16k16_mma_row_col_f16_f32, // llvm.nvvm.wmma.m16n16k16.mma.row.col.f16.f32 (IntrinsicsNVVM.td:2618) |
| 2300 | nvvm_wmma_m16n16k16_mma_row_col_f16_f32_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.row.col.f16.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2301 | nvvm_wmma_m16n16k16_mma_row_col_f32_f16, // llvm.nvvm.wmma.m16n16k16.mma.row.col.f32.f16 (IntrinsicsNVVM.td:2618) |
| 2302 | nvvm_wmma_m16n16k16_mma_row_col_f32_f16_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.row.col.f32.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2303 | nvvm_wmma_m16n16k16_mma_row_col_f32_f32, // llvm.nvvm.wmma.m16n16k16.mma.row.col.f32.f32 (IntrinsicsNVVM.td:2618) |
| 2304 | nvvm_wmma_m16n16k16_mma_row_col_f32_f32_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.row.col.f32.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2305 | nvvm_wmma_m16n16k16_mma_row_col_s8, // llvm.nvvm.wmma.m16n16k16.mma.row.col.s8 (IntrinsicsNVVM.td:2618) |
| 2306 | nvvm_wmma_m16n16k16_mma_row_col_s8_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.row.col.s8.satfinite (IntrinsicsNVVM.td:2618) |
| 2307 | nvvm_wmma_m16n16k16_mma_row_col_u8, // llvm.nvvm.wmma.m16n16k16.mma.row.col.u8 (IntrinsicsNVVM.td:2618) |
| 2308 | nvvm_wmma_m16n16k16_mma_row_col_u8_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.row.col.u8.satfinite (IntrinsicsNVVM.td:2618) |
| 2309 | nvvm_wmma_m16n16k16_mma_row_row_bf16, // llvm.nvvm.wmma.m16n16k16.mma.row.row.bf16 (IntrinsicsNVVM.td:2618) |
| 2310 | nvvm_wmma_m16n16k16_mma_row_row_f16_f16, // llvm.nvvm.wmma.m16n16k16.mma.row.row.f16.f16 (IntrinsicsNVVM.td:2618) |
| 2311 | nvvm_wmma_m16n16k16_mma_row_row_f16_f16_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.row.row.f16.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2312 | nvvm_wmma_m16n16k16_mma_row_row_f16_f32, // llvm.nvvm.wmma.m16n16k16.mma.row.row.f16.f32 (IntrinsicsNVVM.td:2618) |
| 2313 | nvvm_wmma_m16n16k16_mma_row_row_f16_f32_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.row.row.f16.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2314 | nvvm_wmma_m16n16k16_mma_row_row_f32_f16, // llvm.nvvm.wmma.m16n16k16.mma.row.row.f32.f16 (IntrinsicsNVVM.td:2618) |
| 2315 | nvvm_wmma_m16n16k16_mma_row_row_f32_f16_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.row.row.f32.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2316 | nvvm_wmma_m16n16k16_mma_row_row_f32_f32, // llvm.nvvm.wmma.m16n16k16.mma.row.row.f32.f32 (IntrinsicsNVVM.td:2618) |
| 2317 | nvvm_wmma_m16n16k16_mma_row_row_f32_f32_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.row.row.f32.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2318 | nvvm_wmma_m16n16k16_mma_row_row_s8, // llvm.nvvm.wmma.m16n16k16.mma.row.row.s8 (IntrinsicsNVVM.td:2618) |
| 2319 | nvvm_wmma_m16n16k16_mma_row_row_s8_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.row.row.s8.satfinite (IntrinsicsNVVM.td:2618) |
| 2320 | nvvm_wmma_m16n16k16_mma_row_row_u8, // llvm.nvvm.wmma.m16n16k16.mma.row.row.u8 (IntrinsicsNVVM.td:2618) |
| 2321 | nvvm_wmma_m16n16k16_mma_row_row_u8_satfinite, // llvm.nvvm.wmma.m16n16k16.mma.row.row.u8.satfinite (IntrinsicsNVVM.td:2618) |
| 2322 | nvvm_wmma_m16n16k16_store_d_f16_col, // llvm.nvvm.wmma.m16n16k16.store.d.col.f16 (IntrinsicsNVVM.td:2600) |
| 2323 | nvvm_wmma_m16n16k16_store_d_f32_col, // llvm.nvvm.wmma.m16n16k16.store.d.col.f32 (IntrinsicsNVVM.td:2600) |
| 2324 | nvvm_wmma_m16n16k16_store_d_s32_col, // llvm.nvvm.wmma.m16n16k16.store.d.col.s32 (IntrinsicsNVVM.td:2600) |
| 2325 | nvvm_wmma_m16n16k16_store_d_f16_col_stride, // llvm.nvvm.wmma.m16n16k16.store.d.col.stride.f16 (IntrinsicsNVVM.td:2600) |
| 2326 | nvvm_wmma_m16n16k16_store_d_f32_col_stride, // llvm.nvvm.wmma.m16n16k16.store.d.col.stride.f32 (IntrinsicsNVVM.td:2600) |
| 2327 | nvvm_wmma_m16n16k16_store_d_s32_col_stride, // llvm.nvvm.wmma.m16n16k16.store.d.col.stride.s32 (IntrinsicsNVVM.td:2600) |
| 2328 | nvvm_wmma_m16n16k16_store_d_f16_row, // llvm.nvvm.wmma.m16n16k16.store.d.row.f16 (IntrinsicsNVVM.td:2600) |
| 2329 | nvvm_wmma_m16n16k16_store_d_f32_row, // llvm.nvvm.wmma.m16n16k16.store.d.row.f32 (IntrinsicsNVVM.td:2600) |
| 2330 | nvvm_wmma_m16n16k16_store_d_s32_row, // llvm.nvvm.wmma.m16n16k16.store.d.row.s32 (IntrinsicsNVVM.td:2600) |
| 2331 | nvvm_wmma_m16n16k16_store_d_f16_row_stride, // llvm.nvvm.wmma.m16n16k16.store.d.row.stride.f16 (IntrinsicsNVVM.td:2600) |
| 2332 | nvvm_wmma_m16n16k16_store_d_f32_row_stride, // llvm.nvvm.wmma.m16n16k16.store.d.row.stride.f32 (IntrinsicsNVVM.td:2600) |
| 2333 | nvvm_wmma_m16n16k16_store_d_s32_row_stride, // llvm.nvvm.wmma.m16n16k16.store.d.row.stride.s32 (IntrinsicsNVVM.td:2600) |
| 2334 | nvvm_wmma_m16n16k8_load_a_tf32_col_stride, // llvm.nvvm.wmma.m16n16k8.load.a.col.stride.tf32 (IntrinsicsNVVM.td:2596) |
| 2335 | nvvm_wmma_m16n16k8_load_a_tf32_col, // llvm.nvvm.wmma.m16n16k8.load.a.col.tf32 (IntrinsicsNVVM.td:2596) |
| 2336 | nvvm_wmma_m16n16k8_load_a_tf32_row_stride, // llvm.nvvm.wmma.m16n16k8.load.a.row.stride.tf32 (IntrinsicsNVVM.td:2596) |
| 2337 | nvvm_wmma_m16n16k8_load_a_tf32_row, // llvm.nvvm.wmma.m16n16k8.load.a.row.tf32 (IntrinsicsNVVM.td:2596) |
| 2338 | nvvm_wmma_m16n16k8_load_b_tf32_col_stride, // llvm.nvvm.wmma.m16n16k8.load.b.col.stride.tf32 (IntrinsicsNVVM.td:2596) |
| 2339 | nvvm_wmma_m16n16k8_load_b_tf32_col, // llvm.nvvm.wmma.m16n16k8.load.b.col.tf32 (IntrinsicsNVVM.td:2596) |
| 2340 | nvvm_wmma_m16n16k8_load_b_tf32_row_stride, // llvm.nvvm.wmma.m16n16k8.load.b.row.stride.tf32 (IntrinsicsNVVM.td:2596) |
| 2341 | nvvm_wmma_m16n16k8_load_b_tf32_row, // llvm.nvvm.wmma.m16n16k8.load.b.row.tf32 (IntrinsicsNVVM.td:2596) |
| 2342 | nvvm_wmma_m16n16k8_load_c_f32_col, // llvm.nvvm.wmma.m16n16k8.load.c.col.f32 (IntrinsicsNVVM.td:2596) |
| 2343 | nvvm_wmma_m16n16k8_load_c_f32_col_stride, // llvm.nvvm.wmma.m16n16k8.load.c.col.stride.f32 (IntrinsicsNVVM.td:2596) |
| 2344 | nvvm_wmma_m16n16k8_load_c_f32_row, // llvm.nvvm.wmma.m16n16k8.load.c.row.f32 (IntrinsicsNVVM.td:2596) |
| 2345 | nvvm_wmma_m16n16k8_load_c_f32_row_stride, // llvm.nvvm.wmma.m16n16k8.load.c.row.stride.f32 (IntrinsicsNVVM.td:2596) |
| 2346 | nvvm_wmma_m16n16k8_mma_col_col_tf32, // llvm.nvvm.wmma.m16n16k8.mma.col.col.tf32 (IntrinsicsNVVM.td:2618) |
| 2347 | nvvm_wmma_m16n16k8_mma_col_row_tf32, // llvm.nvvm.wmma.m16n16k8.mma.col.row.tf32 (IntrinsicsNVVM.td:2618) |
| 2348 | nvvm_wmma_m16n16k8_mma_row_col_tf32, // llvm.nvvm.wmma.m16n16k8.mma.row.col.tf32 (IntrinsicsNVVM.td:2618) |
| 2349 | nvvm_wmma_m16n16k8_mma_row_row_tf32, // llvm.nvvm.wmma.m16n16k8.mma.row.row.tf32 (IntrinsicsNVVM.td:2618) |
| 2350 | nvvm_wmma_m16n16k8_store_d_f32_col, // llvm.nvvm.wmma.m16n16k8.store.d.col.f32 (IntrinsicsNVVM.td:2600) |
| 2351 | nvvm_wmma_m16n16k8_store_d_f32_col_stride, // llvm.nvvm.wmma.m16n16k8.store.d.col.stride.f32 (IntrinsicsNVVM.td:2600) |
| 2352 | nvvm_wmma_m16n16k8_store_d_f32_row, // llvm.nvvm.wmma.m16n16k8.store.d.row.f32 (IntrinsicsNVVM.td:2600) |
| 2353 | nvvm_wmma_m16n16k8_store_d_f32_row_stride, // llvm.nvvm.wmma.m16n16k8.store.d.row.stride.f32 (IntrinsicsNVVM.td:2600) |
| 2354 | nvvm_wmma_m32n8k16_load_a_bf16_col, // llvm.nvvm.wmma.m32n8k16.load.a.col.bf16 (IntrinsicsNVVM.td:2596) |
| 2355 | nvvm_wmma_m32n8k16_load_a_f16_col, // llvm.nvvm.wmma.m32n8k16.load.a.col.f16 (IntrinsicsNVVM.td:2596) |
| 2356 | nvvm_wmma_m32n8k16_load_a_s8_col, // llvm.nvvm.wmma.m32n8k16.load.a.col.s8 (IntrinsicsNVVM.td:2596) |
| 2357 | nvvm_wmma_m32n8k16_load_a_bf16_col_stride, // llvm.nvvm.wmma.m32n8k16.load.a.col.stride.bf16 (IntrinsicsNVVM.td:2596) |
| 2358 | nvvm_wmma_m32n8k16_load_a_f16_col_stride, // llvm.nvvm.wmma.m32n8k16.load.a.col.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2359 | nvvm_wmma_m32n8k16_load_a_s8_col_stride, // llvm.nvvm.wmma.m32n8k16.load.a.col.stride.s8 (IntrinsicsNVVM.td:2596) |
| 2360 | nvvm_wmma_m32n8k16_load_a_u8_col_stride, // llvm.nvvm.wmma.m32n8k16.load.a.col.stride.u8 (IntrinsicsNVVM.td:2596) |
| 2361 | nvvm_wmma_m32n8k16_load_a_u8_col, // llvm.nvvm.wmma.m32n8k16.load.a.col.u8 (IntrinsicsNVVM.td:2596) |
| 2362 | nvvm_wmma_m32n8k16_load_a_bf16_row, // llvm.nvvm.wmma.m32n8k16.load.a.row.bf16 (IntrinsicsNVVM.td:2596) |
| 2363 | nvvm_wmma_m32n8k16_load_a_f16_row, // llvm.nvvm.wmma.m32n8k16.load.a.row.f16 (IntrinsicsNVVM.td:2596) |
| 2364 | nvvm_wmma_m32n8k16_load_a_s8_row, // llvm.nvvm.wmma.m32n8k16.load.a.row.s8 (IntrinsicsNVVM.td:2596) |
| 2365 | nvvm_wmma_m32n8k16_load_a_bf16_row_stride, // llvm.nvvm.wmma.m32n8k16.load.a.row.stride.bf16 (IntrinsicsNVVM.td:2596) |
| 2366 | nvvm_wmma_m32n8k16_load_a_f16_row_stride, // llvm.nvvm.wmma.m32n8k16.load.a.row.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2367 | nvvm_wmma_m32n8k16_load_a_s8_row_stride, // llvm.nvvm.wmma.m32n8k16.load.a.row.stride.s8 (IntrinsicsNVVM.td:2596) |
| 2368 | nvvm_wmma_m32n8k16_load_a_u8_row_stride, // llvm.nvvm.wmma.m32n8k16.load.a.row.stride.u8 (IntrinsicsNVVM.td:2596) |
| 2369 | nvvm_wmma_m32n8k16_load_a_u8_row, // llvm.nvvm.wmma.m32n8k16.load.a.row.u8 (IntrinsicsNVVM.td:2596) |
| 2370 | nvvm_wmma_m32n8k16_load_b_bf16_col, // llvm.nvvm.wmma.m32n8k16.load.b.col.bf16 (IntrinsicsNVVM.td:2596) |
| 2371 | nvvm_wmma_m32n8k16_load_b_f16_col, // llvm.nvvm.wmma.m32n8k16.load.b.col.f16 (IntrinsicsNVVM.td:2596) |
| 2372 | nvvm_wmma_m32n8k16_load_b_s8_col, // llvm.nvvm.wmma.m32n8k16.load.b.col.s8 (IntrinsicsNVVM.td:2596) |
| 2373 | nvvm_wmma_m32n8k16_load_b_bf16_col_stride, // llvm.nvvm.wmma.m32n8k16.load.b.col.stride.bf16 (IntrinsicsNVVM.td:2596) |
| 2374 | nvvm_wmma_m32n8k16_load_b_f16_col_stride, // llvm.nvvm.wmma.m32n8k16.load.b.col.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2375 | nvvm_wmma_m32n8k16_load_b_s8_col_stride, // llvm.nvvm.wmma.m32n8k16.load.b.col.stride.s8 (IntrinsicsNVVM.td:2596) |
| 2376 | nvvm_wmma_m32n8k16_load_b_u8_col_stride, // llvm.nvvm.wmma.m32n8k16.load.b.col.stride.u8 (IntrinsicsNVVM.td:2596) |
| 2377 | nvvm_wmma_m32n8k16_load_b_u8_col, // llvm.nvvm.wmma.m32n8k16.load.b.col.u8 (IntrinsicsNVVM.td:2596) |
| 2378 | nvvm_wmma_m32n8k16_load_b_bf16_row, // llvm.nvvm.wmma.m32n8k16.load.b.row.bf16 (IntrinsicsNVVM.td:2596) |
| 2379 | nvvm_wmma_m32n8k16_load_b_f16_row, // llvm.nvvm.wmma.m32n8k16.load.b.row.f16 (IntrinsicsNVVM.td:2596) |
| 2380 | nvvm_wmma_m32n8k16_load_b_s8_row, // llvm.nvvm.wmma.m32n8k16.load.b.row.s8 (IntrinsicsNVVM.td:2596) |
| 2381 | nvvm_wmma_m32n8k16_load_b_bf16_row_stride, // llvm.nvvm.wmma.m32n8k16.load.b.row.stride.bf16 (IntrinsicsNVVM.td:2596) |
| 2382 | nvvm_wmma_m32n8k16_load_b_f16_row_stride, // llvm.nvvm.wmma.m32n8k16.load.b.row.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2383 | nvvm_wmma_m32n8k16_load_b_s8_row_stride, // llvm.nvvm.wmma.m32n8k16.load.b.row.stride.s8 (IntrinsicsNVVM.td:2596) |
| 2384 | nvvm_wmma_m32n8k16_load_b_u8_row_stride, // llvm.nvvm.wmma.m32n8k16.load.b.row.stride.u8 (IntrinsicsNVVM.td:2596) |
| 2385 | nvvm_wmma_m32n8k16_load_b_u8_row, // llvm.nvvm.wmma.m32n8k16.load.b.row.u8 (IntrinsicsNVVM.td:2596) |
| 2386 | nvvm_wmma_m32n8k16_load_c_f16_col, // llvm.nvvm.wmma.m32n8k16.load.c.col.f16 (IntrinsicsNVVM.td:2596) |
| 2387 | nvvm_wmma_m32n8k16_load_c_f32_col, // llvm.nvvm.wmma.m32n8k16.load.c.col.f32 (IntrinsicsNVVM.td:2596) |
| 2388 | nvvm_wmma_m32n8k16_load_c_s32_col, // llvm.nvvm.wmma.m32n8k16.load.c.col.s32 (IntrinsicsNVVM.td:2596) |
| 2389 | nvvm_wmma_m32n8k16_load_c_f16_col_stride, // llvm.nvvm.wmma.m32n8k16.load.c.col.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2390 | nvvm_wmma_m32n8k16_load_c_f32_col_stride, // llvm.nvvm.wmma.m32n8k16.load.c.col.stride.f32 (IntrinsicsNVVM.td:2596) |
| 2391 | nvvm_wmma_m32n8k16_load_c_s32_col_stride, // llvm.nvvm.wmma.m32n8k16.load.c.col.stride.s32 (IntrinsicsNVVM.td:2596) |
| 2392 | nvvm_wmma_m32n8k16_load_c_f16_row, // llvm.nvvm.wmma.m32n8k16.load.c.row.f16 (IntrinsicsNVVM.td:2596) |
| 2393 | nvvm_wmma_m32n8k16_load_c_f32_row, // llvm.nvvm.wmma.m32n8k16.load.c.row.f32 (IntrinsicsNVVM.td:2596) |
| 2394 | nvvm_wmma_m32n8k16_load_c_s32_row, // llvm.nvvm.wmma.m32n8k16.load.c.row.s32 (IntrinsicsNVVM.td:2596) |
| 2395 | nvvm_wmma_m32n8k16_load_c_f16_row_stride, // llvm.nvvm.wmma.m32n8k16.load.c.row.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2396 | nvvm_wmma_m32n8k16_load_c_f32_row_stride, // llvm.nvvm.wmma.m32n8k16.load.c.row.stride.f32 (IntrinsicsNVVM.td:2596) |
| 2397 | nvvm_wmma_m32n8k16_load_c_s32_row_stride, // llvm.nvvm.wmma.m32n8k16.load.c.row.stride.s32 (IntrinsicsNVVM.td:2596) |
| 2398 | nvvm_wmma_m32n8k16_mma_col_col_bf16, // llvm.nvvm.wmma.m32n8k16.mma.col.col.bf16 (IntrinsicsNVVM.td:2618) |
| 2399 | nvvm_wmma_m32n8k16_mma_col_col_f16_f16, // llvm.nvvm.wmma.m32n8k16.mma.col.col.f16.f16 (IntrinsicsNVVM.td:2618) |
| 2400 | nvvm_wmma_m32n8k16_mma_col_col_f16_f16_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.col.col.f16.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2401 | nvvm_wmma_m32n8k16_mma_col_col_f16_f32, // llvm.nvvm.wmma.m32n8k16.mma.col.col.f16.f32 (IntrinsicsNVVM.td:2618) |
| 2402 | nvvm_wmma_m32n8k16_mma_col_col_f16_f32_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.col.col.f16.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2403 | nvvm_wmma_m32n8k16_mma_col_col_f32_f16, // llvm.nvvm.wmma.m32n8k16.mma.col.col.f32.f16 (IntrinsicsNVVM.td:2618) |
| 2404 | nvvm_wmma_m32n8k16_mma_col_col_f32_f16_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.col.col.f32.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2405 | nvvm_wmma_m32n8k16_mma_col_col_f32_f32, // llvm.nvvm.wmma.m32n8k16.mma.col.col.f32.f32 (IntrinsicsNVVM.td:2618) |
| 2406 | nvvm_wmma_m32n8k16_mma_col_col_f32_f32_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.col.col.f32.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2407 | nvvm_wmma_m32n8k16_mma_col_col_s8, // llvm.nvvm.wmma.m32n8k16.mma.col.col.s8 (IntrinsicsNVVM.td:2618) |
| 2408 | nvvm_wmma_m32n8k16_mma_col_col_s8_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.col.col.s8.satfinite (IntrinsicsNVVM.td:2618) |
| 2409 | nvvm_wmma_m32n8k16_mma_col_col_u8, // llvm.nvvm.wmma.m32n8k16.mma.col.col.u8 (IntrinsicsNVVM.td:2618) |
| 2410 | nvvm_wmma_m32n8k16_mma_col_col_u8_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.col.col.u8.satfinite (IntrinsicsNVVM.td:2618) |
| 2411 | nvvm_wmma_m32n8k16_mma_col_row_bf16, // llvm.nvvm.wmma.m32n8k16.mma.col.row.bf16 (IntrinsicsNVVM.td:2618) |
| 2412 | nvvm_wmma_m32n8k16_mma_col_row_f16_f16, // llvm.nvvm.wmma.m32n8k16.mma.col.row.f16.f16 (IntrinsicsNVVM.td:2618) |
| 2413 | nvvm_wmma_m32n8k16_mma_col_row_f16_f16_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.col.row.f16.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2414 | nvvm_wmma_m32n8k16_mma_col_row_f16_f32, // llvm.nvvm.wmma.m32n8k16.mma.col.row.f16.f32 (IntrinsicsNVVM.td:2618) |
| 2415 | nvvm_wmma_m32n8k16_mma_col_row_f16_f32_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.col.row.f16.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2416 | nvvm_wmma_m32n8k16_mma_col_row_f32_f16, // llvm.nvvm.wmma.m32n8k16.mma.col.row.f32.f16 (IntrinsicsNVVM.td:2618) |
| 2417 | nvvm_wmma_m32n8k16_mma_col_row_f32_f16_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.col.row.f32.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2418 | nvvm_wmma_m32n8k16_mma_col_row_f32_f32, // llvm.nvvm.wmma.m32n8k16.mma.col.row.f32.f32 (IntrinsicsNVVM.td:2618) |
| 2419 | nvvm_wmma_m32n8k16_mma_col_row_f32_f32_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.col.row.f32.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2420 | nvvm_wmma_m32n8k16_mma_col_row_s8, // llvm.nvvm.wmma.m32n8k16.mma.col.row.s8 (IntrinsicsNVVM.td:2618) |
| 2421 | nvvm_wmma_m32n8k16_mma_col_row_s8_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.col.row.s8.satfinite (IntrinsicsNVVM.td:2618) |
| 2422 | nvvm_wmma_m32n8k16_mma_col_row_u8, // llvm.nvvm.wmma.m32n8k16.mma.col.row.u8 (IntrinsicsNVVM.td:2618) |
| 2423 | nvvm_wmma_m32n8k16_mma_col_row_u8_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.col.row.u8.satfinite (IntrinsicsNVVM.td:2618) |
| 2424 | nvvm_wmma_m32n8k16_mma_row_col_bf16, // llvm.nvvm.wmma.m32n8k16.mma.row.col.bf16 (IntrinsicsNVVM.td:2618) |
| 2425 | nvvm_wmma_m32n8k16_mma_row_col_f16_f16, // llvm.nvvm.wmma.m32n8k16.mma.row.col.f16.f16 (IntrinsicsNVVM.td:2618) |
| 2426 | nvvm_wmma_m32n8k16_mma_row_col_f16_f16_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.row.col.f16.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2427 | nvvm_wmma_m32n8k16_mma_row_col_f16_f32, // llvm.nvvm.wmma.m32n8k16.mma.row.col.f16.f32 (IntrinsicsNVVM.td:2618) |
| 2428 | nvvm_wmma_m32n8k16_mma_row_col_f16_f32_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.row.col.f16.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2429 | nvvm_wmma_m32n8k16_mma_row_col_f32_f16, // llvm.nvvm.wmma.m32n8k16.mma.row.col.f32.f16 (IntrinsicsNVVM.td:2618) |
| 2430 | nvvm_wmma_m32n8k16_mma_row_col_f32_f16_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.row.col.f32.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2431 | nvvm_wmma_m32n8k16_mma_row_col_f32_f32, // llvm.nvvm.wmma.m32n8k16.mma.row.col.f32.f32 (IntrinsicsNVVM.td:2618) |
| 2432 | nvvm_wmma_m32n8k16_mma_row_col_f32_f32_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.row.col.f32.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2433 | nvvm_wmma_m32n8k16_mma_row_col_s8, // llvm.nvvm.wmma.m32n8k16.mma.row.col.s8 (IntrinsicsNVVM.td:2618) |
| 2434 | nvvm_wmma_m32n8k16_mma_row_col_s8_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.row.col.s8.satfinite (IntrinsicsNVVM.td:2618) |
| 2435 | nvvm_wmma_m32n8k16_mma_row_col_u8, // llvm.nvvm.wmma.m32n8k16.mma.row.col.u8 (IntrinsicsNVVM.td:2618) |
| 2436 | nvvm_wmma_m32n8k16_mma_row_col_u8_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.row.col.u8.satfinite (IntrinsicsNVVM.td:2618) |
| 2437 | nvvm_wmma_m32n8k16_mma_row_row_bf16, // llvm.nvvm.wmma.m32n8k16.mma.row.row.bf16 (IntrinsicsNVVM.td:2618) |
| 2438 | nvvm_wmma_m32n8k16_mma_row_row_f16_f16, // llvm.nvvm.wmma.m32n8k16.mma.row.row.f16.f16 (IntrinsicsNVVM.td:2618) |
| 2439 | nvvm_wmma_m32n8k16_mma_row_row_f16_f16_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.row.row.f16.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2440 | nvvm_wmma_m32n8k16_mma_row_row_f16_f32, // llvm.nvvm.wmma.m32n8k16.mma.row.row.f16.f32 (IntrinsicsNVVM.td:2618) |
| 2441 | nvvm_wmma_m32n8k16_mma_row_row_f16_f32_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.row.row.f16.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2442 | nvvm_wmma_m32n8k16_mma_row_row_f32_f16, // llvm.nvvm.wmma.m32n8k16.mma.row.row.f32.f16 (IntrinsicsNVVM.td:2618) |
| 2443 | nvvm_wmma_m32n8k16_mma_row_row_f32_f16_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.row.row.f32.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2444 | nvvm_wmma_m32n8k16_mma_row_row_f32_f32, // llvm.nvvm.wmma.m32n8k16.mma.row.row.f32.f32 (IntrinsicsNVVM.td:2618) |
| 2445 | nvvm_wmma_m32n8k16_mma_row_row_f32_f32_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.row.row.f32.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2446 | nvvm_wmma_m32n8k16_mma_row_row_s8, // llvm.nvvm.wmma.m32n8k16.mma.row.row.s8 (IntrinsicsNVVM.td:2618) |
| 2447 | nvvm_wmma_m32n8k16_mma_row_row_s8_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.row.row.s8.satfinite (IntrinsicsNVVM.td:2618) |
| 2448 | nvvm_wmma_m32n8k16_mma_row_row_u8, // llvm.nvvm.wmma.m32n8k16.mma.row.row.u8 (IntrinsicsNVVM.td:2618) |
| 2449 | nvvm_wmma_m32n8k16_mma_row_row_u8_satfinite, // llvm.nvvm.wmma.m32n8k16.mma.row.row.u8.satfinite (IntrinsicsNVVM.td:2618) |
| 2450 | nvvm_wmma_m32n8k16_store_d_f16_col, // llvm.nvvm.wmma.m32n8k16.store.d.col.f16 (IntrinsicsNVVM.td:2600) |
| 2451 | nvvm_wmma_m32n8k16_store_d_f32_col, // llvm.nvvm.wmma.m32n8k16.store.d.col.f32 (IntrinsicsNVVM.td:2600) |
| 2452 | nvvm_wmma_m32n8k16_store_d_s32_col, // llvm.nvvm.wmma.m32n8k16.store.d.col.s32 (IntrinsicsNVVM.td:2600) |
| 2453 | nvvm_wmma_m32n8k16_store_d_f16_col_stride, // llvm.nvvm.wmma.m32n8k16.store.d.col.stride.f16 (IntrinsicsNVVM.td:2600) |
| 2454 | nvvm_wmma_m32n8k16_store_d_f32_col_stride, // llvm.nvvm.wmma.m32n8k16.store.d.col.stride.f32 (IntrinsicsNVVM.td:2600) |
| 2455 | nvvm_wmma_m32n8k16_store_d_s32_col_stride, // llvm.nvvm.wmma.m32n8k16.store.d.col.stride.s32 (IntrinsicsNVVM.td:2600) |
| 2456 | nvvm_wmma_m32n8k16_store_d_f16_row, // llvm.nvvm.wmma.m32n8k16.store.d.row.f16 (IntrinsicsNVVM.td:2600) |
| 2457 | nvvm_wmma_m32n8k16_store_d_f32_row, // llvm.nvvm.wmma.m32n8k16.store.d.row.f32 (IntrinsicsNVVM.td:2600) |
| 2458 | nvvm_wmma_m32n8k16_store_d_s32_row, // llvm.nvvm.wmma.m32n8k16.store.d.row.s32 (IntrinsicsNVVM.td:2600) |
| 2459 | nvvm_wmma_m32n8k16_store_d_f16_row_stride, // llvm.nvvm.wmma.m32n8k16.store.d.row.stride.f16 (IntrinsicsNVVM.td:2600) |
| 2460 | nvvm_wmma_m32n8k16_store_d_f32_row_stride, // llvm.nvvm.wmma.m32n8k16.store.d.row.stride.f32 (IntrinsicsNVVM.td:2600) |
| 2461 | nvvm_wmma_m32n8k16_store_d_s32_row_stride, // llvm.nvvm.wmma.m32n8k16.store.d.row.stride.s32 (IntrinsicsNVVM.td:2600) |
| 2462 | nvvm_wmma_m8n32k16_load_a_bf16_col, // llvm.nvvm.wmma.m8n32k16.load.a.col.bf16 (IntrinsicsNVVM.td:2596) |
| 2463 | nvvm_wmma_m8n32k16_load_a_f16_col, // llvm.nvvm.wmma.m8n32k16.load.a.col.f16 (IntrinsicsNVVM.td:2596) |
| 2464 | nvvm_wmma_m8n32k16_load_a_s8_col, // llvm.nvvm.wmma.m8n32k16.load.a.col.s8 (IntrinsicsNVVM.td:2596) |
| 2465 | nvvm_wmma_m8n32k16_load_a_bf16_col_stride, // llvm.nvvm.wmma.m8n32k16.load.a.col.stride.bf16 (IntrinsicsNVVM.td:2596) |
| 2466 | nvvm_wmma_m8n32k16_load_a_f16_col_stride, // llvm.nvvm.wmma.m8n32k16.load.a.col.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2467 | nvvm_wmma_m8n32k16_load_a_s8_col_stride, // llvm.nvvm.wmma.m8n32k16.load.a.col.stride.s8 (IntrinsicsNVVM.td:2596) |
| 2468 | nvvm_wmma_m8n32k16_load_a_u8_col_stride, // llvm.nvvm.wmma.m8n32k16.load.a.col.stride.u8 (IntrinsicsNVVM.td:2596) |
| 2469 | nvvm_wmma_m8n32k16_load_a_u8_col, // llvm.nvvm.wmma.m8n32k16.load.a.col.u8 (IntrinsicsNVVM.td:2596) |
| 2470 | nvvm_wmma_m8n32k16_load_a_bf16_row, // llvm.nvvm.wmma.m8n32k16.load.a.row.bf16 (IntrinsicsNVVM.td:2596) |
| 2471 | nvvm_wmma_m8n32k16_load_a_f16_row, // llvm.nvvm.wmma.m8n32k16.load.a.row.f16 (IntrinsicsNVVM.td:2596) |
| 2472 | nvvm_wmma_m8n32k16_load_a_s8_row, // llvm.nvvm.wmma.m8n32k16.load.a.row.s8 (IntrinsicsNVVM.td:2596) |
| 2473 | nvvm_wmma_m8n32k16_load_a_bf16_row_stride, // llvm.nvvm.wmma.m8n32k16.load.a.row.stride.bf16 (IntrinsicsNVVM.td:2596) |
| 2474 | nvvm_wmma_m8n32k16_load_a_f16_row_stride, // llvm.nvvm.wmma.m8n32k16.load.a.row.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2475 | nvvm_wmma_m8n32k16_load_a_s8_row_stride, // llvm.nvvm.wmma.m8n32k16.load.a.row.stride.s8 (IntrinsicsNVVM.td:2596) |
| 2476 | nvvm_wmma_m8n32k16_load_a_u8_row_stride, // llvm.nvvm.wmma.m8n32k16.load.a.row.stride.u8 (IntrinsicsNVVM.td:2596) |
| 2477 | nvvm_wmma_m8n32k16_load_a_u8_row, // llvm.nvvm.wmma.m8n32k16.load.a.row.u8 (IntrinsicsNVVM.td:2596) |
| 2478 | nvvm_wmma_m8n32k16_load_b_bf16_col, // llvm.nvvm.wmma.m8n32k16.load.b.col.bf16 (IntrinsicsNVVM.td:2596) |
| 2479 | nvvm_wmma_m8n32k16_load_b_f16_col, // llvm.nvvm.wmma.m8n32k16.load.b.col.f16 (IntrinsicsNVVM.td:2596) |
| 2480 | nvvm_wmma_m8n32k16_load_b_s8_col, // llvm.nvvm.wmma.m8n32k16.load.b.col.s8 (IntrinsicsNVVM.td:2596) |
| 2481 | nvvm_wmma_m8n32k16_load_b_bf16_col_stride, // llvm.nvvm.wmma.m8n32k16.load.b.col.stride.bf16 (IntrinsicsNVVM.td:2596) |
| 2482 | nvvm_wmma_m8n32k16_load_b_f16_col_stride, // llvm.nvvm.wmma.m8n32k16.load.b.col.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2483 | nvvm_wmma_m8n32k16_load_b_s8_col_stride, // llvm.nvvm.wmma.m8n32k16.load.b.col.stride.s8 (IntrinsicsNVVM.td:2596) |
| 2484 | nvvm_wmma_m8n32k16_load_b_u8_col_stride, // llvm.nvvm.wmma.m8n32k16.load.b.col.stride.u8 (IntrinsicsNVVM.td:2596) |
| 2485 | nvvm_wmma_m8n32k16_load_b_u8_col, // llvm.nvvm.wmma.m8n32k16.load.b.col.u8 (IntrinsicsNVVM.td:2596) |
| 2486 | nvvm_wmma_m8n32k16_load_b_bf16_row, // llvm.nvvm.wmma.m8n32k16.load.b.row.bf16 (IntrinsicsNVVM.td:2596) |
| 2487 | nvvm_wmma_m8n32k16_load_b_f16_row, // llvm.nvvm.wmma.m8n32k16.load.b.row.f16 (IntrinsicsNVVM.td:2596) |
| 2488 | nvvm_wmma_m8n32k16_load_b_s8_row, // llvm.nvvm.wmma.m8n32k16.load.b.row.s8 (IntrinsicsNVVM.td:2596) |
| 2489 | nvvm_wmma_m8n32k16_load_b_bf16_row_stride, // llvm.nvvm.wmma.m8n32k16.load.b.row.stride.bf16 (IntrinsicsNVVM.td:2596) |
| 2490 | nvvm_wmma_m8n32k16_load_b_f16_row_stride, // llvm.nvvm.wmma.m8n32k16.load.b.row.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2491 | nvvm_wmma_m8n32k16_load_b_s8_row_stride, // llvm.nvvm.wmma.m8n32k16.load.b.row.stride.s8 (IntrinsicsNVVM.td:2596) |
| 2492 | nvvm_wmma_m8n32k16_load_b_u8_row_stride, // llvm.nvvm.wmma.m8n32k16.load.b.row.stride.u8 (IntrinsicsNVVM.td:2596) |
| 2493 | nvvm_wmma_m8n32k16_load_b_u8_row, // llvm.nvvm.wmma.m8n32k16.load.b.row.u8 (IntrinsicsNVVM.td:2596) |
| 2494 | nvvm_wmma_m8n32k16_load_c_f16_col, // llvm.nvvm.wmma.m8n32k16.load.c.col.f16 (IntrinsicsNVVM.td:2596) |
| 2495 | nvvm_wmma_m8n32k16_load_c_f32_col, // llvm.nvvm.wmma.m8n32k16.load.c.col.f32 (IntrinsicsNVVM.td:2596) |
| 2496 | nvvm_wmma_m8n32k16_load_c_s32_col, // llvm.nvvm.wmma.m8n32k16.load.c.col.s32 (IntrinsicsNVVM.td:2596) |
| 2497 | nvvm_wmma_m8n32k16_load_c_f16_col_stride, // llvm.nvvm.wmma.m8n32k16.load.c.col.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2498 | nvvm_wmma_m8n32k16_load_c_f32_col_stride, // llvm.nvvm.wmma.m8n32k16.load.c.col.stride.f32 (IntrinsicsNVVM.td:2596) |
| 2499 | nvvm_wmma_m8n32k16_load_c_s32_col_stride, // llvm.nvvm.wmma.m8n32k16.load.c.col.stride.s32 (IntrinsicsNVVM.td:2596) |
| 2500 | nvvm_wmma_m8n32k16_load_c_f16_row, // llvm.nvvm.wmma.m8n32k16.load.c.row.f16 (IntrinsicsNVVM.td:2596) |
| 2501 | nvvm_wmma_m8n32k16_load_c_f32_row, // llvm.nvvm.wmma.m8n32k16.load.c.row.f32 (IntrinsicsNVVM.td:2596) |
| 2502 | nvvm_wmma_m8n32k16_load_c_s32_row, // llvm.nvvm.wmma.m8n32k16.load.c.row.s32 (IntrinsicsNVVM.td:2596) |
| 2503 | nvvm_wmma_m8n32k16_load_c_f16_row_stride, // llvm.nvvm.wmma.m8n32k16.load.c.row.stride.f16 (IntrinsicsNVVM.td:2596) |
| 2504 | nvvm_wmma_m8n32k16_load_c_f32_row_stride, // llvm.nvvm.wmma.m8n32k16.load.c.row.stride.f32 (IntrinsicsNVVM.td:2596) |
| 2505 | nvvm_wmma_m8n32k16_load_c_s32_row_stride, // llvm.nvvm.wmma.m8n32k16.load.c.row.stride.s32 (IntrinsicsNVVM.td:2596) |
| 2506 | nvvm_wmma_m8n32k16_mma_col_col_bf16, // llvm.nvvm.wmma.m8n32k16.mma.col.col.bf16 (IntrinsicsNVVM.td:2618) |
| 2507 | nvvm_wmma_m8n32k16_mma_col_col_f16_f16, // llvm.nvvm.wmma.m8n32k16.mma.col.col.f16.f16 (IntrinsicsNVVM.td:2618) |
| 2508 | nvvm_wmma_m8n32k16_mma_col_col_f16_f16_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.col.col.f16.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2509 | nvvm_wmma_m8n32k16_mma_col_col_f16_f32, // llvm.nvvm.wmma.m8n32k16.mma.col.col.f16.f32 (IntrinsicsNVVM.td:2618) |
| 2510 | nvvm_wmma_m8n32k16_mma_col_col_f16_f32_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.col.col.f16.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2511 | nvvm_wmma_m8n32k16_mma_col_col_f32_f16, // llvm.nvvm.wmma.m8n32k16.mma.col.col.f32.f16 (IntrinsicsNVVM.td:2618) |
| 2512 | nvvm_wmma_m8n32k16_mma_col_col_f32_f16_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.col.col.f32.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2513 | nvvm_wmma_m8n32k16_mma_col_col_f32_f32, // llvm.nvvm.wmma.m8n32k16.mma.col.col.f32.f32 (IntrinsicsNVVM.td:2618) |
| 2514 | nvvm_wmma_m8n32k16_mma_col_col_f32_f32_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.col.col.f32.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2515 | nvvm_wmma_m8n32k16_mma_col_col_s8, // llvm.nvvm.wmma.m8n32k16.mma.col.col.s8 (IntrinsicsNVVM.td:2618) |
| 2516 | nvvm_wmma_m8n32k16_mma_col_col_s8_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.col.col.s8.satfinite (IntrinsicsNVVM.td:2618) |
| 2517 | nvvm_wmma_m8n32k16_mma_col_col_u8, // llvm.nvvm.wmma.m8n32k16.mma.col.col.u8 (IntrinsicsNVVM.td:2618) |
| 2518 | nvvm_wmma_m8n32k16_mma_col_col_u8_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.col.col.u8.satfinite (IntrinsicsNVVM.td:2618) |
| 2519 | nvvm_wmma_m8n32k16_mma_col_row_bf16, // llvm.nvvm.wmma.m8n32k16.mma.col.row.bf16 (IntrinsicsNVVM.td:2618) |
| 2520 | nvvm_wmma_m8n32k16_mma_col_row_f16_f16, // llvm.nvvm.wmma.m8n32k16.mma.col.row.f16.f16 (IntrinsicsNVVM.td:2618) |
| 2521 | nvvm_wmma_m8n32k16_mma_col_row_f16_f16_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.col.row.f16.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2522 | nvvm_wmma_m8n32k16_mma_col_row_f16_f32, // llvm.nvvm.wmma.m8n32k16.mma.col.row.f16.f32 (IntrinsicsNVVM.td:2618) |
| 2523 | nvvm_wmma_m8n32k16_mma_col_row_f16_f32_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.col.row.f16.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2524 | nvvm_wmma_m8n32k16_mma_col_row_f32_f16, // llvm.nvvm.wmma.m8n32k16.mma.col.row.f32.f16 (IntrinsicsNVVM.td:2618) |
| 2525 | nvvm_wmma_m8n32k16_mma_col_row_f32_f16_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.col.row.f32.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2526 | nvvm_wmma_m8n32k16_mma_col_row_f32_f32, // llvm.nvvm.wmma.m8n32k16.mma.col.row.f32.f32 (IntrinsicsNVVM.td:2618) |
| 2527 | nvvm_wmma_m8n32k16_mma_col_row_f32_f32_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.col.row.f32.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2528 | nvvm_wmma_m8n32k16_mma_col_row_s8, // llvm.nvvm.wmma.m8n32k16.mma.col.row.s8 (IntrinsicsNVVM.td:2618) |
| 2529 | nvvm_wmma_m8n32k16_mma_col_row_s8_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.col.row.s8.satfinite (IntrinsicsNVVM.td:2618) |
| 2530 | nvvm_wmma_m8n32k16_mma_col_row_u8, // llvm.nvvm.wmma.m8n32k16.mma.col.row.u8 (IntrinsicsNVVM.td:2618) |
| 2531 | nvvm_wmma_m8n32k16_mma_col_row_u8_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.col.row.u8.satfinite (IntrinsicsNVVM.td:2618) |
| 2532 | nvvm_wmma_m8n32k16_mma_row_col_bf16, // llvm.nvvm.wmma.m8n32k16.mma.row.col.bf16 (IntrinsicsNVVM.td:2618) |
| 2533 | nvvm_wmma_m8n32k16_mma_row_col_f16_f16, // llvm.nvvm.wmma.m8n32k16.mma.row.col.f16.f16 (IntrinsicsNVVM.td:2618) |
| 2534 | nvvm_wmma_m8n32k16_mma_row_col_f16_f16_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.row.col.f16.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2535 | nvvm_wmma_m8n32k16_mma_row_col_f16_f32, // llvm.nvvm.wmma.m8n32k16.mma.row.col.f16.f32 (IntrinsicsNVVM.td:2618) |
| 2536 | nvvm_wmma_m8n32k16_mma_row_col_f16_f32_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.row.col.f16.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2537 | nvvm_wmma_m8n32k16_mma_row_col_f32_f16, // llvm.nvvm.wmma.m8n32k16.mma.row.col.f32.f16 (IntrinsicsNVVM.td:2618) |
| 2538 | nvvm_wmma_m8n32k16_mma_row_col_f32_f16_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.row.col.f32.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2539 | nvvm_wmma_m8n32k16_mma_row_col_f32_f32, // llvm.nvvm.wmma.m8n32k16.mma.row.col.f32.f32 (IntrinsicsNVVM.td:2618) |
| 2540 | nvvm_wmma_m8n32k16_mma_row_col_f32_f32_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.row.col.f32.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2541 | nvvm_wmma_m8n32k16_mma_row_col_s8, // llvm.nvvm.wmma.m8n32k16.mma.row.col.s8 (IntrinsicsNVVM.td:2618) |
| 2542 | nvvm_wmma_m8n32k16_mma_row_col_s8_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.row.col.s8.satfinite (IntrinsicsNVVM.td:2618) |
| 2543 | nvvm_wmma_m8n32k16_mma_row_col_u8, // llvm.nvvm.wmma.m8n32k16.mma.row.col.u8 (IntrinsicsNVVM.td:2618) |
| 2544 | nvvm_wmma_m8n32k16_mma_row_col_u8_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.row.col.u8.satfinite (IntrinsicsNVVM.td:2618) |
| 2545 | nvvm_wmma_m8n32k16_mma_row_row_bf16, // llvm.nvvm.wmma.m8n32k16.mma.row.row.bf16 (IntrinsicsNVVM.td:2618) |
| 2546 | nvvm_wmma_m8n32k16_mma_row_row_f16_f16, // llvm.nvvm.wmma.m8n32k16.mma.row.row.f16.f16 (IntrinsicsNVVM.td:2618) |
| 2547 | nvvm_wmma_m8n32k16_mma_row_row_f16_f16_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.row.row.f16.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2548 | nvvm_wmma_m8n32k16_mma_row_row_f16_f32, // llvm.nvvm.wmma.m8n32k16.mma.row.row.f16.f32 (IntrinsicsNVVM.td:2618) |
| 2549 | nvvm_wmma_m8n32k16_mma_row_row_f16_f32_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.row.row.f16.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2550 | nvvm_wmma_m8n32k16_mma_row_row_f32_f16, // llvm.nvvm.wmma.m8n32k16.mma.row.row.f32.f16 (IntrinsicsNVVM.td:2618) |
| 2551 | nvvm_wmma_m8n32k16_mma_row_row_f32_f16_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.row.row.f32.f16.satfinite (IntrinsicsNVVM.td:2618) |
| 2552 | nvvm_wmma_m8n32k16_mma_row_row_f32_f32, // llvm.nvvm.wmma.m8n32k16.mma.row.row.f32.f32 (IntrinsicsNVVM.td:2618) |
| 2553 | nvvm_wmma_m8n32k16_mma_row_row_f32_f32_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.row.row.f32.f32.satfinite (IntrinsicsNVVM.td:2618) |
| 2554 | nvvm_wmma_m8n32k16_mma_row_row_s8, // llvm.nvvm.wmma.m8n32k16.mma.row.row.s8 (IntrinsicsNVVM.td:2618) |
| 2555 | nvvm_wmma_m8n32k16_mma_row_row_s8_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.row.row.s8.satfinite (IntrinsicsNVVM.td:2618) |
| 2556 | nvvm_wmma_m8n32k16_mma_row_row_u8, // llvm.nvvm.wmma.m8n32k16.mma.row.row.u8 (IntrinsicsNVVM.td:2618) |
| 2557 | nvvm_wmma_m8n32k16_mma_row_row_u8_satfinite, // llvm.nvvm.wmma.m8n32k16.mma.row.row.u8.satfinite (IntrinsicsNVVM.td:2618) |
| 2558 | nvvm_wmma_m8n32k16_store_d_f16_col, // llvm.nvvm.wmma.m8n32k16.store.d.col.f16 (IntrinsicsNVVM.td:2600) |
| 2559 | nvvm_wmma_m8n32k16_store_d_f32_col, // llvm.nvvm.wmma.m8n32k16.store.d.col.f32 (IntrinsicsNVVM.td:2600) |
| 2560 | nvvm_wmma_m8n32k16_store_d_s32_col, // llvm.nvvm.wmma.m8n32k16.store.d.col.s32 (IntrinsicsNVVM.td:2600) |
| 2561 | nvvm_wmma_m8n32k16_store_d_f16_col_stride, // llvm.nvvm.wmma.m8n32k16.store.d.col.stride.f16 (IntrinsicsNVVM.td:2600) |
| 2562 | nvvm_wmma_m8n32k16_store_d_f32_col_stride, // llvm.nvvm.wmma.m8n32k16.store.d.col.stride.f32 (IntrinsicsNVVM.td:2600) |
| 2563 | nvvm_wmma_m8n32k16_store_d_s32_col_stride, // llvm.nvvm.wmma.m8n32k16.store.d.col.stride.s32 (IntrinsicsNVVM.td:2600) |
| 2564 | nvvm_wmma_m8n32k16_store_d_f16_row, // llvm.nvvm.wmma.m8n32k16.store.d.row.f16 (IntrinsicsNVVM.td:2600) |
| 2565 | nvvm_wmma_m8n32k16_store_d_f32_row, // llvm.nvvm.wmma.m8n32k16.store.d.row.f32 (IntrinsicsNVVM.td:2600) |
| 2566 | nvvm_wmma_m8n32k16_store_d_s32_row, // llvm.nvvm.wmma.m8n32k16.store.d.row.s32 (IntrinsicsNVVM.td:2600) |
| 2567 | nvvm_wmma_m8n32k16_store_d_f16_row_stride, // llvm.nvvm.wmma.m8n32k16.store.d.row.stride.f16 (IntrinsicsNVVM.td:2600) |
| 2568 | nvvm_wmma_m8n32k16_store_d_f32_row_stride, // llvm.nvvm.wmma.m8n32k16.store.d.row.stride.f32 (IntrinsicsNVVM.td:2600) |
| 2569 | nvvm_wmma_m8n32k16_store_d_s32_row_stride, // llvm.nvvm.wmma.m8n32k16.store.d.row.stride.s32 (IntrinsicsNVVM.td:2600) |
| 2570 | nvvm_wmma_m8n8k128_load_a_b1_row, // llvm.nvvm.wmma.m8n8k128.load.a.row.b1 (IntrinsicsNVVM.td:2596) |
| 2571 | nvvm_wmma_m8n8k128_load_a_b1_row_stride, // llvm.nvvm.wmma.m8n8k128.load.a.row.stride.b1 (IntrinsicsNVVM.td:2596) |
| 2572 | nvvm_wmma_m8n8k128_load_b_b1_col, // llvm.nvvm.wmma.m8n8k128.load.b.col.b1 (IntrinsicsNVVM.td:2596) |
| 2573 | nvvm_wmma_m8n8k128_load_b_b1_col_stride, // llvm.nvvm.wmma.m8n8k128.load.b.col.stride.b1 (IntrinsicsNVVM.td:2596) |
| 2574 | nvvm_wmma_m8n8k128_load_c_s32_col, // llvm.nvvm.wmma.m8n8k128.load.c.col.s32 (IntrinsicsNVVM.td:2596) |
| 2575 | nvvm_wmma_m8n8k128_load_c_s32_col_stride, // llvm.nvvm.wmma.m8n8k128.load.c.col.stride.s32 (IntrinsicsNVVM.td:2596) |
| 2576 | nvvm_wmma_m8n8k128_load_c_s32_row, // llvm.nvvm.wmma.m8n8k128.load.c.row.s32 (IntrinsicsNVVM.td:2596) |
| 2577 | nvvm_wmma_m8n8k128_load_c_s32_row_stride, // llvm.nvvm.wmma.m8n8k128.load.c.row.stride.s32 (IntrinsicsNVVM.td:2596) |
| 2578 | nvvm_wmma_m8n8k128_mma_and_popc_row_col_b1, // llvm.nvvm.wmma.m8n8k128.mma.and.popc.row.col.b1 (IntrinsicsNVVM.td:2618) |
| 2579 | nvvm_wmma_m8n8k128_mma_xor_popc_row_col_b1, // llvm.nvvm.wmma.m8n8k128.mma.xor.popc.row.col.b1 (IntrinsicsNVVM.td:2618) |
| 2580 | nvvm_wmma_m8n8k128_store_d_s32_col, // llvm.nvvm.wmma.m8n8k128.store.d.col.s32 (IntrinsicsNVVM.td:2600) |
| 2581 | nvvm_wmma_m8n8k128_store_d_s32_col_stride, // llvm.nvvm.wmma.m8n8k128.store.d.col.stride.s32 (IntrinsicsNVVM.td:2600) |
| 2582 | nvvm_wmma_m8n8k128_store_d_s32_row, // llvm.nvvm.wmma.m8n8k128.store.d.row.s32 (IntrinsicsNVVM.td:2600) |
| 2583 | nvvm_wmma_m8n8k128_store_d_s32_row_stride, // llvm.nvvm.wmma.m8n8k128.store.d.row.stride.s32 (IntrinsicsNVVM.td:2600) |
| 2584 | nvvm_wmma_m8n8k32_load_a_s4_row, // llvm.nvvm.wmma.m8n8k32.load.a.row.s4 (IntrinsicsNVVM.td:2596) |
| 2585 | nvvm_wmma_m8n8k32_load_a_s4_row_stride, // llvm.nvvm.wmma.m8n8k32.load.a.row.stride.s4 (IntrinsicsNVVM.td:2596) |
| 2586 | nvvm_wmma_m8n8k32_load_a_u4_row_stride, // llvm.nvvm.wmma.m8n8k32.load.a.row.stride.u4 (IntrinsicsNVVM.td:2596) |
| 2587 | nvvm_wmma_m8n8k32_load_a_u4_row, // llvm.nvvm.wmma.m8n8k32.load.a.row.u4 (IntrinsicsNVVM.td:2596) |
| 2588 | nvvm_wmma_m8n8k32_load_b_s4_col, // llvm.nvvm.wmma.m8n8k32.load.b.col.s4 (IntrinsicsNVVM.td:2596) |
| 2589 | nvvm_wmma_m8n8k32_load_b_s4_col_stride, // llvm.nvvm.wmma.m8n8k32.load.b.col.stride.s4 (IntrinsicsNVVM.td:2596) |
| 2590 | nvvm_wmma_m8n8k32_load_b_u4_col_stride, // llvm.nvvm.wmma.m8n8k32.load.b.col.stride.u4 (IntrinsicsNVVM.td:2596) |
| 2591 | nvvm_wmma_m8n8k32_load_b_u4_col, // llvm.nvvm.wmma.m8n8k32.load.b.col.u4 (IntrinsicsNVVM.td:2596) |
| 2592 | nvvm_wmma_m8n8k32_load_c_s32_col, // llvm.nvvm.wmma.m8n8k32.load.c.col.s32 (IntrinsicsNVVM.td:2596) |
| 2593 | nvvm_wmma_m8n8k32_load_c_s32_col_stride, // llvm.nvvm.wmma.m8n8k32.load.c.col.stride.s32 (IntrinsicsNVVM.td:2596) |
| 2594 | nvvm_wmma_m8n8k32_load_c_s32_row, // llvm.nvvm.wmma.m8n8k32.load.c.row.s32 (IntrinsicsNVVM.td:2596) |
| 2595 | nvvm_wmma_m8n8k32_load_c_s32_row_stride, // llvm.nvvm.wmma.m8n8k32.load.c.row.stride.s32 (IntrinsicsNVVM.td:2596) |
| 2596 | nvvm_wmma_m8n8k32_mma_row_col_s4, // llvm.nvvm.wmma.m8n8k32.mma.row.col.s4 (IntrinsicsNVVM.td:2618) |
| 2597 | nvvm_wmma_m8n8k32_mma_row_col_s4_satfinite, // llvm.nvvm.wmma.m8n8k32.mma.row.col.s4.satfinite (IntrinsicsNVVM.td:2618) |
| 2598 | nvvm_wmma_m8n8k32_mma_row_col_u4, // llvm.nvvm.wmma.m8n8k32.mma.row.col.u4 (IntrinsicsNVVM.td:2618) |
| 2599 | nvvm_wmma_m8n8k32_mma_row_col_u4_satfinite, // llvm.nvvm.wmma.m8n8k32.mma.row.col.u4.satfinite (IntrinsicsNVVM.td:2618) |
| 2600 | nvvm_wmma_m8n8k32_store_d_s32_col, // llvm.nvvm.wmma.m8n8k32.store.d.col.s32 (IntrinsicsNVVM.td:2600) |
| 2601 | nvvm_wmma_m8n8k32_store_d_s32_col_stride, // llvm.nvvm.wmma.m8n8k32.store.d.col.stride.s32 (IntrinsicsNVVM.td:2600) |
| 2602 | nvvm_wmma_m8n8k32_store_d_s32_row, // llvm.nvvm.wmma.m8n8k32.store.d.row.s32 (IntrinsicsNVVM.td:2600) |
| 2603 | nvvm_wmma_m8n8k32_store_d_s32_row_stride, // llvm.nvvm.wmma.m8n8k32.store.d.row.stride.s32 (IntrinsicsNVVM.td:2600) |
| 2604 | nvvm_wmma_m8n8k4_load_a_f64_col, // llvm.nvvm.wmma.m8n8k4.load.a.col.f64 (IntrinsicsNVVM.td:2596) |
| 2605 | nvvm_wmma_m8n8k4_load_a_f64_col_stride, // llvm.nvvm.wmma.m8n8k4.load.a.col.stride.f64 (IntrinsicsNVVM.td:2596) |
| 2606 | nvvm_wmma_m8n8k4_load_a_f64_row, // llvm.nvvm.wmma.m8n8k4.load.a.row.f64 (IntrinsicsNVVM.td:2596) |
| 2607 | nvvm_wmma_m8n8k4_load_a_f64_row_stride, // llvm.nvvm.wmma.m8n8k4.load.a.row.stride.f64 (IntrinsicsNVVM.td:2596) |
| 2608 | nvvm_wmma_m8n8k4_load_b_f64_col, // llvm.nvvm.wmma.m8n8k4.load.b.col.f64 (IntrinsicsNVVM.td:2596) |
| 2609 | nvvm_wmma_m8n8k4_load_b_f64_col_stride, // llvm.nvvm.wmma.m8n8k4.load.b.col.stride.f64 (IntrinsicsNVVM.td:2596) |
| 2610 | nvvm_wmma_m8n8k4_load_b_f64_row, // llvm.nvvm.wmma.m8n8k4.load.b.row.f64 (IntrinsicsNVVM.td:2596) |
| 2611 | nvvm_wmma_m8n8k4_load_b_f64_row_stride, // llvm.nvvm.wmma.m8n8k4.load.b.row.stride.f64 (IntrinsicsNVVM.td:2596) |
| 2612 | nvvm_wmma_m8n8k4_load_c_f64_col, // llvm.nvvm.wmma.m8n8k4.load.c.col.f64 (IntrinsicsNVVM.td:2596) |
| 2613 | nvvm_wmma_m8n8k4_load_c_f64_col_stride, // llvm.nvvm.wmma.m8n8k4.load.c.col.stride.f64 (IntrinsicsNVVM.td:2596) |
| 2614 | nvvm_wmma_m8n8k4_load_c_f64_row, // llvm.nvvm.wmma.m8n8k4.load.c.row.f64 (IntrinsicsNVVM.td:2596) |
| 2615 | nvvm_wmma_m8n8k4_load_c_f64_row_stride, // llvm.nvvm.wmma.m8n8k4.load.c.row.stride.f64 (IntrinsicsNVVM.td:2596) |
| 2616 | nvvm_wmma_m8n8k4_mma_col_col_f64, // llvm.nvvm.wmma.m8n8k4.mma.col.col.f64 (IntrinsicsNVVM.td:2618) |
| 2617 | nvvm_wmma_m8n8k4_mma_col_col_rm_f64, // llvm.nvvm.wmma.m8n8k4.mma.col.col.rm.f64 (IntrinsicsNVVM.td:2618) |
| 2618 | nvvm_wmma_m8n8k4_mma_col_col_rn_f64, // llvm.nvvm.wmma.m8n8k4.mma.col.col.rn.f64 (IntrinsicsNVVM.td:2618) |
| 2619 | nvvm_wmma_m8n8k4_mma_col_col_rp_f64, // llvm.nvvm.wmma.m8n8k4.mma.col.col.rp.f64 (IntrinsicsNVVM.td:2618) |
| 2620 | nvvm_wmma_m8n8k4_mma_col_col_rz_f64, // llvm.nvvm.wmma.m8n8k4.mma.col.col.rz.f64 (IntrinsicsNVVM.td:2618) |
| 2621 | nvvm_wmma_m8n8k4_mma_col_row_f64, // llvm.nvvm.wmma.m8n8k4.mma.col.row.f64 (IntrinsicsNVVM.td:2618) |
| 2622 | nvvm_wmma_m8n8k4_mma_col_row_rm_f64, // llvm.nvvm.wmma.m8n8k4.mma.col.row.rm.f64 (IntrinsicsNVVM.td:2618) |
| 2623 | nvvm_wmma_m8n8k4_mma_col_row_rn_f64, // llvm.nvvm.wmma.m8n8k4.mma.col.row.rn.f64 (IntrinsicsNVVM.td:2618) |
| 2624 | nvvm_wmma_m8n8k4_mma_col_row_rp_f64, // llvm.nvvm.wmma.m8n8k4.mma.col.row.rp.f64 (IntrinsicsNVVM.td:2618) |
| 2625 | nvvm_wmma_m8n8k4_mma_col_row_rz_f64, // llvm.nvvm.wmma.m8n8k4.mma.col.row.rz.f64 (IntrinsicsNVVM.td:2618) |
| 2626 | nvvm_wmma_m8n8k4_mma_row_col_f64, // llvm.nvvm.wmma.m8n8k4.mma.row.col.f64 (IntrinsicsNVVM.td:2618) |
| 2627 | nvvm_wmma_m8n8k4_mma_row_col_rm_f64, // llvm.nvvm.wmma.m8n8k4.mma.row.col.rm.f64 (IntrinsicsNVVM.td:2618) |
| 2628 | nvvm_wmma_m8n8k4_mma_row_col_rn_f64, // llvm.nvvm.wmma.m8n8k4.mma.row.col.rn.f64 (IntrinsicsNVVM.td:2618) |
| 2629 | nvvm_wmma_m8n8k4_mma_row_col_rp_f64, // llvm.nvvm.wmma.m8n8k4.mma.row.col.rp.f64 (IntrinsicsNVVM.td:2618) |
| 2630 | nvvm_wmma_m8n8k4_mma_row_col_rz_f64, // llvm.nvvm.wmma.m8n8k4.mma.row.col.rz.f64 (IntrinsicsNVVM.td:2618) |
| 2631 | nvvm_wmma_m8n8k4_mma_row_row_f64, // llvm.nvvm.wmma.m8n8k4.mma.row.row.f64 (IntrinsicsNVVM.td:2618) |
| 2632 | nvvm_wmma_m8n8k4_mma_row_row_rm_f64, // llvm.nvvm.wmma.m8n8k4.mma.row.row.rm.f64 (IntrinsicsNVVM.td:2618) |
| 2633 | nvvm_wmma_m8n8k4_mma_row_row_rn_f64, // llvm.nvvm.wmma.m8n8k4.mma.row.row.rn.f64 (IntrinsicsNVVM.td:2618) |
| 2634 | nvvm_wmma_m8n8k4_mma_row_row_rp_f64, // llvm.nvvm.wmma.m8n8k4.mma.row.row.rp.f64 (IntrinsicsNVVM.td:2618) |
| 2635 | nvvm_wmma_m8n8k4_mma_row_row_rz_f64, // llvm.nvvm.wmma.m8n8k4.mma.row.row.rz.f64 (IntrinsicsNVVM.td:2618) |
| 2636 | nvvm_wmma_m8n8k4_store_d_f64_col, // llvm.nvvm.wmma.m8n8k4.store.d.col.f64 (IntrinsicsNVVM.td:2600) |
| 2637 | nvvm_wmma_m8n8k4_store_d_f64_col_stride, // llvm.nvvm.wmma.m8n8k4.store.d.col.stride.f64 (IntrinsicsNVVM.td:2600) |
| 2638 | nvvm_wmma_m8n8k4_store_d_f64_row, // llvm.nvvm.wmma.m8n8k4.store.d.row.f64 (IntrinsicsNVVM.td:2600) |
| 2639 | nvvm_wmma_m8n8k4_store_d_f64_row_stride, // llvm.nvvm.wmma.m8n8k4.store.d.row.stride.f64 (IntrinsicsNVVM.td:2600) |
| 2640 | nvvm_zext_clamp, // llvm.nvvm.zext.clamp (IntrinsicsNVVM.td:1655) |
| 2641 | nvvm_zext_wrap, // llvm.nvvm.zext.wrap (IntrinsicsNVVM.td:1655) |
| 2642 | }; // enum |
| 2643 | |
| 2644 | } // namespace llvm::Intrinsic |
| 2645 | |
| 2646 | #endif // LLVM_IR_INTRINSIC_NVVM_ENUMS_H |
| 2647 | |
| 2648 |
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