| 1 | #ifdef GET_ATValues_DECL |
| 2 | enum ATValues { |
| 3 | S1E1R = 960, |
| 4 | S1E2R = 9152, |
| 5 | S1E3R = 13248, |
| 6 | S1E1W = 961, |
| 7 | S1E2W = 9153, |
| 8 | S1E3W = 13249, |
| 9 | S1E0R = 962, |
| 10 | S1E0W = 963, |
| 11 | S12E1R = 9156, |
| 12 | S12E1W = 9157, |
| 13 | S12E0R = 9158, |
| 14 | S12E0W = 9159, |
| 15 | S1E1RP = 968, |
| 16 | S1E1WP = 969, |
| 17 | S1E1A = 970, |
| 18 | S1E2A = 9162, |
| 19 | S1E3A = 13258, |
| 20 | }; |
| 21 | #endif |
| 22 | |
| 23 | #ifdef GET_BTIValues_DECL |
| 24 | enum BTIValues { |
| 25 | r = 0, |
| 26 | c = 2, |
| 27 | j = 4, |
| 28 | jc = 6, |
| 29 | }; |
| 30 | #endif |
| 31 | |
| 32 | #ifdef GET_DBValues_DECL |
| 33 | enum DBValues { |
| 34 | oshld = 1, |
| 35 | oshst = 2, |
| 36 | osh = 3, |
| 37 | nshld = 5, |
| 38 | nshst = 6, |
| 39 | nsh = 7, |
| 40 | ishld = 9, |
| 41 | ishst = 10, |
| 42 | ish = 11, |
| 43 | ld = 13, |
| 44 | st = 14, |
| 45 | sy = 15, |
| 46 | }; |
| 47 | #endif |
| 48 | |
| 49 | #ifdef GET_DBnXSValues_DECL |
| 50 | enum DBnXSValues { |
| 51 | oshnxs = 3, |
| 52 | nshnxs = 7, |
| 53 | ishnxs = 11, |
| 54 | synxs = 15, |
| 55 | }; |
| 56 | #endif |
| 57 | |
| 58 | #ifdef GET_DCValues_DECL |
| 59 | enum DCValues { |
| 60 | ZVA = 7073, |
| 61 | IVAC = 945, |
| 62 | ISW = 946, |
| 63 | CVAC = 7121, |
| 64 | CSW = 978, |
| 65 | CVAU = 7129, |
| 66 | CIVAC = 7153, |
| 67 | CISW = 1010, |
| 68 | CVAP = 7137, |
| 69 | CVADP = 7145, |
| 70 | IGVAC = 947, |
| 71 | IGSW = 948, |
| 72 | CGSW = 980, |
| 73 | CIGSW = 1012, |
| 74 | CGVAC = 7123, |
| 75 | CGVAP = 7139, |
| 76 | CGVADP = 7147, |
| 77 | CIGVAC = 7155, |
| 78 | GVA = 7075, |
| 79 | IGDVAC = 949, |
| 80 | IGDSW = 950, |
| 81 | CGDSW = 982, |
| 82 | CIGDSW = 1014, |
| 83 | CGDVAC = 7125, |
| 84 | CGDVAP = 7141, |
| 85 | CGDVADP = 7149, |
| 86 | CIGDVAC = 7157, |
| 87 | GZVA = 7076, |
| 88 | ZGBVA = 7077, |
| 89 | GBVA = 7079, |
| 90 | CIPAE = 9200, |
| 91 | CIGDPAE = 9207, |
| 92 | CIGDPAPA = 13301, |
| 93 | CIPAPA = 13297, |
| 94 | CIVAOC = 7160, |
| 95 | CVAOC = 7128, |
| 96 | CIGDVAOC = 7167, |
| 97 | CGDVAOC = 7135, |
| 98 | CIVAPS = 1017, |
| 99 | CIGDVAPS = 1021, |
| 100 | }; |
| 101 | #endif |
| 102 | |
| 103 | #ifdef GET_ExactFPImmValues_DECL |
| 104 | enum ExactFPImmValues { |
| 105 | zero = 0, |
| 106 | half = 1, |
| 107 | one = 2, |
| 108 | two = 3, |
| 109 | }; |
| 110 | #endif |
| 111 | |
| 112 | #ifdef GET_ICValues_DECL |
| 113 | enum ICValues { |
| 114 | IALLUIS = 904, |
| 115 | IALLU = 936, |
| 116 | IVAU = 7081, |
| 117 | }; |
| 118 | #endif |
| 119 | |
| 120 | #ifdef GET_ISBValues_DECL |
| 121 | enum ISBValues { |
| 122 | sy = 15, |
| 123 | }; |
| 124 | #endif |
| 125 | |
| 126 | #ifdef GET_PHintValues_DECL |
| 127 | enum PHintValues { |
| 128 | keep = 0, |
| 129 | strm = 1, |
| 130 | }; |
| 131 | #endif |
| 132 | |
| 133 | #ifdef GET_PRFMValues_DECL |
| 134 | enum PRFMValues { |
| 135 | pldl1keep = 0, |
| 136 | pldl1strm = 1, |
| 137 | pldl2keep = 2, |
| 138 | pldl2strm = 3, |
| 139 | pldl3keep = 4, |
| 140 | pldl3strm = 5, |
| 141 | pldslckeep = 6, |
| 142 | pldslcstrm = 7, |
| 143 | plil1keep = 8, |
| 144 | plil1strm = 9, |
| 145 | plil2keep = 10, |
| 146 | plil2strm = 11, |
| 147 | plil3keep = 12, |
| 148 | plil3strm = 13, |
| 149 | plislckeep = 14, |
| 150 | plislcstrm = 15, |
| 151 | pstl1keep = 16, |
| 152 | pstl1strm = 17, |
| 153 | pstl2keep = 18, |
| 154 | pstl2strm = 19, |
| 155 | pstl3keep = 20, |
| 156 | pstl3strm = 21, |
| 157 | pstslckeep = 22, |
| 158 | pstslcstrm = 23, |
| 159 | }; |
| 160 | #endif |
| 161 | |
| 162 | #ifdef GET_PSBValues_DECL |
| 163 | enum PSBValues { |
| 164 | csync = 17, |
| 165 | }; |
| 166 | #endif |
| 167 | |
| 168 | #ifdef GET_PStateImm0_1Values_DECL |
| 169 | enum PStateImm0_1Values { |
| 170 | ALLINT = 8, |
| 171 | PM = 72, |
| 172 | }; |
| 173 | #endif |
| 174 | |
| 175 | #ifdef GET_PStateImm0_15Values_DECL |
| 176 | enum PStateImm0_15Values { |
| 177 | SPSel = 5, |
| 178 | DAIFSet = 30, |
| 179 | DAIFClr = 31, |
| 180 | PAN = 4, |
| 181 | UAO = 3, |
| 182 | DIT = 26, |
| 183 | SSBS = 25, |
| 184 | TCO = 28, |
| 185 | }; |
| 186 | #endif |
| 187 | |
| 188 | #ifdef GET_RPRFMValues_DECL |
| 189 | enum RPRFMValues { |
| 190 | pldkeep = 0, |
| 191 | pstkeep = 1, |
| 192 | pldstrm = 4, |
| 193 | pststrm = 5, |
| 194 | }; |
| 195 | #endif |
| 196 | |
| 197 | #ifdef GET_SVCRValues_DECL |
| 198 | enum SVCRValues { |
| 199 | SVCRSM = 1, |
| 200 | SVCRZA = 2, |
| 201 | SVCRSMZA = 3, |
| 202 | }; |
| 203 | #endif |
| 204 | |
| 205 | #ifdef GET_SVEPREDPATValues_DECL |
| 206 | enum SVEPREDPATValues { |
| 207 | pow2 = 0, |
| 208 | vl1 = 1, |
| 209 | vl2 = 2, |
| 210 | vl3 = 3, |
| 211 | vl4 = 4, |
| 212 | vl5 = 5, |
| 213 | vl6 = 6, |
| 214 | vl7 = 7, |
| 215 | vl8 = 8, |
| 216 | vl16 = 9, |
| 217 | vl32 = 10, |
| 218 | vl64 = 11, |
| 219 | vl128 = 12, |
| 220 | vl256 = 13, |
| 221 | mul4 = 29, |
| 222 | mul3 = 30, |
| 223 | all = 31, |
| 224 | }; |
| 225 | #endif |
| 226 | |
| 227 | #ifdef GET_SVEPRFMValues_DECL |
| 228 | enum SVEPRFMValues { |
| 229 | pldl1keep = 0, |
| 230 | pldl1strm = 1, |
| 231 | pldl2keep = 2, |
| 232 | pldl2strm = 3, |
| 233 | pldl3keep = 4, |
| 234 | pldl3strm = 5, |
| 235 | pstl1keep = 8, |
| 236 | pstl1strm = 9, |
| 237 | pstl2keep = 10, |
| 238 | pstl2strm = 11, |
| 239 | pstl3keep = 12, |
| 240 | pstl3strm = 13, |
| 241 | }; |
| 242 | #endif |
| 243 | |
| 244 | #ifdef GET_SVEVECLENSPECIFIERValues_DECL |
| 245 | enum SVEVECLENSPECIFIERValues { |
| 246 | vlx2 = 0, |
| 247 | vlx4 = 1, |
| 248 | }; |
| 249 | #endif |
| 250 | |
| 251 | #ifdef GET_SysRegValues_DECL |
| 252 | enum SysRegValues { |
| 253 | MDCCSR_EL0 = 38920, |
| 254 | DBGDTRRX_EL0 = 38952, |
| 255 | MDRAR_EL1 = 32896, |
| 256 | OSLSR_EL1 = 32908, |
| 257 | DBGAUTHSTATUS_EL1 = 33782, |
| 258 | PMCEID0_EL0 = 56550, |
| 259 | PMCEID1_EL0 = 56551, |
| 260 | PMMIR_EL1 = 50422, |
| 261 | MIDR_EL1 = 49152, |
| 262 | CCSIDR_EL1 = 51200, |
| 263 | CCSIDR2_EL1 = 51202, |
| 264 | CLIDR_EL1 = 51201, |
| 265 | CTR_EL0 = 55297, |
| 266 | MPIDR_EL1 = 49157, |
| 267 | REVIDR_EL1 = 49158, |
| 268 | AIDR_EL1 = 51207, |
| 269 | DCZID_EL0 = 55303, |
| 270 | ID_PFR0_EL1 = 49160, |
| 271 | ID_PFR1_EL1 = 49161, |
| 272 | ID_PFR2_EL1 = 49180, |
| 273 | ID_DFR0_EL1 = 49162, |
| 274 | ID_DFR1_EL1 = 49181, |
| 275 | ID_AFR0_EL1 = 49163, |
| 276 | ID_MMFR0_EL1 = 49164, |
| 277 | ID_MMFR1_EL1 = 49165, |
| 278 | ID_MMFR2_EL1 = 49166, |
| 279 | ID_MMFR3_EL1 = 49167, |
| 280 | ID_ISAR0_EL1 = 49168, |
| 281 | ID_ISAR1_EL1 = 49169, |
| 282 | ID_ISAR2_EL1 = 49170, |
| 283 | ID_ISAR3_EL1 = 49171, |
| 284 | ID_ISAR4_EL1 = 49172, |
| 285 | ID_ISAR5_EL1 = 49173, |
| 286 | ID_ISAR6_EL1 = 49175, |
| 287 | ID_AA64PFR0_EL1 = 49184, |
| 288 | ID_AA64PFR1_EL1 = 49185, |
| 289 | ID_AA64PFR2_EL1 = 49186, |
| 290 | ID_AA64DFR0_EL1 = 49192, |
| 291 | ID_AA64DFR1_EL1 = 49193, |
| 292 | ID_AA64DFR2_EL1 = 49194, |
| 293 | ID_AA64AFR0_EL1 = 49196, |
| 294 | ID_AA64AFR1_EL1 = 49197, |
| 295 | ID_AA64ISAR0_EL1 = 49200, |
| 296 | ID_AA64ISAR1_EL1 = 49201, |
| 297 | ID_AA64ISAR2_EL1 = 49202, |
| 298 | ID_AA64ISAR3_EL1 = 49203, |
| 299 | ID_AA64MMFR0_EL1 = 49208, |
| 300 | ID_AA64MMFR1_EL1 = 49209, |
| 301 | ID_AA64MMFR2_EL1 = 49210, |
| 302 | ID_AA64MMFR3_EL1 = 49211, |
| 303 | ID_AA64MMFR4_EL1 = 49212, |
| 304 | MVFR0_EL1 = 49176, |
| 305 | MVFR1_EL1 = 49177, |
| 306 | MVFR2_EL1 = 49178, |
| 307 | RVBAR_EL1 = 50689, |
| 308 | RVBAR_EL2 = 58881, |
| 309 | RVBAR_EL3 = 62977, |
| 310 | ISR_EL1 = 50696, |
| 311 | CNTPCT_EL0 = 57089, |
| 312 | CNTVCT_EL0 = 57090, |
| 313 | ID_MMFR4_EL1 = 49174, |
| 314 | ID_MMFR5_EL1 = 49182, |
| 315 | TRCSTATR = 34840, |
| 316 | TRCIDR8 = 34822, |
| 317 | TRCIDR9 = 34830, |
| 318 | TRCIDR10 = 34838, |
| 319 | TRCIDR11 = 34846, |
| 320 | TRCIDR12 = 34854, |
| 321 | TRCIDR13 = 34862, |
| 322 | TRCIDR0 = 34887, |
| 323 | TRCIDR1 = 34895, |
| 324 | TRCIDR2 = 34903, |
| 325 | TRCIDR3 = 34911, |
| 326 | TRCIDR4 = 34919, |
| 327 | TRCIDR5 = 34927, |
| 328 | TRCIDR6 = 34935, |
| 329 | TRCIDR7 = 34943, |
| 330 | TRCOSLSR = 34956, |
| 331 | TRCPDSR = 34988, |
| 332 | TRCDEVAFF0 = 35798, |
| 333 | TRCDEVAFF1 = 35806, |
| 334 | TRCLSR = 35822, |
| 335 | TRCAUTHSTATUS = 35830, |
| 336 | TRCDEVARCH = 35838, |
| 337 | TRCDEVID = 35735, |
| 338 | TRCDEVTYPE = 35743, |
| 339 | TRCPIDR4 = 35751, |
| 340 | TRCPIDR5 = 35759, |
| 341 | TRCPIDR6 = 35767, |
| 342 | TRCPIDR7 = 35775, |
| 343 | TRCPIDR0 = 35783, |
| 344 | TRCPIDR1 = 35791, |
| 345 | TRCPIDR2 = 35799, |
| 346 | TRCPIDR3 = 35807, |
| 347 | TRCCIDR0 = 35815, |
| 348 | TRCCIDR1 = 35823, |
| 349 | TRCCIDR2 = 35831, |
| 350 | TRCCIDR3 = 35839, |
| 351 | ICC_IAR1_EL1 = 50784, |
| 352 | ICC_IAR0_EL1 = 50752, |
| 353 | ICC_HPPIR1_EL1 = 50786, |
| 354 | ICC_HPPIR0_EL1 = 50754, |
| 355 | ICC_RPR_EL1 = 50779, |
| 356 | ICH_VTR_EL2 = 58969, |
| 357 | ICH_EISR_EL2 = 58971, |
| 358 | ICH_ELRSR_EL2 = 58973, |
| 359 | ID_AA64ZFR0_EL1 = 49188, |
| 360 | LORID_EL1 = 50471, |
| 361 | ERRIDR_EL1 = 49816, |
| 362 | ERXFR_EL1 = 49824, |
| 363 | RNDR = 55584, |
| 364 | RNDRRS = 55585, |
| 365 | SCXTNUM_EL0 = 56967, |
| 366 | SCXTNUM_EL1 = 50823, |
| 367 | SCXTNUM_EL2 = 59015, |
| 368 | SCXTNUM_EL3 = 63111, |
| 369 | SCXTNUM_EL12 = 61063, |
| 370 | GPCCR_EL3 = 61710, |
| 371 | GPTBR_EL3 = 61708, |
| 372 | MFAR_EL3 = 62213, |
| 373 | MECIDR_EL2 = 58695, |
| 374 | MECID_P0_EL2 = 58688, |
| 375 | MECID_A0_EL2 = 58689, |
| 376 | MECID_P1_EL2 = 58690, |
| 377 | MECID_A1_EL2 = 58691, |
| 378 | VMECID_P_EL2 = 58696, |
| 379 | VMECID_A_EL2 = 58697, |
| 380 | MECID_RL_A_EL3 = 62801, |
| 381 | ID_AA64SMFR0_EL1 = 49189, |
| 382 | DBGDTRTX_EL0 = 38952, |
| 383 | OSLAR_EL1 = 32900, |
| 384 | PMSWINC_EL0 = 56548, |
| 385 | TRCOSLAR = 34948, |
| 386 | TRCLAR = 35814, |
| 387 | ICC_EOIR1_EL1 = 50785, |
| 388 | ICC_EOIR0_EL1 = 50753, |
| 389 | ICC_DIR_EL1 = 50777, |
| 390 | ICC_SGI1R_EL1 = 50781, |
| 391 | ICC_ASGI1R_EL1 = 50782, |
| 392 | ICC_SGI0R_EL1 = 50783, |
| 393 | OSDTRRX_EL1 = 32770, |
| 394 | OSDTRTX_EL1 = 32794, |
| 395 | TEECR32_EL1 = 36864, |
| 396 | MDCCINT_EL1 = 32784, |
| 397 | MDSCR_EL1 = 32786, |
| 398 | DBGDTR_EL0 = 38944, |
| 399 | OSECCR_EL1 = 32818, |
| 400 | DBGVCR32_EL2 = 41016, |
| 401 | DBGBVR0_EL1 = 32772, |
| 402 | DBGBCR0_EL1 = 32773, |
| 403 | DBGWVR0_EL1 = 32774, |
| 404 | DBGWCR0_EL1 = 32775, |
| 405 | DBGBVR1_EL1 = 32780, |
| 406 | DBGBCR1_EL1 = 32781, |
| 407 | DBGWVR1_EL1 = 32782, |
| 408 | DBGWCR1_EL1 = 32783, |
| 409 | DBGBVR2_EL1 = 32788, |
| 410 | DBGBCR2_EL1 = 32789, |
| 411 | DBGWVR2_EL1 = 32790, |
| 412 | DBGWCR2_EL1 = 32791, |
| 413 | DBGBVR3_EL1 = 32796, |
| 414 | DBGBCR3_EL1 = 32797, |
| 415 | DBGWVR3_EL1 = 32798, |
| 416 | DBGWCR3_EL1 = 32799, |
| 417 | DBGBVR4_EL1 = 32804, |
| 418 | DBGBCR4_EL1 = 32805, |
| 419 | DBGWVR4_EL1 = 32806, |
| 420 | DBGWCR4_EL1 = 32807, |
| 421 | DBGBVR5_EL1 = 32812, |
| 422 | DBGBCR5_EL1 = 32813, |
| 423 | DBGWVR5_EL1 = 32814, |
| 424 | DBGWCR5_EL1 = 32815, |
| 425 | DBGBVR6_EL1 = 32820, |
| 426 | DBGBCR6_EL1 = 32821, |
| 427 | DBGWVR6_EL1 = 32822, |
| 428 | DBGWCR6_EL1 = 32823, |
| 429 | DBGBVR7_EL1 = 32828, |
| 430 | DBGBCR7_EL1 = 32829, |
| 431 | DBGWVR7_EL1 = 32830, |
| 432 | DBGWCR7_EL1 = 32831, |
| 433 | DBGBVR8_EL1 = 32836, |
| 434 | DBGBCR8_EL1 = 32837, |
| 435 | DBGWVR8_EL1 = 32838, |
| 436 | DBGWCR8_EL1 = 32839, |
| 437 | DBGBVR9_EL1 = 32844, |
| 438 | DBGBCR9_EL1 = 32845, |
| 439 | DBGWVR9_EL1 = 32846, |
| 440 | DBGWCR9_EL1 = 32847, |
| 441 | DBGBVR10_EL1 = 32852, |
| 442 | DBGBCR10_EL1 = 32853, |
| 443 | DBGWVR10_EL1 = 32854, |
| 444 | DBGWCR10_EL1 = 32855, |
| 445 | DBGBVR11_EL1 = 32860, |
| 446 | DBGBCR11_EL1 = 32861, |
| 447 | DBGWVR11_EL1 = 32862, |
| 448 | DBGWCR11_EL1 = 32863, |
| 449 | DBGBVR12_EL1 = 32868, |
| 450 | DBGBCR12_EL1 = 32869, |
| 451 | DBGWVR12_EL1 = 32870, |
| 452 | DBGWCR12_EL1 = 32871, |
| 453 | DBGBVR13_EL1 = 32876, |
| 454 | DBGBCR13_EL1 = 32877, |
| 455 | DBGWVR13_EL1 = 32878, |
| 456 | DBGWCR13_EL1 = 32879, |
| 457 | DBGBVR14_EL1 = 32884, |
| 458 | DBGBCR14_EL1 = 32885, |
| 459 | DBGWVR14_EL1 = 32886, |
| 460 | DBGWCR14_EL1 = 32887, |
| 461 | DBGBVR15_EL1 = 32892, |
| 462 | DBGBCR15_EL1 = 32893, |
| 463 | DBGWVR15_EL1 = 32894, |
| 464 | DBGWCR15_EL1 = 32895, |
| 465 | TEEHBR32_EL1 = 36992, |
| 466 | OSDLR_EL1 = 32924, |
| 467 | DBGPRCR_EL1 = 32932, |
| 468 | DBGCLAIMSET_EL1 = 33734, |
| 469 | DBGCLAIMCLR_EL1 = 33742, |
| 470 | CSSELR_EL1 = 53248, |
| 471 | VPIDR_EL2 = 57344, |
| 472 | VMPIDR_EL2 = 57349, |
| 473 | CPACR_EL1 = 49282, |
| 474 | SCTLR_EL1 = 49280, |
| 475 | SCTLR_EL2 = 57472, |
| 476 | SCTLR_EL3 = 61568, |
| 477 | ACTLR_EL1 = 49281, |
| 478 | ACTLR_EL12 = 59521, |
| 479 | ACTLR_EL2 = 57473, |
| 480 | ACTLR_EL3 = 61569, |
| 481 | HCR_EL2 = 57480, |
| 482 | HCRX_EL2 = 57490, |
| 483 | SCR_EL3 = 61576, |
| 484 | MDCR_EL2 = 57481, |
| 485 | SDER32_EL3 = 61577, |
| 486 | CPTR_EL2 = 57482, |
| 487 | CPTR_EL3 = 61578, |
| 488 | HSTR_EL2 = 57483, |
| 489 | HACR_EL2 = 57487, |
| 490 | MDCR_EL3 = 61593, |
| 491 | TTBR0_EL1 = 49408, |
| 492 | TTBR0_EL3 = 61696, |
| 493 | TTBR0_EL2 = 57600, |
| 494 | VTTBR_EL2 = 57608, |
| 495 | TTBR1_EL1 = 49409, |
| 496 | TCR_EL1 = 49410, |
| 497 | TCR_EL2 = 57602, |
| 498 | TCR_EL3 = 61698, |
| 499 | VTCR_EL2 = 57610, |
| 500 | DACR32_EL2 = 57728, |
| 501 | SPSR_EL1 = 49664, |
| 502 | SPSR_EL2 = 57856, |
| 503 | SPSR_EL3 = 61952, |
| 504 | ELR_EL1 = 49665, |
| 505 | ELR_EL2 = 57857, |
| 506 | ELR_EL3 = 61953, |
| 507 | SP_EL0 = 49672, |
| 508 | SP_EL1 = 57864, |
| 509 | SP_EL2 = 61960, |
| 510 | SPSel = 49680, |
| 511 | NZCV = 55824, |
| 512 | DAIF = 55825, |
| 513 | CurrentEL = 49682, |
| 514 | SPSR_irq = 57880, |
| 515 | SPSR_abt = 57881, |
| 516 | SPSR_und = 57882, |
| 517 | SPSR_fiq = 57883, |
| 518 | FPCR = 55840, |
| 519 | FPSR = 55841, |
| 520 | DSPSR_EL0 = 55848, |
| 521 | DLR_EL0 = 55849, |
| 522 | IFSR32_EL2 = 57985, |
| 523 | AFSR0_EL1 = 49800, |
| 524 | AFSR0_EL2 = 57992, |
| 525 | AFSR0_EL3 = 62088, |
| 526 | AFSR1_EL1 = 49801, |
| 527 | AFSR1_EL2 = 57993, |
| 528 | AFSR1_EL3 = 62089, |
| 529 | ESR_EL1 = 49808, |
| 530 | ESR_EL2 = 58000, |
| 531 | ESR_EL3 = 62096, |
| 532 | FPEXC32_EL2 = 58008, |
| 533 | FAR_EL1 = 49920, |
| 534 | FAR_EL2 = 58112, |
| 535 | FAR_EL3 = 62208, |
| 536 | HPFAR_EL2 = 58116, |
| 537 | PAR_EL1 = 50080, |
| 538 | PMCR_EL0 = 56544, |
| 539 | PMCNTENSET_EL0 = 56545, |
| 540 | PMCNTENCLR_EL0 = 56546, |
| 541 | PMOVSCLR_EL0 = 56547, |
| 542 | PMSELR_EL0 = 56549, |
| 543 | PMCCNTR_EL0 = 56552, |
| 544 | PMXEVTYPER_EL0 = 56553, |
| 545 | PMXEVCNTR_EL0 = 56554, |
| 546 | PMUSERENR_EL0 = 56560, |
| 547 | PMINTENSET_EL1 = 50417, |
| 548 | PMINTENCLR_EL1 = 50418, |
| 549 | PMOVSSET_EL0 = 56563, |
| 550 | MAIR_EL1 = 50448, |
| 551 | MAIR_EL2 = 58640, |
| 552 | MAIR_EL3 = 62736, |
| 553 | AMAIR_EL1 = 50456, |
| 554 | AMAIR_EL2 = 58648, |
| 555 | AMAIR_EL3 = 62744, |
| 556 | VBAR_EL1 = 50688, |
| 557 | VBAR_EL2 = 58880, |
| 558 | VBAR_EL3 = 62976, |
| 559 | RMR_EL1 = 50690, |
| 560 | RMR_EL2 = 58882, |
| 561 | RMR_EL3 = 62978, |
| 562 | CONTEXTIDR_EL1 = 50817, |
| 563 | TPIDR_EL0 = 56962, |
| 564 | TPIDR_EL2 = 59010, |
| 565 | TPIDR_EL3 = 63106, |
| 566 | TPIDRRO_EL0 = 56963, |
| 567 | TPIDR_EL1 = 50820, |
| 568 | CNTFRQ_EL0 = 57088, |
| 569 | CNTVOFF_EL2 = 59139, |
| 570 | CNTKCTL_EL1 = 50952, |
| 571 | CNTHCTL_EL2 = 59144, |
| 572 | CNTP_TVAL_EL0 = 57104, |
| 573 | CNTHP_TVAL_EL2 = 59152, |
| 574 | CNTPS_TVAL_EL1 = 65296, |
| 575 | CNTP_CTL_EL0 = 57105, |
| 576 | CNTHP_CTL_EL2 = 59153, |
| 577 | CNTPS_CTL_EL1 = 65297, |
| 578 | CNTP_CVAL_EL0 = 57106, |
| 579 | CNTHP_CVAL_EL2 = 59154, |
| 580 | CNTPS_CVAL_EL1 = 65298, |
| 581 | CNTV_TVAL_EL0 = 57112, |
| 582 | CNTV_CTL_EL0 = 57113, |
| 583 | CNTV_CVAL_EL0 = 57114, |
| 584 | PMEVCNTR0_EL0 = 57152, |
| 585 | PMEVCNTR1_EL0 = 57153, |
| 586 | PMEVCNTR2_EL0 = 57154, |
| 587 | PMEVCNTR3_EL0 = 57155, |
| 588 | PMEVCNTR4_EL0 = 57156, |
| 589 | PMEVCNTR5_EL0 = 57157, |
| 590 | PMEVCNTR6_EL0 = 57158, |
| 591 | PMEVCNTR7_EL0 = 57159, |
| 592 | PMEVCNTR8_EL0 = 57160, |
| 593 | PMEVCNTR9_EL0 = 57161, |
| 594 | PMEVCNTR10_EL0 = 57162, |
| 595 | PMEVCNTR11_EL0 = 57163, |
| 596 | PMEVCNTR12_EL0 = 57164, |
| 597 | PMEVCNTR13_EL0 = 57165, |
| 598 | PMEVCNTR14_EL0 = 57166, |
| 599 | PMEVCNTR15_EL0 = 57167, |
| 600 | PMEVCNTR16_EL0 = 57168, |
| 601 | PMEVCNTR17_EL0 = 57169, |
| 602 | PMEVCNTR18_EL0 = 57170, |
| 603 | PMEVCNTR19_EL0 = 57171, |
| 604 | PMEVCNTR20_EL0 = 57172, |
| 605 | PMEVCNTR21_EL0 = 57173, |
| 606 | PMEVCNTR22_EL0 = 57174, |
| 607 | PMEVCNTR23_EL0 = 57175, |
| 608 | PMEVCNTR24_EL0 = 57176, |
| 609 | PMEVCNTR25_EL0 = 57177, |
| 610 | PMEVCNTR26_EL0 = 57178, |
| 611 | PMEVCNTR27_EL0 = 57179, |
| 612 | PMEVCNTR28_EL0 = 57180, |
| 613 | PMEVCNTR29_EL0 = 57181, |
| 614 | PMEVCNTR30_EL0 = 57182, |
| 615 | PMCCFILTR_EL0 = 57215, |
| 616 | PMEVTYPER0_EL0 = 57184, |
| 617 | PMEVTYPER1_EL0 = 57185, |
| 618 | PMEVTYPER2_EL0 = 57186, |
| 619 | PMEVTYPER3_EL0 = 57187, |
| 620 | PMEVTYPER4_EL0 = 57188, |
| 621 | PMEVTYPER5_EL0 = 57189, |
| 622 | PMEVTYPER6_EL0 = 57190, |
| 623 | PMEVTYPER7_EL0 = 57191, |
| 624 | PMEVTYPER8_EL0 = 57192, |
| 625 | PMEVTYPER9_EL0 = 57193, |
| 626 | PMEVTYPER10_EL0 = 57194, |
| 627 | PMEVTYPER11_EL0 = 57195, |
| 628 | PMEVTYPER12_EL0 = 57196, |
| 629 | PMEVTYPER13_EL0 = 57197, |
| 630 | PMEVTYPER14_EL0 = 57198, |
| 631 | PMEVTYPER15_EL0 = 57199, |
| 632 | PMEVTYPER16_EL0 = 57200, |
| 633 | PMEVTYPER17_EL0 = 57201, |
| 634 | PMEVTYPER18_EL0 = 57202, |
| 635 | PMEVTYPER19_EL0 = 57203, |
| 636 | PMEVTYPER20_EL0 = 57204, |
| 637 | PMEVTYPER21_EL0 = 57205, |
| 638 | PMEVTYPER22_EL0 = 57206, |
| 639 | PMEVTYPER23_EL0 = 57207, |
| 640 | PMEVTYPER24_EL0 = 57208, |
| 641 | PMEVTYPER25_EL0 = 57209, |
| 642 | PMEVTYPER26_EL0 = 57210, |
| 643 | PMEVTYPER27_EL0 = 57211, |
| 644 | PMEVTYPER28_EL0 = 57212, |
| 645 | PMEVTYPER29_EL0 = 57213, |
| 646 | PMEVTYPER30_EL0 = 57214, |
| 647 | TRCPRGCTLR = 34824, |
| 648 | TRCPROCSELR = 34832, |
| 649 | TRCCONFIGR = 34848, |
| 650 | TRCAUXCTLR = 34864, |
| 651 | TRCEVENTCTL0R = 34880, |
| 652 | TRCEVENTCTL1R = 34888, |
| 653 | TRCSTALLCTLR = 34904, |
| 654 | TRCTSCTLR = 34912, |
| 655 | TRCSYNCPR = 34920, |
| 656 | TRCCCCTLR = 34928, |
| 657 | TRCBBCTLR = 34936, |
| 658 | TRCTRACEIDR = 34817, |
| 659 | TRCQCTLR = 34825, |
| 660 | TRCVICTLR = 34818, |
| 661 | TRCVIIECTLR = 34826, |
| 662 | TRCVISSCTLR = 34834, |
| 663 | TRCVIPCSSCTLR = 34842, |
| 664 | TRCVDCTLR = 34882, |
| 665 | TRCVDSACCTLR = 34890, |
| 666 | TRCVDARCCTLR = 34898, |
| 667 | TRCSEQEVR0 = 34820, |
| 668 | TRCSEQEVR1 = 34828, |
| 669 | TRCSEQEVR2 = 34836, |
| 670 | TRCSEQRSTEVR = 34868, |
| 671 | TRCSEQSTR = 34876, |
| 672 | TRCEXTINSELR = 34884, |
| 673 | TRCCNTRLDVR0 = 34821, |
| 674 | TRCCNTRLDVR1 = 34829, |
| 675 | TRCCNTRLDVR2 = 34837, |
| 676 | TRCCNTRLDVR3 = 34845, |
| 677 | TRCCNTCTLR0 = 34853, |
| 678 | TRCCNTCTLR1 = 34861, |
| 679 | TRCCNTCTLR2 = 34869, |
| 680 | TRCCNTCTLR3 = 34877, |
| 681 | TRCCNTVR0 = 34885, |
| 682 | TRCCNTVR1 = 34893, |
| 683 | TRCCNTVR2 = 34901, |
| 684 | TRCCNTVR3 = 34909, |
| 685 | TRCIMSPEC0 = 34823, |
| 686 | TRCIMSPEC1 = 34831, |
| 687 | TRCIMSPEC2 = 34839, |
| 688 | TRCIMSPEC3 = 34847, |
| 689 | TRCIMSPEC4 = 34855, |
| 690 | TRCIMSPEC5 = 34863, |
| 691 | TRCIMSPEC6 = 34871, |
| 692 | TRCIMSPEC7 = 34879, |
| 693 | TRCRSCTLR2 = 34960, |
| 694 | TRCRSCTLR3 = 34968, |
| 695 | TRCRSCTLR4 = 34976, |
| 696 | TRCRSCTLR5 = 34984, |
| 697 | TRCRSCTLR6 = 34992, |
| 698 | TRCRSCTLR7 = 35000, |
| 699 | TRCRSCTLR8 = 35008, |
| 700 | TRCRSCTLR9 = 35016, |
| 701 | TRCRSCTLR10 = 35024, |
| 702 | TRCRSCTLR11 = 35032, |
| 703 | TRCRSCTLR12 = 35040, |
| 704 | TRCRSCTLR13 = 35048, |
| 705 | TRCRSCTLR14 = 35056, |
| 706 | TRCRSCTLR15 = 35064, |
| 707 | TRCRSCTLR16 = 34945, |
| 708 | TRCRSCTLR17 = 34953, |
| 709 | TRCRSCTLR18 = 34961, |
| 710 | TRCRSCTLR19 = 34969, |
| 711 | TRCRSCTLR20 = 34977, |
| 712 | TRCRSCTLR21 = 34985, |
| 713 | TRCRSCTLR22 = 34993, |
| 714 | TRCRSCTLR23 = 35001, |
| 715 | TRCRSCTLR24 = 35009, |
| 716 | TRCRSCTLR25 = 35017, |
| 717 | TRCRSCTLR26 = 35025, |
| 718 | TRCRSCTLR27 = 35033, |
| 719 | TRCRSCTLR28 = 35041, |
| 720 | TRCRSCTLR29 = 35049, |
| 721 | TRCRSCTLR30 = 35057, |
| 722 | TRCRSCTLR31 = 35065, |
| 723 | TRCSSCCR0 = 34946, |
| 724 | TRCSSCCR1 = 34954, |
| 725 | TRCSSCCR2 = 34962, |
| 726 | TRCSSCCR3 = 34970, |
| 727 | TRCSSCCR4 = 34978, |
| 728 | TRCSSCCR5 = 34986, |
| 729 | TRCSSCCR6 = 34994, |
| 730 | TRCSSCCR7 = 35002, |
| 731 | TRCSSCSR0 = 35010, |
| 732 | TRCSSCSR1 = 35018, |
| 733 | TRCSSCSR2 = 35026, |
| 734 | TRCSSCSR3 = 35034, |
| 735 | TRCSSCSR4 = 35042, |
| 736 | TRCSSCSR5 = 35050, |
| 737 | TRCSSCSR6 = 35058, |
| 738 | TRCSSCSR7 = 35066, |
| 739 | TRCSSPCICR0 = 34947, |
| 740 | TRCSSPCICR1 = 34955, |
| 741 | TRCSSPCICR2 = 34963, |
| 742 | TRCSSPCICR3 = 34971, |
| 743 | TRCSSPCICR4 = 34979, |
| 744 | TRCSSPCICR5 = 34987, |
| 745 | TRCSSPCICR6 = 34995, |
| 746 | TRCSSPCICR7 = 35003, |
| 747 | TRCPDCR = 34980, |
| 748 | TRCACVR0 = 35072, |
| 749 | TRCACVR1 = 35088, |
| 750 | TRCACVR2 = 35104, |
| 751 | TRCACVR3 = 35120, |
| 752 | TRCACVR4 = 35136, |
| 753 | TRCACVR5 = 35152, |
| 754 | TRCACVR6 = 35168, |
| 755 | TRCACVR7 = 35184, |
| 756 | TRCACVR8 = 35073, |
| 757 | TRCACVR9 = 35089, |
| 758 | TRCACVR10 = 35105, |
| 759 | TRCACVR11 = 35121, |
| 760 | TRCACVR12 = 35137, |
| 761 | TRCACVR13 = 35153, |
| 762 | TRCACVR14 = 35169, |
| 763 | TRCACVR15 = 35185, |
| 764 | TRCACATR0 = 35074, |
| 765 | TRCACATR1 = 35090, |
| 766 | TRCACATR2 = 35106, |
| 767 | TRCACATR3 = 35122, |
| 768 | TRCACATR4 = 35138, |
| 769 | TRCACATR5 = 35154, |
| 770 | TRCACATR6 = 35170, |
| 771 | TRCACATR7 = 35186, |
| 772 | TRCACATR8 = 35075, |
| 773 | TRCACATR9 = 35091, |
| 774 | TRCACATR10 = 35107, |
| 775 | TRCACATR11 = 35123, |
| 776 | TRCACATR12 = 35139, |
| 777 | TRCACATR13 = 35155, |
| 778 | TRCACATR14 = 35171, |
| 779 | TRCACATR15 = 35187, |
| 780 | TRCDVCVR0 = 35076, |
| 781 | TRCDVCVR1 = 35108, |
| 782 | TRCDVCVR2 = 35140, |
| 783 | TRCDVCVR3 = 35172, |
| 784 | TRCDVCVR4 = 35077, |
| 785 | TRCDVCVR5 = 35109, |
| 786 | TRCDVCVR6 = 35141, |
| 787 | TRCDVCVR7 = 35173, |
| 788 | TRCDVCMR0 = 35078, |
| 789 | TRCDVCMR1 = 35110, |
| 790 | TRCDVCMR2 = 35142, |
| 791 | TRCDVCMR3 = 35174, |
| 792 | TRCDVCMR4 = 35079, |
| 793 | TRCDVCMR5 = 35111, |
| 794 | TRCDVCMR6 = 35143, |
| 795 | TRCDVCMR7 = 35175, |
| 796 | TRCCIDCVR0 = 35200, |
| 797 | TRCCIDCVR1 = 35216, |
| 798 | TRCCIDCVR2 = 35232, |
| 799 | TRCCIDCVR3 = 35248, |
| 800 | TRCCIDCVR4 = 35264, |
| 801 | TRCCIDCVR5 = 35280, |
| 802 | TRCCIDCVR6 = 35296, |
| 803 | TRCCIDCVR7 = 35312, |
| 804 | TRCVMIDCVR0 = 35201, |
| 805 | TRCVMIDCVR1 = 35217, |
| 806 | TRCVMIDCVR2 = 35233, |
| 807 | TRCVMIDCVR3 = 35249, |
| 808 | TRCVMIDCVR4 = 35265, |
| 809 | TRCVMIDCVR5 = 35281, |
| 810 | TRCVMIDCVR6 = 35297, |
| 811 | TRCVMIDCVR7 = 35313, |
| 812 | TRCCIDCCTLR0 = 35202, |
| 813 | TRCCIDCCTLR1 = 35210, |
| 814 | TRCVMIDCCTLR0 = 35218, |
| 815 | TRCVMIDCCTLR1 = 35226, |
| 816 | TRCITCTRL = 35716, |
| 817 | TRCCLAIMSET = 35782, |
| 818 | TRCCLAIMCLR = 35790, |
| 819 | ICC_BPR1_EL1 = 50787, |
| 820 | ICC_BPR0_EL1 = 50755, |
| 821 | ICC_PMR_EL1 = 49712, |
| 822 | ICC_CTLR_EL1 = 50788, |
| 823 | ICC_CTLR_EL3 = 63076, |
| 824 | ICC_SRE_EL1 = 50789, |
| 825 | ICC_SRE_EL2 = 58957, |
| 826 | ICC_SRE_EL3 = 63077, |
| 827 | ICC_IGRPEN0_EL1 = 50790, |
| 828 | ICC_IGRPEN1_EL1 = 50791, |
| 829 | ICC_IGRPEN1_EL3 = 63079, |
| 830 | ICC_AP0R0_EL1 = 50756, |
| 831 | ICC_AP0R1_EL1 = 50757, |
| 832 | ICC_AP0R2_EL1 = 50758, |
| 833 | ICC_AP0R3_EL1 = 50759, |
| 834 | ICC_AP1R0_EL1 = 50760, |
| 835 | ICC_AP1R1_EL1 = 50761, |
| 836 | ICC_AP1R2_EL1 = 50762, |
| 837 | ICC_AP1R3_EL1 = 50763, |
| 838 | ICH_AP0R0_EL2 = 58944, |
| 839 | ICH_AP0R1_EL2 = 58945, |
| 840 | ICH_AP0R2_EL2 = 58946, |
| 841 | ICH_AP0R3_EL2 = 58947, |
| 842 | ICH_AP1R0_EL2 = 58952, |
| 843 | ICH_AP1R1_EL2 = 58953, |
| 844 | ICH_AP1R2_EL2 = 58954, |
| 845 | ICH_AP1R3_EL2 = 58955, |
| 846 | ICH_HCR_EL2 = 58968, |
| 847 | ICH_MISR_EL2 = 58970, |
| 848 | ICH_VMCR_EL2 = 58975, |
| 849 | ICH_LR0_EL2 = 58976, |
| 850 | ICH_LR1_EL2 = 58977, |
| 851 | ICH_LR2_EL2 = 58978, |
| 852 | ICH_LR3_EL2 = 58979, |
| 853 | ICH_LR4_EL2 = 58980, |
| 854 | ICH_LR5_EL2 = 58981, |
| 855 | ICH_LR6_EL2 = 58982, |
| 856 | ICH_LR7_EL2 = 58983, |
| 857 | ICH_LR8_EL2 = 58984, |
| 858 | ICH_LR9_EL2 = 58985, |
| 859 | ICH_LR10_EL2 = 58986, |
| 860 | ICH_LR11_EL2 = 58987, |
| 861 | ICH_LR12_EL2 = 58988, |
| 862 | ICH_LR13_EL2 = 58989, |
| 863 | ICH_LR14_EL2 = 58990, |
| 864 | ICH_LR15_EL2 = 58991, |
| 865 | VSCTLR_EL2 = 57600, |
| 866 | MPUIR_EL1 = 49156, |
| 867 | MPUIR_EL2 = 57348, |
| 868 | PRENR_EL1 = 49929, |
| 869 | PRENR_EL2 = 58121, |
| 870 | PRSELR_EL1 = 49937, |
| 871 | PRSELR_EL2 = 58129, |
| 872 | PRBAR_EL1 = 49984, |
| 873 | PRBAR_EL2 = 58176, |
| 874 | PRLAR_EL1 = 49985, |
| 875 | PRLAR_EL2 = 58177, |
| 876 | PRBAR1_EL1 = 49988, |
| 877 | PRLAR1_EL1 = 49989, |
| 878 | PRBAR1_EL2 = 58180, |
| 879 | PRLAR1_EL2 = 58181, |
| 880 | PRBAR2_EL1 = 49992, |
| 881 | PRLAR2_EL1 = 49993, |
| 882 | PRBAR2_EL2 = 58184, |
| 883 | PRLAR2_EL2 = 58185, |
| 884 | PRBAR3_EL1 = 49996, |
| 885 | PRLAR3_EL1 = 49997, |
| 886 | PRBAR3_EL2 = 58188, |
| 887 | PRLAR3_EL2 = 58189, |
| 888 | PRBAR4_EL1 = 50000, |
| 889 | PRLAR4_EL1 = 50001, |
| 890 | PRBAR4_EL2 = 58192, |
| 891 | PRLAR4_EL2 = 58193, |
| 892 | PRBAR5_EL1 = 50004, |
| 893 | PRLAR5_EL1 = 50005, |
| 894 | PRBAR5_EL2 = 58196, |
| 895 | PRLAR5_EL2 = 58197, |
| 896 | PRBAR6_EL1 = 50008, |
| 897 | PRLAR6_EL1 = 50009, |
| 898 | PRBAR6_EL2 = 58200, |
| 899 | PRLAR6_EL2 = 58201, |
| 900 | PRBAR7_EL1 = 50012, |
| 901 | PRLAR7_EL1 = 50013, |
| 902 | PRBAR7_EL2 = 58204, |
| 903 | PRLAR7_EL2 = 58205, |
| 904 | PRBAR8_EL1 = 50016, |
| 905 | PRLAR8_EL1 = 50017, |
| 906 | PRBAR8_EL2 = 58208, |
| 907 | PRLAR8_EL2 = 58209, |
| 908 | PRBAR9_EL1 = 50020, |
| 909 | PRLAR9_EL1 = 50021, |
| 910 | PRBAR9_EL2 = 58212, |
| 911 | PRLAR9_EL2 = 58213, |
| 912 | PRBAR10_EL1 = 50024, |
| 913 | PRLAR10_EL1 = 50025, |
| 914 | PRBAR10_EL2 = 58216, |
| 915 | PRLAR10_EL2 = 58217, |
| 916 | PRBAR11_EL1 = 50028, |
| 917 | PRLAR11_EL1 = 50029, |
| 918 | PRBAR11_EL2 = 58220, |
| 919 | PRLAR11_EL2 = 58221, |
| 920 | PRBAR12_EL1 = 50032, |
| 921 | PRLAR12_EL1 = 50033, |
| 922 | PRBAR12_EL2 = 58224, |
| 923 | PRLAR12_EL2 = 58225, |
| 924 | PRBAR13_EL1 = 50036, |
| 925 | PRLAR13_EL1 = 50037, |
| 926 | PRBAR13_EL2 = 58228, |
| 927 | PRLAR13_EL2 = 58229, |
| 928 | PRBAR14_EL1 = 50040, |
| 929 | PRLAR14_EL1 = 50041, |
| 930 | PRBAR14_EL2 = 58232, |
| 931 | PRLAR14_EL2 = 58233, |
| 932 | PRBAR15_EL1 = 50044, |
| 933 | PRLAR15_EL1 = 50045, |
| 934 | PRBAR15_EL2 = 58236, |
| 935 | PRLAR15_EL2 = 58237, |
| 936 | PAN = 49683, |
| 937 | LORSA_EL1 = 50464, |
| 938 | LOREA_EL1 = 50465, |
| 939 | LORN_EL1 = 50466, |
| 940 | LORC_EL1 = 50467, |
| 941 | TTBR1_EL2 = 57601, |
| 942 | CNTHV_TVAL_EL2 = 59160, |
| 943 | CNTHV_CVAL_EL2 = 59162, |
| 944 | CNTHV_CTL_EL2 = 59161, |
| 945 | SCTLR_EL12 = 59520, |
| 946 | CPACR_EL12 = 59522, |
| 947 | TTBR0_EL12 = 59648, |
| 948 | TTBR1_EL12 = 59649, |
| 949 | TCR_EL12 = 59650, |
| 950 | AFSR0_EL12 = 60040, |
| 951 | AFSR1_EL12 = 60041, |
| 952 | ESR_EL12 = 60048, |
| 953 | FAR_EL12 = 60160, |
| 954 | MAIR_EL12 = 60688, |
| 955 | AMAIR_EL12 = 60696, |
| 956 | VBAR_EL12 = 60928, |
| 957 | CONTEXTIDR_EL12 = 61057, |
| 958 | CNTKCTL_EL12 = 61192, |
| 959 | CNTP_TVAL_EL02 = 61200, |
| 960 | CNTP_CTL_EL02 = 61201, |
| 961 | CNTP_CVAL_EL02 = 61202, |
| 962 | CNTV_TVAL_EL02 = 61208, |
| 963 | CNTV_CTL_EL02 = 61209, |
| 964 | CNTV_CVAL_EL02 = 61210, |
| 965 | SPSR_EL12 = 59904, |
| 966 | ELR_EL12 = 59905, |
| 967 | CONTEXTIDR_EL2 = 59009, |
| 968 | UAO = 49684, |
| 969 | PMBLIMITR_EL1 = 50384, |
| 970 | PMBPTR_EL1 = 50385, |
| 971 | PMBSR_EL1 = 50387, |
| 972 | PMBIDR_EL1 = 50391, |
| 973 | PMSCR_EL2 = 58568, |
| 974 | PMSCR_EL12 = 60616, |
| 975 | PMSCR_EL1 = 50376, |
| 976 | PMSICR_EL1 = 50378, |
| 977 | PMSIRR_EL1 = 50379, |
| 978 | PMSFCR_EL1 = 50380, |
| 979 | PMSEVFR_EL1 = 50381, |
| 980 | PMSLATFR_EL1 = 50382, |
| 981 | PMSIDR_EL1 = 50383, |
| 982 | ERRSELR_EL1 = 49817, |
| 983 | ERXCTLR_EL1 = 49825, |
| 984 | ERXSTATUS_EL1 = 49826, |
| 985 | ERXADDR_EL1 = 49827, |
| 986 | ERXMISC0_EL1 = 49832, |
| 987 | ERXMISC1_EL1 = 49833, |
| 988 | DISR_EL1 = 50697, |
| 989 | VDISR_EL2 = 58889, |
| 990 | VSESR_EL2 = 58003, |
| 991 | APIAKeyLo_EL1 = 49416, |
| 992 | APIAKeyHi_EL1 = 49417, |
| 993 | APIBKeyLo_EL1 = 49418, |
| 994 | APIBKeyHi_EL1 = 49419, |
| 995 | APDAKeyLo_EL1 = 49424, |
| 996 | APDAKeyHi_EL1 = 49425, |
| 997 | APDBKeyLo_EL1 = 49426, |
| 998 | APDBKeyHi_EL1 = 49427, |
| 999 | APGAKeyLo_EL1 = 49432, |
| 1000 | APGAKeyHi_EL1 = 49433, |
| 1001 | VSTCR_EL2 = 57650, |
| 1002 | VSTTBR_EL2 = 57648, |
| 1003 | CNTHVS_TVAL_EL2 = 59168, |
| 1004 | CNTHVS_CVAL_EL2 = 59170, |
| 1005 | CNTHVS_CTL_EL2 = 59169, |
| 1006 | CNTHPS_TVAL_EL2 = 59176, |
| 1007 | CNTHPS_CVAL_EL2 = 59178, |
| 1008 | CNTHPS_CTL_EL2 = 59177, |
| 1009 | SDER32_EL2 = 57497, |
| 1010 | ERXPFGCTL_EL1 = 49829, |
| 1011 | ERXPFGCDN_EL1 = 49830, |
| 1012 | ERXMISC2_EL1 = 49834, |
| 1013 | ERXMISC3_EL1 = 49835, |
| 1014 | ERXPFGF_EL1 = 49828, |
| 1015 | MPAMVPMV_EL2 = 58657, |
| 1016 | MPAMVPM0_EL2 = 58672, |
| 1017 | MPAMVPM1_EL2 = 58673, |
| 1018 | MPAMVPM2_EL2 = 58674, |
| 1019 | MPAMVPM3_EL2 = 58675, |
| 1020 | MPAMVPM4_EL2 = 58676, |
| 1021 | MPAMVPM5_EL2 = 58677, |
| 1022 | MPAMVPM6_EL2 = 58678, |
| 1023 | MPAMVPM7_EL2 = 58679, |
| 1024 | AMCR_EL0 = 56976, |
| 1025 | AMCFGR_EL0 = 56977, |
| 1026 | AMCGCR_EL0 = 56978, |
| 1027 | AMUSERENR_EL0 = 56979, |
| 1028 | AMCNTENCLR0_EL0 = 56980, |
| 1029 | AMCNTENSET0_EL0 = 56981, |
| 1030 | AMEVCNTR00_EL0 = 56992, |
| 1031 | AMEVCNTR01_EL0 = 56993, |
| 1032 | AMEVCNTR02_EL0 = 56994, |
| 1033 | AMEVCNTR03_EL0 = 56995, |
| 1034 | AMEVTYPER00_EL0 = 57008, |
| 1035 | AMEVTYPER01_EL0 = 57009, |
| 1036 | AMEVTYPER02_EL0 = 57010, |
| 1037 | AMEVTYPER03_EL0 = 57011, |
| 1038 | AMCNTENCLR1_EL0 = 56984, |
| 1039 | AMCNTENSET1_EL0 = 56985, |
| 1040 | AMEVCNTR10_EL0 = 57056, |
| 1041 | AMEVCNTR11_EL0 = 57057, |
| 1042 | AMEVCNTR12_EL0 = 57058, |
| 1043 | AMEVCNTR13_EL0 = 57059, |
| 1044 | AMEVCNTR14_EL0 = 57060, |
| 1045 | AMEVCNTR15_EL0 = 57061, |
| 1046 | AMEVCNTR16_EL0 = 57062, |
| 1047 | AMEVCNTR17_EL0 = 57063, |
| 1048 | AMEVCNTR18_EL0 = 57064, |
| 1049 | AMEVCNTR19_EL0 = 57065, |
| 1050 | AMEVCNTR110_EL0 = 57066, |
| 1051 | AMEVCNTR111_EL0 = 57067, |
| 1052 | AMEVCNTR112_EL0 = 57068, |
| 1053 | AMEVCNTR113_EL0 = 57069, |
| 1054 | AMEVCNTR114_EL0 = 57070, |
| 1055 | AMEVCNTR115_EL0 = 57071, |
| 1056 | AMEVTYPER10_EL0 = 57072, |
| 1057 | AMEVTYPER11_EL0 = 57073, |
| 1058 | AMEVTYPER12_EL0 = 57074, |
| 1059 | AMEVTYPER13_EL0 = 57075, |
| 1060 | AMEVTYPER14_EL0 = 57076, |
| 1061 | AMEVTYPER15_EL0 = 57077, |
| 1062 | AMEVTYPER16_EL0 = 57078, |
| 1063 | AMEVTYPER17_EL0 = 57079, |
| 1064 | AMEVTYPER18_EL0 = 57080, |
| 1065 | AMEVTYPER19_EL0 = 57081, |
| 1066 | AMEVTYPER110_EL0 = 57082, |
| 1067 | AMEVTYPER111_EL0 = 57083, |
| 1068 | AMEVTYPER112_EL0 = 57084, |
| 1069 | AMEVTYPER113_EL0 = 57085, |
| 1070 | AMEVTYPER114_EL0 = 57086, |
| 1071 | AMEVTYPER115_EL0 = 57087, |
| 1072 | TRFCR_EL1 = 49297, |
| 1073 | TRFCR_EL2 = 57489, |
| 1074 | TRFCR_EL12 = 59537, |
| 1075 | DIT = 55829, |
| 1076 | VNCR_EL2 = 57616, |
| 1077 | ZCR_EL1 = 49296, |
| 1078 | ZCR_EL2 = 57488, |
| 1079 | ZCR_EL3 = 61584, |
| 1080 | ZCR_EL12 = 59536, |
| 1081 | SSBS = 55830, |
| 1082 | TCO = 55831, |
| 1083 | GCR_EL1 = 49286, |
| 1084 | RGSR_EL1 = 49285, |
| 1085 | TFSR_EL1 = 49840, |
| 1086 | TFSR_EL2 = 58032, |
| 1087 | TFSR_EL3 = 62128, |
| 1088 | TFSR_EL12 = 60080, |
| 1089 | TFSRE0_EL1 = 49841, |
| 1090 | GMID_EL1 = 51204, |
| 1091 | TRCRSR = 34896, |
| 1092 | TRCEXTINSELR0 = 34884, |
| 1093 | TRCEXTINSELR1 = 34892, |
| 1094 | TRCEXTINSELR2 = 34900, |
| 1095 | TRCEXTINSELR3 = 34908, |
| 1096 | TRBLIMITR_EL1 = 50392, |
| 1097 | TRBPTR_EL1 = 50393, |
| 1098 | TRBBASER_EL1 = 50394, |
| 1099 | TRBSR_EL1 = 50395, |
| 1100 | TRBMAR_EL1 = 50396, |
| 1101 | TRBMPAM_EL1 = 50397, |
| 1102 | TRBTRG_EL1 = 50398, |
| 1103 | TRBIDR_EL1 = 50399, |
| 1104 | AMCG1IDR_EL0 = 56982, |
| 1105 | AMEVCNTVOFF00_EL2 = 59072, |
| 1106 | AMEVCNTVOFF10_EL2 = 59088, |
| 1107 | AMEVCNTVOFF01_EL2 = 59073, |
| 1108 | AMEVCNTVOFF11_EL2 = 59089, |
| 1109 | AMEVCNTVOFF02_EL2 = 59074, |
| 1110 | AMEVCNTVOFF12_EL2 = 59090, |
| 1111 | AMEVCNTVOFF03_EL2 = 59075, |
| 1112 | AMEVCNTVOFF13_EL2 = 59091, |
| 1113 | AMEVCNTVOFF04_EL2 = 59076, |
| 1114 | AMEVCNTVOFF14_EL2 = 59092, |
| 1115 | AMEVCNTVOFF05_EL2 = 59077, |
| 1116 | AMEVCNTVOFF15_EL2 = 59093, |
| 1117 | AMEVCNTVOFF06_EL2 = 59078, |
| 1118 | AMEVCNTVOFF16_EL2 = 59094, |
| 1119 | AMEVCNTVOFF07_EL2 = 59079, |
| 1120 | AMEVCNTVOFF17_EL2 = 59095, |
| 1121 | AMEVCNTVOFF08_EL2 = 59080, |
| 1122 | AMEVCNTVOFF18_EL2 = 59096, |
| 1123 | AMEVCNTVOFF09_EL2 = 59081, |
| 1124 | AMEVCNTVOFF19_EL2 = 59097, |
| 1125 | AMEVCNTVOFF010_EL2 = 59082, |
| 1126 | AMEVCNTVOFF110_EL2 = 59098, |
| 1127 | AMEVCNTVOFF011_EL2 = 59083, |
| 1128 | AMEVCNTVOFF111_EL2 = 59099, |
| 1129 | AMEVCNTVOFF012_EL2 = 59084, |
| 1130 | AMEVCNTVOFF112_EL2 = 59100, |
| 1131 | AMEVCNTVOFF013_EL2 = 59085, |
| 1132 | AMEVCNTVOFF113_EL2 = 59101, |
| 1133 | AMEVCNTVOFF014_EL2 = 59086, |
| 1134 | AMEVCNTVOFF114_EL2 = 59102, |
| 1135 | AMEVCNTVOFF015_EL2 = 59087, |
| 1136 | AMEVCNTVOFF115_EL2 = 59103, |
| 1137 | HFGRTR_EL2 = 57484, |
| 1138 | HFGWTR_EL2 = 57485, |
| 1139 | HFGITR_EL2 = 57486, |
| 1140 | HDFGRTR_EL2 = 57740, |
| 1141 | HDFGWTR_EL2 = 57741, |
| 1142 | HAFGRTR_EL2 = 57742, |
| 1143 | HDFGRTR2_EL2 = 57736, |
| 1144 | HDFGWTR2_EL2 = 57737, |
| 1145 | HFGRTR2_EL2 = 57738, |
| 1146 | HFGWTR2_EL2 = 57739, |
| 1147 | HFGITR2_EL2 = 57743, |
| 1148 | CNTSCALE_EL2 = 59140, |
| 1149 | CNTISCALE_EL2 = 59141, |
| 1150 | CNTPOFF_EL2 = 59142, |
| 1151 | CNTVFRQ_EL2 = 59143, |
| 1152 | CNTPCTSS_EL0 = 57093, |
| 1153 | CNTVCTSS_EL0 = 57094, |
| 1154 | ACCDATA_EL1 = 50821, |
| 1155 | BRBCR_EL1 = 35968, |
| 1156 | BRBCR_EL12 = 44160, |
| 1157 | BRBCR_EL2 = 42112, |
| 1158 | BRBFCR_EL1 = 35969, |
| 1159 | BRBIDR0_EL1 = 35984, |
| 1160 | BRBINFINJ_EL1 = 35976, |
| 1161 | BRBSRCINJ_EL1 = 35977, |
| 1162 | BRBTGTINJ_EL1 = 35978, |
| 1163 | BRBTS_EL1 = 35970, |
| 1164 | BRBINF0_EL1 = 35840, |
| 1165 | BRBSRC0_EL1 = 35841, |
| 1166 | BRBTGT0_EL1 = 35842, |
| 1167 | BRBINF1_EL1 = 35848, |
| 1168 | BRBSRC1_EL1 = 35849, |
| 1169 | BRBTGT1_EL1 = 35850, |
| 1170 | BRBINF2_EL1 = 35856, |
| 1171 | BRBSRC2_EL1 = 35857, |
| 1172 | BRBTGT2_EL1 = 35858, |
| 1173 | BRBINF3_EL1 = 35864, |
| 1174 | BRBSRC3_EL1 = 35865, |
| 1175 | BRBTGT3_EL1 = 35866, |
| 1176 | BRBINF4_EL1 = 35872, |
| 1177 | BRBSRC4_EL1 = 35873, |
| 1178 | BRBTGT4_EL1 = 35874, |
| 1179 | BRBINF5_EL1 = 35880, |
| 1180 | BRBSRC5_EL1 = 35881, |
| 1181 | BRBTGT5_EL1 = 35882, |
| 1182 | BRBINF6_EL1 = 35888, |
| 1183 | BRBSRC6_EL1 = 35889, |
| 1184 | BRBTGT6_EL1 = 35890, |
| 1185 | BRBINF7_EL1 = 35896, |
| 1186 | BRBSRC7_EL1 = 35897, |
| 1187 | BRBTGT7_EL1 = 35898, |
| 1188 | BRBINF8_EL1 = 35904, |
| 1189 | BRBSRC8_EL1 = 35905, |
| 1190 | BRBTGT8_EL1 = 35906, |
| 1191 | BRBINF9_EL1 = 35912, |
| 1192 | BRBSRC9_EL1 = 35913, |
| 1193 | BRBTGT9_EL1 = 35914, |
| 1194 | BRBINF10_EL1 = 35920, |
| 1195 | BRBSRC10_EL1 = 35921, |
| 1196 | BRBTGT10_EL1 = 35922, |
| 1197 | BRBINF11_EL1 = 35928, |
| 1198 | BRBSRC11_EL1 = 35929, |
| 1199 | BRBTGT11_EL1 = 35930, |
| 1200 | BRBINF12_EL1 = 35936, |
| 1201 | BRBSRC12_EL1 = 35937, |
| 1202 | BRBTGT12_EL1 = 35938, |
| 1203 | BRBINF13_EL1 = 35944, |
| 1204 | BRBSRC13_EL1 = 35945, |
| 1205 | BRBTGT13_EL1 = 35946, |
| 1206 | BRBINF14_EL1 = 35952, |
| 1207 | BRBSRC14_EL1 = 35953, |
| 1208 | BRBTGT14_EL1 = 35954, |
| 1209 | BRBINF15_EL1 = 35960, |
| 1210 | BRBSRC15_EL1 = 35961, |
| 1211 | BRBTGT15_EL1 = 35962, |
| 1212 | BRBINF16_EL1 = 35844, |
| 1213 | BRBSRC16_EL1 = 35845, |
| 1214 | BRBTGT16_EL1 = 35846, |
| 1215 | BRBINF17_EL1 = 35852, |
| 1216 | BRBSRC17_EL1 = 35853, |
| 1217 | BRBTGT17_EL1 = 35854, |
| 1218 | BRBINF18_EL1 = 35860, |
| 1219 | BRBSRC18_EL1 = 35861, |
| 1220 | BRBTGT18_EL1 = 35862, |
| 1221 | BRBINF19_EL1 = 35868, |
| 1222 | BRBSRC19_EL1 = 35869, |
| 1223 | BRBTGT19_EL1 = 35870, |
| 1224 | BRBINF20_EL1 = 35876, |
| 1225 | BRBSRC20_EL1 = 35877, |
| 1226 | BRBTGT20_EL1 = 35878, |
| 1227 | BRBINF21_EL1 = 35884, |
| 1228 | BRBSRC21_EL1 = 35885, |
| 1229 | BRBTGT21_EL1 = 35886, |
| 1230 | BRBINF22_EL1 = 35892, |
| 1231 | BRBSRC22_EL1 = 35893, |
| 1232 | BRBTGT22_EL1 = 35894, |
| 1233 | BRBINF23_EL1 = 35900, |
| 1234 | BRBSRC23_EL1 = 35901, |
| 1235 | BRBTGT23_EL1 = 35902, |
| 1236 | BRBINF24_EL1 = 35908, |
| 1237 | BRBSRC24_EL1 = 35909, |
| 1238 | BRBTGT24_EL1 = 35910, |
| 1239 | BRBINF25_EL1 = 35916, |
| 1240 | BRBSRC25_EL1 = 35917, |
| 1241 | BRBTGT25_EL1 = 35918, |
| 1242 | BRBINF26_EL1 = 35924, |
| 1243 | BRBSRC26_EL1 = 35925, |
| 1244 | BRBTGT26_EL1 = 35926, |
| 1245 | BRBINF27_EL1 = 35932, |
| 1246 | BRBSRC27_EL1 = 35933, |
| 1247 | BRBTGT27_EL1 = 35934, |
| 1248 | BRBINF28_EL1 = 35940, |
| 1249 | BRBSRC28_EL1 = 35941, |
| 1250 | BRBTGT28_EL1 = 35942, |
| 1251 | BRBINF29_EL1 = 35948, |
| 1252 | BRBSRC29_EL1 = 35949, |
| 1253 | BRBTGT29_EL1 = 35950, |
| 1254 | BRBINF30_EL1 = 35956, |
| 1255 | BRBSRC30_EL1 = 35957, |
| 1256 | BRBTGT30_EL1 = 35958, |
| 1257 | BRBINF31_EL1 = 35964, |
| 1258 | BRBSRC31_EL1 = 35965, |
| 1259 | BRBTGT31_EL1 = 35966, |
| 1260 | PMSNEVFR_EL1 = 50377, |
| 1261 | SMCR_EL1 = 49302, |
| 1262 | SMCR_EL2 = 57494, |
| 1263 | SMCR_EL3 = 61590, |
| 1264 | SMCR_EL12 = 59542, |
| 1265 | SVCR = 55826, |
| 1266 | SMPRI_EL1 = 49300, |
| 1267 | SMPRIMAP_EL2 = 57493, |
| 1268 | SMIDR_EL1 = 51206, |
| 1269 | TPIDR2_EL0 = 56965, |
| 1270 | MPAMSM_EL1 = 50475, |
| 1271 | ALLINT = 49688, |
| 1272 | ICC_NMIAR1_EL1 = 50765, |
| 1273 | GCSCR_EL1 = 49448, |
| 1274 | GCSPR_EL1 = 49449, |
| 1275 | GCSCRE0_EL1 = 49450, |
| 1276 | GCSPR_EL0 = 55593, |
| 1277 | GCSCR_EL2 = 57640, |
| 1278 | GCSPR_EL2 = 57641, |
| 1279 | GCSCR_EL12 = 59688, |
| 1280 | GCSPR_EL12 = 59689, |
| 1281 | GCSCR_EL3 = 61736, |
| 1282 | GCSPR_EL3 = 61737, |
| 1283 | AMAIR2_EL1 = 50457, |
| 1284 | AMAIR2_EL12 = 60697, |
| 1285 | AMAIR2_EL2 = 58649, |
| 1286 | AMAIR2_EL3 = 62745, |
| 1287 | MAIR2_EL1 = 50449, |
| 1288 | MAIR2_EL12 = 60689, |
| 1289 | MAIR2_EL2 = 58633, |
| 1290 | MAIR2_EL3 = 62729, |
| 1291 | PIRE0_EL1 = 50450, |
| 1292 | PIRE0_EL12 = 60690, |
| 1293 | PIRE0_EL2 = 58642, |
| 1294 | PIR_EL1 = 50451, |
| 1295 | PIR_EL12 = 60691, |
| 1296 | PIR_EL2 = 58643, |
| 1297 | PIR_EL3 = 62739, |
| 1298 | S2PIR_EL2 = 58645, |
| 1299 | POR_EL0 = 56596, |
| 1300 | POR_EL1 = 50452, |
| 1301 | POR_EL12 = 60692, |
| 1302 | POR_EL2 = 58644, |
| 1303 | POR_EL3 = 62740, |
| 1304 | S2POR_EL1 = 50453, |
| 1305 | SCTLR2_EL1 = 49283, |
| 1306 | SCTLR2_EL12 = 59523, |
| 1307 | SCTLR2_EL2 = 57475, |
| 1308 | SCTLR2_EL3 = 61571, |
| 1309 | TCR2_EL1 = 49411, |
| 1310 | TCR2_EL12 = 59651, |
| 1311 | TCR2_EL2 = 57603, |
| 1312 | RCWMASK_EL1 = 50822, |
| 1313 | RCWSMASK_EL1 = 50819, |
| 1314 | MDSELR_EL1 = 32802, |
| 1315 | PMUACR_EL1 = 50420, |
| 1316 | PMCCNTSVR_EL1 = 34655, |
| 1317 | PMICNTSVR_EL1 = 34656, |
| 1318 | PMSSCR_EL1 = 50411, |
| 1319 | PMEVCNTSVR0_EL1 = 34624, |
| 1320 | PMEVCNTSVR1_EL1 = 34625, |
| 1321 | PMEVCNTSVR2_EL1 = 34626, |
| 1322 | PMEVCNTSVR3_EL1 = 34627, |
| 1323 | PMEVCNTSVR4_EL1 = 34628, |
| 1324 | PMEVCNTSVR5_EL1 = 34629, |
| 1325 | PMEVCNTSVR6_EL1 = 34630, |
| 1326 | PMEVCNTSVR7_EL1 = 34631, |
| 1327 | PMEVCNTSVR8_EL1 = 34632, |
| 1328 | PMEVCNTSVR9_EL1 = 34633, |
| 1329 | PMEVCNTSVR10_EL1 = 34634, |
| 1330 | PMEVCNTSVR11_EL1 = 34635, |
| 1331 | PMEVCNTSVR12_EL1 = 34636, |
| 1332 | PMEVCNTSVR13_EL1 = 34637, |
| 1333 | PMEVCNTSVR14_EL1 = 34638, |
| 1334 | PMEVCNTSVR15_EL1 = 34639, |
| 1335 | PMEVCNTSVR16_EL1 = 34640, |
| 1336 | PMEVCNTSVR17_EL1 = 34641, |
| 1337 | PMEVCNTSVR18_EL1 = 34642, |
| 1338 | PMEVCNTSVR19_EL1 = 34643, |
| 1339 | PMEVCNTSVR20_EL1 = 34644, |
| 1340 | PMEVCNTSVR21_EL1 = 34645, |
| 1341 | PMEVCNTSVR22_EL1 = 34646, |
| 1342 | PMEVCNTSVR23_EL1 = 34647, |
| 1343 | PMEVCNTSVR24_EL1 = 34648, |
| 1344 | PMEVCNTSVR25_EL1 = 34649, |
| 1345 | PMEVCNTSVR26_EL1 = 34650, |
| 1346 | PMEVCNTSVR27_EL1 = 34651, |
| 1347 | PMEVCNTSVR28_EL1 = 34652, |
| 1348 | PMEVCNTSVR29_EL1 = 34653, |
| 1349 | PMEVCNTSVR30_EL1 = 34654, |
| 1350 | PMICNTR_EL0 = 56480, |
| 1351 | PMICFILTR_EL0 = 56496, |
| 1352 | PMZR_EL0 = 56556, |
| 1353 | PMECR_EL1 = 50421, |
| 1354 | PMIAR_EL1 = 50423, |
| 1355 | SPMACCESSR_EL1 = 34027, |
| 1356 | SPMACCESSR_EL12 = 44267, |
| 1357 | SPMACCESSR_EL2 = 42219, |
| 1358 | SPMACCESSR_EL3 = 46315, |
| 1359 | SPMCNTENCLR_EL0 = 40162, |
| 1360 | SPMCNTENSET_EL0 = 40161, |
| 1361 | SPMCR_EL0 = 40160, |
| 1362 | SPMDEVAFF_EL1 = 34030, |
| 1363 | SPMDEVARCH_EL1 = 34029, |
| 1364 | SPMEVCNTR0_EL0 = 40704, |
| 1365 | SPMEVFILT2R0_EL0 = 40752, |
| 1366 | SPMEVFILTR0_EL0 = 40736, |
| 1367 | SPMEVTYPER0_EL0 = 40720, |
| 1368 | SPMEVCNTR1_EL0 = 40705, |
| 1369 | SPMEVFILT2R1_EL0 = 40753, |
| 1370 | SPMEVFILTR1_EL0 = 40737, |
| 1371 | SPMEVTYPER1_EL0 = 40721, |
| 1372 | SPMEVCNTR2_EL0 = 40706, |
| 1373 | SPMEVFILT2R2_EL0 = 40754, |
| 1374 | SPMEVFILTR2_EL0 = 40738, |
| 1375 | SPMEVTYPER2_EL0 = 40722, |
| 1376 | SPMEVCNTR3_EL0 = 40707, |
| 1377 | SPMEVFILT2R3_EL0 = 40755, |
| 1378 | SPMEVFILTR3_EL0 = 40739, |
| 1379 | SPMEVTYPER3_EL0 = 40723, |
| 1380 | SPMEVCNTR4_EL0 = 40708, |
| 1381 | SPMEVFILT2R4_EL0 = 40756, |
| 1382 | SPMEVFILTR4_EL0 = 40740, |
| 1383 | SPMEVTYPER4_EL0 = 40724, |
| 1384 | SPMEVCNTR5_EL0 = 40709, |
| 1385 | SPMEVFILT2R5_EL0 = 40757, |
| 1386 | SPMEVFILTR5_EL0 = 40741, |
| 1387 | SPMEVTYPER5_EL0 = 40725, |
| 1388 | SPMEVCNTR6_EL0 = 40710, |
| 1389 | SPMEVFILT2R6_EL0 = 40758, |
| 1390 | SPMEVFILTR6_EL0 = 40742, |
| 1391 | SPMEVTYPER6_EL0 = 40726, |
| 1392 | SPMEVCNTR7_EL0 = 40711, |
| 1393 | SPMEVFILT2R7_EL0 = 40759, |
| 1394 | SPMEVFILTR7_EL0 = 40743, |
| 1395 | SPMEVTYPER7_EL0 = 40727, |
| 1396 | SPMEVCNTR8_EL0 = 40712, |
| 1397 | SPMEVFILT2R8_EL0 = 40760, |
| 1398 | SPMEVFILTR8_EL0 = 40744, |
| 1399 | SPMEVTYPER8_EL0 = 40728, |
| 1400 | SPMEVCNTR9_EL0 = 40713, |
| 1401 | SPMEVFILT2R9_EL0 = 40761, |
| 1402 | SPMEVFILTR9_EL0 = 40745, |
| 1403 | SPMEVTYPER9_EL0 = 40729, |
| 1404 | SPMEVCNTR10_EL0 = 40714, |
| 1405 | SPMEVFILT2R10_EL0 = 40762, |
| 1406 | SPMEVFILTR10_EL0 = 40746, |
| 1407 | SPMEVTYPER10_EL0 = 40730, |
| 1408 | SPMEVCNTR11_EL0 = 40715, |
| 1409 | SPMEVFILT2R11_EL0 = 40763, |
| 1410 | SPMEVFILTR11_EL0 = 40747, |
| 1411 | SPMEVTYPER11_EL0 = 40731, |
| 1412 | SPMEVCNTR12_EL0 = 40716, |
| 1413 | SPMEVFILT2R12_EL0 = 40764, |
| 1414 | SPMEVFILTR12_EL0 = 40748, |
| 1415 | SPMEVTYPER12_EL0 = 40732, |
| 1416 | SPMEVCNTR13_EL0 = 40717, |
| 1417 | SPMEVFILT2R13_EL0 = 40765, |
| 1418 | SPMEVFILTR13_EL0 = 40749, |
| 1419 | SPMEVTYPER13_EL0 = 40733, |
| 1420 | SPMEVCNTR14_EL0 = 40718, |
| 1421 | SPMEVFILT2R14_EL0 = 40766, |
| 1422 | SPMEVFILTR14_EL0 = 40750, |
| 1423 | SPMEVTYPER14_EL0 = 40734, |
| 1424 | SPMEVCNTR15_EL0 = 40719, |
| 1425 | SPMEVFILT2R15_EL0 = 40767, |
| 1426 | SPMEVFILTR15_EL0 = 40751, |
| 1427 | SPMEVTYPER15_EL0 = 40735, |
| 1428 | SPMIIDR_EL1 = 34028, |
| 1429 | SPMINTENCLR_EL1 = 34034, |
| 1430 | SPMINTENSET_EL1 = 34033, |
| 1431 | SPMOVSCLR_EL0 = 40163, |
| 1432 | SPMOVSSET_EL0 = 40179, |
| 1433 | SPMSELR_EL0 = 40165, |
| 1434 | SPMCGCR0_EL1 = 34024, |
| 1435 | SPMCGCR1_EL1 = 34025, |
| 1436 | SPMCFGR_EL1 = 34031, |
| 1437 | SPMROOTCR_EL3 = 46327, |
| 1438 | SPMSCR_EL1 = 48375, |
| 1439 | TRCITEEDCR = 34833, |
| 1440 | TRCITECR_EL1 = 49299, |
| 1441 | TRCITECR_EL12 = 59539, |
| 1442 | TRCITECR_EL2 = 57491, |
| 1443 | PMSDSFR_EL1 = 50388, |
| 1444 | ERXGSR_EL1 = 49818, |
| 1445 | PFAR_EL1 = 49925, |
| 1446 | PFAR_EL12 = 60165, |
| 1447 | PFAR_EL2 = 58117, |
| 1448 | PM = 49689, |
| 1449 | ID_AA64FPFR0_EL1 = 49191, |
| 1450 | FPMR = 55842, |
| 1451 | MDSTEPOP_EL1 = 32810, |
| 1452 | SPMZR_EL0 = 40164, |
| 1453 | VDISR_EL3 = 62985, |
| 1454 | VSESR_EL3 = 62099, |
| 1455 | HDBSSBR_EL2 = 57626, |
| 1456 | HDBSSPROD_EL2 = 57627, |
| 1457 | HACDBSBR_EL2 = 57628, |
| 1458 | HACDBSCONS_EL2 = 57629, |
| 1459 | FGWTE3_EL3 = 61581, |
| 1460 | MPAMBWIDR_EL1 = 50469, |
| 1461 | MPAMBW3_EL3 = 62764, |
| 1462 | MPAMBW2_EL2 = 58668, |
| 1463 | MPAMBW1_EL1 = 50476, |
| 1464 | MPAMBW1_EL12 = 60716, |
| 1465 | MPAMBW0_EL1 = 50477, |
| 1466 | MPAMBWCAP_EL2 = 58670, |
| 1467 | MPAMBWSM_EL1 = 50479, |
| 1468 | MPAM0_EL1 = 50473, |
| 1469 | MPAM1_EL1 = 50472, |
| 1470 | MPAM1_EL12 = 60712, |
| 1471 | MPAM2_EL2 = 58664, |
| 1472 | MPAM3_EL3 = 62760, |
| 1473 | MPAMHCR_EL2 = 58656, |
| 1474 | MPAMIDR_EL1 = 50468, |
| 1475 | MPAMCTL_EL1 = 50474, |
| 1476 | MPAMCTL_EL12 = 60714, |
| 1477 | MPAMCTL_EL2 = 58666, |
| 1478 | MPAMCTL_EL3 = 62762, |
| 1479 | MPAMVIDCR_EL2 = 58680, |
| 1480 | MPAMVIDSR_EL2 = 58681, |
| 1481 | MPAMVIDSR_EL3 = 62777, |
| 1482 | SCTLRMASK_EL1 = 49312, |
| 1483 | SCTLRMASK_EL2 = 57504, |
| 1484 | SCTLRMASK_EL12 = 59552, |
| 1485 | CPACRMASK_EL1 = 49314, |
| 1486 | CPTRMASK_EL2 = 57506, |
| 1487 | CPACRMASK_EL12 = 59554, |
| 1488 | SCTLR2MASK_EL1 = 49315, |
| 1489 | SCTLR2MASK_EL2 = 57507, |
| 1490 | SCTLR2MASK_EL12 = 59555, |
| 1491 | CPACRALIAS_EL1 = 49316, |
| 1492 | SCTLRALIAS_EL1 = 49318, |
| 1493 | SCTLR2ALIAS_EL1 = 49319, |
| 1494 | TCRMASK_EL1 = 49466, |
| 1495 | TCRMASK_EL2 = 57658, |
| 1496 | TCRMASK_EL12 = 59706, |
| 1497 | TCR2MASK_EL1 = 49467, |
| 1498 | TCR2MASK_EL2 = 57659, |
| 1499 | TCR2MASK_EL12 = 59707, |
| 1500 | TCRALIAS_EL1 = 49470, |
| 1501 | TCR2ALIAS_EL1 = 49471, |
| 1502 | ACTLRMASK_EL1 = 49313, |
| 1503 | ACTLRMASK_EL2 = 57505, |
| 1504 | ACTLRMASK_EL12 = 59553, |
| 1505 | ACTLRALIAS_EL1 = 49317, |
| 1506 | GPCBW_EL3 = 61709, |
| 1507 | PMBMAR_EL1 = 50389, |
| 1508 | PMBSR_EL12 = 60627, |
| 1509 | PMBSR_EL2 = 58579, |
| 1510 | PMBSR_EL3 = 62675, |
| 1511 | TRBSR_EL12 = 60635, |
| 1512 | TRBSR_EL2 = 58587, |
| 1513 | TRBSR_EL3 = 62683, |
| 1514 | VTLBID0_EL2 = 57664, |
| 1515 | VTLBID1_EL2 = 57665, |
| 1516 | VTLBID2_EL2 = 57666, |
| 1517 | VTLBID3_EL2 = 57667, |
| 1518 | VTLBIDOS0_EL2 = 57672, |
| 1519 | VTLBIDOS1_EL2 = 57673, |
| 1520 | VTLBIDOS2_EL2 = 57674, |
| 1521 | VTLBIDOS3_EL2 = 57675, |
| 1522 | TLBIDIDR_EL1 = 50470, |
| 1523 | ICC_APR_EL1 = 52736, |
| 1524 | ICC_APR_EL3 = 63040, |
| 1525 | ICC_CR0_EL1 = 52737, |
| 1526 | ICC_CR0_EL3 = 63048, |
| 1527 | ICC_DOMHPPIR_EL3 = 63042, |
| 1528 | ICC_HAPR_EL1 = 52739, |
| 1529 | ICC_HPPIR_EL1 = 50771, |
| 1530 | ICC_HPPIR_EL3 = 63049, |
| 1531 | ICC_IAFFIDR_EL1 = 50773, |
| 1532 | ICC_ICSR_EL1 = 50772, |
| 1533 | ICC_IDR0_EL1 = 50770, |
| 1534 | ICC_PCR_EL1 = 52738, |
| 1535 | ICC_PCR_EL3 = 63041, |
| 1536 | ICV_APR_EL1 = 52736, |
| 1537 | ICV_CR0_EL1 = 52737, |
| 1538 | ICV_HAPR_EL1 = 52739, |
| 1539 | ICV_HPPIR_EL1 = 50771, |
| 1540 | ICV_PCR_EL1 = 52738, |
| 1541 | ICC_PPI_DOMAINR0_EL3 = 63044, |
| 1542 | ICC_PPI_DOMAINR1_EL3 = 63045, |
| 1543 | ICC_PPI_DOMAINR2_EL3 = 63046, |
| 1544 | ICC_PPI_DOMAINR3_EL3 = 63047, |
| 1545 | ICC_PPI_PRIORITYR0_EL1 = 50800, |
| 1546 | ICC_PPI_PRIORITYR1_EL1 = 50801, |
| 1547 | ICC_PPI_PRIORITYR2_EL1 = 50802, |
| 1548 | ICC_PPI_PRIORITYR3_EL1 = 50803, |
| 1549 | ICC_PPI_PRIORITYR4_EL1 = 50804, |
| 1550 | ICC_PPI_PRIORITYR5_EL1 = 50805, |
| 1551 | ICC_PPI_PRIORITYR6_EL1 = 50806, |
| 1552 | ICC_PPI_PRIORITYR7_EL1 = 50807, |
| 1553 | ICC_PPI_PRIORITYR8_EL1 = 50808, |
| 1554 | ICC_PPI_PRIORITYR9_EL1 = 50809, |
| 1555 | ICC_PPI_PRIORITYR10_EL1 = 50810, |
| 1556 | ICC_PPI_PRIORITYR11_EL1 = 50811, |
| 1557 | ICC_PPI_PRIORITYR12_EL1 = 50812, |
| 1558 | ICC_PPI_PRIORITYR13_EL1 = 50813, |
| 1559 | ICC_PPI_PRIORITYR14_EL1 = 50814, |
| 1560 | ICC_PPI_PRIORITYR15_EL1 = 50815, |
| 1561 | ICC_PPI_CACTIVER0_EL1 = 50792, |
| 1562 | ICC_PPI_CPENDR0_EL1 = 50796, |
| 1563 | ICC_PPI_ENABLER0_EL1 = 50774, |
| 1564 | ICC_PPI_SACTIVER0_EL1 = 50794, |
| 1565 | ICC_PPI_SPENDR0_EL1 = 50798, |
| 1566 | ICC_PPI_HMR0_EL1 = 50768, |
| 1567 | ICC_PPI_CACTIVER1_EL1 = 50793, |
| 1568 | ICC_PPI_CPENDR1_EL1 = 50797, |
| 1569 | ICC_PPI_ENABLER1_EL1 = 50775, |
| 1570 | ICC_PPI_SACTIVER1_EL1 = 50795, |
| 1571 | ICC_PPI_SPENDR1_EL1 = 50799, |
| 1572 | ICC_PPI_HMR1_EL1 = 50769, |
| 1573 | ICV_PPI_CACTIVER0_EL1 = 50792, |
| 1574 | ICV_PPI_CPENDR0_EL1 = 50796, |
| 1575 | ICV_PPI_ENABLER0_EL1 = 50774, |
| 1576 | ICV_PPI_SACTIVER0_EL1 = 50794, |
| 1577 | ICV_PPI_SPENDR0_EL1 = 50798, |
| 1578 | ICV_PPI_HMR0_EL1 = 50768, |
| 1579 | ICV_PPI_CACTIVER1_EL1 = 50793, |
| 1580 | ICV_PPI_CPENDR1_EL1 = 50797, |
| 1581 | ICV_PPI_ENABLER1_EL1 = 50775, |
| 1582 | ICV_PPI_SACTIVER1_EL1 = 50795, |
| 1583 | ICV_PPI_SPENDR1_EL1 = 50799, |
| 1584 | ICV_PPI_HMR1_EL1 = 50769, |
| 1585 | ICV_PPI_PRIORITYR0_EL1 = 50800, |
| 1586 | ICV_PPI_PRIORITYR1_EL1 = 50801, |
| 1587 | ICV_PPI_PRIORITYR2_EL1 = 50802, |
| 1588 | ICV_PPI_PRIORITYR3_EL1 = 50803, |
| 1589 | ICV_PPI_PRIORITYR4_EL1 = 50804, |
| 1590 | ICV_PPI_PRIORITYR5_EL1 = 50805, |
| 1591 | ICV_PPI_PRIORITYR6_EL1 = 50806, |
| 1592 | ICV_PPI_PRIORITYR7_EL1 = 50807, |
| 1593 | ICV_PPI_PRIORITYR8_EL1 = 50808, |
| 1594 | ICV_PPI_PRIORITYR9_EL1 = 50809, |
| 1595 | ICV_PPI_PRIORITYR10_EL1 = 50810, |
| 1596 | ICV_PPI_PRIORITYR11_EL1 = 50811, |
| 1597 | ICV_PPI_PRIORITYR12_EL1 = 50812, |
| 1598 | ICV_PPI_PRIORITYR13_EL1 = 50813, |
| 1599 | ICV_PPI_PRIORITYR14_EL1 = 50814, |
| 1600 | ICV_PPI_PRIORITYR15_EL1 = 50815, |
| 1601 | ICH_APR_EL2 = 58948, |
| 1602 | ICH_CONTEXTR_EL2 = 58974, |
| 1603 | ICH_HFGITR_EL2 = 58959, |
| 1604 | ICH_HFGRTR_EL2 = 58956, |
| 1605 | ICH_HFGWTR_EL2 = 58958, |
| 1606 | ICH_HPPIR_EL2 = 58949, |
| 1607 | ICH_VCTLR_EL2 = 58972, |
| 1608 | ICH_PPI_ACTIVER0_EL2 = 58966, |
| 1609 | ICH_PPI_DVIR0_EL2 = 58960, |
| 1610 | ICH_PPI_ENABLER0_EL2 = 58962, |
| 1611 | ICH_PPI_PENDR0_EL2 = 58964, |
| 1612 | ICH_PPI_ACTIVER1_EL2 = 58967, |
| 1613 | ICH_PPI_DVIR1_EL2 = 58961, |
| 1614 | ICH_PPI_ENABLER1_EL2 = 58963, |
| 1615 | ICH_PPI_PENDR1_EL2 = 58965, |
| 1616 | ICH_PPI_PRIORITYR0_EL2 = 58992, |
| 1617 | ICH_PPI_PRIORITYR1_EL2 = 58993, |
| 1618 | ICH_PPI_PRIORITYR2_EL2 = 58994, |
| 1619 | ICH_PPI_PRIORITYR3_EL2 = 58995, |
| 1620 | ICH_PPI_PRIORITYR4_EL2 = 58996, |
| 1621 | ICH_PPI_PRIORITYR5_EL2 = 58997, |
| 1622 | ICH_PPI_PRIORITYR6_EL2 = 58998, |
| 1623 | ICH_PPI_PRIORITYR7_EL2 = 58999, |
| 1624 | ICH_PPI_PRIORITYR8_EL2 = 59000, |
| 1625 | ICH_PPI_PRIORITYR9_EL2 = 59001, |
| 1626 | ICH_PPI_PRIORITYR10_EL2 = 59002, |
| 1627 | ICH_PPI_PRIORITYR11_EL2 = 59003, |
| 1628 | ICH_PPI_PRIORITYR12_EL2 = 59004, |
| 1629 | ICH_PPI_PRIORITYR13_EL2 = 59005, |
| 1630 | ICH_PPI_PRIORITYR14_EL2 = 59006, |
| 1631 | ICH_PPI_PRIORITYR15_EL2 = 59007, |
| 1632 | DPOTBR0_EL1 = 49414, |
| 1633 | DPOTBR0_EL12 = 59654, |
| 1634 | DPOTBR1_EL1 = 49415, |
| 1635 | DPOTBR1_EL12 = 59655, |
| 1636 | DPOTBR0_EL2 = 57606, |
| 1637 | DPOTBR1_EL2 = 57607, |
| 1638 | DPOTBR0_EL3 = 61702, |
| 1639 | IRTBRU_EL1 = 49412, |
| 1640 | IRTBRU_EL12 = 59652, |
| 1641 | IRTBRP_EL1 = 49413, |
| 1642 | IRTBRP_EL12 = 59653, |
| 1643 | IRTBRU_EL2 = 57604, |
| 1644 | IRTBRP_EL2 = 57605, |
| 1645 | IRTBRP_EL3 = 61701, |
| 1646 | TTTBRU_EL1 = 50454, |
| 1647 | TTTBRU_EL12 = 60694, |
| 1648 | TTTBRP_EL1 = 50455, |
| 1649 | TTTBRP_EL12 = 60695, |
| 1650 | TTTBRU_EL2 = 58646, |
| 1651 | TTTBRP_EL2 = 58647, |
| 1652 | TTTBRP_EL3 = 62743, |
| 1653 | FGDTP0_EL1 = 49552, |
| 1654 | FGDTP0_EL2 = 57744, |
| 1655 | FGDTP0_EL12 = 59792, |
| 1656 | FGDTP0_EL3 = 61840, |
| 1657 | FGDTU0_EL1 = 49568, |
| 1658 | FGDTU0_EL2 = 57760, |
| 1659 | FGDTU0_EL12 = 59808, |
| 1660 | FGDTP1_EL1 = 49553, |
| 1661 | FGDTP1_EL2 = 57745, |
| 1662 | FGDTP1_EL12 = 59793, |
| 1663 | FGDTP1_EL3 = 61841, |
| 1664 | FGDTU1_EL1 = 49569, |
| 1665 | FGDTU1_EL2 = 57761, |
| 1666 | FGDTU1_EL12 = 59809, |
| 1667 | FGDTP2_EL1 = 49554, |
| 1668 | FGDTP2_EL2 = 57746, |
| 1669 | FGDTP2_EL12 = 59794, |
| 1670 | FGDTP2_EL3 = 61842, |
| 1671 | FGDTU2_EL1 = 49570, |
| 1672 | FGDTU2_EL2 = 57762, |
| 1673 | FGDTU2_EL12 = 59810, |
| 1674 | FGDTP3_EL1 = 49555, |
| 1675 | FGDTP3_EL2 = 57747, |
| 1676 | FGDTP3_EL12 = 59795, |
| 1677 | FGDTP3_EL3 = 61843, |
| 1678 | FGDTU3_EL1 = 49571, |
| 1679 | FGDTU3_EL2 = 57763, |
| 1680 | FGDTU3_EL12 = 59811, |
| 1681 | FGDTP4_EL1 = 49556, |
| 1682 | FGDTP4_EL2 = 57748, |
| 1683 | FGDTP4_EL12 = 59796, |
| 1684 | FGDTP4_EL3 = 61844, |
| 1685 | FGDTU4_EL1 = 49572, |
| 1686 | FGDTU4_EL2 = 57764, |
| 1687 | FGDTU4_EL12 = 59812, |
| 1688 | FGDTP5_EL1 = 49557, |
| 1689 | FGDTP5_EL2 = 57749, |
| 1690 | FGDTP5_EL12 = 59797, |
| 1691 | FGDTP5_EL3 = 61845, |
| 1692 | FGDTU5_EL1 = 49573, |
| 1693 | FGDTU5_EL2 = 57765, |
| 1694 | FGDTU5_EL12 = 59813, |
| 1695 | FGDTP6_EL1 = 49558, |
| 1696 | FGDTP6_EL2 = 57750, |
| 1697 | FGDTP6_EL12 = 59798, |
| 1698 | FGDTP6_EL3 = 61846, |
| 1699 | FGDTU6_EL1 = 49574, |
| 1700 | FGDTU6_EL2 = 57766, |
| 1701 | FGDTU6_EL12 = 59814, |
| 1702 | FGDTP7_EL1 = 49559, |
| 1703 | FGDTP7_EL2 = 57751, |
| 1704 | FGDTP7_EL12 = 59799, |
| 1705 | FGDTP7_EL3 = 61847, |
| 1706 | FGDTU7_EL1 = 49575, |
| 1707 | FGDTU7_EL2 = 57767, |
| 1708 | FGDTU7_EL12 = 59815, |
| 1709 | FGDTP8_EL1 = 49560, |
| 1710 | FGDTP8_EL2 = 57752, |
| 1711 | FGDTP8_EL12 = 59800, |
| 1712 | FGDTP8_EL3 = 61848, |
| 1713 | FGDTU8_EL1 = 49576, |
| 1714 | FGDTU8_EL2 = 57768, |
| 1715 | FGDTU8_EL12 = 59816, |
| 1716 | FGDTP9_EL1 = 49561, |
| 1717 | FGDTP9_EL2 = 57753, |
| 1718 | FGDTP9_EL12 = 59801, |
| 1719 | FGDTP9_EL3 = 61849, |
| 1720 | FGDTU9_EL1 = 49577, |
| 1721 | FGDTU9_EL2 = 57769, |
| 1722 | FGDTU9_EL12 = 59817, |
| 1723 | FGDTP10_EL1 = 49562, |
| 1724 | FGDTP10_EL2 = 57754, |
| 1725 | FGDTP10_EL12 = 59802, |
| 1726 | FGDTP10_EL3 = 61850, |
| 1727 | FGDTU10_EL1 = 49578, |
| 1728 | FGDTU10_EL2 = 57770, |
| 1729 | FGDTU10_EL12 = 59818, |
| 1730 | FGDTP11_EL1 = 49563, |
| 1731 | FGDTP11_EL2 = 57755, |
| 1732 | FGDTP11_EL12 = 59803, |
| 1733 | FGDTP11_EL3 = 61851, |
| 1734 | FGDTU11_EL1 = 49579, |
| 1735 | FGDTU11_EL2 = 57771, |
| 1736 | FGDTU11_EL12 = 59819, |
| 1737 | FGDTP12_EL1 = 49564, |
| 1738 | FGDTP12_EL2 = 57756, |
| 1739 | FGDTP12_EL12 = 59804, |
| 1740 | FGDTP12_EL3 = 61852, |
| 1741 | FGDTU12_EL1 = 49580, |
| 1742 | FGDTU12_EL2 = 57772, |
| 1743 | FGDTU12_EL12 = 59820, |
| 1744 | FGDTP13_EL1 = 49565, |
| 1745 | FGDTP13_EL2 = 57757, |
| 1746 | FGDTP13_EL12 = 59805, |
| 1747 | FGDTP13_EL3 = 61853, |
| 1748 | FGDTU13_EL1 = 49581, |
| 1749 | FGDTU13_EL2 = 57773, |
| 1750 | FGDTU13_EL12 = 59821, |
| 1751 | FGDTP14_EL1 = 49566, |
| 1752 | FGDTP14_EL2 = 57758, |
| 1753 | FGDTP14_EL12 = 59806, |
| 1754 | FGDTP14_EL3 = 61854, |
| 1755 | FGDTU14_EL1 = 49582, |
| 1756 | FGDTU14_EL2 = 57774, |
| 1757 | FGDTU14_EL12 = 59822, |
| 1758 | FGDTP15_EL1 = 49567, |
| 1759 | FGDTP15_EL2 = 57759, |
| 1760 | FGDTP15_EL12 = 59807, |
| 1761 | FGDTP15_EL3 = 61855, |
| 1762 | FGDTU15_EL1 = 49583, |
| 1763 | FGDTU15_EL2 = 57775, |
| 1764 | FGDTU15_EL12 = 59823, |
| 1765 | LDSTT_EL1 = 49423, |
| 1766 | LDSTT_EL12 = 59663, |
| 1767 | LDSTT_EL2 = 57615, |
| 1768 | TINDEX_EL0 = 55811, |
| 1769 | TINDEX_EL1 = 49667, |
| 1770 | TINDEX_EL2 = 57859, |
| 1771 | TINDEX_EL12 = 59907, |
| 1772 | TINDEX_EL3 = 61955, |
| 1773 | STINDEX_EL1 = 49666, |
| 1774 | STINDEX_EL2 = 57858, |
| 1775 | STINDEX_EL12 = 59906, |
| 1776 | STINDEX_EL3 = 61954, |
| 1777 | TPIDR3_EL0 = 56960, |
| 1778 | TPIDR3_EL1 = 50816, |
| 1779 | TPIDR3_EL12 = 61056, |
| 1780 | TPIDR3_EL2 = 59008, |
| 1781 | TPIDR3_EL3 = 63104, |
| 1782 | VNCCR_EL2 = 57617, |
| 1783 | DPOCR_EL0 = 55850, |
| 1784 | AFGDTP0_EL1 = 49584, |
| 1785 | AFGDTU0_EL1 = 49600, |
| 1786 | AFGDTP0_EL2 = 57776, |
| 1787 | AFGDTU0_EL2 = 57792, |
| 1788 | AFGDTP0_EL12 = 59824, |
| 1789 | AFGDTU0_EL12 = 59840, |
| 1790 | AFGDTP0_EL3 = 61872, |
| 1791 | AFGDTP1_EL1 = 49585, |
| 1792 | AFGDTU1_EL1 = 49601, |
| 1793 | AFGDTP1_EL2 = 57777, |
| 1794 | AFGDTU1_EL2 = 57793, |
| 1795 | AFGDTP1_EL12 = 59825, |
| 1796 | AFGDTU1_EL12 = 59841, |
| 1797 | AFGDTP1_EL3 = 61873, |
| 1798 | AFGDTP2_EL1 = 49586, |
| 1799 | AFGDTU2_EL1 = 49602, |
| 1800 | AFGDTP2_EL2 = 57778, |
| 1801 | AFGDTU2_EL2 = 57794, |
| 1802 | AFGDTP2_EL12 = 59826, |
| 1803 | AFGDTU2_EL12 = 59842, |
| 1804 | AFGDTP2_EL3 = 61874, |
| 1805 | AFGDTP3_EL1 = 49587, |
| 1806 | AFGDTU3_EL1 = 49603, |
| 1807 | AFGDTP3_EL2 = 57779, |
| 1808 | AFGDTU3_EL2 = 57795, |
| 1809 | AFGDTP3_EL12 = 59827, |
| 1810 | AFGDTU3_EL12 = 59843, |
| 1811 | AFGDTP3_EL3 = 61875, |
| 1812 | AFGDTP4_EL1 = 49588, |
| 1813 | AFGDTU4_EL1 = 49604, |
| 1814 | AFGDTP4_EL2 = 57780, |
| 1815 | AFGDTU4_EL2 = 57796, |
| 1816 | AFGDTP4_EL12 = 59828, |
| 1817 | AFGDTU4_EL12 = 59844, |
| 1818 | AFGDTP4_EL3 = 61876, |
| 1819 | AFGDTP5_EL1 = 49589, |
| 1820 | AFGDTU5_EL1 = 49605, |
| 1821 | AFGDTP5_EL2 = 57781, |
| 1822 | AFGDTU5_EL2 = 57797, |
| 1823 | AFGDTP5_EL12 = 59829, |
| 1824 | AFGDTU5_EL12 = 59845, |
| 1825 | AFGDTP5_EL3 = 61877, |
| 1826 | AFGDTP6_EL1 = 49590, |
| 1827 | AFGDTU6_EL1 = 49606, |
| 1828 | AFGDTP6_EL2 = 57782, |
| 1829 | AFGDTU6_EL2 = 57798, |
| 1830 | AFGDTP6_EL12 = 59830, |
| 1831 | AFGDTU6_EL12 = 59846, |
| 1832 | AFGDTP6_EL3 = 61878, |
| 1833 | AFGDTP7_EL1 = 49591, |
| 1834 | AFGDTU7_EL1 = 49607, |
| 1835 | AFGDTP7_EL2 = 57783, |
| 1836 | AFGDTU7_EL2 = 57799, |
| 1837 | AFGDTP7_EL12 = 59831, |
| 1838 | AFGDTU7_EL12 = 59847, |
| 1839 | AFGDTP7_EL3 = 61879, |
| 1840 | AFGDTP8_EL1 = 49592, |
| 1841 | AFGDTU8_EL1 = 49608, |
| 1842 | AFGDTP8_EL2 = 57784, |
| 1843 | AFGDTU8_EL2 = 57800, |
| 1844 | AFGDTP8_EL12 = 59832, |
| 1845 | AFGDTU8_EL12 = 59848, |
| 1846 | AFGDTP8_EL3 = 61880, |
| 1847 | AFGDTP9_EL1 = 49593, |
| 1848 | AFGDTU9_EL1 = 49609, |
| 1849 | AFGDTP9_EL2 = 57785, |
| 1850 | AFGDTU9_EL2 = 57801, |
| 1851 | AFGDTP9_EL12 = 59833, |
| 1852 | AFGDTU9_EL12 = 59849, |
| 1853 | AFGDTP9_EL3 = 61881, |
| 1854 | AFGDTP10_EL1 = 49594, |
| 1855 | AFGDTU10_EL1 = 49610, |
| 1856 | AFGDTP10_EL2 = 57786, |
| 1857 | AFGDTU10_EL2 = 57802, |
| 1858 | AFGDTP10_EL12 = 59834, |
| 1859 | AFGDTU10_EL12 = 59850, |
| 1860 | AFGDTP10_EL3 = 61882, |
| 1861 | AFGDTP11_EL1 = 49595, |
| 1862 | AFGDTU11_EL1 = 49611, |
| 1863 | AFGDTP11_EL2 = 57787, |
| 1864 | AFGDTU11_EL2 = 57803, |
| 1865 | AFGDTP11_EL12 = 59835, |
| 1866 | AFGDTU11_EL12 = 59851, |
| 1867 | AFGDTP11_EL3 = 61883, |
| 1868 | AFGDTP12_EL1 = 49596, |
| 1869 | AFGDTU12_EL1 = 49612, |
| 1870 | AFGDTP12_EL2 = 57788, |
| 1871 | AFGDTU12_EL2 = 57804, |
| 1872 | AFGDTP12_EL12 = 59836, |
| 1873 | AFGDTU12_EL12 = 59852, |
| 1874 | AFGDTP12_EL3 = 61884, |
| 1875 | AFGDTP13_EL1 = 49597, |
| 1876 | AFGDTU13_EL1 = 49613, |
| 1877 | AFGDTP13_EL2 = 57789, |
| 1878 | AFGDTU13_EL2 = 57805, |
| 1879 | AFGDTP13_EL12 = 59837, |
| 1880 | AFGDTU13_EL12 = 59853, |
| 1881 | AFGDTP13_EL3 = 61885, |
| 1882 | AFGDTP14_EL1 = 49598, |
| 1883 | AFGDTU14_EL1 = 49614, |
| 1884 | AFGDTP14_EL2 = 57790, |
| 1885 | AFGDTU14_EL2 = 57806, |
| 1886 | AFGDTP14_EL12 = 59838, |
| 1887 | AFGDTU14_EL12 = 59854, |
| 1888 | AFGDTP14_EL3 = 61886, |
| 1889 | AFGDTP15_EL1 = 49599, |
| 1890 | AFGDTU15_EL1 = 49615, |
| 1891 | AFGDTP15_EL2 = 57791, |
| 1892 | AFGDTU15_EL2 = 57807, |
| 1893 | AFGDTP15_EL12 = 59839, |
| 1894 | AFGDTU15_EL12 = 59855, |
| 1895 | AFGDTP15_EL3 = 61887, |
| 1896 | HCRMASK_EL2 = 57518, |
| 1897 | HCRXMASK_EL2 = 57519, |
| 1898 | NVHCR_EL2 = 57512, |
| 1899 | NVHCRX_EL2 = 57513, |
| 1900 | NVHCRMASK_EL2 = 57516, |
| 1901 | NVHCRXMASK_EL2 = 57517, |
| 1902 | TPMIN0_EL0 = 55572, |
| 1903 | TPMAX0_EL0 = 55573, |
| 1904 | TPMIN0_EL1 = 49428, |
| 1905 | TPMAX0_EL1 = 49429, |
| 1906 | TPMIN0_EL2 = 57620, |
| 1907 | TPMAX0_EL2 = 57621, |
| 1908 | TPMIN0_EL12 = 59668, |
| 1909 | TPMAX0_EL12 = 59669, |
| 1910 | TPMIN1_EL0 = 55574, |
| 1911 | TPMAX1_EL0 = 55575, |
| 1912 | TPMIN1_EL1 = 49430, |
| 1913 | TPMAX1_EL1 = 49431, |
| 1914 | TPMIN1_EL2 = 57622, |
| 1915 | TPMAX1_EL2 = 57623, |
| 1916 | TPMIN1_EL12 = 59670, |
| 1917 | TPMAX1_EL12 = 59671, |
| 1918 | }; |
| 1919 | #endif |
| 1920 | |
| 1921 | #ifdef GET_TSBValues_DECL |
| 1922 | enum TSBValues { |
| 1923 | csync = 2, |
| 1924 | }; |
| 1925 | #endif |
| 1926 | |
| 1927 | #ifdef GET_CMHPRIORITYHINT_DECL |
| 1928 | enum CMHPriorityHintValues { |
| 1929 | ph = 1, |
| 1930 | }; |
| 1931 | #endif |
| 1932 | |
| 1933 | #ifdef GET_TINDEX_DECL |
| 1934 | enum TIndexValues { |
| 1935 | nb = 1, |
| 1936 | }; |
| 1937 | #endif |
| 1938 | |
| 1939 | #ifdef GET_ATsList_DECL |
| 1940 | const AT *lookupATByEncoding(uint16_t Encoding); |
| 1941 | const AT *lookupATByName(StringRef Name); |
| 1942 | #endif |
| 1943 | |
| 1944 | #ifdef GET_ATsList_IMPL |
| 1945 | constexpr AT ATsList[] = { |
| 1946 | { "S1E1R" , 0x3C0, {} }, // 0 |
| 1947 | { "S1E1W" , 0x3C1, {} }, // 1 |
| 1948 | { "S1E0R" , 0x3C2, {} }, // 2 |
| 1949 | { "S1E0W" , 0x3C3, {} }, // 3 |
| 1950 | { "S1E1RP" , 0x3C8, {AArch64::FeaturePAN_RWV} }, // 4 |
| 1951 | { "S1E1WP" , 0x3C9, {AArch64::FeaturePAN_RWV} }, // 5 |
| 1952 | { "S1E1A" , 0x3CA, {} }, // 6 |
| 1953 | { "S1E2R" , 0x23C0, {} }, // 7 |
| 1954 | { "S1E2W" , 0x23C1, {} }, // 8 |
| 1955 | { "S12E1R" , 0x23C4, {} }, // 9 |
| 1956 | { "S12E1W" , 0x23C5, {} }, // 10 |
| 1957 | { "S12E0R" , 0x23C6, {} }, // 11 |
| 1958 | { "S12E0W" , 0x23C7, {} }, // 12 |
| 1959 | { "S1E2A" , 0x23CA, {} }, // 13 |
| 1960 | { "S1E3R" , 0x33C0, {} }, // 14 |
| 1961 | { "S1E3W" , 0x33C1, {} }, // 15 |
| 1962 | { "S1E3A" , 0x33CA, {} }, // 16 |
| 1963 | }; |
| 1964 | |
| 1965 | const AT *lookupATByEncoding(uint16_t Encoding) { |
| 1966 | struct KeyType { |
| 1967 | uint16_t Encoding; |
| 1968 | }; |
| 1969 | KeyType Key = {Encoding}; |
| 1970 | struct Comp { |
| 1971 | bool operator()(const AT &LHS, const KeyType &RHS) const { |
| 1972 | if (LHS.Encoding < RHS.Encoding) |
| 1973 | return true; |
| 1974 | if (LHS.Encoding > RHS.Encoding) |
| 1975 | return false; |
| 1976 | return false; |
| 1977 | } |
| 1978 | }; |
| 1979 | auto Table = ArrayRef(ATsList); |
| 1980 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 1981 | if (Idx == Table.end() || |
| 1982 | Key.Encoding != Idx->Encoding) |
| 1983 | return nullptr; |
| 1984 | |
| 1985 | return &*Idx; |
| 1986 | } |
| 1987 | |
| 1988 | const AT *lookupATByName(StringRef Name) { |
| 1989 | struct IndexType { |
| 1990 | const char * Name; |
| 1991 | unsigned _index; |
| 1992 | }; |
| 1993 | static const struct IndexType Index[] = { |
| 1994 | { "S12E0R" , 11 }, |
| 1995 | { "S12E0W" , 12 }, |
| 1996 | { "S12E1R" , 9 }, |
| 1997 | { "S12E1W" , 10 }, |
| 1998 | { "S1E0R" , 2 }, |
| 1999 | { "S1E0W" , 3 }, |
| 2000 | { "S1E1A" , 6 }, |
| 2001 | { "S1E1R" , 0 }, |
| 2002 | { "S1E1RP" , 4 }, |
| 2003 | { "S1E1W" , 1 }, |
| 2004 | { "S1E1WP" , 5 }, |
| 2005 | { "S1E2A" , 13 }, |
| 2006 | { "S1E2R" , 7 }, |
| 2007 | { "S1E2W" , 8 }, |
| 2008 | { "S1E3A" , 16 }, |
| 2009 | { "S1E3R" , 14 }, |
| 2010 | { "S1E3W" , 15 }, |
| 2011 | }; |
| 2012 | |
| 2013 | struct KeyType { |
| 2014 | std::string Name; |
| 2015 | }; |
| 2016 | KeyType Key = {Name.upper()}; |
| 2017 | struct Comp { |
| 2018 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 2019 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 2020 | if (CmpName < 0) return true; |
| 2021 | if (CmpName > 0) return false; |
| 2022 | return false; |
| 2023 | } |
| 2024 | }; |
| 2025 | auto Table = ArrayRef(Index); |
| 2026 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2027 | if (Idx == Table.end() || |
| 2028 | Key.Name != Idx->Name) |
| 2029 | return nullptr; |
| 2030 | |
| 2031 | return &ATsList[Idx->_index]; |
| 2032 | } |
| 2033 | #endif |
| 2034 | |
| 2035 | #ifdef GET_BTIsList_DECL |
| 2036 | const BTI *lookupBTIByEncoding(uint8_t Encoding); |
| 2037 | const BTI *lookupBTIByName(StringRef Name); |
| 2038 | #endif |
| 2039 | |
| 2040 | #ifdef GET_BTIsList_IMPL |
| 2041 | constexpr BTI BTIsList[] = { |
| 2042 | { "r" , 0x0 }, // 0 |
| 2043 | { "c" , 0x2 }, // 1 |
| 2044 | { "j" , 0x4 }, // 2 |
| 2045 | { "jc" , 0x6 }, // 3 |
| 2046 | }; |
| 2047 | |
| 2048 | const BTI *lookupBTIByEncoding(uint8_t Encoding) { |
| 2049 | struct KeyType { |
| 2050 | uint8_t Encoding; |
| 2051 | }; |
| 2052 | KeyType Key = {Encoding}; |
| 2053 | struct Comp { |
| 2054 | bool operator()(const BTI &LHS, const KeyType &RHS) const { |
| 2055 | if (LHS.Encoding < RHS.Encoding) |
| 2056 | return true; |
| 2057 | if (LHS.Encoding > RHS.Encoding) |
| 2058 | return false; |
| 2059 | return false; |
| 2060 | } |
| 2061 | }; |
| 2062 | auto Table = ArrayRef(BTIsList); |
| 2063 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2064 | if (Idx == Table.end() || |
| 2065 | Key.Encoding != Idx->Encoding) |
| 2066 | return nullptr; |
| 2067 | |
| 2068 | return &*Idx; |
| 2069 | } |
| 2070 | |
| 2071 | const BTI *lookupBTIByName(StringRef Name) { |
| 2072 | struct IndexType { |
| 2073 | const char * Name; |
| 2074 | unsigned _index; |
| 2075 | }; |
| 2076 | static const struct IndexType Index[] = { |
| 2077 | { "C" , 1 }, |
| 2078 | { "J" , 2 }, |
| 2079 | { "JC" , 3 }, |
| 2080 | { "R" , 0 }, |
| 2081 | }; |
| 2082 | |
| 2083 | struct KeyType { |
| 2084 | std::string Name; |
| 2085 | }; |
| 2086 | KeyType Key = {Name.upper()}; |
| 2087 | struct Comp { |
| 2088 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 2089 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 2090 | if (CmpName < 0) return true; |
| 2091 | if (CmpName > 0) return false; |
| 2092 | return false; |
| 2093 | } |
| 2094 | }; |
| 2095 | auto Table = ArrayRef(Index); |
| 2096 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2097 | if (Idx == Table.end() || |
| 2098 | Key.Name != Idx->Name) |
| 2099 | return nullptr; |
| 2100 | |
| 2101 | return &BTIsList[Idx->_index]; |
| 2102 | } |
| 2103 | #endif |
| 2104 | |
| 2105 | #ifdef GET_DBnXSsList_DECL |
| 2106 | const DBnXS *lookupDBnXSByEncoding(uint8_t Encoding); |
| 2107 | const DBnXS *lookupDBnXSByImmValue(uint8_t ImmValue); |
| 2108 | const DBnXS *lookupDBnXSByName(StringRef Name); |
| 2109 | #endif |
| 2110 | |
| 2111 | #ifdef GET_DBnXSsList_IMPL |
| 2112 | constexpr DBnXS DBnXSsList[] = { |
| 2113 | { "oshnxs" , 0x3, 0x10, {AArch64::FeatureXS} }, // 0 |
| 2114 | { "nshnxs" , 0x7, 0x14, {AArch64::FeatureXS} }, // 1 |
| 2115 | { "ishnxs" , 0xB, 0x18, {AArch64::FeatureXS} }, // 2 |
| 2116 | { "synxs" , 0xF, 0x1C, {AArch64::FeatureXS} }, // 3 |
| 2117 | }; |
| 2118 | |
| 2119 | const DBnXS *lookupDBnXSByEncoding(uint8_t Encoding) { |
| 2120 | struct KeyType { |
| 2121 | uint8_t Encoding; |
| 2122 | }; |
| 2123 | KeyType Key = {Encoding}; |
| 2124 | struct Comp { |
| 2125 | bool operator()(const DBnXS &LHS, const KeyType &RHS) const { |
| 2126 | if (LHS.Encoding < RHS.Encoding) |
| 2127 | return true; |
| 2128 | if (LHS.Encoding > RHS.Encoding) |
| 2129 | return false; |
| 2130 | return false; |
| 2131 | } |
| 2132 | }; |
| 2133 | auto Table = ArrayRef(DBnXSsList); |
| 2134 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2135 | if (Idx == Table.end() || |
| 2136 | Key.Encoding != Idx->Encoding) |
| 2137 | return nullptr; |
| 2138 | |
| 2139 | return &*Idx; |
| 2140 | } |
| 2141 | |
| 2142 | const DBnXS *lookupDBnXSByImmValue(uint8_t ImmValue) { |
| 2143 | struct IndexType { |
| 2144 | uint8_t ImmValue; |
| 2145 | unsigned _index; |
| 2146 | }; |
| 2147 | static const struct IndexType Index[] = { |
| 2148 | { 0x10, 0 }, |
| 2149 | { 0x14, 1 }, |
| 2150 | { 0x18, 2 }, |
| 2151 | { 0x1C, 3 }, |
| 2152 | }; |
| 2153 | |
| 2154 | struct KeyType { |
| 2155 | uint8_t ImmValue; |
| 2156 | }; |
| 2157 | KeyType Key = {ImmValue}; |
| 2158 | struct Comp { |
| 2159 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 2160 | if (LHS.ImmValue < RHS.ImmValue) |
| 2161 | return true; |
| 2162 | if (LHS.ImmValue > RHS.ImmValue) |
| 2163 | return false; |
| 2164 | return false; |
| 2165 | } |
| 2166 | }; |
| 2167 | auto Table = ArrayRef(Index); |
| 2168 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2169 | if (Idx == Table.end() || |
| 2170 | Key.ImmValue != Idx->ImmValue) |
| 2171 | return nullptr; |
| 2172 | |
| 2173 | return &DBnXSsList[Idx->_index]; |
| 2174 | } |
| 2175 | |
| 2176 | const DBnXS *lookupDBnXSByName(StringRef Name) { |
| 2177 | struct IndexType { |
| 2178 | const char * Name; |
| 2179 | unsigned _index; |
| 2180 | }; |
| 2181 | static const struct IndexType Index[] = { |
| 2182 | { "ISHNXS" , 2 }, |
| 2183 | { "NSHNXS" , 1 }, |
| 2184 | { "OSHNXS" , 0 }, |
| 2185 | { "SYNXS" , 3 }, |
| 2186 | }; |
| 2187 | |
| 2188 | struct KeyType { |
| 2189 | std::string Name; |
| 2190 | }; |
| 2191 | KeyType Key = {Name.upper()}; |
| 2192 | struct Comp { |
| 2193 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 2194 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 2195 | if (CmpName < 0) return true; |
| 2196 | if (CmpName > 0) return false; |
| 2197 | return false; |
| 2198 | } |
| 2199 | }; |
| 2200 | auto Table = ArrayRef(Index); |
| 2201 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2202 | if (Idx == Table.end() || |
| 2203 | Key.Name != Idx->Name) |
| 2204 | return nullptr; |
| 2205 | |
| 2206 | return &DBnXSsList[Idx->_index]; |
| 2207 | } |
| 2208 | #endif |
| 2209 | |
| 2210 | #ifdef GET_DBsList_DECL |
| 2211 | const DB *lookupDBByEncoding(uint8_t Encoding); |
| 2212 | const DB *lookupDBByName(StringRef Name); |
| 2213 | #endif |
| 2214 | |
| 2215 | #ifdef GET_DBsList_IMPL |
| 2216 | constexpr DB DBsList[] = { |
| 2217 | { "oshld" , 0x1 }, // 0 |
| 2218 | { "oshst" , 0x2 }, // 1 |
| 2219 | { "osh" , 0x3 }, // 2 |
| 2220 | { "nshld" , 0x5 }, // 3 |
| 2221 | { "nshst" , 0x6 }, // 4 |
| 2222 | { "nsh" , 0x7 }, // 5 |
| 2223 | { "ishld" , 0x9 }, // 6 |
| 2224 | { "ishst" , 0xA }, // 7 |
| 2225 | { "ish" , 0xB }, // 8 |
| 2226 | { "ld" , 0xD }, // 9 |
| 2227 | { "st" , 0xE }, // 10 |
| 2228 | { "sy" , 0xF }, // 11 |
| 2229 | }; |
| 2230 | |
| 2231 | const DB *lookupDBByEncoding(uint8_t Encoding) { |
| 2232 | struct KeyType { |
| 2233 | uint8_t Encoding; |
| 2234 | }; |
| 2235 | KeyType Key = {Encoding}; |
| 2236 | struct Comp { |
| 2237 | bool operator()(const DB &LHS, const KeyType &RHS) const { |
| 2238 | if (LHS.Encoding < RHS.Encoding) |
| 2239 | return true; |
| 2240 | if (LHS.Encoding > RHS.Encoding) |
| 2241 | return false; |
| 2242 | return false; |
| 2243 | } |
| 2244 | }; |
| 2245 | auto Table = ArrayRef(DBsList); |
| 2246 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2247 | if (Idx == Table.end() || |
| 2248 | Key.Encoding != Idx->Encoding) |
| 2249 | return nullptr; |
| 2250 | |
| 2251 | return &*Idx; |
| 2252 | } |
| 2253 | |
| 2254 | const DB *lookupDBByName(StringRef Name) { |
| 2255 | struct IndexType { |
| 2256 | const char * Name; |
| 2257 | unsigned _index; |
| 2258 | }; |
| 2259 | static const struct IndexType Index[] = { |
| 2260 | { "ISH" , 8 }, |
| 2261 | { "ISHLD" , 6 }, |
| 2262 | { "ISHST" , 7 }, |
| 2263 | { "LD" , 9 }, |
| 2264 | { "NSH" , 5 }, |
| 2265 | { "NSHLD" , 3 }, |
| 2266 | { "NSHST" , 4 }, |
| 2267 | { "OSH" , 2 }, |
| 2268 | { "OSHLD" , 0 }, |
| 2269 | { "OSHST" , 1 }, |
| 2270 | { "ST" , 10 }, |
| 2271 | { "SY" , 11 }, |
| 2272 | }; |
| 2273 | |
| 2274 | struct KeyType { |
| 2275 | std::string Name; |
| 2276 | }; |
| 2277 | KeyType Key = {Name.upper()}; |
| 2278 | struct Comp { |
| 2279 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 2280 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 2281 | if (CmpName < 0) return true; |
| 2282 | if (CmpName > 0) return false; |
| 2283 | return false; |
| 2284 | } |
| 2285 | }; |
| 2286 | auto Table = ArrayRef(Index); |
| 2287 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2288 | if (Idx == Table.end() || |
| 2289 | Key.Name != Idx->Name) |
| 2290 | return nullptr; |
| 2291 | |
| 2292 | return &DBsList[Idx->_index]; |
| 2293 | } |
| 2294 | #endif |
| 2295 | |
| 2296 | #ifdef GET_DCsList_DECL |
| 2297 | const DC *lookupDCByEncoding(uint16_t Encoding); |
| 2298 | const DC *lookupDCByName(StringRef Name); |
| 2299 | #endif |
| 2300 | |
| 2301 | #ifdef GET_DCsList_IMPL |
| 2302 | constexpr DC DCsList[] = { |
| 2303 | { "IVAC" , 0x3B1, {} }, // 0 |
| 2304 | { "ISW" , 0x3B2, {} }, // 1 |
| 2305 | { "IGVAC" , 0x3B3, {AArch64::FeatureMTE} }, // 2 |
| 2306 | { "IGSW" , 0x3B4, {AArch64::FeatureMTE} }, // 3 |
| 2307 | { "IGDVAC" , 0x3B5, {AArch64::FeatureMTE} }, // 4 |
| 2308 | { "IGDSW" , 0x3B6, {AArch64::FeatureMTE} }, // 5 |
| 2309 | { "CSW" , 0x3D2, {} }, // 6 |
| 2310 | { "CGSW" , 0x3D4, {AArch64::FeatureMTE} }, // 7 |
| 2311 | { "CGDSW" , 0x3D6, {AArch64::FeatureMTE} }, // 8 |
| 2312 | { "CISW" , 0x3F2, {} }, // 9 |
| 2313 | { "CIGSW" , 0x3F4, {AArch64::FeatureMTE} }, // 10 |
| 2314 | { "CIGDSW" , 0x3F6, {AArch64::FeatureMTE} }, // 11 |
| 2315 | { "CIVAPS" , 0x3F9, {AArch64::FeaturePoPS} }, // 12 |
| 2316 | { "CIGDVAPS" , 0x3FD, {AArch64::FeaturePoPS, AArch64::FeatureMTE} }, // 13 |
| 2317 | { "ZVA" , 0x1BA1, {} }, // 14 |
| 2318 | { "GVA" , 0x1BA3, {AArch64::FeatureMTE} }, // 15 |
| 2319 | { "GZVA" , 0x1BA4, {AArch64::FeatureMTE} }, // 16 |
| 2320 | { "ZGBVA" , 0x1BA5, {AArch64::FeatureMTETC} }, // 17 |
| 2321 | { "GBVA" , 0x1BA7, {AArch64::FeatureMTETC} }, // 18 |
| 2322 | { "CVAC" , 0x1BD1, {} }, // 19 |
| 2323 | { "CGVAC" , 0x1BD3, {AArch64::FeatureMTE} }, // 20 |
| 2324 | { "CGDVAC" , 0x1BD5, {AArch64::FeatureMTE} }, // 21 |
| 2325 | { "CVAOC" , 0x1BD8, {AArch64::FeatureOCCMO} }, // 22 |
| 2326 | { "CVAU" , 0x1BD9, {} }, // 23 |
| 2327 | { "CGDVAOC" , 0x1BDF, {AArch64::FeatureOCCMO, AArch64::FeatureMTE} }, // 24 |
| 2328 | { "CVAP" , 0x1BE1, {AArch64::FeatureCCPP} }, // 25 |
| 2329 | { "CGVAP" , 0x1BE3, {AArch64::FeatureMTE} }, // 26 |
| 2330 | { "CGDVAP" , 0x1BE5, {AArch64::FeatureMTE} }, // 27 |
| 2331 | { "CVADP" , 0x1BE9, {AArch64::FeatureCacheDeepPersist} }, // 28 |
| 2332 | { "CGVADP" , 0x1BEB, {AArch64::FeatureMTE} }, // 29 |
| 2333 | { "CGDVADP" , 0x1BED, {AArch64::FeatureMTE} }, // 30 |
| 2334 | { "CIVAC" , 0x1BF1, {} }, // 31 |
| 2335 | { "CIGVAC" , 0x1BF3, {AArch64::FeatureMTE} }, // 32 |
| 2336 | { "CIGDVAC" , 0x1BF5, {AArch64::FeatureMTE} }, // 33 |
| 2337 | { "CIVAOC" , 0x1BF8, {AArch64::FeatureOCCMO} }, // 34 |
| 2338 | { "CIGDVAOC" , 0x1BFF, {AArch64::FeatureOCCMO, AArch64::FeatureMTE} }, // 35 |
| 2339 | { "CIPAE" , 0x23F0, {AArch64::FeatureMEC} }, // 36 |
| 2340 | { "CIGDPAE" , 0x23F7, {AArch64::FeatureMEC} }, // 37 |
| 2341 | { "CIPAPA" , 0x33F1, {AArch64::FeatureRME} }, // 38 |
| 2342 | { "CIGDPAPA" , 0x33F5, {AArch64::FeatureRME} }, // 39 |
| 2343 | }; |
| 2344 | |
| 2345 | const DC *lookupDCByEncoding(uint16_t Encoding) { |
| 2346 | struct KeyType { |
| 2347 | uint16_t Encoding; |
| 2348 | }; |
| 2349 | KeyType Key = {Encoding}; |
| 2350 | struct Comp { |
| 2351 | bool operator()(const DC &LHS, const KeyType &RHS) const { |
| 2352 | if (LHS.Encoding < RHS.Encoding) |
| 2353 | return true; |
| 2354 | if (LHS.Encoding > RHS.Encoding) |
| 2355 | return false; |
| 2356 | return false; |
| 2357 | } |
| 2358 | }; |
| 2359 | auto Table = ArrayRef(DCsList); |
| 2360 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2361 | if (Idx == Table.end() || |
| 2362 | Key.Encoding != Idx->Encoding) |
| 2363 | return nullptr; |
| 2364 | |
| 2365 | return &*Idx; |
| 2366 | } |
| 2367 | |
| 2368 | const DC *lookupDCByName(StringRef Name) { |
| 2369 | struct IndexType { |
| 2370 | const char * Name; |
| 2371 | unsigned _index; |
| 2372 | }; |
| 2373 | static const struct IndexType Index[] = { |
| 2374 | { "CGDSW" , 8 }, |
| 2375 | { "CGDVAC" , 21 }, |
| 2376 | { "CGDVADP" , 30 }, |
| 2377 | { "CGDVAOC" , 24 }, |
| 2378 | { "CGDVAP" , 27 }, |
| 2379 | { "CGSW" , 7 }, |
| 2380 | { "CGVAC" , 20 }, |
| 2381 | { "CGVADP" , 29 }, |
| 2382 | { "CGVAP" , 26 }, |
| 2383 | { "CIGDPAE" , 37 }, |
| 2384 | { "CIGDPAPA" , 39 }, |
| 2385 | { "CIGDSW" , 11 }, |
| 2386 | { "CIGDVAC" , 33 }, |
| 2387 | { "CIGDVAOC" , 35 }, |
| 2388 | { "CIGDVAPS" , 13 }, |
| 2389 | { "CIGSW" , 10 }, |
| 2390 | { "CIGVAC" , 32 }, |
| 2391 | { "CIPAE" , 36 }, |
| 2392 | { "CIPAPA" , 38 }, |
| 2393 | { "CISW" , 9 }, |
| 2394 | { "CIVAC" , 31 }, |
| 2395 | { "CIVAOC" , 34 }, |
| 2396 | { "CIVAPS" , 12 }, |
| 2397 | { "CSW" , 6 }, |
| 2398 | { "CVAC" , 19 }, |
| 2399 | { "CVADP" , 28 }, |
| 2400 | { "CVAOC" , 22 }, |
| 2401 | { "CVAP" , 25 }, |
| 2402 | { "CVAU" , 23 }, |
| 2403 | { "GBVA" , 18 }, |
| 2404 | { "GVA" , 15 }, |
| 2405 | { "GZVA" , 16 }, |
| 2406 | { "IGDSW" , 5 }, |
| 2407 | { "IGDVAC" , 4 }, |
| 2408 | { "IGSW" , 3 }, |
| 2409 | { "IGVAC" , 2 }, |
| 2410 | { "ISW" , 1 }, |
| 2411 | { "IVAC" , 0 }, |
| 2412 | { "ZGBVA" , 17 }, |
| 2413 | { "ZVA" , 14 }, |
| 2414 | }; |
| 2415 | |
| 2416 | struct KeyType { |
| 2417 | std::string Name; |
| 2418 | }; |
| 2419 | KeyType Key = {Name.upper()}; |
| 2420 | struct Comp { |
| 2421 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 2422 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 2423 | if (CmpName < 0) return true; |
| 2424 | if (CmpName > 0) return false; |
| 2425 | return false; |
| 2426 | } |
| 2427 | }; |
| 2428 | auto Table = ArrayRef(Index); |
| 2429 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2430 | if (Idx == Table.end() || |
| 2431 | Key.Name != Idx->Name) |
| 2432 | return nullptr; |
| 2433 | |
| 2434 | return &DCsList[Idx->_index]; |
| 2435 | } |
| 2436 | #endif |
| 2437 | |
| 2438 | #ifdef GET_ExactFPImmsList_DECL |
| 2439 | const ExactFPImm *lookupExactFPImmByEnum(uint8_t Enum); |
| 2440 | #endif |
| 2441 | |
| 2442 | #ifdef GET_ExactFPImmsList_IMPL |
| 2443 | constexpr ExactFPImm ExactFPImmsList[] = { |
| 2444 | { 0x0, "0.0" }, // 0 |
| 2445 | { 0x1, "0.5" }, // 1 |
| 2446 | { 0x2, "1.0" }, // 2 |
| 2447 | { 0x3, "2.0" }, // 3 |
| 2448 | }; |
| 2449 | |
| 2450 | const ExactFPImm *lookupExactFPImmByEnum(uint8_t Enum) { |
| 2451 | struct IndexType { |
| 2452 | uint8_t Enum; |
| 2453 | unsigned _index; |
| 2454 | }; |
| 2455 | static const struct IndexType Index[] = { |
| 2456 | { 0x0, 0 }, |
| 2457 | { 0x1, 1 }, |
| 2458 | { 0x2, 2 }, |
| 2459 | { 0x3, 3 }, |
| 2460 | }; |
| 2461 | |
| 2462 | if ((uint8_t)Enum != std::clamp((uint8_t)Enum, (uint8_t)0x0, (uint8_t)0x3)) |
| 2463 | return nullptr; |
| 2464 | |
| 2465 | auto Table = ArrayRef(Index); |
| 2466 | size_t Idx = Enum - 0x0; |
| 2467 | return &ExactFPImmsList[Table[Idx]._index]; |
| 2468 | } |
| 2469 | #endif |
| 2470 | |
| 2471 | #ifdef GET_GICRTable_DECL |
| 2472 | const GICR *lookupGICRByEncoding(uint16_t Encoding); |
| 2473 | const GICR *lookupGICRByName(StringRef Name); |
| 2474 | #endif |
| 2475 | |
| 2476 | #ifdef GET_GICRTable_IMPL |
| 2477 | constexpr GICR GICRTable[] = { |
| 2478 | { "cdia" , 0x618, true, {AArch64::FeatureGCIE} }, // 0 |
| 2479 | { "cdnmia" , 0x619, true, {AArch64::FeatureGCIE} }, // 1 |
| 2480 | }; |
| 2481 | |
| 2482 | const GICR *lookupGICRByEncoding(uint16_t Encoding) { |
| 2483 | if ((uint16_t)Encoding != std::clamp((uint16_t)Encoding, (uint16_t)0x618, (uint16_t)0x619)) |
| 2484 | return nullptr; |
| 2485 | |
| 2486 | auto Table = ArrayRef(GICRTable); |
| 2487 | size_t Idx = Encoding - 0x618; |
| 2488 | return &Table[Idx]; |
| 2489 | } |
| 2490 | |
| 2491 | const GICR *lookupGICRByName(StringRef Name) { |
| 2492 | struct IndexType { |
| 2493 | const char * Name; |
| 2494 | unsigned _index; |
| 2495 | }; |
| 2496 | static const struct IndexType Index[] = { |
| 2497 | { "CDIA" , 0 }, |
| 2498 | { "CDNMIA" , 1 }, |
| 2499 | }; |
| 2500 | |
| 2501 | struct KeyType { |
| 2502 | std::string Name; |
| 2503 | }; |
| 2504 | KeyType Key = {Name.upper()}; |
| 2505 | struct Comp { |
| 2506 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 2507 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 2508 | if (CmpName < 0) return true; |
| 2509 | if (CmpName > 0) return false; |
| 2510 | return false; |
| 2511 | } |
| 2512 | }; |
| 2513 | auto Table = ArrayRef(Index); |
| 2514 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2515 | if (Idx == Table.end() || |
| 2516 | Key.Name != Idx->Name) |
| 2517 | return nullptr; |
| 2518 | |
| 2519 | return &GICRTable[Idx->_index]; |
| 2520 | } |
| 2521 | #endif |
| 2522 | |
| 2523 | #ifdef GET_GICTable_DECL |
| 2524 | const GIC *lookupGICByEncoding(uint16_t Encoding); |
| 2525 | const GIC *lookupGICByName(StringRef Name); |
| 2526 | #endif |
| 2527 | |
| 2528 | #ifdef GET_GICTable_IMPL |
| 2529 | constexpr GIC GICTable[] = { |
| 2530 | { "cddis" , 0x608, true, {AArch64::FeatureGCIE} }, // 0 |
| 2531 | { "cden" , 0x609, true, {AArch64::FeatureGCIE} }, // 1 |
| 2532 | { "cdpri" , 0x60A, true, {AArch64::FeatureGCIE} }, // 2 |
| 2533 | { "cdaff" , 0x60B, true, {AArch64::FeatureGCIE} }, // 3 |
| 2534 | { "cdpend" , 0x60C, true, {AArch64::FeatureGCIE} }, // 4 |
| 2535 | { "cdrcfg" , 0x60D, true, {AArch64::FeatureGCIE} }, // 5 |
| 2536 | { "cdeoi" , 0x60F, false, {AArch64::FeatureGCIE} }, // 6 |
| 2537 | { "cddi" , 0x610, true, {AArch64::FeatureGCIE} }, // 7 |
| 2538 | { "cdhm" , 0x611, true, {AArch64::FeatureGCIE} }, // 8 |
| 2539 | { "vddis" , 0x2608, true, {AArch64::FeatureGCIE} }, // 9 |
| 2540 | { "vden" , 0x2609, true, {AArch64::FeatureGCIE} }, // 10 |
| 2541 | { "vdpri" , 0x260A, true, {AArch64::FeatureGCIE} }, // 11 |
| 2542 | { "vdaff" , 0x260B, true, {AArch64::FeatureGCIE} }, // 12 |
| 2543 | { "vdpend" , 0x260C, true, {AArch64::FeatureGCIE} }, // 13 |
| 2544 | { "vdrcfg" , 0x260D, true, {AArch64::FeatureGCIE} }, // 14 |
| 2545 | { "vddi" , 0x2610, true, {AArch64::FeatureGCIE} }, // 15 |
| 2546 | { "vdhm" , 0x2611, true, {AArch64::FeatureGCIE} }, // 16 |
| 2547 | { "lddis" , 0x3608, true, {AArch64::FeatureGCIE} }, // 17 |
| 2548 | { "lden" , 0x3609, true, {AArch64::FeatureGCIE} }, // 18 |
| 2549 | { "ldpri" , 0x360A, true, {AArch64::FeatureGCIE} }, // 19 |
| 2550 | { "ldaff" , 0x360B, true, {AArch64::FeatureGCIE} }, // 20 |
| 2551 | { "ldpend" , 0x360C, true, {AArch64::FeatureGCIE} }, // 21 |
| 2552 | { "ldrcfg" , 0x360D, true, {AArch64::FeatureGCIE} }, // 22 |
| 2553 | { "lddi" , 0x3610, true, {AArch64::FeatureGCIE} }, // 23 |
| 2554 | { "ldhm" , 0x3611, true, {AArch64::FeatureGCIE} }, // 24 |
| 2555 | }; |
| 2556 | |
| 2557 | const GIC *lookupGICByEncoding(uint16_t Encoding) { |
| 2558 | struct KeyType { |
| 2559 | uint16_t Encoding; |
| 2560 | }; |
| 2561 | KeyType Key = {Encoding}; |
| 2562 | struct Comp { |
| 2563 | bool operator()(const GIC &LHS, const KeyType &RHS) const { |
| 2564 | if (LHS.Encoding < RHS.Encoding) |
| 2565 | return true; |
| 2566 | if (LHS.Encoding > RHS.Encoding) |
| 2567 | return false; |
| 2568 | return false; |
| 2569 | } |
| 2570 | }; |
| 2571 | auto Table = ArrayRef(GICTable); |
| 2572 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2573 | if (Idx == Table.end() || |
| 2574 | Key.Encoding != Idx->Encoding) |
| 2575 | return nullptr; |
| 2576 | |
| 2577 | return &*Idx; |
| 2578 | } |
| 2579 | |
| 2580 | const GIC *lookupGICByName(StringRef Name) { |
| 2581 | struct IndexType { |
| 2582 | const char * Name; |
| 2583 | unsigned _index; |
| 2584 | }; |
| 2585 | static const struct IndexType Index[] = { |
| 2586 | { "CDAFF" , 3 }, |
| 2587 | { "CDDI" , 7 }, |
| 2588 | { "CDDIS" , 0 }, |
| 2589 | { "CDEN" , 1 }, |
| 2590 | { "CDEOI" , 6 }, |
| 2591 | { "CDHM" , 8 }, |
| 2592 | { "CDPEND" , 4 }, |
| 2593 | { "CDPRI" , 2 }, |
| 2594 | { "CDRCFG" , 5 }, |
| 2595 | { "LDAFF" , 20 }, |
| 2596 | { "LDDI" , 23 }, |
| 2597 | { "LDDIS" , 17 }, |
| 2598 | { "LDEN" , 18 }, |
| 2599 | { "LDHM" , 24 }, |
| 2600 | { "LDPEND" , 21 }, |
| 2601 | { "LDPRI" , 19 }, |
| 2602 | { "LDRCFG" , 22 }, |
| 2603 | { "VDAFF" , 12 }, |
| 2604 | { "VDDI" , 15 }, |
| 2605 | { "VDDIS" , 9 }, |
| 2606 | { "VDEN" , 10 }, |
| 2607 | { "VDHM" , 16 }, |
| 2608 | { "VDPEND" , 13 }, |
| 2609 | { "VDPRI" , 11 }, |
| 2610 | { "VDRCFG" , 14 }, |
| 2611 | }; |
| 2612 | |
| 2613 | struct KeyType { |
| 2614 | std::string Name; |
| 2615 | }; |
| 2616 | KeyType Key = {Name.upper()}; |
| 2617 | struct Comp { |
| 2618 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 2619 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 2620 | if (CmpName < 0) return true; |
| 2621 | if (CmpName > 0) return false; |
| 2622 | return false; |
| 2623 | } |
| 2624 | }; |
| 2625 | auto Table = ArrayRef(Index); |
| 2626 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2627 | if (Idx == Table.end() || |
| 2628 | Key.Name != Idx->Name) |
| 2629 | return nullptr; |
| 2630 | |
| 2631 | return &GICTable[Idx->_index]; |
| 2632 | } |
| 2633 | #endif |
| 2634 | |
| 2635 | #ifdef GET_GSBTable_DECL |
| 2636 | const GSB *lookupGSBByEncoding(uint16_t Encoding); |
| 2637 | const GSB *lookupGSBByName(StringRef Name); |
| 2638 | #endif |
| 2639 | |
| 2640 | #ifdef GET_GSBTable_IMPL |
| 2641 | constexpr GSB GSBTable[] = { |
| 2642 | { "sys" , 0x600, {AArch64::FeatureGCIE} }, // 0 |
| 2643 | { "ack" , 0x601, {AArch64::FeatureGCIE} }, // 1 |
| 2644 | }; |
| 2645 | |
| 2646 | const GSB *lookupGSBByEncoding(uint16_t Encoding) { |
| 2647 | if ((uint16_t)Encoding != std::clamp((uint16_t)Encoding, (uint16_t)0x600, (uint16_t)0x601)) |
| 2648 | return nullptr; |
| 2649 | |
| 2650 | auto Table = ArrayRef(GSBTable); |
| 2651 | size_t Idx = Encoding - 0x600; |
| 2652 | return &Table[Idx]; |
| 2653 | } |
| 2654 | |
| 2655 | const GSB *lookupGSBByName(StringRef Name) { |
| 2656 | struct IndexType { |
| 2657 | const char * Name; |
| 2658 | unsigned _index; |
| 2659 | }; |
| 2660 | static const struct IndexType Index[] = { |
| 2661 | { "ACK" , 1 }, |
| 2662 | { "SYS" , 0 }, |
| 2663 | }; |
| 2664 | |
| 2665 | struct KeyType { |
| 2666 | std::string Name; |
| 2667 | }; |
| 2668 | KeyType Key = {Name.upper()}; |
| 2669 | struct Comp { |
| 2670 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 2671 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 2672 | if (CmpName < 0) return true; |
| 2673 | if (CmpName > 0) return false; |
| 2674 | return false; |
| 2675 | } |
| 2676 | }; |
| 2677 | auto Table = ArrayRef(Index); |
| 2678 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2679 | if (Idx == Table.end() || |
| 2680 | Key.Name != Idx->Name) |
| 2681 | return nullptr; |
| 2682 | |
| 2683 | return &GSBTable[Idx->_index]; |
| 2684 | } |
| 2685 | #endif |
| 2686 | |
| 2687 | #ifdef GET_ICsList_DECL |
| 2688 | const IC *lookupICByEncoding(uint16_t Encoding); |
| 2689 | const IC *lookupICByName(StringRef Name); |
| 2690 | #endif |
| 2691 | |
| 2692 | #ifdef GET_ICsList_IMPL |
| 2693 | constexpr IC ICsList[] = { |
| 2694 | { "IALLUIS" , 0x388, false }, // 0 |
| 2695 | { "IALLU" , 0x3A8, false }, // 1 |
| 2696 | { "IVAU" , 0x1BA9, true }, // 2 |
| 2697 | }; |
| 2698 | |
| 2699 | const IC *lookupICByEncoding(uint16_t Encoding) { |
| 2700 | struct KeyType { |
| 2701 | uint16_t Encoding; |
| 2702 | }; |
| 2703 | KeyType Key = {Encoding}; |
| 2704 | struct Comp { |
| 2705 | bool operator()(const IC &LHS, const KeyType &RHS) const { |
| 2706 | if (LHS.Encoding < RHS.Encoding) |
| 2707 | return true; |
| 2708 | if (LHS.Encoding > RHS.Encoding) |
| 2709 | return false; |
| 2710 | return false; |
| 2711 | } |
| 2712 | }; |
| 2713 | auto Table = ArrayRef(ICsList); |
| 2714 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2715 | if (Idx == Table.end() || |
| 2716 | Key.Encoding != Idx->Encoding) |
| 2717 | return nullptr; |
| 2718 | |
| 2719 | return &*Idx; |
| 2720 | } |
| 2721 | |
| 2722 | const IC *lookupICByName(StringRef Name) { |
| 2723 | struct IndexType { |
| 2724 | const char * Name; |
| 2725 | unsigned _index; |
| 2726 | }; |
| 2727 | static const struct IndexType Index[] = { |
| 2728 | { "IALLU" , 1 }, |
| 2729 | { "IALLUIS" , 0 }, |
| 2730 | { "IVAU" , 2 }, |
| 2731 | }; |
| 2732 | |
| 2733 | struct KeyType { |
| 2734 | std::string Name; |
| 2735 | }; |
| 2736 | KeyType Key = {Name.upper()}; |
| 2737 | struct Comp { |
| 2738 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 2739 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 2740 | if (CmpName < 0) return true; |
| 2741 | if (CmpName > 0) return false; |
| 2742 | return false; |
| 2743 | } |
| 2744 | }; |
| 2745 | auto Table = ArrayRef(Index); |
| 2746 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2747 | if (Idx == Table.end() || |
| 2748 | Key.Name != Idx->Name) |
| 2749 | return nullptr; |
| 2750 | |
| 2751 | return &ICsList[Idx->_index]; |
| 2752 | } |
| 2753 | #endif |
| 2754 | |
| 2755 | #ifdef GET_ISBsList_DECL |
| 2756 | const ISB *lookupISBByEncoding(uint8_t Encoding); |
| 2757 | const ISB *lookupISBByName(StringRef Name); |
| 2758 | #endif |
| 2759 | |
| 2760 | #ifdef GET_ISBsList_IMPL |
| 2761 | constexpr ISB ISBsList[] = { |
| 2762 | { "sy" , 0xF }, // 0 |
| 2763 | }; |
| 2764 | |
| 2765 | const ISB *lookupISBByEncoding(uint8_t Encoding) { |
| 2766 | if ((uint8_t)Encoding != std::clamp((uint8_t)Encoding, (uint8_t)0xF, (uint8_t)0xF)) |
| 2767 | return nullptr; |
| 2768 | |
| 2769 | auto Table = ArrayRef(ISBsList); |
| 2770 | size_t Idx = Encoding - 0xF; |
| 2771 | return &Table[Idx]; |
| 2772 | } |
| 2773 | |
| 2774 | const ISB *lookupISBByName(StringRef Name) { |
| 2775 | struct IndexType { |
| 2776 | const char * Name; |
| 2777 | unsigned _index; |
| 2778 | }; |
| 2779 | static const struct IndexType Index[] = { |
| 2780 | { "SY" , 0 }, |
| 2781 | }; |
| 2782 | |
| 2783 | struct KeyType { |
| 2784 | std::string Name; |
| 2785 | }; |
| 2786 | KeyType Key = {Name.upper()}; |
| 2787 | struct Comp { |
| 2788 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 2789 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 2790 | if (CmpName < 0) return true; |
| 2791 | if (CmpName > 0) return false; |
| 2792 | return false; |
| 2793 | } |
| 2794 | }; |
| 2795 | auto Table = ArrayRef(Index); |
| 2796 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2797 | if (Idx == Table.end() || |
| 2798 | Key.Name != Idx->Name) |
| 2799 | return nullptr; |
| 2800 | |
| 2801 | return &ISBsList[Idx->_index]; |
| 2802 | } |
| 2803 | #endif |
| 2804 | |
| 2805 | #ifdef GET_MLBITable_DECL |
| 2806 | const MLBI *lookupMLBIByEncoding(uint16_t Encoding); |
| 2807 | const MLBI *lookupMLBIByName(StringRef Name); |
| 2808 | #endif |
| 2809 | |
| 2810 | #ifdef GET_MLBITable_IMPL |
| 2811 | constexpr MLBI MLBITable[] = { |
| 2812 | { "ALLE1" , 0x2384, false, {AArch64::FeatureMPAMv2} }, // 0 |
| 2813 | { "VMALLE1" , 0x2385, false, {AArch64::FeatureMPAMv2} }, // 1 |
| 2814 | { "VPIDE1" , 0x2386, true, {AArch64::FeatureMPAMv2} }, // 2 |
| 2815 | { "VPMGE1" , 0x2387, true, {AArch64::FeatureMPAMv2} }, // 3 |
| 2816 | }; |
| 2817 | |
| 2818 | const MLBI *lookupMLBIByEncoding(uint16_t Encoding) { |
| 2819 | if ((uint16_t)Encoding != std::clamp((uint16_t)Encoding, (uint16_t)0x2384, (uint16_t)0x2387)) |
| 2820 | return nullptr; |
| 2821 | |
| 2822 | auto Table = ArrayRef(MLBITable); |
| 2823 | size_t Idx = Encoding - 0x2384; |
| 2824 | return &Table[Idx]; |
| 2825 | } |
| 2826 | |
| 2827 | const MLBI *lookupMLBIByName(StringRef Name) { |
| 2828 | struct IndexType { |
| 2829 | const char * Name; |
| 2830 | unsigned _index; |
| 2831 | }; |
| 2832 | static const struct IndexType Index[] = { |
| 2833 | { "ALLE1" , 0 }, |
| 2834 | { "VMALLE1" , 1 }, |
| 2835 | { "VPIDE1" , 2 }, |
| 2836 | { "VPMGE1" , 3 }, |
| 2837 | }; |
| 2838 | |
| 2839 | struct KeyType { |
| 2840 | std::string Name; |
| 2841 | }; |
| 2842 | KeyType Key = {Name.upper()}; |
| 2843 | struct Comp { |
| 2844 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 2845 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 2846 | if (CmpName < 0) return true; |
| 2847 | if (CmpName > 0) return false; |
| 2848 | return false; |
| 2849 | } |
| 2850 | }; |
| 2851 | auto Table = ArrayRef(Index); |
| 2852 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2853 | if (Idx == Table.end() || |
| 2854 | Key.Name != Idx->Name) |
| 2855 | return nullptr; |
| 2856 | |
| 2857 | return &MLBITable[Idx->_index]; |
| 2858 | } |
| 2859 | #endif |
| 2860 | |
| 2861 | #ifdef GET_PHintsList_DECL |
| 2862 | const PHint *lookupPHintByEncoding(uint16_t Encoding); |
| 2863 | const PHint *lookupPHintByName(StringRef Name); |
| 2864 | #endif |
| 2865 | |
| 2866 | #ifdef GET_PHintsList_IMPL |
| 2867 | constexpr PHint PHintsList[] = { |
| 2868 | { "keep" , 0x0, {AArch64::FeaturePCDPHINT} }, // 0 |
| 2869 | { "strm" , 0x1, {AArch64::FeaturePCDPHINT} }, // 1 |
| 2870 | }; |
| 2871 | |
| 2872 | const PHint *lookupPHintByEncoding(uint16_t Encoding) { |
| 2873 | if ((uint16_t)Encoding != std::clamp((uint16_t)Encoding, (uint16_t)0x0, (uint16_t)0x1)) |
| 2874 | return nullptr; |
| 2875 | |
| 2876 | auto Table = ArrayRef(PHintsList); |
| 2877 | size_t Idx = Encoding - 0x0; |
| 2878 | return &Table[Idx]; |
| 2879 | } |
| 2880 | |
| 2881 | const PHint *lookupPHintByName(StringRef Name) { |
| 2882 | struct IndexType { |
| 2883 | const char * Name; |
| 2884 | unsigned _index; |
| 2885 | }; |
| 2886 | static const struct IndexType Index[] = { |
| 2887 | { "KEEP" , 0 }, |
| 2888 | { "STRM" , 1 }, |
| 2889 | }; |
| 2890 | |
| 2891 | struct KeyType { |
| 2892 | std::string Name; |
| 2893 | }; |
| 2894 | KeyType Key = {Name.upper()}; |
| 2895 | struct Comp { |
| 2896 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 2897 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 2898 | if (CmpName < 0) return true; |
| 2899 | if (CmpName > 0) return false; |
| 2900 | return false; |
| 2901 | } |
| 2902 | }; |
| 2903 | auto Table = ArrayRef(Index); |
| 2904 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2905 | if (Idx == Table.end() || |
| 2906 | Key.Name != Idx->Name) |
| 2907 | return nullptr; |
| 2908 | |
| 2909 | return &PHintsList[Idx->_index]; |
| 2910 | } |
| 2911 | #endif |
| 2912 | |
| 2913 | #ifdef GET_PLBITable_DECL |
| 2914 | const PLBI *lookupPLBIByEncoding(uint16_t Encoding); |
| 2915 | const PLBI *lookupPLBIByName(StringRef Name); |
| 2916 | #endif |
| 2917 | |
| 2918 | #ifdef GET_PLBITable_IMPL |
| 2919 | constexpr PLBI PLBITable[] = { |
| 2920 | { "VMALLE1OS" , 0x508, false, true, {AArch64::FeatureS1POE2} }, // 0 |
| 2921 | { "PERME1OS" , 0x509, true, false, {AArch64::FeatureS1POE2} }, // 1 |
| 2922 | { "ASIDE1OS" , 0x50A, true, false, {AArch64::FeatureS1POE2} }, // 2 |
| 2923 | { "PERMAE1OS" , 0x50B, true, false, {AArch64::FeatureS1POE2} }, // 3 |
| 2924 | { "VMALLE1IS" , 0x518, false, true, {AArch64::FeatureS1POE2} }, // 4 |
| 2925 | { "PERME1IS" , 0x519, true, false, {AArch64::FeatureS1POE2} }, // 5 |
| 2926 | { "ASIDE1IS" , 0x51A, true, false, {AArch64::FeatureS1POE2} }, // 6 |
| 2927 | { "PERMAE1IS" , 0x51B, true, false, {AArch64::FeatureS1POE2} }, // 7 |
| 2928 | { "VMALLE1" , 0x538, false, false, {AArch64::FeatureS1POE2} }, // 8 |
| 2929 | { "PERME1" , 0x539, true, false, {AArch64::FeatureS1POE2} }, // 9 |
| 2930 | { "ASIDE1" , 0x53A, true, false, {AArch64::FeatureS1POE2} }, // 10 |
| 2931 | { "PERMAE1" , 0x53B, true, false, {AArch64::FeatureS1POE2} }, // 11 |
| 2932 | { "VMALLE1OSNXS" , 0x548, false, true, {AArch64::FeatureS1POE2} }, // 12 |
| 2933 | { "PERME1OSNXS" , 0x549, true, false, {AArch64::FeatureS1POE2} }, // 13 |
| 2934 | { "ASIDE1OSNXS" , 0x54A, true, false, {AArch64::FeatureS1POE2} }, // 14 |
| 2935 | { "PERMAE1OSNXS" , 0x54B, true, false, {AArch64::FeatureS1POE2} }, // 15 |
| 2936 | { "VMALLE1ISNXS" , 0x558, false, true, {AArch64::FeatureS1POE2} }, // 16 |
| 2937 | { "PERME1ISNXS" , 0x559, true, false, {AArch64::FeatureS1POE2} }, // 17 |
| 2938 | { "ASIDE1ISNXS" , 0x55A, true, false, {AArch64::FeatureS1POE2} }, // 18 |
| 2939 | { "PERMAE1ISNXS" , 0x55B, true, false, {AArch64::FeatureS1POE2} }, // 19 |
| 2940 | { "VMALLE1NXS" , 0x578, false, false, {AArch64::FeatureS1POE2} }, // 20 |
| 2941 | { "PERME1NXS" , 0x579, true, false, {AArch64::FeatureS1POE2} }, // 21 |
| 2942 | { "ASIDE1NXS" , 0x57A, true, false, {AArch64::FeatureS1POE2} }, // 22 |
| 2943 | { "PERMAE1NXS" , 0x57B, true, false, {AArch64::FeatureS1POE2} }, // 23 |
| 2944 | { "ALLE2OS" , 0x2508, false, true, {AArch64::FeatureS1POE2} }, // 24 |
| 2945 | { "PERME2OS" , 0x2509, true, false, {AArch64::FeatureS1POE2} }, // 25 |
| 2946 | { "ALLE1OS" , 0x250C, false, true, {AArch64::FeatureS1POE2} }, // 26 |
| 2947 | { "ALLE2IS" , 0x2518, false, true, {AArch64::FeatureS1POE2} }, // 27 |
| 2948 | { "PERME2IS" , 0x2519, true, false, {AArch64::FeatureS1POE2} }, // 28 |
| 2949 | { "ALLE1IS" , 0x251C, false, true, {AArch64::FeatureS1POE2} }, // 29 |
| 2950 | { "ALLE2" , 0x2538, false, false, {AArch64::FeatureS1POE2} }, // 30 |
| 2951 | { "PERME2" , 0x2539, true, false, {AArch64::FeatureS1POE2} }, // 31 |
| 2952 | { "ALLE1" , 0x253C, false, false, {AArch64::FeatureS1POE2} }, // 32 |
| 2953 | { "ALLE2OSNXS" , 0x2548, false, true, {AArch64::FeatureS1POE2} }, // 33 |
| 2954 | { "PERME2OSNXS" , 0x2549, true, false, {AArch64::FeatureS1POE2} }, // 34 |
| 2955 | { "ALLE1OSNXS" , 0x254C, false, true, {AArch64::FeatureS1POE2} }, // 35 |
| 2956 | { "ALLE2ISNXS" , 0x2558, false, true, {AArch64::FeatureS1POE2} }, // 36 |
| 2957 | { "PERME2ISNXS" , 0x2559, true, false, {AArch64::FeatureS1POE2} }, // 37 |
| 2958 | { "ALLE1ISNXS" , 0x255C, false, true, {AArch64::FeatureS1POE2} }, // 38 |
| 2959 | { "ALLE2NXS" , 0x2578, false, false, {AArch64::FeatureS1POE2} }, // 39 |
| 2960 | { "PERME2NXS" , 0x2579, true, false, {AArch64::FeatureS1POE2} }, // 40 |
| 2961 | { "ALLE1NXS" , 0x257C, false, false, {AArch64::FeatureS1POE2} }, // 41 |
| 2962 | { "ALLE3OS" , 0x3508, false, false, {AArch64::FeatureS1POE2} }, // 42 |
| 2963 | { "PERME3OS" , 0x3509, true, false, {AArch64::FeatureS1POE2} }, // 43 |
| 2964 | { "ALLE3IS" , 0x3518, false, false, {AArch64::FeatureS1POE2} }, // 44 |
| 2965 | { "PERME3IS" , 0x3519, true, false, {AArch64::FeatureS1POE2} }, // 45 |
| 2966 | { "ALLE3" , 0x3538, false, false, {AArch64::FeatureS1POE2} }, // 46 |
| 2967 | { "PERME3" , 0x3539, true, false, {AArch64::FeatureS1POE2} }, // 47 |
| 2968 | { "ALLE3OSNXS" , 0x3548, false, false, {AArch64::FeatureS1POE2} }, // 48 |
| 2969 | { "PERME3OSNXS" , 0x3549, true, false, {AArch64::FeatureS1POE2} }, // 49 |
| 2970 | { "ALLE3ISNXS" , 0x3558, false, false, {AArch64::FeatureS1POE2} }, // 50 |
| 2971 | { "PERME3ISNXS" , 0x3559, true, false, {AArch64::FeatureS1POE2} }, // 51 |
| 2972 | { "ALLE3NXS" , 0x3578, false, false, {AArch64::FeatureS1POE2} }, // 52 |
| 2973 | { "PERME3NXS" , 0x3579, true, false, {AArch64::FeatureS1POE2} }, // 53 |
| 2974 | }; |
| 2975 | |
| 2976 | const PLBI *lookupPLBIByEncoding(uint16_t Encoding) { |
| 2977 | struct KeyType { |
| 2978 | uint16_t Encoding; |
| 2979 | }; |
| 2980 | KeyType Key = {Encoding}; |
| 2981 | struct Comp { |
| 2982 | bool operator()(const PLBI &LHS, const KeyType &RHS) const { |
| 2983 | if (LHS.Encoding < RHS.Encoding) |
| 2984 | return true; |
| 2985 | if (LHS.Encoding > RHS.Encoding) |
| 2986 | return false; |
| 2987 | return false; |
| 2988 | } |
| 2989 | }; |
| 2990 | auto Table = ArrayRef(PLBITable); |
| 2991 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 2992 | if (Idx == Table.end() || |
| 2993 | Key.Encoding != Idx->Encoding) |
| 2994 | return nullptr; |
| 2995 | |
| 2996 | return &*Idx; |
| 2997 | } |
| 2998 | |
| 2999 | const PLBI *lookupPLBIByName(StringRef Name) { |
| 3000 | struct IndexType { |
| 3001 | const char * Name; |
| 3002 | unsigned _index; |
| 3003 | }; |
| 3004 | static const struct IndexType Index[] = { |
| 3005 | { "ALLE1" , 32 }, |
| 3006 | { "ALLE1IS" , 29 }, |
| 3007 | { "ALLE1ISNXS" , 38 }, |
| 3008 | { "ALLE1NXS" , 41 }, |
| 3009 | { "ALLE1OS" , 26 }, |
| 3010 | { "ALLE1OSNXS" , 35 }, |
| 3011 | { "ALLE2" , 30 }, |
| 3012 | { "ALLE2IS" , 27 }, |
| 3013 | { "ALLE2ISNXS" , 36 }, |
| 3014 | { "ALLE2NXS" , 39 }, |
| 3015 | { "ALLE2OS" , 24 }, |
| 3016 | { "ALLE2OSNXS" , 33 }, |
| 3017 | { "ALLE3" , 46 }, |
| 3018 | { "ALLE3IS" , 44 }, |
| 3019 | { "ALLE3ISNXS" , 50 }, |
| 3020 | { "ALLE3NXS" , 52 }, |
| 3021 | { "ALLE3OS" , 42 }, |
| 3022 | { "ALLE3OSNXS" , 48 }, |
| 3023 | { "ASIDE1" , 10 }, |
| 3024 | { "ASIDE1IS" , 6 }, |
| 3025 | { "ASIDE1ISNXS" , 18 }, |
| 3026 | { "ASIDE1NXS" , 22 }, |
| 3027 | { "ASIDE1OS" , 2 }, |
| 3028 | { "ASIDE1OSNXS" , 14 }, |
| 3029 | { "PERMAE1" , 11 }, |
| 3030 | { "PERMAE1IS" , 7 }, |
| 3031 | { "PERMAE1ISNXS" , 19 }, |
| 3032 | { "PERMAE1NXS" , 23 }, |
| 3033 | { "PERMAE1OS" , 3 }, |
| 3034 | { "PERMAE1OSNXS" , 15 }, |
| 3035 | { "PERME1" , 9 }, |
| 3036 | { "PERME1IS" , 5 }, |
| 3037 | { "PERME1ISNXS" , 17 }, |
| 3038 | { "PERME1NXS" , 21 }, |
| 3039 | { "PERME1OS" , 1 }, |
| 3040 | { "PERME1OSNXS" , 13 }, |
| 3041 | { "PERME2" , 31 }, |
| 3042 | { "PERME2IS" , 28 }, |
| 3043 | { "PERME2ISNXS" , 37 }, |
| 3044 | { "PERME2NXS" , 40 }, |
| 3045 | { "PERME2OS" , 25 }, |
| 3046 | { "PERME2OSNXS" , 34 }, |
| 3047 | { "PERME3" , 47 }, |
| 3048 | { "PERME3IS" , 45 }, |
| 3049 | { "PERME3ISNXS" , 51 }, |
| 3050 | { "PERME3NXS" , 53 }, |
| 3051 | { "PERME3OS" , 43 }, |
| 3052 | { "PERME3OSNXS" , 49 }, |
| 3053 | { "VMALLE1" , 8 }, |
| 3054 | { "VMALLE1IS" , 4 }, |
| 3055 | { "VMALLE1ISNXS" , 16 }, |
| 3056 | { "VMALLE1NXS" , 20 }, |
| 3057 | { "VMALLE1OS" , 0 }, |
| 3058 | { "VMALLE1OSNXS" , 12 }, |
| 3059 | }; |
| 3060 | |
| 3061 | struct KeyType { |
| 3062 | std::string Name; |
| 3063 | }; |
| 3064 | KeyType Key = {Name.upper()}; |
| 3065 | struct Comp { |
| 3066 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 3067 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 3068 | if (CmpName < 0) return true; |
| 3069 | if (CmpName > 0) return false; |
| 3070 | return false; |
| 3071 | } |
| 3072 | }; |
| 3073 | auto Table = ArrayRef(Index); |
| 3074 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 3075 | if (Idx == Table.end() || |
| 3076 | Key.Name != Idx->Name) |
| 3077 | return nullptr; |
| 3078 | |
| 3079 | return &PLBITable[Idx->_index]; |
| 3080 | } |
| 3081 | #endif |
| 3082 | |
| 3083 | #ifdef GET_PRFMsList_DECL |
| 3084 | const PRFM *lookupPRFMByEncoding(uint8_t Encoding); |
| 3085 | const PRFM *lookupPRFMByName(StringRef Name); |
| 3086 | #endif |
| 3087 | |
| 3088 | #ifdef GET_PRFMsList_IMPL |
| 3089 | constexpr PRFM PRFMsList[] = { |
| 3090 | { "pldl1keep" , 0x0, {} }, // 0 |
| 3091 | { "pldl1strm" , 0x1, {} }, // 1 |
| 3092 | { "pldl2keep" , 0x2, {} }, // 2 |
| 3093 | { "pldl2strm" , 0x3, {} }, // 3 |
| 3094 | { "pldl3keep" , 0x4, {} }, // 4 |
| 3095 | { "pldl3strm" , 0x5, {} }, // 5 |
| 3096 | { "pldslckeep" , 0x6, {AArch64::FeaturePRFM_SLC} }, // 6 |
| 3097 | { "pldslcstrm" , 0x7, {AArch64::FeaturePRFM_SLC} }, // 7 |
| 3098 | { "plil1keep" , 0x8, {} }, // 8 |
| 3099 | { "plil1strm" , 0x9, {} }, // 9 |
| 3100 | { "plil2keep" , 0xA, {} }, // 10 |
| 3101 | { "plil2strm" , 0xB, {} }, // 11 |
| 3102 | { "plil3keep" , 0xC, {} }, // 12 |
| 3103 | { "plil3strm" , 0xD, {} }, // 13 |
| 3104 | { "plislckeep" , 0xE, {AArch64::FeaturePRFM_SLC} }, // 14 |
| 3105 | { "plislcstrm" , 0xF, {AArch64::FeaturePRFM_SLC} }, // 15 |
| 3106 | { "pstl1keep" , 0x10, {} }, // 16 |
| 3107 | { "pstl1strm" , 0x11, {} }, // 17 |
| 3108 | { "pstl2keep" , 0x12, {} }, // 18 |
| 3109 | { "pstl2strm" , 0x13, {} }, // 19 |
| 3110 | { "pstl3keep" , 0x14, {} }, // 20 |
| 3111 | { "pstl3strm" , 0x15, {} }, // 21 |
| 3112 | { "pstslckeep" , 0x16, {AArch64::FeaturePRFM_SLC} }, // 22 |
| 3113 | { "pstslcstrm" , 0x17, {AArch64::FeaturePRFM_SLC} }, // 23 |
| 3114 | }; |
| 3115 | |
| 3116 | const PRFM *lookupPRFMByEncoding(uint8_t Encoding) { |
| 3117 | if ((uint8_t)Encoding != std::clamp((uint8_t)Encoding, (uint8_t)0x0, (uint8_t)0x17)) |
| 3118 | return nullptr; |
| 3119 | |
| 3120 | auto Table = ArrayRef(PRFMsList); |
| 3121 | size_t Idx = Encoding - 0x0; |
| 3122 | return &Table[Idx]; |
| 3123 | } |
| 3124 | |
| 3125 | const PRFM *lookupPRFMByName(StringRef Name) { |
| 3126 | struct IndexType { |
| 3127 | const char * Name; |
| 3128 | unsigned _index; |
| 3129 | }; |
| 3130 | static const struct IndexType Index[] = { |
| 3131 | { "PLDL1KEEP" , 0 }, |
| 3132 | { "PLDL1STRM" , 1 }, |
| 3133 | { "PLDL2KEEP" , 2 }, |
| 3134 | { "PLDL2STRM" , 3 }, |
| 3135 | { "PLDL3KEEP" , 4 }, |
| 3136 | { "PLDL3STRM" , 5 }, |
| 3137 | { "PLDSLCKEEP" , 6 }, |
| 3138 | { "PLDSLCSTRM" , 7 }, |
| 3139 | { "PLIL1KEEP" , 8 }, |
| 3140 | { "PLIL1STRM" , 9 }, |
| 3141 | { "PLIL2KEEP" , 10 }, |
| 3142 | { "PLIL2STRM" , 11 }, |
| 3143 | { "PLIL3KEEP" , 12 }, |
| 3144 | { "PLIL3STRM" , 13 }, |
| 3145 | { "PLISLCKEEP" , 14 }, |
| 3146 | { "PLISLCSTRM" , 15 }, |
| 3147 | { "PSTL1KEEP" , 16 }, |
| 3148 | { "PSTL1STRM" , 17 }, |
| 3149 | { "PSTL2KEEP" , 18 }, |
| 3150 | { "PSTL2STRM" , 19 }, |
| 3151 | { "PSTL3KEEP" , 20 }, |
| 3152 | { "PSTL3STRM" , 21 }, |
| 3153 | { "PSTSLCKEEP" , 22 }, |
| 3154 | { "PSTSLCSTRM" , 23 }, |
| 3155 | }; |
| 3156 | |
| 3157 | struct KeyType { |
| 3158 | std::string Name; |
| 3159 | }; |
| 3160 | KeyType Key = {Name.upper()}; |
| 3161 | struct Comp { |
| 3162 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 3163 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 3164 | if (CmpName < 0) return true; |
| 3165 | if (CmpName > 0) return false; |
| 3166 | return false; |
| 3167 | } |
| 3168 | }; |
| 3169 | auto Table = ArrayRef(Index); |
| 3170 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 3171 | if (Idx == Table.end() || |
| 3172 | Key.Name != Idx->Name) |
| 3173 | return nullptr; |
| 3174 | |
| 3175 | return &PRFMsList[Idx->_index]; |
| 3176 | } |
| 3177 | #endif |
| 3178 | |
| 3179 | #ifdef GET_PSBsList_DECL |
| 3180 | const PSB *lookupPSBByEncoding(uint8_t Encoding); |
| 3181 | const PSB *lookupPSBByName(StringRef Name); |
| 3182 | #endif |
| 3183 | |
| 3184 | #ifdef GET_PSBsList_IMPL |
| 3185 | constexpr PSB PSBsList[] = { |
| 3186 | { "csync" , 0x11 }, // 0 |
| 3187 | }; |
| 3188 | |
| 3189 | const PSB *lookupPSBByEncoding(uint8_t Encoding) { |
| 3190 | if ((uint8_t)Encoding != std::clamp((uint8_t)Encoding, (uint8_t)0x11, (uint8_t)0x11)) |
| 3191 | return nullptr; |
| 3192 | |
| 3193 | auto Table = ArrayRef(PSBsList); |
| 3194 | size_t Idx = Encoding - 0x11; |
| 3195 | return &Table[Idx]; |
| 3196 | } |
| 3197 | |
| 3198 | const PSB *lookupPSBByName(StringRef Name) { |
| 3199 | struct IndexType { |
| 3200 | const char * Name; |
| 3201 | unsigned _index; |
| 3202 | }; |
| 3203 | static const struct IndexType Index[] = { |
| 3204 | { "CSYNC" , 0 }, |
| 3205 | }; |
| 3206 | |
| 3207 | struct KeyType { |
| 3208 | std::string Name; |
| 3209 | }; |
| 3210 | KeyType Key = {Name.upper()}; |
| 3211 | struct Comp { |
| 3212 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 3213 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 3214 | if (CmpName < 0) return true; |
| 3215 | if (CmpName > 0) return false; |
| 3216 | return false; |
| 3217 | } |
| 3218 | }; |
| 3219 | auto Table = ArrayRef(Index); |
| 3220 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 3221 | if (Idx == Table.end() || |
| 3222 | Key.Name != Idx->Name) |
| 3223 | return nullptr; |
| 3224 | |
| 3225 | return &PSBsList[Idx->_index]; |
| 3226 | } |
| 3227 | #endif |
| 3228 | |
| 3229 | #ifdef GET_PStateImm0_1sList_DECL |
| 3230 | const PStateImm0_1 *lookupPStateImm0_1ByEncoding(uint16_t Encoding); |
| 3231 | const PStateImm0_1 *lookupPStateImm0_1ByName(StringRef Name); |
| 3232 | #endif |
| 3233 | |
| 3234 | #ifdef GET_PStateImm0_1sList_IMPL |
| 3235 | constexpr PStateImm0_1 PStateImm0_1sList[] = { |
| 3236 | { "ALLINT" , 0x8, {AArch64::FeatureNMI} }, // 0 |
| 3237 | { "PM" , 0x48, {} }, // 1 |
| 3238 | }; |
| 3239 | |
| 3240 | const PStateImm0_1 *lookupPStateImm0_1ByEncoding(uint16_t Encoding) { |
| 3241 | struct KeyType { |
| 3242 | uint16_t Encoding; |
| 3243 | }; |
| 3244 | KeyType Key = {Encoding}; |
| 3245 | struct Comp { |
| 3246 | bool operator()(const PStateImm0_1 &LHS, const KeyType &RHS) const { |
| 3247 | if (LHS.Encoding < RHS.Encoding) |
| 3248 | return true; |
| 3249 | if (LHS.Encoding > RHS.Encoding) |
| 3250 | return false; |
| 3251 | return false; |
| 3252 | } |
| 3253 | }; |
| 3254 | auto Table = ArrayRef(PStateImm0_1sList); |
| 3255 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 3256 | if (Idx == Table.end() || |
| 3257 | Key.Encoding != Idx->Encoding) |
| 3258 | return nullptr; |
| 3259 | |
| 3260 | return &*Idx; |
| 3261 | } |
| 3262 | |
| 3263 | const PStateImm0_1 *lookupPStateImm0_1ByName(StringRef Name) { |
| 3264 | struct IndexType { |
| 3265 | const char * Name; |
| 3266 | unsigned _index; |
| 3267 | }; |
| 3268 | static const struct IndexType Index[] = { |
| 3269 | { "ALLINT" , 0 }, |
| 3270 | { "PM" , 1 }, |
| 3271 | }; |
| 3272 | |
| 3273 | struct KeyType { |
| 3274 | std::string Name; |
| 3275 | }; |
| 3276 | KeyType Key = {Name.upper()}; |
| 3277 | struct Comp { |
| 3278 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 3279 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 3280 | if (CmpName < 0) return true; |
| 3281 | if (CmpName > 0) return false; |
| 3282 | return false; |
| 3283 | } |
| 3284 | }; |
| 3285 | auto Table = ArrayRef(Index); |
| 3286 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 3287 | if (Idx == Table.end() || |
| 3288 | Key.Name != Idx->Name) |
| 3289 | return nullptr; |
| 3290 | |
| 3291 | return &PStateImm0_1sList[Idx->_index]; |
| 3292 | } |
| 3293 | #endif |
| 3294 | |
| 3295 | #ifdef GET_PStateImm0_15sList_DECL |
| 3296 | const PStateImm0_15 *lookupPStateImm0_15ByEncoding(uint8_t Encoding); |
| 3297 | const PStateImm0_15 *lookupPStateImm0_15ByName(StringRef Name); |
| 3298 | #endif |
| 3299 | |
| 3300 | #ifdef GET_PStateImm0_15sList_IMPL |
| 3301 | constexpr PStateImm0_15 PStateImm0_15sList[] = { |
| 3302 | { "UAO" , 0x3, {AArch64::FeaturePsUAO} }, // 0 |
| 3303 | { "PAN" , 0x4, {AArch64::FeaturePAN} }, // 1 |
| 3304 | { "SPSel" , 0x5, {} }, // 2 |
| 3305 | { "SSBS" , 0x19, {AArch64::FeatureSSBS} }, // 3 |
| 3306 | { "DIT" , 0x1A, {AArch64::FeatureDIT} }, // 4 |
| 3307 | { "TCO" , 0x1C, {AArch64::FeatureMTE} }, // 5 |
| 3308 | { "DAIFSet" , 0x1E, {} }, // 6 |
| 3309 | { "DAIFClr" , 0x1F, {} }, // 7 |
| 3310 | }; |
| 3311 | |
| 3312 | const PStateImm0_15 *lookupPStateImm0_15ByEncoding(uint8_t Encoding) { |
| 3313 | struct KeyType { |
| 3314 | uint8_t Encoding; |
| 3315 | }; |
| 3316 | KeyType Key = {Encoding}; |
| 3317 | struct Comp { |
| 3318 | bool operator()(const PStateImm0_15 &LHS, const KeyType &RHS) const { |
| 3319 | if (LHS.Encoding < RHS.Encoding) |
| 3320 | return true; |
| 3321 | if (LHS.Encoding > RHS.Encoding) |
| 3322 | return false; |
| 3323 | return false; |
| 3324 | } |
| 3325 | }; |
| 3326 | auto Table = ArrayRef(PStateImm0_15sList); |
| 3327 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 3328 | if (Idx == Table.end() || |
| 3329 | Key.Encoding != Idx->Encoding) |
| 3330 | return nullptr; |
| 3331 | |
| 3332 | return &*Idx; |
| 3333 | } |
| 3334 | |
| 3335 | const PStateImm0_15 *lookupPStateImm0_15ByName(StringRef Name) { |
| 3336 | struct IndexType { |
| 3337 | const char * Name; |
| 3338 | unsigned _index; |
| 3339 | }; |
| 3340 | static const struct IndexType Index[] = { |
| 3341 | { "DAIFCLR" , 7 }, |
| 3342 | { "DAIFSET" , 6 }, |
| 3343 | { "DIT" , 4 }, |
| 3344 | { "PAN" , 1 }, |
| 3345 | { "SPSEL" , 2 }, |
| 3346 | { "SSBS" , 3 }, |
| 3347 | { "TCO" , 5 }, |
| 3348 | { "UAO" , 0 }, |
| 3349 | }; |
| 3350 | |
| 3351 | struct KeyType { |
| 3352 | std::string Name; |
| 3353 | }; |
| 3354 | KeyType Key = {Name.upper()}; |
| 3355 | struct Comp { |
| 3356 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 3357 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 3358 | if (CmpName < 0) return true; |
| 3359 | if (CmpName > 0) return false; |
| 3360 | return false; |
| 3361 | } |
| 3362 | }; |
| 3363 | auto Table = ArrayRef(Index); |
| 3364 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 3365 | if (Idx == Table.end() || |
| 3366 | Key.Name != Idx->Name) |
| 3367 | return nullptr; |
| 3368 | |
| 3369 | return &PStateImm0_15sList[Idx->_index]; |
| 3370 | } |
| 3371 | #endif |
| 3372 | |
| 3373 | #ifdef GET_RPRFMsList_DECL |
| 3374 | const RPRFM *lookupRPRFMByEncoding(uint8_t Encoding); |
| 3375 | const RPRFM *lookupRPRFMByName(StringRef Name); |
| 3376 | #endif |
| 3377 | |
| 3378 | #ifdef GET_RPRFMsList_IMPL |
| 3379 | constexpr RPRFM RPRFMsList[] = { |
| 3380 | { "pldkeep" , 0x0, {} }, // 0 |
| 3381 | { "pldstrm" , 0x4, {} }, // 1 |
| 3382 | { "pstkeep" , 0x1, {} }, // 2 |
| 3383 | { "pststrm" , 0x5, {} }, // 3 |
| 3384 | }; |
| 3385 | |
| 3386 | const RPRFM *lookupRPRFMByEncoding(uint8_t Encoding) { |
| 3387 | struct IndexType { |
| 3388 | uint8_t Encoding; |
| 3389 | unsigned _index; |
| 3390 | }; |
| 3391 | static const struct IndexType Index[] = { |
| 3392 | { 0x0, 0 }, |
| 3393 | { 0x1, 2 }, |
| 3394 | { 0x4, 1 }, |
| 3395 | { 0x5, 3 }, |
| 3396 | }; |
| 3397 | |
| 3398 | struct KeyType { |
| 3399 | uint8_t Encoding; |
| 3400 | }; |
| 3401 | KeyType Key = {Encoding}; |
| 3402 | struct Comp { |
| 3403 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 3404 | if (LHS.Encoding < RHS.Encoding) |
| 3405 | return true; |
| 3406 | if (LHS.Encoding > RHS.Encoding) |
| 3407 | return false; |
| 3408 | return false; |
| 3409 | } |
| 3410 | }; |
| 3411 | auto Table = ArrayRef(Index); |
| 3412 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 3413 | if (Idx == Table.end() || |
| 3414 | Key.Encoding != Idx->Encoding) |
| 3415 | return nullptr; |
| 3416 | |
| 3417 | return &RPRFMsList[Idx->_index]; |
| 3418 | } |
| 3419 | |
| 3420 | const RPRFM *lookupRPRFMByName(StringRef Name) { |
| 3421 | struct IndexType { |
| 3422 | const char * Name; |
| 3423 | unsigned _index; |
| 3424 | }; |
| 3425 | static const struct IndexType Index[] = { |
| 3426 | { "PLDKEEP" , 0 }, |
| 3427 | { "PLDSTRM" , 1 }, |
| 3428 | { "PSTKEEP" , 2 }, |
| 3429 | { "PSTSTRM" , 3 }, |
| 3430 | }; |
| 3431 | |
| 3432 | struct KeyType { |
| 3433 | std::string Name; |
| 3434 | }; |
| 3435 | KeyType Key = {Name.upper()}; |
| 3436 | struct Comp { |
| 3437 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 3438 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 3439 | if (CmpName < 0) return true; |
| 3440 | if (CmpName > 0) return false; |
| 3441 | return false; |
| 3442 | } |
| 3443 | }; |
| 3444 | auto Table = ArrayRef(Index); |
| 3445 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 3446 | if (Idx == Table.end() || |
| 3447 | Key.Name != Idx->Name) |
| 3448 | return nullptr; |
| 3449 | |
| 3450 | return &RPRFMsList[Idx->_index]; |
| 3451 | } |
| 3452 | #endif |
| 3453 | |
| 3454 | #ifdef GET_SVCRsList_DECL |
| 3455 | const SVCR *lookupSVCRByEncoding(uint8_t Encoding); |
| 3456 | const SVCR *lookupSVCRByName(StringRef Name); |
| 3457 | #endif |
| 3458 | |
| 3459 | #ifdef GET_SVCRsList_IMPL |
| 3460 | constexpr SVCR SVCRsList[] = { |
| 3461 | { "SVCRSM" , 0x1, {AArch64::FeatureSME} }, // 0 |
| 3462 | { "SVCRZA" , 0x2, {AArch64::FeatureSME} }, // 1 |
| 3463 | { "SVCRSMZA" , 0x3, {AArch64::FeatureSME} }, // 2 |
| 3464 | }; |
| 3465 | |
| 3466 | const SVCR *lookupSVCRByEncoding(uint8_t Encoding) { |
| 3467 | if ((uint8_t)Encoding != std::clamp((uint8_t)Encoding, (uint8_t)0x1, (uint8_t)0x3)) |
| 3468 | return nullptr; |
| 3469 | |
| 3470 | auto Table = ArrayRef(SVCRsList); |
| 3471 | size_t Idx = Encoding - 0x1; |
| 3472 | return &Table[Idx]; |
| 3473 | } |
| 3474 | |
| 3475 | const SVCR *lookupSVCRByName(StringRef Name) { |
| 3476 | struct IndexType { |
| 3477 | const char * Name; |
| 3478 | unsigned _index; |
| 3479 | }; |
| 3480 | static const struct IndexType Index[] = { |
| 3481 | { "SVCRSM" , 0 }, |
| 3482 | { "SVCRSMZA" , 2 }, |
| 3483 | { "SVCRZA" , 1 }, |
| 3484 | }; |
| 3485 | |
| 3486 | struct KeyType { |
| 3487 | std::string Name; |
| 3488 | }; |
| 3489 | KeyType Key = {Name.upper()}; |
| 3490 | struct Comp { |
| 3491 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 3492 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 3493 | if (CmpName < 0) return true; |
| 3494 | if (CmpName > 0) return false; |
| 3495 | return false; |
| 3496 | } |
| 3497 | }; |
| 3498 | auto Table = ArrayRef(Index); |
| 3499 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 3500 | if (Idx == Table.end() || |
| 3501 | Key.Name != Idx->Name) |
| 3502 | return nullptr; |
| 3503 | |
| 3504 | return &SVCRsList[Idx->_index]; |
| 3505 | } |
| 3506 | #endif |
| 3507 | |
| 3508 | #ifdef GET_SVEPREDPATsList_DECL |
| 3509 | const SVEPREDPAT *lookupSVEPREDPATByEncoding(uint8_t Encoding); |
| 3510 | const SVEPREDPAT *lookupSVEPREDPATByName(StringRef Name); |
| 3511 | #endif |
| 3512 | |
| 3513 | #ifdef GET_SVEPREDPATsList_IMPL |
| 3514 | constexpr SVEPREDPAT SVEPREDPATsList[] = { |
| 3515 | { "pow2" , 0x0 }, // 0 |
| 3516 | { "vl1" , 0x1 }, // 1 |
| 3517 | { "vl2" , 0x2 }, // 2 |
| 3518 | { "vl3" , 0x3 }, // 3 |
| 3519 | { "vl4" , 0x4 }, // 4 |
| 3520 | { "vl5" , 0x5 }, // 5 |
| 3521 | { "vl6" , 0x6 }, // 6 |
| 3522 | { "vl7" , 0x7 }, // 7 |
| 3523 | { "vl8" , 0x8 }, // 8 |
| 3524 | { "vl16" , 0x9 }, // 9 |
| 3525 | { "vl32" , 0xA }, // 10 |
| 3526 | { "vl64" , 0xB }, // 11 |
| 3527 | { "vl128" , 0xC }, // 12 |
| 3528 | { "vl256" , 0xD }, // 13 |
| 3529 | { "mul4" , 0x1D }, // 14 |
| 3530 | { "mul3" , 0x1E }, // 15 |
| 3531 | { "all" , 0x1F }, // 16 |
| 3532 | }; |
| 3533 | |
| 3534 | const SVEPREDPAT *lookupSVEPREDPATByEncoding(uint8_t Encoding) { |
| 3535 | struct KeyType { |
| 3536 | uint8_t Encoding; |
| 3537 | }; |
| 3538 | KeyType Key = {Encoding}; |
| 3539 | struct Comp { |
| 3540 | bool operator()(const SVEPREDPAT &LHS, const KeyType &RHS) const { |
| 3541 | if (LHS.Encoding < RHS.Encoding) |
| 3542 | return true; |
| 3543 | if (LHS.Encoding > RHS.Encoding) |
| 3544 | return false; |
| 3545 | return false; |
| 3546 | } |
| 3547 | }; |
| 3548 | auto Table = ArrayRef(SVEPREDPATsList); |
| 3549 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 3550 | if (Idx == Table.end() || |
| 3551 | Key.Encoding != Idx->Encoding) |
| 3552 | return nullptr; |
| 3553 | |
| 3554 | return &*Idx; |
| 3555 | } |
| 3556 | |
| 3557 | const SVEPREDPAT *lookupSVEPREDPATByName(StringRef Name) { |
| 3558 | struct IndexType { |
| 3559 | const char * Name; |
| 3560 | unsigned _index; |
| 3561 | }; |
| 3562 | static const struct IndexType Index[] = { |
| 3563 | { "ALL" , 16 }, |
| 3564 | { "MUL3" , 15 }, |
| 3565 | { "MUL4" , 14 }, |
| 3566 | { "POW2" , 0 }, |
| 3567 | { "VL1" , 1 }, |
| 3568 | { "VL128" , 12 }, |
| 3569 | { "VL16" , 9 }, |
| 3570 | { "VL2" , 2 }, |
| 3571 | { "VL256" , 13 }, |
| 3572 | { "VL3" , 3 }, |
| 3573 | { "VL32" , 10 }, |
| 3574 | { "VL4" , 4 }, |
| 3575 | { "VL5" , 5 }, |
| 3576 | { "VL6" , 6 }, |
| 3577 | { "VL64" , 11 }, |
| 3578 | { "VL7" , 7 }, |
| 3579 | { "VL8" , 8 }, |
| 3580 | }; |
| 3581 | |
| 3582 | struct KeyType { |
| 3583 | std::string Name; |
| 3584 | }; |
| 3585 | KeyType Key = {Name.upper()}; |
| 3586 | struct Comp { |
| 3587 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 3588 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 3589 | if (CmpName < 0) return true; |
| 3590 | if (CmpName > 0) return false; |
| 3591 | return false; |
| 3592 | } |
| 3593 | }; |
| 3594 | auto Table = ArrayRef(Index); |
| 3595 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 3596 | if (Idx == Table.end() || |
| 3597 | Key.Name != Idx->Name) |
| 3598 | return nullptr; |
| 3599 | |
| 3600 | return &SVEPREDPATsList[Idx->_index]; |
| 3601 | } |
| 3602 | #endif |
| 3603 | |
| 3604 | #ifdef GET_SVEPRFMsList_DECL |
| 3605 | const SVEPRFM *lookupSVEPRFMByEncoding(uint8_t Encoding); |
| 3606 | const SVEPRFM *lookupSVEPRFMByName(StringRef Name); |
| 3607 | #endif |
| 3608 | |
| 3609 | #ifdef GET_SVEPRFMsList_IMPL |
| 3610 | constexpr SVEPRFM SVEPRFMsList[] = { |
| 3611 | { "pldl1keep" , 0x0, {AArch64::FeatureSVE} }, // 0 |
| 3612 | { "pldl1strm" , 0x1, {AArch64::FeatureSVE} }, // 1 |
| 3613 | { "pldl2keep" , 0x2, {AArch64::FeatureSVE} }, // 2 |
| 3614 | { "pldl2strm" , 0x3, {AArch64::FeatureSVE} }, // 3 |
| 3615 | { "pldl3keep" , 0x4, {AArch64::FeatureSVE} }, // 4 |
| 3616 | { "pldl3strm" , 0x5, {AArch64::FeatureSVE} }, // 5 |
| 3617 | { "pstl1keep" , 0x8, {AArch64::FeatureSVE} }, // 6 |
| 3618 | { "pstl1strm" , 0x9, {AArch64::FeatureSVE} }, // 7 |
| 3619 | { "pstl2keep" , 0xA, {AArch64::FeatureSVE} }, // 8 |
| 3620 | { "pstl2strm" , 0xB, {AArch64::FeatureSVE} }, // 9 |
| 3621 | { "pstl3keep" , 0xC, {AArch64::FeatureSVE} }, // 10 |
| 3622 | { "pstl3strm" , 0xD, {AArch64::FeatureSVE} }, // 11 |
| 3623 | }; |
| 3624 | |
| 3625 | const SVEPRFM *lookupSVEPRFMByEncoding(uint8_t Encoding) { |
| 3626 | struct KeyType { |
| 3627 | uint8_t Encoding; |
| 3628 | }; |
| 3629 | KeyType Key = {Encoding}; |
| 3630 | struct Comp { |
| 3631 | bool operator()(const SVEPRFM &LHS, const KeyType &RHS) const { |
| 3632 | if (LHS.Encoding < RHS.Encoding) |
| 3633 | return true; |
| 3634 | if (LHS.Encoding > RHS.Encoding) |
| 3635 | return false; |
| 3636 | return false; |
| 3637 | } |
| 3638 | }; |
| 3639 | auto Table = ArrayRef(SVEPRFMsList); |
| 3640 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 3641 | if (Idx == Table.end() || |
| 3642 | Key.Encoding != Idx->Encoding) |
| 3643 | return nullptr; |
| 3644 | |
| 3645 | return &*Idx; |
| 3646 | } |
| 3647 | |
| 3648 | const SVEPRFM *lookupSVEPRFMByName(StringRef Name) { |
| 3649 | struct IndexType { |
| 3650 | const char * Name; |
| 3651 | unsigned _index; |
| 3652 | }; |
| 3653 | static const struct IndexType Index[] = { |
| 3654 | { "PLDL1KEEP" , 0 }, |
| 3655 | { "PLDL1STRM" , 1 }, |
| 3656 | { "PLDL2KEEP" , 2 }, |
| 3657 | { "PLDL2STRM" , 3 }, |
| 3658 | { "PLDL3KEEP" , 4 }, |
| 3659 | { "PLDL3STRM" , 5 }, |
| 3660 | { "PSTL1KEEP" , 6 }, |
| 3661 | { "PSTL1STRM" , 7 }, |
| 3662 | { "PSTL2KEEP" , 8 }, |
| 3663 | { "PSTL2STRM" , 9 }, |
| 3664 | { "PSTL3KEEP" , 10 }, |
| 3665 | { "PSTL3STRM" , 11 }, |
| 3666 | }; |
| 3667 | |
| 3668 | struct KeyType { |
| 3669 | std::string Name; |
| 3670 | }; |
| 3671 | KeyType Key = {Name.upper()}; |
| 3672 | struct Comp { |
| 3673 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 3674 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 3675 | if (CmpName < 0) return true; |
| 3676 | if (CmpName > 0) return false; |
| 3677 | return false; |
| 3678 | } |
| 3679 | }; |
| 3680 | auto Table = ArrayRef(Index); |
| 3681 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 3682 | if (Idx == Table.end() || |
| 3683 | Key.Name != Idx->Name) |
| 3684 | return nullptr; |
| 3685 | |
| 3686 | return &SVEPRFMsList[Idx->_index]; |
| 3687 | } |
| 3688 | #endif |
| 3689 | |
| 3690 | #ifdef GET_SVEVECLENSPECIFIERsList_DECL |
| 3691 | const SVEVECLENSPECIFIER *lookupSVEVECLENSPECIFIERByEncoding(uint8_t Encoding); |
| 3692 | const SVEVECLENSPECIFIER *lookupSVEVECLENSPECIFIERByName(StringRef Name); |
| 3693 | #endif |
| 3694 | |
| 3695 | #ifdef GET_SVEVECLENSPECIFIERsList_IMPL |
| 3696 | constexpr SVEVECLENSPECIFIER SVEVECLENSPECIFIERsList[] = { |
| 3697 | { "vlx2" , 0x0 }, // 0 |
| 3698 | { "vlx4" , 0x1 }, // 1 |
| 3699 | }; |
| 3700 | |
| 3701 | const SVEVECLENSPECIFIER *lookupSVEVECLENSPECIFIERByEncoding(uint8_t Encoding) { |
| 3702 | if ((uint8_t)Encoding != std::clamp((uint8_t)Encoding, (uint8_t)0x0, (uint8_t)0x1)) |
| 3703 | return nullptr; |
| 3704 | |
| 3705 | auto Table = ArrayRef(SVEVECLENSPECIFIERsList); |
| 3706 | size_t Idx = Encoding - 0x0; |
| 3707 | return &Table[Idx]; |
| 3708 | } |
| 3709 | |
| 3710 | const SVEVECLENSPECIFIER *lookupSVEVECLENSPECIFIERByName(StringRef Name) { |
| 3711 | struct IndexType { |
| 3712 | const char * Name; |
| 3713 | unsigned _index; |
| 3714 | }; |
| 3715 | static const struct IndexType Index[] = { |
| 3716 | { "VLX2" , 0 }, |
| 3717 | { "VLX4" , 1 }, |
| 3718 | }; |
| 3719 | |
| 3720 | struct KeyType { |
| 3721 | std::string Name; |
| 3722 | }; |
| 3723 | KeyType Key = {Name.upper()}; |
| 3724 | struct Comp { |
| 3725 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 3726 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 3727 | if (CmpName < 0) return true; |
| 3728 | if (CmpName > 0) return false; |
| 3729 | return false; |
| 3730 | } |
| 3731 | }; |
| 3732 | auto Table = ArrayRef(Index); |
| 3733 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 3734 | if (Idx == Table.end() || |
| 3735 | Key.Name != Idx->Name) |
| 3736 | return nullptr; |
| 3737 | |
| 3738 | return &SVEVECLENSPECIFIERsList[Idx->_index]; |
| 3739 | } |
| 3740 | #endif |
| 3741 | |
| 3742 | #ifdef GET_SysRegsList_DECL |
| 3743 | llvm::iterator_range<const SysReg *> lookupSysRegByEncoding(uint16_t Encoding); |
| 3744 | const SysReg *lookupSysRegByName(StringRef Name); |
| 3745 | #endif |
| 3746 | |
| 3747 | #ifdef GET_SysRegsList_IMPL |
| 3748 | constexpr SysReg SysRegsList[] = { |
| 3749 | { "OSDTRRX_EL1" , 0x8002, true, true, {} }, // 0 |
| 3750 | { "DBGBVR0_EL1" , 0x8004, true, true, {} }, // 1 |
| 3751 | { "DBGBCR0_EL1" , 0x8005, true, true, {} }, // 2 |
| 3752 | { "DBGWVR0_EL1" , 0x8006, true, true, {} }, // 3 |
| 3753 | { "DBGWCR0_EL1" , 0x8007, true, true, {} }, // 4 |
| 3754 | { "DBGBVR1_EL1" , 0x800C, true, true, {} }, // 5 |
| 3755 | { "DBGBCR1_EL1" , 0x800D, true, true, {} }, // 6 |
| 3756 | { "DBGWVR1_EL1" , 0x800E, true, true, {} }, // 7 |
| 3757 | { "DBGWCR1_EL1" , 0x800F, true, true, {} }, // 8 |
| 3758 | { "MDCCINT_EL1" , 0x8010, true, true, {} }, // 9 |
| 3759 | { "MDSCR_EL1" , 0x8012, true, true, {} }, // 10 |
| 3760 | { "DBGBVR2_EL1" , 0x8014, true, true, {} }, // 11 |
| 3761 | { "DBGBCR2_EL1" , 0x8015, true, true, {} }, // 12 |
| 3762 | { "DBGWVR2_EL1" , 0x8016, true, true, {} }, // 13 |
| 3763 | { "DBGWCR2_EL1" , 0x8017, true, true, {} }, // 14 |
| 3764 | { "OSDTRTX_EL1" , 0x801A, true, true, {} }, // 15 |
| 3765 | { "DBGBVR3_EL1" , 0x801C, true, true, {} }, // 16 |
| 3766 | { "DBGBCR3_EL1" , 0x801D, true, true, {} }, // 17 |
| 3767 | { "DBGWVR3_EL1" , 0x801E, true, true, {} }, // 18 |
| 3768 | { "DBGWCR3_EL1" , 0x801F, true, true, {} }, // 19 |
| 3769 | { "MDSELR_EL1" , 0x8022, true, true, {} }, // 20 |
| 3770 | { "DBGBVR4_EL1" , 0x8024, true, true, {} }, // 21 |
| 3771 | { "DBGBCR4_EL1" , 0x8025, true, true, {} }, // 22 |
| 3772 | { "DBGWVR4_EL1" , 0x8026, true, true, {} }, // 23 |
| 3773 | { "DBGWCR4_EL1" , 0x8027, true, true, {} }, // 24 |
| 3774 | { "MDSTEPOP_EL1" , 0x802A, true, true, {} }, // 25 |
| 3775 | { "DBGBVR5_EL1" , 0x802C, true, true, {} }, // 26 |
| 3776 | { "DBGBCR5_EL1" , 0x802D, true, true, {} }, // 27 |
| 3777 | { "DBGWVR5_EL1" , 0x802E, true, true, {} }, // 28 |
| 3778 | { "DBGWCR5_EL1" , 0x802F, true, true, {} }, // 29 |
| 3779 | { "OSECCR_EL1" , 0x8032, true, true, {} }, // 30 |
| 3780 | { "DBGBVR6_EL1" , 0x8034, true, true, {} }, // 31 |
| 3781 | { "DBGBCR6_EL1" , 0x8035, true, true, {} }, // 32 |
| 3782 | { "DBGWVR6_EL1" , 0x8036, true, true, {} }, // 33 |
| 3783 | { "DBGWCR6_EL1" , 0x8037, true, true, {} }, // 34 |
| 3784 | { "DBGBVR7_EL1" , 0x803C, true, true, {} }, // 35 |
| 3785 | { "DBGBCR7_EL1" , 0x803D, true, true, {} }, // 36 |
| 3786 | { "DBGWVR7_EL1" , 0x803E, true, true, {} }, // 37 |
| 3787 | { "DBGWCR7_EL1" , 0x803F, true, true, {} }, // 38 |
| 3788 | { "DBGBVR8_EL1" , 0x8044, true, true, {} }, // 39 |
| 3789 | { "DBGBCR8_EL1" , 0x8045, true, true, {} }, // 40 |
| 3790 | { "DBGWVR8_EL1" , 0x8046, true, true, {} }, // 41 |
| 3791 | { "DBGWCR8_EL1" , 0x8047, true, true, {} }, // 42 |
| 3792 | { "DBGBVR9_EL1" , 0x804C, true, true, {} }, // 43 |
| 3793 | { "DBGBCR9_EL1" , 0x804D, true, true, {} }, // 44 |
| 3794 | { "DBGWVR9_EL1" , 0x804E, true, true, {} }, // 45 |
| 3795 | { "DBGWCR9_EL1" , 0x804F, true, true, {} }, // 46 |
| 3796 | { "DBGBVR10_EL1" , 0x8054, true, true, {} }, // 47 |
| 3797 | { "DBGBCR10_EL1" , 0x8055, true, true, {} }, // 48 |
| 3798 | { "DBGWVR10_EL1" , 0x8056, true, true, {} }, // 49 |
| 3799 | { "DBGWCR10_EL1" , 0x8057, true, true, {} }, // 50 |
| 3800 | { "DBGBVR11_EL1" , 0x805C, true, true, {} }, // 51 |
| 3801 | { "DBGBCR11_EL1" , 0x805D, true, true, {} }, // 52 |
| 3802 | { "DBGWVR11_EL1" , 0x805E, true, true, {} }, // 53 |
| 3803 | { "DBGWCR11_EL1" , 0x805F, true, true, {} }, // 54 |
| 3804 | { "DBGBVR12_EL1" , 0x8064, true, true, {} }, // 55 |
| 3805 | { "DBGBCR12_EL1" , 0x8065, true, true, {} }, // 56 |
| 3806 | { "DBGWVR12_EL1" , 0x8066, true, true, {} }, // 57 |
| 3807 | { "DBGWCR12_EL1" , 0x8067, true, true, {} }, // 58 |
| 3808 | { "DBGBVR13_EL1" , 0x806C, true, true, {} }, // 59 |
| 3809 | { "DBGBCR13_EL1" , 0x806D, true, true, {} }, // 60 |
| 3810 | { "DBGWVR13_EL1" , 0x806E, true, true, {} }, // 61 |
| 3811 | { "DBGWCR13_EL1" , 0x806F, true, true, {} }, // 62 |
| 3812 | { "DBGBVR14_EL1" , 0x8074, true, true, {} }, // 63 |
| 3813 | { "DBGBCR14_EL1" , 0x8075, true, true, {} }, // 64 |
| 3814 | { "DBGWVR14_EL1" , 0x8076, true, true, {} }, // 65 |
| 3815 | { "DBGWCR14_EL1" , 0x8077, true, true, {} }, // 66 |
| 3816 | { "DBGBVR15_EL1" , 0x807C, true, true, {} }, // 67 |
| 3817 | { "DBGBCR15_EL1" , 0x807D, true, true, {} }, // 68 |
| 3818 | { "DBGWVR15_EL1" , 0x807E, true, true, {} }, // 69 |
| 3819 | { "DBGWCR15_EL1" , 0x807F, true, true, {} }, // 70 |
| 3820 | { "MDRAR_EL1" , 0x8080, true, false, {} }, // 71 |
| 3821 | { "OSLAR_EL1" , 0x8084, false, true, {} }, // 72 |
| 3822 | { "OSLSR_EL1" , 0x808C, true, false, {} }, // 73 |
| 3823 | { "OSDLR_EL1" , 0x809C, true, true, {} }, // 74 |
| 3824 | { "DBGPRCR_EL1" , 0x80A4, true, true, {} }, // 75 |
| 3825 | { "DBGCLAIMSET_EL1" , 0x83C6, true, true, {} }, // 76 |
| 3826 | { "DBGCLAIMCLR_EL1" , 0x83CE, true, true, {} }, // 77 |
| 3827 | { "DBGAUTHSTATUS_EL1" , 0x83F6, true, false, {} }, // 78 |
| 3828 | { "SPMCGCR0_EL1" , 0x84E8, true, false, {} }, // 79 |
| 3829 | { "SPMCGCR1_EL1" , 0x84E9, true, false, {} }, // 80 |
| 3830 | { "SPMACCESSR_EL1" , 0x84EB, true, true, {} }, // 81 |
| 3831 | { "SPMIIDR_EL1" , 0x84EC, true, false, {} }, // 82 |
| 3832 | { "SPMDEVARCH_EL1" , 0x84ED, true, false, {} }, // 83 |
| 3833 | { "SPMDEVAFF_EL1" , 0x84EE, true, false, {} }, // 84 |
| 3834 | { "SPMCFGR_EL1" , 0x84EF, true, false, {} }, // 85 |
| 3835 | { "SPMINTENSET_EL1" , 0x84F1, true, true, {} }, // 86 |
| 3836 | { "SPMINTENCLR_EL1" , 0x84F2, true, true, {} }, // 87 |
| 3837 | { "PMEVCNTSVR0_EL1" , 0x8740, true, false, {} }, // 88 |
| 3838 | { "PMEVCNTSVR1_EL1" , 0x8741, true, false, {} }, // 89 |
| 3839 | { "PMEVCNTSVR2_EL1" , 0x8742, true, false, {} }, // 90 |
| 3840 | { "PMEVCNTSVR3_EL1" , 0x8743, true, false, {} }, // 91 |
| 3841 | { "PMEVCNTSVR4_EL1" , 0x8744, true, false, {} }, // 92 |
| 3842 | { "PMEVCNTSVR5_EL1" , 0x8745, true, false, {} }, // 93 |
| 3843 | { "PMEVCNTSVR6_EL1" , 0x8746, true, false, {} }, // 94 |
| 3844 | { "PMEVCNTSVR7_EL1" , 0x8747, true, false, {} }, // 95 |
| 3845 | { "PMEVCNTSVR8_EL1" , 0x8748, true, false, {} }, // 96 |
| 3846 | { "PMEVCNTSVR9_EL1" , 0x8749, true, false, {} }, // 97 |
| 3847 | { "PMEVCNTSVR10_EL1" , 0x874A, true, false, {} }, // 98 |
| 3848 | { "PMEVCNTSVR11_EL1" , 0x874B, true, false, {} }, // 99 |
| 3849 | { "PMEVCNTSVR12_EL1" , 0x874C, true, false, {} }, // 100 |
| 3850 | { "PMEVCNTSVR13_EL1" , 0x874D, true, false, {} }, // 101 |
| 3851 | { "PMEVCNTSVR14_EL1" , 0x874E, true, false, {} }, // 102 |
| 3852 | { "PMEVCNTSVR15_EL1" , 0x874F, true, false, {} }, // 103 |
| 3853 | { "PMEVCNTSVR16_EL1" , 0x8750, true, false, {} }, // 104 |
| 3854 | { "PMEVCNTSVR17_EL1" , 0x8751, true, false, {} }, // 105 |
| 3855 | { "PMEVCNTSVR18_EL1" , 0x8752, true, false, {} }, // 106 |
| 3856 | { "PMEVCNTSVR19_EL1" , 0x8753, true, false, {} }, // 107 |
| 3857 | { "PMEVCNTSVR20_EL1" , 0x8754, true, false, {} }, // 108 |
| 3858 | { "PMEVCNTSVR21_EL1" , 0x8755, true, false, {} }, // 109 |
| 3859 | { "PMEVCNTSVR22_EL1" , 0x8756, true, false, {} }, // 110 |
| 3860 | { "PMEVCNTSVR23_EL1" , 0x8757, true, false, {} }, // 111 |
| 3861 | { "PMEVCNTSVR24_EL1" , 0x8758, true, false, {} }, // 112 |
| 3862 | { "PMEVCNTSVR25_EL1" , 0x8759, true, false, {} }, // 113 |
| 3863 | { "PMEVCNTSVR26_EL1" , 0x875A, true, false, {} }, // 114 |
| 3864 | { "PMEVCNTSVR27_EL1" , 0x875B, true, false, {} }, // 115 |
| 3865 | { "PMEVCNTSVR28_EL1" , 0x875C, true, false, {} }, // 116 |
| 3866 | { "PMEVCNTSVR29_EL1" , 0x875D, true, false, {} }, // 117 |
| 3867 | { "PMEVCNTSVR30_EL1" , 0x875E, true, false, {} }, // 118 |
| 3868 | { "PMCCNTSVR_EL1" , 0x875F, true, false, {} }, // 119 |
| 3869 | { "PMICNTSVR_EL1" , 0x8760, true, false, {} }, // 120 |
| 3870 | { "TRCTRACEIDR" , 0x8801, true, true, {} }, // 121 |
| 3871 | { "TRCVICTLR" , 0x8802, true, true, {} }, // 122 |
| 3872 | { "TRCSEQEVR0" , 0x8804, true, true, {} }, // 123 |
| 3873 | { "TRCCNTRLDVR0" , 0x8805, true, true, {} }, // 124 |
| 3874 | { "TRCIDR8" , 0x8806, true, false, {} }, // 125 |
| 3875 | { "TRCIMSPEC0" , 0x8807, true, true, {} }, // 126 |
| 3876 | { "TRCPRGCTLR" , 0x8808, true, true, {} }, // 127 |
| 3877 | { "TRCQCTLR" , 0x8809, true, true, {} }, // 128 |
| 3878 | { "TRCVIIECTLR" , 0x880A, true, true, {} }, // 129 |
| 3879 | { "TRCSEQEVR1" , 0x880C, true, true, {} }, // 130 |
| 3880 | { "TRCCNTRLDVR1" , 0x880D, true, true, {} }, // 131 |
| 3881 | { "TRCIDR9" , 0x880E, true, false, {} }, // 132 |
| 3882 | { "TRCIMSPEC1" , 0x880F, true, true, {} }, // 133 |
| 3883 | { "TRCPROCSELR" , 0x8810, true, true, {} }, // 134 |
| 3884 | { "TRCITEEDCR" , 0x8811, true, true, {AArch64::FeatureITE} }, // 135 |
| 3885 | { "TRCVISSCTLR" , 0x8812, true, true, {} }, // 136 |
| 3886 | { "TRCSEQEVR2" , 0x8814, true, true, {} }, // 137 |
| 3887 | { "TRCCNTRLDVR2" , 0x8815, true, true, {} }, // 138 |
| 3888 | { "TRCIDR10" , 0x8816, true, false, {} }, // 139 |
| 3889 | { "TRCIMSPEC2" , 0x8817, true, true, {} }, // 140 |
| 3890 | { "TRCSTATR" , 0x8818, true, false, {} }, // 141 |
| 3891 | { "TRCVIPCSSCTLR" , 0x881A, true, true, {} }, // 142 |
| 3892 | { "TRCCNTRLDVR3" , 0x881D, true, true, {} }, // 143 |
| 3893 | { "TRCIDR11" , 0x881E, true, false, {} }, // 144 |
| 3894 | { "TRCIMSPEC3" , 0x881F, true, true, {} }, // 145 |
| 3895 | { "TRCCONFIGR" , 0x8820, true, true, {} }, // 146 |
| 3896 | { "TRCCNTCTLR0" , 0x8825, true, true, {} }, // 147 |
| 3897 | { "TRCIDR12" , 0x8826, true, false, {} }, // 148 |
| 3898 | { "TRCIMSPEC4" , 0x8827, true, true, {} }, // 149 |
| 3899 | { "TRCCNTCTLR1" , 0x882D, true, true, {} }, // 150 |
| 3900 | { "TRCIDR13" , 0x882E, true, false, {} }, // 151 |
| 3901 | { "TRCIMSPEC5" , 0x882F, true, true, {} }, // 152 |
| 3902 | { "TRCAUXCTLR" , 0x8830, true, true, {} }, // 153 |
| 3903 | { "TRCSEQRSTEVR" , 0x8834, true, true, {} }, // 154 |
| 3904 | { "TRCCNTCTLR2" , 0x8835, true, true, {} }, // 155 |
| 3905 | { "TRCIMSPEC6" , 0x8837, true, true, {} }, // 156 |
| 3906 | { "TRCSEQSTR" , 0x883C, true, true, {} }, // 157 |
| 3907 | { "TRCCNTCTLR3" , 0x883D, true, true, {} }, // 158 |
| 3908 | { "TRCIMSPEC7" , 0x883F, true, true, {} }, // 159 |
| 3909 | { "TRCEVENTCTL0R" , 0x8840, true, true, {} }, // 160 |
| 3910 | { "TRCVDCTLR" , 0x8842, true, true, {} }, // 161 |
| 3911 | { "TRCEXTINSELR" , 0x8844, true, true, {} }, // 162 |
| 3912 | { "TRCEXTINSELR0" , 0x8844, true, true, {AArch64::FeatureETE} }, // 163 |
| 3913 | { "TRCCNTVR0" , 0x8845, true, true, {} }, // 164 |
| 3914 | { "TRCIDR0" , 0x8847, true, false, {} }, // 165 |
| 3915 | { "TRCEVENTCTL1R" , 0x8848, true, true, {} }, // 166 |
| 3916 | { "TRCVDSACCTLR" , 0x884A, true, true, {} }, // 167 |
| 3917 | { "TRCEXTINSELR1" , 0x884C, true, true, {AArch64::FeatureETE} }, // 168 |
| 3918 | { "TRCCNTVR1" , 0x884D, true, true, {} }, // 169 |
| 3919 | { "TRCIDR1" , 0x884F, true, false, {} }, // 170 |
| 3920 | { "TRCRSR" , 0x8850, true, true, {AArch64::FeatureETE} }, // 171 |
| 3921 | { "TRCVDARCCTLR" , 0x8852, true, true, {} }, // 172 |
| 3922 | { "TRCEXTINSELR2" , 0x8854, true, true, {AArch64::FeatureETE} }, // 173 |
| 3923 | { "TRCCNTVR2" , 0x8855, true, true, {} }, // 174 |
| 3924 | { "TRCIDR2" , 0x8857, true, false, {} }, // 175 |
| 3925 | { "TRCSTALLCTLR" , 0x8858, true, true, {} }, // 176 |
| 3926 | { "TRCEXTINSELR3" , 0x885C, true, true, {AArch64::FeatureETE} }, // 177 |
| 3927 | { "TRCCNTVR3" , 0x885D, true, true, {} }, // 178 |
| 3928 | { "TRCIDR3" , 0x885F, true, false, {} }, // 179 |
| 3929 | { "TRCTSCTLR" , 0x8860, true, true, {} }, // 180 |
| 3930 | { "TRCIDR4" , 0x8867, true, false, {} }, // 181 |
| 3931 | { "TRCSYNCPR" , 0x8868, true, true, {} }, // 182 |
| 3932 | { "TRCIDR5" , 0x886F, true, false, {} }, // 183 |
| 3933 | { "TRCCCCTLR" , 0x8870, true, true, {} }, // 184 |
| 3934 | { "TRCIDR6" , 0x8877, true, false, {} }, // 185 |
| 3935 | { "TRCBBCTLR" , 0x8878, true, true, {} }, // 186 |
| 3936 | { "TRCIDR7" , 0x887F, true, false, {} }, // 187 |
| 3937 | { "TRCRSCTLR16" , 0x8881, true, true, {} }, // 188 |
| 3938 | { "TRCSSCCR0" , 0x8882, true, true, {} }, // 189 |
| 3939 | { "TRCSSPCICR0" , 0x8883, true, true, {} }, // 190 |
| 3940 | { "TRCOSLAR" , 0x8884, false, true, {} }, // 191 |
| 3941 | { "TRCRSCTLR17" , 0x8889, true, true, {} }, // 192 |
| 3942 | { "TRCSSCCR1" , 0x888A, true, true, {} }, // 193 |
| 3943 | { "TRCSSPCICR1" , 0x888B, true, true, {} }, // 194 |
| 3944 | { "TRCOSLSR" , 0x888C, true, false, {} }, // 195 |
| 3945 | { "TRCRSCTLR2" , 0x8890, true, true, {} }, // 196 |
| 3946 | { "TRCRSCTLR18" , 0x8891, true, true, {} }, // 197 |
| 3947 | { "TRCSSCCR2" , 0x8892, true, true, {} }, // 198 |
| 3948 | { "TRCSSPCICR2" , 0x8893, true, true, {} }, // 199 |
| 3949 | { "TRCRSCTLR3" , 0x8898, true, true, {} }, // 200 |
| 3950 | { "TRCRSCTLR19" , 0x8899, true, true, {} }, // 201 |
| 3951 | { "TRCSSCCR3" , 0x889A, true, true, {} }, // 202 |
| 3952 | { "TRCSSPCICR3" , 0x889B, true, true, {} }, // 203 |
| 3953 | { "TRCRSCTLR4" , 0x88A0, true, true, {} }, // 204 |
| 3954 | { "TRCRSCTLR20" , 0x88A1, true, true, {} }, // 205 |
| 3955 | { "TRCSSCCR4" , 0x88A2, true, true, {} }, // 206 |
| 3956 | { "TRCSSPCICR4" , 0x88A3, true, true, {} }, // 207 |
| 3957 | { "TRCPDCR" , 0x88A4, true, true, {} }, // 208 |
| 3958 | { "TRCRSCTLR5" , 0x88A8, true, true, {} }, // 209 |
| 3959 | { "TRCRSCTLR21" , 0x88A9, true, true, {} }, // 210 |
| 3960 | { "TRCSSCCR5" , 0x88AA, true, true, {} }, // 211 |
| 3961 | { "TRCSSPCICR5" , 0x88AB, true, true, {} }, // 212 |
| 3962 | { "TRCPDSR" , 0x88AC, true, false, {} }, // 213 |
| 3963 | { "TRCRSCTLR6" , 0x88B0, true, true, {} }, // 214 |
| 3964 | { "TRCRSCTLR22" , 0x88B1, true, true, {} }, // 215 |
| 3965 | { "TRCSSCCR6" , 0x88B2, true, true, {} }, // 216 |
| 3966 | { "TRCSSPCICR6" , 0x88B3, true, true, {} }, // 217 |
| 3967 | { "TRCRSCTLR7" , 0x88B8, true, true, {} }, // 218 |
| 3968 | { "TRCRSCTLR23" , 0x88B9, true, true, {} }, // 219 |
| 3969 | { "TRCSSCCR7" , 0x88BA, true, true, {} }, // 220 |
| 3970 | { "TRCSSPCICR7" , 0x88BB, true, true, {} }, // 221 |
| 3971 | { "TRCRSCTLR8" , 0x88C0, true, true, {} }, // 222 |
| 3972 | { "TRCRSCTLR24" , 0x88C1, true, true, {} }, // 223 |
| 3973 | { "TRCSSCSR0" , 0x88C2, true, true, {} }, // 224 |
| 3974 | { "TRCRSCTLR9" , 0x88C8, true, true, {} }, // 225 |
| 3975 | { "TRCRSCTLR25" , 0x88C9, true, true, {} }, // 226 |
| 3976 | { "TRCSSCSR1" , 0x88CA, true, true, {} }, // 227 |
| 3977 | { "TRCRSCTLR10" , 0x88D0, true, true, {} }, // 228 |
| 3978 | { "TRCRSCTLR26" , 0x88D1, true, true, {} }, // 229 |
| 3979 | { "TRCSSCSR2" , 0x88D2, true, true, {} }, // 230 |
| 3980 | { "TRCRSCTLR11" , 0x88D8, true, true, {} }, // 231 |
| 3981 | { "TRCRSCTLR27" , 0x88D9, true, true, {} }, // 232 |
| 3982 | { "TRCSSCSR3" , 0x88DA, true, true, {} }, // 233 |
| 3983 | { "TRCRSCTLR12" , 0x88E0, true, true, {} }, // 234 |
| 3984 | { "TRCRSCTLR28" , 0x88E1, true, true, {} }, // 235 |
| 3985 | { "TRCSSCSR4" , 0x88E2, true, true, {} }, // 236 |
| 3986 | { "TRCRSCTLR13" , 0x88E8, true, true, {} }, // 237 |
| 3987 | { "TRCRSCTLR29" , 0x88E9, true, true, {} }, // 238 |
| 3988 | { "TRCSSCSR5" , 0x88EA, true, true, {} }, // 239 |
| 3989 | { "TRCRSCTLR14" , 0x88F0, true, true, {} }, // 240 |
| 3990 | { "TRCRSCTLR30" , 0x88F1, true, true, {} }, // 241 |
| 3991 | { "TRCSSCSR6" , 0x88F2, true, true, {} }, // 242 |
| 3992 | { "TRCRSCTLR15" , 0x88F8, true, true, {} }, // 243 |
| 3993 | { "TRCRSCTLR31" , 0x88F9, true, true, {} }, // 244 |
| 3994 | { "TRCSSCSR7" , 0x88FA, true, true, {} }, // 245 |
| 3995 | { "TRCACVR0" , 0x8900, true, true, {} }, // 246 |
| 3996 | { "TRCACVR8" , 0x8901, true, true, {} }, // 247 |
| 3997 | { "TRCACATR0" , 0x8902, true, true, {} }, // 248 |
| 3998 | { "TRCACATR8" , 0x8903, true, true, {} }, // 249 |
| 3999 | { "TRCDVCVR0" , 0x8904, true, true, {} }, // 250 |
| 4000 | { "TRCDVCVR4" , 0x8905, true, true, {} }, // 251 |
| 4001 | { "TRCDVCMR0" , 0x8906, true, true, {} }, // 252 |
| 4002 | { "TRCDVCMR4" , 0x8907, true, true, {} }, // 253 |
| 4003 | { "TRCACVR1" , 0x8910, true, true, {} }, // 254 |
| 4004 | { "TRCACVR9" , 0x8911, true, true, {} }, // 255 |
| 4005 | { "TRCACATR1" , 0x8912, true, true, {} }, // 256 |
| 4006 | { "TRCACATR9" , 0x8913, true, true, {} }, // 257 |
| 4007 | { "TRCACVR2" , 0x8920, true, true, {} }, // 258 |
| 4008 | { "TRCACVR10" , 0x8921, true, true, {} }, // 259 |
| 4009 | { "TRCACATR2" , 0x8922, true, true, {} }, // 260 |
| 4010 | { "TRCACATR10" , 0x8923, true, true, {} }, // 261 |
| 4011 | { "TRCDVCVR1" , 0x8924, true, true, {} }, // 262 |
| 4012 | { "TRCDVCVR5" , 0x8925, true, true, {} }, // 263 |
| 4013 | { "TRCDVCMR1" , 0x8926, true, true, {} }, // 264 |
| 4014 | { "TRCDVCMR5" , 0x8927, true, true, {} }, // 265 |
| 4015 | { "TRCACVR3" , 0x8930, true, true, {} }, // 266 |
| 4016 | { "TRCACVR11" , 0x8931, true, true, {} }, // 267 |
| 4017 | { "TRCACATR3" , 0x8932, true, true, {} }, // 268 |
| 4018 | { "TRCACATR11" , 0x8933, true, true, {} }, // 269 |
| 4019 | { "TRCACVR4" , 0x8940, true, true, {} }, // 270 |
| 4020 | { "TRCACVR12" , 0x8941, true, true, {} }, // 271 |
| 4021 | { "TRCACATR4" , 0x8942, true, true, {} }, // 272 |
| 4022 | { "TRCACATR12" , 0x8943, true, true, {} }, // 273 |
| 4023 | { "TRCDVCVR2" , 0x8944, true, true, {} }, // 274 |
| 4024 | { "TRCDVCVR6" , 0x8945, true, true, {} }, // 275 |
| 4025 | { "TRCDVCMR2" , 0x8946, true, true, {} }, // 276 |
| 4026 | { "TRCDVCMR6" , 0x8947, true, true, {} }, // 277 |
| 4027 | { "TRCACVR5" , 0x8950, true, true, {} }, // 278 |
| 4028 | { "TRCACVR13" , 0x8951, true, true, {} }, // 279 |
| 4029 | { "TRCACATR5" , 0x8952, true, true, {} }, // 280 |
| 4030 | { "TRCACATR13" , 0x8953, true, true, {} }, // 281 |
| 4031 | { "TRCACVR6" , 0x8960, true, true, {} }, // 282 |
| 4032 | { "TRCACVR14" , 0x8961, true, true, {} }, // 283 |
| 4033 | { "TRCACATR6" , 0x8962, true, true, {} }, // 284 |
| 4034 | { "TRCACATR14" , 0x8963, true, true, {} }, // 285 |
| 4035 | { "TRCDVCVR3" , 0x8964, true, true, {} }, // 286 |
| 4036 | { "TRCDVCVR7" , 0x8965, true, true, {} }, // 287 |
| 4037 | { "TRCDVCMR3" , 0x8966, true, true, {} }, // 288 |
| 4038 | { "TRCDVCMR7" , 0x8967, true, true, {} }, // 289 |
| 4039 | { "TRCACVR7" , 0x8970, true, true, {} }, // 290 |
| 4040 | { "TRCACVR15" , 0x8971, true, true, {} }, // 291 |
| 4041 | { "TRCACATR7" , 0x8972, true, true, {} }, // 292 |
| 4042 | { "TRCACATR15" , 0x8973, true, true, {} }, // 293 |
| 4043 | { "TRCCIDCVR0" , 0x8980, true, true, {} }, // 294 |
| 4044 | { "TRCVMIDCVR0" , 0x8981, true, true, {} }, // 295 |
| 4045 | { "TRCCIDCCTLR0" , 0x8982, true, true, {} }, // 296 |
| 4046 | { "TRCCIDCCTLR1" , 0x898A, true, true, {} }, // 297 |
| 4047 | { "TRCCIDCVR1" , 0x8990, true, true, {} }, // 298 |
| 4048 | { "TRCVMIDCVR1" , 0x8991, true, true, {} }, // 299 |
| 4049 | { "TRCVMIDCCTLR0" , 0x8992, true, true, {} }, // 300 |
| 4050 | { "TRCVMIDCCTLR1" , 0x899A, true, true, {} }, // 301 |
| 4051 | { "TRCCIDCVR2" , 0x89A0, true, true, {} }, // 302 |
| 4052 | { "TRCVMIDCVR2" , 0x89A1, true, true, {} }, // 303 |
| 4053 | { "TRCCIDCVR3" , 0x89B0, true, true, {} }, // 304 |
| 4054 | { "TRCVMIDCVR3" , 0x89B1, true, true, {} }, // 305 |
| 4055 | { "TRCCIDCVR4" , 0x89C0, true, true, {} }, // 306 |
| 4056 | { "TRCVMIDCVR4" , 0x89C1, true, true, {} }, // 307 |
| 4057 | { "TRCCIDCVR5" , 0x89D0, true, true, {} }, // 308 |
| 4058 | { "TRCVMIDCVR5" , 0x89D1, true, true, {} }, // 309 |
| 4059 | { "TRCCIDCVR6" , 0x89E0, true, true, {} }, // 310 |
| 4060 | { "TRCVMIDCVR6" , 0x89E1, true, true, {} }, // 311 |
| 4061 | { "TRCCIDCVR7" , 0x89F0, true, true, {} }, // 312 |
| 4062 | { "TRCVMIDCVR7" , 0x89F1, true, true, {} }, // 313 |
| 4063 | { "TRCITCTRL" , 0x8B84, true, true, {} }, // 314 |
| 4064 | { "TRCDEVID" , 0x8B97, true, false, {} }, // 315 |
| 4065 | { "TRCDEVTYPE" , 0x8B9F, true, false, {} }, // 316 |
| 4066 | { "TRCPIDR4" , 0x8BA7, true, false, {} }, // 317 |
| 4067 | { "TRCPIDR5" , 0x8BAF, true, false, {} }, // 318 |
| 4068 | { "TRCPIDR6" , 0x8BB7, true, false, {} }, // 319 |
| 4069 | { "TRCPIDR7" , 0x8BBF, true, false, {} }, // 320 |
| 4070 | { "TRCCLAIMSET" , 0x8BC6, true, true, {} }, // 321 |
| 4071 | { "TRCPIDR0" , 0x8BC7, true, false, {} }, // 322 |
| 4072 | { "TRCCLAIMCLR" , 0x8BCE, true, true, {} }, // 323 |
| 4073 | { "TRCPIDR1" , 0x8BCF, true, false, {} }, // 324 |
| 4074 | { "TRCDEVAFF0" , 0x8BD6, true, false, {} }, // 325 |
| 4075 | { "TRCPIDR2" , 0x8BD7, true, false, {} }, // 326 |
| 4076 | { "TRCDEVAFF1" , 0x8BDE, true, false, {} }, // 327 |
| 4077 | { "TRCPIDR3" , 0x8BDF, true, false, {} }, // 328 |
| 4078 | { "TRCLAR" , 0x8BE6, false, true, {} }, // 329 |
| 4079 | { "TRCCIDR0" , 0x8BE7, true, false, {} }, // 330 |
| 4080 | { "TRCLSR" , 0x8BEE, true, false, {} }, // 331 |
| 4081 | { "TRCCIDR1" , 0x8BEF, true, false, {} }, // 332 |
| 4082 | { "TRCAUTHSTATUS" , 0x8BF6, true, false, {} }, // 333 |
| 4083 | { "TRCCIDR2" , 0x8BF7, true, false, {} }, // 334 |
| 4084 | { "TRCDEVARCH" , 0x8BFE, true, false, {} }, // 335 |
| 4085 | { "TRCCIDR3" , 0x8BFF, true, false, {} }, // 336 |
| 4086 | { "BRBINF0_EL1" , 0x8C00, true, false, {AArch64::FeatureBRBE} }, // 337 |
| 4087 | { "BRBSRC0_EL1" , 0x8C01, true, false, {AArch64::FeatureBRBE} }, // 338 |
| 4088 | { "BRBTGT0_EL1" , 0x8C02, true, false, {AArch64::FeatureBRBE} }, // 339 |
| 4089 | { "BRBINF16_EL1" , 0x8C04, true, false, {AArch64::FeatureBRBE} }, // 340 |
| 4090 | { "BRBSRC16_EL1" , 0x8C05, true, false, {AArch64::FeatureBRBE} }, // 341 |
| 4091 | { "BRBTGT16_EL1" , 0x8C06, true, false, {AArch64::FeatureBRBE} }, // 342 |
| 4092 | { "BRBINF1_EL1" , 0x8C08, true, false, {AArch64::FeatureBRBE} }, // 343 |
| 4093 | { "BRBSRC1_EL1" , 0x8C09, true, false, {AArch64::FeatureBRBE} }, // 344 |
| 4094 | { "BRBTGT1_EL1" , 0x8C0A, true, false, {AArch64::FeatureBRBE} }, // 345 |
| 4095 | { "BRBINF17_EL1" , 0x8C0C, true, false, {AArch64::FeatureBRBE} }, // 346 |
| 4096 | { "BRBSRC17_EL1" , 0x8C0D, true, false, {AArch64::FeatureBRBE} }, // 347 |
| 4097 | { "BRBTGT17_EL1" , 0x8C0E, true, false, {AArch64::FeatureBRBE} }, // 348 |
| 4098 | { "BRBINF2_EL1" , 0x8C10, true, false, {AArch64::FeatureBRBE} }, // 349 |
| 4099 | { "BRBSRC2_EL1" , 0x8C11, true, false, {AArch64::FeatureBRBE} }, // 350 |
| 4100 | { "BRBTGT2_EL1" , 0x8C12, true, false, {AArch64::FeatureBRBE} }, // 351 |
| 4101 | { "BRBINF18_EL1" , 0x8C14, true, false, {AArch64::FeatureBRBE} }, // 352 |
| 4102 | { "BRBSRC18_EL1" , 0x8C15, true, false, {AArch64::FeatureBRBE} }, // 353 |
| 4103 | { "BRBTGT18_EL1" , 0x8C16, true, false, {AArch64::FeatureBRBE} }, // 354 |
| 4104 | { "BRBINF3_EL1" , 0x8C18, true, false, {AArch64::FeatureBRBE} }, // 355 |
| 4105 | { "BRBSRC3_EL1" , 0x8C19, true, false, {AArch64::FeatureBRBE} }, // 356 |
| 4106 | { "BRBTGT3_EL1" , 0x8C1A, true, false, {AArch64::FeatureBRBE} }, // 357 |
| 4107 | { "BRBINF19_EL1" , 0x8C1C, true, false, {AArch64::FeatureBRBE} }, // 358 |
| 4108 | { "BRBSRC19_EL1" , 0x8C1D, true, false, {AArch64::FeatureBRBE} }, // 359 |
| 4109 | { "BRBTGT19_EL1" , 0x8C1E, true, false, {AArch64::FeatureBRBE} }, // 360 |
| 4110 | { "BRBINF4_EL1" , 0x8C20, true, false, {AArch64::FeatureBRBE} }, // 361 |
| 4111 | { "BRBSRC4_EL1" , 0x8C21, true, false, {AArch64::FeatureBRBE} }, // 362 |
| 4112 | { "BRBTGT4_EL1" , 0x8C22, true, false, {AArch64::FeatureBRBE} }, // 363 |
| 4113 | { "BRBINF20_EL1" , 0x8C24, true, false, {AArch64::FeatureBRBE} }, // 364 |
| 4114 | { "BRBSRC20_EL1" , 0x8C25, true, false, {AArch64::FeatureBRBE} }, // 365 |
| 4115 | { "BRBTGT20_EL1" , 0x8C26, true, false, {AArch64::FeatureBRBE} }, // 366 |
| 4116 | { "BRBINF5_EL1" , 0x8C28, true, false, {AArch64::FeatureBRBE} }, // 367 |
| 4117 | { "BRBSRC5_EL1" , 0x8C29, true, false, {AArch64::FeatureBRBE} }, // 368 |
| 4118 | { "BRBTGT5_EL1" , 0x8C2A, true, false, {AArch64::FeatureBRBE} }, // 369 |
| 4119 | { "BRBINF21_EL1" , 0x8C2C, true, false, {AArch64::FeatureBRBE} }, // 370 |
| 4120 | { "BRBSRC21_EL1" , 0x8C2D, true, false, {AArch64::FeatureBRBE} }, // 371 |
| 4121 | { "BRBTGT21_EL1" , 0x8C2E, true, false, {AArch64::FeatureBRBE} }, // 372 |
| 4122 | { "BRBINF6_EL1" , 0x8C30, true, false, {AArch64::FeatureBRBE} }, // 373 |
| 4123 | { "BRBSRC6_EL1" , 0x8C31, true, false, {AArch64::FeatureBRBE} }, // 374 |
| 4124 | { "BRBTGT6_EL1" , 0x8C32, true, false, {AArch64::FeatureBRBE} }, // 375 |
| 4125 | { "BRBINF22_EL1" , 0x8C34, true, false, {AArch64::FeatureBRBE} }, // 376 |
| 4126 | { "BRBSRC22_EL1" , 0x8C35, true, false, {AArch64::FeatureBRBE} }, // 377 |
| 4127 | { "BRBTGT22_EL1" , 0x8C36, true, false, {AArch64::FeatureBRBE} }, // 378 |
| 4128 | { "BRBINF7_EL1" , 0x8C38, true, false, {AArch64::FeatureBRBE} }, // 379 |
| 4129 | { "BRBSRC7_EL1" , 0x8C39, true, false, {AArch64::FeatureBRBE} }, // 380 |
| 4130 | { "BRBTGT7_EL1" , 0x8C3A, true, false, {AArch64::FeatureBRBE} }, // 381 |
| 4131 | { "BRBINF23_EL1" , 0x8C3C, true, false, {AArch64::FeatureBRBE} }, // 382 |
| 4132 | { "BRBSRC23_EL1" , 0x8C3D, true, false, {AArch64::FeatureBRBE} }, // 383 |
| 4133 | { "BRBTGT23_EL1" , 0x8C3E, true, false, {AArch64::FeatureBRBE} }, // 384 |
| 4134 | { "BRBINF8_EL1" , 0x8C40, true, false, {AArch64::FeatureBRBE} }, // 385 |
| 4135 | { "BRBSRC8_EL1" , 0x8C41, true, false, {AArch64::FeatureBRBE} }, // 386 |
| 4136 | { "BRBTGT8_EL1" , 0x8C42, true, false, {AArch64::FeatureBRBE} }, // 387 |
| 4137 | { "BRBINF24_EL1" , 0x8C44, true, false, {AArch64::FeatureBRBE} }, // 388 |
| 4138 | { "BRBSRC24_EL1" , 0x8C45, true, false, {AArch64::FeatureBRBE} }, // 389 |
| 4139 | { "BRBTGT24_EL1" , 0x8C46, true, false, {AArch64::FeatureBRBE} }, // 390 |
| 4140 | { "BRBINF9_EL1" , 0x8C48, true, false, {AArch64::FeatureBRBE} }, // 391 |
| 4141 | { "BRBSRC9_EL1" , 0x8C49, true, false, {AArch64::FeatureBRBE} }, // 392 |
| 4142 | { "BRBTGT9_EL1" , 0x8C4A, true, false, {AArch64::FeatureBRBE} }, // 393 |
| 4143 | { "BRBINF25_EL1" , 0x8C4C, true, false, {AArch64::FeatureBRBE} }, // 394 |
| 4144 | { "BRBSRC25_EL1" , 0x8C4D, true, false, {AArch64::FeatureBRBE} }, // 395 |
| 4145 | { "BRBTGT25_EL1" , 0x8C4E, true, false, {AArch64::FeatureBRBE} }, // 396 |
| 4146 | { "BRBINF10_EL1" , 0x8C50, true, false, {AArch64::FeatureBRBE} }, // 397 |
| 4147 | { "BRBSRC10_EL1" , 0x8C51, true, false, {AArch64::FeatureBRBE} }, // 398 |
| 4148 | { "BRBTGT10_EL1" , 0x8C52, true, false, {AArch64::FeatureBRBE} }, // 399 |
| 4149 | { "BRBINF26_EL1" , 0x8C54, true, false, {AArch64::FeatureBRBE} }, // 400 |
| 4150 | { "BRBSRC26_EL1" , 0x8C55, true, false, {AArch64::FeatureBRBE} }, // 401 |
| 4151 | { "BRBTGT26_EL1" , 0x8C56, true, false, {AArch64::FeatureBRBE} }, // 402 |
| 4152 | { "BRBINF11_EL1" , 0x8C58, true, false, {AArch64::FeatureBRBE} }, // 403 |
| 4153 | { "BRBSRC11_EL1" , 0x8C59, true, false, {AArch64::FeatureBRBE} }, // 404 |
| 4154 | { "BRBTGT11_EL1" , 0x8C5A, true, false, {AArch64::FeatureBRBE} }, // 405 |
| 4155 | { "BRBINF27_EL1" , 0x8C5C, true, false, {AArch64::FeatureBRBE} }, // 406 |
| 4156 | { "BRBSRC27_EL1" , 0x8C5D, true, false, {AArch64::FeatureBRBE} }, // 407 |
| 4157 | { "BRBTGT27_EL1" , 0x8C5E, true, false, {AArch64::FeatureBRBE} }, // 408 |
| 4158 | { "BRBINF12_EL1" , 0x8C60, true, false, {AArch64::FeatureBRBE} }, // 409 |
| 4159 | { "BRBSRC12_EL1" , 0x8C61, true, false, {AArch64::FeatureBRBE} }, // 410 |
| 4160 | { "BRBTGT12_EL1" , 0x8C62, true, false, {AArch64::FeatureBRBE} }, // 411 |
| 4161 | { "BRBINF28_EL1" , 0x8C64, true, false, {AArch64::FeatureBRBE} }, // 412 |
| 4162 | { "BRBSRC28_EL1" , 0x8C65, true, false, {AArch64::FeatureBRBE} }, // 413 |
| 4163 | { "BRBTGT28_EL1" , 0x8C66, true, false, {AArch64::FeatureBRBE} }, // 414 |
| 4164 | { "BRBINF13_EL1" , 0x8C68, true, false, {AArch64::FeatureBRBE} }, // 415 |
| 4165 | { "BRBSRC13_EL1" , 0x8C69, true, false, {AArch64::FeatureBRBE} }, // 416 |
| 4166 | { "BRBTGT13_EL1" , 0x8C6A, true, false, {AArch64::FeatureBRBE} }, // 417 |
| 4167 | { "BRBINF29_EL1" , 0x8C6C, true, false, {AArch64::FeatureBRBE} }, // 418 |
| 4168 | { "BRBSRC29_EL1" , 0x8C6D, true, false, {AArch64::FeatureBRBE} }, // 419 |
| 4169 | { "BRBTGT29_EL1" , 0x8C6E, true, false, {AArch64::FeatureBRBE} }, // 420 |
| 4170 | { "BRBINF14_EL1" , 0x8C70, true, false, {AArch64::FeatureBRBE} }, // 421 |
| 4171 | { "BRBSRC14_EL1" , 0x8C71, true, false, {AArch64::FeatureBRBE} }, // 422 |
| 4172 | { "BRBTGT14_EL1" , 0x8C72, true, false, {AArch64::FeatureBRBE} }, // 423 |
| 4173 | { "BRBINF30_EL1" , 0x8C74, true, false, {AArch64::FeatureBRBE} }, // 424 |
| 4174 | { "BRBSRC30_EL1" , 0x8C75, true, false, {AArch64::FeatureBRBE} }, // 425 |
| 4175 | { "BRBTGT30_EL1" , 0x8C76, true, false, {AArch64::FeatureBRBE} }, // 426 |
| 4176 | { "BRBINF15_EL1" , 0x8C78, true, false, {AArch64::FeatureBRBE} }, // 427 |
| 4177 | { "BRBSRC15_EL1" , 0x8C79, true, false, {AArch64::FeatureBRBE} }, // 428 |
| 4178 | { "BRBTGT15_EL1" , 0x8C7A, true, false, {AArch64::FeatureBRBE} }, // 429 |
| 4179 | { "BRBINF31_EL1" , 0x8C7C, true, false, {AArch64::FeatureBRBE} }, // 430 |
| 4180 | { "BRBSRC31_EL1" , 0x8C7D, true, false, {AArch64::FeatureBRBE} }, // 431 |
| 4181 | { "BRBTGT31_EL1" , 0x8C7E, true, false, {AArch64::FeatureBRBE} }, // 432 |
| 4182 | { "BRBCR_EL1" , 0x8C80, true, true, {AArch64::FeatureBRBE} }, // 433 |
| 4183 | { "BRBFCR_EL1" , 0x8C81, true, true, {AArch64::FeatureBRBE} }, // 434 |
| 4184 | { "BRBTS_EL1" , 0x8C82, true, true, {AArch64::FeatureBRBE} }, // 435 |
| 4185 | { "BRBINFINJ_EL1" , 0x8C88, true, true, {AArch64::FeatureBRBE} }, // 436 |
| 4186 | { "BRBSRCINJ_EL1" , 0x8C89, true, true, {AArch64::FeatureBRBE} }, // 437 |
| 4187 | { "BRBTGTINJ_EL1" , 0x8C8A, true, true, {AArch64::FeatureBRBE} }, // 438 |
| 4188 | { "BRBIDR0_EL1" , 0x8C90, true, false, {AArch64::FeatureBRBE} }, // 439 |
| 4189 | { "TEECR32_EL1" , 0x9000, true, true, {} }, // 440 |
| 4190 | { "TEEHBR32_EL1" , 0x9080, true, true, {} }, // 441 |
| 4191 | { "MDCCSR_EL0" , 0x9808, true, false, {} }, // 442 |
| 4192 | { "DBGDTR_EL0" , 0x9820, true, true, {} }, // 443 |
| 4193 | { "DBGDTRRX_EL0" , 0x9828, true, false, {} }, // 444 |
| 4194 | { "DBGDTRTX_EL0" , 0x9828, false, true, {} }, // 445 |
| 4195 | { "SPMCR_EL0" , 0x9CE0, true, true, {} }, // 446 |
| 4196 | { "SPMCNTENSET_EL0" , 0x9CE1, true, true, {} }, // 447 |
| 4197 | { "SPMCNTENCLR_EL0" , 0x9CE2, true, true, {} }, // 448 |
| 4198 | { "SPMOVSCLR_EL0" , 0x9CE3, true, true, {} }, // 449 |
| 4199 | { "SPMZR_EL0" , 0x9CE4, false, true, {} }, // 450 |
| 4200 | { "SPMSELR_EL0" , 0x9CE5, true, true, {} }, // 451 |
| 4201 | { "SPMOVSSET_EL0" , 0x9CF3, true, true, {} }, // 452 |
| 4202 | { "SPMEVCNTR0_EL0" , 0x9F00, true, true, {} }, // 453 |
| 4203 | { "SPMEVCNTR1_EL0" , 0x9F01, true, true, {} }, // 454 |
| 4204 | { "SPMEVCNTR2_EL0" , 0x9F02, true, true, {} }, // 455 |
| 4205 | { "SPMEVCNTR3_EL0" , 0x9F03, true, true, {} }, // 456 |
| 4206 | { "SPMEVCNTR4_EL0" , 0x9F04, true, true, {} }, // 457 |
| 4207 | { "SPMEVCNTR5_EL0" , 0x9F05, true, true, {} }, // 458 |
| 4208 | { "SPMEVCNTR6_EL0" , 0x9F06, true, true, {} }, // 459 |
| 4209 | { "SPMEVCNTR7_EL0" , 0x9F07, true, true, {} }, // 460 |
| 4210 | { "SPMEVCNTR8_EL0" , 0x9F08, true, true, {} }, // 461 |
| 4211 | { "SPMEVCNTR9_EL0" , 0x9F09, true, true, {} }, // 462 |
| 4212 | { "SPMEVCNTR10_EL0" , 0x9F0A, true, true, {} }, // 463 |
| 4213 | { "SPMEVCNTR11_EL0" , 0x9F0B, true, true, {} }, // 464 |
| 4214 | { "SPMEVCNTR12_EL0" , 0x9F0C, true, true, {} }, // 465 |
| 4215 | { "SPMEVCNTR13_EL0" , 0x9F0D, true, true, {} }, // 466 |
| 4216 | { "SPMEVCNTR14_EL0" , 0x9F0E, true, true, {} }, // 467 |
| 4217 | { "SPMEVCNTR15_EL0" , 0x9F0F, true, true, {} }, // 468 |
| 4218 | { "SPMEVTYPER0_EL0" , 0x9F10, true, true, {} }, // 469 |
| 4219 | { "SPMEVTYPER1_EL0" , 0x9F11, true, true, {} }, // 470 |
| 4220 | { "SPMEVTYPER2_EL0" , 0x9F12, true, true, {} }, // 471 |
| 4221 | { "SPMEVTYPER3_EL0" , 0x9F13, true, true, {} }, // 472 |
| 4222 | { "SPMEVTYPER4_EL0" , 0x9F14, true, true, {} }, // 473 |
| 4223 | { "SPMEVTYPER5_EL0" , 0x9F15, true, true, {} }, // 474 |
| 4224 | { "SPMEVTYPER6_EL0" , 0x9F16, true, true, {} }, // 475 |
| 4225 | { "SPMEVTYPER7_EL0" , 0x9F17, true, true, {} }, // 476 |
| 4226 | { "SPMEVTYPER8_EL0" , 0x9F18, true, true, {} }, // 477 |
| 4227 | { "SPMEVTYPER9_EL0" , 0x9F19, true, true, {} }, // 478 |
| 4228 | { "SPMEVTYPER10_EL0" , 0x9F1A, true, true, {} }, // 479 |
| 4229 | { "SPMEVTYPER11_EL0" , 0x9F1B, true, true, {} }, // 480 |
| 4230 | { "SPMEVTYPER12_EL0" , 0x9F1C, true, true, {} }, // 481 |
| 4231 | { "SPMEVTYPER13_EL0" , 0x9F1D, true, true, {} }, // 482 |
| 4232 | { "SPMEVTYPER14_EL0" , 0x9F1E, true, true, {} }, // 483 |
| 4233 | { "SPMEVTYPER15_EL0" , 0x9F1F, true, true, {} }, // 484 |
| 4234 | { "SPMEVFILTR0_EL0" , 0x9F20, true, true, {} }, // 485 |
| 4235 | { "SPMEVFILTR1_EL0" , 0x9F21, true, true, {} }, // 486 |
| 4236 | { "SPMEVFILTR2_EL0" , 0x9F22, true, true, {} }, // 487 |
| 4237 | { "SPMEVFILTR3_EL0" , 0x9F23, true, true, {} }, // 488 |
| 4238 | { "SPMEVFILTR4_EL0" , 0x9F24, true, true, {} }, // 489 |
| 4239 | { "SPMEVFILTR5_EL0" , 0x9F25, true, true, {} }, // 490 |
| 4240 | { "SPMEVFILTR6_EL0" , 0x9F26, true, true, {} }, // 491 |
| 4241 | { "SPMEVFILTR7_EL0" , 0x9F27, true, true, {} }, // 492 |
| 4242 | { "SPMEVFILTR8_EL0" , 0x9F28, true, true, {} }, // 493 |
| 4243 | { "SPMEVFILTR9_EL0" , 0x9F29, true, true, {} }, // 494 |
| 4244 | { "SPMEVFILTR10_EL0" , 0x9F2A, true, true, {} }, // 495 |
| 4245 | { "SPMEVFILTR11_EL0" , 0x9F2B, true, true, {} }, // 496 |
| 4246 | { "SPMEVFILTR12_EL0" , 0x9F2C, true, true, {} }, // 497 |
| 4247 | { "SPMEVFILTR13_EL0" , 0x9F2D, true, true, {} }, // 498 |
| 4248 | { "SPMEVFILTR14_EL0" , 0x9F2E, true, true, {} }, // 499 |
| 4249 | { "SPMEVFILTR15_EL0" , 0x9F2F, true, true, {} }, // 500 |
| 4250 | { "SPMEVFILT2R0_EL0" , 0x9F30, true, true, {} }, // 501 |
| 4251 | { "SPMEVFILT2R1_EL0" , 0x9F31, true, true, {} }, // 502 |
| 4252 | { "SPMEVFILT2R2_EL0" , 0x9F32, true, true, {} }, // 503 |
| 4253 | { "SPMEVFILT2R3_EL0" , 0x9F33, true, true, {} }, // 504 |
| 4254 | { "SPMEVFILT2R4_EL0" , 0x9F34, true, true, {} }, // 505 |
| 4255 | { "SPMEVFILT2R5_EL0" , 0x9F35, true, true, {} }, // 506 |
| 4256 | { "SPMEVFILT2R6_EL0" , 0x9F36, true, true, {} }, // 507 |
| 4257 | { "SPMEVFILT2R7_EL0" , 0x9F37, true, true, {} }, // 508 |
| 4258 | { "SPMEVFILT2R8_EL0" , 0x9F38, true, true, {} }, // 509 |
| 4259 | { "SPMEVFILT2R9_EL0" , 0x9F39, true, true, {} }, // 510 |
| 4260 | { "SPMEVFILT2R10_EL0" , 0x9F3A, true, true, {} }, // 511 |
| 4261 | { "SPMEVFILT2R11_EL0" , 0x9F3B, true, true, {} }, // 512 |
| 4262 | { "SPMEVFILT2R12_EL0" , 0x9F3C, true, true, {} }, // 513 |
| 4263 | { "SPMEVFILT2R13_EL0" , 0x9F3D, true, true, {} }, // 514 |
| 4264 | { "SPMEVFILT2R14_EL0" , 0x9F3E, true, true, {} }, // 515 |
| 4265 | { "SPMEVFILT2R15_EL0" , 0x9F3F, true, true, {} }, // 516 |
| 4266 | { "DBGVCR32_EL2" , 0xA038, true, true, {} }, // 517 |
| 4267 | { "BRBCR_EL2" , 0xA480, true, true, {AArch64::FeatureBRBE} }, // 518 |
| 4268 | { "SPMACCESSR_EL2" , 0xA4EB, true, true, {} }, // 519 |
| 4269 | { "BRBCR_EL12" , 0xAC80, true, true, {AArch64::FeatureBRBE} }, // 520 |
| 4270 | { "SPMACCESSR_EL12" , 0xACEB, true, true, {} }, // 521 |
| 4271 | { "SPMACCESSR_EL3" , 0xB4EB, true, true, {} }, // 522 |
| 4272 | { "SPMROOTCR_EL3" , 0xB4F7, true, true, {} }, // 523 |
| 4273 | { "SPMSCR_EL1" , 0xBCF7, true, true, {} }, // 524 |
| 4274 | { "MIDR_EL1" , 0xC000, true, false, {} }, // 525 |
| 4275 | { "MPUIR_EL1" , 0xC004, true, true, {AArch64::HasV8_0rOps} }, // 526 |
| 4276 | { "MPIDR_EL1" , 0xC005, true, false, {} }, // 527 |
| 4277 | { "REVIDR_EL1" , 0xC006, true, false, {} }, // 528 |
| 4278 | { "ID_PFR0_EL1" , 0xC008, true, false, {} }, // 529 |
| 4279 | { "ID_PFR1_EL1" , 0xC009, true, false, {} }, // 530 |
| 4280 | { "ID_DFR0_EL1" , 0xC00A, true, false, {} }, // 531 |
| 4281 | { "ID_AFR0_EL1" , 0xC00B, true, false, {} }, // 532 |
| 4282 | { "ID_MMFR0_EL1" , 0xC00C, true, false, {} }, // 533 |
| 4283 | { "ID_MMFR1_EL1" , 0xC00D, true, false, {} }, // 534 |
| 4284 | { "ID_MMFR2_EL1" , 0xC00E, true, false, {} }, // 535 |
| 4285 | { "ID_MMFR3_EL1" , 0xC00F, true, false, {} }, // 536 |
| 4286 | { "ID_ISAR0_EL1" , 0xC010, true, false, {} }, // 537 |
| 4287 | { "ID_ISAR1_EL1" , 0xC011, true, false, {} }, // 538 |
| 4288 | { "ID_ISAR2_EL1" , 0xC012, true, false, {} }, // 539 |
| 4289 | { "ID_ISAR3_EL1" , 0xC013, true, false, {} }, // 540 |
| 4290 | { "ID_ISAR4_EL1" , 0xC014, true, false, {} }, // 541 |
| 4291 | { "ID_ISAR5_EL1" , 0xC015, true, false, {} }, // 542 |
| 4292 | { "ID_MMFR4_EL1" , 0xC016, true, false, {} }, // 543 |
| 4293 | { "ID_ISAR6_EL1" , 0xC017, true, false, {AArch64::HasV8_2aOps} }, // 544 |
| 4294 | { "MVFR0_EL1" , 0xC018, true, false, {} }, // 545 |
| 4295 | { "MVFR1_EL1" , 0xC019, true, false, {} }, // 546 |
| 4296 | { "MVFR2_EL1" , 0xC01A, true, false, {} }, // 547 |
| 4297 | { "ID_PFR2_EL1" , 0xC01C, true, false, {AArch64::FeatureSpecRestrict} }, // 548 |
| 4298 | { "ID_DFR1_EL1" , 0xC01D, true, false, {} }, // 549 |
| 4299 | { "ID_MMFR5_EL1" , 0xC01E, true, false, {} }, // 550 |
| 4300 | { "ID_AA64PFR0_EL1" , 0xC020, true, false, {} }, // 551 |
| 4301 | { "ID_AA64PFR1_EL1" , 0xC021, true, false, {} }, // 552 |
| 4302 | { "ID_AA64PFR2_EL1" , 0xC022, true, false, {} }, // 553 |
| 4303 | { "ID_AA64ZFR0_EL1" , 0xC024, true, false, {AArch64::FeatureSVE} }, // 554 |
| 4304 | { "ID_AA64SMFR0_EL1" , 0xC025, true, false, {AArch64::FeatureSME} }, // 555 |
| 4305 | { "ID_AA64FPFR0_EL1" , 0xC027, true, false, {} }, // 556 |
| 4306 | { "ID_AA64DFR0_EL1" , 0xC028, true, false, {} }, // 557 |
| 4307 | { "ID_AA64DFR1_EL1" , 0xC029, true, false, {} }, // 558 |
| 4308 | { "ID_AA64DFR2_EL1" , 0xC02A, true, false, {} }, // 559 |
| 4309 | { "ID_AA64AFR0_EL1" , 0xC02C, true, false, {} }, // 560 |
| 4310 | { "ID_AA64AFR1_EL1" , 0xC02D, true, false, {} }, // 561 |
| 4311 | { "ID_AA64ISAR0_EL1" , 0xC030, true, false, {} }, // 562 |
| 4312 | { "ID_AA64ISAR1_EL1" , 0xC031, true, false, {} }, // 563 |
| 4313 | { "ID_AA64ISAR2_EL1" , 0xC032, true, false, {} }, // 564 |
| 4314 | { "ID_AA64ISAR3_EL1" , 0xC033, true, false, {} }, // 565 |
| 4315 | { "ID_AA64MMFR0_EL1" , 0xC038, true, false, {} }, // 566 |
| 4316 | { "ID_AA64MMFR1_EL1" , 0xC039, true, false, {} }, // 567 |
| 4317 | { "ID_AA64MMFR2_EL1" , 0xC03A, true, false, {} }, // 568 |
| 4318 | { "ID_AA64MMFR3_EL1" , 0xC03B, true, false, {} }, // 569 |
| 4319 | { "ID_AA64MMFR4_EL1" , 0xC03C, true, false, {} }, // 570 |
| 4320 | { "SCTLR_EL1" , 0xC080, true, true, {} }, // 571 |
| 4321 | { "ACTLR_EL1" , 0xC081, true, true, {} }, // 572 |
| 4322 | { "CPACR_EL1" , 0xC082, true, true, {} }, // 573 |
| 4323 | { "SCTLR2_EL1" , 0xC083, true, true, {} }, // 574 |
| 4324 | { "RGSR_EL1" , 0xC085, true, true, {AArch64::FeatureMTE} }, // 575 |
| 4325 | { "GCR_EL1" , 0xC086, true, true, {AArch64::FeatureMTE} }, // 576 |
| 4326 | { "ZCR_EL1" , 0xC090, true, true, {AArch64::FeatureSVE} }, // 577 |
| 4327 | { "TRFCR_EL1" , 0xC091, true, true, {AArch64::FeatureTRACEV8_4} }, // 578 |
| 4328 | { "TRCITECR_EL1" , 0xC093, true, true, {AArch64::FeatureITE} }, // 579 |
| 4329 | { "SMPRI_EL1" , 0xC094, true, true, {AArch64::FeatureSME} }, // 580 |
| 4330 | { "SMCR_EL1" , 0xC096, true, true, {AArch64::FeatureSME} }, // 581 |
| 4331 | { "SCTLRMASK_EL1" , 0xC0A0, true, true, {} }, // 582 |
| 4332 | { "ACTLRMASK_EL1" , 0xC0A1, true, true, {} }, // 583 |
| 4333 | { "CPACRMASK_EL1" , 0xC0A2, true, true, {} }, // 584 |
| 4334 | { "SCTLR2MASK_EL1" , 0xC0A3, true, true, {} }, // 585 |
| 4335 | { "CPACRALIAS_EL1" , 0xC0A4, true, true, {} }, // 586 |
| 4336 | { "ACTLRALIAS_EL1" , 0xC0A5, true, true, {} }, // 587 |
| 4337 | { "SCTLRALIAS_EL1" , 0xC0A6, true, true, {} }, // 588 |
| 4338 | { "SCTLR2ALIAS_EL1" , 0xC0A7, true, true, {} }, // 589 |
| 4339 | { "TTBR0_EL1" , 0xC100, true, true, {} }, // 590 |
| 4340 | { "TTBR1_EL1" , 0xC101, true, true, {} }, // 591 |
| 4341 | { "TCR_EL1" , 0xC102, true, true, {} }, // 592 |
| 4342 | { "TCR2_EL1" , 0xC103, true, true, {} }, // 593 |
| 4343 | { "IRTBRU_EL1" , 0xC104, true, true, {} }, // 594 |
| 4344 | { "IRTBRP_EL1" , 0xC105, true, true, {} }, // 595 |
| 4345 | { "DPOTBR0_EL1" , 0xC106, true, true, {} }, // 596 |
| 4346 | { "DPOTBR1_EL1" , 0xC107, true, true, {} }, // 597 |
| 4347 | { "APIAKeyLo_EL1" , 0xC108, true, true, {AArch64::FeaturePAuth} }, // 598 |
| 4348 | { "APIAKeyHi_EL1" , 0xC109, true, true, {AArch64::FeaturePAuth} }, // 599 |
| 4349 | { "APIBKeyLo_EL1" , 0xC10A, true, true, {AArch64::FeaturePAuth} }, // 600 |
| 4350 | { "APIBKeyHi_EL1" , 0xC10B, true, true, {AArch64::FeaturePAuth} }, // 601 |
| 4351 | { "LDSTT_EL1" , 0xC10F, true, true, {} }, // 602 |
| 4352 | { "APDAKeyLo_EL1" , 0xC110, true, true, {AArch64::FeaturePAuth} }, // 603 |
| 4353 | { "APDAKeyHi_EL1" , 0xC111, true, true, {AArch64::FeaturePAuth} }, // 604 |
| 4354 | { "APDBKeyLo_EL1" , 0xC112, true, true, {AArch64::FeaturePAuth} }, // 605 |
| 4355 | { "APDBKeyHi_EL1" , 0xC113, true, true, {AArch64::FeaturePAuth} }, // 606 |
| 4356 | { "TPMIN0_EL1" , 0xC114, true, true, {} }, // 607 |
| 4357 | { "TPMAX0_EL1" , 0xC115, true, true, {} }, // 608 |
| 4358 | { "TPMIN1_EL1" , 0xC116, true, true, {} }, // 609 |
| 4359 | { "TPMAX1_EL1" , 0xC117, true, true, {} }, // 610 |
| 4360 | { "APGAKeyLo_EL1" , 0xC118, true, true, {AArch64::FeaturePAuth} }, // 611 |
| 4361 | { "APGAKeyHi_EL1" , 0xC119, true, true, {AArch64::FeaturePAuth} }, // 612 |
| 4362 | { "GCSCR_EL1" , 0xC128, true, true, {} }, // 613 |
| 4363 | { "GCSPR_EL1" , 0xC129, true, true, {} }, // 614 |
| 4364 | { "GCSCRE0_EL1" , 0xC12A, true, true, {} }, // 615 |
| 4365 | { "TCRMASK_EL1" , 0xC13A, true, true, {} }, // 616 |
| 4366 | { "TCR2MASK_EL1" , 0xC13B, true, true, {} }, // 617 |
| 4367 | { "TCRALIAS_EL1" , 0xC13E, true, true, {} }, // 618 |
| 4368 | { "TCR2ALIAS_EL1" , 0xC13F, true, true, {} }, // 619 |
| 4369 | { "FGDTP0_EL1" , 0xC190, true, true, {} }, // 620 |
| 4370 | { "FGDTP1_EL1" , 0xC191, true, true, {} }, // 621 |
| 4371 | { "FGDTP2_EL1" , 0xC192, true, true, {} }, // 622 |
| 4372 | { "FGDTP3_EL1" , 0xC193, true, true, {} }, // 623 |
| 4373 | { "FGDTP4_EL1" , 0xC194, true, true, {} }, // 624 |
| 4374 | { "FGDTP5_EL1" , 0xC195, true, true, {} }, // 625 |
| 4375 | { "FGDTP6_EL1" , 0xC196, true, true, {} }, // 626 |
| 4376 | { "FGDTP7_EL1" , 0xC197, true, true, {} }, // 627 |
| 4377 | { "FGDTP8_EL1" , 0xC198, true, true, {} }, // 628 |
| 4378 | { "FGDTP9_EL1" , 0xC199, true, true, {} }, // 629 |
| 4379 | { "FGDTP10_EL1" , 0xC19A, true, true, {} }, // 630 |
| 4380 | { "FGDTP11_EL1" , 0xC19B, true, true, {} }, // 631 |
| 4381 | { "FGDTP12_EL1" , 0xC19C, true, true, {} }, // 632 |
| 4382 | { "FGDTP13_EL1" , 0xC19D, true, true, {} }, // 633 |
| 4383 | { "FGDTP14_EL1" , 0xC19E, true, true, {} }, // 634 |
| 4384 | { "FGDTP15_EL1" , 0xC19F, true, true, {} }, // 635 |
| 4385 | { "FGDTU0_EL1" , 0xC1A0, true, true, {} }, // 636 |
| 4386 | { "FGDTU1_EL1" , 0xC1A1, true, true, {} }, // 637 |
| 4387 | { "FGDTU2_EL1" , 0xC1A2, true, true, {} }, // 638 |
| 4388 | { "FGDTU3_EL1" , 0xC1A3, true, true, {} }, // 639 |
| 4389 | { "FGDTU4_EL1" , 0xC1A4, true, true, {} }, // 640 |
| 4390 | { "FGDTU5_EL1" , 0xC1A5, true, true, {} }, // 641 |
| 4391 | { "FGDTU6_EL1" , 0xC1A6, true, true, {} }, // 642 |
| 4392 | { "FGDTU7_EL1" , 0xC1A7, true, true, {} }, // 643 |
| 4393 | { "FGDTU8_EL1" , 0xC1A8, true, true, {} }, // 644 |
| 4394 | { "FGDTU9_EL1" , 0xC1A9, true, true, {} }, // 645 |
| 4395 | { "FGDTU10_EL1" , 0xC1AA, true, true, {} }, // 646 |
| 4396 | { "FGDTU11_EL1" , 0xC1AB, true, true, {} }, // 647 |
| 4397 | { "FGDTU12_EL1" , 0xC1AC, true, true, {} }, // 648 |
| 4398 | { "FGDTU13_EL1" , 0xC1AD, true, true, {} }, // 649 |
| 4399 | { "FGDTU14_EL1" , 0xC1AE, true, true, {} }, // 650 |
| 4400 | { "FGDTU15_EL1" , 0xC1AF, true, true, {} }, // 651 |
| 4401 | { "AFGDTP0_EL1" , 0xC1B0, true, true, {} }, // 652 |
| 4402 | { "AFGDTP1_EL1" , 0xC1B1, true, true, {} }, // 653 |
| 4403 | { "AFGDTP2_EL1" , 0xC1B2, true, true, {} }, // 654 |
| 4404 | { "AFGDTP3_EL1" , 0xC1B3, true, true, {} }, // 655 |
| 4405 | { "AFGDTP4_EL1" , 0xC1B4, true, true, {} }, // 656 |
| 4406 | { "AFGDTP5_EL1" , 0xC1B5, true, true, {} }, // 657 |
| 4407 | { "AFGDTP6_EL1" , 0xC1B6, true, true, {} }, // 658 |
| 4408 | { "AFGDTP7_EL1" , 0xC1B7, true, true, {} }, // 659 |
| 4409 | { "AFGDTP8_EL1" , 0xC1B8, true, true, {} }, // 660 |
| 4410 | { "AFGDTP9_EL1" , 0xC1B9, true, true, {} }, // 661 |
| 4411 | { "AFGDTP10_EL1" , 0xC1BA, true, true, {} }, // 662 |
| 4412 | { "AFGDTP11_EL1" , 0xC1BB, true, true, {} }, // 663 |
| 4413 | { "AFGDTP12_EL1" , 0xC1BC, true, true, {} }, // 664 |
| 4414 | { "AFGDTP13_EL1" , 0xC1BD, true, true, {} }, // 665 |
| 4415 | { "AFGDTP14_EL1" , 0xC1BE, true, true, {} }, // 666 |
| 4416 | { "AFGDTP15_EL1" , 0xC1BF, true, true, {} }, // 667 |
| 4417 | { "AFGDTU0_EL1" , 0xC1C0, true, true, {} }, // 668 |
| 4418 | { "AFGDTU1_EL1" , 0xC1C1, true, true, {} }, // 669 |
| 4419 | { "AFGDTU2_EL1" , 0xC1C2, true, true, {} }, // 670 |
| 4420 | { "AFGDTU3_EL1" , 0xC1C3, true, true, {} }, // 671 |
| 4421 | { "AFGDTU4_EL1" , 0xC1C4, true, true, {} }, // 672 |
| 4422 | { "AFGDTU5_EL1" , 0xC1C5, true, true, {} }, // 673 |
| 4423 | { "AFGDTU6_EL1" , 0xC1C6, true, true, {} }, // 674 |
| 4424 | { "AFGDTU7_EL1" , 0xC1C7, true, true, {} }, // 675 |
| 4425 | { "AFGDTU8_EL1" , 0xC1C8, true, true, {} }, // 676 |
| 4426 | { "AFGDTU9_EL1" , 0xC1C9, true, true, {} }, // 677 |
| 4427 | { "AFGDTU10_EL1" , 0xC1CA, true, true, {} }, // 678 |
| 4428 | { "AFGDTU11_EL1" , 0xC1CB, true, true, {} }, // 679 |
| 4429 | { "AFGDTU12_EL1" , 0xC1CC, true, true, {} }, // 680 |
| 4430 | { "AFGDTU13_EL1" , 0xC1CD, true, true, {} }, // 681 |
| 4431 | { "AFGDTU14_EL1" , 0xC1CE, true, true, {} }, // 682 |
| 4432 | { "AFGDTU15_EL1" , 0xC1CF, true, true, {} }, // 683 |
| 4433 | { "SPSR_EL1" , 0xC200, true, true, {} }, // 684 |
| 4434 | { "ELR_EL1" , 0xC201, true, true, {} }, // 685 |
| 4435 | { "STINDEX_EL1" , 0xC202, true, true, {} }, // 686 |
| 4436 | { "TINDEX_EL1" , 0xC203, true, true, {} }, // 687 |
| 4437 | { "SP_EL0" , 0xC208, true, true, {} }, // 688 |
| 4438 | { "SPSel" , 0xC210, true, true, {} }, // 689 |
| 4439 | { "CurrentEL" , 0xC212, true, false, {} }, // 690 |
| 4440 | { "PAN" , 0xC213, true, true, {AArch64::FeaturePAN} }, // 691 |
| 4441 | { "UAO" , 0xC214, true, true, {AArch64::FeaturePsUAO} }, // 692 |
| 4442 | { "ALLINT" , 0xC218, true, true, {AArch64::FeatureNMI} }, // 693 |
| 4443 | { "PM" , 0xC219, true, true, {} }, // 694 |
| 4444 | { "ICC_PMR_EL1" , 0xC230, true, true, {} }, // 695 |
| 4445 | { "AFSR0_EL1" , 0xC288, true, true, {} }, // 696 |
| 4446 | { "AFSR1_EL1" , 0xC289, true, true, {} }, // 697 |
| 4447 | { "ESR_EL1" , 0xC290, true, true, {} }, // 698 |
| 4448 | { "ERRIDR_EL1" , 0xC298, true, false, {AArch64::FeatureRAS} }, // 699 |
| 4449 | { "ERRSELR_EL1" , 0xC299, true, true, {AArch64::FeatureRAS} }, // 700 |
| 4450 | { "ERXGSR_EL1" , 0xC29A, true, false, {AArch64::FeatureRASv2} }, // 701 |
| 4451 | { "ERXFR_EL1" , 0xC2A0, true, false, {AArch64::FeatureRAS} }, // 702 |
| 4452 | { "ERXCTLR_EL1" , 0xC2A1, true, true, {AArch64::FeatureRAS} }, // 703 |
| 4453 | { "ERXSTATUS_EL1" , 0xC2A2, true, true, {AArch64::FeatureRAS} }, // 704 |
| 4454 | { "ERXADDR_EL1" , 0xC2A3, true, true, {AArch64::FeatureRAS} }, // 705 |
| 4455 | { "ERXPFGF_EL1" , 0xC2A4, true, false, {} }, // 706 |
| 4456 | { "ERXPFGCTL_EL1" , 0xC2A5, true, true, {} }, // 707 |
| 4457 | { "ERXPFGCDN_EL1" , 0xC2A6, true, true, {} }, // 708 |
| 4458 | { "ERXMISC0_EL1" , 0xC2A8, true, true, {AArch64::FeatureRAS} }, // 709 |
| 4459 | { "ERXMISC1_EL1" , 0xC2A9, true, true, {AArch64::FeatureRAS} }, // 710 |
| 4460 | { "ERXMISC2_EL1" , 0xC2AA, true, true, {} }, // 711 |
| 4461 | { "ERXMISC3_EL1" , 0xC2AB, true, true, {} }, // 712 |
| 4462 | { "TFSR_EL1" , 0xC2B0, true, true, {AArch64::FeatureMTE} }, // 713 |
| 4463 | { "TFSRE0_EL1" , 0xC2B1, true, true, {AArch64::FeatureMTE} }, // 714 |
| 4464 | { "FAR_EL1" , 0xC300, true, true, {} }, // 715 |
| 4465 | { "PFAR_EL1" , 0xC305, true, true, {} }, // 716 |
| 4466 | { "PRENR_EL1" , 0xC309, true, true, {AArch64::HasV8_0rOps} }, // 717 |
| 4467 | { "PRSELR_EL1" , 0xC311, true, true, {AArch64::HasV8_0rOps} }, // 718 |
| 4468 | { "PRBAR_EL1" , 0xC340, true, true, {AArch64::HasV8_0rOps} }, // 719 |
| 4469 | { "PRLAR_EL1" , 0xC341, true, true, {AArch64::HasV8_0rOps} }, // 720 |
| 4470 | { "PRBAR1_EL1" , 0xC344, true, true, {AArch64::HasV8_0rOps} }, // 721 |
| 4471 | { "PRLAR1_EL1" , 0xC345, true, true, {AArch64::HasV8_0rOps} }, // 722 |
| 4472 | { "PRBAR2_EL1" , 0xC348, true, true, {AArch64::HasV8_0rOps} }, // 723 |
| 4473 | { "PRLAR2_EL1" , 0xC349, true, true, {AArch64::HasV8_0rOps} }, // 724 |
| 4474 | { "PRBAR3_EL1" , 0xC34C, true, true, {AArch64::HasV8_0rOps} }, // 725 |
| 4475 | { "PRLAR3_EL1" , 0xC34D, true, true, {AArch64::HasV8_0rOps} }, // 726 |
| 4476 | { "PRBAR4_EL1" , 0xC350, true, true, {AArch64::HasV8_0rOps} }, // 727 |
| 4477 | { "PRLAR4_EL1" , 0xC351, true, true, {AArch64::HasV8_0rOps} }, // 728 |
| 4478 | { "PRBAR5_EL1" , 0xC354, true, true, {AArch64::HasV8_0rOps} }, // 729 |
| 4479 | { "PRLAR5_EL1" , 0xC355, true, true, {AArch64::HasV8_0rOps} }, // 730 |
| 4480 | { "PRBAR6_EL1" , 0xC358, true, true, {AArch64::HasV8_0rOps} }, // 731 |
| 4481 | { "PRLAR6_EL1" , 0xC359, true, true, {AArch64::HasV8_0rOps} }, // 732 |
| 4482 | { "PRBAR7_EL1" , 0xC35C, true, true, {AArch64::HasV8_0rOps} }, // 733 |
| 4483 | { "PRLAR7_EL1" , 0xC35D, true, true, {AArch64::HasV8_0rOps} }, // 734 |
| 4484 | { "PRBAR8_EL1" , 0xC360, true, true, {AArch64::HasV8_0rOps} }, // 735 |
| 4485 | { "PRLAR8_EL1" , 0xC361, true, true, {AArch64::HasV8_0rOps} }, // 736 |
| 4486 | { "PRBAR9_EL1" , 0xC364, true, true, {AArch64::HasV8_0rOps} }, // 737 |
| 4487 | { "PRLAR9_EL1" , 0xC365, true, true, {AArch64::HasV8_0rOps} }, // 738 |
| 4488 | { "PRBAR10_EL1" , 0xC368, true, true, {AArch64::HasV8_0rOps} }, // 739 |
| 4489 | { "PRLAR10_EL1" , 0xC369, true, true, {AArch64::HasV8_0rOps} }, // 740 |
| 4490 | { "PRBAR11_EL1" , 0xC36C, true, true, {AArch64::HasV8_0rOps} }, // 741 |
| 4491 | { "PRLAR11_EL1" , 0xC36D, true, true, {AArch64::HasV8_0rOps} }, // 742 |
| 4492 | { "PRBAR12_EL1" , 0xC370, true, true, {AArch64::HasV8_0rOps} }, // 743 |
| 4493 | { "PRLAR12_EL1" , 0xC371, true, true, {AArch64::HasV8_0rOps} }, // 744 |
| 4494 | { "PRBAR13_EL1" , 0xC374, true, true, {AArch64::HasV8_0rOps} }, // 745 |
| 4495 | { "PRLAR13_EL1" , 0xC375, true, true, {AArch64::HasV8_0rOps} }, // 746 |
| 4496 | { "PRBAR14_EL1" , 0xC378, true, true, {AArch64::HasV8_0rOps} }, // 747 |
| 4497 | { "PRLAR14_EL1" , 0xC379, true, true, {AArch64::HasV8_0rOps} }, // 748 |
| 4498 | { "PRBAR15_EL1" , 0xC37C, true, true, {AArch64::HasV8_0rOps} }, // 749 |
| 4499 | { "PRLAR15_EL1" , 0xC37D, true, true, {AArch64::HasV8_0rOps} }, // 750 |
| 4500 | { "PAR_EL1" , 0xC3A0, true, true, {} }, // 751 |
| 4501 | { "PMSCR_EL1" , 0xC4C8, true, true, {AArch64::FeatureSPE} }, // 752 |
| 4502 | { "PMSNEVFR_EL1" , 0xC4C9, true, true, {AArch64::FeatureSPE_EEF} }, // 753 |
| 4503 | { "PMSICR_EL1" , 0xC4CA, true, true, {AArch64::FeatureSPE} }, // 754 |
| 4504 | { "PMSIRR_EL1" , 0xC4CB, true, true, {AArch64::FeatureSPE} }, // 755 |
| 4505 | { "PMSFCR_EL1" , 0xC4CC, true, true, {AArch64::FeatureSPE} }, // 756 |
| 4506 | { "PMSEVFR_EL1" , 0xC4CD, true, true, {AArch64::FeatureSPE} }, // 757 |
| 4507 | { "PMSLATFR_EL1" , 0xC4CE, true, true, {AArch64::FeatureSPE} }, // 758 |
| 4508 | { "PMSIDR_EL1" , 0xC4CF, true, false, {AArch64::FeatureSPE} }, // 759 |
| 4509 | { "PMBLIMITR_EL1" , 0xC4D0, true, true, {AArch64::FeatureSPE} }, // 760 |
| 4510 | { "PMBPTR_EL1" , 0xC4D1, true, true, {AArch64::FeatureSPE} }, // 761 |
| 4511 | { "PMBSR_EL1" , 0xC4D3, true, true, {AArch64::FeatureSPE} }, // 762 |
| 4512 | { "PMSDSFR_EL1" , 0xC4D4, true, true, {} }, // 763 |
| 4513 | { "PMBMAR_EL1" , 0xC4D5, true, true, {} }, // 764 |
| 4514 | { "PMBIDR_EL1" , 0xC4D7, true, false, {AArch64::FeatureSPE} }, // 765 |
| 4515 | { "TRBLIMITR_EL1" , 0xC4D8, true, true, {AArch64::FeatureTRBE} }, // 766 |
| 4516 | { "TRBPTR_EL1" , 0xC4D9, true, true, {AArch64::FeatureTRBE} }, // 767 |
| 4517 | { "TRBBASER_EL1" , 0xC4DA, true, true, {AArch64::FeatureTRBE} }, // 768 |
| 4518 | { "TRBSR_EL1" , 0xC4DB, true, true, {AArch64::FeatureTRBE} }, // 769 |
| 4519 | { "TRBMAR_EL1" , 0xC4DC, true, true, {AArch64::FeatureTRBE} }, // 770 |
| 4520 | { "TRBMPAM_EL1" , 0xC4DD, true, true, {AArch64::FeatureTRBE} }, // 771 |
| 4521 | { "TRBTRG_EL1" , 0xC4DE, true, true, {AArch64::FeatureTRBE} }, // 772 |
| 4522 | { "TRBIDR_EL1" , 0xC4DF, true, false, {AArch64::FeatureTRBE} }, // 773 |
| 4523 | { "PMSSCR_EL1" , 0xC4EB, true, true, {} }, // 774 |
| 4524 | { "PMINTENSET_EL1" , 0xC4F1, true, true, {} }, // 775 |
| 4525 | { "PMINTENCLR_EL1" , 0xC4F2, true, true, {} }, // 776 |
| 4526 | { "PMUACR_EL1" , 0xC4F4, true, true, {} }, // 777 |
| 4527 | { "PMECR_EL1" , 0xC4F5, true, true, {} }, // 778 |
| 4528 | { "PMMIR_EL1" , 0xC4F6, true, false, {} }, // 779 |
| 4529 | { "PMIAR_EL1" , 0xC4F7, true, true, {} }, // 780 |
| 4530 | { "MAIR_EL1" , 0xC510, true, true, {} }, // 781 |
| 4531 | { "MAIR2_EL1" , 0xC511, true, true, {} }, // 782 |
| 4532 | { "PIRE0_EL1" , 0xC512, true, true, {} }, // 783 |
| 4533 | { "PIR_EL1" , 0xC513, true, true, {} }, // 784 |
| 4534 | { "POR_EL1" , 0xC514, true, true, {} }, // 785 |
| 4535 | { "S2POR_EL1" , 0xC515, true, true, {} }, // 786 |
| 4536 | { "TTTBRU_EL1" , 0xC516, true, true, {} }, // 787 |
| 4537 | { "TTTBRP_EL1" , 0xC517, true, true, {} }, // 788 |
| 4538 | { "AMAIR_EL1" , 0xC518, true, true, {} }, // 789 |
| 4539 | { "AMAIR2_EL1" , 0xC519, true, true, {} }, // 790 |
| 4540 | { "LORSA_EL1" , 0xC520, true, true, {AArch64::FeatureLOR} }, // 791 |
| 4541 | { "LOREA_EL1" , 0xC521, true, true, {AArch64::FeatureLOR} }, // 792 |
| 4542 | { "LORN_EL1" , 0xC522, true, true, {AArch64::FeatureLOR} }, // 793 |
| 4543 | { "LORC_EL1" , 0xC523, true, true, {AArch64::FeatureLOR} }, // 794 |
| 4544 | { "MPAMIDR_EL1" , 0xC524, true, false, {} }, // 795 |
| 4545 | { "MPAMBWIDR_EL1" , 0xC525, true, false, {} }, // 796 |
| 4546 | { "TLBIDIDR_EL1" , 0xC526, true, false, {} }, // 797 |
| 4547 | { "LORID_EL1" , 0xC527, true, false, {AArch64::FeatureLOR} }, // 798 |
| 4548 | { "MPAM1_EL1" , 0xC528, true, true, {} }, // 799 |
| 4549 | { "MPAM0_EL1" , 0xC529, true, true, {} }, // 800 |
| 4550 | { "MPAMCTL_EL1" , 0xC52A, true, true, {} }, // 801 |
| 4551 | { "MPAMSM_EL1" , 0xC52B, true, true, {AArch64::FeatureMPAM, AArch64::FeatureSME} }, // 802 |
| 4552 | { "MPAMBW1_EL1" , 0xC52C, true, true, {} }, // 803 |
| 4553 | { "MPAMBW0_EL1" , 0xC52D, true, true, {} }, // 804 |
| 4554 | { "MPAMBWSM_EL1" , 0xC52F, true, true, {} }, // 805 |
| 4555 | { "VBAR_EL1" , 0xC600, true, true, {} }, // 806 |
| 4556 | { "RVBAR_EL1" , 0xC601, true, false, {} }, // 807 |
| 4557 | { "RMR_EL1" , 0xC602, true, true, {} }, // 808 |
| 4558 | { "ISR_EL1" , 0xC608, true, false, {} }, // 809 |
| 4559 | { "DISR_EL1" , 0xC609, true, true, {AArch64::FeatureRAS} }, // 810 |
| 4560 | { "ICC_IAR0_EL1" , 0xC640, true, false, {} }, // 811 |
| 4561 | { "ICC_EOIR0_EL1" , 0xC641, false, true, {} }, // 812 |
| 4562 | { "ICC_HPPIR0_EL1" , 0xC642, true, false, {} }, // 813 |
| 4563 | { "ICC_BPR0_EL1" , 0xC643, true, true, {} }, // 814 |
| 4564 | { "ICC_AP0R0_EL1" , 0xC644, true, true, {} }, // 815 |
| 4565 | { "ICC_AP0R1_EL1" , 0xC645, true, true, {} }, // 816 |
| 4566 | { "ICC_AP0R2_EL1" , 0xC646, true, true, {} }, // 817 |
| 4567 | { "ICC_AP0R3_EL1" , 0xC647, true, true, {} }, // 818 |
| 4568 | { "ICC_AP1R0_EL1" , 0xC648, true, true, {} }, // 819 |
| 4569 | { "ICC_AP1R1_EL1" , 0xC649, true, true, {} }, // 820 |
| 4570 | { "ICC_AP1R2_EL1" , 0xC64A, true, true, {} }, // 821 |
| 4571 | { "ICC_AP1R3_EL1" , 0xC64B, true, true, {} }, // 822 |
| 4572 | { "ICC_NMIAR1_EL1" , 0xC64D, true, false, {AArch64::FeatureNMI} }, // 823 |
| 4573 | { "ICC_PPI_HMR0_EL1" , 0xC650, true, true, {} }, // 824 |
| 4574 | { "ICV_PPI_HMR0_EL1" , 0xC650, true, true, {} }, // 825 |
| 4575 | { "ICC_PPI_HMR1_EL1" , 0xC651, true, true, {} }, // 826 |
| 4576 | { "ICV_PPI_HMR1_EL1" , 0xC651, true, true, {} }, // 827 |
| 4577 | { "ICC_IDR0_EL1" , 0xC652, true, false, {} }, // 828 |
| 4578 | { "ICC_HPPIR_EL1" , 0xC653, true, false, {} }, // 829 |
| 4579 | { "ICV_HPPIR_EL1" , 0xC653, true, true, {} }, // 830 |
| 4580 | { "ICC_ICSR_EL1" , 0xC654, true, true, {} }, // 831 |
| 4581 | { "ICC_IAFFIDR_EL1" , 0xC655, true, false, {} }, // 832 |
| 4582 | { "ICC_PPI_ENABLER0_EL1" , 0xC656, true, true, {} }, // 833 |
| 4583 | { "ICV_PPI_ENABLER0_EL1" , 0xC656, true, true, {} }, // 834 |
| 4584 | { "ICC_PPI_ENABLER1_EL1" , 0xC657, true, true, {} }, // 835 |
| 4585 | { "ICV_PPI_ENABLER1_EL1" , 0xC657, true, true, {} }, // 836 |
| 4586 | { "ICC_DIR_EL1" , 0xC659, false, true, {} }, // 837 |
| 4587 | { "ICC_RPR_EL1" , 0xC65B, true, false, {} }, // 838 |
| 4588 | { "ICC_SGI1R_EL1" , 0xC65D, false, true, {} }, // 839 |
| 4589 | { "ICC_ASGI1R_EL1" , 0xC65E, false, true, {} }, // 840 |
| 4590 | { "ICC_SGI0R_EL1" , 0xC65F, false, true, {} }, // 841 |
| 4591 | { "ICC_IAR1_EL1" , 0xC660, true, false, {} }, // 842 |
| 4592 | { "ICC_EOIR1_EL1" , 0xC661, false, true, {} }, // 843 |
| 4593 | { "ICC_HPPIR1_EL1" , 0xC662, true, false, {} }, // 844 |
| 4594 | { "ICC_BPR1_EL1" , 0xC663, true, true, {} }, // 845 |
| 4595 | { "ICC_CTLR_EL1" , 0xC664, true, true, {} }, // 846 |
| 4596 | { "ICC_SRE_EL1" , 0xC665, true, true, {} }, // 847 |
| 4597 | { "ICC_IGRPEN0_EL1" , 0xC666, true, true, {} }, // 848 |
| 4598 | { "ICC_IGRPEN1_EL1" , 0xC667, true, true, {} }, // 849 |
| 4599 | { "ICC_PPI_CACTIVER0_EL1" , 0xC668, true, true, {} }, // 850 |
| 4600 | { "ICV_PPI_CACTIVER0_EL1" , 0xC668, true, true, {} }, // 851 |
| 4601 | { "ICC_PPI_CACTIVER1_EL1" , 0xC669, true, true, {} }, // 852 |
| 4602 | { "ICV_PPI_CACTIVER1_EL1" , 0xC669, true, true, {} }, // 853 |
| 4603 | { "ICC_PPI_SACTIVER0_EL1" , 0xC66A, true, true, {} }, // 854 |
| 4604 | { "ICV_PPI_SACTIVER0_EL1" , 0xC66A, true, true, {} }, // 855 |
| 4605 | { "ICC_PPI_SACTIVER1_EL1" , 0xC66B, true, true, {} }, // 856 |
| 4606 | { "ICV_PPI_SACTIVER1_EL1" , 0xC66B, true, true, {} }, // 857 |
| 4607 | { "ICC_PPI_CPENDR0_EL1" , 0xC66C, true, true, {} }, // 858 |
| 4608 | { "ICV_PPI_CPENDR0_EL1" , 0xC66C, true, true, {} }, // 859 |
| 4609 | { "ICC_PPI_CPENDR1_EL1" , 0xC66D, true, true, {} }, // 860 |
| 4610 | { "ICV_PPI_CPENDR1_EL1" , 0xC66D, true, true, {} }, // 861 |
| 4611 | { "ICC_PPI_SPENDR0_EL1" , 0xC66E, true, true, {} }, // 862 |
| 4612 | { "ICV_PPI_SPENDR0_EL1" , 0xC66E, true, true, {} }, // 863 |
| 4613 | { "ICC_PPI_SPENDR1_EL1" , 0xC66F, true, true, {} }, // 864 |
| 4614 | { "ICV_PPI_SPENDR1_EL1" , 0xC66F, true, true, {} }, // 865 |
| 4615 | { "ICC_PPI_PRIORITYR0_EL1" , 0xC670, true, true, {} }, // 866 |
| 4616 | { "ICV_PPI_PRIORITYR0_EL1" , 0xC670, true, true, {} }, // 867 |
| 4617 | { "ICC_PPI_PRIORITYR1_EL1" , 0xC671, true, true, {} }, // 868 |
| 4618 | { "ICV_PPI_PRIORITYR1_EL1" , 0xC671, true, true, {} }, // 869 |
| 4619 | { "ICC_PPI_PRIORITYR2_EL1" , 0xC672, true, true, {} }, // 870 |
| 4620 | { "ICV_PPI_PRIORITYR2_EL1" , 0xC672, true, true, {} }, // 871 |
| 4621 | { "ICC_PPI_PRIORITYR3_EL1" , 0xC673, true, true, {} }, // 872 |
| 4622 | { "ICV_PPI_PRIORITYR3_EL1" , 0xC673, true, true, {} }, // 873 |
| 4623 | { "ICC_PPI_PRIORITYR4_EL1" , 0xC674, true, true, {} }, // 874 |
| 4624 | { "ICV_PPI_PRIORITYR4_EL1" , 0xC674, true, true, {} }, // 875 |
| 4625 | { "ICC_PPI_PRIORITYR5_EL1" , 0xC675, true, true, {} }, // 876 |
| 4626 | { "ICV_PPI_PRIORITYR5_EL1" , 0xC675, true, true, {} }, // 877 |
| 4627 | { "ICC_PPI_PRIORITYR6_EL1" , 0xC676, true, true, {} }, // 878 |
| 4628 | { "ICV_PPI_PRIORITYR6_EL1" , 0xC676, true, true, {} }, // 879 |
| 4629 | { "ICC_PPI_PRIORITYR7_EL1" , 0xC677, true, true, {} }, // 880 |
| 4630 | { "ICV_PPI_PRIORITYR7_EL1" , 0xC677, true, true, {} }, // 881 |
| 4631 | { "ICC_PPI_PRIORITYR8_EL1" , 0xC678, true, true, {} }, // 882 |
| 4632 | { "ICV_PPI_PRIORITYR8_EL1" , 0xC678, true, true, {} }, // 883 |
| 4633 | { "ICC_PPI_PRIORITYR9_EL1" , 0xC679, true, true, {} }, // 884 |
| 4634 | { "ICV_PPI_PRIORITYR9_EL1" , 0xC679, true, true, {} }, // 885 |
| 4635 | { "ICC_PPI_PRIORITYR10_EL1" , 0xC67A, true, true, {} }, // 886 |
| 4636 | { "ICV_PPI_PRIORITYR10_EL1" , 0xC67A, true, true, {} }, // 887 |
| 4637 | { "ICC_PPI_PRIORITYR11_EL1" , 0xC67B, true, true, {} }, // 888 |
| 4638 | { "ICV_PPI_PRIORITYR11_EL1" , 0xC67B, true, true, {} }, // 889 |
| 4639 | { "ICC_PPI_PRIORITYR12_EL1" , 0xC67C, true, true, {} }, // 890 |
| 4640 | { "ICV_PPI_PRIORITYR12_EL1" , 0xC67C, true, true, {} }, // 891 |
| 4641 | { "ICC_PPI_PRIORITYR13_EL1" , 0xC67D, true, true, {} }, // 892 |
| 4642 | { "ICV_PPI_PRIORITYR13_EL1" , 0xC67D, true, true, {} }, // 893 |
| 4643 | { "ICC_PPI_PRIORITYR14_EL1" , 0xC67E, true, true, {} }, // 894 |
| 4644 | { "ICV_PPI_PRIORITYR14_EL1" , 0xC67E, true, true, {} }, // 895 |
| 4645 | { "ICC_PPI_PRIORITYR15_EL1" , 0xC67F, true, true, {} }, // 896 |
| 4646 | { "ICV_PPI_PRIORITYR15_EL1" , 0xC67F, true, true, {} }, // 897 |
| 4647 | { "TPIDR3_EL1" , 0xC680, true, true, {} }, // 898 |
| 4648 | { "CONTEXTIDR_EL1" , 0xC681, true, true, {} }, // 899 |
| 4649 | { "RCWSMASK_EL1" , 0xC683, true, true, {AArch64::FeatureTHE} }, // 900 |
| 4650 | { "TPIDR_EL1" , 0xC684, true, true, {} }, // 901 |
| 4651 | { "ACCDATA_EL1" , 0xC685, true, true, {AArch64::FeatureLS64} }, // 902 |
| 4652 | { "RCWMASK_EL1" , 0xC686, true, true, {AArch64::FeatureTHE} }, // 903 |
| 4653 | { "SCXTNUM_EL1" , 0xC687, true, true, {AArch64::FeatureSpecRestrict} }, // 904 |
| 4654 | { "CNTKCTL_EL1" , 0xC708, true, true, {} }, // 905 |
| 4655 | { "CCSIDR_EL1" , 0xC800, true, false, {} }, // 906 |
| 4656 | { "CLIDR_EL1" , 0xC801, true, false, {} }, // 907 |
| 4657 | { "CCSIDR2_EL1" , 0xC802, true, false, {AArch64::FeatureCCIDX} }, // 908 |
| 4658 | { "GMID_EL1" , 0xC804, true, false, {AArch64::FeatureMTE} }, // 909 |
| 4659 | { "SMIDR_EL1" , 0xC806, true, false, {AArch64::FeatureSME} }, // 910 |
| 4660 | { "AIDR_EL1" , 0xC807, true, false, {} }, // 911 |
| 4661 | { "ICC_APR_EL1" , 0xCE00, true, true, {} }, // 912 |
| 4662 | { "ICV_APR_EL1" , 0xCE00, true, true, {} }, // 913 |
| 4663 | { "ICC_CR0_EL1" , 0xCE01, true, true, {} }, // 914 |
| 4664 | { "ICV_CR0_EL1" , 0xCE01, true, true, {} }, // 915 |
| 4665 | { "ICC_PCR_EL1" , 0xCE02, true, true, {} }, // 916 |
| 4666 | { "ICV_PCR_EL1" , 0xCE02, true, true, {} }, // 917 |
| 4667 | { "ICC_HAPR_EL1" , 0xCE03, true, false, {} }, // 918 |
| 4668 | { "ICV_HAPR_EL1" , 0xCE03, true, true, {} }, // 919 |
| 4669 | { "CSSELR_EL1" , 0xD000, true, true, {} }, // 920 |
| 4670 | { "CTR_EL0" , 0xD801, true, false, {} }, // 921 |
| 4671 | { "DCZID_EL0" , 0xD807, true, false, {} }, // 922 |
| 4672 | { "TPMIN0_EL0" , 0xD914, true, true, {} }, // 923 |
| 4673 | { "TPMAX0_EL0" , 0xD915, true, true, {} }, // 924 |
| 4674 | { "TPMIN1_EL0" , 0xD916, true, true, {} }, // 925 |
| 4675 | { "TPMAX1_EL0" , 0xD917, true, true, {} }, // 926 |
| 4676 | { "RNDR" , 0xD920, true, false, {AArch64::FeatureRandGen} }, // 927 |
| 4677 | { "RNDRRS" , 0xD921, true, false, {AArch64::FeatureRandGen} }, // 928 |
| 4678 | { "GCSPR_EL0" , 0xD929, true, true, {} }, // 929 |
| 4679 | { "TINDEX_EL0" , 0xDA03, true, true, {} }, // 930 |
| 4680 | { "NZCV" , 0xDA10, true, true, {} }, // 931 |
| 4681 | { "DAIF" , 0xDA11, true, true, {} }, // 932 |
| 4682 | { "SVCR" , 0xDA12, true, true, {AArch64::FeatureSME} }, // 933 |
| 4683 | { "DIT" , 0xDA15, true, true, {AArch64::FeatureDIT} }, // 934 |
| 4684 | { "SSBS" , 0xDA16, true, true, {AArch64::FeatureSSBS} }, // 935 |
| 4685 | { "TCO" , 0xDA17, true, true, {AArch64::FeatureMTE} }, // 936 |
| 4686 | { "FPCR" , 0xDA20, true, true, {AArch64::FeatureFPARMv8} }, // 937 |
| 4687 | { "FPSR" , 0xDA21, true, true, {AArch64::FeatureFPARMv8} }, // 938 |
| 4688 | { "FPMR" , 0xDA22, true, true, {} }, // 939 |
| 4689 | { "DSPSR_EL0" , 0xDA28, true, true, {} }, // 940 |
| 4690 | { "DLR_EL0" , 0xDA29, true, true, {} }, // 941 |
| 4691 | { "DPOCR_EL0" , 0xDA2A, true, true, {} }, // 942 |
| 4692 | { "PMICNTR_EL0" , 0xDCA0, true, true, {} }, // 943 |
| 4693 | { "PMICFILTR_EL0" , 0xDCB0, true, true, {} }, // 944 |
| 4694 | { "PMCR_EL0" , 0xDCE0, true, true, {} }, // 945 |
| 4695 | { "PMCNTENSET_EL0" , 0xDCE1, true, true, {} }, // 946 |
| 4696 | { "PMCNTENCLR_EL0" , 0xDCE2, true, true, {} }, // 947 |
| 4697 | { "PMOVSCLR_EL0" , 0xDCE3, true, true, {} }, // 948 |
| 4698 | { "PMSWINC_EL0" , 0xDCE4, false, true, {} }, // 949 |
| 4699 | { "PMSELR_EL0" , 0xDCE5, true, true, {} }, // 950 |
| 4700 | { "PMCEID0_EL0" , 0xDCE6, true, false, {} }, // 951 |
| 4701 | { "PMCEID1_EL0" , 0xDCE7, true, false, {} }, // 952 |
| 4702 | { "PMCCNTR_EL0" , 0xDCE8, true, true, {} }, // 953 |
| 4703 | { "PMXEVTYPER_EL0" , 0xDCE9, true, true, {} }, // 954 |
| 4704 | { "PMXEVCNTR_EL0" , 0xDCEA, true, true, {} }, // 955 |
| 4705 | { "PMZR_EL0" , 0xDCEC, false, true, {} }, // 956 |
| 4706 | { "PMUSERENR_EL0" , 0xDCF0, true, true, {} }, // 957 |
| 4707 | { "PMOVSSET_EL0" , 0xDCF3, true, true, {} }, // 958 |
| 4708 | { "POR_EL0" , 0xDD14, true, true, {} }, // 959 |
| 4709 | { "TPIDR3_EL0" , 0xDE80, true, true, {} }, // 960 |
| 4710 | { "TPIDR_EL0" , 0xDE82, true, true, {} }, // 961 |
| 4711 | { "TPIDRRO_EL0" , 0xDE83, true, true, {} }, // 962 |
| 4712 | { "TPIDR2_EL0" , 0xDE85, true, true, {AArch64::FeatureSME} }, // 963 |
| 4713 | { "SCXTNUM_EL0" , 0xDE87, true, true, {AArch64::FeatureSpecRestrict} }, // 964 |
| 4714 | { "AMCR_EL0" , 0xDE90, true, true, {AArch64::FeatureAM} }, // 965 |
| 4715 | { "AMCFGR_EL0" , 0xDE91, true, false, {AArch64::FeatureAM} }, // 966 |
| 4716 | { "AMCGCR_EL0" , 0xDE92, true, false, {AArch64::FeatureAM} }, // 967 |
| 4717 | { "AMUSERENR_EL0" , 0xDE93, true, true, {AArch64::FeatureAM} }, // 968 |
| 4718 | { "AMCNTENCLR0_EL0" , 0xDE94, true, true, {AArch64::FeatureAM} }, // 969 |
| 4719 | { "AMCNTENSET0_EL0" , 0xDE95, true, true, {AArch64::FeatureAM} }, // 970 |
| 4720 | { "AMCG1IDR_EL0" , 0xDE96, true, false, {AArch64::FeatureAMVS} }, // 971 |
| 4721 | { "AMCNTENCLR1_EL0" , 0xDE98, true, true, {AArch64::FeatureAM} }, // 972 |
| 4722 | { "AMCNTENSET1_EL0" , 0xDE99, true, true, {AArch64::FeatureAM} }, // 973 |
| 4723 | { "AMEVCNTR00_EL0" , 0xDEA0, true, true, {AArch64::FeatureAM} }, // 974 |
| 4724 | { "AMEVCNTR01_EL0" , 0xDEA1, true, true, {AArch64::FeatureAM} }, // 975 |
| 4725 | { "AMEVCNTR02_EL0" , 0xDEA2, true, true, {AArch64::FeatureAM} }, // 976 |
| 4726 | { "AMEVCNTR03_EL0" , 0xDEA3, true, true, {AArch64::FeatureAM} }, // 977 |
| 4727 | { "AMEVTYPER00_EL0" , 0xDEB0, true, false, {AArch64::FeatureAM} }, // 978 |
| 4728 | { "AMEVTYPER01_EL0" , 0xDEB1, true, false, {AArch64::FeatureAM} }, // 979 |
| 4729 | { "AMEVTYPER02_EL0" , 0xDEB2, true, false, {AArch64::FeatureAM} }, // 980 |
| 4730 | { "AMEVTYPER03_EL0" , 0xDEB3, true, false, {AArch64::FeatureAM} }, // 981 |
| 4731 | { "AMEVCNTR10_EL0" , 0xDEE0, true, true, {AArch64::FeatureAM} }, // 982 |
| 4732 | { "AMEVCNTR11_EL0" , 0xDEE1, true, true, {AArch64::FeatureAM} }, // 983 |
| 4733 | { "AMEVCNTR12_EL0" , 0xDEE2, true, true, {AArch64::FeatureAM} }, // 984 |
| 4734 | { "AMEVCNTR13_EL0" , 0xDEE3, true, true, {AArch64::FeatureAM} }, // 985 |
| 4735 | { "AMEVCNTR14_EL0" , 0xDEE4, true, true, {AArch64::FeatureAM} }, // 986 |
| 4736 | { "AMEVCNTR15_EL0" , 0xDEE5, true, true, {AArch64::FeatureAM} }, // 987 |
| 4737 | { "AMEVCNTR16_EL0" , 0xDEE6, true, true, {AArch64::FeatureAM} }, // 988 |
| 4738 | { "AMEVCNTR17_EL0" , 0xDEE7, true, true, {AArch64::FeatureAM} }, // 989 |
| 4739 | { "AMEVCNTR18_EL0" , 0xDEE8, true, true, {AArch64::FeatureAM} }, // 990 |
| 4740 | { "AMEVCNTR19_EL0" , 0xDEE9, true, true, {AArch64::FeatureAM} }, // 991 |
| 4741 | { "AMEVCNTR110_EL0" , 0xDEEA, true, true, {AArch64::FeatureAM} }, // 992 |
| 4742 | { "AMEVCNTR111_EL0" , 0xDEEB, true, true, {AArch64::FeatureAM} }, // 993 |
| 4743 | { "AMEVCNTR112_EL0" , 0xDEEC, true, true, {AArch64::FeatureAM} }, // 994 |
| 4744 | { "AMEVCNTR113_EL0" , 0xDEED, true, true, {AArch64::FeatureAM} }, // 995 |
| 4745 | { "AMEVCNTR114_EL0" , 0xDEEE, true, true, {AArch64::FeatureAM} }, // 996 |
| 4746 | { "AMEVCNTR115_EL0" , 0xDEEF, true, true, {AArch64::FeatureAM} }, // 997 |
| 4747 | { "AMEVTYPER10_EL0" , 0xDEF0, true, true, {AArch64::FeatureAM} }, // 998 |
| 4748 | { "AMEVTYPER11_EL0" , 0xDEF1, true, true, {AArch64::FeatureAM} }, // 999 |
| 4749 | { "AMEVTYPER12_EL0" , 0xDEF2, true, true, {AArch64::FeatureAM} }, // 1000 |
| 4750 | { "AMEVTYPER13_EL0" , 0xDEF3, true, true, {AArch64::FeatureAM} }, // 1001 |
| 4751 | { "AMEVTYPER14_EL0" , 0xDEF4, true, true, {AArch64::FeatureAM} }, // 1002 |
| 4752 | { "AMEVTYPER15_EL0" , 0xDEF5, true, true, {AArch64::FeatureAM} }, // 1003 |
| 4753 | { "AMEVTYPER16_EL0" , 0xDEF6, true, true, {AArch64::FeatureAM} }, // 1004 |
| 4754 | { "AMEVTYPER17_EL0" , 0xDEF7, true, true, {AArch64::FeatureAM} }, // 1005 |
| 4755 | { "AMEVTYPER18_EL0" , 0xDEF8, true, true, {AArch64::FeatureAM} }, // 1006 |
| 4756 | { "AMEVTYPER19_EL0" , 0xDEF9, true, true, {AArch64::FeatureAM} }, // 1007 |
| 4757 | { "AMEVTYPER110_EL0" , 0xDEFA, true, true, {AArch64::FeatureAM} }, // 1008 |
| 4758 | { "AMEVTYPER111_EL0" , 0xDEFB, true, true, {AArch64::FeatureAM} }, // 1009 |
| 4759 | { "AMEVTYPER112_EL0" , 0xDEFC, true, true, {AArch64::FeatureAM} }, // 1010 |
| 4760 | { "AMEVTYPER113_EL0" , 0xDEFD, true, true, {AArch64::FeatureAM} }, // 1011 |
| 4761 | { "AMEVTYPER114_EL0" , 0xDEFE, true, true, {AArch64::FeatureAM} }, // 1012 |
| 4762 | { "AMEVTYPER115_EL0" , 0xDEFF, true, true, {AArch64::FeatureAM} }, // 1013 |
| 4763 | { "CNTFRQ_EL0" , 0xDF00, true, true, {} }, // 1014 |
| 4764 | { "CNTPCT_EL0" , 0xDF01, true, false, {} }, // 1015 |
| 4765 | { "CNTVCT_EL0" , 0xDF02, true, false, {} }, // 1016 |
| 4766 | { "CNTPCTSS_EL0" , 0xDF05, true, false, {AArch64::FeatureEnhancedCounterVirtualization} }, // 1017 |
| 4767 | { "CNTVCTSS_EL0" , 0xDF06, true, false, {AArch64::FeatureEnhancedCounterVirtualization} }, // 1018 |
| 4768 | { "CNTP_TVAL_EL0" , 0xDF10, true, true, {} }, // 1019 |
| 4769 | { "CNTP_CTL_EL0" , 0xDF11, true, true, {} }, // 1020 |
| 4770 | { "CNTP_CVAL_EL0" , 0xDF12, true, true, {} }, // 1021 |
| 4771 | { "CNTV_TVAL_EL0" , 0xDF18, true, true, {} }, // 1022 |
| 4772 | { "CNTV_CTL_EL0" , 0xDF19, true, true, {} }, // 1023 |
| 4773 | { "CNTV_CVAL_EL0" , 0xDF1A, true, true, {} }, // 1024 |
| 4774 | { "PMEVCNTR0_EL0" , 0xDF40, true, true, {} }, // 1025 |
| 4775 | { "PMEVCNTR1_EL0" , 0xDF41, true, true, {} }, // 1026 |
| 4776 | { "PMEVCNTR2_EL0" , 0xDF42, true, true, {} }, // 1027 |
| 4777 | { "PMEVCNTR3_EL0" , 0xDF43, true, true, {} }, // 1028 |
| 4778 | { "PMEVCNTR4_EL0" , 0xDF44, true, true, {} }, // 1029 |
| 4779 | { "PMEVCNTR5_EL0" , 0xDF45, true, true, {} }, // 1030 |
| 4780 | { "PMEVCNTR6_EL0" , 0xDF46, true, true, {} }, // 1031 |
| 4781 | { "PMEVCNTR7_EL0" , 0xDF47, true, true, {} }, // 1032 |
| 4782 | { "PMEVCNTR8_EL0" , 0xDF48, true, true, {} }, // 1033 |
| 4783 | { "PMEVCNTR9_EL0" , 0xDF49, true, true, {} }, // 1034 |
| 4784 | { "PMEVCNTR10_EL0" , 0xDF4A, true, true, {} }, // 1035 |
| 4785 | { "PMEVCNTR11_EL0" , 0xDF4B, true, true, {} }, // 1036 |
| 4786 | { "PMEVCNTR12_EL0" , 0xDF4C, true, true, {} }, // 1037 |
| 4787 | { "PMEVCNTR13_EL0" , 0xDF4D, true, true, {} }, // 1038 |
| 4788 | { "PMEVCNTR14_EL0" , 0xDF4E, true, true, {} }, // 1039 |
| 4789 | { "PMEVCNTR15_EL0" , 0xDF4F, true, true, {} }, // 1040 |
| 4790 | { "PMEVCNTR16_EL0" , 0xDF50, true, true, {} }, // 1041 |
| 4791 | { "PMEVCNTR17_EL0" , 0xDF51, true, true, {} }, // 1042 |
| 4792 | { "PMEVCNTR18_EL0" , 0xDF52, true, true, {} }, // 1043 |
| 4793 | { "PMEVCNTR19_EL0" , 0xDF53, true, true, {} }, // 1044 |
| 4794 | { "PMEVCNTR20_EL0" , 0xDF54, true, true, {} }, // 1045 |
| 4795 | { "PMEVCNTR21_EL0" , 0xDF55, true, true, {} }, // 1046 |
| 4796 | { "PMEVCNTR22_EL0" , 0xDF56, true, true, {} }, // 1047 |
| 4797 | { "PMEVCNTR23_EL0" , 0xDF57, true, true, {} }, // 1048 |
| 4798 | { "PMEVCNTR24_EL0" , 0xDF58, true, true, {} }, // 1049 |
| 4799 | { "PMEVCNTR25_EL0" , 0xDF59, true, true, {} }, // 1050 |
| 4800 | { "PMEVCNTR26_EL0" , 0xDF5A, true, true, {} }, // 1051 |
| 4801 | { "PMEVCNTR27_EL0" , 0xDF5B, true, true, {} }, // 1052 |
| 4802 | { "PMEVCNTR28_EL0" , 0xDF5C, true, true, {} }, // 1053 |
| 4803 | { "PMEVCNTR29_EL0" , 0xDF5D, true, true, {} }, // 1054 |
| 4804 | { "PMEVCNTR30_EL0" , 0xDF5E, true, true, {} }, // 1055 |
| 4805 | { "PMEVTYPER0_EL0" , 0xDF60, true, true, {} }, // 1056 |
| 4806 | { "PMEVTYPER1_EL0" , 0xDF61, true, true, {} }, // 1057 |
| 4807 | { "PMEVTYPER2_EL0" , 0xDF62, true, true, {} }, // 1058 |
| 4808 | { "PMEVTYPER3_EL0" , 0xDF63, true, true, {} }, // 1059 |
| 4809 | { "PMEVTYPER4_EL0" , 0xDF64, true, true, {} }, // 1060 |
| 4810 | { "PMEVTYPER5_EL0" , 0xDF65, true, true, {} }, // 1061 |
| 4811 | { "PMEVTYPER6_EL0" , 0xDF66, true, true, {} }, // 1062 |
| 4812 | { "PMEVTYPER7_EL0" , 0xDF67, true, true, {} }, // 1063 |
| 4813 | { "PMEVTYPER8_EL0" , 0xDF68, true, true, {} }, // 1064 |
| 4814 | { "PMEVTYPER9_EL0" , 0xDF69, true, true, {} }, // 1065 |
| 4815 | { "PMEVTYPER10_EL0" , 0xDF6A, true, true, {} }, // 1066 |
| 4816 | { "PMEVTYPER11_EL0" , 0xDF6B, true, true, {} }, // 1067 |
| 4817 | { "PMEVTYPER12_EL0" , 0xDF6C, true, true, {} }, // 1068 |
| 4818 | { "PMEVTYPER13_EL0" , 0xDF6D, true, true, {} }, // 1069 |
| 4819 | { "PMEVTYPER14_EL0" , 0xDF6E, true, true, {} }, // 1070 |
| 4820 | { "PMEVTYPER15_EL0" , 0xDF6F, true, true, {} }, // 1071 |
| 4821 | { "PMEVTYPER16_EL0" , 0xDF70, true, true, {} }, // 1072 |
| 4822 | { "PMEVTYPER17_EL0" , 0xDF71, true, true, {} }, // 1073 |
| 4823 | { "PMEVTYPER18_EL0" , 0xDF72, true, true, {} }, // 1074 |
| 4824 | { "PMEVTYPER19_EL0" , 0xDF73, true, true, {} }, // 1075 |
| 4825 | { "PMEVTYPER20_EL0" , 0xDF74, true, true, {} }, // 1076 |
| 4826 | { "PMEVTYPER21_EL0" , 0xDF75, true, true, {} }, // 1077 |
| 4827 | { "PMEVTYPER22_EL0" , 0xDF76, true, true, {} }, // 1078 |
| 4828 | { "PMEVTYPER23_EL0" , 0xDF77, true, true, {} }, // 1079 |
| 4829 | { "PMEVTYPER24_EL0" , 0xDF78, true, true, {} }, // 1080 |
| 4830 | { "PMEVTYPER25_EL0" , 0xDF79, true, true, {} }, // 1081 |
| 4831 | { "PMEVTYPER26_EL0" , 0xDF7A, true, true, {} }, // 1082 |
| 4832 | { "PMEVTYPER27_EL0" , 0xDF7B, true, true, {} }, // 1083 |
| 4833 | { "PMEVTYPER28_EL0" , 0xDF7C, true, true, {} }, // 1084 |
| 4834 | { "PMEVTYPER29_EL0" , 0xDF7D, true, true, {} }, // 1085 |
| 4835 | { "PMEVTYPER30_EL0" , 0xDF7E, true, true, {} }, // 1086 |
| 4836 | { "PMCCFILTR_EL0" , 0xDF7F, true, true, {} }, // 1087 |
| 4837 | { "VPIDR_EL2" , 0xE000, true, true, {} }, // 1088 |
| 4838 | { "MPUIR_EL2" , 0xE004, true, true, {AArch64::HasV8_0rOps} }, // 1089 |
| 4839 | { "VMPIDR_EL2" , 0xE005, true, true, {} }, // 1090 |
| 4840 | { "SCTLR_EL2" , 0xE080, true, true, {} }, // 1091 |
| 4841 | { "ACTLR_EL2" , 0xE081, true, true, {} }, // 1092 |
| 4842 | { "SCTLR2_EL2" , 0xE083, true, true, {} }, // 1093 |
| 4843 | { "HCR_EL2" , 0xE088, true, true, {} }, // 1094 |
| 4844 | { "MDCR_EL2" , 0xE089, true, true, {} }, // 1095 |
| 4845 | { "CPTR_EL2" , 0xE08A, true, true, {} }, // 1096 |
| 4846 | { "HSTR_EL2" , 0xE08B, true, true, {} }, // 1097 |
| 4847 | { "HFGRTR_EL2" , 0xE08C, true, true, {AArch64::FeatureFineGrainedTraps} }, // 1098 |
| 4848 | { "HFGWTR_EL2" , 0xE08D, true, true, {AArch64::FeatureFineGrainedTraps} }, // 1099 |
| 4849 | { "HFGITR_EL2" , 0xE08E, true, true, {AArch64::FeatureFineGrainedTraps} }, // 1100 |
| 4850 | { "HACR_EL2" , 0xE08F, true, true, {} }, // 1101 |
| 4851 | { "ZCR_EL2" , 0xE090, true, true, {AArch64::FeatureSVE} }, // 1102 |
| 4852 | { "TRFCR_EL2" , 0xE091, true, true, {AArch64::FeatureTRACEV8_4} }, // 1103 |
| 4853 | { "HCRX_EL2" , 0xE092, true, true, {AArch64::FeatureHCX} }, // 1104 |
| 4854 | { "TRCITECR_EL2" , 0xE093, true, true, {AArch64::FeatureITE} }, // 1105 |
| 4855 | { "SMPRIMAP_EL2" , 0xE095, true, true, {AArch64::FeatureSME} }, // 1106 |
| 4856 | { "SMCR_EL2" , 0xE096, true, true, {AArch64::FeatureSME} }, // 1107 |
| 4857 | { "SDER32_EL2" , 0xE099, true, true, {AArch64::FeatureSEL2} }, // 1108 |
| 4858 | { "SCTLRMASK_EL2" , 0xE0A0, true, true, {} }, // 1109 |
| 4859 | { "ACTLRMASK_EL2" , 0xE0A1, true, true, {} }, // 1110 |
| 4860 | { "CPTRMASK_EL2" , 0xE0A2, true, true, {} }, // 1111 |
| 4861 | { "SCTLR2MASK_EL2" , 0xE0A3, true, true, {} }, // 1112 |
| 4862 | { "NVHCR_EL2" , 0xE0A8, true, true, {} }, // 1113 |
| 4863 | { "NVHCRX_EL2" , 0xE0A9, true, true, {} }, // 1114 |
| 4864 | { "NVHCRMASK_EL2" , 0xE0AC, true, true, {} }, // 1115 |
| 4865 | { "NVHCRXMASK_EL2" , 0xE0AD, true, true, {} }, // 1116 |
| 4866 | { "HCRMASK_EL2" , 0xE0AE, true, true, {} }, // 1117 |
| 4867 | { "HCRXMASK_EL2" , 0xE0AF, true, true, {} }, // 1118 |
| 4868 | { "TTBR0_EL2" , 0xE100, true, true, {AArch64::FeatureEL2VMSA} }, // 1119 |
| 4869 | { "VSCTLR_EL2" , 0xE100, true, true, {AArch64::HasV8_0rOps} }, // 1120 |
| 4870 | { "TTBR1_EL2" , 0xE101, true, true, {AArch64::FeatureVH} }, // 1121 |
| 4871 | { "TCR_EL2" , 0xE102, true, true, {} }, // 1122 |
| 4872 | { "TCR2_EL2" , 0xE103, true, true, {} }, // 1123 |
| 4873 | { "IRTBRU_EL2" , 0xE104, true, true, {} }, // 1124 |
| 4874 | { "IRTBRP_EL2" , 0xE105, true, true, {} }, // 1125 |
| 4875 | { "DPOTBR0_EL2" , 0xE106, true, true, {} }, // 1126 |
| 4876 | { "DPOTBR1_EL2" , 0xE107, true, true, {} }, // 1127 |
| 4877 | { "VTTBR_EL2" , 0xE108, true, true, {AArch64::FeatureEL2VMSA} }, // 1128 |
| 4878 | { "VTCR_EL2" , 0xE10A, true, true, {} }, // 1129 |
| 4879 | { "LDSTT_EL2" , 0xE10F, true, true, {} }, // 1130 |
| 4880 | { "VNCR_EL2" , 0xE110, true, true, {AArch64::FeatureNV} }, // 1131 |
| 4881 | { "VNCCR_EL2" , 0xE111, true, true, {} }, // 1132 |
| 4882 | { "TPMIN0_EL2" , 0xE114, true, true, {} }, // 1133 |
| 4883 | { "TPMAX0_EL2" , 0xE115, true, true, {} }, // 1134 |
| 4884 | { "TPMIN1_EL2" , 0xE116, true, true, {} }, // 1135 |
| 4885 | { "TPMAX1_EL2" , 0xE117, true, true, {} }, // 1136 |
| 4886 | { "HDBSSBR_EL2" , 0xE11A, true, true, {} }, // 1137 |
| 4887 | { "HDBSSPROD_EL2" , 0xE11B, true, true, {} }, // 1138 |
| 4888 | { "HACDBSBR_EL2" , 0xE11C, true, true, {} }, // 1139 |
| 4889 | { "HACDBSCONS_EL2" , 0xE11D, true, true, {} }, // 1140 |
| 4890 | { "GCSCR_EL2" , 0xE128, true, true, {} }, // 1141 |
| 4891 | { "GCSPR_EL2" , 0xE129, true, true, {} }, // 1142 |
| 4892 | { "VSTTBR_EL2" , 0xE130, true, true, {AArch64::HasV8_0aOps} }, // 1143 |
| 4893 | { "VSTCR_EL2" , 0xE132, true, true, {AArch64::FeatureSEL2} }, // 1144 |
| 4894 | { "TCRMASK_EL2" , 0xE13A, true, true, {} }, // 1145 |
| 4895 | { "TCR2MASK_EL2" , 0xE13B, true, true, {} }, // 1146 |
| 4896 | { "VTLBID0_EL2" , 0xE140, true, true, {} }, // 1147 |
| 4897 | { "VTLBID1_EL2" , 0xE141, true, true, {} }, // 1148 |
| 4898 | { "VTLBID2_EL2" , 0xE142, true, true, {} }, // 1149 |
| 4899 | { "VTLBID3_EL2" , 0xE143, true, true, {} }, // 1150 |
| 4900 | { "VTLBIDOS0_EL2" , 0xE148, true, true, {} }, // 1151 |
| 4901 | { "VTLBIDOS1_EL2" , 0xE149, true, true, {} }, // 1152 |
| 4902 | { "VTLBIDOS2_EL2" , 0xE14A, true, true, {} }, // 1153 |
| 4903 | { "VTLBIDOS3_EL2" , 0xE14B, true, true, {} }, // 1154 |
| 4904 | { "DACR32_EL2" , 0xE180, true, true, {} }, // 1155 |
| 4905 | { "HDFGRTR2_EL2" , 0xE188, true, true, {AArch64::FeatureFineGrainedTraps} }, // 1156 |
| 4906 | { "HDFGWTR2_EL2" , 0xE189, true, true, {AArch64::FeatureFineGrainedTraps} }, // 1157 |
| 4907 | { "HFGRTR2_EL2" , 0xE18A, true, true, {AArch64::FeatureFineGrainedTraps} }, // 1158 |
| 4908 | { "HFGWTR2_EL2" , 0xE18B, true, true, {AArch64::FeatureFineGrainedTraps} }, // 1159 |
| 4909 | { "HDFGRTR_EL2" , 0xE18C, true, true, {AArch64::FeatureFineGrainedTraps} }, // 1160 |
| 4910 | { "HDFGWTR_EL2" , 0xE18D, true, true, {AArch64::FeatureFineGrainedTraps} }, // 1161 |
| 4911 | { "HAFGRTR_EL2" , 0xE18E, true, true, {AArch64::FeatureFineGrainedTraps} }, // 1162 |
| 4912 | { "HFGITR2_EL2" , 0xE18F, true, true, {AArch64::FeatureFineGrainedTraps} }, // 1163 |
| 4913 | { "FGDTP0_EL2" , 0xE190, true, true, {} }, // 1164 |
| 4914 | { "FGDTP1_EL2" , 0xE191, true, true, {} }, // 1165 |
| 4915 | { "FGDTP2_EL2" , 0xE192, true, true, {} }, // 1166 |
| 4916 | { "FGDTP3_EL2" , 0xE193, true, true, {} }, // 1167 |
| 4917 | { "FGDTP4_EL2" , 0xE194, true, true, {} }, // 1168 |
| 4918 | { "FGDTP5_EL2" , 0xE195, true, true, {} }, // 1169 |
| 4919 | { "FGDTP6_EL2" , 0xE196, true, true, {} }, // 1170 |
| 4920 | { "FGDTP7_EL2" , 0xE197, true, true, {} }, // 1171 |
| 4921 | { "FGDTP8_EL2" , 0xE198, true, true, {} }, // 1172 |
| 4922 | { "FGDTP9_EL2" , 0xE199, true, true, {} }, // 1173 |
| 4923 | { "FGDTP10_EL2" , 0xE19A, true, true, {} }, // 1174 |
| 4924 | { "FGDTP11_EL2" , 0xE19B, true, true, {} }, // 1175 |
| 4925 | { "FGDTP12_EL2" , 0xE19C, true, true, {} }, // 1176 |
| 4926 | { "FGDTP13_EL2" , 0xE19D, true, true, {} }, // 1177 |
| 4927 | { "FGDTP14_EL2" , 0xE19E, true, true, {} }, // 1178 |
| 4928 | { "FGDTP15_EL2" , 0xE19F, true, true, {} }, // 1179 |
| 4929 | { "FGDTU0_EL2" , 0xE1A0, true, true, {} }, // 1180 |
| 4930 | { "FGDTU1_EL2" , 0xE1A1, true, true, {} }, // 1181 |
| 4931 | { "FGDTU2_EL2" , 0xE1A2, true, true, {} }, // 1182 |
| 4932 | { "FGDTU3_EL2" , 0xE1A3, true, true, {} }, // 1183 |
| 4933 | { "FGDTU4_EL2" , 0xE1A4, true, true, {} }, // 1184 |
| 4934 | { "FGDTU5_EL2" , 0xE1A5, true, true, {} }, // 1185 |
| 4935 | { "FGDTU6_EL2" , 0xE1A6, true, true, {} }, // 1186 |
| 4936 | { "FGDTU7_EL2" , 0xE1A7, true, true, {} }, // 1187 |
| 4937 | { "FGDTU8_EL2" , 0xE1A8, true, true, {} }, // 1188 |
| 4938 | { "FGDTU9_EL2" , 0xE1A9, true, true, {} }, // 1189 |
| 4939 | { "FGDTU10_EL2" , 0xE1AA, true, true, {} }, // 1190 |
| 4940 | { "FGDTU11_EL2" , 0xE1AB, true, true, {} }, // 1191 |
| 4941 | { "FGDTU12_EL2" , 0xE1AC, true, true, {} }, // 1192 |
| 4942 | { "FGDTU13_EL2" , 0xE1AD, true, true, {} }, // 1193 |
| 4943 | { "FGDTU14_EL2" , 0xE1AE, true, true, {} }, // 1194 |
| 4944 | { "FGDTU15_EL2" , 0xE1AF, true, true, {} }, // 1195 |
| 4945 | { "AFGDTP0_EL2" , 0xE1B0, true, true, {} }, // 1196 |
| 4946 | { "AFGDTP1_EL2" , 0xE1B1, true, true, {} }, // 1197 |
| 4947 | { "AFGDTP2_EL2" , 0xE1B2, true, true, {} }, // 1198 |
| 4948 | { "AFGDTP3_EL2" , 0xE1B3, true, true, {} }, // 1199 |
| 4949 | { "AFGDTP4_EL2" , 0xE1B4, true, true, {} }, // 1200 |
| 4950 | { "AFGDTP5_EL2" , 0xE1B5, true, true, {} }, // 1201 |
| 4951 | { "AFGDTP6_EL2" , 0xE1B6, true, true, {} }, // 1202 |
| 4952 | { "AFGDTP7_EL2" , 0xE1B7, true, true, {} }, // 1203 |
| 4953 | { "AFGDTP8_EL2" , 0xE1B8, true, true, {} }, // 1204 |
| 4954 | { "AFGDTP9_EL2" , 0xE1B9, true, true, {} }, // 1205 |
| 4955 | { "AFGDTP10_EL2" , 0xE1BA, true, true, {} }, // 1206 |
| 4956 | { "AFGDTP11_EL2" , 0xE1BB, true, true, {} }, // 1207 |
| 4957 | { "AFGDTP12_EL2" , 0xE1BC, true, true, {} }, // 1208 |
| 4958 | { "AFGDTP13_EL2" , 0xE1BD, true, true, {} }, // 1209 |
| 4959 | { "AFGDTP14_EL2" , 0xE1BE, true, true, {} }, // 1210 |
| 4960 | { "AFGDTP15_EL2" , 0xE1BF, true, true, {} }, // 1211 |
| 4961 | { "AFGDTU0_EL2" , 0xE1C0, true, true, {} }, // 1212 |
| 4962 | { "AFGDTU1_EL2" , 0xE1C1, true, true, {} }, // 1213 |
| 4963 | { "AFGDTU2_EL2" , 0xE1C2, true, true, {} }, // 1214 |
| 4964 | { "AFGDTU3_EL2" , 0xE1C3, true, true, {} }, // 1215 |
| 4965 | { "AFGDTU4_EL2" , 0xE1C4, true, true, {} }, // 1216 |
| 4966 | { "AFGDTU5_EL2" , 0xE1C5, true, true, {} }, // 1217 |
| 4967 | { "AFGDTU6_EL2" , 0xE1C6, true, true, {} }, // 1218 |
| 4968 | { "AFGDTU7_EL2" , 0xE1C7, true, true, {} }, // 1219 |
| 4969 | { "AFGDTU8_EL2" , 0xE1C8, true, true, {} }, // 1220 |
| 4970 | { "AFGDTU9_EL2" , 0xE1C9, true, true, {} }, // 1221 |
| 4971 | { "AFGDTU10_EL2" , 0xE1CA, true, true, {} }, // 1222 |
| 4972 | { "AFGDTU11_EL2" , 0xE1CB, true, true, {} }, // 1223 |
| 4973 | { "AFGDTU12_EL2" , 0xE1CC, true, true, {} }, // 1224 |
| 4974 | { "AFGDTU13_EL2" , 0xE1CD, true, true, {} }, // 1225 |
| 4975 | { "AFGDTU14_EL2" , 0xE1CE, true, true, {} }, // 1226 |
| 4976 | { "AFGDTU15_EL2" , 0xE1CF, true, true, {} }, // 1227 |
| 4977 | { "SPSR_EL2" , 0xE200, true, true, {} }, // 1228 |
| 4978 | { "ELR_EL2" , 0xE201, true, true, {} }, // 1229 |
| 4979 | { "STINDEX_EL2" , 0xE202, true, true, {} }, // 1230 |
| 4980 | { "TINDEX_EL2" , 0xE203, true, true, {} }, // 1231 |
| 4981 | { "SP_EL1" , 0xE208, true, true, {} }, // 1232 |
| 4982 | { "SPSR_irq" , 0xE218, true, true, {} }, // 1233 |
| 4983 | { "SPSR_abt" , 0xE219, true, true, {} }, // 1234 |
| 4984 | { "SPSR_und" , 0xE21A, true, true, {} }, // 1235 |
| 4985 | { "SPSR_fiq" , 0xE21B, true, true, {} }, // 1236 |
| 4986 | { "IFSR32_EL2" , 0xE281, true, true, {} }, // 1237 |
| 4987 | { "AFSR0_EL2" , 0xE288, true, true, {} }, // 1238 |
| 4988 | { "AFSR1_EL2" , 0xE289, true, true, {} }, // 1239 |
| 4989 | { "ESR_EL2" , 0xE290, true, true, {} }, // 1240 |
| 4990 | { "VSESR_EL2" , 0xE293, true, true, {AArch64::FeatureRAS} }, // 1241 |
| 4991 | { "FPEXC32_EL2" , 0xE298, true, true, {} }, // 1242 |
| 4992 | { "TFSR_EL2" , 0xE2B0, true, true, {AArch64::FeatureMTE} }, // 1243 |
| 4993 | { "FAR_EL2" , 0xE300, true, true, {} }, // 1244 |
| 4994 | { "HPFAR_EL2" , 0xE304, true, true, {} }, // 1245 |
| 4995 | { "PFAR_EL2" , 0xE305, true, true, {} }, // 1246 |
| 4996 | { "PRENR_EL2" , 0xE309, true, true, {AArch64::HasV8_0rOps} }, // 1247 |
| 4997 | { "PRSELR_EL2" , 0xE311, true, true, {AArch64::HasV8_0rOps} }, // 1248 |
| 4998 | { "PRBAR_EL2" , 0xE340, true, true, {AArch64::HasV8_0rOps} }, // 1249 |
| 4999 | { "PRLAR_EL2" , 0xE341, true, true, {AArch64::HasV8_0rOps} }, // 1250 |
| 5000 | { "PRBAR1_EL2" , 0xE344, true, true, {AArch64::HasV8_0rOps} }, // 1251 |
| 5001 | { "PRLAR1_EL2" , 0xE345, true, true, {AArch64::HasV8_0rOps} }, // 1252 |
| 5002 | { "PRBAR2_EL2" , 0xE348, true, true, {AArch64::HasV8_0rOps} }, // 1253 |
| 5003 | { "PRLAR2_EL2" , 0xE349, true, true, {AArch64::HasV8_0rOps} }, // 1254 |
| 5004 | { "PRBAR3_EL2" , 0xE34C, true, true, {AArch64::HasV8_0rOps} }, // 1255 |
| 5005 | { "PRLAR3_EL2" , 0xE34D, true, true, {AArch64::HasV8_0rOps} }, // 1256 |
| 5006 | { "PRBAR4_EL2" , 0xE350, true, true, {AArch64::HasV8_0rOps} }, // 1257 |
| 5007 | { "PRLAR4_EL2" , 0xE351, true, true, {AArch64::HasV8_0rOps} }, // 1258 |
| 5008 | { "PRBAR5_EL2" , 0xE354, true, true, {AArch64::HasV8_0rOps} }, // 1259 |
| 5009 | { "PRLAR5_EL2" , 0xE355, true, true, {AArch64::HasV8_0rOps} }, // 1260 |
| 5010 | { "PRBAR6_EL2" , 0xE358, true, true, {AArch64::HasV8_0rOps} }, // 1261 |
| 5011 | { "PRLAR6_EL2" , 0xE359, true, true, {AArch64::HasV8_0rOps} }, // 1262 |
| 5012 | { "PRBAR7_EL2" , 0xE35C, true, true, {AArch64::HasV8_0rOps} }, // 1263 |
| 5013 | { "PRLAR7_EL2" , 0xE35D, true, true, {AArch64::HasV8_0rOps} }, // 1264 |
| 5014 | { "PRBAR8_EL2" , 0xE360, true, true, {AArch64::HasV8_0rOps} }, // 1265 |
| 5015 | { "PRLAR8_EL2" , 0xE361, true, true, {AArch64::HasV8_0rOps} }, // 1266 |
| 5016 | { "PRBAR9_EL2" , 0xE364, true, true, {AArch64::HasV8_0rOps} }, // 1267 |
| 5017 | { "PRLAR9_EL2" , 0xE365, true, true, {AArch64::HasV8_0rOps} }, // 1268 |
| 5018 | { "PRBAR10_EL2" , 0xE368, true, true, {AArch64::HasV8_0rOps} }, // 1269 |
| 5019 | { "PRLAR10_EL2" , 0xE369, true, true, {AArch64::HasV8_0rOps} }, // 1270 |
| 5020 | { "PRBAR11_EL2" , 0xE36C, true, true, {AArch64::HasV8_0rOps} }, // 1271 |
| 5021 | { "PRLAR11_EL2" , 0xE36D, true, true, {AArch64::HasV8_0rOps} }, // 1272 |
| 5022 | { "PRBAR12_EL2" , 0xE370, true, true, {AArch64::HasV8_0rOps} }, // 1273 |
| 5023 | { "PRLAR12_EL2" , 0xE371, true, true, {AArch64::HasV8_0rOps} }, // 1274 |
| 5024 | { "PRBAR13_EL2" , 0xE374, true, true, {AArch64::HasV8_0rOps} }, // 1275 |
| 5025 | { "PRLAR13_EL2" , 0xE375, true, true, {AArch64::HasV8_0rOps} }, // 1276 |
| 5026 | { "PRBAR14_EL2" , 0xE378, true, true, {AArch64::HasV8_0rOps} }, // 1277 |
| 5027 | { "PRLAR14_EL2" , 0xE379, true, true, {AArch64::HasV8_0rOps} }, // 1278 |
| 5028 | { "PRBAR15_EL2" , 0xE37C, true, true, {AArch64::HasV8_0rOps} }, // 1279 |
| 5029 | { "PRLAR15_EL2" , 0xE37D, true, true, {AArch64::HasV8_0rOps} }, // 1280 |
| 5030 | { "PMSCR_EL2" , 0xE4C8, true, true, {AArch64::FeatureSPE} }, // 1281 |
| 5031 | { "PMBSR_EL2" , 0xE4D3, true, true, {} }, // 1282 |
| 5032 | { "TRBSR_EL2" , 0xE4DB, true, true, {} }, // 1283 |
| 5033 | { "MAIR2_EL2" , 0xE509, true, true, {} }, // 1284 |
| 5034 | { "MAIR_EL2" , 0xE510, true, true, {} }, // 1285 |
| 5035 | { "PIRE0_EL2" , 0xE512, true, true, {} }, // 1286 |
| 5036 | { "PIR_EL2" , 0xE513, true, true, {} }, // 1287 |
| 5037 | { "POR_EL2" , 0xE514, true, true, {} }, // 1288 |
| 5038 | { "S2PIR_EL2" , 0xE515, true, true, {} }, // 1289 |
| 5039 | { "TTTBRU_EL2" , 0xE516, true, true, {} }, // 1290 |
| 5040 | { "TTTBRP_EL2" , 0xE517, true, true, {} }, // 1291 |
| 5041 | { "AMAIR_EL2" , 0xE518, true, true, {} }, // 1292 |
| 5042 | { "AMAIR2_EL2" , 0xE519, true, true, {} }, // 1293 |
| 5043 | { "MPAMHCR_EL2" , 0xE520, true, true, {} }, // 1294 |
| 5044 | { "MPAMVPMV_EL2" , 0xE521, true, true, {} }, // 1295 |
| 5045 | { "MPAM2_EL2" , 0xE528, true, true, {} }, // 1296 |
| 5046 | { "MPAMCTL_EL2" , 0xE52A, true, true, {} }, // 1297 |
| 5047 | { "MPAMBW2_EL2" , 0xE52C, true, true, {} }, // 1298 |
| 5048 | { "MPAMBWCAP_EL2" , 0xE52E, true, true, {} }, // 1299 |
| 5049 | { "MPAMVPM0_EL2" , 0xE530, true, true, {} }, // 1300 |
| 5050 | { "MPAMVPM1_EL2" , 0xE531, true, true, {} }, // 1301 |
| 5051 | { "MPAMVPM2_EL2" , 0xE532, true, true, {} }, // 1302 |
| 5052 | { "MPAMVPM3_EL2" , 0xE533, true, true, {} }, // 1303 |
| 5053 | { "MPAMVPM4_EL2" , 0xE534, true, true, {} }, // 1304 |
| 5054 | { "MPAMVPM5_EL2" , 0xE535, true, true, {} }, // 1305 |
| 5055 | { "MPAMVPM6_EL2" , 0xE536, true, true, {} }, // 1306 |
| 5056 | { "MPAMVPM7_EL2" , 0xE537, true, true, {} }, // 1307 |
| 5057 | { "MPAMVIDCR_EL2" , 0xE538, true, true, {} }, // 1308 |
| 5058 | { "MPAMVIDSR_EL2" , 0xE539, true, true, {} }, // 1309 |
| 5059 | { "MECID_P0_EL2" , 0xE540, true, true, {AArch64::FeatureMEC} }, // 1310 |
| 5060 | { "MECID_A0_EL2" , 0xE541, true, true, {AArch64::FeatureMEC} }, // 1311 |
| 5061 | { "MECID_P1_EL2" , 0xE542, true, true, {AArch64::FeatureMEC} }, // 1312 |
| 5062 | { "MECID_A1_EL2" , 0xE543, true, true, {AArch64::FeatureMEC} }, // 1313 |
| 5063 | { "MECIDR_EL2" , 0xE547, true, false, {AArch64::FeatureMEC} }, // 1314 |
| 5064 | { "VMECID_P_EL2" , 0xE548, true, true, {AArch64::FeatureMEC} }, // 1315 |
| 5065 | { "VMECID_A_EL2" , 0xE549, true, true, {AArch64::FeatureMEC} }, // 1316 |
| 5066 | { "VBAR_EL2" , 0xE600, true, true, {} }, // 1317 |
| 5067 | { "RVBAR_EL2" , 0xE601, true, false, {} }, // 1318 |
| 5068 | { "RMR_EL2" , 0xE602, true, true, {} }, // 1319 |
| 5069 | { "VDISR_EL2" , 0xE609, true, true, {AArch64::FeatureRAS} }, // 1320 |
| 5070 | { "ICH_AP0R0_EL2" , 0xE640, true, true, {} }, // 1321 |
| 5071 | { "ICH_AP0R1_EL2" , 0xE641, true, true, {} }, // 1322 |
| 5072 | { "ICH_AP0R2_EL2" , 0xE642, true, true, {} }, // 1323 |
| 5073 | { "ICH_AP0R3_EL2" , 0xE643, true, true, {} }, // 1324 |
| 5074 | { "ICH_APR_EL2" , 0xE644, true, true, {} }, // 1325 |
| 5075 | { "ICH_HPPIR_EL2" , 0xE645, true, false, {} }, // 1326 |
| 5076 | { "ICH_AP1R0_EL2" , 0xE648, true, true, {} }, // 1327 |
| 5077 | { "ICH_AP1R1_EL2" , 0xE649, true, true, {} }, // 1328 |
| 5078 | { "ICH_AP1R2_EL2" , 0xE64A, true, true, {} }, // 1329 |
| 5079 | { "ICH_AP1R3_EL2" , 0xE64B, true, true, {} }, // 1330 |
| 5080 | { "ICH_HFGRTR_EL2" , 0xE64C, true, true, {} }, // 1331 |
| 5081 | { "ICC_SRE_EL2" , 0xE64D, true, true, {} }, // 1332 |
| 5082 | { "ICH_HFGWTR_EL2" , 0xE64E, true, true, {} }, // 1333 |
| 5083 | { "ICH_HFGITR_EL2" , 0xE64F, true, true, {} }, // 1334 |
| 5084 | { "ICH_PPI_DVIR0_EL2" , 0xE650, true, true, {} }, // 1335 |
| 5085 | { "ICH_PPI_DVIR1_EL2" , 0xE651, true, true, {} }, // 1336 |
| 5086 | { "ICH_PPI_ENABLER0_EL2" , 0xE652, true, true, {} }, // 1337 |
| 5087 | { "ICH_PPI_ENABLER1_EL2" , 0xE653, true, true, {} }, // 1338 |
| 5088 | { "ICH_PPI_PENDR0_EL2" , 0xE654, true, true, {} }, // 1339 |
| 5089 | { "ICH_PPI_PENDR1_EL2" , 0xE655, true, true, {} }, // 1340 |
| 5090 | { "ICH_PPI_ACTIVER0_EL2" , 0xE656, true, true, {} }, // 1341 |
| 5091 | { "ICH_PPI_ACTIVER1_EL2" , 0xE657, true, true, {} }, // 1342 |
| 5092 | { "ICH_HCR_EL2" , 0xE658, true, true, {} }, // 1343 |
| 5093 | { "ICH_VTR_EL2" , 0xE659, true, false, {} }, // 1344 |
| 5094 | { "ICH_MISR_EL2" , 0xE65A, true, false, {} }, // 1345 |
| 5095 | { "ICH_EISR_EL2" , 0xE65B, true, false, {} }, // 1346 |
| 5096 | { "ICH_VCTLR_EL2" , 0xE65C, true, true, {} }, // 1347 |
| 5097 | { "ICH_ELRSR_EL2" , 0xE65D, true, false, {} }, // 1348 |
| 5098 | { "ICH_CONTEXTR_EL2" , 0xE65E, true, true, {} }, // 1349 |
| 5099 | { "ICH_VMCR_EL2" , 0xE65F, true, true, {} }, // 1350 |
| 5100 | { "ICH_LR0_EL2" , 0xE660, true, true, {} }, // 1351 |
| 5101 | { "ICH_LR1_EL2" , 0xE661, true, true, {} }, // 1352 |
| 5102 | { "ICH_LR2_EL2" , 0xE662, true, true, {} }, // 1353 |
| 5103 | { "ICH_LR3_EL2" , 0xE663, true, true, {} }, // 1354 |
| 5104 | { "ICH_LR4_EL2" , 0xE664, true, true, {} }, // 1355 |
| 5105 | { "ICH_LR5_EL2" , 0xE665, true, true, {} }, // 1356 |
| 5106 | { "ICH_LR6_EL2" , 0xE666, true, true, {} }, // 1357 |
| 5107 | { "ICH_LR7_EL2" , 0xE667, true, true, {} }, // 1358 |
| 5108 | { "ICH_LR8_EL2" , 0xE668, true, true, {} }, // 1359 |
| 5109 | { "ICH_LR9_EL2" , 0xE669, true, true, {} }, // 1360 |
| 5110 | { "ICH_LR10_EL2" , 0xE66A, true, true, {} }, // 1361 |
| 5111 | { "ICH_LR11_EL2" , 0xE66B, true, true, {} }, // 1362 |
| 5112 | { "ICH_LR12_EL2" , 0xE66C, true, true, {} }, // 1363 |
| 5113 | { "ICH_LR13_EL2" , 0xE66D, true, true, {} }, // 1364 |
| 5114 | { "ICH_LR14_EL2" , 0xE66E, true, true, {} }, // 1365 |
| 5115 | { "ICH_LR15_EL2" , 0xE66F, true, true, {} }, // 1366 |
| 5116 | { "ICH_PPI_PRIORITYR0_EL2" , 0xE670, true, true, {} }, // 1367 |
| 5117 | { "ICH_PPI_PRIORITYR1_EL2" , 0xE671, true, true, {} }, // 1368 |
| 5118 | { "ICH_PPI_PRIORITYR2_EL2" , 0xE672, true, true, {} }, // 1369 |
| 5119 | { "ICH_PPI_PRIORITYR3_EL2" , 0xE673, true, true, {} }, // 1370 |
| 5120 | { "ICH_PPI_PRIORITYR4_EL2" , 0xE674, true, true, {} }, // 1371 |
| 5121 | { "ICH_PPI_PRIORITYR5_EL2" , 0xE675, true, true, {} }, // 1372 |
| 5122 | { "ICH_PPI_PRIORITYR6_EL2" , 0xE676, true, true, {} }, // 1373 |
| 5123 | { "ICH_PPI_PRIORITYR7_EL2" , 0xE677, true, true, {} }, // 1374 |
| 5124 | { "ICH_PPI_PRIORITYR8_EL2" , 0xE678, true, true, {} }, // 1375 |
| 5125 | { "ICH_PPI_PRIORITYR9_EL2" , 0xE679, true, true, {} }, // 1376 |
| 5126 | { "ICH_PPI_PRIORITYR10_EL2" , 0xE67A, true, true, {} }, // 1377 |
| 5127 | { "ICH_PPI_PRIORITYR11_EL2" , 0xE67B, true, true, {} }, // 1378 |
| 5128 | { "ICH_PPI_PRIORITYR12_EL2" , 0xE67C, true, true, {} }, // 1379 |
| 5129 | { "ICH_PPI_PRIORITYR13_EL2" , 0xE67D, true, true, {} }, // 1380 |
| 5130 | { "ICH_PPI_PRIORITYR14_EL2" , 0xE67E, true, true, {} }, // 1381 |
| 5131 | { "ICH_PPI_PRIORITYR15_EL2" , 0xE67F, true, true, {} }, // 1382 |
| 5132 | { "TPIDR3_EL2" , 0xE680, true, true, {} }, // 1383 |
| 5133 | { "CONTEXTIDR_EL2" , 0xE681, true, true, {AArch64::FeatureCONTEXTIDREL2} }, // 1384 |
| 5134 | { "TPIDR_EL2" , 0xE682, true, true, {} }, // 1385 |
| 5135 | { "SCXTNUM_EL2" , 0xE687, true, true, {AArch64::FeatureSpecRestrict} }, // 1386 |
| 5136 | { "AMEVCNTVOFF00_EL2" , 0xE6C0, true, true, {AArch64::FeatureAMVS} }, // 1387 |
| 5137 | { "AMEVCNTVOFF01_EL2" , 0xE6C1, true, true, {AArch64::FeatureAMVS} }, // 1388 |
| 5138 | { "AMEVCNTVOFF02_EL2" , 0xE6C2, true, true, {AArch64::FeatureAMVS} }, // 1389 |
| 5139 | { "AMEVCNTVOFF03_EL2" , 0xE6C3, true, true, {AArch64::FeatureAMVS} }, // 1390 |
| 5140 | { "AMEVCNTVOFF04_EL2" , 0xE6C4, true, true, {AArch64::FeatureAMVS} }, // 1391 |
| 5141 | { "AMEVCNTVOFF05_EL2" , 0xE6C5, true, true, {AArch64::FeatureAMVS} }, // 1392 |
| 5142 | { "AMEVCNTVOFF06_EL2" , 0xE6C6, true, true, {AArch64::FeatureAMVS} }, // 1393 |
| 5143 | { "AMEVCNTVOFF07_EL2" , 0xE6C7, true, true, {AArch64::FeatureAMVS} }, // 1394 |
| 5144 | { "AMEVCNTVOFF08_EL2" , 0xE6C8, true, true, {AArch64::FeatureAMVS} }, // 1395 |
| 5145 | { "AMEVCNTVOFF09_EL2" , 0xE6C9, true, true, {AArch64::FeatureAMVS} }, // 1396 |
| 5146 | { "AMEVCNTVOFF010_EL2" , 0xE6CA, true, true, {AArch64::FeatureAMVS} }, // 1397 |
| 5147 | { "AMEVCNTVOFF011_EL2" , 0xE6CB, true, true, {AArch64::FeatureAMVS} }, // 1398 |
| 5148 | { "AMEVCNTVOFF012_EL2" , 0xE6CC, true, true, {AArch64::FeatureAMVS} }, // 1399 |
| 5149 | { "AMEVCNTVOFF013_EL2" , 0xE6CD, true, true, {AArch64::FeatureAMVS} }, // 1400 |
| 5150 | { "AMEVCNTVOFF014_EL2" , 0xE6CE, true, true, {AArch64::FeatureAMVS} }, // 1401 |
| 5151 | { "AMEVCNTVOFF015_EL2" , 0xE6CF, true, true, {AArch64::FeatureAMVS} }, // 1402 |
| 5152 | { "AMEVCNTVOFF10_EL2" , 0xE6D0, true, true, {AArch64::FeatureAMVS} }, // 1403 |
| 5153 | { "AMEVCNTVOFF11_EL2" , 0xE6D1, true, true, {AArch64::FeatureAMVS} }, // 1404 |
| 5154 | { "AMEVCNTVOFF12_EL2" , 0xE6D2, true, true, {AArch64::FeatureAMVS} }, // 1405 |
| 5155 | { "AMEVCNTVOFF13_EL2" , 0xE6D3, true, true, {AArch64::FeatureAMVS} }, // 1406 |
| 5156 | { "AMEVCNTVOFF14_EL2" , 0xE6D4, true, true, {AArch64::FeatureAMVS} }, // 1407 |
| 5157 | { "AMEVCNTVOFF15_EL2" , 0xE6D5, true, true, {AArch64::FeatureAMVS} }, // 1408 |
| 5158 | { "AMEVCNTVOFF16_EL2" , 0xE6D6, true, true, {AArch64::FeatureAMVS} }, // 1409 |
| 5159 | { "AMEVCNTVOFF17_EL2" , 0xE6D7, true, true, {AArch64::FeatureAMVS} }, // 1410 |
| 5160 | { "AMEVCNTVOFF18_EL2" , 0xE6D8, true, true, {AArch64::FeatureAMVS} }, // 1411 |
| 5161 | { "AMEVCNTVOFF19_EL2" , 0xE6D9, true, true, {AArch64::FeatureAMVS} }, // 1412 |
| 5162 | { "AMEVCNTVOFF110_EL2" , 0xE6DA, true, true, {AArch64::FeatureAMVS} }, // 1413 |
| 5163 | { "AMEVCNTVOFF111_EL2" , 0xE6DB, true, true, {AArch64::FeatureAMVS} }, // 1414 |
| 5164 | { "AMEVCNTVOFF112_EL2" , 0xE6DC, true, true, {AArch64::FeatureAMVS} }, // 1415 |
| 5165 | { "AMEVCNTVOFF113_EL2" , 0xE6DD, true, true, {AArch64::FeatureAMVS} }, // 1416 |
| 5166 | { "AMEVCNTVOFF114_EL2" , 0xE6DE, true, true, {AArch64::FeatureAMVS} }, // 1417 |
| 5167 | { "AMEVCNTVOFF115_EL2" , 0xE6DF, true, true, {AArch64::FeatureAMVS} }, // 1418 |
| 5168 | { "CNTVOFF_EL2" , 0xE703, true, true, {} }, // 1419 |
| 5169 | { "CNTSCALE_EL2" , 0xE704, true, true, {AArch64::FeatureEnhancedCounterVirtualization} }, // 1420 |
| 5170 | { "CNTISCALE_EL2" , 0xE705, true, true, {AArch64::FeatureEnhancedCounterVirtualization} }, // 1421 |
| 5171 | { "CNTPOFF_EL2" , 0xE706, true, true, {AArch64::FeatureEnhancedCounterVirtualization} }, // 1422 |
| 5172 | { "CNTVFRQ_EL2" , 0xE707, true, true, {AArch64::FeatureEnhancedCounterVirtualization} }, // 1423 |
| 5173 | { "CNTHCTL_EL2" , 0xE708, true, true, {} }, // 1424 |
| 5174 | { "CNTHP_TVAL_EL2" , 0xE710, true, true, {} }, // 1425 |
| 5175 | { "CNTHP_CTL_EL2" , 0xE711, true, true, {} }, // 1426 |
| 5176 | { "CNTHP_CVAL_EL2" , 0xE712, true, true, {} }, // 1427 |
| 5177 | { "CNTHV_TVAL_EL2" , 0xE718, true, true, {AArch64::FeatureVH} }, // 1428 |
| 5178 | { "CNTHV_CTL_EL2" , 0xE719, true, true, {AArch64::FeatureVH} }, // 1429 |
| 5179 | { "CNTHV_CVAL_EL2" , 0xE71A, true, true, {AArch64::FeatureVH} }, // 1430 |
| 5180 | { "CNTHVS_TVAL_EL2" , 0xE720, true, true, {AArch64::FeatureSEL2} }, // 1431 |
| 5181 | { "CNTHVS_CTL_EL2" , 0xE721, true, true, {AArch64::FeatureSEL2} }, // 1432 |
| 5182 | { "CNTHVS_CVAL_EL2" , 0xE722, true, true, {AArch64::FeatureSEL2} }, // 1433 |
| 5183 | { "CNTHPS_TVAL_EL2" , 0xE728, true, true, {AArch64::FeatureSEL2} }, // 1434 |
| 5184 | { "CNTHPS_CTL_EL2" , 0xE729, true, true, {AArch64::FeatureSEL2} }, // 1435 |
| 5185 | { "CNTHPS_CVAL_EL2" , 0xE72A, true, true, {AArch64::FeatureSEL2} }, // 1436 |
| 5186 | { "SCTLR_EL12" , 0xE880, true, true, {AArch64::FeatureVH} }, // 1437 |
| 5187 | { "ACTLR_EL12" , 0xE881, true, true, {} }, // 1438 |
| 5188 | { "CPACR_EL12" , 0xE882, true, true, {AArch64::FeatureVH} }, // 1439 |
| 5189 | { "SCTLR2_EL12" , 0xE883, true, true, {} }, // 1440 |
| 5190 | { "ZCR_EL12" , 0xE890, true, true, {AArch64::FeatureSVE} }, // 1441 |
| 5191 | { "TRFCR_EL12" , 0xE891, true, true, {AArch64::FeatureTRACEV8_4} }, // 1442 |
| 5192 | { "TRCITECR_EL12" , 0xE893, true, true, {AArch64::FeatureITE} }, // 1443 |
| 5193 | { "SMCR_EL12" , 0xE896, true, true, {AArch64::FeatureSME} }, // 1444 |
| 5194 | { "SCTLRMASK_EL12" , 0xE8A0, true, true, {} }, // 1445 |
| 5195 | { "ACTLRMASK_EL12" , 0xE8A1, true, true, {} }, // 1446 |
| 5196 | { "CPACRMASK_EL12" , 0xE8A2, true, true, {} }, // 1447 |
| 5197 | { "SCTLR2MASK_EL12" , 0xE8A3, true, true, {} }, // 1448 |
| 5198 | { "TTBR0_EL12" , 0xE900, true, true, {AArch64::FeatureVH} }, // 1449 |
| 5199 | { "TTBR1_EL12" , 0xE901, true, true, {AArch64::FeatureVH} }, // 1450 |
| 5200 | { "TCR_EL12" , 0xE902, true, true, {AArch64::FeatureVH} }, // 1451 |
| 5201 | { "TCR2_EL12" , 0xE903, true, true, {} }, // 1452 |
| 5202 | { "IRTBRU_EL12" , 0xE904, true, true, {} }, // 1453 |
| 5203 | { "IRTBRP_EL12" , 0xE905, true, true, {} }, // 1454 |
| 5204 | { "DPOTBR0_EL12" , 0xE906, true, true, {} }, // 1455 |
| 5205 | { "DPOTBR1_EL12" , 0xE907, true, true, {} }, // 1456 |
| 5206 | { "LDSTT_EL12" , 0xE90F, true, true, {} }, // 1457 |
| 5207 | { "TPMIN0_EL12" , 0xE914, true, true, {} }, // 1458 |
| 5208 | { "TPMAX0_EL12" , 0xE915, true, true, {} }, // 1459 |
| 5209 | { "TPMIN1_EL12" , 0xE916, true, true, {} }, // 1460 |
| 5210 | { "TPMAX1_EL12" , 0xE917, true, true, {} }, // 1461 |
| 5211 | { "GCSCR_EL12" , 0xE928, true, true, {} }, // 1462 |
| 5212 | { "GCSPR_EL12" , 0xE929, true, true, {} }, // 1463 |
| 5213 | { "TCRMASK_EL12" , 0xE93A, true, true, {} }, // 1464 |
| 5214 | { "TCR2MASK_EL12" , 0xE93B, true, true, {} }, // 1465 |
| 5215 | { "FGDTP0_EL12" , 0xE990, true, true, {} }, // 1466 |
| 5216 | { "FGDTP1_EL12" , 0xE991, true, true, {} }, // 1467 |
| 5217 | { "FGDTP2_EL12" , 0xE992, true, true, {} }, // 1468 |
| 5218 | { "FGDTP3_EL12" , 0xE993, true, true, {} }, // 1469 |
| 5219 | { "FGDTP4_EL12" , 0xE994, true, true, {} }, // 1470 |
| 5220 | { "FGDTP5_EL12" , 0xE995, true, true, {} }, // 1471 |
| 5221 | { "FGDTP6_EL12" , 0xE996, true, true, {} }, // 1472 |
| 5222 | { "FGDTP7_EL12" , 0xE997, true, true, {} }, // 1473 |
| 5223 | { "FGDTP8_EL12" , 0xE998, true, true, {} }, // 1474 |
| 5224 | { "FGDTP9_EL12" , 0xE999, true, true, {} }, // 1475 |
| 5225 | { "FGDTP10_EL12" , 0xE99A, true, true, {} }, // 1476 |
| 5226 | { "FGDTP11_EL12" , 0xE99B, true, true, {} }, // 1477 |
| 5227 | { "FGDTP12_EL12" , 0xE99C, true, true, {} }, // 1478 |
| 5228 | { "FGDTP13_EL12" , 0xE99D, true, true, {} }, // 1479 |
| 5229 | { "FGDTP14_EL12" , 0xE99E, true, true, {} }, // 1480 |
| 5230 | { "FGDTP15_EL12" , 0xE99F, true, true, {} }, // 1481 |
| 5231 | { "FGDTU0_EL12" , 0xE9A0, true, true, {} }, // 1482 |
| 5232 | { "FGDTU1_EL12" , 0xE9A1, true, true, {} }, // 1483 |
| 5233 | { "FGDTU2_EL12" , 0xE9A2, true, true, {} }, // 1484 |
| 5234 | { "FGDTU3_EL12" , 0xE9A3, true, true, {} }, // 1485 |
| 5235 | { "FGDTU4_EL12" , 0xE9A4, true, true, {} }, // 1486 |
| 5236 | { "FGDTU5_EL12" , 0xE9A5, true, true, {} }, // 1487 |
| 5237 | { "FGDTU6_EL12" , 0xE9A6, true, true, {} }, // 1488 |
| 5238 | { "FGDTU7_EL12" , 0xE9A7, true, true, {} }, // 1489 |
| 5239 | { "FGDTU8_EL12" , 0xE9A8, true, true, {} }, // 1490 |
| 5240 | { "FGDTU9_EL12" , 0xE9A9, true, true, {} }, // 1491 |
| 5241 | { "FGDTU10_EL12" , 0xE9AA, true, true, {} }, // 1492 |
| 5242 | { "FGDTU11_EL12" , 0xE9AB, true, true, {} }, // 1493 |
| 5243 | { "FGDTU12_EL12" , 0xE9AC, true, true, {} }, // 1494 |
| 5244 | { "FGDTU13_EL12" , 0xE9AD, true, true, {} }, // 1495 |
| 5245 | { "FGDTU14_EL12" , 0xE9AE, true, true, {} }, // 1496 |
| 5246 | { "FGDTU15_EL12" , 0xE9AF, true, true, {} }, // 1497 |
| 5247 | { "AFGDTP0_EL12" , 0xE9B0, true, true, {} }, // 1498 |
| 5248 | { "AFGDTP1_EL12" , 0xE9B1, true, true, {} }, // 1499 |
| 5249 | { "AFGDTP2_EL12" , 0xE9B2, true, true, {} }, // 1500 |
| 5250 | { "AFGDTP3_EL12" , 0xE9B3, true, true, {} }, // 1501 |
| 5251 | { "AFGDTP4_EL12" , 0xE9B4, true, true, {} }, // 1502 |
| 5252 | { "AFGDTP5_EL12" , 0xE9B5, true, true, {} }, // 1503 |
| 5253 | { "AFGDTP6_EL12" , 0xE9B6, true, true, {} }, // 1504 |
| 5254 | { "AFGDTP7_EL12" , 0xE9B7, true, true, {} }, // 1505 |
| 5255 | { "AFGDTP8_EL12" , 0xE9B8, true, true, {} }, // 1506 |
| 5256 | { "AFGDTP9_EL12" , 0xE9B9, true, true, {} }, // 1507 |
| 5257 | { "AFGDTP10_EL12" , 0xE9BA, true, true, {} }, // 1508 |
| 5258 | { "AFGDTP11_EL12" , 0xE9BB, true, true, {} }, // 1509 |
| 5259 | { "AFGDTP12_EL12" , 0xE9BC, true, true, {} }, // 1510 |
| 5260 | { "AFGDTP13_EL12" , 0xE9BD, true, true, {} }, // 1511 |
| 5261 | { "AFGDTP14_EL12" , 0xE9BE, true, true, {} }, // 1512 |
| 5262 | { "AFGDTP15_EL12" , 0xE9BF, true, true, {} }, // 1513 |
| 5263 | { "AFGDTU0_EL12" , 0xE9C0, true, true, {} }, // 1514 |
| 5264 | { "AFGDTU1_EL12" , 0xE9C1, true, true, {} }, // 1515 |
| 5265 | { "AFGDTU2_EL12" , 0xE9C2, true, true, {} }, // 1516 |
| 5266 | { "AFGDTU3_EL12" , 0xE9C3, true, true, {} }, // 1517 |
| 5267 | { "AFGDTU4_EL12" , 0xE9C4, true, true, {} }, // 1518 |
| 5268 | { "AFGDTU5_EL12" , 0xE9C5, true, true, {} }, // 1519 |
| 5269 | { "AFGDTU6_EL12" , 0xE9C6, true, true, {} }, // 1520 |
| 5270 | { "AFGDTU7_EL12" , 0xE9C7, true, true, {} }, // 1521 |
| 5271 | { "AFGDTU8_EL12" , 0xE9C8, true, true, {} }, // 1522 |
| 5272 | { "AFGDTU9_EL12" , 0xE9C9, true, true, {} }, // 1523 |
| 5273 | { "AFGDTU10_EL12" , 0xE9CA, true, true, {} }, // 1524 |
| 5274 | { "AFGDTU11_EL12" , 0xE9CB, true, true, {} }, // 1525 |
| 5275 | { "AFGDTU12_EL12" , 0xE9CC, true, true, {} }, // 1526 |
| 5276 | { "AFGDTU13_EL12" , 0xE9CD, true, true, {} }, // 1527 |
| 5277 | { "AFGDTU14_EL12" , 0xE9CE, true, true, {} }, // 1528 |
| 5278 | { "AFGDTU15_EL12" , 0xE9CF, true, true, {} }, // 1529 |
| 5279 | { "SPSR_EL12" , 0xEA00, true, true, {AArch64::FeatureVH} }, // 1530 |
| 5280 | { "ELR_EL12" , 0xEA01, true, true, {AArch64::FeatureVH} }, // 1531 |
| 5281 | { "STINDEX_EL12" , 0xEA02, true, true, {} }, // 1532 |
| 5282 | { "TINDEX_EL12" , 0xEA03, true, true, {} }, // 1533 |
| 5283 | { "AFSR0_EL12" , 0xEA88, true, true, {AArch64::FeatureVH} }, // 1534 |
| 5284 | { "AFSR1_EL12" , 0xEA89, true, true, {AArch64::FeatureVH} }, // 1535 |
| 5285 | { "ESR_EL12" , 0xEA90, true, true, {AArch64::FeatureVH} }, // 1536 |
| 5286 | { "TFSR_EL12" , 0xEAB0, true, true, {AArch64::FeatureMTE} }, // 1537 |
| 5287 | { "FAR_EL12" , 0xEB00, true, true, {AArch64::FeatureVH} }, // 1538 |
| 5288 | { "PFAR_EL12" , 0xEB05, true, true, {} }, // 1539 |
| 5289 | { "PMSCR_EL12" , 0xECC8, true, true, {AArch64::FeatureSPE} }, // 1540 |
| 5290 | { "PMBSR_EL12" , 0xECD3, true, true, {} }, // 1541 |
| 5291 | { "TRBSR_EL12" , 0xECDB, true, true, {} }, // 1542 |
| 5292 | { "MAIR_EL12" , 0xED10, true, true, {AArch64::FeatureVH} }, // 1543 |
| 5293 | { "MAIR2_EL12" , 0xED11, true, true, {} }, // 1544 |
| 5294 | { "PIRE0_EL12" , 0xED12, true, true, {} }, // 1545 |
| 5295 | { "PIR_EL12" , 0xED13, true, true, {} }, // 1546 |
| 5296 | { "POR_EL12" , 0xED14, true, true, {} }, // 1547 |
| 5297 | { "TTTBRU_EL12" , 0xED16, true, true, {} }, // 1548 |
| 5298 | { "TTTBRP_EL12" , 0xED17, true, true, {} }, // 1549 |
| 5299 | { "AMAIR_EL12" , 0xED18, true, true, {AArch64::FeatureVH} }, // 1550 |
| 5300 | { "AMAIR2_EL12" , 0xED19, true, true, {} }, // 1551 |
| 5301 | { "MPAM1_EL12" , 0xED28, true, true, {} }, // 1552 |
| 5302 | { "MPAMCTL_EL12" , 0xED2A, true, true, {} }, // 1553 |
| 5303 | { "MPAMBW1_EL12" , 0xED2C, true, true, {} }, // 1554 |
| 5304 | { "VBAR_EL12" , 0xEE00, true, true, {AArch64::FeatureVH} }, // 1555 |
| 5305 | { "TPIDR3_EL12" , 0xEE80, true, true, {} }, // 1556 |
| 5306 | { "CONTEXTIDR_EL12" , 0xEE81, true, true, {AArch64::FeatureVH} }, // 1557 |
| 5307 | { "SCXTNUM_EL12" , 0xEE87, true, true, {AArch64::FeatureSpecRestrict} }, // 1558 |
| 5308 | { "CNTKCTL_EL12" , 0xEF08, true, true, {AArch64::FeatureVH} }, // 1559 |
| 5309 | { "CNTP_TVAL_EL02" , 0xEF10, true, true, {AArch64::FeatureVH} }, // 1560 |
| 5310 | { "CNTP_CTL_EL02" , 0xEF11, true, true, {AArch64::FeatureVH} }, // 1561 |
| 5311 | { "CNTP_CVAL_EL02" , 0xEF12, true, true, {AArch64::FeatureVH} }, // 1562 |
| 5312 | { "CNTV_TVAL_EL02" , 0xEF18, true, true, {AArch64::FeatureVH} }, // 1563 |
| 5313 | { "CNTV_CTL_EL02" , 0xEF19, true, true, {AArch64::FeatureVH} }, // 1564 |
| 5314 | { "CNTV_CVAL_EL02" , 0xEF1A, true, true, {AArch64::FeatureVH} }, // 1565 |
| 5315 | { "SCTLR_EL3" , 0xF080, true, true, {} }, // 1566 |
| 5316 | { "ACTLR_EL3" , 0xF081, true, true, {} }, // 1567 |
| 5317 | { "SCTLR2_EL3" , 0xF083, true, true, {} }, // 1568 |
| 5318 | { "SCR_EL3" , 0xF088, true, true, {} }, // 1569 |
| 5319 | { "SDER32_EL3" , 0xF089, true, true, {} }, // 1570 |
| 5320 | { "CPTR_EL3" , 0xF08A, true, true, {} }, // 1571 |
| 5321 | { "FGWTE3_EL3" , 0xF08D, true, true, {} }, // 1572 |
| 5322 | { "ZCR_EL3" , 0xF090, true, true, {AArch64::FeatureSVE} }, // 1573 |
| 5323 | { "SMCR_EL3" , 0xF096, true, true, {AArch64::FeatureSME} }, // 1574 |
| 5324 | { "MDCR_EL3" , 0xF099, true, true, {} }, // 1575 |
| 5325 | { "TTBR0_EL3" , 0xF100, true, true, {} }, // 1576 |
| 5326 | { "TCR_EL3" , 0xF102, true, true, {} }, // 1577 |
| 5327 | { "IRTBRP_EL3" , 0xF105, true, true, {} }, // 1578 |
| 5328 | { "DPOTBR0_EL3" , 0xF106, true, true, {} }, // 1579 |
| 5329 | { "GPTBR_EL3" , 0xF10C, true, true, {AArch64::FeatureRME} }, // 1580 |
| 5330 | { "GPCBW_EL3" , 0xF10D, true, true, {} }, // 1581 |
| 5331 | { "GPCCR_EL3" , 0xF10E, true, true, {AArch64::FeatureRME} }, // 1582 |
| 5332 | { "GCSCR_EL3" , 0xF128, true, true, {} }, // 1583 |
| 5333 | { "GCSPR_EL3" , 0xF129, true, true, {} }, // 1584 |
| 5334 | { "FGDTP0_EL3" , 0xF190, true, true, {} }, // 1585 |
| 5335 | { "FGDTP1_EL3" , 0xF191, true, true, {} }, // 1586 |
| 5336 | { "FGDTP2_EL3" , 0xF192, true, true, {} }, // 1587 |
| 5337 | { "FGDTP3_EL3" , 0xF193, true, true, {} }, // 1588 |
| 5338 | { "FGDTP4_EL3" , 0xF194, true, true, {} }, // 1589 |
| 5339 | { "FGDTP5_EL3" , 0xF195, true, true, {} }, // 1590 |
| 5340 | { "FGDTP6_EL3" , 0xF196, true, true, {} }, // 1591 |
| 5341 | { "FGDTP7_EL3" , 0xF197, true, true, {} }, // 1592 |
| 5342 | { "FGDTP8_EL3" , 0xF198, true, true, {} }, // 1593 |
| 5343 | { "FGDTP9_EL3" , 0xF199, true, true, {} }, // 1594 |
| 5344 | { "FGDTP10_EL3" , 0xF19A, true, true, {} }, // 1595 |
| 5345 | { "FGDTP11_EL3" , 0xF19B, true, true, {} }, // 1596 |
| 5346 | { "FGDTP12_EL3" , 0xF19C, true, true, {} }, // 1597 |
| 5347 | { "FGDTP13_EL3" , 0xF19D, true, true, {} }, // 1598 |
| 5348 | { "FGDTP14_EL3" , 0xF19E, true, true, {} }, // 1599 |
| 5349 | { "FGDTP15_EL3" , 0xF19F, true, true, {} }, // 1600 |
| 5350 | { "AFGDTP0_EL3" , 0xF1B0, true, true, {} }, // 1601 |
| 5351 | { "AFGDTP1_EL3" , 0xF1B1, true, true, {} }, // 1602 |
| 5352 | { "AFGDTP2_EL3" , 0xF1B2, true, true, {} }, // 1603 |
| 5353 | { "AFGDTP3_EL3" , 0xF1B3, true, true, {} }, // 1604 |
| 5354 | { "AFGDTP4_EL3" , 0xF1B4, true, true, {} }, // 1605 |
| 5355 | { "AFGDTP5_EL3" , 0xF1B5, true, true, {} }, // 1606 |
| 5356 | { "AFGDTP6_EL3" , 0xF1B6, true, true, {} }, // 1607 |
| 5357 | { "AFGDTP7_EL3" , 0xF1B7, true, true, {} }, // 1608 |
| 5358 | { "AFGDTP8_EL3" , 0xF1B8, true, true, {} }, // 1609 |
| 5359 | { "AFGDTP9_EL3" , 0xF1B9, true, true, {} }, // 1610 |
| 5360 | { "AFGDTP10_EL3" , 0xF1BA, true, true, {} }, // 1611 |
| 5361 | { "AFGDTP11_EL3" , 0xF1BB, true, true, {} }, // 1612 |
| 5362 | { "AFGDTP12_EL3" , 0xF1BC, true, true, {} }, // 1613 |
| 5363 | { "AFGDTP13_EL3" , 0xF1BD, true, true, {} }, // 1614 |
| 5364 | { "AFGDTP14_EL3" , 0xF1BE, true, true, {} }, // 1615 |
| 5365 | { "AFGDTP15_EL3" , 0xF1BF, true, true, {} }, // 1616 |
| 5366 | { "SPSR_EL3" , 0xF200, true, true, {} }, // 1617 |
| 5367 | { "ELR_EL3" , 0xF201, true, true, {} }, // 1618 |
| 5368 | { "STINDEX_EL3" , 0xF202, true, true, {} }, // 1619 |
| 5369 | { "TINDEX_EL3" , 0xF203, true, true, {} }, // 1620 |
| 5370 | { "SP_EL2" , 0xF208, true, true, {} }, // 1621 |
| 5371 | { "AFSR0_EL3" , 0xF288, true, true, {} }, // 1622 |
| 5372 | { "AFSR1_EL3" , 0xF289, true, true, {} }, // 1623 |
| 5373 | { "ESR_EL3" , 0xF290, true, true, {} }, // 1624 |
| 5374 | { "VSESR_EL3" , 0xF293, true, true, {} }, // 1625 |
| 5375 | { "TFSR_EL3" , 0xF2B0, true, true, {AArch64::FeatureMTE} }, // 1626 |
| 5376 | { "FAR_EL3" , 0xF300, true, true, {} }, // 1627 |
| 5377 | { "MFAR_EL3" , 0xF305, true, true, {} }, // 1628 |
| 5378 | { "PMBSR_EL3" , 0xF4D3, true, true, {} }, // 1629 |
| 5379 | { "TRBSR_EL3" , 0xF4DB, true, true, {} }, // 1630 |
| 5380 | { "MAIR2_EL3" , 0xF509, true, true, {} }, // 1631 |
| 5381 | { "MAIR_EL3" , 0xF510, true, true, {} }, // 1632 |
| 5382 | { "PIR_EL3" , 0xF513, true, true, {} }, // 1633 |
| 5383 | { "POR_EL3" , 0xF514, true, true, {} }, // 1634 |
| 5384 | { "TTTBRP_EL3" , 0xF517, true, true, {} }, // 1635 |
| 5385 | { "AMAIR_EL3" , 0xF518, true, true, {} }, // 1636 |
| 5386 | { "AMAIR2_EL3" , 0xF519, true, true, {} }, // 1637 |
| 5387 | { "MPAM3_EL3" , 0xF528, true, true, {} }, // 1638 |
| 5388 | { "MPAMCTL_EL3" , 0xF52A, true, true, {} }, // 1639 |
| 5389 | { "MPAMBW3_EL3" , 0xF52C, true, true, {} }, // 1640 |
| 5390 | { "MPAMVIDSR_EL3" , 0xF539, true, true, {} }, // 1641 |
| 5391 | { "MECID_RL_A_EL3" , 0xF551, true, true, {AArch64::FeatureMEC} }, // 1642 |
| 5392 | { "VBAR_EL3" , 0xF600, true, true, {} }, // 1643 |
| 5393 | { "RVBAR_EL3" , 0xF601, true, false, {} }, // 1644 |
| 5394 | { "RMR_EL3" , 0xF602, true, true, {} }, // 1645 |
| 5395 | { "VDISR_EL3" , 0xF609, true, true, {} }, // 1646 |
| 5396 | { "ICC_APR_EL3" , 0xF640, true, true, {} }, // 1647 |
| 5397 | { "ICC_PCR_EL3" , 0xF641, true, true, {} }, // 1648 |
| 5398 | { "ICC_DOMHPPIR_EL3" , 0xF642, true, false, {} }, // 1649 |
| 5399 | { "ICC_PPI_DOMAINR0_EL3" , 0xF644, true, true, {} }, // 1650 |
| 5400 | { "ICC_PPI_DOMAINR1_EL3" , 0xF645, true, true, {} }, // 1651 |
| 5401 | { "ICC_PPI_DOMAINR2_EL3" , 0xF646, true, true, {} }, // 1652 |
| 5402 | { "ICC_PPI_DOMAINR3_EL3" , 0xF647, true, true, {} }, // 1653 |
| 5403 | { "ICC_CR0_EL3" , 0xF648, true, true, {} }, // 1654 |
| 5404 | { "ICC_HPPIR_EL3" , 0xF649, true, false, {} }, // 1655 |
| 5405 | { "ICC_CTLR_EL3" , 0xF664, true, true, {} }, // 1656 |
| 5406 | { "ICC_SRE_EL3" , 0xF665, true, true, {} }, // 1657 |
| 5407 | { "ICC_IGRPEN1_EL3" , 0xF667, true, true, {} }, // 1658 |
| 5408 | { "TPIDR3_EL3" , 0xF680, true, true, {} }, // 1659 |
| 5409 | { "TPIDR_EL3" , 0xF682, true, true, {} }, // 1660 |
| 5410 | { "SCXTNUM_EL3" , 0xF687, true, true, {AArch64::FeatureSpecRestrict} }, // 1661 |
| 5411 | { "CNTPS_TVAL_EL1" , 0xFF10, true, true, {} }, // 1662 |
| 5412 | { "CNTPS_CTL_EL1" , 0xFF11, true, true, {} }, // 1663 |
| 5413 | { "CNTPS_CVAL_EL1" , 0xFF12, true, true, {} }, // 1664 |
| 5414 | }; |
| 5415 | |
| 5416 | llvm::iterator_range<const SysReg *> lookupSysRegByEncoding(uint16_t Encoding) { |
| 5417 | struct KeyType { |
| 5418 | uint16_t Encoding; |
| 5419 | }; |
| 5420 | KeyType Key = {Encoding}; |
| 5421 | struct Comp { |
| 5422 | bool operator()(const SysReg &LHS, const KeyType &RHS) const { |
| 5423 | if (LHS.Encoding < RHS.Encoding) |
| 5424 | return true; |
| 5425 | if (LHS.Encoding > RHS.Encoding) |
| 5426 | return false; |
| 5427 | return false; |
| 5428 | } |
| 5429 | bool operator()(const KeyType &LHS, const SysReg &RHS) const { |
| 5430 | if (LHS.Encoding < RHS.Encoding) |
| 5431 | return true; |
| 5432 | if (LHS.Encoding > RHS.Encoding) |
| 5433 | return false; |
| 5434 | return false; |
| 5435 | } |
| 5436 | }; |
| 5437 | auto Table = ArrayRef(SysRegsList); |
| 5438 | auto It = std::equal_range(Table.begin(), Table.end(), Key, Comp()); |
| 5439 | return llvm::make_range(It.first, It.second); |
| 5440 | } |
| 5441 | |
| 5442 | const SysReg *lookupSysRegByName(StringRef Name) { |
| 5443 | struct IndexType { |
| 5444 | const char * Name; |
| 5445 | unsigned _index; |
| 5446 | }; |
| 5447 | static const struct IndexType Index[] = { |
| 5448 | { "ACCDATA_EL1" , 902 }, |
| 5449 | { "ACTLRALIAS_EL1" , 587 }, |
| 5450 | { "ACTLRMASK_EL1" , 583 }, |
| 5451 | { "ACTLRMASK_EL12" , 1446 }, |
| 5452 | { "ACTLRMASK_EL2" , 1110 }, |
| 5453 | { "ACTLR_EL1" , 572 }, |
| 5454 | { "ACTLR_EL12" , 1438 }, |
| 5455 | { "ACTLR_EL2" , 1092 }, |
| 5456 | { "ACTLR_EL3" , 1567 }, |
| 5457 | { "AFGDTP0_EL1" , 652 }, |
| 5458 | { "AFGDTP0_EL12" , 1498 }, |
| 5459 | { "AFGDTP0_EL2" , 1196 }, |
| 5460 | { "AFGDTP0_EL3" , 1601 }, |
| 5461 | { "AFGDTP10_EL1" , 662 }, |
| 5462 | { "AFGDTP10_EL12" , 1508 }, |
| 5463 | { "AFGDTP10_EL2" , 1206 }, |
| 5464 | { "AFGDTP10_EL3" , 1611 }, |
| 5465 | { "AFGDTP11_EL1" , 663 }, |
| 5466 | { "AFGDTP11_EL12" , 1509 }, |
| 5467 | { "AFGDTP11_EL2" , 1207 }, |
| 5468 | { "AFGDTP11_EL3" , 1612 }, |
| 5469 | { "AFGDTP12_EL1" , 664 }, |
| 5470 | { "AFGDTP12_EL12" , 1510 }, |
| 5471 | { "AFGDTP12_EL2" , 1208 }, |
| 5472 | { "AFGDTP12_EL3" , 1613 }, |
| 5473 | { "AFGDTP13_EL1" , 665 }, |
| 5474 | { "AFGDTP13_EL12" , 1511 }, |
| 5475 | { "AFGDTP13_EL2" , 1209 }, |
| 5476 | { "AFGDTP13_EL3" , 1614 }, |
| 5477 | { "AFGDTP14_EL1" , 666 }, |
| 5478 | { "AFGDTP14_EL12" , 1512 }, |
| 5479 | { "AFGDTP14_EL2" , 1210 }, |
| 5480 | { "AFGDTP14_EL3" , 1615 }, |
| 5481 | { "AFGDTP15_EL1" , 667 }, |
| 5482 | { "AFGDTP15_EL12" , 1513 }, |
| 5483 | { "AFGDTP15_EL2" , 1211 }, |
| 5484 | { "AFGDTP15_EL3" , 1616 }, |
| 5485 | { "AFGDTP1_EL1" , 653 }, |
| 5486 | { "AFGDTP1_EL12" , 1499 }, |
| 5487 | { "AFGDTP1_EL2" , 1197 }, |
| 5488 | { "AFGDTP1_EL3" , 1602 }, |
| 5489 | { "AFGDTP2_EL1" , 654 }, |
| 5490 | { "AFGDTP2_EL12" , 1500 }, |
| 5491 | { "AFGDTP2_EL2" , 1198 }, |
| 5492 | { "AFGDTP2_EL3" , 1603 }, |
| 5493 | { "AFGDTP3_EL1" , 655 }, |
| 5494 | { "AFGDTP3_EL12" , 1501 }, |
| 5495 | { "AFGDTP3_EL2" , 1199 }, |
| 5496 | { "AFGDTP3_EL3" , 1604 }, |
| 5497 | { "AFGDTP4_EL1" , 656 }, |
| 5498 | { "AFGDTP4_EL12" , 1502 }, |
| 5499 | { "AFGDTP4_EL2" , 1200 }, |
| 5500 | { "AFGDTP4_EL3" , 1605 }, |
| 5501 | { "AFGDTP5_EL1" , 657 }, |
| 5502 | { "AFGDTP5_EL12" , 1503 }, |
| 5503 | { "AFGDTP5_EL2" , 1201 }, |
| 5504 | { "AFGDTP5_EL3" , 1606 }, |
| 5505 | { "AFGDTP6_EL1" , 658 }, |
| 5506 | { "AFGDTP6_EL12" , 1504 }, |
| 5507 | { "AFGDTP6_EL2" , 1202 }, |
| 5508 | { "AFGDTP6_EL3" , 1607 }, |
| 5509 | { "AFGDTP7_EL1" , 659 }, |
| 5510 | { "AFGDTP7_EL12" , 1505 }, |
| 5511 | { "AFGDTP7_EL2" , 1203 }, |
| 5512 | { "AFGDTP7_EL3" , 1608 }, |
| 5513 | { "AFGDTP8_EL1" , 660 }, |
| 5514 | { "AFGDTP8_EL12" , 1506 }, |
| 5515 | { "AFGDTP8_EL2" , 1204 }, |
| 5516 | { "AFGDTP8_EL3" , 1609 }, |
| 5517 | { "AFGDTP9_EL1" , 661 }, |
| 5518 | { "AFGDTP9_EL12" , 1507 }, |
| 5519 | { "AFGDTP9_EL2" , 1205 }, |
| 5520 | { "AFGDTP9_EL3" , 1610 }, |
| 5521 | { "AFGDTU0_EL1" , 668 }, |
| 5522 | { "AFGDTU0_EL12" , 1514 }, |
| 5523 | { "AFGDTU0_EL2" , 1212 }, |
| 5524 | { "AFGDTU10_EL1" , 678 }, |
| 5525 | { "AFGDTU10_EL12" , 1524 }, |
| 5526 | { "AFGDTU10_EL2" , 1222 }, |
| 5527 | { "AFGDTU11_EL1" , 679 }, |
| 5528 | { "AFGDTU11_EL12" , 1525 }, |
| 5529 | { "AFGDTU11_EL2" , 1223 }, |
| 5530 | { "AFGDTU12_EL1" , 680 }, |
| 5531 | { "AFGDTU12_EL12" , 1526 }, |
| 5532 | { "AFGDTU12_EL2" , 1224 }, |
| 5533 | { "AFGDTU13_EL1" , 681 }, |
| 5534 | { "AFGDTU13_EL12" , 1527 }, |
| 5535 | { "AFGDTU13_EL2" , 1225 }, |
| 5536 | { "AFGDTU14_EL1" , 682 }, |
| 5537 | { "AFGDTU14_EL12" , 1528 }, |
| 5538 | { "AFGDTU14_EL2" , 1226 }, |
| 5539 | { "AFGDTU15_EL1" , 683 }, |
| 5540 | { "AFGDTU15_EL12" , 1529 }, |
| 5541 | { "AFGDTU15_EL2" , 1227 }, |
| 5542 | { "AFGDTU1_EL1" , 669 }, |
| 5543 | { "AFGDTU1_EL12" , 1515 }, |
| 5544 | { "AFGDTU1_EL2" , 1213 }, |
| 5545 | { "AFGDTU2_EL1" , 670 }, |
| 5546 | { "AFGDTU2_EL12" , 1516 }, |
| 5547 | { "AFGDTU2_EL2" , 1214 }, |
| 5548 | { "AFGDTU3_EL1" , 671 }, |
| 5549 | { "AFGDTU3_EL12" , 1517 }, |
| 5550 | { "AFGDTU3_EL2" , 1215 }, |
| 5551 | { "AFGDTU4_EL1" , 672 }, |
| 5552 | { "AFGDTU4_EL12" , 1518 }, |
| 5553 | { "AFGDTU4_EL2" , 1216 }, |
| 5554 | { "AFGDTU5_EL1" , 673 }, |
| 5555 | { "AFGDTU5_EL12" , 1519 }, |
| 5556 | { "AFGDTU5_EL2" , 1217 }, |
| 5557 | { "AFGDTU6_EL1" , 674 }, |
| 5558 | { "AFGDTU6_EL12" , 1520 }, |
| 5559 | { "AFGDTU6_EL2" , 1218 }, |
| 5560 | { "AFGDTU7_EL1" , 675 }, |
| 5561 | { "AFGDTU7_EL12" , 1521 }, |
| 5562 | { "AFGDTU7_EL2" , 1219 }, |
| 5563 | { "AFGDTU8_EL1" , 676 }, |
| 5564 | { "AFGDTU8_EL12" , 1522 }, |
| 5565 | { "AFGDTU8_EL2" , 1220 }, |
| 5566 | { "AFGDTU9_EL1" , 677 }, |
| 5567 | { "AFGDTU9_EL12" , 1523 }, |
| 5568 | { "AFGDTU9_EL2" , 1221 }, |
| 5569 | { "AFSR0_EL1" , 696 }, |
| 5570 | { "AFSR0_EL12" , 1534 }, |
| 5571 | { "AFSR0_EL2" , 1238 }, |
| 5572 | { "AFSR0_EL3" , 1622 }, |
| 5573 | { "AFSR1_EL1" , 697 }, |
| 5574 | { "AFSR1_EL12" , 1535 }, |
| 5575 | { "AFSR1_EL2" , 1239 }, |
| 5576 | { "AFSR1_EL3" , 1623 }, |
| 5577 | { "AIDR_EL1" , 911 }, |
| 5578 | { "ALLINT" , 693 }, |
| 5579 | { "AMAIR2_EL1" , 790 }, |
| 5580 | { "AMAIR2_EL12" , 1551 }, |
| 5581 | { "AMAIR2_EL2" , 1293 }, |
| 5582 | { "AMAIR2_EL3" , 1637 }, |
| 5583 | { "AMAIR_EL1" , 789 }, |
| 5584 | { "AMAIR_EL12" , 1550 }, |
| 5585 | { "AMAIR_EL2" , 1292 }, |
| 5586 | { "AMAIR_EL3" , 1636 }, |
| 5587 | { "AMCFGR_EL0" , 966 }, |
| 5588 | { "AMCG1IDR_EL0" , 971 }, |
| 5589 | { "AMCGCR_EL0" , 967 }, |
| 5590 | { "AMCNTENCLR0_EL0" , 969 }, |
| 5591 | { "AMCNTENCLR1_EL0" , 972 }, |
| 5592 | { "AMCNTENSET0_EL0" , 970 }, |
| 5593 | { "AMCNTENSET1_EL0" , 973 }, |
| 5594 | { "AMCR_EL0" , 965 }, |
| 5595 | { "AMEVCNTR00_EL0" , 974 }, |
| 5596 | { "AMEVCNTR01_EL0" , 975 }, |
| 5597 | { "AMEVCNTR02_EL0" , 976 }, |
| 5598 | { "AMEVCNTR03_EL0" , 977 }, |
| 5599 | { "AMEVCNTR10_EL0" , 982 }, |
| 5600 | { "AMEVCNTR110_EL0" , 992 }, |
| 5601 | { "AMEVCNTR111_EL0" , 993 }, |
| 5602 | { "AMEVCNTR112_EL0" , 994 }, |
| 5603 | { "AMEVCNTR113_EL0" , 995 }, |
| 5604 | { "AMEVCNTR114_EL0" , 996 }, |
| 5605 | { "AMEVCNTR115_EL0" , 997 }, |
| 5606 | { "AMEVCNTR11_EL0" , 983 }, |
| 5607 | { "AMEVCNTR12_EL0" , 984 }, |
| 5608 | { "AMEVCNTR13_EL0" , 985 }, |
| 5609 | { "AMEVCNTR14_EL0" , 986 }, |
| 5610 | { "AMEVCNTR15_EL0" , 987 }, |
| 5611 | { "AMEVCNTR16_EL0" , 988 }, |
| 5612 | { "AMEVCNTR17_EL0" , 989 }, |
| 5613 | { "AMEVCNTR18_EL0" , 990 }, |
| 5614 | { "AMEVCNTR19_EL0" , 991 }, |
| 5615 | { "AMEVCNTVOFF00_EL2" , 1387 }, |
| 5616 | { "AMEVCNTVOFF010_EL2" , 1397 }, |
| 5617 | { "AMEVCNTVOFF011_EL2" , 1398 }, |
| 5618 | { "AMEVCNTVOFF012_EL2" , 1399 }, |
| 5619 | { "AMEVCNTVOFF013_EL2" , 1400 }, |
| 5620 | { "AMEVCNTVOFF014_EL2" , 1401 }, |
| 5621 | { "AMEVCNTVOFF015_EL2" , 1402 }, |
| 5622 | { "AMEVCNTVOFF01_EL2" , 1388 }, |
| 5623 | { "AMEVCNTVOFF02_EL2" , 1389 }, |
| 5624 | { "AMEVCNTVOFF03_EL2" , 1390 }, |
| 5625 | { "AMEVCNTVOFF04_EL2" , 1391 }, |
| 5626 | { "AMEVCNTVOFF05_EL2" , 1392 }, |
| 5627 | { "AMEVCNTVOFF06_EL2" , 1393 }, |
| 5628 | { "AMEVCNTVOFF07_EL2" , 1394 }, |
| 5629 | { "AMEVCNTVOFF08_EL2" , 1395 }, |
| 5630 | { "AMEVCNTVOFF09_EL2" , 1396 }, |
| 5631 | { "AMEVCNTVOFF10_EL2" , 1403 }, |
| 5632 | { "AMEVCNTVOFF110_EL2" , 1413 }, |
| 5633 | { "AMEVCNTVOFF111_EL2" , 1414 }, |
| 5634 | { "AMEVCNTVOFF112_EL2" , 1415 }, |
| 5635 | { "AMEVCNTVOFF113_EL2" , 1416 }, |
| 5636 | { "AMEVCNTVOFF114_EL2" , 1417 }, |
| 5637 | { "AMEVCNTVOFF115_EL2" , 1418 }, |
| 5638 | { "AMEVCNTVOFF11_EL2" , 1404 }, |
| 5639 | { "AMEVCNTVOFF12_EL2" , 1405 }, |
| 5640 | { "AMEVCNTVOFF13_EL2" , 1406 }, |
| 5641 | { "AMEVCNTVOFF14_EL2" , 1407 }, |
| 5642 | { "AMEVCNTVOFF15_EL2" , 1408 }, |
| 5643 | { "AMEVCNTVOFF16_EL2" , 1409 }, |
| 5644 | { "AMEVCNTVOFF17_EL2" , 1410 }, |
| 5645 | { "AMEVCNTVOFF18_EL2" , 1411 }, |
| 5646 | { "AMEVCNTVOFF19_EL2" , 1412 }, |
| 5647 | { "AMEVTYPER00_EL0" , 978 }, |
| 5648 | { "AMEVTYPER01_EL0" , 979 }, |
| 5649 | { "AMEVTYPER02_EL0" , 980 }, |
| 5650 | { "AMEVTYPER03_EL0" , 981 }, |
| 5651 | { "AMEVTYPER10_EL0" , 998 }, |
| 5652 | { "AMEVTYPER110_EL0" , 1008 }, |
| 5653 | { "AMEVTYPER111_EL0" , 1009 }, |
| 5654 | { "AMEVTYPER112_EL0" , 1010 }, |
| 5655 | { "AMEVTYPER113_EL0" , 1011 }, |
| 5656 | { "AMEVTYPER114_EL0" , 1012 }, |
| 5657 | { "AMEVTYPER115_EL0" , 1013 }, |
| 5658 | { "AMEVTYPER11_EL0" , 999 }, |
| 5659 | { "AMEVTYPER12_EL0" , 1000 }, |
| 5660 | { "AMEVTYPER13_EL0" , 1001 }, |
| 5661 | { "AMEVTYPER14_EL0" , 1002 }, |
| 5662 | { "AMEVTYPER15_EL0" , 1003 }, |
| 5663 | { "AMEVTYPER16_EL0" , 1004 }, |
| 5664 | { "AMEVTYPER17_EL0" , 1005 }, |
| 5665 | { "AMEVTYPER18_EL0" , 1006 }, |
| 5666 | { "AMEVTYPER19_EL0" , 1007 }, |
| 5667 | { "AMUSERENR_EL0" , 968 }, |
| 5668 | { "APDAKEYHI_EL1" , 604 }, |
| 5669 | { "APDAKEYLO_EL1" , 603 }, |
| 5670 | { "APDBKEYHI_EL1" , 606 }, |
| 5671 | { "APDBKEYLO_EL1" , 605 }, |
| 5672 | { "APGAKEYHI_EL1" , 612 }, |
| 5673 | { "APGAKEYLO_EL1" , 611 }, |
| 5674 | { "APIAKEYHI_EL1" , 599 }, |
| 5675 | { "APIAKEYLO_EL1" , 598 }, |
| 5676 | { "APIBKEYHI_EL1" , 601 }, |
| 5677 | { "APIBKEYLO_EL1" , 600 }, |
| 5678 | { "BRBCR_EL1" , 433 }, |
| 5679 | { "BRBCR_EL12" , 520 }, |
| 5680 | { "BRBCR_EL2" , 518 }, |
| 5681 | { "BRBFCR_EL1" , 434 }, |
| 5682 | { "BRBIDR0_EL1" , 439 }, |
| 5683 | { "BRBINF0_EL1" , 337 }, |
| 5684 | { "BRBINF10_EL1" , 397 }, |
| 5685 | { "BRBINF11_EL1" , 403 }, |
| 5686 | { "BRBINF12_EL1" , 409 }, |
| 5687 | { "BRBINF13_EL1" , 415 }, |
| 5688 | { "BRBINF14_EL1" , 421 }, |
| 5689 | { "BRBINF15_EL1" , 427 }, |
| 5690 | { "BRBINF16_EL1" , 340 }, |
| 5691 | { "BRBINF17_EL1" , 346 }, |
| 5692 | { "BRBINF18_EL1" , 352 }, |
| 5693 | { "BRBINF19_EL1" , 358 }, |
| 5694 | { "BRBINF1_EL1" , 343 }, |
| 5695 | { "BRBINF20_EL1" , 364 }, |
| 5696 | { "BRBINF21_EL1" , 370 }, |
| 5697 | { "BRBINF22_EL1" , 376 }, |
| 5698 | { "BRBINF23_EL1" , 382 }, |
| 5699 | { "BRBINF24_EL1" , 388 }, |
| 5700 | { "BRBINF25_EL1" , 394 }, |
| 5701 | { "BRBINF26_EL1" , 400 }, |
| 5702 | { "BRBINF27_EL1" , 406 }, |
| 5703 | { "BRBINF28_EL1" , 412 }, |
| 5704 | { "BRBINF29_EL1" , 418 }, |
| 5705 | { "BRBINF2_EL1" , 349 }, |
| 5706 | { "BRBINF30_EL1" , 424 }, |
| 5707 | { "BRBINF31_EL1" , 430 }, |
| 5708 | { "BRBINF3_EL1" , 355 }, |
| 5709 | { "BRBINF4_EL1" , 361 }, |
| 5710 | { "BRBINF5_EL1" , 367 }, |
| 5711 | { "BRBINF6_EL1" , 373 }, |
| 5712 | { "BRBINF7_EL1" , 379 }, |
| 5713 | { "BRBINF8_EL1" , 385 }, |
| 5714 | { "BRBINF9_EL1" , 391 }, |
| 5715 | { "BRBINFINJ_EL1" , 436 }, |
| 5716 | { "BRBSRC0_EL1" , 338 }, |
| 5717 | { "BRBSRC10_EL1" , 398 }, |
| 5718 | { "BRBSRC11_EL1" , 404 }, |
| 5719 | { "BRBSRC12_EL1" , 410 }, |
| 5720 | { "BRBSRC13_EL1" , 416 }, |
| 5721 | { "BRBSRC14_EL1" , 422 }, |
| 5722 | { "BRBSRC15_EL1" , 428 }, |
| 5723 | { "BRBSRC16_EL1" , 341 }, |
| 5724 | { "BRBSRC17_EL1" , 347 }, |
| 5725 | { "BRBSRC18_EL1" , 353 }, |
| 5726 | { "BRBSRC19_EL1" , 359 }, |
| 5727 | { "BRBSRC1_EL1" , 344 }, |
| 5728 | { "BRBSRC20_EL1" , 365 }, |
| 5729 | { "BRBSRC21_EL1" , 371 }, |
| 5730 | { "BRBSRC22_EL1" , 377 }, |
| 5731 | { "BRBSRC23_EL1" , 383 }, |
| 5732 | { "BRBSRC24_EL1" , 389 }, |
| 5733 | { "BRBSRC25_EL1" , 395 }, |
| 5734 | { "BRBSRC26_EL1" , 401 }, |
| 5735 | { "BRBSRC27_EL1" , 407 }, |
| 5736 | { "BRBSRC28_EL1" , 413 }, |
| 5737 | { "BRBSRC29_EL1" , 419 }, |
| 5738 | { "BRBSRC2_EL1" , 350 }, |
| 5739 | { "BRBSRC30_EL1" , 425 }, |
| 5740 | { "BRBSRC31_EL1" , 431 }, |
| 5741 | { "BRBSRC3_EL1" , 356 }, |
| 5742 | { "BRBSRC4_EL1" , 362 }, |
| 5743 | { "BRBSRC5_EL1" , 368 }, |
| 5744 | { "BRBSRC6_EL1" , 374 }, |
| 5745 | { "BRBSRC7_EL1" , 380 }, |
| 5746 | { "BRBSRC8_EL1" , 386 }, |
| 5747 | { "BRBSRC9_EL1" , 392 }, |
| 5748 | { "BRBSRCINJ_EL1" , 437 }, |
| 5749 | { "BRBTGT0_EL1" , 339 }, |
| 5750 | { "BRBTGT10_EL1" , 399 }, |
| 5751 | { "BRBTGT11_EL1" , 405 }, |
| 5752 | { "BRBTGT12_EL1" , 411 }, |
| 5753 | { "BRBTGT13_EL1" , 417 }, |
| 5754 | { "BRBTGT14_EL1" , 423 }, |
| 5755 | { "BRBTGT15_EL1" , 429 }, |
| 5756 | { "BRBTGT16_EL1" , 342 }, |
| 5757 | { "BRBTGT17_EL1" , 348 }, |
| 5758 | { "BRBTGT18_EL1" , 354 }, |
| 5759 | { "BRBTGT19_EL1" , 360 }, |
| 5760 | { "BRBTGT1_EL1" , 345 }, |
| 5761 | { "BRBTGT20_EL1" , 366 }, |
| 5762 | { "BRBTGT21_EL1" , 372 }, |
| 5763 | { "BRBTGT22_EL1" , 378 }, |
| 5764 | { "BRBTGT23_EL1" , 384 }, |
| 5765 | { "BRBTGT24_EL1" , 390 }, |
| 5766 | { "BRBTGT25_EL1" , 396 }, |
| 5767 | { "BRBTGT26_EL1" , 402 }, |
| 5768 | { "BRBTGT27_EL1" , 408 }, |
| 5769 | { "BRBTGT28_EL1" , 414 }, |
| 5770 | { "BRBTGT29_EL1" , 420 }, |
| 5771 | { "BRBTGT2_EL1" , 351 }, |
| 5772 | { "BRBTGT30_EL1" , 426 }, |
| 5773 | { "BRBTGT31_EL1" , 432 }, |
| 5774 | { "BRBTGT3_EL1" , 357 }, |
| 5775 | { "BRBTGT4_EL1" , 363 }, |
| 5776 | { "BRBTGT5_EL1" , 369 }, |
| 5777 | { "BRBTGT6_EL1" , 375 }, |
| 5778 | { "BRBTGT7_EL1" , 381 }, |
| 5779 | { "BRBTGT8_EL1" , 387 }, |
| 5780 | { "BRBTGT9_EL1" , 393 }, |
| 5781 | { "BRBTGTINJ_EL1" , 438 }, |
| 5782 | { "BRBTS_EL1" , 435 }, |
| 5783 | { "CCSIDR2_EL1" , 908 }, |
| 5784 | { "CCSIDR_EL1" , 906 }, |
| 5785 | { "CLIDR_EL1" , 907 }, |
| 5786 | { "CNTFRQ_EL0" , 1014 }, |
| 5787 | { "CNTHCTL_EL2" , 1424 }, |
| 5788 | { "CNTHPS_CTL_EL2" , 1435 }, |
| 5789 | { "CNTHPS_CVAL_EL2" , 1436 }, |
| 5790 | { "CNTHPS_TVAL_EL2" , 1434 }, |
| 5791 | { "CNTHP_CTL_EL2" , 1426 }, |
| 5792 | { "CNTHP_CVAL_EL2" , 1427 }, |
| 5793 | { "CNTHP_TVAL_EL2" , 1425 }, |
| 5794 | { "CNTHVS_CTL_EL2" , 1432 }, |
| 5795 | { "CNTHVS_CVAL_EL2" , 1433 }, |
| 5796 | { "CNTHVS_TVAL_EL2" , 1431 }, |
| 5797 | { "CNTHV_CTL_EL2" , 1429 }, |
| 5798 | { "CNTHV_CVAL_EL2" , 1430 }, |
| 5799 | { "CNTHV_TVAL_EL2" , 1428 }, |
| 5800 | { "CNTISCALE_EL2" , 1421 }, |
| 5801 | { "CNTKCTL_EL1" , 905 }, |
| 5802 | { "CNTKCTL_EL12" , 1559 }, |
| 5803 | { "CNTPCTSS_EL0" , 1017 }, |
| 5804 | { "CNTPCT_EL0" , 1015 }, |
| 5805 | { "CNTPOFF_EL2" , 1422 }, |
| 5806 | { "CNTPS_CTL_EL1" , 1663 }, |
| 5807 | { "CNTPS_CVAL_EL1" , 1664 }, |
| 5808 | { "CNTPS_TVAL_EL1" , 1662 }, |
| 5809 | { "CNTP_CTL_EL0" , 1020 }, |
| 5810 | { "CNTP_CTL_EL02" , 1561 }, |
| 5811 | { "CNTP_CVAL_EL0" , 1021 }, |
| 5812 | { "CNTP_CVAL_EL02" , 1562 }, |
| 5813 | { "CNTP_TVAL_EL0" , 1019 }, |
| 5814 | { "CNTP_TVAL_EL02" , 1560 }, |
| 5815 | { "CNTSCALE_EL2" , 1420 }, |
| 5816 | { "CNTVCTSS_EL0" , 1018 }, |
| 5817 | { "CNTVCT_EL0" , 1016 }, |
| 5818 | { "CNTVFRQ_EL2" , 1423 }, |
| 5819 | { "CNTVOFF_EL2" , 1419 }, |
| 5820 | { "CNTV_CTL_EL0" , 1023 }, |
| 5821 | { "CNTV_CTL_EL02" , 1564 }, |
| 5822 | { "CNTV_CVAL_EL0" , 1024 }, |
| 5823 | { "CNTV_CVAL_EL02" , 1565 }, |
| 5824 | { "CNTV_TVAL_EL0" , 1022 }, |
| 5825 | { "CNTV_TVAL_EL02" , 1563 }, |
| 5826 | { "CONTEXTIDR_EL1" , 899 }, |
| 5827 | { "CONTEXTIDR_EL12" , 1557 }, |
| 5828 | { "CONTEXTIDR_EL2" , 1384 }, |
| 5829 | { "CPACRALIAS_EL1" , 586 }, |
| 5830 | { "CPACRMASK_EL1" , 584 }, |
| 5831 | { "CPACRMASK_EL12" , 1447 }, |
| 5832 | { "CPACR_EL1" , 573 }, |
| 5833 | { "CPACR_EL12" , 1439 }, |
| 5834 | { "CPTRMASK_EL2" , 1111 }, |
| 5835 | { "CPTR_EL2" , 1096 }, |
| 5836 | { "CPTR_EL3" , 1571 }, |
| 5837 | { "CSSELR_EL1" , 920 }, |
| 5838 | { "CTR_EL0" , 921 }, |
| 5839 | { "CURRENTEL" , 690 }, |
| 5840 | { "DACR32_EL2" , 1155 }, |
| 5841 | { "DAIF" , 932 }, |
| 5842 | { "DBGAUTHSTATUS_EL1" , 78 }, |
| 5843 | { "DBGBCR0_EL1" , 2 }, |
| 5844 | { "DBGBCR10_EL1" , 48 }, |
| 5845 | { "DBGBCR11_EL1" , 52 }, |
| 5846 | { "DBGBCR12_EL1" , 56 }, |
| 5847 | { "DBGBCR13_EL1" , 60 }, |
| 5848 | { "DBGBCR14_EL1" , 64 }, |
| 5849 | { "DBGBCR15_EL1" , 68 }, |
| 5850 | { "DBGBCR1_EL1" , 6 }, |
| 5851 | { "DBGBCR2_EL1" , 12 }, |
| 5852 | { "DBGBCR3_EL1" , 17 }, |
| 5853 | { "DBGBCR4_EL1" , 22 }, |
| 5854 | { "DBGBCR5_EL1" , 27 }, |
| 5855 | { "DBGBCR6_EL1" , 32 }, |
| 5856 | { "DBGBCR7_EL1" , 36 }, |
| 5857 | { "DBGBCR8_EL1" , 40 }, |
| 5858 | { "DBGBCR9_EL1" , 44 }, |
| 5859 | { "DBGBVR0_EL1" , 1 }, |
| 5860 | { "DBGBVR10_EL1" , 47 }, |
| 5861 | { "DBGBVR11_EL1" , 51 }, |
| 5862 | { "DBGBVR12_EL1" , 55 }, |
| 5863 | { "DBGBVR13_EL1" , 59 }, |
| 5864 | { "DBGBVR14_EL1" , 63 }, |
| 5865 | { "DBGBVR15_EL1" , 67 }, |
| 5866 | { "DBGBVR1_EL1" , 5 }, |
| 5867 | { "DBGBVR2_EL1" , 11 }, |
| 5868 | { "DBGBVR3_EL1" , 16 }, |
| 5869 | { "DBGBVR4_EL1" , 21 }, |
| 5870 | { "DBGBVR5_EL1" , 26 }, |
| 5871 | { "DBGBVR6_EL1" , 31 }, |
| 5872 | { "DBGBVR7_EL1" , 35 }, |
| 5873 | { "DBGBVR8_EL1" , 39 }, |
| 5874 | { "DBGBVR9_EL1" , 43 }, |
| 5875 | { "DBGCLAIMCLR_EL1" , 77 }, |
| 5876 | { "DBGCLAIMSET_EL1" , 76 }, |
| 5877 | { "DBGDTRRX_EL0" , 444 }, |
| 5878 | { "DBGDTRTX_EL0" , 445 }, |
| 5879 | { "DBGDTR_EL0" , 443 }, |
| 5880 | { "DBGPRCR_EL1" , 75 }, |
| 5881 | { "DBGVCR32_EL2" , 517 }, |
| 5882 | { "DBGWCR0_EL1" , 4 }, |
| 5883 | { "DBGWCR10_EL1" , 50 }, |
| 5884 | { "DBGWCR11_EL1" , 54 }, |
| 5885 | { "DBGWCR12_EL1" , 58 }, |
| 5886 | { "DBGWCR13_EL1" , 62 }, |
| 5887 | { "DBGWCR14_EL1" , 66 }, |
| 5888 | { "DBGWCR15_EL1" , 70 }, |
| 5889 | { "DBGWCR1_EL1" , 8 }, |
| 5890 | { "DBGWCR2_EL1" , 14 }, |
| 5891 | { "DBGWCR3_EL1" , 19 }, |
| 5892 | { "DBGWCR4_EL1" , 24 }, |
| 5893 | { "DBGWCR5_EL1" , 29 }, |
| 5894 | { "DBGWCR6_EL1" , 34 }, |
| 5895 | { "DBGWCR7_EL1" , 38 }, |
| 5896 | { "DBGWCR8_EL1" , 42 }, |
| 5897 | { "DBGWCR9_EL1" , 46 }, |
| 5898 | { "DBGWVR0_EL1" , 3 }, |
| 5899 | { "DBGWVR10_EL1" , 49 }, |
| 5900 | { "DBGWVR11_EL1" , 53 }, |
| 5901 | { "DBGWVR12_EL1" , 57 }, |
| 5902 | { "DBGWVR13_EL1" , 61 }, |
| 5903 | { "DBGWVR14_EL1" , 65 }, |
| 5904 | { "DBGWVR15_EL1" , 69 }, |
| 5905 | { "DBGWVR1_EL1" , 7 }, |
| 5906 | { "DBGWVR2_EL1" , 13 }, |
| 5907 | { "DBGWVR3_EL1" , 18 }, |
| 5908 | { "DBGWVR4_EL1" , 23 }, |
| 5909 | { "DBGWVR5_EL1" , 28 }, |
| 5910 | { "DBGWVR6_EL1" , 33 }, |
| 5911 | { "DBGWVR7_EL1" , 37 }, |
| 5912 | { "DBGWVR8_EL1" , 41 }, |
| 5913 | { "DBGWVR9_EL1" , 45 }, |
| 5914 | { "DCZID_EL0" , 922 }, |
| 5915 | { "DISR_EL1" , 810 }, |
| 5916 | { "DIT" , 934 }, |
| 5917 | { "DLR_EL0" , 941 }, |
| 5918 | { "DPOCR_EL0" , 942 }, |
| 5919 | { "DPOTBR0_EL1" , 596 }, |
| 5920 | { "DPOTBR0_EL12" , 1455 }, |
| 5921 | { "DPOTBR0_EL2" , 1126 }, |
| 5922 | { "DPOTBR0_EL3" , 1579 }, |
| 5923 | { "DPOTBR1_EL1" , 597 }, |
| 5924 | { "DPOTBR1_EL12" , 1456 }, |
| 5925 | { "DPOTBR1_EL2" , 1127 }, |
| 5926 | { "DSPSR_EL0" , 940 }, |
| 5927 | { "ELR_EL1" , 685 }, |
| 5928 | { "ELR_EL12" , 1531 }, |
| 5929 | { "ELR_EL2" , 1229 }, |
| 5930 | { "ELR_EL3" , 1618 }, |
| 5931 | { "ERRIDR_EL1" , 699 }, |
| 5932 | { "ERRSELR_EL1" , 700 }, |
| 5933 | { "ERXADDR_EL1" , 705 }, |
| 5934 | { "ERXCTLR_EL1" , 703 }, |
| 5935 | { "ERXFR_EL1" , 702 }, |
| 5936 | { "ERXGSR_EL1" , 701 }, |
| 5937 | { "ERXMISC0_EL1" , 709 }, |
| 5938 | { "ERXMISC1_EL1" , 710 }, |
| 5939 | { "ERXMISC2_EL1" , 711 }, |
| 5940 | { "ERXMISC3_EL1" , 712 }, |
| 5941 | { "ERXPFGCDN_EL1" , 708 }, |
| 5942 | { "ERXPFGCTL_EL1" , 707 }, |
| 5943 | { "ERXPFGF_EL1" , 706 }, |
| 5944 | { "ERXSTATUS_EL1" , 704 }, |
| 5945 | { "ESR_EL1" , 698 }, |
| 5946 | { "ESR_EL12" , 1536 }, |
| 5947 | { "ESR_EL2" , 1240 }, |
| 5948 | { "ESR_EL3" , 1624 }, |
| 5949 | { "FAR_EL1" , 715 }, |
| 5950 | { "FAR_EL12" , 1538 }, |
| 5951 | { "FAR_EL2" , 1244 }, |
| 5952 | { "FAR_EL3" , 1627 }, |
| 5953 | { "FGDTP0_EL1" , 620 }, |
| 5954 | { "FGDTP0_EL12" , 1466 }, |
| 5955 | { "FGDTP0_EL2" , 1164 }, |
| 5956 | { "FGDTP0_EL3" , 1585 }, |
| 5957 | { "FGDTP10_EL1" , 630 }, |
| 5958 | { "FGDTP10_EL12" , 1476 }, |
| 5959 | { "FGDTP10_EL2" , 1174 }, |
| 5960 | { "FGDTP10_EL3" , 1595 }, |
| 5961 | { "FGDTP11_EL1" , 631 }, |
| 5962 | { "FGDTP11_EL12" , 1477 }, |
| 5963 | { "FGDTP11_EL2" , 1175 }, |
| 5964 | { "FGDTP11_EL3" , 1596 }, |
| 5965 | { "FGDTP12_EL1" , 632 }, |
| 5966 | { "FGDTP12_EL12" , 1478 }, |
| 5967 | { "FGDTP12_EL2" , 1176 }, |
| 5968 | { "FGDTP12_EL3" , 1597 }, |
| 5969 | { "FGDTP13_EL1" , 633 }, |
| 5970 | { "FGDTP13_EL12" , 1479 }, |
| 5971 | { "FGDTP13_EL2" , 1177 }, |
| 5972 | { "FGDTP13_EL3" , 1598 }, |
| 5973 | { "FGDTP14_EL1" , 634 }, |
| 5974 | { "FGDTP14_EL12" , 1480 }, |
| 5975 | { "FGDTP14_EL2" , 1178 }, |
| 5976 | { "FGDTP14_EL3" , 1599 }, |
| 5977 | { "FGDTP15_EL1" , 635 }, |
| 5978 | { "FGDTP15_EL12" , 1481 }, |
| 5979 | { "FGDTP15_EL2" , 1179 }, |
| 5980 | { "FGDTP15_EL3" , 1600 }, |
| 5981 | { "FGDTP1_EL1" , 621 }, |
| 5982 | { "FGDTP1_EL12" , 1467 }, |
| 5983 | { "FGDTP1_EL2" , 1165 }, |
| 5984 | { "FGDTP1_EL3" , 1586 }, |
| 5985 | { "FGDTP2_EL1" , 622 }, |
| 5986 | { "FGDTP2_EL12" , 1468 }, |
| 5987 | { "FGDTP2_EL2" , 1166 }, |
| 5988 | { "FGDTP2_EL3" , 1587 }, |
| 5989 | { "FGDTP3_EL1" , 623 }, |
| 5990 | { "FGDTP3_EL12" , 1469 }, |
| 5991 | { "FGDTP3_EL2" , 1167 }, |
| 5992 | { "FGDTP3_EL3" , 1588 }, |
| 5993 | { "FGDTP4_EL1" , 624 }, |
| 5994 | { "FGDTP4_EL12" , 1470 }, |
| 5995 | { "FGDTP4_EL2" , 1168 }, |
| 5996 | { "FGDTP4_EL3" , 1589 }, |
| 5997 | { "FGDTP5_EL1" , 625 }, |
| 5998 | { "FGDTP5_EL12" , 1471 }, |
| 5999 | { "FGDTP5_EL2" , 1169 }, |
| 6000 | { "FGDTP5_EL3" , 1590 }, |
| 6001 | { "FGDTP6_EL1" , 626 }, |
| 6002 | { "FGDTP6_EL12" , 1472 }, |
| 6003 | { "FGDTP6_EL2" , 1170 }, |
| 6004 | { "FGDTP6_EL3" , 1591 }, |
| 6005 | { "FGDTP7_EL1" , 627 }, |
| 6006 | { "FGDTP7_EL12" , 1473 }, |
| 6007 | { "FGDTP7_EL2" , 1171 }, |
| 6008 | { "FGDTP7_EL3" , 1592 }, |
| 6009 | { "FGDTP8_EL1" , 628 }, |
| 6010 | { "FGDTP8_EL12" , 1474 }, |
| 6011 | { "FGDTP8_EL2" , 1172 }, |
| 6012 | { "FGDTP8_EL3" , 1593 }, |
| 6013 | { "FGDTP9_EL1" , 629 }, |
| 6014 | { "FGDTP9_EL12" , 1475 }, |
| 6015 | { "FGDTP9_EL2" , 1173 }, |
| 6016 | { "FGDTP9_EL3" , 1594 }, |
| 6017 | { "FGDTU0_EL1" , 636 }, |
| 6018 | { "FGDTU0_EL12" , 1482 }, |
| 6019 | { "FGDTU0_EL2" , 1180 }, |
| 6020 | { "FGDTU10_EL1" , 646 }, |
| 6021 | { "FGDTU10_EL12" , 1492 }, |
| 6022 | { "FGDTU10_EL2" , 1190 }, |
| 6023 | { "FGDTU11_EL1" , 647 }, |
| 6024 | { "FGDTU11_EL12" , 1493 }, |
| 6025 | { "FGDTU11_EL2" , 1191 }, |
| 6026 | { "FGDTU12_EL1" , 648 }, |
| 6027 | { "FGDTU12_EL12" , 1494 }, |
| 6028 | { "FGDTU12_EL2" , 1192 }, |
| 6029 | { "FGDTU13_EL1" , 649 }, |
| 6030 | { "FGDTU13_EL12" , 1495 }, |
| 6031 | { "FGDTU13_EL2" , 1193 }, |
| 6032 | { "FGDTU14_EL1" , 650 }, |
| 6033 | { "FGDTU14_EL12" , 1496 }, |
| 6034 | { "FGDTU14_EL2" , 1194 }, |
| 6035 | { "FGDTU15_EL1" , 651 }, |
| 6036 | { "FGDTU15_EL12" , 1497 }, |
| 6037 | { "FGDTU15_EL2" , 1195 }, |
| 6038 | { "FGDTU1_EL1" , 637 }, |
| 6039 | { "FGDTU1_EL12" , 1483 }, |
| 6040 | { "FGDTU1_EL2" , 1181 }, |
| 6041 | { "FGDTU2_EL1" , 638 }, |
| 6042 | { "FGDTU2_EL12" , 1484 }, |
| 6043 | { "FGDTU2_EL2" , 1182 }, |
| 6044 | { "FGDTU3_EL1" , 639 }, |
| 6045 | { "FGDTU3_EL12" , 1485 }, |
| 6046 | { "FGDTU3_EL2" , 1183 }, |
| 6047 | { "FGDTU4_EL1" , 640 }, |
| 6048 | { "FGDTU4_EL12" , 1486 }, |
| 6049 | { "FGDTU4_EL2" , 1184 }, |
| 6050 | { "FGDTU5_EL1" , 641 }, |
| 6051 | { "FGDTU5_EL12" , 1487 }, |
| 6052 | { "FGDTU5_EL2" , 1185 }, |
| 6053 | { "FGDTU6_EL1" , 642 }, |
| 6054 | { "FGDTU6_EL12" , 1488 }, |
| 6055 | { "FGDTU6_EL2" , 1186 }, |
| 6056 | { "FGDTU7_EL1" , 643 }, |
| 6057 | { "FGDTU7_EL12" , 1489 }, |
| 6058 | { "FGDTU7_EL2" , 1187 }, |
| 6059 | { "FGDTU8_EL1" , 644 }, |
| 6060 | { "FGDTU8_EL12" , 1490 }, |
| 6061 | { "FGDTU8_EL2" , 1188 }, |
| 6062 | { "FGDTU9_EL1" , 645 }, |
| 6063 | { "FGDTU9_EL12" , 1491 }, |
| 6064 | { "FGDTU9_EL2" , 1189 }, |
| 6065 | { "FGWTE3_EL3" , 1572 }, |
| 6066 | { "FPCR" , 937 }, |
| 6067 | { "FPEXC32_EL2" , 1242 }, |
| 6068 | { "FPMR" , 939 }, |
| 6069 | { "FPSR" , 938 }, |
| 6070 | { "GCR_EL1" , 576 }, |
| 6071 | { "GCSCRE0_EL1" , 615 }, |
| 6072 | { "GCSCR_EL1" , 613 }, |
| 6073 | { "GCSCR_EL12" , 1462 }, |
| 6074 | { "GCSCR_EL2" , 1141 }, |
| 6075 | { "GCSCR_EL3" , 1583 }, |
| 6076 | { "GCSPR_EL0" , 929 }, |
| 6077 | { "GCSPR_EL1" , 614 }, |
| 6078 | { "GCSPR_EL12" , 1463 }, |
| 6079 | { "GCSPR_EL2" , 1142 }, |
| 6080 | { "GCSPR_EL3" , 1584 }, |
| 6081 | { "GMID_EL1" , 909 }, |
| 6082 | { "GPCBW_EL3" , 1581 }, |
| 6083 | { "GPCCR_EL3" , 1582 }, |
| 6084 | { "GPTBR_EL3" , 1580 }, |
| 6085 | { "HACDBSBR_EL2" , 1139 }, |
| 6086 | { "HACDBSCONS_EL2" , 1140 }, |
| 6087 | { "HACR_EL2" , 1101 }, |
| 6088 | { "HAFGRTR_EL2" , 1162 }, |
| 6089 | { "HCRMASK_EL2" , 1117 }, |
| 6090 | { "HCRXMASK_EL2" , 1118 }, |
| 6091 | { "HCRX_EL2" , 1104 }, |
| 6092 | { "HCR_EL2" , 1094 }, |
| 6093 | { "HDBSSBR_EL2" , 1137 }, |
| 6094 | { "HDBSSPROD_EL2" , 1138 }, |
| 6095 | { "HDFGRTR2_EL2" , 1156 }, |
| 6096 | { "HDFGRTR_EL2" , 1160 }, |
| 6097 | { "HDFGWTR2_EL2" , 1157 }, |
| 6098 | { "HDFGWTR_EL2" , 1161 }, |
| 6099 | { "HFGITR2_EL2" , 1163 }, |
| 6100 | { "HFGITR_EL2" , 1100 }, |
| 6101 | { "HFGRTR2_EL2" , 1158 }, |
| 6102 | { "HFGRTR_EL2" , 1098 }, |
| 6103 | { "HFGWTR2_EL2" , 1159 }, |
| 6104 | { "HFGWTR_EL2" , 1099 }, |
| 6105 | { "HPFAR_EL2" , 1245 }, |
| 6106 | { "HSTR_EL2" , 1097 }, |
| 6107 | { "ICC_AP0R0_EL1" , 815 }, |
| 6108 | { "ICC_AP0R1_EL1" , 816 }, |
| 6109 | { "ICC_AP0R2_EL1" , 817 }, |
| 6110 | { "ICC_AP0R3_EL1" , 818 }, |
| 6111 | { "ICC_AP1R0_EL1" , 819 }, |
| 6112 | { "ICC_AP1R1_EL1" , 820 }, |
| 6113 | { "ICC_AP1R2_EL1" , 821 }, |
| 6114 | { "ICC_AP1R3_EL1" , 822 }, |
| 6115 | { "ICC_APR_EL1" , 912 }, |
| 6116 | { "ICC_APR_EL3" , 1647 }, |
| 6117 | { "ICC_ASGI1R_EL1" , 840 }, |
| 6118 | { "ICC_BPR0_EL1" , 814 }, |
| 6119 | { "ICC_BPR1_EL1" , 845 }, |
| 6120 | { "ICC_CR0_EL1" , 914 }, |
| 6121 | { "ICC_CR0_EL3" , 1654 }, |
| 6122 | { "ICC_CTLR_EL1" , 846 }, |
| 6123 | { "ICC_CTLR_EL3" , 1656 }, |
| 6124 | { "ICC_DIR_EL1" , 837 }, |
| 6125 | { "ICC_DOMHPPIR_EL3" , 1649 }, |
| 6126 | { "ICC_EOIR0_EL1" , 812 }, |
| 6127 | { "ICC_EOIR1_EL1" , 843 }, |
| 6128 | { "ICC_HAPR_EL1" , 918 }, |
| 6129 | { "ICC_HPPIR0_EL1" , 813 }, |
| 6130 | { "ICC_HPPIR1_EL1" , 844 }, |
| 6131 | { "ICC_HPPIR_EL1" , 829 }, |
| 6132 | { "ICC_HPPIR_EL3" , 1655 }, |
| 6133 | { "ICC_IAFFIDR_EL1" , 832 }, |
| 6134 | { "ICC_IAR0_EL1" , 811 }, |
| 6135 | { "ICC_IAR1_EL1" , 842 }, |
| 6136 | { "ICC_ICSR_EL1" , 831 }, |
| 6137 | { "ICC_IDR0_EL1" , 828 }, |
| 6138 | { "ICC_IGRPEN0_EL1" , 848 }, |
| 6139 | { "ICC_IGRPEN1_EL1" , 849 }, |
| 6140 | { "ICC_IGRPEN1_EL3" , 1658 }, |
| 6141 | { "ICC_NMIAR1_EL1" , 823 }, |
| 6142 | { "ICC_PCR_EL1" , 916 }, |
| 6143 | { "ICC_PCR_EL3" , 1648 }, |
| 6144 | { "ICC_PMR_EL1" , 695 }, |
| 6145 | { "ICC_PPI_CACTIVER0_EL1" , 850 }, |
| 6146 | { "ICC_PPI_CACTIVER1_EL1" , 852 }, |
| 6147 | { "ICC_PPI_CPENDR0_EL1" , 858 }, |
| 6148 | { "ICC_PPI_CPENDR1_EL1" , 860 }, |
| 6149 | { "ICC_PPI_DOMAINR0_EL3" , 1650 }, |
| 6150 | { "ICC_PPI_DOMAINR1_EL3" , 1651 }, |
| 6151 | { "ICC_PPI_DOMAINR2_EL3" , 1652 }, |
| 6152 | { "ICC_PPI_DOMAINR3_EL3" , 1653 }, |
| 6153 | { "ICC_PPI_ENABLER0_EL1" , 833 }, |
| 6154 | { "ICC_PPI_ENABLER1_EL1" , 835 }, |
| 6155 | { "ICC_PPI_HMR0_EL1" , 824 }, |
| 6156 | { "ICC_PPI_HMR1_EL1" , 826 }, |
| 6157 | { "ICC_PPI_PRIORITYR0_EL1" , 866 }, |
| 6158 | { "ICC_PPI_PRIORITYR10_EL1" , 886 }, |
| 6159 | { "ICC_PPI_PRIORITYR11_EL1" , 888 }, |
| 6160 | { "ICC_PPI_PRIORITYR12_EL1" , 890 }, |
| 6161 | { "ICC_PPI_PRIORITYR13_EL1" , 892 }, |
| 6162 | { "ICC_PPI_PRIORITYR14_EL1" , 894 }, |
| 6163 | { "ICC_PPI_PRIORITYR15_EL1" , 896 }, |
| 6164 | { "ICC_PPI_PRIORITYR1_EL1" , 868 }, |
| 6165 | { "ICC_PPI_PRIORITYR2_EL1" , 870 }, |
| 6166 | { "ICC_PPI_PRIORITYR3_EL1" , 872 }, |
| 6167 | { "ICC_PPI_PRIORITYR4_EL1" , 874 }, |
| 6168 | { "ICC_PPI_PRIORITYR5_EL1" , 876 }, |
| 6169 | { "ICC_PPI_PRIORITYR6_EL1" , 878 }, |
| 6170 | { "ICC_PPI_PRIORITYR7_EL1" , 880 }, |
| 6171 | { "ICC_PPI_PRIORITYR8_EL1" , 882 }, |
| 6172 | { "ICC_PPI_PRIORITYR9_EL1" , 884 }, |
| 6173 | { "ICC_PPI_SACTIVER0_EL1" , 854 }, |
| 6174 | { "ICC_PPI_SACTIVER1_EL1" , 856 }, |
| 6175 | { "ICC_PPI_SPENDR0_EL1" , 862 }, |
| 6176 | { "ICC_PPI_SPENDR1_EL1" , 864 }, |
| 6177 | { "ICC_RPR_EL1" , 838 }, |
| 6178 | { "ICC_SGI0R_EL1" , 841 }, |
| 6179 | { "ICC_SGI1R_EL1" , 839 }, |
| 6180 | { "ICC_SRE_EL1" , 847 }, |
| 6181 | { "ICC_SRE_EL2" , 1332 }, |
| 6182 | { "ICC_SRE_EL3" , 1657 }, |
| 6183 | { "ICH_AP0R0_EL2" , 1321 }, |
| 6184 | { "ICH_AP0R1_EL2" , 1322 }, |
| 6185 | { "ICH_AP0R2_EL2" , 1323 }, |
| 6186 | { "ICH_AP0R3_EL2" , 1324 }, |
| 6187 | { "ICH_AP1R0_EL2" , 1327 }, |
| 6188 | { "ICH_AP1R1_EL2" , 1328 }, |
| 6189 | { "ICH_AP1R2_EL2" , 1329 }, |
| 6190 | { "ICH_AP1R3_EL2" , 1330 }, |
| 6191 | { "ICH_APR_EL2" , 1325 }, |
| 6192 | { "ICH_CONTEXTR_EL2" , 1349 }, |
| 6193 | { "ICH_EISR_EL2" , 1346 }, |
| 6194 | { "ICH_ELRSR_EL2" , 1348 }, |
| 6195 | { "ICH_HCR_EL2" , 1343 }, |
| 6196 | { "ICH_HFGITR_EL2" , 1334 }, |
| 6197 | { "ICH_HFGRTR_EL2" , 1331 }, |
| 6198 | { "ICH_HFGWTR_EL2" , 1333 }, |
| 6199 | { "ICH_HPPIR_EL2" , 1326 }, |
| 6200 | { "ICH_LR0_EL2" , 1351 }, |
| 6201 | { "ICH_LR10_EL2" , 1361 }, |
| 6202 | { "ICH_LR11_EL2" , 1362 }, |
| 6203 | { "ICH_LR12_EL2" , 1363 }, |
| 6204 | { "ICH_LR13_EL2" , 1364 }, |
| 6205 | { "ICH_LR14_EL2" , 1365 }, |
| 6206 | { "ICH_LR15_EL2" , 1366 }, |
| 6207 | { "ICH_LR1_EL2" , 1352 }, |
| 6208 | { "ICH_LR2_EL2" , 1353 }, |
| 6209 | { "ICH_LR3_EL2" , 1354 }, |
| 6210 | { "ICH_LR4_EL2" , 1355 }, |
| 6211 | { "ICH_LR5_EL2" , 1356 }, |
| 6212 | { "ICH_LR6_EL2" , 1357 }, |
| 6213 | { "ICH_LR7_EL2" , 1358 }, |
| 6214 | { "ICH_LR8_EL2" , 1359 }, |
| 6215 | { "ICH_LR9_EL2" , 1360 }, |
| 6216 | { "ICH_MISR_EL2" , 1345 }, |
| 6217 | { "ICH_PPI_ACTIVER0_EL2" , 1341 }, |
| 6218 | { "ICH_PPI_ACTIVER1_EL2" , 1342 }, |
| 6219 | { "ICH_PPI_DVIR0_EL2" , 1335 }, |
| 6220 | { "ICH_PPI_DVIR1_EL2" , 1336 }, |
| 6221 | { "ICH_PPI_ENABLER0_EL2" , 1337 }, |
| 6222 | { "ICH_PPI_ENABLER1_EL2" , 1338 }, |
| 6223 | { "ICH_PPI_PENDR0_EL2" , 1339 }, |
| 6224 | { "ICH_PPI_PENDR1_EL2" , 1340 }, |
| 6225 | { "ICH_PPI_PRIORITYR0_EL2" , 1367 }, |
| 6226 | { "ICH_PPI_PRIORITYR10_EL2" , 1377 }, |
| 6227 | { "ICH_PPI_PRIORITYR11_EL2" , 1378 }, |
| 6228 | { "ICH_PPI_PRIORITYR12_EL2" , 1379 }, |
| 6229 | { "ICH_PPI_PRIORITYR13_EL2" , 1380 }, |
| 6230 | { "ICH_PPI_PRIORITYR14_EL2" , 1381 }, |
| 6231 | { "ICH_PPI_PRIORITYR15_EL2" , 1382 }, |
| 6232 | { "ICH_PPI_PRIORITYR1_EL2" , 1368 }, |
| 6233 | { "ICH_PPI_PRIORITYR2_EL2" , 1369 }, |
| 6234 | { "ICH_PPI_PRIORITYR3_EL2" , 1370 }, |
| 6235 | { "ICH_PPI_PRIORITYR4_EL2" , 1371 }, |
| 6236 | { "ICH_PPI_PRIORITYR5_EL2" , 1372 }, |
| 6237 | { "ICH_PPI_PRIORITYR6_EL2" , 1373 }, |
| 6238 | { "ICH_PPI_PRIORITYR7_EL2" , 1374 }, |
| 6239 | { "ICH_PPI_PRIORITYR8_EL2" , 1375 }, |
| 6240 | { "ICH_PPI_PRIORITYR9_EL2" , 1376 }, |
| 6241 | { "ICH_VCTLR_EL2" , 1347 }, |
| 6242 | { "ICH_VMCR_EL2" , 1350 }, |
| 6243 | { "ICH_VTR_EL2" , 1344 }, |
| 6244 | { "ICV_APR_EL1" , 913 }, |
| 6245 | { "ICV_CR0_EL1" , 915 }, |
| 6246 | { "ICV_HAPR_EL1" , 919 }, |
| 6247 | { "ICV_HPPIR_EL1" , 830 }, |
| 6248 | { "ICV_PCR_EL1" , 917 }, |
| 6249 | { "ICV_PPI_CACTIVER0_EL1" , 851 }, |
| 6250 | { "ICV_PPI_CACTIVER1_EL1" , 853 }, |
| 6251 | { "ICV_PPI_CPENDR0_EL1" , 859 }, |
| 6252 | { "ICV_PPI_CPENDR1_EL1" , 861 }, |
| 6253 | { "ICV_PPI_ENABLER0_EL1" , 834 }, |
| 6254 | { "ICV_PPI_ENABLER1_EL1" , 836 }, |
| 6255 | { "ICV_PPI_HMR0_EL1" , 825 }, |
| 6256 | { "ICV_PPI_HMR1_EL1" , 827 }, |
| 6257 | { "ICV_PPI_PRIORITYR0_EL1" , 867 }, |
| 6258 | { "ICV_PPI_PRIORITYR10_EL1" , 887 }, |
| 6259 | { "ICV_PPI_PRIORITYR11_EL1" , 889 }, |
| 6260 | { "ICV_PPI_PRIORITYR12_EL1" , 891 }, |
| 6261 | { "ICV_PPI_PRIORITYR13_EL1" , 893 }, |
| 6262 | { "ICV_PPI_PRIORITYR14_EL1" , 895 }, |
| 6263 | { "ICV_PPI_PRIORITYR15_EL1" , 897 }, |
| 6264 | { "ICV_PPI_PRIORITYR1_EL1" , 869 }, |
| 6265 | { "ICV_PPI_PRIORITYR2_EL1" , 871 }, |
| 6266 | { "ICV_PPI_PRIORITYR3_EL1" , 873 }, |
| 6267 | { "ICV_PPI_PRIORITYR4_EL1" , 875 }, |
| 6268 | { "ICV_PPI_PRIORITYR5_EL1" , 877 }, |
| 6269 | { "ICV_PPI_PRIORITYR6_EL1" , 879 }, |
| 6270 | { "ICV_PPI_PRIORITYR7_EL1" , 881 }, |
| 6271 | { "ICV_PPI_PRIORITYR8_EL1" , 883 }, |
| 6272 | { "ICV_PPI_PRIORITYR9_EL1" , 885 }, |
| 6273 | { "ICV_PPI_SACTIVER0_EL1" , 855 }, |
| 6274 | { "ICV_PPI_SACTIVER1_EL1" , 857 }, |
| 6275 | { "ICV_PPI_SPENDR0_EL1" , 863 }, |
| 6276 | { "ICV_PPI_SPENDR1_EL1" , 865 }, |
| 6277 | { "ID_AA64AFR0_EL1" , 560 }, |
| 6278 | { "ID_AA64AFR1_EL1" , 561 }, |
| 6279 | { "ID_AA64DFR0_EL1" , 557 }, |
| 6280 | { "ID_AA64DFR1_EL1" , 558 }, |
| 6281 | { "ID_AA64DFR2_EL1" , 559 }, |
| 6282 | { "ID_AA64FPFR0_EL1" , 556 }, |
| 6283 | { "ID_AA64ISAR0_EL1" , 562 }, |
| 6284 | { "ID_AA64ISAR1_EL1" , 563 }, |
| 6285 | { "ID_AA64ISAR2_EL1" , 564 }, |
| 6286 | { "ID_AA64ISAR3_EL1" , 565 }, |
| 6287 | { "ID_AA64MMFR0_EL1" , 566 }, |
| 6288 | { "ID_AA64MMFR1_EL1" , 567 }, |
| 6289 | { "ID_AA64MMFR2_EL1" , 568 }, |
| 6290 | { "ID_AA64MMFR3_EL1" , 569 }, |
| 6291 | { "ID_AA64MMFR4_EL1" , 570 }, |
| 6292 | { "ID_AA64PFR0_EL1" , 551 }, |
| 6293 | { "ID_AA64PFR1_EL1" , 552 }, |
| 6294 | { "ID_AA64PFR2_EL1" , 553 }, |
| 6295 | { "ID_AA64SMFR0_EL1" , 555 }, |
| 6296 | { "ID_AA64ZFR0_EL1" , 554 }, |
| 6297 | { "ID_AFR0_EL1" , 532 }, |
| 6298 | { "ID_DFR0_EL1" , 531 }, |
| 6299 | { "ID_DFR1_EL1" , 549 }, |
| 6300 | { "ID_ISAR0_EL1" , 537 }, |
| 6301 | { "ID_ISAR1_EL1" , 538 }, |
| 6302 | { "ID_ISAR2_EL1" , 539 }, |
| 6303 | { "ID_ISAR3_EL1" , 540 }, |
| 6304 | { "ID_ISAR4_EL1" , 541 }, |
| 6305 | { "ID_ISAR5_EL1" , 542 }, |
| 6306 | { "ID_ISAR6_EL1" , 544 }, |
| 6307 | { "ID_MMFR0_EL1" , 533 }, |
| 6308 | { "ID_MMFR1_EL1" , 534 }, |
| 6309 | { "ID_MMFR2_EL1" , 535 }, |
| 6310 | { "ID_MMFR3_EL1" , 536 }, |
| 6311 | { "ID_MMFR4_EL1" , 543 }, |
| 6312 | { "ID_MMFR5_EL1" , 550 }, |
| 6313 | { "ID_PFR0_EL1" , 529 }, |
| 6314 | { "ID_PFR1_EL1" , 530 }, |
| 6315 | { "ID_PFR2_EL1" , 548 }, |
| 6316 | { "IFSR32_EL2" , 1237 }, |
| 6317 | { "IRTBRP_EL1" , 595 }, |
| 6318 | { "IRTBRP_EL12" , 1454 }, |
| 6319 | { "IRTBRP_EL2" , 1125 }, |
| 6320 | { "IRTBRP_EL3" , 1578 }, |
| 6321 | { "IRTBRU_EL1" , 594 }, |
| 6322 | { "IRTBRU_EL12" , 1453 }, |
| 6323 | { "IRTBRU_EL2" , 1124 }, |
| 6324 | { "ISR_EL1" , 809 }, |
| 6325 | { "LDSTT_EL1" , 602 }, |
| 6326 | { "LDSTT_EL12" , 1457 }, |
| 6327 | { "LDSTT_EL2" , 1130 }, |
| 6328 | { "LORC_EL1" , 794 }, |
| 6329 | { "LOREA_EL1" , 792 }, |
| 6330 | { "LORID_EL1" , 798 }, |
| 6331 | { "LORN_EL1" , 793 }, |
| 6332 | { "LORSA_EL1" , 791 }, |
| 6333 | { "MAIR2_EL1" , 782 }, |
| 6334 | { "MAIR2_EL12" , 1544 }, |
| 6335 | { "MAIR2_EL2" , 1284 }, |
| 6336 | { "MAIR2_EL3" , 1631 }, |
| 6337 | { "MAIR_EL1" , 781 }, |
| 6338 | { "MAIR_EL12" , 1543 }, |
| 6339 | { "MAIR_EL2" , 1285 }, |
| 6340 | { "MAIR_EL3" , 1632 }, |
| 6341 | { "MDCCINT_EL1" , 9 }, |
| 6342 | { "MDCCSR_EL0" , 442 }, |
| 6343 | { "MDCR_EL2" , 1095 }, |
| 6344 | { "MDCR_EL3" , 1575 }, |
| 6345 | { "MDRAR_EL1" , 71 }, |
| 6346 | { "MDSCR_EL1" , 10 }, |
| 6347 | { "MDSELR_EL1" , 20 }, |
| 6348 | { "MDSTEPOP_EL1" , 25 }, |
| 6349 | { "MECIDR_EL2" , 1314 }, |
| 6350 | { "MECID_A0_EL2" , 1311 }, |
| 6351 | { "MECID_A1_EL2" , 1313 }, |
| 6352 | { "MECID_P0_EL2" , 1310 }, |
| 6353 | { "MECID_P1_EL2" , 1312 }, |
| 6354 | { "MECID_RL_A_EL3" , 1642 }, |
| 6355 | { "MFAR_EL3" , 1628 }, |
| 6356 | { "MIDR_EL1" , 525 }, |
| 6357 | { "MPAM0_EL1" , 800 }, |
| 6358 | { "MPAM1_EL1" , 799 }, |
| 6359 | { "MPAM1_EL12" , 1552 }, |
| 6360 | { "MPAM2_EL2" , 1296 }, |
| 6361 | { "MPAM3_EL3" , 1638 }, |
| 6362 | { "MPAMBW0_EL1" , 804 }, |
| 6363 | { "MPAMBW1_EL1" , 803 }, |
| 6364 | { "MPAMBW1_EL12" , 1554 }, |
| 6365 | { "MPAMBW2_EL2" , 1298 }, |
| 6366 | { "MPAMBW3_EL3" , 1640 }, |
| 6367 | { "MPAMBWCAP_EL2" , 1299 }, |
| 6368 | { "MPAMBWIDR_EL1" , 796 }, |
| 6369 | { "MPAMBWSM_EL1" , 805 }, |
| 6370 | { "MPAMCTL_EL1" , 801 }, |
| 6371 | { "MPAMCTL_EL12" , 1553 }, |
| 6372 | { "MPAMCTL_EL2" , 1297 }, |
| 6373 | { "MPAMCTL_EL3" , 1639 }, |
| 6374 | { "MPAMHCR_EL2" , 1294 }, |
| 6375 | { "MPAMIDR_EL1" , 795 }, |
| 6376 | { "MPAMSM_EL1" , 802 }, |
| 6377 | { "MPAMVIDCR_EL2" , 1308 }, |
| 6378 | { "MPAMVIDSR_EL2" , 1309 }, |
| 6379 | { "MPAMVIDSR_EL3" , 1641 }, |
| 6380 | { "MPAMVPM0_EL2" , 1300 }, |
| 6381 | { "MPAMVPM1_EL2" , 1301 }, |
| 6382 | { "MPAMVPM2_EL2" , 1302 }, |
| 6383 | { "MPAMVPM3_EL2" , 1303 }, |
| 6384 | { "MPAMVPM4_EL2" , 1304 }, |
| 6385 | { "MPAMVPM5_EL2" , 1305 }, |
| 6386 | { "MPAMVPM6_EL2" , 1306 }, |
| 6387 | { "MPAMVPM7_EL2" , 1307 }, |
| 6388 | { "MPAMVPMV_EL2" , 1295 }, |
| 6389 | { "MPIDR_EL1" , 527 }, |
| 6390 | { "MPUIR_EL1" , 526 }, |
| 6391 | { "MPUIR_EL2" , 1089 }, |
| 6392 | { "MVFR0_EL1" , 545 }, |
| 6393 | { "MVFR1_EL1" , 546 }, |
| 6394 | { "MVFR2_EL1" , 547 }, |
| 6395 | { "NVHCRMASK_EL2" , 1115 }, |
| 6396 | { "NVHCRXMASK_EL2" , 1116 }, |
| 6397 | { "NVHCRX_EL2" , 1114 }, |
| 6398 | { "NVHCR_EL2" , 1113 }, |
| 6399 | { "NZCV" , 931 }, |
| 6400 | { "OSDLR_EL1" , 74 }, |
| 6401 | { "OSDTRRX_EL1" , 0 }, |
| 6402 | { "OSDTRTX_EL1" , 15 }, |
| 6403 | { "OSECCR_EL1" , 30 }, |
| 6404 | { "OSLAR_EL1" , 72 }, |
| 6405 | { "OSLSR_EL1" , 73 }, |
| 6406 | { "PAN" , 691 }, |
| 6407 | { "PAR_EL1" , 751 }, |
| 6408 | { "PFAR_EL1" , 716 }, |
| 6409 | { "PFAR_EL12" , 1539 }, |
| 6410 | { "PFAR_EL2" , 1246 }, |
| 6411 | { "PIRE0_EL1" , 783 }, |
| 6412 | { "PIRE0_EL12" , 1545 }, |
| 6413 | { "PIRE0_EL2" , 1286 }, |
| 6414 | { "PIR_EL1" , 784 }, |
| 6415 | { "PIR_EL12" , 1546 }, |
| 6416 | { "PIR_EL2" , 1287 }, |
| 6417 | { "PIR_EL3" , 1633 }, |
| 6418 | { "PM" , 694 }, |
| 6419 | { "PMBIDR_EL1" , 765 }, |
| 6420 | { "PMBLIMITR_EL1" , 760 }, |
| 6421 | { "PMBMAR_EL1" , 764 }, |
| 6422 | { "PMBPTR_EL1" , 761 }, |
| 6423 | { "PMBSR_EL1" , 762 }, |
| 6424 | { "PMBSR_EL12" , 1541 }, |
| 6425 | { "PMBSR_EL2" , 1282 }, |
| 6426 | { "PMBSR_EL3" , 1629 }, |
| 6427 | { "PMCCFILTR_EL0" , 1087 }, |
| 6428 | { "PMCCNTR_EL0" , 953 }, |
| 6429 | { "PMCCNTSVR_EL1" , 119 }, |
| 6430 | { "PMCEID0_EL0" , 951 }, |
| 6431 | { "PMCEID1_EL0" , 952 }, |
| 6432 | { "PMCNTENCLR_EL0" , 947 }, |
| 6433 | { "PMCNTENSET_EL0" , 946 }, |
| 6434 | { "PMCR_EL0" , 945 }, |
| 6435 | { "PMECR_EL1" , 778 }, |
| 6436 | { "PMEVCNTR0_EL0" , 1025 }, |
| 6437 | { "PMEVCNTR10_EL0" , 1035 }, |
| 6438 | { "PMEVCNTR11_EL0" , 1036 }, |
| 6439 | { "PMEVCNTR12_EL0" , 1037 }, |
| 6440 | { "PMEVCNTR13_EL0" , 1038 }, |
| 6441 | { "PMEVCNTR14_EL0" , 1039 }, |
| 6442 | { "PMEVCNTR15_EL0" , 1040 }, |
| 6443 | { "PMEVCNTR16_EL0" , 1041 }, |
| 6444 | { "PMEVCNTR17_EL0" , 1042 }, |
| 6445 | { "PMEVCNTR18_EL0" , 1043 }, |
| 6446 | { "PMEVCNTR19_EL0" , 1044 }, |
| 6447 | { "PMEVCNTR1_EL0" , 1026 }, |
| 6448 | { "PMEVCNTR20_EL0" , 1045 }, |
| 6449 | { "PMEVCNTR21_EL0" , 1046 }, |
| 6450 | { "PMEVCNTR22_EL0" , 1047 }, |
| 6451 | { "PMEVCNTR23_EL0" , 1048 }, |
| 6452 | { "PMEVCNTR24_EL0" , 1049 }, |
| 6453 | { "PMEVCNTR25_EL0" , 1050 }, |
| 6454 | { "PMEVCNTR26_EL0" , 1051 }, |
| 6455 | { "PMEVCNTR27_EL0" , 1052 }, |
| 6456 | { "PMEVCNTR28_EL0" , 1053 }, |
| 6457 | { "PMEVCNTR29_EL0" , 1054 }, |
| 6458 | { "PMEVCNTR2_EL0" , 1027 }, |
| 6459 | { "PMEVCNTR30_EL0" , 1055 }, |
| 6460 | { "PMEVCNTR3_EL0" , 1028 }, |
| 6461 | { "PMEVCNTR4_EL0" , 1029 }, |
| 6462 | { "PMEVCNTR5_EL0" , 1030 }, |
| 6463 | { "PMEVCNTR6_EL0" , 1031 }, |
| 6464 | { "PMEVCNTR7_EL0" , 1032 }, |
| 6465 | { "PMEVCNTR8_EL0" , 1033 }, |
| 6466 | { "PMEVCNTR9_EL0" , 1034 }, |
| 6467 | { "PMEVCNTSVR0_EL1" , 88 }, |
| 6468 | { "PMEVCNTSVR10_EL1" , 98 }, |
| 6469 | { "PMEVCNTSVR11_EL1" , 99 }, |
| 6470 | { "PMEVCNTSVR12_EL1" , 100 }, |
| 6471 | { "PMEVCNTSVR13_EL1" , 101 }, |
| 6472 | { "PMEVCNTSVR14_EL1" , 102 }, |
| 6473 | { "PMEVCNTSVR15_EL1" , 103 }, |
| 6474 | { "PMEVCNTSVR16_EL1" , 104 }, |
| 6475 | { "PMEVCNTSVR17_EL1" , 105 }, |
| 6476 | { "PMEVCNTSVR18_EL1" , 106 }, |
| 6477 | { "PMEVCNTSVR19_EL1" , 107 }, |
| 6478 | { "PMEVCNTSVR1_EL1" , 89 }, |
| 6479 | { "PMEVCNTSVR20_EL1" , 108 }, |
| 6480 | { "PMEVCNTSVR21_EL1" , 109 }, |
| 6481 | { "PMEVCNTSVR22_EL1" , 110 }, |
| 6482 | { "PMEVCNTSVR23_EL1" , 111 }, |
| 6483 | { "PMEVCNTSVR24_EL1" , 112 }, |
| 6484 | { "PMEVCNTSVR25_EL1" , 113 }, |
| 6485 | { "PMEVCNTSVR26_EL1" , 114 }, |
| 6486 | { "PMEVCNTSVR27_EL1" , 115 }, |
| 6487 | { "PMEVCNTSVR28_EL1" , 116 }, |
| 6488 | { "PMEVCNTSVR29_EL1" , 117 }, |
| 6489 | { "PMEVCNTSVR2_EL1" , 90 }, |
| 6490 | { "PMEVCNTSVR30_EL1" , 118 }, |
| 6491 | { "PMEVCNTSVR3_EL1" , 91 }, |
| 6492 | { "PMEVCNTSVR4_EL1" , 92 }, |
| 6493 | { "PMEVCNTSVR5_EL1" , 93 }, |
| 6494 | { "PMEVCNTSVR6_EL1" , 94 }, |
| 6495 | { "PMEVCNTSVR7_EL1" , 95 }, |
| 6496 | { "PMEVCNTSVR8_EL1" , 96 }, |
| 6497 | { "PMEVCNTSVR9_EL1" , 97 }, |
| 6498 | { "PMEVTYPER0_EL0" , 1056 }, |
| 6499 | { "PMEVTYPER10_EL0" , 1066 }, |
| 6500 | { "PMEVTYPER11_EL0" , 1067 }, |
| 6501 | { "PMEVTYPER12_EL0" , 1068 }, |
| 6502 | { "PMEVTYPER13_EL0" , 1069 }, |
| 6503 | { "PMEVTYPER14_EL0" , 1070 }, |
| 6504 | { "PMEVTYPER15_EL0" , 1071 }, |
| 6505 | { "PMEVTYPER16_EL0" , 1072 }, |
| 6506 | { "PMEVTYPER17_EL0" , 1073 }, |
| 6507 | { "PMEVTYPER18_EL0" , 1074 }, |
| 6508 | { "PMEVTYPER19_EL0" , 1075 }, |
| 6509 | { "PMEVTYPER1_EL0" , 1057 }, |
| 6510 | { "PMEVTYPER20_EL0" , 1076 }, |
| 6511 | { "PMEVTYPER21_EL0" , 1077 }, |
| 6512 | { "PMEVTYPER22_EL0" , 1078 }, |
| 6513 | { "PMEVTYPER23_EL0" , 1079 }, |
| 6514 | { "PMEVTYPER24_EL0" , 1080 }, |
| 6515 | { "PMEVTYPER25_EL0" , 1081 }, |
| 6516 | { "PMEVTYPER26_EL0" , 1082 }, |
| 6517 | { "PMEVTYPER27_EL0" , 1083 }, |
| 6518 | { "PMEVTYPER28_EL0" , 1084 }, |
| 6519 | { "PMEVTYPER29_EL0" , 1085 }, |
| 6520 | { "PMEVTYPER2_EL0" , 1058 }, |
| 6521 | { "PMEVTYPER30_EL0" , 1086 }, |
| 6522 | { "PMEVTYPER3_EL0" , 1059 }, |
| 6523 | { "PMEVTYPER4_EL0" , 1060 }, |
| 6524 | { "PMEVTYPER5_EL0" , 1061 }, |
| 6525 | { "PMEVTYPER6_EL0" , 1062 }, |
| 6526 | { "PMEVTYPER7_EL0" , 1063 }, |
| 6527 | { "PMEVTYPER8_EL0" , 1064 }, |
| 6528 | { "PMEVTYPER9_EL0" , 1065 }, |
| 6529 | { "PMIAR_EL1" , 780 }, |
| 6530 | { "PMICFILTR_EL0" , 944 }, |
| 6531 | { "PMICNTR_EL0" , 943 }, |
| 6532 | { "PMICNTSVR_EL1" , 120 }, |
| 6533 | { "PMINTENCLR_EL1" , 776 }, |
| 6534 | { "PMINTENSET_EL1" , 775 }, |
| 6535 | { "PMMIR_EL1" , 779 }, |
| 6536 | { "PMOVSCLR_EL0" , 948 }, |
| 6537 | { "PMOVSSET_EL0" , 958 }, |
| 6538 | { "PMSCR_EL1" , 752 }, |
| 6539 | { "PMSCR_EL12" , 1540 }, |
| 6540 | { "PMSCR_EL2" , 1281 }, |
| 6541 | { "PMSDSFR_EL1" , 763 }, |
| 6542 | { "PMSELR_EL0" , 950 }, |
| 6543 | { "PMSEVFR_EL1" , 757 }, |
| 6544 | { "PMSFCR_EL1" , 756 }, |
| 6545 | { "PMSICR_EL1" , 754 }, |
| 6546 | { "PMSIDR_EL1" , 759 }, |
| 6547 | { "PMSIRR_EL1" , 755 }, |
| 6548 | { "PMSLATFR_EL1" , 758 }, |
| 6549 | { "PMSNEVFR_EL1" , 753 }, |
| 6550 | { "PMSSCR_EL1" , 774 }, |
| 6551 | { "PMSWINC_EL0" , 949 }, |
| 6552 | { "PMUACR_EL1" , 777 }, |
| 6553 | { "PMUSERENR_EL0" , 957 }, |
| 6554 | { "PMXEVCNTR_EL0" , 955 }, |
| 6555 | { "PMXEVTYPER_EL0" , 954 }, |
| 6556 | { "PMZR_EL0" , 956 }, |
| 6557 | { "POR_EL0" , 959 }, |
| 6558 | { "POR_EL1" , 785 }, |
| 6559 | { "POR_EL12" , 1547 }, |
| 6560 | { "POR_EL2" , 1288 }, |
| 6561 | { "POR_EL3" , 1634 }, |
| 6562 | { "PRBAR10_EL1" , 739 }, |
| 6563 | { "PRBAR10_EL2" , 1269 }, |
| 6564 | { "PRBAR11_EL1" , 741 }, |
| 6565 | { "PRBAR11_EL2" , 1271 }, |
| 6566 | { "PRBAR12_EL1" , 743 }, |
| 6567 | { "PRBAR12_EL2" , 1273 }, |
| 6568 | { "PRBAR13_EL1" , 745 }, |
| 6569 | { "PRBAR13_EL2" , 1275 }, |
| 6570 | { "PRBAR14_EL1" , 747 }, |
| 6571 | { "PRBAR14_EL2" , 1277 }, |
| 6572 | { "PRBAR15_EL1" , 749 }, |
| 6573 | { "PRBAR15_EL2" , 1279 }, |
| 6574 | { "PRBAR1_EL1" , 721 }, |
| 6575 | { "PRBAR1_EL2" , 1251 }, |
| 6576 | { "PRBAR2_EL1" , 723 }, |
| 6577 | { "PRBAR2_EL2" , 1253 }, |
| 6578 | { "PRBAR3_EL1" , 725 }, |
| 6579 | { "PRBAR3_EL2" , 1255 }, |
| 6580 | { "PRBAR4_EL1" , 727 }, |
| 6581 | { "PRBAR4_EL2" , 1257 }, |
| 6582 | { "PRBAR5_EL1" , 729 }, |
| 6583 | { "PRBAR5_EL2" , 1259 }, |
| 6584 | { "PRBAR6_EL1" , 731 }, |
| 6585 | { "PRBAR6_EL2" , 1261 }, |
| 6586 | { "PRBAR7_EL1" , 733 }, |
| 6587 | { "PRBAR7_EL2" , 1263 }, |
| 6588 | { "PRBAR8_EL1" , 735 }, |
| 6589 | { "PRBAR8_EL2" , 1265 }, |
| 6590 | { "PRBAR9_EL1" , 737 }, |
| 6591 | { "PRBAR9_EL2" , 1267 }, |
| 6592 | { "PRBAR_EL1" , 719 }, |
| 6593 | { "PRBAR_EL2" , 1249 }, |
| 6594 | { "PRENR_EL1" , 717 }, |
| 6595 | { "PRENR_EL2" , 1247 }, |
| 6596 | { "PRLAR10_EL1" , 740 }, |
| 6597 | { "PRLAR10_EL2" , 1270 }, |
| 6598 | { "PRLAR11_EL1" , 742 }, |
| 6599 | { "PRLAR11_EL2" , 1272 }, |
| 6600 | { "PRLAR12_EL1" , 744 }, |
| 6601 | { "PRLAR12_EL2" , 1274 }, |
| 6602 | { "PRLAR13_EL1" , 746 }, |
| 6603 | { "PRLAR13_EL2" , 1276 }, |
| 6604 | { "PRLAR14_EL1" , 748 }, |
| 6605 | { "PRLAR14_EL2" , 1278 }, |
| 6606 | { "PRLAR15_EL1" , 750 }, |
| 6607 | { "PRLAR15_EL2" , 1280 }, |
| 6608 | { "PRLAR1_EL1" , 722 }, |
| 6609 | { "PRLAR1_EL2" , 1252 }, |
| 6610 | { "PRLAR2_EL1" , 724 }, |
| 6611 | { "PRLAR2_EL2" , 1254 }, |
| 6612 | { "PRLAR3_EL1" , 726 }, |
| 6613 | { "PRLAR3_EL2" , 1256 }, |
| 6614 | { "PRLAR4_EL1" , 728 }, |
| 6615 | { "PRLAR4_EL2" , 1258 }, |
| 6616 | { "PRLAR5_EL1" , 730 }, |
| 6617 | { "PRLAR5_EL2" , 1260 }, |
| 6618 | { "PRLAR6_EL1" , 732 }, |
| 6619 | { "PRLAR6_EL2" , 1262 }, |
| 6620 | { "PRLAR7_EL1" , 734 }, |
| 6621 | { "PRLAR7_EL2" , 1264 }, |
| 6622 | { "PRLAR8_EL1" , 736 }, |
| 6623 | { "PRLAR8_EL2" , 1266 }, |
| 6624 | { "PRLAR9_EL1" , 738 }, |
| 6625 | { "PRLAR9_EL2" , 1268 }, |
| 6626 | { "PRLAR_EL1" , 720 }, |
| 6627 | { "PRLAR_EL2" , 1250 }, |
| 6628 | { "PRSELR_EL1" , 718 }, |
| 6629 | { "PRSELR_EL2" , 1248 }, |
| 6630 | { "RCWMASK_EL1" , 903 }, |
| 6631 | { "RCWSMASK_EL1" , 900 }, |
| 6632 | { "REVIDR_EL1" , 528 }, |
| 6633 | { "RGSR_EL1" , 575 }, |
| 6634 | { "RMR_EL1" , 808 }, |
| 6635 | { "RMR_EL2" , 1319 }, |
| 6636 | { "RMR_EL3" , 1645 }, |
| 6637 | { "RNDR" , 927 }, |
| 6638 | { "RNDRRS" , 928 }, |
| 6639 | { "RVBAR_EL1" , 807 }, |
| 6640 | { "RVBAR_EL2" , 1318 }, |
| 6641 | { "RVBAR_EL3" , 1644 }, |
| 6642 | { "S2PIR_EL2" , 1289 }, |
| 6643 | { "S2POR_EL1" , 786 }, |
| 6644 | { "SCR_EL3" , 1569 }, |
| 6645 | { "SCTLR2ALIAS_EL1" , 589 }, |
| 6646 | { "SCTLR2MASK_EL1" , 585 }, |
| 6647 | { "SCTLR2MASK_EL12" , 1448 }, |
| 6648 | { "SCTLR2MASK_EL2" , 1112 }, |
| 6649 | { "SCTLR2_EL1" , 574 }, |
| 6650 | { "SCTLR2_EL12" , 1440 }, |
| 6651 | { "SCTLR2_EL2" , 1093 }, |
| 6652 | { "SCTLR2_EL3" , 1568 }, |
| 6653 | { "SCTLRALIAS_EL1" , 588 }, |
| 6654 | { "SCTLRMASK_EL1" , 582 }, |
| 6655 | { "SCTLRMASK_EL12" , 1445 }, |
| 6656 | { "SCTLRMASK_EL2" , 1109 }, |
| 6657 | { "SCTLR_EL1" , 571 }, |
| 6658 | { "SCTLR_EL12" , 1437 }, |
| 6659 | { "SCTLR_EL2" , 1091 }, |
| 6660 | { "SCTLR_EL3" , 1566 }, |
| 6661 | { "SCXTNUM_EL0" , 964 }, |
| 6662 | { "SCXTNUM_EL1" , 904 }, |
| 6663 | { "SCXTNUM_EL12" , 1558 }, |
| 6664 | { "SCXTNUM_EL2" , 1386 }, |
| 6665 | { "SCXTNUM_EL3" , 1661 }, |
| 6666 | { "SDER32_EL2" , 1108 }, |
| 6667 | { "SDER32_EL3" , 1570 }, |
| 6668 | { "SMCR_EL1" , 581 }, |
| 6669 | { "SMCR_EL12" , 1444 }, |
| 6670 | { "SMCR_EL2" , 1107 }, |
| 6671 | { "SMCR_EL3" , 1574 }, |
| 6672 | { "SMIDR_EL1" , 910 }, |
| 6673 | { "SMPRIMAP_EL2" , 1106 }, |
| 6674 | { "SMPRI_EL1" , 580 }, |
| 6675 | { "SPMACCESSR_EL1" , 81 }, |
| 6676 | { "SPMACCESSR_EL12" , 521 }, |
| 6677 | { "SPMACCESSR_EL2" , 519 }, |
| 6678 | { "SPMACCESSR_EL3" , 522 }, |
| 6679 | { "SPMCFGR_EL1" , 85 }, |
| 6680 | { "SPMCGCR0_EL1" , 79 }, |
| 6681 | { "SPMCGCR1_EL1" , 80 }, |
| 6682 | { "SPMCNTENCLR_EL0" , 448 }, |
| 6683 | { "SPMCNTENSET_EL0" , 447 }, |
| 6684 | { "SPMCR_EL0" , 446 }, |
| 6685 | { "SPMDEVAFF_EL1" , 84 }, |
| 6686 | { "SPMDEVARCH_EL1" , 83 }, |
| 6687 | { "SPMEVCNTR0_EL0" , 453 }, |
| 6688 | { "SPMEVCNTR10_EL0" , 463 }, |
| 6689 | { "SPMEVCNTR11_EL0" , 464 }, |
| 6690 | { "SPMEVCNTR12_EL0" , 465 }, |
| 6691 | { "SPMEVCNTR13_EL0" , 466 }, |
| 6692 | { "SPMEVCNTR14_EL0" , 467 }, |
| 6693 | { "SPMEVCNTR15_EL0" , 468 }, |
| 6694 | { "SPMEVCNTR1_EL0" , 454 }, |
| 6695 | { "SPMEVCNTR2_EL0" , 455 }, |
| 6696 | { "SPMEVCNTR3_EL0" , 456 }, |
| 6697 | { "SPMEVCNTR4_EL0" , 457 }, |
| 6698 | { "SPMEVCNTR5_EL0" , 458 }, |
| 6699 | { "SPMEVCNTR6_EL0" , 459 }, |
| 6700 | { "SPMEVCNTR7_EL0" , 460 }, |
| 6701 | { "SPMEVCNTR8_EL0" , 461 }, |
| 6702 | { "SPMEVCNTR9_EL0" , 462 }, |
| 6703 | { "SPMEVFILT2R0_EL0" , 501 }, |
| 6704 | { "SPMEVFILT2R10_EL0" , 511 }, |
| 6705 | { "SPMEVFILT2R11_EL0" , 512 }, |
| 6706 | { "SPMEVFILT2R12_EL0" , 513 }, |
| 6707 | { "SPMEVFILT2R13_EL0" , 514 }, |
| 6708 | { "SPMEVFILT2R14_EL0" , 515 }, |
| 6709 | { "SPMEVFILT2R15_EL0" , 516 }, |
| 6710 | { "SPMEVFILT2R1_EL0" , 502 }, |
| 6711 | { "SPMEVFILT2R2_EL0" , 503 }, |
| 6712 | { "SPMEVFILT2R3_EL0" , 504 }, |
| 6713 | { "SPMEVFILT2R4_EL0" , 505 }, |
| 6714 | { "SPMEVFILT2R5_EL0" , 506 }, |
| 6715 | { "SPMEVFILT2R6_EL0" , 507 }, |
| 6716 | { "SPMEVFILT2R7_EL0" , 508 }, |
| 6717 | { "SPMEVFILT2R8_EL0" , 509 }, |
| 6718 | { "SPMEVFILT2R9_EL0" , 510 }, |
| 6719 | { "SPMEVFILTR0_EL0" , 485 }, |
| 6720 | { "SPMEVFILTR10_EL0" , 495 }, |
| 6721 | { "SPMEVFILTR11_EL0" , 496 }, |
| 6722 | { "SPMEVFILTR12_EL0" , 497 }, |
| 6723 | { "SPMEVFILTR13_EL0" , 498 }, |
| 6724 | { "SPMEVFILTR14_EL0" , 499 }, |
| 6725 | { "SPMEVFILTR15_EL0" , 500 }, |
| 6726 | { "SPMEVFILTR1_EL0" , 486 }, |
| 6727 | { "SPMEVFILTR2_EL0" , 487 }, |
| 6728 | { "SPMEVFILTR3_EL0" , 488 }, |
| 6729 | { "SPMEVFILTR4_EL0" , 489 }, |
| 6730 | { "SPMEVFILTR5_EL0" , 490 }, |
| 6731 | { "SPMEVFILTR6_EL0" , 491 }, |
| 6732 | { "SPMEVFILTR7_EL0" , 492 }, |
| 6733 | { "SPMEVFILTR8_EL0" , 493 }, |
| 6734 | { "SPMEVFILTR9_EL0" , 494 }, |
| 6735 | { "SPMEVTYPER0_EL0" , 469 }, |
| 6736 | { "SPMEVTYPER10_EL0" , 479 }, |
| 6737 | { "SPMEVTYPER11_EL0" , 480 }, |
| 6738 | { "SPMEVTYPER12_EL0" , 481 }, |
| 6739 | { "SPMEVTYPER13_EL0" , 482 }, |
| 6740 | { "SPMEVTYPER14_EL0" , 483 }, |
| 6741 | { "SPMEVTYPER15_EL0" , 484 }, |
| 6742 | { "SPMEVTYPER1_EL0" , 470 }, |
| 6743 | { "SPMEVTYPER2_EL0" , 471 }, |
| 6744 | { "SPMEVTYPER3_EL0" , 472 }, |
| 6745 | { "SPMEVTYPER4_EL0" , 473 }, |
| 6746 | { "SPMEVTYPER5_EL0" , 474 }, |
| 6747 | { "SPMEVTYPER6_EL0" , 475 }, |
| 6748 | { "SPMEVTYPER7_EL0" , 476 }, |
| 6749 | { "SPMEVTYPER8_EL0" , 477 }, |
| 6750 | { "SPMEVTYPER9_EL0" , 478 }, |
| 6751 | { "SPMIIDR_EL1" , 82 }, |
| 6752 | { "SPMINTENCLR_EL1" , 87 }, |
| 6753 | { "SPMINTENSET_EL1" , 86 }, |
| 6754 | { "SPMOVSCLR_EL0" , 449 }, |
| 6755 | { "SPMOVSSET_EL0" , 452 }, |
| 6756 | { "SPMROOTCR_EL3" , 523 }, |
| 6757 | { "SPMSCR_EL1" , 524 }, |
| 6758 | { "SPMSELR_EL0" , 451 }, |
| 6759 | { "SPMZR_EL0" , 450 }, |
| 6760 | { "SPSEL" , 689 }, |
| 6761 | { "SPSR_ABT" , 1234 }, |
| 6762 | { "SPSR_EL1" , 684 }, |
| 6763 | { "SPSR_EL12" , 1530 }, |
| 6764 | { "SPSR_EL2" , 1228 }, |
| 6765 | { "SPSR_EL3" , 1617 }, |
| 6766 | { "SPSR_FIQ" , 1236 }, |
| 6767 | { "SPSR_IRQ" , 1233 }, |
| 6768 | { "SPSR_UND" , 1235 }, |
| 6769 | { "SP_EL0" , 688 }, |
| 6770 | { "SP_EL1" , 1232 }, |
| 6771 | { "SP_EL2" , 1621 }, |
| 6772 | { "SSBS" , 935 }, |
| 6773 | { "STINDEX_EL1" , 686 }, |
| 6774 | { "STINDEX_EL12" , 1532 }, |
| 6775 | { "STINDEX_EL2" , 1230 }, |
| 6776 | { "STINDEX_EL3" , 1619 }, |
| 6777 | { "SVCR" , 933 }, |
| 6778 | { "TCO" , 936 }, |
| 6779 | { "TCR2ALIAS_EL1" , 619 }, |
| 6780 | { "TCR2MASK_EL1" , 617 }, |
| 6781 | { "TCR2MASK_EL12" , 1465 }, |
| 6782 | { "TCR2MASK_EL2" , 1146 }, |
| 6783 | { "TCR2_EL1" , 593 }, |
| 6784 | { "TCR2_EL12" , 1452 }, |
| 6785 | { "TCR2_EL2" , 1123 }, |
| 6786 | { "TCRALIAS_EL1" , 618 }, |
| 6787 | { "TCRMASK_EL1" , 616 }, |
| 6788 | { "TCRMASK_EL12" , 1464 }, |
| 6789 | { "TCRMASK_EL2" , 1145 }, |
| 6790 | { "TCR_EL1" , 592 }, |
| 6791 | { "TCR_EL12" , 1451 }, |
| 6792 | { "TCR_EL2" , 1122 }, |
| 6793 | { "TCR_EL3" , 1577 }, |
| 6794 | { "TEECR32_EL1" , 440 }, |
| 6795 | { "TEEHBR32_EL1" , 441 }, |
| 6796 | { "TFSRE0_EL1" , 714 }, |
| 6797 | { "TFSR_EL1" , 713 }, |
| 6798 | { "TFSR_EL12" , 1537 }, |
| 6799 | { "TFSR_EL2" , 1243 }, |
| 6800 | { "TFSR_EL3" , 1626 }, |
| 6801 | { "TINDEX_EL0" , 930 }, |
| 6802 | { "TINDEX_EL1" , 687 }, |
| 6803 | { "TINDEX_EL12" , 1533 }, |
| 6804 | { "TINDEX_EL2" , 1231 }, |
| 6805 | { "TINDEX_EL3" , 1620 }, |
| 6806 | { "TLBIDIDR_EL1" , 797 }, |
| 6807 | { "TPIDR2_EL0" , 963 }, |
| 6808 | { "TPIDR3_EL0" , 960 }, |
| 6809 | { "TPIDR3_EL1" , 898 }, |
| 6810 | { "TPIDR3_EL12" , 1556 }, |
| 6811 | { "TPIDR3_EL2" , 1383 }, |
| 6812 | { "TPIDR3_EL3" , 1659 }, |
| 6813 | { "TPIDRRO_EL0" , 962 }, |
| 6814 | { "TPIDR_EL0" , 961 }, |
| 6815 | { "TPIDR_EL1" , 901 }, |
| 6816 | { "TPIDR_EL2" , 1385 }, |
| 6817 | { "TPIDR_EL3" , 1660 }, |
| 6818 | { "TPMAX0_EL0" , 924 }, |
| 6819 | { "TPMAX0_EL1" , 608 }, |
| 6820 | { "TPMAX0_EL12" , 1459 }, |
| 6821 | { "TPMAX0_EL2" , 1134 }, |
| 6822 | { "TPMAX1_EL0" , 926 }, |
| 6823 | { "TPMAX1_EL1" , 610 }, |
| 6824 | { "TPMAX1_EL12" , 1461 }, |
| 6825 | { "TPMAX1_EL2" , 1136 }, |
| 6826 | { "TPMIN0_EL0" , 923 }, |
| 6827 | { "TPMIN0_EL1" , 607 }, |
| 6828 | { "TPMIN0_EL12" , 1458 }, |
| 6829 | { "TPMIN0_EL2" , 1133 }, |
| 6830 | { "TPMIN1_EL0" , 925 }, |
| 6831 | { "TPMIN1_EL1" , 609 }, |
| 6832 | { "TPMIN1_EL12" , 1460 }, |
| 6833 | { "TPMIN1_EL2" , 1135 }, |
| 6834 | { "TRBBASER_EL1" , 768 }, |
| 6835 | { "TRBIDR_EL1" , 773 }, |
| 6836 | { "TRBLIMITR_EL1" , 766 }, |
| 6837 | { "TRBMAR_EL1" , 770 }, |
| 6838 | { "TRBMPAM_EL1" , 771 }, |
| 6839 | { "TRBPTR_EL1" , 767 }, |
| 6840 | { "TRBSR_EL1" , 769 }, |
| 6841 | { "TRBSR_EL12" , 1542 }, |
| 6842 | { "TRBSR_EL2" , 1283 }, |
| 6843 | { "TRBSR_EL3" , 1630 }, |
| 6844 | { "TRBTRG_EL1" , 772 }, |
| 6845 | { "TRCACATR0" , 248 }, |
| 6846 | { "TRCACATR1" , 256 }, |
| 6847 | { "TRCACATR10" , 261 }, |
| 6848 | { "TRCACATR11" , 269 }, |
| 6849 | { "TRCACATR12" , 273 }, |
| 6850 | { "TRCACATR13" , 281 }, |
| 6851 | { "TRCACATR14" , 285 }, |
| 6852 | { "TRCACATR15" , 293 }, |
| 6853 | { "TRCACATR2" , 260 }, |
| 6854 | { "TRCACATR3" , 268 }, |
| 6855 | { "TRCACATR4" , 272 }, |
| 6856 | { "TRCACATR5" , 280 }, |
| 6857 | { "TRCACATR6" , 284 }, |
| 6858 | { "TRCACATR7" , 292 }, |
| 6859 | { "TRCACATR8" , 249 }, |
| 6860 | { "TRCACATR9" , 257 }, |
| 6861 | { "TRCACVR0" , 246 }, |
| 6862 | { "TRCACVR1" , 254 }, |
| 6863 | { "TRCACVR10" , 259 }, |
| 6864 | { "TRCACVR11" , 267 }, |
| 6865 | { "TRCACVR12" , 271 }, |
| 6866 | { "TRCACVR13" , 279 }, |
| 6867 | { "TRCACVR14" , 283 }, |
| 6868 | { "TRCACVR15" , 291 }, |
| 6869 | { "TRCACVR2" , 258 }, |
| 6870 | { "TRCACVR3" , 266 }, |
| 6871 | { "TRCACVR4" , 270 }, |
| 6872 | { "TRCACVR5" , 278 }, |
| 6873 | { "TRCACVR6" , 282 }, |
| 6874 | { "TRCACVR7" , 290 }, |
| 6875 | { "TRCACVR8" , 247 }, |
| 6876 | { "TRCACVR9" , 255 }, |
| 6877 | { "TRCAUTHSTATUS" , 333 }, |
| 6878 | { "TRCAUXCTLR" , 153 }, |
| 6879 | { "TRCBBCTLR" , 186 }, |
| 6880 | { "TRCCCCTLR" , 184 }, |
| 6881 | { "TRCCIDCCTLR0" , 296 }, |
| 6882 | { "TRCCIDCCTLR1" , 297 }, |
| 6883 | { "TRCCIDCVR0" , 294 }, |
| 6884 | { "TRCCIDCVR1" , 298 }, |
| 6885 | { "TRCCIDCVR2" , 302 }, |
| 6886 | { "TRCCIDCVR3" , 304 }, |
| 6887 | { "TRCCIDCVR4" , 306 }, |
| 6888 | { "TRCCIDCVR5" , 308 }, |
| 6889 | { "TRCCIDCVR6" , 310 }, |
| 6890 | { "TRCCIDCVR7" , 312 }, |
| 6891 | { "TRCCIDR0" , 330 }, |
| 6892 | { "TRCCIDR1" , 332 }, |
| 6893 | { "TRCCIDR2" , 334 }, |
| 6894 | { "TRCCIDR3" , 336 }, |
| 6895 | { "TRCCLAIMCLR" , 323 }, |
| 6896 | { "TRCCLAIMSET" , 321 }, |
| 6897 | { "TRCCNTCTLR0" , 147 }, |
| 6898 | { "TRCCNTCTLR1" , 150 }, |
| 6899 | { "TRCCNTCTLR2" , 155 }, |
| 6900 | { "TRCCNTCTLR3" , 158 }, |
| 6901 | { "TRCCNTRLDVR0" , 124 }, |
| 6902 | { "TRCCNTRLDVR1" , 131 }, |
| 6903 | { "TRCCNTRLDVR2" , 138 }, |
| 6904 | { "TRCCNTRLDVR3" , 143 }, |
| 6905 | { "TRCCNTVR0" , 164 }, |
| 6906 | { "TRCCNTVR1" , 169 }, |
| 6907 | { "TRCCNTVR2" , 174 }, |
| 6908 | { "TRCCNTVR3" , 178 }, |
| 6909 | { "TRCCONFIGR" , 146 }, |
| 6910 | { "TRCDEVAFF0" , 325 }, |
| 6911 | { "TRCDEVAFF1" , 327 }, |
| 6912 | { "TRCDEVARCH" , 335 }, |
| 6913 | { "TRCDEVID" , 315 }, |
| 6914 | { "TRCDEVTYPE" , 316 }, |
| 6915 | { "TRCDVCMR0" , 252 }, |
| 6916 | { "TRCDVCMR1" , 264 }, |
| 6917 | { "TRCDVCMR2" , 276 }, |
| 6918 | { "TRCDVCMR3" , 288 }, |
| 6919 | { "TRCDVCMR4" , 253 }, |
| 6920 | { "TRCDVCMR5" , 265 }, |
| 6921 | { "TRCDVCMR6" , 277 }, |
| 6922 | { "TRCDVCMR7" , 289 }, |
| 6923 | { "TRCDVCVR0" , 250 }, |
| 6924 | { "TRCDVCVR1" , 262 }, |
| 6925 | { "TRCDVCVR2" , 274 }, |
| 6926 | { "TRCDVCVR3" , 286 }, |
| 6927 | { "TRCDVCVR4" , 251 }, |
| 6928 | { "TRCDVCVR5" , 263 }, |
| 6929 | { "TRCDVCVR6" , 275 }, |
| 6930 | { "TRCDVCVR7" , 287 }, |
| 6931 | { "TRCEVENTCTL0R" , 160 }, |
| 6932 | { "TRCEVENTCTL1R" , 166 }, |
| 6933 | { "TRCEXTINSELR" , 162 }, |
| 6934 | { "TRCEXTINSELR0" , 163 }, |
| 6935 | { "TRCEXTINSELR1" , 168 }, |
| 6936 | { "TRCEXTINSELR2" , 173 }, |
| 6937 | { "TRCEXTINSELR3" , 177 }, |
| 6938 | { "TRCIDR0" , 165 }, |
| 6939 | { "TRCIDR1" , 170 }, |
| 6940 | { "TRCIDR10" , 139 }, |
| 6941 | { "TRCIDR11" , 144 }, |
| 6942 | { "TRCIDR12" , 148 }, |
| 6943 | { "TRCIDR13" , 151 }, |
| 6944 | { "TRCIDR2" , 175 }, |
| 6945 | { "TRCIDR3" , 179 }, |
| 6946 | { "TRCIDR4" , 181 }, |
| 6947 | { "TRCIDR5" , 183 }, |
| 6948 | { "TRCIDR6" , 185 }, |
| 6949 | { "TRCIDR7" , 187 }, |
| 6950 | { "TRCIDR8" , 125 }, |
| 6951 | { "TRCIDR9" , 132 }, |
| 6952 | { "TRCIMSPEC0" , 126 }, |
| 6953 | { "TRCIMSPEC1" , 133 }, |
| 6954 | { "TRCIMSPEC2" , 140 }, |
| 6955 | { "TRCIMSPEC3" , 145 }, |
| 6956 | { "TRCIMSPEC4" , 149 }, |
| 6957 | { "TRCIMSPEC5" , 152 }, |
| 6958 | { "TRCIMSPEC6" , 156 }, |
| 6959 | { "TRCIMSPEC7" , 159 }, |
| 6960 | { "TRCITCTRL" , 314 }, |
| 6961 | { "TRCITECR_EL1" , 579 }, |
| 6962 | { "TRCITECR_EL12" , 1443 }, |
| 6963 | { "TRCITECR_EL2" , 1105 }, |
| 6964 | { "TRCITEEDCR" , 135 }, |
| 6965 | { "TRCLAR" , 329 }, |
| 6966 | { "TRCLSR" , 331 }, |
| 6967 | { "TRCOSLAR" , 191 }, |
| 6968 | { "TRCOSLSR" , 195 }, |
| 6969 | { "TRCPDCR" , 208 }, |
| 6970 | { "TRCPDSR" , 213 }, |
| 6971 | { "TRCPIDR0" , 322 }, |
| 6972 | { "TRCPIDR1" , 324 }, |
| 6973 | { "TRCPIDR2" , 326 }, |
| 6974 | { "TRCPIDR3" , 328 }, |
| 6975 | { "TRCPIDR4" , 317 }, |
| 6976 | { "TRCPIDR5" , 318 }, |
| 6977 | { "TRCPIDR6" , 319 }, |
| 6978 | { "TRCPIDR7" , 320 }, |
| 6979 | { "TRCPRGCTLR" , 127 }, |
| 6980 | { "TRCPROCSELR" , 134 }, |
| 6981 | { "TRCQCTLR" , 128 }, |
| 6982 | { "TRCRSCTLR10" , 228 }, |
| 6983 | { "TRCRSCTLR11" , 231 }, |
| 6984 | { "TRCRSCTLR12" , 234 }, |
| 6985 | { "TRCRSCTLR13" , 237 }, |
| 6986 | { "TRCRSCTLR14" , 240 }, |
| 6987 | { "TRCRSCTLR15" , 243 }, |
| 6988 | { "TRCRSCTLR16" , 188 }, |
| 6989 | { "TRCRSCTLR17" , 192 }, |
| 6990 | { "TRCRSCTLR18" , 197 }, |
| 6991 | { "TRCRSCTLR19" , 201 }, |
| 6992 | { "TRCRSCTLR2" , 196 }, |
| 6993 | { "TRCRSCTLR20" , 205 }, |
| 6994 | { "TRCRSCTLR21" , 210 }, |
| 6995 | { "TRCRSCTLR22" , 215 }, |
| 6996 | { "TRCRSCTLR23" , 219 }, |
| 6997 | { "TRCRSCTLR24" , 223 }, |
| 6998 | { "TRCRSCTLR25" , 226 }, |
| 6999 | { "TRCRSCTLR26" , 229 }, |
| 7000 | { "TRCRSCTLR27" , 232 }, |
| 7001 | { "TRCRSCTLR28" , 235 }, |
| 7002 | { "TRCRSCTLR29" , 238 }, |
| 7003 | { "TRCRSCTLR3" , 200 }, |
| 7004 | { "TRCRSCTLR30" , 241 }, |
| 7005 | { "TRCRSCTLR31" , 244 }, |
| 7006 | { "TRCRSCTLR4" , 204 }, |
| 7007 | { "TRCRSCTLR5" , 209 }, |
| 7008 | { "TRCRSCTLR6" , 214 }, |
| 7009 | { "TRCRSCTLR7" , 218 }, |
| 7010 | { "TRCRSCTLR8" , 222 }, |
| 7011 | { "TRCRSCTLR9" , 225 }, |
| 7012 | { "TRCRSR" , 171 }, |
| 7013 | { "TRCSEQEVR0" , 123 }, |
| 7014 | { "TRCSEQEVR1" , 130 }, |
| 7015 | { "TRCSEQEVR2" , 137 }, |
| 7016 | { "TRCSEQRSTEVR" , 154 }, |
| 7017 | { "TRCSEQSTR" , 157 }, |
| 7018 | { "TRCSSCCR0" , 189 }, |
| 7019 | { "TRCSSCCR1" , 193 }, |
| 7020 | { "TRCSSCCR2" , 198 }, |
| 7021 | { "TRCSSCCR3" , 202 }, |
| 7022 | { "TRCSSCCR4" , 206 }, |
| 7023 | { "TRCSSCCR5" , 211 }, |
| 7024 | { "TRCSSCCR6" , 216 }, |
| 7025 | { "TRCSSCCR7" , 220 }, |
| 7026 | { "TRCSSCSR0" , 224 }, |
| 7027 | { "TRCSSCSR1" , 227 }, |
| 7028 | { "TRCSSCSR2" , 230 }, |
| 7029 | { "TRCSSCSR3" , 233 }, |
| 7030 | { "TRCSSCSR4" , 236 }, |
| 7031 | { "TRCSSCSR5" , 239 }, |
| 7032 | { "TRCSSCSR6" , 242 }, |
| 7033 | { "TRCSSCSR7" , 245 }, |
| 7034 | { "TRCSSPCICR0" , 190 }, |
| 7035 | { "TRCSSPCICR1" , 194 }, |
| 7036 | { "TRCSSPCICR2" , 199 }, |
| 7037 | { "TRCSSPCICR3" , 203 }, |
| 7038 | { "TRCSSPCICR4" , 207 }, |
| 7039 | { "TRCSSPCICR5" , 212 }, |
| 7040 | { "TRCSSPCICR6" , 217 }, |
| 7041 | { "TRCSSPCICR7" , 221 }, |
| 7042 | { "TRCSTALLCTLR" , 176 }, |
| 7043 | { "TRCSTATR" , 141 }, |
| 7044 | { "TRCSYNCPR" , 182 }, |
| 7045 | { "TRCTRACEIDR" , 121 }, |
| 7046 | { "TRCTSCTLR" , 180 }, |
| 7047 | { "TRCVDARCCTLR" , 172 }, |
| 7048 | { "TRCVDCTLR" , 161 }, |
| 7049 | { "TRCVDSACCTLR" , 167 }, |
| 7050 | { "TRCVICTLR" , 122 }, |
| 7051 | { "TRCVIIECTLR" , 129 }, |
| 7052 | { "TRCVIPCSSCTLR" , 142 }, |
| 7053 | { "TRCVISSCTLR" , 136 }, |
| 7054 | { "TRCVMIDCCTLR0" , 300 }, |
| 7055 | { "TRCVMIDCCTLR1" , 301 }, |
| 7056 | { "TRCVMIDCVR0" , 295 }, |
| 7057 | { "TRCVMIDCVR1" , 299 }, |
| 7058 | { "TRCVMIDCVR2" , 303 }, |
| 7059 | { "TRCVMIDCVR3" , 305 }, |
| 7060 | { "TRCVMIDCVR4" , 307 }, |
| 7061 | { "TRCVMIDCVR5" , 309 }, |
| 7062 | { "TRCVMIDCVR6" , 311 }, |
| 7063 | { "TRCVMIDCVR7" , 313 }, |
| 7064 | { "TRFCR_EL1" , 578 }, |
| 7065 | { "TRFCR_EL12" , 1442 }, |
| 7066 | { "TRFCR_EL2" , 1103 }, |
| 7067 | { "TTBR0_EL1" , 590 }, |
| 7068 | { "TTBR0_EL12" , 1449 }, |
| 7069 | { "TTBR0_EL2" , 1119 }, |
| 7070 | { "TTBR0_EL3" , 1576 }, |
| 7071 | { "TTBR1_EL1" , 591 }, |
| 7072 | { "TTBR1_EL12" , 1450 }, |
| 7073 | { "TTBR1_EL2" , 1121 }, |
| 7074 | { "TTTBRP_EL1" , 788 }, |
| 7075 | { "TTTBRP_EL12" , 1549 }, |
| 7076 | { "TTTBRP_EL2" , 1291 }, |
| 7077 | { "TTTBRP_EL3" , 1635 }, |
| 7078 | { "TTTBRU_EL1" , 787 }, |
| 7079 | { "TTTBRU_EL12" , 1548 }, |
| 7080 | { "TTTBRU_EL2" , 1290 }, |
| 7081 | { "UAO" , 692 }, |
| 7082 | { "VBAR_EL1" , 806 }, |
| 7083 | { "VBAR_EL12" , 1555 }, |
| 7084 | { "VBAR_EL2" , 1317 }, |
| 7085 | { "VBAR_EL3" , 1643 }, |
| 7086 | { "VDISR_EL2" , 1320 }, |
| 7087 | { "VDISR_EL3" , 1646 }, |
| 7088 | { "VMECID_A_EL2" , 1316 }, |
| 7089 | { "VMECID_P_EL2" , 1315 }, |
| 7090 | { "VMPIDR_EL2" , 1090 }, |
| 7091 | { "VNCCR_EL2" , 1132 }, |
| 7092 | { "VNCR_EL2" , 1131 }, |
| 7093 | { "VPIDR_EL2" , 1088 }, |
| 7094 | { "VSCTLR_EL2" , 1120 }, |
| 7095 | { "VSESR_EL2" , 1241 }, |
| 7096 | { "VSESR_EL3" , 1625 }, |
| 7097 | { "VSTCR_EL2" , 1144 }, |
| 7098 | { "VSTTBR_EL2" , 1143 }, |
| 7099 | { "VTCR_EL2" , 1129 }, |
| 7100 | { "VTLBID0_EL2" , 1147 }, |
| 7101 | { "VTLBID1_EL2" , 1148 }, |
| 7102 | { "VTLBID2_EL2" , 1149 }, |
| 7103 | { "VTLBID3_EL2" , 1150 }, |
| 7104 | { "VTLBIDOS0_EL2" , 1151 }, |
| 7105 | { "VTLBIDOS1_EL2" , 1152 }, |
| 7106 | { "VTLBIDOS2_EL2" , 1153 }, |
| 7107 | { "VTLBIDOS3_EL2" , 1154 }, |
| 7108 | { "VTTBR_EL2" , 1128 }, |
| 7109 | { "ZCR_EL1" , 577 }, |
| 7110 | { "ZCR_EL12" , 1441 }, |
| 7111 | { "ZCR_EL2" , 1102 }, |
| 7112 | { "ZCR_EL3" , 1573 }, |
| 7113 | }; |
| 7114 | |
| 7115 | struct KeyType { |
| 7116 | std::string Name; |
| 7117 | }; |
| 7118 | KeyType Key = {Name.upper()}; |
| 7119 | struct Comp { |
| 7120 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 7121 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 7122 | if (CmpName < 0) return true; |
| 7123 | if (CmpName > 0) return false; |
| 7124 | return false; |
| 7125 | } |
| 7126 | }; |
| 7127 | auto Table = ArrayRef(Index); |
| 7128 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 7129 | if (Idx == Table.end() || |
| 7130 | Key.Name != Idx->Name) |
| 7131 | return nullptr; |
| 7132 | |
| 7133 | return &SysRegsList[Idx->_index]; |
| 7134 | } |
| 7135 | #endif |
| 7136 | |
| 7137 | #ifdef GET_TLBIPTable_DECL |
| 7138 | const TLBIP *lookupTLBIPByEncoding(uint16_t Encoding); |
| 7139 | const TLBIP *lookupTLBIPByName(StringRef Name); |
| 7140 | #endif |
| 7141 | |
| 7142 | #ifdef GET_TLBIPTable_IMPL |
| 7143 | constexpr TLBIP TLBIPTable[] = { |
| 7144 | { "VAE1OS" , 0x409, true, false, { AArch64::FeatureTLB_RMI } }, // 0 |
| 7145 | { "VAAE1OS" , 0x40B, true, false, { AArch64::FeatureTLB_RMI } }, // 1 |
| 7146 | { "VALE1OS" , 0x40D, true, false, { AArch64::FeatureTLB_RMI } }, // 2 |
| 7147 | { "VAALE1OS" , 0x40F, true, false, { AArch64::FeatureTLB_RMI } }, // 3 |
| 7148 | { "RVAE1IS" , 0x411, true, false, { AArch64::FeatureTLB_RMI } }, // 4 |
| 7149 | { "RVAAE1IS" , 0x413, true, false, { AArch64::FeatureTLB_RMI } }, // 5 |
| 7150 | { "RVALE1IS" , 0x415, true, false, { AArch64::FeatureTLB_RMI } }, // 6 |
| 7151 | { "RVAALE1IS" , 0x417, true, false, { AArch64::FeatureTLB_RMI } }, // 7 |
| 7152 | { "VAE1IS" , 0x419, true, false, { } }, // 8 |
| 7153 | { "VAAE1IS" , 0x41B, true, false, { } }, // 9 |
| 7154 | { "VALE1IS" , 0x41D, true, false, { } }, // 10 |
| 7155 | { "VAALE1IS" , 0x41F, true, false, { } }, // 11 |
| 7156 | { "RVAE1OS" , 0x429, true, false, { AArch64::FeatureTLB_RMI } }, // 12 |
| 7157 | { "RVAAE1OS" , 0x42B, true, false, { AArch64::FeatureTLB_RMI } }, // 13 |
| 7158 | { "RVALE1OS" , 0x42D, true, false, { AArch64::FeatureTLB_RMI } }, // 14 |
| 7159 | { "RVAALE1OS" , 0x42F, true, false, { AArch64::FeatureTLB_RMI } }, // 15 |
| 7160 | { "RVAE1" , 0x431, true, false, { AArch64::FeatureTLB_RMI } }, // 16 |
| 7161 | { "RVAAE1" , 0x433, true, false, { AArch64::FeatureTLB_RMI } }, // 17 |
| 7162 | { "RVALE1" , 0x435, true, false, { AArch64::FeatureTLB_RMI } }, // 18 |
| 7163 | { "RVAALE1" , 0x437, true, false, { AArch64::FeatureTLB_RMI } }, // 19 |
| 7164 | { "VAE1" , 0x439, true, false, { } }, // 20 |
| 7165 | { "VAAE1" , 0x43B, true, false, { } }, // 21 |
| 7166 | { "VALE1" , 0x43D, true, false, { } }, // 22 |
| 7167 | { "VAALE1" , 0x43F, true, false, { } }, // 23 |
| 7168 | { "VAE1OSnXS" , 0x489, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 24 |
| 7169 | { "VAAE1OSnXS" , 0x48B, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 25 |
| 7170 | { "VALE1OSnXS" , 0x48D, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 26 |
| 7171 | { "VAALE1OSnXS" , 0x48F, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 27 |
| 7172 | { "RVAE1ISnXS" , 0x491, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 28 |
| 7173 | { "RVAAE1ISnXS" , 0x493, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 29 |
| 7174 | { "RVALE1ISnXS" , 0x495, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 30 |
| 7175 | { "RVAALE1ISnXS" , 0x497, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 31 |
| 7176 | { "VAE1ISnXS" , 0x499, true, false, { AArch64::FeatureXS } }, // 32 |
| 7177 | { "VAAE1ISnXS" , 0x49B, true, false, { AArch64::FeatureXS } }, // 33 |
| 7178 | { "VALE1ISnXS" , 0x49D, true, false, { AArch64::FeatureXS } }, // 34 |
| 7179 | { "VAALE1ISnXS" , 0x49F, true, false, { AArch64::FeatureXS } }, // 35 |
| 7180 | { "RVAE1OSnXS" , 0x4A9, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 36 |
| 7181 | { "RVAAE1OSnXS" , 0x4AB, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 37 |
| 7182 | { "RVALE1OSnXS" , 0x4AD, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 38 |
| 7183 | { "RVAALE1OSnXS" , 0x4AF, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 39 |
| 7184 | { "RVAE1nXS" , 0x4B1, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 40 |
| 7185 | { "RVAAE1nXS" , 0x4B3, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 41 |
| 7186 | { "RVALE1nXS" , 0x4B5, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 42 |
| 7187 | { "RVAALE1nXS" , 0x4B7, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 43 |
| 7188 | { "VAE1nXS" , 0x4B9, true, false, { AArch64::FeatureXS } }, // 44 |
| 7189 | { "VAAE1nXS" , 0x4BB, true, false, { AArch64::FeatureXS } }, // 45 |
| 7190 | { "VALE1nXS" , 0x4BD, true, false, { AArch64::FeatureXS } }, // 46 |
| 7191 | { "VAALE1nXS" , 0x4BF, true, false, { AArch64::FeatureXS } }, // 47 |
| 7192 | { "IPAS2E1IS" , 0x2401, true, false, { } }, // 48 |
| 7193 | { "RIPAS2E1IS" , 0x2402, true, false, { AArch64::FeatureTLB_RMI } }, // 49 |
| 7194 | { "IPAS2LE1IS" , 0x2405, true, false, { } }, // 50 |
| 7195 | { "RIPAS2LE1IS" , 0x2406, true, false, { AArch64::FeatureTLB_RMI } }, // 51 |
| 7196 | { "VAE2OS" , 0x2409, true, false, { AArch64::FeatureTLB_RMI } }, // 52 |
| 7197 | { "VALE2OS" , 0x240D, true, false, { AArch64::FeatureTLB_RMI } }, // 53 |
| 7198 | { "RVAE2IS" , 0x2411, true, false, { AArch64::FeatureTLB_RMI } }, // 54 |
| 7199 | { "RVALE2IS" , 0x2415, true, false, { AArch64::FeatureTLB_RMI } }, // 55 |
| 7200 | { "VAE2IS" , 0x2419, true, false, { } }, // 56 |
| 7201 | { "VALE2IS" , 0x241D, true, false, { } }, // 57 |
| 7202 | { "IPAS2E1OS" , 0x2420, true, false, { AArch64::FeatureTLB_RMI } }, // 58 |
| 7203 | { "IPAS2E1" , 0x2421, true, false, { } }, // 59 |
| 7204 | { "RIPAS2E1" , 0x2422, true, false, { AArch64::FeatureTLB_RMI } }, // 60 |
| 7205 | { "RIPAS2E1OS" , 0x2423, true, false, { AArch64::FeatureTLB_RMI } }, // 61 |
| 7206 | { "IPAS2LE1OS" , 0x2424, true, false, { AArch64::FeatureTLB_RMI } }, // 62 |
| 7207 | { "IPAS2LE1" , 0x2425, true, false, { } }, // 63 |
| 7208 | { "RIPAS2LE1" , 0x2426, true, false, { AArch64::FeatureTLB_RMI } }, // 64 |
| 7209 | { "RIPAS2LE1OS" , 0x2427, true, false, { AArch64::FeatureTLB_RMI } }, // 65 |
| 7210 | { "RVAE2OS" , 0x2429, true, false, { AArch64::FeatureTLB_RMI } }, // 66 |
| 7211 | { "RVALE2OS" , 0x242D, true, false, { AArch64::FeatureTLB_RMI } }, // 67 |
| 7212 | { "RVAE2" , 0x2431, true, false, { AArch64::FeatureTLB_RMI } }, // 68 |
| 7213 | { "RVALE2" , 0x2435, true, false, { AArch64::FeatureTLB_RMI } }, // 69 |
| 7214 | { "VAE2" , 0x2439, true, false, { } }, // 70 |
| 7215 | { "VALE2" , 0x243D, true, false, { } }, // 71 |
| 7216 | { "IPAS2E1ISnXS" , 0x2481, true, false, { AArch64::FeatureXS } }, // 72 |
| 7217 | { "RIPAS2E1ISnXS" , 0x2482, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 73 |
| 7218 | { "IPAS2LE1ISnXS" , 0x2485, true, false, { AArch64::FeatureXS } }, // 74 |
| 7219 | { "RIPAS2LE1ISnXS" , 0x2486, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 75 |
| 7220 | { "VAE2OSnXS" , 0x2489, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 76 |
| 7221 | { "VALE2OSnXS" , 0x248D, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 77 |
| 7222 | { "RVAE2ISnXS" , 0x2491, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 78 |
| 7223 | { "RVALE2ISnXS" , 0x2495, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 79 |
| 7224 | { "VAE2ISnXS" , 0x2499, true, false, { AArch64::FeatureXS } }, // 80 |
| 7225 | { "VALE2ISnXS" , 0x249D, true, false, { AArch64::FeatureXS } }, // 81 |
| 7226 | { "IPAS2E1OSnXS" , 0x24A0, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 82 |
| 7227 | { "IPAS2E1nXS" , 0x24A1, true, false, { AArch64::FeatureXS } }, // 83 |
| 7228 | { "RIPAS2E1nXS" , 0x24A2, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 84 |
| 7229 | { "RIPAS2E1OSnXS" , 0x24A3, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 85 |
| 7230 | { "IPAS2LE1OSnXS" , 0x24A4, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 86 |
| 7231 | { "IPAS2LE1nXS" , 0x24A5, true, false, { AArch64::FeatureXS } }, // 87 |
| 7232 | { "RIPAS2LE1nXS" , 0x24A6, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 88 |
| 7233 | { "RIPAS2LE1OSnXS" , 0x24A7, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 89 |
| 7234 | { "RVAE2OSnXS" , 0x24A9, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 90 |
| 7235 | { "RVALE2OSnXS" , 0x24AD, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 91 |
| 7236 | { "RVAE2nXS" , 0x24B1, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 92 |
| 7237 | { "RVALE2nXS" , 0x24B5, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 93 |
| 7238 | { "VAE2nXS" , 0x24B9, true, false, { AArch64::FeatureXS } }, // 94 |
| 7239 | { "VALE2nXS" , 0x24BD, true, false, { AArch64::FeatureXS } }, // 95 |
| 7240 | { "VAE3OS" , 0x3409, true, false, { AArch64::FeatureTLB_RMI } }, // 96 |
| 7241 | { "VALE3OS" , 0x340D, true, false, { AArch64::FeatureTLB_RMI } }, // 97 |
| 7242 | { "RVAE3IS" , 0x3411, true, false, { AArch64::FeatureTLB_RMI } }, // 98 |
| 7243 | { "RVALE3IS" , 0x3415, true, false, { AArch64::FeatureTLB_RMI } }, // 99 |
| 7244 | { "VAE3IS" , 0x3419, true, false, { } }, // 100 |
| 7245 | { "VALE3IS" , 0x341D, true, false, { } }, // 101 |
| 7246 | { "RVAE3OS" , 0x3429, true, false, { AArch64::FeatureTLB_RMI } }, // 102 |
| 7247 | { "RVALE3OS" , 0x342D, true, false, { AArch64::FeatureTLB_RMI } }, // 103 |
| 7248 | { "RVAE3" , 0x3431, true, false, { AArch64::FeatureTLB_RMI } }, // 104 |
| 7249 | { "RVALE3" , 0x3435, true, false, { AArch64::FeatureTLB_RMI } }, // 105 |
| 7250 | { "VAE3" , 0x3439, true, false, { } }, // 106 |
| 7251 | { "VALE3" , 0x343D, true, false, { } }, // 107 |
| 7252 | { "VAE3OSnXS" , 0x3489, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 108 |
| 7253 | { "VALE3OSnXS" , 0x348D, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 109 |
| 7254 | { "RVAE3ISnXS" , 0x3491, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 110 |
| 7255 | { "RVALE3ISnXS" , 0x3495, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 111 |
| 7256 | { "VAE3ISnXS" , 0x3499, true, false, { AArch64::FeatureXS } }, // 112 |
| 7257 | { "VALE3ISnXS" , 0x349D, true, false, { AArch64::FeatureXS } }, // 113 |
| 7258 | { "RVAE3OSnXS" , 0x34A9, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 114 |
| 7259 | { "RVALE3OSnXS" , 0x34AD, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 115 |
| 7260 | { "RVAE3nXS" , 0x34B1, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 116 |
| 7261 | { "RVALE3nXS" , 0x34B5, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 117 |
| 7262 | { "VAE3nXS" , 0x34B9, true, false, { AArch64::FeatureXS } }, // 118 |
| 7263 | { "VALE3nXS" , 0x34BD, true, false, { AArch64::FeatureXS } }, // 119 |
| 7264 | }; |
| 7265 | |
| 7266 | const TLBIP *lookupTLBIPByEncoding(uint16_t Encoding) { |
| 7267 | struct KeyType { |
| 7268 | uint16_t Encoding; |
| 7269 | }; |
| 7270 | KeyType Key = {Encoding}; |
| 7271 | struct Comp { |
| 7272 | bool operator()(const TLBIP &LHS, const KeyType &RHS) const { |
| 7273 | if (LHS.Encoding < RHS.Encoding) |
| 7274 | return true; |
| 7275 | if (LHS.Encoding > RHS.Encoding) |
| 7276 | return false; |
| 7277 | return false; |
| 7278 | } |
| 7279 | }; |
| 7280 | auto Table = ArrayRef(TLBIPTable); |
| 7281 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 7282 | if (Idx == Table.end() || |
| 7283 | Key.Encoding != Idx->Encoding) |
| 7284 | return nullptr; |
| 7285 | |
| 7286 | return &*Idx; |
| 7287 | } |
| 7288 | |
| 7289 | const TLBIP *lookupTLBIPByName(StringRef Name) { |
| 7290 | struct IndexType { |
| 7291 | const char * Name; |
| 7292 | unsigned _index; |
| 7293 | }; |
| 7294 | static const struct IndexType Index[] = { |
| 7295 | { "IPAS2E1" , 59 }, |
| 7296 | { "IPAS2E1IS" , 48 }, |
| 7297 | { "IPAS2E1ISNXS" , 72 }, |
| 7298 | { "IPAS2E1NXS" , 83 }, |
| 7299 | { "IPAS2E1OS" , 58 }, |
| 7300 | { "IPAS2E1OSNXS" , 82 }, |
| 7301 | { "IPAS2LE1" , 63 }, |
| 7302 | { "IPAS2LE1IS" , 50 }, |
| 7303 | { "IPAS2LE1ISNXS" , 74 }, |
| 7304 | { "IPAS2LE1NXS" , 87 }, |
| 7305 | { "IPAS2LE1OS" , 62 }, |
| 7306 | { "IPAS2LE1OSNXS" , 86 }, |
| 7307 | { "RIPAS2E1" , 60 }, |
| 7308 | { "RIPAS2E1IS" , 49 }, |
| 7309 | { "RIPAS2E1ISNXS" , 73 }, |
| 7310 | { "RIPAS2E1NXS" , 84 }, |
| 7311 | { "RIPAS2E1OS" , 61 }, |
| 7312 | { "RIPAS2E1OSNXS" , 85 }, |
| 7313 | { "RIPAS2LE1" , 64 }, |
| 7314 | { "RIPAS2LE1IS" , 51 }, |
| 7315 | { "RIPAS2LE1ISNXS" , 75 }, |
| 7316 | { "RIPAS2LE1NXS" , 88 }, |
| 7317 | { "RIPAS2LE1OS" , 65 }, |
| 7318 | { "RIPAS2LE1OSNXS" , 89 }, |
| 7319 | { "RVAAE1" , 17 }, |
| 7320 | { "RVAAE1IS" , 5 }, |
| 7321 | { "RVAAE1ISNXS" , 29 }, |
| 7322 | { "RVAAE1NXS" , 41 }, |
| 7323 | { "RVAAE1OS" , 13 }, |
| 7324 | { "RVAAE1OSNXS" , 37 }, |
| 7325 | { "RVAALE1" , 19 }, |
| 7326 | { "RVAALE1IS" , 7 }, |
| 7327 | { "RVAALE1ISNXS" , 31 }, |
| 7328 | { "RVAALE1NXS" , 43 }, |
| 7329 | { "RVAALE1OS" , 15 }, |
| 7330 | { "RVAALE1OSNXS" , 39 }, |
| 7331 | { "RVAE1" , 16 }, |
| 7332 | { "RVAE1IS" , 4 }, |
| 7333 | { "RVAE1ISNXS" , 28 }, |
| 7334 | { "RVAE1NXS" , 40 }, |
| 7335 | { "RVAE1OS" , 12 }, |
| 7336 | { "RVAE1OSNXS" , 36 }, |
| 7337 | { "RVAE2" , 68 }, |
| 7338 | { "RVAE2IS" , 54 }, |
| 7339 | { "RVAE2ISNXS" , 78 }, |
| 7340 | { "RVAE2NXS" , 92 }, |
| 7341 | { "RVAE2OS" , 66 }, |
| 7342 | { "RVAE2OSNXS" , 90 }, |
| 7343 | { "RVAE3" , 104 }, |
| 7344 | { "RVAE3IS" , 98 }, |
| 7345 | { "RVAE3ISNXS" , 110 }, |
| 7346 | { "RVAE3NXS" , 116 }, |
| 7347 | { "RVAE3OS" , 102 }, |
| 7348 | { "RVAE3OSNXS" , 114 }, |
| 7349 | { "RVALE1" , 18 }, |
| 7350 | { "RVALE1IS" , 6 }, |
| 7351 | { "RVALE1ISNXS" , 30 }, |
| 7352 | { "RVALE1NXS" , 42 }, |
| 7353 | { "RVALE1OS" , 14 }, |
| 7354 | { "RVALE1OSNXS" , 38 }, |
| 7355 | { "RVALE2" , 69 }, |
| 7356 | { "RVALE2IS" , 55 }, |
| 7357 | { "RVALE2ISNXS" , 79 }, |
| 7358 | { "RVALE2NXS" , 93 }, |
| 7359 | { "RVALE2OS" , 67 }, |
| 7360 | { "RVALE2OSNXS" , 91 }, |
| 7361 | { "RVALE3" , 105 }, |
| 7362 | { "RVALE3IS" , 99 }, |
| 7363 | { "RVALE3ISNXS" , 111 }, |
| 7364 | { "RVALE3NXS" , 117 }, |
| 7365 | { "RVALE3OS" , 103 }, |
| 7366 | { "RVALE3OSNXS" , 115 }, |
| 7367 | { "VAAE1" , 21 }, |
| 7368 | { "VAAE1IS" , 9 }, |
| 7369 | { "VAAE1ISNXS" , 33 }, |
| 7370 | { "VAAE1NXS" , 45 }, |
| 7371 | { "VAAE1OS" , 1 }, |
| 7372 | { "VAAE1OSNXS" , 25 }, |
| 7373 | { "VAALE1" , 23 }, |
| 7374 | { "VAALE1IS" , 11 }, |
| 7375 | { "VAALE1ISNXS" , 35 }, |
| 7376 | { "VAALE1NXS" , 47 }, |
| 7377 | { "VAALE1OS" , 3 }, |
| 7378 | { "VAALE1OSNXS" , 27 }, |
| 7379 | { "VAE1" , 20 }, |
| 7380 | { "VAE1IS" , 8 }, |
| 7381 | { "VAE1ISNXS" , 32 }, |
| 7382 | { "VAE1NXS" , 44 }, |
| 7383 | { "VAE1OS" , 0 }, |
| 7384 | { "VAE1OSNXS" , 24 }, |
| 7385 | { "VAE2" , 70 }, |
| 7386 | { "VAE2IS" , 56 }, |
| 7387 | { "VAE2ISNXS" , 80 }, |
| 7388 | { "VAE2NXS" , 94 }, |
| 7389 | { "VAE2OS" , 52 }, |
| 7390 | { "VAE2OSNXS" , 76 }, |
| 7391 | { "VAE3" , 106 }, |
| 7392 | { "VAE3IS" , 100 }, |
| 7393 | { "VAE3ISNXS" , 112 }, |
| 7394 | { "VAE3NXS" , 118 }, |
| 7395 | { "VAE3OS" , 96 }, |
| 7396 | { "VAE3OSNXS" , 108 }, |
| 7397 | { "VALE1" , 22 }, |
| 7398 | { "VALE1IS" , 10 }, |
| 7399 | { "VALE1ISNXS" , 34 }, |
| 7400 | { "VALE1NXS" , 46 }, |
| 7401 | { "VALE1OS" , 2 }, |
| 7402 | { "VALE1OSNXS" , 26 }, |
| 7403 | { "VALE2" , 71 }, |
| 7404 | { "VALE2IS" , 57 }, |
| 7405 | { "VALE2ISNXS" , 81 }, |
| 7406 | { "VALE2NXS" , 95 }, |
| 7407 | { "VALE2OS" , 53 }, |
| 7408 | { "VALE2OSNXS" , 77 }, |
| 7409 | { "VALE3" , 107 }, |
| 7410 | { "VALE3IS" , 101 }, |
| 7411 | { "VALE3ISNXS" , 113 }, |
| 7412 | { "VALE3NXS" , 119 }, |
| 7413 | { "VALE3OS" , 97 }, |
| 7414 | { "VALE3OSNXS" , 109 }, |
| 7415 | }; |
| 7416 | |
| 7417 | struct KeyType { |
| 7418 | std::string Name; |
| 7419 | }; |
| 7420 | KeyType Key = {Name.upper()}; |
| 7421 | struct Comp { |
| 7422 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 7423 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 7424 | if (CmpName < 0) return true; |
| 7425 | if (CmpName > 0) return false; |
| 7426 | return false; |
| 7427 | } |
| 7428 | }; |
| 7429 | auto Table = ArrayRef(Index); |
| 7430 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 7431 | if (Idx == Table.end() || |
| 7432 | Key.Name != Idx->Name) |
| 7433 | return nullptr; |
| 7434 | |
| 7435 | return &TLBIPTable[Idx->_index]; |
| 7436 | } |
| 7437 | #endif |
| 7438 | |
| 7439 | #ifdef GET_TLBITable_DECL |
| 7440 | const TLBI *lookupTLBIByEncoding(uint16_t Encoding); |
| 7441 | const TLBI *lookupTLBIByName(StringRef Name); |
| 7442 | #endif |
| 7443 | |
| 7444 | #ifdef GET_TLBITable_IMPL |
| 7445 | constexpr TLBI TLBITable[] = { |
| 7446 | { "VMALLE1OS" , 0x408, false, true, { AArch64::FeatureTLB_RMI } }, // 0 |
| 7447 | { "VAE1OS" , 0x409, true, false, { AArch64::FeatureTLB_RMI } }, // 1 |
| 7448 | { "ASIDE1OS" , 0x40A, true, false, { AArch64::FeatureTLB_RMI } }, // 2 |
| 7449 | { "VAAE1OS" , 0x40B, true, false, { AArch64::FeatureTLB_RMI } }, // 3 |
| 7450 | { "VALE1OS" , 0x40D, true, false, { AArch64::FeatureTLB_RMI } }, // 4 |
| 7451 | { "VAALE1OS" , 0x40F, true, false, { AArch64::FeatureTLB_RMI } }, // 5 |
| 7452 | { "RVAE1IS" , 0x411, true, false, { AArch64::FeatureTLB_RMI } }, // 6 |
| 7453 | { "RVAAE1IS" , 0x413, true, false, { AArch64::FeatureTLB_RMI } }, // 7 |
| 7454 | { "RVALE1IS" , 0x415, true, false, { AArch64::FeatureTLB_RMI } }, // 8 |
| 7455 | { "RVAALE1IS" , 0x417, true, false, { AArch64::FeatureTLB_RMI } }, // 9 |
| 7456 | { "VMALLE1IS" , 0x418, false, true, { } }, // 10 |
| 7457 | { "VAE1IS" , 0x419, true, false, { } }, // 11 |
| 7458 | { "ASIDE1IS" , 0x41A, true, false, { } }, // 12 |
| 7459 | { "VAAE1IS" , 0x41B, true, false, { } }, // 13 |
| 7460 | { "VALE1IS" , 0x41D, true, false, { } }, // 14 |
| 7461 | { "VAALE1IS" , 0x41F, true, false, { } }, // 15 |
| 7462 | { "RVAE1OS" , 0x429, true, false, { AArch64::FeatureTLB_RMI } }, // 16 |
| 7463 | { "RVAAE1OS" , 0x42B, true, false, { AArch64::FeatureTLB_RMI } }, // 17 |
| 7464 | { "RVALE1OS" , 0x42D, true, false, { AArch64::FeatureTLB_RMI } }, // 18 |
| 7465 | { "RVAALE1OS" , 0x42F, true, false, { AArch64::FeatureTLB_RMI } }, // 19 |
| 7466 | { "RVAE1" , 0x431, true, false, { AArch64::FeatureTLB_RMI } }, // 20 |
| 7467 | { "RVAAE1" , 0x433, true, false, { AArch64::FeatureTLB_RMI } }, // 21 |
| 7468 | { "RVALE1" , 0x435, true, false, { AArch64::FeatureTLB_RMI } }, // 22 |
| 7469 | { "RVAALE1" , 0x437, true, false, { AArch64::FeatureTLB_RMI } }, // 23 |
| 7470 | { "VMALLE1" , 0x438, false, false, { } }, // 24 |
| 7471 | { "VAE1" , 0x439, true, false, { } }, // 25 |
| 7472 | { "ASIDE1" , 0x43A, true, false, { } }, // 26 |
| 7473 | { "VAAE1" , 0x43B, true, false, { } }, // 27 |
| 7474 | { "VALE1" , 0x43D, true, false, { } }, // 28 |
| 7475 | { "VAALE1" , 0x43F, true, false, { } }, // 29 |
| 7476 | { "VMALLE1OSnXS" , 0x488, false, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 30 |
| 7477 | { "VAE1OSnXS" , 0x489, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 31 |
| 7478 | { "ASIDE1OSnXS" , 0x48A, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 32 |
| 7479 | { "VAAE1OSnXS" , 0x48B, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 33 |
| 7480 | { "VALE1OSnXS" , 0x48D, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 34 |
| 7481 | { "VAALE1OSnXS" , 0x48F, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 35 |
| 7482 | { "RVAE1ISnXS" , 0x491, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 36 |
| 7483 | { "RVAAE1ISnXS" , 0x493, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 37 |
| 7484 | { "RVALE1ISnXS" , 0x495, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 38 |
| 7485 | { "RVAALE1ISnXS" , 0x497, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 39 |
| 7486 | { "VMALLE1ISnXS" , 0x498, false, true, { AArch64::FeatureXS } }, // 40 |
| 7487 | { "VAE1ISnXS" , 0x499, true, false, { AArch64::FeatureXS } }, // 41 |
| 7488 | { "ASIDE1ISnXS" , 0x49A, true, false, { AArch64::FeatureXS } }, // 42 |
| 7489 | { "VAAE1ISnXS" , 0x49B, true, false, { AArch64::FeatureXS } }, // 43 |
| 7490 | { "VALE1ISnXS" , 0x49D, true, false, { AArch64::FeatureXS } }, // 44 |
| 7491 | { "VAALE1ISnXS" , 0x49F, true, false, { AArch64::FeatureXS } }, // 45 |
| 7492 | { "RVAE1OSnXS" , 0x4A9, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 46 |
| 7493 | { "RVAAE1OSnXS" , 0x4AB, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 47 |
| 7494 | { "RVALE1OSnXS" , 0x4AD, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 48 |
| 7495 | { "RVAALE1OSnXS" , 0x4AF, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 49 |
| 7496 | { "RVAE1nXS" , 0x4B1, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 50 |
| 7497 | { "RVAAE1nXS" , 0x4B3, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 51 |
| 7498 | { "RVALE1nXS" , 0x4B5, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 52 |
| 7499 | { "RVAALE1nXS" , 0x4B7, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 53 |
| 7500 | { "VMALLE1nXS" , 0x4B8, false, false, { AArch64::FeatureXS } }, // 54 |
| 7501 | { "VAE1nXS" , 0x4B9, true, false, { AArch64::FeatureXS } }, // 55 |
| 7502 | { "ASIDE1nXS" , 0x4BA, true, false, { AArch64::FeatureXS } }, // 56 |
| 7503 | { "VAAE1nXS" , 0x4BB, true, false, { AArch64::FeatureXS } }, // 57 |
| 7504 | { "VALE1nXS" , 0x4BD, true, false, { AArch64::FeatureXS } }, // 58 |
| 7505 | { "VAALE1nXS" , 0x4BF, true, false, { AArch64::FeatureXS } }, // 59 |
| 7506 | { "IPAS2E1IS" , 0x2401, true, false, { } }, // 60 |
| 7507 | { "RIPAS2E1IS" , 0x2402, true, false, { AArch64::FeatureTLB_RMI } }, // 61 |
| 7508 | { "IPAS2LE1IS" , 0x2405, true, false, { } }, // 62 |
| 7509 | { "RIPAS2LE1IS" , 0x2406, true, false, { AArch64::FeatureTLB_RMI } }, // 63 |
| 7510 | { "ALLE2OS" , 0x2408, false, true, { AArch64::FeatureTLB_RMI } }, // 64 |
| 7511 | { "VAE2OS" , 0x2409, true, false, { AArch64::FeatureTLB_RMI } }, // 65 |
| 7512 | { "ALLE1OS" , 0x240C, false, true, { AArch64::FeatureTLB_RMI } }, // 66 |
| 7513 | { "VALE2OS" , 0x240D, true, false, { AArch64::FeatureTLB_RMI } }, // 67 |
| 7514 | { "VMALLS12E1OS" , 0x240E, false, true, { AArch64::FeatureTLB_RMI } }, // 68 |
| 7515 | { "RVAE2IS" , 0x2411, true, false, { AArch64::FeatureTLB_RMI } }, // 69 |
| 7516 | { "VMALLWS2E1IS" , 0x2412, false, true, { AArch64::FeatureTLBIW } }, // 70 |
| 7517 | { "RVALE2IS" , 0x2415, true, false, { AArch64::FeatureTLB_RMI } }, // 71 |
| 7518 | { "ALLE2IS" , 0x2418, false, true, { } }, // 72 |
| 7519 | { "VAE2IS" , 0x2419, true, false, { } }, // 73 |
| 7520 | { "ALLE1IS" , 0x241C, false, true, { } }, // 74 |
| 7521 | { "VALE2IS" , 0x241D, true, false, { } }, // 75 |
| 7522 | { "VMALLS12E1IS" , 0x241E, false, true, { } }, // 76 |
| 7523 | { "IPAS2E1OS" , 0x2420, true, false, { AArch64::FeatureTLB_RMI } }, // 77 |
| 7524 | { "IPAS2E1" , 0x2421, true, false, { } }, // 78 |
| 7525 | { "RIPAS2E1" , 0x2422, true, false, { AArch64::FeatureTLB_RMI } }, // 79 |
| 7526 | { "RIPAS2E1OS" , 0x2423, true, false, { AArch64::FeatureTLB_RMI } }, // 80 |
| 7527 | { "IPAS2LE1OS" , 0x2424, true, false, { AArch64::FeatureTLB_RMI } }, // 81 |
| 7528 | { "IPAS2LE1" , 0x2425, true, false, { } }, // 82 |
| 7529 | { "RIPAS2LE1" , 0x2426, true, false, { AArch64::FeatureTLB_RMI } }, // 83 |
| 7530 | { "RIPAS2LE1OS" , 0x2427, true, false, { AArch64::FeatureTLB_RMI } }, // 84 |
| 7531 | { "RVAE2OS" , 0x2429, true, false, { AArch64::FeatureTLB_RMI } }, // 85 |
| 7532 | { "VMALLWS2E1OS" , 0x242A, false, true, { AArch64::FeatureTLBIW } }, // 86 |
| 7533 | { "RVALE2OS" , 0x242D, true, false, { AArch64::FeatureTLB_RMI } }, // 87 |
| 7534 | { "RVAE2" , 0x2431, true, false, { AArch64::FeatureTLB_RMI } }, // 88 |
| 7535 | { "VMALLWS2E1" , 0x2432, false, false, { AArch64::FeatureTLBIW } }, // 89 |
| 7536 | { "RVALE2" , 0x2435, true, false, { AArch64::FeatureTLB_RMI } }, // 90 |
| 7537 | { "ALLE2" , 0x2438, false, false, { } }, // 91 |
| 7538 | { "VAE2" , 0x2439, true, false, { } }, // 92 |
| 7539 | { "ALLE1" , 0x243C, false, false, { } }, // 93 |
| 7540 | { "VALE2" , 0x243D, true, false, { } }, // 94 |
| 7541 | { "VMALLS12E1" , 0x243E, false, false, { } }, // 95 |
| 7542 | { "IPAS2E1ISnXS" , 0x2481, true, false, { AArch64::FeatureXS } }, // 96 |
| 7543 | { "RIPAS2E1ISnXS" , 0x2482, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 97 |
| 7544 | { "IPAS2LE1ISnXS" , 0x2485, true, false, { AArch64::FeatureXS } }, // 98 |
| 7545 | { "RIPAS2LE1ISnXS" , 0x2486, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 99 |
| 7546 | { "ALLE2OSnXS" , 0x2488, false, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 100 |
| 7547 | { "VAE2OSnXS" , 0x2489, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 101 |
| 7548 | { "ALLE1OSnXS" , 0x248C, false, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 102 |
| 7549 | { "VALE2OSnXS" , 0x248D, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 103 |
| 7550 | { "VMALLS12E1OSnXS" , 0x248E, false, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 104 |
| 7551 | { "RVAE2ISnXS" , 0x2491, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 105 |
| 7552 | { "VMALLWS2E1ISnXS" , 0x2492, false, true, { AArch64::FeatureTLBIW, AArch64::FeatureXS } }, // 106 |
| 7553 | { "RVALE2ISnXS" , 0x2495, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 107 |
| 7554 | { "ALLE2ISnXS" , 0x2498, false, true, { AArch64::FeatureXS } }, // 108 |
| 7555 | { "VAE2ISnXS" , 0x2499, true, false, { AArch64::FeatureXS } }, // 109 |
| 7556 | { "ALLE1ISnXS" , 0x249C, false, true, { AArch64::FeatureXS } }, // 110 |
| 7557 | { "VALE2ISnXS" , 0x249D, true, false, { AArch64::FeatureXS } }, // 111 |
| 7558 | { "VMALLS12E1ISnXS" , 0x249E, false, true, { AArch64::FeatureXS } }, // 112 |
| 7559 | { "IPAS2E1OSnXS" , 0x24A0, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 113 |
| 7560 | { "IPAS2E1nXS" , 0x24A1, true, false, { AArch64::FeatureXS } }, // 114 |
| 7561 | { "RIPAS2E1nXS" , 0x24A2, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 115 |
| 7562 | { "RIPAS2E1OSnXS" , 0x24A3, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 116 |
| 7563 | { "IPAS2LE1OSnXS" , 0x24A4, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 117 |
| 7564 | { "IPAS2LE1nXS" , 0x24A5, true, false, { AArch64::FeatureXS } }, // 118 |
| 7565 | { "RIPAS2LE1nXS" , 0x24A6, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 119 |
| 7566 | { "RIPAS2LE1OSnXS" , 0x24A7, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 120 |
| 7567 | { "RVAE2OSnXS" , 0x24A9, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 121 |
| 7568 | { "VMALLWS2E1OSnXS" , 0x24AA, false, true, { AArch64::FeatureTLBIW, AArch64::FeatureXS } }, // 122 |
| 7569 | { "RVALE2OSnXS" , 0x24AD, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 123 |
| 7570 | { "RVAE2nXS" , 0x24B1, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 124 |
| 7571 | { "VMALLWS2E1nXS" , 0x24B2, false, false, { AArch64::FeatureTLBIW, AArch64::FeatureXS } }, // 125 |
| 7572 | { "RVALE2nXS" , 0x24B5, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 126 |
| 7573 | { "ALLE2nXS" , 0x24B8, false, false, { AArch64::FeatureXS } }, // 127 |
| 7574 | { "VAE2nXS" , 0x24B9, true, false, { AArch64::FeatureXS } }, // 128 |
| 7575 | { "ALLE1nXS" , 0x24BC, false, false, { AArch64::FeatureXS } }, // 129 |
| 7576 | { "VALE2nXS" , 0x24BD, true, false, { AArch64::FeatureXS } }, // 130 |
| 7577 | { "VMALLS12E1nXS" , 0x24BE, false, false, { AArch64::FeatureXS } }, // 131 |
| 7578 | { "ALLE3OS" , 0x3408, false, true, { AArch64::FeatureTLB_RMI } }, // 132 |
| 7579 | { "VAE3OS" , 0x3409, true, false, { AArch64::FeatureTLB_RMI } }, // 133 |
| 7580 | { "PAALLOS" , 0x340C, false, false, { AArch64::FeatureRME } }, // 134 |
| 7581 | { "VALE3OS" , 0x340D, true, false, { AArch64::FeatureTLB_RMI } }, // 135 |
| 7582 | { "RVAE3IS" , 0x3411, true, false, { AArch64::FeatureTLB_RMI } }, // 136 |
| 7583 | { "RVALE3IS" , 0x3415, true, false, { AArch64::FeatureTLB_RMI } }, // 137 |
| 7584 | { "ALLE3IS" , 0x3418, false, true, { } }, // 138 |
| 7585 | { "VAE3IS" , 0x3419, true, false, { } }, // 139 |
| 7586 | { "VALE3IS" , 0x341D, true, false, { } }, // 140 |
| 7587 | { "RPAOS" , 0x3423, true, false, { AArch64::FeatureRME } }, // 141 |
| 7588 | { "RPALOS" , 0x3427, true, false, { AArch64::FeatureRME } }, // 142 |
| 7589 | { "RVAE3OS" , 0x3429, true, false, { AArch64::FeatureTLB_RMI } }, // 143 |
| 7590 | { "RVALE3OS" , 0x342D, true, false, { AArch64::FeatureTLB_RMI } }, // 144 |
| 7591 | { "RVAE3" , 0x3431, true, false, { AArch64::FeatureTLB_RMI } }, // 145 |
| 7592 | { "RVALE3" , 0x3435, true, false, { AArch64::FeatureTLB_RMI } }, // 146 |
| 7593 | { "ALLE3" , 0x3438, false, false, { } }, // 147 |
| 7594 | { "VAE3" , 0x3439, true, false, { } }, // 148 |
| 7595 | { "PAALL" , 0x343C, false, false, { AArch64::FeatureRME } }, // 149 |
| 7596 | { "VALE3" , 0x343D, true, false, { } }, // 150 |
| 7597 | { "ALLE3OSnXS" , 0x3488, false, true, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 151 |
| 7598 | { "VAE3OSnXS" , 0x3489, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 152 |
| 7599 | { "PAALLOSnXS" , 0x348C, false, false, { AArch64::FeatureRME, AArch64::FeatureXS } }, // 153 |
| 7600 | { "VALE3OSnXS" , 0x348D, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 154 |
| 7601 | { "RVAE3ISnXS" , 0x3491, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 155 |
| 7602 | { "RVALE3ISnXS" , 0x3495, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 156 |
| 7603 | { "ALLE3ISnXS" , 0x3498, false, true, { AArch64::FeatureXS } }, // 157 |
| 7604 | { "VAE3ISnXS" , 0x3499, true, false, { AArch64::FeatureXS } }, // 158 |
| 7605 | { "VALE3ISnXS" , 0x349D, true, false, { AArch64::FeatureXS } }, // 159 |
| 7606 | { "RPAOSnXS" , 0x34A3, true, false, { AArch64::FeatureRME, AArch64::FeatureXS } }, // 160 |
| 7607 | { "RPALOSnXS" , 0x34A7, true, false, { AArch64::FeatureRME, AArch64::FeatureXS } }, // 161 |
| 7608 | { "RVAE3OSnXS" , 0x34A9, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 162 |
| 7609 | { "RVALE3OSnXS" , 0x34AD, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 163 |
| 7610 | { "RVAE3nXS" , 0x34B1, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 164 |
| 7611 | { "RVALE3nXS" , 0x34B5, true, false, { AArch64::FeatureTLB_RMI, AArch64::FeatureXS } }, // 165 |
| 7612 | { "ALLE3nXS" , 0x34B8, false, false, { AArch64::FeatureXS } }, // 166 |
| 7613 | { "VAE3nXS" , 0x34B9, true, false, { AArch64::FeatureXS } }, // 167 |
| 7614 | { "PAALLnXS" , 0x34BC, false, false, { AArch64::FeatureRME, AArch64::FeatureXS } }, // 168 |
| 7615 | { "VALE3nXS" , 0x34BD, true, false, { AArch64::FeatureXS } }, // 169 |
| 7616 | }; |
| 7617 | |
| 7618 | const TLBI *lookupTLBIByEncoding(uint16_t Encoding) { |
| 7619 | struct KeyType { |
| 7620 | uint16_t Encoding; |
| 7621 | }; |
| 7622 | KeyType Key = {Encoding}; |
| 7623 | struct Comp { |
| 7624 | bool operator()(const TLBI &LHS, const KeyType &RHS) const { |
| 7625 | if (LHS.Encoding < RHS.Encoding) |
| 7626 | return true; |
| 7627 | if (LHS.Encoding > RHS.Encoding) |
| 7628 | return false; |
| 7629 | return false; |
| 7630 | } |
| 7631 | }; |
| 7632 | auto Table = ArrayRef(TLBITable); |
| 7633 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 7634 | if (Idx == Table.end() || |
| 7635 | Key.Encoding != Idx->Encoding) |
| 7636 | return nullptr; |
| 7637 | |
| 7638 | return &*Idx; |
| 7639 | } |
| 7640 | |
| 7641 | const TLBI *lookupTLBIByName(StringRef Name) { |
| 7642 | struct IndexType { |
| 7643 | const char * Name; |
| 7644 | unsigned _index; |
| 7645 | }; |
| 7646 | static const struct IndexType Index[] = { |
| 7647 | { "ALLE1" , 93 }, |
| 7648 | { "ALLE1IS" , 74 }, |
| 7649 | { "ALLE1ISNXS" , 110 }, |
| 7650 | { "ALLE1NXS" , 129 }, |
| 7651 | { "ALLE1OS" , 66 }, |
| 7652 | { "ALLE1OSNXS" , 102 }, |
| 7653 | { "ALLE2" , 91 }, |
| 7654 | { "ALLE2IS" , 72 }, |
| 7655 | { "ALLE2ISNXS" , 108 }, |
| 7656 | { "ALLE2NXS" , 127 }, |
| 7657 | { "ALLE2OS" , 64 }, |
| 7658 | { "ALLE2OSNXS" , 100 }, |
| 7659 | { "ALLE3" , 147 }, |
| 7660 | { "ALLE3IS" , 138 }, |
| 7661 | { "ALLE3ISNXS" , 157 }, |
| 7662 | { "ALLE3NXS" , 166 }, |
| 7663 | { "ALLE3OS" , 132 }, |
| 7664 | { "ALLE3OSNXS" , 151 }, |
| 7665 | { "ASIDE1" , 26 }, |
| 7666 | { "ASIDE1IS" , 12 }, |
| 7667 | { "ASIDE1ISNXS" , 42 }, |
| 7668 | { "ASIDE1NXS" , 56 }, |
| 7669 | { "ASIDE1OS" , 2 }, |
| 7670 | { "ASIDE1OSNXS" , 32 }, |
| 7671 | { "IPAS2E1" , 78 }, |
| 7672 | { "IPAS2E1IS" , 60 }, |
| 7673 | { "IPAS2E1ISNXS" , 96 }, |
| 7674 | { "IPAS2E1NXS" , 114 }, |
| 7675 | { "IPAS2E1OS" , 77 }, |
| 7676 | { "IPAS2E1OSNXS" , 113 }, |
| 7677 | { "IPAS2LE1" , 82 }, |
| 7678 | { "IPAS2LE1IS" , 62 }, |
| 7679 | { "IPAS2LE1ISNXS" , 98 }, |
| 7680 | { "IPAS2LE1NXS" , 118 }, |
| 7681 | { "IPAS2LE1OS" , 81 }, |
| 7682 | { "IPAS2LE1OSNXS" , 117 }, |
| 7683 | { "PAALL" , 149 }, |
| 7684 | { "PAALLNXS" , 168 }, |
| 7685 | { "PAALLOS" , 134 }, |
| 7686 | { "PAALLOSNXS" , 153 }, |
| 7687 | { "RIPAS2E1" , 79 }, |
| 7688 | { "RIPAS2E1IS" , 61 }, |
| 7689 | { "RIPAS2E1ISNXS" , 97 }, |
| 7690 | { "RIPAS2E1NXS" , 115 }, |
| 7691 | { "RIPAS2E1OS" , 80 }, |
| 7692 | { "RIPAS2E1OSNXS" , 116 }, |
| 7693 | { "RIPAS2LE1" , 83 }, |
| 7694 | { "RIPAS2LE1IS" , 63 }, |
| 7695 | { "RIPAS2LE1ISNXS" , 99 }, |
| 7696 | { "RIPAS2LE1NXS" , 119 }, |
| 7697 | { "RIPAS2LE1OS" , 84 }, |
| 7698 | { "RIPAS2LE1OSNXS" , 120 }, |
| 7699 | { "RPALOS" , 142 }, |
| 7700 | { "RPALOSNXS" , 161 }, |
| 7701 | { "RPAOS" , 141 }, |
| 7702 | { "RPAOSNXS" , 160 }, |
| 7703 | { "RVAAE1" , 21 }, |
| 7704 | { "RVAAE1IS" , 7 }, |
| 7705 | { "RVAAE1ISNXS" , 37 }, |
| 7706 | { "RVAAE1NXS" , 51 }, |
| 7707 | { "RVAAE1OS" , 17 }, |
| 7708 | { "RVAAE1OSNXS" , 47 }, |
| 7709 | { "RVAALE1" , 23 }, |
| 7710 | { "RVAALE1IS" , 9 }, |
| 7711 | { "RVAALE1ISNXS" , 39 }, |
| 7712 | { "RVAALE1NXS" , 53 }, |
| 7713 | { "RVAALE1OS" , 19 }, |
| 7714 | { "RVAALE1OSNXS" , 49 }, |
| 7715 | { "RVAE1" , 20 }, |
| 7716 | { "RVAE1IS" , 6 }, |
| 7717 | { "RVAE1ISNXS" , 36 }, |
| 7718 | { "RVAE1NXS" , 50 }, |
| 7719 | { "RVAE1OS" , 16 }, |
| 7720 | { "RVAE1OSNXS" , 46 }, |
| 7721 | { "RVAE2" , 88 }, |
| 7722 | { "RVAE2IS" , 69 }, |
| 7723 | { "RVAE2ISNXS" , 105 }, |
| 7724 | { "RVAE2NXS" , 124 }, |
| 7725 | { "RVAE2OS" , 85 }, |
| 7726 | { "RVAE2OSNXS" , 121 }, |
| 7727 | { "RVAE3" , 145 }, |
| 7728 | { "RVAE3IS" , 136 }, |
| 7729 | { "RVAE3ISNXS" , 155 }, |
| 7730 | { "RVAE3NXS" , 164 }, |
| 7731 | { "RVAE3OS" , 143 }, |
| 7732 | { "RVAE3OSNXS" , 162 }, |
| 7733 | { "RVALE1" , 22 }, |
| 7734 | { "RVALE1IS" , 8 }, |
| 7735 | { "RVALE1ISNXS" , 38 }, |
| 7736 | { "RVALE1NXS" , 52 }, |
| 7737 | { "RVALE1OS" , 18 }, |
| 7738 | { "RVALE1OSNXS" , 48 }, |
| 7739 | { "RVALE2" , 90 }, |
| 7740 | { "RVALE2IS" , 71 }, |
| 7741 | { "RVALE2ISNXS" , 107 }, |
| 7742 | { "RVALE2NXS" , 126 }, |
| 7743 | { "RVALE2OS" , 87 }, |
| 7744 | { "RVALE2OSNXS" , 123 }, |
| 7745 | { "RVALE3" , 146 }, |
| 7746 | { "RVALE3IS" , 137 }, |
| 7747 | { "RVALE3ISNXS" , 156 }, |
| 7748 | { "RVALE3NXS" , 165 }, |
| 7749 | { "RVALE3OS" , 144 }, |
| 7750 | { "RVALE3OSNXS" , 163 }, |
| 7751 | { "VAAE1" , 27 }, |
| 7752 | { "VAAE1IS" , 13 }, |
| 7753 | { "VAAE1ISNXS" , 43 }, |
| 7754 | { "VAAE1NXS" , 57 }, |
| 7755 | { "VAAE1OS" , 3 }, |
| 7756 | { "VAAE1OSNXS" , 33 }, |
| 7757 | { "VAALE1" , 29 }, |
| 7758 | { "VAALE1IS" , 15 }, |
| 7759 | { "VAALE1ISNXS" , 45 }, |
| 7760 | { "VAALE1NXS" , 59 }, |
| 7761 | { "VAALE1OS" , 5 }, |
| 7762 | { "VAALE1OSNXS" , 35 }, |
| 7763 | { "VAE1" , 25 }, |
| 7764 | { "VAE1IS" , 11 }, |
| 7765 | { "VAE1ISNXS" , 41 }, |
| 7766 | { "VAE1NXS" , 55 }, |
| 7767 | { "VAE1OS" , 1 }, |
| 7768 | { "VAE1OSNXS" , 31 }, |
| 7769 | { "VAE2" , 92 }, |
| 7770 | { "VAE2IS" , 73 }, |
| 7771 | { "VAE2ISNXS" , 109 }, |
| 7772 | { "VAE2NXS" , 128 }, |
| 7773 | { "VAE2OS" , 65 }, |
| 7774 | { "VAE2OSNXS" , 101 }, |
| 7775 | { "VAE3" , 148 }, |
| 7776 | { "VAE3IS" , 139 }, |
| 7777 | { "VAE3ISNXS" , 158 }, |
| 7778 | { "VAE3NXS" , 167 }, |
| 7779 | { "VAE3OS" , 133 }, |
| 7780 | { "VAE3OSNXS" , 152 }, |
| 7781 | { "VALE1" , 28 }, |
| 7782 | { "VALE1IS" , 14 }, |
| 7783 | { "VALE1ISNXS" , 44 }, |
| 7784 | { "VALE1NXS" , 58 }, |
| 7785 | { "VALE1OS" , 4 }, |
| 7786 | { "VALE1OSNXS" , 34 }, |
| 7787 | { "VALE2" , 94 }, |
| 7788 | { "VALE2IS" , 75 }, |
| 7789 | { "VALE2ISNXS" , 111 }, |
| 7790 | { "VALE2NXS" , 130 }, |
| 7791 | { "VALE2OS" , 67 }, |
| 7792 | { "VALE2OSNXS" , 103 }, |
| 7793 | { "VALE3" , 150 }, |
| 7794 | { "VALE3IS" , 140 }, |
| 7795 | { "VALE3ISNXS" , 159 }, |
| 7796 | { "VALE3NXS" , 169 }, |
| 7797 | { "VALE3OS" , 135 }, |
| 7798 | { "VALE3OSNXS" , 154 }, |
| 7799 | { "VMALLE1" , 24 }, |
| 7800 | { "VMALLE1IS" , 10 }, |
| 7801 | { "VMALLE1ISNXS" , 40 }, |
| 7802 | { "VMALLE1NXS" , 54 }, |
| 7803 | { "VMALLE1OS" , 0 }, |
| 7804 | { "VMALLE1OSNXS" , 30 }, |
| 7805 | { "VMALLS12E1" , 95 }, |
| 7806 | { "VMALLS12E1IS" , 76 }, |
| 7807 | { "VMALLS12E1ISNXS" , 112 }, |
| 7808 | { "VMALLS12E1NXS" , 131 }, |
| 7809 | { "VMALLS12E1OS" , 68 }, |
| 7810 | { "VMALLS12E1OSNXS" , 104 }, |
| 7811 | { "VMALLWS2E1" , 89 }, |
| 7812 | { "VMALLWS2E1IS" , 70 }, |
| 7813 | { "VMALLWS2E1ISNXS" , 106 }, |
| 7814 | { "VMALLWS2E1NXS" , 125 }, |
| 7815 | { "VMALLWS2E1OS" , 86 }, |
| 7816 | { "VMALLWS2E1OSNXS" , 122 }, |
| 7817 | }; |
| 7818 | |
| 7819 | struct KeyType { |
| 7820 | std::string Name; |
| 7821 | }; |
| 7822 | KeyType Key = {Name.upper()}; |
| 7823 | struct Comp { |
| 7824 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 7825 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 7826 | if (CmpName < 0) return true; |
| 7827 | if (CmpName > 0) return false; |
| 7828 | return false; |
| 7829 | } |
| 7830 | }; |
| 7831 | auto Table = ArrayRef(Index); |
| 7832 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 7833 | if (Idx == Table.end() || |
| 7834 | Key.Name != Idx->Name) |
| 7835 | return nullptr; |
| 7836 | |
| 7837 | return &TLBITable[Idx->_index]; |
| 7838 | } |
| 7839 | #endif |
| 7840 | |
| 7841 | #ifdef GET_TSBsList_DECL |
| 7842 | const TSB *lookupTSBByEncoding(uint8_t Encoding); |
| 7843 | const TSB *lookupTSBByName(StringRef Name); |
| 7844 | #endif |
| 7845 | |
| 7846 | #ifdef GET_TSBsList_IMPL |
| 7847 | constexpr TSB TSBsList[] = { |
| 7848 | { "csync" , 0x2, {AArch64::FeatureTRACEV8_4} }, // 0 |
| 7849 | }; |
| 7850 | |
| 7851 | const TSB *lookupTSBByEncoding(uint8_t Encoding) { |
| 7852 | if ((uint8_t)Encoding != std::clamp((uint8_t)Encoding, (uint8_t)0x2, (uint8_t)0x2)) |
| 7853 | return nullptr; |
| 7854 | |
| 7855 | auto Table = ArrayRef(TSBsList); |
| 7856 | size_t Idx = Encoding - 0x2; |
| 7857 | return &Table[Idx]; |
| 7858 | } |
| 7859 | |
| 7860 | const TSB *lookupTSBByName(StringRef Name) { |
| 7861 | struct IndexType { |
| 7862 | const char * Name; |
| 7863 | unsigned _index; |
| 7864 | }; |
| 7865 | static const struct IndexType Index[] = { |
| 7866 | { "CSYNC" , 0 }, |
| 7867 | }; |
| 7868 | |
| 7869 | struct KeyType { |
| 7870 | std::string Name; |
| 7871 | }; |
| 7872 | KeyType Key = {Name.upper()}; |
| 7873 | struct Comp { |
| 7874 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 7875 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 7876 | if (CmpName < 0) return true; |
| 7877 | if (CmpName > 0) return false; |
| 7878 | return false; |
| 7879 | } |
| 7880 | }; |
| 7881 | auto Table = ArrayRef(Index); |
| 7882 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 7883 | if (Idx == Table.end() || |
| 7884 | Key.Name != Idx->Name) |
| 7885 | return nullptr; |
| 7886 | |
| 7887 | return &TSBsList[Idx->_index]; |
| 7888 | } |
| 7889 | #endif |
| 7890 | |
| 7891 | #ifdef GET_CMHPRIORITYHINT_DECL |
| 7892 | const CMHPriorityHint *lookupCMHPriorityHintByName(StringRef Name); |
| 7893 | const CMHPriorityHint *lookupCMHPriorityHintByEncoding(uint8_t Encoding); |
| 7894 | #endif |
| 7895 | |
| 7896 | #ifdef GET_CMHPRIORITYHINT_IMPL |
| 7897 | constexpr CMHPriorityHint CMHPriorityHintsList[] = { |
| 7898 | { "ph" , 0x1 }, // 0 |
| 7899 | }; |
| 7900 | |
| 7901 | const CMHPriorityHint *lookupCMHPriorityHintByName(StringRef Name) { |
| 7902 | struct IndexType { |
| 7903 | const char * Name; |
| 7904 | unsigned _index; |
| 7905 | }; |
| 7906 | static const struct IndexType Index[] = { |
| 7907 | { "PH" , 0 }, |
| 7908 | }; |
| 7909 | |
| 7910 | struct KeyType { |
| 7911 | std::string Name; |
| 7912 | }; |
| 7913 | KeyType Key = {Name.upper()}; |
| 7914 | struct Comp { |
| 7915 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 7916 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 7917 | if (CmpName < 0) return true; |
| 7918 | if (CmpName > 0) return false; |
| 7919 | return false; |
| 7920 | } |
| 7921 | }; |
| 7922 | auto Table = ArrayRef(Index); |
| 7923 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 7924 | if (Idx == Table.end() || |
| 7925 | Key.Name != Idx->Name) |
| 7926 | return nullptr; |
| 7927 | |
| 7928 | return &CMHPriorityHintsList[Idx->_index]; |
| 7929 | } |
| 7930 | |
| 7931 | const CMHPriorityHint *lookupCMHPriorityHintByEncoding(uint8_t Encoding) { |
| 7932 | struct IndexType { |
| 7933 | uint8_t Encoding; |
| 7934 | unsigned _index; |
| 7935 | }; |
| 7936 | static const struct IndexType Index[] = { |
| 7937 | { 0x1, 0 }, |
| 7938 | }; |
| 7939 | |
| 7940 | if ((uint8_t)Encoding != std::clamp((uint8_t)Encoding, (uint8_t)0x1, (uint8_t)0x1)) |
| 7941 | return nullptr; |
| 7942 | |
| 7943 | auto Table = ArrayRef(Index); |
| 7944 | size_t Idx = Encoding - 0x1; |
| 7945 | return &CMHPriorityHintsList[Table[Idx]._index]; |
| 7946 | } |
| 7947 | #endif |
| 7948 | |
| 7949 | #ifdef GET_TINDEX_DECL |
| 7950 | const TIndex *lookupTIndexByName(StringRef Name); |
| 7951 | const TIndex *lookupTIndexByEncoding(uint8_t Encoding); |
| 7952 | #endif |
| 7953 | |
| 7954 | #ifdef GET_TINDEX_IMPL |
| 7955 | constexpr TIndex TIndexsList[] = { |
| 7956 | { "nb" , 0x1 }, // 0 |
| 7957 | }; |
| 7958 | |
| 7959 | const TIndex *lookupTIndexByName(StringRef Name) { |
| 7960 | struct IndexType { |
| 7961 | const char * Name; |
| 7962 | unsigned _index; |
| 7963 | }; |
| 7964 | static const struct IndexType Index[] = { |
| 7965 | { "NB" , 0 }, |
| 7966 | }; |
| 7967 | |
| 7968 | struct KeyType { |
| 7969 | std::string Name; |
| 7970 | }; |
| 7971 | KeyType Key = {Name.upper()}; |
| 7972 | struct Comp { |
| 7973 | bool operator()(const IndexType &LHS, const KeyType &RHS) const { |
| 7974 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
| 7975 | if (CmpName < 0) return true; |
| 7976 | if (CmpName > 0) return false; |
| 7977 | return false; |
| 7978 | } |
| 7979 | }; |
| 7980 | auto Table = ArrayRef(Index); |
| 7981 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, Comp()); |
| 7982 | if (Idx == Table.end() || |
| 7983 | Key.Name != Idx->Name) |
| 7984 | return nullptr; |
| 7985 | |
| 7986 | return &TIndexsList[Idx->_index]; |
| 7987 | } |
| 7988 | |
| 7989 | const TIndex *lookupTIndexByEncoding(uint8_t Encoding) { |
| 7990 | struct IndexType { |
| 7991 | uint8_t Encoding; |
| 7992 | unsigned _index; |
| 7993 | }; |
| 7994 | static const struct IndexType Index[] = { |
| 7995 | { 0x1, 0 }, |
| 7996 | }; |
| 7997 | |
| 7998 | if ((uint8_t)Encoding != std::clamp((uint8_t)Encoding, (uint8_t)0x1, (uint8_t)0x1)) |
| 7999 | return nullptr; |
| 8000 | |
| 8001 | auto Table = ArrayRef(Index); |
| 8002 | size_t Idx = Encoding - 0x1; |
| 8003 | return &TIndexsList[Table[Idx]._index]; |
| 8004 | } |
| 8005 | #endif |
| 8006 | |
| 8007 | #undef GET_ATValues_DECL |
| 8008 | #undef GET_ATsList_DECL |
| 8009 | #undef GET_ATsList_IMPL |
| 8010 | #undef GET_BTIValues_DECL |
| 8011 | #undef GET_BTIsList_DECL |
| 8012 | #undef GET_BTIsList_IMPL |
| 8013 | #undef GET_CMHPRIORITYHINT_DECL |
| 8014 | #undef GET_CMHPRIORITYHINT_IMPL |
| 8015 | #undef GET_DBValues_DECL |
| 8016 | #undef GET_DBnXSValues_DECL |
| 8017 | #undef GET_DBnXSsList_DECL |
| 8018 | #undef GET_DBnXSsList_IMPL |
| 8019 | #undef GET_DBsList_DECL |
| 8020 | #undef GET_DBsList_IMPL |
| 8021 | #undef GET_DCValues_DECL |
| 8022 | #undef GET_DCsList_DECL |
| 8023 | #undef GET_DCsList_IMPL |
| 8024 | #undef GET_ExactFPImmValues_DECL |
| 8025 | #undef GET_ExactFPImmsList_DECL |
| 8026 | #undef GET_ExactFPImmsList_IMPL |
| 8027 | #undef GET_GICRTable_DECL |
| 8028 | #undef GET_GICRTable_IMPL |
| 8029 | #undef GET_GICTable_DECL |
| 8030 | #undef GET_GICTable_IMPL |
| 8031 | #undef GET_GSBTable_DECL |
| 8032 | #undef GET_GSBTable_IMPL |
| 8033 | #undef GET_ICValues_DECL |
| 8034 | #undef GET_ICsList_DECL |
| 8035 | #undef GET_ICsList_IMPL |
| 8036 | #undef GET_ISBValues_DECL |
| 8037 | #undef GET_ISBsList_DECL |
| 8038 | #undef GET_ISBsList_IMPL |
| 8039 | #undef GET_MLBITable_DECL |
| 8040 | #undef GET_MLBITable_IMPL |
| 8041 | #undef GET_PHintValues_DECL |
| 8042 | #undef GET_PHintsList_DECL |
| 8043 | #undef GET_PHintsList_IMPL |
| 8044 | #undef GET_PLBITable_DECL |
| 8045 | #undef GET_PLBITable_IMPL |
| 8046 | #undef GET_PRFMValues_DECL |
| 8047 | #undef GET_PRFMsList_DECL |
| 8048 | #undef GET_PRFMsList_IMPL |
| 8049 | #undef GET_PSBValues_DECL |
| 8050 | #undef GET_PSBsList_DECL |
| 8051 | #undef GET_PSBsList_IMPL |
| 8052 | #undef GET_PStateImm0_15Values_DECL |
| 8053 | #undef GET_PStateImm0_15sList_DECL |
| 8054 | #undef GET_PStateImm0_15sList_IMPL |
| 8055 | #undef GET_PStateImm0_1Values_DECL |
| 8056 | #undef GET_PStateImm0_1sList_DECL |
| 8057 | #undef GET_PStateImm0_1sList_IMPL |
| 8058 | #undef GET_RPRFMValues_DECL |
| 8059 | #undef GET_RPRFMsList_DECL |
| 8060 | #undef GET_RPRFMsList_IMPL |
| 8061 | #undef GET_SVCRValues_DECL |
| 8062 | #undef GET_SVCRsList_DECL |
| 8063 | #undef GET_SVCRsList_IMPL |
| 8064 | #undef GET_SVEPREDPATValues_DECL |
| 8065 | #undef GET_SVEPREDPATsList_DECL |
| 8066 | #undef GET_SVEPREDPATsList_IMPL |
| 8067 | #undef GET_SVEPRFMValues_DECL |
| 8068 | #undef GET_SVEPRFMsList_DECL |
| 8069 | #undef GET_SVEPRFMsList_IMPL |
| 8070 | #undef GET_SVEVECLENSPECIFIERValues_DECL |
| 8071 | #undef GET_SVEVECLENSPECIFIERsList_DECL |
| 8072 | #undef GET_SVEVECLENSPECIFIERsList_IMPL |
| 8073 | #undef GET_SysRegValues_DECL |
| 8074 | #undef GET_SysRegsList_DECL |
| 8075 | #undef GET_SysRegsList_IMPL |
| 8076 | #undef GET_TINDEX_DECL |
| 8077 | #undef GET_TINDEX_IMPL |
| 8078 | #undef GET_TLBIPTable_DECL |
| 8079 | #undef GET_TLBIPTable_IMPL |
| 8080 | #undef GET_TLBITable_DECL |
| 8081 | #undef GET_TLBITable_IMPL |
| 8082 | #undef GET_TSBValues_DECL |
| 8083 | #undef GET_TSBsList_DECL |
| 8084 | #undef GET_TSBsList_IMPL |
| 8085 | |