1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* MC Register Information *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9namespace llvm {
10
11extern const int16_t DirectXRegDiffLists[] = {
12 /* 0 */ 0,
13};
14
15extern const LaneBitmask DirectXLaneMaskLists[] = {
16 /* 0 */ LaneBitmask(0xFFFFFFFFFFFFFFFF),
17};
18
19extern const uint16_t DirectXSubRegIdxLists[] = {
20 /* 0 */
21 /* dummy */ 0
22};
23
24
25#ifdef __GNUC__
26#pragma GCC diagnostic push
27#pragma GCC diagnostic ignored "-Woverlength-strings"
28#endif
29extern const char DirectXRegStrings[] = {
30 /* 0 */ "DXIL\000"
31};
32#ifdef __GNUC__
33#pragma GCC diagnostic pop
34#endif
35
36extern const MCRegisterDesc DirectXRegDesc[] = { // Descriptors
37 { .Name: 4, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 0, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
38 { .Name: 0, .SubRegs: 0, .SuperRegs: 0, .SubRegIndices: 0, .RegUnits: 0, .RegUnitLaneMasks: 0, .IsConstant: 0, .IsArtificial: 0 },
39};
40
41extern const MCPhysReg DirectXRegUnitRoots[][2] = {
42 { dxil::DXIL },
43};
44
45// Register classes...
46
47#ifdef __GNUC__
48#pragma GCC diagnostic push
49#pragma GCC diagnostic ignored "-Woverlength-strings"
50#endif
51extern const char DirectXRegClassStrings[] = {
52 /* 0 */ "DXILClass\000"
53};
54#ifdef __GNUC__
55#pragma GCC diagnostic pop
56#endif
57
58using DirectXRegisterClassStorage = MCRegisterClassStorage<1, 1, 1, 1, 1, 0>;
59extern const MCRegisterClassStorage<1, 1, 1, 1, 1, 0> DirectXMCRegisterClassStorage = {
60 .Classes: {
61 {
62 offsetof(DirectXRegisterClassStorage, Regs[0]) - 0 * sizeof(MCRegisterClass),
63 offsetof(DirectXRegisterClassStorage, BitSets[0]) - 0 * sizeof(MCRegisterClass),
64 .NameIdx: 0,
65 .RegSizeInBits: 32,
66 .RegsSize: 1,
67 .RegSetBegin: 1, /* MinRegVal */
68 .RegSetSize: 1, /* RegSetSize */
69 .ID: dxil::DXILClassRegClassID,
70 .CopyCost: 1, /* CopyCost */
71 .Allocatable: true, /* Allocatable */
72 .BaseClass: false,
73 offsetof(DirectXRegisterClassStorage, SubClassMasks[0]) - 0 * sizeof(MCRegisterClass),
74 offsetof(DirectXRegisterClassStorage, SuperRegIdxSeqs[0]) - 0 * sizeof(MCRegisterClass),
75 .LaneMask: LaneBitmask(0x0000000000000001),
76 .AllocationPriority: 0,
77 .GlobalPriority: false,
78 .TSFlags: 0x00, /* TSFlags */
79 .SpillStackID: 0, /* SpillStackID */
80 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
81 .CoveredBySubRegs: false, /* CoveredBySubRegs */
82 offsetof(DirectXRegisterClassStorage, SuperClasses[0]) - 0 * sizeof(MCRegisterClass),
83 .SuperClassesSize: 0
84 },
85 },
86 .Regs: {
87 /* 0 */ dxil::DXIL,
88 },
89 .BitSets: {
90 /* 0 */ 0x01,
91 },
92 .SubClassMasks: {
93 // 0 DXILClass
94 0x00000001,
95 },
96 .SuperRegIdxSeqs: {
97 /* 0 */ 0,
98 },
99 .SuperClasses: {
100 /* 0 DXILClass */
101 }
102};
103
104const MCRegisterClass &getDirectXMCRegisterClass(unsigned RC) {
105 return DirectXMCRegisterClassStorage.Classes[RC];
106}
107
108extern const uint16_t DirectXRegEncodingTable[] = {
109 0,
110 0,
111};
112static inline void InitDirectXMCRegisterInfo(MCRegisterInfo *RI, unsigned RA, unsigned DwarfFlavour = 0, unsigned EHFlavour = 0, unsigned PC = 0) {
113 RI->InitMCRegisterInfo(D: DirectXRegDesc, NR: 2, RA, PC, C: DirectXMCRegisterClassStorage.Classes, NC: 1, RURoots: DirectXRegUnitRoots, NRU: 1, DL: DirectXRegDiffLists, RUMS: DirectXLaneMaskLists, Strings: DirectXRegStrings, ClassStrings: DirectXRegClassStrings, SubIndices: DirectXSubRegIdxLists, NumIndices: 1,
114RET: DirectXRegEncodingTable, RUI: nullptr);
115
116}
117
118
119} // namespace llvm
120