1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target SDNode descriptions *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: RISCV.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10#ifdef GET_SDNODE_ENUM
11#undef GET_SDNODE_ENUM
12
13namespace llvm::RISCVISD {
14
15enum GenNodeType : unsigned {
16 ABSW = ISD::BUILTIN_OP_END,
17 ADD_LO,
18 ADD_TPREL,
19 ADD_VL,
20 AND_VL,
21 AVGCEILS_VL,
22 AVGCEILU_VL,
23 AVGFLOORS_VL,
24 AVGFLOORU_VL,
25 BITREVERSE_VL,
26 BREV8,
27 BR_CC,
28 BSWAP_VL,
29 BuildGPRPair,
30 BuildPairF64,
31 CALL,
32 CLEAR_CSR,
33 CLSW,
34 CLZW,
35 CTLZ_VL,
36 CTPOP_VL,
37 CTTZ_VL,
38 CTZW,
39 CZERO_EQZ,
40 CZERO_NEZ,
41 DIVUW,
42 DIVW,
43 FABS_VL,
44 FADD_VL,
45 FCLASS,
46 FCLASS_VL,
47 FCOPYSIGN_VL,
48 FCVT_WU_RV64,
49 FCVT_W_RV64,
50 FCVT_X,
51 FCVT_XU,
52 FDIV_VL,
53 FLI,
54 FMAX,
55 FMIN,
56 FMUL_VL,
57 FMV_H_X,
58 FMV_W_X_RV64,
59 FMV_X_ANYEXTH,
60 FMV_X_ANYEXTW_RV64,
61 FMV_X_SIGNEXTH,
62 FNEG_VL,
63 FP_EXTEND_VL,
64 FP_ROUND_VL,
65 FROUND,
66 FSGNJX,
67 FSQRT_VL,
68 FSUB_VL,
69 HI,
70 LD_RV32,
71 LLA,
72 MNRET_GLUE,
73 MOP_R,
74 MOP_RR,
75 MRET_GLUE,
76 MULHSU,
77 MULHS_VL,
78 MULHU_VL,
79 MUL_VL,
80 NDS_FMV_BF16_X,
81 NDS_FMV_X_ANYEXTBF16,
82 NEGW_MAX,
83 ORC_B,
84 OR_VL,
85 PASUB,
86 PASUBU,
87 PMULHR,
88 PMULHRSU,
89 PMULHRU,
90 PMULHSU,
91 PPACK_DH,
92 PROBED_ALLOCA,
93 QC_C_MILEAVERET_GLUE,
94 QC_E_LI,
95 QC_INSB,
96 QC_SETWMI,
97 READ_COUNTER_WIDE,
98 READ_CSR,
99 READ_VLENB,
100 REMUW,
101 RET_GLUE,
102 RI_VEXTRACT,
103 RI_VINSERT_VL,
104 RI_VUNZIP2A_VL,
105 RI_VUNZIP2B_VL,
106 RI_VZIP2A_VL,
107 RI_VZIP2B_VL,
108 RI_VZIPEVEN_VL,
109 RI_VZIPODD_VL,
110 ROLW,
111 RORW,
112 ROTL_VL,
113 ROTR_VL,
114 SADDSAT_VL,
115 SDIV_VL,
116 SD_RV32,
117 SELECT_CC,
118 SETCC_VL,
119 SET_CSR,
120 SF_VC_FVV_SE,
121 SF_VC_FVW_SE,
122 SF_VC_FV_SE,
123 SF_VC_IVV_SE,
124 SF_VC_IVW_SE,
125 SF_VC_IV_SE,
126 SF_VC_VVV_SE,
127 SF_VC_VVW_SE,
128 SF_VC_VV_SE,
129 SF_VC_V_FVV_SE,
130 SF_VC_V_FVW_SE,
131 SF_VC_V_FV_SE,
132 SF_VC_V_IVV_SE,
133 SF_VC_V_IVW_SE,
134 SF_VC_V_IV_SE,
135 SF_VC_V_I_SE,
136 SF_VC_V_VVV_SE,
137 SF_VC_V_VVW_SE,
138 SF_VC_V_VV_SE,
139 SF_VC_V_XVV_SE,
140 SF_VC_V_XVW_SE,
141 SF_VC_V_XV_SE,
142 SF_VC_V_X_SE,
143 SF_VC_XVV_SE,
144 SF_VC_XVW_SE,
145 SF_VC_XV_SE,
146 SHA256SIG0,
147 SHA256SIG1,
148 SHA256SUM0,
149 SHA256SUM1,
150 SHL_ADD,
151 SHL_VL,
152 SINT_TO_FP_VL,
153 SLLW,
154 SM3P0,
155 SM3P1,
156 SM4ED,
157 SM4KS,
158 SMAX_VL,
159 SMIN_VL,
160 SPLAT_VECTOR_SPLIT_I64_VL,
161 SRAW,
162 SRA_VL,
163 SREM_VL,
164 SRET_GLUE,
165 SRLW,
166 SRL_VL,
167 SSUBSAT_VL,
168 STRICT_FADD_VL,
169 STRICT_FCVT_WU_RV64,
170 STRICT_FCVT_W_RV64,
171 STRICT_FDIV_VL,
172 STRICT_FMUL_VL,
173 STRICT_FP_EXTEND_VL,
174 STRICT_FP_ROUND_VL,
175 STRICT_FSETCCS_VL,
176 STRICT_FSETCC_VL,
177 STRICT_FSQRT_VL,
178 STRICT_FSUB_VL,
179 STRICT_SINT_TO_FP_VL,
180 STRICT_UINT_TO_FP_VL,
181 STRICT_VFCVT_RM_X_F_VL,
182 STRICT_VFCVT_RTZ_XU_F_VL,
183 STRICT_VFCVT_RTZ_X_F_VL,
184 STRICT_VFMADD_VL,
185 STRICT_VFMSUB_VL,
186 STRICT_VFNCVT_ROD_VL,
187 STRICT_VFNMADD_VL,
188 STRICT_VFNMSUB_VL,
189 STRICT_VFROUND_NOEXCEPT_VL,
190 SUB_VL,
191 SWAP_CSR,
192 SW_GUARDED_BRIND,
193 SW_GUARDED_CALL,
194 SW_GUARDED_TAIL,
195 SplitF64,
196 SplitGPRPair,
197 TAIL,
198 TH_LDD,
199 TH_LWD,
200 TH_LWUD,
201 TH_SDD,
202 TH_SWD,
203 TRUNCATE_VECTOR_VL,
204 TRUNCATE_VECTOR_VL_SSAT,
205 TRUNCATE_VECTOR_VL_USAT,
206 TUPLE_EXTRACT,
207 TUPLE_INSERT,
208 UADDSAT_VL,
209 UDIV_VL,
210 UINT_TO_FP_VL,
211 UMAX_VL,
212 UMIN_VL,
213 UNZIP,
214 UREM_VL,
215 USUBSAT_VL,
216 VCPOP_VL,
217 VECREDUCE_ADD_VL,
218 VECREDUCE_AND_VL,
219 VECREDUCE_FADD_VL,
220 VECREDUCE_FMAX_VL,
221 VECREDUCE_FMIN_VL,
222 VECREDUCE_OR_VL,
223 VECREDUCE_SEQ_FADD_VL,
224 VECREDUCE_SMAX_VL,
225 VECREDUCE_SMIN_VL,
226 VECREDUCE_UMAX_VL,
227 VECREDUCE_UMIN_VL,
228 VECREDUCE_XOR_VL,
229 VFCVT_RM_F_XU_VL,
230 VFCVT_RM_F_X_VL,
231 VFCVT_RM_XU_F_VL,
232 VFCVT_RM_X_F_VL,
233 VFCVT_RTZ_XU_F_VL,
234 VFCVT_RTZ_X_F_VL,
235 VFIRST_VL,
236 VFMADD_VL,
237 VFMAX_VL,
238 VFMIN_VL,
239 VFMSUB_VL,
240 VFMV_S_F_VL,
241 VFMV_V_F_VL,
242 VFNCVT_ROD_VL,
243 VFNMADD_VL,
244 VFNMSUB_VL,
245 VFROUND_NOEXCEPT_VL,
246 VFSLIDE1DOWN_VL,
247 VFSLIDE1UP_VL,
248 VFWADD_VL,
249 VFWADD_W_VL,
250 VFWMADD_VL,
251 VFWMSUB_VL,
252 VFWMUL_VL,
253 VFWNMADD_VL,
254 VFWNMSUB_VL,
255 VFWSUB_VL,
256 VFWSUB_W_VL,
257 VID_VL,
258 VMAND_VL,
259 VMCLR_VL,
260 VMERGE_VL,
261 VMOR_VL,
262 VMSET_VL,
263 VMV_S_X_VL,
264 VMV_V_V_VL,
265 VMV_V_X_VL,
266 VMV_X_S,
267 VMXOR_VL,
268 VQDOTSU_VL,
269 VQDOTU_VL,
270 VQDOT_VL,
271 VRGATHEREI16_VV_VL,
272 VRGATHER_VV_VL,
273 VRGATHER_VX_VL,
274 VSEXT_VL,
275 VSLIDE1DOWN_VL,
276 VSLIDE1UP_VL,
277 VSLIDEDOWN_VL,
278 VSLIDEUP_VL,
279 VWADDU_VL,
280 VWADDU_W_VL,
281 VWADD_VL,
282 VWADD_W_VL,
283 VWMACCSU_VL,
284 VWMACCU_VL,
285 VWMACC_VL,
286 VWMULSU_VL,
287 VWMULU_VL,
288 VWMUL_VL,
289 VWSLL_VL,
290 VWSUBU_VL,
291 VWSUBU_W_VL,
292 VWSUB_VL,
293 VWSUB_W_VL,
294 VZEXT_VL,
295 WRITE_CSR,
296 XOR_VL,
297 ZIP,
298};
299
300static constexpr unsigned GENERATED_OPCODE_END = ZIP + 1;
301
302} // namespace llvm::RISCVISD
303
304#endif // GET_SDNODE_ENUM
305
306#ifdef GET_SDNODE_DESC
307#undef GET_SDNODE_DESC
308
309namespace llvm {
310
311
312#ifdef __GNUC__
313#pragma GCC diagnostic push
314#pragma GCC diagnostic ignored "-Woverlength-strings"
315#endif
316static constexpr char RISCVSDNodeNamesStorage[] =
317 "\0"
318 "RISCVISD::ABSW\0"
319 "RISCVISD::ADD_LO\0"
320 "RISCVISD::ADD_TPREL\0"
321 "RISCVISD::ADD_VL\0"
322 "RISCVISD::AND_VL\0"
323 "RISCVISD::AVGCEILS_VL\0"
324 "RISCVISD::AVGCEILU_VL\0"
325 "RISCVISD::AVGFLOORS_VL\0"
326 "RISCVISD::AVGFLOORU_VL\0"
327 "RISCVISD::BITREVERSE_VL\0"
328 "RISCVISD::BREV8\0"
329 "RISCVISD::BR_CC\0"
330 "RISCVISD::BSWAP_VL\0"
331 "RISCVISD::BuildGPRPair\0"
332 "RISCVISD::BuildPairF64\0"
333 "RISCVISD::CALL\0"
334 "RISCVISD::CLEAR_CSR\0"
335 "RISCVISD::CLSW\0"
336 "RISCVISD::CLZW\0"
337 "RISCVISD::CTLZ_VL\0"
338 "RISCVISD::CTPOP_VL\0"
339 "RISCVISD::CTTZ_VL\0"
340 "RISCVISD::CTZW\0"
341 "RISCVISD::CZERO_EQZ\0"
342 "RISCVISD::CZERO_NEZ\0"
343 "RISCVISD::DIVUW\0"
344 "RISCVISD::DIVW\0"
345 "RISCVISD::FABS_VL\0"
346 "RISCVISD::FADD_VL\0"
347 "RISCVISD::FCLASS\0"
348 "RISCVISD::FCLASS_VL\0"
349 "RISCVISD::FCOPYSIGN_VL\0"
350 "RISCVISD::FCVT_WU_RV64\0"
351 "RISCVISD::FCVT_W_RV64\0"
352 "RISCVISD::FCVT_X\0"
353 "RISCVISD::FCVT_XU\0"
354 "RISCVISD::FDIV_VL\0"
355 "RISCVISD::FLI\0"
356 "RISCVISD::FMAX\0"
357 "RISCVISD::FMIN\0"
358 "RISCVISD::FMUL_VL\0"
359 "RISCVISD::FMV_H_X\0"
360 "RISCVISD::FMV_W_X_RV64\0"
361 "RISCVISD::FMV_X_ANYEXTH\0"
362 "RISCVISD::FMV_X_ANYEXTW_RV64\0"
363 "RISCVISD::FMV_X_SIGNEXTH\0"
364 "RISCVISD::FNEG_VL\0"
365 "RISCVISD::FP_EXTEND_VL\0"
366 "RISCVISD::FP_ROUND_VL\0"
367 "RISCVISD::FROUND\0"
368 "RISCVISD::FSGNJX\0"
369 "RISCVISD::FSQRT_VL\0"
370 "RISCVISD::FSUB_VL\0"
371 "RISCVISD::HI\0"
372 "RISCVISD::LD_RV32\0"
373 "RISCVISD::LLA\0"
374 "RISCVISD::MNRET_GLUE\0"
375 "RISCVISD::MOP_R\0"
376 "RISCVISD::MOP_RR\0"
377 "RISCVISD::MRET_GLUE\0"
378 "RISCVISD::MULHSU\0"
379 "RISCVISD::MULHS_VL\0"
380 "RISCVISD::MULHU_VL\0"
381 "RISCVISD::MUL_VL\0"
382 "RISCVISD::NDS_FMV_BF16_X\0"
383 "RISCVISD::NDS_FMV_X_ANYEXTBF16\0"
384 "RISCVISD::NEGW_MAX\0"
385 "RISCVISD::ORC_B\0"
386 "RISCVISD::OR_VL\0"
387 "RISCVISD::PASUB\0"
388 "RISCVISD::PASUBU\0"
389 "RISCVISD::PMULHR\0"
390 "RISCVISD::PMULHRSU\0"
391 "RISCVISD::PMULHRU\0"
392 "RISCVISD::PMULHSU\0"
393 "RISCVISD::PPACK_DH\0"
394 "RISCVISD::PROBED_ALLOCA\0"
395 "RISCVISD::QC_C_MILEAVERET_GLUE\0"
396 "RISCVISD::QC_E_LI\0"
397 "RISCVISD::QC_INSB\0"
398 "RISCVISD::QC_SETWMI\0"
399 "RISCVISD::READ_COUNTER_WIDE\0"
400 "RISCVISD::READ_CSR\0"
401 "RISCVISD::READ_VLENB\0"
402 "RISCVISD::REMUW\0"
403 "RISCVISD::RET_GLUE\0"
404 "RISCVISD::RI_VEXTRACT\0"
405 "RISCVISD::RI_VINSERT_VL\0"
406 "RISCVISD::RI_VUNZIP2A_VL\0"
407 "RISCVISD::RI_VUNZIP2B_VL\0"
408 "RISCVISD::RI_VZIP2A_VL\0"
409 "RISCVISD::RI_VZIP2B_VL\0"
410 "RISCVISD::RI_VZIPEVEN_VL\0"
411 "RISCVISD::RI_VZIPODD_VL\0"
412 "RISCVISD::ROLW\0"
413 "RISCVISD::RORW\0"
414 "RISCVISD::ROTL_VL\0"
415 "RISCVISD::ROTR_VL\0"
416 "RISCVISD::SADDSAT_VL\0"
417 "RISCVISD::SDIV_VL\0"
418 "RISCVISD::SD_RV32\0"
419 "RISCVISD::SELECT_CC\0"
420 "RISCVISD::SETCC_VL\0"
421 "RISCVISD::SET_CSR\0"
422 "RISCVISD::SF_VC_FVV_SE\0"
423 "RISCVISD::SF_VC_FVW_SE\0"
424 "RISCVISD::SF_VC_FV_SE\0"
425 "RISCVISD::SF_VC_IVV_SE\0"
426 "RISCVISD::SF_VC_IVW_SE\0"
427 "RISCVISD::SF_VC_IV_SE\0"
428 "RISCVISD::SF_VC_VVV_SE\0"
429 "RISCVISD::SF_VC_VVW_SE\0"
430 "RISCVISD::SF_VC_VV_SE\0"
431 "RISCVISD::SF_VC_V_FVV_SE\0"
432 "RISCVISD::SF_VC_V_FVW_SE\0"
433 "RISCVISD::SF_VC_V_FV_SE\0"
434 "RISCVISD::SF_VC_V_IVV_SE\0"
435 "RISCVISD::SF_VC_V_IVW_SE\0"
436 "RISCVISD::SF_VC_V_IV_SE\0"
437 "RISCVISD::SF_VC_V_I_SE\0"
438 "RISCVISD::SF_VC_V_VVV_SE\0"
439 "RISCVISD::SF_VC_V_VVW_SE\0"
440 "RISCVISD::SF_VC_V_VV_SE\0"
441 "RISCVISD::SF_VC_V_XVV_SE\0"
442 "RISCVISD::SF_VC_V_XVW_SE\0"
443 "RISCVISD::SF_VC_V_XV_SE\0"
444 "RISCVISD::SF_VC_V_X_SE\0"
445 "RISCVISD::SF_VC_XVV_SE\0"
446 "RISCVISD::SF_VC_XVW_SE\0"
447 "RISCVISD::SF_VC_XV_SE\0"
448 "RISCVISD::SHA256SIG0\0"
449 "RISCVISD::SHA256SIG1\0"
450 "RISCVISD::SHA256SUM0\0"
451 "RISCVISD::SHA256SUM1\0"
452 "RISCVISD::SHL_ADD\0"
453 "RISCVISD::SHL_VL\0"
454 "RISCVISD::SINT_TO_FP_VL\0"
455 "RISCVISD::SLLW\0"
456 "RISCVISD::SM3P0\0"
457 "RISCVISD::SM3P1\0"
458 "RISCVISD::SM4ED\0"
459 "RISCVISD::SM4KS\0"
460 "RISCVISD::SMAX_VL\0"
461 "RISCVISD::SMIN_VL\0"
462 "RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL\0"
463 "RISCVISD::SRAW\0"
464 "RISCVISD::SRA_VL\0"
465 "RISCVISD::SREM_VL\0"
466 "RISCVISD::SRET_GLUE\0"
467 "RISCVISD::SRLW\0"
468 "RISCVISD::SRL_VL\0"
469 "RISCVISD::SSUBSAT_VL\0"
470 "RISCVISD::STRICT_FADD_VL\0"
471 "RISCVISD::STRICT_FCVT_WU_RV64\0"
472 "RISCVISD::STRICT_FCVT_W_RV64\0"
473 "RISCVISD::STRICT_FDIV_VL\0"
474 "RISCVISD::STRICT_FMUL_VL\0"
475 "RISCVISD::STRICT_FP_EXTEND_VL\0"
476 "RISCVISD::STRICT_FP_ROUND_VL\0"
477 "RISCVISD::STRICT_FSETCCS_VL\0"
478 "RISCVISD::STRICT_FSETCC_VL\0"
479 "RISCVISD::STRICT_FSQRT_VL\0"
480 "RISCVISD::STRICT_FSUB_VL\0"
481 "RISCVISD::STRICT_SINT_TO_FP_VL\0"
482 "RISCVISD::STRICT_UINT_TO_FP_VL\0"
483 "RISCVISD::STRICT_VFCVT_RM_X_F_VL\0"
484 "RISCVISD::STRICT_VFCVT_RTZ_XU_F_VL\0"
485 "RISCVISD::STRICT_VFCVT_RTZ_X_F_VL\0"
486 "RISCVISD::STRICT_VFMADD_VL\0"
487 "RISCVISD::STRICT_VFMSUB_VL\0"
488 "RISCVISD::STRICT_VFNCVT_ROD_VL\0"
489 "RISCVISD::STRICT_VFNMADD_VL\0"
490 "RISCVISD::STRICT_VFNMSUB_VL\0"
491 "RISCVISD::STRICT_VFROUND_NOEXCEPT_VL\0"
492 "RISCVISD::SUB_VL\0"
493 "RISCVISD::SWAP_CSR\0"
494 "RISCVISD::SW_GUARDED_BRIND\0"
495 "RISCVISD::SW_GUARDED_CALL\0"
496 "RISCVISD::SW_GUARDED_TAIL\0"
497 "RISCVISD::SplitF64\0"
498 "RISCVISD::SplitGPRPair\0"
499 "RISCVISD::TAIL\0"
500 "RISCVISD::TH_LDD\0"
501 "RISCVISD::TH_LWD\0"
502 "RISCVISD::TH_LWUD\0"
503 "RISCVISD::TH_SDD\0"
504 "RISCVISD::TH_SWD\0"
505 "RISCVISD::TRUNCATE_VECTOR_VL\0"
506 "RISCVISD::TRUNCATE_VECTOR_VL_SSAT\0"
507 "RISCVISD::TRUNCATE_VECTOR_VL_USAT\0"
508 "RISCVISD::TUPLE_EXTRACT\0"
509 "RISCVISD::TUPLE_INSERT\0"
510 "RISCVISD::UADDSAT_VL\0"
511 "RISCVISD::UDIV_VL\0"
512 "RISCVISD::UINT_TO_FP_VL\0"
513 "RISCVISD::UMAX_VL\0"
514 "RISCVISD::UMIN_VL\0"
515 "RISCVISD::UNZIP\0"
516 "RISCVISD::UREM_VL\0"
517 "RISCVISD::USUBSAT_VL\0"
518 "RISCVISD::VCPOP_VL\0"
519 "RISCVISD::VECREDUCE_ADD_VL\0"
520 "RISCVISD::VECREDUCE_AND_VL\0"
521 "RISCVISD::VECREDUCE_FADD_VL\0"
522 "RISCVISD::VECREDUCE_FMAX_VL\0"
523 "RISCVISD::VECREDUCE_FMIN_VL\0"
524 "RISCVISD::VECREDUCE_OR_VL\0"
525 "RISCVISD::VECREDUCE_SEQ_FADD_VL\0"
526 "RISCVISD::VECREDUCE_SMAX_VL\0"
527 "RISCVISD::VECREDUCE_SMIN_VL\0"
528 "RISCVISD::VECREDUCE_UMAX_VL\0"
529 "RISCVISD::VECREDUCE_UMIN_VL\0"
530 "RISCVISD::VECREDUCE_XOR_VL\0"
531 "RISCVISD::VFCVT_RM_F_XU_VL\0"
532 "RISCVISD::VFCVT_RM_F_X_VL\0"
533 "RISCVISD::VFCVT_RM_XU_F_VL\0"
534 "RISCVISD::VFCVT_RM_X_F_VL\0"
535 "RISCVISD::VFCVT_RTZ_XU_F_VL\0"
536 "RISCVISD::VFCVT_RTZ_X_F_VL\0"
537 "RISCVISD::VFIRST_VL\0"
538 "RISCVISD::VFMADD_VL\0"
539 "RISCVISD::VFMAX_VL\0"
540 "RISCVISD::VFMIN_VL\0"
541 "RISCVISD::VFMSUB_VL\0"
542 "RISCVISD::VFMV_S_F_VL\0"
543 "RISCVISD::VFMV_V_F_VL\0"
544 "RISCVISD::VFNCVT_ROD_VL\0"
545 "RISCVISD::VFNMADD_VL\0"
546 "RISCVISD::VFNMSUB_VL\0"
547 "RISCVISD::VFROUND_NOEXCEPT_VL\0"
548 "RISCVISD::VFSLIDE1DOWN_VL\0"
549 "RISCVISD::VFSLIDE1UP_VL\0"
550 "RISCVISD::VFWADD_VL\0"
551 "RISCVISD::VFWADD_W_VL\0"
552 "RISCVISD::VFWMADD_VL\0"
553 "RISCVISD::VFWMSUB_VL\0"
554 "RISCVISD::VFWMUL_VL\0"
555 "RISCVISD::VFWNMADD_VL\0"
556 "RISCVISD::VFWNMSUB_VL\0"
557 "RISCVISD::VFWSUB_VL\0"
558 "RISCVISD::VFWSUB_W_VL\0"
559 "RISCVISD::VID_VL\0"
560 "RISCVISD::VMAND_VL\0"
561 "RISCVISD::VMCLR_VL\0"
562 "RISCVISD::VMERGE_VL\0"
563 "RISCVISD::VMOR_VL\0"
564 "RISCVISD::VMSET_VL\0"
565 "RISCVISD::VMV_S_X_VL\0"
566 "RISCVISD::VMV_V_V_VL\0"
567 "RISCVISD::VMV_V_X_VL\0"
568 "RISCVISD::VMV_X_S\0"
569 "RISCVISD::VMXOR_VL\0"
570 "RISCVISD::VQDOTSU_VL\0"
571 "RISCVISD::VQDOTU_VL\0"
572 "RISCVISD::VQDOT_VL\0"
573 "RISCVISD::VRGATHEREI16_VV_VL\0"
574 "RISCVISD::VRGATHER_VV_VL\0"
575 "RISCVISD::VRGATHER_VX_VL\0"
576 "RISCVISD::VSEXT_VL\0"
577 "RISCVISD::VSLIDE1DOWN_VL\0"
578 "RISCVISD::VSLIDE1UP_VL\0"
579 "RISCVISD::VSLIDEDOWN_VL\0"
580 "RISCVISD::VSLIDEUP_VL\0"
581 "RISCVISD::VWADDU_VL\0"
582 "RISCVISD::VWADDU_W_VL\0"
583 "RISCVISD::VWADD_VL\0"
584 "RISCVISD::VWADD_W_VL\0"
585 "RISCVISD::VWMACCSU_VL\0"
586 "RISCVISD::VWMACCU_VL\0"
587 "RISCVISD::VWMACC_VL\0"
588 "RISCVISD::VWMULSU_VL\0"
589 "RISCVISD::VWMULU_VL\0"
590 "RISCVISD::VWMUL_VL\0"
591 "RISCVISD::VWSLL_VL\0"
592 "RISCVISD::VWSUBU_VL\0"
593 "RISCVISD::VWSUBU_W_VL\0"
594 "RISCVISD::VWSUB_VL\0"
595 "RISCVISD::VWSUB_W_VL\0"
596 "RISCVISD::VZEXT_VL\0"
597 "RISCVISD::WRITE_CSR\0"
598 "RISCVISD::XOR_VL\0"
599 "RISCVISD::ZIP\0"
600 ;
601#ifdef __GNUC__
602#pragma GCC diagnostic pop
603#endif
604
605static constexpr llvm::StringTable
606RISCVSDNodeNames = RISCVSDNodeNamesStorage;
607
608static const VTByHwModePair RISCVVTByHwModeTable[] = {
609 /* 0 */ {0, MVT::i32}, {1, MVT::i64},
610};
611
612static const SDTypeConstraint RISCVSDTypeConstraints[] = {
613 /* 0 */ {SDTCisVT, 2, 0, 0, MVT::f64}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
614 /* 3 */ {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
615 /* 6 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
616 /* 10 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
617 /* 14 */ {SDTCisVT, 2, 0, 0, MVT::Untyped}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
618 /* 17 */ {SDTCisVT, 1, 0, 0, MVT::bf16}, {SDTCisVT, 0, 0, 2, 0},
619 /* 19 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
620 /* 22 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
621 /* 28 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
622 /* 32 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
623 /* 36 */ {SDTCisVT, 1, 0, 0, MVT::f32}, {SDTCisVT, 0, 0, 0, MVT::i64},
624 /* 38 */ {SDTCisVT, 2, 0, 0, MVT::i64}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i64},
625 /* 41 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::bf16},
626 /* 43 */ {SDTCisVT, 1, 0, 0, MVT::i64}, {SDTCisVT, 0, 0, 0, MVT::f32},
627 /* 45 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::f64},
628 /* 48 */ {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 0, MVT::v4i8}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::v2i16},
629 /* 54 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::Untyped},
630 /* 57 */ {SDTCisPtrTy, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
631 /* 58 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
632 /* 67 */ {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
633 /* 71 */ {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
634 /* 74 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
635 /* 81 */ {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
636 /* 84 */ {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
637 /* 88 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
638 /* 92 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
639 /* 94 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
640 /* 101 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
641 /* 108 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
642 /* 115 */ {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
643 /* 119 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
644 /* 124 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
645 /* 134 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
646 /* 144 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
647 /* 154 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
648 /* 159 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
649 /* 169 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
650 /* 180 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
651 /* 184 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
652 /* 191 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
653 /* 200 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i16}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
654 /* 209 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i64}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
655 /* 215 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
656 /* 220 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
657 /* 225 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
658 /* 230 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
659 /* 234 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
660 /* 239 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
661 /* 244 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
662 /* 252 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 2, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
663 /* 260 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
664 /* 268 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisEltOfVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
665 /* 276 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
666 /* 284 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
667 /* 288 */ {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
668 /* 290 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
669 /* 292 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
670 /* 297 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
671 /* 301 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
672 /* 307 */ {SDTCisInt, 4, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
673 /* 312 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
674 /* 315 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
675 /* 318 */ {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
676 /* 321 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
677 /* 329 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 3, 0, 0, MVT::i1}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
678 /* 336 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
679 /* 344 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
680 /* 348 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
681 /* 356 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
682 /* 360 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
683 /* 365 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
684 /* 369 */ {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisVT, 2, 0, 0, MVT::Other}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
685 /* 372 */ {SDTCisVT, 0, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
686 /* 376 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1},
687 /* 378 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1},
688 /* 386 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
689 /* 389 */ {SDTCisSameAs, 4, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
690};
691
692static const SDNodeDesc RISCVSDNodeDescs[] = {
693 {1, 1, 0, 0, 0, 1, 290, 2}, // ABSW
694 {1, 2, 0, 0, 0, 16, 315, 3}, // ADD_LO
695 {1, 3, 0, 0, 0, 33, 344, 4}, // ADD_TPREL
696 {1, 5, 0, 0, 3, 53, 321, 8}, // ADD_VL
697 {1, 5, 0, 0, 3, 70, 321, 8}, // AND_VL
698 {1, 5, 0, 0, 3, 87, 321, 8}, // AVGCEILS_VL
699 {1, 5, 0, 0, 3, 109, 321, 8}, // AVGCEILU_VL
700 {1, 5, 0, 0, 3, 131, 321, 8}, // AVGFLOORS_VL
701 {1, 5, 0, 0, 3, 154, 321, 8}, // AVGFLOORU_VL
702 {1, 4, 0, 0, 3, 177, 329, 7}, // BITREVERSE_VL
703 {1, 1, 0, 0, 0, 201, 295, 2}, // BREV8
704 {0, 4, 0|1<<SDNPHasChain, 0, 0, 217, 369, 3}, // BR_CC
705 {1, 4, 0, 0, 3, 233, 329, 7}, // BSWAP_VL
706 {1, 2, 0, 0, 0, 252, 54, 3}, // BuildGPRPair
707 {1, 2, 0, 0, 0, 275, 45, 3}, // BuildPairF64
708 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 298, 13, 1}, // CALL
709 {0, 2, 0|1<<SDNPHasChain, 0, 0, 313, 72, 2}, // CLEAR_CSR
710 {1, 1, 0, 0, 0, 333, 290, 2}, // CLSW
711 {1, 1, 0, 0, 0, 348, 290, 2}, // CLZW
712 {1, 4, 0, 0, 3, 363, 329, 7}, // CTLZ_VL
713 {1, 4, 0, 0, 3, 381, 329, 7}, // CTPOP_VL
714 {1, 4, 0, 0, 3, 400, 329, 7}, // CTTZ_VL
715 {1, 1, 0, 0, 0, 418, 290, 2}, // CTZW
716 {1, 2, 0, 0, 0, 433, 315, 3}, // CZERO_EQZ
717 {1, 2, 0, 0, 0, 453, 315, 3}, // CZERO_NEZ
718 {1, 2, 0, 0, 0, 473, 312, 3}, // DIVUW
719 {1, 2, 0, 0, 0, 489, 312, 3}, // DIVW
720 {1, 3, 0, 0, 2, 504, 301, 6}, // FABS_VL
721 {1, 5, 0, 0, 3, 522, 336, 8}, // FADD_VL
722 {1, 1, 0, 0, 0, 540, 20, 2}, // FCLASS
723 {1, 3, 0, 0, 2, 557, 58, 9}, // FCLASS_VL
724 {1, 5, 0, 0, 3, 577, 336, 8}, // FCOPYSIGN_VL
725 {1, 2, 0, 0, 0, 600, 38, 3}, // FCVT_WU_RV64
726 {1, 2, 0, 0, 0, 623, 38, 3}, // FCVT_W_RV64
727 {1, 2, 0, 0, 0, 645, 19, 3}, // FCVT_X
728 {1, 2, 0, 0, 0, 662, 19, 3}, // FCVT_XU
729 {1, 5, 0, 0, 3, 680, 336, 8}, // FDIV_VL
730 {1, 1, 0, 0, 0, 698, 92, 2}, // FLI
731 {1, 2, 0, 0, 0, 712, 318, 3}, // FMAX
732 {1, 2, 0, 0, 0, 727, 318, 3}, // FMIN
733 {1, 5, 0, 0, 3, 742, 336, 8}, // FMUL_VL
734 {1, 1, 0, 0, 0, 760, 92, 2}, // FMV_H_X
735 {1, 1, 0, 0, 0, 778, 43, 2}, // FMV_W_X_RV64
736 {1, 1, 0, 0, 0, 801, 20, 2}, // FMV_X_ANYEXTH
737 {1, 1, 0, 0, 0, 825, 36, 2}, // FMV_X_ANYEXTW_RV64
738 {1, 1, 0, 0, 0, 854, 20, 2}, // FMV_X_SIGNEXTH
739 {1, 3, 0, 0, 2, 879, 301, 6}, // FNEG_VL
740 {1, 3, 0, 0, 2, 897, 108, 7}, // FP_EXTEND_VL
741 {1, 3, 0, 0, 2, 920, 101, 7}, // FP_ROUND_VL
742 {1, 3, 0, 0, 0, 942, 88, 4}, // FROUND
743 {1, 2, 0, 0, 0, 959, 89, 3}, // FSGNJX
744 {1, 3, 0, 0, 2, 976, 301, 6}, // FSQRT_VL
745 {1, 5, 0, 0, 3, 995, 336, 8}, // FSUB_VL
746 {1, 1, 0, 0, 0, 1013, 295, 2}, // HI
747 {2, 1, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1026, 3, 3}, // LD_RV32
748 {1, 1, 0, 0, 0, 1044, 295, 2}, // LLA
749 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1058, 0, 0}, // MNRET_GLUE
750 {1, 2, 0, 0, 0, 1079, 68, 3}, // MOP_R
751 {1, 3, 0, 0, 0, 1095, 67, 4}, // MOP_RR
752 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1112, 0, 0}, // MRET_GLUE
753 {1, 2, 0, 0, 0, 1132, 315, 3}, // MULHSU
754 {1, 5, 0, 0, 3, 1149, 321, 8}, // MULHS_VL
755 {1, 5, 0, 0, 3, 1168, 321, 8}, // MULHU_VL
756 {1, 5, 0, 0, 3, 1187, 321, 8}, // MUL_VL
757 {1, 1, 0, 0, 0, 1204, 41, 2}, // NDS_FMV_BF16_X
758 {1, 1, 0, 0, 0, 1229, 17, 2}, // NDS_FMV_X_ANYEXTBF16
759 {1, 1, 0, 0, 0, 1260, 295, 2}, // NEGW_MAX
760 {1, 1, 0, 0, 0, 1279, 295, 2}, // ORC_B
761 {1, 5, 0, 0, 3, 1295, 321, 8}, // OR_VL
762 {1, 2, 0, 0, 0, 1311, 115, 4}, // PASUB
763 {1, 2, 0, 0, 0, 1327, 115, 4}, // PASUBU
764 {1, 2, 0, 0, 0, 1344, 115, 4}, // PMULHR
765 {1, 2, 0, 0, 0, 1361, 115, 4}, // PMULHRSU
766 {1, 2, 0, 0, 0, 1380, 115, 4}, // PMULHRU
767 {1, 2, 0, 0, 0, 1398, 115, 4}, // PMULHSU
768 {2, 4, 0, 0, 0, 1416, 48, 6}, // PPACK_DH
769 {0, 1, 0|1<<SDNPHasChain, 0, 0, 1435, 57, 1}, // PROBED_ALLOCA
770 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1459, 0, 0}, // QC_C_MILEAVERET_GLUE
771 {1, 1, 0, 0, 0, 1490, 295, 2}, // QC_E_LI
772 {1, 4, 0, 0, 0, 1508, 307, 5}, // QC_INSB
773 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1526, 365, 4}, // QC_SETWMI
774 {2, 2, 0|1<<SDNPHasChain, 0, 0, 1546, 6, 4}, // READ_COUNTER_WIDE
775 {1, 1, 0|1<<SDNPHasChain, 0, 0, 1574, 72, 2}, // READ_CSR
776 {1, 0, 0, 0, 0, 1593, 13, 1}, // READ_VLENB
777 {1, 2, 0, 0, 0, 1614, 312, 3}, // REMUW
778 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1630, 0, 0}, // RET_GLUE
779 {1, 2, 0, 0, 0, 1649, 84, 4}, // RI_VEXTRACT
780 {1, 5, 0, 0, 0, 1671, 292, 5}, // RI_VINSERT_VL
781 {1, 5, 0, 0, 2, 1695, 321, 8}, // RI_VUNZIP2A_VL
782 {1, 5, 0, 0, 2, 1720, 321, 8}, // RI_VUNZIP2B_VL
783 {1, 5, 0, 0, 2, 1745, 321, 8}, // RI_VZIP2A_VL
784 {1, 5, 0, 0, 2, 1768, 321, 8}, // RI_VZIP2B_VL
785 {1, 5, 0, 0, 2, 1791, 321, 8}, // RI_VZIPEVEN_VL
786 {1, 5, 0, 0, 2, 1816, 321, 8}, // RI_VZIPODD_VL
787 {1, 2, 0, 0, 0, 1840, 312, 3}, // ROLW
788 {1, 2, 0, 0, 0, 1855, 312, 3}, // RORW
789 {1, 5, 0, 0, 3, 1870, 321, 8}, // ROTL_VL
790 {1, 5, 0, 0, 3, 1888, 321, 8}, // ROTR_VL
791 {1, 5, 0, 0, 3, 1906, 321, 8}, // SADDSAT_VL
792 {1, 5, 0, 0, 3, 1927, 321, 8}, // SDIV_VL
793 {0, 3, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1945, 3, 3}, // SD_RV32
794 {1, 5, 0, 0, 0, 1963, 389, 4}, // SELECT_CC
795 {1, 6, 0, 0, 3, 1983, 378, 8}, // SETCC_VL
796 {0, 2, 0|1<<SDNPHasChain, 0, 0, 2002, 72, 2}, // SET_CSR
797 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2020, 28, 4}, // SF_VC_FVV_SE
798 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2043, 32, 4}, // SF_VC_FVW_SE
799 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2066, 372, 4}, // SF_VC_FV_SE
800 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2088, 28, 4}, // SF_VC_IVV_SE
801 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2111, 32, 4}, // SF_VC_IVW_SE
802 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2134, 372, 4}, // SF_VC_IV_SE
803 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2156, 28, 4}, // SF_VC_VVV_SE
804 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2179, 32, 4}, // SF_VC_VVW_SE
805 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2202, 372, 4}, // SF_VC_VV_SE
806 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2224, 225, 5}, // SF_VC_V_FVV_SE
807 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2249, 234, 5}, // SF_VC_V_FVW_SE
808 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2274, 230, 4}, // SF_VC_V_FV_SE
809 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2298, 225, 5}, // SF_VC_V_IVV_SE
810 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2323, 234, 5}, // SF_VC_V_IVW_SE
811 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2348, 230, 4}, // SF_VC_V_IV_SE
812 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2372, 239, 5}, // SF_VC_V_I_SE
813 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2395, 225, 5}, // SF_VC_V_VVV_SE
814 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2420, 234, 5}, // SF_VC_V_VVW_SE
815 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2445, 230, 4}, // SF_VC_V_VV_SE
816 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2469, 225, 5}, // SF_VC_V_XVV_SE
817 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2494, 234, 5}, // SF_VC_V_XVW_SE
818 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2519, 230, 4}, // SF_VC_V_XV_SE
819 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2543, 239, 5}, // SF_VC_V_X_SE
820 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2566, 28, 4}, // SF_VC_XVV_SE
821 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2589, 32, 4}, // SF_VC_XVW_SE
822 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2612, 372, 4}, // SF_VC_XV_SE
823 {1, 1, 0, 0, 0, 2634, 295, 2}, // SHA256SIG0
824 {1, 1, 0, 0, 0, 2655, 295, 2}, // SHA256SIG1
825 {1, 1, 0, 0, 0, 2676, 295, 2}, // SHA256SUM0
826 {1, 1, 0, 0, 0, 2697, 295, 2}, // SHA256SUM1
827 {1, 3, 0, 0, 0, 2718, 360, 5}, // SHL_ADD
828 {1, 5, 0, 0, 3, 2736, 321, 8}, // SHL_VL
829 {1, 3, 0, 0, 2, 2753, 95, 6}, // SINT_TO_FP_VL
830 {1, 2, 0, 0, 0, 2777, 312, 3}, // SLLW
831 {1, 1, 0, 0, 0, 2792, 295, 2}, // SM3P0
832 {1, 1, 0, 0, 0, 2808, 295, 2}, // SM3P1
833 {1, 3, 0, 0, 0, 2824, 10, 4}, // SM4ED
834 {1, 3, 0, 0, 0, 2840, 10, 4}, // SM4KS
835 {1, 5, 0, 0, 3, 2856, 321, 8}, // SMAX_VL
836 {1, 5, 0, 0, 3, 2874, 321, 8}, // SMIN_VL
837 {1, 4, 0, 0, 0, 2892, 209, 6}, // SPLAT_VECTOR_SPLIT_I64_VL
838 {1, 2, 0, 0, 0, 2928, 312, 3}, // SRAW
839 {1, 5, 0, 0, 3, 2943, 321, 8}, // SRA_VL
840 {1, 5, 0, 0, 3, 2960, 321, 8}, // SREM_VL
841 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 2978, 0, 0}, // SRET_GLUE
842 {1, 2, 0, 0, 0, 2998, 312, 3}, // SRLW
843 {1, 5, 0, 0, 3, 3013, 321, 8}, // SRL_VL
844 {1, 5, 0, 0, 3, 3030, 321, 8}, // SSUBSAT_VL
845 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3051, 336, 8}, // STRICT_FADD_VL
846 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 3076, 38, 3}, // STRICT_FCVT_WU_RV64
847 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 3106, 38, 3}, // STRICT_FCVT_W_RV64
848 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3135, 336, 8}, // STRICT_FDIV_VL
849 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3160, 336, 8}, // STRICT_FMUL_VL
850 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3185, 108, 7}, // STRICT_FP_EXTEND_VL
851 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3215, 101, 7}, // STRICT_FP_ROUND_VL
852 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3244, 378, 8}, // STRICT_FSETCCS_VL
853 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3272, 378, 8}, // STRICT_FSETCC_VL
854 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3299, 301, 6}, // STRICT_FSQRT_VL
855 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3325, 336, 8}, // STRICT_FSUB_VL
856 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3350, 95, 6}, // STRICT_SINT_TO_FP_VL
857 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3381, 95, 6}, // STRICT_UINT_TO_FP_VL
858 {1, 4, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3412, 74, 7}, // STRICT_VFCVT_RM_X_F_VL
859 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3445, 75, 6}, // STRICT_VFCVT_RTZ_XU_F_VL
860 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3480, 75, 6}, // STRICT_VFCVT_RTZ_X_F_VL
861 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3514, 348, 8}, // STRICT_VFMADD_VL
862 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3541, 348, 8}, // STRICT_VFMSUB_VL
863 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3568, 101, 7}, // STRICT_VFNCVT_ROD_VL
864 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3599, 348, 8}, // STRICT_VFNMADD_VL
865 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3627, 348, 8}, // STRICT_VFNMSUB_VL
866 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3655, 301, 6}, // STRICT_VFROUND_NOEXCEPT_VL
867 {1, 5, 0, 0, 3, 3692, 321, 8}, // SUB_VL
868 {1, 2, 0|1<<SDNPHasChain, 0, 0, 3709, 71, 3}, // SWAP_CSR
869 {0, 1, 0|1<<SDNPHasChain, 0, 0, 3728, 57, 1}, // SW_GUARDED_BRIND
870 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 3755, 13, 1}, // SW_GUARDED_CALL
871 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 3781, 13, 1}, // SW_GUARDED_TAIL
872 {2, 1, 0, 0, 0, 3807, 0, 3}, // SplitF64
873 {2, 1, 0, 0, 0, 3826, 14, 3}, // SplitGPRPair
874 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 3849, 13, 1}, // TAIL
875 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 3864, 365, 4}, // TH_LDD
876 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 3881, 365, 4}, // TH_LWD
877 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 3898, 365, 4}, // TH_LWUD
878 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 3916, 365, 4}, // TH_SDD
879 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 3933, 365, 4}, // TH_SWD
880 {1, 3, 0, 0, 2, 3950, 215, 5}, // TRUNCATE_VECTOR_VL
881 {1, 3, 0, 0, 2, 3979, 215, 5}, // TRUNCATE_VECTOR_VL_SSAT
882 {1, 3, 0, 0, 2, 4013, 215, 5}, // TRUNCATE_VECTOR_VL_USAT
883 {1, 2, 0, 0, 0, 4047, 288, 2}, // TUPLE_EXTRACT
884 {1, 3, 0, 0, 0, 4071, 386, 3}, // TUPLE_INSERT
885 {1, 5, 0, 0, 3, 4094, 321, 8}, // UADDSAT_VL
886 {1, 5, 0, 0, 3, 4115, 321, 8}, // UDIV_VL
887 {1, 3, 0, 0, 2, 4133, 95, 6}, // UINT_TO_FP_VL
888 {1, 5, 0, 0, 3, 4157, 321, 8}, // UMAX_VL
889 {1, 5, 0, 0, 3, 4175, 321, 8}, // UMIN_VL
890 {1, 1, 0, 0, 0, 4193, 295, 2}, // UNZIP
891 {1, 5, 0, 0, 3, 4209, 321, 8}, // UREM_VL
892 {1, 5, 0, 0, 3, 4227, 321, 8}, // USUBSAT_VL
893 {1, 3, 0, 0, 2, 4248, 22, 6}, // VCPOP_VL
894 {1, 6, 0, 0, 2, 4267, 252, 8}, // VECREDUCE_ADD_VL
895 {1, 6, 0, 0, 2, 4294, 252, 8}, // VECREDUCE_AND_VL
896 {1, 6, 0, 0, 2, 4321, 252, 8}, // VECREDUCE_FADD_VL
897 {1, 6, 0, 0, 2, 4349, 252, 8}, // VECREDUCE_FMAX_VL
898 {1, 6, 0, 0, 2, 4377, 252, 8}, // VECREDUCE_FMIN_VL
899 {1, 6, 0, 0, 2, 4405, 252, 8}, // VECREDUCE_OR_VL
900 {1, 6, 0, 0, 2, 4431, 252, 8}, // VECREDUCE_SEQ_FADD_VL
901 {1, 6, 0, 0, 2, 4463, 252, 8}, // VECREDUCE_SMAX_VL
902 {1, 6, 0, 0, 2, 4491, 252, 8}, // VECREDUCE_SMIN_VL
903 {1, 6, 0, 0, 2, 4519, 252, 8}, // VECREDUCE_UMAX_VL
904 {1, 6, 0, 0, 2, 4547, 252, 8}, // VECREDUCE_UMIN_VL
905 {1, 6, 0, 0, 2, 4575, 252, 8}, // VECREDUCE_XOR_VL
906 {1, 4, 0, 0, 2, 4602, 94, 7}, // VFCVT_RM_F_XU_VL
907 {1, 4, 0, 0, 2, 4629, 94, 7}, // VFCVT_RM_F_X_VL
908 {1, 4, 0, 0, 2, 4655, 74, 7}, // VFCVT_RM_XU_F_VL
909 {1, 4, 0, 0, 2, 4682, 74, 7}, // VFCVT_RM_X_F_VL
910 {1, 3, 0, 0, 2, 4708, 75, 6}, // VFCVT_RTZ_XU_F_VL
911 {1, 3, 0, 0, 2, 4736, 75, 6}, // VFCVT_RTZ_X_F_VL
912 {1, 3, 0, 0, 2, 4763, 22, 6}, // VFIRST_VL
913 {1, 5, 0, 0, 2, 4783, 348, 8}, // VFMADD_VL
914 {1, 5, 0, 0, 3, 4803, 336, 8}, // VFMAX_VL
915 {1, 5, 0, 0, 3, 4822, 336, 8}, // VFMIN_VL
916 {1, 5, 0, 0, 2, 4841, 348, 8}, // VFMSUB_VL
917 {1, 3, 0, 0, 0, 4861, 297, 4}, // VFMV_S_F_VL
918 {1, 3, 0, 0, 0, 4883, 154, 5}, // VFMV_V_F_VL
919 {1, 3, 0, 0, 2, 4905, 101, 7}, // VFNCVT_ROD_VL
920 {1, 5, 0, 0, 2, 4929, 348, 8}, // VFNMADD_VL
921 {1, 5, 0, 0, 2, 4950, 348, 8}, // VFNMSUB_VL
922 {1, 3, 0, 0, 2, 4971, 301, 6}, // VFROUND_NOEXCEPT_VL
923 {1, 5, 0, 0, 2, 5001, 268, 8}, // VFSLIDE1DOWN_VL
924 {1, 5, 0, 0, 2, 5027, 268, 8}, // VFSLIDE1UP_VL
925 {1, 5, 0, 0, 3, 5051, 159, 10}, // VFWADD_VL
926 {1, 5, 0, 0, 3, 5071, 144, 10}, // VFWADD_W_VL
927 {1, 5, 0, 0, 2, 5093, 169, 11}, // VFWMADD_VL
928 {1, 5, 0, 0, 2, 5114, 169, 11}, // VFWMSUB_VL
929 {1, 5, 0, 0, 3, 5135, 159, 10}, // VFWMUL_VL
930 {1, 5, 0, 0, 2, 5155, 169, 11}, // VFWNMADD_VL
931 {1, 5, 0, 0, 2, 5177, 169, 11}, // VFWNMSUB_VL
932 {1, 5, 0, 0, 3, 5199, 159, 10}, // VFWSUB_VL
933 {1, 5, 0, 0, 3, 5219, 144, 10}, // VFWSUB_W_VL
934 {1, 2, 0, 0, 2, 5241, 284, 4}, // VID_VL
935 {1, 3, 0, 0, 0, 5258, 356, 4}, // VMAND_VL
936 {1, 1, 0, 0, 0, 5277, 376, 2}, // VMCLR_VL
937 {1, 5, 0, 0, 1, 5296, 244, 8}, // VMERGE_VL
938 {1, 3, 0, 0, 0, 5316, 356, 4}, // VMOR_VL
939 {1, 1, 0, 0, 0, 5334, 376, 2}, // VMSET_VL
940 {1, 3, 0, 0, 0, 5353, 293, 4}, // VMV_S_X_VL
941 {1, 3, 0, 0, 0, 5374, 180, 4}, // VMV_V_V_VL
942 {1, 3, 0, 0, 0, 5395, 119, 5}, // VMV_V_X_VL
943 {1, 1, 0, 0, 0, 5416, 81, 3}, // VMV_X_S
944 {1, 3, 0, 0, 0, 5434, 356, 4}, // VMXOR_VL
945 {1, 5, 0, 0, 3, 5453, 321, 8}, // VQDOTSU_VL
946 {1, 5, 0, 0, 3, 5474, 321, 8}, // VQDOTU_VL
947 {1, 5, 0, 0, 3, 5494, 321, 8}, // VQDOT_VL
948 {1, 5, 0, 0, 2, 5513, 200, 9}, // VRGATHEREI16_VV_VL
949 {1, 5, 0, 0, 2, 5542, 191, 9}, // VRGATHER_VV_VL
950 {1, 5, 0, 0, 2, 5567, 184, 7}, // VRGATHER_VX_VL
951 {1, 3, 0, 0, 2, 5592, 220, 5}, // VSEXT_VL
952 {1, 5, 0, 0, 2, 5611, 260, 8}, // VSLIDE1DOWN_VL
953 {1, 5, 0, 0, 2, 5636, 260, 8}, // VSLIDE1UP_VL
954 {1, 6, 0, 0, 2, 5659, 276, 8}, // VSLIDEDOWN_VL
955 {1, 6, 0, 0, 2, 5683, 276, 8}, // VSLIDEUP_VL
956 {1, 5, 0, 0, 3, 5705, 134, 10}, // VWADDU_VL
957 {1, 5, 0, 0, 3, 5725, 124, 10}, // VWADDU_W_VL
958 {1, 5, 0, 0, 3, 5747, 134, 10}, // VWADD_VL
959 {1, 5, 0, 0, 3, 5766, 124, 10}, // VWADD_W_VL
960 {1, 5, 0, 0, 2, 5787, 134, 10}, // VWMACCSU_VL
961 {1, 5, 0, 0, 2, 5809, 134, 10}, // VWMACCU_VL
962 {1, 5, 0, 0, 2, 5830, 134, 10}, // VWMACC_VL
963 {1, 5, 0, 0, 3, 5850, 134, 10}, // VWMULSU_VL
964 {1, 5, 0, 0, 3, 5871, 134, 10}, // VWMULU_VL
965 {1, 5, 0, 0, 3, 5891, 134, 10}, // VWMUL_VL
966 {1, 5, 0, 0, 3, 5910, 134, 10}, // VWSLL_VL
967 {1, 5, 0, 0, 3, 5929, 134, 10}, // VWSUBU_VL
968 {1, 5, 0, 0, 3, 5949, 124, 10}, // VWSUBU_W_VL
969 {1, 5, 0, 0, 3, 5971, 134, 10}, // VWSUB_VL
970 {1, 5, 0, 0, 3, 5990, 124, 10}, // VWSUB_W_VL
971 {1, 3, 0, 0, 2, 6011, 220, 5}, // VZEXT_VL
972 {0, 2, 0|1<<SDNPHasChain, 0, 0, 6030, 72, 2}, // WRITE_CSR
973 {1, 5, 0, 0, 3, 6050, 321, 8}, // XOR_VL
974 {1, 1, 0, 0, 0, 6067, 295, 2}, // ZIP
975};
976
977static const SDNodeInfo RISCVGenSDNodeInfo(
978 /*NumOpcodes=*/282, RISCVSDNodeDescs, RISCVSDNodeNames,
979 RISCVVTByHwModeTable, RISCVSDTypeConstraints);
980
981} // namespace llvm
982
983#endif // GET_SDNODE_DESC
984
985