1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target SDNode descriptions *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: RISCV.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10#ifdef GET_SDNODE_ENUM
11#undef GET_SDNODE_ENUM
12
13namespace llvm::RISCVISD {
14
15enum GenNodeType : unsigned {
16 ABDS_VL = ISD::BUILTIN_OP_END,
17 ABDU_VL,
18 ABSW,
19 ABS_VL,
20 ADDD,
21 ADD_LO,
22 ADD_TPREL,
23 ADD_VL,
24 AND_VL,
25 ASUB,
26 ASUBU,
27 AVGCEILS_VL,
28 AVGCEILU_VL,
29 AVGFLOORS_VL,
30 AVGFLOORU_VL,
31 BITREVERSE_VL,
32 BREV8,
33 BR_CC,
34 BSWAP_VL,
35 BuildGPRPair,
36 BuildPairF64,
37 CALL,
38 CLEAR_CSR,
39 CLSW,
40 CLZW,
41 CTLZ_VL,
42 CTPOP_VL,
43 CTTZ_VL,
44 CTZW,
45 CZERO_EQZ,
46 CZERO_NEZ,
47 DIVUW,
48 DIVW,
49 FABS_VL,
50 FADD_VL,
51 FCLASS,
52 FCLASS_VL,
53 FCOPYSIGN_VL,
54 FCVT_WU_RV64,
55 FCVT_W_RV64,
56 FCVT_X,
57 FCVT_XU,
58 FDIV_VL,
59 FLI,
60 FMAX,
61 FMIN,
62 FMUL_VL,
63 FMV_H_X,
64 FMV_W_X_RV64,
65 FMV_X_ANYEXTH,
66 FMV_X_ANYEXTW_RV64,
67 FMV_X_SIGNEXTH,
68 FNEG_VL,
69 FP_EXTEND_VL,
70 FP_ROUND_VL,
71 FROUND,
72 FSGNJX,
73 FSQRT_VL,
74 FSUB_VL,
75 HI,
76 LD_RV32,
77 LLA,
78 MERGE,
79 MNRET_GLUE,
80 MOP_R,
81 MOP_RR,
82 MRET_GLUE,
83 MULHR,
84 MULHRSU,
85 MULHRU,
86 MULHSU,
87 MULHS_VL,
88 MULHU_VL,
89 MUL_VL,
90 NDS_FMV_BF16_X,
91 NDS_FMV_X_ANYEXTBF16,
92 NEGW_MAX,
93 NSRA,
94 NSRL,
95 ORC_B,
96 OR_VL,
97 PPAIRE_DB,
98 PROBED_ALLOCA,
99 PSHL,
100 PSRA,
101 PSRL,
102 PSSLAI,
103 QC_C_MILEAVERET_GLUE,
104 QC_E_LI,
105 QC_INSB,
106 QC_SETWMI,
107 READ_COUNTER_WIDE,
108 READ_CSR,
109 READ_VLENB,
110 REMUW,
111 RET_GLUE,
112 RI_VUNZIP2A_VL,
113 RI_VUNZIP2B_VL,
114 RI_VZIP2A_VL,
115 RI_VZIP2B_VL,
116 RI_VZIPEVEN_VL,
117 RI_VZIPODD_VL,
118 ROLW,
119 RORW,
120 ROTL_VL,
121 ROTR_VL,
122 SADDSAT_VL,
123 SATI,
124 SDIV_VL,
125 SD_RV32,
126 SELECT_CC,
127 SETCC_VL,
128 SET_CSR,
129 SF_VC_FVV_SE,
130 SF_VC_FVW_SE,
131 SF_VC_FV_SE,
132 SF_VC_IVV_SE,
133 SF_VC_IVW_SE,
134 SF_VC_IV_SE,
135 SF_VC_VVV_SE,
136 SF_VC_VVW_SE,
137 SF_VC_VV_SE,
138 SF_VC_V_FVV_SE,
139 SF_VC_V_FVW_SE,
140 SF_VC_V_FV_SE,
141 SF_VC_V_IVV_SE,
142 SF_VC_V_IVW_SE,
143 SF_VC_V_IV_SE,
144 SF_VC_V_I_SE,
145 SF_VC_V_VVV_SE,
146 SF_VC_V_VVW_SE,
147 SF_VC_V_VV_SE,
148 SF_VC_V_XVV_SE,
149 SF_VC_V_XVW_SE,
150 SF_VC_V_XV_SE,
151 SF_VC_V_X_SE,
152 SF_VC_XVV_SE,
153 SF_VC_XVW_SE,
154 SF_VC_XV_SE,
155 SHA256SIG0,
156 SHA256SIG1,
157 SHA256SUM0,
158 SHA256SUM1,
159 SHL_ADD,
160 SHL_VL,
161 SINT_TO_FP_VL,
162 SLLW,
163 SM3P0,
164 SM3P1,
165 SM4ED,
166 SM4KS,
167 SMAX_VL,
168 SMIN_VL,
169 SPLAT_VECTOR_SPLIT_I64_VL,
170 SRAW,
171 SRA_VL,
172 SREM_VL,
173 SRET_GLUE,
174 SRLW,
175 SRL_VL,
176 SSUBSAT_VL,
177 STRICT_FADD_VL,
178 STRICT_FCVT_WU_RV64,
179 STRICT_FCVT_W_RV64,
180 STRICT_FDIV_VL,
181 STRICT_FMUL_VL,
182 STRICT_FP_EXTEND_VL,
183 STRICT_FP_ROUND_VL,
184 STRICT_FSETCCS_VL,
185 STRICT_FSETCC_VL,
186 STRICT_FSQRT_VL,
187 STRICT_FSUB_VL,
188 STRICT_SINT_TO_FP_VL,
189 STRICT_UINT_TO_FP_VL,
190 STRICT_VFCVT_RM_X_F_VL,
191 STRICT_VFCVT_RTZ_XU_F_VL,
192 STRICT_VFCVT_RTZ_X_F_VL,
193 STRICT_VFMADD_VL,
194 STRICT_VFMSUB_VL,
195 STRICT_VFNCVT_ROD_VL,
196 STRICT_VFNMADD_VL,
197 STRICT_VFNMSUB_VL,
198 STRICT_VFROUND_NOEXCEPT_VL,
199 SUBD,
200 SUB_VL,
201 SWAP_CSR,
202 SW_GUARDED_BRIND,
203 SW_GUARDED_CALL,
204 SW_GUARDED_TAIL,
205 SplitF64,
206 SplitGPRPair,
207 TAIL,
208 TH_LDD,
209 TH_LWD,
210 TH_LWUD,
211 TH_SDD,
212 TH_SWD,
213 TRUNCATE_VECTOR_VL,
214 TRUNCATE_VECTOR_VL_SSAT,
215 TRUNCATE_VECTOR_VL_USAT,
216 TUPLE_EXTRACT,
217 TUPLE_INSERT,
218 UADDSAT_VL,
219 UDIV_VL,
220 UINT_TO_FP_VL,
221 UMAX_VL,
222 UMIN_VL,
223 UNZIP,
224 UREM_VL,
225 USATI,
226 USUBSAT_VL,
227 VCPOP_VL,
228 VDOTA4SU_VL,
229 VDOTA4U_VL,
230 VDOTA4_VL,
231 VECREDUCE_ADD_VL,
232 VECREDUCE_AND_VL,
233 VECREDUCE_FADD_VL,
234 VECREDUCE_FMAX_VL,
235 VECREDUCE_FMIN_VL,
236 VECREDUCE_OR_VL,
237 VECREDUCE_SEQ_FADD_VL,
238 VECREDUCE_SMAX_VL,
239 VECREDUCE_SMIN_VL,
240 VECREDUCE_UMAX_VL,
241 VECREDUCE_UMIN_VL,
242 VECREDUCE_XOR_VL,
243 VFCVT_RM_F_XU_VL,
244 VFCVT_RM_F_X_VL,
245 VFCVT_RM_XU_F_VL,
246 VFCVT_RM_X_F_VL,
247 VFCVT_RTZ_XU_F_VL,
248 VFCVT_RTZ_X_F_VL,
249 VFIRST_VL,
250 VFMADD_VL,
251 VFMAX_VL,
252 VFMIN_VL,
253 VFMSUB_VL,
254 VFMV_S_F_VL,
255 VFMV_V_F_VL,
256 VFNCVT_ROD_VL,
257 VFNMADD_VL,
258 VFNMSUB_VL,
259 VFROUND_NOEXCEPT_VL,
260 VFSLIDE1DOWN_VL,
261 VFSLIDE1UP_VL,
262 VFWADD_VL,
263 VFWADD_W_VL,
264 VFWMADD_VL,
265 VFWMSUB_VL,
266 VFWMUL_VL,
267 VFWNMADD_VL,
268 VFWNMSUB_VL,
269 VFWSUB_VL,
270 VFWSUB_W_VL,
271 VID_VL,
272 VMAND_VL,
273 VMCLR_VL,
274 VMERGE_VL,
275 VMOR_VL,
276 VMSET_VL,
277 VMV_S_X_VL,
278 VMV_V_V_VL,
279 VMV_V_X_VL,
280 VMV_X_S,
281 VMXOR_VL,
282 VRGATHEREI16_VV_VL,
283 VRGATHER_VV_VL,
284 VRGATHER_VX_VL,
285 VSEXT_VL,
286 VSLIDE1DOWN_VL,
287 VSLIDE1UP_VL,
288 VSLIDEDOWN_VL,
289 VSLIDEUP_VL,
290 VWABDAU_VL,
291 VWABDA_VL,
292 VWADDU_VL,
293 VWADDU_W_VL,
294 VWADD_VL,
295 VWADD_W_VL,
296 VWMACCSU_VL,
297 VWMACCU_VL,
298 VWMACC_VL,
299 VWMULSU_VL,
300 VWMULU_VL,
301 VWMUL_VL,
302 VWSLL_VL,
303 VWSUBU_VL,
304 VWSUBU_W_VL,
305 VWSUB_VL,
306 VWSUB_W_VL,
307 VZEXT_VL,
308 WADDAU,
309 WADDU,
310 WMULSU,
311 WRITE_CSR,
312 WSLA,
313 WSLL,
314 WSUBAU,
315 WSUBU,
316 XOR_VL,
317 ZIP,
318};
319
320static constexpr unsigned GENERATED_OPCODE_END = ZIP + 1;
321
322} // namespace llvm::RISCVISD
323
324#endif // GET_SDNODE_ENUM
325
326#ifdef GET_SDNODE_DESC
327#undef GET_SDNODE_DESC
328
329namespace llvm {
330
331
332#ifdef __GNUC__
333#pragma GCC diagnostic push
334#pragma GCC diagnostic ignored "-Woverlength-strings"
335#endif
336static constexpr char RISCVSDNodeNamesStorage[] =
337 "\0"
338 "RISCVISD::ABDS_VL\0"
339 "RISCVISD::ABDU_VL\0"
340 "RISCVISD::ABSW\0"
341 "RISCVISD::ABS_VL\0"
342 "RISCVISD::ADDD\0"
343 "RISCVISD::ADD_LO\0"
344 "RISCVISD::ADD_TPREL\0"
345 "RISCVISD::ADD_VL\0"
346 "RISCVISD::AND_VL\0"
347 "RISCVISD::ASUB\0"
348 "RISCVISD::ASUBU\0"
349 "RISCVISD::AVGCEILS_VL\0"
350 "RISCVISD::AVGCEILU_VL\0"
351 "RISCVISD::AVGFLOORS_VL\0"
352 "RISCVISD::AVGFLOORU_VL\0"
353 "RISCVISD::BITREVERSE_VL\0"
354 "RISCVISD::BREV8\0"
355 "RISCVISD::BR_CC\0"
356 "RISCVISD::BSWAP_VL\0"
357 "RISCVISD::BuildGPRPair\0"
358 "RISCVISD::BuildPairF64\0"
359 "RISCVISD::CALL\0"
360 "RISCVISD::CLEAR_CSR\0"
361 "RISCVISD::CLSW\0"
362 "RISCVISD::CLZW\0"
363 "RISCVISD::CTLZ_VL\0"
364 "RISCVISD::CTPOP_VL\0"
365 "RISCVISD::CTTZ_VL\0"
366 "RISCVISD::CTZW\0"
367 "RISCVISD::CZERO_EQZ\0"
368 "RISCVISD::CZERO_NEZ\0"
369 "RISCVISD::DIVUW\0"
370 "RISCVISD::DIVW\0"
371 "RISCVISD::FABS_VL\0"
372 "RISCVISD::FADD_VL\0"
373 "RISCVISD::FCLASS\0"
374 "RISCVISD::FCLASS_VL\0"
375 "RISCVISD::FCOPYSIGN_VL\0"
376 "RISCVISD::FCVT_WU_RV64\0"
377 "RISCVISD::FCVT_W_RV64\0"
378 "RISCVISD::FCVT_X\0"
379 "RISCVISD::FCVT_XU\0"
380 "RISCVISD::FDIV_VL\0"
381 "RISCVISD::FLI\0"
382 "RISCVISD::FMAX\0"
383 "RISCVISD::FMIN\0"
384 "RISCVISD::FMUL_VL\0"
385 "RISCVISD::FMV_H_X\0"
386 "RISCVISD::FMV_W_X_RV64\0"
387 "RISCVISD::FMV_X_ANYEXTH\0"
388 "RISCVISD::FMV_X_ANYEXTW_RV64\0"
389 "RISCVISD::FMV_X_SIGNEXTH\0"
390 "RISCVISD::FNEG_VL\0"
391 "RISCVISD::FP_EXTEND_VL\0"
392 "RISCVISD::FP_ROUND_VL\0"
393 "RISCVISD::FROUND\0"
394 "RISCVISD::FSGNJX\0"
395 "RISCVISD::FSQRT_VL\0"
396 "RISCVISD::FSUB_VL\0"
397 "RISCVISD::HI\0"
398 "RISCVISD::LD_RV32\0"
399 "RISCVISD::LLA\0"
400 "RISCVISD::MERGE\0"
401 "RISCVISD::MNRET_GLUE\0"
402 "RISCVISD::MOP_R\0"
403 "RISCVISD::MOP_RR\0"
404 "RISCVISD::MRET_GLUE\0"
405 "RISCVISD::MULHR\0"
406 "RISCVISD::MULHRSU\0"
407 "RISCVISD::MULHRU\0"
408 "RISCVISD::MULHSU\0"
409 "RISCVISD::MULHS_VL\0"
410 "RISCVISD::MULHU_VL\0"
411 "RISCVISD::MUL_VL\0"
412 "RISCVISD::NDS_FMV_BF16_X\0"
413 "RISCVISD::NDS_FMV_X_ANYEXTBF16\0"
414 "RISCVISD::NEGW_MAX\0"
415 "RISCVISD::NSRA\0"
416 "RISCVISD::NSRL\0"
417 "RISCVISD::ORC_B\0"
418 "RISCVISD::OR_VL\0"
419 "RISCVISD::PPAIRE_DB\0"
420 "RISCVISD::PROBED_ALLOCA\0"
421 "RISCVISD::PSHL\0"
422 "RISCVISD::PSRA\0"
423 "RISCVISD::PSRL\0"
424 "RISCVISD::PSSLAI\0"
425 "RISCVISD::QC_C_MILEAVERET_GLUE\0"
426 "RISCVISD::QC_E_LI\0"
427 "RISCVISD::QC_INSB\0"
428 "RISCVISD::QC_SETWMI\0"
429 "RISCVISD::READ_COUNTER_WIDE\0"
430 "RISCVISD::READ_CSR\0"
431 "RISCVISD::READ_VLENB\0"
432 "RISCVISD::REMUW\0"
433 "RISCVISD::RET_GLUE\0"
434 "RISCVISD::RI_VUNZIP2A_VL\0"
435 "RISCVISD::RI_VUNZIP2B_VL\0"
436 "RISCVISD::RI_VZIP2A_VL\0"
437 "RISCVISD::RI_VZIP2B_VL\0"
438 "RISCVISD::RI_VZIPEVEN_VL\0"
439 "RISCVISD::RI_VZIPODD_VL\0"
440 "RISCVISD::ROLW\0"
441 "RISCVISD::RORW\0"
442 "RISCVISD::ROTL_VL\0"
443 "RISCVISD::ROTR_VL\0"
444 "RISCVISD::SADDSAT_VL\0"
445 "RISCVISD::SATI\0"
446 "RISCVISD::SDIV_VL\0"
447 "RISCVISD::SD_RV32\0"
448 "RISCVISD::SELECT_CC\0"
449 "RISCVISD::SETCC_VL\0"
450 "RISCVISD::SET_CSR\0"
451 "RISCVISD::SF_VC_FVV_SE\0"
452 "RISCVISD::SF_VC_FVW_SE\0"
453 "RISCVISD::SF_VC_FV_SE\0"
454 "RISCVISD::SF_VC_IVV_SE\0"
455 "RISCVISD::SF_VC_IVW_SE\0"
456 "RISCVISD::SF_VC_IV_SE\0"
457 "RISCVISD::SF_VC_VVV_SE\0"
458 "RISCVISD::SF_VC_VVW_SE\0"
459 "RISCVISD::SF_VC_VV_SE\0"
460 "RISCVISD::SF_VC_V_FVV_SE\0"
461 "RISCVISD::SF_VC_V_FVW_SE\0"
462 "RISCVISD::SF_VC_V_FV_SE\0"
463 "RISCVISD::SF_VC_V_IVV_SE\0"
464 "RISCVISD::SF_VC_V_IVW_SE\0"
465 "RISCVISD::SF_VC_V_IV_SE\0"
466 "RISCVISD::SF_VC_V_I_SE\0"
467 "RISCVISD::SF_VC_V_VVV_SE\0"
468 "RISCVISD::SF_VC_V_VVW_SE\0"
469 "RISCVISD::SF_VC_V_VV_SE\0"
470 "RISCVISD::SF_VC_V_XVV_SE\0"
471 "RISCVISD::SF_VC_V_XVW_SE\0"
472 "RISCVISD::SF_VC_V_XV_SE\0"
473 "RISCVISD::SF_VC_V_X_SE\0"
474 "RISCVISD::SF_VC_XVV_SE\0"
475 "RISCVISD::SF_VC_XVW_SE\0"
476 "RISCVISD::SF_VC_XV_SE\0"
477 "RISCVISD::SHA256SIG0\0"
478 "RISCVISD::SHA256SIG1\0"
479 "RISCVISD::SHA256SUM0\0"
480 "RISCVISD::SHA256SUM1\0"
481 "RISCVISD::SHL_ADD\0"
482 "RISCVISD::SHL_VL\0"
483 "RISCVISD::SINT_TO_FP_VL\0"
484 "RISCVISD::SLLW\0"
485 "RISCVISD::SM3P0\0"
486 "RISCVISD::SM3P1\0"
487 "RISCVISD::SM4ED\0"
488 "RISCVISD::SM4KS\0"
489 "RISCVISD::SMAX_VL\0"
490 "RISCVISD::SMIN_VL\0"
491 "RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL\0"
492 "RISCVISD::SRAW\0"
493 "RISCVISD::SRA_VL\0"
494 "RISCVISD::SREM_VL\0"
495 "RISCVISD::SRET_GLUE\0"
496 "RISCVISD::SRLW\0"
497 "RISCVISD::SRL_VL\0"
498 "RISCVISD::SSUBSAT_VL\0"
499 "RISCVISD::STRICT_FADD_VL\0"
500 "RISCVISD::STRICT_FCVT_WU_RV64\0"
501 "RISCVISD::STRICT_FCVT_W_RV64\0"
502 "RISCVISD::STRICT_FDIV_VL\0"
503 "RISCVISD::STRICT_FMUL_VL\0"
504 "RISCVISD::STRICT_FP_EXTEND_VL\0"
505 "RISCVISD::STRICT_FP_ROUND_VL\0"
506 "RISCVISD::STRICT_FSETCCS_VL\0"
507 "RISCVISD::STRICT_FSETCC_VL\0"
508 "RISCVISD::STRICT_FSQRT_VL\0"
509 "RISCVISD::STRICT_FSUB_VL\0"
510 "RISCVISD::STRICT_SINT_TO_FP_VL\0"
511 "RISCVISD::STRICT_UINT_TO_FP_VL\0"
512 "RISCVISD::STRICT_VFCVT_RM_X_F_VL\0"
513 "RISCVISD::STRICT_VFCVT_RTZ_XU_F_VL\0"
514 "RISCVISD::STRICT_VFCVT_RTZ_X_F_VL\0"
515 "RISCVISD::STRICT_VFMADD_VL\0"
516 "RISCVISD::STRICT_VFMSUB_VL\0"
517 "RISCVISD::STRICT_VFNCVT_ROD_VL\0"
518 "RISCVISD::STRICT_VFNMADD_VL\0"
519 "RISCVISD::STRICT_VFNMSUB_VL\0"
520 "RISCVISD::STRICT_VFROUND_NOEXCEPT_VL\0"
521 "RISCVISD::SUBD\0"
522 "RISCVISD::SUB_VL\0"
523 "RISCVISD::SWAP_CSR\0"
524 "RISCVISD::SW_GUARDED_BRIND\0"
525 "RISCVISD::SW_GUARDED_CALL\0"
526 "RISCVISD::SW_GUARDED_TAIL\0"
527 "RISCVISD::SplitF64\0"
528 "RISCVISD::SplitGPRPair\0"
529 "RISCVISD::TAIL\0"
530 "RISCVISD::TH_LDD\0"
531 "RISCVISD::TH_LWD\0"
532 "RISCVISD::TH_LWUD\0"
533 "RISCVISD::TH_SDD\0"
534 "RISCVISD::TH_SWD\0"
535 "RISCVISD::TRUNCATE_VECTOR_VL\0"
536 "RISCVISD::TRUNCATE_VECTOR_VL_SSAT\0"
537 "RISCVISD::TRUNCATE_VECTOR_VL_USAT\0"
538 "RISCVISD::TUPLE_EXTRACT\0"
539 "RISCVISD::TUPLE_INSERT\0"
540 "RISCVISD::UADDSAT_VL\0"
541 "RISCVISD::UDIV_VL\0"
542 "RISCVISD::UINT_TO_FP_VL\0"
543 "RISCVISD::UMAX_VL\0"
544 "RISCVISD::UMIN_VL\0"
545 "RISCVISD::UNZIP\0"
546 "RISCVISD::UREM_VL\0"
547 "RISCVISD::USATI\0"
548 "RISCVISD::USUBSAT_VL\0"
549 "RISCVISD::VCPOP_VL\0"
550 "RISCVISD::VDOTA4SU_VL\0"
551 "RISCVISD::VDOTA4U_VL\0"
552 "RISCVISD::VDOTA4_VL\0"
553 "RISCVISD::VECREDUCE_ADD_VL\0"
554 "RISCVISD::VECREDUCE_AND_VL\0"
555 "RISCVISD::VECREDUCE_FADD_VL\0"
556 "RISCVISD::VECREDUCE_FMAX_VL\0"
557 "RISCVISD::VECREDUCE_FMIN_VL\0"
558 "RISCVISD::VECREDUCE_OR_VL\0"
559 "RISCVISD::VECREDUCE_SEQ_FADD_VL\0"
560 "RISCVISD::VECREDUCE_SMAX_VL\0"
561 "RISCVISD::VECREDUCE_SMIN_VL\0"
562 "RISCVISD::VECREDUCE_UMAX_VL\0"
563 "RISCVISD::VECREDUCE_UMIN_VL\0"
564 "RISCVISD::VECREDUCE_XOR_VL\0"
565 "RISCVISD::VFCVT_RM_F_XU_VL\0"
566 "RISCVISD::VFCVT_RM_F_X_VL\0"
567 "RISCVISD::VFCVT_RM_XU_F_VL\0"
568 "RISCVISD::VFCVT_RM_X_F_VL\0"
569 "RISCVISD::VFCVT_RTZ_XU_F_VL\0"
570 "RISCVISD::VFCVT_RTZ_X_F_VL\0"
571 "RISCVISD::VFIRST_VL\0"
572 "RISCVISD::VFMADD_VL\0"
573 "RISCVISD::VFMAX_VL\0"
574 "RISCVISD::VFMIN_VL\0"
575 "RISCVISD::VFMSUB_VL\0"
576 "RISCVISD::VFMV_S_F_VL\0"
577 "RISCVISD::VFMV_V_F_VL\0"
578 "RISCVISD::VFNCVT_ROD_VL\0"
579 "RISCVISD::VFNMADD_VL\0"
580 "RISCVISD::VFNMSUB_VL\0"
581 "RISCVISD::VFROUND_NOEXCEPT_VL\0"
582 "RISCVISD::VFSLIDE1DOWN_VL\0"
583 "RISCVISD::VFSLIDE1UP_VL\0"
584 "RISCVISD::VFWADD_VL\0"
585 "RISCVISD::VFWADD_W_VL\0"
586 "RISCVISD::VFWMADD_VL\0"
587 "RISCVISD::VFWMSUB_VL\0"
588 "RISCVISD::VFWMUL_VL\0"
589 "RISCVISD::VFWNMADD_VL\0"
590 "RISCVISD::VFWNMSUB_VL\0"
591 "RISCVISD::VFWSUB_VL\0"
592 "RISCVISD::VFWSUB_W_VL\0"
593 "RISCVISD::VID_VL\0"
594 "RISCVISD::VMAND_VL\0"
595 "RISCVISD::VMCLR_VL\0"
596 "RISCVISD::VMERGE_VL\0"
597 "RISCVISD::VMOR_VL\0"
598 "RISCVISD::VMSET_VL\0"
599 "RISCVISD::VMV_S_X_VL\0"
600 "RISCVISD::VMV_V_V_VL\0"
601 "RISCVISD::VMV_V_X_VL\0"
602 "RISCVISD::VMV_X_S\0"
603 "RISCVISD::VMXOR_VL\0"
604 "RISCVISD::VRGATHEREI16_VV_VL\0"
605 "RISCVISD::VRGATHER_VV_VL\0"
606 "RISCVISD::VRGATHER_VX_VL\0"
607 "RISCVISD::VSEXT_VL\0"
608 "RISCVISD::VSLIDE1DOWN_VL\0"
609 "RISCVISD::VSLIDE1UP_VL\0"
610 "RISCVISD::VSLIDEDOWN_VL\0"
611 "RISCVISD::VSLIDEUP_VL\0"
612 "RISCVISD::VWABDAU_VL\0"
613 "RISCVISD::VWABDA_VL\0"
614 "RISCVISD::VWADDU_VL\0"
615 "RISCVISD::VWADDU_W_VL\0"
616 "RISCVISD::VWADD_VL\0"
617 "RISCVISD::VWADD_W_VL\0"
618 "RISCVISD::VWMACCSU_VL\0"
619 "RISCVISD::VWMACCU_VL\0"
620 "RISCVISD::VWMACC_VL\0"
621 "RISCVISD::VWMULSU_VL\0"
622 "RISCVISD::VWMULU_VL\0"
623 "RISCVISD::VWMUL_VL\0"
624 "RISCVISD::VWSLL_VL\0"
625 "RISCVISD::VWSUBU_VL\0"
626 "RISCVISD::VWSUBU_W_VL\0"
627 "RISCVISD::VWSUB_VL\0"
628 "RISCVISD::VWSUB_W_VL\0"
629 "RISCVISD::VZEXT_VL\0"
630 "RISCVISD::WADDAU\0"
631 "RISCVISD::WADDU\0"
632 "RISCVISD::WMULSU\0"
633 "RISCVISD::WRITE_CSR\0"
634 "RISCVISD::WSLA\0"
635 "RISCVISD::WSLL\0"
636 "RISCVISD::WSUBAU\0"
637 "RISCVISD::WSUBU\0"
638 "RISCVISD::XOR_VL\0"
639 "RISCVISD::ZIP\0"
640 ;
641#ifdef __GNUC__
642#pragma GCC diagnostic pop
643#endif
644
645static constexpr llvm::StringTable
646RISCVSDNodeNames = RISCVSDNodeNamesStorage;
647
648static const VTByHwModePair RISCVVTByHwModeTable[] = {
649 /* 0 */ {0, MVT::i32}, {1, MVT::i64},
650};
651
652static const SDTypeConstraint RISCVSDTypeConstraints[] = {
653 /* 0 */ {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32},
654 /* 4 */ {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
655 /* 10 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
656 /* 16 */ {SDTCisVT, 2, 0, 0, MVT::f64}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
657 /* 19 */ {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
658 /* 22 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
659 /* 26 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
660 /* 30 */ {SDTCisVT, 2, 0, 0, MVT::Untyped}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
661 /* 33 */ {SDTCisVT, 1, 0, 0, MVT::bf16}, {SDTCisVT, 0, 0, 2, 0},
662 /* 35 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
663 /* 38 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
664 /* 44 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
665 /* 48 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
666 /* 52 */ {SDTCisVT, 1, 0, 0, MVT::f32}, {SDTCisVT, 0, 0, 0, MVT::i64},
667 /* 54 */ {SDTCisVT, 2, 0, 0, MVT::i64}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i64},
668 /* 57 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::bf16},
669 /* 59 */ {SDTCisVT, 1, 0, 0, MVT::i64}, {SDTCisVT, 0, 0, 0, MVT::f32},
670 /* 61 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::f64},
671 /* 64 */ {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::v4i8},
672 /* 70 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::Untyped},
673 /* 73 */ {SDTCisPtrTy, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
674 /* 74 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
675 /* 83 */ {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
676 /* 87 */ {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
677 /* 90 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
678 /* 97 */ {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
679 /* 100 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
680 /* 104 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
681 /* 106 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
682 /* 113 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
683 /* 120 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
684 /* 127 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
685 /* 132 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
686 /* 142 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
687 /* 152 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
688 /* 162 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
689 /* 167 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
690 /* 177 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
691 /* 188 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
692 /* 192 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
693 /* 199 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
694 /* 208 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i16}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
695 /* 217 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i64}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
696 /* 223 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
697 /* 228 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
698 /* 233 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
699 /* 238 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
700 /* 242 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
701 /* 247 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
702 /* 252 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
703 /* 260 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 2, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
704 /* 268 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
705 /* 276 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisEltOfVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
706 /* 284 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
707 /* 292 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
708 /* 296 */ {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
709 /* 298 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
710 /* 300 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
711 /* 304 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
712 /* 308 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
713 /* 314 */ {SDTCisInt, 4, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
714 /* 319 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
715 /* 322 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
716 /* 325 */ {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
717 /* 328 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
718 /* 336 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 3, 0, 0, MVT::i1}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
719 /* 343 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
720 /* 351 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
721 /* 355 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
722 /* 363 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
723 /* 367 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
724 /* 372 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
725 /* 376 */ {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisVT, 2, 0, 0, MVT::Other}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
726 /* 379 */ {SDTCisVT, 0, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
727 /* 383 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1},
728 /* 385 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1},
729 /* 393 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
730 /* 396 */ {SDTCisSameAs, 4, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
731};
732
733static const SDNodeDesc RISCVSDNodeDescs[] = {
734 {1, 5, 0, 0, 3, 1, 328, 8}, // ABDS_VL
735 {1, 5, 0, 0, 3, 19, 328, 8}, // ABDU_VL
736 {1, 1, 0, 0, 0, 37, 298, 2}, // ABSW
737 {1, 4, 0, 0, 3, 52, 336, 7}, // ABS_VL
738 {2, 4, 0, 0, 0, 69, 10, 6}, // ADDD
739 {1, 2, 0, 0, 0, 84, 322, 3}, // ADD_LO
740 {1, 3, 0, 0, 0, 101, 351, 4}, // ADD_TPREL
741 {1, 5, 0, 0, 3, 121, 328, 8}, // ADD_VL
742 {1, 5, 0, 0, 3, 138, 328, 8}, // AND_VL
743 {1, 2, 0, 0, 0, 155, 322, 3}, // ASUB
744 {1, 2, 0, 0, 0, 170, 322, 3}, // ASUBU
745 {1, 5, 0, 0, 3, 186, 328, 8}, // AVGCEILS_VL
746 {1, 5, 0, 0, 3, 208, 328, 8}, // AVGCEILU_VL
747 {1, 5, 0, 0, 3, 230, 328, 8}, // AVGFLOORS_VL
748 {1, 5, 0, 0, 3, 253, 328, 8}, // AVGFLOORU_VL
749 {1, 4, 0, 0, 3, 276, 336, 7}, // BITREVERSE_VL
750 {1, 1, 0, 0, 0, 300, 302, 2}, // BREV8
751 {0, 4, 0|1<<SDNPHasChain, 0, 0, 316, 376, 3}, // BR_CC
752 {1, 4, 0, 0, 3, 332, 336, 7}, // BSWAP_VL
753 {1, 2, 0, 0, 0, 351, 70, 3}, // BuildGPRPair
754 {1, 2, 0, 0, 0, 374, 61, 3}, // BuildPairF64
755 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 397, 29, 1}, // CALL
756 {0, 2, 0|1<<SDNPHasChain, 0, 0, 412, 88, 2}, // CLEAR_CSR
757 {1, 1, 0, 0, 0, 432, 298, 2}, // CLSW
758 {1, 1, 0, 0, 0, 447, 298, 2}, // CLZW
759 {1, 4, 0, 0, 3, 462, 336, 7}, // CTLZ_VL
760 {1, 4, 0, 0, 3, 480, 336, 7}, // CTPOP_VL
761 {1, 4, 0, 0, 3, 499, 336, 7}, // CTTZ_VL
762 {1, 1, 0, 0, 0, 517, 298, 2}, // CTZW
763 {1, 2, 0, 0, 0, 532, 322, 3}, // CZERO_EQZ
764 {1, 2, 0, 0, 0, 552, 322, 3}, // CZERO_NEZ
765 {1, 2, 0, 0, 0, 572, 319, 3}, // DIVUW
766 {1, 2, 0, 0, 0, 588, 319, 3}, // DIVW
767 {1, 3, 0, 0, 2, 603, 308, 6}, // FABS_VL
768 {1, 5, 0, 0, 3, 621, 343, 8}, // FADD_VL
769 {1, 1, 0, 0, 0, 639, 36, 2}, // FCLASS
770 {1, 3, 0, 0, 2, 656, 74, 9}, // FCLASS_VL
771 {1, 5, 0, 0, 3, 676, 343, 8}, // FCOPYSIGN_VL
772 {1, 2, 0, 0, 0, 699, 54, 3}, // FCVT_WU_RV64
773 {1, 2, 0, 0, 0, 722, 54, 3}, // FCVT_W_RV64
774 {1, 2, 0, 0, 0, 744, 35, 3}, // FCVT_X
775 {1, 2, 0, 0, 0, 761, 35, 3}, // FCVT_XU
776 {1, 5, 0, 0, 3, 779, 343, 8}, // FDIV_VL
777 {1, 1, 0, 0, 0, 797, 104, 2}, // FLI
778 {1, 2, 0, 0, 0, 811, 325, 3}, // FMAX
779 {1, 2, 0, 0, 0, 826, 325, 3}, // FMIN
780 {1, 5, 0, 0, 3, 841, 343, 8}, // FMUL_VL
781 {1, 1, 0, 0, 0, 859, 104, 2}, // FMV_H_X
782 {1, 1, 0, 0, 0, 877, 59, 2}, // FMV_W_X_RV64
783 {1, 1, 0, 0, 0, 900, 36, 2}, // FMV_X_ANYEXTH
784 {1, 1, 0, 0, 0, 924, 52, 2}, // FMV_X_ANYEXTW_RV64
785 {1, 1, 0, 0, 0, 953, 36, 2}, // FMV_X_SIGNEXTH
786 {1, 3, 0, 0, 2, 978, 308, 6}, // FNEG_VL
787 {1, 3, 0, 0, 2, 996, 120, 7}, // FP_EXTEND_VL
788 {1, 3, 0, 0, 2, 1019, 113, 7}, // FP_ROUND_VL
789 {1, 3, 0, 0, 0, 1041, 100, 4}, // FROUND
790 {1, 2, 0, 0, 0, 1058, 101, 3}, // FSGNJX
791 {1, 3, 0, 0, 2, 1075, 308, 6}, // FSQRT_VL
792 {1, 5, 0, 0, 3, 1094, 343, 8}, // FSUB_VL
793 {1, 1, 0, 0, 0, 1112, 302, 2}, // HI
794 {2, 1, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1125, 19, 3}, // LD_RV32
795 {1, 1, 0, 0, 0, 1143, 302, 2}, // LLA
796 {1, 3, 0, 0, 0, 1157, 83, 4}, // MERGE
797 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1173, 0, 0}, // MNRET_GLUE
798 {1, 2, 0, 0, 0, 1194, 84, 3}, // MOP_R
799 {1, 3, 0, 0, 0, 1210, 83, 4}, // MOP_RR
800 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1227, 0, 0}, // MRET_GLUE
801 {1, 2, 0, 0, 0, 1247, 322, 3}, // MULHR
802 {1, 2, 0, 0, 0, 1263, 322, 3}, // MULHRSU
803 {1, 2, 0, 0, 0, 1281, 322, 3}, // MULHRU
804 {1, 2, 0, 0, 0, 1298, 322, 3}, // MULHSU
805 {1, 5, 0, 0, 3, 1315, 328, 8}, // MULHS_VL
806 {1, 5, 0, 0, 3, 1334, 328, 8}, // MULHU_VL
807 {1, 5, 0, 0, 3, 1353, 328, 8}, // MUL_VL
808 {1, 1, 0, 0, 0, 1370, 57, 2}, // NDS_FMV_BF16_X
809 {1, 1, 0, 0, 0, 1395, 33, 2}, // NDS_FMV_X_ANYEXTBF16
810 {1, 1, 0, 0, 0, 1426, 302, 2}, // NEGW_MAX
811 {1, 3, 0, 0, 0, 1445, 0, 4}, // NSRA
812 {1, 3, 0, 0, 0, 1460, 0, 4}, // NSRL
813 {1, 1, 0, 0, 0, 1475, 302, 2}, // ORC_B
814 {1, 5, 0, 0, 3, 1491, 328, 8}, // OR_VL
815 {2, 4, 0, 0, 0, 1507, 64, 6}, // PPAIRE_DB
816 {0, 1, 0|1<<SDNPHasChain, 0, 0, 1527, 73, 1}, // PROBED_ALLOCA
817 {1, 2, 0, 0, 0, 1551, 196, 3}, // PSHL
818 {1, 2, 0, 0, 0, 1566, 196, 3}, // PSRA
819 {1, 2, 0, 0, 0, 1581, 196, 3}, // PSRL
820 {1, 2, 0, 0, 0, 1596, 196, 3}, // PSSLAI
821 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1613, 0, 0}, // QC_C_MILEAVERET_GLUE
822 {1, 1, 0, 0, 0, 1644, 302, 2}, // QC_E_LI
823 {1, 4, 0, 0, 0, 1662, 314, 5}, // QC_INSB
824 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1680, 372, 4}, // QC_SETWMI
825 {2, 2, 0|1<<SDNPHasChain, 0, 0, 1700, 22, 4}, // READ_COUNTER_WIDE
826 {1, 1, 0|1<<SDNPHasChain, 0, 0, 1728, 88, 2}, // READ_CSR
827 {1, 0, 0, 0, 0, 1747, 29, 1}, // READ_VLENB
828 {1, 2, 0, 0, 0, 1768, 319, 3}, // REMUW
829 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1784, 0, 0}, // RET_GLUE
830 {1, 5, 0, 0, 2, 1803, 328, 8}, // RI_VUNZIP2A_VL
831 {1, 5, 0, 0, 2, 1828, 328, 8}, // RI_VUNZIP2B_VL
832 {1, 5, 0, 0, 2, 1853, 328, 8}, // RI_VZIP2A_VL
833 {1, 5, 0, 0, 2, 1876, 328, 8}, // RI_VZIP2B_VL
834 {1, 5, 0, 0, 2, 1899, 328, 8}, // RI_VZIPEVEN_VL
835 {1, 5, 0, 0, 2, 1924, 328, 8}, // RI_VZIPODD_VL
836 {1, 2, 0, 0, 0, 1948, 319, 3}, // ROLW
837 {1, 2, 0, 0, 0, 1963, 319, 3}, // RORW
838 {1, 5, 0, 0, 3, 1978, 328, 8}, // ROTL_VL
839 {1, 5, 0, 0, 3, 1996, 328, 8}, // ROTR_VL
840 {1, 5, 0, 0, 3, 2014, 328, 8}, // SADDSAT_VL
841 {1, 2, 0, 0, 0, 2035, 322, 3}, // SATI
842 {1, 5, 0, 0, 3, 2050, 328, 8}, // SDIV_VL
843 {0, 3, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 2068, 19, 3}, // SD_RV32
844 {1, 5, 0, 0, 0, 2086, 396, 4}, // SELECT_CC
845 {1, 6, 0, 0, 3, 2106, 385, 8}, // SETCC_VL
846 {0, 2, 0|1<<SDNPHasChain, 0, 0, 2125, 88, 2}, // SET_CSR
847 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2143, 44, 4}, // SF_VC_FVV_SE
848 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2166, 48, 4}, // SF_VC_FVW_SE
849 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2189, 379, 4}, // SF_VC_FV_SE
850 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2211, 44, 4}, // SF_VC_IVV_SE
851 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2234, 48, 4}, // SF_VC_IVW_SE
852 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2257, 379, 4}, // SF_VC_IV_SE
853 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2279, 44, 4}, // SF_VC_VVV_SE
854 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2302, 48, 4}, // SF_VC_VVW_SE
855 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2325, 379, 4}, // SF_VC_VV_SE
856 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2347, 233, 5}, // SF_VC_V_FVV_SE
857 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2372, 242, 5}, // SF_VC_V_FVW_SE
858 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2397, 238, 4}, // SF_VC_V_FV_SE
859 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2421, 233, 5}, // SF_VC_V_IVV_SE
860 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2446, 242, 5}, // SF_VC_V_IVW_SE
861 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2471, 238, 4}, // SF_VC_V_IV_SE
862 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2495, 247, 5}, // SF_VC_V_I_SE
863 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2518, 233, 5}, // SF_VC_V_VVV_SE
864 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2543, 242, 5}, // SF_VC_V_VVW_SE
865 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2568, 238, 4}, // SF_VC_V_VV_SE
866 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2592, 233, 5}, // SF_VC_V_XVV_SE
867 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2617, 242, 5}, // SF_VC_V_XVW_SE
868 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2642, 238, 4}, // SF_VC_V_XV_SE
869 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2666, 247, 5}, // SF_VC_V_X_SE
870 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2689, 44, 4}, // SF_VC_XVV_SE
871 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2712, 48, 4}, // SF_VC_XVW_SE
872 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2735, 379, 4}, // SF_VC_XV_SE
873 {1, 1, 0, 0, 0, 2757, 302, 2}, // SHA256SIG0
874 {1, 1, 0, 0, 0, 2778, 302, 2}, // SHA256SIG1
875 {1, 1, 0, 0, 0, 2799, 302, 2}, // SHA256SUM0
876 {1, 1, 0, 0, 0, 2820, 302, 2}, // SHA256SUM1
877 {1, 3, 0, 0, 0, 2841, 367, 5}, // SHL_ADD
878 {1, 5, 0, 0, 3, 2859, 328, 8}, // SHL_VL
879 {1, 3, 0, 0, 2, 2876, 107, 6}, // SINT_TO_FP_VL
880 {1, 2, 0, 0, 0, 2900, 319, 3}, // SLLW
881 {1, 1, 0, 0, 0, 2915, 302, 2}, // SM3P0
882 {1, 1, 0, 0, 0, 2931, 302, 2}, // SM3P1
883 {1, 3, 0, 0, 0, 2947, 26, 4}, // SM4ED
884 {1, 3, 0, 0, 0, 2963, 26, 4}, // SM4KS
885 {1, 5, 0, 0, 3, 2979, 328, 8}, // SMAX_VL
886 {1, 5, 0, 0, 3, 2997, 328, 8}, // SMIN_VL
887 {1, 4, 0, 0, 0, 3015, 217, 6}, // SPLAT_VECTOR_SPLIT_I64_VL
888 {1, 2, 0, 0, 0, 3051, 319, 3}, // SRAW
889 {1, 5, 0, 0, 3, 3066, 328, 8}, // SRA_VL
890 {1, 5, 0, 0, 3, 3083, 328, 8}, // SREM_VL
891 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 3101, 0, 0}, // SRET_GLUE
892 {1, 2, 0, 0, 0, 3121, 319, 3}, // SRLW
893 {1, 5, 0, 0, 3, 3136, 328, 8}, // SRL_VL
894 {1, 5, 0, 0, 3, 3153, 328, 8}, // SSUBSAT_VL
895 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3174, 343, 8}, // STRICT_FADD_VL
896 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 3199, 54, 3}, // STRICT_FCVT_WU_RV64
897 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 3229, 54, 3}, // STRICT_FCVT_W_RV64
898 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3258, 343, 8}, // STRICT_FDIV_VL
899 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3283, 343, 8}, // STRICT_FMUL_VL
900 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3308, 120, 7}, // STRICT_FP_EXTEND_VL
901 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3338, 113, 7}, // STRICT_FP_ROUND_VL
902 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3367, 385, 8}, // STRICT_FSETCCS_VL
903 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3395, 385, 8}, // STRICT_FSETCC_VL
904 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3422, 308, 6}, // STRICT_FSQRT_VL
905 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3448, 343, 8}, // STRICT_FSUB_VL
906 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3473, 107, 6}, // STRICT_SINT_TO_FP_VL
907 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3504, 107, 6}, // STRICT_UINT_TO_FP_VL
908 {1, 4, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3535, 90, 7}, // STRICT_VFCVT_RM_X_F_VL
909 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3568, 91, 6}, // STRICT_VFCVT_RTZ_XU_F_VL
910 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3603, 91, 6}, // STRICT_VFCVT_RTZ_X_F_VL
911 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3637, 355, 8}, // STRICT_VFMADD_VL
912 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3664, 355, 8}, // STRICT_VFMSUB_VL
913 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3691, 113, 7}, // STRICT_VFNCVT_ROD_VL
914 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3722, 355, 8}, // STRICT_VFNMADD_VL
915 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3750, 355, 8}, // STRICT_VFNMSUB_VL
916 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3778, 308, 6}, // STRICT_VFROUND_NOEXCEPT_VL
917 {2, 4, 0, 0, 0, 3815, 10, 6}, // SUBD
918 {1, 5, 0, 0, 3, 3830, 328, 8}, // SUB_VL
919 {1, 2, 0|1<<SDNPHasChain, 0, 0, 3847, 87, 3}, // SWAP_CSR
920 {0, 1, 0|1<<SDNPHasChain, 0, 0, 3866, 73, 1}, // SW_GUARDED_BRIND
921 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 3893, 29, 1}, // SW_GUARDED_CALL
922 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 3919, 29, 1}, // SW_GUARDED_TAIL
923 {2, 1, 0, 0, 0, 3945, 16, 3}, // SplitF64
924 {2, 1, 0, 0, 0, 3964, 30, 3}, // SplitGPRPair
925 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 3987, 29, 1}, // TAIL
926 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4002, 372, 4}, // TH_LDD
927 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4019, 372, 4}, // TH_LWD
928 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4036, 372, 4}, // TH_LWUD
929 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4054, 372, 4}, // TH_SDD
930 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4071, 372, 4}, // TH_SWD
931 {1, 3, 0, 0, 2, 4088, 223, 5}, // TRUNCATE_VECTOR_VL
932 {1, 3, 0, 0, 2, 4117, 223, 5}, // TRUNCATE_VECTOR_VL_SSAT
933 {1, 3, 0, 0, 2, 4151, 223, 5}, // TRUNCATE_VECTOR_VL_USAT
934 {1, 2, 0, 0, 0, 4185, 296, 2}, // TUPLE_EXTRACT
935 {1, 3, 0, 0, 0, 4209, 393, 3}, // TUPLE_INSERT
936 {1, 5, 0, 0, 3, 4232, 328, 8}, // UADDSAT_VL
937 {1, 5, 0, 0, 3, 4253, 328, 8}, // UDIV_VL
938 {1, 3, 0, 0, 2, 4271, 107, 6}, // UINT_TO_FP_VL
939 {1, 5, 0, 0, 3, 4295, 328, 8}, // UMAX_VL
940 {1, 5, 0, 0, 3, 4313, 328, 8}, // UMIN_VL
941 {1, 1, 0, 0, 0, 4331, 302, 2}, // UNZIP
942 {1, 5, 0, 0, 3, 4347, 328, 8}, // UREM_VL
943 {1, 2, 0, 0, 0, 4365, 322, 3}, // USATI
944 {1, 5, 0, 0, 3, 4381, 328, 8}, // USUBSAT_VL
945 {1, 3, 0, 0, 2, 4402, 38, 6}, // VCPOP_VL
946 {1, 5, 0, 0, 3, 4421, 328, 8}, // VDOTA4SU_VL
947 {1, 5, 0, 0, 3, 4443, 328, 8}, // VDOTA4U_VL
948 {1, 5, 0, 0, 3, 4464, 328, 8}, // VDOTA4_VL
949 {1, 6, 0, 0, 2, 4484, 260, 8}, // VECREDUCE_ADD_VL
950 {1, 6, 0, 0, 2, 4511, 260, 8}, // VECREDUCE_AND_VL
951 {1, 6, 0, 0, 2, 4538, 260, 8}, // VECREDUCE_FADD_VL
952 {1, 6, 0, 0, 2, 4566, 260, 8}, // VECREDUCE_FMAX_VL
953 {1, 6, 0, 0, 2, 4594, 260, 8}, // VECREDUCE_FMIN_VL
954 {1, 6, 0, 0, 2, 4622, 260, 8}, // VECREDUCE_OR_VL
955 {1, 6, 0, 0, 2, 4648, 260, 8}, // VECREDUCE_SEQ_FADD_VL
956 {1, 6, 0, 0, 2, 4680, 260, 8}, // VECREDUCE_SMAX_VL
957 {1, 6, 0, 0, 2, 4708, 260, 8}, // VECREDUCE_SMIN_VL
958 {1, 6, 0, 0, 2, 4736, 260, 8}, // VECREDUCE_UMAX_VL
959 {1, 6, 0, 0, 2, 4764, 260, 8}, // VECREDUCE_UMIN_VL
960 {1, 6, 0, 0, 2, 4792, 260, 8}, // VECREDUCE_XOR_VL
961 {1, 4, 0, 0, 2, 4819, 106, 7}, // VFCVT_RM_F_XU_VL
962 {1, 4, 0, 0, 2, 4846, 106, 7}, // VFCVT_RM_F_X_VL
963 {1, 4, 0, 0, 2, 4872, 90, 7}, // VFCVT_RM_XU_F_VL
964 {1, 4, 0, 0, 2, 4899, 90, 7}, // VFCVT_RM_X_F_VL
965 {1, 3, 0, 0, 2, 4925, 91, 6}, // VFCVT_RTZ_XU_F_VL
966 {1, 3, 0, 0, 2, 4953, 91, 6}, // VFCVT_RTZ_X_F_VL
967 {1, 3, 0, 0, 2, 4980, 38, 6}, // VFIRST_VL
968 {1, 5, 0, 0, 2, 5000, 355, 8}, // VFMADD_VL
969 {1, 5, 0, 0, 3, 5020, 343, 8}, // VFMAX_VL
970 {1, 5, 0, 0, 3, 5039, 343, 8}, // VFMIN_VL
971 {1, 5, 0, 0, 2, 5058, 355, 8}, // VFMSUB_VL
972 {1, 3, 0, 0, 0, 5078, 304, 4}, // VFMV_S_F_VL
973 {1, 3, 0, 0, 0, 5100, 162, 5}, // VFMV_V_F_VL
974 {1, 3, 0, 0, 2, 5122, 113, 7}, // VFNCVT_ROD_VL
975 {1, 5, 0, 0, 2, 5146, 355, 8}, // VFNMADD_VL
976 {1, 5, 0, 0, 2, 5167, 355, 8}, // VFNMSUB_VL
977 {1, 3, 0, 0, 2, 5188, 308, 6}, // VFROUND_NOEXCEPT_VL
978 {1, 5, 0, 0, 2, 5218, 276, 8}, // VFSLIDE1DOWN_VL
979 {1, 5, 0, 0, 2, 5244, 276, 8}, // VFSLIDE1UP_VL
980 {1, 5, 0, 0, 3, 5268, 167, 10}, // VFWADD_VL
981 {1, 5, 0, 0, 3, 5288, 152, 10}, // VFWADD_W_VL
982 {1, 5, 0, 0, 2, 5310, 177, 11}, // VFWMADD_VL
983 {1, 5, 0, 0, 2, 5331, 177, 11}, // VFWMSUB_VL
984 {1, 5, 0, 0, 3, 5352, 167, 10}, // VFWMUL_VL
985 {1, 5, 0, 0, 2, 5372, 177, 11}, // VFWNMADD_VL
986 {1, 5, 0, 0, 2, 5394, 177, 11}, // VFWNMSUB_VL
987 {1, 5, 0, 0, 3, 5416, 167, 10}, // VFWSUB_VL
988 {1, 5, 0, 0, 3, 5436, 152, 10}, // VFWSUB_W_VL
989 {1, 2, 0, 0, 2, 5458, 292, 4}, // VID_VL
990 {1, 3, 0, 0, 0, 5475, 363, 4}, // VMAND_VL
991 {1, 1, 0, 0, 0, 5494, 383, 2}, // VMCLR_VL
992 {1, 5, 0, 0, 1, 5513, 252, 8}, // VMERGE_VL
993 {1, 3, 0, 0, 0, 5533, 363, 4}, // VMOR_VL
994 {1, 1, 0, 0, 0, 5551, 383, 2}, // VMSET_VL
995 {1, 3, 0, 0, 0, 5570, 300, 4}, // VMV_S_X_VL
996 {1, 3, 0, 0, 0, 5591, 188, 4}, // VMV_V_V_VL
997 {1, 3, 0, 0, 0, 5612, 127, 5}, // VMV_V_X_VL
998 {1, 1, 0, 0, 0, 5633, 97, 3}, // VMV_X_S
999 {1, 3, 0, 0, 0, 5651, 363, 4}, // VMXOR_VL
1000 {1, 5, 0, 0, 2, 5670, 208, 9}, // VRGATHEREI16_VV_VL
1001 {1, 5, 0, 0, 2, 5699, 199, 9}, // VRGATHER_VV_VL
1002 {1, 5, 0, 0, 2, 5724, 192, 7}, // VRGATHER_VX_VL
1003 {1, 3, 0, 0, 2, 5749, 228, 5}, // VSEXT_VL
1004 {1, 5, 0, 0, 2, 5768, 268, 8}, // VSLIDE1DOWN_VL
1005 {1, 5, 0, 0, 2, 5793, 268, 8}, // VSLIDE1UP_VL
1006 {1, 6, 0, 0, 2, 5816, 284, 8}, // VSLIDEDOWN_VL
1007 {1, 6, 0, 0, 2, 5840, 284, 8}, // VSLIDEUP_VL
1008 {1, 5, 0, 0, 3, 5862, 142, 10}, // VWABDAU_VL
1009 {1, 5, 0, 0, 3, 5883, 142, 10}, // VWABDA_VL
1010 {1, 5, 0, 0, 3, 5903, 142, 10}, // VWADDU_VL
1011 {1, 5, 0, 0, 3, 5923, 132, 10}, // VWADDU_W_VL
1012 {1, 5, 0, 0, 3, 5945, 142, 10}, // VWADD_VL
1013 {1, 5, 0, 0, 3, 5964, 132, 10}, // VWADD_W_VL
1014 {1, 5, 0, 0, 2, 5985, 142, 10}, // VWMACCSU_VL
1015 {1, 5, 0, 0, 2, 6007, 142, 10}, // VWMACCU_VL
1016 {1, 5, 0, 0, 2, 6028, 142, 10}, // VWMACC_VL
1017 {1, 5, 0, 0, 3, 6048, 142, 10}, // VWMULSU_VL
1018 {1, 5, 0, 0, 3, 6069, 142, 10}, // VWMULU_VL
1019 {1, 5, 0, 0, 3, 6089, 142, 10}, // VWMUL_VL
1020 {1, 5, 0, 0, 3, 6108, 142, 10}, // VWSLL_VL
1021 {1, 5, 0, 0, 3, 6127, 142, 10}, // VWSUBU_VL
1022 {1, 5, 0, 0, 3, 6147, 132, 10}, // VWSUBU_W_VL
1023 {1, 5, 0, 0, 3, 6169, 142, 10}, // VWSUB_VL
1024 {1, 5, 0, 0, 3, 6188, 132, 10}, // VWSUB_W_VL
1025 {1, 3, 0, 0, 2, 6209, 228, 5}, // VZEXT_VL
1026 {2, 4, 0, 0, 0, 6228, 4, 6}, // WADDAU
1027 {2, 2, 0, 0, 0, 6245, 351, 4}, // WADDU
1028 {2, 2, 0, 0, 0, 6261, 351, 4}, // WMULSU
1029 {0, 2, 0|1<<SDNPHasChain, 0, 0, 6278, 88, 2}, // WRITE_CSR
1030 {2, 2, 0, 0, 0, 6298, 0, 4}, // WSLA
1031 {2, 2, 0, 0, 0, 6313, 0, 4}, // WSLL
1032 {2, 4, 0, 0, 0, 6328, 4, 6}, // WSUBAU
1033 {2, 2, 0, 0, 0, 6345, 351, 4}, // WSUBU
1034 {1, 5, 0, 0, 3, 6361, 328, 8}, // XOR_VL
1035 {1, 1, 0, 0, 0, 6378, 302, 2}, // ZIP
1036};
1037
1038static const SDNodeInfo RISCVGenSDNodeInfo(
1039 /*NumOpcodes=*/302, RISCVSDNodeDescs, RISCVSDNodeNames,
1040 RISCVVTByHwModeTable, RISCVSDTypeConstraints);
1041
1042} // namespace llvm
1043
1044#endif // GET_SDNODE_DESC
1045
1046