1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target SDNode descriptions *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: RISCV.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10#ifdef GET_SDNODE_ENUM
11#undef GET_SDNODE_ENUM
12
13namespace llvm::RISCVISD {
14
15enum GenNodeType : unsigned {
16 ABDS_VL = ISD::BUILTIN_OP_END,
17 ABDU_VL,
18 ABSW,
19 ADDD,
20 ADD_LO,
21 ADD_TPREL,
22 ADD_VL,
23 AND_VL,
24 AVGCEILS_VL,
25 AVGCEILU_VL,
26 AVGFLOORS_VL,
27 AVGFLOORU_VL,
28 BITREVERSE_VL,
29 BREV8,
30 BR_CC,
31 BSWAP_VL,
32 BuildGPRPair,
33 BuildPairF64,
34 BuildPairGPRVec,
35 CALL,
36 CLEAR_CSR,
37 CLMULH_VL,
38 CLMUL_VL,
39 CLSW,
40 CLZW,
41 CTLZ_VL,
42 CTPOP_VL,
43 CTTZ_VL,
44 CTZW,
45 CZERO_EQZ,
46 CZERO_NEZ,
47 DIVUW,
48 DIVW,
49 FABS_VL,
50 FADD_VL,
51 FCLASS,
52 FCLASS_VL,
53 FCOPYSIGN_VL,
54 FCVT_WU_RV64,
55 FCVT_W_RV64,
56 FCVT_X,
57 FCVT_XU,
58 FDIV_VL,
59 FLI,
60 FMAX,
61 FMIN,
62 FMUL_VL,
63 FMV_H_X,
64 FMV_W_X_RV64,
65 FMV_X_ANYEXTH,
66 FMV_X_ANYEXTW_RV64,
67 FMV_X_SIGNEXTH,
68 FNEG_VL,
69 FP_EXTEND_VL,
70 FP_ROUND_VL,
71 FROUND,
72 FSGNJX,
73 FSQRT_VL,
74 FSUB_VL,
75 HI,
76 LD_RV32,
77 LLA,
78 LPAD_CALL,
79 LPAD_CALL_INDIRECT,
80 MERGE,
81 MHACC,
82 MHACCSU,
83 MHACCSU_HALF_0,
84 MHACCSU_HALF_1,
85 MHACCU,
86 MHACC_HALF_0,
87 MHACC_HALF_1,
88 MHRACC,
89 MHRACCSU,
90 MHRACCU,
91 MNRET_GLUE,
92 MOP_R,
93 MOP_RR,
94 MQACC_HALVES_00,
95 MQACC_HALVES_01,
96 MQACC_HALVES_11,
97 MQRACC_HALVES_00,
98 MQRACC_HALVES_01,
99 MQRACC_HALVES_11,
100 MQRWACC,
101 MQWACC,
102 MRET_GLUE,
103 MULHR,
104 MULHRSU,
105 MULHRU,
106 MULHSU,
107 MULHSU_H0,
108 MULHSU_H1,
109 MULHS_VL,
110 MULHU_VL,
111 MULH_H0,
112 MULH_H1,
113 MULQ,
114 MULQR,
115 MUL_VL,
116 NCLIP,
117 NCLIPU,
118 NDS_FMV_BF16_X,
119 NDS_FMV_X_ANYEXTBF16,
120 NEGW_MAX,
121 NSRA,
122 NSRL,
123 ORC_B,
124 OR_VL,
125 PM2ADD,
126 PM2ADDAU_H,
127 PM2ADDA_H,
128 PM2ADDSU,
129 PM2ADDU,
130 PM2ADDU_H,
131 PM2ADD_H,
132 PM2ADD_X,
133 PM2SADD,
134 PM2SADD_X,
135 PM2SUB,
136 PM2SUBA_H,
137 PM2SUB_H,
138 PM2SUB_X,
139 PM2WADD,
140 PM2WADDA,
141 PM2WADDASU,
142 PM2WADDAU,
143 PM2WADDSU,
144 PM2WADDU,
145 PM2WADD_X,
146 PM2WSUB,
147 PM2WSUB_X,
148 PM4ADD,
149 PM4ADDSU,
150 PM4ADDU,
151 PMACCSU_HALVES_00,
152 PMACCSU_HALVES_11,
153 PMACCU_HALVES_00,
154 PMACCU_HALVES_01,
155 PMACCU_HALVES_11,
156 PMACC_HALVES_00,
157 PMACC_HALVES_01,
158 PMACC_HALVES_11,
159 PMQ2ADD,
160 PMQR2ADD,
161 PMQRWACC_H,
162 PMQWACC_H,
163 PMULHSU_H_B0,
164 PMULHSU_H_B1,
165 PMULHSU_W_H0,
166 PMULHSU_W_H1,
167 PMULH_H_B0,
168 PMULH_H_B1,
169 PMULH_W_H0,
170 PMULH_W_H1,
171 PMULSU_HALVES_00,
172 PMULSU_HALVES_11,
173 PMULU_HALVES_00,
174 PMULU_HALVES_01,
175 PMULU_HALVES_11,
176 PMUL_HALVES_00,
177 PMUL_HALVES_01,
178 PMUL_HALVES_11,
179 PNCLIP,
180 PNCLIPP,
181 PNCLIPR,
182 PNCLIPRU,
183 PNCLIPU,
184 PNCLIPUP,
185 PNSRA,
186 PNSRAR,
187 PNSRL,
188 PPAIRE,
189 PPAIREO,
190 PPAIRO,
191 PPAIROE,
192 PROBED_ALLOCA,
193 PSABS,
194 PSLL,
195 PSRA,
196 PSRL,
197 PSSHA,
198 PSSHAR,
199 PSSHL,
200 PSSHLR,
201 PUNZIPE,
202 PUNZIPO,
203 PWMUL,
204 PWMULSU,
205 PWMULU,
206 PWSLA,
207 PWSLL,
208 PWZIP,
209 PZIP,
210 QC_C_MILEAVERET_GLUE,
211 QC_E_LI,
212 QC_INSB,
213 QC_MULIADD,
214 QC_SETWMI,
215 READ_COUNTER_WIDE,
216 READ_CSR,
217 READ_VLENB,
218 REMUW,
219 RET_GLUE,
220 ROLW,
221 RORW,
222 ROTL_VL,
223 ROTR_VL,
224 SADDSAT_VL,
225 SATI,
226 SDIV_VL,
227 SD_RV32,
228 SELECT_CC,
229 SETCC_VL,
230 SET_CSR,
231 SF_VC_FVV_SE,
232 SF_VC_FVW_SE,
233 SF_VC_FV_SE,
234 SF_VC_IVV_SE,
235 SF_VC_IVW_SE,
236 SF_VC_IV_SE,
237 SF_VC_VVV_SE,
238 SF_VC_VVW_SE,
239 SF_VC_VV_SE,
240 SF_VC_V_FVV_SE,
241 SF_VC_V_FVW_SE,
242 SF_VC_V_FV_SE,
243 SF_VC_V_IVV_SE,
244 SF_VC_V_IVW_SE,
245 SF_VC_V_IV_SE,
246 SF_VC_V_I_SE,
247 SF_VC_V_VVV_SE,
248 SF_VC_V_VVW_SE,
249 SF_VC_V_VV_SE,
250 SF_VC_V_XVV_SE,
251 SF_VC_V_XVW_SE,
252 SF_VC_V_XV_SE,
253 SF_VC_V_X_SE,
254 SF_VC_XVV_SE,
255 SF_VC_XVW_SE,
256 SF_VC_XV_SE,
257 SHA256SIG0,
258 SHA256SIG1,
259 SHA256SUM0,
260 SHA256SUM1,
261 SHL_ADD,
262 SHL_VL,
263 SINT_TO_FP_VL,
264 SLLW,
265 SM3P0,
266 SM3P1,
267 SM4ED,
268 SM4KS,
269 SMAX_VL,
270 SMIN_VL,
271 SPLAT_VECTOR_SPLIT_I64_VL,
272 SRAW,
273 SRA_VL,
274 SREM_VL,
275 SRET_GLUE,
276 SRLW,
277 SRL_VL,
278 SSUBSAT_VL,
279 STRICT_FADD_VL,
280 STRICT_FCVT_WU_RV64,
281 STRICT_FCVT_W_RV64,
282 STRICT_FDIV_VL,
283 STRICT_FMUL_VL,
284 STRICT_FP_EXTEND_VL,
285 STRICT_FP_ROUND_VL,
286 STRICT_FSETCCS_VL,
287 STRICT_FSETCC_VL,
288 STRICT_FSQRT_VL,
289 STRICT_FSUB_VL,
290 STRICT_SINT_TO_FP_VL,
291 STRICT_UINT_TO_FP_VL,
292 STRICT_VFCVT_RM_X_F_VL,
293 STRICT_VFCVT_RTZ_XU_F_VL,
294 STRICT_VFCVT_RTZ_X_F_VL,
295 STRICT_VFMADD_VL,
296 STRICT_VFMSUB_VL,
297 STRICT_VFNCVT_ROD_VL,
298 STRICT_VFNMADD_VL,
299 STRICT_VFNMSUB_VL,
300 STRICT_VFROUND_NOEXCEPT_VL,
301 SUBD,
302 SUB_VL,
303 SWAP_CSR,
304 SW_GUARDED_BRIND,
305 SW_GUARDED_CALL,
306 SW_GUARDED_TAIL,
307 SplitF64,
308 SplitGPRPair,
309 SplitGPRVec,
310 TAIL,
311 TH_LDD,
312 TH_LWD,
313 TH_LWUD,
314 TH_SDD,
315 TH_SWD,
316 TRUNCATE_VECTOR_VL,
317 TRUNCATE_VECTOR_VL_SSAT,
318 TRUNCATE_VECTOR_VL_USAT,
319 TUPLE_CAST,
320 TUPLE_EXTRACT,
321 TUPLE_INSERT,
322 UADDSAT_VL,
323 UDIV_VL,
324 UINT_TO_FP_VL,
325 UMAX_VL,
326 UMIN_VL,
327 UNZIP,
328 UREM_VL,
329 USATI,
330 USUBSAT_VL,
331 VCPOP_VL,
332 VDOT4ASU_VL,
333 VDOT4AU_VL,
334 VDOT4A_VL,
335 VECREDUCE_ADD_VL,
336 VECREDUCE_AND_VL,
337 VECREDUCE_FADD_VL,
338 VECREDUCE_FMAX_VL,
339 VECREDUCE_FMIN_VL,
340 VECREDUCE_OR_VL,
341 VECREDUCE_SEQ_FADD_VL,
342 VECREDUCE_SMAX_VL,
343 VECREDUCE_SMIN_VL,
344 VECREDUCE_UMAX_VL,
345 VECREDUCE_UMIN_VL,
346 VECREDUCE_XOR_VL,
347 VFCVT_RM_F_XU_VL,
348 VFCVT_RM_F_X_VL,
349 VFCVT_RM_XU_F_VL,
350 VFCVT_RM_X_F_VL,
351 VFCVT_RTZ_XU_F_VL,
352 VFCVT_RTZ_X_F_VL,
353 VFIRST_VL,
354 VFMADD_VL,
355 VFMAX_VL,
356 VFMIN_VL,
357 VFMSUB_VL,
358 VFMV_S_F_VL,
359 VFMV_V_F_VL,
360 VFNCVT_ROD_VL,
361 VFNMADD_VL,
362 VFNMSUB_VL,
363 VFROUND_NOEXCEPT_VL,
364 VFSLIDE1DOWN_VL,
365 VFSLIDE1UP_VL,
366 VFWADD_VL,
367 VFWADD_W_VL,
368 VFWMADD_VL,
369 VFWMSUB_VL,
370 VFWMUL_VL,
371 VFWNMADD_VL,
372 VFWNMSUB_VL,
373 VFWSUB_VL,
374 VFWSUB_W_VL,
375 VID_VL,
376 VMAND_VL,
377 VMCLR_VL,
378 VMERGE_VL,
379 VMOR_VL,
380 VMSET_VL,
381 VMV_S_X_VL,
382 VMV_V_V_VL,
383 VMV_V_X_VL,
384 VMV_X_S,
385 VMXOR_VL,
386 VPAIRE_VL,
387 VPAIRO_VL,
388 VRGATHEREI16_VV_VL,
389 VRGATHER_VV_VL,
390 VRGATHER_VX_VL,
391 VSEXT_VL,
392 VSLIDE1DOWN_VL,
393 VSLIDE1UP_VL,
394 VSLIDEDOWN_VL,
395 VSLIDEUP_VL,
396 VUNZIPE_VL,
397 VUNZIPO_VL,
398 VWABDAU_VL,
399 VWABDA_VL,
400 VWADDU_VL,
401 VWADDU_W_VL,
402 VWADD_VL,
403 VWADD_W_VL,
404 VWMACCSU_VL,
405 VWMACCU_VL,
406 VWMACC_VL,
407 VWMULSU_VL,
408 VWMULU_VL,
409 VWMUL_VL,
410 VWSLL_VL,
411 VWSUBU_VL,
412 VWSUBU_W_VL,
413 VWSUB_VL,
414 VWSUB_W_VL,
415 VZEXT_VL,
416 VZIP_VL,
417 WADD,
418 WADDA,
419 WADDAU,
420 WADDU,
421 WMACC,
422 WMACCSU,
423 WMACCU,
424 WMULSU,
425 WRITE_CSR,
426 WSLA,
427 WSLL,
428 WSUB,
429 WSUBA,
430 WSUBAU,
431 WSUBU,
432 XOR_VL,
433 ZIP,
434};
435
436static constexpr unsigned GENERATED_OPCODE_END = ZIP + 1;
437
438} // namespace llvm::RISCVISD
439
440#endif // GET_SDNODE_ENUM
441
442#ifdef GET_SDNODE_DESC
443#undef GET_SDNODE_DESC
444
445namespace llvm {
446
447
448#ifdef __GNUC__
449#pragma GCC diagnostic push
450#pragma GCC diagnostic ignored "-Woverlength-strings"
451#endif
452static constexpr char RISCVSDNodeNamesStorage[] =
453 "\0"
454 "RISCVISD::ABDS_VL\0"
455 "RISCVISD::ABDU_VL\0"
456 "RISCVISD::ABSW\0"
457 "RISCVISD::ADDD\0"
458 "RISCVISD::ADD_LO\0"
459 "RISCVISD::ADD_TPREL\0"
460 "RISCVISD::ADD_VL\0"
461 "RISCVISD::AND_VL\0"
462 "RISCVISD::AVGCEILS_VL\0"
463 "RISCVISD::AVGCEILU_VL\0"
464 "RISCVISD::AVGFLOORS_VL\0"
465 "RISCVISD::AVGFLOORU_VL\0"
466 "RISCVISD::BITREVERSE_VL\0"
467 "RISCVISD::BREV8\0"
468 "RISCVISD::BR_CC\0"
469 "RISCVISD::BSWAP_VL\0"
470 "RISCVISD::BuildGPRPair\0"
471 "RISCVISD::BuildPairF64\0"
472 "RISCVISD::BuildPairGPRVec\0"
473 "RISCVISD::CALL\0"
474 "RISCVISD::CLEAR_CSR\0"
475 "RISCVISD::CLMULH_VL\0"
476 "RISCVISD::CLMUL_VL\0"
477 "RISCVISD::CLSW\0"
478 "RISCVISD::CLZW\0"
479 "RISCVISD::CTLZ_VL\0"
480 "RISCVISD::CTPOP_VL\0"
481 "RISCVISD::CTTZ_VL\0"
482 "RISCVISD::CTZW\0"
483 "RISCVISD::CZERO_EQZ\0"
484 "RISCVISD::CZERO_NEZ\0"
485 "RISCVISD::DIVUW\0"
486 "RISCVISD::DIVW\0"
487 "RISCVISD::FABS_VL\0"
488 "RISCVISD::FADD_VL\0"
489 "RISCVISD::FCLASS\0"
490 "RISCVISD::FCLASS_VL\0"
491 "RISCVISD::FCOPYSIGN_VL\0"
492 "RISCVISD::FCVT_WU_RV64\0"
493 "RISCVISD::FCVT_W_RV64\0"
494 "RISCVISD::FCVT_X\0"
495 "RISCVISD::FCVT_XU\0"
496 "RISCVISD::FDIV_VL\0"
497 "RISCVISD::FLI\0"
498 "RISCVISD::FMAX\0"
499 "RISCVISD::FMIN\0"
500 "RISCVISD::FMUL_VL\0"
501 "RISCVISD::FMV_H_X\0"
502 "RISCVISD::FMV_W_X_RV64\0"
503 "RISCVISD::FMV_X_ANYEXTH\0"
504 "RISCVISD::FMV_X_ANYEXTW_RV64\0"
505 "RISCVISD::FMV_X_SIGNEXTH\0"
506 "RISCVISD::FNEG_VL\0"
507 "RISCVISD::FP_EXTEND_VL\0"
508 "RISCVISD::FP_ROUND_VL\0"
509 "RISCVISD::FROUND\0"
510 "RISCVISD::FSGNJX\0"
511 "RISCVISD::FSQRT_VL\0"
512 "RISCVISD::FSUB_VL\0"
513 "RISCVISD::HI\0"
514 "RISCVISD::LD_RV32\0"
515 "RISCVISD::LLA\0"
516 "RISCVISD::LPAD_CALL\0"
517 "RISCVISD::LPAD_CALL_INDIRECT\0"
518 "RISCVISD::MERGE\0"
519 "RISCVISD::MHACC\0"
520 "RISCVISD::MHACCSU\0"
521 "RISCVISD::MHACCSU_HALF_0\0"
522 "RISCVISD::MHACCSU_HALF_1\0"
523 "RISCVISD::MHACCU\0"
524 "RISCVISD::MHACC_HALF_0\0"
525 "RISCVISD::MHACC_HALF_1\0"
526 "RISCVISD::MHRACC\0"
527 "RISCVISD::MHRACCSU\0"
528 "RISCVISD::MHRACCU\0"
529 "RISCVISD::MNRET_GLUE\0"
530 "RISCVISD::MOP_R\0"
531 "RISCVISD::MOP_RR\0"
532 "RISCVISD::MQACC_HALVES_00\0"
533 "RISCVISD::MQACC_HALVES_01\0"
534 "RISCVISD::MQACC_HALVES_11\0"
535 "RISCVISD::MQRACC_HALVES_00\0"
536 "RISCVISD::MQRACC_HALVES_01\0"
537 "RISCVISD::MQRACC_HALVES_11\0"
538 "RISCVISD::MQRWACC\0"
539 "RISCVISD::MQWACC\0"
540 "RISCVISD::MRET_GLUE\0"
541 "RISCVISD::MULHR\0"
542 "RISCVISD::MULHRSU\0"
543 "RISCVISD::MULHRU\0"
544 "RISCVISD::MULHSU\0"
545 "RISCVISD::MULHSU_H0\0"
546 "RISCVISD::MULHSU_H1\0"
547 "RISCVISD::MULHS_VL\0"
548 "RISCVISD::MULHU_VL\0"
549 "RISCVISD::MULH_H0\0"
550 "RISCVISD::MULH_H1\0"
551 "RISCVISD::MULQ\0"
552 "RISCVISD::MULQR\0"
553 "RISCVISD::MUL_VL\0"
554 "RISCVISD::NCLIP\0"
555 "RISCVISD::NCLIPU\0"
556 "RISCVISD::NDS_FMV_BF16_X\0"
557 "RISCVISD::NDS_FMV_X_ANYEXTBF16\0"
558 "RISCVISD::NEGW_MAX\0"
559 "RISCVISD::NSRA\0"
560 "RISCVISD::NSRL\0"
561 "RISCVISD::ORC_B\0"
562 "RISCVISD::OR_VL\0"
563 "RISCVISD::PM2ADD\0"
564 "RISCVISD::PM2ADDAU_H\0"
565 "RISCVISD::PM2ADDA_H\0"
566 "RISCVISD::PM2ADDSU\0"
567 "RISCVISD::PM2ADDU\0"
568 "RISCVISD::PM2ADDU_H\0"
569 "RISCVISD::PM2ADD_H\0"
570 "RISCVISD::PM2ADD_X\0"
571 "RISCVISD::PM2SADD\0"
572 "RISCVISD::PM2SADD_X\0"
573 "RISCVISD::PM2SUB\0"
574 "RISCVISD::PM2SUBA_H\0"
575 "RISCVISD::PM2SUB_H\0"
576 "RISCVISD::PM2SUB_X\0"
577 "RISCVISD::PM2WADD\0"
578 "RISCVISD::PM2WADDA\0"
579 "RISCVISD::PM2WADDASU\0"
580 "RISCVISD::PM2WADDAU\0"
581 "RISCVISD::PM2WADDSU\0"
582 "RISCVISD::PM2WADDU\0"
583 "RISCVISD::PM2WADD_X\0"
584 "RISCVISD::PM2WSUB\0"
585 "RISCVISD::PM2WSUB_X\0"
586 "RISCVISD::PM4ADD\0"
587 "RISCVISD::PM4ADDSU\0"
588 "RISCVISD::PM4ADDU\0"
589 "RISCVISD::PMACCSU_HALVES_00\0"
590 "RISCVISD::PMACCSU_HALVES_11\0"
591 "RISCVISD::PMACCU_HALVES_00\0"
592 "RISCVISD::PMACCU_HALVES_01\0"
593 "RISCVISD::PMACCU_HALVES_11\0"
594 "RISCVISD::PMACC_HALVES_00\0"
595 "RISCVISD::PMACC_HALVES_01\0"
596 "RISCVISD::PMACC_HALVES_11\0"
597 "RISCVISD::PMQ2ADD\0"
598 "RISCVISD::PMQR2ADD\0"
599 "RISCVISD::PMQRWACC_H\0"
600 "RISCVISD::PMQWACC_H\0"
601 "RISCVISD::PMULHSU_H_B0\0"
602 "RISCVISD::PMULHSU_H_B1\0"
603 "RISCVISD::PMULHSU_W_H0\0"
604 "RISCVISD::PMULHSU_W_H1\0"
605 "RISCVISD::PMULH_H_B0\0"
606 "RISCVISD::PMULH_H_B1\0"
607 "RISCVISD::PMULH_W_H0\0"
608 "RISCVISD::PMULH_W_H1\0"
609 "RISCVISD::PMULSU_HALVES_00\0"
610 "RISCVISD::PMULSU_HALVES_11\0"
611 "RISCVISD::PMULU_HALVES_00\0"
612 "RISCVISD::PMULU_HALVES_01\0"
613 "RISCVISD::PMULU_HALVES_11\0"
614 "RISCVISD::PMUL_HALVES_00\0"
615 "RISCVISD::PMUL_HALVES_01\0"
616 "RISCVISD::PMUL_HALVES_11\0"
617 "RISCVISD::PNCLIP\0"
618 "RISCVISD::PNCLIPP\0"
619 "RISCVISD::PNCLIPR\0"
620 "RISCVISD::PNCLIPRU\0"
621 "RISCVISD::PNCLIPU\0"
622 "RISCVISD::PNCLIPUP\0"
623 "RISCVISD::PNSRA\0"
624 "RISCVISD::PNSRAR\0"
625 "RISCVISD::PNSRL\0"
626 "RISCVISD::PPAIRE\0"
627 "RISCVISD::PPAIREO\0"
628 "RISCVISD::PPAIRO\0"
629 "RISCVISD::PPAIROE\0"
630 "RISCVISD::PROBED_ALLOCA\0"
631 "RISCVISD::PSABS\0"
632 "RISCVISD::PSLL\0"
633 "RISCVISD::PSRA\0"
634 "RISCVISD::PSRL\0"
635 "RISCVISD::PSSHA\0"
636 "RISCVISD::PSSHAR\0"
637 "RISCVISD::PSSHL\0"
638 "RISCVISD::PSSHLR\0"
639 "RISCVISD::PUNZIPE\0"
640 "RISCVISD::PUNZIPO\0"
641 "RISCVISD::PWMUL\0"
642 "RISCVISD::PWMULSU\0"
643 "RISCVISD::PWMULU\0"
644 "RISCVISD::PWSLA\0"
645 "RISCVISD::PWSLL\0"
646 "RISCVISD::PWZIP\0"
647 "RISCVISD::PZIP\0"
648 "RISCVISD::QC_C_MILEAVERET_GLUE\0"
649 "RISCVISD::QC_E_LI\0"
650 "RISCVISD::QC_INSB\0"
651 "RISCVISD::QC_MULIADD\0"
652 "RISCVISD::QC_SETWMI\0"
653 "RISCVISD::READ_COUNTER_WIDE\0"
654 "RISCVISD::READ_CSR\0"
655 "RISCVISD::READ_VLENB\0"
656 "RISCVISD::REMUW\0"
657 "RISCVISD::RET_GLUE\0"
658 "RISCVISD::ROLW\0"
659 "RISCVISD::RORW\0"
660 "RISCVISD::ROTL_VL\0"
661 "RISCVISD::ROTR_VL\0"
662 "RISCVISD::SADDSAT_VL\0"
663 "RISCVISD::SATI\0"
664 "RISCVISD::SDIV_VL\0"
665 "RISCVISD::SD_RV32\0"
666 "RISCVISD::SELECT_CC\0"
667 "RISCVISD::SETCC_VL\0"
668 "RISCVISD::SET_CSR\0"
669 "RISCVISD::SF_VC_FVV_SE\0"
670 "RISCVISD::SF_VC_FVW_SE\0"
671 "RISCVISD::SF_VC_FV_SE\0"
672 "RISCVISD::SF_VC_IVV_SE\0"
673 "RISCVISD::SF_VC_IVW_SE\0"
674 "RISCVISD::SF_VC_IV_SE\0"
675 "RISCVISD::SF_VC_VVV_SE\0"
676 "RISCVISD::SF_VC_VVW_SE\0"
677 "RISCVISD::SF_VC_VV_SE\0"
678 "RISCVISD::SF_VC_V_FVV_SE\0"
679 "RISCVISD::SF_VC_V_FVW_SE\0"
680 "RISCVISD::SF_VC_V_FV_SE\0"
681 "RISCVISD::SF_VC_V_IVV_SE\0"
682 "RISCVISD::SF_VC_V_IVW_SE\0"
683 "RISCVISD::SF_VC_V_IV_SE\0"
684 "RISCVISD::SF_VC_V_I_SE\0"
685 "RISCVISD::SF_VC_V_VVV_SE\0"
686 "RISCVISD::SF_VC_V_VVW_SE\0"
687 "RISCVISD::SF_VC_V_VV_SE\0"
688 "RISCVISD::SF_VC_V_XVV_SE\0"
689 "RISCVISD::SF_VC_V_XVW_SE\0"
690 "RISCVISD::SF_VC_V_XV_SE\0"
691 "RISCVISD::SF_VC_V_X_SE\0"
692 "RISCVISD::SF_VC_XVV_SE\0"
693 "RISCVISD::SF_VC_XVW_SE\0"
694 "RISCVISD::SF_VC_XV_SE\0"
695 "RISCVISD::SHA256SIG0\0"
696 "RISCVISD::SHA256SIG1\0"
697 "RISCVISD::SHA256SUM0\0"
698 "RISCVISD::SHA256SUM1\0"
699 "RISCVISD::SHL_ADD\0"
700 "RISCVISD::SHL_VL\0"
701 "RISCVISD::SINT_TO_FP_VL\0"
702 "RISCVISD::SLLW\0"
703 "RISCVISD::SM3P0\0"
704 "RISCVISD::SM3P1\0"
705 "RISCVISD::SM4ED\0"
706 "RISCVISD::SM4KS\0"
707 "RISCVISD::SMAX_VL\0"
708 "RISCVISD::SMIN_VL\0"
709 "RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL\0"
710 "RISCVISD::SRAW\0"
711 "RISCVISD::SRA_VL\0"
712 "RISCVISD::SREM_VL\0"
713 "RISCVISD::SRET_GLUE\0"
714 "RISCVISD::SRLW\0"
715 "RISCVISD::SRL_VL\0"
716 "RISCVISD::SSUBSAT_VL\0"
717 "RISCVISD::STRICT_FADD_VL\0"
718 "RISCVISD::STRICT_FCVT_WU_RV64\0"
719 "RISCVISD::STRICT_FCVT_W_RV64\0"
720 "RISCVISD::STRICT_FDIV_VL\0"
721 "RISCVISD::STRICT_FMUL_VL\0"
722 "RISCVISD::STRICT_FP_EXTEND_VL\0"
723 "RISCVISD::STRICT_FP_ROUND_VL\0"
724 "RISCVISD::STRICT_FSETCCS_VL\0"
725 "RISCVISD::STRICT_FSETCC_VL\0"
726 "RISCVISD::STRICT_FSQRT_VL\0"
727 "RISCVISD::STRICT_FSUB_VL\0"
728 "RISCVISD::STRICT_SINT_TO_FP_VL\0"
729 "RISCVISD::STRICT_UINT_TO_FP_VL\0"
730 "RISCVISD::STRICT_VFCVT_RM_X_F_VL\0"
731 "RISCVISD::STRICT_VFCVT_RTZ_XU_F_VL\0"
732 "RISCVISD::STRICT_VFCVT_RTZ_X_F_VL\0"
733 "RISCVISD::STRICT_VFMADD_VL\0"
734 "RISCVISD::STRICT_VFMSUB_VL\0"
735 "RISCVISD::STRICT_VFNCVT_ROD_VL\0"
736 "RISCVISD::STRICT_VFNMADD_VL\0"
737 "RISCVISD::STRICT_VFNMSUB_VL\0"
738 "RISCVISD::STRICT_VFROUND_NOEXCEPT_VL\0"
739 "RISCVISD::SUBD\0"
740 "RISCVISD::SUB_VL\0"
741 "RISCVISD::SWAP_CSR\0"
742 "RISCVISD::SW_GUARDED_BRIND\0"
743 "RISCVISD::SW_GUARDED_CALL\0"
744 "RISCVISD::SW_GUARDED_TAIL\0"
745 "RISCVISD::SplitF64\0"
746 "RISCVISD::SplitGPRPair\0"
747 "RISCVISD::SplitGPRVec\0"
748 "RISCVISD::TAIL\0"
749 "RISCVISD::TH_LDD\0"
750 "RISCVISD::TH_LWD\0"
751 "RISCVISD::TH_LWUD\0"
752 "RISCVISD::TH_SDD\0"
753 "RISCVISD::TH_SWD\0"
754 "RISCVISD::TRUNCATE_VECTOR_VL\0"
755 "RISCVISD::TRUNCATE_VECTOR_VL_SSAT\0"
756 "RISCVISD::TRUNCATE_VECTOR_VL_USAT\0"
757 "RISCVISD::TUPLE_CAST\0"
758 "RISCVISD::TUPLE_EXTRACT\0"
759 "RISCVISD::TUPLE_INSERT\0"
760 "RISCVISD::UADDSAT_VL\0"
761 "RISCVISD::UDIV_VL\0"
762 "RISCVISD::UINT_TO_FP_VL\0"
763 "RISCVISD::UMAX_VL\0"
764 "RISCVISD::UMIN_VL\0"
765 "RISCVISD::UNZIP\0"
766 "RISCVISD::UREM_VL\0"
767 "RISCVISD::USATI\0"
768 "RISCVISD::USUBSAT_VL\0"
769 "RISCVISD::VCPOP_VL\0"
770 "RISCVISD::VDOT4ASU_VL\0"
771 "RISCVISD::VDOT4AU_VL\0"
772 "RISCVISD::VDOT4A_VL\0"
773 "RISCVISD::VECREDUCE_ADD_VL\0"
774 "RISCVISD::VECREDUCE_AND_VL\0"
775 "RISCVISD::VECREDUCE_FADD_VL\0"
776 "RISCVISD::VECREDUCE_FMAX_VL\0"
777 "RISCVISD::VECREDUCE_FMIN_VL\0"
778 "RISCVISD::VECREDUCE_OR_VL\0"
779 "RISCVISD::VECREDUCE_SEQ_FADD_VL\0"
780 "RISCVISD::VECREDUCE_SMAX_VL\0"
781 "RISCVISD::VECREDUCE_SMIN_VL\0"
782 "RISCVISD::VECREDUCE_UMAX_VL\0"
783 "RISCVISD::VECREDUCE_UMIN_VL\0"
784 "RISCVISD::VECREDUCE_XOR_VL\0"
785 "RISCVISD::VFCVT_RM_F_XU_VL\0"
786 "RISCVISD::VFCVT_RM_F_X_VL\0"
787 "RISCVISD::VFCVT_RM_XU_F_VL\0"
788 "RISCVISD::VFCVT_RM_X_F_VL\0"
789 "RISCVISD::VFCVT_RTZ_XU_F_VL\0"
790 "RISCVISD::VFCVT_RTZ_X_F_VL\0"
791 "RISCVISD::VFIRST_VL\0"
792 "RISCVISD::VFMADD_VL\0"
793 "RISCVISD::VFMAX_VL\0"
794 "RISCVISD::VFMIN_VL\0"
795 "RISCVISD::VFMSUB_VL\0"
796 "RISCVISD::VFMV_S_F_VL\0"
797 "RISCVISD::VFMV_V_F_VL\0"
798 "RISCVISD::VFNCVT_ROD_VL\0"
799 "RISCVISD::VFNMADD_VL\0"
800 "RISCVISD::VFNMSUB_VL\0"
801 "RISCVISD::VFROUND_NOEXCEPT_VL\0"
802 "RISCVISD::VFSLIDE1DOWN_VL\0"
803 "RISCVISD::VFSLIDE1UP_VL\0"
804 "RISCVISD::VFWADD_VL\0"
805 "RISCVISD::VFWADD_W_VL\0"
806 "RISCVISD::VFWMADD_VL\0"
807 "RISCVISD::VFWMSUB_VL\0"
808 "RISCVISD::VFWMUL_VL\0"
809 "RISCVISD::VFWNMADD_VL\0"
810 "RISCVISD::VFWNMSUB_VL\0"
811 "RISCVISD::VFWSUB_VL\0"
812 "RISCVISD::VFWSUB_W_VL\0"
813 "RISCVISD::VID_VL\0"
814 "RISCVISD::VMAND_VL\0"
815 "RISCVISD::VMCLR_VL\0"
816 "RISCVISD::VMERGE_VL\0"
817 "RISCVISD::VMOR_VL\0"
818 "RISCVISD::VMSET_VL\0"
819 "RISCVISD::VMV_S_X_VL\0"
820 "RISCVISD::VMV_V_V_VL\0"
821 "RISCVISD::VMV_V_X_VL\0"
822 "RISCVISD::VMV_X_S\0"
823 "RISCVISD::VMXOR_VL\0"
824 "RISCVISD::VPAIRE_VL\0"
825 "RISCVISD::VPAIRO_VL\0"
826 "RISCVISD::VRGATHEREI16_VV_VL\0"
827 "RISCVISD::VRGATHER_VV_VL\0"
828 "RISCVISD::VRGATHER_VX_VL\0"
829 "RISCVISD::VSEXT_VL\0"
830 "RISCVISD::VSLIDE1DOWN_VL\0"
831 "RISCVISD::VSLIDE1UP_VL\0"
832 "RISCVISD::VSLIDEDOWN_VL\0"
833 "RISCVISD::VSLIDEUP_VL\0"
834 "RISCVISD::VUNZIPE_VL\0"
835 "RISCVISD::VUNZIPO_VL\0"
836 "RISCVISD::VWABDAU_VL\0"
837 "RISCVISD::VWABDA_VL\0"
838 "RISCVISD::VWADDU_VL\0"
839 "RISCVISD::VWADDU_W_VL\0"
840 "RISCVISD::VWADD_VL\0"
841 "RISCVISD::VWADD_W_VL\0"
842 "RISCVISD::VWMACCSU_VL\0"
843 "RISCVISD::VWMACCU_VL\0"
844 "RISCVISD::VWMACC_VL\0"
845 "RISCVISD::VWMULSU_VL\0"
846 "RISCVISD::VWMULU_VL\0"
847 "RISCVISD::VWMUL_VL\0"
848 "RISCVISD::VWSLL_VL\0"
849 "RISCVISD::VWSUBU_VL\0"
850 "RISCVISD::VWSUBU_W_VL\0"
851 "RISCVISD::VWSUB_VL\0"
852 "RISCVISD::VWSUB_W_VL\0"
853 "RISCVISD::VZEXT_VL\0"
854 "RISCVISD::VZIP_VL\0"
855 "RISCVISD::WADD\0"
856 "RISCVISD::WADDA\0"
857 "RISCVISD::WADDAU\0"
858 "RISCVISD::WADDU\0"
859 "RISCVISD::WMACC\0"
860 "RISCVISD::WMACCSU\0"
861 "RISCVISD::WMACCU\0"
862 "RISCVISD::WMULSU\0"
863 "RISCVISD::WRITE_CSR\0"
864 "RISCVISD::WSLA\0"
865 "RISCVISD::WSLL\0"
866 "RISCVISD::WSUB\0"
867 "RISCVISD::WSUBA\0"
868 "RISCVISD::WSUBAU\0"
869 "RISCVISD::WSUBU\0"
870 "RISCVISD::XOR_VL\0"
871 "RISCVISD::ZIP\0"
872 ;
873#ifdef __GNUC__
874#pragma GCC diagnostic pop
875#endif
876
877static constexpr llvm::StringTable
878RISCVSDNodeNames = RISCVSDNodeNamesStorage;
879
880static const VTByHwModePair RISCVVTByHwModeTable[] = {
881 /* 0 */ {0, MVT::i32}, {1, MVT::i64},
882};
883
884static const SDTypeConstraint RISCVSDTypeConstraints[] = {
885 /* 0 */ {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32},
886 /* 4 */ {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32},
887 /* 7 */ {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
888 /* 13 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
889 /* 19 */ {SDTCisVT, 2, 0, 0, MVT::f64}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
890 /* 22 */ {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
891 /* 25 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
892 /* 29 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
893 /* 33 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
894 /* 37 */ {SDTCisVT, 2, 0, 0, MVT::Untyped}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
895 /* 40 */ {SDTCisVT, 1, 0, 0, MVT::bf16}, {SDTCisVT, 0, 0, 2, 0},
896 /* 42 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
897 /* 45 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
898 /* 51 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
899 /* 55 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
900 /* 59 */ {SDTCisVT, 1, 0, 0, MVT::f32}, {SDTCisVT, 0, 0, 0, MVT::i64},
901 /* 61 */ {SDTCisVT, 2, 0, 0, MVT::i64}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i64},
902 /* 64 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::bf16},
903 /* 66 */ {SDTCisVT, 1, 0, 0, MVT::i64}, {SDTCisVT, 0, 0, 0, MVT::f32},
904 /* 68 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::f64},
905 /* 71 */ {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 0, MVT::v2i16}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::v2i32},
906 /* 75 */ {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 0, MVT::v4i16}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::v2i32},
907 /* 79 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::v2i16}, {SDTCisVT, 0, 0, 0, MVT::v2i32},
908 /* 82 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::v4i16}, {SDTCisVT, 0, 0, 0, MVT::v2i32},
909 /* 85 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::Untyped},
910 /* 88 */ {SDTCisPtrTy, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
911 /* 89 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
912 /* 98 */ {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
913 /* 102 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
914 /* 105 */ {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
915 /* 108 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
916 /* 115 */ {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
917 /* 118 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
918 /* 122 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
919 /* 124 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
920 /* 131 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
921 /* 138 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
922 /* 145 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
923 /* 150 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
924 /* 160 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
925 /* 170 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
926 /* 180 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
927 /* 185 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
928 /* 195 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
929 /* 206 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
930 /* 210 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
931 /* 217 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
932 /* 226 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i16}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
933 /* 235 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i64}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
934 /* 241 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
935 /* 246 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
936 /* 251 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
937 /* 254 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
938 /* 259 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
939 /* 263 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
940 /* 268 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
941 /* 273 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 3, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSubVecOfVec, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
942 /* 280 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
943 /* 288 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
944 /* 293 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSubVecOfVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
945 /* 301 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
946 /* 304 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 2, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
947 /* 312 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
948 /* 320 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisEltOfVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
949 /* 328 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
950 /* 336 */ {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
951 /* 340 */ {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
952 /* 344 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSubVecOfVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
953 /* 347 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
954 /* 351 */ {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
955 /* 353 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
956 /* 355 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
957 /* 359 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
958 /* 363 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
959 /* 369 */ {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
960 /* 373 */ {SDTCisInt, 4, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
961 /* 378 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
962 /* 381 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
963 /* 384 */ {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
964 /* 387 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
965 /* 395 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 3, 0, 0, MVT::i1}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
966 /* 402 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
967 /* 410 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
968 /* 417 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
969 /* 421 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
970 /* 429 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
971 /* 433 */ {SDTCisSameSizeAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
972 /* 436 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
973 /* 441 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
974 /* 445 */ {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisVT, 2, 0, 0, MVT::Other}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
975 /* 448 */ {SDTCisVT, 0, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
976 /* 452 */ {SDTCisSameSizeAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
977 /* 456 */ {SDTCisSameSizeAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
978 /* 459 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1},
979 /* 461 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1},
980 /* 469 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
981 /* 471 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
982 /* 474 */ {SDTCisSameAs, 4, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
983};
984
985static const SDNodeDesc RISCVSDNodeDescs[] = {
986 {1, 5, 0, 0, 3, 1, 387, 8}, // ABDS_VL
987 {1, 5, 0, 0, 3, 19, 387, 8}, // ABDU_VL
988 {1, 1, 0, 0, 0, 37, 353, 2}, // ABSW
989 {2, 4, 0, 0, 0, 52, 13, 6}, // ADDD
990 {1, 2, 0, 0, 0, 67, 381, 3}, // ADD_LO
991 {1, 3, 0, 0, 0, 84, 417, 4}, // ADD_TPREL
992 {1, 5, 0, 0, 3, 104, 387, 8}, // ADD_VL
993 {1, 5, 0, 0, 3, 121, 387, 8}, // AND_VL
994 {1, 5, 0, 0, 3, 138, 387, 8}, // AVGCEILS_VL
995 {1, 5, 0, 0, 3, 160, 387, 8}, // AVGCEILU_VL
996 {1, 5, 0, 0, 3, 182, 387, 8}, // AVGFLOORS_VL
997 {1, 5, 0, 0, 3, 205, 387, 8}, // AVGFLOORU_VL
998 {1, 4, 0, 0, 3, 228, 395, 7}, // BITREVERSE_VL
999 {1, 1, 0, 0, 0, 252, 357, 2}, // BREV8
1000 {0, 4, 0|1<<SDNPHasChain, 0, 0, 268, 445, 3}, // BR_CC
1001 {1, 4, 0, 0, 3, 284, 395, 7}, // BSWAP_VL
1002 {1, 2, 0, 0, 0, 303, 85, 3}, // BuildGPRPair
1003 {1, 2, 0, 0, 0, 326, 68, 3}, // BuildPairF64
1004 {1, 2, 0, 0, 0, 349, 251, 3}, // BuildPairGPRVec
1005 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 375, 32, 1}, // CALL
1006 {0, 2, 0|1<<SDNPHasChain, 0, 0, 390, 106, 2}, // CLEAR_CSR
1007 {1, 5, 0, 0, 3, 410, 387, 8}, // CLMULH_VL
1008 {1, 5, 0, 0, 3, 430, 387, 8}, // CLMUL_VL
1009 {1, 1, 0, 0, 0, 449, 353, 2}, // CLSW
1010 {1, 1, 0, 0, 0, 464, 353, 2}, // CLZW
1011 {1, 4, 0, 0, 3, 479, 395, 7}, // CTLZ_VL
1012 {1, 4, 0, 0, 3, 497, 395, 7}, // CTPOP_VL
1013 {1, 4, 0, 0, 3, 516, 395, 7}, // CTTZ_VL
1014 {1, 1, 0, 0, 0, 534, 353, 2}, // CTZW
1015 {1, 2, 0, 0, 0, 549, 381, 3}, // CZERO_EQZ
1016 {1, 2, 0, 0, 0, 569, 381, 3}, // CZERO_NEZ
1017 {1, 2, 0, 0, 0, 589, 378, 3}, // DIVUW
1018 {1, 2, 0, 0, 0, 605, 378, 3}, // DIVW
1019 {1, 3, 0, 0, 2, 620, 363, 6}, // FABS_VL
1020 {1, 5, 0, 0, 3, 638, 402, 8}, // FADD_VL
1021 {1, 1, 0, 0, 0, 656, 43, 2}, // FCLASS
1022 {1, 3, 0, 0, 2, 673, 89, 9}, // FCLASS_VL
1023 {1, 5, 0, 0, 3, 693, 402, 8}, // FCOPYSIGN_VL
1024 {1, 2, 0, 0, 0, 716, 61, 3}, // FCVT_WU_RV64
1025 {1, 2, 0, 0, 0, 739, 61, 3}, // FCVT_W_RV64
1026 {1, 2, 0, 0, 0, 761, 42, 3}, // FCVT_X
1027 {1, 2, 0, 0, 0, 778, 42, 3}, // FCVT_XU
1028 {1, 5, 0, 0, 3, 796, 402, 8}, // FDIV_VL
1029 {1, 1, 0, 0, 0, 814, 122, 2}, // FLI
1030 {1, 2, 0, 0, 0, 828, 384, 3}, // FMAX
1031 {1, 2, 0, 0, 0, 843, 384, 3}, // FMIN
1032 {1, 5, 0, 0, 3, 858, 402, 8}, // FMUL_VL
1033 {1, 1, 0, 0, 0, 876, 122, 2}, // FMV_H_X
1034 {1, 1, 0, 0, 0, 894, 66, 2}, // FMV_W_X_RV64
1035 {1, 1, 0, 0, 0, 917, 43, 2}, // FMV_X_ANYEXTH
1036 {1, 1, 0, 0, 0, 941, 59, 2}, // FMV_X_ANYEXTW_RV64
1037 {1, 1, 0, 0, 0, 970, 43, 2}, // FMV_X_SIGNEXTH
1038 {1, 3, 0, 0, 2, 995, 363, 6}, // FNEG_VL
1039 {1, 3, 0, 0, 2, 1013, 138, 7}, // FP_EXTEND_VL
1040 {1, 3, 0, 0, 2, 1036, 131, 7}, // FP_ROUND_VL
1041 {1, 3, 0, 0, 0, 1058, 118, 4}, // FROUND
1042 {1, 2, 0, 0, 0, 1075, 119, 3}, // FSGNJX
1043 {1, 3, 0, 0, 2, 1092, 363, 6}, // FSQRT_VL
1044 {1, 5, 0, 0, 3, 1111, 402, 8}, // FSUB_VL
1045 {1, 1, 0, 0, 0, 1129, 357, 2}, // HI
1046 {2, 1, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1142, 22, 3}, // LD_RV32
1047 {1, 1, 0, 0, 0, 1160, 357, 2}, // LLA
1048 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1174, 32, 1}, // LPAD_CALL
1049 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1194, 32, 1}, // LPAD_CALL_INDIRECT
1050 {1, 3, 0, 0, 0, 1223, 98, 4}, // MERGE
1051 {1, 3, 0, 0, 0, 1239, 418, 3}, // MHACC
1052 {1, 3, 0, 0, 0, 1255, 418, 3}, // MHACCSU
1053 {1, 3, 0, 0, 0, 1273, 433, 3}, // MHACCSU_HALF_0
1054 {1, 3, 0, 0, 0, 1298, 433, 3}, // MHACCSU_HALF_1
1055 {1, 3, 0, 0, 0, 1323, 418, 3}, // MHACCU
1056 {1, 3, 0, 0, 0, 1340, 433, 3}, // MHACC_HALF_0
1057 {1, 3, 0, 0, 0, 1363, 433, 3}, // MHACC_HALF_1
1058 {1, 3, 0, 0, 0, 1386, 418, 3}, // MHRACC
1059 {1, 3, 0, 0, 0, 1403, 418, 3}, // MHRACCSU
1060 {1, 3, 0, 0, 0, 1422, 418, 3}, // MHRACCU
1061 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1440, 0, 0}, // MNRET_GLUE
1062 {1, 2, 0, 0, 0, 1461, 99, 3}, // MOP_R
1063 {1, 3, 0, 0, 0, 1477, 98, 4}, // MOP_RR
1064 {1, 3, 0, 0, 0, 1494, 452, 4}, // MQACC_HALVES_00
1065 {1, 3, 0, 0, 0, 1520, 452, 4}, // MQACC_HALVES_01
1066 {1, 3, 0, 0, 0, 1546, 452, 4}, // MQACC_HALVES_11
1067 {1, 3, 0, 0, 0, 1572, 452, 4}, // MQRACC_HALVES_00
1068 {1, 3, 0, 0, 0, 1599, 452, 4}, // MQRACC_HALVES_01
1069 {1, 3, 0, 0, 0, 1626, 452, 4}, // MQRACC_HALVES_11
1070 {2, 4, 0, 0, 0, 1653, 7, 6}, // MQRWACC
1071 {2, 4, 0, 0, 0, 1671, 7, 6}, // MQWACC
1072 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1688, 0, 0}, // MRET_GLUE
1073 {1, 2, 0, 0, 0, 1708, 381, 3}, // MULHR
1074 {1, 2, 0, 0, 0, 1724, 381, 3}, // MULHRSU
1075 {1, 2, 0, 0, 0, 1742, 381, 3}, // MULHRU
1076 {1, 2, 0, 0, 0, 1759, 381, 3}, // MULHSU
1077 {1, 2, 0, 0, 0, 1776, 450, 2}, // MULHSU_H0
1078 {1, 2, 0, 0, 0, 1796, 450, 2}, // MULHSU_H1
1079 {1, 5, 0, 0, 3, 1816, 387, 8}, // MULHS_VL
1080 {1, 5, 0, 0, 3, 1835, 387, 8}, // MULHU_VL
1081 {1, 2, 0, 0, 0, 1854, 450, 2}, // MULH_H0
1082 {1, 2, 0, 0, 0, 1872, 450, 2}, // MULH_H1
1083 {1, 2, 0, 0, 0, 1890, 381, 3}, // MULQ
1084 {1, 2, 0, 0, 0, 1905, 381, 3}, // MULQR
1085 {1, 5, 0, 0, 3, 1921, 387, 8}, // MUL_VL
1086 {1, 3, 0, 0, 0, 1938, 33, 4}, // NCLIP
1087 {1, 3, 0, 0, 0, 1954, 33, 4}, // NCLIPU
1088 {1, 1, 0, 0, 0, 1971, 64, 2}, // NDS_FMV_BF16_X
1089 {1, 1, 0, 0, 0, 1996, 40, 2}, // NDS_FMV_X_ANYEXTBF16
1090 {1, 1, 0, 0, 0, 2027, 357, 2}, // NEGW_MAX
1091 {1, 3, 0, 0, 0, 2046, 0, 4}, // NSRA
1092 {1, 3, 0, 0, 0, 2061, 0, 4}, // NSRL
1093 {1, 1, 0, 0, 0, 2076, 357, 2}, // ORC_B
1094 {1, 5, 0, 0, 3, 2092, 387, 8}, // OR_VL
1095 {1, 2, 0, 0, 0, 2108, 469, 2}, // PM2ADD
1096 {1, 3, 0, 0, 0, 2125, 75, 4}, // PM2ADDAU_H
1097 {1, 3, 0, 0, 0, 2146, 75, 4}, // PM2ADDA_H
1098 {1, 2, 0, 0, 0, 2166, 469, 2}, // PM2ADDSU
1099 {1, 2, 0, 0, 0, 2185, 469, 2}, // PM2ADDU
1100 {1, 2, 0, 0, 0, 2203, 82, 3}, // PM2ADDU_H
1101 {1, 2, 0, 0, 0, 2223, 82, 3}, // PM2ADD_H
1102 {1, 2, 0, 0, 0, 2242, 469, 2}, // PM2ADD_X
1103 {1, 2, 0, 0, 0, 2261, 469, 2}, // PM2SADD
1104 {1, 2, 0, 0, 0, 2279, 469, 2}, // PM2SADD_X
1105 {1, 2, 0, 0, 0, 2299, 469, 2}, // PM2SUB
1106 {1, 3, 0, 0, 0, 2316, 75, 4}, // PM2SUBA_H
1107 {1, 2, 0, 0, 0, 2336, 82, 3}, // PM2SUB_H
1108 {1, 2, 0, 0, 0, 2355, 469, 2}, // PM2SUB_X
1109 {1, 2, 0, 0, 0, 2374, 79, 3}, // PM2WADD
1110 {1, 3, 0, 0, 0, 2392, 71, 4}, // PM2WADDA
1111 {1, 3, 0, 0, 0, 2411, 71, 4}, // PM2WADDASU
1112 {1, 3, 0, 0, 0, 2432, 71, 4}, // PM2WADDAU
1113 {1, 2, 0, 0, 0, 2452, 79, 3}, // PM2WADDSU
1114 {1, 2, 0, 0, 0, 2472, 79, 3}, // PM2WADDU
1115 {1, 2, 0, 0, 0, 2491, 79, 3}, // PM2WADD_X
1116 {1, 2, 0, 0, 0, 2511, 79, 3}, // PM2WSUB
1117 {1, 2, 0, 0, 0, 2529, 79, 3}, // PM2WSUB_X
1118 {1, 2, 0, 0, 0, 2549, 469, 2}, // PM4ADD
1119 {1, 2, 0, 0, 0, 2566, 469, 2}, // PM4ADDSU
1120 {1, 2, 0, 0, 0, 2585, 469, 2}, // PM4ADDU
1121 {1, 3, 0, 0, 0, 2603, 456, 3}, // PMACCSU_HALVES_00
1122 {1, 3, 0, 0, 0, 2631, 456, 3}, // PMACCSU_HALVES_11
1123 {1, 3, 0, 0, 0, 2659, 456, 3}, // PMACCU_HALVES_00
1124 {1, 3, 0, 0, 0, 2686, 456, 3}, // PMACCU_HALVES_01
1125 {1, 3, 0, 0, 0, 2713, 456, 3}, // PMACCU_HALVES_11
1126 {1, 3, 0, 0, 0, 2740, 456, 3}, // PMACC_HALVES_00
1127 {1, 3, 0, 0, 0, 2766, 456, 3}, // PMACC_HALVES_01
1128 {1, 3, 0, 0, 0, 2792, 456, 3}, // PMACC_HALVES_11
1129 {1, 2, 0, 0, 0, 2818, 469, 2}, // PMQ2ADD
1130 {1, 2, 0, 0, 0, 2836, 469, 2}, // PMQR2ADD
1131 {1, 3, 0, 0, 0, 2855, 71, 4}, // PMQRWACC_H
1132 {1, 3, 0, 0, 0, 2876, 71, 4}, // PMQWACC_H
1133 {1, 2, 0, 0, 0, 2896, 450, 2}, // PMULHSU_H_B0
1134 {1, 2, 0, 0, 0, 2919, 450, 2}, // PMULHSU_H_B1
1135 {1, 2, 0, 0, 0, 2942, 450, 2}, // PMULHSU_W_H0
1136 {1, 2, 0, 0, 0, 2965, 450, 2}, // PMULHSU_W_H1
1137 {1, 2, 0, 0, 0, 2988, 450, 2}, // PMULH_H_B0
1138 {1, 2, 0, 0, 0, 3009, 450, 2}, // PMULH_H_B1
1139 {1, 2, 0, 0, 0, 3030, 450, 2}, // PMULH_W_H0
1140 {1, 2, 0, 0, 0, 3051, 450, 2}, // PMULH_W_H1
1141 {1, 2, 0, 0, 0, 3072, 336, 4}, // PMULSU_HALVES_00
1142 {1, 2, 0, 0, 0, 3099, 336, 4}, // PMULSU_HALVES_11
1143 {1, 2, 0, 0, 0, 3126, 336, 4}, // PMULU_HALVES_00
1144 {1, 2, 0, 0, 0, 3152, 336, 4}, // PMULU_HALVES_01
1145 {1, 2, 0, 0, 0, 3178, 336, 4}, // PMULU_HALVES_11
1146 {1, 2, 0, 0, 0, 3204, 336, 4}, // PMUL_HALVES_00
1147 {1, 2, 0, 0, 0, 3229, 336, 4}, // PMUL_HALVES_01
1148 {1, 2, 0, 0, 0, 3254, 336, 4}, // PMUL_HALVES_11
1149 {1, 2, 0, 0, 0, 3279, 301, 3}, // PNCLIP
1150 {1, 2, 0, 0, 0, 3296, 338, 2}, // PNCLIPP
1151 {1, 2, 0, 0, 0, 3314, 301, 3}, // PNCLIPR
1152 {1, 2, 0, 0, 0, 3332, 301, 3}, // PNCLIPRU
1153 {1, 2, 0, 0, 0, 3351, 301, 3}, // PNCLIPU
1154 {1, 2, 0, 0, 0, 3369, 338, 2}, // PNCLIPUP
1155 {1, 2, 0, 0, 0, 3388, 301, 3}, // PNSRA
1156 {1, 2, 0, 0, 0, 3404, 301, 3}, // PNSRAR
1157 {1, 2, 0, 0, 0, 3421, 301, 3}, // PNSRL
1158 {1, 2, 0, 0, 0, 3437, 207, 3}, // PPAIRE
1159 {1, 2, 0, 0, 0, 3454, 207, 3}, // PPAIREO
1160 {1, 2, 0, 0, 0, 3472, 207, 3}, // PPAIRO
1161 {1, 2, 0, 0, 0, 3489, 207, 3}, // PPAIROE
1162 {0, 1, 0|1<<SDNPHasChain, 0, 0, 3507, 88, 1}, // PROBED_ALLOCA
1163 {1, 1, 0, 0, 0, 3531, 208, 2}, // PSABS
1164 {1, 2, 0, 0, 0, 3547, 214, 3}, // PSLL
1165 {1, 2, 0, 0, 0, 3562, 214, 3}, // PSRA
1166 {1, 2, 0, 0, 0, 3577, 214, 3}, // PSRL
1167 {1, 2, 0, 0, 0, 3592, 214, 3}, // PSSHA
1168 {1, 2, 0, 0, 0, 3608, 214, 3}, // PSSHAR
1169 {1, 2, 0, 0, 0, 3625, 214, 3}, // PSSHL
1170 {1, 2, 0, 0, 0, 3641, 214, 3}, // PSSHLR
1171 {1, 2, 0, 0, 0, 3658, 207, 3}, // PUNZIPE
1172 {1, 2, 0, 0, 0, 3676, 207, 3}, // PUNZIPO
1173 {1, 2, 0, 0, 0, 3694, 340, 4}, // PWMUL
1174 {1, 2, 0, 0, 0, 3710, 340, 4}, // PWMULSU
1175 {1, 2, 0, 0, 0, 3728, 340, 4}, // PWMULU
1176 {1, 2, 0, 0, 0, 3745, 288, 5}, // PWSLA
1177 {1, 2, 0, 0, 0, 3761, 288, 5}, // PWSLL
1178 {1, 2, 0, 0, 0, 3777, 344, 3}, // PWZIP
1179 {1, 2, 0, 0, 0, 3793, 207, 3}, // PZIP
1180 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 3808, 0, 0}, // QC_C_MILEAVERET_GLUE
1181 {1, 1, 0, 0, 0, 3839, 357, 2}, // QC_E_LI
1182 {1, 4, 0, 0, 0, 3857, 373, 5}, // QC_INSB
1183 {1, 3, 0, 0, 0, 3875, 369, 4}, // QC_MULIADD
1184 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 3896, 441, 4}, // QC_SETWMI
1185 {2, 2, 0|1<<SDNPHasChain, 0, 0, 3916, 25, 4}, // READ_COUNTER_WIDE
1186 {1, 1, 0|1<<SDNPHasChain, 0, 0, 3944, 106, 2}, // READ_CSR
1187 {1, 0, 0, 0, 0, 3963, 32, 1}, // READ_VLENB
1188 {1, 2, 0, 0, 0, 3984, 378, 3}, // REMUW
1189 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 4000, 0, 0}, // RET_GLUE
1190 {1, 2, 0, 0, 0, 4019, 378, 3}, // ROLW
1191 {1, 2, 0, 0, 0, 4034, 378, 3}, // RORW
1192 {1, 5, 0, 0, 3, 4049, 387, 8}, // ROTL_VL
1193 {1, 5, 0, 0, 3, 4067, 387, 8}, // ROTR_VL
1194 {1, 5, 0, 0, 3, 4085, 387, 8}, // SADDSAT_VL
1195 {1, 2, 0, 0, 0, 4106, 102, 3}, // SATI
1196 {1, 5, 0, 0, 3, 4121, 387, 8}, // SDIV_VL
1197 {0, 3, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4139, 22, 3}, // SD_RV32
1198 {1, 5, 0, 0, 0, 4157, 474, 4}, // SELECT_CC
1199 {1, 6, 0, 0, 3, 4177, 461, 8}, // SETCC_VL
1200 {0, 2, 0|1<<SDNPHasChain, 0, 0, 4196, 106, 2}, // SET_CSR
1201 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4214, 51, 4}, // SF_VC_FVV_SE
1202 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4237, 55, 4}, // SF_VC_FVW_SE
1203 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4260, 448, 4}, // SF_VC_FV_SE
1204 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4282, 51, 4}, // SF_VC_IVV_SE
1205 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4305, 55, 4}, // SF_VC_IVW_SE
1206 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4328, 448, 4}, // SF_VC_IV_SE
1207 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4350, 51, 4}, // SF_VC_VVV_SE
1208 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4373, 55, 4}, // SF_VC_VVW_SE
1209 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4396, 448, 4}, // SF_VC_VV_SE
1210 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4418, 254, 5}, // SF_VC_V_FVV_SE
1211 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4443, 263, 5}, // SF_VC_V_FVW_SE
1212 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4468, 259, 4}, // SF_VC_V_FV_SE
1213 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4492, 254, 5}, // SF_VC_V_IVV_SE
1214 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4517, 263, 5}, // SF_VC_V_IVW_SE
1215 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4542, 259, 4}, // SF_VC_V_IV_SE
1216 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4566, 268, 5}, // SF_VC_V_I_SE
1217 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4589, 254, 5}, // SF_VC_V_VVV_SE
1218 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4614, 263, 5}, // SF_VC_V_VVW_SE
1219 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4639, 259, 4}, // SF_VC_V_VV_SE
1220 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4663, 254, 5}, // SF_VC_V_XVV_SE
1221 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4688, 263, 5}, // SF_VC_V_XVW_SE
1222 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4713, 259, 4}, // SF_VC_V_XV_SE
1223 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4737, 268, 5}, // SF_VC_V_X_SE
1224 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4760, 51, 4}, // SF_VC_XVV_SE
1225 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4783, 55, 4}, // SF_VC_XVW_SE
1226 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4806, 448, 4}, // SF_VC_XV_SE
1227 {1, 1, 0, 0, 0, 4828, 357, 2}, // SHA256SIG0
1228 {1, 1, 0, 0, 0, 4849, 357, 2}, // SHA256SIG1
1229 {1, 1, 0, 0, 0, 4870, 357, 2}, // SHA256SUM0
1230 {1, 1, 0, 0, 0, 4891, 357, 2}, // SHA256SUM1
1231 {1, 3, 0, 0, 0, 4912, 436, 5}, // SHL_ADD
1232 {1, 5, 0, 0, 3, 4930, 387, 8}, // SHL_VL
1233 {1, 3, 0, 0, 2, 4947, 125, 6}, // SINT_TO_FP_VL
1234 {1, 2, 0, 0, 0, 4971, 378, 3}, // SLLW
1235 {1, 1, 0, 0, 0, 4986, 357, 2}, // SM3P0
1236 {1, 1, 0, 0, 0, 5002, 357, 2}, // SM3P1
1237 {1, 3, 0, 0, 0, 5018, 29, 4}, // SM4ED
1238 {1, 3, 0, 0, 0, 5034, 29, 4}, // SM4KS
1239 {1, 5, 0, 0, 3, 5050, 387, 8}, // SMAX_VL
1240 {1, 5, 0, 0, 3, 5068, 387, 8}, // SMIN_VL
1241 {1, 4, 0, 0, 0, 5086, 235, 6}, // SPLAT_VECTOR_SPLIT_I64_VL
1242 {1, 2, 0, 0, 0, 5122, 378, 3}, // SRAW
1243 {1, 5, 0, 0, 3, 5137, 387, 8}, // SRA_VL
1244 {1, 5, 0, 0, 3, 5154, 387, 8}, // SREM_VL
1245 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 5172, 0, 0}, // SRET_GLUE
1246 {1, 2, 0, 0, 0, 5192, 378, 3}, // SRLW
1247 {1, 5, 0, 0, 3, 5207, 387, 8}, // SRL_VL
1248 {1, 5, 0, 0, 3, 5224, 387, 8}, // SSUBSAT_VL
1249 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 5245, 402, 8}, // STRICT_FADD_VL
1250 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 5270, 61, 3}, // STRICT_FCVT_WU_RV64
1251 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 5300, 61, 3}, // STRICT_FCVT_W_RV64
1252 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 5329, 402, 8}, // STRICT_FDIV_VL
1253 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 5354, 402, 8}, // STRICT_FMUL_VL
1254 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5379, 138, 7}, // STRICT_FP_EXTEND_VL
1255 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5409, 131, 7}, // STRICT_FP_ROUND_VL
1256 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5438, 461, 8}, // STRICT_FSETCCS_VL
1257 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5466, 461, 8}, // STRICT_FSETCC_VL
1258 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5493, 363, 6}, // STRICT_FSQRT_VL
1259 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 5519, 402, 8}, // STRICT_FSUB_VL
1260 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5544, 125, 6}, // STRICT_SINT_TO_FP_VL
1261 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5575, 125, 6}, // STRICT_UINT_TO_FP_VL
1262 {1, 4, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5606, 108, 7}, // STRICT_VFCVT_RM_X_F_VL
1263 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5639, 109, 6}, // STRICT_VFCVT_RTZ_XU_F_VL
1264 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5674, 109, 6}, // STRICT_VFCVT_RTZ_X_F_VL
1265 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5708, 421, 8}, // STRICT_VFMADD_VL
1266 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5735, 421, 8}, // STRICT_VFMSUB_VL
1267 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5762, 131, 7}, // STRICT_VFNCVT_ROD_VL
1268 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5793, 421, 8}, // STRICT_VFNMADD_VL
1269 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5821, 421, 8}, // STRICT_VFNMSUB_VL
1270 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5849, 363, 6}, // STRICT_VFROUND_NOEXCEPT_VL
1271 {2, 4, 0, 0, 0, 5886, 13, 6}, // SUBD
1272 {1, 5, 0, 0, 3, 5901, 387, 8}, // SUB_VL
1273 {1, 2, 0|1<<SDNPHasChain, 0, 0, 5918, 105, 3}, // SWAP_CSR
1274 {0, 1, 0|1<<SDNPHasChain, 0, 0, 5937, 88, 1}, // SW_GUARDED_BRIND
1275 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 5964, 32, 1}, // SW_GUARDED_CALL
1276 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 5990, 32, 1}, // SW_GUARDED_TAIL
1277 {2, 1, 0, 0, 0, 6016, 19, 3}, // SplitF64
1278 {2, 1, 0, 0, 0, 6035, 37, 3}, // SplitGPRPair
1279 {2, 1, 0, 0, 0, 6058, 4, 3}, // SplitGPRVec
1280 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 6080, 32, 1}, // TAIL
1281 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 6095, 441, 4}, // TH_LDD
1282 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 6112, 441, 4}, // TH_LWD
1283 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 6129, 441, 4}, // TH_LWUD
1284 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 6147, 441, 4}, // TH_SDD
1285 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 6164, 441, 4}, // TH_SWD
1286 {1, 3, 0, 0, 2, 6181, 241, 5}, // TRUNCATE_VECTOR_VL
1287 {1, 3, 0, 0, 2, 6210, 241, 5}, // TRUNCATE_VECTOR_VL_SSAT
1288 {1, 3, 0, 0, 2, 6244, 241, 5}, // TRUNCATE_VECTOR_VL_USAT
1289 {1, 1, 0, 0, 0, 6278, 0, 0}, // TUPLE_CAST
1290 {1, 2, 0, 0, 0, 6299, 351, 2}, // TUPLE_EXTRACT
1291 {1, 3, 0, 0, 0, 6323, 471, 3}, // TUPLE_INSERT
1292 {1, 5, 0, 0, 3, 6346, 387, 8}, // UADDSAT_VL
1293 {1, 5, 0, 0, 3, 6367, 387, 8}, // UDIV_VL
1294 {1, 3, 0, 0, 2, 6385, 125, 6}, // UINT_TO_FP_VL
1295 {1, 5, 0, 0, 3, 6409, 387, 8}, // UMAX_VL
1296 {1, 5, 0, 0, 3, 6427, 387, 8}, // UMIN_VL
1297 {1, 1, 0, 0, 0, 6445, 357, 2}, // UNZIP
1298 {1, 5, 0, 0, 3, 6461, 387, 8}, // UREM_VL
1299 {1, 2, 0, 0, 0, 6479, 102, 3}, // USATI
1300 {1, 5, 0, 0, 3, 6495, 387, 8}, // USUBSAT_VL
1301 {1, 3, 0, 0, 2, 6516, 45, 6}, // VCPOP_VL
1302 {1, 5, 0, 0, 3, 6535, 387, 8}, // VDOT4ASU_VL
1303 {1, 5, 0, 0, 3, 6557, 387, 8}, // VDOT4AU_VL
1304 {1, 5, 0, 0, 3, 6578, 387, 8}, // VDOT4A_VL
1305 {1, 6, 0, 0, 2, 6598, 304, 8}, // VECREDUCE_ADD_VL
1306 {1, 6, 0, 0, 2, 6625, 304, 8}, // VECREDUCE_AND_VL
1307 {1, 6, 0, 0, 2, 6652, 304, 8}, // VECREDUCE_FADD_VL
1308 {1, 6, 0, 0, 2, 6680, 304, 8}, // VECREDUCE_FMAX_VL
1309 {1, 6, 0, 0, 2, 6708, 304, 8}, // VECREDUCE_FMIN_VL
1310 {1, 6, 0, 0, 2, 6736, 304, 8}, // VECREDUCE_OR_VL
1311 {1, 6, 0, 0, 2, 6762, 304, 8}, // VECREDUCE_SEQ_FADD_VL
1312 {1, 6, 0, 0, 2, 6794, 304, 8}, // VECREDUCE_SMAX_VL
1313 {1, 6, 0, 0, 2, 6822, 304, 8}, // VECREDUCE_SMIN_VL
1314 {1, 6, 0, 0, 2, 6850, 304, 8}, // VECREDUCE_UMAX_VL
1315 {1, 6, 0, 0, 2, 6878, 304, 8}, // VECREDUCE_UMIN_VL
1316 {1, 6, 0, 0, 2, 6906, 304, 8}, // VECREDUCE_XOR_VL
1317 {1, 4, 0, 0, 2, 6933, 124, 7}, // VFCVT_RM_F_XU_VL
1318 {1, 4, 0, 0, 2, 6960, 124, 7}, // VFCVT_RM_F_X_VL
1319 {1, 4, 0, 0, 2, 6986, 108, 7}, // VFCVT_RM_XU_F_VL
1320 {1, 4, 0, 0, 2, 7013, 108, 7}, // VFCVT_RM_X_F_VL
1321 {1, 3, 0, 0, 2, 7039, 109, 6}, // VFCVT_RTZ_XU_F_VL
1322 {1, 3, 0, 0, 2, 7067, 109, 6}, // VFCVT_RTZ_X_F_VL
1323 {1, 3, 0, 0, 2, 7094, 45, 6}, // VFIRST_VL
1324 {1, 5, 0, 0, 2, 7114, 421, 8}, // VFMADD_VL
1325 {1, 5, 0, 0, 3, 7134, 402, 8}, // VFMAX_VL
1326 {1, 5, 0, 0, 3, 7153, 402, 8}, // VFMIN_VL
1327 {1, 5, 0, 0, 2, 7172, 421, 8}, // VFMSUB_VL
1328 {1, 3, 0, 0, 0, 7192, 359, 4}, // VFMV_S_F_VL
1329 {1, 3, 0, 0, 0, 7214, 180, 5}, // VFMV_V_F_VL
1330 {1, 3, 0, 0, 2, 7236, 131, 7}, // VFNCVT_ROD_VL
1331 {1, 5, 0, 0, 2, 7260, 421, 8}, // VFNMADD_VL
1332 {1, 5, 0, 0, 2, 7281, 421, 8}, // VFNMSUB_VL
1333 {1, 3, 0, 0, 2, 7302, 363, 6}, // VFROUND_NOEXCEPT_VL
1334 {1, 5, 0, 0, 2, 7332, 320, 8}, // VFSLIDE1DOWN_VL
1335 {1, 5, 0, 0, 2, 7358, 320, 8}, // VFSLIDE1UP_VL
1336 {1, 5, 0, 0, 3, 7382, 185, 10}, // VFWADD_VL
1337 {1, 5, 0, 0, 3, 7402, 170, 10}, // VFWADD_W_VL
1338 {1, 5, 0, 0, 2, 7424, 195, 11}, // VFWMADD_VL
1339 {1, 5, 0, 0, 2, 7445, 195, 11}, // VFWMSUB_VL
1340 {1, 5, 0, 0, 3, 7466, 185, 10}, // VFWMUL_VL
1341 {1, 5, 0, 0, 2, 7486, 195, 11}, // VFWNMADD_VL
1342 {1, 5, 0, 0, 2, 7508, 195, 11}, // VFWNMSUB_VL
1343 {1, 5, 0, 0, 3, 7530, 185, 10}, // VFWSUB_VL
1344 {1, 5, 0, 0, 3, 7550, 170, 10}, // VFWSUB_W_VL
1345 {1, 2, 0, 0, 2, 7572, 347, 4}, // VID_VL
1346 {1, 3, 0, 0, 0, 7589, 429, 4}, // VMAND_VL
1347 {1, 1, 0, 0, 0, 7608, 459, 2}, // VMCLR_VL
1348 {1, 5, 0, 0, 1, 7627, 280, 8}, // VMERGE_VL
1349 {1, 3, 0, 0, 0, 7647, 429, 4}, // VMOR_VL
1350 {1, 1, 0, 0, 0, 7665, 459, 2}, // VMSET_VL
1351 {1, 3, 0, 0, 0, 7684, 355, 4}, // VMV_S_X_VL
1352 {1, 3, 0, 0, 0, 7705, 206, 4}, // VMV_V_V_VL
1353 {1, 3, 0, 0, 0, 7726, 145, 5}, // VMV_V_X_VL
1354 {1, 1, 0, 0, 0, 7747, 115, 3}, // VMV_X_S
1355 {1, 3, 0, 0, 0, 7765, 429, 4}, // VMXOR_VL
1356 {1, 5, 0, 0, 3, 7784, 410, 7}, // VPAIRE_VL
1357 {1, 5, 0, 0, 3, 7804, 410, 7}, // VPAIRO_VL
1358 {1, 5, 0, 0, 2, 7824, 226, 9}, // VRGATHEREI16_VV_VL
1359 {1, 5, 0, 0, 2, 7853, 217, 9}, // VRGATHER_VV_VL
1360 {1, 5, 0, 0, 2, 7878, 210, 7}, // VRGATHER_VX_VL
1361 {1, 3, 0, 0, 2, 7903, 246, 5}, // VSEXT_VL
1362 {1, 5, 0, 0, 2, 7922, 312, 8}, // VSLIDE1DOWN_VL
1363 {1, 5, 0, 0, 2, 7947, 312, 8}, // VSLIDE1UP_VL
1364 {1, 6, 0, 0, 2, 7970, 328, 8}, // VSLIDEDOWN_VL
1365 {1, 6, 0, 0, 2, 7994, 328, 8}, // VSLIDEUP_VL
1366 {1, 4, 0, 0, 1, 8016, 273, 7}, // VUNZIPE_VL
1367 {1, 4, 0, 0, 1, 8037, 273, 7}, // VUNZIPO_VL
1368 {1, 5, 0, 0, 3, 8058, 160, 10}, // VWABDAU_VL
1369 {1, 5, 0, 0, 3, 8079, 160, 10}, // VWABDA_VL
1370 {1, 5, 0, 0, 3, 8099, 160, 10}, // VWADDU_VL
1371 {1, 5, 0, 0, 3, 8119, 150, 10}, // VWADDU_W_VL
1372 {1, 5, 0, 0, 3, 8141, 160, 10}, // VWADD_VL
1373 {1, 5, 0, 0, 3, 8160, 150, 10}, // VWADD_W_VL
1374 {1, 5, 0, 0, 2, 8181, 160, 10}, // VWMACCSU_VL
1375 {1, 5, 0, 0, 2, 8203, 160, 10}, // VWMACCU_VL
1376 {1, 5, 0, 0, 2, 8224, 160, 10}, // VWMACC_VL
1377 {1, 5, 0, 0, 3, 8244, 160, 10}, // VWMULSU_VL
1378 {1, 5, 0, 0, 3, 8265, 160, 10}, // VWMULU_VL
1379 {1, 5, 0, 0, 3, 8285, 160, 10}, // VWMUL_VL
1380 {1, 5, 0, 0, 3, 8304, 160, 10}, // VWSLL_VL
1381 {1, 5, 0, 0, 3, 8323, 160, 10}, // VWSUBU_VL
1382 {1, 5, 0, 0, 3, 8343, 150, 10}, // VWSUBU_W_VL
1383 {1, 5, 0, 0, 3, 8365, 160, 10}, // VWSUB_VL
1384 {1, 5, 0, 0, 3, 8384, 150, 10}, // VWSUB_W_VL
1385 {1, 3, 0, 0, 2, 8405, 246, 5}, // VZEXT_VL
1386 {1, 5, 0, 0, 3, 8424, 293, 8}, // VZIP_VL
1387 {2, 2, 0, 0, 0, 8442, 417, 4}, // WADD
1388 {2, 4, 0, 0, 0, 8457, 7, 6}, // WADDA
1389 {2, 4, 0, 0, 0, 8473, 7, 6}, // WADDAU
1390 {2, 2, 0, 0, 0, 8490, 417, 4}, // WADDU
1391 {2, 4, 0, 0, 0, 8506, 7, 6}, // WMACC
1392 {2, 4, 0, 0, 0, 8522, 7, 6}, // WMACCSU
1393 {2, 4, 0, 0, 0, 8540, 7, 6}, // WMACCU
1394 {2, 2, 0, 0, 0, 8557, 417, 4}, // WMULSU
1395 {0, 2, 0|1<<SDNPHasChain, 0, 0, 8574, 106, 2}, // WRITE_CSR
1396 {2, 2, 0, 0, 0, 8594, 0, 4}, // WSLA
1397 {2, 2, 0, 0, 0, 8609, 0, 4}, // WSLL
1398 {2, 2, 0, 0, 0, 8624, 417, 4}, // WSUB
1399 {2, 4, 0, 0, 0, 8639, 7, 6}, // WSUBA
1400 {2, 4, 0, 0, 0, 8655, 7, 6}, // WSUBAU
1401 {2, 2, 0, 0, 0, 8672, 417, 4}, // WSUBU
1402 {1, 5, 0, 0, 3, 8688, 387, 8}, // XOR_VL
1403 {1, 1, 0, 0, 0, 8705, 357, 2}, // ZIP
1404};
1405
1406static const SDNodeInfo RISCVGenSDNodeInfo(
1407 /*NumOpcodes=*/418, RISCVSDNodeDescs, RISCVSDNodeNames,
1408 RISCVVTByHwModeTable, RISCVSDTypeConstraints);
1409
1410} // namespace llvm
1411
1412#endif // GET_SDNODE_DESC
1413
1414