1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target SDNode descriptions *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: RISCV.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10#ifdef GET_SDNODE_ENUM
11#undef GET_SDNODE_ENUM
12
13namespace llvm::RISCVISD {
14
15enum GenNodeType : unsigned {
16 ABDS_VL = ISD::BUILTIN_OP_END,
17 ABDU_VL,
18 ABSW,
19 ABS_VL,
20 ADDD,
21 ADD_LO,
22 ADD_TPREL,
23 ADD_VL,
24 AND_VL,
25 ASUB,
26 ASUBU,
27 AVGCEILS_VL,
28 AVGCEILU_VL,
29 AVGFLOORS_VL,
30 AVGFLOORU_VL,
31 BITREVERSE_VL,
32 BREV8,
33 BR_CC,
34 BSWAP_VL,
35 BuildGPRPair,
36 BuildPairF64,
37 BuildPairGPRVec,
38 CALL,
39 CLEAR_CSR,
40 CLSW,
41 CLZW,
42 CTLZ_VL,
43 CTPOP_VL,
44 CTTZ_VL,
45 CTZW,
46 CZERO_EQZ,
47 CZERO_NEZ,
48 DIVUW,
49 DIVW,
50 FABS_VL,
51 FADD_VL,
52 FCLASS,
53 FCLASS_VL,
54 FCOPYSIGN_VL,
55 FCVT_WU_RV64,
56 FCVT_W_RV64,
57 FCVT_X,
58 FCVT_XU,
59 FDIV_VL,
60 FLI,
61 FMAX,
62 FMIN,
63 FMUL_VL,
64 FMV_H_X,
65 FMV_W_X_RV64,
66 FMV_X_ANYEXTH,
67 FMV_X_ANYEXTW_RV64,
68 FMV_X_SIGNEXTH,
69 FNEG_VL,
70 FP_EXTEND_VL,
71 FP_ROUND_VL,
72 FROUND,
73 FSGNJX,
74 FSQRT_VL,
75 FSUB_VL,
76 HI,
77 LD_RV32,
78 LLA,
79 LPAD_CALL,
80 LPAD_CALL_INDIRECT,
81 MERGE,
82 MNRET_GLUE,
83 MOP_R,
84 MOP_RR,
85 MRET_GLUE,
86 MULHR,
87 MULHRSU,
88 MULHRU,
89 MULHSU,
90 MULHS_VL,
91 MULHU_VL,
92 MUL_VL,
93 NDS_FMV_BF16_X,
94 NDS_FMV_X_ANYEXTBF16,
95 NEGW_MAX,
96 NSRA,
97 NSRL,
98 ORC_B,
99 OR_VL,
100 PNSRL,
101 PPAIRE,
102 PPAIRO,
103 PPAIROE_H,
104 PROBED_ALLOCA,
105 PSABS,
106 PSHL,
107 PSRA,
108 PSRL,
109 PSSHA,
110 PSSHAR,
111 PSSHL,
112 PSSHLR,
113 PUNZIPE,
114 PUNZIPO,
115 PWMUL,
116 PWMULSU,
117 PWMULU,
118 PWZIP,
119 PZIP,
120 QC_C_MILEAVERET_GLUE,
121 QC_E_LI,
122 QC_INSB,
123 QC_MULIADD,
124 QC_SETWMI,
125 READ_COUNTER_WIDE,
126 READ_CSR,
127 READ_VLENB,
128 REMUW,
129 RET_GLUE,
130 ROLW,
131 RORW,
132 ROTL_VL,
133 ROTR_VL,
134 SADDSAT_VL,
135 SATI,
136 SDIV_VL,
137 SD_RV32,
138 SELECT_CC,
139 SETCC_VL,
140 SET_CSR,
141 SF_VC_FVV_SE,
142 SF_VC_FVW_SE,
143 SF_VC_FV_SE,
144 SF_VC_IVV_SE,
145 SF_VC_IVW_SE,
146 SF_VC_IV_SE,
147 SF_VC_VVV_SE,
148 SF_VC_VVW_SE,
149 SF_VC_VV_SE,
150 SF_VC_V_FVV_SE,
151 SF_VC_V_FVW_SE,
152 SF_VC_V_FV_SE,
153 SF_VC_V_IVV_SE,
154 SF_VC_V_IVW_SE,
155 SF_VC_V_IV_SE,
156 SF_VC_V_I_SE,
157 SF_VC_V_VVV_SE,
158 SF_VC_V_VVW_SE,
159 SF_VC_V_VV_SE,
160 SF_VC_V_XVV_SE,
161 SF_VC_V_XVW_SE,
162 SF_VC_V_XV_SE,
163 SF_VC_V_X_SE,
164 SF_VC_XVV_SE,
165 SF_VC_XVW_SE,
166 SF_VC_XV_SE,
167 SHA256SIG0,
168 SHA256SIG1,
169 SHA256SUM0,
170 SHA256SUM1,
171 SHL_ADD,
172 SHL_VL,
173 SINT_TO_FP_VL,
174 SLLW,
175 SM3P0,
176 SM3P1,
177 SM4ED,
178 SM4KS,
179 SMAX_VL,
180 SMIN_VL,
181 SPLAT_VECTOR_SPLIT_I64_VL,
182 SRAW,
183 SRA_VL,
184 SREM_VL,
185 SRET_GLUE,
186 SRLW,
187 SRL_VL,
188 SSUBSAT_VL,
189 STRICT_FADD_VL,
190 STRICT_FCVT_WU_RV64,
191 STRICT_FCVT_W_RV64,
192 STRICT_FDIV_VL,
193 STRICT_FMUL_VL,
194 STRICT_FP_EXTEND_VL,
195 STRICT_FP_ROUND_VL,
196 STRICT_FSETCCS_VL,
197 STRICT_FSETCC_VL,
198 STRICT_FSQRT_VL,
199 STRICT_FSUB_VL,
200 STRICT_SINT_TO_FP_VL,
201 STRICT_UINT_TO_FP_VL,
202 STRICT_VFCVT_RM_X_F_VL,
203 STRICT_VFCVT_RTZ_XU_F_VL,
204 STRICT_VFCVT_RTZ_X_F_VL,
205 STRICT_VFMADD_VL,
206 STRICT_VFMSUB_VL,
207 STRICT_VFNCVT_ROD_VL,
208 STRICT_VFNMADD_VL,
209 STRICT_VFNMSUB_VL,
210 STRICT_VFROUND_NOEXCEPT_VL,
211 SUBD,
212 SUB_VL,
213 SWAP_CSR,
214 SW_GUARDED_BRIND,
215 SW_GUARDED_CALL,
216 SW_GUARDED_TAIL,
217 SplitF64,
218 SplitGPRPair,
219 SplitGPRVec,
220 TAIL,
221 TH_LDD,
222 TH_LWD,
223 TH_LWUD,
224 TH_SDD,
225 TH_SWD,
226 TRUNCATE_VECTOR_VL,
227 TRUNCATE_VECTOR_VL_SSAT,
228 TRUNCATE_VECTOR_VL_USAT,
229 TUPLE_EXTRACT,
230 TUPLE_INSERT,
231 UADDSAT_VL,
232 UDIV_VL,
233 UINT_TO_FP_VL,
234 UMAX_VL,
235 UMIN_VL,
236 UNZIP,
237 UREM_VL,
238 USATI,
239 USUBSAT_VL,
240 VCPOP_VL,
241 VDOT4ASU_VL,
242 VDOT4AU_VL,
243 VDOT4A_VL,
244 VECREDUCE_ADD_VL,
245 VECREDUCE_AND_VL,
246 VECREDUCE_FADD_VL,
247 VECREDUCE_FMAX_VL,
248 VECREDUCE_FMIN_VL,
249 VECREDUCE_OR_VL,
250 VECREDUCE_SEQ_FADD_VL,
251 VECREDUCE_SMAX_VL,
252 VECREDUCE_SMIN_VL,
253 VECREDUCE_UMAX_VL,
254 VECREDUCE_UMIN_VL,
255 VECREDUCE_XOR_VL,
256 VFCVT_RM_F_XU_VL,
257 VFCVT_RM_F_X_VL,
258 VFCVT_RM_XU_F_VL,
259 VFCVT_RM_X_F_VL,
260 VFCVT_RTZ_XU_F_VL,
261 VFCVT_RTZ_X_F_VL,
262 VFIRST_VL,
263 VFMADD_VL,
264 VFMAX_VL,
265 VFMIN_VL,
266 VFMSUB_VL,
267 VFMV_S_F_VL,
268 VFMV_V_F_VL,
269 VFNCVT_ROD_VL,
270 VFNMADD_VL,
271 VFNMSUB_VL,
272 VFROUND_NOEXCEPT_VL,
273 VFSLIDE1DOWN_VL,
274 VFSLIDE1UP_VL,
275 VFWADD_VL,
276 VFWADD_W_VL,
277 VFWMADD_VL,
278 VFWMSUB_VL,
279 VFWMUL_VL,
280 VFWNMADD_VL,
281 VFWNMSUB_VL,
282 VFWSUB_VL,
283 VFWSUB_W_VL,
284 VID_VL,
285 VMAND_VL,
286 VMCLR_VL,
287 VMERGE_VL,
288 VMOR_VL,
289 VMSET_VL,
290 VMV_S_X_VL,
291 VMV_V_V_VL,
292 VMV_V_X_VL,
293 VMV_X_S,
294 VMXOR_VL,
295 VPAIRE_VL,
296 VPAIRO_VL,
297 VRGATHEREI16_VV_VL,
298 VRGATHER_VV_VL,
299 VRGATHER_VX_VL,
300 VSEXT_VL,
301 VSLIDE1DOWN_VL,
302 VSLIDE1UP_VL,
303 VSLIDEDOWN_VL,
304 VSLIDEUP_VL,
305 VUNZIPE_VL,
306 VUNZIPO_VL,
307 VWABDAU_VL,
308 VWABDA_VL,
309 VWADDU_VL,
310 VWADDU_W_VL,
311 VWADD_VL,
312 VWADD_W_VL,
313 VWMACCSU_VL,
314 VWMACCU_VL,
315 VWMACC_VL,
316 VWMULSU_VL,
317 VWMULU_VL,
318 VWMUL_VL,
319 VWSLL_VL,
320 VWSUBU_VL,
321 VWSUBU_W_VL,
322 VWSUB_VL,
323 VWSUB_W_VL,
324 VZEXT_VL,
325 VZIP_VL,
326 WADD,
327 WADDA,
328 WADDAU,
329 WADDU,
330 WMULSU,
331 WRITE_CSR,
332 WSLA,
333 WSLL,
334 WSUB,
335 WSUBA,
336 WSUBAU,
337 WSUBU,
338 XOR_VL,
339 ZIP,
340};
341
342static constexpr unsigned GENERATED_OPCODE_END = ZIP + 1;
343
344} // namespace llvm::RISCVISD
345
346#endif // GET_SDNODE_ENUM
347
348#ifdef GET_SDNODE_DESC
349#undef GET_SDNODE_DESC
350
351namespace llvm {
352
353
354#ifdef __GNUC__
355#pragma GCC diagnostic push
356#pragma GCC diagnostic ignored "-Woverlength-strings"
357#endif
358static constexpr char RISCVSDNodeNamesStorage[] =
359 "\0"
360 "RISCVISD::ABDS_VL\0"
361 "RISCVISD::ABDU_VL\0"
362 "RISCVISD::ABSW\0"
363 "RISCVISD::ABS_VL\0"
364 "RISCVISD::ADDD\0"
365 "RISCVISD::ADD_LO\0"
366 "RISCVISD::ADD_TPREL\0"
367 "RISCVISD::ADD_VL\0"
368 "RISCVISD::AND_VL\0"
369 "RISCVISD::ASUB\0"
370 "RISCVISD::ASUBU\0"
371 "RISCVISD::AVGCEILS_VL\0"
372 "RISCVISD::AVGCEILU_VL\0"
373 "RISCVISD::AVGFLOORS_VL\0"
374 "RISCVISD::AVGFLOORU_VL\0"
375 "RISCVISD::BITREVERSE_VL\0"
376 "RISCVISD::BREV8\0"
377 "RISCVISD::BR_CC\0"
378 "RISCVISD::BSWAP_VL\0"
379 "RISCVISD::BuildGPRPair\0"
380 "RISCVISD::BuildPairF64\0"
381 "RISCVISD::BuildPairGPRVec\0"
382 "RISCVISD::CALL\0"
383 "RISCVISD::CLEAR_CSR\0"
384 "RISCVISD::CLSW\0"
385 "RISCVISD::CLZW\0"
386 "RISCVISD::CTLZ_VL\0"
387 "RISCVISD::CTPOP_VL\0"
388 "RISCVISD::CTTZ_VL\0"
389 "RISCVISD::CTZW\0"
390 "RISCVISD::CZERO_EQZ\0"
391 "RISCVISD::CZERO_NEZ\0"
392 "RISCVISD::DIVUW\0"
393 "RISCVISD::DIVW\0"
394 "RISCVISD::FABS_VL\0"
395 "RISCVISD::FADD_VL\0"
396 "RISCVISD::FCLASS\0"
397 "RISCVISD::FCLASS_VL\0"
398 "RISCVISD::FCOPYSIGN_VL\0"
399 "RISCVISD::FCVT_WU_RV64\0"
400 "RISCVISD::FCVT_W_RV64\0"
401 "RISCVISD::FCVT_X\0"
402 "RISCVISD::FCVT_XU\0"
403 "RISCVISD::FDIV_VL\0"
404 "RISCVISD::FLI\0"
405 "RISCVISD::FMAX\0"
406 "RISCVISD::FMIN\0"
407 "RISCVISD::FMUL_VL\0"
408 "RISCVISD::FMV_H_X\0"
409 "RISCVISD::FMV_W_X_RV64\0"
410 "RISCVISD::FMV_X_ANYEXTH\0"
411 "RISCVISD::FMV_X_ANYEXTW_RV64\0"
412 "RISCVISD::FMV_X_SIGNEXTH\0"
413 "RISCVISD::FNEG_VL\0"
414 "RISCVISD::FP_EXTEND_VL\0"
415 "RISCVISD::FP_ROUND_VL\0"
416 "RISCVISD::FROUND\0"
417 "RISCVISD::FSGNJX\0"
418 "RISCVISD::FSQRT_VL\0"
419 "RISCVISD::FSUB_VL\0"
420 "RISCVISD::HI\0"
421 "RISCVISD::LD_RV32\0"
422 "RISCVISD::LLA\0"
423 "RISCVISD::LPAD_CALL\0"
424 "RISCVISD::LPAD_CALL_INDIRECT\0"
425 "RISCVISD::MERGE\0"
426 "RISCVISD::MNRET_GLUE\0"
427 "RISCVISD::MOP_R\0"
428 "RISCVISD::MOP_RR\0"
429 "RISCVISD::MRET_GLUE\0"
430 "RISCVISD::MULHR\0"
431 "RISCVISD::MULHRSU\0"
432 "RISCVISD::MULHRU\0"
433 "RISCVISD::MULHSU\0"
434 "RISCVISD::MULHS_VL\0"
435 "RISCVISD::MULHU_VL\0"
436 "RISCVISD::MUL_VL\0"
437 "RISCVISD::NDS_FMV_BF16_X\0"
438 "RISCVISD::NDS_FMV_X_ANYEXTBF16\0"
439 "RISCVISD::NEGW_MAX\0"
440 "RISCVISD::NSRA\0"
441 "RISCVISD::NSRL\0"
442 "RISCVISD::ORC_B\0"
443 "RISCVISD::OR_VL\0"
444 "RISCVISD::PNSRL\0"
445 "RISCVISD::PPAIRE\0"
446 "RISCVISD::PPAIRO\0"
447 "RISCVISD::PPAIROE_H\0"
448 "RISCVISD::PROBED_ALLOCA\0"
449 "RISCVISD::PSABS\0"
450 "RISCVISD::PSHL\0"
451 "RISCVISD::PSRA\0"
452 "RISCVISD::PSRL\0"
453 "RISCVISD::PSSHA\0"
454 "RISCVISD::PSSHAR\0"
455 "RISCVISD::PSSHL\0"
456 "RISCVISD::PSSHLR\0"
457 "RISCVISD::PUNZIPE\0"
458 "RISCVISD::PUNZIPO\0"
459 "RISCVISD::PWMUL\0"
460 "RISCVISD::PWMULSU\0"
461 "RISCVISD::PWMULU\0"
462 "RISCVISD::PWZIP\0"
463 "RISCVISD::PZIP\0"
464 "RISCVISD::QC_C_MILEAVERET_GLUE\0"
465 "RISCVISD::QC_E_LI\0"
466 "RISCVISD::QC_INSB\0"
467 "RISCVISD::QC_MULIADD\0"
468 "RISCVISD::QC_SETWMI\0"
469 "RISCVISD::READ_COUNTER_WIDE\0"
470 "RISCVISD::READ_CSR\0"
471 "RISCVISD::READ_VLENB\0"
472 "RISCVISD::REMUW\0"
473 "RISCVISD::RET_GLUE\0"
474 "RISCVISD::ROLW\0"
475 "RISCVISD::RORW\0"
476 "RISCVISD::ROTL_VL\0"
477 "RISCVISD::ROTR_VL\0"
478 "RISCVISD::SADDSAT_VL\0"
479 "RISCVISD::SATI\0"
480 "RISCVISD::SDIV_VL\0"
481 "RISCVISD::SD_RV32\0"
482 "RISCVISD::SELECT_CC\0"
483 "RISCVISD::SETCC_VL\0"
484 "RISCVISD::SET_CSR\0"
485 "RISCVISD::SF_VC_FVV_SE\0"
486 "RISCVISD::SF_VC_FVW_SE\0"
487 "RISCVISD::SF_VC_FV_SE\0"
488 "RISCVISD::SF_VC_IVV_SE\0"
489 "RISCVISD::SF_VC_IVW_SE\0"
490 "RISCVISD::SF_VC_IV_SE\0"
491 "RISCVISD::SF_VC_VVV_SE\0"
492 "RISCVISD::SF_VC_VVW_SE\0"
493 "RISCVISD::SF_VC_VV_SE\0"
494 "RISCVISD::SF_VC_V_FVV_SE\0"
495 "RISCVISD::SF_VC_V_FVW_SE\0"
496 "RISCVISD::SF_VC_V_FV_SE\0"
497 "RISCVISD::SF_VC_V_IVV_SE\0"
498 "RISCVISD::SF_VC_V_IVW_SE\0"
499 "RISCVISD::SF_VC_V_IV_SE\0"
500 "RISCVISD::SF_VC_V_I_SE\0"
501 "RISCVISD::SF_VC_V_VVV_SE\0"
502 "RISCVISD::SF_VC_V_VVW_SE\0"
503 "RISCVISD::SF_VC_V_VV_SE\0"
504 "RISCVISD::SF_VC_V_XVV_SE\0"
505 "RISCVISD::SF_VC_V_XVW_SE\0"
506 "RISCVISD::SF_VC_V_XV_SE\0"
507 "RISCVISD::SF_VC_V_X_SE\0"
508 "RISCVISD::SF_VC_XVV_SE\0"
509 "RISCVISD::SF_VC_XVW_SE\0"
510 "RISCVISD::SF_VC_XV_SE\0"
511 "RISCVISD::SHA256SIG0\0"
512 "RISCVISD::SHA256SIG1\0"
513 "RISCVISD::SHA256SUM0\0"
514 "RISCVISD::SHA256SUM1\0"
515 "RISCVISD::SHL_ADD\0"
516 "RISCVISD::SHL_VL\0"
517 "RISCVISD::SINT_TO_FP_VL\0"
518 "RISCVISD::SLLW\0"
519 "RISCVISD::SM3P0\0"
520 "RISCVISD::SM3P1\0"
521 "RISCVISD::SM4ED\0"
522 "RISCVISD::SM4KS\0"
523 "RISCVISD::SMAX_VL\0"
524 "RISCVISD::SMIN_VL\0"
525 "RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL\0"
526 "RISCVISD::SRAW\0"
527 "RISCVISD::SRA_VL\0"
528 "RISCVISD::SREM_VL\0"
529 "RISCVISD::SRET_GLUE\0"
530 "RISCVISD::SRLW\0"
531 "RISCVISD::SRL_VL\0"
532 "RISCVISD::SSUBSAT_VL\0"
533 "RISCVISD::STRICT_FADD_VL\0"
534 "RISCVISD::STRICT_FCVT_WU_RV64\0"
535 "RISCVISD::STRICT_FCVT_W_RV64\0"
536 "RISCVISD::STRICT_FDIV_VL\0"
537 "RISCVISD::STRICT_FMUL_VL\0"
538 "RISCVISD::STRICT_FP_EXTEND_VL\0"
539 "RISCVISD::STRICT_FP_ROUND_VL\0"
540 "RISCVISD::STRICT_FSETCCS_VL\0"
541 "RISCVISD::STRICT_FSETCC_VL\0"
542 "RISCVISD::STRICT_FSQRT_VL\0"
543 "RISCVISD::STRICT_FSUB_VL\0"
544 "RISCVISD::STRICT_SINT_TO_FP_VL\0"
545 "RISCVISD::STRICT_UINT_TO_FP_VL\0"
546 "RISCVISD::STRICT_VFCVT_RM_X_F_VL\0"
547 "RISCVISD::STRICT_VFCVT_RTZ_XU_F_VL\0"
548 "RISCVISD::STRICT_VFCVT_RTZ_X_F_VL\0"
549 "RISCVISD::STRICT_VFMADD_VL\0"
550 "RISCVISD::STRICT_VFMSUB_VL\0"
551 "RISCVISD::STRICT_VFNCVT_ROD_VL\0"
552 "RISCVISD::STRICT_VFNMADD_VL\0"
553 "RISCVISD::STRICT_VFNMSUB_VL\0"
554 "RISCVISD::STRICT_VFROUND_NOEXCEPT_VL\0"
555 "RISCVISD::SUBD\0"
556 "RISCVISD::SUB_VL\0"
557 "RISCVISD::SWAP_CSR\0"
558 "RISCVISD::SW_GUARDED_BRIND\0"
559 "RISCVISD::SW_GUARDED_CALL\0"
560 "RISCVISD::SW_GUARDED_TAIL\0"
561 "RISCVISD::SplitF64\0"
562 "RISCVISD::SplitGPRPair\0"
563 "RISCVISD::SplitGPRVec\0"
564 "RISCVISD::TAIL\0"
565 "RISCVISD::TH_LDD\0"
566 "RISCVISD::TH_LWD\0"
567 "RISCVISD::TH_LWUD\0"
568 "RISCVISD::TH_SDD\0"
569 "RISCVISD::TH_SWD\0"
570 "RISCVISD::TRUNCATE_VECTOR_VL\0"
571 "RISCVISD::TRUNCATE_VECTOR_VL_SSAT\0"
572 "RISCVISD::TRUNCATE_VECTOR_VL_USAT\0"
573 "RISCVISD::TUPLE_EXTRACT\0"
574 "RISCVISD::TUPLE_INSERT\0"
575 "RISCVISD::UADDSAT_VL\0"
576 "RISCVISD::UDIV_VL\0"
577 "RISCVISD::UINT_TO_FP_VL\0"
578 "RISCVISD::UMAX_VL\0"
579 "RISCVISD::UMIN_VL\0"
580 "RISCVISD::UNZIP\0"
581 "RISCVISD::UREM_VL\0"
582 "RISCVISD::USATI\0"
583 "RISCVISD::USUBSAT_VL\0"
584 "RISCVISD::VCPOP_VL\0"
585 "RISCVISD::VDOT4ASU_VL\0"
586 "RISCVISD::VDOT4AU_VL\0"
587 "RISCVISD::VDOT4A_VL\0"
588 "RISCVISD::VECREDUCE_ADD_VL\0"
589 "RISCVISD::VECREDUCE_AND_VL\0"
590 "RISCVISD::VECREDUCE_FADD_VL\0"
591 "RISCVISD::VECREDUCE_FMAX_VL\0"
592 "RISCVISD::VECREDUCE_FMIN_VL\0"
593 "RISCVISD::VECREDUCE_OR_VL\0"
594 "RISCVISD::VECREDUCE_SEQ_FADD_VL\0"
595 "RISCVISD::VECREDUCE_SMAX_VL\0"
596 "RISCVISD::VECREDUCE_SMIN_VL\0"
597 "RISCVISD::VECREDUCE_UMAX_VL\0"
598 "RISCVISD::VECREDUCE_UMIN_VL\0"
599 "RISCVISD::VECREDUCE_XOR_VL\0"
600 "RISCVISD::VFCVT_RM_F_XU_VL\0"
601 "RISCVISD::VFCVT_RM_F_X_VL\0"
602 "RISCVISD::VFCVT_RM_XU_F_VL\0"
603 "RISCVISD::VFCVT_RM_X_F_VL\0"
604 "RISCVISD::VFCVT_RTZ_XU_F_VL\0"
605 "RISCVISD::VFCVT_RTZ_X_F_VL\0"
606 "RISCVISD::VFIRST_VL\0"
607 "RISCVISD::VFMADD_VL\0"
608 "RISCVISD::VFMAX_VL\0"
609 "RISCVISD::VFMIN_VL\0"
610 "RISCVISD::VFMSUB_VL\0"
611 "RISCVISD::VFMV_S_F_VL\0"
612 "RISCVISD::VFMV_V_F_VL\0"
613 "RISCVISD::VFNCVT_ROD_VL\0"
614 "RISCVISD::VFNMADD_VL\0"
615 "RISCVISD::VFNMSUB_VL\0"
616 "RISCVISD::VFROUND_NOEXCEPT_VL\0"
617 "RISCVISD::VFSLIDE1DOWN_VL\0"
618 "RISCVISD::VFSLIDE1UP_VL\0"
619 "RISCVISD::VFWADD_VL\0"
620 "RISCVISD::VFWADD_W_VL\0"
621 "RISCVISD::VFWMADD_VL\0"
622 "RISCVISD::VFWMSUB_VL\0"
623 "RISCVISD::VFWMUL_VL\0"
624 "RISCVISD::VFWNMADD_VL\0"
625 "RISCVISD::VFWNMSUB_VL\0"
626 "RISCVISD::VFWSUB_VL\0"
627 "RISCVISD::VFWSUB_W_VL\0"
628 "RISCVISD::VID_VL\0"
629 "RISCVISD::VMAND_VL\0"
630 "RISCVISD::VMCLR_VL\0"
631 "RISCVISD::VMERGE_VL\0"
632 "RISCVISD::VMOR_VL\0"
633 "RISCVISD::VMSET_VL\0"
634 "RISCVISD::VMV_S_X_VL\0"
635 "RISCVISD::VMV_V_V_VL\0"
636 "RISCVISD::VMV_V_X_VL\0"
637 "RISCVISD::VMV_X_S\0"
638 "RISCVISD::VMXOR_VL\0"
639 "RISCVISD::VPAIRE_VL\0"
640 "RISCVISD::VPAIRO_VL\0"
641 "RISCVISD::VRGATHEREI16_VV_VL\0"
642 "RISCVISD::VRGATHER_VV_VL\0"
643 "RISCVISD::VRGATHER_VX_VL\0"
644 "RISCVISD::VSEXT_VL\0"
645 "RISCVISD::VSLIDE1DOWN_VL\0"
646 "RISCVISD::VSLIDE1UP_VL\0"
647 "RISCVISD::VSLIDEDOWN_VL\0"
648 "RISCVISD::VSLIDEUP_VL\0"
649 "RISCVISD::VUNZIPE_VL\0"
650 "RISCVISD::VUNZIPO_VL\0"
651 "RISCVISD::VWABDAU_VL\0"
652 "RISCVISD::VWABDA_VL\0"
653 "RISCVISD::VWADDU_VL\0"
654 "RISCVISD::VWADDU_W_VL\0"
655 "RISCVISD::VWADD_VL\0"
656 "RISCVISD::VWADD_W_VL\0"
657 "RISCVISD::VWMACCSU_VL\0"
658 "RISCVISD::VWMACCU_VL\0"
659 "RISCVISD::VWMACC_VL\0"
660 "RISCVISD::VWMULSU_VL\0"
661 "RISCVISD::VWMULU_VL\0"
662 "RISCVISD::VWMUL_VL\0"
663 "RISCVISD::VWSLL_VL\0"
664 "RISCVISD::VWSUBU_VL\0"
665 "RISCVISD::VWSUBU_W_VL\0"
666 "RISCVISD::VWSUB_VL\0"
667 "RISCVISD::VWSUB_W_VL\0"
668 "RISCVISD::VZEXT_VL\0"
669 "RISCVISD::VZIP_VL\0"
670 "RISCVISD::WADD\0"
671 "RISCVISD::WADDA\0"
672 "RISCVISD::WADDAU\0"
673 "RISCVISD::WADDU\0"
674 "RISCVISD::WMULSU\0"
675 "RISCVISD::WRITE_CSR\0"
676 "RISCVISD::WSLA\0"
677 "RISCVISD::WSLL\0"
678 "RISCVISD::WSUB\0"
679 "RISCVISD::WSUBA\0"
680 "RISCVISD::WSUBAU\0"
681 "RISCVISD::WSUBU\0"
682 "RISCVISD::XOR_VL\0"
683 "RISCVISD::ZIP\0"
684 ;
685#ifdef __GNUC__
686#pragma GCC diagnostic pop
687#endif
688
689static constexpr llvm::StringTable
690RISCVSDNodeNames = RISCVSDNodeNamesStorage;
691
692static const VTByHwModePair RISCVVTByHwModeTable[] = {
693 /* 0 */ {0, MVT::i32}, {1, MVT::i64},
694};
695
696static const SDTypeConstraint RISCVSDTypeConstraints[] = {
697 /* 0 */ {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32},
698 /* 4 */ {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32},
699 /* 7 */ {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
700 /* 13 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
701 /* 19 */ {SDTCisVT, 2, 0, 0, MVT::f64}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
702 /* 22 */ {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
703 /* 25 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
704 /* 29 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
705 /* 33 */ {SDTCisVT, 2, 0, 0, MVT::Untyped}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
706 /* 36 */ {SDTCisVT, 1, 0, 0, MVT::bf16}, {SDTCisVT, 0, 0, 2, 0},
707 /* 38 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
708 /* 41 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
709 /* 47 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
710 /* 51 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
711 /* 55 */ {SDTCisVT, 1, 0, 0, MVT::f32}, {SDTCisVT, 0, 0, 0, MVT::i64},
712 /* 57 */ {SDTCisVT, 2, 0, 0, MVT::i64}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i64},
713 /* 60 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::bf16},
714 /* 62 */ {SDTCisVT, 1, 0, 0, MVT::i64}, {SDTCisVT, 0, 0, 0, MVT::f32},
715 /* 64 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::f64},
716 /* 67 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::Untyped},
717 /* 70 */ {SDTCisPtrTy, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
718 /* 71 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
719 /* 80 */ {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
720 /* 84 */ {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
721 /* 87 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
722 /* 94 */ {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
723 /* 97 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
724 /* 101 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
725 /* 103 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
726 /* 110 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
727 /* 117 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
728 /* 124 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
729 /* 129 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
730 /* 139 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
731 /* 149 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
732 /* 159 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
733 /* 164 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
734 /* 174 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
735 /* 185 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
736 /* 189 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
737 /* 196 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
738 /* 205 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i16}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
739 /* 214 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i64}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
740 /* 220 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
741 /* 225 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
742 /* 230 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
743 /* 233 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
744 /* 238 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
745 /* 242 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
746 /* 247 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
747 /* 252 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 3, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSubVecOfVec, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
748 /* 259 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
749 /* 267 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSubVecOfVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
750 /* 275 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
751 /* 278 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 2, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
752 /* 286 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
753 /* 294 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisEltOfVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
754 /* 302 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
755 /* 310 */ {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
756 /* 314 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSubVecOfVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
757 /* 317 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
758 /* 321 */ {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
759 /* 323 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
760 /* 325 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
761 /* 329 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
762 /* 333 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
763 /* 339 */ {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
764 /* 343 */ {SDTCisInt, 4, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
765 /* 348 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
766 /* 351 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
767 /* 354 */ {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
768 /* 357 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
769 /* 365 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 3, 0, 0, MVT::i1}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
770 /* 372 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
771 /* 380 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
772 /* 387 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
773 /* 391 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
774 /* 399 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
775 /* 403 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
776 /* 408 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
777 /* 412 */ {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisVT, 2, 0, 0, MVT::Other}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
778 /* 415 */ {SDTCisVT, 0, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
779 /* 419 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1},
780 /* 421 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1},
781 /* 429 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
782 /* 432 */ {SDTCisSameAs, 4, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
783};
784
785static const SDNodeDesc RISCVSDNodeDescs[] = {
786 {1, 5, 0, 0, 3, 1, 357, 8}, // ABDS_VL
787 {1, 5, 0, 0, 3, 19, 357, 8}, // ABDU_VL
788 {1, 1, 0, 0, 0, 37, 323, 2}, // ABSW
789 {1, 4, 0, 0, 3, 52, 365, 7}, // ABS_VL
790 {2, 4, 0, 0, 0, 69, 13, 6}, // ADDD
791 {1, 2, 0, 0, 0, 84, 351, 3}, // ADD_LO
792 {1, 3, 0, 0, 0, 101, 387, 4}, // ADD_TPREL
793 {1, 5, 0, 0, 3, 121, 357, 8}, // ADD_VL
794 {1, 5, 0, 0, 3, 138, 357, 8}, // AND_VL
795 {1, 2, 0, 0, 0, 155, 351, 3}, // ASUB
796 {1, 2, 0, 0, 0, 170, 351, 3}, // ASUBU
797 {1, 5, 0, 0, 3, 186, 357, 8}, // AVGCEILS_VL
798 {1, 5, 0, 0, 3, 208, 357, 8}, // AVGCEILU_VL
799 {1, 5, 0, 0, 3, 230, 357, 8}, // AVGFLOORS_VL
800 {1, 5, 0, 0, 3, 253, 357, 8}, // AVGFLOORU_VL
801 {1, 4, 0, 0, 3, 276, 365, 7}, // BITREVERSE_VL
802 {1, 1, 0, 0, 0, 300, 327, 2}, // BREV8
803 {0, 4, 0|1<<SDNPHasChain, 0, 0, 316, 412, 3}, // BR_CC
804 {1, 4, 0, 0, 3, 332, 365, 7}, // BSWAP_VL
805 {1, 2, 0, 0, 0, 351, 67, 3}, // BuildGPRPair
806 {1, 2, 0, 0, 0, 374, 64, 3}, // BuildPairF64
807 {1, 2, 0, 0, 0, 397, 230, 3}, // BuildPairGPRVec
808 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 423, 32, 1}, // CALL
809 {0, 2, 0|1<<SDNPHasChain, 0, 0, 438, 85, 2}, // CLEAR_CSR
810 {1, 1, 0, 0, 0, 458, 323, 2}, // CLSW
811 {1, 1, 0, 0, 0, 473, 323, 2}, // CLZW
812 {1, 4, 0, 0, 3, 488, 365, 7}, // CTLZ_VL
813 {1, 4, 0, 0, 3, 506, 365, 7}, // CTPOP_VL
814 {1, 4, 0, 0, 3, 525, 365, 7}, // CTTZ_VL
815 {1, 1, 0, 0, 0, 543, 323, 2}, // CTZW
816 {1, 2, 0, 0, 0, 558, 351, 3}, // CZERO_EQZ
817 {1, 2, 0, 0, 0, 578, 351, 3}, // CZERO_NEZ
818 {1, 2, 0, 0, 0, 598, 348, 3}, // DIVUW
819 {1, 2, 0, 0, 0, 614, 348, 3}, // DIVW
820 {1, 3, 0, 0, 2, 629, 333, 6}, // FABS_VL
821 {1, 5, 0, 0, 3, 647, 372, 8}, // FADD_VL
822 {1, 1, 0, 0, 0, 665, 39, 2}, // FCLASS
823 {1, 3, 0, 0, 2, 682, 71, 9}, // FCLASS_VL
824 {1, 5, 0, 0, 3, 702, 372, 8}, // FCOPYSIGN_VL
825 {1, 2, 0, 0, 0, 725, 57, 3}, // FCVT_WU_RV64
826 {1, 2, 0, 0, 0, 748, 57, 3}, // FCVT_W_RV64
827 {1, 2, 0, 0, 0, 770, 38, 3}, // FCVT_X
828 {1, 2, 0, 0, 0, 787, 38, 3}, // FCVT_XU
829 {1, 5, 0, 0, 3, 805, 372, 8}, // FDIV_VL
830 {1, 1, 0, 0, 0, 823, 101, 2}, // FLI
831 {1, 2, 0, 0, 0, 837, 354, 3}, // FMAX
832 {1, 2, 0, 0, 0, 852, 354, 3}, // FMIN
833 {1, 5, 0, 0, 3, 867, 372, 8}, // FMUL_VL
834 {1, 1, 0, 0, 0, 885, 101, 2}, // FMV_H_X
835 {1, 1, 0, 0, 0, 903, 62, 2}, // FMV_W_X_RV64
836 {1, 1, 0, 0, 0, 926, 39, 2}, // FMV_X_ANYEXTH
837 {1, 1, 0, 0, 0, 950, 55, 2}, // FMV_X_ANYEXTW_RV64
838 {1, 1, 0, 0, 0, 979, 39, 2}, // FMV_X_SIGNEXTH
839 {1, 3, 0, 0, 2, 1004, 333, 6}, // FNEG_VL
840 {1, 3, 0, 0, 2, 1022, 117, 7}, // FP_EXTEND_VL
841 {1, 3, 0, 0, 2, 1045, 110, 7}, // FP_ROUND_VL
842 {1, 3, 0, 0, 0, 1067, 97, 4}, // FROUND
843 {1, 2, 0, 0, 0, 1084, 98, 3}, // FSGNJX
844 {1, 3, 0, 0, 2, 1101, 333, 6}, // FSQRT_VL
845 {1, 5, 0, 0, 3, 1120, 372, 8}, // FSUB_VL
846 {1, 1, 0, 0, 0, 1138, 327, 2}, // HI
847 {2, 1, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1151, 22, 3}, // LD_RV32
848 {1, 1, 0, 0, 0, 1169, 327, 2}, // LLA
849 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1183, 32, 1}, // LPAD_CALL
850 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1203, 32, 1}, // LPAD_CALL_INDIRECT
851 {1, 3, 0, 0, 0, 1232, 80, 4}, // MERGE
852 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1248, 0, 0}, // MNRET_GLUE
853 {1, 2, 0, 0, 0, 1269, 81, 3}, // MOP_R
854 {1, 3, 0, 0, 0, 1285, 80, 4}, // MOP_RR
855 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1302, 0, 0}, // MRET_GLUE
856 {1, 2, 0, 0, 0, 1322, 351, 3}, // MULHR
857 {1, 2, 0, 0, 0, 1338, 351, 3}, // MULHRSU
858 {1, 2, 0, 0, 0, 1356, 351, 3}, // MULHRU
859 {1, 2, 0, 0, 0, 1373, 351, 3}, // MULHSU
860 {1, 5, 0, 0, 3, 1390, 357, 8}, // MULHS_VL
861 {1, 5, 0, 0, 3, 1409, 357, 8}, // MULHU_VL
862 {1, 5, 0, 0, 3, 1428, 357, 8}, // MUL_VL
863 {1, 1, 0, 0, 0, 1445, 60, 2}, // NDS_FMV_BF16_X
864 {1, 1, 0, 0, 0, 1470, 36, 2}, // NDS_FMV_X_ANYEXTBF16
865 {1, 1, 0, 0, 0, 1501, 327, 2}, // NEGW_MAX
866 {1, 3, 0, 0, 0, 1520, 0, 4}, // NSRA
867 {1, 3, 0, 0, 0, 1535, 0, 4}, // NSRL
868 {1, 1, 0, 0, 0, 1550, 327, 2}, // ORC_B
869 {1, 5, 0, 0, 3, 1566, 357, 8}, // OR_VL
870 {1, 2, 0, 0, 0, 1582, 275, 3}, // PNSRL
871 {1, 2, 0, 0, 0, 1598, 186, 3}, // PPAIRE
872 {1, 2, 0, 0, 0, 1615, 186, 3}, // PPAIRO
873 {1, 2, 0, 0, 0, 1632, 186, 3}, // PPAIROE_H
874 {0, 1, 0|1<<SDNPHasChain, 0, 0, 1652, 70, 1}, // PROBED_ALLOCA
875 {1, 1, 0, 0, 0, 1676, 187, 2}, // PSABS
876 {1, 2, 0, 0, 0, 1692, 193, 3}, // PSHL
877 {1, 2, 0, 0, 0, 1707, 193, 3}, // PSRA
878 {1, 2, 0, 0, 0, 1722, 193, 3}, // PSRL
879 {1, 2, 0, 0, 0, 1737, 193, 3}, // PSSHA
880 {1, 2, 0, 0, 0, 1753, 193, 3}, // PSSHAR
881 {1, 2, 0, 0, 0, 1770, 193, 3}, // PSSHL
882 {1, 2, 0, 0, 0, 1786, 193, 3}, // PSSHLR
883 {1, 2, 0, 0, 0, 1803, 186, 3}, // PUNZIPE
884 {1, 2, 0, 0, 0, 1821, 186, 3}, // PUNZIPO
885 {1, 2, 0, 0, 0, 1839, 310, 4}, // PWMUL
886 {1, 2, 0, 0, 0, 1855, 310, 4}, // PWMULSU
887 {1, 2, 0, 0, 0, 1873, 310, 4}, // PWMULU
888 {1, 2, 0, 0, 0, 1890, 314, 3}, // PWZIP
889 {1, 2, 0, 0, 0, 1906, 186, 3}, // PZIP
890 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1921, 0, 0}, // QC_C_MILEAVERET_GLUE
891 {1, 1, 0, 0, 0, 1952, 327, 2}, // QC_E_LI
892 {1, 4, 0, 0, 0, 1970, 343, 5}, // QC_INSB
893 {1, 3, 0, 0, 0, 1988, 339, 4}, // QC_MULIADD
894 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 2009, 408, 4}, // QC_SETWMI
895 {2, 2, 0|1<<SDNPHasChain, 0, 0, 2029, 25, 4}, // READ_COUNTER_WIDE
896 {1, 1, 0|1<<SDNPHasChain, 0, 0, 2057, 85, 2}, // READ_CSR
897 {1, 0, 0, 0, 0, 2076, 32, 1}, // READ_VLENB
898 {1, 2, 0, 0, 0, 2097, 348, 3}, // REMUW
899 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 2113, 0, 0}, // RET_GLUE
900 {1, 2, 0, 0, 0, 2132, 348, 3}, // ROLW
901 {1, 2, 0, 0, 0, 2147, 348, 3}, // RORW
902 {1, 5, 0, 0, 3, 2162, 357, 8}, // ROTL_VL
903 {1, 5, 0, 0, 3, 2180, 357, 8}, // ROTR_VL
904 {1, 5, 0, 0, 3, 2198, 357, 8}, // SADDSAT_VL
905 {1, 2, 0, 0, 0, 2219, 351, 3}, // SATI
906 {1, 5, 0, 0, 3, 2234, 357, 8}, // SDIV_VL
907 {0, 3, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 2252, 22, 3}, // SD_RV32
908 {1, 5, 0, 0, 0, 2270, 432, 4}, // SELECT_CC
909 {1, 6, 0, 0, 3, 2290, 421, 8}, // SETCC_VL
910 {0, 2, 0|1<<SDNPHasChain, 0, 0, 2309, 85, 2}, // SET_CSR
911 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2327, 47, 4}, // SF_VC_FVV_SE
912 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2350, 51, 4}, // SF_VC_FVW_SE
913 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2373, 415, 4}, // SF_VC_FV_SE
914 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2395, 47, 4}, // SF_VC_IVV_SE
915 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2418, 51, 4}, // SF_VC_IVW_SE
916 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2441, 415, 4}, // SF_VC_IV_SE
917 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2463, 47, 4}, // SF_VC_VVV_SE
918 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2486, 51, 4}, // SF_VC_VVW_SE
919 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2509, 415, 4}, // SF_VC_VV_SE
920 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2531, 233, 5}, // SF_VC_V_FVV_SE
921 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2556, 242, 5}, // SF_VC_V_FVW_SE
922 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2581, 238, 4}, // SF_VC_V_FV_SE
923 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2605, 233, 5}, // SF_VC_V_IVV_SE
924 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2630, 242, 5}, // SF_VC_V_IVW_SE
925 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2655, 238, 4}, // SF_VC_V_IV_SE
926 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2679, 247, 5}, // SF_VC_V_I_SE
927 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2702, 233, 5}, // SF_VC_V_VVV_SE
928 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2727, 242, 5}, // SF_VC_V_VVW_SE
929 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2752, 238, 4}, // SF_VC_V_VV_SE
930 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2776, 233, 5}, // SF_VC_V_XVV_SE
931 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2801, 242, 5}, // SF_VC_V_XVW_SE
932 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2826, 238, 4}, // SF_VC_V_XV_SE
933 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2850, 247, 5}, // SF_VC_V_X_SE
934 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2873, 47, 4}, // SF_VC_XVV_SE
935 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2896, 51, 4}, // SF_VC_XVW_SE
936 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2919, 415, 4}, // SF_VC_XV_SE
937 {1, 1, 0, 0, 0, 2941, 327, 2}, // SHA256SIG0
938 {1, 1, 0, 0, 0, 2962, 327, 2}, // SHA256SIG1
939 {1, 1, 0, 0, 0, 2983, 327, 2}, // SHA256SUM0
940 {1, 1, 0, 0, 0, 3004, 327, 2}, // SHA256SUM1
941 {1, 3, 0, 0, 0, 3025, 403, 5}, // SHL_ADD
942 {1, 5, 0, 0, 3, 3043, 357, 8}, // SHL_VL
943 {1, 3, 0, 0, 2, 3060, 104, 6}, // SINT_TO_FP_VL
944 {1, 2, 0, 0, 0, 3084, 348, 3}, // SLLW
945 {1, 1, 0, 0, 0, 3099, 327, 2}, // SM3P0
946 {1, 1, 0, 0, 0, 3115, 327, 2}, // SM3P1
947 {1, 3, 0, 0, 0, 3131, 29, 4}, // SM4ED
948 {1, 3, 0, 0, 0, 3147, 29, 4}, // SM4KS
949 {1, 5, 0, 0, 3, 3163, 357, 8}, // SMAX_VL
950 {1, 5, 0, 0, 3, 3181, 357, 8}, // SMIN_VL
951 {1, 4, 0, 0, 0, 3199, 214, 6}, // SPLAT_VECTOR_SPLIT_I64_VL
952 {1, 2, 0, 0, 0, 3235, 348, 3}, // SRAW
953 {1, 5, 0, 0, 3, 3250, 357, 8}, // SRA_VL
954 {1, 5, 0, 0, 3, 3267, 357, 8}, // SREM_VL
955 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 3285, 0, 0}, // SRET_GLUE
956 {1, 2, 0, 0, 0, 3305, 348, 3}, // SRLW
957 {1, 5, 0, 0, 3, 3320, 357, 8}, // SRL_VL
958 {1, 5, 0, 0, 3, 3337, 357, 8}, // SSUBSAT_VL
959 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3358, 372, 8}, // STRICT_FADD_VL
960 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 3383, 57, 3}, // STRICT_FCVT_WU_RV64
961 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 3413, 57, 3}, // STRICT_FCVT_W_RV64
962 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3442, 372, 8}, // STRICT_FDIV_VL
963 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3467, 372, 8}, // STRICT_FMUL_VL
964 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3492, 117, 7}, // STRICT_FP_EXTEND_VL
965 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3522, 110, 7}, // STRICT_FP_ROUND_VL
966 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3551, 421, 8}, // STRICT_FSETCCS_VL
967 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3579, 421, 8}, // STRICT_FSETCC_VL
968 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3606, 333, 6}, // STRICT_FSQRT_VL
969 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3632, 372, 8}, // STRICT_FSUB_VL
970 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3657, 104, 6}, // STRICT_SINT_TO_FP_VL
971 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3688, 104, 6}, // STRICT_UINT_TO_FP_VL
972 {1, 4, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3719, 87, 7}, // STRICT_VFCVT_RM_X_F_VL
973 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3752, 88, 6}, // STRICT_VFCVT_RTZ_XU_F_VL
974 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3787, 88, 6}, // STRICT_VFCVT_RTZ_X_F_VL
975 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3821, 391, 8}, // STRICT_VFMADD_VL
976 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3848, 391, 8}, // STRICT_VFMSUB_VL
977 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3875, 110, 7}, // STRICT_VFNCVT_ROD_VL
978 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3906, 391, 8}, // STRICT_VFNMADD_VL
979 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3934, 391, 8}, // STRICT_VFNMSUB_VL
980 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3962, 333, 6}, // STRICT_VFROUND_NOEXCEPT_VL
981 {2, 4, 0, 0, 0, 3999, 13, 6}, // SUBD
982 {1, 5, 0, 0, 3, 4014, 357, 8}, // SUB_VL
983 {1, 2, 0|1<<SDNPHasChain, 0, 0, 4031, 84, 3}, // SWAP_CSR
984 {0, 1, 0|1<<SDNPHasChain, 0, 0, 4050, 70, 1}, // SW_GUARDED_BRIND
985 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 4077, 32, 1}, // SW_GUARDED_CALL
986 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 4103, 32, 1}, // SW_GUARDED_TAIL
987 {2, 1, 0, 0, 0, 4129, 19, 3}, // SplitF64
988 {2, 1, 0, 0, 0, 4148, 33, 3}, // SplitGPRPair
989 {2, 1, 0, 0, 0, 4171, 4, 3}, // SplitGPRVec
990 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 4193, 32, 1}, // TAIL
991 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4208, 408, 4}, // TH_LDD
992 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4225, 408, 4}, // TH_LWD
993 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4242, 408, 4}, // TH_LWUD
994 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4260, 408, 4}, // TH_SDD
995 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4277, 408, 4}, // TH_SWD
996 {1, 3, 0, 0, 2, 4294, 220, 5}, // TRUNCATE_VECTOR_VL
997 {1, 3, 0, 0, 2, 4323, 220, 5}, // TRUNCATE_VECTOR_VL_SSAT
998 {1, 3, 0, 0, 2, 4357, 220, 5}, // TRUNCATE_VECTOR_VL_USAT
999 {1, 2, 0, 0, 0, 4391, 321, 2}, // TUPLE_EXTRACT
1000 {1, 3, 0, 0, 0, 4415, 429, 3}, // TUPLE_INSERT
1001 {1, 5, 0, 0, 3, 4438, 357, 8}, // UADDSAT_VL
1002 {1, 5, 0, 0, 3, 4459, 357, 8}, // UDIV_VL
1003 {1, 3, 0, 0, 2, 4477, 104, 6}, // UINT_TO_FP_VL
1004 {1, 5, 0, 0, 3, 4501, 357, 8}, // UMAX_VL
1005 {1, 5, 0, 0, 3, 4519, 357, 8}, // UMIN_VL
1006 {1, 1, 0, 0, 0, 4537, 327, 2}, // UNZIP
1007 {1, 5, 0, 0, 3, 4553, 357, 8}, // UREM_VL
1008 {1, 2, 0, 0, 0, 4571, 351, 3}, // USATI
1009 {1, 5, 0, 0, 3, 4587, 357, 8}, // USUBSAT_VL
1010 {1, 3, 0, 0, 2, 4608, 41, 6}, // VCPOP_VL
1011 {1, 5, 0, 0, 3, 4627, 357, 8}, // VDOT4ASU_VL
1012 {1, 5, 0, 0, 3, 4649, 357, 8}, // VDOT4AU_VL
1013 {1, 5, 0, 0, 3, 4670, 357, 8}, // VDOT4A_VL
1014 {1, 6, 0, 0, 2, 4690, 278, 8}, // VECREDUCE_ADD_VL
1015 {1, 6, 0, 0, 2, 4717, 278, 8}, // VECREDUCE_AND_VL
1016 {1, 6, 0, 0, 2, 4744, 278, 8}, // VECREDUCE_FADD_VL
1017 {1, 6, 0, 0, 2, 4772, 278, 8}, // VECREDUCE_FMAX_VL
1018 {1, 6, 0, 0, 2, 4800, 278, 8}, // VECREDUCE_FMIN_VL
1019 {1, 6, 0, 0, 2, 4828, 278, 8}, // VECREDUCE_OR_VL
1020 {1, 6, 0, 0, 2, 4854, 278, 8}, // VECREDUCE_SEQ_FADD_VL
1021 {1, 6, 0, 0, 2, 4886, 278, 8}, // VECREDUCE_SMAX_VL
1022 {1, 6, 0, 0, 2, 4914, 278, 8}, // VECREDUCE_SMIN_VL
1023 {1, 6, 0, 0, 2, 4942, 278, 8}, // VECREDUCE_UMAX_VL
1024 {1, 6, 0, 0, 2, 4970, 278, 8}, // VECREDUCE_UMIN_VL
1025 {1, 6, 0, 0, 2, 4998, 278, 8}, // VECREDUCE_XOR_VL
1026 {1, 4, 0, 0, 2, 5025, 103, 7}, // VFCVT_RM_F_XU_VL
1027 {1, 4, 0, 0, 2, 5052, 103, 7}, // VFCVT_RM_F_X_VL
1028 {1, 4, 0, 0, 2, 5078, 87, 7}, // VFCVT_RM_XU_F_VL
1029 {1, 4, 0, 0, 2, 5105, 87, 7}, // VFCVT_RM_X_F_VL
1030 {1, 3, 0, 0, 2, 5131, 88, 6}, // VFCVT_RTZ_XU_F_VL
1031 {1, 3, 0, 0, 2, 5159, 88, 6}, // VFCVT_RTZ_X_F_VL
1032 {1, 3, 0, 0, 2, 5186, 41, 6}, // VFIRST_VL
1033 {1, 5, 0, 0, 2, 5206, 391, 8}, // VFMADD_VL
1034 {1, 5, 0, 0, 3, 5226, 372, 8}, // VFMAX_VL
1035 {1, 5, 0, 0, 3, 5245, 372, 8}, // VFMIN_VL
1036 {1, 5, 0, 0, 2, 5264, 391, 8}, // VFMSUB_VL
1037 {1, 3, 0, 0, 0, 5284, 329, 4}, // VFMV_S_F_VL
1038 {1, 3, 0, 0, 0, 5306, 159, 5}, // VFMV_V_F_VL
1039 {1, 3, 0, 0, 2, 5328, 110, 7}, // VFNCVT_ROD_VL
1040 {1, 5, 0, 0, 2, 5352, 391, 8}, // VFNMADD_VL
1041 {1, 5, 0, 0, 2, 5373, 391, 8}, // VFNMSUB_VL
1042 {1, 3, 0, 0, 2, 5394, 333, 6}, // VFROUND_NOEXCEPT_VL
1043 {1, 5, 0, 0, 2, 5424, 294, 8}, // VFSLIDE1DOWN_VL
1044 {1, 5, 0, 0, 2, 5450, 294, 8}, // VFSLIDE1UP_VL
1045 {1, 5, 0, 0, 3, 5474, 164, 10}, // VFWADD_VL
1046 {1, 5, 0, 0, 3, 5494, 149, 10}, // VFWADD_W_VL
1047 {1, 5, 0, 0, 2, 5516, 174, 11}, // VFWMADD_VL
1048 {1, 5, 0, 0, 2, 5537, 174, 11}, // VFWMSUB_VL
1049 {1, 5, 0, 0, 3, 5558, 164, 10}, // VFWMUL_VL
1050 {1, 5, 0, 0, 2, 5578, 174, 11}, // VFWNMADD_VL
1051 {1, 5, 0, 0, 2, 5600, 174, 11}, // VFWNMSUB_VL
1052 {1, 5, 0, 0, 3, 5622, 164, 10}, // VFWSUB_VL
1053 {1, 5, 0, 0, 3, 5642, 149, 10}, // VFWSUB_W_VL
1054 {1, 2, 0, 0, 2, 5664, 317, 4}, // VID_VL
1055 {1, 3, 0, 0, 0, 5681, 399, 4}, // VMAND_VL
1056 {1, 1, 0, 0, 0, 5700, 419, 2}, // VMCLR_VL
1057 {1, 5, 0, 0, 1, 5719, 259, 8}, // VMERGE_VL
1058 {1, 3, 0, 0, 0, 5739, 399, 4}, // VMOR_VL
1059 {1, 1, 0, 0, 0, 5757, 419, 2}, // VMSET_VL
1060 {1, 3, 0, 0, 0, 5776, 325, 4}, // VMV_S_X_VL
1061 {1, 3, 0, 0, 0, 5797, 185, 4}, // VMV_V_V_VL
1062 {1, 3, 0, 0, 0, 5818, 124, 5}, // VMV_V_X_VL
1063 {1, 1, 0, 0, 0, 5839, 94, 3}, // VMV_X_S
1064 {1, 3, 0, 0, 0, 5857, 399, 4}, // VMXOR_VL
1065 {1, 5, 0, 0, 3, 5876, 380, 7}, // VPAIRE_VL
1066 {1, 5, 0, 0, 3, 5896, 380, 7}, // VPAIRO_VL
1067 {1, 5, 0, 0, 2, 5916, 205, 9}, // VRGATHEREI16_VV_VL
1068 {1, 5, 0, 0, 2, 5945, 196, 9}, // VRGATHER_VV_VL
1069 {1, 5, 0, 0, 2, 5970, 189, 7}, // VRGATHER_VX_VL
1070 {1, 3, 0, 0, 2, 5995, 225, 5}, // VSEXT_VL
1071 {1, 5, 0, 0, 2, 6014, 286, 8}, // VSLIDE1DOWN_VL
1072 {1, 5, 0, 0, 2, 6039, 286, 8}, // VSLIDE1UP_VL
1073 {1, 6, 0, 0, 2, 6062, 302, 8}, // VSLIDEDOWN_VL
1074 {1, 6, 0, 0, 2, 6086, 302, 8}, // VSLIDEUP_VL
1075 {1, 4, 0, 0, 3, 6108, 252, 7}, // VUNZIPE_VL
1076 {1, 4, 0, 0, 3, 6129, 252, 7}, // VUNZIPO_VL
1077 {1, 5, 0, 0, 3, 6150, 139, 10}, // VWABDAU_VL
1078 {1, 5, 0, 0, 3, 6171, 139, 10}, // VWABDA_VL
1079 {1, 5, 0, 0, 3, 6191, 139, 10}, // VWADDU_VL
1080 {1, 5, 0, 0, 3, 6211, 129, 10}, // VWADDU_W_VL
1081 {1, 5, 0, 0, 3, 6233, 139, 10}, // VWADD_VL
1082 {1, 5, 0, 0, 3, 6252, 129, 10}, // VWADD_W_VL
1083 {1, 5, 0, 0, 2, 6273, 139, 10}, // VWMACCSU_VL
1084 {1, 5, 0, 0, 2, 6295, 139, 10}, // VWMACCU_VL
1085 {1, 5, 0, 0, 2, 6316, 139, 10}, // VWMACC_VL
1086 {1, 5, 0, 0, 3, 6336, 139, 10}, // VWMULSU_VL
1087 {1, 5, 0, 0, 3, 6357, 139, 10}, // VWMULU_VL
1088 {1, 5, 0, 0, 3, 6377, 139, 10}, // VWMUL_VL
1089 {1, 5, 0, 0, 3, 6396, 139, 10}, // VWSLL_VL
1090 {1, 5, 0, 0, 3, 6415, 139, 10}, // VWSUBU_VL
1091 {1, 5, 0, 0, 3, 6435, 129, 10}, // VWSUBU_W_VL
1092 {1, 5, 0, 0, 3, 6457, 139, 10}, // VWSUB_VL
1093 {1, 5, 0, 0, 3, 6476, 129, 10}, // VWSUB_W_VL
1094 {1, 3, 0, 0, 2, 6497, 225, 5}, // VZEXT_VL
1095 {1, 5, 0, 0, 3, 6516, 267, 8}, // VZIP_VL
1096 {2, 2, 0, 0, 0, 6534, 387, 4}, // WADD
1097 {2, 4, 0, 0, 0, 6549, 7, 6}, // WADDA
1098 {2, 4, 0, 0, 0, 6565, 7, 6}, // WADDAU
1099 {2, 2, 0, 0, 0, 6582, 387, 4}, // WADDU
1100 {2, 2, 0, 0, 0, 6598, 387, 4}, // WMULSU
1101 {0, 2, 0|1<<SDNPHasChain, 0, 0, 6615, 85, 2}, // WRITE_CSR
1102 {2, 2, 0, 0, 0, 6635, 0, 4}, // WSLA
1103 {2, 2, 0, 0, 0, 6650, 0, 4}, // WSLL
1104 {2, 2, 0, 0, 0, 6665, 387, 4}, // WSUB
1105 {2, 4, 0, 0, 0, 6680, 7, 6}, // WSUBA
1106 {2, 4, 0, 0, 0, 6696, 7, 6}, // WSUBAU
1107 {2, 2, 0, 0, 0, 6713, 387, 4}, // WSUBU
1108 {1, 5, 0, 0, 3, 6729, 357, 8}, // XOR_VL
1109 {1, 1, 0, 0, 0, 6746, 327, 2}, // ZIP
1110};
1111
1112static const SDNodeInfo RISCVGenSDNodeInfo(
1113 /*NumOpcodes=*/324, RISCVSDNodeDescs, RISCVSDNodeNames,
1114 RISCVVTByHwModeTable, RISCVSDTypeConstraints);
1115
1116} // namespace llvm
1117
1118#endif // GET_SDNODE_DESC
1119
1120