1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target SDNode descriptions *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: RISCV.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10#ifdef GET_SDNODE_ENUM
11#undef GET_SDNODE_ENUM
12
13namespace llvm::RISCVISD {
14
15enum GenNodeType : unsigned {
16 ABDS_VL = ISD::BUILTIN_OP_END,
17 ABDU_VL,
18 ABSW,
19 ADDD,
20 ADD_LO,
21 ADD_TPREL,
22 ADD_VL,
23 AND_VL,
24 ASUB,
25 ASUBU,
26 AVGCEILS_VL,
27 AVGCEILU_VL,
28 AVGFLOORS_VL,
29 AVGFLOORU_VL,
30 BITREVERSE_VL,
31 BREV8,
32 BR_CC,
33 BSWAP_VL,
34 BuildGPRPair,
35 BuildPairF64,
36 BuildPairGPRVec,
37 CALL,
38 CLEAR_CSR,
39 CLMULH_VL,
40 CLMUL_VL,
41 CLSW,
42 CLZW,
43 CTLZ_VL,
44 CTPOP_VL,
45 CTTZ_VL,
46 CTZW,
47 CZERO_EQZ,
48 CZERO_NEZ,
49 DIVUW,
50 DIVW,
51 FABS_VL,
52 FADD_VL,
53 FCLASS,
54 FCLASS_VL,
55 FCOPYSIGN_VL,
56 FCVT_WU_RV64,
57 FCVT_W_RV64,
58 FCVT_X,
59 FCVT_XU,
60 FDIV_VL,
61 FLI,
62 FMAX,
63 FMIN,
64 FMUL_VL,
65 FMV_H_X,
66 FMV_W_X_RV64,
67 FMV_X_ANYEXTH,
68 FMV_X_ANYEXTW_RV64,
69 FMV_X_SIGNEXTH,
70 FNEG_VL,
71 FP_EXTEND_VL,
72 FP_ROUND_VL,
73 FROUND,
74 FSGNJX,
75 FSQRT_VL,
76 FSUB_VL,
77 HI,
78 LD_RV32,
79 LLA,
80 LPAD_CALL,
81 LPAD_CALL_INDIRECT,
82 MERGE,
83 MHACC,
84 MHACCSU,
85 MHACCU,
86 MHRACC,
87 MHRACCSU,
88 MHRACCU,
89 MNRET_GLUE,
90 MOP_R,
91 MOP_RR,
92 MQACC_00,
93 MQACC_01,
94 MQACC_11,
95 MQRACC_00,
96 MQRACC_01,
97 MQRACC_11,
98 MQRWACC,
99 MQWACC,
100 MRET_GLUE,
101 MULHR,
102 MULHRSU,
103 MULHRU,
104 MULHSU,
105 MULHS_VL,
106 MULHU_VL,
107 MULQ,
108 MULQR,
109 MUL_VL,
110 NCLIP,
111 NCLIPU,
112 NDS_FMV_BF16_X,
113 NDS_FMV_X_ANYEXTBF16,
114 NEGW_MAX,
115 NSRA,
116 NSRL,
117 ORC_B,
118 OR_VL,
119 PM2ADD,
120 PM2ADDAU_H,
121 PM2ADDA_H,
122 PM2ADDSU,
123 PM2ADDU,
124 PM2ADDU_H,
125 PM2ADD_H,
126 PM2ADD_X,
127 PM2SADD,
128 PM2SADD_X,
129 PM2SUB,
130 PM2SUB_H,
131 PM2SUB_X,
132 PM2WADD,
133 PM2WADDA,
134 PM2WADDASU,
135 PM2WADDAU,
136 PM2WADDSU,
137 PM2WADDU,
138 PM4ADD,
139 PM4ADDSU,
140 PM4ADDU,
141 PMACCSU_HALVES_00,
142 PMACCSU_HALVES_11,
143 PMACCU_HALVES_00,
144 PMACCU_HALVES_01,
145 PMACCU_HALVES_11,
146 PMACC_HALVES_00,
147 PMACC_HALVES_01,
148 PMACC_HALVES_11,
149 PMQ2ADD,
150 PMQACC_W_H00,
151 PMQACC_W_H01,
152 PMQACC_W_H11,
153 PMQR2ADD,
154 PMQRACC_W_H00,
155 PMQRACC_W_H01,
156 PMQRACC_W_H11,
157 PMULSU_HALVES_00,
158 PMULSU_HALVES_11,
159 PMULU_HALVES_00,
160 PMULU_HALVES_01,
161 PMULU_HALVES_11,
162 PMUL_HALVES_00,
163 PMUL_HALVES_01,
164 PMUL_HALVES_11,
165 PNCLIP,
166 PNCLIPP,
167 PNCLIPP_W,
168 PNCLIPU,
169 PNCLIPUP,
170 PNCLIPUP_W,
171 PNSRL,
172 PPAIRE,
173 PPAIREO,
174 PPAIRO,
175 PPAIROE,
176 PPAIROE_H,
177 PROBED_ALLOCA,
178 PSABS,
179 PSHL,
180 PSRA,
181 PSRL,
182 PSSHA,
183 PSSHAR,
184 PSSHL,
185 PSSHLR,
186 PUNZIPE,
187 PUNZIPO,
188 PWMUL,
189 PWMULSU,
190 PWMULU,
191 PWZIP,
192 PZIP,
193 QC_C_MILEAVERET_GLUE,
194 QC_E_LI,
195 QC_INSB,
196 QC_MULIADD,
197 QC_SETWMI,
198 READ_COUNTER_WIDE,
199 READ_CSR,
200 READ_VLENB,
201 REMUW,
202 RET_GLUE,
203 ROLW,
204 RORW,
205 ROTL_VL,
206 ROTR_VL,
207 SADDSAT_VL,
208 SATI,
209 SDIV_VL,
210 SD_RV32,
211 SELECT_CC,
212 SETCC_VL,
213 SET_CSR,
214 SF_VC_FVV_SE,
215 SF_VC_FVW_SE,
216 SF_VC_FV_SE,
217 SF_VC_IVV_SE,
218 SF_VC_IVW_SE,
219 SF_VC_IV_SE,
220 SF_VC_VVV_SE,
221 SF_VC_VVW_SE,
222 SF_VC_VV_SE,
223 SF_VC_V_FVV_SE,
224 SF_VC_V_FVW_SE,
225 SF_VC_V_FV_SE,
226 SF_VC_V_IVV_SE,
227 SF_VC_V_IVW_SE,
228 SF_VC_V_IV_SE,
229 SF_VC_V_I_SE,
230 SF_VC_V_VVV_SE,
231 SF_VC_V_VVW_SE,
232 SF_VC_V_VV_SE,
233 SF_VC_V_XVV_SE,
234 SF_VC_V_XVW_SE,
235 SF_VC_V_XV_SE,
236 SF_VC_V_X_SE,
237 SF_VC_XVV_SE,
238 SF_VC_XVW_SE,
239 SF_VC_XV_SE,
240 SHA256SIG0,
241 SHA256SIG1,
242 SHA256SUM0,
243 SHA256SUM1,
244 SHL_ADD,
245 SHL_VL,
246 SINT_TO_FP_VL,
247 SLLW,
248 SM3P0,
249 SM3P1,
250 SM4ED,
251 SM4KS,
252 SMAX_VL,
253 SMIN_VL,
254 SPLAT_VECTOR_SPLIT_I64_VL,
255 SRAW,
256 SRA_VL,
257 SREM_VL,
258 SRET_GLUE,
259 SRLW,
260 SRL_VL,
261 SSUBSAT_VL,
262 STRICT_FADD_VL,
263 STRICT_FCVT_WU_RV64,
264 STRICT_FCVT_W_RV64,
265 STRICT_FDIV_VL,
266 STRICT_FMUL_VL,
267 STRICT_FP_EXTEND_VL,
268 STRICT_FP_ROUND_VL,
269 STRICT_FSETCCS_VL,
270 STRICT_FSETCC_VL,
271 STRICT_FSQRT_VL,
272 STRICT_FSUB_VL,
273 STRICT_SINT_TO_FP_VL,
274 STRICT_UINT_TO_FP_VL,
275 STRICT_VFCVT_RM_X_F_VL,
276 STRICT_VFCVT_RTZ_XU_F_VL,
277 STRICT_VFCVT_RTZ_X_F_VL,
278 STRICT_VFMADD_VL,
279 STRICT_VFMSUB_VL,
280 STRICT_VFNCVT_ROD_VL,
281 STRICT_VFNMADD_VL,
282 STRICT_VFNMSUB_VL,
283 STRICT_VFROUND_NOEXCEPT_VL,
284 SUBD,
285 SUB_VL,
286 SWAP_CSR,
287 SW_GUARDED_BRIND,
288 SW_GUARDED_CALL,
289 SW_GUARDED_TAIL,
290 SplitF64,
291 SplitGPRPair,
292 SplitGPRVec,
293 TAIL,
294 TH_LDD,
295 TH_LWD,
296 TH_LWUD,
297 TH_SDD,
298 TH_SWD,
299 TRUNCATE_VECTOR_VL,
300 TRUNCATE_VECTOR_VL_SSAT,
301 TRUNCATE_VECTOR_VL_USAT,
302 TUPLE_EXTRACT,
303 TUPLE_INSERT,
304 UADDSAT_VL,
305 UDIV_VL,
306 UINT_TO_FP_VL,
307 UMAX_VL,
308 UMIN_VL,
309 UNZIP,
310 UREM_VL,
311 USATI,
312 USUBSAT_VL,
313 VCPOP_VL,
314 VDOT4ASU_VL,
315 VDOT4AU_VL,
316 VDOT4A_VL,
317 VECREDUCE_ADD_VL,
318 VECREDUCE_AND_VL,
319 VECREDUCE_FADD_VL,
320 VECREDUCE_FMAX_VL,
321 VECREDUCE_FMIN_VL,
322 VECREDUCE_OR_VL,
323 VECREDUCE_SEQ_FADD_VL,
324 VECREDUCE_SMAX_VL,
325 VECREDUCE_SMIN_VL,
326 VECREDUCE_UMAX_VL,
327 VECREDUCE_UMIN_VL,
328 VECREDUCE_XOR_VL,
329 VFCVT_RM_F_XU_VL,
330 VFCVT_RM_F_X_VL,
331 VFCVT_RM_XU_F_VL,
332 VFCVT_RM_X_F_VL,
333 VFCVT_RTZ_XU_F_VL,
334 VFCVT_RTZ_X_F_VL,
335 VFIRST_VL,
336 VFMADD_VL,
337 VFMAX_VL,
338 VFMIN_VL,
339 VFMSUB_VL,
340 VFMV_S_F_VL,
341 VFMV_V_F_VL,
342 VFNCVT_ROD_VL,
343 VFNMADD_VL,
344 VFNMSUB_VL,
345 VFROUND_NOEXCEPT_VL,
346 VFSLIDE1DOWN_VL,
347 VFSLIDE1UP_VL,
348 VFWADD_VL,
349 VFWADD_W_VL,
350 VFWMADD_VL,
351 VFWMSUB_VL,
352 VFWMUL_VL,
353 VFWNMADD_VL,
354 VFWNMSUB_VL,
355 VFWSUB_VL,
356 VFWSUB_W_VL,
357 VID_VL,
358 VMAND_VL,
359 VMCLR_VL,
360 VMERGE_VL,
361 VMOR_VL,
362 VMSET_VL,
363 VMV_S_X_VL,
364 VMV_V_V_VL,
365 VMV_V_X_VL,
366 VMV_X_S,
367 VMXOR_VL,
368 VPAIRE_VL,
369 VPAIRO_VL,
370 VRGATHEREI16_VV_VL,
371 VRGATHER_VV_VL,
372 VRGATHER_VX_VL,
373 VSEXT_VL,
374 VSLIDE1DOWN_VL,
375 VSLIDE1UP_VL,
376 VSLIDEDOWN_VL,
377 VSLIDEUP_VL,
378 VUNZIPE_VL,
379 VUNZIPO_VL,
380 VWABDAU_VL,
381 VWABDA_VL,
382 VWADDU_VL,
383 VWADDU_W_VL,
384 VWADD_VL,
385 VWADD_W_VL,
386 VWMACCSU_VL,
387 VWMACCU_VL,
388 VWMACC_VL,
389 VWMULSU_VL,
390 VWMULU_VL,
391 VWMUL_VL,
392 VWSLL_VL,
393 VWSUBU_VL,
394 VWSUBU_W_VL,
395 VWSUB_VL,
396 VWSUB_W_VL,
397 VZEXT_VL,
398 VZIP_VL,
399 WADD,
400 WADDA,
401 WADDAU,
402 WADDU,
403 WMACC,
404 WMACCSU,
405 WMACCU,
406 WMULSU,
407 WRITE_CSR,
408 WSLA,
409 WSLL,
410 WSUB,
411 WSUBA,
412 WSUBAU,
413 WSUBU,
414 XOR_VL,
415 ZIP,
416};
417
418static constexpr unsigned GENERATED_OPCODE_END = ZIP + 1;
419
420} // namespace llvm::RISCVISD
421
422#endif // GET_SDNODE_ENUM
423
424#ifdef GET_SDNODE_DESC
425#undef GET_SDNODE_DESC
426
427namespace llvm {
428
429
430#ifdef __GNUC__
431#pragma GCC diagnostic push
432#pragma GCC diagnostic ignored "-Woverlength-strings"
433#endif
434static constexpr char RISCVSDNodeNamesStorage[] =
435 "\0"
436 "RISCVISD::ABDS_VL\0"
437 "RISCVISD::ABDU_VL\0"
438 "RISCVISD::ABSW\0"
439 "RISCVISD::ADDD\0"
440 "RISCVISD::ADD_LO\0"
441 "RISCVISD::ADD_TPREL\0"
442 "RISCVISD::ADD_VL\0"
443 "RISCVISD::AND_VL\0"
444 "RISCVISD::ASUB\0"
445 "RISCVISD::ASUBU\0"
446 "RISCVISD::AVGCEILS_VL\0"
447 "RISCVISD::AVGCEILU_VL\0"
448 "RISCVISD::AVGFLOORS_VL\0"
449 "RISCVISD::AVGFLOORU_VL\0"
450 "RISCVISD::BITREVERSE_VL\0"
451 "RISCVISD::BREV8\0"
452 "RISCVISD::BR_CC\0"
453 "RISCVISD::BSWAP_VL\0"
454 "RISCVISD::BuildGPRPair\0"
455 "RISCVISD::BuildPairF64\0"
456 "RISCVISD::BuildPairGPRVec\0"
457 "RISCVISD::CALL\0"
458 "RISCVISD::CLEAR_CSR\0"
459 "RISCVISD::CLMULH_VL\0"
460 "RISCVISD::CLMUL_VL\0"
461 "RISCVISD::CLSW\0"
462 "RISCVISD::CLZW\0"
463 "RISCVISD::CTLZ_VL\0"
464 "RISCVISD::CTPOP_VL\0"
465 "RISCVISD::CTTZ_VL\0"
466 "RISCVISD::CTZW\0"
467 "RISCVISD::CZERO_EQZ\0"
468 "RISCVISD::CZERO_NEZ\0"
469 "RISCVISD::DIVUW\0"
470 "RISCVISD::DIVW\0"
471 "RISCVISD::FABS_VL\0"
472 "RISCVISD::FADD_VL\0"
473 "RISCVISD::FCLASS\0"
474 "RISCVISD::FCLASS_VL\0"
475 "RISCVISD::FCOPYSIGN_VL\0"
476 "RISCVISD::FCVT_WU_RV64\0"
477 "RISCVISD::FCVT_W_RV64\0"
478 "RISCVISD::FCVT_X\0"
479 "RISCVISD::FCVT_XU\0"
480 "RISCVISD::FDIV_VL\0"
481 "RISCVISD::FLI\0"
482 "RISCVISD::FMAX\0"
483 "RISCVISD::FMIN\0"
484 "RISCVISD::FMUL_VL\0"
485 "RISCVISD::FMV_H_X\0"
486 "RISCVISD::FMV_W_X_RV64\0"
487 "RISCVISD::FMV_X_ANYEXTH\0"
488 "RISCVISD::FMV_X_ANYEXTW_RV64\0"
489 "RISCVISD::FMV_X_SIGNEXTH\0"
490 "RISCVISD::FNEG_VL\0"
491 "RISCVISD::FP_EXTEND_VL\0"
492 "RISCVISD::FP_ROUND_VL\0"
493 "RISCVISD::FROUND\0"
494 "RISCVISD::FSGNJX\0"
495 "RISCVISD::FSQRT_VL\0"
496 "RISCVISD::FSUB_VL\0"
497 "RISCVISD::HI\0"
498 "RISCVISD::LD_RV32\0"
499 "RISCVISD::LLA\0"
500 "RISCVISD::LPAD_CALL\0"
501 "RISCVISD::LPAD_CALL_INDIRECT\0"
502 "RISCVISD::MERGE\0"
503 "RISCVISD::MHACC\0"
504 "RISCVISD::MHACCSU\0"
505 "RISCVISD::MHACCU\0"
506 "RISCVISD::MHRACC\0"
507 "RISCVISD::MHRACCSU\0"
508 "RISCVISD::MHRACCU\0"
509 "RISCVISD::MNRET_GLUE\0"
510 "RISCVISD::MOP_R\0"
511 "RISCVISD::MOP_RR\0"
512 "RISCVISD::MQACC_00\0"
513 "RISCVISD::MQACC_01\0"
514 "RISCVISD::MQACC_11\0"
515 "RISCVISD::MQRACC_00\0"
516 "RISCVISD::MQRACC_01\0"
517 "RISCVISD::MQRACC_11\0"
518 "RISCVISD::MQRWACC\0"
519 "RISCVISD::MQWACC\0"
520 "RISCVISD::MRET_GLUE\0"
521 "RISCVISD::MULHR\0"
522 "RISCVISD::MULHRSU\0"
523 "RISCVISD::MULHRU\0"
524 "RISCVISD::MULHSU\0"
525 "RISCVISD::MULHS_VL\0"
526 "RISCVISD::MULHU_VL\0"
527 "RISCVISD::MULQ\0"
528 "RISCVISD::MULQR\0"
529 "RISCVISD::MUL_VL\0"
530 "RISCVISD::NCLIP\0"
531 "RISCVISD::NCLIPU\0"
532 "RISCVISD::NDS_FMV_BF16_X\0"
533 "RISCVISD::NDS_FMV_X_ANYEXTBF16\0"
534 "RISCVISD::NEGW_MAX\0"
535 "RISCVISD::NSRA\0"
536 "RISCVISD::NSRL\0"
537 "RISCVISD::ORC_B\0"
538 "RISCVISD::OR_VL\0"
539 "RISCVISD::PM2ADD\0"
540 "RISCVISD::PM2ADDAU_H\0"
541 "RISCVISD::PM2ADDA_H\0"
542 "RISCVISD::PM2ADDSU\0"
543 "RISCVISD::PM2ADDU\0"
544 "RISCVISD::PM2ADDU_H\0"
545 "RISCVISD::PM2ADD_H\0"
546 "RISCVISD::PM2ADD_X\0"
547 "RISCVISD::PM2SADD\0"
548 "RISCVISD::PM2SADD_X\0"
549 "RISCVISD::PM2SUB\0"
550 "RISCVISD::PM2SUB_H\0"
551 "RISCVISD::PM2SUB_X\0"
552 "RISCVISD::PM2WADD\0"
553 "RISCVISD::PM2WADDA\0"
554 "RISCVISD::PM2WADDASU\0"
555 "RISCVISD::PM2WADDAU\0"
556 "RISCVISD::PM2WADDSU\0"
557 "RISCVISD::PM2WADDU\0"
558 "RISCVISD::PM4ADD\0"
559 "RISCVISD::PM4ADDSU\0"
560 "RISCVISD::PM4ADDU\0"
561 "RISCVISD::PMACCSU_HALVES_00\0"
562 "RISCVISD::PMACCSU_HALVES_11\0"
563 "RISCVISD::PMACCU_HALVES_00\0"
564 "RISCVISD::PMACCU_HALVES_01\0"
565 "RISCVISD::PMACCU_HALVES_11\0"
566 "RISCVISD::PMACC_HALVES_00\0"
567 "RISCVISD::PMACC_HALVES_01\0"
568 "RISCVISD::PMACC_HALVES_11\0"
569 "RISCVISD::PMQ2ADD\0"
570 "RISCVISD::PMQACC_W_H00\0"
571 "RISCVISD::PMQACC_W_H01\0"
572 "RISCVISD::PMQACC_W_H11\0"
573 "RISCVISD::PMQR2ADD\0"
574 "RISCVISD::PMQRACC_W_H00\0"
575 "RISCVISD::PMQRACC_W_H01\0"
576 "RISCVISD::PMQRACC_W_H11\0"
577 "RISCVISD::PMULSU_HALVES_00\0"
578 "RISCVISD::PMULSU_HALVES_11\0"
579 "RISCVISD::PMULU_HALVES_00\0"
580 "RISCVISD::PMULU_HALVES_01\0"
581 "RISCVISD::PMULU_HALVES_11\0"
582 "RISCVISD::PMUL_HALVES_00\0"
583 "RISCVISD::PMUL_HALVES_01\0"
584 "RISCVISD::PMUL_HALVES_11\0"
585 "RISCVISD::PNCLIP\0"
586 "RISCVISD::PNCLIPP\0"
587 "RISCVISD::PNCLIPP_W\0"
588 "RISCVISD::PNCLIPU\0"
589 "RISCVISD::PNCLIPUP\0"
590 "RISCVISD::PNCLIPUP_W\0"
591 "RISCVISD::PNSRL\0"
592 "RISCVISD::PPAIRE\0"
593 "RISCVISD::PPAIREO\0"
594 "RISCVISD::PPAIRO\0"
595 "RISCVISD::PPAIROE\0"
596 "RISCVISD::PPAIROE_H\0"
597 "RISCVISD::PROBED_ALLOCA\0"
598 "RISCVISD::PSABS\0"
599 "RISCVISD::PSHL\0"
600 "RISCVISD::PSRA\0"
601 "RISCVISD::PSRL\0"
602 "RISCVISD::PSSHA\0"
603 "RISCVISD::PSSHAR\0"
604 "RISCVISD::PSSHL\0"
605 "RISCVISD::PSSHLR\0"
606 "RISCVISD::PUNZIPE\0"
607 "RISCVISD::PUNZIPO\0"
608 "RISCVISD::PWMUL\0"
609 "RISCVISD::PWMULSU\0"
610 "RISCVISD::PWMULU\0"
611 "RISCVISD::PWZIP\0"
612 "RISCVISD::PZIP\0"
613 "RISCVISD::QC_C_MILEAVERET_GLUE\0"
614 "RISCVISD::QC_E_LI\0"
615 "RISCVISD::QC_INSB\0"
616 "RISCVISD::QC_MULIADD\0"
617 "RISCVISD::QC_SETWMI\0"
618 "RISCVISD::READ_COUNTER_WIDE\0"
619 "RISCVISD::READ_CSR\0"
620 "RISCVISD::READ_VLENB\0"
621 "RISCVISD::REMUW\0"
622 "RISCVISD::RET_GLUE\0"
623 "RISCVISD::ROLW\0"
624 "RISCVISD::RORW\0"
625 "RISCVISD::ROTL_VL\0"
626 "RISCVISD::ROTR_VL\0"
627 "RISCVISD::SADDSAT_VL\0"
628 "RISCVISD::SATI\0"
629 "RISCVISD::SDIV_VL\0"
630 "RISCVISD::SD_RV32\0"
631 "RISCVISD::SELECT_CC\0"
632 "RISCVISD::SETCC_VL\0"
633 "RISCVISD::SET_CSR\0"
634 "RISCVISD::SF_VC_FVV_SE\0"
635 "RISCVISD::SF_VC_FVW_SE\0"
636 "RISCVISD::SF_VC_FV_SE\0"
637 "RISCVISD::SF_VC_IVV_SE\0"
638 "RISCVISD::SF_VC_IVW_SE\0"
639 "RISCVISD::SF_VC_IV_SE\0"
640 "RISCVISD::SF_VC_VVV_SE\0"
641 "RISCVISD::SF_VC_VVW_SE\0"
642 "RISCVISD::SF_VC_VV_SE\0"
643 "RISCVISD::SF_VC_V_FVV_SE\0"
644 "RISCVISD::SF_VC_V_FVW_SE\0"
645 "RISCVISD::SF_VC_V_FV_SE\0"
646 "RISCVISD::SF_VC_V_IVV_SE\0"
647 "RISCVISD::SF_VC_V_IVW_SE\0"
648 "RISCVISD::SF_VC_V_IV_SE\0"
649 "RISCVISD::SF_VC_V_I_SE\0"
650 "RISCVISD::SF_VC_V_VVV_SE\0"
651 "RISCVISD::SF_VC_V_VVW_SE\0"
652 "RISCVISD::SF_VC_V_VV_SE\0"
653 "RISCVISD::SF_VC_V_XVV_SE\0"
654 "RISCVISD::SF_VC_V_XVW_SE\0"
655 "RISCVISD::SF_VC_V_XV_SE\0"
656 "RISCVISD::SF_VC_V_X_SE\0"
657 "RISCVISD::SF_VC_XVV_SE\0"
658 "RISCVISD::SF_VC_XVW_SE\0"
659 "RISCVISD::SF_VC_XV_SE\0"
660 "RISCVISD::SHA256SIG0\0"
661 "RISCVISD::SHA256SIG1\0"
662 "RISCVISD::SHA256SUM0\0"
663 "RISCVISD::SHA256SUM1\0"
664 "RISCVISD::SHL_ADD\0"
665 "RISCVISD::SHL_VL\0"
666 "RISCVISD::SINT_TO_FP_VL\0"
667 "RISCVISD::SLLW\0"
668 "RISCVISD::SM3P0\0"
669 "RISCVISD::SM3P1\0"
670 "RISCVISD::SM4ED\0"
671 "RISCVISD::SM4KS\0"
672 "RISCVISD::SMAX_VL\0"
673 "RISCVISD::SMIN_VL\0"
674 "RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL\0"
675 "RISCVISD::SRAW\0"
676 "RISCVISD::SRA_VL\0"
677 "RISCVISD::SREM_VL\0"
678 "RISCVISD::SRET_GLUE\0"
679 "RISCVISD::SRLW\0"
680 "RISCVISD::SRL_VL\0"
681 "RISCVISD::SSUBSAT_VL\0"
682 "RISCVISD::STRICT_FADD_VL\0"
683 "RISCVISD::STRICT_FCVT_WU_RV64\0"
684 "RISCVISD::STRICT_FCVT_W_RV64\0"
685 "RISCVISD::STRICT_FDIV_VL\0"
686 "RISCVISD::STRICT_FMUL_VL\0"
687 "RISCVISD::STRICT_FP_EXTEND_VL\0"
688 "RISCVISD::STRICT_FP_ROUND_VL\0"
689 "RISCVISD::STRICT_FSETCCS_VL\0"
690 "RISCVISD::STRICT_FSETCC_VL\0"
691 "RISCVISD::STRICT_FSQRT_VL\0"
692 "RISCVISD::STRICT_FSUB_VL\0"
693 "RISCVISD::STRICT_SINT_TO_FP_VL\0"
694 "RISCVISD::STRICT_UINT_TO_FP_VL\0"
695 "RISCVISD::STRICT_VFCVT_RM_X_F_VL\0"
696 "RISCVISD::STRICT_VFCVT_RTZ_XU_F_VL\0"
697 "RISCVISD::STRICT_VFCVT_RTZ_X_F_VL\0"
698 "RISCVISD::STRICT_VFMADD_VL\0"
699 "RISCVISD::STRICT_VFMSUB_VL\0"
700 "RISCVISD::STRICT_VFNCVT_ROD_VL\0"
701 "RISCVISD::STRICT_VFNMADD_VL\0"
702 "RISCVISD::STRICT_VFNMSUB_VL\0"
703 "RISCVISD::STRICT_VFROUND_NOEXCEPT_VL\0"
704 "RISCVISD::SUBD\0"
705 "RISCVISD::SUB_VL\0"
706 "RISCVISD::SWAP_CSR\0"
707 "RISCVISD::SW_GUARDED_BRIND\0"
708 "RISCVISD::SW_GUARDED_CALL\0"
709 "RISCVISD::SW_GUARDED_TAIL\0"
710 "RISCVISD::SplitF64\0"
711 "RISCVISD::SplitGPRPair\0"
712 "RISCVISD::SplitGPRVec\0"
713 "RISCVISD::TAIL\0"
714 "RISCVISD::TH_LDD\0"
715 "RISCVISD::TH_LWD\0"
716 "RISCVISD::TH_LWUD\0"
717 "RISCVISD::TH_SDD\0"
718 "RISCVISD::TH_SWD\0"
719 "RISCVISD::TRUNCATE_VECTOR_VL\0"
720 "RISCVISD::TRUNCATE_VECTOR_VL_SSAT\0"
721 "RISCVISD::TRUNCATE_VECTOR_VL_USAT\0"
722 "RISCVISD::TUPLE_EXTRACT\0"
723 "RISCVISD::TUPLE_INSERT\0"
724 "RISCVISD::UADDSAT_VL\0"
725 "RISCVISD::UDIV_VL\0"
726 "RISCVISD::UINT_TO_FP_VL\0"
727 "RISCVISD::UMAX_VL\0"
728 "RISCVISD::UMIN_VL\0"
729 "RISCVISD::UNZIP\0"
730 "RISCVISD::UREM_VL\0"
731 "RISCVISD::USATI\0"
732 "RISCVISD::USUBSAT_VL\0"
733 "RISCVISD::VCPOP_VL\0"
734 "RISCVISD::VDOT4ASU_VL\0"
735 "RISCVISD::VDOT4AU_VL\0"
736 "RISCVISD::VDOT4A_VL\0"
737 "RISCVISD::VECREDUCE_ADD_VL\0"
738 "RISCVISD::VECREDUCE_AND_VL\0"
739 "RISCVISD::VECREDUCE_FADD_VL\0"
740 "RISCVISD::VECREDUCE_FMAX_VL\0"
741 "RISCVISD::VECREDUCE_FMIN_VL\0"
742 "RISCVISD::VECREDUCE_OR_VL\0"
743 "RISCVISD::VECREDUCE_SEQ_FADD_VL\0"
744 "RISCVISD::VECREDUCE_SMAX_VL\0"
745 "RISCVISD::VECREDUCE_SMIN_VL\0"
746 "RISCVISD::VECREDUCE_UMAX_VL\0"
747 "RISCVISD::VECREDUCE_UMIN_VL\0"
748 "RISCVISD::VECREDUCE_XOR_VL\0"
749 "RISCVISD::VFCVT_RM_F_XU_VL\0"
750 "RISCVISD::VFCVT_RM_F_X_VL\0"
751 "RISCVISD::VFCVT_RM_XU_F_VL\0"
752 "RISCVISD::VFCVT_RM_X_F_VL\0"
753 "RISCVISD::VFCVT_RTZ_XU_F_VL\0"
754 "RISCVISD::VFCVT_RTZ_X_F_VL\0"
755 "RISCVISD::VFIRST_VL\0"
756 "RISCVISD::VFMADD_VL\0"
757 "RISCVISD::VFMAX_VL\0"
758 "RISCVISD::VFMIN_VL\0"
759 "RISCVISD::VFMSUB_VL\0"
760 "RISCVISD::VFMV_S_F_VL\0"
761 "RISCVISD::VFMV_V_F_VL\0"
762 "RISCVISD::VFNCVT_ROD_VL\0"
763 "RISCVISD::VFNMADD_VL\0"
764 "RISCVISD::VFNMSUB_VL\0"
765 "RISCVISD::VFROUND_NOEXCEPT_VL\0"
766 "RISCVISD::VFSLIDE1DOWN_VL\0"
767 "RISCVISD::VFSLIDE1UP_VL\0"
768 "RISCVISD::VFWADD_VL\0"
769 "RISCVISD::VFWADD_W_VL\0"
770 "RISCVISD::VFWMADD_VL\0"
771 "RISCVISD::VFWMSUB_VL\0"
772 "RISCVISD::VFWMUL_VL\0"
773 "RISCVISD::VFWNMADD_VL\0"
774 "RISCVISD::VFWNMSUB_VL\0"
775 "RISCVISD::VFWSUB_VL\0"
776 "RISCVISD::VFWSUB_W_VL\0"
777 "RISCVISD::VID_VL\0"
778 "RISCVISD::VMAND_VL\0"
779 "RISCVISD::VMCLR_VL\0"
780 "RISCVISD::VMERGE_VL\0"
781 "RISCVISD::VMOR_VL\0"
782 "RISCVISD::VMSET_VL\0"
783 "RISCVISD::VMV_S_X_VL\0"
784 "RISCVISD::VMV_V_V_VL\0"
785 "RISCVISD::VMV_V_X_VL\0"
786 "RISCVISD::VMV_X_S\0"
787 "RISCVISD::VMXOR_VL\0"
788 "RISCVISD::VPAIRE_VL\0"
789 "RISCVISD::VPAIRO_VL\0"
790 "RISCVISD::VRGATHEREI16_VV_VL\0"
791 "RISCVISD::VRGATHER_VV_VL\0"
792 "RISCVISD::VRGATHER_VX_VL\0"
793 "RISCVISD::VSEXT_VL\0"
794 "RISCVISD::VSLIDE1DOWN_VL\0"
795 "RISCVISD::VSLIDE1UP_VL\0"
796 "RISCVISD::VSLIDEDOWN_VL\0"
797 "RISCVISD::VSLIDEUP_VL\0"
798 "RISCVISD::VUNZIPE_VL\0"
799 "RISCVISD::VUNZIPO_VL\0"
800 "RISCVISD::VWABDAU_VL\0"
801 "RISCVISD::VWABDA_VL\0"
802 "RISCVISD::VWADDU_VL\0"
803 "RISCVISD::VWADDU_W_VL\0"
804 "RISCVISD::VWADD_VL\0"
805 "RISCVISD::VWADD_W_VL\0"
806 "RISCVISD::VWMACCSU_VL\0"
807 "RISCVISD::VWMACCU_VL\0"
808 "RISCVISD::VWMACC_VL\0"
809 "RISCVISD::VWMULSU_VL\0"
810 "RISCVISD::VWMULU_VL\0"
811 "RISCVISD::VWMUL_VL\0"
812 "RISCVISD::VWSLL_VL\0"
813 "RISCVISD::VWSUBU_VL\0"
814 "RISCVISD::VWSUBU_W_VL\0"
815 "RISCVISD::VWSUB_VL\0"
816 "RISCVISD::VWSUB_W_VL\0"
817 "RISCVISD::VZEXT_VL\0"
818 "RISCVISD::VZIP_VL\0"
819 "RISCVISD::WADD\0"
820 "RISCVISD::WADDA\0"
821 "RISCVISD::WADDAU\0"
822 "RISCVISD::WADDU\0"
823 "RISCVISD::WMACC\0"
824 "RISCVISD::WMACCSU\0"
825 "RISCVISD::WMACCU\0"
826 "RISCVISD::WMULSU\0"
827 "RISCVISD::WRITE_CSR\0"
828 "RISCVISD::WSLA\0"
829 "RISCVISD::WSLL\0"
830 "RISCVISD::WSUB\0"
831 "RISCVISD::WSUBA\0"
832 "RISCVISD::WSUBAU\0"
833 "RISCVISD::WSUBU\0"
834 "RISCVISD::XOR_VL\0"
835 "RISCVISD::ZIP\0"
836 ;
837#ifdef __GNUC__
838#pragma GCC diagnostic pop
839#endif
840
841static constexpr llvm::StringTable
842RISCVSDNodeNames = RISCVSDNodeNamesStorage;
843
844static const VTByHwModePair RISCVVTByHwModeTable[] = {
845 /* 0 */ {0, MVT::i32}, {1, MVT::i64},
846 /* 2 */ {0, MVT::v2i16}, {1, MVT::v2i32},
847};
848
849static const SDTypeConstraint RISCVSDTypeConstraints[] = {
850 /* 0 */ {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32},
851 /* 4 */ {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32},
852 /* 7 */ {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
853 /* 13 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
854 /* 19 */ {SDTCisVT, 2, 0, 0, MVT::f64}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
855 /* 22 */ {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
856 /* 25 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
857 /* 29 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
858 /* 33 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
859 /* 37 */ {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 2, 2}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
860 /* 41 */ {SDTCisVT, 2, 0, 0, MVT::Untyped}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
861 /* 44 */ {SDTCisVT, 1, 0, 0, MVT::bf16}, {SDTCisVT, 0, 0, 2, 0},
862 /* 46 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
863 /* 49 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
864 /* 55 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
865 /* 59 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
866 /* 63 */ {SDTCisVT, 1, 0, 0, MVT::f32}, {SDTCisVT, 0, 0, 0, MVT::i64},
867 /* 65 */ {SDTCisVT, 2, 0, 0, MVT::i64}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i64},
868 /* 68 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::bf16},
869 /* 70 */ {SDTCisVT, 1, 0, 0, MVT::i64}, {SDTCisVT, 0, 0, 0, MVT::f32},
870 /* 72 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::f64},
871 /* 75 */ {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 0, MVT::v2i16}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::v2i32},
872 /* 79 */ {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 0, MVT::v4i16}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::v2i32},
873 /* 83 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::v2i32},
874 /* 86 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::v2i16}, {SDTCisVT, 0, 0, 0, MVT::v2i32},
875 /* 89 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::v4i16}, {SDTCisVT, 0, 0, 0, MVT::v2i32},
876 /* 92 */ {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 0, MVT::v4i16}, {SDTCisVT, 1, 0, 0, MVT::v2i32}, {SDTCisVT, 0, 0, 0, MVT::v2i32},
877 /* 96 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::Untyped},
878 /* 99 */ {SDTCisPtrTy, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
879 /* 100 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
880 /* 109 */ {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
881 /* 113 */ {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
882 /* 116 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
883 /* 123 */ {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
884 /* 126 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
885 /* 130 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
886 /* 132 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
887 /* 139 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
888 /* 146 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
889 /* 153 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
890 /* 158 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
891 /* 168 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
892 /* 178 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
893 /* 188 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
894 /* 193 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
895 /* 203 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
896 /* 214 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
897 /* 218 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
898 /* 225 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
899 /* 234 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i16}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
900 /* 243 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i64}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
901 /* 249 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
902 /* 254 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
903 /* 259 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
904 /* 262 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
905 /* 267 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
906 /* 271 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
907 /* 276 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
908 /* 281 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSubVecOfVec, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
909 /* 286 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
910 /* 294 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
911 /* 297 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSubVecOfVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
912 /* 305 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
913 /* 308 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 2, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
914 /* 316 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
915 /* 324 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisEltOfVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
916 /* 332 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
917 /* 340 */ {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
918 /* 344 */ {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
919 /* 348 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSubVecOfVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
920 /* 351 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
921 /* 355 */ {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
922 /* 357 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
923 /* 359 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
924 /* 363 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
925 /* 367 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
926 /* 373 */ {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
927 /* 377 */ {SDTCisInt, 4, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
928 /* 382 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
929 /* 385 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
930 /* 388 */ {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
931 /* 391 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
932 /* 399 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 3, 0, 0, MVT::i1}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
933 /* 406 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
934 /* 414 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
935 /* 421 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
936 /* 425 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
937 /* 433 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
938 /* 437 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
939 /* 442 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
940 /* 446 */ {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisVT, 2, 0, 0, MVT::Other}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
941 /* 449 */ {SDTCisVT, 0, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
942 /* 453 */ {SDTCisSameSizeAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
943 /* 456 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1},
944 /* 458 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1},
945 /* 466 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
946 /* 468 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
947 /* 471 */ {SDTCisSameAs, 4, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
948};
949
950static const SDNodeDesc RISCVSDNodeDescs[] = {
951 {1, 5, 0, 0, 3, 1, 391, 8}, // ABDS_VL
952 {1, 5, 0, 0, 3, 19, 391, 8}, // ABDU_VL
953 {1, 1, 0, 0, 0, 37, 357, 2}, // ABSW
954 {2, 4, 0, 0, 0, 52, 13, 6}, // ADDD
955 {1, 2, 0, 0, 0, 67, 385, 3}, // ADD_LO
956 {1, 3, 0, 0, 0, 84, 421, 4}, // ADD_TPREL
957 {1, 5, 0, 0, 3, 104, 391, 8}, // ADD_VL
958 {1, 5, 0, 0, 3, 121, 391, 8}, // AND_VL
959 {1, 2, 0, 0, 0, 138, 385, 3}, // ASUB
960 {1, 2, 0, 0, 0, 153, 385, 3}, // ASUBU
961 {1, 5, 0, 0, 3, 169, 391, 8}, // AVGCEILS_VL
962 {1, 5, 0, 0, 3, 191, 391, 8}, // AVGCEILU_VL
963 {1, 5, 0, 0, 3, 213, 391, 8}, // AVGFLOORS_VL
964 {1, 5, 0, 0, 3, 236, 391, 8}, // AVGFLOORU_VL
965 {1, 4, 0, 0, 3, 259, 399, 7}, // BITREVERSE_VL
966 {1, 1, 0, 0, 0, 283, 361, 2}, // BREV8
967 {0, 4, 0|1<<SDNPHasChain, 0, 0, 299, 446, 3}, // BR_CC
968 {1, 4, 0, 0, 3, 315, 399, 7}, // BSWAP_VL
969 {1, 2, 0, 0, 0, 334, 96, 3}, // BuildGPRPair
970 {1, 2, 0, 0, 0, 357, 72, 3}, // BuildPairF64
971 {1, 2, 0, 0, 0, 380, 259, 3}, // BuildPairGPRVec
972 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 406, 32, 1}, // CALL
973 {0, 2, 0|1<<SDNPHasChain, 0, 0, 421, 114, 2}, // CLEAR_CSR
974 {1, 5, 0, 0, 3, 441, 391, 8}, // CLMULH_VL
975 {1, 5, 0, 0, 3, 461, 391, 8}, // CLMUL_VL
976 {1, 1, 0, 0, 0, 480, 357, 2}, // CLSW
977 {1, 1, 0, 0, 0, 495, 357, 2}, // CLZW
978 {1, 4, 0, 0, 3, 510, 399, 7}, // CTLZ_VL
979 {1, 4, 0, 0, 3, 528, 399, 7}, // CTPOP_VL
980 {1, 4, 0, 0, 3, 547, 399, 7}, // CTTZ_VL
981 {1, 1, 0, 0, 0, 565, 357, 2}, // CTZW
982 {1, 2, 0, 0, 0, 580, 385, 3}, // CZERO_EQZ
983 {1, 2, 0, 0, 0, 600, 385, 3}, // CZERO_NEZ
984 {1, 2, 0, 0, 0, 620, 382, 3}, // DIVUW
985 {1, 2, 0, 0, 0, 636, 382, 3}, // DIVW
986 {1, 3, 0, 0, 2, 651, 367, 6}, // FABS_VL
987 {1, 5, 0, 0, 3, 669, 406, 8}, // FADD_VL
988 {1, 1, 0, 0, 0, 687, 47, 2}, // FCLASS
989 {1, 3, 0, 0, 2, 704, 100, 9}, // FCLASS_VL
990 {1, 5, 0, 0, 3, 724, 406, 8}, // FCOPYSIGN_VL
991 {1, 2, 0, 0, 0, 747, 65, 3}, // FCVT_WU_RV64
992 {1, 2, 0, 0, 0, 770, 65, 3}, // FCVT_W_RV64
993 {1, 2, 0, 0, 0, 792, 46, 3}, // FCVT_X
994 {1, 2, 0, 0, 0, 809, 46, 3}, // FCVT_XU
995 {1, 5, 0, 0, 3, 827, 406, 8}, // FDIV_VL
996 {1, 1, 0, 0, 0, 845, 130, 2}, // FLI
997 {1, 2, 0, 0, 0, 859, 388, 3}, // FMAX
998 {1, 2, 0, 0, 0, 874, 388, 3}, // FMIN
999 {1, 5, 0, 0, 3, 889, 406, 8}, // FMUL_VL
1000 {1, 1, 0, 0, 0, 907, 130, 2}, // FMV_H_X
1001 {1, 1, 0, 0, 0, 925, 70, 2}, // FMV_W_X_RV64
1002 {1, 1, 0, 0, 0, 948, 47, 2}, // FMV_X_ANYEXTH
1003 {1, 1, 0, 0, 0, 972, 63, 2}, // FMV_X_ANYEXTW_RV64
1004 {1, 1, 0, 0, 0, 1001, 47, 2}, // FMV_X_SIGNEXTH
1005 {1, 3, 0, 0, 2, 1026, 367, 6}, // FNEG_VL
1006 {1, 3, 0, 0, 2, 1044, 146, 7}, // FP_EXTEND_VL
1007 {1, 3, 0, 0, 2, 1067, 139, 7}, // FP_ROUND_VL
1008 {1, 3, 0, 0, 0, 1089, 126, 4}, // FROUND
1009 {1, 2, 0, 0, 0, 1106, 127, 3}, // FSGNJX
1010 {1, 3, 0, 0, 2, 1123, 367, 6}, // FSQRT_VL
1011 {1, 5, 0, 0, 3, 1142, 406, 8}, // FSUB_VL
1012 {1, 1, 0, 0, 0, 1160, 361, 2}, // HI
1013 {2, 1, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1173, 22, 3}, // LD_RV32
1014 {1, 1, 0, 0, 0, 1191, 361, 2}, // LLA
1015 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1205, 32, 1}, // LPAD_CALL
1016 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1225, 32, 1}, // LPAD_CALL_INDIRECT
1017 {1, 3, 0, 0, 0, 1254, 109, 4}, // MERGE
1018 {1, 3, 0, 0, 0, 1270, 422, 3}, // MHACC
1019 {1, 3, 0, 0, 0, 1286, 422, 3}, // MHACCSU
1020 {1, 3, 0, 0, 0, 1304, 422, 3}, // MHACCU
1021 {1, 3, 0, 0, 0, 1321, 422, 3}, // MHRACC
1022 {1, 3, 0, 0, 0, 1338, 422, 3}, // MHRACCSU
1023 {1, 3, 0, 0, 0, 1357, 422, 3}, // MHRACCU
1024 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1375, 0, 0}, // MNRET_GLUE
1025 {1, 2, 0, 0, 0, 1396, 110, 3}, // MOP_R
1026 {1, 3, 0, 0, 0, 1412, 109, 4}, // MOP_RR
1027 {1, 3, 0, 0, 0, 1429, 37, 4}, // MQACC_00
1028 {1, 3, 0, 0, 0, 1448, 37, 4}, // MQACC_01
1029 {1, 3, 0, 0, 0, 1467, 37, 4}, // MQACC_11
1030 {1, 3, 0, 0, 0, 1486, 37, 4}, // MQRACC_00
1031 {1, 3, 0, 0, 0, 1506, 37, 4}, // MQRACC_01
1032 {1, 3, 0, 0, 0, 1526, 37, 4}, // MQRACC_11
1033 {2, 4, 0, 0, 0, 1546, 7, 6}, // MQRWACC
1034 {2, 4, 0, 0, 0, 1564, 7, 6}, // MQWACC
1035 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1581, 0, 0}, // MRET_GLUE
1036 {1, 2, 0, 0, 0, 1601, 385, 3}, // MULHR
1037 {1, 2, 0, 0, 0, 1617, 385, 3}, // MULHRSU
1038 {1, 2, 0, 0, 0, 1635, 385, 3}, // MULHRU
1039 {1, 2, 0, 0, 0, 1652, 385, 3}, // MULHSU
1040 {1, 5, 0, 0, 3, 1669, 391, 8}, // MULHS_VL
1041 {1, 5, 0, 0, 3, 1688, 391, 8}, // MULHU_VL
1042 {1, 2, 0, 0, 0, 1707, 385, 3}, // MULQ
1043 {1, 2, 0, 0, 0, 1722, 385, 3}, // MULQR
1044 {1, 5, 0, 0, 3, 1738, 391, 8}, // MUL_VL
1045 {1, 3, 0, 0, 0, 1755, 33, 4}, // NCLIP
1046 {1, 3, 0, 0, 0, 1771, 33, 4}, // NCLIPU
1047 {1, 1, 0, 0, 0, 1788, 68, 2}, // NDS_FMV_BF16_X
1048 {1, 1, 0, 0, 0, 1813, 44, 2}, // NDS_FMV_X_ANYEXTBF16
1049 {1, 1, 0, 0, 0, 1844, 361, 2}, // NEGW_MAX
1050 {1, 3, 0, 0, 0, 1863, 0, 4}, // NSRA
1051 {1, 3, 0, 0, 0, 1878, 0, 4}, // NSRL
1052 {1, 1, 0, 0, 0, 1893, 361, 2}, // ORC_B
1053 {1, 5, 0, 0, 3, 1909, 391, 8}, // OR_VL
1054 {1, 2, 0, 0, 0, 1925, 466, 2}, // PM2ADD
1055 {1, 3, 0, 0, 0, 1942, 79, 4}, // PM2ADDAU_H
1056 {1, 3, 0, 0, 0, 1963, 79, 4}, // PM2ADDA_H
1057 {1, 2, 0, 0, 0, 1983, 466, 2}, // PM2ADDSU
1058 {1, 2, 0, 0, 0, 2002, 466, 2}, // PM2ADDU
1059 {1, 2, 0, 0, 0, 2020, 89, 3}, // PM2ADDU_H
1060 {1, 2, 0, 0, 0, 2040, 89, 3}, // PM2ADD_H
1061 {1, 2, 0, 0, 0, 2059, 466, 2}, // PM2ADD_X
1062 {1, 2, 0, 0, 0, 2078, 466, 2}, // PM2SADD
1063 {1, 2, 0, 0, 0, 2096, 466, 2}, // PM2SADD_X
1064 {1, 2, 0, 0, 0, 2116, 466, 2}, // PM2SUB
1065 {1, 2, 0, 0, 0, 2133, 89, 3}, // PM2SUB_H
1066 {1, 2, 0, 0, 0, 2152, 466, 2}, // PM2SUB_X
1067 {1, 2, 0, 0, 0, 2171, 86, 3}, // PM2WADD
1068 {1, 3, 0, 0, 0, 2189, 75, 4}, // PM2WADDA
1069 {1, 3, 0, 0, 0, 2208, 75, 4}, // PM2WADDASU
1070 {1, 3, 0, 0, 0, 2229, 75, 4}, // PM2WADDAU
1071 {1, 2, 0, 0, 0, 2249, 86, 3}, // PM2WADDSU
1072 {1, 2, 0, 0, 0, 2269, 86, 3}, // PM2WADDU
1073 {1, 2, 0, 0, 0, 2288, 466, 2}, // PM4ADD
1074 {1, 2, 0, 0, 0, 2305, 466, 2}, // PM4ADDSU
1075 {1, 2, 0, 0, 0, 2324, 466, 2}, // PM4ADDU
1076 {1, 3, 0, 0, 0, 2342, 453, 3}, // PMACCSU_HALVES_00
1077 {1, 3, 0, 0, 0, 2370, 453, 3}, // PMACCSU_HALVES_11
1078 {1, 3, 0, 0, 0, 2398, 453, 3}, // PMACCU_HALVES_00
1079 {1, 3, 0, 0, 0, 2425, 453, 3}, // PMACCU_HALVES_01
1080 {1, 3, 0, 0, 0, 2452, 453, 3}, // PMACCU_HALVES_11
1081 {1, 3, 0, 0, 0, 2479, 453, 3}, // PMACC_HALVES_00
1082 {1, 3, 0, 0, 0, 2505, 453, 3}, // PMACC_HALVES_01
1083 {1, 3, 0, 0, 0, 2531, 453, 3}, // PMACC_HALVES_11
1084 {1, 2, 0, 0, 0, 2557, 466, 2}, // PMQ2ADD
1085 {1, 3, 0, 0, 0, 2575, 92, 4}, // PMQACC_W_H00
1086 {1, 3, 0, 0, 0, 2598, 92, 4}, // PMQACC_W_H01
1087 {1, 3, 0, 0, 0, 2621, 92, 4}, // PMQACC_W_H11
1088 {1, 2, 0, 0, 0, 2644, 466, 2}, // PMQR2ADD
1089 {1, 3, 0, 0, 0, 2663, 92, 4}, // PMQRACC_W_H00
1090 {1, 3, 0, 0, 0, 2687, 92, 4}, // PMQRACC_W_H01
1091 {1, 3, 0, 0, 0, 2711, 92, 4}, // PMQRACC_W_H11
1092 {1, 2, 0, 0, 0, 2735, 340, 4}, // PMULSU_HALVES_00
1093 {1, 2, 0, 0, 0, 2762, 340, 4}, // PMULSU_HALVES_11
1094 {1, 2, 0, 0, 0, 2789, 340, 4}, // PMULU_HALVES_00
1095 {1, 2, 0, 0, 0, 2815, 340, 4}, // PMULU_HALVES_01
1096 {1, 2, 0, 0, 0, 2841, 340, 4}, // PMULU_HALVES_11
1097 {1, 2, 0, 0, 0, 2867, 340, 4}, // PMUL_HALVES_00
1098 {1, 2, 0, 0, 0, 2892, 340, 4}, // PMUL_HALVES_01
1099 {1, 2, 0, 0, 0, 2917, 340, 4}, // PMUL_HALVES_11
1100 {1, 2, 0, 0, 0, 2942, 305, 3}, // PNCLIP
1101 {1, 2, 0, 0, 0, 2959, 294, 3}, // PNCLIPP
1102 {1, 2, 0, 0, 0, 2977, 83, 3}, // PNCLIPP_W
1103 {1, 2, 0, 0, 0, 2997, 305, 3}, // PNCLIPU
1104 {1, 2, 0, 0, 0, 3015, 294, 3}, // PNCLIPUP
1105 {1, 2, 0, 0, 0, 3034, 83, 3}, // PNCLIPUP_W
1106 {1, 2, 0, 0, 0, 3055, 305, 3}, // PNSRL
1107 {1, 2, 0, 0, 0, 3071, 215, 3}, // PPAIRE
1108 {1, 2, 0, 0, 0, 3088, 215, 3}, // PPAIREO
1109 {1, 2, 0, 0, 0, 3106, 215, 3}, // PPAIRO
1110 {1, 2, 0, 0, 0, 3123, 215, 3}, // PPAIROE
1111 {1, 2, 0, 0, 0, 3141, 215, 3}, // PPAIROE_H
1112 {0, 1, 0|1<<SDNPHasChain, 0, 0, 3161, 99, 1}, // PROBED_ALLOCA
1113 {1, 1, 0, 0, 0, 3185, 216, 2}, // PSABS
1114 {1, 2, 0, 0, 0, 3201, 222, 3}, // PSHL
1115 {1, 2, 0, 0, 0, 3216, 222, 3}, // PSRA
1116 {1, 2, 0, 0, 0, 3231, 222, 3}, // PSRL
1117 {1, 2, 0, 0, 0, 3246, 222, 3}, // PSSHA
1118 {1, 2, 0, 0, 0, 3262, 222, 3}, // PSSHAR
1119 {1, 2, 0, 0, 0, 3279, 222, 3}, // PSSHL
1120 {1, 2, 0, 0, 0, 3295, 222, 3}, // PSSHLR
1121 {1, 2, 0, 0, 0, 3312, 215, 3}, // PUNZIPE
1122 {1, 2, 0, 0, 0, 3330, 215, 3}, // PUNZIPO
1123 {1, 2, 0, 0, 0, 3348, 344, 4}, // PWMUL
1124 {1, 2, 0, 0, 0, 3364, 344, 4}, // PWMULSU
1125 {1, 2, 0, 0, 0, 3382, 344, 4}, // PWMULU
1126 {1, 2, 0, 0, 0, 3399, 348, 3}, // PWZIP
1127 {1, 2, 0, 0, 0, 3415, 215, 3}, // PZIP
1128 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 3430, 0, 0}, // QC_C_MILEAVERET_GLUE
1129 {1, 1, 0, 0, 0, 3461, 361, 2}, // QC_E_LI
1130 {1, 4, 0, 0, 0, 3479, 377, 5}, // QC_INSB
1131 {1, 3, 0, 0, 0, 3497, 373, 4}, // QC_MULIADD
1132 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 3518, 442, 4}, // QC_SETWMI
1133 {2, 2, 0|1<<SDNPHasChain, 0, 0, 3538, 25, 4}, // READ_COUNTER_WIDE
1134 {1, 1, 0|1<<SDNPHasChain, 0, 0, 3566, 114, 2}, // READ_CSR
1135 {1, 0, 0, 0, 0, 3585, 32, 1}, // READ_VLENB
1136 {1, 2, 0, 0, 0, 3606, 382, 3}, // REMUW
1137 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 3622, 0, 0}, // RET_GLUE
1138 {1, 2, 0, 0, 0, 3641, 382, 3}, // ROLW
1139 {1, 2, 0, 0, 0, 3656, 382, 3}, // RORW
1140 {1, 5, 0, 0, 3, 3671, 391, 8}, // ROTL_VL
1141 {1, 5, 0, 0, 3, 3689, 391, 8}, // ROTR_VL
1142 {1, 5, 0, 0, 3, 3707, 391, 8}, // SADDSAT_VL
1143 {1, 2, 0, 0, 0, 3728, 385, 3}, // SATI
1144 {1, 5, 0, 0, 3, 3743, 391, 8}, // SDIV_VL
1145 {0, 3, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 3761, 22, 3}, // SD_RV32
1146 {1, 5, 0, 0, 0, 3779, 471, 4}, // SELECT_CC
1147 {1, 6, 0, 0, 3, 3799, 458, 8}, // SETCC_VL
1148 {0, 2, 0|1<<SDNPHasChain, 0, 0, 3818, 114, 2}, // SET_CSR
1149 {0, 5, 0|1<<SDNPHasChain, 0, 0, 3836, 55, 4}, // SF_VC_FVV_SE
1150 {0, 5, 0|1<<SDNPHasChain, 0, 0, 3859, 59, 4}, // SF_VC_FVW_SE
1151 {0, 5, 0|1<<SDNPHasChain, 0, 0, 3882, 449, 4}, // SF_VC_FV_SE
1152 {0, 5, 0|1<<SDNPHasChain, 0, 0, 3904, 55, 4}, // SF_VC_IVV_SE
1153 {0, 5, 0|1<<SDNPHasChain, 0, 0, 3927, 59, 4}, // SF_VC_IVW_SE
1154 {0, 5, 0|1<<SDNPHasChain, 0, 0, 3950, 449, 4}, // SF_VC_IV_SE
1155 {0, 5, 0|1<<SDNPHasChain, 0, 0, 3972, 55, 4}, // SF_VC_VVV_SE
1156 {0, 5, 0|1<<SDNPHasChain, 0, 0, 3995, 59, 4}, // SF_VC_VVW_SE
1157 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4018, 449, 4}, // SF_VC_VV_SE
1158 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4040, 262, 5}, // SF_VC_V_FVV_SE
1159 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4065, 271, 5}, // SF_VC_V_FVW_SE
1160 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4090, 267, 4}, // SF_VC_V_FV_SE
1161 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4114, 262, 5}, // SF_VC_V_IVV_SE
1162 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4139, 271, 5}, // SF_VC_V_IVW_SE
1163 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4164, 267, 4}, // SF_VC_V_IV_SE
1164 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4188, 276, 5}, // SF_VC_V_I_SE
1165 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4211, 262, 5}, // SF_VC_V_VVV_SE
1166 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4236, 271, 5}, // SF_VC_V_VVW_SE
1167 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4261, 267, 4}, // SF_VC_V_VV_SE
1168 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4285, 262, 5}, // SF_VC_V_XVV_SE
1169 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4310, 271, 5}, // SF_VC_V_XVW_SE
1170 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4335, 267, 4}, // SF_VC_V_XV_SE
1171 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4359, 276, 5}, // SF_VC_V_X_SE
1172 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4382, 55, 4}, // SF_VC_XVV_SE
1173 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4405, 59, 4}, // SF_VC_XVW_SE
1174 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4428, 449, 4}, // SF_VC_XV_SE
1175 {1, 1, 0, 0, 0, 4450, 361, 2}, // SHA256SIG0
1176 {1, 1, 0, 0, 0, 4471, 361, 2}, // SHA256SIG1
1177 {1, 1, 0, 0, 0, 4492, 361, 2}, // SHA256SUM0
1178 {1, 1, 0, 0, 0, 4513, 361, 2}, // SHA256SUM1
1179 {1, 3, 0, 0, 0, 4534, 437, 5}, // SHL_ADD
1180 {1, 5, 0, 0, 3, 4552, 391, 8}, // SHL_VL
1181 {1, 3, 0, 0, 2, 4569, 133, 6}, // SINT_TO_FP_VL
1182 {1, 2, 0, 0, 0, 4593, 382, 3}, // SLLW
1183 {1, 1, 0, 0, 0, 4608, 361, 2}, // SM3P0
1184 {1, 1, 0, 0, 0, 4624, 361, 2}, // SM3P1
1185 {1, 3, 0, 0, 0, 4640, 29, 4}, // SM4ED
1186 {1, 3, 0, 0, 0, 4656, 29, 4}, // SM4KS
1187 {1, 5, 0, 0, 3, 4672, 391, 8}, // SMAX_VL
1188 {1, 5, 0, 0, 3, 4690, 391, 8}, // SMIN_VL
1189 {1, 4, 0, 0, 0, 4708, 243, 6}, // SPLAT_VECTOR_SPLIT_I64_VL
1190 {1, 2, 0, 0, 0, 4744, 382, 3}, // SRAW
1191 {1, 5, 0, 0, 3, 4759, 391, 8}, // SRA_VL
1192 {1, 5, 0, 0, 3, 4776, 391, 8}, // SREM_VL
1193 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 4794, 0, 0}, // SRET_GLUE
1194 {1, 2, 0, 0, 0, 4814, 382, 3}, // SRLW
1195 {1, 5, 0, 0, 3, 4829, 391, 8}, // SRL_VL
1196 {1, 5, 0, 0, 3, 4846, 391, 8}, // SSUBSAT_VL
1197 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 4867, 406, 8}, // STRICT_FADD_VL
1198 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 4892, 65, 3}, // STRICT_FCVT_WU_RV64
1199 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 4922, 65, 3}, // STRICT_FCVT_W_RV64
1200 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 4951, 406, 8}, // STRICT_FDIV_VL
1201 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 4976, 406, 8}, // STRICT_FMUL_VL
1202 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5001, 146, 7}, // STRICT_FP_EXTEND_VL
1203 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5031, 139, 7}, // STRICT_FP_ROUND_VL
1204 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5060, 458, 8}, // STRICT_FSETCCS_VL
1205 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5088, 458, 8}, // STRICT_FSETCC_VL
1206 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5115, 367, 6}, // STRICT_FSQRT_VL
1207 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 5141, 406, 8}, // STRICT_FSUB_VL
1208 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5166, 133, 6}, // STRICT_SINT_TO_FP_VL
1209 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5197, 133, 6}, // STRICT_UINT_TO_FP_VL
1210 {1, 4, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5228, 116, 7}, // STRICT_VFCVT_RM_X_F_VL
1211 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5261, 117, 6}, // STRICT_VFCVT_RTZ_XU_F_VL
1212 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5296, 117, 6}, // STRICT_VFCVT_RTZ_X_F_VL
1213 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5330, 425, 8}, // STRICT_VFMADD_VL
1214 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5357, 425, 8}, // STRICT_VFMSUB_VL
1215 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5384, 139, 7}, // STRICT_VFNCVT_ROD_VL
1216 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5415, 425, 8}, // STRICT_VFNMADD_VL
1217 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5443, 425, 8}, // STRICT_VFNMSUB_VL
1218 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5471, 367, 6}, // STRICT_VFROUND_NOEXCEPT_VL
1219 {2, 4, 0, 0, 0, 5508, 13, 6}, // SUBD
1220 {1, 5, 0, 0, 3, 5523, 391, 8}, // SUB_VL
1221 {1, 2, 0|1<<SDNPHasChain, 0, 0, 5540, 113, 3}, // SWAP_CSR
1222 {0, 1, 0|1<<SDNPHasChain, 0, 0, 5559, 99, 1}, // SW_GUARDED_BRIND
1223 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 5586, 32, 1}, // SW_GUARDED_CALL
1224 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 5612, 32, 1}, // SW_GUARDED_TAIL
1225 {2, 1, 0, 0, 0, 5638, 19, 3}, // SplitF64
1226 {2, 1, 0, 0, 0, 5657, 41, 3}, // SplitGPRPair
1227 {2, 1, 0, 0, 0, 5680, 4, 3}, // SplitGPRVec
1228 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 5702, 32, 1}, // TAIL
1229 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 5717, 442, 4}, // TH_LDD
1230 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 5734, 442, 4}, // TH_LWD
1231 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 5751, 442, 4}, // TH_LWUD
1232 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 5769, 442, 4}, // TH_SDD
1233 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 5786, 442, 4}, // TH_SWD
1234 {1, 3, 0, 0, 2, 5803, 249, 5}, // TRUNCATE_VECTOR_VL
1235 {1, 3, 0, 0, 2, 5832, 249, 5}, // TRUNCATE_VECTOR_VL_SSAT
1236 {1, 3, 0, 0, 2, 5866, 249, 5}, // TRUNCATE_VECTOR_VL_USAT
1237 {1, 2, 0, 0, 0, 5900, 355, 2}, // TUPLE_EXTRACT
1238 {1, 3, 0, 0, 0, 5924, 468, 3}, // TUPLE_INSERT
1239 {1, 5, 0, 0, 3, 5947, 391, 8}, // UADDSAT_VL
1240 {1, 5, 0, 0, 3, 5968, 391, 8}, // UDIV_VL
1241 {1, 3, 0, 0, 2, 5986, 133, 6}, // UINT_TO_FP_VL
1242 {1, 5, 0, 0, 3, 6010, 391, 8}, // UMAX_VL
1243 {1, 5, 0, 0, 3, 6028, 391, 8}, // UMIN_VL
1244 {1, 1, 0, 0, 0, 6046, 361, 2}, // UNZIP
1245 {1, 5, 0, 0, 3, 6062, 391, 8}, // UREM_VL
1246 {1, 2, 0, 0, 0, 6080, 385, 3}, // USATI
1247 {1, 5, 0, 0, 3, 6096, 391, 8}, // USUBSAT_VL
1248 {1, 3, 0, 0, 2, 6117, 49, 6}, // VCPOP_VL
1249 {1, 5, 0, 0, 3, 6136, 391, 8}, // VDOT4ASU_VL
1250 {1, 5, 0, 0, 3, 6158, 391, 8}, // VDOT4AU_VL
1251 {1, 5, 0, 0, 3, 6179, 391, 8}, // VDOT4A_VL
1252 {1, 6, 0, 0, 2, 6199, 308, 8}, // VECREDUCE_ADD_VL
1253 {1, 6, 0, 0, 2, 6226, 308, 8}, // VECREDUCE_AND_VL
1254 {1, 6, 0, 0, 2, 6253, 308, 8}, // VECREDUCE_FADD_VL
1255 {1, 6, 0, 0, 2, 6281, 308, 8}, // VECREDUCE_FMAX_VL
1256 {1, 6, 0, 0, 2, 6309, 308, 8}, // VECREDUCE_FMIN_VL
1257 {1, 6, 0, 0, 2, 6337, 308, 8}, // VECREDUCE_OR_VL
1258 {1, 6, 0, 0, 2, 6363, 308, 8}, // VECREDUCE_SEQ_FADD_VL
1259 {1, 6, 0, 0, 2, 6395, 308, 8}, // VECREDUCE_SMAX_VL
1260 {1, 6, 0, 0, 2, 6423, 308, 8}, // VECREDUCE_SMIN_VL
1261 {1, 6, 0, 0, 2, 6451, 308, 8}, // VECREDUCE_UMAX_VL
1262 {1, 6, 0, 0, 2, 6479, 308, 8}, // VECREDUCE_UMIN_VL
1263 {1, 6, 0, 0, 2, 6507, 308, 8}, // VECREDUCE_XOR_VL
1264 {1, 4, 0, 0, 2, 6534, 132, 7}, // VFCVT_RM_F_XU_VL
1265 {1, 4, 0, 0, 2, 6561, 132, 7}, // VFCVT_RM_F_X_VL
1266 {1, 4, 0, 0, 2, 6587, 116, 7}, // VFCVT_RM_XU_F_VL
1267 {1, 4, 0, 0, 2, 6614, 116, 7}, // VFCVT_RM_X_F_VL
1268 {1, 3, 0, 0, 2, 6640, 117, 6}, // VFCVT_RTZ_XU_F_VL
1269 {1, 3, 0, 0, 2, 6668, 117, 6}, // VFCVT_RTZ_X_F_VL
1270 {1, 3, 0, 0, 2, 6695, 49, 6}, // VFIRST_VL
1271 {1, 5, 0, 0, 2, 6715, 425, 8}, // VFMADD_VL
1272 {1, 5, 0, 0, 3, 6735, 406, 8}, // VFMAX_VL
1273 {1, 5, 0, 0, 3, 6754, 406, 8}, // VFMIN_VL
1274 {1, 5, 0, 0, 2, 6773, 425, 8}, // VFMSUB_VL
1275 {1, 3, 0, 0, 0, 6793, 363, 4}, // VFMV_S_F_VL
1276 {1, 3, 0, 0, 0, 6815, 188, 5}, // VFMV_V_F_VL
1277 {1, 3, 0, 0, 2, 6837, 139, 7}, // VFNCVT_ROD_VL
1278 {1, 5, 0, 0, 2, 6861, 425, 8}, // VFNMADD_VL
1279 {1, 5, 0, 0, 2, 6882, 425, 8}, // VFNMSUB_VL
1280 {1, 3, 0, 0, 2, 6903, 367, 6}, // VFROUND_NOEXCEPT_VL
1281 {1, 5, 0, 0, 2, 6933, 324, 8}, // VFSLIDE1DOWN_VL
1282 {1, 5, 0, 0, 2, 6959, 324, 8}, // VFSLIDE1UP_VL
1283 {1, 5, 0, 0, 3, 6983, 193, 10}, // VFWADD_VL
1284 {1, 5, 0, 0, 3, 7003, 178, 10}, // VFWADD_W_VL
1285 {1, 5, 0, 0, 2, 7025, 203, 11}, // VFWMADD_VL
1286 {1, 5, 0, 0, 2, 7046, 203, 11}, // VFWMSUB_VL
1287 {1, 5, 0, 0, 3, 7067, 193, 10}, // VFWMUL_VL
1288 {1, 5, 0, 0, 2, 7087, 203, 11}, // VFWNMADD_VL
1289 {1, 5, 0, 0, 2, 7109, 203, 11}, // VFWNMSUB_VL
1290 {1, 5, 0, 0, 3, 7131, 193, 10}, // VFWSUB_VL
1291 {1, 5, 0, 0, 3, 7151, 178, 10}, // VFWSUB_W_VL
1292 {1, 2, 0, 0, 2, 7173, 351, 4}, // VID_VL
1293 {1, 3, 0, 0, 0, 7190, 433, 4}, // VMAND_VL
1294 {1, 1, 0, 0, 0, 7209, 456, 2}, // VMCLR_VL
1295 {1, 5, 0, 0, 1, 7228, 286, 8}, // VMERGE_VL
1296 {1, 3, 0, 0, 0, 7248, 433, 4}, // VMOR_VL
1297 {1, 1, 0, 0, 0, 7266, 456, 2}, // VMSET_VL
1298 {1, 3, 0, 0, 0, 7285, 359, 4}, // VMV_S_X_VL
1299 {1, 3, 0, 0, 0, 7306, 214, 4}, // VMV_V_V_VL
1300 {1, 3, 0, 0, 0, 7327, 153, 5}, // VMV_V_X_VL
1301 {1, 1, 0, 0, 0, 7348, 123, 3}, // VMV_X_S
1302 {1, 3, 0, 0, 0, 7366, 433, 4}, // VMXOR_VL
1303 {1, 5, 0, 0, 3, 7385, 414, 7}, // VPAIRE_VL
1304 {1, 5, 0, 0, 3, 7405, 414, 7}, // VPAIRO_VL
1305 {1, 5, 0, 0, 2, 7425, 234, 9}, // VRGATHEREI16_VV_VL
1306 {1, 5, 0, 0, 2, 7454, 225, 9}, // VRGATHER_VV_VL
1307 {1, 5, 0, 0, 2, 7479, 218, 7}, // VRGATHER_VX_VL
1308 {1, 3, 0, 0, 2, 7504, 254, 5}, // VSEXT_VL
1309 {1, 5, 0, 0, 2, 7523, 316, 8}, // VSLIDE1DOWN_VL
1310 {1, 5, 0, 0, 2, 7548, 316, 8}, // VSLIDE1UP_VL
1311 {1, 6, 0, 0, 2, 7571, 332, 8}, // VSLIDEDOWN_VL
1312 {1, 6, 0, 0, 2, 7595, 332, 8}, // VSLIDEUP_VL
1313 {1, 3, 0, 0, 1, 7617, 281, 5}, // VUNZIPE_VL
1314 {1, 3, 0, 0, 1, 7638, 281, 5}, // VUNZIPO_VL
1315 {1, 5, 0, 0, 3, 7659, 168, 10}, // VWABDAU_VL
1316 {1, 5, 0, 0, 3, 7680, 168, 10}, // VWABDA_VL
1317 {1, 5, 0, 0, 3, 7700, 168, 10}, // VWADDU_VL
1318 {1, 5, 0, 0, 3, 7720, 158, 10}, // VWADDU_W_VL
1319 {1, 5, 0, 0, 3, 7742, 168, 10}, // VWADD_VL
1320 {1, 5, 0, 0, 3, 7761, 158, 10}, // VWADD_W_VL
1321 {1, 5, 0, 0, 2, 7782, 168, 10}, // VWMACCSU_VL
1322 {1, 5, 0, 0, 2, 7804, 168, 10}, // VWMACCU_VL
1323 {1, 5, 0, 0, 2, 7825, 168, 10}, // VWMACC_VL
1324 {1, 5, 0, 0, 3, 7845, 168, 10}, // VWMULSU_VL
1325 {1, 5, 0, 0, 3, 7866, 168, 10}, // VWMULU_VL
1326 {1, 5, 0, 0, 3, 7886, 168, 10}, // VWMUL_VL
1327 {1, 5, 0, 0, 3, 7905, 168, 10}, // VWSLL_VL
1328 {1, 5, 0, 0, 3, 7924, 168, 10}, // VWSUBU_VL
1329 {1, 5, 0, 0, 3, 7944, 158, 10}, // VWSUBU_W_VL
1330 {1, 5, 0, 0, 3, 7966, 168, 10}, // VWSUB_VL
1331 {1, 5, 0, 0, 3, 7985, 158, 10}, // VWSUB_W_VL
1332 {1, 3, 0, 0, 2, 8006, 254, 5}, // VZEXT_VL
1333 {1, 5, 0, 0, 3, 8025, 297, 8}, // VZIP_VL
1334 {2, 2, 0, 0, 0, 8043, 421, 4}, // WADD
1335 {2, 4, 0, 0, 0, 8058, 7, 6}, // WADDA
1336 {2, 4, 0, 0, 0, 8074, 7, 6}, // WADDAU
1337 {2, 2, 0, 0, 0, 8091, 421, 4}, // WADDU
1338 {2, 4, 0, 0, 0, 8107, 7, 6}, // WMACC
1339 {2, 4, 0, 0, 0, 8123, 7, 6}, // WMACCSU
1340 {2, 4, 0, 0, 0, 8141, 7, 6}, // WMACCU
1341 {2, 2, 0, 0, 0, 8158, 421, 4}, // WMULSU
1342 {0, 2, 0|1<<SDNPHasChain, 0, 0, 8175, 114, 2}, // WRITE_CSR
1343 {2, 2, 0, 0, 0, 8195, 0, 4}, // WSLA
1344 {2, 2, 0, 0, 0, 8210, 0, 4}, // WSLL
1345 {2, 2, 0, 0, 0, 8225, 421, 4}, // WSUB
1346 {2, 4, 0, 0, 0, 8240, 7, 6}, // WSUBA
1347 {2, 4, 0, 0, 0, 8256, 7, 6}, // WSUBAU
1348 {2, 2, 0, 0, 0, 8273, 421, 4}, // WSUBU
1349 {1, 5, 0, 0, 3, 8289, 391, 8}, // XOR_VL
1350 {1, 1, 0, 0, 0, 8306, 361, 2}, // ZIP
1351};
1352
1353static const SDNodeInfo RISCVGenSDNodeInfo(
1354 /*NumOpcodes=*/400, RISCVSDNodeDescs, RISCVSDNodeNames,
1355 RISCVVTByHwModeTable, RISCVSDTypeConstraints);
1356
1357} // namespace llvm
1358
1359#endif // GET_SDNODE_DESC
1360
1361