| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 2 | |* *| |
| 3 | |* Target SDNode descriptions *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* From: RISCV.td *| |
| 7 | |* *| |
| 8 | \*===----------------------------------------------------------------------===*/ |
| 9 | |
| 10 | #ifdef GET_SDNODE_ENUM |
| 11 | #undef GET_SDNODE_ENUM |
| 12 | |
| 13 | namespace llvm::RISCVISD { |
| 14 | |
| 15 | enum GenNodeType : unsigned { |
| 16 | ABDS_VL = ISD::BUILTIN_OP_END, |
| 17 | ABDU_VL, |
| 18 | ABSW, |
| 19 | ADDD, |
| 20 | ADD_LO, |
| 21 | ADD_TPREL, |
| 22 | ADD_VL, |
| 23 | AND_VL, |
| 24 | ASUB, |
| 25 | ASUBU, |
| 26 | AVGCEILS_VL, |
| 27 | AVGCEILU_VL, |
| 28 | AVGFLOORS_VL, |
| 29 | AVGFLOORU_VL, |
| 30 | BITREVERSE_VL, |
| 31 | BREV8, |
| 32 | BR_CC, |
| 33 | BSWAP_VL, |
| 34 | BuildGPRPair, |
| 35 | BuildPairF64, |
| 36 | BuildPairGPRVec, |
| 37 | CALL, |
| 38 | CLEAR_CSR, |
| 39 | CLMULH_VL, |
| 40 | CLMUL_VL, |
| 41 | CLSW, |
| 42 | CLZW, |
| 43 | CTLZ_VL, |
| 44 | CTPOP_VL, |
| 45 | CTTZ_VL, |
| 46 | CTZW, |
| 47 | CZERO_EQZ, |
| 48 | CZERO_NEZ, |
| 49 | DIVUW, |
| 50 | DIVW, |
| 51 | FABS_VL, |
| 52 | FADD_VL, |
| 53 | FCLASS, |
| 54 | FCLASS_VL, |
| 55 | FCOPYSIGN_VL, |
| 56 | FCVT_WU_RV64, |
| 57 | FCVT_W_RV64, |
| 58 | FCVT_X, |
| 59 | FCVT_XU, |
| 60 | FDIV_VL, |
| 61 | FLI, |
| 62 | FMAX, |
| 63 | FMIN, |
| 64 | FMUL_VL, |
| 65 | FMV_H_X, |
| 66 | FMV_W_X_RV64, |
| 67 | FMV_X_ANYEXTH, |
| 68 | FMV_X_ANYEXTW_RV64, |
| 69 | FMV_X_SIGNEXTH, |
| 70 | FNEG_VL, |
| 71 | FP_EXTEND_VL, |
| 72 | FP_ROUND_VL, |
| 73 | FROUND, |
| 74 | FSGNJX, |
| 75 | FSQRT_VL, |
| 76 | FSUB_VL, |
| 77 | HI, |
| 78 | LD_RV32, |
| 79 | LLA, |
| 80 | LPAD_CALL, |
| 81 | LPAD_CALL_INDIRECT, |
| 82 | MERGE, |
| 83 | MHACC, |
| 84 | MHACCSU, |
| 85 | MHACCU, |
| 86 | MHRACC, |
| 87 | MHRACCSU, |
| 88 | MHRACCU, |
| 89 | MNRET_GLUE, |
| 90 | MOP_R, |
| 91 | MOP_RR, |
| 92 | MQACC_00, |
| 93 | MQACC_01, |
| 94 | MQACC_11, |
| 95 | MQRACC_00, |
| 96 | MQRACC_01, |
| 97 | MQRACC_11, |
| 98 | MQRWACC, |
| 99 | MQWACC, |
| 100 | MRET_GLUE, |
| 101 | MULHR, |
| 102 | MULHRSU, |
| 103 | MULHRU, |
| 104 | MULHSU, |
| 105 | MULHS_VL, |
| 106 | MULHU_VL, |
| 107 | MULQ, |
| 108 | MULQR, |
| 109 | MUL_VL, |
| 110 | NCLIP, |
| 111 | NCLIPU, |
| 112 | NDS_FMV_BF16_X, |
| 113 | NDS_FMV_X_ANYEXTBF16, |
| 114 | NEGW_MAX, |
| 115 | NSRA, |
| 116 | NSRL, |
| 117 | ORC_B, |
| 118 | OR_VL, |
| 119 | PM2ADDU_H, |
| 120 | PM2ADD_H, |
| 121 | PM2SUB_H, |
| 122 | PMQACC_W_H00, |
| 123 | PMQACC_W_H01, |
| 124 | PMQACC_W_H11, |
| 125 | PMQRACC_W_H00, |
| 126 | PMQRACC_W_H01, |
| 127 | PMQRACC_W_H11, |
| 128 | PMULSU_HALVES_00, |
| 129 | PMULSU_HALVES_11, |
| 130 | PMULU_HALVES_00, |
| 131 | PMULU_HALVES_01, |
| 132 | PMULU_HALVES_11, |
| 133 | PMUL_HALVES_00, |
| 134 | PMUL_HALVES_01, |
| 135 | PMUL_HALVES_11, |
| 136 | PNCLIP, |
| 137 | PNCLIPP, |
| 138 | PNCLIPP_W, |
| 139 | PNCLIPU, |
| 140 | PNCLIPUP, |
| 141 | PNCLIPUP_W, |
| 142 | PNSRL, |
| 143 | PPAIRE, |
| 144 | PPAIREO, |
| 145 | PPAIRO, |
| 146 | PPAIROE, |
| 147 | PPAIROE_H, |
| 148 | PROBED_ALLOCA, |
| 149 | PSABS, |
| 150 | PSHL, |
| 151 | PSRA, |
| 152 | PSRL, |
| 153 | PSSHA, |
| 154 | PSSHAR, |
| 155 | PSSHL, |
| 156 | PSSHLR, |
| 157 | PUNZIPE, |
| 158 | PUNZIPO, |
| 159 | PWMUL, |
| 160 | PWMULSU, |
| 161 | PWMULU, |
| 162 | PWZIP, |
| 163 | PZIP, |
| 164 | QC_C_MILEAVERET_GLUE, |
| 165 | QC_E_LI, |
| 166 | QC_INSB, |
| 167 | QC_MULIADD, |
| 168 | QC_SETWMI, |
| 169 | READ_COUNTER_WIDE, |
| 170 | READ_CSR, |
| 171 | READ_VLENB, |
| 172 | REMUW, |
| 173 | RET_GLUE, |
| 174 | ROLW, |
| 175 | RORW, |
| 176 | ROTL_VL, |
| 177 | ROTR_VL, |
| 178 | SADDSAT_VL, |
| 179 | SATI, |
| 180 | SDIV_VL, |
| 181 | SD_RV32, |
| 182 | SELECT_CC, |
| 183 | SETCC_VL, |
| 184 | SET_CSR, |
| 185 | SF_VC_FVV_SE, |
| 186 | SF_VC_FVW_SE, |
| 187 | SF_VC_FV_SE, |
| 188 | SF_VC_IVV_SE, |
| 189 | SF_VC_IVW_SE, |
| 190 | SF_VC_IV_SE, |
| 191 | SF_VC_VVV_SE, |
| 192 | SF_VC_VVW_SE, |
| 193 | SF_VC_VV_SE, |
| 194 | SF_VC_V_FVV_SE, |
| 195 | SF_VC_V_FVW_SE, |
| 196 | SF_VC_V_FV_SE, |
| 197 | SF_VC_V_IVV_SE, |
| 198 | SF_VC_V_IVW_SE, |
| 199 | SF_VC_V_IV_SE, |
| 200 | SF_VC_V_I_SE, |
| 201 | SF_VC_V_VVV_SE, |
| 202 | SF_VC_V_VVW_SE, |
| 203 | SF_VC_V_VV_SE, |
| 204 | SF_VC_V_XVV_SE, |
| 205 | SF_VC_V_XVW_SE, |
| 206 | SF_VC_V_XV_SE, |
| 207 | SF_VC_V_X_SE, |
| 208 | SF_VC_XVV_SE, |
| 209 | SF_VC_XVW_SE, |
| 210 | SF_VC_XV_SE, |
| 211 | SHA256SIG0, |
| 212 | SHA256SIG1, |
| 213 | SHA256SUM0, |
| 214 | SHA256SUM1, |
| 215 | SHL_ADD, |
| 216 | SHL_VL, |
| 217 | SINT_TO_FP_VL, |
| 218 | SLLW, |
| 219 | SM3P0, |
| 220 | SM3P1, |
| 221 | SM4ED, |
| 222 | SM4KS, |
| 223 | SMAX_VL, |
| 224 | SMIN_VL, |
| 225 | SPLAT_VECTOR_SPLIT_I64_VL, |
| 226 | SRAW, |
| 227 | SRA_VL, |
| 228 | SREM_VL, |
| 229 | SRET_GLUE, |
| 230 | SRLW, |
| 231 | SRL_VL, |
| 232 | SSUBSAT_VL, |
| 233 | STRICT_FADD_VL, |
| 234 | STRICT_FCVT_WU_RV64, |
| 235 | STRICT_FCVT_W_RV64, |
| 236 | STRICT_FDIV_VL, |
| 237 | STRICT_FMUL_VL, |
| 238 | STRICT_FP_EXTEND_VL, |
| 239 | STRICT_FP_ROUND_VL, |
| 240 | STRICT_FSETCCS_VL, |
| 241 | STRICT_FSETCC_VL, |
| 242 | STRICT_FSQRT_VL, |
| 243 | STRICT_FSUB_VL, |
| 244 | STRICT_SINT_TO_FP_VL, |
| 245 | STRICT_UINT_TO_FP_VL, |
| 246 | STRICT_VFCVT_RM_X_F_VL, |
| 247 | STRICT_VFCVT_RTZ_XU_F_VL, |
| 248 | STRICT_VFCVT_RTZ_X_F_VL, |
| 249 | STRICT_VFMADD_VL, |
| 250 | STRICT_VFMSUB_VL, |
| 251 | STRICT_VFNCVT_ROD_VL, |
| 252 | STRICT_VFNMADD_VL, |
| 253 | STRICT_VFNMSUB_VL, |
| 254 | STRICT_VFROUND_NOEXCEPT_VL, |
| 255 | SUBD, |
| 256 | SUB_VL, |
| 257 | SWAP_CSR, |
| 258 | SW_GUARDED_BRIND, |
| 259 | SW_GUARDED_CALL, |
| 260 | SW_GUARDED_TAIL, |
| 261 | SplitF64, |
| 262 | SplitGPRPair, |
| 263 | SplitGPRVec, |
| 264 | TAIL, |
| 265 | TH_LDD, |
| 266 | TH_LWD, |
| 267 | TH_LWUD, |
| 268 | TH_SDD, |
| 269 | TH_SWD, |
| 270 | TRUNCATE_VECTOR_VL, |
| 271 | TRUNCATE_VECTOR_VL_SSAT, |
| 272 | TRUNCATE_VECTOR_VL_USAT, |
| 273 | , |
| 274 | TUPLE_INSERT, |
| 275 | UADDSAT_VL, |
| 276 | UDIV_VL, |
| 277 | UINT_TO_FP_VL, |
| 278 | UMAX_VL, |
| 279 | UMIN_VL, |
| 280 | UNZIP, |
| 281 | UREM_VL, |
| 282 | USATI, |
| 283 | USUBSAT_VL, |
| 284 | VCPOP_VL, |
| 285 | VDOT4ASU_VL, |
| 286 | VDOT4AU_VL, |
| 287 | VDOT4A_VL, |
| 288 | VECREDUCE_ADD_VL, |
| 289 | VECREDUCE_AND_VL, |
| 290 | VECREDUCE_FADD_VL, |
| 291 | VECREDUCE_FMAX_VL, |
| 292 | VECREDUCE_FMIN_VL, |
| 293 | VECREDUCE_OR_VL, |
| 294 | VECREDUCE_SEQ_FADD_VL, |
| 295 | VECREDUCE_SMAX_VL, |
| 296 | VECREDUCE_SMIN_VL, |
| 297 | VECREDUCE_UMAX_VL, |
| 298 | VECREDUCE_UMIN_VL, |
| 299 | VECREDUCE_XOR_VL, |
| 300 | VFCVT_RM_F_XU_VL, |
| 301 | VFCVT_RM_F_X_VL, |
| 302 | VFCVT_RM_XU_F_VL, |
| 303 | VFCVT_RM_X_F_VL, |
| 304 | VFCVT_RTZ_XU_F_VL, |
| 305 | VFCVT_RTZ_X_F_VL, |
| 306 | VFIRST_VL, |
| 307 | VFMADD_VL, |
| 308 | VFMAX_VL, |
| 309 | VFMIN_VL, |
| 310 | VFMSUB_VL, |
| 311 | VFMV_S_F_VL, |
| 312 | VFMV_V_F_VL, |
| 313 | VFNCVT_ROD_VL, |
| 314 | VFNMADD_VL, |
| 315 | VFNMSUB_VL, |
| 316 | VFROUND_NOEXCEPT_VL, |
| 317 | VFSLIDE1DOWN_VL, |
| 318 | VFSLIDE1UP_VL, |
| 319 | VFWADD_VL, |
| 320 | VFWADD_W_VL, |
| 321 | VFWMADD_VL, |
| 322 | VFWMSUB_VL, |
| 323 | VFWMUL_VL, |
| 324 | VFWNMADD_VL, |
| 325 | VFWNMSUB_VL, |
| 326 | VFWSUB_VL, |
| 327 | VFWSUB_W_VL, |
| 328 | VID_VL, |
| 329 | VMAND_VL, |
| 330 | VMCLR_VL, |
| 331 | VMERGE_VL, |
| 332 | VMOR_VL, |
| 333 | VMSET_VL, |
| 334 | VMV_S_X_VL, |
| 335 | VMV_V_V_VL, |
| 336 | VMV_V_X_VL, |
| 337 | VMV_X_S, |
| 338 | VMXOR_VL, |
| 339 | VPAIRE_VL, |
| 340 | VPAIRO_VL, |
| 341 | VRGATHEREI16_VV_VL, |
| 342 | VRGATHER_VV_VL, |
| 343 | VRGATHER_VX_VL, |
| 344 | VSEXT_VL, |
| 345 | VSLIDE1DOWN_VL, |
| 346 | VSLIDE1UP_VL, |
| 347 | VSLIDEDOWN_VL, |
| 348 | VSLIDEUP_VL, |
| 349 | VUNZIPE_VL, |
| 350 | VUNZIPO_VL, |
| 351 | VWABDAU_VL, |
| 352 | VWABDA_VL, |
| 353 | VWADDU_VL, |
| 354 | VWADDU_W_VL, |
| 355 | VWADD_VL, |
| 356 | VWADD_W_VL, |
| 357 | VWMACCSU_VL, |
| 358 | VWMACCU_VL, |
| 359 | VWMACC_VL, |
| 360 | VWMULSU_VL, |
| 361 | VWMULU_VL, |
| 362 | VWMUL_VL, |
| 363 | VWSLL_VL, |
| 364 | VWSUBU_VL, |
| 365 | VWSUBU_W_VL, |
| 366 | VWSUB_VL, |
| 367 | VWSUB_W_VL, |
| 368 | VZEXT_VL, |
| 369 | VZIP_VL, |
| 370 | WADD, |
| 371 | WADDA, |
| 372 | WADDAU, |
| 373 | WADDU, |
| 374 | WMULSU, |
| 375 | WRITE_CSR, |
| 376 | WSLA, |
| 377 | WSLL, |
| 378 | WSUB, |
| 379 | WSUBA, |
| 380 | WSUBAU, |
| 381 | WSUBU, |
| 382 | XOR_VL, |
| 383 | ZIP, |
| 384 | }; |
| 385 | |
| 386 | static constexpr unsigned GENERATED_OPCODE_END = ZIP + 1; |
| 387 | |
| 388 | } // namespace llvm::RISCVISD |
| 389 | |
| 390 | #endif // GET_SDNODE_ENUM |
| 391 | |
| 392 | #ifdef GET_SDNODE_DESC |
| 393 | #undef GET_SDNODE_DESC |
| 394 | |
| 395 | namespace llvm { |
| 396 | |
| 397 | |
| 398 | #ifdef __GNUC__ |
| 399 | #pragma GCC diagnostic push |
| 400 | #pragma GCC diagnostic ignored "-Woverlength-strings" |
| 401 | #endif |
| 402 | static constexpr char RISCVSDNodeNamesStorage[] = |
| 403 | "\0" |
| 404 | "RISCVISD::ABDS_VL\0" |
| 405 | "RISCVISD::ABDU_VL\0" |
| 406 | "RISCVISD::ABSW\0" |
| 407 | "RISCVISD::ADDD\0" |
| 408 | "RISCVISD::ADD_LO\0" |
| 409 | "RISCVISD::ADD_TPREL\0" |
| 410 | "RISCVISD::ADD_VL\0" |
| 411 | "RISCVISD::AND_VL\0" |
| 412 | "RISCVISD::ASUB\0" |
| 413 | "RISCVISD::ASUBU\0" |
| 414 | "RISCVISD::AVGCEILS_VL\0" |
| 415 | "RISCVISD::AVGCEILU_VL\0" |
| 416 | "RISCVISD::AVGFLOORS_VL\0" |
| 417 | "RISCVISD::AVGFLOORU_VL\0" |
| 418 | "RISCVISD::BITREVERSE_VL\0" |
| 419 | "RISCVISD::BREV8\0" |
| 420 | "RISCVISD::BR_CC\0" |
| 421 | "RISCVISD::BSWAP_VL\0" |
| 422 | "RISCVISD::BuildGPRPair\0" |
| 423 | "RISCVISD::BuildPairF64\0" |
| 424 | "RISCVISD::BuildPairGPRVec\0" |
| 425 | "RISCVISD::CALL\0" |
| 426 | "RISCVISD::CLEAR_CSR\0" |
| 427 | "RISCVISD::CLMULH_VL\0" |
| 428 | "RISCVISD::CLMUL_VL\0" |
| 429 | "RISCVISD::CLSW\0" |
| 430 | "RISCVISD::CLZW\0" |
| 431 | "RISCVISD::CTLZ_VL\0" |
| 432 | "RISCVISD::CTPOP_VL\0" |
| 433 | "RISCVISD::CTTZ_VL\0" |
| 434 | "RISCVISD::CTZW\0" |
| 435 | "RISCVISD::CZERO_EQZ\0" |
| 436 | "RISCVISD::CZERO_NEZ\0" |
| 437 | "RISCVISD::DIVUW\0" |
| 438 | "RISCVISD::DIVW\0" |
| 439 | "RISCVISD::FABS_VL\0" |
| 440 | "RISCVISD::FADD_VL\0" |
| 441 | "RISCVISD::FCLASS\0" |
| 442 | "RISCVISD::FCLASS_VL\0" |
| 443 | "RISCVISD::FCOPYSIGN_VL\0" |
| 444 | "RISCVISD::FCVT_WU_RV64\0" |
| 445 | "RISCVISD::FCVT_W_RV64\0" |
| 446 | "RISCVISD::FCVT_X\0" |
| 447 | "RISCVISD::FCVT_XU\0" |
| 448 | "RISCVISD::FDIV_VL\0" |
| 449 | "RISCVISD::FLI\0" |
| 450 | "RISCVISD::FMAX\0" |
| 451 | "RISCVISD::FMIN\0" |
| 452 | "RISCVISD::FMUL_VL\0" |
| 453 | "RISCVISD::FMV_H_X\0" |
| 454 | "RISCVISD::FMV_W_X_RV64\0" |
| 455 | "RISCVISD::FMV_X_ANYEXTH\0" |
| 456 | "RISCVISD::FMV_X_ANYEXTW_RV64\0" |
| 457 | "RISCVISD::FMV_X_SIGNEXTH\0" |
| 458 | "RISCVISD::FNEG_VL\0" |
| 459 | "RISCVISD::FP_EXTEND_VL\0" |
| 460 | "RISCVISD::FP_ROUND_VL\0" |
| 461 | "RISCVISD::FROUND\0" |
| 462 | "RISCVISD::FSGNJX\0" |
| 463 | "RISCVISD::FSQRT_VL\0" |
| 464 | "RISCVISD::FSUB_VL\0" |
| 465 | "RISCVISD::HI\0" |
| 466 | "RISCVISD::LD_RV32\0" |
| 467 | "RISCVISD::LLA\0" |
| 468 | "RISCVISD::LPAD_CALL\0" |
| 469 | "RISCVISD::LPAD_CALL_INDIRECT\0" |
| 470 | "RISCVISD::MERGE\0" |
| 471 | "RISCVISD::MHACC\0" |
| 472 | "RISCVISD::MHACCSU\0" |
| 473 | "RISCVISD::MHACCU\0" |
| 474 | "RISCVISD::MHRACC\0" |
| 475 | "RISCVISD::MHRACCSU\0" |
| 476 | "RISCVISD::MHRACCU\0" |
| 477 | "RISCVISD::MNRET_GLUE\0" |
| 478 | "RISCVISD::MOP_R\0" |
| 479 | "RISCVISD::MOP_RR\0" |
| 480 | "RISCVISD::MQACC_00\0" |
| 481 | "RISCVISD::MQACC_01\0" |
| 482 | "RISCVISD::MQACC_11\0" |
| 483 | "RISCVISD::MQRACC_00\0" |
| 484 | "RISCVISD::MQRACC_01\0" |
| 485 | "RISCVISD::MQRACC_11\0" |
| 486 | "RISCVISD::MQRWACC\0" |
| 487 | "RISCVISD::MQWACC\0" |
| 488 | "RISCVISD::MRET_GLUE\0" |
| 489 | "RISCVISD::MULHR\0" |
| 490 | "RISCVISD::MULHRSU\0" |
| 491 | "RISCVISD::MULHRU\0" |
| 492 | "RISCVISD::MULHSU\0" |
| 493 | "RISCVISD::MULHS_VL\0" |
| 494 | "RISCVISD::MULHU_VL\0" |
| 495 | "RISCVISD::MULQ\0" |
| 496 | "RISCVISD::MULQR\0" |
| 497 | "RISCVISD::MUL_VL\0" |
| 498 | "RISCVISD::NCLIP\0" |
| 499 | "RISCVISD::NCLIPU\0" |
| 500 | "RISCVISD::NDS_FMV_BF16_X\0" |
| 501 | "RISCVISD::NDS_FMV_X_ANYEXTBF16\0" |
| 502 | "RISCVISD::NEGW_MAX\0" |
| 503 | "RISCVISD::NSRA\0" |
| 504 | "RISCVISD::NSRL\0" |
| 505 | "RISCVISD::ORC_B\0" |
| 506 | "RISCVISD::OR_VL\0" |
| 507 | "RISCVISD::PM2ADDU_H\0" |
| 508 | "RISCVISD::PM2ADD_H\0" |
| 509 | "RISCVISD::PM2SUB_H\0" |
| 510 | "RISCVISD::PMQACC_W_H00\0" |
| 511 | "RISCVISD::PMQACC_W_H01\0" |
| 512 | "RISCVISD::PMQACC_W_H11\0" |
| 513 | "RISCVISD::PMQRACC_W_H00\0" |
| 514 | "RISCVISD::PMQRACC_W_H01\0" |
| 515 | "RISCVISD::PMQRACC_W_H11\0" |
| 516 | "RISCVISD::PMULSU_HALVES_00\0" |
| 517 | "RISCVISD::PMULSU_HALVES_11\0" |
| 518 | "RISCVISD::PMULU_HALVES_00\0" |
| 519 | "RISCVISD::PMULU_HALVES_01\0" |
| 520 | "RISCVISD::PMULU_HALVES_11\0" |
| 521 | "RISCVISD::PMUL_HALVES_00\0" |
| 522 | "RISCVISD::PMUL_HALVES_01\0" |
| 523 | "RISCVISD::PMUL_HALVES_11\0" |
| 524 | "RISCVISD::PNCLIP\0" |
| 525 | "RISCVISD::PNCLIPP\0" |
| 526 | "RISCVISD::PNCLIPP_W\0" |
| 527 | "RISCVISD::PNCLIPU\0" |
| 528 | "RISCVISD::PNCLIPUP\0" |
| 529 | "RISCVISD::PNCLIPUP_W\0" |
| 530 | "RISCVISD::PNSRL\0" |
| 531 | "RISCVISD::PPAIRE\0" |
| 532 | "RISCVISD::PPAIREO\0" |
| 533 | "RISCVISD::PPAIRO\0" |
| 534 | "RISCVISD::PPAIROE\0" |
| 535 | "RISCVISD::PPAIROE_H\0" |
| 536 | "RISCVISD::PROBED_ALLOCA\0" |
| 537 | "RISCVISD::PSABS\0" |
| 538 | "RISCVISD::PSHL\0" |
| 539 | "RISCVISD::PSRA\0" |
| 540 | "RISCVISD::PSRL\0" |
| 541 | "RISCVISD::PSSHA\0" |
| 542 | "RISCVISD::PSSHAR\0" |
| 543 | "RISCVISD::PSSHL\0" |
| 544 | "RISCVISD::PSSHLR\0" |
| 545 | "RISCVISD::PUNZIPE\0" |
| 546 | "RISCVISD::PUNZIPO\0" |
| 547 | "RISCVISD::PWMUL\0" |
| 548 | "RISCVISD::PWMULSU\0" |
| 549 | "RISCVISD::PWMULU\0" |
| 550 | "RISCVISD::PWZIP\0" |
| 551 | "RISCVISD::PZIP\0" |
| 552 | "RISCVISD::QC_C_MILEAVERET_GLUE\0" |
| 553 | "RISCVISD::QC_E_LI\0" |
| 554 | "RISCVISD::QC_INSB\0" |
| 555 | "RISCVISD::QC_MULIADD\0" |
| 556 | "RISCVISD::QC_SETWMI\0" |
| 557 | "RISCVISD::READ_COUNTER_WIDE\0" |
| 558 | "RISCVISD::READ_CSR\0" |
| 559 | "RISCVISD::READ_VLENB\0" |
| 560 | "RISCVISD::REMUW\0" |
| 561 | "RISCVISD::RET_GLUE\0" |
| 562 | "RISCVISD::ROLW\0" |
| 563 | "RISCVISD::RORW\0" |
| 564 | "RISCVISD::ROTL_VL\0" |
| 565 | "RISCVISD::ROTR_VL\0" |
| 566 | "RISCVISD::SADDSAT_VL\0" |
| 567 | "RISCVISD::SATI\0" |
| 568 | "RISCVISD::SDIV_VL\0" |
| 569 | "RISCVISD::SD_RV32\0" |
| 570 | "RISCVISD::SELECT_CC\0" |
| 571 | "RISCVISD::SETCC_VL\0" |
| 572 | "RISCVISD::SET_CSR\0" |
| 573 | "RISCVISD::SF_VC_FVV_SE\0" |
| 574 | "RISCVISD::SF_VC_FVW_SE\0" |
| 575 | "RISCVISD::SF_VC_FV_SE\0" |
| 576 | "RISCVISD::SF_VC_IVV_SE\0" |
| 577 | "RISCVISD::SF_VC_IVW_SE\0" |
| 578 | "RISCVISD::SF_VC_IV_SE\0" |
| 579 | "RISCVISD::SF_VC_VVV_SE\0" |
| 580 | "RISCVISD::SF_VC_VVW_SE\0" |
| 581 | "RISCVISD::SF_VC_VV_SE\0" |
| 582 | "RISCVISD::SF_VC_V_FVV_SE\0" |
| 583 | "RISCVISD::SF_VC_V_FVW_SE\0" |
| 584 | "RISCVISD::SF_VC_V_FV_SE\0" |
| 585 | "RISCVISD::SF_VC_V_IVV_SE\0" |
| 586 | "RISCVISD::SF_VC_V_IVW_SE\0" |
| 587 | "RISCVISD::SF_VC_V_IV_SE\0" |
| 588 | "RISCVISD::SF_VC_V_I_SE\0" |
| 589 | "RISCVISD::SF_VC_V_VVV_SE\0" |
| 590 | "RISCVISD::SF_VC_V_VVW_SE\0" |
| 591 | "RISCVISD::SF_VC_V_VV_SE\0" |
| 592 | "RISCVISD::SF_VC_V_XVV_SE\0" |
| 593 | "RISCVISD::SF_VC_V_XVW_SE\0" |
| 594 | "RISCVISD::SF_VC_V_XV_SE\0" |
| 595 | "RISCVISD::SF_VC_V_X_SE\0" |
| 596 | "RISCVISD::SF_VC_XVV_SE\0" |
| 597 | "RISCVISD::SF_VC_XVW_SE\0" |
| 598 | "RISCVISD::SF_VC_XV_SE\0" |
| 599 | "RISCVISD::SHA256SIG0\0" |
| 600 | "RISCVISD::SHA256SIG1\0" |
| 601 | "RISCVISD::SHA256SUM0\0" |
| 602 | "RISCVISD::SHA256SUM1\0" |
| 603 | "RISCVISD::SHL_ADD\0" |
| 604 | "RISCVISD::SHL_VL\0" |
| 605 | "RISCVISD::SINT_TO_FP_VL\0" |
| 606 | "RISCVISD::SLLW\0" |
| 607 | "RISCVISD::SM3P0\0" |
| 608 | "RISCVISD::SM3P1\0" |
| 609 | "RISCVISD::SM4ED\0" |
| 610 | "RISCVISD::SM4KS\0" |
| 611 | "RISCVISD::SMAX_VL\0" |
| 612 | "RISCVISD::SMIN_VL\0" |
| 613 | "RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL\0" |
| 614 | "RISCVISD::SRAW\0" |
| 615 | "RISCVISD::SRA_VL\0" |
| 616 | "RISCVISD::SREM_VL\0" |
| 617 | "RISCVISD::SRET_GLUE\0" |
| 618 | "RISCVISD::SRLW\0" |
| 619 | "RISCVISD::SRL_VL\0" |
| 620 | "RISCVISD::SSUBSAT_VL\0" |
| 621 | "RISCVISD::STRICT_FADD_VL\0" |
| 622 | "RISCVISD::STRICT_FCVT_WU_RV64\0" |
| 623 | "RISCVISD::STRICT_FCVT_W_RV64\0" |
| 624 | "RISCVISD::STRICT_FDIV_VL\0" |
| 625 | "RISCVISD::STRICT_FMUL_VL\0" |
| 626 | "RISCVISD::STRICT_FP_EXTEND_VL\0" |
| 627 | "RISCVISD::STRICT_FP_ROUND_VL\0" |
| 628 | "RISCVISD::STRICT_FSETCCS_VL\0" |
| 629 | "RISCVISD::STRICT_FSETCC_VL\0" |
| 630 | "RISCVISD::STRICT_FSQRT_VL\0" |
| 631 | "RISCVISD::STRICT_FSUB_VL\0" |
| 632 | "RISCVISD::STRICT_SINT_TO_FP_VL\0" |
| 633 | "RISCVISD::STRICT_UINT_TO_FP_VL\0" |
| 634 | "RISCVISD::STRICT_VFCVT_RM_X_F_VL\0" |
| 635 | "RISCVISD::STRICT_VFCVT_RTZ_XU_F_VL\0" |
| 636 | "RISCVISD::STRICT_VFCVT_RTZ_X_F_VL\0" |
| 637 | "RISCVISD::STRICT_VFMADD_VL\0" |
| 638 | "RISCVISD::STRICT_VFMSUB_VL\0" |
| 639 | "RISCVISD::STRICT_VFNCVT_ROD_VL\0" |
| 640 | "RISCVISD::STRICT_VFNMADD_VL\0" |
| 641 | "RISCVISD::STRICT_VFNMSUB_VL\0" |
| 642 | "RISCVISD::STRICT_VFROUND_NOEXCEPT_VL\0" |
| 643 | "RISCVISD::SUBD\0" |
| 644 | "RISCVISD::SUB_VL\0" |
| 645 | "RISCVISD::SWAP_CSR\0" |
| 646 | "RISCVISD::SW_GUARDED_BRIND\0" |
| 647 | "RISCVISD::SW_GUARDED_CALL\0" |
| 648 | "RISCVISD::SW_GUARDED_TAIL\0" |
| 649 | "RISCVISD::SplitF64\0" |
| 650 | "RISCVISD::SplitGPRPair\0" |
| 651 | "RISCVISD::SplitGPRVec\0" |
| 652 | "RISCVISD::TAIL\0" |
| 653 | "RISCVISD::TH_LDD\0" |
| 654 | "RISCVISD::TH_LWD\0" |
| 655 | "RISCVISD::TH_LWUD\0" |
| 656 | "RISCVISD::TH_SDD\0" |
| 657 | "RISCVISD::TH_SWD\0" |
| 658 | "RISCVISD::TRUNCATE_VECTOR_VL\0" |
| 659 | "RISCVISD::TRUNCATE_VECTOR_VL_SSAT\0" |
| 660 | "RISCVISD::TRUNCATE_VECTOR_VL_USAT\0" |
| 661 | "RISCVISD::TUPLE_EXTRACT\0" |
| 662 | "RISCVISD::TUPLE_INSERT\0" |
| 663 | "RISCVISD::UADDSAT_VL\0" |
| 664 | "RISCVISD::UDIV_VL\0" |
| 665 | "RISCVISD::UINT_TO_FP_VL\0" |
| 666 | "RISCVISD::UMAX_VL\0" |
| 667 | "RISCVISD::UMIN_VL\0" |
| 668 | "RISCVISD::UNZIP\0" |
| 669 | "RISCVISD::UREM_VL\0" |
| 670 | "RISCVISD::USATI\0" |
| 671 | "RISCVISD::USUBSAT_VL\0" |
| 672 | "RISCVISD::VCPOP_VL\0" |
| 673 | "RISCVISD::VDOT4ASU_VL\0" |
| 674 | "RISCVISD::VDOT4AU_VL\0" |
| 675 | "RISCVISD::VDOT4A_VL\0" |
| 676 | "RISCVISD::VECREDUCE_ADD_VL\0" |
| 677 | "RISCVISD::VECREDUCE_AND_VL\0" |
| 678 | "RISCVISD::VECREDUCE_FADD_VL\0" |
| 679 | "RISCVISD::VECREDUCE_FMAX_VL\0" |
| 680 | "RISCVISD::VECREDUCE_FMIN_VL\0" |
| 681 | "RISCVISD::VECREDUCE_OR_VL\0" |
| 682 | "RISCVISD::VECREDUCE_SEQ_FADD_VL\0" |
| 683 | "RISCVISD::VECREDUCE_SMAX_VL\0" |
| 684 | "RISCVISD::VECREDUCE_SMIN_VL\0" |
| 685 | "RISCVISD::VECREDUCE_UMAX_VL\0" |
| 686 | "RISCVISD::VECREDUCE_UMIN_VL\0" |
| 687 | "RISCVISD::VECREDUCE_XOR_VL\0" |
| 688 | "RISCVISD::VFCVT_RM_F_XU_VL\0" |
| 689 | "RISCVISD::VFCVT_RM_F_X_VL\0" |
| 690 | "RISCVISD::VFCVT_RM_XU_F_VL\0" |
| 691 | "RISCVISD::VFCVT_RM_X_F_VL\0" |
| 692 | "RISCVISD::VFCVT_RTZ_XU_F_VL\0" |
| 693 | "RISCVISD::VFCVT_RTZ_X_F_VL\0" |
| 694 | "RISCVISD::VFIRST_VL\0" |
| 695 | "RISCVISD::VFMADD_VL\0" |
| 696 | "RISCVISD::VFMAX_VL\0" |
| 697 | "RISCVISD::VFMIN_VL\0" |
| 698 | "RISCVISD::VFMSUB_VL\0" |
| 699 | "RISCVISD::VFMV_S_F_VL\0" |
| 700 | "RISCVISD::VFMV_V_F_VL\0" |
| 701 | "RISCVISD::VFNCVT_ROD_VL\0" |
| 702 | "RISCVISD::VFNMADD_VL\0" |
| 703 | "RISCVISD::VFNMSUB_VL\0" |
| 704 | "RISCVISD::VFROUND_NOEXCEPT_VL\0" |
| 705 | "RISCVISD::VFSLIDE1DOWN_VL\0" |
| 706 | "RISCVISD::VFSLIDE1UP_VL\0" |
| 707 | "RISCVISD::VFWADD_VL\0" |
| 708 | "RISCVISD::VFWADD_W_VL\0" |
| 709 | "RISCVISD::VFWMADD_VL\0" |
| 710 | "RISCVISD::VFWMSUB_VL\0" |
| 711 | "RISCVISD::VFWMUL_VL\0" |
| 712 | "RISCVISD::VFWNMADD_VL\0" |
| 713 | "RISCVISD::VFWNMSUB_VL\0" |
| 714 | "RISCVISD::VFWSUB_VL\0" |
| 715 | "RISCVISD::VFWSUB_W_VL\0" |
| 716 | "RISCVISD::VID_VL\0" |
| 717 | "RISCVISD::VMAND_VL\0" |
| 718 | "RISCVISD::VMCLR_VL\0" |
| 719 | "RISCVISD::VMERGE_VL\0" |
| 720 | "RISCVISD::VMOR_VL\0" |
| 721 | "RISCVISD::VMSET_VL\0" |
| 722 | "RISCVISD::VMV_S_X_VL\0" |
| 723 | "RISCVISD::VMV_V_V_VL\0" |
| 724 | "RISCVISD::VMV_V_X_VL\0" |
| 725 | "RISCVISD::VMV_X_S\0" |
| 726 | "RISCVISD::VMXOR_VL\0" |
| 727 | "RISCVISD::VPAIRE_VL\0" |
| 728 | "RISCVISD::VPAIRO_VL\0" |
| 729 | "RISCVISD::VRGATHEREI16_VV_VL\0" |
| 730 | "RISCVISD::VRGATHER_VV_VL\0" |
| 731 | "RISCVISD::VRGATHER_VX_VL\0" |
| 732 | "RISCVISD::VSEXT_VL\0" |
| 733 | "RISCVISD::VSLIDE1DOWN_VL\0" |
| 734 | "RISCVISD::VSLIDE1UP_VL\0" |
| 735 | "RISCVISD::VSLIDEDOWN_VL\0" |
| 736 | "RISCVISD::VSLIDEUP_VL\0" |
| 737 | "RISCVISD::VUNZIPE_VL\0" |
| 738 | "RISCVISD::VUNZIPO_VL\0" |
| 739 | "RISCVISD::VWABDAU_VL\0" |
| 740 | "RISCVISD::VWABDA_VL\0" |
| 741 | "RISCVISD::VWADDU_VL\0" |
| 742 | "RISCVISD::VWADDU_W_VL\0" |
| 743 | "RISCVISD::VWADD_VL\0" |
| 744 | "RISCVISD::VWADD_W_VL\0" |
| 745 | "RISCVISD::VWMACCSU_VL\0" |
| 746 | "RISCVISD::VWMACCU_VL\0" |
| 747 | "RISCVISD::VWMACC_VL\0" |
| 748 | "RISCVISD::VWMULSU_VL\0" |
| 749 | "RISCVISD::VWMULU_VL\0" |
| 750 | "RISCVISD::VWMUL_VL\0" |
| 751 | "RISCVISD::VWSLL_VL\0" |
| 752 | "RISCVISD::VWSUBU_VL\0" |
| 753 | "RISCVISD::VWSUBU_W_VL\0" |
| 754 | "RISCVISD::VWSUB_VL\0" |
| 755 | "RISCVISD::VWSUB_W_VL\0" |
| 756 | "RISCVISD::VZEXT_VL\0" |
| 757 | "RISCVISD::VZIP_VL\0" |
| 758 | "RISCVISD::WADD\0" |
| 759 | "RISCVISD::WADDA\0" |
| 760 | "RISCVISD::WADDAU\0" |
| 761 | "RISCVISD::WADDU\0" |
| 762 | "RISCVISD::WMULSU\0" |
| 763 | "RISCVISD::WRITE_CSR\0" |
| 764 | "RISCVISD::WSLA\0" |
| 765 | "RISCVISD::WSLL\0" |
| 766 | "RISCVISD::WSUB\0" |
| 767 | "RISCVISD::WSUBA\0" |
| 768 | "RISCVISD::WSUBAU\0" |
| 769 | "RISCVISD::WSUBU\0" |
| 770 | "RISCVISD::XOR_VL\0" |
| 771 | "RISCVISD::ZIP\0" |
| 772 | ; |
| 773 | #ifdef __GNUC__ |
| 774 | #pragma GCC diagnostic pop |
| 775 | #endif |
| 776 | |
| 777 | static constexpr llvm::StringTable |
| 778 | RISCVSDNodeNames = RISCVSDNodeNamesStorage; |
| 779 | |
| 780 | static const VTByHwModePair RISCVVTByHwModeTable[] = { |
| 781 | /* 0 */ {0, MVT::i32}, {1, MVT::i64}, |
| 782 | /* 2 */ {0, MVT::v2i16}, {1, MVT::v2i32}, |
| 783 | }; |
| 784 | |
| 785 | static const SDTypeConstraint RISCVSDTypeConstraints[] = { |
| 786 | /* 0 */ {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32}, |
| 787 | /* 4 */ {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32}, |
| 788 | /* 7 */ {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32}, |
| 789 | /* 13 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32}, |
| 790 | /* 19 */ {SDTCisVT, 2, 0, 0, MVT::f64}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32}, |
| 791 | /* 22 */ {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32}, |
| 792 | /* 25 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32}, |
| 793 | /* 29 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0}, |
| 794 | /* 33 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0}, |
| 795 | /* 37 */ {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 2, 2}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0}, |
| 796 | /* 41 */ {SDTCisVT, 2, 0, 0, MVT::Untyped}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0}, |
| 797 | /* 44 */ {SDTCisVT, 1, 0, 0, MVT::bf16}, {SDTCisVT, 0, 0, 2, 0}, |
| 798 | /* 46 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0}, |
| 799 | /* 49 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0}, |
| 800 | /* 55 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0}, |
| 801 | /* 59 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0}, |
| 802 | /* 63 */ {SDTCisVT, 1, 0, 0, MVT::f32}, {SDTCisVT, 0, 0, 0, MVT::i64}, |
| 803 | /* 65 */ {SDTCisVT, 2, 0, 0, MVT::i64}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i64}, |
| 804 | /* 68 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::bf16}, |
| 805 | /* 70 */ {SDTCisVT, 1, 0, 0, MVT::i64}, {SDTCisVT, 0, 0, 0, MVT::f32}, |
| 806 | /* 72 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::f64}, |
| 807 | /* 75 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::v2i32}, |
| 808 | /* 78 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::v4i16}, {SDTCisVT, 0, 0, 0, MVT::v2i32}, |
| 809 | /* 81 */ {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 0, MVT::v4i16}, {SDTCisVT, 1, 0, 0, MVT::v2i32}, {SDTCisVT, 0, 0, 0, MVT::v2i32}, |
| 810 | /* 85 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::Untyped}, |
| 811 | /* 88 */ {SDTCisPtrTy, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 812 | /* 89 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 813 | /* 98 */ {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 814 | /* 102 */ {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 815 | /* 105 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 816 | /* 112 */ {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 817 | /* 115 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 818 | /* 119 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 819 | /* 121 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 820 | /* 128 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 821 | /* 135 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 822 | /* 142 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 823 | /* 147 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 824 | /* 157 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 825 | /* 167 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 826 | /* 177 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 827 | /* 182 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 828 | /* 192 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 829 | /* 203 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 830 | /* 207 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 831 | /* 214 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 832 | /* 223 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i16}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 833 | /* 232 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i64}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 834 | /* 238 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 835 | /* 243 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 836 | /* 248 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 837 | /* 251 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 838 | /* 256 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 839 | /* 260 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 840 | /* 265 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 841 | /* 270 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 3, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSubVecOfVec, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 842 | /* 277 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 843 | /* 285 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 844 | /* 288 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSubVecOfVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 845 | /* 296 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 846 | /* 299 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 2, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 847 | /* 307 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 848 | /* 315 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisEltOfVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 849 | /* 323 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 850 | /* 331 */ {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 851 | /* 335 */ {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 852 | /* 339 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSubVecOfVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 853 | /* 342 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 854 | /* 346 */ {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 855 | /* 348 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 856 | /* 350 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 857 | /* 354 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 858 | /* 358 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 859 | /* 364 */ {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 860 | /* 368 */ {SDTCisInt, 4, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 861 | /* 373 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 862 | /* 376 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 863 | /* 379 */ {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 864 | /* 382 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 865 | /* 390 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 3, 0, 0, MVT::i1}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 866 | /* 397 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 867 | /* 405 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 868 | /* 412 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 869 | /* 416 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 870 | /* 424 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 871 | /* 428 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 872 | /* 433 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 873 | /* 437 */ {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisVT, 2, 0, 0, MVT::Other}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 874 | /* 440 */ {SDTCisVT, 0, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 875 | /* 444 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1}, |
| 876 | /* 446 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1}, |
| 877 | /* 454 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 878 | /* 457 */ {SDTCisSameAs, 4, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, |
| 879 | }; |
| 880 | |
| 881 | static const SDNodeDesc RISCVSDNodeDescs[] = { |
| 882 | {1, 5, 0, 0, 3, 1, 382, 8}, // ABDS_VL |
| 883 | {1, 5, 0, 0, 3, 19, 382, 8}, // ABDU_VL |
| 884 | {1, 1, 0, 0, 0, 37, 348, 2}, // ABSW |
| 885 | {2, 4, 0, 0, 0, 52, 13, 6}, // ADDD |
| 886 | {1, 2, 0, 0, 0, 67, 376, 3}, // ADD_LO |
| 887 | {1, 3, 0, 0, 0, 84, 412, 4}, // ADD_TPREL |
| 888 | {1, 5, 0, 0, 3, 104, 382, 8}, // ADD_VL |
| 889 | {1, 5, 0, 0, 3, 121, 382, 8}, // AND_VL |
| 890 | {1, 2, 0, 0, 0, 138, 376, 3}, // ASUB |
| 891 | {1, 2, 0, 0, 0, 153, 376, 3}, // ASUBU |
| 892 | {1, 5, 0, 0, 3, 169, 382, 8}, // AVGCEILS_VL |
| 893 | {1, 5, 0, 0, 3, 191, 382, 8}, // AVGCEILU_VL |
| 894 | {1, 5, 0, 0, 3, 213, 382, 8}, // AVGFLOORS_VL |
| 895 | {1, 5, 0, 0, 3, 236, 382, 8}, // AVGFLOORU_VL |
| 896 | {1, 4, 0, 0, 3, 259, 390, 7}, // BITREVERSE_VL |
| 897 | {1, 1, 0, 0, 0, 283, 352, 2}, // BREV8 |
| 898 | {0, 4, 0|1<<SDNPHasChain, 0, 0, 299, 437, 3}, // BR_CC |
| 899 | {1, 4, 0, 0, 3, 315, 390, 7}, // BSWAP_VL |
| 900 | {1, 2, 0, 0, 0, 334, 85, 3}, // BuildGPRPair |
| 901 | {1, 2, 0, 0, 0, 357, 72, 3}, // BuildPairF64 |
| 902 | {1, 2, 0, 0, 0, 380, 248, 3}, // BuildPairGPRVec |
| 903 | {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 406, 32, 1}, // CALL |
| 904 | {0, 2, 0|1<<SDNPHasChain, 0, 0, 421, 103, 2}, // CLEAR_CSR |
| 905 | {1, 5, 0, 0, 3, 441, 382, 8}, // CLMULH_VL |
| 906 | {1, 5, 0, 0, 3, 461, 382, 8}, // CLMUL_VL |
| 907 | {1, 1, 0, 0, 0, 480, 348, 2}, // CLSW |
| 908 | {1, 1, 0, 0, 0, 495, 348, 2}, // CLZW |
| 909 | {1, 4, 0, 0, 3, 510, 390, 7}, // CTLZ_VL |
| 910 | {1, 4, 0, 0, 3, 528, 390, 7}, // CTPOP_VL |
| 911 | {1, 4, 0, 0, 3, 547, 390, 7}, // CTTZ_VL |
| 912 | {1, 1, 0, 0, 0, 565, 348, 2}, // CTZW |
| 913 | {1, 2, 0, 0, 0, 580, 376, 3}, // CZERO_EQZ |
| 914 | {1, 2, 0, 0, 0, 600, 376, 3}, // CZERO_NEZ |
| 915 | {1, 2, 0, 0, 0, 620, 373, 3}, // DIVUW |
| 916 | {1, 2, 0, 0, 0, 636, 373, 3}, // DIVW |
| 917 | {1, 3, 0, 0, 2, 651, 358, 6}, // FABS_VL |
| 918 | {1, 5, 0, 0, 3, 669, 397, 8}, // FADD_VL |
| 919 | {1, 1, 0, 0, 0, 687, 47, 2}, // FCLASS |
| 920 | {1, 3, 0, 0, 2, 704, 89, 9}, // FCLASS_VL |
| 921 | {1, 5, 0, 0, 3, 724, 397, 8}, // FCOPYSIGN_VL |
| 922 | {1, 2, 0, 0, 0, 747, 65, 3}, // FCVT_WU_RV64 |
| 923 | {1, 2, 0, 0, 0, 770, 65, 3}, // FCVT_W_RV64 |
| 924 | {1, 2, 0, 0, 0, 792, 46, 3}, // FCVT_X |
| 925 | {1, 2, 0, 0, 0, 809, 46, 3}, // FCVT_XU |
| 926 | {1, 5, 0, 0, 3, 827, 397, 8}, // FDIV_VL |
| 927 | {1, 1, 0, 0, 0, 845, 119, 2}, // FLI |
| 928 | {1, 2, 0, 0, 0, 859, 379, 3}, // FMAX |
| 929 | {1, 2, 0, 0, 0, 874, 379, 3}, // FMIN |
| 930 | {1, 5, 0, 0, 3, 889, 397, 8}, // FMUL_VL |
| 931 | {1, 1, 0, 0, 0, 907, 119, 2}, // FMV_H_X |
| 932 | {1, 1, 0, 0, 0, 925, 70, 2}, // FMV_W_X_RV64 |
| 933 | {1, 1, 0, 0, 0, 948, 47, 2}, // FMV_X_ANYEXTH |
| 934 | {1, 1, 0, 0, 0, 972, 63, 2}, // FMV_X_ANYEXTW_RV64 |
| 935 | {1, 1, 0, 0, 0, 1001, 47, 2}, // FMV_X_SIGNEXTH |
| 936 | {1, 3, 0, 0, 2, 1026, 358, 6}, // FNEG_VL |
| 937 | {1, 3, 0, 0, 2, 1044, 135, 7}, // FP_EXTEND_VL |
| 938 | {1, 3, 0, 0, 2, 1067, 128, 7}, // FP_ROUND_VL |
| 939 | {1, 3, 0, 0, 0, 1089, 115, 4}, // FROUND |
| 940 | {1, 2, 0, 0, 0, 1106, 116, 3}, // FSGNJX |
| 941 | {1, 3, 0, 0, 2, 1123, 358, 6}, // FSQRT_VL |
| 942 | {1, 5, 0, 0, 3, 1142, 397, 8}, // FSUB_VL |
| 943 | {1, 1, 0, 0, 0, 1160, 352, 2}, // HI |
| 944 | {2, 1, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1173, 22, 3}, // LD_RV32 |
| 945 | {1, 1, 0, 0, 0, 1191, 352, 2}, // LLA |
| 946 | {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1205, 32, 1}, // LPAD_CALL |
| 947 | {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1225, 32, 1}, // LPAD_CALL_INDIRECT |
| 948 | {1, 3, 0, 0, 0, 1254, 98, 4}, // MERGE |
| 949 | {1, 3, 0, 0, 0, 1270, 413, 3}, // MHACC |
| 950 | {1, 3, 0, 0, 0, 1286, 413, 3}, // MHACCSU |
| 951 | {1, 3, 0, 0, 0, 1304, 413, 3}, // MHACCU |
| 952 | {1, 3, 0, 0, 0, 1321, 413, 3}, // MHRACC |
| 953 | {1, 3, 0, 0, 0, 1338, 413, 3}, // MHRACCSU |
| 954 | {1, 3, 0, 0, 0, 1357, 413, 3}, // MHRACCU |
| 955 | {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1375, 0, 0}, // MNRET_GLUE |
| 956 | {1, 2, 0, 0, 0, 1396, 99, 3}, // MOP_R |
| 957 | {1, 3, 0, 0, 0, 1412, 98, 4}, // MOP_RR |
| 958 | {1, 3, 0, 0, 0, 1429, 37, 4}, // MQACC_00 |
| 959 | {1, 3, 0, 0, 0, 1448, 37, 4}, // MQACC_01 |
| 960 | {1, 3, 0, 0, 0, 1467, 37, 4}, // MQACC_11 |
| 961 | {1, 3, 0, 0, 0, 1486, 37, 4}, // MQRACC_00 |
| 962 | {1, 3, 0, 0, 0, 1506, 37, 4}, // MQRACC_01 |
| 963 | {1, 3, 0, 0, 0, 1526, 37, 4}, // MQRACC_11 |
| 964 | {2, 4, 0, 0, 0, 1546, 7, 6}, // MQRWACC |
| 965 | {2, 4, 0, 0, 0, 1564, 7, 6}, // MQWACC |
| 966 | {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1581, 0, 0}, // MRET_GLUE |
| 967 | {1, 2, 0, 0, 0, 1601, 376, 3}, // MULHR |
| 968 | {1, 2, 0, 0, 0, 1617, 376, 3}, // MULHRSU |
| 969 | {1, 2, 0, 0, 0, 1635, 376, 3}, // MULHRU |
| 970 | {1, 2, 0, 0, 0, 1652, 376, 3}, // MULHSU |
| 971 | {1, 5, 0, 0, 3, 1669, 382, 8}, // MULHS_VL |
| 972 | {1, 5, 0, 0, 3, 1688, 382, 8}, // MULHU_VL |
| 973 | {1, 2, 0, 0, 0, 1707, 376, 3}, // MULQ |
| 974 | {1, 2, 0, 0, 0, 1722, 376, 3}, // MULQR |
| 975 | {1, 5, 0, 0, 3, 1738, 382, 8}, // MUL_VL |
| 976 | {1, 3, 0, 0, 0, 1755, 33, 4}, // NCLIP |
| 977 | {1, 3, 0, 0, 0, 1771, 33, 4}, // NCLIPU |
| 978 | {1, 1, 0, 0, 0, 1788, 68, 2}, // NDS_FMV_BF16_X |
| 979 | {1, 1, 0, 0, 0, 1813, 44, 2}, // NDS_FMV_X_ANYEXTBF16 |
| 980 | {1, 1, 0, 0, 0, 1844, 352, 2}, // NEGW_MAX |
| 981 | {1, 3, 0, 0, 0, 1863, 0, 4}, // NSRA |
| 982 | {1, 3, 0, 0, 0, 1878, 0, 4}, // NSRL |
| 983 | {1, 1, 0, 0, 0, 1893, 352, 2}, // ORC_B |
| 984 | {1, 5, 0, 0, 3, 1909, 382, 8}, // OR_VL |
| 985 | {1, 2, 0, 0, 0, 1925, 78, 3}, // PM2ADDU_H |
| 986 | {1, 2, 0, 0, 0, 1945, 78, 3}, // PM2ADD_H |
| 987 | {1, 2, 0, 0, 0, 1964, 78, 3}, // PM2SUB_H |
| 988 | {1, 3, 0, 0, 0, 1983, 81, 4}, // PMQACC_W_H00 |
| 989 | {1, 3, 0, 0, 0, 2006, 81, 4}, // PMQACC_W_H01 |
| 990 | {1, 3, 0, 0, 0, 2029, 81, 4}, // PMQACC_W_H11 |
| 991 | {1, 3, 0, 0, 0, 2052, 81, 4}, // PMQRACC_W_H00 |
| 992 | {1, 3, 0, 0, 0, 2076, 81, 4}, // PMQRACC_W_H01 |
| 993 | {1, 3, 0, 0, 0, 2100, 81, 4}, // PMQRACC_W_H11 |
| 994 | {1, 2, 0, 0, 0, 2124, 331, 4}, // PMULSU_HALVES_00 |
| 995 | {1, 2, 0, 0, 0, 2151, 331, 4}, // PMULSU_HALVES_11 |
| 996 | {1, 2, 0, 0, 0, 2178, 331, 4}, // PMULU_HALVES_00 |
| 997 | {1, 2, 0, 0, 0, 2204, 331, 4}, // PMULU_HALVES_01 |
| 998 | {1, 2, 0, 0, 0, 2230, 331, 4}, // PMULU_HALVES_11 |
| 999 | {1, 2, 0, 0, 0, 2256, 331, 4}, // PMUL_HALVES_00 |
| 1000 | {1, 2, 0, 0, 0, 2281, 331, 4}, // PMUL_HALVES_01 |
| 1001 | {1, 2, 0, 0, 0, 2306, 331, 4}, // PMUL_HALVES_11 |
| 1002 | {1, 2, 0, 0, 0, 2331, 296, 3}, // PNCLIP |
| 1003 | {1, 2, 0, 0, 0, 2348, 285, 3}, // PNCLIPP |
| 1004 | {1, 2, 0, 0, 0, 2366, 75, 3}, // PNCLIPP_W |
| 1005 | {1, 2, 0, 0, 0, 2386, 296, 3}, // PNCLIPU |
| 1006 | {1, 2, 0, 0, 0, 2404, 285, 3}, // PNCLIPUP |
| 1007 | {1, 2, 0, 0, 0, 2423, 75, 3}, // PNCLIPUP_W |
| 1008 | {1, 2, 0, 0, 0, 2444, 296, 3}, // PNSRL |
| 1009 | {1, 2, 0, 0, 0, 2460, 204, 3}, // PPAIRE |
| 1010 | {1, 2, 0, 0, 0, 2477, 204, 3}, // PPAIREO |
| 1011 | {1, 2, 0, 0, 0, 2495, 204, 3}, // PPAIRO |
| 1012 | {1, 2, 0, 0, 0, 2512, 204, 3}, // PPAIROE |
| 1013 | {1, 2, 0, 0, 0, 2530, 204, 3}, // PPAIROE_H |
| 1014 | {0, 1, 0|1<<SDNPHasChain, 0, 0, 2550, 88, 1}, // PROBED_ALLOCA |
| 1015 | {1, 1, 0, 0, 0, 2574, 205, 2}, // PSABS |
| 1016 | {1, 2, 0, 0, 0, 2590, 211, 3}, // PSHL |
| 1017 | {1, 2, 0, 0, 0, 2605, 211, 3}, // PSRA |
| 1018 | {1, 2, 0, 0, 0, 2620, 211, 3}, // PSRL |
| 1019 | {1, 2, 0, 0, 0, 2635, 211, 3}, // PSSHA |
| 1020 | {1, 2, 0, 0, 0, 2651, 211, 3}, // PSSHAR |
| 1021 | {1, 2, 0, 0, 0, 2668, 211, 3}, // PSSHL |
| 1022 | {1, 2, 0, 0, 0, 2684, 211, 3}, // PSSHLR |
| 1023 | {1, 2, 0, 0, 0, 2701, 204, 3}, // PUNZIPE |
| 1024 | {1, 2, 0, 0, 0, 2719, 204, 3}, // PUNZIPO |
| 1025 | {1, 2, 0, 0, 0, 2737, 335, 4}, // PWMUL |
| 1026 | {1, 2, 0, 0, 0, 2753, 335, 4}, // PWMULSU |
| 1027 | {1, 2, 0, 0, 0, 2771, 335, 4}, // PWMULU |
| 1028 | {1, 2, 0, 0, 0, 2788, 339, 3}, // PWZIP |
| 1029 | {1, 2, 0, 0, 0, 2804, 204, 3}, // PZIP |
| 1030 | {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 2819, 0, 0}, // QC_C_MILEAVERET_GLUE |
| 1031 | {1, 1, 0, 0, 0, 2850, 352, 2}, // QC_E_LI |
| 1032 | {1, 4, 0, 0, 0, 2868, 368, 5}, // QC_INSB |
| 1033 | {1, 3, 0, 0, 0, 2886, 364, 4}, // QC_MULIADD |
| 1034 | {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 2907, 433, 4}, // QC_SETWMI |
| 1035 | {2, 2, 0|1<<SDNPHasChain, 0, 0, 2927, 25, 4}, // READ_COUNTER_WIDE |
| 1036 | {1, 1, 0|1<<SDNPHasChain, 0, 0, 2955, 103, 2}, // READ_CSR |
| 1037 | {1, 0, 0, 0, 0, 2974, 32, 1}, // READ_VLENB |
| 1038 | {1, 2, 0, 0, 0, 2995, 373, 3}, // REMUW |
| 1039 | {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 3011, 0, 0}, // RET_GLUE |
| 1040 | {1, 2, 0, 0, 0, 3030, 373, 3}, // ROLW |
| 1041 | {1, 2, 0, 0, 0, 3045, 373, 3}, // RORW |
| 1042 | {1, 5, 0, 0, 3, 3060, 382, 8}, // ROTL_VL |
| 1043 | {1, 5, 0, 0, 3, 3078, 382, 8}, // ROTR_VL |
| 1044 | {1, 5, 0, 0, 3, 3096, 382, 8}, // SADDSAT_VL |
| 1045 | {1, 2, 0, 0, 0, 3117, 376, 3}, // SATI |
| 1046 | {1, 5, 0, 0, 3, 3132, 382, 8}, // SDIV_VL |
| 1047 | {0, 3, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 3150, 22, 3}, // SD_RV32 |
| 1048 | {1, 5, 0, 0, 0, 3168, 457, 4}, // SELECT_CC |
| 1049 | {1, 6, 0, 0, 3, 3188, 446, 8}, // SETCC_VL |
| 1050 | {0, 2, 0|1<<SDNPHasChain, 0, 0, 3207, 103, 2}, // SET_CSR |
| 1051 | {0, 5, 0|1<<SDNPHasChain, 0, 0, 3225, 55, 4}, // SF_VC_FVV_SE |
| 1052 | {0, 5, 0|1<<SDNPHasChain, 0, 0, 3248, 59, 4}, // SF_VC_FVW_SE |
| 1053 | {0, 5, 0|1<<SDNPHasChain, 0, 0, 3271, 440, 4}, // SF_VC_FV_SE |
| 1054 | {0, 5, 0|1<<SDNPHasChain, 0, 0, 3293, 55, 4}, // SF_VC_IVV_SE |
| 1055 | {0, 5, 0|1<<SDNPHasChain, 0, 0, 3316, 59, 4}, // SF_VC_IVW_SE |
| 1056 | {0, 5, 0|1<<SDNPHasChain, 0, 0, 3339, 440, 4}, // SF_VC_IV_SE |
| 1057 | {0, 5, 0|1<<SDNPHasChain, 0, 0, 3361, 55, 4}, // SF_VC_VVV_SE |
| 1058 | {0, 5, 0|1<<SDNPHasChain, 0, 0, 3384, 59, 4}, // SF_VC_VVW_SE |
| 1059 | {0, 5, 0|1<<SDNPHasChain, 0, 0, 3407, 440, 4}, // SF_VC_VV_SE |
| 1060 | {1, 5, 0|1<<SDNPHasChain, 0, 0, 3429, 251, 5}, // SF_VC_V_FVV_SE |
| 1061 | {1, 5, 0|1<<SDNPHasChain, 0, 0, 3454, 260, 5}, // SF_VC_V_FVW_SE |
| 1062 | {1, 4, 0|1<<SDNPHasChain, 0, 0, 3479, 256, 4}, // SF_VC_V_FV_SE |
| 1063 | {1, 5, 0|1<<SDNPHasChain, 0, 0, 3503, 251, 5}, // SF_VC_V_IVV_SE |
| 1064 | {1, 5, 0|1<<SDNPHasChain, 0, 0, 3528, 260, 5}, // SF_VC_V_IVW_SE |
| 1065 | {1, 4, 0|1<<SDNPHasChain, 0, 0, 3553, 256, 4}, // SF_VC_V_IV_SE |
| 1066 | {1, 4, 0|1<<SDNPHasChain, 0, 0, 3577, 265, 5}, // SF_VC_V_I_SE |
| 1067 | {1, 5, 0|1<<SDNPHasChain, 0, 0, 3600, 251, 5}, // SF_VC_V_VVV_SE |
| 1068 | {1, 5, 0|1<<SDNPHasChain, 0, 0, 3625, 260, 5}, // SF_VC_V_VVW_SE |
| 1069 | {1, 4, 0|1<<SDNPHasChain, 0, 0, 3650, 256, 4}, // SF_VC_V_VV_SE |
| 1070 | {1, 5, 0|1<<SDNPHasChain, 0, 0, 3674, 251, 5}, // SF_VC_V_XVV_SE |
| 1071 | {1, 5, 0|1<<SDNPHasChain, 0, 0, 3699, 260, 5}, // SF_VC_V_XVW_SE |
| 1072 | {1, 4, 0|1<<SDNPHasChain, 0, 0, 3724, 256, 4}, // SF_VC_V_XV_SE |
| 1073 | {1, 4, 0|1<<SDNPHasChain, 0, 0, 3748, 265, 5}, // SF_VC_V_X_SE |
| 1074 | {0, 5, 0|1<<SDNPHasChain, 0, 0, 3771, 55, 4}, // SF_VC_XVV_SE |
| 1075 | {0, 5, 0|1<<SDNPHasChain, 0, 0, 3794, 59, 4}, // SF_VC_XVW_SE |
| 1076 | {0, 5, 0|1<<SDNPHasChain, 0, 0, 3817, 440, 4}, // SF_VC_XV_SE |
| 1077 | {1, 1, 0, 0, 0, 3839, 352, 2}, // SHA256SIG0 |
| 1078 | {1, 1, 0, 0, 0, 3860, 352, 2}, // SHA256SIG1 |
| 1079 | {1, 1, 0, 0, 0, 3881, 352, 2}, // SHA256SUM0 |
| 1080 | {1, 1, 0, 0, 0, 3902, 352, 2}, // SHA256SUM1 |
| 1081 | {1, 3, 0, 0, 0, 3923, 428, 5}, // SHL_ADD |
| 1082 | {1, 5, 0, 0, 3, 3941, 382, 8}, // SHL_VL |
| 1083 | {1, 3, 0, 0, 2, 3958, 122, 6}, // SINT_TO_FP_VL |
| 1084 | {1, 2, 0, 0, 0, 3982, 373, 3}, // SLLW |
| 1085 | {1, 1, 0, 0, 0, 3997, 352, 2}, // SM3P0 |
| 1086 | {1, 1, 0, 0, 0, 4013, 352, 2}, // SM3P1 |
| 1087 | {1, 3, 0, 0, 0, 4029, 29, 4}, // SM4ED |
| 1088 | {1, 3, 0, 0, 0, 4045, 29, 4}, // SM4KS |
| 1089 | {1, 5, 0, 0, 3, 4061, 382, 8}, // SMAX_VL |
| 1090 | {1, 5, 0, 0, 3, 4079, 382, 8}, // SMIN_VL |
| 1091 | {1, 4, 0, 0, 0, 4097, 232, 6}, // SPLAT_VECTOR_SPLIT_I64_VL |
| 1092 | {1, 2, 0, 0, 0, 4133, 373, 3}, // SRAW |
| 1093 | {1, 5, 0, 0, 3, 4148, 382, 8}, // SRA_VL |
| 1094 | {1, 5, 0, 0, 3, 4165, 382, 8}, // SREM_VL |
| 1095 | {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 4183, 0, 0}, // SRET_GLUE |
| 1096 | {1, 2, 0, 0, 0, 4203, 373, 3}, // SRLW |
| 1097 | {1, 5, 0, 0, 3, 4218, 382, 8}, // SRL_VL |
| 1098 | {1, 5, 0, 0, 3, 4235, 382, 8}, // SSUBSAT_VL |
| 1099 | {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 4256, 397, 8}, // STRICT_FADD_VL |
| 1100 | {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 4281, 65, 3}, // STRICT_FCVT_WU_RV64 |
| 1101 | {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 4311, 65, 3}, // STRICT_FCVT_W_RV64 |
| 1102 | {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 4340, 397, 8}, // STRICT_FDIV_VL |
| 1103 | {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 4365, 397, 8}, // STRICT_FMUL_VL |
| 1104 | {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 4390, 135, 7}, // STRICT_FP_EXTEND_VL |
| 1105 | {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 4420, 128, 7}, // STRICT_FP_ROUND_VL |
| 1106 | {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 4449, 446, 8}, // STRICT_FSETCCS_VL |
| 1107 | {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 4477, 446, 8}, // STRICT_FSETCC_VL |
| 1108 | {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 4504, 358, 6}, // STRICT_FSQRT_VL |
| 1109 | {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 4530, 397, 8}, // STRICT_FSUB_VL |
| 1110 | {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 4555, 122, 6}, // STRICT_SINT_TO_FP_VL |
| 1111 | {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 4586, 122, 6}, // STRICT_UINT_TO_FP_VL |
| 1112 | {1, 4, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 4617, 105, 7}, // STRICT_VFCVT_RM_X_F_VL |
| 1113 | {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 4650, 106, 6}, // STRICT_VFCVT_RTZ_XU_F_VL |
| 1114 | {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 4685, 106, 6}, // STRICT_VFCVT_RTZ_X_F_VL |
| 1115 | {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 4719, 416, 8}, // STRICT_VFMADD_VL |
| 1116 | {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 4746, 416, 8}, // STRICT_VFMSUB_VL |
| 1117 | {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 4773, 128, 7}, // STRICT_VFNCVT_ROD_VL |
| 1118 | {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 4804, 416, 8}, // STRICT_VFNMADD_VL |
| 1119 | {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 4832, 416, 8}, // STRICT_VFNMSUB_VL |
| 1120 | {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 4860, 358, 6}, // STRICT_VFROUND_NOEXCEPT_VL |
| 1121 | {2, 4, 0, 0, 0, 4897, 13, 6}, // SUBD |
| 1122 | {1, 5, 0, 0, 3, 4912, 382, 8}, // SUB_VL |
| 1123 | {1, 2, 0|1<<SDNPHasChain, 0, 0, 4929, 102, 3}, // SWAP_CSR |
| 1124 | {0, 1, 0|1<<SDNPHasChain, 0, 0, 4948, 88, 1}, // SW_GUARDED_BRIND |
| 1125 | {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 4975, 32, 1}, // SW_GUARDED_CALL |
| 1126 | {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 5001, 32, 1}, // SW_GUARDED_TAIL |
| 1127 | {2, 1, 0, 0, 0, 5027, 19, 3}, // SplitF64 |
| 1128 | {2, 1, 0, 0, 0, 5046, 41, 3}, // SplitGPRPair |
| 1129 | {2, 1, 0, 0, 0, 5069, 4, 3}, // SplitGPRVec |
| 1130 | {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 5091, 32, 1}, // TAIL |
| 1131 | {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 5106, 433, 4}, // TH_LDD |
| 1132 | {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 5123, 433, 4}, // TH_LWD |
| 1133 | {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 5140, 433, 4}, // TH_LWUD |
| 1134 | {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 5158, 433, 4}, // TH_SDD |
| 1135 | {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 5175, 433, 4}, // TH_SWD |
| 1136 | {1, 3, 0, 0, 2, 5192, 238, 5}, // TRUNCATE_VECTOR_VL |
| 1137 | {1, 3, 0, 0, 2, 5221, 238, 5}, // TRUNCATE_VECTOR_VL_SSAT |
| 1138 | {1, 3, 0, 0, 2, 5255, 238, 5}, // TRUNCATE_VECTOR_VL_USAT |
| 1139 | {1, 2, 0, 0, 0, 5289, 346, 2}, // TUPLE_EXTRACT |
| 1140 | {1, 3, 0, 0, 0, 5313, 454, 3}, // TUPLE_INSERT |
| 1141 | {1, 5, 0, 0, 3, 5336, 382, 8}, // UADDSAT_VL |
| 1142 | {1, 5, 0, 0, 3, 5357, 382, 8}, // UDIV_VL |
| 1143 | {1, 3, 0, 0, 2, 5375, 122, 6}, // UINT_TO_FP_VL |
| 1144 | {1, 5, 0, 0, 3, 5399, 382, 8}, // UMAX_VL |
| 1145 | {1, 5, 0, 0, 3, 5417, 382, 8}, // UMIN_VL |
| 1146 | {1, 1, 0, 0, 0, 5435, 352, 2}, // UNZIP |
| 1147 | {1, 5, 0, 0, 3, 5451, 382, 8}, // UREM_VL |
| 1148 | {1, 2, 0, 0, 0, 5469, 376, 3}, // USATI |
| 1149 | {1, 5, 0, 0, 3, 5485, 382, 8}, // USUBSAT_VL |
| 1150 | {1, 3, 0, 0, 2, 5506, 49, 6}, // VCPOP_VL |
| 1151 | {1, 5, 0, 0, 3, 5525, 382, 8}, // VDOT4ASU_VL |
| 1152 | {1, 5, 0, 0, 3, 5547, 382, 8}, // VDOT4AU_VL |
| 1153 | {1, 5, 0, 0, 3, 5568, 382, 8}, // VDOT4A_VL |
| 1154 | {1, 6, 0, 0, 2, 5588, 299, 8}, // VECREDUCE_ADD_VL |
| 1155 | {1, 6, 0, 0, 2, 5615, 299, 8}, // VECREDUCE_AND_VL |
| 1156 | {1, 6, 0, 0, 2, 5642, 299, 8}, // VECREDUCE_FADD_VL |
| 1157 | {1, 6, 0, 0, 2, 5670, 299, 8}, // VECREDUCE_FMAX_VL |
| 1158 | {1, 6, 0, 0, 2, 5698, 299, 8}, // VECREDUCE_FMIN_VL |
| 1159 | {1, 6, 0, 0, 2, 5726, 299, 8}, // VECREDUCE_OR_VL |
| 1160 | {1, 6, 0, 0, 2, 5752, 299, 8}, // VECREDUCE_SEQ_FADD_VL |
| 1161 | {1, 6, 0, 0, 2, 5784, 299, 8}, // VECREDUCE_SMAX_VL |
| 1162 | {1, 6, 0, 0, 2, 5812, 299, 8}, // VECREDUCE_SMIN_VL |
| 1163 | {1, 6, 0, 0, 2, 5840, 299, 8}, // VECREDUCE_UMAX_VL |
| 1164 | {1, 6, 0, 0, 2, 5868, 299, 8}, // VECREDUCE_UMIN_VL |
| 1165 | {1, 6, 0, 0, 2, 5896, 299, 8}, // VECREDUCE_XOR_VL |
| 1166 | {1, 4, 0, 0, 2, 5923, 121, 7}, // VFCVT_RM_F_XU_VL |
| 1167 | {1, 4, 0, 0, 2, 5950, 121, 7}, // VFCVT_RM_F_X_VL |
| 1168 | {1, 4, 0, 0, 2, 5976, 105, 7}, // VFCVT_RM_XU_F_VL |
| 1169 | {1, 4, 0, 0, 2, 6003, 105, 7}, // VFCVT_RM_X_F_VL |
| 1170 | {1, 3, 0, 0, 2, 6029, 106, 6}, // VFCVT_RTZ_XU_F_VL |
| 1171 | {1, 3, 0, 0, 2, 6057, 106, 6}, // VFCVT_RTZ_X_F_VL |
| 1172 | {1, 3, 0, 0, 2, 6084, 49, 6}, // VFIRST_VL |
| 1173 | {1, 5, 0, 0, 2, 6104, 416, 8}, // VFMADD_VL |
| 1174 | {1, 5, 0, 0, 3, 6124, 397, 8}, // VFMAX_VL |
| 1175 | {1, 5, 0, 0, 3, 6143, 397, 8}, // VFMIN_VL |
| 1176 | {1, 5, 0, 0, 2, 6162, 416, 8}, // VFMSUB_VL |
| 1177 | {1, 3, 0, 0, 0, 6182, 354, 4}, // VFMV_S_F_VL |
| 1178 | {1, 3, 0, 0, 0, 6204, 177, 5}, // VFMV_V_F_VL |
| 1179 | {1, 3, 0, 0, 2, 6226, 128, 7}, // VFNCVT_ROD_VL |
| 1180 | {1, 5, 0, 0, 2, 6250, 416, 8}, // VFNMADD_VL |
| 1181 | {1, 5, 0, 0, 2, 6271, 416, 8}, // VFNMSUB_VL |
| 1182 | {1, 3, 0, 0, 2, 6292, 358, 6}, // VFROUND_NOEXCEPT_VL |
| 1183 | {1, 5, 0, 0, 2, 6322, 315, 8}, // VFSLIDE1DOWN_VL |
| 1184 | {1, 5, 0, 0, 2, 6348, 315, 8}, // VFSLIDE1UP_VL |
| 1185 | {1, 5, 0, 0, 3, 6372, 182, 10}, // VFWADD_VL |
| 1186 | {1, 5, 0, 0, 3, 6392, 167, 10}, // VFWADD_W_VL |
| 1187 | {1, 5, 0, 0, 2, 6414, 192, 11}, // VFWMADD_VL |
| 1188 | {1, 5, 0, 0, 2, 6435, 192, 11}, // VFWMSUB_VL |
| 1189 | {1, 5, 0, 0, 3, 6456, 182, 10}, // VFWMUL_VL |
| 1190 | {1, 5, 0, 0, 2, 6476, 192, 11}, // VFWNMADD_VL |
| 1191 | {1, 5, 0, 0, 2, 6498, 192, 11}, // VFWNMSUB_VL |
| 1192 | {1, 5, 0, 0, 3, 6520, 182, 10}, // VFWSUB_VL |
| 1193 | {1, 5, 0, 0, 3, 6540, 167, 10}, // VFWSUB_W_VL |
| 1194 | {1, 2, 0, 0, 2, 6562, 342, 4}, // VID_VL |
| 1195 | {1, 3, 0, 0, 0, 6579, 424, 4}, // VMAND_VL |
| 1196 | {1, 1, 0, 0, 0, 6598, 444, 2}, // VMCLR_VL |
| 1197 | {1, 5, 0, 0, 1, 6617, 277, 8}, // VMERGE_VL |
| 1198 | {1, 3, 0, 0, 0, 6637, 424, 4}, // VMOR_VL |
| 1199 | {1, 1, 0, 0, 0, 6655, 444, 2}, // VMSET_VL |
| 1200 | {1, 3, 0, 0, 0, 6674, 350, 4}, // VMV_S_X_VL |
| 1201 | {1, 3, 0, 0, 0, 6695, 203, 4}, // VMV_V_V_VL |
| 1202 | {1, 3, 0, 0, 0, 6716, 142, 5}, // VMV_V_X_VL |
| 1203 | {1, 1, 0, 0, 0, 6737, 112, 3}, // VMV_X_S |
| 1204 | {1, 3, 0, 0, 0, 6755, 424, 4}, // VMXOR_VL |
| 1205 | {1, 5, 0, 0, 3, 6774, 405, 7}, // VPAIRE_VL |
| 1206 | {1, 5, 0, 0, 3, 6794, 405, 7}, // VPAIRO_VL |
| 1207 | {1, 5, 0, 0, 2, 6814, 223, 9}, // VRGATHEREI16_VV_VL |
| 1208 | {1, 5, 0, 0, 2, 6843, 214, 9}, // VRGATHER_VV_VL |
| 1209 | {1, 5, 0, 0, 2, 6868, 207, 7}, // VRGATHER_VX_VL |
| 1210 | {1, 3, 0, 0, 2, 6893, 243, 5}, // VSEXT_VL |
| 1211 | {1, 5, 0, 0, 2, 6912, 307, 8}, // VSLIDE1DOWN_VL |
| 1212 | {1, 5, 0, 0, 2, 6937, 307, 8}, // VSLIDE1UP_VL |
| 1213 | {1, 6, 0, 0, 2, 6960, 323, 8}, // VSLIDEDOWN_VL |
| 1214 | {1, 6, 0, 0, 2, 6984, 323, 8}, // VSLIDEUP_VL |
| 1215 | {1, 4, 0, 0, 3, 7006, 270, 7}, // VUNZIPE_VL |
| 1216 | {1, 4, 0, 0, 3, 7027, 270, 7}, // VUNZIPO_VL |
| 1217 | {1, 5, 0, 0, 3, 7048, 157, 10}, // VWABDAU_VL |
| 1218 | {1, 5, 0, 0, 3, 7069, 157, 10}, // VWABDA_VL |
| 1219 | {1, 5, 0, 0, 3, 7089, 157, 10}, // VWADDU_VL |
| 1220 | {1, 5, 0, 0, 3, 7109, 147, 10}, // VWADDU_W_VL |
| 1221 | {1, 5, 0, 0, 3, 7131, 157, 10}, // VWADD_VL |
| 1222 | {1, 5, 0, 0, 3, 7150, 147, 10}, // VWADD_W_VL |
| 1223 | {1, 5, 0, 0, 2, 7171, 157, 10}, // VWMACCSU_VL |
| 1224 | {1, 5, 0, 0, 2, 7193, 157, 10}, // VWMACCU_VL |
| 1225 | {1, 5, 0, 0, 2, 7214, 157, 10}, // VWMACC_VL |
| 1226 | {1, 5, 0, 0, 3, 7234, 157, 10}, // VWMULSU_VL |
| 1227 | {1, 5, 0, 0, 3, 7255, 157, 10}, // VWMULU_VL |
| 1228 | {1, 5, 0, 0, 3, 7275, 157, 10}, // VWMUL_VL |
| 1229 | {1, 5, 0, 0, 3, 7294, 157, 10}, // VWSLL_VL |
| 1230 | {1, 5, 0, 0, 3, 7313, 157, 10}, // VWSUBU_VL |
| 1231 | {1, 5, 0, 0, 3, 7333, 147, 10}, // VWSUBU_W_VL |
| 1232 | {1, 5, 0, 0, 3, 7355, 157, 10}, // VWSUB_VL |
| 1233 | {1, 5, 0, 0, 3, 7374, 147, 10}, // VWSUB_W_VL |
| 1234 | {1, 3, 0, 0, 2, 7395, 243, 5}, // VZEXT_VL |
| 1235 | {1, 5, 0, 0, 3, 7414, 288, 8}, // VZIP_VL |
| 1236 | {2, 2, 0, 0, 0, 7432, 412, 4}, // WADD |
| 1237 | {2, 4, 0, 0, 0, 7447, 7, 6}, // WADDA |
| 1238 | {2, 4, 0, 0, 0, 7463, 7, 6}, // WADDAU |
| 1239 | {2, 2, 0, 0, 0, 7480, 412, 4}, // WADDU |
| 1240 | {2, 2, 0, 0, 0, 7496, 412, 4}, // WMULSU |
| 1241 | {0, 2, 0|1<<SDNPHasChain, 0, 0, 7513, 103, 2}, // WRITE_CSR |
| 1242 | {2, 2, 0, 0, 0, 7533, 0, 4}, // WSLA |
| 1243 | {2, 2, 0, 0, 0, 7548, 0, 4}, // WSLL |
| 1244 | {2, 2, 0, 0, 0, 7563, 412, 4}, // WSUB |
| 1245 | {2, 4, 0, 0, 0, 7578, 7, 6}, // WSUBA |
| 1246 | {2, 4, 0, 0, 0, 7594, 7, 6}, // WSUBAU |
| 1247 | {2, 2, 0, 0, 0, 7611, 412, 4}, // WSUBU |
| 1248 | {1, 5, 0, 0, 3, 7627, 382, 8}, // XOR_VL |
| 1249 | {1, 1, 0, 0, 0, 7644, 352, 2}, // ZIP |
| 1250 | }; |
| 1251 | |
| 1252 | static const SDNodeInfo RISCVGenSDNodeInfo( |
| 1253 | /*NumOpcodes=*/368, RISCVSDNodeDescs, RISCVSDNodeNames, |
| 1254 | RISCVVTByHwModeTable, RISCVSDTypeConstraints); |
| 1255 | |
| 1256 | } // namespace llvm |
| 1257 | |
| 1258 | #endif // GET_SDNODE_DESC |
| 1259 | |
| 1260 | |