1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target SDNode descriptions *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: RISCV.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10#ifdef GET_SDNODE_ENUM
11#undef GET_SDNODE_ENUM
12
13namespace llvm::RISCVISD {
14
15enum GenNodeType : unsigned {
16 ABDS_VL = ISD::BUILTIN_OP_END,
17 ABDU_VL,
18 ABSW,
19 ADDD,
20 ADD_LO,
21 ADD_TPREL,
22 ADD_VL,
23 AND_VL,
24 ASUB,
25 ASUBU,
26 AVGCEILS_VL,
27 AVGCEILU_VL,
28 AVGFLOORS_VL,
29 AVGFLOORU_VL,
30 BITREVERSE_VL,
31 BREV8,
32 BR_CC,
33 BSWAP_VL,
34 BuildGPRPair,
35 BuildPairF64,
36 BuildPairGPRVec,
37 CALL,
38 CLEAR_CSR,
39 CLMULH_VL,
40 CLMUL_VL,
41 CLSW,
42 CLZW,
43 CTLZ_VL,
44 CTPOP_VL,
45 CTTZ_VL,
46 CTZW,
47 CZERO_EQZ,
48 CZERO_NEZ,
49 DIVUW,
50 DIVW,
51 FABS_VL,
52 FADD_VL,
53 FCLASS,
54 FCLASS_VL,
55 FCOPYSIGN_VL,
56 FCVT_WU_RV64,
57 FCVT_W_RV64,
58 FCVT_X,
59 FCVT_XU,
60 FDIV_VL,
61 FLI,
62 FMAX,
63 FMIN,
64 FMUL_VL,
65 FMV_H_X,
66 FMV_W_X_RV64,
67 FMV_X_ANYEXTH,
68 FMV_X_ANYEXTW_RV64,
69 FMV_X_SIGNEXTH,
70 FNEG_VL,
71 FP_EXTEND_VL,
72 FP_ROUND_VL,
73 FROUND,
74 FSGNJX,
75 FSQRT_VL,
76 FSUB_VL,
77 HI,
78 LD_RV32,
79 LLA,
80 LPAD_CALL,
81 LPAD_CALL_INDIRECT,
82 MERGE,
83 MHACC,
84 MHACCSU,
85 MHACCSU_H_B0,
86 MHACCSU_H_B1,
87 MHACCSU_W_H0,
88 MHACCSU_W_H1,
89 MHACCU,
90 MHACC_H_B0,
91 MHACC_H_B1,
92 MHACC_W_H0,
93 MHACC_W_H1,
94 MHRACC,
95 MHRACCSU,
96 MHRACCU,
97 MNRET_GLUE,
98 MOP_R,
99 MOP_RR,
100 MQACC_00,
101 MQACC_01,
102 MQACC_11,
103 MQRACC_00,
104 MQRACC_01,
105 MQRACC_11,
106 MQRWACC,
107 MQWACC,
108 MRET_GLUE,
109 MULHR,
110 MULHRSU,
111 MULHRU,
112 MULHSU,
113 MULHSU_H0,
114 MULHSU_H1,
115 MULHS_VL,
116 MULHU_VL,
117 MULH_H0,
118 MULH_H1,
119 MULQ,
120 MULQR,
121 MUL_VL,
122 NCLIP,
123 NCLIPU,
124 NDS_FMV_BF16_X,
125 NDS_FMV_X_ANYEXTBF16,
126 NEGW_MAX,
127 NSRA,
128 NSRL,
129 ORC_B,
130 OR_VL,
131 PM2ADD,
132 PM2ADDAU_H,
133 PM2ADDA_H,
134 PM2ADDSU,
135 PM2ADDU,
136 PM2ADDU_H,
137 PM2ADD_H,
138 PM2ADD_X,
139 PM2SADD,
140 PM2SADD_X,
141 PM2SUB,
142 PM2SUBA_H,
143 PM2SUB_H,
144 PM2SUB_X,
145 PM2WADD,
146 PM2WADDA,
147 PM2WADDASU,
148 PM2WADDAU,
149 PM2WADDSU,
150 PM2WADDU,
151 PM4ADD,
152 PM4ADDSU,
153 PM4ADDU,
154 PMACCSU_HALVES_00,
155 PMACCSU_HALVES_11,
156 PMACCU_HALVES_00,
157 PMACCU_HALVES_01,
158 PMACCU_HALVES_11,
159 PMACC_HALVES_00,
160 PMACC_HALVES_01,
161 PMACC_HALVES_11,
162 PMQ2ADD,
163 PMQACC_W_H00,
164 PMQACC_W_H01,
165 PMQACC_W_H11,
166 PMQR2ADD,
167 PMQRACC_W_H00,
168 PMQRACC_W_H01,
169 PMQRACC_W_H11,
170 PMQRWACC_H,
171 PMQWACC_H,
172 PMULHSU_H_B0,
173 PMULHSU_H_B1,
174 PMULHSU_W_H0,
175 PMULHSU_W_H1,
176 PMULH_H_B0,
177 PMULH_H_B1,
178 PMULH_W_H0,
179 PMULH_W_H1,
180 PMULSU_HALVES_00,
181 PMULSU_HALVES_11,
182 PMULU_HALVES_00,
183 PMULU_HALVES_01,
184 PMULU_HALVES_11,
185 PMUL_HALVES_00,
186 PMUL_HALVES_01,
187 PMUL_HALVES_11,
188 PNCLIP,
189 PNCLIPP,
190 PNCLIPU,
191 PNCLIPUP,
192 PNSRA,
193 PNSRAR,
194 PNSRL,
195 PPAIRE,
196 PPAIREO,
197 PPAIRO,
198 PPAIROE,
199 PPAIROE_H,
200 PROBED_ALLOCA,
201 PSABS,
202 PSLL,
203 PSRA,
204 PSRL,
205 PSSHA,
206 PSSHAR,
207 PSSHL,
208 PSSHLR,
209 PUNZIPE,
210 PUNZIPO,
211 PWMUL,
212 PWMULSU,
213 PWMULU,
214 PWSLA,
215 PWSLL,
216 PWZIP,
217 PZIP,
218 QC_C_MILEAVERET_GLUE,
219 QC_E_LI,
220 QC_INSB,
221 QC_MULIADD,
222 QC_SETWMI,
223 READ_COUNTER_WIDE,
224 READ_CSR,
225 READ_VLENB,
226 REMUW,
227 RET_GLUE,
228 ROLW,
229 RORW,
230 ROTL_VL,
231 ROTR_VL,
232 SADDSAT_VL,
233 SATI,
234 SDIV_VL,
235 SD_RV32,
236 SELECT_CC,
237 SETCC_VL,
238 SET_CSR,
239 SF_VC_FVV_SE,
240 SF_VC_FVW_SE,
241 SF_VC_FV_SE,
242 SF_VC_IVV_SE,
243 SF_VC_IVW_SE,
244 SF_VC_IV_SE,
245 SF_VC_VVV_SE,
246 SF_VC_VVW_SE,
247 SF_VC_VV_SE,
248 SF_VC_V_FVV_SE,
249 SF_VC_V_FVW_SE,
250 SF_VC_V_FV_SE,
251 SF_VC_V_IVV_SE,
252 SF_VC_V_IVW_SE,
253 SF_VC_V_IV_SE,
254 SF_VC_V_I_SE,
255 SF_VC_V_VVV_SE,
256 SF_VC_V_VVW_SE,
257 SF_VC_V_VV_SE,
258 SF_VC_V_XVV_SE,
259 SF_VC_V_XVW_SE,
260 SF_VC_V_XV_SE,
261 SF_VC_V_X_SE,
262 SF_VC_XVV_SE,
263 SF_VC_XVW_SE,
264 SF_VC_XV_SE,
265 SHA256SIG0,
266 SHA256SIG1,
267 SHA256SUM0,
268 SHA256SUM1,
269 SHL_ADD,
270 SHL_VL,
271 SINT_TO_FP_VL,
272 SLLW,
273 SM3P0,
274 SM3P1,
275 SM4ED,
276 SM4KS,
277 SMAX_VL,
278 SMIN_VL,
279 SPLAT_VECTOR_SPLIT_I64_VL,
280 SRAW,
281 SRA_VL,
282 SREM_VL,
283 SRET_GLUE,
284 SRLW,
285 SRL_VL,
286 SSUBSAT_VL,
287 STRICT_FADD_VL,
288 STRICT_FCVT_WU_RV64,
289 STRICT_FCVT_W_RV64,
290 STRICT_FDIV_VL,
291 STRICT_FMUL_VL,
292 STRICT_FP_EXTEND_VL,
293 STRICT_FP_ROUND_VL,
294 STRICT_FSETCCS_VL,
295 STRICT_FSETCC_VL,
296 STRICT_FSQRT_VL,
297 STRICT_FSUB_VL,
298 STRICT_SINT_TO_FP_VL,
299 STRICT_UINT_TO_FP_VL,
300 STRICT_VFCVT_RM_X_F_VL,
301 STRICT_VFCVT_RTZ_XU_F_VL,
302 STRICT_VFCVT_RTZ_X_F_VL,
303 STRICT_VFMADD_VL,
304 STRICT_VFMSUB_VL,
305 STRICT_VFNCVT_ROD_VL,
306 STRICT_VFNMADD_VL,
307 STRICT_VFNMSUB_VL,
308 STRICT_VFROUND_NOEXCEPT_VL,
309 SUBD,
310 SUB_VL,
311 SWAP_CSR,
312 SW_GUARDED_BRIND,
313 SW_GUARDED_CALL,
314 SW_GUARDED_TAIL,
315 SplitF64,
316 SplitGPRPair,
317 SplitGPRVec,
318 TAIL,
319 TH_LDD,
320 TH_LWD,
321 TH_LWUD,
322 TH_SDD,
323 TH_SWD,
324 TRUNCATE_VECTOR_VL,
325 TRUNCATE_VECTOR_VL_SSAT,
326 TRUNCATE_VECTOR_VL_USAT,
327 TUPLE_CAST,
328 TUPLE_EXTRACT,
329 TUPLE_INSERT,
330 UADDSAT_VL,
331 UDIV_VL,
332 UINT_TO_FP_VL,
333 UMAX_VL,
334 UMIN_VL,
335 UNZIP,
336 UREM_VL,
337 USATI,
338 USUBSAT_VL,
339 VCPOP_VL,
340 VDOT4ASU_VL,
341 VDOT4AU_VL,
342 VDOT4A_VL,
343 VECREDUCE_ADD_VL,
344 VECREDUCE_AND_VL,
345 VECREDUCE_FADD_VL,
346 VECREDUCE_FMAX_VL,
347 VECREDUCE_FMIN_VL,
348 VECREDUCE_OR_VL,
349 VECREDUCE_SEQ_FADD_VL,
350 VECREDUCE_SMAX_VL,
351 VECREDUCE_SMIN_VL,
352 VECREDUCE_UMAX_VL,
353 VECREDUCE_UMIN_VL,
354 VECREDUCE_XOR_VL,
355 VFCVT_RM_F_XU_VL,
356 VFCVT_RM_F_X_VL,
357 VFCVT_RM_XU_F_VL,
358 VFCVT_RM_X_F_VL,
359 VFCVT_RTZ_XU_F_VL,
360 VFCVT_RTZ_X_F_VL,
361 VFIRST_VL,
362 VFMADD_VL,
363 VFMAX_VL,
364 VFMIN_VL,
365 VFMSUB_VL,
366 VFMV_S_F_VL,
367 VFMV_V_F_VL,
368 VFNCVT_ROD_VL,
369 VFNMADD_VL,
370 VFNMSUB_VL,
371 VFROUND_NOEXCEPT_VL,
372 VFSLIDE1DOWN_VL,
373 VFSLIDE1UP_VL,
374 VFWADD_VL,
375 VFWADD_W_VL,
376 VFWMADD_VL,
377 VFWMSUB_VL,
378 VFWMUL_VL,
379 VFWNMADD_VL,
380 VFWNMSUB_VL,
381 VFWSUB_VL,
382 VFWSUB_W_VL,
383 VID_VL,
384 VMAND_VL,
385 VMCLR_VL,
386 VMERGE_VL,
387 VMOR_VL,
388 VMSET_VL,
389 VMV_S_X_VL,
390 VMV_V_V_VL,
391 VMV_V_X_VL,
392 VMV_X_S,
393 VMXOR_VL,
394 VPAIRE_VL,
395 VPAIRO_VL,
396 VRGATHEREI16_VV_VL,
397 VRGATHER_VV_VL,
398 VRGATHER_VX_VL,
399 VSEXT_VL,
400 VSLIDE1DOWN_VL,
401 VSLIDE1UP_VL,
402 VSLIDEDOWN_VL,
403 VSLIDEUP_VL,
404 VUNZIPE_VL,
405 VUNZIPO_VL,
406 VWABDAU_VL,
407 VWABDA_VL,
408 VWADDU_VL,
409 VWADDU_W_VL,
410 VWADD_VL,
411 VWADD_W_VL,
412 VWMACCSU_VL,
413 VWMACCU_VL,
414 VWMACC_VL,
415 VWMULSU_VL,
416 VWMULU_VL,
417 VWMUL_VL,
418 VWSLL_VL,
419 VWSUBU_VL,
420 VWSUBU_W_VL,
421 VWSUB_VL,
422 VWSUB_W_VL,
423 VZEXT_VL,
424 VZIP_VL,
425 WADD,
426 WADDA,
427 WADDAU,
428 WADDU,
429 WMACC,
430 WMACCSU,
431 WMACCU,
432 WMULSU,
433 WRITE_CSR,
434 WSLA,
435 WSLL,
436 WSUB,
437 WSUBA,
438 WSUBAU,
439 WSUBU,
440 XOR_VL,
441 ZIP,
442};
443
444static constexpr unsigned GENERATED_OPCODE_END = ZIP + 1;
445
446} // namespace llvm::RISCVISD
447
448#endif // GET_SDNODE_ENUM
449
450#ifdef GET_SDNODE_DESC
451#undef GET_SDNODE_DESC
452
453namespace llvm {
454
455
456#ifdef __GNUC__
457#pragma GCC diagnostic push
458#pragma GCC diagnostic ignored "-Woverlength-strings"
459#endif
460static constexpr char RISCVSDNodeNamesStorage[] =
461 "\0"
462 "RISCVISD::ABDS_VL\0"
463 "RISCVISD::ABDU_VL\0"
464 "RISCVISD::ABSW\0"
465 "RISCVISD::ADDD\0"
466 "RISCVISD::ADD_LO\0"
467 "RISCVISD::ADD_TPREL\0"
468 "RISCVISD::ADD_VL\0"
469 "RISCVISD::AND_VL\0"
470 "RISCVISD::ASUB\0"
471 "RISCVISD::ASUBU\0"
472 "RISCVISD::AVGCEILS_VL\0"
473 "RISCVISD::AVGCEILU_VL\0"
474 "RISCVISD::AVGFLOORS_VL\0"
475 "RISCVISD::AVGFLOORU_VL\0"
476 "RISCVISD::BITREVERSE_VL\0"
477 "RISCVISD::BREV8\0"
478 "RISCVISD::BR_CC\0"
479 "RISCVISD::BSWAP_VL\0"
480 "RISCVISD::BuildGPRPair\0"
481 "RISCVISD::BuildPairF64\0"
482 "RISCVISD::BuildPairGPRVec\0"
483 "RISCVISD::CALL\0"
484 "RISCVISD::CLEAR_CSR\0"
485 "RISCVISD::CLMULH_VL\0"
486 "RISCVISD::CLMUL_VL\0"
487 "RISCVISD::CLSW\0"
488 "RISCVISD::CLZW\0"
489 "RISCVISD::CTLZ_VL\0"
490 "RISCVISD::CTPOP_VL\0"
491 "RISCVISD::CTTZ_VL\0"
492 "RISCVISD::CTZW\0"
493 "RISCVISD::CZERO_EQZ\0"
494 "RISCVISD::CZERO_NEZ\0"
495 "RISCVISD::DIVUW\0"
496 "RISCVISD::DIVW\0"
497 "RISCVISD::FABS_VL\0"
498 "RISCVISD::FADD_VL\0"
499 "RISCVISD::FCLASS\0"
500 "RISCVISD::FCLASS_VL\0"
501 "RISCVISD::FCOPYSIGN_VL\0"
502 "RISCVISD::FCVT_WU_RV64\0"
503 "RISCVISD::FCVT_W_RV64\0"
504 "RISCVISD::FCVT_X\0"
505 "RISCVISD::FCVT_XU\0"
506 "RISCVISD::FDIV_VL\0"
507 "RISCVISD::FLI\0"
508 "RISCVISD::FMAX\0"
509 "RISCVISD::FMIN\0"
510 "RISCVISD::FMUL_VL\0"
511 "RISCVISD::FMV_H_X\0"
512 "RISCVISD::FMV_W_X_RV64\0"
513 "RISCVISD::FMV_X_ANYEXTH\0"
514 "RISCVISD::FMV_X_ANYEXTW_RV64\0"
515 "RISCVISD::FMV_X_SIGNEXTH\0"
516 "RISCVISD::FNEG_VL\0"
517 "RISCVISD::FP_EXTEND_VL\0"
518 "RISCVISD::FP_ROUND_VL\0"
519 "RISCVISD::FROUND\0"
520 "RISCVISD::FSGNJX\0"
521 "RISCVISD::FSQRT_VL\0"
522 "RISCVISD::FSUB_VL\0"
523 "RISCVISD::HI\0"
524 "RISCVISD::LD_RV32\0"
525 "RISCVISD::LLA\0"
526 "RISCVISD::LPAD_CALL\0"
527 "RISCVISD::LPAD_CALL_INDIRECT\0"
528 "RISCVISD::MERGE\0"
529 "RISCVISD::MHACC\0"
530 "RISCVISD::MHACCSU\0"
531 "RISCVISD::MHACCSU_H_B0\0"
532 "RISCVISD::MHACCSU_H_B1\0"
533 "RISCVISD::MHACCSU_W_H0\0"
534 "RISCVISD::MHACCSU_W_H1\0"
535 "RISCVISD::MHACCU\0"
536 "RISCVISD::MHACC_H_B0\0"
537 "RISCVISD::MHACC_H_B1\0"
538 "RISCVISD::MHACC_W_H0\0"
539 "RISCVISD::MHACC_W_H1\0"
540 "RISCVISD::MHRACC\0"
541 "RISCVISD::MHRACCSU\0"
542 "RISCVISD::MHRACCU\0"
543 "RISCVISD::MNRET_GLUE\0"
544 "RISCVISD::MOP_R\0"
545 "RISCVISD::MOP_RR\0"
546 "RISCVISD::MQACC_00\0"
547 "RISCVISD::MQACC_01\0"
548 "RISCVISD::MQACC_11\0"
549 "RISCVISD::MQRACC_00\0"
550 "RISCVISD::MQRACC_01\0"
551 "RISCVISD::MQRACC_11\0"
552 "RISCVISD::MQRWACC\0"
553 "RISCVISD::MQWACC\0"
554 "RISCVISD::MRET_GLUE\0"
555 "RISCVISD::MULHR\0"
556 "RISCVISD::MULHRSU\0"
557 "RISCVISD::MULHRU\0"
558 "RISCVISD::MULHSU\0"
559 "RISCVISD::MULHSU_H0\0"
560 "RISCVISD::MULHSU_H1\0"
561 "RISCVISD::MULHS_VL\0"
562 "RISCVISD::MULHU_VL\0"
563 "RISCVISD::MULH_H0\0"
564 "RISCVISD::MULH_H1\0"
565 "RISCVISD::MULQ\0"
566 "RISCVISD::MULQR\0"
567 "RISCVISD::MUL_VL\0"
568 "RISCVISD::NCLIP\0"
569 "RISCVISD::NCLIPU\0"
570 "RISCVISD::NDS_FMV_BF16_X\0"
571 "RISCVISD::NDS_FMV_X_ANYEXTBF16\0"
572 "RISCVISD::NEGW_MAX\0"
573 "RISCVISD::NSRA\0"
574 "RISCVISD::NSRL\0"
575 "RISCVISD::ORC_B\0"
576 "RISCVISD::OR_VL\0"
577 "RISCVISD::PM2ADD\0"
578 "RISCVISD::PM2ADDAU_H\0"
579 "RISCVISD::PM2ADDA_H\0"
580 "RISCVISD::PM2ADDSU\0"
581 "RISCVISD::PM2ADDU\0"
582 "RISCVISD::PM2ADDU_H\0"
583 "RISCVISD::PM2ADD_H\0"
584 "RISCVISD::PM2ADD_X\0"
585 "RISCVISD::PM2SADD\0"
586 "RISCVISD::PM2SADD_X\0"
587 "RISCVISD::PM2SUB\0"
588 "RISCVISD::PM2SUBA_H\0"
589 "RISCVISD::PM2SUB_H\0"
590 "RISCVISD::PM2SUB_X\0"
591 "RISCVISD::PM2WADD\0"
592 "RISCVISD::PM2WADDA\0"
593 "RISCVISD::PM2WADDASU\0"
594 "RISCVISD::PM2WADDAU\0"
595 "RISCVISD::PM2WADDSU\0"
596 "RISCVISD::PM2WADDU\0"
597 "RISCVISD::PM4ADD\0"
598 "RISCVISD::PM4ADDSU\0"
599 "RISCVISD::PM4ADDU\0"
600 "RISCVISD::PMACCSU_HALVES_00\0"
601 "RISCVISD::PMACCSU_HALVES_11\0"
602 "RISCVISD::PMACCU_HALVES_00\0"
603 "RISCVISD::PMACCU_HALVES_01\0"
604 "RISCVISD::PMACCU_HALVES_11\0"
605 "RISCVISD::PMACC_HALVES_00\0"
606 "RISCVISD::PMACC_HALVES_01\0"
607 "RISCVISD::PMACC_HALVES_11\0"
608 "RISCVISD::PMQ2ADD\0"
609 "RISCVISD::PMQACC_W_H00\0"
610 "RISCVISD::PMQACC_W_H01\0"
611 "RISCVISD::PMQACC_W_H11\0"
612 "RISCVISD::PMQR2ADD\0"
613 "RISCVISD::PMQRACC_W_H00\0"
614 "RISCVISD::PMQRACC_W_H01\0"
615 "RISCVISD::PMQRACC_W_H11\0"
616 "RISCVISD::PMQRWACC_H\0"
617 "RISCVISD::PMQWACC_H\0"
618 "RISCVISD::PMULHSU_H_B0\0"
619 "RISCVISD::PMULHSU_H_B1\0"
620 "RISCVISD::PMULHSU_W_H0\0"
621 "RISCVISD::PMULHSU_W_H1\0"
622 "RISCVISD::PMULH_H_B0\0"
623 "RISCVISD::PMULH_H_B1\0"
624 "RISCVISD::PMULH_W_H0\0"
625 "RISCVISD::PMULH_W_H1\0"
626 "RISCVISD::PMULSU_HALVES_00\0"
627 "RISCVISD::PMULSU_HALVES_11\0"
628 "RISCVISD::PMULU_HALVES_00\0"
629 "RISCVISD::PMULU_HALVES_01\0"
630 "RISCVISD::PMULU_HALVES_11\0"
631 "RISCVISD::PMUL_HALVES_00\0"
632 "RISCVISD::PMUL_HALVES_01\0"
633 "RISCVISD::PMUL_HALVES_11\0"
634 "RISCVISD::PNCLIP\0"
635 "RISCVISD::PNCLIPP\0"
636 "RISCVISD::PNCLIPU\0"
637 "RISCVISD::PNCLIPUP\0"
638 "RISCVISD::PNSRA\0"
639 "RISCVISD::PNSRAR\0"
640 "RISCVISD::PNSRL\0"
641 "RISCVISD::PPAIRE\0"
642 "RISCVISD::PPAIREO\0"
643 "RISCVISD::PPAIRO\0"
644 "RISCVISD::PPAIROE\0"
645 "RISCVISD::PPAIROE_H\0"
646 "RISCVISD::PROBED_ALLOCA\0"
647 "RISCVISD::PSABS\0"
648 "RISCVISD::PSLL\0"
649 "RISCVISD::PSRA\0"
650 "RISCVISD::PSRL\0"
651 "RISCVISD::PSSHA\0"
652 "RISCVISD::PSSHAR\0"
653 "RISCVISD::PSSHL\0"
654 "RISCVISD::PSSHLR\0"
655 "RISCVISD::PUNZIPE\0"
656 "RISCVISD::PUNZIPO\0"
657 "RISCVISD::PWMUL\0"
658 "RISCVISD::PWMULSU\0"
659 "RISCVISD::PWMULU\0"
660 "RISCVISD::PWSLA\0"
661 "RISCVISD::PWSLL\0"
662 "RISCVISD::PWZIP\0"
663 "RISCVISD::PZIP\0"
664 "RISCVISD::QC_C_MILEAVERET_GLUE\0"
665 "RISCVISD::QC_E_LI\0"
666 "RISCVISD::QC_INSB\0"
667 "RISCVISD::QC_MULIADD\0"
668 "RISCVISD::QC_SETWMI\0"
669 "RISCVISD::READ_COUNTER_WIDE\0"
670 "RISCVISD::READ_CSR\0"
671 "RISCVISD::READ_VLENB\0"
672 "RISCVISD::REMUW\0"
673 "RISCVISD::RET_GLUE\0"
674 "RISCVISD::ROLW\0"
675 "RISCVISD::RORW\0"
676 "RISCVISD::ROTL_VL\0"
677 "RISCVISD::ROTR_VL\0"
678 "RISCVISD::SADDSAT_VL\0"
679 "RISCVISD::SATI\0"
680 "RISCVISD::SDIV_VL\0"
681 "RISCVISD::SD_RV32\0"
682 "RISCVISD::SELECT_CC\0"
683 "RISCVISD::SETCC_VL\0"
684 "RISCVISD::SET_CSR\0"
685 "RISCVISD::SF_VC_FVV_SE\0"
686 "RISCVISD::SF_VC_FVW_SE\0"
687 "RISCVISD::SF_VC_FV_SE\0"
688 "RISCVISD::SF_VC_IVV_SE\0"
689 "RISCVISD::SF_VC_IVW_SE\0"
690 "RISCVISD::SF_VC_IV_SE\0"
691 "RISCVISD::SF_VC_VVV_SE\0"
692 "RISCVISD::SF_VC_VVW_SE\0"
693 "RISCVISD::SF_VC_VV_SE\0"
694 "RISCVISD::SF_VC_V_FVV_SE\0"
695 "RISCVISD::SF_VC_V_FVW_SE\0"
696 "RISCVISD::SF_VC_V_FV_SE\0"
697 "RISCVISD::SF_VC_V_IVV_SE\0"
698 "RISCVISD::SF_VC_V_IVW_SE\0"
699 "RISCVISD::SF_VC_V_IV_SE\0"
700 "RISCVISD::SF_VC_V_I_SE\0"
701 "RISCVISD::SF_VC_V_VVV_SE\0"
702 "RISCVISD::SF_VC_V_VVW_SE\0"
703 "RISCVISD::SF_VC_V_VV_SE\0"
704 "RISCVISD::SF_VC_V_XVV_SE\0"
705 "RISCVISD::SF_VC_V_XVW_SE\0"
706 "RISCVISD::SF_VC_V_XV_SE\0"
707 "RISCVISD::SF_VC_V_X_SE\0"
708 "RISCVISD::SF_VC_XVV_SE\0"
709 "RISCVISD::SF_VC_XVW_SE\0"
710 "RISCVISD::SF_VC_XV_SE\0"
711 "RISCVISD::SHA256SIG0\0"
712 "RISCVISD::SHA256SIG1\0"
713 "RISCVISD::SHA256SUM0\0"
714 "RISCVISD::SHA256SUM1\0"
715 "RISCVISD::SHL_ADD\0"
716 "RISCVISD::SHL_VL\0"
717 "RISCVISD::SINT_TO_FP_VL\0"
718 "RISCVISD::SLLW\0"
719 "RISCVISD::SM3P0\0"
720 "RISCVISD::SM3P1\0"
721 "RISCVISD::SM4ED\0"
722 "RISCVISD::SM4KS\0"
723 "RISCVISD::SMAX_VL\0"
724 "RISCVISD::SMIN_VL\0"
725 "RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL\0"
726 "RISCVISD::SRAW\0"
727 "RISCVISD::SRA_VL\0"
728 "RISCVISD::SREM_VL\0"
729 "RISCVISD::SRET_GLUE\0"
730 "RISCVISD::SRLW\0"
731 "RISCVISD::SRL_VL\0"
732 "RISCVISD::SSUBSAT_VL\0"
733 "RISCVISD::STRICT_FADD_VL\0"
734 "RISCVISD::STRICT_FCVT_WU_RV64\0"
735 "RISCVISD::STRICT_FCVT_W_RV64\0"
736 "RISCVISD::STRICT_FDIV_VL\0"
737 "RISCVISD::STRICT_FMUL_VL\0"
738 "RISCVISD::STRICT_FP_EXTEND_VL\0"
739 "RISCVISD::STRICT_FP_ROUND_VL\0"
740 "RISCVISD::STRICT_FSETCCS_VL\0"
741 "RISCVISD::STRICT_FSETCC_VL\0"
742 "RISCVISD::STRICT_FSQRT_VL\0"
743 "RISCVISD::STRICT_FSUB_VL\0"
744 "RISCVISD::STRICT_SINT_TO_FP_VL\0"
745 "RISCVISD::STRICT_UINT_TO_FP_VL\0"
746 "RISCVISD::STRICT_VFCVT_RM_X_F_VL\0"
747 "RISCVISD::STRICT_VFCVT_RTZ_XU_F_VL\0"
748 "RISCVISD::STRICT_VFCVT_RTZ_X_F_VL\0"
749 "RISCVISD::STRICT_VFMADD_VL\0"
750 "RISCVISD::STRICT_VFMSUB_VL\0"
751 "RISCVISD::STRICT_VFNCVT_ROD_VL\0"
752 "RISCVISD::STRICT_VFNMADD_VL\0"
753 "RISCVISD::STRICT_VFNMSUB_VL\0"
754 "RISCVISD::STRICT_VFROUND_NOEXCEPT_VL\0"
755 "RISCVISD::SUBD\0"
756 "RISCVISD::SUB_VL\0"
757 "RISCVISD::SWAP_CSR\0"
758 "RISCVISD::SW_GUARDED_BRIND\0"
759 "RISCVISD::SW_GUARDED_CALL\0"
760 "RISCVISD::SW_GUARDED_TAIL\0"
761 "RISCVISD::SplitF64\0"
762 "RISCVISD::SplitGPRPair\0"
763 "RISCVISD::SplitGPRVec\0"
764 "RISCVISD::TAIL\0"
765 "RISCVISD::TH_LDD\0"
766 "RISCVISD::TH_LWD\0"
767 "RISCVISD::TH_LWUD\0"
768 "RISCVISD::TH_SDD\0"
769 "RISCVISD::TH_SWD\0"
770 "RISCVISD::TRUNCATE_VECTOR_VL\0"
771 "RISCVISD::TRUNCATE_VECTOR_VL_SSAT\0"
772 "RISCVISD::TRUNCATE_VECTOR_VL_USAT\0"
773 "RISCVISD::TUPLE_CAST\0"
774 "RISCVISD::TUPLE_EXTRACT\0"
775 "RISCVISD::TUPLE_INSERT\0"
776 "RISCVISD::UADDSAT_VL\0"
777 "RISCVISD::UDIV_VL\0"
778 "RISCVISD::UINT_TO_FP_VL\0"
779 "RISCVISD::UMAX_VL\0"
780 "RISCVISD::UMIN_VL\0"
781 "RISCVISD::UNZIP\0"
782 "RISCVISD::UREM_VL\0"
783 "RISCVISD::USATI\0"
784 "RISCVISD::USUBSAT_VL\0"
785 "RISCVISD::VCPOP_VL\0"
786 "RISCVISD::VDOT4ASU_VL\0"
787 "RISCVISD::VDOT4AU_VL\0"
788 "RISCVISD::VDOT4A_VL\0"
789 "RISCVISD::VECREDUCE_ADD_VL\0"
790 "RISCVISD::VECREDUCE_AND_VL\0"
791 "RISCVISD::VECREDUCE_FADD_VL\0"
792 "RISCVISD::VECREDUCE_FMAX_VL\0"
793 "RISCVISD::VECREDUCE_FMIN_VL\0"
794 "RISCVISD::VECREDUCE_OR_VL\0"
795 "RISCVISD::VECREDUCE_SEQ_FADD_VL\0"
796 "RISCVISD::VECREDUCE_SMAX_VL\0"
797 "RISCVISD::VECREDUCE_SMIN_VL\0"
798 "RISCVISD::VECREDUCE_UMAX_VL\0"
799 "RISCVISD::VECREDUCE_UMIN_VL\0"
800 "RISCVISD::VECREDUCE_XOR_VL\0"
801 "RISCVISD::VFCVT_RM_F_XU_VL\0"
802 "RISCVISD::VFCVT_RM_F_X_VL\0"
803 "RISCVISD::VFCVT_RM_XU_F_VL\0"
804 "RISCVISD::VFCVT_RM_X_F_VL\0"
805 "RISCVISD::VFCVT_RTZ_XU_F_VL\0"
806 "RISCVISD::VFCVT_RTZ_X_F_VL\0"
807 "RISCVISD::VFIRST_VL\0"
808 "RISCVISD::VFMADD_VL\0"
809 "RISCVISD::VFMAX_VL\0"
810 "RISCVISD::VFMIN_VL\0"
811 "RISCVISD::VFMSUB_VL\0"
812 "RISCVISD::VFMV_S_F_VL\0"
813 "RISCVISD::VFMV_V_F_VL\0"
814 "RISCVISD::VFNCVT_ROD_VL\0"
815 "RISCVISD::VFNMADD_VL\0"
816 "RISCVISD::VFNMSUB_VL\0"
817 "RISCVISD::VFROUND_NOEXCEPT_VL\0"
818 "RISCVISD::VFSLIDE1DOWN_VL\0"
819 "RISCVISD::VFSLIDE1UP_VL\0"
820 "RISCVISD::VFWADD_VL\0"
821 "RISCVISD::VFWADD_W_VL\0"
822 "RISCVISD::VFWMADD_VL\0"
823 "RISCVISD::VFWMSUB_VL\0"
824 "RISCVISD::VFWMUL_VL\0"
825 "RISCVISD::VFWNMADD_VL\0"
826 "RISCVISD::VFWNMSUB_VL\0"
827 "RISCVISD::VFWSUB_VL\0"
828 "RISCVISD::VFWSUB_W_VL\0"
829 "RISCVISD::VID_VL\0"
830 "RISCVISD::VMAND_VL\0"
831 "RISCVISD::VMCLR_VL\0"
832 "RISCVISD::VMERGE_VL\0"
833 "RISCVISD::VMOR_VL\0"
834 "RISCVISD::VMSET_VL\0"
835 "RISCVISD::VMV_S_X_VL\0"
836 "RISCVISD::VMV_V_V_VL\0"
837 "RISCVISD::VMV_V_X_VL\0"
838 "RISCVISD::VMV_X_S\0"
839 "RISCVISD::VMXOR_VL\0"
840 "RISCVISD::VPAIRE_VL\0"
841 "RISCVISD::VPAIRO_VL\0"
842 "RISCVISD::VRGATHEREI16_VV_VL\0"
843 "RISCVISD::VRGATHER_VV_VL\0"
844 "RISCVISD::VRGATHER_VX_VL\0"
845 "RISCVISD::VSEXT_VL\0"
846 "RISCVISD::VSLIDE1DOWN_VL\0"
847 "RISCVISD::VSLIDE1UP_VL\0"
848 "RISCVISD::VSLIDEDOWN_VL\0"
849 "RISCVISD::VSLIDEUP_VL\0"
850 "RISCVISD::VUNZIPE_VL\0"
851 "RISCVISD::VUNZIPO_VL\0"
852 "RISCVISD::VWABDAU_VL\0"
853 "RISCVISD::VWABDA_VL\0"
854 "RISCVISD::VWADDU_VL\0"
855 "RISCVISD::VWADDU_W_VL\0"
856 "RISCVISD::VWADD_VL\0"
857 "RISCVISD::VWADD_W_VL\0"
858 "RISCVISD::VWMACCSU_VL\0"
859 "RISCVISD::VWMACCU_VL\0"
860 "RISCVISD::VWMACC_VL\0"
861 "RISCVISD::VWMULSU_VL\0"
862 "RISCVISD::VWMULU_VL\0"
863 "RISCVISD::VWMUL_VL\0"
864 "RISCVISD::VWSLL_VL\0"
865 "RISCVISD::VWSUBU_VL\0"
866 "RISCVISD::VWSUBU_W_VL\0"
867 "RISCVISD::VWSUB_VL\0"
868 "RISCVISD::VWSUB_W_VL\0"
869 "RISCVISD::VZEXT_VL\0"
870 "RISCVISD::VZIP_VL\0"
871 "RISCVISD::WADD\0"
872 "RISCVISD::WADDA\0"
873 "RISCVISD::WADDAU\0"
874 "RISCVISD::WADDU\0"
875 "RISCVISD::WMACC\0"
876 "RISCVISD::WMACCSU\0"
877 "RISCVISD::WMACCU\0"
878 "RISCVISD::WMULSU\0"
879 "RISCVISD::WRITE_CSR\0"
880 "RISCVISD::WSLA\0"
881 "RISCVISD::WSLL\0"
882 "RISCVISD::WSUB\0"
883 "RISCVISD::WSUBA\0"
884 "RISCVISD::WSUBAU\0"
885 "RISCVISD::WSUBU\0"
886 "RISCVISD::XOR_VL\0"
887 "RISCVISD::ZIP\0"
888 ;
889#ifdef __GNUC__
890#pragma GCC diagnostic pop
891#endif
892
893static constexpr llvm::StringTable
894RISCVSDNodeNames = RISCVSDNodeNamesStorage;
895
896static const VTByHwModePair RISCVVTByHwModeTable[] = {
897 /* 0 */ {0, MVT::i32}, {1, MVT::i64},
898 /* 2 */ {0, MVT::v2i16}, {1, MVT::v2i32},
899};
900
901static const SDTypeConstraint RISCVSDTypeConstraints[] = {
902 /* 0 */ {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32},
903 /* 4 */ {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32},
904 /* 7 */ {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
905 /* 13 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
906 /* 19 */ {SDTCisVT, 2, 0, 0, MVT::f64}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
907 /* 22 */ {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
908 /* 25 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
909 /* 29 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
910 /* 33 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
911 /* 37 */ {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 2, 2}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
912 /* 41 */ {SDTCisVT, 2, 0, 0, MVT::Untyped}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
913 /* 44 */ {SDTCisVT, 1, 0, 0, MVT::bf16}, {SDTCisVT, 0, 0, 2, 0},
914 /* 46 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
915 /* 49 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
916 /* 55 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
917 /* 59 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
918 /* 63 */ {SDTCisVT, 1, 0, 0, MVT::f32}, {SDTCisVT, 0, 0, 0, MVT::i64},
919 /* 65 */ {SDTCisVT, 2, 0, 0, MVT::i64}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i64},
920 /* 68 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::bf16},
921 /* 70 */ {SDTCisVT, 1, 0, 0, MVT::i64}, {SDTCisVT, 0, 0, 0, MVT::f32},
922 /* 72 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::f64},
923 /* 75 */ {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 0, MVT::v2i16}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::v2i32},
924 /* 79 */ {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 0, MVT::v4i16}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::v2i32},
925 /* 83 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::v2i16}, {SDTCisVT, 0, 0, 0, MVT::v2i32},
926 /* 86 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::v4i16}, {SDTCisVT, 0, 0, 0, MVT::v2i32},
927 /* 89 */ {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 0, MVT::v4i16}, {SDTCisVT, 1, 0, 0, MVT::v2i32}, {SDTCisVT, 0, 0, 0, MVT::v2i32},
928 /* 93 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::Untyped},
929 /* 96 */ {SDTCisPtrTy, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
930 /* 97 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
931 /* 106 */ {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
932 /* 110 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
933 /* 113 */ {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
934 /* 116 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
935 /* 123 */ {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
936 /* 126 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
937 /* 130 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
938 /* 132 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
939 /* 139 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
940 /* 146 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
941 /* 153 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
942 /* 158 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
943 /* 168 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
944 /* 178 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
945 /* 188 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
946 /* 193 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
947 /* 203 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
948 /* 214 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
949 /* 218 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
950 /* 225 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
951 /* 234 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i16}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
952 /* 243 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i64}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
953 /* 249 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
954 /* 254 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
955 /* 259 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
956 /* 262 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
957 /* 267 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
958 /* 271 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
959 /* 276 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
960 /* 281 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 3, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSubVecOfVec, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
961 /* 288 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
962 /* 296 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
963 /* 301 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSubVecOfVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
964 /* 309 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
965 /* 312 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 2, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
966 /* 320 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
967 /* 328 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisEltOfVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
968 /* 336 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
969 /* 344 */ {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
970 /* 348 */ {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
971 /* 352 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSubVecOfVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
972 /* 355 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
973 /* 359 */ {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
974 /* 361 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
975 /* 363 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
976 /* 367 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
977 /* 371 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
978 /* 377 */ {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
979 /* 381 */ {SDTCisInt, 4, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
980 /* 386 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
981 /* 389 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
982 /* 392 */ {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
983 /* 395 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
984 /* 403 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 3, 0, 0, MVT::i1}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
985 /* 410 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
986 /* 418 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
987 /* 425 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
988 /* 429 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
989 /* 437 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
990 /* 441 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
991 /* 446 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
992 /* 450 */ {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisVT, 2, 0, 0, MVT::Other}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
993 /* 453 */ {SDTCisVT, 0, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
994 /* 457 */ {SDTCisSameSizeAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
995 /* 460 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1},
996 /* 462 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1},
997 /* 470 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
998 /* 472 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
999 /* 475 */ {SDTCisSameAs, 4, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
1000};
1001
1002static const SDNodeDesc RISCVSDNodeDescs[] = {
1003 {1, 5, 0, 0, 3, 1, 395, 8}, // ABDS_VL
1004 {1, 5, 0, 0, 3, 19, 395, 8}, // ABDU_VL
1005 {1, 1, 0, 0, 0, 37, 361, 2}, // ABSW
1006 {2, 4, 0, 0, 0, 52, 13, 6}, // ADDD
1007 {1, 2, 0, 0, 0, 67, 389, 3}, // ADD_LO
1008 {1, 3, 0, 0, 0, 84, 425, 4}, // ADD_TPREL
1009 {1, 5, 0, 0, 3, 104, 395, 8}, // ADD_VL
1010 {1, 5, 0, 0, 3, 121, 395, 8}, // AND_VL
1011 {1, 2, 0, 0, 0, 138, 389, 3}, // ASUB
1012 {1, 2, 0, 0, 0, 153, 389, 3}, // ASUBU
1013 {1, 5, 0, 0, 3, 169, 395, 8}, // AVGCEILS_VL
1014 {1, 5, 0, 0, 3, 191, 395, 8}, // AVGCEILU_VL
1015 {1, 5, 0, 0, 3, 213, 395, 8}, // AVGFLOORS_VL
1016 {1, 5, 0, 0, 3, 236, 395, 8}, // AVGFLOORU_VL
1017 {1, 4, 0, 0, 3, 259, 403, 7}, // BITREVERSE_VL
1018 {1, 1, 0, 0, 0, 283, 365, 2}, // BREV8
1019 {0, 4, 0|1<<SDNPHasChain, 0, 0, 299, 450, 3}, // BR_CC
1020 {1, 4, 0, 0, 3, 315, 403, 7}, // BSWAP_VL
1021 {1, 2, 0, 0, 0, 334, 93, 3}, // BuildGPRPair
1022 {1, 2, 0, 0, 0, 357, 72, 3}, // BuildPairF64
1023 {1, 2, 0, 0, 0, 380, 259, 3}, // BuildPairGPRVec
1024 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 406, 32, 1}, // CALL
1025 {0, 2, 0|1<<SDNPHasChain, 0, 0, 421, 114, 2}, // CLEAR_CSR
1026 {1, 5, 0, 0, 3, 441, 395, 8}, // CLMULH_VL
1027 {1, 5, 0, 0, 3, 461, 395, 8}, // CLMUL_VL
1028 {1, 1, 0, 0, 0, 480, 361, 2}, // CLSW
1029 {1, 1, 0, 0, 0, 495, 361, 2}, // CLZW
1030 {1, 4, 0, 0, 3, 510, 403, 7}, // CTLZ_VL
1031 {1, 4, 0, 0, 3, 528, 403, 7}, // CTPOP_VL
1032 {1, 4, 0, 0, 3, 547, 403, 7}, // CTTZ_VL
1033 {1, 1, 0, 0, 0, 565, 361, 2}, // CTZW
1034 {1, 2, 0, 0, 0, 580, 389, 3}, // CZERO_EQZ
1035 {1, 2, 0, 0, 0, 600, 389, 3}, // CZERO_NEZ
1036 {1, 2, 0, 0, 0, 620, 386, 3}, // DIVUW
1037 {1, 2, 0, 0, 0, 636, 386, 3}, // DIVW
1038 {1, 3, 0, 0, 2, 651, 371, 6}, // FABS_VL
1039 {1, 5, 0, 0, 3, 669, 410, 8}, // FADD_VL
1040 {1, 1, 0, 0, 0, 687, 47, 2}, // FCLASS
1041 {1, 3, 0, 0, 2, 704, 97, 9}, // FCLASS_VL
1042 {1, 5, 0, 0, 3, 724, 410, 8}, // FCOPYSIGN_VL
1043 {1, 2, 0, 0, 0, 747, 65, 3}, // FCVT_WU_RV64
1044 {1, 2, 0, 0, 0, 770, 65, 3}, // FCVT_W_RV64
1045 {1, 2, 0, 0, 0, 792, 46, 3}, // FCVT_X
1046 {1, 2, 0, 0, 0, 809, 46, 3}, // FCVT_XU
1047 {1, 5, 0, 0, 3, 827, 410, 8}, // FDIV_VL
1048 {1, 1, 0, 0, 0, 845, 130, 2}, // FLI
1049 {1, 2, 0, 0, 0, 859, 392, 3}, // FMAX
1050 {1, 2, 0, 0, 0, 874, 392, 3}, // FMIN
1051 {1, 5, 0, 0, 3, 889, 410, 8}, // FMUL_VL
1052 {1, 1, 0, 0, 0, 907, 130, 2}, // FMV_H_X
1053 {1, 1, 0, 0, 0, 925, 70, 2}, // FMV_W_X_RV64
1054 {1, 1, 0, 0, 0, 948, 47, 2}, // FMV_X_ANYEXTH
1055 {1, 1, 0, 0, 0, 972, 63, 2}, // FMV_X_ANYEXTW_RV64
1056 {1, 1, 0, 0, 0, 1001, 47, 2}, // FMV_X_SIGNEXTH
1057 {1, 3, 0, 0, 2, 1026, 371, 6}, // FNEG_VL
1058 {1, 3, 0, 0, 2, 1044, 146, 7}, // FP_EXTEND_VL
1059 {1, 3, 0, 0, 2, 1067, 139, 7}, // FP_ROUND_VL
1060 {1, 3, 0, 0, 0, 1089, 126, 4}, // FROUND
1061 {1, 2, 0, 0, 0, 1106, 127, 3}, // FSGNJX
1062 {1, 3, 0, 0, 2, 1123, 371, 6}, // FSQRT_VL
1063 {1, 5, 0, 0, 3, 1142, 410, 8}, // FSUB_VL
1064 {1, 1, 0, 0, 0, 1160, 365, 2}, // HI
1065 {2, 1, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1173, 22, 3}, // LD_RV32
1066 {1, 1, 0, 0, 0, 1191, 365, 2}, // LLA
1067 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1205, 32, 1}, // LPAD_CALL
1068 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1225, 32, 1}, // LPAD_CALL_INDIRECT
1069 {1, 3, 0, 0, 0, 1254, 106, 4}, // MERGE
1070 {1, 3, 0, 0, 0, 1270, 426, 3}, // MHACC
1071 {1, 3, 0, 0, 0, 1286, 426, 3}, // MHACCSU
1072 {1, 3, 0, 0, 0, 1304, 379, 2}, // MHACCSU_H_B0
1073 {1, 3, 0, 0, 0, 1327, 379, 2}, // MHACCSU_H_B1
1074 {1, 3, 0, 0, 0, 1350, 379, 2}, // MHACCSU_W_H0
1075 {1, 3, 0, 0, 0, 1373, 379, 2}, // MHACCSU_W_H1
1076 {1, 3, 0, 0, 0, 1396, 426, 3}, // MHACCU
1077 {1, 3, 0, 0, 0, 1413, 379, 2}, // MHACC_H_B0
1078 {1, 3, 0, 0, 0, 1434, 379, 2}, // MHACC_H_B1
1079 {1, 3, 0, 0, 0, 1455, 379, 2}, // MHACC_W_H0
1080 {1, 3, 0, 0, 0, 1476, 379, 2}, // MHACC_W_H1
1081 {1, 3, 0, 0, 0, 1497, 426, 3}, // MHRACC
1082 {1, 3, 0, 0, 0, 1514, 426, 3}, // MHRACCSU
1083 {1, 3, 0, 0, 0, 1533, 426, 3}, // MHRACCU
1084 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1551, 0, 0}, // MNRET_GLUE
1085 {1, 2, 0, 0, 0, 1572, 107, 3}, // MOP_R
1086 {1, 3, 0, 0, 0, 1588, 106, 4}, // MOP_RR
1087 {1, 3, 0, 0, 0, 1605, 37, 4}, // MQACC_00
1088 {1, 3, 0, 0, 0, 1624, 37, 4}, // MQACC_01
1089 {1, 3, 0, 0, 0, 1643, 37, 4}, // MQACC_11
1090 {1, 3, 0, 0, 0, 1662, 37, 4}, // MQRACC_00
1091 {1, 3, 0, 0, 0, 1682, 37, 4}, // MQRACC_01
1092 {1, 3, 0, 0, 0, 1702, 37, 4}, // MQRACC_11
1093 {2, 4, 0, 0, 0, 1722, 7, 6}, // MQRWACC
1094 {2, 4, 0, 0, 0, 1740, 7, 6}, // MQWACC
1095 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1757, 0, 0}, // MRET_GLUE
1096 {1, 2, 0, 0, 0, 1777, 389, 3}, // MULHR
1097 {1, 2, 0, 0, 0, 1793, 389, 3}, // MULHRSU
1098 {1, 2, 0, 0, 0, 1811, 389, 3}, // MULHRU
1099 {1, 2, 0, 0, 0, 1828, 389, 3}, // MULHSU
1100 {1, 2, 0, 0, 0, 1845, 455, 2}, // MULHSU_H0
1101 {1, 2, 0, 0, 0, 1865, 455, 2}, // MULHSU_H1
1102 {1, 5, 0, 0, 3, 1885, 395, 8}, // MULHS_VL
1103 {1, 5, 0, 0, 3, 1904, 395, 8}, // MULHU_VL
1104 {1, 2, 0, 0, 0, 1923, 455, 2}, // MULH_H0
1105 {1, 2, 0, 0, 0, 1941, 455, 2}, // MULH_H1
1106 {1, 2, 0, 0, 0, 1959, 389, 3}, // MULQ
1107 {1, 2, 0, 0, 0, 1974, 389, 3}, // MULQR
1108 {1, 5, 0, 0, 3, 1990, 395, 8}, // MUL_VL
1109 {1, 3, 0, 0, 0, 2007, 33, 4}, // NCLIP
1110 {1, 3, 0, 0, 0, 2023, 33, 4}, // NCLIPU
1111 {1, 1, 0, 0, 0, 2040, 68, 2}, // NDS_FMV_BF16_X
1112 {1, 1, 0, 0, 0, 2065, 44, 2}, // NDS_FMV_X_ANYEXTBF16
1113 {1, 1, 0, 0, 0, 2096, 365, 2}, // NEGW_MAX
1114 {1, 3, 0, 0, 0, 2115, 0, 4}, // NSRA
1115 {1, 3, 0, 0, 0, 2130, 0, 4}, // NSRL
1116 {1, 1, 0, 0, 0, 2145, 365, 2}, // ORC_B
1117 {1, 5, 0, 0, 3, 2161, 395, 8}, // OR_VL
1118 {1, 2, 0, 0, 0, 2177, 470, 2}, // PM2ADD
1119 {1, 3, 0, 0, 0, 2194, 79, 4}, // PM2ADDAU_H
1120 {1, 3, 0, 0, 0, 2215, 79, 4}, // PM2ADDA_H
1121 {1, 2, 0, 0, 0, 2235, 470, 2}, // PM2ADDSU
1122 {1, 2, 0, 0, 0, 2254, 470, 2}, // PM2ADDU
1123 {1, 2, 0, 0, 0, 2272, 86, 3}, // PM2ADDU_H
1124 {1, 2, 0, 0, 0, 2292, 86, 3}, // PM2ADD_H
1125 {1, 2, 0, 0, 0, 2311, 470, 2}, // PM2ADD_X
1126 {1, 2, 0, 0, 0, 2330, 470, 2}, // PM2SADD
1127 {1, 2, 0, 0, 0, 2348, 470, 2}, // PM2SADD_X
1128 {1, 2, 0, 0, 0, 2368, 470, 2}, // PM2SUB
1129 {1, 3, 0, 0, 0, 2385, 79, 4}, // PM2SUBA_H
1130 {1, 2, 0, 0, 0, 2405, 86, 3}, // PM2SUB_H
1131 {1, 2, 0, 0, 0, 2424, 470, 2}, // PM2SUB_X
1132 {1, 2, 0, 0, 0, 2443, 83, 3}, // PM2WADD
1133 {1, 3, 0, 0, 0, 2461, 75, 4}, // PM2WADDA
1134 {1, 3, 0, 0, 0, 2480, 75, 4}, // PM2WADDASU
1135 {1, 3, 0, 0, 0, 2501, 75, 4}, // PM2WADDAU
1136 {1, 2, 0, 0, 0, 2521, 83, 3}, // PM2WADDSU
1137 {1, 2, 0, 0, 0, 2541, 83, 3}, // PM2WADDU
1138 {1, 2, 0, 0, 0, 2560, 470, 2}, // PM4ADD
1139 {1, 2, 0, 0, 0, 2577, 470, 2}, // PM4ADDSU
1140 {1, 2, 0, 0, 0, 2596, 470, 2}, // PM4ADDU
1141 {1, 3, 0, 0, 0, 2614, 457, 3}, // PMACCSU_HALVES_00
1142 {1, 3, 0, 0, 0, 2642, 457, 3}, // PMACCSU_HALVES_11
1143 {1, 3, 0, 0, 0, 2670, 457, 3}, // PMACCU_HALVES_00
1144 {1, 3, 0, 0, 0, 2697, 457, 3}, // PMACCU_HALVES_01
1145 {1, 3, 0, 0, 0, 2724, 457, 3}, // PMACCU_HALVES_11
1146 {1, 3, 0, 0, 0, 2751, 457, 3}, // PMACC_HALVES_00
1147 {1, 3, 0, 0, 0, 2777, 457, 3}, // PMACC_HALVES_01
1148 {1, 3, 0, 0, 0, 2803, 457, 3}, // PMACC_HALVES_11
1149 {1, 2, 0, 0, 0, 2829, 470, 2}, // PMQ2ADD
1150 {1, 3, 0, 0, 0, 2847, 89, 4}, // PMQACC_W_H00
1151 {1, 3, 0, 0, 0, 2870, 89, 4}, // PMQACC_W_H01
1152 {1, 3, 0, 0, 0, 2893, 89, 4}, // PMQACC_W_H11
1153 {1, 2, 0, 0, 0, 2916, 470, 2}, // PMQR2ADD
1154 {1, 3, 0, 0, 0, 2935, 89, 4}, // PMQRACC_W_H00
1155 {1, 3, 0, 0, 0, 2959, 89, 4}, // PMQRACC_W_H01
1156 {1, 3, 0, 0, 0, 2983, 89, 4}, // PMQRACC_W_H11
1157 {1, 3, 0, 0, 0, 3007, 75, 4}, // PMQRWACC_H
1158 {1, 3, 0, 0, 0, 3028, 75, 4}, // PMQWACC_H
1159 {1, 2, 0, 0, 0, 3048, 455, 2}, // PMULHSU_H_B0
1160 {1, 2, 0, 0, 0, 3071, 455, 2}, // PMULHSU_H_B1
1161 {1, 2, 0, 0, 0, 3094, 455, 2}, // PMULHSU_W_H0
1162 {1, 2, 0, 0, 0, 3117, 455, 2}, // PMULHSU_W_H1
1163 {1, 2, 0, 0, 0, 3140, 455, 2}, // PMULH_H_B0
1164 {1, 2, 0, 0, 0, 3161, 455, 2}, // PMULH_H_B1
1165 {1, 2, 0, 0, 0, 3182, 455, 2}, // PMULH_W_H0
1166 {1, 2, 0, 0, 0, 3203, 455, 2}, // PMULH_W_H1
1167 {1, 2, 0, 0, 0, 3224, 344, 4}, // PMULSU_HALVES_00
1168 {1, 2, 0, 0, 0, 3251, 344, 4}, // PMULSU_HALVES_11
1169 {1, 2, 0, 0, 0, 3278, 344, 4}, // PMULU_HALVES_00
1170 {1, 2, 0, 0, 0, 3304, 344, 4}, // PMULU_HALVES_01
1171 {1, 2, 0, 0, 0, 3330, 344, 4}, // PMULU_HALVES_11
1172 {1, 2, 0, 0, 0, 3356, 344, 4}, // PMUL_HALVES_00
1173 {1, 2, 0, 0, 0, 3381, 344, 4}, // PMUL_HALVES_01
1174 {1, 2, 0, 0, 0, 3406, 344, 4}, // PMUL_HALVES_11
1175 {1, 2, 0, 0, 0, 3431, 309, 3}, // PNCLIP
1176 {1, 2, 0, 0, 0, 3448, 346, 2}, // PNCLIPP
1177 {1, 2, 0, 0, 0, 3466, 309, 3}, // PNCLIPU
1178 {1, 2, 0, 0, 0, 3484, 346, 2}, // PNCLIPUP
1179 {1, 2, 0, 0, 0, 3503, 309, 3}, // PNSRA
1180 {1, 2, 0, 0, 0, 3519, 309, 3}, // PNSRAR
1181 {1, 2, 0, 0, 0, 3536, 309, 3}, // PNSRL
1182 {1, 2, 0, 0, 0, 3552, 215, 3}, // PPAIRE
1183 {1, 2, 0, 0, 0, 3569, 215, 3}, // PPAIREO
1184 {1, 2, 0, 0, 0, 3587, 215, 3}, // PPAIRO
1185 {1, 2, 0, 0, 0, 3604, 215, 3}, // PPAIROE
1186 {1, 2, 0, 0, 0, 3622, 215, 3}, // PPAIROE_H
1187 {0, 1, 0|1<<SDNPHasChain, 0, 0, 3642, 96, 1}, // PROBED_ALLOCA
1188 {1, 1, 0, 0, 0, 3666, 216, 2}, // PSABS
1189 {1, 2, 0, 0, 0, 3682, 222, 3}, // PSLL
1190 {1, 2, 0, 0, 0, 3697, 222, 3}, // PSRA
1191 {1, 2, 0, 0, 0, 3712, 222, 3}, // PSRL
1192 {1, 2, 0, 0, 0, 3727, 222, 3}, // PSSHA
1193 {1, 2, 0, 0, 0, 3743, 222, 3}, // PSSHAR
1194 {1, 2, 0, 0, 0, 3760, 222, 3}, // PSSHL
1195 {1, 2, 0, 0, 0, 3776, 222, 3}, // PSSHLR
1196 {1, 2, 0, 0, 0, 3793, 215, 3}, // PUNZIPE
1197 {1, 2, 0, 0, 0, 3811, 215, 3}, // PUNZIPO
1198 {1, 2, 0, 0, 0, 3829, 348, 4}, // PWMUL
1199 {1, 2, 0, 0, 0, 3845, 348, 4}, // PWMULSU
1200 {1, 2, 0, 0, 0, 3863, 348, 4}, // PWMULU
1201 {1, 2, 0, 0, 0, 3880, 296, 5}, // PWSLA
1202 {1, 2, 0, 0, 0, 3896, 296, 5}, // PWSLL
1203 {1, 2, 0, 0, 0, 3912, 352, 3}, // PWZIP
1204 {1, 2, 0, 0, 0, 3928, 215, 3}, // PZIP
1205 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 3943, 0, 0}, // QC_C_MILEAVERET_GLUE
1206 {1, 1, 0, 0, 0, 3974, 365, 2}, // QC_E_LI
1207 {1, 4, 0, 0, 0, 3992, 381, 5}, // QC_INSB
1208 {1, 3, 0, 0, 0, 4010, 377, 4}, // QC_MULIADD
1209 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4031, 446, 4}, // QC_SETWMI
1210 {2, 2, 0|1<<SDNPHasChain, 0, 0, 4051, 25, 4}, // READ_COUNTER_WIDE
1211 {1, 1, 0|1<<SDNPHasChain, 0, 0, 4079, 114, 2}, // READ_CSR
1212 {1, 0, 0, 0, 0, 4098, 32, 1}, // READ_VLENB
1213 {1, 2, 0, 0, 0, 4119, 386, 3}, // REMUW
1214 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 4135, 0, 0}, // RET_GLUE
1215 {1, 2, 0, 0, 0, 4154, 386, 3}, // ROLW
1216 {1, 2, 0, 0, 0, 4169, 386, 3}, // RORW
1217 {1, 5, 0, 0, 3, 4184, 395, 8}, // ROTL_VL
1218 {1, 5, 0, 0, 3, 4202, 395, 8}, // ROTR_VL
1219 {1, 5, 0, 0, 3, 4220, 395, 8}, // SADDSAT_VL
1220 {1, 2, 0, 0, 0, 4241, 110, 3}, // SATI
1221 {1, 5, 0, 0, 3, 4256, 395, 8}, // SDIV_VL
1222 {0, 3, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4274, 22, 3}, // SD_RV32
1223 {1, 5, 0, 0, 0, 4292, 475, 4}, // SELECT_CC
1224 {1, 6, 0, 0, 3, 4312, 462, 8}, // SETCC_VL
1225 {0, 2, 0|1<<SDNPHasChain, 0, 0, 4331, 114, 2}, // SET_CSR
1226 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4349, 55, 4}, // SF_VC_FVV_SE
1227 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4372, 59, 4}, // SF_VC_FVW_SE
1228 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4395, 453, 4}, // SF_VC_FV_SE
1229 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4417, 55, 4}, // SF_VC_IVV_SE
1230 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4440, 59, 4}, // SF_VC_IVW_SE
1231 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4463, 453, 4}, // SF_VC_IV_SE
1232 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4485, 55, 4}, // SF_VC_VVV_SE
1233 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4508, 59, 4}, // SF_VC_VVW_SE
1234 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4531, 453, 4}, // SF_VC_VV_SE
1235 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4553, 262, 5}, // SF_VC_V_FVV_SE
1236 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4578, 271, 5}, // SF_VC_V_FVW_SE
1237 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4603, 267, 4}, // SF_VC_V_FV_SE
1238 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4627, 262, 5}, // SF_VC_V_IVV_SE
1239 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4652, 271, 5}, // SF_VC_V_IVW_SE
1240 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4677, 267, 4}, // SF_VC_V_IV_SE
1241 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4701, 276, 5}, // SF_VC_V_I_SE
1242 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4724, 262, 5}, // SF_VC_V_VVV_SE
1243 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4749, 271, 5}, // SF_VC_V_VVW_SE
1244 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4774, 267, 4}, // SF_VC_V_VV_SE
1245 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4798, 262, 5}, // SF_VC_V_XVV_SE
1246 {1, 5, 0|1<<SDNPHasChain, 0, 0, 4823, 271, 5}, // SF_VC_V_XVW_SE
1247 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4848, 267, 4}, // SF_VC_V_XV_SE
1248 {1, 4, 0|1<<SDNPHasChain, 0, 0, 4872, 276, 5}, // SF_VC_V_X_SE
1249 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4895, 55, 4}, // SF_VC_XVV_SE
1250 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4918, 59, 4}, // SF_VC_XVW_SE
1251 {0, 5, 0|1<<SDNPHasChain, 0, 0, 4941, 453, 4}, // SF_VC_XV_SE
1252 {1, 1, 0, 0, 0, 4963, 365, 2}, // SHA256SIG0
1253 {1, 1, 0, 0, 0, 4984, 365, 2}, // SHA256SIG1
1254 {1, 1, 0, 0, 0, 5005, 365, 2}, // SHA256SUM0
1255 {1, 1, 0, 0, 0, 5026, 365, 2}, // SHA256SUM1
1256 {1, 3, 0, 0, 0, 5047, 441, 5}, // SHL_ADD
1257 {1, 5, 0, 0, 3, 5065, 395, 8}, // SHL_VL
1258 {1, 3, 0, 0, 2, 5082, 133, 6}, // SINT_TO_FP_VL
1259 {1, 2, 0, 0, 0, 5106, 386, 3}, // SLLW
1260 {1, 1, 0, 0, 0, 5121, 365, 2}, // SM3P0
1261 {1, 1, 0, 0, 0, 5137, 365, 2}, // SM3P1
1262 {1, 3, 0, 0, 0, 5153, 29, 4}, // SM4ED
1263 {1, 3, 0, 0, 0, 5169, 29, 4}, // SM4KS
1264 {1, 5, 0, 0, 3, 5185, 395, 8}, // SMAX_VL
1265 {1, 5, 0, 0, 3, 5203, 395, 8}, // SMIN_VL
1266 {1, 4, 0, 0, 0, 5221, 243, 6}, // SPLAT_VECTOR_SPLIT_I64_VL
1267 {1, 2, 0, 0, 0, 5257, 386, 3}, // SRAW
1268 {1, 5, 0, 0, 3, 5272, 395, 8}, // SRA_VL
1269 {1, 5, 0, 0, 3, 5289, 395, 8}, // SREM_VL
1270 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 5307, 0, 0}, // SRET_GLUE
1271 {1, 2, 0, 0, 0, 5327, 386, 3}, // SRLW
1272 {1, 5, 0, 0, 3, 5342, 395, 8}, // SRL_VL
1273 {1, 5, 0, 0, 3, 5359, 395, 8}, // SSUBSAT_VL
1274 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 5380, 410, 8}, // STRICT_FADD_VL
1275 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 5405, 65, 3}, // STRICT_FCVT_WU_RV64
1276 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 5435, 65, 3}, // STRICT_FCVT_W_RV64
1277 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 5464, 410, 8}, // STRICT_FDIV_VL
1278 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 5489, 410, 8}, // STRICT_FMUL_VL
1279 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5514, 146, 7}, // STRICT_FP_EXTEND_VL
1280 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5544, 139, 7}, // STRICT_FP_ROUND_VL
1281 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5573, 462, 8}, // STRICT_FSETCCS_VL
1282 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5601, 462, 8}, // STRICT_FSETCC_VL
1283 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5628, 371, 6}, // STRICT_FSQRT_VL
1284 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 5654, 410, 8}, // STRICT_FSUB_VL
1285 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5679, 133, 6}, // STRICT_SINT_TO_FP_VL
1286 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5710, 133, 6}, // STRICT_UINT_TO_FP_VL
1287 {1, 4, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5741, 116, 7}, // STRICT_VFCVT_RM_X_F_VL
1288 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5774, 117, 6}, // STRICT_VFCVT_RTZ_XU_F_VL
1289 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5809, 117, 6}, // STRICT_VFCVT_RTZ_X_F_VL
1290 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5843, 429, 8}, // STRICT_VFMADD_VL
1291 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5870, 429, 8}, // STRICT_VFMSUB_VL
1292 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5897, 139, 7}, // STRICT_VFNCVT_ROD_VL
1293 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5928, 429, 8}, // STRICT_VFNMADD_VL
1294 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5956, 429, 8}, // STRICT_VFNMSUB_VL
1295 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 5984, 371, 6}, // STRICT_VFROUND_NOEXCEPT_VL
1296 {2, 4, 0, 0, 0, 6021, 13, 6}, // SUBD
1297 {1, 5, 0, 0, 3, 6036, 395, 8}, // SUB_VL
1298 {1, 2, 0|1<<SDNPHasChain, 0, 0, 6053, 113, 3}, // SWAP_CSR
1299 {0, 1, 0|1<<SDNPHasChain, 0, 0, 6072, 96, 1}, // SW_GUARDED_BRIND
1300 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 6099, 32, 1}, // SW_GUARDED_CALL
1301 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 6125, 32, 1}, // SW_GUARDED_TAIL
1302 {2, 1, 0, 0, 0, 6151, 19, 3}, // SplitF64
1303 {2, 1, 0, 0, 0, 6170, 41, 3}, // SplitGPRPair
1304 {2, 1, 0, 0, 0, 6193, 4, 3}, // SplitGPRVec
1305 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 6215, 32, 1}, // TAIL
1306 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 6230, 446, 4}, // TH_LDD
1307 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 6247, 446, 4}, // TH_LWD
1308 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 6264, 446, 4}, // TH_LWUD
1309 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 6282, 446, 4}, // TH_SDD
1310 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 6299, 446, 4}, // TH_SWD
1311 {1, 3, 0, 0, 2, 6316, 249, 5}, // TRUNCATE_VECTOR_VL
1312 {1, 3, 0, 0, 2, 6345, 249, 5}, // TRUNCATE_VECTOR_VL_SSAT
1313 {1, 3, 0, 0, 2, 6379, 249, 5}, // TRUNCATE_VECTOR_VL_USAT
1314 {1, 1, 0, 0, 0, 6413, 0, 0}, // TUPLE_CAST
1315 {1, 2, 0, 0, 0, 6434, 359, 2}, // TUPLE_EXTRACT
1316 {1, 3, 0, 0, 0, 6458, 472, 3}, // TUPLE_INSERT
1317 {1, 5, 0, 0, 3, 6481, 395, 8}, // UADDSAT_VL
1318 {1, 5, 0, 0, 3, 6502, 395, 8}, // UDIV_VL
1319 {1, 3, 0, 0, 2, 6520, 133, 6}, // UINT_TO_FP_VL
1320 {1, 5, 0, 0, 3, 6544, 395, 8}, // UMAX_VL
1321 {1, 5, 0, 0, 3, 6562, 395, 8}, // UMIN_VL
1322 {1, 1, 0, 0, 0, 6580, 365, 2}, // UNZIP
1323 {1, 5, 0, 0, 3, 6596, 395, 8}, // UREM_VL
1324 {1, 2, 0, 0, 0, 6614, 110, 3}, // USATI
1325 {1, 5, 0, 0, 3, 6630, 395, 8}, // USUBSAT_VL
1326 {1, 3, 0, 0, 2, 6651, 49, 6}, // VCPOP_VL
1327 {1, 5, 0, 0, 3, 6670, 395, 8}, // VDOT4ASU_VL
1328 {1, 5, 0, 0, 3, 6692, 395, 8}, // VDOT4AU_VL
1329 {1, 5, 0, 0, 3, 6713, 395, 8}, // VDOT4A_VL
1330 {1, 6, 0, 0, 2, 6733, 312, 8}, // VECREDUCE_ADD_VL
1331 {1, 6, 0, 0, 2, 6760, 312, 8}, // VECREDUCE_AND_VL
1332 {1, 6, 0, 0, 2, 6787, 312, 8}, // VECREDUCE_FADD_VL
1333 {1, 6, 0, 0, 2, 6815, 312, 8}, // VECREDUCE_FMAX_VL
1334 {1, 6, 0, 0, 2, 6843, 312, 8}, // VECREDUCE_FMIN_VL
1335 {1, 6, 0, 0, 2, 6871, 312, 8}, // VECREDUCE_OR_VL
1336 {1, 6, 0, 0, 2, 6897, 312, 8}, // VECREDUCE_SEQ_FADD_VL
1337 {1, 6, 0, 0, 2, 6929, 312, 8}, // VECREDUCE_SMAX_VL
1338 {1, 6, 0, 0, 2, 6957, 312, 8}, // VECREDUCE_SMIN_VL
1339 {1, 6, 0, 0, 2, 6985, 312, 8}, // VECREDUCE_UMAX_VL
1340 {1, 6, 0, 0, 2, 7013, 312, 8}, // VECREDUCE_UMIN_VL
1341 {1, 6, 0, 0, 2, 7041, 312, 8}, // VECREDUCE_XOR_VL
1342 {1, 4, 0, 0, 2, 7068, 132, 7}, // VFCVT_RM_F_XU_VL
1343 {1, 4, 0, 0, 2, 7095, 132, 7}, // VFCVT_RM_F_X_VL
1344 {1, 4, 0, 0, 2, 7121, 116, 7}, // VFCVT_RM_XU_F_VL
1345 {1, 4, 0, 0, 2, 7148, 116, 7}, // VFCVT_RM_X_F_VL
1346 {1, 3, 0, 0, 2, 7174, 117, 6}, // VFCVT_RTZ_XU_F_VL
1347 {1, 3, 0, 0, 2, 7202, 117, 6}, // VFCVT_RTZ_X_F_VL
1348 {1, 3, 0, 0, 2, 7229, 49, 6}, // VFIRST_VL
1349 {1, 5, 0, 0, 2, 7249, 429, 8}, // VFMADD_VL
1350 {1, 5, 0, 0, 3, 7269, 410, 8}, // VFMAX_VL
1351 {1, 5, 0, 0, 3, 7288, 410, 8}, // VFMIN_VL
1352 {1, 5, 0, 0, 2, 7307, 429, 8}, // VFMSUB_VL
1353 {1, 3, 0, 0, 0, 7327, 367, 4}, // VFMV_S_F_VL
1354 {1, 3, 0, 0, 0, 7349, 188, 5}, // VFMV_V_F_VL
1355 {1, 3, 0, 0, 2, 7371, 139, 7}, // VFNCVT_ROD_VL
1356 {1, 5, 0, 0, 2, 7395, 429, 8}, // VFNMADD_VL
1357 {1, 5, 0, 0, 2, 7416, 429, 8}, // VFNMSUB_VL
1358 {1, 3, 0, 0, 2, 7437, 371, 6}, // VFROUND_NOEXCEPT_VL
1359 {1, 5, 0, 0, 2, 7467, 328, 8}, // VFSLIDE1DOWN_VL
1360 {1, 5, 0, 0, 2, 7493, 328, 8}, // VFSLIDE1UP_VL
1361 {1, 5, 0, 0, 3, 7517, 193, 10}, // VFWADD_VL
1362 {1, 5, 0, 0, 3, 7537, 178, 10}, // VFWADD_W_VL
1363 {1, 5, 0, 0, 2, 7559, 203, 11}, // VFWMADD_VL
1364 {1, 5, 0, 0, 2, 7580, 203, 11}, // VFWMSUB_VL
1365 {1, 5, 0, 0, 3, 7601, 193, 10}, // VFWMUL_VL
1366 {1, 5, 0, 0, 2, 7621, 203, 11}, // VFWNMADD_VL
1367 {1, 5, 0, 0, 2, 7643, 203, 11}, // VFWNMSUB_VL
1368 {1, 5, 0, 0, 3, 7665, 193, 10}, // VFWSUB_VL
1369 {1, 5, 0, 0, 3, 7685, 178, 10}, // VFWSUB_W_VL
1370 {1, 2, 0, 0, 2, 7707, 355, 4}, // VID_VL
1371 {1, 3, 0, 0, 0, 7724, 437, 4}, // VMAND_VL
1372 {1, 1, 0, 0, 0, 7743, 460, 2}, // VMCLR_VL
1373 {1, 5, 0, 0, 1, 7762, 288, 8}, // VMERGE_VL
1374 {1, 3, 0, 0, 0, 7782, 437, 4}, // VMOR_VL
1375 {1, 1, 0, 0, 0, 7800, 460, 2}, // VMSET_VL
1376 {1, 3, 0, 0, 0, 7819, 363, 4}, // VMV_S_X_VL
1377 {1, 3, 0, 0, 0, 7840, 214, 4}, // VMV_V_V_VL
1378 {1, 3, 0, 0, 0, 7861, 153, 5}, // VMV_V_X_VL
1379 {1, 1, 0, 0, 0, 7882, 123, 3}, // VMV_X_S
1380 {1, 3, 0, 0, 0, 7900, 437, 4}, // VMXOR_VL
1381 {1, 5, 0, 0, 3, 7919, 418, 7}, // VPAIRE_VL
1382 {1, 5, 0, 0, 3, 7939, 418, 7}, // VPAIRO_VL
1383 {1, 5, 0, 0, 2, 7959, 234, 9}, // VRGATHEREI16_VV_VL
1384 {1, 5, 0, 0, 2, 7988, 225, 9}, // VRGATHER_VV_VL
1385 {1, 5, 0, 0, 2, 8013, 218, 7}, // VRGATHER_VX_VL
1386 {1, 3, 0, 0, 2, 8038, 254, 5}, // VSEXT_VL
1387 {1, 5, 0, 0, 2, 8057, 320, 8}, // VSLIDE1DOWN_VL
1388 {1, 5, 0, 0, 2, 8082, 320, 8}, // VSLIDE1UP_VL
1389 {1, 6, 0, 0, 2, 8105, 336, 8}, // VSLIDEDOWN_VL
1390 {1, 6, 0, 0, 2, 8129, 336, 8}, // VSLIDEUP_VL
1391 {1, 4, 0, 0, 1, 8151, 281, 7}, // VUNZIPE_VL
1392 {1, 4, 0, 0, 1, 8172, 281, 7}, // VUNZIPO_VL
1393 {1, 5, 0, 0, 3, 8193, 168, 10}, // VWABDAU_VL
1394 {1, 5, 0, 0, 3, 8214, 168, 10}, // VWABDA_VL
1395 {1, 5, 0, 0, 3, 8234, 168, 10}, // VWADDU_VL
1396 {1, 5, 0, 0, 3, 8254, 158, 10}, // VWADDU_W_VL
1397 {1, 5, 0, 0, 3, 8276, 168, 10}, // VWADD_VL
1398 {1, 5, 0, 0, 3, 8295, 158, 10}, // VWADD_W_VL
1399 {1, 5, 0, 0, 2, 8316, 168, 10}, // VWMACCSU_VL
1400 {1, 5, 0, 0, 2, 8338, 168, 10}, // VWMACCU_VL
1401 {1, 5, 0, 0, 2, 8359, 168, 10}, // VWMACC_VL
1402 {1, 5, 0, 0, 3, 8379, 168, 10}, // VWMULSU_VL
1403 {1, 5, 0, 0, 3, 8400, 168, 10}, // VWMULU_VL
1404 {1, 5, 0, 0, 3, 8420, 168, 10}, // VWMUL_VL
1405 {1, 5, 0, 0, 3, 8439, 168, 10}, // VWSLL_VL
1406 {1, 5, 0, 0, 3, 8458, 168, 10}, // VWSUBU_VL
1407 {1, 5, 0, 0, 3, 8478, 158, 10}, // VWSUBU_W_VL
1408 {1, 5, 0, 0, 3, 8500, 168, 10}, // VWSUB_VL
1409 {1, 5, 0, 0, 3, 8519, 158, 10}, // VWSUB_W_VL
1410 {1, 3, 0, 0, 2, 8540, 254, 5}, // VZEXT_VL
1411 {1, 5, 0, 0, 3, 8559, 301, 8}, // VZIP_VL
1412 {2, 2, 0, 0, 0, 8577, 425, 4}, // WADD
1413 {2, 4, 0, 0, 0, 8592, 7, 6}, // WADDA
1414 {2, 4, 0, 0, 0, 8608, 7, 6}, // WADDAU
1415 {2, 2, 0, 0, 0, 8625, 425, 4}, // WADDU
1416 {2, 4, 0, 0, 0, 8641, 7, 6}, // WMACC
1417 {2, 4, 0, 0, 0, 8657, 7, 6}, // WMACCSU
1418 {2, 4, 0, 0, 0, 8675, 7, 6}, // WMACCU
1419 {2, 2, 0, 0, 0, 8692, 425, 4}, // WMULSU
1420 {0, 2, 0|1<<SDNPHasChain, 0, 0, 8709, 114, 2}, // WRITE_CSR
1421 {2, 2, 0, 0, 0, 8729, 0, 4}, // WSLA
1422 {2, 2, 0, 0, 0, 8744, 0, 4}, // WSLL
1423 {2, 2, 0, 0, 0, 8759, 425, 4}, // WSUB
1424 {2, 4, 0, 0, 0, 8774, 7, 6}, // WSUBA
1425 {2, 4, 0, 0, 0, 8790, 7, 6}, // WSUBAU
1426 {2, 2, 0, 0, 0, 8807, 425, 4}, // WSUBU
1427 {1, 5, 0, 0, 3, 8823, 395, 8}, // XOR_VL
1428 {1, 1, 0, 0, 0, 8840, 365, 2}, // ZIP
1429};
1430
1431static const SDNodeInfo RISCVGenSDNodeInfo(
1432 /*NumOpcodes=*/426, RISCVSDNodeDescs, RISCVSDNodeNames,
1433 RISCVVTByHwModeTable, RISCVSDTypeConstraints);
1434
1435} // namespace llvm
1436
1437#endif // GET_SDNODE_DESC
1438
1439