1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target SDNode descriptions *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: RISCV.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10#ifdef GET_SDNODE_ENUM
11#undef GET_SDNODE_ENUM
12
13namespace llvm::RISCVISD {
14
15enum GenNodeType : unsigned {
16 ABDS_VL = ISD::BUILTIN_OP_END,
17 ABDU_VL,
18 ABSW,
19 ABS_VL,
20 ADDD,
21 ADD_LO,
22 ADD_TPREL,
23 ADD_VL,
24 AND_VL,
25 ASUB,
26 ASUBU,
27 AVGCEILS_VL,
28 AVGCEILU_VL,
29 AVGFLOORS_VL,
30 AVGFLOORU_VL,
31 BITREVERSE_VL,
32 BREV8,
33 BR_CC,
34 BSWAP_VL,
35 BuildGPRPair,
36 BuildPairF64,
37 BuildPairGPRVec,
38 CALL,
39 CLEAR_CSR,
40 CLSW,
41 CLZW,
42 CTLZ_VL,
43 CTPOP_VL,
44 CTTZ_VL,
45 CTZW,
46 CZERO_EQZ,
47 CZERO_NEZ,
48 DIVUW,
49 DIVW,
50 FABS_VL,
51 FADD_VL,
52 FCLASS,
53 FCLASS_VL,
54 FCOPYSIGN_VL,
55 FCVT_WU_RV64,
56 FCVT_W_RV64,
57 FCVT_X,
58 FCVT_XU,
59 FDIV_VL,
60 FLI,
61 FMAX,
62 FMIN,
63 FMUL_VL,
64 FMV_H_X,
65 FMV_W_X_RV64,
66 FMV_X_ANYEXTH,
67 FMV_X_ANYEXTW_RV64,
68 FMV_X_SIGNEXTH,
69 FNEG_VL,
70 FP_EXTEND_VL,
71 FP_ROUND_VL,
72 FROUND,
73 FSGNJX,
74 FSQRT_VL,
75 FSUB_VL,
76 HI,
77 LD_RV32,
78 LLA,
79 LPAD_CALL,
80 LPAD_CALL_INDIRECT,
81 MERGE,
82 MNRET_GLUE,
83 MOP_R,
84 MOP_RR,
85 MRET_GLUE,
86 MULHR,
87 MULHRSU,
88 MULHRU,
89 MULHSU,
90 MULHS_VL,
91 MULHU_VL,
92 MUL_VL,
93 NDS_FMV_BF16_X,
94 NDS_FMV_X_ANYEXTBF16,
95 NEGW_MAX,
96 NSRA,
97 NSRL,
98 ORC_B,
99 OR_VL,
100 PPAIRE_DB,
101 PROBED_ALLOCA,
102 PSHL,
103 PSRA,
104 PSRL,
105 PSSHA,
106 PWMUL,
107 PWMULSU,
108 PWMULU,
109 QC_C_MILEAVERET_GLUE,
110 QC_E_LI,
111 QC_INSB,
112 QC_MULIADD,
113 QC_SETWMI,
114 READ_COUNTER_WIDE,
115 READ_CSR,
116 READ_VLENB,
117 REMUW,
118 RET_GLUE,
119 ROLW,
120 RORW,
121 ROTL_VL,
122 ROTR_VL,
123 SADDSAT_VL,
124 SATI,
125 SDIV_VL,
126 SD_RV32,
127 SELECT_CC,
128 SETCC_VL,
129 SET_CSR,
130 SF_VC_FVV_SE,
131 SF_VC_FVW_SE,
132 SF_VC_FV_SE,
133 SF_VC_IVV_SE,
134 SF_VC_IVW_SE,
135 SF_VC_IV_SE,
136 SF_VC_VVV_SE,
137 SF_VC_VVW_SE,
138 SF_VC_VV_SE,
139 SF_VC_V_FVV_SE,
140 SF_VC_V_FVW_SE,
141 SF_VC_V_FV_SE,
142 SF_VC_V_IVV_SE,
143 SF_VC_V_IVW_SE,
144 SF_VC_V_IV_SE,
145 SF_VC_V_I_SE,
146 SF_VC_V_VVV_SE,
147 SF_VC_V_VVW_SE,
148 SF_VC_V_VV_SE,
149 SF_VC_V_XVV_SE,
150 SF_VC_V_XVW_SE,
151 SF_VC_V_XV_SE,
152 SF_VC_V_X_SE,
153 SF_VC_XVV_SE,
154 SF_VC_XVW_SE,
155 SF_VC_XV_SE,
156 SHA256SIG0,
157 SHA256SIG1,
158 SHA256SUM0,
159 SHA256SUM1,
160 SHL_ADD,
161 SHL_VL,
162 SINT_TO_FP_VL,
163 SLLW,
164 SM3P0,
165 SM3P1,
166 SM4ED,
167 SM4KS,
168 SMAX_VL,
169 SMIN_VL,
170 SPLAT_VECTOR_SPLIT_I64_VL,
171 SRAW,
172 SRA_VL,
173 SREM_VL,
174 SRET_GLUE,
175 SRLW,
176 SRL_VL,
177 SSUBSAT_VL,
178 STRICT_FADD_VL,
179 STRICT_FCVT_WU_RV64,
180 STRICT_FCVT_W_RV64,
181 STRICT_FDIV_VL,
182 STRICT_FMUL_VL,
183 STRICT_FP_EXTEND_VL,
184 STRICT_FP_ROUND_VL,
185 STRICT_FSETCCS_VL,
186 STRICT_FSETCC_VL,
187 STRICT_FSQRT_VL,
188 STRICT_FSUB_VL,
189 STRICT_SINT_TO_FP_VL,
190 STRICT_UINT_TO_FP_VL,
191 STRICT_VFCVT_RM_X_F_VL,
192 STRICT_VFCVT_RTZ_XU_F_VL,
193 STRICT_VFCVT_RTZ_X_F_VL,
194 STRICT_VFMADD_VL,
195 STRICT_VFMSUB_VL,
196 STRICT_VFNCVT_ROD_VL,
197 STRICT_VFNMADD_VL,
198 STRICT_VFNMSUB_VL,
199 STRICT_VFROUND_NOEXCEPT_VL,
200 SUBD,
201 SUB_VL,
202 SWAP_CSR,
203 SW_GUARDED_BRIND,
204 SW_GUARDED_CALL,
205 SW_GUARDED_TAIL,
206 SplitF64,
207 SplitGPRPair,
208 SplitGPRVec,
209 TAIL,
210 TH_LDD,
211 TH_LWD,
212 TH_LWUD,
213 TH_SDD,
214 TH_SWD,
215 TRUNCATE_VECTOR_VL,
216 TRUNCATE_VECTOR_VL_SSAT,
217 TRUNCATE_VECTOR_VL_USAT,
218 TUPLE_EXTRACT,
219 TUPLE_INSERT,
220 UADDSAT_VL,
221 UDIV_VL,
222 UINT_TO_FP_VL,
223 UMAX_VL,
224 UMIN_VL,
225 UNZIP,
226 UREM_VL,
227 USATI,
228 USUBSAT_VL,
229 VCPOP_VL,
230 VDOT4ASU_VL,
231 VDOT4AU_VL,
232 VDOT4A_VL,
233 VECREDUCE_ADD_VL,
234 VECREDUCE_AND_VL,
235 VECREDUCE_FADD_VL,
236 VECREDUCE_FMAX_VL,
237 VECREDUCE_FMIN_VL,
238 VECREDUCE_OR_VL,
239 VECREDUCE_SEQ_FADD_VL,
240 VECREDUCE_SMAX_VL,
241 VECREDUCE_SMIN_VL,
242 VECREDUCE_UMAX_VL,
243 VECREDUCE_UMIN_VL,
244 VECREDUCE_XOR_VL,
245 VFCVT_RM_F_XU_VL,
246 VFCVT_RM_F_X_VL,
247 VFCVT_RM_XU_F_VL,
248 VFCVT_RM_X_F_VL,
249 VFCVT_RTZ_XU_F_VL,
250 VFCVT_RTZ_X_F_VL,
251 VFIRST_VL,
252 VFMADD_VL,
253 VFMAX_VL,
254 VFMIN_VL,
255 VFMSUB_VL,
256 VFMV_S_F_VL,
257 VFMV_V_F_VL,
258 VFNCVT_ROD_VL,
259 VFNMADD_VL,
260 VFNMSUB_VL,
261 VFROUND_NOEXCEPT_VL,
262 VFSLIDE1DOWN_VL,
263 VFSLIDE1UP_VL,
264 VFWADD_VL,
265 VFWADD_W_VL,
266 VFWMADD_VL,
267 VFWMSUB_VL,
268 VFWMUL_VL,
269 VFWNMADD_VL,
270 VFWNMSUB_VL,
271 VFWSUB_VL,
272 VFWSUB_W_VL,
273 VID_VL,
274 VMAND_VL,
275 VMCLR_VL,
276 VMERGE_VL,
277 VMOR_VL,
278 VMSET_VL,
279 VMV_S_X_VL,
280 VMV_V_V_VL,
281 VMV_V_X_VL,
282 VMV_X_S,
283 VMXOR_VL,
284 VPAIRE_VL,
285 VPAIRO_VL,
286 VRGATHEREI16_VV_VL,
287 VRGATHER_VV_VL,
288 VRGATHER_VX_VL,
289 VSEXT_VL,
290 VSLIDE1DOWN_VL,
291 VSLIDE1UP_VL,
292 VSLIDEDOWN_VL,
293 VSLIDEUP_VL,
294 VUNZIPE_VL,
295 VUNZIPO_VL,
296 VWABDAU_VL,
297 VWABDA_VL,
298 VWADDU_VL,
299 VWADDU_W_VL,
300 VWADD_VL,
301 VWADD_W_VL,
302 VWMACCSU_VL,
303 VWMACCU_VL,
304 VWMACC_VL,
305 VWMULSU_VL,
306 VWMULU_VL,
307 VWMUL_VL,
308 VWSLL_VL,
309 VWSUBU_VL,
310 VWSUBU_W_VL,
311 VWSUB_VL,
312 VWSUB_W_VL,
313 VZEXT_VL,
314 VZIP_VL,
315 WADDA,
316 WADDAU,
317 WADDU,
318 WMULSU,
319 WRITE_CSR,
320 WSLA,
321 WSLL,
322 WSUBA,
323 WSUBAU,
324 WSUBU,
325 XOR_VL,
326 ZIP,
327};
328
329static constexpr unsigned GENERATED_OPCODE_END = ZIP + 1;
330
331} // namespace llvm::RISCVISD
332
333#endif // GET_SDNODE_ENUM
334
335#ifdef GET_SDNODE_DESC
336#undef GET_SDNODE_DESC
337
338namespace llvm {
339
340
341#ifdef __GNUC__
342#pragma GCC diagnostic push
343#pragma GCC diagnostic ignored "-Woverlength-strings"
344#endif
345static constexpr char RISCVSDNodeNamesStorage[] =
346 "\0"
347 "RISCVISD::ABDS_VL\0"
348 "RISCVISD::ABDU_VL\0"
349 "RISCVISD::ABSW\0"
350 "RISCVISD::ABS_VL\0"
351 "RISCVISD::ADDD\0"
352 "RISCVISD::ADD_LO\0"
353 "RISCVISD::ADD_TPREL\0"
354 "RISCVISD::ADD_VL\0"
355 "RISCVISD::AND_VL\0"
356 "RISCVISD::ASUB\0"
357 "RISCVISD::ASUBU\0"
358 "RISCVISD::AVGCEILS_VL\0"
359 "RISCVISD::AVGCEILU_VL\0"
360 "RISCVISD::AVGFLOORS_VL\0"
361 "RISCVISD::AVGFLOORU_VL\0"
362 "RISCVISD::BITREVERSE_VL\0"
363 "RISCVISD::BREV8\0"
364 "RISCVISD::BR_CC\0"
365 "RISCVISD::BSWAP_VL\0"
366 "RISCVISD::BuildGPRPair\0"
367 "RISCVISD::BuildPairF64\0"
368 "RISCVISD::BuildPairGPRVec\0"
369 "RISCVISD::CALL\0"
370 "RISCVISD::CLEAR_CSR\0"
371 "RISCVISD::CLSW\0"
372 "RISCVISD::CLZW\0"
373 "RISCVISD::CTLZ_VL\0"
374 "RISCVISD::CTPOP_VL\0"
375 "RISCVISD::CTTZ_VL\0"
376 "RISCVISD::CTZW\0"
377 "RISCVISD::CZERO_EQZ\0"
378 "RISCVISD::CZERO_NEZ\0"
379 "RISCVISD::DIVUW\0"
380 "RISCVISD::DIVW\0"
381 "RISCVISD::FABS_VL\0"
382 "RISCVISD::FADD_VL\0"
383 "RISCVISD::FCLASS\0"
384 "RISCVISD::FCLASS_VL\0"
385 "RISCVISD::FCOPYSIGN_VL\0"
386 "RISCVISD::FCVT_WU_RV64\0"
387 "RISCVISD::FCVT_W_RV64\0"
388 "RISCVISD::FCVT_X\0"
389 "RISCVISD::FCVT_XU\0"
390 "RISCVISD::FDIV_VL\0"
391 "RISCVISD::FLI\0"
392 "RISCVISD::FMAX\0"
393 "RISCVISD::FMIN\0"
394 "RISCVISD::FMUL_VL\0"
395 "RISCVISD::FMV_H_X\0"
396 "RISCVISD::FMV_W_X_RV64\0"
397 "RISCVISD::FMV_X_ANYEXTH\0"
398 "RISCVISD::FMV_X_ANYEXTW_RV64\0"
399 "RISCVISD::FMV_X_SIGNEXTH\0"
400 "RISCVISD::FNEG_VL\0"
401 "RISCVISD::FP_EXTEND_VL\0"
402 "RISCVISD::FP_ROUND_VL\0"
403 "RISCVISD::FROUND\0"
404 "RISCVISD::FSGNJX\0"
405 "RISCVISD::FSQRT_VL\0"
406 "RISCVISD::FSUB_VL\0"
407 "RISCVISD::HI\0"
408 "RISCVISD::LD_RV32\0"
409 "RISCVISD::LLA\0"
410 "RISCVISD::LPAD_CALL\0"
411 "RISCVISD::LPAD_CALL_INDIRECT\0"
412 "RISCVISD::MERGE\0"
413 "RISCVISD::MNRET_GLUE\0"
414 "RISCVISD::MOP_R\0"
415 "RISCVISD::MOP_RR\0"
416 "RISCVISD::MRET_GLUE\0"
417 "RISCVISD::MULHR\0"
418 "RISCVISD::MULHRSU\0"
419 "RISCVISD::MULHRU\0"
420 "RISCVISD::MULHSU\0"
421 "RISCVISD::MULHS_VL\0"
422 "RISCVISD::MULHU_VL\0"
423 "RISCVISD::MUL_VL\0"
424 "RISCVISD::NDS_FMV_BF16_X\0"
425 "RISCVISD::NDS_FMV_X_ANYEXTBF16\0"
426 "RISCVISD::NEGW_MAX\0"
427 "RISCVISD::NSRA\0"
428 "RISCVISD::NSRL\0"
429 "RISCVISD::ORC_B\0"
430 "RISCVISD::OR_VL\0"
431 "RISCVISD::PPAIRE_DB\0"
432 "RISCVISD::PROBED_ALLOCA\0"
433 "RISCVISD::PSHL\0"
434 "RISCVISD::PSRA\0"
435 "RISCVISD::PSRL\0"
436 "RISCVISD::PSSHA\0"
437 "RISCVISD::PWMUL\0"
438 "RISCVISD::PWMULSU\0"
439 "RISCVISD::PWMULU\0"
440 "RISCVISD::QC_C_MILEAVERET_GLUE\0"
441 "RISCVISD::QC_E_LI\0"
442 "RISCVISD::QC_INSB\0"
443 "RISCVISD::QC_MULIADD\0"
444 "RISCVISD::QC_SETWMI\0"
445 "RISCVISD::READ_COUNTER_WIDE\0"
446 "RISCVISD::READ_CSR\0"
447 "RISCVISD::READ_VLENB\0"
448 "RISCVISD::REMUW\0"
449 "RISCVISD::RET_GLUE\0"
450 "RISCVISD::ROLW\0"
451 "RISCVISD::RORW\0"
452 "RISCVISD::ROTL_VL\0"
453 "RISCVISD::ROTR_VL\0"
454 "RISCVISD::SADDSAT_VL\0"
455 "RISCVISD::SATI\0"
456 "RISCVISD::SDIV_VL\0"
457 "RISCVISD::SD_RV32\0"
458 "RISCVISD::SELECT_CC\0"
459 "RISCVISD::SETCC_VL\0"
460 "RISCVISD::SET_CSR\0"
461 "RISCVISD::SF_VC_FVV_SE\0"
462 "RISCVISD::SF_VC_FVW_SE\0"
463 "RISCVISD::SF_VC_FV_SE\0"
464 "RISCVISD::SF_VC_IVV_SE\0"
465 "RISCVISD::SF_VC_IVW_SE\0"
466 "RISCVISD::SF_VC_IV_SE\0"
467 "RISCVISD::SF_VC_VVV_SE\0"
468 "RISCVISD::SF_VC_VVW_SE\0"
469 "RISCVISD::SF_VC_VV_SE\0"
470 "RISCVISD::SF_VC_V_FVV_SE\0"
471 "RISCVISD::SF_VC_V_FVW_SE\0"
472 "RISCVISD::SF_VC_V_FV_SE\0"
473 "RISCVISD::SF_VC_V_IVV_SE\0"
474 "RISCVISD::SF_VC_V_IVW_SE\0"
475 "RISCVISD::SF_VC_V_IV_SE\0"
476 "RISCVISD::SF_VC_V_I_SE\0"
477 "RISCVISD::SF_VC_V_VVV_SE\0"
478 "RISCVISD::SF_VC_V_VVW_SE\0"
479 "RISCVISD::SF_VC_V_VV_SE\0"
480 "RISCVISD::SF_VC_V_XVV_SE\0"
481 "RISCVISD::SF_VC_V_XVW_SE\0"
482 "RISCVISD::SF_VC_V_XV_SE\0"
483 "RISCVISD::SF_VC_V_X_SE\0"
484 "RISCVISD::SF_VC_XVV_SE\0"
485 "RISCVISD::SF_VC_XVW_SE\0"
486 "RISCVISD::SF_VC_XV_SE\0"
487 "RISCVISD::SHA256SIG0\0"
488 "RISCVISD::SHA256SIG1\0"
489 "RISCVISD::SHA256SUM0\0"
490 "RISCVISD::SHA256SUM1\0"
491 "RISCVISD::SHL_ADD\0"
492 "RISCVISD::SHL_VL\0"
493 "RISCVISD::SINT_TO_FP_VL\0"
494 "RISCVISD::SLLW\0"
495 "RISCVISD::SM3P0\0"
496 "RISCVISD::SM3P1\0"
497 "RISCVISD::SM4ED\0"
498 "RISCVISD::SM4KS\0"
499 "RISCVISD::SMAX_VL\0"
500 "RISCVISD::SMIN_VL\0"
501 "RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL\0"
502 "RISCVISD::SRAW\0"
503 "RISCVISD::SRA_VL\0"
504 "RISCVISD::SREM_VL\0"
505 "RISCVISD::SRET_GLUE\0"
506 "RISCVISD::SRLW\0"
507 "RISCVISD::SRL_VL\0"
508 "RISCVISD::SSUBSAT_VL\0"
509 "RISCVISD::STRICT_FADD_VL\0"
510 "RISCVISD::STRICT_FCVT_WU_RV64\0"
511 "RISCVISD::STRICT_FCVT_W_RV64\0"
512 "RISCVISD::STRICT_FDIV_VL\0"
513 "RISCVISD::STRICT_FMUL_VL\0"
514 "RISCVISD::STRICT_FP_EXTEND_VL\0"
515 "RISCVISD::STRICT_FP_ROUND_VL\0"
516 "RISCVISD::STRICT_FSETCCS_VL\0"
517 "RISCVISD::STRICT_FSETCC_VL\0"
518 "RISCVISD::STRICT_FSQRT_VL\0"
519 "RISCVISD::STRICT_FSUB_VL\0"
520 "RISCVISD::STRICT_SINT_TO_FP_VL\0"
521 "RISCVISD::STRICT_UINT_TO_FP_VL\0"
522 "RISCVISD::STRICT_VFCVT_RM_X_F_VL\0"
523 "RISCVISD::STRICT_VFCVT_RTZ_XU_F_VL\0"
524 "RISCVISD::STRICT_VFCVT_RTZ_X_F_VL\0"
525 "RISCVISD::STRICT_VFMADD_VL\0"
526 "RISCVISD::STRICT_VFMSUB_VL\0"
527 "RISCVISD::STRICT_VFNCVT_ROD_VL\0"
528 "RISCVISD::STRICT_VFNMADD_VL\0"
529 "RISCVISD::STRICT_VFNMSUB_VL\0"
530 "RISCVISD::STRICT_VFROUND_NOEXCEPT_VL\0"
531 "RISCVISD::SUBD\0"
532 "RISCVISD::SUB_VL\0"
533 "RISCVISD::SWAP_CSR\0"
534 "RISCVISD::SW_GUARDED_BRIND\0"
535 "RISCVISD::SW_GUARDED_CALL\0"
536 "RISCVISD::SW_GUARDED_TAIL\0"
537 "RISCVISD::SplitF64\0"
538 "RISCVISD::SplitGPRPair\0"
539 "RISCVISD::SplitGPRVec\0"
540 "RISCVISD::TAIL\0"
541 "RISCVISD::TH_LDD\0"
542 "RISCVISD::TH_LWD\0"
543 "RISCVISD::TH_LWUD\0"
544 "RISCVISD::TH_SDD\0"
545 "RISCVISD::TH_SWD\0"
546 "RISCVISD::TRUNCATE_VECTOR_VL\0"
547 "RISCVISD::TRUNCATE_VECTOR_VL_SSAT\0"
548 "RISCVISD::TRUNCATE_VECTOR_VL_USAT\0"
549 "RISCVISD::TUPLE_EXTRACT\0"
550 "RISCVISD::TUPLE_INSERT\0"
551 "RISCVISD::UADDSAT_VL\0"
552 "RISCVISD::UDIV_VL\0"
553 "RISCVISD::UINT_TO_FP_VL\0"
554 "RISCVISD::UMAX_VL\0"
555 "RISCVISD::UMIN_VL\0"
556 "RISCVISD::UNZIP\0"
557 "RISCVISD::UREM_VL\0"
558 "RISCVISD::USATI\0"
559 "RISCVISD::USUBSAT_VL\0"
560 "RISCVISD::VCPOP_VL\0"
561 "RISCVISD::VDOT4ASU_VL\0"
562 "RISCVISD::VDOT4AU_VL\0"
563 "RISCVISD::VDOT4A_VL\0"
564 "RISCVISD::VECREDUCE_ADD_VL\0"
565 "RISCVISD::VECREDUCE_AND_VL\0"
566 "RISCVISD::VECREDUCE_FADD_VL\0"
567 "RISCVISD::VECREDUCE_FMAX_VL\0"
568 "RISCVISD::VECREDUCE_FMIN_VL\0"
569 "RISCVISD::VECREDUCE_OR_VL\0"
570 "RISCVISD::VECREDUCE_SEQ_FADD_VL\0"
571 "RISCVISD::VECREDUCE_SMAX_VL\0"
572 "RISCVISD::VECREDUCE_SMIN_VL\0"
573 "RISCVISD::VECREDUCE_UMAX_VL\0"
574 "RISCVISD::VECREDUCE_UMIN_VL\0"
575 "RISCVISD::VECREDUCE_XOR_VL\0"
576 "RISCVISD::VFCVT_RM_F_XU_VL\0"
577 "RISCVISD::VFCVT_RM_F_X_VL\0"
578 "RISCVISD::VFCVT_RM_XU_F_VL\0"
579 "RISCVISD::VFCVT_RM_X_F_VL\0"
580 "RISCVISD::VFCVT_RTZ_XU_F_VL\0"
581 "RISCVISD::VFCVT_RTZ_X_F_VL\0"
582 "RISCVISD::VFIRST_VL\0"
583 "RISCVISD::VFMADD_VL\0"
584 "RISCVISD::VFMAX_VL\0"
585 "RISCVISD::VFMIN_VL\0"
586 "RISCVISD::VFMSUB_VL\0"
587 "RISCVISD::VFMV_S_F_VL\0"
588 "RISCVISD::VFMV_V_F_VL\0"
589 "RISCVISD::VFNCVT_ROD_VL\0"
590 "RISCVISD::VFNMADD_VL\0"
591 "RISCVISD::VFNMSUB_VL\0"
592 "RISCVISD::VFROUND_NOEXCEPT_VL\0"
593 "RISCVISD::VFSLIDE1DOWN_VL\0"
594 "RISCVISD::VFSLIDE1UP_VL\0"
595 "RISCVISD::VFWADD_VL\0"
596 "RISCVISD::VFWADD_W_VL\0"
597 "RISCVISD::VFWMADD_VL\0"
598 "RISCVISD::VFWMSUB_VL\0"
599 "RISCVISD::VFWMUL_VL\0"
600 "RISCVISD::VFWNMADD_VL\0"
601 "RISCVISD::VFWNMSUB_VL\0"
602 "RISCVISD::VFWSUB_VL\0"
603 "RISCVISD::VFWSUB_W_VL\0"
604 "RISCVISD::VID_VL\0"
605 "RISCVISD::VMAND_VL\0"
606 "RISCVISD::VMCLR_VL\0"
607 "RISCVISD::VMERGE_VL\0"
608 "RISCVISD::VMOR_VL\0"
609 "RISCVISD::VMSET_VL\0"
610 "RISCVISD::VMV_S_X_VL\0"
611 "RISCVISD::VMV_V_V_VL\0"
612 "RISCVISD::VMV_V_X_VL\0"
613 "RISCVISD::VMV_X_S\0"
614 "RISCVISD::VMXOR_VL\0"
615 "RISCVISD::VPAIRE_VL\0"
616 "RISCVISD::VPAIRO_VL\0"
617 "RISCVISD::VRGATHEREI16_VV_VL\0"
618 "RISCVISD::VRGATHER_VV_VL\0"
619 "RISCVISD::VRGATHER_VX_VL\0"
620 "RISCVISD::VSEXT_VL\0"
621 "RISCVISD::VSLIDE1DOWN_VL\0"
622 "RISCVISD::VSLIDE1UP_VL\0"
623 "RISCVISD::VSLIDEDOWN_VL\0"
624 "RISCVISD::VSLIDEUP_VL\0"
625 "RISCVISD::VUNZIPE_VL\0"
626 "RISCVISD::VUNZIPO_VL\0"
627 "RISCVISD::VWABDAU_VL\0"
628 "RISCVISD::VWABDA_VL\0"
629 "RISCVISD::VWADDU_VL\0"
630 "RISCVISD::VWADDU_W_VL\0"
631 "RISCVISD::VWADD_VL\0"
632 "RISCVISD::VWADD_W_VL\0"
633 "RISCVISD::VWMACCSU_VL\0"
634 "RISCVISD::VWMACCU_VL\0"
635 "RISCVISD::VWMACC_VL\0"
636 "RISCVISD::VWMULSU_VL\0"
637 "RISCVISD::VWMULU_VL\0"
638 "RISCVISD::VWMUL_VL\0"
639 "RISCVISD::VWSLL_VL\0"
640 "RISCVISD::VWSUBU_VL\0"
641 "RISCVISD::VWSUBU_W_VL\0"
642 "RISCVISD::VWSUB_VL\0"
643 "RISCVISD::VWSUB_W_VL\0"
644 "RISCVISD::VZEXT_VL\0"
645 "RISCVISD::VZIP_VL\0"
646 "RISCVISD::WADDA\0"
647 "RISCVISD::WADDAU\0"
648 "RISCVISD::WADDU\0"
649 "RISCVISD::WMULSU\0"
650 "RISCVISD::WRITE_CSR\0"
651 "RISCVISD::WSLA\0"
652 "RISCVISD::WSLL\0"
653 "RISCVISD::WSUBA\0"
654 "RISCVISD::WSUBAU\0"
655 "RISCVISD::WSUBU\0"
656 "RISCVISD::XOR_VL\0"
657 "RISCVISD::ZIP\0"
658 ;
659#ifdef __GNUC__
660#pragma GCC diagnostic pop
661#endif
662
663static constexpr llvm::StringTable
664RISCVSDNodeNames = RISCVSDNodeNamesStorage;
665
666static const VTByHwModePair RISCVVTByHwModeTable[] = {
667 /* 0 */ {0, MVT::i32}, {1, MVT::i64},
668};
669
670static const SDTypeConstraint RISCVSDTypeConstraints[] = {
671 /* 0 */ {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32},
672 /* 4 */ {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32},
673 /* 7 */ {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
674 /* 13 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
675 /* 19 */ {SDTCisVT, 2, 0, 0, MVT::f64}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
676 /* 22 */ {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
677 /* 25 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
678 /* 29 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
679 /* 33 */ {SDTCisVT, 2, 0, 0, MVT::Untyped}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
680 /* 36 */ {SDTCisVT, 1, 0, 0, MVT::bf16}, {SDTCisVT, 0, 0, 2, 0},
681 /* 38 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
682 /* 41 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
683 /* 47 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
684 /* 51 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
685 /* 55 */ {SDTCisVT, 1, 0, 0, MVT::f32}, {SDTCisVT, 0, 0, 0, MVT::i64},
686 /* 57 */ {SDTCisVT, 2, 0, 0, MVT::i64}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i64},
687 /* 60 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::bf16},
688 /* 62 */ {SDTCisVT, 1, 0, 0, MVT::i64}, {SDTCisVT, 0, 0, 0, MVT::f32},
689 /* 64 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::f64},
690 /* 67 */ {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::v4i8},
691 /* 73 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::Untyped},
692 /* 76 */ {SDTCisPtrTy, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
693 /* 77 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
694 /* 86 */ {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
695 /* 90 */ {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
696 /* 93 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
697 /* 100 */ {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
698 /* 103 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
699 /* 107 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
700 /* 109 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
701 /* 116 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
702 /* 123 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
703 /* 130 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
704 /* 135 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
705 /* 145 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
706 /* 155 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
707 /* 165 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
708 /* 170 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
709 /* 180 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
710 /* 191 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
711 /* 195 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
712 /* 202 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
713 /* 211 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i16}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
714 /* 220 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i64}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
715 /* 226 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
716 /* 231 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
717 /* 236 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
718 /* 239 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
719 /* 244 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
720 /* 248 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
721 /* 253 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
722 /* 258 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 3, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSubVecOfVec, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
723 /* 265 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
724 /* 273 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSubVecOfVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
725 /* 281 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 2, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
726 /* 289 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
727 /* 297 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisEltOfVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
728 /* 305 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
729 /* 313 */ {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
730 /* 317 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
731 /* 321 */ {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
732 /* 323 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
733 /* 325 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
734 /* 329 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
735 /* 333 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
736 /* 339 */ {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
737 /* 343 */ {SDTCisInt, 4, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
738 /* 348 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
739 /* 351 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
740 /* 354 */ {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
741 /* 357 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
742 /* 365 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 3, 0, 0, MVT::i1}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
743 /* 372 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
744 /* 380 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
745 /* 387 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
746 /* 391 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
747 /* 399 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
748 /* 403 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
749 /* 408 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
750 /* 412 */ {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisVT, 2, 0, 0, MVT::Other}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
751 /* 415 */ {SDTCisVT, 0, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
752 /* 419 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1},
753 /* 421 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1},
754 /* 429 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
755 /* 432 */ {SDTCisSameAs, 4, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
756};
757
758static const SDNodeDesc RISCVSDNodeDescs[] = {
759 {1, 5, 0, 0, 3, 1, 357, 8}, // ABDS_VL
760 {1, 5, 0, 0, 3, 19, 357, 8}, // ABDU_VL
761 {1, 1, 0, 0, 0, 37, 323, 2}, // ABSW
762 {1, 4, 0, 0, 3, 52, 365, 7}, // ABS_VL
763 {2, 4, 0, 0, 0, 69, 13, 6}, // ADDD
764 {1, 2, 0, 0, 0, 84, 351, 3}, // ADD_LO
765 {1, 3, 0, 0, 0, 101, 387, 4}, // ADD_TPREL
766 {1, 5, 0, 0, 3, 121, 357, 8}, // ADD_VL
767 {1, 5, 0, 0, 3, 138, 357, 8}, // AND_VL
768 {1, 2, 0, 0, 0, 155, 351, 3}, // ASUB
769 {1, 2, 0, 0, 0, 170, 351, 3}, // ASUBU
770 {1, 5, 0, 0, 3, 186, 357, 8}, // AVGCEILS_VL
771 {1, 5, 0, 0, 3, 208, 357, 8}, // AVGCEILU_VL
772 {1, 5, 0, 0, 3, 230, 357, 8}, // AVGFLOORS_VL
773 {1, 5, 0, 0, 3, 253, 357, 8}, // AVGFLOORU_VL
774 {1, 4, 0, 0, 3, 276, 365, 7}, // BITREVERSE_VL
775 {1, 1, 0, 0, 0, 300, 327, 2}, // BREV8
776 {0, 4, 0|1<<SDNPHasChain, 0, 0, 316, 412, 3}, // BR_CC
777 {1, 4, 0, 0, 3, 332, 365, 7}, // BSWAP_VL
778 {1, 2, 0, 0, 0, 351, 73, 3}, // BuildGPRPair
779 {1, 2, 0, 0, 0, 374, 64, 3}, // BuildPairF64
780 {1, 2, 0, 0, 0, 397, 236, 3}, // BuildPairGPRVec
781 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 423, 32, 1}, // CALL
782 {0, 2, 0|1<<SDNPHasChain, 0, 0, 438, 91, 2}, // CLEAR_CSR
783 {1, 1, 0, 0, 0, 458, 323, 2}, // CLSW
784 {1, 1, 0, 0, 0, 473, 323, 2}, // CLZW
785 {1, 4, 0, 0, 3, 488, 365, 7}, // CTLZ_VL
786 {1, 4, 0, 0, 3, 506, 365, 7}, // CTPOP_VL
787 {1, 4, 0, 0, 3, 525, 365, 7}, // CTTZ_VL
788 {1, 1, 0, 0, 0, 543, 323, 2}, // CTZW
789 {1, 2, 0, 0, 0, 558, 351, 3}, // CZERO_EQZ
790 {1, 2, 0, 0, 0, 578, 351, 3}, // CZERO_NEZ
791 {1, 2, 0, 0, 0, 598, 348, 3}, // DIVUW
792 {1, 2, 0, 0, 0, 614, 348, 3}, // DIVW
793 {1, 3, 0, 0, 2, 629, 333, 6}, // FABS_VL
794 {1, 5, 0, 0, 3, 647, 372, 8}, // FADD_VL
795 {1, 1, 0, 0, 0, 665, 39, 2}, // FCLASS
796 {1, 3, 0, 0, 2, 682, 77, 9}, // FCLASS_VL
797 {1, 5, 0, 0, 3, 702, 372, 8}, // FCOPYSIGN_VL
798 {1, 2, 0, 0, 0, 725, 57, 3}, // FCVT_WU_RV64
799 {1, 2, 0, 0, 0, 748, 57, 3}, // FCVT_W_RV64
800 {1, 2, 0, 0, 0, 770, 38, 3}, // FCVT_X
801 {1, 2, 0, 0, 0, 787, 38, 3}, // FCVT_XU
802 {1, 5, 0, 0, 3, 805, 372, 8}, // FDIV_VL
803 {1, 1, 0, 0, 0, 823, 107, 2}, // FLI
804 {1, 2, 0, 0, 0, 837, 354, 3}, // FMAX
805 {1, 2, 0, 0, 0, 852, 354, 3}, // FMIN
806 {1, 5, 0, 0, 3, 867, 372, 8}, // FMUL_VL
807 {1, 1, 0, 0, 0, 885, 107, 2}, // FMV_H_X
808 {1, 1, 0, 0, 0, 903, 62, 2}, // FMV_W_X_RV64
809 {1, 1, 0, 0, 0, 926, 39, 2}, // FMV_X_ANYEXTH
810 {1, 1, 0, 0, 0, 950, 55, 2}, // FMV_X_ANYEXTW_RV64
811 {1, 1, 0, 0, 0, 979, 39, 2}, // FMV_X_SIGNEXTH
812 {1, 3, 0, 0, 2, 1004, 333, 6}, // FNEG_VL
813 {1, 3, 0, 0, 2, 1022, 123, 7}, // FP_EXTEND_VL
814 {1, 3, 0, 0, 2, 1045, 116, 7}, // FP_ROUND_VL
815 {1, 3, 0, 0, 0, 1067, 103, 4}, // FROUND
816 {1, 2, 0, 0, 0, 1084, 104, 3}, // FSGNJX
817 {1, 3, 0, 0, 2, 1101, 333, 6}, // FSQRT_VL
818 {1, 5, 0, 0, 3, 1120, 372, 8}, // FSUB_VL
819 {1, 1, 0, 0, 0, 1138, 327, 2}, // HI
820 {2, 1, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1151, 22, 3}, // LD_RV32
821 {1, 1, 0, 0, 0, 1169, 327, 2}, // LLA
822 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1183, 32, 1}, // LPAD_CALL
823 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1203, 32, 1}, // LPAD_CALL_INDIRECT
824 {1, 3, 0, 0, 0, 1232, 86, 4}, // MERGE
825 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1248, 0, 0}, // MNRET_GLUE
826 {1, 2, 0, 0, 0, 1269, 87, 3}, // MOP_R
827 {1, 3, 0, 0, 0, 1285, 86, 4}, // MOP_RR
828 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1302, 0, 0}, // MRET_GLUE
829 {1, 2, 0, 0, 0, 1322, 351, 3}, // MULHR
830 {1, 2, 0, 0, 0, 1338, 351, 3}, // MULHRSU
831 {1, 2, 0, 0, 0, 1356, 351, 3}, // MULHRU
832 {1, 2, 0, 0, 0, 1373, 351, 3}, // MULHSU
833 {1, 5, 0, 0, 3, 1390, 357, 8}, // MULHS_VL
834 {1, 5, 0, 0, 3, 1409, 357, 8}, // MULHU_VL
835 {1, 5, 0, 0, 3, 1428, 357, 8}, // MUL_VL
836 {1, 1, 0, 0, 0, 1445, 60, 2}, // NDS_FMV_BF16_X
837 {1, 1, 0, 0, 0, 1470, 36, 2}, // NDS_FMV_X_ANYEXTBF16
838 {1, 1, 0, 0, 0, 1501, 327, 2}, // NEGW_MAX
839 {1, 3, 0, 0, 0, 1520, 0, 4}, // NSRA
840 {1, 3, 0, 0, 0, 1535, 0, 4}, // NSRL
841 {1, 1, 0, 0, 0, 1550, 327, 2}, // ORC_B
842 {1, 5, 0, 0, 3, 1566, 357, 8}, // OR_VL
843 {2, 4, 0, 0, 0, 1582, 67, 6}, // PPAIRE_DB
844 {0, 1, 0|1<<SDNPHasChain, 0, 0, 1602, 76, 1}, // PROBED_ALLOCA
845 {1, 2, 0, 0, 0, 1626, 199, 3}, // PSHL
846 {1, 2, 0, 0, 0, 1641, 199, 3}, // PSRA
847 {1, 2, 0, 0, 0, 1656, 199, 3}, // PSRL
848 {1, 2, 0, 0, 0, 1671, 199, 3}, // PSSHA
849 {1, 2, 0, 0, 0, 1687, 313, 4}, // PWMUL
850 {1, 2, 0, 0, 0, 1703, 313, 4}, // PWMULSU
851 {1, 2, 0, 0, 0, 1721, 313, 4}, // PWMULU
852 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1738, 0, 0}, // QC_C_MILEAVERET_GLUE
853 {1, 1, 0, 0, 0, 1769, 327, 2}, // QC_E_LI
854 {1, 4, 0, 0, 0, 1787, 343, 5}, // QC_INSB
855 {1, 3, 0, 0, 0, 1805, 339, 4}, // QC_MULIADD
856 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1826, 408, 4}, // QC_SETWMI
857 {2, 2, 0|1<<SDNPHasChain, 0, 0, 1846, 25, 4}, // READ_COUNTER_WIDE
858 {1, 1, 0|1<<SDNPHasChain, 0, 0, 1874, 91, 2}, // READ_CSR
859 {1, 0, 0, 0, 0, 1893, 32, 1}, // READ_VLENB
860 {1, 2, 0, 0, 0, 1914, 348, 3}, // REMUW
861 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1930, 0, 0}, // RET_GLUE
862 {1, 2, 0, 0, 0, 1949, 348, 3}, // ROLW
863 {1, 2, 0, 0, 0, 1964, 348, 3}, // RORW
864 {1, 5, 0, 0, 3, 1979, 357, 8}, // ROTL_VL
865 {1, 5, 0, 0, 3, 1997, 357, 8}, // ROTR_VL
866 {1, 5, 0, 0, 3, 2015, 357, 8}, // SADDSAT_VL
867 {1, 2, 0, 0, 0, 2036, 351, 3}, // SATI
868 {1, 5, 0, 0, 3, 2051, 357, 8}, // SDIV_VL
869 {0, 3, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 2069, 22, 3}, // SD_RV32
870 {1, 5, 0, 0, 0, 2087, 432, 4}, // SELECT_CC
871 {1, 6, 0, 0, 3, 2107, 421, 8}, // SETCC_VL
872 {0, 2, 0|1<<SDNPHasChain, 0, 0, 2126, 91, 2}, // SET_CSR
873 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2144, 47, 4}, // SF_VC_FVV_SE
874 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2167, 51, 4}, // SF_VC_FVW_SE
875 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2190, 415, 4}, // SF_VC_FV_SE
876 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2212, 47, 4}, // SF_VC_IVV_SE
877 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2235, 51, 4}, // SF_VC_IVW_SE
878 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2258, 415, 4}, // SF_VC_IV_SE
879 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2280, 47, 4}, // SF_VC_VVV_SE
880 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2303, 51, 4}, // SF_VC_VVW_SE
881 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2326, 415, 4}, // SF_VC_VV_SE
882 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2348, 239, 5}, // SF_VC_V_FVV_SE
883 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2373, 248, 5}, // SF_VC_V_FVW_SE
884 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2398, 244, 4}, // SF_VC_V_FV_SE
885 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2422, 239, 5}, // SF_VC_V_IVV_SE
886 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2447, 248, 5}, // SF_VC_V_IVW_SE
887 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2472, 244, 4}, // SF_VC_V_IV_SE
888 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2496, 253, 5}, // SF_VC_V_I_SE
889 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2519, 239, 5}, // SF_VC_V_VVV_SE
890 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2544, 248, 5}, // SF_VC_V_VVW_SE
891 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2569, 244, 4}, // SF_VC_V_VV_SE
892 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2593, 239, 5}, // SF_VC_V_XVV_SE
893 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2618, 248, 5}, // SF_VC_V_XVW_SE
894 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2643, 244, 4}, // SF_VC_V_XV_SE
895 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2667, 253, 5}, // SF_VC_V_X_SE
896 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2690, 47, 4}, // SF_VC_XVV_SE
897 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2713, 51, 4}, // SF_VC_XVW_SE
898 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2736, 415, 4}, // SF_VC_XV_SE
899 {1, 1, 0, 0, 0, 2758, 327, 2}, // SHA256SIG0
900 {1, 1, 0, 0, 0, 2779, 327, 2}, // SHA256SIG1
901 {1, 1, 0, 0, 0, 2800, 327, 2}, // SHA256SUM0
902 {1, 1, 0, 0, 0, 2821, 327, 2}, // SHA256SUM1
903 {1, 3, 0, 0, 0, 2842, 403, 5}, // SHL_ADD
904 {1, 5, 0, 0, 3, 2860, 357, 8}, // SHL_VL
905 {1, 3, 0, 0, 2, 2877, 110, 6}, // SINT_TO_FP_VL
906 {1, 2, 0, 0, 0, 2901, 348, 3}, // SLLW
907 {1, 1, 0, 0, 0, 2916, 327, 2}, // SM3P0
908 {1, 1, 0, 0, 0, 2932, 327, 2}, // SM3P1
909 {1, 3, 0, 0, 0, 2948, 29, 4}, // SM4ED
910 {1, 3, 0, 0, 0, 2964, 29, 4}, // SM4KS
911 {1, 5, 0, 0, 3, 2980, 357, 8}, // SMAX_VL
912 {1, 5, 0, 0, 3, 2998, 357, 8}, // SMIN_VL
913 {1, 4, 0, 0, 0, 3016, 220, 6}, // SPLAT_VECTOR_SPLIT_I64_VL
914 {1, 2, 0, 0, 0, 3052, 348, 3}, // SRAW
915 {1, 5, 0, 0, 3, 3067, 357, 8}, // SRA_VL
916 {1, 5, 0, 0, 3, 3084, 357, 8}, // SREM_VL
917 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 3102, 0, 0}, // SRET_GLUE
918 {1, 2, 0, 0, 0, 3122, 348, 3}, // SRLW
919 {1, 5, 0, 0, 3, 3137, 357, 8}, // SRL_VL
920 {1, 5, 0, 0, 3, 3154, 357, 8}, // SSUBSAT_VL
921 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3175, 372, 8}, // STRICT_FADD_VL
922 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 3200, 57, 3}, // STRICT_FCVT_WU_RV64
923 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 3230, 57, 3}, // STRICT_FCVT_W_RV64
924 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3259, 372, 8}, // STRICT_FDIV_VL
925 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3284, 372, 8}, // STRICT_FMUL_VL
926 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3309, 123, 7}, // STRICT_FP_EXTEND_VL
927 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3339, 116, 7}, // STRICT_FP_ROUND_VL
928 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3368, 421, 8}, // STRICT_FSETCCS_VL
929 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3396, 421, 8}, // STRICT_FSETCC_VL
930 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3423, 333, 6}, // STRICT_FSQRT_VL
931 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3449, 372, 8}, // STRICT_FSUB_VL
932 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3474, 110, 6}, // STRICT_SINT_TO_FP_VL
933 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3505, 110, 6}, // STRICT_UINT_TO_FP_VL
934 {1, 4, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3536, 93, 7}, // STRICT_VFCVT_RM_X_F_VL
935 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3569, 94, 6}, // STRICT_VFCVT_RTZ_XU_F_VL
936 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3604, 94, 6}, // STRICT_VFCVT_RTZ_X_F_VL
937 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3638, 391, 8}, // STRICT_VFMADD_VL
938 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3665, 391, 8}, // STRICT_VFMSUB_VL
939 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3692, 116, 7}, // STRICT_VFNCVT_ROD_VL
940 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3723, 391, 8}, // STRICT_VFNMADD_VL
941 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3751, 391, 8}, // STRICT_VFNMSUB_VL
942 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3779, 333, 6}, // STRICT_VFROUND_NOEXCEPT_VL
943 {2, 4, 0, 0, 0, 3816, 13, 6}, // SUBD
944 {1, 5, 0, 0, 3, 3831, 357, 8}, // SUB_VL
945 {1, 2, 0|1<<SDNPHasChain, 0, 0, 3848, 90, 3}, // SWAP_CSR
946 {0, 1, 0|1<<SDNPHasChain, 0, 0, 3867, 76, 1}, // SW_GUARDED_BRIND
947 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 3894, 32, 1}, // SW_GUARDED_CALL
948 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 3920, 32, 1}, // SW_GUARDED_TAIL
949 {2, 1, 0, 0, 0, 3946, 19, 3}, // SplitF64
950 {2, 1, 0, 0, 0, 3965, 33, 3}, // SplitGPRPair
951 {2, 1, 0, 0, 0, 3988, 4, 3}, // SplitGPRVec
952 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 4010, 32, 1}, // TAIL
953 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4025, 408, 4}, // TH_LDD
954 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4042, 408, 4}, // TH_LWD
955 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4059, 408, 4}, // TH_LWUD
956 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4077, 408, 4}, // TH_SDD
957 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4094, 408, 4}, // TH_SWD
958 {1, 3, 0, 0, 2, 4111, 226, 5}, // TRUNCATE_VECTOR_VL
959 {1, 3, 0, 0, 2, 4140, 226, 5}, // TRUNCATE_VECTOR_VL_SSAT
960 {1, 3, 0, 0, 2, 4174, 226, 5}, // TRUNCATE_VECTOR_VL_USAT
961 {1, 2, 0, 0, 0, 4208, 321, 2}, // TUPLE_EXTRACT
962 {1, 3, 0, 0, 0, 4232, 429, 3}, // TUPLE_INSERT
963 {1, 5, 0, 0, 3, 4255, 357, 8}, // UADDSAT_VL
964 {1, 5, 0, 0, 3, 4276, 357, 8}, // UDIV_VL
965 {1, 3, 0, 0, 2, 4294, 110, 6}, // UINT_TO_FP_VL
966 {1, 5, 0, 0, 3, 4318, 357, 8}, // UMAX_VL
967 {1, 5, 0, 0, 3, 4336, 357, 8}, // UMIN_VL
968 {1, 1, 0, 0, 0, 4354, 327, 2}, // UNZIP
969 {1, 5, 0, 0, 3, 4370, 357, 8}, // UREM_VL
970 {1, 2, 0, 0, 0, 4388, 351, 3}, // USATI
971 {1, 5, 0, 0, 3, 4404, 357, 8}, // USUBSAT_VL
972 {1, 3, 0, 0, 2, 4425, 41, 6}, // VCPOP_VL
973 {1, 5, 0, 0, 3, 4444, 357, 8}, // VDOT4ASU_VL
974 {1, 5, 0, 0, 3, 4466, 357, 8}, // VDOT4AU_VL
975 {1, 5, 0, 0, 3, 4487, 357, 8}, // VDOT4A_VL
976 {1, 6, 0, 0, 2, 4507, 281, 8}, // VECREDUCE_ADD_VL
977 {1, 6, 0, 0, 2, 4534, 281, 8}, // VECREDUCE_AND_VL
978 {1, 6, 0, 0, 2, 4561, 281, 8}, // VECREDUCE_FADD_VL
979 {1, 6, 0, 0, 2, 4589, 281, 8}, // VECREDUCE_FMAX_VL
980 {1, 6, 0, 0, 2, 4617, 281, 8}, // VECREDUCE_FMIN_VL
981 {1, 6, 0, 0, 2, 4645, 281, 8}, // VECREDUCE_OR_VL
982 {1, 6, 0, 0, 2, 4671, 281, 8}, // VECREDUCE_SEQ_FADD_VL
983 {1, 6, 0, 0, 2, 4703, 281, 8}, // VECREDUCE_SMAX_VL
984 {1, 6, 0, 0, 2, 4731, 281, 8}, // VECREDUCE_SMIN_VL
985 {1, 6, 0, 0, 2, 4759, 281, 8}, // VECREDUCE_UMAX_VL
986 {1, 6, 0, 0, 2, 4787, 281, 8}, // VECREDUCE_UMIN_VL
987 {1, 6, 0, 0, 2, 4815, 281, 8}, // VECREDUCE_XOR_VL
988 {1, 4, 0, 0, 2, 4842, 109, 7}, // VFCVT_RM_F_XU_VL
989 {1, 4, 0, 0, 2, 4869, 109, 7}, // VFCVT_RM_F_X_VL
990 {1, 4, 0, 0, 2, 4895, 93, 7}, // VFCVT_RM_XU_F_VL
991 {1, 4, 0, 0, 2, 4922, 93, 7}, // VFCVT_RM_X_F_VL
992 {1, 3, 0, 0, 2, 4948, 94, 6}, // VFCVT_RTZ_XU_F_VL
993 {1, 3, 0, 0, 2, 4976, 94, 6}, // VFCVT_RTZ_X_F_VL
994 {1, 3, 0, 0, 2, 5003, 41, 6}, // VFIRST_VL
995 {1, 5, 0, 0, 2, 5023, 391, 8}, // VFMADD_VL
996 {1, 5, 0, 0, 3, 5043, 372, 8}, // VFMAX_VL
997 {1, 5, 0, 0, 3, 5062, 372, 8}, // VFMIN_VL
998 {1, 5, 0, 0, 2, 5081, 391, 8}, // VFMSUB_VL
999 {1, 3, 0, 0, 0, 5101, 329, 4}, // VFMV_S_F_VL
1000 {1, 3, 0, 0, 0, 5123, 165, 5}, // VFMV_V_F_VL
1001 {1, 3, 0, 0, 2, 5145, 116, 7}, // VFNCVT_ROD_VL
1002 {1, 5, 0, 0, 2, 5169, 391, 8}, // VFNMADD_VL
1003 {1, 5, 0, 0, 2, 5190, 391, 8}, // VFNMSUB_VL
1004 {1, 3, 0, 0, 2, 5211, 333, 6}, // VFROUND_NOEXCEPT_VL
1005 {1, 5, 0, 0, 2, 5241, 297, 8}, // VFSLIDE1DOWN_VL
1006 {1, 5, 0, 0, 2, 5267, 297, 8}, // VFSLIDE1UP_VL
1007 {1, 5, 0, 0, 3, 5291, 170, 10}, // VFWADD_VL
1008 {1, 5, 0, 0, 3, 5311, 155, 10}, // VFWADD_W_VL
1009 {1, 5, 0, 0, 2, 5333, 180, 11}, // VFWMADD_VL
1010 {1, 5, 0, 0, 2, 5354, 180, 11}, // VFWMSUB_VL
1011 {1, 5, 0, 0, 3, 5375, 170, 10}, // VFWMUL_VL
1012 {1, 5, 0, 0, 2, 5395, 180, 11}, // VFWNMADD_VL
1013 {1, 5, 0, 0, 2, 5417, 180, 11}, // VFWNMSUB_VL
1014 {1, 5, 0, 0, 3, 5439, 170, 10}, // VFWSUB_VL
1015 {1, 5, 0, 0, 3, 5459, 155, 10}, // VFWSUB_W_VL
1016 {1, 2, 0, 0, 2, 5481, 317, 4}, // VID_VL
1017 {1, 3, 0, 0, 0, 5498, 399, 4}, // VMAND_VL
1018 {1, 1, 0, 0, 0, 5517, 419, 2}, // VMCLR_VL
1019 {1, 5, 0, 0, 1, 5536, 265, 8}, // VMERGE_VL
1020 {1, 3, 0, 0, 0, 5556, 399, 4}, // VMOR_VL
1021 {1, 1, 0, 0, 0, 5574, 419, 2}, // VMSET_VL
1022 {1, 3, 0, 0, 0, 5593, 325, 4}, // VMV_S_X_VL
1023 {1, 3, 0, 0, 0, 5614, 191, 4}, // VMV_V_V_VL
1024 {1, 3, 0, 0, 0, 5635, 130, 5}, // VMV_V_X_VL
1025 {1, 1, 0, 0, 0, 5656, 100, 3}, // VMV_X_S
1026 {1, 3, 0, 0, 0, 5674, 399, 4}, // VMXOR_VL
1027 {1, 5, 0, 0, 3, 5693, 380, 7}, // VPAIRE_VL
1028 {1, 5, 0, 0, 3, 5713, 380, 7}, // VPAIRO_VL
1029 {1, 5, 0, 0, 2, 5733, 211, 9}, // VRGATHEREI16_VV_VL
1030 {1, 5, 0, 0, 2, 5762, 202, 9}, // VRGATHER_VV_VL
1031 {1, 5, 0, 0, 2, 5787, 195, 7}, // VRGATHER_VX_VL
1032 {1, 3, 0, 0, 2, 5812, 231, 5}, // VSEXT_VL
1033 {1, 5, 0, 0, 2, 5831, 289, 8}, // VSLIDE1DOWN_VL
1034 {1, 5, 0, 0, 2, 5856, 289, 8}, // VSLIDE1UP_VL
1035 {1, 6, 0, 0, 2, 5879, 305, 8}, // VSLIDEDOWN_VL
1036 {1, 6, 0, 0, 2, 5903, 305, 8}, // VSLIDEUP_VL
1037 {1, 4, 0, 0, 3, 5925, 258, 7}, // VUNZIPE_VL
1038 {1, 4, 0, 0, 3, 5946, 258, 7}, // VUNZIPO_VL
1039 {1, 5, 0, 0, 3, 5967, 145, 10}, // VWABDAU_VL
1040 {1, 5, 0, 0, 3, 5988, 145, 10}, // VWABDA_VL
1041 {1, 5, 0, 0, 3, 6008, 145, 10}, // VWADDU_VL
1042 {1, 5, 0, 0, 3, 6028, 135, 10}, // VWADDU_W_VL
1043 {1, 5, 0, 0, 3, 6050, 145, 10}, // VWADD_VL
1044 {1, 5, 0, 0, 3, 6069, 135, 10}, // VWADD_W_VL
1045 {1, 5, 0, 0, 2, 6090, 145, 10}, // VWMACCSU_VL
1046 {1, 5, 0, 0, 2, 6112, 145, 10}, // VWMACCU_VL
1047 {1, 5, 0, 0, 2, 6133, 145, 10}, // VWMACC_VL
1048 {1, 5, 0, 0, 3, 6153, 145, 10}, // VWMULSU_VL
1049 {1, 5, 0, 0, 3, 6174, 145, 10}, // VWMULU_VL
1050 {1, 5, 0, 0, 3, 6194, 145, 10}, // VWMUL_VL
1051 {1, 5, 0, 0, 3, 6213, 145, 10}, // VWSLL_VL
1052 {1, 5, 0, 0, 3, 6232, 145, 10}, // VWSUBU_VL
1053 {1, 5, 0, 0, 3, 6252, 135, 10}, // VWSUBU_W_VL
1054 {1, 5, 0, 0, 3, 6274, 145, 10}, // VWSUB_VL
1055 {1, 5, 0, 0, 3, 6293, 135, 10}, // VWSUB_W_VL
1056 {1, 3, 0, 0, 2, 6314, 231, 5}, // VZEXT_VL
1057 {1, 5, 0, 0, 3, 6333, 273, 8}, // VZIP_VL
1058 {2, 4, 0, 0, 0, 6351, 7, 6}, // WADDA
1059 {2, 4, 0, 0, 0, 6367, 7, 6}, // WADDAU
1060 {2, 2, 0, 0, 0, 6384, 387, 4}, // WADDU
1061 {2, 2, 0, 0, 0, 6400, 387, 4}, // WMULSU
1062 {0, 2, 0|1<<SDNPHasChain, 0, 0, 6417, 91, 2}, // WRITE_CSR
1063 {2, 2, 0, 0, 0, 6437, 0, 4}, // WSLA
1064 {2, 2, 0, 0, 0, 6452, 0, 4}, // WSLL
1065 {2, 4, 0, 0, 0, 6467, 7, 6}, // WSUBA
1066 {2, 4, 0, 0, 0, 6483, 7, 6}, // WSUBAU
1067 {2, 2, 0, 0, 0, 6500, 387, 4}, // WSUBU
1068 {1, 5, 0, 0, 3, 6516, 357, 8}, // XOR_VL
1069 {1, 1, 0, 0, 0, 6533, 327, 2}, // ZIP
1070};
1071
1072static const SDNodeInfo RISCVGenSDNodeInfo(
1073 /*NumOpcodes=*/311, RISCVSDNodeDescs, RISCVSDNodeNames,
1074 RISCVVTByHwModeTable, RISCVSDTypeConstraints);
1075
1076} // namespace llvm
1077
1078#endif // GET_SDNODE_DESC
1079
1080