1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target SDNode descriptions *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: RISCV.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10#ifdef GET_SDNODE_ENUM
11#undef GET_SDNODE_ENUM
12
13namespace llvm::RISCVISD {
14
15enum GenNodeType : unsigned {
16 ABDS_VL = ISD::BUILTIN_OP_END,
17 ABDU_VL,
18 ABSW,
19 ABS_VL,
20 ADDD,
21 ADD_LO,
22 ADD_TPREL,
23 ADD_VL,
24 AND_VL,
25 ASUB,
26 ASUBU,
27 AVGCEILS_VL,
28 AVGCEILU_VL,
29 AVGFLOORS_VL,
30 AVGFLOORU_VL,
31 BITREVERSE_VL,
32 BREV8,
33 BR_CC,
34 BSWAP_VL,
35 BuildGPRPair,
36 BuildPairF64,
37 CALL,
38 CLEAR_CSR,
39 CLSW,
40 CLZW,
41 CTLZ_VL,
42 CTPOP_VL,
43 CTTZ_VL,
44 CTZW,
45 CZERO_EQZ,
46 CZERO_NEZ,
47 DIVUW,
48 DIVW,
49 FABS_VL,
50 FADD_VL,
51 FCLASS,
52 FCLASS_VL,
53 FCOPYSIGN_VL,
54 FCVT_WU_RV64,
55 FCVT_W_RV64,
56 FCVT_X,
57 FCVT_XU,
58 FDIV_VL,
59 FLI,
60 FMAX,
61 FMIN,
62 FMUL_VL,
63 FMV_H_X,
64 FMV_W_X_RV64,
65 FMV_X_ANYEXTH,
66 FMV_X_ANYEXTW_RV64,
67 FMV_X_SIGNEXTH,
68 FNEG_VL,
69 FP_EXTEND_VL,
70 FP_ROUND_VL,
71 FROUND,
72 FSGNJX,
73 FSQRT_VL,
74 FSUB_VL,
75 HI,
76 LD_RV32,
77 LLA,
78 MERGE,
79 MNRET_GLUE,
80 MOP_R,
81 MOP_RR,
82 MRET_GLUE,
83 MULHR,
84 MULHRSU,
85 MULHRU,
86 MULHSU,
87 MULHS_VL,
88 MULHU_VL,
89 MUL_VL,
90 NDS_FMV_BF16_X,
91 NDS_FMV_X_ANYEXTBF16,
92 NEGW_MAX,
93 NSRA,
94 NSRL,
95 ORC_B,
96 OR_VL,
97 PPAIRE_DB,
98 PROBED_ALLOCA,
99 QC_C_MILEAVERET_GLUE,
100 QC_E_LI,
101 QC_INSB,
102 QC_SETWMI,
103 READ_COUNTER_WIDE,
104 READ_CSR,
105 READ_VLENB,
106 REMUW,
107 RET_GLUE,
108 RI_VEXTRACT,
109 RI_VINSERT_VL,
110 RI_VUNZIP2A_VL,
111 RI_VUNZIP2B_VL,
112 RI_VZIP2A_VL,
113 RI_VZIP2B_VL,
114 RI_VZIPEVEN_VL,
115 RI_VZIPODD_VL,
116 ROLW,
117 RORW,
118 ROTL_VL,
119 ROTR_VL,
120 SADDSAT_VL,
121 SDIV_VL,
122 SD_RV32,
123 SELECT_CC,
124 SETCC_VL,
125 SET_CSR,
126 SF_VC_FVV_SE,
127 SF_VC_FVW_SE,
128 SF_VC_FV_SE,
129 SF_VC_IVV_SE,
130 SF_VC_IVW_SE,
131 SF_VC_IV_SE,
132 SF_VC_VVV_SE,
133 SF_VC_VVW_SE,
134 SF_VC_VV_SE,
135 SF_VC_V_FVV_SE,
136 SF_VC_V_FVW_SE,
137 SF_VC_V_FV_SE,
138 SF_VC_V_IVV_SE,
139 SF_VC_V_IVW_SE,
140 SF_VC_V_IV_SE,
141 SF_VC_V_I_SE,
142 SF_VC_V_VVV_SE,
143 SF_VC_V_VVW_SE,
144 SF_VC_V_VV_SE,
145 SF_VC_V_XVV_SE,
146 SF_VC_V_XVW_SE,
147 SF_VC_V_XV_SE,
148 SF_VC_V_X_SE,
149 SF_VC_XVV_SE,
150 SF_VC_XVW_SE,
151 SF_VC_XV_SE,
152 SHA256SIG0,
153 SHA256SIG1,
154 SHA256SUM0,
155 SHA256SUM1,
156 SHL_ADD,
157 SHL_VL,
158 SINT_TO_FP_VL,
159 SLLW,
160 SM3P0,
161 SM3P1,
162 SM4ED,
163 SM4KS,
164 SMAX_VL,
165 SMIN_VL,
166 SPLAT_VECTOR_SPLIT_I64_VL,
167 SRAW,
168 SRA_VL,
169 SREM_VL,
170 SRET_GLUE,
171 SRLW,
172 SRL_VL,
173 SSUBSAT_VL,
174 STRICT_FADD_VL,
175 STRICT_FCVT_WU_RV64,
176 STRICT_FCVT_W_RV64,
177 STRICT_FDIV_VL,
178 STRICT_FMUL_VL,
179 STRICT_FP_EXTEND_VL,
180 STRICT_FP_ROUND_VL,
181 STRICT_FSETCCS_VL,
182 STRICT_FSETCC_VL,
183 STRICT_FSQRT_VL,
184 STRICT_FSUB_VL,
185 STRICT_SINT_TO_FP_VL,
186 STRICT_UINT_TO_FP_VL,
187 STRICT_VFCVT_RM_X_F_VL,
188 STRICT_VFCVT_RTZ_XU_F_VL,
189 STRICT_VFCVT_RTZ_X_F_VL,
190 STRICT_VFMADD_VL,
191 STRICT_VFMSUB_VL,
192 STRICT_VFNCVT_ROD_VL,
193 STRICT_VFNMADD_VL,
194 STRICT_VFNMSUB_VL,
195 STRICT_VFROUND_NOEXCEPT_VL,
196 SUBD,
197 SUB_VL,
198 SWAP_CSR,
199 SW_GUARDED_BRIND,
200 SW_GUARDED_CALL,
201 SW_GUARDED_TAIL,
202 SplitF64,
203 SplitGPRPair,
204 TAIL,
205 TH_LDD,
206 TH_LWD,
207 TH_LWUD,
208 TH_SDD,
209 TH_SWD,
210 TRUNCATE_VECTOR_VL,
211 TRUNCATE_VECTOR_VL_SSAT,
212 TRUNCATE_VECTOR_VL_USAT,
213 TUPLE_EXTRACT,
214 TUPLE_INSERT,
215 UADDSAT_VL,
216 UDIV_VL,
217 UINT_TO_FP_VL,
218 UMAX_VL,
219 UMIN_VL,
220 UNZIP,
221 UREM_VL,
222 USUBSAT_VL,
223 VCPOP_VL,
224 VDOTA4SU_VL,
225 VDOTA4U_VL,
226 VDOTA4_VL,
227 VECREDUCE_ADD_VL,
228 VECREDUCE_AND_VL,
229 VECREDUCE_FADD_VL,
230 VECREDUCE_FMAX_VL,
231 VECREDUCE_FMIN_VL,
232 VECREDUCE_OR_VL,
233 VECREDUCE_SEQ_FADD_VL,
234 VECREDUCE_SMAX_VL,
235 VECREDUCE_SMIN_VL,
236 VECREDUCE_UMAX_VL,
237 VECREDUCE_UMIN_VL,
238 VECREDUCE_XOR_VL,
239 VFCVT_RM_F_XU_VL,
240 VFCVT_RM_F_X_VL,
241 VFCVT_RM_XU_F_VL,
242 VFCVT_RM_X_F_VL,
243 VFCVT_RTZ_XU_F_VL,
244 VFCVT_RTZ_X_F_VL,
245 VFIRST_VL,
246 VFMADD_VL,
247 VFMAX_VL,
248 VFMIN_VL,
249 VFMSUB_VL,
250 VFMV_S_F_VL,
251 VFMV_V_F_VL,
252 VFNCVT_ROD_VL,
253 VFNMADD_VL,
254 VFNMSUB_VL,
255 VFROUND_NOEXCEPT_VL,
256 VFSLIDE1DOWN_VL,
257 VFSLIDE1UP_VL,
258 VFWADD_VL,
259 VFWADD_W_VL,
260 VFWMADD_VL,
261 VFWMSUB_VL,
262 VFWMUL_VL,
263 VFWNMADD_VL,
264 VFWNMSUB_VL,
265 VFWSUB_VL,
266 VFWSUB_W_VL,
267 VID_VL,
268 VMAND_VL,
269 VMCLR_VL,
270 VMERGE_VL,
271 VMOR_VL,
272 VMSET_VL,
273 VMV_S_X_VL,
274 VMV_V_V_VL,
275 VMV_V_X_VL,
276 VMV_X_S,
277 VMXOR_VL,
278 VRGATHEREI16_VV_VL,
279 VRGATHER_VV_VL,
280 VRGATHER_VX_VL,
281 VSEXT_VL,
282 VSLIDE1DOWN_VL,
283 VSLIDE1UP_VL,
284 VSLIDEDOWN_VL,
285 VSLIDEUP_VL,
286 VWABDAU_VL,
287 VWABDA_VL,
288 VWADDU_VL,
289 VWADDU_W_VL,
290 VWADD_VL,
291 VWADD_W_VL,
292 VWMACCSU_VL,
293 VWMACCU_VL,
294 VWMACC_VL,
295 VWMULSU_VL,
296 VWMULU_VL,
297 VWMUL_VL,
298 VWSLL_VL,
299 VWSUBU_VL,
300 VWSUBU_W_VL,
301 VWSUB_VL,
302 VWSUB_W_VL,
303 VZEXT_VL,
304 WADDAU,
305 WMULSU,
306 WRITE_CSR,
307 WSUBAU,
308 XOR_VL,
309 ZIP,
310};
311
312static constexpr unsigned GENERATED_OPCODE_END = ZIP + 1;
313
314} // namespace llvm::RISCVISD
315
316#endif // GET_SDNODE_ENUM
317
318#ifdef GET_SDNODE_DESC
319#undef GET_SDNODE_DESC
320
321namespace llvm {
322
323
324#ifdef __GNUC__
325#pragma GCC diagnostic push
326#pragma GCC diagnostic ignored "-Woverlength-strings"
327#endif
328static constexpr char RISCVSDNodeNamesStorage[] =
329 "\0"
330 "RISCVISD::ABDS_VL\0"
331 "RISCVISD::ABDU_VL\0"
332 "RISCVISD::ABSW\0"
333 "RISCVISD::ABS_VL\0"
334 "RISCVISD::ADDD\0"
335 "RISCVISD::ADD_LO\0"
336 "RISCVISD::ADD_TPREL\0"
337 "RISCVISD::ADD_VL\0"
338 "RISCVISD::AND_VL\0"
339 "RISCVISD::ASUB\0"
340 "RISCVISD::ASUBU\0"
341 "RISCVISD::AVGCEILS_VL\0"
342 "RISCVISD::AVGCEILU_VL\0"
343 "RISCVISD::AVGFLOORS_VL\0"
344 "RISCVISD::AVGFLOORU_VL\0"
345 "RISCVISD::BITREVERSE_VL\0"
346 "RISCVISD::BREV8\0"
347 "RISCVISD::BR_CC\0"
348 "RISCVISD::BSWAP_VL\0"
349 "RISCVISD::BuildGPRPair\0"
350 "RISCVISD::BuildPairF64\0"
351 "RISCVISD::CALL\0"
352 "RISCVISD::CLEAR_CSR\0"
353 "RISCVISD::CLSW\0"
354 "RISCVISD::CLZW\0"
355 "RISCVISD::CTLZ_VL\0"
356 "RISCVISD::CTPOP_VL\0"
357 "RISCVISD::CTTZ_VL\0"
358 "RISCVISD::CTZW\0"
359 "RISCVISD::CZERO_EQZ\0"
360 "RISCVISD::CZERO_NEZ\0"
361 "RISCVISD::DIVUW\0"
362 "RISCVISD::DIVW\0"
363 "RISCVISD::FABS_VL\0"
364 "RISCVISD::FADD_VL\0"
365 "RISCVISD::FCLASS\0"
366 "RISCVISD::FCLASS_VL\0"
367 "RISCVISD::FCOPYSIGN_VL\0"
368 "RISCVISD::FCVT_WU_RV64\0"
369 "RISCVISD::FCVT_W_RV64\0"
370 "RISCVISD::FCVT_X\0"
371 "RISCVISD::FCVT_XU\0"
372 "RISCVISD::FDIV_VL\0"
373 "RISCVISD::FLI\0"
374 "RISCVISD::FMAX\0"
375 "RISCVISD::FMIN\0"
376 "RISCVISD::FMUL_VL\0"
377 "RISCVISD::FMV_H_X\0"
378 "RISCVISD::FMV_W_X_RV64\0"
379 "RISCVISD::FMV_X_ANYEXTH\0"
380 "RISCVISD::FMV_X_ANYEXTW_RV64\0"
381 "RISCVISD::FMV_X_SIGNEXTH\0"
382 "RISCVISD::FNEG_VL\0"
383 "RISCVISD::FP_EXTEND_VL\0"
384 "RISCVISD::FP_ROUND_VL\0"
385 "RISCVISD::FROUND\0"
386 "RISCVISD::FSGNJX\0"
387 "RISCVISD::FSQRT_VL\0"
388 "RISCVISD::FSUB_VL\0"
389 "RISCVISD::HI\0"
390 "RISCVISD::LD_RV32\0"
391 "RISCVISD::LLA\0"
392 "RISCVISD::MERGE\0"
393 "RISCVISD::MNRET_GLUE\0"
394 "RISCVISD::MOP_R\0"
395 "RISCVISD::MOP_RR\0"
396 "RISCVISD::MRET_GLUE\0"
397 "RISCVISD::MULHR\0"
398 "RISCVISD::MULHRSU\0"
399 "RISCVISD::MULHRU\0"
400 "RISCVISD::MULHSU\0"
401 "RISCVISD::MULHS_VL\0"
402 "RISCVISD::MULHU_VL\0"
403 "RISCVISD::MUL_VL\0"
404 "RISCVISD::NDS_FMV_BF16_X\0"
405 "RISCVISD::NDS_FMV_X_ANYEXTBF16\0"
406 "RISCVISD::NEGW_MAX\0"
407 "RISCVISD::NSRA\0"
408 "RISCVISD::NSRL\0"
409 "RISCVISD::ORC_B\0"
410 "RISCVISD::OR_VL\0"
411 "RISCVISD::PPAIRE_DB\0"
412 "RISCVISD::PROBED_ALLOCA\0"
413 "RISCVISD::QC_C_MILEAVERET_GLUE\0"
414 "RISCVISD::QC_E_LI\0"
415 "RISCVISD::QC_INSB\0"
416 "RISCVISD::QC_SETWMI\0"
417 "RISCVISD::READ_COUNTER_WIDE\0"
418 "RISCVISD::READ_CSR\0"
419 "RISCVISD::READ_VLENB\0"
420 "RISCVISD::REMUW\0"
421 "RISCVISD::RET_GLUE\0"
422 "RISCVISD::RI_VEXTRACT\0"
423 "RISCVISD::RI_VINSERT_VL\0"
424 "RISCVISD::RI_VUNZIP2A_VL\0"
425 "RISCVISD::RI_VUNZIP2B_VL\0"
426 "RISCVISD::RI_VZIP2A_VL\0"
427 "RISCVISD::RI_VZIP2B_VL\0"
428 "RISCVISD::RI_VZIPEVEN_VL\0"
429 "RISCVISD::RI_VZIPODD_VL\0"
430 "RISCVISD::ROLW\0"
431 "RISCVISD::RORW\0"
432 "RISCVISD::ROTL_VL\0"
433 "RISCVISD::ROTR_VL\0"
434 "RISCVISD::SADDSAT_VL\0"
435 "RISCVISD::SDIV_VL\0"
436 "RISCVISD::SD_RV32\0"
437 "RISCVISD::SELECT_CC\0"
438 "RISCVISD::SETCC_VL\0"
439 "RISCVISD::SET_CSR\0"
440 "RISCVISD::SF_VC_FVV_SE\0"
441 "RISCVISD::SF_VC_FVW_SE\0"
442 "RISCVISD::SF_VC_FV_SE\0"
443 "RISCVISD::SF_VC_IVV_SE\0"
444 "RISCVISD::SF_VC_IVW_SE\0"
445 "RISCVISD::SF_VC_IV_SE\0"
446 "RISCVISD::SF_VC_VVV_SE\0"
447 "RISCVISD::SF_VC_VVW_SE\0"
448 "RISCVISD::SF_VC_VV_SE\0"
449 "RISCVISD::SF_VC_V_FVV_SE\0"
450 "RISCVISD::SF_VC_V_FVW_SE\0"
451 "RISCVISD::SF_VC_V_FV_SE\0"
452 "RISCVISD::SF_VC_V_IVV_SE\0"
453 "RISCVISD::SF_VC_V_IVW_SE\0"
454 "RISCVISD::SF_VC_V_IV_SE\0"
455 "RISCVISD::SF_VC_V_I_SE\0"
456 "RISCVISD::SF_VC_V_VVV_SE\0"
457 "RISCVISD::SF_VC_V_VVW_SE\0"
458 "RISCVISD::SF_VC_V_VV_SE\0"
459 "RISCVISD::SF_VC_V_XVV_SE\0"
460 "RISCVISD::SF_VC_V_XVW_SE\0"
461 "RISCVISD::SF_VC_V_XV_SE\0"
462 "RISCVISD::SF_VC_V_X_SE\0"
463 "RISCVISD::SF_VC_XVV_SE\0"
464 "RISCVISD::SF_VC_XVW_SE\0"
465 "RISCVISD::SF_VC_XV_SE\0"
466 "RISCVISD::SHA256SIG0\0"
467 "RISCVISD::SHA256SIG1\0"
468 "RISCVISD::SHA256SUM0\0"
469 "RISCVISD::SHA256SUM1\0"
470 "RISCVISD::SHL_ADD\0"
471 "RISCVISD::SHL_VL\0"
472 "RISCVISD::SINT_TO_FP_VL\0"
473 "RISCVISD::SLLW\0"
474 "RISCVISD::SM3P0\0"
475 "RISCVISD::SM3P1\0"
476 "RISCVISD::SM4ED\0"
477 "RISCVISD::SM4KS\0"
478 "RISCVISD::SMAX_VL\0"
479 "RISCVISD::SMIN_VL\0"
480 "RISCVISD::SPLAT_VECTOR_SPLIT_I64_VL\0"
481 "RISCVISD::SRAW\0"
482 "RISCVISD::SRA_VL\0"
483 "RISCVISD::SREM_VL\0"
484 "RISCVISD::SRET_GLUE\0"
485 "RISCVISD::SRLW\0"
486 "RISCVISD::SRL_VL\0"
487 "RISCVISD::SSUBSAT_VL\0"
488 "RISCVISD::STRICT_FADD_VL\0"
489 "RISCVISD::STRICT_FCVT_WU_RV64\0"
490 "RISCVISD::STRICT_FCVT_W_RV64\0"
491 "RISCVISD::STRICT_FDIV_VL\0"
492 "RISCVISD::STRICT_FMUL_VL\0"
493 "RISCVISD::STRICT_FP_EXTEND_VL\0"
494 "RISCVISD::STRICT_FP_ROUND_VL\0"
495 "RISCVISD::STRICT_FSETCCS_VL\0"
496 "RISCVISD::STRICT_FSETCC_VL\0"
497 "RISCVISD::STRICT_FSQRT_VL\0"
498 "RISCVISD::STRICT_FSUB_VL\0"
499 "RISCVISD::STRICT_SINT_TO_FP_VL\0"
500 "RISCVISD::STRICT_UINT_TO_FP_VL\0"
501 "RISCVISD::STRICT_VFCVT_RM_X_F_VL\0"
502 "RISCVISD::STRICT_VFCVT_RTZ_XU_F_VL\0"
503 "RISCVISD::STRICT_VFCVT_RTZ_X_F_VL\0"
504 "RISCVISD::STRICT_VFMADD_VL\0"
505 "RISCVISD::STRICT_VFMSUB_VL\0"
506 "RISCVISD::STRICT_VFNCVT_ROD_VL\0"
507 "RISCVISD::STRICT_VFNMADD_VL\0"
508 "RISCVISD::STRICT_VFNMSUB_VL\0"
509 "RISCVISD::STRICT_VFROUND_NOEXCEPT_VL\0"
510 "RISCVISD::SUBD\0"
511 "RISCVISD::SUB_VL\0"
512 "RISCVISD::SWAP_CSR\0"
513 "RISCVISD::SW_GUARDED_BRIND\0"
514 "RISCVISD::SW_GUARDED_CALL\0"
515 "RISCVISD::SW_GUARDED_TAIL\0"
516 "RISCVISD::SplitF64\0"
517 "RISCVISD::SplitGPRPair\0"
518 "RISCVISD::TAIL\0"
519 "RISCVISD::TH_LDD\0"
520 "RISCVISD::TH_LWD\0"
521 "RISCVISD::TH_LWUD\0"
522 "RISCVISD::TH_SDD\0"
523 "RISCVISD::TH_SWD\0"
524 "RISCVISD::TRUNCATE_VECTOR_VL\0"
525 "RISCVISD::TRUNCATE_VECTOR_VL_SSAT\0"
526 "RISCVISD::TRUNCATE_VECTOR_VL_USAT\0"
527 "RISCVISD::TUPLE_EXTRACT\0"
528 "RISCVISD::TUPLE_INSERT\0"
529 "RISCVISD::UADDSAT_VL\0"
530 "RISCVISD::UDIV_VL\0"
531 "RISCVISD::UINT_TO_FP_VL\0"
532 "RISCVISD::UMAX_VL\0"
533 "RISCVISD::UMIN_VL\0"
534 "RISCVISD::UNZIP\0"
535 "RISCVISD::UREM_VL\0"
536 "RISCVISD::USUBSAT_VL\0"
537 "RISCVISD::VCPOP_VL\0"
538 "RISCVISD::VDOTA4SU_VL\0"
539 "RISCVISD::VDOTA4U_VL\0"
540 "RISCVISD::VDOTA4_VL\0"
541 "RISCVISD::VECREDUCE_ADD_VL\0"
542 "RISCVISD::VECREDUCE_AND_VL\0"
543 "RISCVISD::VECREDUCE_FADD_VL\0"
544 "RISCVISD::VECREDUCE_FMAX_VL\0"
545 "RISCVISD::VECREDUCE_FMIN_VL\0"
546 "RISCVISD::VECREDUCE_OR_VL\0"
547 "RISCVISD::VECREDUCE_SEQ_FADD_VL\0"
548 "RISCVISD::VECREDUCE_SMAX_VL\0"
549 "RISCVISD::VECREDUCE_SMIN_VL\0"
550 "RISCVISD::VECREDUCE_UMAX_VL\0"
551 "RISCVISD::VECREDUCE_UMIN_VL\0"
552 "RISCVISD::VECREDUCE_XOR_VL\0"
553 "RISCVISD::VFCVT_RM_F_XU_VL\0"
554 "RISCVISD::VFCVT_RM_F_X_VL\0"
555 "RISCVISD::VFCVT_RM_XU_F_VL\0"
556 "RISCVISD::VFCVT_RM_X_F_VL\0"
557 "RISCVISD::VFCVT_RTZ_XU_F_VL\0"
558 "RISCVISD::VFCVT_RTZ_X_F_VL\0"
559 "RISCVISD::VFIRST_VL\0"
560 "RISCVISD::VFMADD_VL\0"
561 "RISCVISD::VFMAX_VL\0"
562 "RISCVISD::VFMIN_VL\0"
563 "RISCVISD::VFMSUB_VL\0"
564 "RISCVISD::VFMV_S_F_VL\0"
565 "RISCVISD::VFMV_V_F_VL\0"
566 "RISCVISD::VFNCVT_ROD_VL\0"
567 "RISCVISD::VFNMADD_VL\0"
568 "RISCVISD::VFNMSUB_VL\0"
569 "RISCVISD::VFROUND_NOEXCEPT_VL\0"
570 "RISCVISD::VFSLIDE1DOWN_VL\0"
571 "RISCVISD::VFSLIDE1UP_VL\0"
572 "RISCVISD::VFWADD_VL\0"
573 "RISCVISD::VFWADD_W_VL\0"
574 "RISCVISD::VFWMADD_VL\0"
575 "RISCVISD::VFWMSUB_VL\0"
576 "RISCVISD::VFWMUL_VL\0"
577 "RISCVISD::VFWNMADD_VL\0"
578 "RISCVISD::VFWNMSUB_VL\0"
579 "RISCVISD::VFWSUB_VL\0"
580 "RISCVISD::VFWSUB_W_VL\0"
581 "RISCVISD::VID_VL\0"
582 "RISCVISD::VMAND_VL\0"
583 "RISCVISD::VMCLR_VL\0"
584 "RISCVISD::VMERGE_VL\0"
585 "RISCVISD::VMOR_VL\0"
586 "RISCVISD::VMSET_VL\0"
587 "RISCVISD::VMV_S_X_VL\0"
588 "RISCVISD::VMV_V_V_VL\0"
589 "RISCVISD::VMV_V_X_VL\0"
590 "RISCVISD::VMV_X_S\0"
591 "RISCVISD::VMXOR_VL\0"
592 "RISCVISD::VRGATHEREI16_VV_VL\0"
593 "RISCVISD::VRGATHER_VV_VL\0"
594 "RISCVISD::VRGATHER_VX_VL\0"
595 "RISCVISD::VSEXT_VL\0"
596 "RISCVISD::VSLIDE1DOWN_VL\0"
597 "RISCVISD::VSLIDE1UP_VL\0"
598 "RISCVISD::VSLIDEDOWN_VL\0"
599 "RISCVISD::VSLIDEUP_VL\0"
600 "RISCVISD::VWABDAU_VL\0"
601 "RISCVISD::VWABDA_VL\0"
602 "RISCVISD::VWADDU_VL\0"
603 "RISCVISD::VWADDU_W_VL\0"
604 "RISCVISD::VWADD_VL\0"
605 "RISCVISD::VWADD_W_VL\0"
606 "RISCVISD::VWMACCSU_VL\0"
607 "RISCVISD::VWMACCU_VL\0"
608 "RISCVISD::VWMACC_VL\0"
609 "RISCVISD::VWMULSU_VL\0"
610 "RISCVISD::VWMULU_VL\0"
611 "RISCVISD::VWMUL_VL\0"
612 "RISCVISD::VWSLL_VL\0"
613 "RISCVISD::VWSUBU_VL\0"
614 "RISCVISD::VWSUBU_W_VL\0"
615 "RISCVISD::VWSUB_VL\0"
616 "RISCVISD::VWSUB_W_VL\0"
617 "RISCVISD::VZEXT_VL\0"
618 "RISCVISD::WADDAU\0"
619 "RISCVISD::WMULSU\0"
620 "RISCVISD::WRITE_CSR\0"
621 "RISCVISD::WSUBAU\0"
622 "RISCVISD::XOR_VL\0"
623 "RISCVISD::ZIP\0"
624 ;
625#ifdef __GNUC__
626#pragma GCC diagnostic pop
627#endif
628
629static constexpr llvm::StringTable
630RISCVSDNodeNames = RISCVSDNodeNamesStorage;
631
632static const VTByHwModePair RISCVVTByHwModeTable[] = {
633 /* 0 */ {0, MVT::i32}, {1, MVT::i64},
634};
635
636static const SDTypeConstraint RISCVSDTypeConstraints[] = {
637 /* 0 */ {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
638 /* 6 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
639 /* 12 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
640 /* 16 */ {SDTCisVT, 2, 0, 0, MVT::f64}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
641 /* 19 */ {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
642 /* 22 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
643 /* 26 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
644 /* 30 */ {SDTCisVT, 2, 0, 0, MVT::Untyped}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 2, 0},
645 /* 33 */ {SDTCisVT, 1, 0, 0, MVT::bf16}, {SDTCisVT, 0, 0, 2, 0},
646 /* 35 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
647 /* 38 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
648 /* 44 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
649 /* 48 */ {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 2, 0},
650 /* 52 */ {SDTCisVT, 1, 0, 0, MVT::f32}, {SDTCisVT, 0, 0, 0, MVT::i64},
651 /* 54 */ {SDTCisVT, 2, 0, 0, MVT::i64}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i64},
652 /* 57 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::bf16},
653 /* 59 */ {SDTCisVT, 1, 0, 0, MVT::i64}, {SDTCisVT, 0, 0, 0, MVT::f32},
654 /* 61 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::f64},
655 /* 64 */ {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::v4i8},
656 /* 70 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVT, 0, 0, 0, MVT::Untyped},
657 /* 73 */ {SDTCisPtrTy, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
658 /* 74 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
659 /* 83 */ {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
660 /* 87 */ {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
661 /* 90 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
662 /* 97 */ {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
663 /* 100 */ {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
664 /* 104 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
665 /* 108 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
666 /* 110 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
667 /* 117 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
668 /* 124 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
669 /* 131 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
670 /* 136 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
671 /* 146 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
672 /* 156 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 2, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
673 /* 166 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
674 /* 171 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
675 /* 181 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisOpSmallerThanOp, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
676 /* 192 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
677 /* 196 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
678 /* 203 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameSizeAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
679 /* 212 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i16}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
680 /* 221 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i64}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
681 /* 227 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
682 /* 232 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
683 /* 237 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
684 /* 242 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
685 /* 246 */ {SDTCisSameAs, 1, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
686 /* 251 */ {SDTCisSameAs, 1, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 2, 0}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
687 /* 256 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
688 /* 264 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 2, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
689 /* 272 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
690 /* 280 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisEltOfVec, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
691 /* 288 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
692 /* 296 */ {SDTCisVT, 2, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 1, 0, 0, MVT::i1}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
693 /* 300 */ {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
694 /* 302 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
695 /* 304 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisVT, 3, 0, 2, 0}, {SDTCisVT, 2, 0, 2, 0}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
696 /* 309 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisEltOfVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
697 /* 313 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 2, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
698 /* 319 */ {SDTCisInt, 4, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
699 /* 324 */ {SDTCisVT, 0, 0, 0, MVT::i64}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
700 /* 327 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
701 /* 330 */ {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
702 /* 333 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
703 /* 341 */ {SDTCisVT, 4, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 3, 0, 0, MVT::i1}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
704 /* 348 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
705 /* 356 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
706 /* 360 */ {SDTCisVT, 5, 0, 2, 0}, {SDTCisSameNumEltsAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 4, 0, 0, MVT::i1}, {SDTCisFP, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
707 /* 368 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
708 /* 372 */ {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
709 /* 377 */ {SDTCisVT, 3, 0, 2, 0}, {SDTCisPtrTy, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
710 /* 381 */ {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisVT, 2, 0, 0, MVT::Other}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
711 /* 384 */ {SDTCisVT, 0, 0, 2, 0}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
712 /* 388 */ {SDTCisVT, 1, 0, 2, 0}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1},
713 /* 390 */ {SDTCisVT, 6, 0, 2, 0}, {SDTCisSameAs, 0, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameNumEltsAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCVecEltisVT, 0, 0, 0, MVT::i1},
714 /* 398 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVec, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
715 /* 401 */ {SDTCisSameAs, 4, 5, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 4, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 3, 0, 0, MVT::Other}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
716};
717
718static const SDNodeDesc RISCVSDNodeDescs[] = {
719 {1, 5, 0, 0, 3, 1, 333, 8}, // ABDS_VL
720 {1, 5, 0, 0, 3, 19, 333, 8}, // ABDU_VL
721 {1, 1, 0, 0, 0, 37, 302, 2}, // ABSW
722 {1, 4, 0, 0, 3, 52, 341, 7}, // ABS_VL
723 {2, 4, 0, 0, 0, 69, 6, 6}, // ADDD
724 {1, 2, 0, 0, 0, 84, 327, 3}, // ADD_LO
725 {1, 3, 0, 0, 0, 101, 356, 4}, // ADD_TPREL
726 {1, 5, 0, 0, 3, 121, 333, 8}, // ADD_VL
727 {1, 5, 0, 0, 3, 138, 333, 8}, // AND_VL
728 {1, 2, 0, 0, 0, 155, 327, 3}, // ASUB
729 {1, 2, 0, 0, 0, 170, 327, 3}, // ASUBU
730 {1, 5, 0, 0, 3, 186, 333, 8}, // AVGCEILS_VL
731 {1, 5, 0, 0, 3, 208, 333, 8}, // AVGCEILU_VL
732 {1, 5, 0, 0, 3, 230, 333, 8}, // AVGFLOORS_VL
733 {1, 5, 0, 0, 3, 253, 333, 8}, // AVGFLOORU_VL
734 {1, 4, 0, 0, 3, 276, 341, 7}, // BITREVERSE_VL
735 {1, 1, 0, 0, 0, 300, 307, 2}, // BREV8
736 {0, 4, 0|1<<SDNPHasChain, 0, 0, 316, 381, 3}, // BR_CC
737 {1, 4, 0, 0, 3, 332, 341, 7}, // BSWAP_VL
738 {1, 2, 0, 0, 0, 351, 70, 3}, // BuildGPRPair
739 {1, 2, 0, 0, 0, 374, 61, 3}, // BuildPairF64
740 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 397, 29, 1}, // CALL
741 {0, 2, 0|1<<SDNPHasChain, 0, 0, 412, 88, 2}, // CLEAR_CSR
742 {1, 1, 0, 0, 0, 432, 302, 2}, // CLSW
743 {1, 1, 0, 0, 0, 447, 302, 2}, // CLZW
744 {1, 4, 0, 0, 3, 462, 341, 7}, // CTLZ_VL
745 {1, 4, 0, 0, 3, 480, 341, 7}, // CTPOP_VL
746 {1, 4, 0, 0, 3, 499, 341, 7}, // CTTZ_VL
747 {1, 1, 0, 0, 0, 517, 302, 2}, // CTZW
748 {1, 2, 0, 0, 0, 532, 327, 3}, // CZERO_EQZ
749 {1, 2, 0, 0, 0, 552, 327, 3}, // CZERO_NEZ
750 {1, 2, 0, 0, 0, 572, 324, 3}, // DIVUW
751 {1, 2, 0, 0, 0, 588, 324, 3}, // DIVW
752 {1, 3, 0, 0, 2, 603, 313, 6}, // FABS_VL
753 {1, 5, 0, 0, 3, 621, 348, 8}, // FADD_VL
754 {1, 1, 0, 0, 0, 639, 36, 2}, // FCLASS
755 {1, 3, 0, 0, 2, 656, 74, 9}, // FCLASS_VL
756 {1, 5, 0, 0, 3, 676, 348, 8}, // FCOPYSIGN_VL
757 {1, 2, 0, 0, 0, 699, 54, 3}, // FCVT_WU_RV64
758 {1, 2, 0, 0, 0, 722, 54, 3}, // FCVT_W_RV64
759 {1, 2, 0, 0, 0, 744, 35, 3}, // FCVT_X
760 {1, 2, 0, 0, 0, 761, 35, 3}, // FCVT_XU
761 {1, 5, 0, 0, 3, 779, 348, 8}, // FDIV_VL
762 {1, 1, 0, 0, 0, 797, 108, 2}, // FLI
763 {1, 2, 0, 0, 0, 811, 330, 3}, // FMAX
764 {1, 2, 0, 0, 0, 826, 330, 3}, // FMIN
765 {1, 5, 0, 0, 3, 841, 348, 8}, // FMUL_VL
766 {1, 1, 0, 0, 0, 859, 108, 2}, // FMV_H_X
767 {1, 1, 0, 0, 0, 877, 59, 2}, // FMV_W_X_RV64
768 {1, 1, 0, 0, 0, 900, 36, 2}, // FMV_X_ANYEXTH
769 {1, 1, 0, 0, 0, 924, 52, 2}, // FMV_X_ANYEXTW_RV64
770 {1, 1, 0, 0, 0, 953, 36, 2}, // FMV_X_SIGNEXTH
771 {1, 3, 0, 0, 2, 978, 313, 6}, // FNEG_VL
772 {1, 3, 0, 0, 2, 996, 124, 7}, // FP_EXTEND_VL
773 {1, 3, 0, 0, 2, 1019, 117, 7}, // FP_ROUND_VL
774 {1, 3, 0, 0, 0, 1041, 104, 4}, // FROUND
775 {1, 2, 0, 0, 0, 1058, 105, 3}, // FSGNJX
776 {1, 3, 0, 0, 2, 1075, 313, 6}, // FSQRT_VL
777 {1, 5, 0, 0, 3, 1094, 348, 8}, // FSUB_VL
778 {1, 1, 0, 0, 0, 1112, 307, 2}, // HI
779 {2, 1, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1125, 19, 3}, // LD_RV32
780 {1, 1, 0, 0, 0, 1143, 307, 2}, // LLA
781 {1, 3, 0, 0, 0, 1157, 83, 4}, // MERGE
782 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1173, 0, 0}, // MNRET_GLUE
783 {1, 2, 0, 0, 0, 1194, 84, 3}, // MOP_R
784 {1, 3, 0, 0, 0, 1210, 83, 4}, // MOP_RR
785 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1227, 0, 0}, // MRET_GLUE
786 {1, 2, 0, 0, 0, 1247, 327, 3}, // MULHR
787 {1, 2, 0, 0, 0, 1263, 327, 3}, // MULHRSU
788 {1, 2, 0, 0, 0, 1281, 327, 3}, // MULHRU
789 {1, 2, 0, 0, 0, 1298, 327, 3}, // MULHSU
790 {1, 5, 0, 0, 3, 1315, 333, 8}, // MULHS_VL
791 {1, 5, 0, 0, 3, 1334, 333, 8}, // MULHU_VL
792 {1, 5, 0, 0, 3, 1353, 333, 8}, // MUL_VL
793 {1, 1, 0, 0, 0, 1370, 57, 2}, // NDS_FMV_BF16_X
794 {1, 1, 0, 0, 0, 1395, 33, 2}, // NDS_FMV_X_ANYEXTBF16
795 {1, 1, 0, 0, 0, 1426, 307, 2}, // NEGW_MAX
796 {1, 3, 0, 0, 0, 1445, 12, 4}, // NSRA
797 {1, 3, 0, 0, 0, 1460, 12, 4}, // NSRL
798 {1, 1, 0, 0, 0, 1475, 307, 2}, // ORC_B
799 {1, 5, 0, 0, 3, 1491, 333, 8}, // OR_VL
800 {2, 4, 0, 0, 0, 1507, 64, 6}, // PPAIRE_DB
801 {0, 1, 0|1<<SDNPHasChain, 0, 0, 1527, 73, 1}, // PROBED_ALLOCA
802 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 1551, 0, 0}, // QC_C_MILEAVERET_GLUE
803 {1, 1, 0, 0, 0, 1582, 307, 2}, // QC_E_LI
804 {1, 4, 0, 0, 0, 1600, 319, 5}, // QC_INSB
805 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 1618, 377, 4}, // QC_SETWMI
806 {2, 2, 0|1<<SDNPHasChain, 0, 0, 1638, 22, 4}, // READ_COUNTER_WIDE
807 {1, 1, 0|1<<SDNPHasChain, 0, 0, 1666, 88, 2}, // READ_CSR
808 {1, 0, 0, 0, 0, 1685, 29, 1}, // READ_VLENB
809 {1, 2, 0, 0, 0, 1706, 324, 3}, // REMUW
810 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 1722, 0, 0}, // RET_GLUE
811 {1, 2, 0, 0, 0, 1741, 100, 4}, // RI_VEXTRACT
812 {1, 5, 0, 0, 0, 1763, 304, 5}, // RI_VINSERT_VL
813 {1, 5, 0, 0, 2, 1787, 333, 8}, // RI_VUNZIP2A_VL
814 {1, 5, 0, 0, 2, 1812, 333, 8}, // RI_VUNZIP2B_VL
815 {1, 5, 0, 0, 2, 1837, 333, 8}, // RI_VZIP2A_VL
816 {1, 5, 0, 0, 2, 1860, 333, 8}, // RI_VZIP2B_VL
817 {1, 5, 0, 0, 2, 1883, 333, 8}, // RI_VZIPEVEN_VL
818 {1, 5, 0, 0, 2, 1908, 333, 8}, // RI_VZIPODD_VL
819 {1, 2, 0, 0, 0, 1932, 324, 3}, // ROLW
820 {1, 2, 0, 0, 0, 1947, 324, 3}, // RORW
821 {1, 5, 0, 0, 3, 1962, 333, 8}, // ROTL_VL
822 {1, 5, 0, 0, 3, 1980, 333, 8}, // ROTR_VL
823 {1, 5, 0, 0, 3, 1998, 333, 8}, // SADDSAT_VL
824 {1, 5, 0, 0, 3, 2019, 333, 8}, // SDIV_VL
825 {0, 3, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 2037, 19, 3}, // SD_RV32
826 {1, 5, 0, 0, 0, 2055, 401, 4}, // SELECT_CC
827 {1, 6, 0, 0, 3, 2075, 390, 8}, // SETCC_VL
828 {0, 2, 0|1<<SDNPHasChain, 0, 0, 2094, 88, 2}, // SET_CSR
829 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2112, 44, 4}, // SF_VC_FVV_SE
830 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2135, 48, 4}, // SF_VC_FVW_SE
831 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2158, 384, 4}, // SF_VC_FV_SE
832 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2180, 44, 4}, // SF_VC_IVV_SE
833 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2203, 48, 4}, // SF_VC_IVW_SE
834 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2226, 384, 4}, // SF_VC_IV_SE
835 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2248, 44, 4}, // SF_VC_VVV_SE
836 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2271, 48, 4}, // SF_VC_VVW_SE
837 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2294, 384, 4}, // SF_VC_VV_SE
838 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2316, 237, 5}, // SF_VC_V_FVV_SE
839 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2341, 246, 5}, // SF_VC_V_FVW_SE
840 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2366, 242, 4}, // SF_VC_V_FV_SE
841 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2390, 237, 5}, // SF_VC_V_IVV_SE
842 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2415, 246, 5}, // SF_VC_V_IVW_SE
843 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2440, 242, 4}, // SF_VC_V_IV_SE
844 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2464, 251, 5}, // SF_VC_V_I_SE
845 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2487, 237, 5}, // SF_VC_V_VVV_SE
846 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2512, 246, 5}, // SF_VC_V_VVW_SE
847 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2537, 242, 4}, // SF_VC_V_VV_SE
848 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2561, 237, 5}, // SF_VC_V_XVV_SE
849 {1, 5, 0|1<<SDNPHasChain, 0, 0, 2586, 246, 5}, // SF_VC_V_XVW_SE
850 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2611, 242, 4}, // SF_VC_V_XV_SE
851 {1, 4, 0|1<<SDNPHasChain, 0, 0, 2635, 251, 5}, // SF_VC_V_X_SE
852 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2658, 44, 4}, // SF_VC_XVV_SE
853 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2681, 48, 4}, // SF_VC_XVW_SE
854 {0, 5, 0|1<<SDNPHasChain, 0, 0, 2704, 384, 4}, // SF_VC_XV_SE
855 {1, 1, 0, 0, 0, 2726, 307, 2}, // SHA256SIG0
856 {1, 1, 0, 0, 0, 2747, 307, 2}, // SHA256SIG1
857 {1, 1, 0, 0, 0, 2768, 307, 2}, // SHA256SUM0
858 {1, 1, 0, 0, 0, 2789, 307, 2}, // SHA256SUM1
859 {1, 3, 0, 0, 0, 2810, 372, 5}, // SHL_ADD
860 {1, 5, 0, 0, 3, 2828, 333, 8}, // SHL_VL
861 {1, 3, 0, 0, 2, 2845, 111, 6}, // SINT_TO_FP_VL
862 {1, 2, 0, 0, 0, 2869, 324, 3}, // SLLW
863 {1, 1, 0, 0, 0, 2884, 307, 2}, // SM3P0
864 {1, 1, 0, 0, 0, 2900, 307, 2}, // SM3P1
865 {1, 3, 0, 0, 0, 2916, 26, 4}, // SM4ED
866 {1, 3, 0, 0, 0, 2932, 26, 4}, // SM4KS
867 {1, 5, 0, 0, 3, 2948, 333, 8}, // SMAX_VL
868 {1, 5, 0, 0, 3, 2966, 333, 8}, // SMIN_VL
869 {1, 4, 0, 0, 0, 2984, 221, 6}, // SPLAT_VECTOR_SPLIT_I64_VL
870 {1, 2, 0, 0, 0, 3020, 324, 3}, // SRAW
871 {1, 5, 0, 0, 3, 3035, 333, 8}, // SRA_VL
872 {1, 5, 0, 0, 3, 3052, 333, 8}, // SREM_VL
873 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue, 0, 0, 3070, 0, 0}, // SRET_GLUE
874 {1, 2, 0, 0, 0, 3090, 324, 3}, // SRLW
875 {1, 5, 0, 0, 3, 3105, 333, 8}, // SRL_VL
876 {1, 5, 0, 0, 3, 3122, 333, 8}, // SSUBSAT_VL
877 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3143, 348, 8}, // STRICT_FADD_VL
878 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 3168, 54, 3}, // STRICT_FCVT_WU_RV64
879 {1, 2, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 0, 3198, 54, 3}, // STRICT_FCVT_W_RV64
880 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3227, 348, 8}, // STRICT_FDIV_VL
881 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3252, 348, 8}, // STRICT_FMUL_VL
882 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3277, 124, 7}, // STRICT_FP_EXTEND_VL
883 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3307, 117, 7}, // STRICT_FP_ROUND_VL
884 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3336, 390, 8}, // STRICT_FSETCCS_VL
885 {1, 6, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3364, 390, 8}, // STRICT_FSETCC_VL
886 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3391, 313, 6}, // STRICT_FSQRT_VL
887 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 3, 3417, 348, 8}, // STRICT_FSUB_VL
888 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3442, 111, 6}, // STRICT_SINT_TO_FP_VL
889 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3473, 111, 6}, // STRICT_UINT_TO_FP_VL
890 {1, 4, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3504, 90, 7}, // STRICT_VFCVT_RM_X_F_VL
891 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3537, 91, 6}, // STRICT_VFCVT_RTZ_XU_F_VL
892 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3572, 91, 6}, // STRICT_VFCVT_RTZ_X_F_VL
893 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3606, 360, 8}, // STRICT_VFMADD_VL
894 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3633, 360, 8}, // STRICT_VFMSUB_VL
895 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3660, 117, 7}, // STRICT_VFNCVT_ROD_VL
896 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3691, 360, 8}, // STRICT_VFNMADD_VL
897 {1, 5, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3719, 360, 8}, // STRICT_VFNMSUB_VL
898 {1, 3, 0|1<<SDNPHasChain, 0|1<<SDNFIsStrictFP, 2, 3747, 313, 6}, // STRICT_VFROUND_NOEXCEPT_VL
899 {2, 4, 0, 0, 0, 3784, 6, 6}, // SUBD
900 {1, 5, 0, 0, 3, 3799, 333, 8}, // SUB_VL
901 {1, 2, 0|1<<SDNPHasChain, 0, 0, 3816, 87, 3}, // SWAP_CSR
902 {0, 1, 0|1<<SDNPHasChain, 0, 0, 3835, 73, 1}, // SW_GUARDED_BRIND
903 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 3862, 29, 1}, // SW_GUARDED_CALL
904 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 3888, 29, 1}, // SW_GUARDED_TAIL
905 {2, 1, 0, 0, 0, 3914, 16, 3}, // SplitF64
906 {2, 1, 0, 0, 0, 3933, 30, 3}, // SplitGPRPair
907 {0, -1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 3956, 29, 1}, // TAIL
908 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 3971, 377, 4}, // TH_LDD
909 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 3988, 377, 4}, // TH_LWD
910 {2, 2, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4005, 377, 4}, // TH_LWUD
911 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4023, 377, 4}, // TH_SDD
912 {0, 4, 0|1<<SDNPHasChain|1<<SDNPMemOperand, 0, 0, 4040, 377, 4}, // TH_SWD
913 {1, 3, 0, 0, 2, 4057, 227, 5}, // TRUNCATE_VECTOR_VL
914 {1, 3, 0, 0, 2, 4086, 227, 5}, // TRUNCATE_VECTOR_VL_SSAT
915 {1, 3, 0, 0, 2, 4120, 227, 5}, // TRUNCATE_VECTOR_VL_USAT
916 {1, 2, 0, 0, 0, 4154, 300, 2}, // TUPLE_EXTRACT
917 {1, 3, 0, 0, 0, 4178, 398, 3}, // TUPLE_INSERT
918 {1, 5, 0, 0, 3, 4201, 333, 8}, // UADDSAT_VL
919 {1, 5, 0, 0, 3, 4222, 333, 8}, // UDIV_VL
920 {1, 3, 0, 0, 2, 4240, 111, 6}, // UINT_TO_FP_VL
921 {1, 5, 0, 0, 3, 4264, 333, 8}, // UMAX_VL
922 {1, 5, 0, 0, 3, 4282, 333, 8}, // UMIN_VL
923 {1, 1, 0, 0, 0, 4300, 307, 2}, // UNZIP
924 {1, 5, 0, 0, 3, 4316, 333, 8}, // UREM_VL
925 {1, 5, 0, 0, 3, 4334, 333, 8}, // USUBSAT_VL
926 {1, 3, 0, 0, 2, 4355, 38, 6}, // VCPOP_VL
927 {1, 5, 0, 0, 3, 4374, 333, 8}, // VDOTA4SU_VL
928 {1, 5, 0, 0, 3, 4396, 333, 8}, // VDOTA4U_VL
929 {1, 5, 0, 0, 3, 4417, 333, 8}, // VDOTA4_VL
930 {1, 6, 0, 0, 2, 4437, 264, 8}, // VECREDUCE_ADD_VL
931 {1, 6, 0, 0, 2, 4464, 264, 8}, // VECREDUCE_AND_VL
932 {1, 6, 0, 0, 2, 4491, 264, 8}, // VECREDUCE_FADD_VL
933 {1, 6, 0, 0, 2, 4519, 264, 8}, // VECREDUCE_FMAX_VL
934 {1, 6, 0, 0, 2, 4547, 264, 8}, // VECREDUCE_FMIN_VL
935 {1, 6, 0, 0, 2, 4575, 264, 8}, // VECREDUCE_OR_VL
936 {1, 6, 0, 0, 2, 4601, 264, 8}, // VECREDUCE_SEQ_FADD_VL
937 {1, 6, 0, 0, 2, 4633, 264, 8}, // VECREDUCE_SMAX_VL
938 {1, 6, 0, 0, 2, 4661, 264, 8}, // VECREDUCE_SMIN_VL
939 {1, 6, 0, 0, 2, 4689, 264, 8}, // VECREDUCE_UMAX_VL
940 {1, 6, 0, 0, 2, 4717, 264, 8}, // VECREDUCE_UMIN_VL
941 {1, 6, 0, 0, 2, 4745, 264, 8}, // VECREDUCE_XOR_VL
942 {1, 4, 0, 0, 2, 4772, 110, 7}, // VFCVT_RM_F_XU_VL
943 {1, 4, 0, 0, 2, 4799, 110, 7}, // VFCVT_RM_F_X_VL
944 {1, 4, 0, 0, 2, 4825, 90, 7}, // VFCVT_RM_XU_F_VL
945 {1, 4, 0, 0, 2, 4852, 90, 7}, // VFCVT_RM_X_F_VL
946 {1, 3, 0, 0, 2, 4878, 91, 6}, // VFCVT_RTZ_XU_F_VL
947 {1, 3, 0, 0, 2, 4906, 91, 6}, // VFCVT_RTZ_X_F_VL
948 {1, 3, 0, 0, 2, 4933, 38, 6}, // VFIRST_VL
949 {1, 5, 0, 0, 2, 4953, 360, 8}, // VFMADD_VL
950 {1, 5, 0, 0, 3, 4973, 348, 8}, // VFMAX_VL
951 {1, 5, 0, 0, 3, 4992, 348, 8}, // VFMIN_VL
952 {1, 5, 0, 0, 2, 5011, 360, 8}, // VFMSUB_VL
953 {1, 3, 0, 0, 0, 5031, 309, 4}, // VFMV_S_F_VL
954 {1, 3, 0, 0, 0, 5053, 166, 5}, // VFMV_V_F_VL
955 {1, 3, 0, 0, 2, 5075, 117, 7}, // VFNCVT_ROD_VL
956 {1, 5, 0, 0, 2, 5099, 360, 8}, // VFNMADD_VL
957 {1, 5, 0, 0, 2, 5120, 360, 8}, // VFNMSUB_VL
958 {1, 3, 0, 0, 2, 5141, 313, 6}, // VFROUND_NOEXCEPT_VL
959 {1, 5, 0, 0, 2, 5171, 280, 8}, // VFSLIDE1DOWN_VL
960 {1, 5, 0, 0, 2, 5197, 280, 8}, // VFSLIDE1UP_VL
961 {1, 5, 0, 0, 3, 5221, 171, 10}, // VFWADD_VL
962 {1, 5, 0, 0, 3, 5241, 156, 10}, // VFWADD_W_VL
963 {1, 5, 0, 0, 2, 5263, 181, 11}, // VFWMADD_VL
964 {1, 5, 0, 0, 2, 5284, 181, 11}, // VFWMSUB_VL
965 {1, 5, 0, 0, 3, 5305, 171, 10}, // VFWMUL_VL
966 {1, 5, 0, 0, 2, 5325, 181, 11}, // VFWNMADD_VL
967 {1, 5, 0, 0, 2, 5347, 181, 11}, // VFWNMSUB_VL
968 {1, 5, 0, 0, 3, 5369, 171, 10}, // VFWSUB_VL
969 {1, 5, 0, 0, 3, 5389, 156, 10}, // VFWSUB_W_VL
970 {1, 2, 0, 0, 2, 5411, 296, 4}, // VID_VL
971 {1, 3, 0, 0, 0, 5428, 368, 4}, // VMAND_VL
972 {1, 1, 0, 0, 0, 5447, 388, 2}, // VMCLR_VL
973 {1, 5, 0, 0, 1, 5466, 256, 8}, // VMERGE_VL
974 {1, 3, 0, 0, 0, 5486, 368, 4}, // VMOR_VL
975 {1, 1, 0, 0, 0, 5504, 388, 2}, // VMSET_VL
976 {1, 3, 0, 0, 0, 5523, 305, 4}, // VMV_S_X_VL
977 {1, 3, 0, 0, 0, 5544, 192, 4}, // VMV_V_V_VL
978 {1, 3, 0, 0, 0, 5565, 131, 5}, // VMV_V_X_VL
979 {1, 1, 0, 0, 0, 5586, 97, 3}, // VMV_X_S
980 {1, 3, 0, 0, 0, 5604, 368, 4}, // VMXOR_VL
981 {1, 5, 0, 0, 2, 5623, 212, 9}, // VRGATHEREI16_VV_VL
982 {1, 5, 0, 0, 2, 5652, 203, 9}, // VRGATHER_VV_VL
983 {1, 5, 0, 0, 2, 5677, 196, 7}, // VRGATHER_VX_VL
984 {1, 3, 0, 0, 2, 5702, 232, 5}, // VSEXT_VL
985 {1, 5, 0, 0, 2, 5721, 272, 8}, // VSLIDE1DOWN_VL
986 {1, 5, 0, 0, 2, 5746, 272, 8}, // VSLIDE1UP_VL
987 {1, 6, 0, 0, 2, 5769, 288, 8}, // VSLIDEDOWN_VL
988 {1, 6, 0, 0, 2, 5793, 288, 8}, // VSLIDEUP_VL
989 {1, 5, 0, 0, 3, 5815, 146, 10}, // VWABDAU_VL
990 {1, 5, 0, 0, 3, 5836, 146, 10}, // VWABDA_VL
991 {1, 5, 0, 0, 3, 5856, 146, 10}, // VWADDU_VL
992 {1, 5, 0, 0, 3, 5876, 136, 10}, // VWADDU_W_VL
993 {1, 5, 0, 0, 3, 5898, 146, 10}, // VWADD_VL
994 {1, 5, 0, 0, 3, 5917, 136, 10}, // VWADD_W_VL
995 {1, 5, 0, 0, 2, 5938, 146, 10}, // VWMACCSU_VL
996 {1, 5, 0, 0, 2, 5960, 146, 10}, // VWMACCU_VL
997 {1, 5, 0, 0, 2, 5981, 146, 10}, // VWMACC_VL
998 {1, 5, 0, 0, 3, 6001, 146, 10}, // VWMULSU_VL
999 {1, 5, 0, 0, 3, 6022, 146, 10}, // VWMULU_VL
1000 {1, 5, 0, 0, 3, 6042, 146, 10}, // VWMUL_VL
1001 {1, 5, 0, 0, 3, 6061, 146, 10}, // VWSLL_VL
1002 {1, 5, 0, 0, 3, 6080, 146, 10}, // VWSUBU_VL
1003 {1, 5, 0, 0, 3, 6100, 136, 10}, // VWSUBU_W_VL
1004 {1, 5, 0, 0, 3, 6122, 146, 10}, // VWSUB_VL
1005 {1, 5, 0, 0, 3, 6141, 136, 10}, // VWSUB_W_VL
1006 {1, 3, 0, 0, 2, 6162, 232, 5}, // VZEXT_VL
1007 {2, 4, 0, 0, 0, 6181, 0, 6}, // WADDAU
1008 {2, 2, 0, 0, 0, 6198, 356, 4}, // WMULSU
1009 {0, 2, 0|1<<SDNPHasChain, 0, 0, 6215, 88, 2}, // WRITE_CSR
1010 {2, 4, 0, 0, 0, 6235, 0, 6}, // WSUBAU
1011 {1, 5, 0, 0, 3, 6252, 333, 8}, // XOR_VL
1012 {1, 1, 0, 0, 0, 6269, 307, 2}, // ZIP
1013};
1014
1015static const SDNodeInfo RISCVGenSDNodeInfo(
1016 /*NumOpcodes=*/294, RISCVSDNodeDescs, RISCVSDNodeNames,
1017 RISCVVTByHwModeTable, RISCVSDTypeConstraints);
1018
1019} // namespace llvm
1020
1021#endif // GET_SDNODE_DESC
1022
1023