| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 2 | |* *| |
| 3 | |* Register Information Header Fragment *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | #include "llvm/CodeGen/TargetRegisterInfo.h" |
| 10 | |
| 11 | namespace llvm { |
| 12 | |
| 13 | class SystemZFrameLowering; |
| 14 | |
| 15 | struct SystemZGenRegisterInfo : public TargetRegisterInfo { |
| 16 | explicit SystemZGenRegisterInfo(unsigned RA, unsigned D = 0, unsigned E = 0, |
| 17 | unsigned PC = 0, unsigned HwMode = 0); |
| 18 | unsigned composeSubRegIndicesImpl(unsigned, unsigned) const override; |
| 19 | unsigned reverseComposeSubRegIndicesImpl(unsigned, unsigned) const override; |
| 20 | LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; |
| 21 | LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; |
| 22 | const TargetRegisterClass *getSubClassWithSubReg(const TargetRegisterClass *, unsigned) const override; |
| 23 | const TargetRegisterClass *getSubRegisterClass(const TargetRegisterClass *, unsigned) const override; |
| 24 | const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const override; |
| 25 | unsigned getRegUnitWeight(MCRegUnit RegUnit) const override; |
| 26 | unsigned getNumRegPressureSets() const override; |
| 27 | const char *getRegPressureSetName(unsigned Idx) const override; |
| 28 | unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const override; |
| 29 | const int *getRegClassPressureSets(const TargetRegisterClass *RC) const override; |
| 30 | const int *getRegUnitPressureSets(MCRegUnit RegUnit) const override; |
| 31 | ArrayRef<const char *> getRegMaskNames() const override; |
| 32 | ArrayRef<const uint32_t *> getRegMasks() const override; |
| 33 | bool isGeneralPurposeRegister(const MachineFunction &, MCRegister) const override; |
| 34 | bool isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const override; |
| 35 | bool isFixedRegister(const MachineFunction &, MCRegister) const override; |
| 36 | bool isArgumentRegister(const MachineFunction &, MCRegister) const override; |
| 37 | bool isConstantPhysReg(MCRegister PhysReg) const override final; |
| 38 | /// Devirtualized TargetFrameLowering. |
| 39 | static const SystemZFrameLowering *getFrameLowering( |
| 40 | const MachineFunction &MF); |
| 41 | }; |
| 42 | |
| 43 | namespace SystemZ { // Register classes |
| 44 | extern const TargetRegisterClass VR16BitRegClass; |
| 45 | extern const TargetRegisterClass FP16BitRegClass; |
| 46 | extern const TargetRegisterClass GRX32BitRegClass; |
| 47 | extern const TargetRegisterClass VR32BitRegClass; |
| 48 | extern const TargetRegisterClass AR32BitRegClass; |
| 49 | extern const TargetRegisterClass FP32BitRegClass; |
| 50 | extern const TargetRegisterClass GR32BitRegClass; |
| 51 | extern const TargetRegisterClass GRH32BitRegClass; |
| 52 | extern const TargetRegisterClass ADDR32BitRegClass; |
| 53 | extern const TargetRegisterClass CCRRegClass; |
| 54 | extern const TargetRegisterClass FPCRegsRegClass; |
| 55 | extern const TargetRegisterClass AnyRegBitRegClass; |
| 56 | extern const TargetRegisterClass AnyRegBit_with_subreg_h16RegClass; |
| 57 | extern const TargetRegisterClass VR64BitRegClass; |
| 58 | extern const TargetRegisterClass AnyRegBit_with_subreg_h64RegClass; |
| 59 | extern const TargetRegisterClass CR64BitRegClass; |
| 60 | extern const TargetRegisterClass FP64BitRegClass; |
| 61 | extern const TargetRegisterClass GR64BitRegClass; |
| 62 | extern const TargetRegisterClass ADDR64BitRegClass; |
| 63 | extern const TargetRegisterClass VR128BitRegClass; |
| 64 | extern const TargetRegisterClass VF128BitRegClass; |
| 65 | extern const TargetRegisterClass FP128BitRegClass; |
| 66 | extern const TargetRegisterClass GR128BitRegClass; |
| 67 | extern const TargetRegisterClass ADDR128BitRegClass; |
| 68 | } // end namespace SystemZ |
| 69 | |
| 70 | } // end namespace llvm |
| 71 | |
| 72 | |