1//===-- SystemZAsmPrinter.cpp - SystemZ LLVM assembly printer -------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Streams SystemZ assembly language and associated data, in the form of
10// MCInsts and MCExprs respectively.
11//
12//===----------------------------------------------------------------------===//
13
14#include "SystemZAsmPrinter.h"
15#include "MCTargetDesc/SystemZGNUInstPrinter.h"
16#include "MCTargetDesc/SystemZHLASMInstPrinter.h"
17#include "MCTargetDesc/SystemZMCAsmInfo.h"
18#include "MCTargetDesc/SystemZMCTargetDesc.h"
19#include "SystemZConstantPoolValue.h"
20#include "SystemZMCInstLower.h"
21#include "TargetInfo/SystemZTargetInfo.h"
22#include "llvm/ADT/StringExtras.h"
23#include "llvm/BinaryFormat/ELF.h"
24#include "llvm/BinaryFormat/GOFF.h"
25#include "llvm/CodeGen/MachineModuleInfoImpls.h"
26#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
27#include "llvm/IR/GlobalVariable.h"
28#include "llvm/IR/Mangler.h"
29#include "llvm/IR/Module.h"
30#include "llvm/MC/MCDirectives.h"
31#include "llvm/MC/MCExpr.h"
32#include "llvm/MC/MCInstBuilder.h"
33#include "llvm/MC/MCSectionELF.h"
34#include "llvm/MC/MCStreamer.h"
35#include "llvm/MC/MCSymbolGOFF.h"
36#include "llvm/MC/TargetRegistry.h"
37#include "llvm/Support/Chrono.h"
38#include "llvm/Support/Compiler.h"
39#include "llvm/Support/ConvertEBCDIC.h"
40#include "llvm/Support/FormatVariadic.h"
41
42using namespace llvm;
43
44// Return an RI instruction like MI with opcode Opcode, but with the
45// GR64 register operands turned into GR32s.
46static MCInst lowerRILow(const MachineInstr *MI, unsigned Opcode) {
47 if (MI->isCompare())
48 return MCInstBuilder(Opcode)
49 .addReg(Reg: SystemZMC::getRegAsGR32(Reg: MI->getOperand(i: 0).getReg()))
50 .addImm(Val: MI->getOperand(i: 1).getImm());
51 else
52 return MCInstBuilder(Opcode)
53 .addReg(Reg: SystemZMC::getRegAsGR32(Reg: MI->getOperand(i: 0).getReg()))
54 .addReg(Reg: SystemZMC::getRegAsGR32(Reg: MI->getOperand(i: 1).getReg()))
55 .addImm(Val: MI->getOperand(i: 2).getImm());
56}
57
58// Return an RI instruction like MI with opcode Opcode, but with the
59// GR64 register operands turned into GRH32s.
60static MCInst lowerRIHigh(const MachineInstr *MI, unsigned Opcode) {
61 if (MI->isCompare())
62 return MCInstBuilder(Opcode)
63 .addReg(Reg: SystemZMC::getRegAsGRH32(Reg: MI->getOperand(i: 0).getReg()))
64 .addImm(Val: MI->getOperand(i: 1).getImm());
65 else
66 return MCInstBuilder(Opcode)
67 .addReg(Reg: SystemZMC::getRegAsGRH32(Reg: MI->getOperand(i: 0).getReg()))
68 .addReg(Reg: SystemZMC::getRegAsGRH32(Reg: MI->getOperand(i: 1).getReg()))
69 .addImm(Val: MI->getOperand(i: 2).getImm());
70}
71
72// Return an RI instruction like MI with opcode Opcode, but with the
73// R2 register turned into a GR64.
74static MCInst lowerRIEfLow(const MachineInstr *MI, unsigned Opcode) {
75 return MCInstBuilder(Opcode)
76 .addReg(Reg: MI->getOperand(i: 0).getReg())
77 .addReg(Reg: MI->getOperand(i: 1).getReg())
78 .addReg(Reg: SystemZMC::getRegAsGR64(Reg: MI->getOperand(i: 2).getReg()))
79 .addImm(Val: MI->getOperand(i: 3).getImm())
80 .addImm(Val: MI->getOperand(i: 4).getImm())
81 .addImm(Val: MI->getOperand(i: 5).getImm());
82}
83
84static const MCSymbolRefExpr *getTLSGetOffset(MCContext &Context) {
85 StringRef Name = "__tls_get_offset";
86 return MCSymbolRefExpr::create(Symbol: Context.getOrCreateSymbol(Name),
87 specifier: SystemZ::S_PLT, Ctx&: Context);
88}
89
90static const MCSymbolRefExpr *getGlobalOffsetTable(MCContext &Context) {
91 StringRef Name = "_GLOBAL_OFFSET_TABLE_";
92 return MCSymbolRefExpr::create(Symbol: Context.getOrCreateSymbol(Name),
93 Ctx&: Context);
94}
95
96// MI is an instruction that accepts an optional alignment hint,
97// and which was already lowered to LoweredMI. If the alignment
98// of the original memory operand is known, update LoweredMI to
99// an instruction with the corresponding hint set.
100static void lowerAlignmentHint(const MachineInstr *MI, MCInst &LoweredMI,
101 unsigned Opcode) {
102 if (MI->memoperands_empty())
103 return;
104
105 Align Alignment = Align(16);
106 for (MachineInstr::mmo_iterator MMOI = MI->memoperands_begin(),
107 EE = MI->memoperands_end(); MMOI != EE; ++MMOI)
108 if ((*MMOI)->getAlign() < Alignment)
109 Alignment = (*MMOI)->getAlign();
110
111 unsigned AlignmentHint = 0;
112 if (Alignment >= Align(16))
113 AlignmentHint = 4;
114 else if (Alignment >= Align(8))
115 AlignmentHint = 3;
116 if (AlignmentHint == 0)
117 return;
118
119 LoweredMI.setOpcode(Opcode);
120 LoweredMI.addOperand(Op: MCOperand::createImm(Val: AlignmentHint));
121}
122
123// MI loads the high part of a vector from memory. Return an instruction
124// that uses replicating vector load Opcode to do the same thing.
125static MCInst lowerSubvectorLoad(const MachineInstr *MI, unsigned Opcode) {
126 return MCInstBuilder(Opcode)
127 .addReg(Reg: SystemZMC::getRegAsVR128(Reg: MI->getOperand(i: 0).getReg()))
128 .addReg(Reg: MI->getOperand(i: 1).getReg())
129 .addImm(Val: MI->getOperand(i: 2).getImm())
130 .addReg(Reg: MI->getOperand(i: 3).getReg());
131}
132
133// MI stores the high part of a vector to memory. Return an instruction
134// that uses elemental vector store Opcode to do the same thing.
135static MCInst lowerSubvectorStore(const MachineInstr *MI, unsigned Opcode) {
136 return MCInstBuilder(Opcode)
137 .addReg(Reg: SystemZMC::getRegAsVR128(Reg: MI->getOperand(i: 0).getReg()))
138 .addReg(Reg: MI->getOperand(i: 1).getReg())
139 .addImm(Val: MI->getOperand(i: 2).getImm())
140 .addReg(Reg: MI->getOperand(i: 3).getReg())
141 .addImm(Val: 0);
142}
143
144// MI extracts the first element of the source vector.
145static MCInst lowerVecEltExtraction(const MachineInstr *MI, unsigned Opcode) {
146 return MCInstBuilder(Opcode)
147 .addReg(Reg: SystemZMC::getRegAsGR64(Reg: MI->getOperand(i: 0).getReg()))
148 .addReg(Reg: SystemZMC::getRegAsVR128(Reg: MI->getOperand(i: 1).getReg()))
149 .addReg(Reg: 0)
150 .addImm(Val: 0);
151}
152
153// MI inserts value into the first element of the destination vector.
154static MCInst lowerVecEltInsertion(const MachineInstr *MI, unsigned Opcode) {
155 return MCInstBuilder(Opcode)
156 .addReg(Reg: SystemZMC::getRegAsVR128(Reg: MI->getOperand(i: 0).getReg()))
157 .addReg(Reg: SystemZMC::getRegAsVR128(Reg: MI->getOperand(i: 0).getReg()))
158 .addReg(Reg: MI->getOperand(i: 1).getReg())
159 .addReg(Reg: 0)
160 .addImm(Val: 0);
161}
162
163bool SystemZAsmPrinter::doInitialization(Module &M) {
164 SM.reset();
165
166 // In HLASM, the only way to represent aliases is to use the
167 // extra-label-at-definition strategy. This is similar to the AIX
168 // implementation with the additional caveat that all symbol attributes must
169 // be emitted before the label is emitted.
170 if (TM.getTargetTriple().isOSzOS()) {
171 // Construct an aliasing list for each GlobalObject.
172 for (const auto &Alias : M.aliases()) {
173 const GlobalObject *Aliasee = Alias.getAliaseeObject();
174 if (!Aliasee)
175 OutContext.reportError(
176 L: {}, Msg: "Alias without a base object is not yet supported on z/OS.");
177
178 bool IsFunc = isa<Function>(Val: Aliasee->stripPointerCasts());
179 if (IsFunc) {
180 if (Alias.hasWeakLinkage() || Alias.hasLinkOnceLinkage())
181 OutContext.reportError(L: {},
182 Msg: "Weak alias/reference not supported on z/OS");
183
184 GOAliasMap[Aliasee].push_back(Elt: &Alias);
185 } else
186 OutContext.reportError(
187 L: {}, Msg: "Only aliases to functions is supported in GOFF.");
188 }
189 }
190 return AsmPrinter::doInitialization(M);
191}
192
193// The XPLINK ABI requires that a no-op encoding the call type is emitted after
194// each call to a subroutine. This information can be used by the called
195// function to determine its entry point, e.g. for generating a backtrace. The
196// call type is encoded as a register number in the bcr instruction. See
197// enumeration CallType for the possible values.
198void SystemZAsmPrinter::emitCallInformation(CallType CT) {
199 EmitToStreamer(S&: *OutStreamer,
200 Inst: MCInstBuilder(SystemZ::BCRAsm)
201 .addImm(Val: 0)
202 .addReg(Reg: SystemZMC::GR64Regs[static_cast<unsigned>(CT)]));
203}
204
205uint32_t SystemZAsmPrinter::AssociatedDataAreaTable::insert(const MCSymbol *Sym,
206 unsigned SlotKind) {
207 auto Key = std::make_pair(x&: Sym, y&: SlotKind);
208 auto It = Displacements.find(Key);
209
210 if (It != Displacements.end())
211 return (*It).second;
212
213 // Determine length of descriptor.
214 uint32_t Length;
215 switch (SlotKind) {
216 case SystemZII::MO_ADA_DIRECT_FUNC_DESC:
217 Length = 2 * PointerSize;
218 break;
219 default:
220 Length = PointerSize;
221 break;
222 }
223
224 uint32_t Displacement = NextDisplacement;
225 Displacements[std::make_pair(x&: Sym, y&: SlotKind)] = NextDisplacement;
226 NextDisplacement += Length;
227
228 return Displacement;
229}
230
231uint32_t
232SystemZAsmPrinter::AssociatedDataAreaTable::insert(const MachineOperand MO) {
233 MCSymbol *Sym;
234 if (MO.getType() == MachineOperand::MO_GlobalAddress) {
235 const GlobalValue *GV = MO.getGlobal();
236 Sym = MO.getParent()->getMF()->getTarget().getSymbol(GV);
237 assert(Sym && "No symbol");
238 } else if (MO.getType() == MachineOperand::MO_ExternalSymbol) {
239 const char *SymName = MO.getSymbolName();
240 Sym = MO.getParent()->getMF()->getContext().getOrCreateSymbol(Name: SymName);
241 assert(Sym && "No symbol");
242 } else
243 llvm_unreachable("Unexpected operand type");
244
245 unsigned ADAslotType = MO.getTargetFlags();
246 return insert(Sym, SlotKind: ADAslotType);
247}
248
249void SystemZAsmPrinter::emitInstruction(const MachineInstr *MI) {
250 SystemZ_MC::verifyInstructionPredicates(Opcode: MI->getOpcode(),
251 Features: getSubtargetInfo().getFeatureBits());
252
253 SystemZMCInstLower Lower(MF->getContext(), *this);
254 MCInst LoweredMI;
255 switch (MI->getOpcode()) {
256 case SystemZ::Return:
257 LoweredMI = MCInstBuilder(SystemZ::BR)
258 .addReg(Reg: SystemZ::R14D);
259 break;
260
261 case SystemZ::Return_XPLINK:
262 LoweredMI = MCInstBuilder(SystemZ::B)
263 .addReg(Reg: SystemZ::R7D)
264 .addImm(Val: 2)
265 .addReg(Reg: 0);
266 break;
267
268 case SystemZ::CondReturn:
269 LoweredMI = MCInstBuilder(SystemZ::BCR)
270 .addImm(Val: MI->getOperand(i: 0).getImm())
271 .addImm(Val: MI->getOperand(i: 1).getImm())
272 .addReg(Reg: SystemZ::R14D);
273 break;
274
275 case SystemZ::CondReturn_XPLINK:
276 LoweredMI = MCInstBuilder(SystemZ::BC)
277 .addImm(Val: MI->getOperand(i: 0).getImm())
278 .addImm(Val: MI->getOperand(i: 1).getImm())
279 .addReg(Reg: SystemZ::R7D)
280 .addImm(Val: 2)
281 .addReg(Reg: 0);
282 break;
283
284 case SystemZ::CRBReturn:
285 LoweredMI = MCInstBuilder(SystemZ::CRB)
286 .addReg(Reg: MI->getOperand(i: 0).getReg())
287 .addReg(Reg: MI->getOperand(i: 1).getReg())
288 .addImm(Val: MI->getOperand(i: 2).getImm())
289 .addReg(Reg: SystemZ::R14D)
290 .addImm(Val: 0);
291 break;
292
293 case SystemZ::CGRBReturn:
294 LoweredMI = MCInstBuilder(SystemZ::CGRB)
295 .addReg(Reg: MI->getOperand(i: 0).getReg())
296 .addReg(Reg: MI->getOperand(i: 1).getReg())
297 .addImm(Val: MI->getOperand(i: 2).getImm())
298 .addReg(Reg: SystemZ::R14D)
299 .addImm(Val: 0);
300 break;
301
302 case SystemZ::CIBReturn:
303 LoweredMI = MCInstBuilder(SystemZ::CIB)
304 .addReg(Reg: MI->getOperand(i: 0).getReg())
305 .addImm(Val: MI->getOperand(i: 1).getImm())
306 .addImm(Val: MI->getOperand(i: 2).getImm())
307 .addReg(Reg: SystemZ::R14D)
308 .addImm(Val: 0);
309 break;
310
311 case SystemZ::CGIBReturn:
312 LoweredMI = MCInstBuilder(SystemZ::CGIB)
313 .addReg(Reg: MI->getOperand(i: 0).getReg())
314 .addImm(Val: MI->getOperand(i: 1).getImm())
315 .addImm(Val: MI->getOperand(i: 2).getImm())
316 .addReg(Reg: SystemZ::R14D)
317 .addImm(Val: 0);
318 break;
319
320 case SystemZ::CLRBReturn:
321 LoweredMI = MCInstBuilder(SystemZ::CLRB)
322 .addReg(Reg: MI->getOperand(i: 0).getReg())
323 .addReg(Reg: MI->getOperand(i: 1).getReg())
324 .addImm(Val: MI->getOperand(i: 2).getImm())
325 .addReg(Reg: SystemZ::R14D)
326 .addImm(Val: 0);
327 break;
328
329 case SystemZ::CLGRBReturn:
330 LoweredMI = MCInstBuilder(SystemZ::CLGRB)
331 .addReg(Reg: MI->getOperand(i: 0).getReg())
332 .addReg(Reg: MI->getOperand(i: 1).getReg())
333 .addImm(Val: MI->getOperand(i: 2).getImm())
334 .addReg(Reg: SystemZ::R14D)
335 .addImm(Val: 0);
336 break;
337
338 case SystemZ::CLIBReturn:
339 LoweredMI = MCInstBuilder(SystemZ::CLIB)
340 .addReg(Reg: MI->getOperand(i: 0).getReg())
341 .addImm(Val: MI->getOperand(i: 1).getImm())
342 .addImm(Val: MI->getOperand(i: 2).getImm())
343 .addReg(Reg: SystemZ::R14D)
344 .addImm(Val: 0);
345 break;
346
347 case SystemZ::CLGIBReturn:
348 LoweredMI = MCInstBuilder(SystemZ::CLGIB)
349 .addReg(Reg: MI->getOperand(i: 0).getReg())
350 .addImm(Val: MI->getOperand(i: 1).getImm())
351 .addImm(Val: MI->getOperand(i: 2).getImm())
352 .addReg(Reg: SystemZ::R14D)
353 .addImm(Val: 0);
354 break;
355
356 case SystemZ::CallBRASL_XPLINK64:
357 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(SystemZ::BRASL)
358 .addReg(Reg: SystemZ::R7D)
359 .addExpr(Val: Lower.getExpr(MO: MI->getOperand(i: 0),
360 SystemZ::S_None)));
361 emitCallInformation(CT: CallType::BRASL7);
362 return;
363
364 case SystemZ::CallBASR_XPLINK64:
365 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(SystemZ::BASR)
366 .addReg(Reg: SystemZ::R7D)
367 .addReg(Reg: MI->getOperand(i: 0).getReg()));
368 emitCallInformation(CT: CallType::BASR76);
369 return;
370
371 case SystemZ::CallBASR_STACKEXT:
372 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(SystemZ::BASR)
373 .addReg(Reg: SystemZ::R3D)
374 .addReg(Reg: MI->getOperand(i: 0).getReg()));
375 emitCallInformation(CT: CallType::BASR33);
376 return;
377
378 case SystemZ::ADA_ENTRY_VALUE:
379 case SystemZ::ADA_ENTRY: {
380 const SystemZSubtarget &Subtarget = MF->getSubtarget<SystemZSubtarget>();
381 const SystemZInstrInfo *TII = Subtarget.getInstrInfo();
382 uint32_t Disp = ADATable.insert(MO: MI->getOperand(i: 1));
383 Register TargetReg = MI->getOperand(i: 0).getReg();
384
385 Register ADAReg = MI->getOperand(i: 2).getReg();
386 Disp += MI->getOperand(i: 3).getImm();
387 bool LoadAddr = MI->getOpcode() == SystemZ::ADA_ENTRY;
388
389 unsigned Op0 = LoadAddr ? SystemZ::LA : SystemZ::LG;
390 unsigned Op = TII->getOpcodeForOffset(Opcode: Op0, Offset: Disp);
391
392 Register IndexReg = 0;
393 if (!Op) {
394 if (TargetReg != ADAReg) {
395 IndexReg = TargetReg;
396 // Use TargetReg to store displacement.
397 EmitToStreamer(
398 S&: *OutStreamer,
399 Inst: MCInstBuilder(SystemZ::LLILF).addReg(Reg: TargetReg).addImm(Val: Disp));
400 } else
401 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(SystemZ::ALGFI)
402 .addReg(Reg: TargetReg)
403 .addReg(Reg: TargetReg)
404 .addImm(Val: Disp));
405 Disp = 0;
406 Op = Op0;
407 }
408 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(Op)
409 .addReg(Reg: TargetReg)
410 .addReg(Reg: ADAReg)
411 .addImm(Val: Disp)
412 .addReg(Reg: IndexReg));
413
414 return;
415 }
416 case SystemZ::CallBRASL:
417 LoweredMI = MCInstBuilder(SystemZ::BRASL)
418 .addReg(Reg: SystemZ::R14D)
419 .addExpr(Val: Lower.getExpr(MO: MI->getOperand(i: 0), SystemZ::S_PLT));
420 break;
421
422 case SystemZ::CallBASR:
423 LoweredMI = MCInstBuilder(SystemZ::BASR)
424 .addReg(Reg: SystemZ::R14D)
425 .addReg(Reg: MI->getOperand(i: 0).getReg());
426 break;
427
428 case SystemZ::CallJG:
429 LoweredMI = MCInstBuilder(SystemZ::JG)
430 .addExpr(Val: Lower.getExpr(MO: MI->getOperand(i: 0), SystemZ::S_PLT));
431 break;
432
433 case SystemZ::CallBRCL:
434 LoweredMI = MCInstBuilder(SystemZ::BRCL)
435 .addImm(Val: MI->getOperand(i: 0).getImm())
436 .addImm(Val: MI->getOperand(i: 1).getImm())
437 .addExpr(Val: Lower.getExpr(MO: MI->getOperand(i: 2), SystemZ::S_PLT));
438 break;
439
440 case SystemZ::CallBR:
441 LoweredMI = MCInstBuilder(SystemZ::BR)
442 .addReg(Reg: MI->getOperand(i: 0).getReg());
443 break;
444
445 case SystemZ::CallBCR:
446 LoweredMI = MCInstBuilder(SystemZ::BCR)
447 .addImm(Val: MI->getOperand(i: 0).getImm())
448 .addImm(Val: MI->getOperand(i: 1).getImm())
449 .addReg(Reg: MI->getOperand(i: 2).getReg());
450 break;
451
452 case SystemZ::CRBCall:
453 LoweredMI = MCInstBuilder(SystemZ::CRB)
454 .addReg(Reg: MI->getOperand(i: 0).getReg())
455 .addReg(Reg: MI->getOperand(i: 1).getReg())
456 .addImm(Val: MI->getOperand(i: 2).getImm())
457 .addReg(Reg: MI->getOperand(i: 3).getReg())
458 .addImm(Val: 0);
459 break;
460
461 case SystemZ::CGRBCall:
462 LoweredMI = MCInstBuilder(SystemZ::CGRB)
463 .addReg(Reg: MI->getOperand(i: 0).getReg())
464 .addReg(Reg: MI->getOperand(i: 1).getReg())
465 .addImm(Val: MI->getOperand(i: 2).getImm())
466 .addReg(Reg: MI->getOperand(i: 3).getReg())
467 .addImm(Val: 0);
468 break;
469
470 case SystemZ::CIBCall:
471 LoweredMI = MCInstBuilder(SystemZ::CIB)
472 .addReg(Reg: MI->getOperand(i: 0).getReg())
473 .addImm(Val: MI->getOperand(i: 1).getImm())
474 .addImm(Val: MI->getOperand(i: 2).getImm())
475 .addReg(Reg: MI->getOperand(i: 3).getReg())
476 .addImm(Val: 0);
477 break;
478
479 case SystemZ::CGIBCall:
480 LoweredMI = MCInstBuilder(SystemZ::CGIB)
481 .addReg(Reg: MI->getOperand(i: 0).getReg())
482 .addImm(Val: MI->getOperand(i: 1).getImm())
483 .addImm(Val: MI->getOperand(i: 2).getImm())
484 .addReg(Reg: MI->getOperand(i: 3).getReg())
485 .addImm(Val: 0);
486 break;
487
488 case SystemZ::CLRBCall:
489 LoweredMI = MCInstBuilder(SystemZ::CLRB)
490 .addReg(Reg: MI->getOperand(i: 0).getReg())
491 .addReg(Reg: MI->getOperand(i: 1).getReg())
492 .addImm(Val: MI->getOperand(i: 2).getImm())
493 .addReg(Reg: MI->getOperand(i: 3).getReg())
494 .addImm(Val: 0);
495 break;
496
497 case SystemZ::CLGRBCall:
498 LoweredMI = MCInstBuilder(SystemZ::CLGRB)
499 .addReg(Reg: MI->getOperand(i: 0).getReg())
500 .addReg(Reg: MI->getOperand(i: 1).getReg())
501 .addImm(Val: MI->getOperand(i: 2).getImm())
502 .addReg(Reg: MI->getOperand(i: 3).getReg())
503 .addImm(Val: 0);
504 break;
505
506 case SystemZ::CLIBCall:
507 LoweredMI = MCInstBuilder(SystemZ::CLIB)
508 .addReg(Reg: MI->getOperand(i: 0).getReg())
509 .addImm(Val: MI->getOperand(i: 1).getImm())
510 .addImm(Val: MI->getOperand(i: 2).getImm())
511 .addReg(Reg: MI->getOperand(i: 3).getReg())
512 .addImm(Val: 0);
513 break;
514
515 case SystemZ::CLGIBCall:
516 LoweredMI = MCInstBuilder(SystemZ::CLGIB)
517 .addReg(Reg: MI->getOperand(i: 0).getReg())
518 .addImm(Val: MI->getOperand(i: 1).getImm())
519 .addImm(Val: MI->getOperand(i: 2).getImm())
520 .addReg(Reg: MI->getOperand(i: 3).getReg())
521 .addImm(Val: 0);
522 break;
523
524 case SystemZ::TLS_GDCALL:
525 LoweredMI =
526 MCInstBuilder(SystemZ::BRASL)
527 .addReg(Reg: SystemZ::R14D)
528 .addExpr(Val: getTLSGetOffset(Context&: MF->getContext()))
529 .addExpr(Val: Lower.getExpr(MO: MI->getOperand(i: 0), SystemZ::S_TLSGD));
530 break;
531
532 case SystemZ::TLS_LDCALL:
533 LoweredMI =
534 MCInstBuilder(SystemZ::BRASL)
535 .addReg(Reg: SystemZ::R14D)
536 .addExpr(Val: getTLSGetOffset(Context&: MF->getContext()))
537 .addExpr(Val: Lower.getExpr(MO: MI->getOperand(i: 0), SystemZ::S_TLSLDM));
538 break;
539
540 case SystemZ::GOT:
541 LoweredMI = MCInstBuilder(SystemZ::LARL)
542 .addReg(Reg: MI->getOperand(i: 0).getReg())
543 .addExpr(Val: getGlobalOffsetTable(Context&: MF->getContext()));
544 break;
545
546 case SystemZ::IILF64:
547 LoweredMI = MCInstBuilder(SystemZ::IILF)
548 .addReg(Reg: SystemZMC::getRegAsGR32(Reg: MI->getOperand(i: 0).getReg()))
549 .addImm(Val: MI->getOperand(i: 2).getImm());
550 break;
551
552 case SystemZ::IIHF64:
553 LoweredMI = MCInstBuilder(SystemZ::IIHF)
554 .addReg(Reg: SystemZMC::getRegAsGRH32(Reg: MI->getOperand(i: 0).getReg()))
555 .addImm(Val: MI->getOperand(i: 2).getImm());
556 break;
557
558 case SystemZ::RISBHH:
559 case SystemZ::RISBHL:
560 LoweredMI = lowerRIEfLow(MI, Opcode: SystemZ::RISBHG);
561 break;
562
563 case SystemZ::RISBLH:
564 case SystemZ::RISBLL:
565 LoweredMI = lowerRIEfLow(MI, Opcode: SystemZ::RISBLG);
566 break;
567
568 case SystemZ::VLVGP32:
569 LoweredMI = MCInstBuilder(SystemZ::VLVGP)
570 .addReg(Reg: MI->getOperand(i: 0).getReg())
571 .addReg(Reg: SystemZMC::getRegAsGR64(Reg: MI->getOperand(i: 1).getReg()))
572 .addReg(Reg: SystemZMC::getRegAsGR64(Reg: MI->getOperand(i: 2).getReg()));
573 break;
574
575 case SystemZ::VLR16:
576 case SystemZ::VLR32:
577 case SystemZ::VLR64:
578 LoweredMI = MCInstBuilder(SystemZ::VLR)
579 .addReg(Reg: SystemZMC::getRegAsVR128(Reg: MI->getOperand(i: 0).getReg()))
580 .addReg(Reg: SystemZMC::getRegAsVR128(Reg: MI->getOperand(i: 1).getReg()));
581 break;
582
583 case SystemZ::VL:
584 Lower.lower(MI, OutMI&: LoweredMI);
585 lowerAlignmentHint(MI, LoweredMI, Opcode: SystemZ::VLAlign);
586 break;
587
588 case SystemZ::VST:
589 Lower.lower(MI, OutMI&: LoweredMI);
590 lowerAlignmentHint(MI, LoweredMI, Opcode: SystemZ::VSTAlign);
591 break;
592
593 case SystemZ::VLM:
594 Lower.lower(MI, OutMI&: LoweredMI);
595 lowerAlignmentHint(MI, LoweredMI, Opcode: SystemZ::VLMAlign);
596 break;
597
598 case SystemZ::VSTM:
599 Lower.lower(MI, OutMI&: LoweredMI);
600 lowerAlignmentHint(MI, LoweredMI, Opcode: SystemZ::VSTMAlign);
601 break;
602
603 case SystemZ::VL16:
604 LoweredMI = lowerSubvectorLoad(MI, Opcode: SystemZ::VLREPH);
605 break;
606
607 case SystemZ::VL32:
608 LoweredMI = lowerSubvectorLoad(MI, Opcode: SystemZ::VLREPF);
609 break;
610
611 case SystemZ::VL64:
612 LoweredMI = lowerSubvectorLoad(MI, Opcode: SystemZ::VLREPG);
613 break;
614
615 case SystemZ::VST16:
616 LoweredMI = lowerSubvectorStore(MI, Opcode: SystemZ::VSTEH);
617 break;
618
619 case SystemZ::VST32:
620 LoweredMI = lowerSubvectorStore(MI, Opcode: SystemZ::VSTEF);
621 break;
622
623 case SystemZ::VST64:
624 LoweredMI = lowerSubvectorStore(MI, Opcode: SystemZ::VSTEG);
625 break;
626
627 case SystemZ::LFER:
628 LoweredMI = lowerVecEltExtraction(MI, Opcode: SystemZ::VLGVF);
629 break;
630
631 case SystemZ::LFER_16:
632 LoweredMI = lowerVecEltExtraction(MI, Opcode: SystemZ::VLGVH);
633 break;
634
635 case SystemZ::LEFR:
636 LoweredMI = lowerVecEltInsertion(MI, Opcode: SystemZ::VLVGF);
637 break;
638
639 case SystemZ::LEFR_16:
640 LoweredMI = lowerVecEltInsertion(MI, Opcode: SystemZ::VLVGH);
641 break;
642
643#define LOWER_LOW(NAME) \
644 case SystemZ::NAME##64: LoweredMI = lowerRILow(MI, SystemZ::NAME); break
645
646 LOWER_LOW(IILL);
647 LOWER_LOW(IILH);
648 LOWER_LOW(TMLL);
649 LOWER_LOW(TMLH);
650 LOWER_LOW(NILL);
651 LOWER_LOW(NILH);
652 LOWER_LOW(NILF);
653 LOWER_LOW(OILL);
654 LOWER_LOW(OILH);
655 LOWER_LOW(OILF);
656 LOWER_LOW(XILF);
657
658#undef LOWER_LOW
659
660#define LOWER_HIGH(NAME) \
661 case SystemZ::NAME##64: LoweredMI = lowerRIHigh(MI, SystemZ::NAME); break
662
663 LOWER_HIGH(IIHL);
664 LOWER_HIGH(IIHH);
665 LOWER_HIGH(TMHL);
666 LOWER_HIGH(TMHH);
667 LOWER_HIGH(NIHL);
668 LOWER_HIGH(NIHH);
669 LOWER_HIGH(NIHF);
670 LOWER_HIGH(OIHL);
671 LOWER_HIGH(OIHH);
672 LOWER_HIGH(OIHF);
673 LOWER_HIGH(XIHF);
674
675#undef LOWER_HIGH
676
677 case SystemZ::Serialize:
678 if (MF->getSubtarget<SystemZSubtarget>().hasFastSerialization())
679 LoweredMI = MCInstBuilder(SystemZ::BCRAsm)
680 .addImm(Val: 14).addReg(Reg: SystemZ::R0D);
681 else
682 LoweredMI = MCInstBuilder(SystemZ::BCRAsm)
683 .addImm(Val: 15).addReg(Reg: SystemZ::R0D);
684 break;
685
686 // We want to emit "j .+2" for traps, jumping to the relative immediate field
687 // of the jump instruction, which is an illegal instruction. We cannot emit a
688 // "." symbol, so create and emit a temp label before the instruction and use
689 // that instead.
690 case SystemZ::Trap: {
691 MCSymbol *DotSym = OutContext.createTempSymbol();
692 OutStreamer->emitLabel(Symbol: DotSym);
693
694 const MCSymbolRefExpr *Expr = MCSymbolRefExpr::create(Symbol: DotSym, Ctx&: OutContext);
695 const MCConstantExpr *ConstExpr = MCConstantExpr::create(Value: 2, Ctx&: OutContext);
696 LoweredMI = MCInstBuilder(SystemZ::J)
697 .addExpr(Val: MCBinaryExpr::createAdd(LHS: Expr, RHS: ConstExpr, Ctx&: OutContext));
698 }
699 break;
700
701 // Conditional traps will create a branch on condition instruction that jumps
702 // to the relative immediate field of the jump instruction. (eg. "jo .+2")
703 case SystemZ::CondTrap: {
704 MCSymbol *DotSym = OutContext.createTempSymbol();
705 OutStreamer->emitLabel(Symbol: DotSym);
706
707 const MCSymbolRefExpr *Expr = MCSymbolRefExpr::create(Symbol: DotSym, Ctx&: OutContext);
708 const MCConstantExpr *ConstExpr = MCConstantExpr::create(Value: 2, Ctx&: OutContext);
709 LoweredMI = MCInstBuilder(SystemZ::BRC)
710 .addImm(Val: MI->getOperand(i: 0).getImm())
711 .addImm(Val: MI->getOperand(i: 1).getImm())
712 .addExpr(Val: MCBinaryExpr::createAdd(LHS: Expr, RHS: ConstExpr, Ctx&: OutContext));
713 }
714 break;
715
716 case TargetOpcode::FENTRY_CALL:
717 LowerFENTRY_CALL(MI: *MI, MCIL&: Lower);
718 return;
719
720 case TargetOpcode::STACKMAP:
721 LowerSTACKMAP(MI: *MI);
722 return;
723
724 case TargetOpcode::PATCHPOINT:
725 LowerPATCHPOINT(MI: *MI, Lower);
726 return;
727
728 case TargetOpcode::PATCHABLE_FUNCTION_ENTER:
729 LowerPATCHABLE_FUNCTION_ENTER(MI: *MI, Lower);
730 return;
731
732 case TargetOpcode::PATCHABLE_RET:
733 LowerPATCHABLE_RET(MI: *MI, Lower);
734 return;
735
736 case TargetOpcode::PATCHABLE_FUNCTION_EXIT:
737 llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted");
738
739 case TargetOpcode::PATCHABLE_TAIL_CALL:
740 // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a
741 // normal function exit from a tail exit.
742 llvm_unreachable("Tail call is handled in the normal case. See comments "
743 "around this assert.");
744
745 case SystemZ::EXRL_Pseudo: {
746 unsigned TargetInsOpc = MI->getOperand(i: 0).getImm();
747 Register LenMinus1Reg = MI->getOperand(i: 1).getReg();
748 Register DestReg = MI->getOperand(i: 2).getReg();
749 int64_t DestDisp = MI->getOperand(i: 3).getImm();
750 Register SrcReg = MI->getOperand(i: 4).getReg();
751 int64_t SrcDisp = MI->getOperand(i: 5).getImm();
752
753 SystemZTargetStreamer *TS = getTargetStreamer();
754 MCInst ET = MCInstBuilder(TargetInsOpc)
755 .addReg(Reg: DestReg)
756 .addImm(Val: DestDisp)
757 .addImm(Val: 1)
758 .addReg(Reg: SrcReg)
759 .addImm(Val: SrcDisp);
760 SystemZTargetStreamer::MCInstSTIPair ET_STI(ET, &MF->getSubtarget());
761 auto [It, Inserted] = TS->EXRLTargets2Sym.try_emplace(k: ET_STI);
762 if (Inserted)
763 It->second = OutContext.createTempSymbol();
764 MCSymbol *DotSym = It->second;
765 const MCSymbolRefExpr *Dot = MCSymbolRefExpr::create(Symbol: DotSym, Ctx&: OutContext);
766 EmitToStreamer(
767 S&: *OutStreamer,
768 Inst: MCInstBuilder(SystemZ::EXRL).addReg(Reg: LenMinus1Reg).addExpr(Val: Dot));
769 return;
770 }
771
772 case SystemZ::FENCE:
773 OutStreamer->emitRawComment(T: "FENCE");
774 return;
775
776 // EH_SjLj_Setup is a dummy terminator instruction of size 0.
777 // It is used to handle the clobber register for builtin setjmp.
778 case SystemZ::EH_SjLj_Setup:
779 return;
780
781 case SystemZ::LOAD_TLS_BLOCK_ADDR:
782 lowerLOAD_TLS_BLOCK_ADDR(MI: *MI, Lower);
783 return;
784 case SystemZ::LOAD_GLOBAL_STACKGUARD_ADDR:
785 lowerLOAD_GLOBAL_STACKGUARD_ADDR(MI: *MI, Lower);
786 return;
787
788 default:
789 Lower.lower(MI, OutMI&: LoweredMI);
790 break;
791 }
792 EmitToStreamer(S&: *OutStreamer, Inst: LoweredMI);
793}
794
795// Emit the largest nop instruction smaller than or equal to NumBytes
796// bytes. Return the size of nop emitted.
797static unsigned EmitNop(MCContext &OutContext, MCStreamer &OutStreamer,
798 unsigned NumBytes, const MCSubtargetInfo &STI) {
799 if (NumBytes < 2) {
800 llvm_unreachable("Zero nops?");
801 return 0;
802 }
803 else if (NumBytes < 4) {
804 OutStreamer.emitInstruction(
805 Inst: MCInstBuilder(SystemZ::BCRAsm).addImm(Val: 0).addReg(Reg: SystemZ::R0D), STI);
806 return 2;
807 }
808 else if (NumBytes < 6) {
809 OutStreamer.emitInstruction(
810 Inst: MCInstBuilder(SystemZ::BCAsm).addImm(Val: 0).addReg(Reg: 0).addImm(Val: 0).addReg(Reg: 0),
811 STI);
812 return 4;
813 }
814 else {
815 MCSymbol *DotSym = OutContext.createTempSymbol();
816 const MCSymbolRefExpr *Dot = MCSymbolRefExpr::create(Symbol: DotSym, Ctx&: OutContext);
817 OutStreamer.emitLabel(Symbol: DotSym);
818 OutStreamer.emitInstruction(
819 Inst: MCInstBuilder(SystemZ::BRCLAsm).addImm(Val: 0).addExpr(Val: Dot), STI);
820 return 6;
821 }
822}
823
824void SystemZAsmPrinter::LowerFENTRY_CALL(const MachineInstr &MI,
825 SystemZMCInstLower &Lower) {
826 MCContext &Ctx = MF->getContext();
827 if (MF->getFunction().hasFnAttribute(Kind: "mrecord-mcount")) {
828 MCSymbol *DotSym = OutContext.createTempSymbol();
829 OutStreamer->pushSection();
830 OutStreamer->switchSection(
831 Section: Ctx.getELFSection(Section: "__mcount_loc", Type: ELF::SHT_PROGBITS, Flags: ELF::SHF_ALLOC));
832 OutStreamer->emitSymbolValue(Sym: DotSym, Size: 8);
833 OutStreamer->popSection();
834 OutStreamer->emitLabel(Symbol: DotSym);
835 }
836
837 if (MF->getFunction().hasFnAttribute(Kind: "mnop-mcount")) {
838 EmitNop(OutContext&: Ctx, OutStreamer&: *OutStreamer, NumBytes: 6, STI: getSubtargetInfo());
839 return;
840 }
841
842 MCSymbol *fentry = Ctx.getOrCreateSymbol(Name: "__fentry__");
843 const MCSymbolRefExpr *Op =
844 MCSymbolRefExpr::create(Symbol: fentry, specifier: SystemZ::S_PLT, Ctx);
845 OutStreamer->emitInstruction(
846 Inst: MCInstBuilder(SystemZ::BRASL).addReg(Reg: SystemZ::R0D).addExpr(Val: Op),
847 STI: getSubtargetInfo());
848}
849
850void SystemZAsmPrinter::LowerSTACKMAP(const MachineInstr &MI) {
851 auto *TII = MF->getSubtarget<SystemZSubtarget>().getInstrInfo();
852
853 unsigned NumNOPBytes = MI.getOperand(i: 1).getImm();
854
855 auto &Ctx = OutStreamer->getContext();
856 MCSymbol *MILabel = Ctx.createTempSymbol();
857 OutStreamer->emitLabel(Symbol: MILabel);
858
859 SM.recordStackMap(L: *MILabel, MI);
860 assert(NumNOPBytes % 2 == 0 && "Invalid number of NOP bytes requested!");
861
862 // Scan ahead to trim the shadow.
863 unsigned ShadowBytes = 0;
864 const MachineBasicBlock &MBB = *MI.getParent();
865 MachineBasicBlock::const_iterator MII(MI);
866 ++MII;
867 while (ShadowBytes < NumNOPBytes) {
868 if (MII == MBB.end() ||
869 MII->getOpcode() == TargetOpcode::PATCHPOINT ||
870 MII->getOpcode() == TargetOpcode::STACKMAP)
871 break;
872 ShadowBytes += TII->getInstSizeInBytes(MI: *MII);
873 if (MII->isCall())
874 break;
875 ++MII;
876 }
877
878 // Emit nops.
879 while (ShadowBytes < NumNOPBytes)
880 ShadowBytes += EmitNop(OutContext, OutStreamer&: *OutStreamer, NumBytes: NumNOPBytes - ShadowBytes,
881 STI: getSubtargetInfo());
882}
883
884// Lower a patchpoint of the form:
885// [<def>], <id>, <numBytes>, <target>, <numArgs>
886void SystemZAsmPrinter::LowerPATCHPOINT(const MachineInstr &MI,
887 SystemZMCInstLower &Lower) {
888 auto &Ctx = OutStreamer->getContext();
889 MCSymbol *MILabel = Ctx.createTempSymbol();
890 OutStreamer->emitLabel(Symbol: MILabel);
891
892 SM.recordPatchPoint(L: *MILabel, MI);
893 PatchPointOpers Opers(&MI);
894
895 unsigned EncodedBytes = 0;
896 const MachineOperand &CalleeMO = Opers.getCallTarget();
897
898 if (CalleeMO.isImm()) {
899 uint64_t CallTarget = CalleeMO.getImm();
900 if (CallTarget) {
901 unsigned ScratchIdx = -1;
902 unsigned ScratchReg = 0;
903 do {
904 ScratchIdx = Opers.getNextScratchIdx(StartIdx: ScratchIdx + 1);
905 ScratchReg = MI.getOperand(i: ScratchIdx).getReg();
906 } while (ScratchReg == SystemZ::R0D);
907
908 // Materialize the call target address
909 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(SystemZ::LLILF)
910 .addReg(Reg: ScratchReg)
911 .addImm(Val: CallTarget & 0xFFFFFFFF));
912 EncodedBytes += 6;
913 if (CallTarget >> 32) {
914 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(SystemZ::IIHF)
915 .addReg(Reg: ScratchReg)
916 .addImm(Val: CallTarget >> 32));
917 EncodedBytes += 6;
918 }
919
920 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(SystemZ::BASR)
921 .addReg(Reg: SystemZ::R14D)
922 .addReg(Reg: ScratchReg));
923 EncodedBytes += 2;
924 }
925 } else if (CalleeMO.isGlobal()) {
926 const MCExpr *Expr = Lower.getExpr(MO: CalleeMO, SystemZ::S_PLT);
927 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(SystemZ::BRASL)
928 .addReg(Reg: SystemZ::R14D)
929 .addExpr(Val: Expr));
930 EncodedBytes += 6;
931 }
932
933 // Emit padding.
934 unsigned NumBytes = Opers.getNumPatchBytes();
935 assert(NumBytes >= EncodedBytes &&
936 "Patchpoint can't request size less than the length of a call.");
937 assert((NumBytes - EncodedBytes) % 2 == 0 &&
938 "Invalid number of NOP bytes requested!");
939 while (EncodedBytes < NumBytes)
940 EncodedBytes += EmitNop(OutContext, OutStreamer&: *OutStreamer, NumBytes: NumBytes - EncodedBytes,
941 STI: getSubtargetInfo());
942}
943
944void SystemZAsmPrinter::LowerPATCHABLE_FUNCTION_ENTER(
945 const MachineInstr &MI, SystemZMCInstLower &Lower) {
946
947 const MachineFunction &MF = *(MI.getParent()->getParent());
948 const Function &F = MF.getFunction();
949
950 // If patchable-function-entry is set, emit in-function nops here.
951 if (F.hasFnAttribute(Kind: "patchable-function-entry")) {
952 // get M-N from function attribute (CodeGenFunction subtracts N
953 // from M to yield the correct patchable-function-entry).
954 unsigned Num = F.getFnAttributeAsParsedInteger(Kind: "patchable-function-entry");
955 // Emit M-N 2-byte nops. Use getNop() here instead of emitNops()
956 // to keep it aligned with the common code implementation emitting
957 // the prefix nops.
958 for (unsigned I = 0; I < Num; ++I)
959 EmitToStreamer(S&: *OutStreamer, Inst: MF.getSubtarget().getInstrInfo()->getNop());
960 return;
961 }
962 // Otherwise, emit xray sled.
963 // .begin:
964 // j .end # -> stmg %r2, %r15, 16(%r15)
965 // nop
966 // llilf %2, FuncID
967 // brasl %r14, __xray_FunctionEntry@GOT
968 // .end:
969 //
970 // Update compiler-rt/lib/xray/xray_s390x.cpp accordingly when number
971 // of instructions change.
972 bool HasVectorFeature =
973 TM.getMCSubtargetInfo().hasFeature(Feature: SystemZ::FeatureVector) &&
974 !TM.getMCSubtargetInfo().hasFeature(Feature: SystemZ::FeatureSoftFloat);
975 MCSymbol *FuncEntry = OutContext.getOrCreateSymbol(
976 Name: HasVectorFeature ? "__xray_FunctionEntryVec" : "__xray_FunctionEntry");
977 MCSymbol *BeginOfSled = OutContext.createTempSymbol(Name: "xray_sled_", AlwaysAddSuffix: true);
978 MCSymbol *EndOfSled = OutContext.createTempSymbol();
979 OutStreamer->emitLabel(Symbol: BeginOfSled);
980 EmitToStreamer(S&: *OutStreamer,
981 Inst: MCInstBuilder(SystemZ::J)
982 .addExpr(Val: MCSymbolRefExpr::create(Symbol: EndOfSled, Ctx&: OutContext)));
983 EmitNop(OutContext, OutStreamer&: *OutStreamer, NumBytes: 2, STI: getSubtargetInfo());
984 EmitToStreamer(S&: *OutStreamer,
985 Inst: MCInstBuilder(SystemZ::LLILF).addReg(Reg: SystemZ::R2D).addImm(Val: 0));
986 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(SystemZ::BRASL)
987 .addReg(Reg: SystemZ::R14D)
988 .addExpr(Val: MCSymbolRefExpr::create(
989 Symbol: FuncEntry, specifier: SystemZ::S_PLT, Ctx&: OutContext)));
990 OutStreamer->emitLabel(Symbol: EndOfSled);
991 recordSled(Sled: BeginOfSled, MI, Kind: SledKind::FUNCTION_ENTER, Version: 2);
992}
993
994void SystemZAsmPrinter::LowerPATCHABLE_RET(const MachineInstr &MI,
995 SystemZMCInstLower &Lower) {
996 unsigned OpCode = MI.getOperand(i: 0).getImm();
997 MCSymbol *FallthroughLabel = nullptr;
998 if (OpCode == SystemZ::CondReturn) {
999 FallthroughLabel = OutContext.createTempSymbol();
1000 int64_t Cond0 = MI.getOperand(i: 1).getImm();
1001 int64_t Cond1 = MI.getOperand(i: 2).getImm();
1002 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(SystemZ::BRC)
1003 .addImm(Val: Cond0)
1004 .addImm(Val: Cond1 ^ Cond0)
1005 .addExpr(Val: MCSymbolRefExpr::create(
1006 Symbol: FallthroughLabel, Ctx&: OutContext)));
1007 }
1008 // .begin:
1009 // br %r14 # -> stmg %r2, %r15, 24(%r15)
1010 // nop
1011 // nop
1012 // llilf %2,FuncID
1013 // j __xray_FunctionExit@GOT
1014 //
1015 // Update compiler-rt/lib/xray/xray_s390x.cpp accordingly when number
1016 // of instructions change.
1017 bool HasVectorFeature =
1018 TM.getMCSubtargetInfo().hasFeature(Feature: SystemZ::FeatureVector) &&
1019 !TM.getMCSubtargetInfo().hasFeature(Feature: SystemZ::FeatureSoftFloat);
1020 MCSymbol *FuncExit = OutContext.getOrCreateSymbol(
1021 Name: HasVectorFeature ? "__xray_FunctionExitVec" : "__xray_FunctionExit");
1022 MCSymbol *BeginOfSled = OutContext.createTempSymbol(Name: "xray_sled_", AlwaysAddSuffix: true);
1023 OutStreamer->emitLabel(Symbol: BeginOfSled);
1024 EmitToStreamer(S&: *OutStreamer,
1025 Inst: MCInstBuilder(SystemZ::BR).addReg(Reg: SystemZ::R14D));
1026 EmitNop(OutContext, OutStreamer&: *OutStreamer, NumBytes: 4, STI: getSubtargetInfo());
1027 EmitToStreamer(S&: *OutStreamer,
1028 Inst: MCInstBuilder(SystemZ::LLILF).addReg(Reg: SystemZ::R2D).addImm(Val: 0));
1029 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(SystemZ::J)
1030 .addExpr(Val: MCSymbolRefExpr::create(
1031 Symbol: FuncExit, specifier: SystemZ::S_PLT, Ctx&: OutContext)));
1032 if (FallthroughLabel)
1033 OutStreamer->emitLabel(Symbol: FallthroughLabel);
1034 recordSled(Sled: BeginOfSled, MI, Kind: SledKind::FUNCTION_EXIT, Version: 2);
1035}
1036
1037void SystemZAsmPrinter::lowerLOAD_TLS_BLOCK_ADDR(const MachineInstr &MI,
1038 SystemZMCInstLower &Lower) {
1039 Register AddrReg = MI.getOperand(i: 0).getReg();
1040 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
1041
1042 // EAR can only load the low subregister so use a shift for %a0 to produce
1043 // the GR containing %a0 and %a1.
1044 const Register Reg32 =
1045 MRI.getTargetRegisterInfo()->getSubReg(Reg: AddrReg, Idx: SystemZ::subreg_l32);
1046
1047 // ear <reg>, %a0
1048 EmitToStreamer(S&: *OutStreamer,
1049 Inst: MCInstBuilder(SystemZ::EAR).addReg(Reg: Reg32).addReg(Reg: SystemZ::A0));
1050
1051 // sllg <reg>, <reg>, 32
1052 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(SystemZ::SLLG)
1053 .addReg(Reg: AddrReg)
1054 .addReg(Reg: AddrReg)
1055 .addReg(Reg: 0)
1056 .addImm(Val: 32));
1057
1058 // ear <reg>, %a1
1059 EmitToStreamer(S&: *OutStreamer,
1060 Inst: MCInstBuilder(SystemZ::EAR).addReg(Reg: Reg32).addReg(Reg: SystemZ::A1));
1061}
1062
1063void SystemZAsmPrinter::lowerLOAD_GLOBAL_STACKGUARD_ADDR(
1064 const MachineInstr &MI, SystemZMCInstLower &Lower) {
1065 Register AddrReg = MI.getOperand(i: 0).getReg();
1066 const MachineFunction &MF = *(MI.getParent()->getParent());
1067 const Module *M = MF.getFunction().getParent();
1068 const TargetLowering *TLI = MF.getSubtarget().getTargetLowering();
1069
1070 // Obtain the global value (assert if stack guard variable can't be found).
1071 const GlobalVariable *GV = cast<GlobalVariable>(
1072 Val: TLI->getSDagStackGuard(M: *M, Libcalls: TLI->getLibcallLoweringInfo()));
1073
1074 // If configured, emit the `__stack_protector_loc` entry
1075 if (M->hasStackProtectorGuardRecord()) {
1076 MCSymbol *Sym = OutContext.createTempSymbol();
1077 OutStreamer->pushSection();
1078 OutStreamer->switchSection(Section: OutContext.getELFSection(
1079 Section: "__stack_protector_loc", Type: ELF::SHT_PROGBITS, Flags: ELF::SHF_ALLOC));
1080 OutStreamer->emitSymbolValue(Sym, Size: getDataLayout().getPointerSize());
1081 OutStreamer->popSection();
1082 OutStreamer->emitLabel(Symbol: Sym);
1083 }
1084 // Emit the address load.
1085 if (M->getPICLevel() == PICLevel::NotPIC) {
1086 EmitToStreamer(S&: *OutStreamer, Inst: MCInstBuilder(SystemZ::LARL)
1087 .addReg(Reg: AddrReg)
1088 .addExpr(Val: MCSymbolRefExpr::create(
1089 Symbol: getSymbol(GV), Ctx&: OutContext)));
1090 } else {
1091 EmitToStreamer(S&: *OutStreamer,
1092 Inst: MCInstBuilder(SystemZ::LGRL)
1093 .addReg(Reg: AddrReg)
1094 .addExpr(Val: MCSymbolRefExpr::create(
1095 Symbol: getSymbol(GV), specifier: SystemZ::S_GOTENT, Ctx&: OutContext)));
1096 }
1097}
1098
1099// The *alignment* of 128-bit vector types is different between the software
1100// and hardware vector ABIs. If the there is an externally visible use of a
1101// vector type in the module it should be annotated with an attribute.
1102void SystemZAsmPrinter::emitAttributes(Module &M) {
1103 if (M.getModuleFlag(Key: "s390x-visible-vector-ABI")) {
1104 bool HasVectorFeature =
1105 TM.getMCSubtargetInfo().hasFeature(Feature: SystemZ::FeatureVector);
1106 OutStreamer->emitGNUAttribute(Tag: 8, Value: HasVectorFeature ? 2 : 1);
1107 }
1108}
1109
1110// Convert a SystemZ-specific constant pool modifier into the associated
1111// specifier.
1112static uint8_t getSpecifierFromModifier(SystemZCP::SystemZCPModifier Modifier) {
1113 switch (Modifier) {
1114 case SystemZCP::TLSGD:
1115 return SystemZ::S_TLSGD;
1116 case SystemZCP::TLSLDM:
1117 return SystemZ::S_TLSLDM;
1118 case SystemZCP::DTPOFF:
1119 return SystemZ::S_DTPOFF;
1120 case SystemZCP::NTPOFF:
1121 return SystemZ::S_NTPOFF;
1122 }
1123 llvm_unreachable("Invalid SystemCPModifier!");
1124}
1125
1126void SystemZAsmPrinter::emitMachineConstantPoolValue(
1127 MachineConstantPoolValue *MCPV) {
1128 auto *ZCPV = static_cast<SystemZConstantPoolValue*>(MCPV);
1129
1130 const MCExpr *Expr = MCSymbolRefExpr::create(
1131 Symbol: getSymbol(GV: ZCPV->getGlobalValue()),
1132 specifier: getSpecifierFromModifier(Modifier: ZCPV->getModifier()), Ctx&: OutContext);
1133 uint64_t Size = getDataLayout().getTypeAllocSize(Ty: ZCPV->getType());
1134
1135 OutStreamer->emitValue(Value: Expr, Size);
1136}
1137
1138// Emit the ctor or dtor list taking into account the init priority.
1139void SystemZAsmPrinter::emitXXStructorList(const DataLayout &DL,
1140 const Constant *List, bool IsCtor) {
1141 if (!TM.getTargetTriple().isOSBinFormatGOFF())
1142 return AsmPrinter::emitXXStructorList(DL, List, IsCtor);
1143
1144 SmallVector<Structor, 8> Structors;
1145 preprocessXXStructorList(DL, List, Structors);
1146 if (Structors.empty())
1147 return;
1148
1149 const Align Align = llvm::Align(4);
1150 const TargetLoweringObjectFileGOFF &Obj =
1151 static_cast<const TargetLoweringObjectFileGOFF &>(getObjFileLowering());
1152 for (Structor &S : Structors) {
1153 MCSectionGOFF *Section =
1154 static_cast<MCSectionGOFF *>(Obj.getStaticXtorSection(Priority: S.Priority));
1155 OutStreamer->switchSection(Section);
1156 if (OutStreamer->getCurrentSection() != OutStreamer->getPreviousSection())
1157 emitAlignment(Alignment: Align);
1158
1159 // The priority is provided as an input to getStaticXtorSection(), and is
1160 // recalculated within that function as `Prio` going to going into the
1161 // PR section.
1162 // This priority retrieved via the `SortKey` below is the recalculated
1163 // Priority.
1164 uint32_t XtorPriority = Section->getPRAttributes().SortKey;
1165
1166 const GlobalValue *GV = dyn_cast<GlobalValue>(Val: S.Func->stripPointerCasts());
1167 assert(GV && "C++ xxtor pointer was not a GlobalValue!");
1168 MCSymbolGOFF *Symbol = static_cast<MCSymbolGOFF *>(getSymbol(GV));
1169
1170 // @@SQINIT entry: { unsigned prio; void (*ctor)(); void (*dtor)(); }
1171
1172 unsigned PointerSizeInBytes = DL.getPointerSize();
1173
1174 auto &Ctx = OutStreamer->getContext();
1175 const MCExpr *ADAFuncRefExpr;
1176 unsigned SlotKind = SystemZII::MO_ADA_DIRECT_FUNC_DESC;
1177
1178 MCSectionGOFF *ADASection =
1179 static_cast<MCSectionGOFF *>(Obj.getADASection());
1180 assert(ADASection && "ADA section must exist for GOFF targets!");
1181 const MCSymbol *ADASym = ADASection->getBeginSymbol();
1182 assert(ADASym && "ADA symbol should already be set!");
1183
1184 ADAFuncRefExpr = MCBinaryExpr::createAdd(
1185 LHS: MCSpecifierExpr::create(Expr: MCSymbolRefExpr::create(Symbol: ADASym, Ctx&: OutContext),
1186 S: SystemZ::S_QCon, Ctx&: OutContext),
1187 RHS: MCConstantExpr::create(Value: ADATable.insert(Sym: Symbol, SlotKind), Ctx), Ctx);
1188
1189 emitInt32(Value: XtorPriority);
1190 if (IsCtor) {
1191 OutStreamer->emitValue(Value: ADAFuncRefExpr, Size: PointerSizeInBytes);
1192 OutStreamer->emitIntValue(Value: 0, Size: PointerSizeInBytes);
1193 } else {
1194 OutStreamer->emitIntValue(Value: 0, Size: PointerSizeInBytes);
1195 OutStreamer->emitValue(Value: ADAFuncRefExpr, Size: PointerSizeInBytes);
1196 }
1197 }
1198}
1199
1200static void printFormattedRegName(const MCAsmInfo *MAI, unsigned RegNo,
1201 raw_ostream &OS) {
1202 const char *RegName;
1203 if (MAI->getAssemblerDialect() == AD_HLASM) {
1204 RegName = SystemZHLASMInstPrinter::getRegisterName(Reg: RegNo);
1205 // Skip register prefix so that only register number is left
1206 assert(isalpha(RegName[0]) && isdigit(RegName[1]));
1207 OS << (RegName + 1);
1208 } else {
1209 RegName = SystemZGNUInstPrinter::getRegisterName(Reg: RegNo);
1210 OS << '%' << RegName;
1211 }
1212}
1213
1214static void printReg(unsigned Reg, const MCAsmInfo *MAI, raw_ostream &OS) {
1215 if (!Reg)
1216 OS << '0';
1217 else
1218 printFormattedRegName(MAI, RegNo: Reg, OS);
1219}
1220
1221static void printOperand(const MCOperand &MCOp, const MCAsmInfo *MAI,
1222 raw_ostream &OS) {
1223 if (MCOp.isReg())
1224 printReg(Reg: MCOp.getReg(), MAI, OS);
1225 else if (MCOp.isImm())
1226 OS << MCOp.getImm();
1227 else if (MCOp.isExpr())
1228 MAI->printExpr(OS, *MCOp.getExpr());
1229 else
1230 llvm_unreachable("Invalid operand");
1231}
1232
1233static void printAddress(const MCAsmInfo *MAI, unsigned Base,
1234 const MCOperand &DispMO, unsigned Index,
1235 raw_ostream &OS) {
1236 printOperand(MCOp: DispMO, MAI, OS);
1237 if (Base || Index) {
1238 OS << '(';
1239 if (Index) {
1240 printFormattedRegName(MAI, RegNo: Index, OS);
1241 if (Base)
1242 OS << ',';
1243 }
1244 if (Base)
1245 printFormattedRegName(MAI, RegNo: Base, OS);
1246 OS << ')';
1247 }
1248}
1249
1250bool SystemZAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
1251 const char *ExtraCode,
1252 raw_ostream &OS) {
1253 const MCRegisterInfo &MRI = TM.getMCRegisterInfo();
1254 const MachineOperand &MO = MI->getOperand(i: OpNo);
1255 MCOperand MCOp;
1256 if (ExtraCode) {
1257 if (ExtraCode[0] == 'N' && !ExtraCode[1] && MO.isReg() &&
1258 SystemZ::GR128BitRegClass.contains(Reg: MO.getReg()))
1259 MCOp =
1260 MCOperand::createReg(Reg: MRI.getSubReg(Reg: MO.getReg(), Idx: SystemZ::subreg_l64));
1261 else
1262 return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, OS);
1263 } else {
1264 SystemZMCInstLower Lower(MF->getContext(), *this);
1265 MCOp = Lower.lowerOperand(MO);
1266 }
1267 printOperand(MCOp, MAI: &MAI, OS);
1268 return false;
1269}
1270
1271bool SystemZAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
1272 unsigned OpNo,
1273 const char *ExtraCode,
1274 raw_ostream &OS) {
1275 if (ExtraCode && ExtraCode[0] && !ExtraCode[1]) {
1276 switch (ExtraCode[0]) {
1277 case 'A':
1278 // Unlike EmitMachineNode(), EmitSpecialNode(INLINEASM) does not call
1279 // setMemRefs(), so MI->memoperands() is empty and the alignment
1280 // information is not available.
1281 return false;
1282 case 'O':
1283 OS << MI->getOperand(i: OpNo + 1).getImm();
1284 return false;
1285 case 'R':
1286 ::printReg(Reg: MI->getOperand(i: OpNo).getReg(), MAI: &MAI, OS);
1287 return false;
1288 }
1289 }
1290 printAddress(MAI: &MAI, Base: MI->getOperand(i: OpNo).getReg(),
1291 DispMO: MCOperand::createImm(Val: MI->getOperand(i: OpNo + 1).getImm()),
1292 Index: MI->getOperand(i: OpNo + 2).getReg(), OS);
1293 return false;
1294}
1295
1296void SystemZAsmPrinter::emitEndOfAsmFile(Module &M) {
1297 auto TT = OutContext.getTargetTriple();
1298 if (TT.isOSzOS()) {
1299 auto *ZOS = static_cast<SystemZTargetzOSStreamer *>(getTargetStreamer());
1300 emitADASection();
1301 emitIDRLSection(M);
1302 // On z/OS, we need to associate an external data reference with an ED
1303 // symbol, for which we use the the ED of the ADA. We also need to mark the
1304 // reference as being to data, otherwise we cannot bind with code generated
1305 // by XL.
1306 for (auto &GO : M.global_objects()) {
1307 if (auto *GV = dyn_cast<GlobalVariable>(Val: &GO)) {
1308 if (!GV->hasInitializer()) {
1309 MCSymbol *Sym = getSymbol(GV);
1310 ZOS->emitADA(Sym, Section: OutContext.getObjectFileInfo()->getADASection());
1311 OutStreamer->emitSymbolAttribute(Symbol: Sym, Attribute: MCSA_ELF_TypeObject);
1312 }
1313 }
1314 }
1315 }
1316 emitAttributes(M);
1317}
1318
1319void SystemZAsmPrinter::emitADASection() {
1320 OutStreamer->pushSection();
1321
1322 const unsigned PointerSize = getDataLayout().getPointerSize();
1323 OutStreamer->switchSection(Section: getObjFileLowering().getADASection());
1324
1325 auto *ZOS = static_cast<SystemZTargetzOSStreamer *>(getTargetStreamer());
1326 unsigned EmittedBytes = 0;
1327 for (auto &Entry : ADATable.getTable()) {
1328 const MCSymbol *Sym;
1329 unsigned SlotKind;
1330 std::tie(args&: Sym, args&: SlotKind) = Entry.first;
1331 unsigned Offset = Entry.second;
1332 assert(Offset == EmittedBytes && "Offset not as expected");
1333 (void)EmittedBytes;
1334#define EMIT_COMMENT(Str) \
1335 OutStreamer->AddComment(Twine("Offset ") \
1336 .concat(utostr(Offset)) \
1337 .concat(" " Str " ") \
1338 .concat(Sym->getName()));
1339 switch (SlotKind) {
1340 case SystemZII::MO_ADA_DIRECT_FUNC_DESC:
1341 // Language Environment DLL logic requires function descriptors, for
1342 // imported functions, that are placed in the ADA to be 8 byte aligned.
1343 EMIT_COMMENT("function descriptor of");
1344 OutStreamer->emitValue(
1345 Value: MCSpecifierExpr::create(Expr: MCSymbolRefExpr::create(Symbol: Sym, Ctx&: OutContext),
1346 S: SystemZ::S_RCon, Ctx&: OutContext),
1347 Size: PointerSize);
1348 OutStreamer->emitValue(
1349 Value: MCSpecifierExpr::create(Expr: MCSymbolRefExpr::create(Symbol: Sym, Ctx&: OutContext),
1350 S: SystemZ::S_VCon, Ctx&: OutContext),
1351 Size: PointerSize);
1352 EmittedBytes += PointerSize * 2;
1353 break;
1354 case SystemZII::MO_ADA_DATA_SYMBOL_ADDR:
1355 EMIT_COMMENT("pointer to data symbol");
1356 OutStreamer->emitValue(
1357 Value: MCSpecifierExpr::create(Expr: MCSymbolRefExpr::create(Symbol: Sym, Ctx&: OutContext),
1358 S: SystemZ::S_None, Ctx&: OutContext),
1359 Size: PointerSize);
1360 EmittedBytes += PointerSize;
1361 break;
1362 case SystemZII::MO_ADA_INDIRECT_FUNC_DESC: {
1363 MCSymbol *Alias = OutContext.getOrCreateSymbol(
1364 Name: Twine(Sym->getName()).concat(Suffix: "@indirect"));
1365 OutStreamer->emitSymbolAttribute(Symbol: Alias, Attribute: MCSA_IndirectSymbol);
1366 OutStreamer->emitSymbolAttribute(Symbol: Alias, Attribute: MCSA_ELF_TypeFunction);
1367 OutStreamer->emitSymbolAttribute(Symbol: Alias, Attribute: MCSA_Global);
1368 OutStreamer->emitSymbolAttribute(Symbol: Alias, Attribute: MCSA_Extern);
1369 MCSymbolGOFF *GOFFSym =
1370 static_cast<llvm::MCSymbolGOFF *>(const_cast<llvm::MCSymbol *>(Sym));
1371 ZOS->emitExternalName(Sym: Alias, Name: GOFFSym->getExternalName());
1372 EMIT_COMMENT("pointer to function descriptor");
1373 OutStreamer->emitValue(
1374 Value: MCSpecifierExpr::create(Expr: MCSymbolRefExpr::create(Symbol: Alias, Ctx&: OutContext),
1375 S: SystemZ::S_VCon, Ctx&: OutContext),
1376 Size: PointerSize);
1377 EmittedBytes += PointerSize;
1378 break;
1379 }
1380 default:
1381 llvm_unreachable("Unexpected slot kind");
1382 }
1383#undef EMIT_COMMENT
1384 }
1385 OutStreamer->popSection();
1386}
1387
1388static std::string getProductID(Module &M) {
1389 std::string ProductID;
1390 if (auto *MD = M.getModuleFlag(Key: "zos_product_id"))
1391 ProductID = cast<MDString>(Val: MD)->getString().str();
1392 if (ProductID.empty())
1393 ProductID = "LLVM";
1394 return ProductID;
1395}
1396
1397static uint32_t getProductVersion(Module &M) {
1398 if (auto *VersionVal = mdconst::extract_or_null<ConstantInt>(
1399 MD: M.getModuleFlag(Key: "zos_product_major_version")))
1400 return VersionVal->getZExtValue();
1401 return LLVM_VERSION_MAJOR;
1402}
1403
1404static uint32_t getProductRelease(Module &M) {
1405 if (auto *ReleaseVal = mdconst::extract_or_null<ConstantInt>(
1406 MD: M.getModuleFlag(Key: "zos_product_minor_version")))
1407 return ReleaseVal->getZExtValue();
1408 return LLVM_VERSION_MINOR;
1409}
1410
1411static uint32_t getProductPatch(Module &M) {
1412 if (auto *PatchVal = mdconst::extract_or_null<ConstantInt>(
1413 MD: M.getModuleFlag(Key: "zos_product_patchlevel")))
1414 return PatchVal->getZExtValue();
1415 return LLVM_VERSION_PATCH;
1416}
1417
1418static time_t getTranslationTime(Module &M) {
1419 std::time_t Time = 0;
1420 if (auto *Val = mdconst::extract_or_null<ConstantInt>(
1421 MD: M.getModuleFlag(Key: "zos_translation_time"))) {
1422 long SecondsSinceEpoch = Val->getSExtValue();
1423 Time = static_cast<time_t>(SecondsSinceEpoch);
1424 }
1425 return Time;
1426}
1427
1428void SystemZAsmPrinter::emitIDRLSection(Module &M) {
1429 OutStreamer->pushSection();
1430 OutStreamer->switchSection(Section: getObjFileLowering().getIDRLSection());
1431 constexpr unsigned IDRLDataLength = 30;
1432 std::time_t Time = getTranslationTime(M);
1433
1434 uint32_t ProductVersion = getProductVersion(M);
1435 uint32_t ProductRelease = getProductRelease(M);
1436
1437 std::string ProductID = getProductID(M);
1438
1439 SmallString<IDRLDataLength + 1> TempStr;
1440 raw_svector_ostream O(TempStr);
1441 O << formatv(Fmt: "{0,-10}{1,0-2:d}{2,0-2:d}{3:%Y%m%d%H%M%S}{4,0-2}",
1442 Vals: ProductID.substr(pos: 0, n: 10).c_str(), Vals&: ProductVersion, Vals&: ProductRelease,
1443 Vals: llvm::sys::toUtcTime(T: Time), Vals: "0");
1444 SmallString<IDRLDataLength> Data;
1445 ConverterEBCDIC::convertToEBCDIC(Source: TempStr, Result&: Data);
1446
1447 OutStreamer->emitInt8(Value: 0); // Reserved.
1448 OutStreamer->emitInt8(Value: 3); // Format.
1449 OutStreamer->emitInt16(Value: IDRLDataLength); // Length.
1450 OutStreamer->emitBytes(Data: Data.str());
1451 OutStreamer->popSection();
1452}
1453
1454void SystemZAsmPrinter::emitFunctionBodyEnd() {
1455 if (TM.getTargetTriple().isOSzOS()) {
1456 // Emit symbol for the end of function if the z/OS target streamer
1457 // is used. This is needed to calculate the size of the function.
1458 auto *ZOS = static_cast<SystemZTargetzOSStreamer *>(getTargetStreamer());
1459 OutStreamer->emitLabel(Symbol: ZOS->DeferredPPA1.back().FnEnd);
1460 }
1461}
1462
1463// Determine the end of the prolog and the instructions which updates the stack
1464// register, and attach symbols to those instructions.
1465static void determinePrologueStackUpdateSym(MachineFunction *MF,
1466 MCSymbol *&EndOfPrologSym,
1467 MCSymbol *&StackUpdateSym) {
1468 EndOfPrologSym = nullptr;
1469 StackUpdateSym = nullptr;
1470
1471 // Scan the basic block for the FENCE instruction which marks the end
1472 // of the prologue. We know
1473 // the prologue is spread at most across the first 3 basic blocks. Also record
1474 // the first instruction updating the stack pointer.
1475 const SystemZSubtarget &STI = MF->getSubtarget<SystemZSubtarget>();
1476 auto &Regs = STI.getSpecialRegisters<SystemZXPLINK64Registers>();
1477 MachineInstr *EndOfPrologMI = nullptr;
1478 MachineInstr *StackUpdateMI = nullptr;
1479 unsigned BBCount = 1;
1480
1481 for (auto &MBB : *MF) {
1482 for (auto &I : MBB) {
1483 if (I.getOpcode() == SystemZ::FENCE)
1484 EndOfPrologMI = &I;
1485 else if (!StackUpdateMI) {
1486 unsigned Opcode = I.getOpcode();
1487 // TODO: We can instead emit a pseudo instruction in
1488 // SystemZFrameLowering to represent a stack adjustment instruction, and
1489 // check for that here, instead of having to check for multiple
1490 // instructions.
1491 if ((Opcode == SystemZ::AGHI || Opcode == SystemZ::AGFI) &&
1492 I.getOperand(i: 0).getReg() == Regs.getStackPointerRegister())
1493 StackUpdateMI = &I;
1494 }
1495 }
1496
1497 // Prologue can be a max of 3 BBs if we need to call stack extension code
1498 if (EndOfPrologMI || BBCount == 3)
1499 break;
1500
1501 ++BBCount;
1502 }
1503
1504 // Leaf functions do not have a prologue.
1505 if (EndOfPrologMI == nullptr)
1506 return;
1507
1508#ifdef EXPENSIVE_CHECKS
1509 // Check that the prolog length is valid.
1510 auto *TII = STI.getInstrInfo();
1511 size_t Size = 0;
1512
1513 for (auto &MBB : *MF) {
1514 bool TerminateLoop = false;
1515 for (auto &I : MBB) {
1516 Size += TII->getInstSizeInBytes(I);
1517 if (&I == EndOfPrologMI) {
1518 TerminateLoop = true;
1519 break;
1520 }
1521 }
1522 if (TerminateLoop)
1523 break;
1524 }
1525 if (Size > 128)
1526 report_fatal_error(
1527 Twine(MF->getName()).concat(": Prolog exceeds 128 bytes"));
1528#endif
1529
1530 // Attach a temporary symbol to mark the end of the prolog.
1531 EndOfPrologSym = MF->getContext().createTempSymbol(Name: "end_of_prologue");
1532 EndOfPrologMI->setPostInstrSymbol(MF&: *MF, Symbol: EndOfPrologSym);
1533
1534 if (StackUpdateMI) {
1535 StackUpdateSym = MF->getContext().createTempSymbol(Name: "stack_update");
1536 StackUpdateMI->setPreInstrSymbol(MF&: *MF, Symbol: StackUpdateSym);
1537 }
1538}
1539
1540void SystemZAsmPrinter::calculatePPA1() {
1541 auto *ZOS = static_cast<SystemZTargetzOSStreamer *>(getTargetStreamer());
1542 assert(ZOS->PPA2Sym != nullptr && "PPA2 Symbol not defined");
1543
1544 SystemZTargetzOSStreamer::PPA1Info Info;
1545
1546 const TargetRegisterInfo *TRI = MF->getRegInfo().getTargetRegisterInfo();
1547 const SystemZSubtarget &Subtarget = MF->getSubtarget<SystemZSubtarget>();
1548
1549 const SystemZMachineFunctionInfo *ZFI =
1550 MF->getInfo<SystemZMachineFunctionInfo>();
1551 const auto *ZFL = static_cast<const SystemZXPLINKFrameLowering *>(
1552 Subtarget.getFrameLowering());
1553 const MachineFrameInfo &MFFrame = MF->getFrameInfo();
1554
1555 // Get saved GPR/FPR/VPR masks.
1556 const std::vector<CalleeSavedInfo> &CSI = MFFrame.getCalleeSavedInfo();
1557 uint16_t SavedGPRMask = 0;
1558 uint16_t SavedFPRMask = 0;
1559 uint8_t SavedVRMask = 0;
1560 int64_t OffsetFPR = 0;
1561 int64_t OffsetVR = 0;
1562 const int64_t TopOfStack =
1563 MFFrame.getOffsetAdjustment() + MFFrame.getStackSize();
1564
1565 // Loop over the spilled registers. The CalleeSavedInfo can't be used because
1566 // it does not contain all spilled registers.
1567 for (unsigned I = ZFI->getSpillGPRRegs().LowGPR,
1568 E = ZFI->getSpillGPRRegs().HighGPR;
1569 I && E && I <= E; ++I) {
1570 unsigned V = TRI->getEncodingValue(Reg: (Register)I);
1571 assert(V < 16 && "GPR index out of range");
1572 SavedGPRMask |= 1 << (15 - V);
1573 }
1574
1575 for (auto &CS : CSI) {
1576 unsigned Reg = CS.getReg();
1577 unsigned I = TRI->getEncodingValue(Reg);
1578
1579 if (SystemZ::FP64BitRegClass.contains(Reg)) {
1580 assert(I < 16 && "FPR index out of range");
1581 SavedFPRMask |= 1 << (15 - I);
1582 int64_t Temp = MFFrame.getObjectOffset(ObjectIdx: CS.getFrameIdx());
1583 if (Temp < OffsetFPR)
1584 OffsetFPR = Temp;
1585 } else if (SystemZ::VR128BitRegClass.contains(Reg)) {
1586 assert(I >= 16 && I <= 23 && "VPR index out of range");
1587 unsigned BitNum = I - 16;
1588 SavedVRMask |= 1 << (7 - BitNum);
1589 int64_t Temp = MFFrame.getObjectOffset(ObjectIdx: CS.getFrameIdx());
1590 if (Temp < OffsetVR)
1591 OffsetVR = Temp;
1592 }
1593 }
1594
1595 // Adjust the offset.
1596 OffsetFPR += (OffsetFPR < 0) ? TopOfStack : 0;
1597 OffsetVR += (OffsetVR < 0) ? TopOfStack : 0;
1598
1599 // Get alloca register.
1600 uint8_t FrameReg = TRI->getEncodingValue(Reg: TRI->getFrameRegister(MF: *MF));
1601 uint8_t AllocaReg = ZFL->hasFP(MF: *MF) ? FrameReg : 0;
1602 assert(AllocaReg < 16 && "Can't have alloca register larger than 15");
1603
1604 MCSymbol *PersonalityRoutine = nullptr;
1605 MCSymbol *GCCEH = nullptr;
1606 uint64_t PersonalityADADisp = 0;
1607 uint64_t GCCEHADADisp = 0;
1608 if (!MF->getLandingPads().empty()) {
1609 const Function *Per = dyn_cast<Function>(
1610 Val: MF->getFunction().getPersonalityFn()->stripPointerCasts());
1611 PersonalityRoutine = Per ? MF->getTarget().getSymbol(GV: Per) : nullptr;
1612 assert(PersonalityRoutine && "Missing personality routine");
1613
1614 GCCEH = MF->getContext().getOrCreateSymbol(Name: Twine("GCC_except_table") +
1615 Twine(MF->getFunctionNumber()));
1616 PersonalityADADisp = ADATable.insert(Sym: PersonalityRoutine,
1617 SlotKind: SystemZII::MO_ADA_INDIRECT_FUNC_DESC);
1618 GCCEHADADisp = ADATable.insert(Sym: GCCEH, SlotKind: SystemZII::MO_ADA_DATA_SYMBOL_ADDR);
1619 }
1620
1621 // Get the name of the function, with suffix _.
1622 std::string N(MF->getFunction().hasName()
1623 ? Twine(MF->getFunction().getName()).concat(Suffix: "_").str()
1624 : "");
1625
1626 // Calculate the lables for the prolog size and the stack update symbol.
1627 MCSymbol *EndOfPrologSym;
1628 MCSymbol *StackUpdateSym;
1629 determinePrologueStackUpdateSym(MF, EndOfPrologSym, StackUpdateSym);
1630
1631 // Save the calculated values.
1632 if (MF->getFunction().hasFnAttribute(Kind: "zos-ppa1-name"))
1633 Info.Name =
1634 MF->getFunction().getFnAttribute(Kind: "zos-ppa1-name").getValueAsString();
1635 else if (MF->getFunction().hasName())
1636 Info.Name = MF->getFunction().getName();
1637
1638 Info.PPA1 = OutContext.createTempSymbol(Name: Twine("PPA1_").concat(Suffix: N), AlwaysAddSuffix: true);
1639 Info.EPMarker = OutContext.createTempSymbol(Name: Twine("EPM_").concat(Suffix: N), AlwaysAddSuffix: true);
1640 Info.FnEnd = OutContext.createTempSymbol(Name: Twine(N).concat(Suffix: "end_"));
1641 Info.Fn = CurrentFnSym;
1642 Info.EndOfProlog = EndOfPrologSym;
1643 Info.StackUpdate = StackUpdateSym;
1644 Info.PersonalityADADisp = PersonalityADADisp;
1645 Info.GCCEHADADisp = GCCEHADADisp;
1646 Info.OffsetFPR = OffsetFPR;
1647 Info.OffsetVR = OffsetVR;
1648 Info.CallFrameSize = MFFrame.getMaxCallFrameSize();
1649 Info.SizeOfFnParams = ZFI->getSizeOfFnParams();
1650 Info.SavedGPRMask = SavedGPRMask;
1651 Info.SavedFPRMask = SavedFPRMask;
1652 Info.SavedVRMask = SavedVRMask;
1653 Info.FrameReg = FrameReg;
1654 Info.AllocaReg = AllocaReg;
1655 Info.IsVarArg = MF->getFunction().isVarArg();
1656 Info.HasStackProtector = MFFrame.hasStackProtectorIndex();
1657
1658 ZOS->DeferredPPA1.push_back(Elt: Info);
1659}
1660
1661void SystemZAsmPrinter::emitStartOfAsmFile(Module &M) {
1662 if (TM.getTargetTriple().isOSzOS())
1663 emitPPA2(M);
1664 AsmPrinter::emitStartOfAsmFile(M);
1665}
1666
1667void SystemZAsmPrinter::emitPPA2(Module &M) {
1668 auto *ZOS = static_cast<SystemZTargetzOSStreamer *>(getTargetStreamer());
1669 OutStreamer->pushSection();
1670 OutStreamer->switchSection(Section: getObjFileLowering().getTextSection());
1671 MCContext &OutContext = OutStreamer->getContext();
1672 // Make CELQSTRT symbol.
1673 const char *StartSymbolName = "CELQSTRT";
1674 MCSymbol *CELQSTRT = OutContext.getOrCreateSymbol(Name: StartSymbolName);
1675 OutStreamer->emitSymbolAttribute(Symbol: CELQSTRT, Attribute: MCSA_OSLinkage);
1676 OutStreamer->emitSymbolAttribute(Symbol: CELQSTRT, Attribute: MCSA_Global);
1677
1678 // Create symbol and assign to streamer field for use in PPA1.
1679 ZOS->PPA2Sym = OutContext.createTempSymbol(Name: "PPA2", AlwaysAddSuffix: false);
1680 MCSymbol *PPA2Sym = ZOS->PPA2Sym;
1681 MCSymbol *DateVersionSym = OutContext.createTempSymbol(Name: "DVS", AlwaysAddSuffix: false);
1682
1683 std::time_t Time = getTranslationTime(M);
1684 SmallString<14> CompilationTimeEBCDIC, CompilationTime;
1685 CompilationTime = formatv(Fmt: "{0:%Y%m%d%H%M%S}", Vals: llvm::sys::toUtcTime(T: Time));
1686
1687 uint32_t ProductVersion = getProductVersion(M),
1688 ProductRelease = getProductRelease(M),
1689 ProductPatch = getProductPatch(M);
1690
1691 SmallString<6> VersionEBCDIC, Version;
1692 Version = formatv(Fmt: "{0,0-2:d}{1,0-2:d}{2,0-2:d}", Vals&: ProductVersion,
1693 Vals&: ProductRelease, Vals&: ProductPatch);
1694
1695 ConverterEBCDIC::convertToEBCDIC(Source: CompilationTime, Result&: CompilationTimeEBCDIC);
1696 ConverterEBCDIC::convertToEBCDIC(Source: Version, Result&: VersionEBCDIC);
1697
1698 enum class PPA2MemberId : uint8_t {
1699 // See z/OS Language Environment Vendor Interfaces v2r5, p.23, for
1700 // complete list. Only the C runtime is supported by this backend.
1701 LE_C_Runtime = 3,
1702 };
1703 enum class PPA2MemberSubId : uint8_t {
1704 // List of languages using the LE C runtime implementation.
1705 C = 0x00,
1706 CXX = 0x01,
1707 Swift = 0x03,
1708 Go = 0x60,
1709 LLVMBasedLang = 0xe7,
1710 };
1711 // PPA2 Flags
1712 enum class PPA2Flags : uint8_t {
1713 CompileForBinaryFloatingPoint = 0x80,
1714 CompiledWithXPLink = 0x01,
1715 CompiledUnitASCII = 0x04,
1716 HasServiceInfo = 0x20,
1717 };
1718
1719 PPA2MemberSubId MemberSubId = PPA2MemberSubId::LLVMBasedLang;
1720 if (auto *MD = M.getModuleFlag(Key: "zos_cu_language")) {
1721 StringRef Language = cast<MDString>(Val: MD)->getString();
1722 MemberSubId = StringSwitch<PPA2MemberSubId>(Language)
1723 .Case(S: "C", Value: PPA2MemberSubId::C)
1724 .Case(S: "C++", Value: PPA2MemberSubId::CXX)
1725 .Case(S: "Swift", Value: PPA2MemberSubId::Swift)
1726 .Case(S: "Go", Value: PPA2MemberSubId::Go)
1727 .Default(Value: PPA2MemberSubId::LLVMBasedLang);
1728 }
1729
1730 // Emit PPA2 section.
1731 OutStreamer->emitLabel(Symbol: PPA2Sym);
1732 OutStreamer->emitInt8(Value: static_cast<uint8_t>(PPA2MemberId::LE_C_Runtime));
1733 OutStreamer->emitInt8(Value: static_cast<uint8_t>(MemberSubId));
1734 OutStreamer->emitInt8(Value: 0x22); // Member defined, c370_plist+c370_env
1735 OutStreamer->emitInt8(Value: 0x04); // Control level 4 (XPLink)
1736 OutStreamer->emitAbsoluteSymbolDiff(Hi: CELQSTRT, Lo: PPA2Sym, Size: 4);
1737 OutStreamer->emitInt32(Value: 0x00000000);
1738 OutStreamer->emitAbsoluteSymbolDiff(Hi: DateVersionSym, Lo: PPA2Sym, Size: 4);
1739 OutStreamer->emitInt32(
1740 Value: 0x00000000); // Offset to main entry point, always 0 (so says TR).
1741 uint8_t Flgs = static_cast<uint8_t>(PPA2Flags::CompileForBinaryFloatingPoint);
1742 Flgs |= static_cast<uint8_t>(PPA2Flags::CompiledWithXPLink);
1743
1744 bool IsASCII = true;
1745 if (auto *MD = M.getModuleFlag(Key: "zos_le_char_mode")) {
1746 const StringRef &CharMode = cast<MDString>(Val: MD)->getString();
1747 if (CharMode == "ebcdic")
1748 IsASCII = false;
1749 else if (CharMode != "ascii")
1750 OutContext.reportError(
1751 L: {}, Msg: "Only ascii or ebcdic are allowed for zos_le_char_mode");
1752 }
1753 if (IsASCII)
1754 Flgs |= static_cast<uint8_t>(
1755 PPA2Flags::CompiledUnitASCII); // Setting bit for ASCII char. mode.
1756
1757 OutStreamer->emitInt8(Value: Flgs);
1758 OutStreamer->emitInt8(Value: 0x00); // Reserved.
1759 // No MD5 signature before timestamp.
1760 // No FLOAT(AFP(VOLATILE)).
1761 // Remaining 5 flag bits reserved.
1762 OutStreamer->emitInt16(Value: 0x0000); // 16 Reserved flag bits.
1763
1764 // Emit date and version section.
1765 OutStreamer->emitLabel(Symbol: DateVersionSym);
1766 OutStreamer->emitBytes(Data: CompilationTimeEBCDIC.str());
1767 OutStreamer->emitBytes(Data: VersionEBCDIC.str());
1768
1769 OutStreamer->emitInt16(Value: 0x0000); // Service level string length.
1770
1771 // The binder requires that the offset to the PPA2 be emitted in a different,
1772 // specially-named section.
1773 OutStreamer->switchSection(Section: getObjFileLowering().getPPA2ListSection());
1774 // Emit 8 byte alignment.
1775 // Emit pointer to PPA2 label.
1776 OutStreamer->AddComment(T: "A(PPA2-CELQSTRT)");
1777 OutStreamer->emitAbsoluteSymbolDiff(Hi: PPA2Sym, Lo: CELQSTRT, Size: 8);
1778 OutStreamer->popSection();
1779}
1780
1781void SystemZAsmPrinter::emitGlobalAlias(const Module &M,
1782 const GlobalAlias &GA) {
1783 if (!TM.getTargetTriple().isOSzOS())
1784 return AsmPrinter::emitGlobalAlias(M, GA);
1785
1786 // Aliased function labels have already been emitted for z/OS
1787}
1788
1789const MCExpr *SystemZAsmPrinter::lowerConstant(const Constant *CV,
1790 const Constant *BaseCV,
1791 uint64_t Offset) {
1792 const Triple &TargetTriple = TM.getTargetTriple();
1793
1794 if (TargetTriple.isOSzOS()) {
1795 const GlobalAlias *GA = dyn_cast<GlobalAlias>(Val: CV);
1796 const GlobalVariable *GV = dyn_cast<GlobalVariable>(Val: CV);
1797 const Function *FV = dyn_cast<Function>(Val: CV);
1798 bool IsFunc = !GV && (FV || (GA && isa<Function>(Val: GA->getAliaseeObject())));
1799
1800 MCSymbol *Sym = NULL;
1801
1802 if (GA)
1803 Sym = getSymbol(GV: GA);
1804 else if (IsFunc)
1805 Sym = getSymbol(GV: FV);
1806 else if (GV)
1807 Sym = getSymbol(GV);
1808
1809 if (IsFunc) {
1810 OutStreamer->emitSymbolAttribute(Symbol: Sym, Attribute: MCSA_ELF_TypeFunction);
1811 if (FV->hasExternalLinkage())
1812 return MCSpecifierExpr::create(Expr: MCSymbolRefExpr::create(Symbol: Sym, Ctx&: OutContext),
1813 S: SystemZ::S_VCon, Ctx&: OutContext);
1814 // Trigger creation of function descriptor in ADA for internal
1815 // functions.
1816 unsigned Disp = ADATable.insert(Sym, SlotKind: SystemZII::MO_ADA_DIRECT_FUNC_DESC);
1817 return MCBinaryExpr::createAdd(
1818 LHS: MCSpecifierExpr::create(
1819 Expr: MCSymbolRefExpr::create(
1820 Symbol: getObjFileLowering().getADASection()->getBeginSymbol(),
1821 Ctx&: OutContext),
1822 S: SystemZ::S_None, Ctx&: OutContext),
1823 RHS: MCConstantExpr::create(Value: Disp, Ctx&: OutContext), Ctx&: OutContext);
1824 }
1825 if (Sym) {
1826 OutStreamer->emitSymbolAttribute(Symbol: Sym, Attribute: MCSA_ELF_TypeObject);
1827 return MCSymbolRefExpr::create(Symbol: Sym, Ctx&: OutContext);
1828 }
1829 }
1830 return AsmPrinter::lowerConstant(CV);
1831}
1832
1833void SystemZAsmPrinter::emitFunctionEntryLabel() {
1834 const SystemZSubtarget &Subtarget = MF->getSubtarget<SystemZSubtarget>();
1835
1836 if (Subtarget.getTargetTriple().isOSzOS()) {
1837 auto *ZOS = static_cast<SystemZTargetzOSStreamer *>(getTargetStreamer());
1838 calculatePPA1();
1839
1840 // EntryPoint Marker
1841 const MachineFrameInfo &MFFrame = MF->getFrameInfo();
1842 bool IsUsingAlloca = MFFrame.hasVarSizedObjects();
1843 uint32_t DSASize = MFFrame.getStackSize();
1844 bool IsLeaf = DSASize == 0 && MFFrame.getCalleeSavedInfo().empty();
1845
1846 // Set Flags.
1847 uint8_t Flags = 0;
1848 if (IsLeaf)
1849 Flags |= 0x08;
1850 if (IsUsingAlloca)
1851 Flags |= 0x04;
1852
1853 // Combine into top 27 bits of DSASize and bottom 5 bits of Flags.
1854 uint32_t DSAAndFlags = DSASize & 0xFFFFFFE0; // (x/32) << 5
1855 DSAAndFlags |= Flags;
1856
1857 // Emit entry point marker section.
1858 OutStreamer->AddComment(T: "XPLINK Routine Layout Entry");
1859 OutStreamer->emitLabel(Symbol: ZOS->DeferredPPA1.back().EPMarker);
1860 OutStreamer->AddComment(T: "Eyecatcher 0x00C300C500C500");
1861 OutStreamer->emitIntValueInHex(Value: 0x00C300C500C500, Size: 7); // Eyecatcher.
1862 OutStreamer->AddComment(T: "Mark Type C'1'");
1863 OutStreamer->emitInt8(Value: 0xF1); // Mark Type.
1864 OutStreamer->AddComment(T: "Offset to PPA1");
1865 OutStreamer->emitAbsoluteSymbolDiff(Hi: ZOS->DeferredPPA1.back().PPA1,
1866 Lo: ZOS->DeferredPPA1.back().EPMarker, Size: 4);
1867 if (OutStreamer->isVerboseAsm()) {
1868 OutStreamer->AddComment(T: "DSA Size 0x" + Twine::utohexstr(Val: DSASize));
1869 OutStreamer->AddComment(T: "Entry Flags");
1870 if (Flags & 0x08)
1871 OutStreamer->AddComment(T: " Bit 1: 1 = Leaf function");
1872 else
1873 OutStreamer->AddComment(T: " Bit 1: 0 = Non-leaf function");
1874 if (Flags & 0x04)
1875 OutStreamer->AddComment(T: " Bit 2: 1 = Uses alloca");
1876 else
1877 OutStreamer->AddComment(T: " Bit 2: 0 = Does not use alloca");
1878 }
1879 OutStreamer->emitInt32(Value: DSAAndFlags);
1880
1881 ZOS->emitADA(Sym: CurrentFnSym, Section: getObjFileLowering().getADASection());
1882 }
1883
1884 AsmPrinter::emitFunctionEntryLabel();
1885
1886 if (Subtarget.getTargetTriple().isOSzOS()) {
1887 const Function *F = &MF->getFunction();
1888 // Emit aliasing label for function entry point label.
1889 for (const GlobalAlias *Alias : GOAliasMap[F]) {
1890 MCSymbol *Sym = getSymbol(GV: Alias);
1891 OutStreamer->emitSymbolAttribute(Symbol: Sym, Attribute: MCSA_ELF_TypeFunction);
1892 emitVisibility(Sym, Visibility: Alias->getVisibility());
1893 emitLinkage(GV: Alias, GVSym: Sym);
1894 OutStreamer->emitLabel(Symbol: Sym);
1895 }
1896 }
1897}
1898
1899char SystemZAsmPrinter::ID = 0;
1900
1901INITIALIZE_PASS(SystemZAsmPrinter, "systemz-asm-printer",
1902 "SystemZ Assembly Printer", false, false)
1903
1904// Force static initialization.
1905extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void
1906LLVMInitializeSystemZAsmPrinter() {
1907 RegisterAsmPrinter<SystemZAsmPrinter> X(getTheSystemZTarget());
1908}
1909