1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Global Instruction Selector for the WebAssembly target *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_GLOBALISEL_PREDICATE_BITSET
10
11const unsigned MAX_SUBTARGET_PREDICATES = 14;
12using PredicateBitset = llvm::Bitset<MAX_SUBTARGET_PREDICATES>;
13
14#endif // GET_GLOBALISEL_PREDICATE_BITSET
15
16#ifdef GET_GLOBALISEL_TEMPORARIES_DECL
17
18 mutable MatcherState State;
19 typedef ComplexRendererFns(WebAssemblyInstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const;
20 typedef void(WebAssemblyInstructionSelector::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr &, int) const;
21 const ExecInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn> ExecInfo;
22 static WebAssemblyInstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[];
23 static WebAssemblyInstructionSelector::CustomRendererFn CustomRenderers[];
24 bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
25 bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override;
26 bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override;
27 const uint8_t *getMatchTable() const override;
28 bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI, const MatcherState &State) const override;
29 bool testMOPredicate_MO(unsigned PredicateID, const MachineOperand &MO, const MatcherState &State) const override;
30 bool testSimplePredicate(unsigned PredicateID) const override;
31 bool runCustomAction(unsigned FnID, const MatcherState &State, NewMIVector &OutMIs) const override;
32
33#endif // GET_GLOBALISEL_TEMPORARIES_DECL
34
35#ifdef GET_GLOBALISEL_TEMPORARIES_INIT
36
37, State(0),
38ExecInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers)
39
40#endif // GET_GLOBALISEL_TEMPORARIES_INIT
41
42#ifdef GET_GLOBALISEL_IMPL
43
44// LLT Objects.
45enum {
46 GILLT_s32,
47 GILLT_s64,
48 GILLT_v2s64,
49 GILLT_v4s32,
50 GILLT_v8s16,
51 GILLT_v16s8,
52};
53const static size_t NumTypeObjects = 6;
54const static LLT TypeObjects[] = {
55 LLT::scalar(32),
56 LLT::scalar(64),
57 LLT::vector(ElementCount::getFixed(2), 64),
58 LLT::vector(ElementCount::getFixed(4), 32),
59 LLT::vector(ElementCount::getFixed(8), 16),
60 LLT::vector(ElementCount::getFixed(16), 8),
61};
62
63// Bits for subtarget features that participate in instruction matching.
64enum SubtargetFeatureBits : uint8_t {
65 Feature_IsPICBit = 13,
66 Feature_IsNotPICBit = 12,
67 Feature_HasAddr32Bit = 9,
68 Feature_HasAddr64Bit = 11,
69 Feature_HasAtomicsBit = 10,
70 Feature_HasBulkMemoryOptBit = 8,
71 Feature_HasExceptionHandlingBit = 0,
72 Feature_HasFP16Bit = 5,
73 Feature_HasNontrappingFPToIntBit = 2,
74 Feature_NotHasNontrappingFPToIntBit = 3,
75 Feature_HasReferenceTypesBit = 7,
76 Feature_HasRelaxedSIMDBit = 6,
77 Feature_HasSignExtBit = 1,
78 Feature_HasSIMD128Bit = 4,
79};
80
81PredicateBitset WebAssemblyInstructionSelector::
82computeAvailableModuleFeatures(const WebAssemblySubtarget *Subtarget) const {
83 PredicateBitset Features{};
84 if (TM.isPositionIndependent())
85 Features.set(Feature_IsPICBit);
86 if (!TM.isPositionIndependent())
87 Features.set(Feature_IsNotPICBit);
88 if (!Subtarget->hasAddr64())
89 Features.set(Feature_HasAddr32Bit);
90 if (Subtarget->hasAddr64())
91 Features.set(Feature_HasAddr64Bit);
92 if (Subtarget->hasAtomics())
93 Features.set(Feature_HasAtomicsBit);
94 if (Subtarget->hasBulkMemoryOpt())
95 Features.set(Feature_HasBulkMemoryOptBit);
96 if (Subtarget->hasExceptionHandling())
97 Features.set(Feature_HasExceptionHandlingBit);
98 if (Subtarget->hasFP16())
99 Features.set(Feature_HasFP16Bit);
100 if (Subtarget->hasNontrappingFPToInt())
101 Features.set(Feature_HasNontrappingFPToIntBit);
102 if (!Subtarget->hasNontrappingFPToInt())
103 Features.set(Feature_NotHasNontrappingFPToIntBit);
104 if (Subtarget->hasReferenceTypes())
105 Features.set(Feature_HasReferenceTypesBit);
106 if (Subtarget->hasRelaxedSIMD())
107 Features.set(Feature_HasRelaxedSIMDBit);
108 if (Subtarget->hasSignExt())
109 Features.set(Feature_HasSignExtBit);
110 if (Subtarget->hasSIMD128())
111 Features.set(Feature_HasSIMD128Bit);
112 return Features;
113}
114
115void WebAssemblyInstructionSelector::setupGeneratedPerFunctionState(MachineFunction &MF) {
116 AvailableFunctionFeatures = computeAvailableFunctionFeatures((const WebAssemblySubtarget *)&MF.getSubtarget(), &MF);
117}
118PredicateBitset WebAssemblyInstructionSelector::
119computeAvailableFunctionFeatures(const WebAssemblySubtarget *Subtarget, const MachineFunction *MF) const {
120 PredicateBitset Features{};
121 return Features;
122}
123
124// Feature bitsets.
125enum {
126 GIFBS_Invalid,
127 GIFBS_HasAddr32,
128 GIFBS_HasAddr64,
129 GIFBS_HasFP16,
130 GIFBS_HasNontrappingFPToInt,
131 GIFBS_HasRelaxedSIMD,
132 GIFBS_HasSIMD128,
133 GIFBS_HasSignExt,
134 GIFBS_NotHasNontrappingFPToInt,
135 GIFBS_HasFP16_HasSIMD128,
136 GIFBS_HasRelaxedSIMD_HasSIMD128,
137};
138constexpr static PredicateBitset FeatureBitsets[] {
139 {}, // GIFBS_Invalid
140 {Feature_HasAddr32Bit, },
141 {Feature_HasAddr64Bit, },
142 {Feature_HasFP16Bit, },
143 {Feature_HasNontrappingFPToIntBit, },
144 {Feature_HasRelaxedSIMDBit, },
145 {Feature_HasSIMD128Bit, },
146 {Feature_HasSignExtBit, },
147 {Feature_NotHasNontrappingFPToIntBit, },
148 {Feature_HasFP16Bit, Feature_HasSIMD128Bit, },
149 {Feature_HasRelaxedSIMDBit, Feature_HasSIMD128Bit, },
150};
151
152// ComplexPattern predicates.
153enum {
154 GICP_Invalid,
155};
156// See constructor for table contents
157
158WebAssemblyInstructionSelector::ComplexMatcherMemFn
159WebAssemblyInstructionSelector::ComplexPredicateFns[] = {
160 nullptr, // GICP_Invalid
161};
162
163// PatFrag predicates.
164enum {
165 GICXXPred_MI_Predicate_ffloor_nnan = GICXXPred_Invalid + 1,
166 GICXXPred_MI_Predicate_or_disjoint,
167};
168bool WebAssemblyInstructionSelector::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI, const MatcherState &State) const {
169 const MachineFunction &MF = *MI.getParent()->getParent();
170 const MachineRegisterInfo &MRI = MF.getRegInfo();
171 const auto &Operands = State.RecordedOperands;
172 (void)Operands;
173 (void)MRI;
174 switch (PredicateID) {
175 case GICXXPred_MI_Predicate_ffloor_nnan: {
176
177 return MI.getFlag(MachineInstr::FmNoNans);
178
179 }
180 case GICXXPred_MI_Predicate_or_disjoint: {
181
182 return MI.getFlag(MachineInstr::Disjoint);
183
184 }
185 }
186 llvm_unreachable("Unknown predicate");
187 return false;
188}
189// PatFrag predicates.
190bool WebAssemblyInstructionSelector::testMOPredicate_MO(unsigned PredicateID, const MachineOperand & MO, const MatcherState &State) const {
191 const auto &Operands = State.RecordedOperands;
192 Register Reg = MO.getReg();
193 (void)Operands;
194 (void)Reg;
195 llvm_unreachable("Unknown predicate");
196 return false;
197}
198// PatFrag predicates.
199enum {
200 GICXXPred_I64_Predicate_ImmI8 = GICXXPred_Invalid + 1,
201 GICXXPred_I64_Predicate_ImmI16,
202 GICXXPred_I64_Predicate_LaneIdx2,
203 GICXXPred_I64_Predicate_LaneIdx4,
204 GICXXPred_I64_Predicate_LaneIdx8,
205 GICXXPred_I64_Predicate_LaneIdx16,
206 GICXXPred_I64_Predicate_LaneIdx32,
207};
208bool WebAssemblyInstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
209 switch (PredicateID) {
210 case GICXXPred_I64_Predicate_ImmI8: {
211 return -(1 << (8 - 1)) <= Imm && Imm < (1 << 8);
212 }
213 case GICXXPred_I64_Predicate_ImmI16: {
214 return -(1 << (16 - 1)) <= Imm && Imm < (1 << 16);
215 }
216 case GICXXPred_I64_Predicate_LaneIdx2: {
217 return 0 <= Imm && Imm < 2;
218 }
219 case GICXXPred_I64_Predicate_LaneIdx4: {
220 return 0 <= Imm && Imm < 4;
221 }
222 case GICXXPred_I64_Predicate_LaneIdx8: {
223 return 0 <= Imm && Imm < 8;
224 }
225 case GICXXPred_I64_Predicate_LaneIdx16: {
226 return 0 <= Imm && Imm < 16;
227 }
228 case GICXXPred_I64_Predicate_LaneIdx32: {
229 return 0 <= Imm && Imm < 32;
230 }
231 }
232 llvm_unreachable("Unknown predicate");
233 return false;
234}
235// PatFrag predicates.
236bool WebAssemblyInstructionSelector::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const {
237 llvm_unreachable("Unknown predicate");
238 return false;
239}
240// PatFrag predicates.
241bool WebAssemblyInstructionSelector::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const {
242 llvm_unreachable("Unknown predicate");
243 return false;
244}
245bool WebAssemblyInstructionSelector::testSimplePredicate(unsigned) const {
246 llvm_unreachable("WebAssemblyInstructionSelector does not support simple predicates!");
247 return false;
248}
249// Custom renderers.
250enum {
251 GICR_Invalid,
252};
253WebAssemblyInstructionSelector::CustomRendererFn
254WebAssemblyInstructionSelector::CustomRenderers[] = {
255 nullptr, // GICR_Invalid
256};
257
258bool WebAssemblyInstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const {
259 const PredicateBitset AvailableFeatures = getAvailableFeatures();
260 MachineIRBuilder B(I);
261 State.MIs.clear();
262 State.MIs.push_back(&I);
263
264 if (executeMatchTable(*this, State, ExecInfo, B, getMatchTable(), TII, MF->getRegInfo(), TRI, RBI, AvailableFeatures, &CoverageInfo)) {
265 return true;
266 }
267
268 return false;
269}
270
271bool WebAssemblyInstructionSelector::runCustomAction(unsigned, const MatcherState&, NewMIVector &) const {
272 llvm_unreachable("WebAssemblyInstructionSelector does not support custom C++ actions!");
273}
274#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
275#define GIMT_Encode2(Val) uint8_t(Val), uint8_t((Val) >> 8)
276#define GIMT_Encode4(Val) uint8_t(Val), uint8_t((Val) >> 8), uint8_t((Val) >> 16), uint8_t((Val) >> 24)
277#define GIMT_Encode8(Val) uint8_t(Val), uint8_t((Val) >> 8), uint8_t((Val) >> 16), uint8_t((Val) >> 24), uint8_t(uint64_t(Val) >> 32), uint8_t(uint64_t(Val) >> 40), uint8_t(uint64_t(Val) >> 48), uint8_t(uint64_t(Val) >> 56)
278#else
279#define GIMT_Encode2(Val) uint8_t((Val) >> 8), uint8_t(Val)
280#define GIMT_Encode4(Val) uint8_t((Val) >> 24), uint8_t((Val) >> 16), uint8_t((Val) >> 8), uint8_t(Val)
281#define GIMT_Encode8(Val) uint8_t(uint64_t(Val) >> 56), uint8_t(uint64_t(Val) >> 48), uint8_t(uint64_t(Val) >> 40), uint8_t(uint64_t(Val) >> 32), uint8_t((Val) >> 24), uint8_t((Val) >> 16), uint8_t((Val) >> 8), uint8_t(Val)
282#endif
283const uint8_t *WebAssemblyInstructionSelector::getMatchTable() const {
284 constexpr static uint8_t MatchTable0[] = {
285 /* 0 */ GIM_SwitchOpcode, /*MI*/0, /*[*/GIMT_Encode2(55), GIMT_Encode2(303), /*)*//*default:*//*Label 72*/ GIMT_Encode4(38112),
286 /* 10 */ /*TargetOpcode::G_ADD*//*Label 0*/ GIMT_Encode4(1002),
287 /* 14 */ /*TargetOpcode::G_SUB*//*Label 1*/ GIMT_Encode4(1428),
288 /* 18 */ /*TargetOpcode::G_MUL*//*Label 2*/ GIMT_Encode4(1874),
289 /* 22 */ /*TargetOpcode::G_SDIV*//*Label 3*/ GIMT_Encode4(2100),
290 /* 26 */ /*TargetOpcode::G_UDIV*//*Label 4*/ GIMT_Encode4(2194),
291 /* 30 */ /*TargetOpcode::G_SREM*//*Label 5*/ GIMT_Encode4(2288),
292 /* 34 */ /*TargetOpcode::G_UREM*//*Label 6*/ GIMT_Encode4(2382), GIMT_Encode4(0), GIMT_Encode4(0),
293 /* 46 */ /*TargetOpcode::G_AND*//*Label 7*/ GIMT_Encode4(2476),
294 /* 50 */ /*TargetOpcode::G_OR*//*Label 8*/ GIMT_Encode4(3644),
295 /* 54 */ /*TargetOpcode::G_XOR*//*Label 9*/ GIMT_Encode4(7286), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
296 /* 70 */ /*TargetOpcode::G_UAVGCEIL*//*Label 10*/ GIMT_Encode4(13944), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
297 /* 122 */ /*TargetOpcode::G_BUILD_VECTOR*//*Label 11*/ GIMT_Encode4(14038), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
298 /* 142 */ /*TargetOpcode::G_BITCAST*//*Label 12*/ GIMT_Encode4(14793), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
299 /* 158 */ /*TargetOpcode::G_INTRINSIC_TRUNC*//*Label 13*/ GIMT_Encode4(16175), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
300 /* 174 */ /*TargetOpcode::G_INTRINSIC_ROUNDEVEN*//*Label 14*/ GIMT_Encode4(16366), GIMT_Encode4(0), GIMT_Encode4(0),
301 /* 186 */ /*TargetOpcode::G_LOAD*//*Label 15*/ GIMT_Encode4(16540), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
302 /* 318 */ /*TargetOpcode::G_BRCOND*//*Label 16*/ GIMT_Encode4(16681), GIMT_Encode4(0), GIMT_Encode4(0),
303 /* 330 */ /*TargetOpcode::G_INTRINSIC*//*Label 17*/ GIMT_Encode4(16709),
304 /* 334 */ /*TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS*//*Label 18*/ GIMT_Encode4(19984), GIMT_Encode4(0), GIMT_Encode4(0),
305 /* 346 */ /*TargetOpcode::G_ANYEXT*//*Label 19*/ GIMT_Encode4(20203),
306 /* 350 */ /*TargetOpcode::G_TRUNC*//*Label 20*/ GIMT_Encode4(20236), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
307 /* 366 */ /*TargetOpcode::G_CONSTANT*//*Label 21*/ GIMT_Encode4(20269),
308 /* 370 */ /*TargetOpcode::G_FCONSTANT*//*Label 22*/ GIMT_Encode4(20335), GIMT_Encode4(0), GIMT_Encode4(0),
309 /* 382 */ /*TargetOpcode::G_SEXT*//*Label 23*/ GIMT_Encode4(20401),
310 /* 386 */ /*TargetOpcode::G_SEXT_INREG*//*Label 24*/ GIMT_Encode4(20434),
311 /* 390 */ /*TargetOpcode::G_ZEXT*//*Label 25*/ GIMT_Encode4(20645),
312 /* 394 */ /*TargetOpcode::G_SHL*//*Label 26*/ GIMT_Encode4(20678),
313 /* 398 */ /*TargetOpcode::G_LSHR*//*Label 27*/ GIMT_Encode4(20960),
314 /* 402 */ /*TargetOpcode::G_ASHR*//*Label 28*/ GIMT_Encode4(21242), GIMT_Encode4(0), GIMT_Encode4(0),
315 /* 414 */ /*TargetOpcode::G_ROTR*//*Label 29*/ GIMT_Encode4(21524),
316 /* 418 */ /*TargetOpcode::G_ROTL*//*Label 30*/ GIMT_Encode4(21726),
317 /* 422 */ /*TargetOpcode::G_ICMP*//*Label 31*/ GIMT_Encode4(21928),
318 /* 426 */ /*TargetOpcode::G_FCMP*//*Label 32*/ GIMT_Encode4(25253), GIMT_Encode4(0), GIMT_Encode4(0),
319 /* 438 */ /*TargetOpcode::G_SELECT*//*Label 33*/ GIMT_Encode4(26471), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
320 /* 490 */ /*TargetOpcode::G_UADDSAT*//*Label 34*/ GIMT_Encode4(31497),
321 /* 494 */ /*TargetOpcode::G_SADDSAT*//*Label 35*/ GIMT_Encode4(31597),
322 /* 498 */ /*TargetOpcode::G_USUBSAT*//*Label 36*/ GIMT_Encode4(31697),
323 /* 502 */ /*TargetOpcode::G_SSUBSAT*//*Label 37*/ GIMT_Encode4(31797), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
324 /* 546 */ /*TargetOpcode::G_FADD*//*Label 38*/ GIMT_Encode4(31897),
325 /* 550 */ /*TargetOpcode::G_FSUB*//*Label 39*/ GIMT_Encode4(32123),
326 /* 554 */ /*TargetOpcode::G_FMUL*//*Label 40*/ GIMT_Encode4(32349),
327 /* 558 */ /*TargetOpcode::G_FMA*//*Label 41*/ GIMT_Encode4(32575), GIMT_Encode4(0),
328 /* 566 */ /*TargetOpcode::G_FDIV*//*Label 42*/ GIMT_Encode4(32739), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
329 /* 618 */ /*TargetOpcode::G_FNEG*//*Label 43*/ GIMT_Encode4(32965),
330 /* 622 */ /*TargetOpcode::G_FPEXT*//*Label 44*/ GIMT_Encode4(33156),
331 /* 626 */ /*TargetOpcode::G_FPTRUNC*//*Label 45*/ GIMT_Encode4(33189),
332 /* 630 */ /*TargetOpcode::G_FPTOSI*//*Label 46*/ GIMT_Encode4(33222),
333 /* 634 */ /*TargetOpcode::G_FPTOUI*//*Label 47*/ GIMT_Encode4(33578),
334 /* 638 */ /*TargetOpcode::G_SITOFP*//*Label 48*/ GIMT_Encode4(33934),
335 /* 642 */ /*TargetOpcode::G_UITOFP*//*Label 49*/ GIMT_Encode4(34150), GIMT_Encode4(0), GIMT_Encode4(0),
336 /* 654 */ /*TargetOpcode::G_FABS*//*Label 50*/ GIMT_Encode4(34366),
337 /* 658 */ /*TargetOpcode::G_FCOPYSIGN*//*Label 51*/ GIMT_Encode4(34557), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
338 /* 686 */ /*TargetOpcode::G_FMINIMUM*//*Label 52*/ GIMT_Encode4(34775),
339 /* 690 */ /*TargetOpcode::G_FMAXIMUM*//*Label 53*/ GIMT_Encode4(35001), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
340 /* 742 */ /*TargetOpcode::G_SMIN*//*Label 54*/ GIMT_Encode4(35227),
341 /* 746 */ /*TargetOpcode::G_SMAX*//*Label 55*/ GIMT_Encode4(35371),
342 /* 750 */ /*TargetOpcode::G_UMIN*//*Label 56*/ GIMT_Encode4(35515),
343 /* 754 */ /*TargetOpcode::G_UMAX*//*Label 57*/ GIMT_Encode4(35659),
344 /* 758 */ /*TargetOpcode::G_ABS*//*Label 58*/ GIMT_Encode4(35803), GIMT_Encode4(0), GIMT_Encode4(0),
345 /* 770 */ /*TargetOpcode::G_BR*//*Label 59*/ GIMT_Encode4(35963), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
346 /* 790 */ /*TargetOpcode::G_INSERT_VECTOR_ELT*//*Label 60*/ GIMT_Encode4(35985), GIMT_Encode4(0), GIMT_Encode4(0),
347 /* 802 */ /*TargetOpcode::G_SPLAT_VECTOR*//*Label 61*/ GIMT_Encode4(36355), GIMT_Encode4(0), GIMT_Encode4(0),
348 /* 814 */ /*TargetOpcode::G_CTTZ*//*Label 62*/ GIMT_Encode4(36847), GIMT_Encode4(0),
349 /* 822 */ /*TargetOpcode::G_CTLZ*//*Label 63*/ GIMT_Encode4(36927), GIMT_Encode4(0), GIMT_Encode4(0),
350 /* 834 */ /*TargetOpcode::G_CTPOP*//*Label 64*/ GIMT_Encode4(37007), GIMT_Encode4(0), GIMT_Encode4(0),
351 /* 846 */ /*TargetOpcode::G_FCEIL*//*Label 65*/ GIMT_Encode4(37136), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
352 /* 894 */ /*TargetOpcode::G_FSQRT*//*Label 66*/ GIMT_Encode4(37327),
353 /* 898 */ /*TargetOpcode::G_FFLOOR*//*Label 67*/ GIMT_Encode4(37518),
354 /* 902 */ /*TargetOpcode::G_FRINT*//*Label 68*/ GIMT_Encode4(37709),
355 /* 906 */ /*TargetOpcode::G_FNEARBYINT*//*Label 69*/ GIMT_Encode4(37883), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
356 /* 994 */ /*TargetOpcode::G_TRAP*//*Label 70*/ GIMT_Encode4(38074),
357 /* 998 */ /*TargetOpcode::G_DEBUGTRAP*//*Label 71*/ GIMT_Encode4(38093),
358 /* 1002 */ // Label 0: @1002
359 /* 1002 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 79*/ GIMT_Encode4(1427),
360 /* 1013 */ /*GILLT_s32*//*Label 73*/ GIMT_Encode4(1037),
361 /* 1017 */ /*GILLT_s64*//*Label 74*/ GIMT_Encode4(1074),
362 /* 1021 */ /*GILLT_v2s64*//*Label 75*/ GIMT_Encode4(1111),
363 /* 1025 */ /*GILLT_v4s32*//*Label 76*/ GIMT_Encode4(1151),
364 /* 1029 */ /*GILLT_v8s16*//*Label 77*/ GIMT_Encode4(1347),
365 /* 1033 */ /*GILLT_v16s8*//*Label 78*/ GIMT_Encode4(1387),
366 /* 1037 */ // Label 73: @1037
367 /* 1037 */ GIM_Try, /*On fail goto*//*Label 80*/ GIMT_Encode4(1073), // Rule ID 64 //
368 /* 1042 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
369 /* 1045 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
370 /* 1048 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
371 /* 1052 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
372 /* 1056 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
373 /* 1060 */ // (add:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (ADD_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
374 /* 1060 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I32),
375 /* 1065 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
376 /* 1071 */ GIR_RootConstrainSelectedInstOperands,
377 /* 1072 */ // GIR_Coverage, 64,
378 /* 1072 */ GIR_Done,
379 /* 1073 */ // Label 80: @1073
380 /* 1073 */ GIM_Reject,
381 /* 1074 */ // Label 74: @1074
382 /* 1074 */ GIM_Try, /*On fail goto*//*Label 81*/ GIMT_Encode4(1110), // Rule ID 65 //
383 /* 1079 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
384 /* 1082 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
385 /* 1085 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
386 /* 1089 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
387 /* 1093 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
388 /* 1097 */ // (add:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (ADD_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
389 /* 1097 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I64),
390 /* 1102 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
391 /* 1108 */ GIR_RootConstrainSelectedInstOperands,
392 /* 1109 */ // GIR_Coverage, 65,
393 /* 1109 */ GIR_Done,
394 /* 1110 */ // Label 81: @1110
395 /* 1110 */ GIM_Reject,
396 /* 1111 */ // Label 75: @1111
397 /* 1111 */ GIM_Try, /*On fail goto*//*Label 82*/ GIMT_Encode4(1150), // Rule ID 281 //
398 /* 1116 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
399 /* 1119 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
400 /* 1122 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
401 /* 1125 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
402 /* 1129 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
403 /* 1133 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
404 /* 1137 */ // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (ADD_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
405 /* 1137 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I64x2),
406 /* 1142 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
407 /* 1148 */ GIR_RootConstrainSelectedInstOperands,
408 /* 1149 */ // GIR_Coverage, 281,
409 /* 1149 */ GIR_Done,
410 /* 1150 */ // Label 82: @1150
411 /* 1150 */ GIM_Reject,
412 /* 1151 */ // Label 76: @1151
413 /* 1151 */ GIM_Try, /*On fail goto*//*Label 83*/ GIMT_Encode4(1346),
414 /* 1156 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
415 /* 1159 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
416 /* 1162 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
417 /* 1166 */ GIM_Try, /*On fail goto*//*Label 84*/ GIMT_Encode4(1241), // Rule ID 1300 //
418 /* 1171 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
419 /* 1175 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
420 /* 1179 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
421 /* 1182 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_signed),
422 /* 1187 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
423 /* 1191 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
424 /* 1195 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
425 /* 1199 */ GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
426 /* 1202 */ GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_signed),
427 /* 1207 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
428 /* 1211 */ GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v16s8,
429 /* 1215 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
430 /* 1219 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
431 /* 1221 */ // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 14436:{ *:[iPTR] }, (intrinsic_wo_chain:{ *:[v8i16] } 14463:{ *:[iPTR] }, v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs)), V128:{ *:[v4i32] }:$acc) => (RELAXED_DOT_ADD:{ *:[v4i32] } v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc)
432 /* 1221 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_ADD),
433 /* 1224 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
434 /* 1226 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // lhs
435 /* 1230 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // rhs
436 /* 1234 */ GIR_RootToRootCopy, /*OpIdx*/2, // acc
437 /* 1236 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
438 /* 1239 */ GIR_RootConstrainSelectedInstOperands,
439 /* 1240 */ // GIR_Coverage, 1300,
440 /* 1240 */ GIR_EraseRootFromParent_Done,
441 /* 1241 */ // Label 84: @1241
442 /* 1241 */ GIM_Try, /*On fail goto*//*Label 85*/ GIMT_Encode4(1316), // Rule ID 1734 //
443 /* 1246 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
444 /* 1250 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
445 /* 1254 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
446 /* 1258 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
447 /* 1261 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_signed),
448 /* 1266 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
449 /* 1270 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
450 /* 1274 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
451 /* 1278 */ GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
452 /* 1281 */ GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_signed),
453 /* 1286 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
454 /* 1290 */ GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v16s8,
455 /* 1294 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
456 /* 1296 */ // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$acc, (intrinsic_wo_chain:{ *:[v4i32] } 14436:{ *:[iPTR] }, (intrinsic_wo_chain:{ *:[v8i16] } 14463:{ *:[iPTR] }, v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs))) => (RELAXED_DOT_ADD:{ *:[v4i32] } v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc)
457 /* 1296 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_ADD),
458 /* 1299 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
459 /* 1301 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // lhs
460 /* 1305 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // rhs
461 /* 1309 */ GIR_RootToRootCopy, /*OpIdx*/1, // acc
462 /* 1311 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
463 /* 1314 */ GIR_RootConstrainSelectedInstOperands,
464 /* 1315 */ // GIR_Coverage, 1734,
465 /* 1315 */ GIR_EraseRootFromParent_Done,
466 /* 1316 */ // Label 85: @1316
467 /* 1316 */ GIM_Try, /*On fail goto*//*Label 86*/ GIMT_Encode4(1345), // Rule ID 280 //
468 /* 1321 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
469 /* 1324 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
470 /* 1328 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
471 /* 1332 */ // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (ADD_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
472 /* 1332 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I32x4),
473 /* 1337 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
474 /* 1343 */ GIR_RootConstrainSelectedInstOperands,
475 /* 1344 */ // GIR_Coverage, 280,
476 /* 1344 */ GIR_Done,
477 /* 1345 */ // Label 86: @1345
478 /* 1345 */ GIM_Reject,
479 /* 1346 */ // Label 83: @1346
480 /* 1346 */ GIM_Reject,
481 /* 1347 */ // Label 77: @1347
482 /* 1347 */ GIM_Try, /*On fail goto*//*Label 87*/ GIMT_Encode4(1386), // Rule ID 279 //
483 /* 1352 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
484 /* 1355 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
485 /* 1358 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
486 /* 1361 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
487 /* 1365 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
488 /* 1369 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
489 /* 1373 */ // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (ADD_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
490 /* 1373 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I16x8),
491 /* 1378 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
492 /* 1384 */ GIR_RootConstrainSelectedInstOperands,
493 /* 1385 */ // GIR_Coverage, 279,
494 /* 1385 */ GIR_Done,
495 /* 1386 */ // Label 87: @1386
496 /* 1386 */ GIM_Reject,
497 /* 1387 */ // Label 78: @1387
498 /* 1387 */ GIM_Try, /*On fail goto*//*Label 88*/ GIMT_Encode4(1426), // Rule ID 278 //
499 /* 1392 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
500 /* 1395 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
501 /* 1398 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
502 /* 1401 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
503 /* 1405 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
504 /* 1409 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
505 /* 1413 */ // (add:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (ADD_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
506 /* 1413 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I8x16),
507 /* 1418 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
508 /* 1424 */ GIR_RootConstrainSelectedInstOperands,
509 /* 1425 */ // GIR_Coverage, 278,
510 /* 1425 */ GIR_Done,
511 /* 1426 */ // Label 88: @1426
512 /* 1426 */ GIM_Reject,
513 /* 1427 */ // Label 79: @1427
514 /* 1427 */ GIM_Reject,
515 /* 1428 */ // Label 1: @1428
516 /* 1428 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 95*/ GIMT_Encode4(1873),
517 /* 1439 */ /*GILLT_s32*//*Label 89*/ GIMT_Encode4(1463),
518 /* 1443 */ /*GILLT_s64*//*Label 90*/ GIMT_Encode4(1500),
519 /* 1447 */ /*GILLT_v2s64*//*Label 91*/ GIMT_Encode4(1537),
520 /* 1451 */ /*GILLT_v4s32*//*Label 92*/ GIMT_Encode4(1621),
521 /* 1455 */ /*GILLT_v8s16*//*Label 93*/ GIMT_Encode4(1705),
522 /* 1459 */ /*GILLT_v16s8*//*Label 94*/ GIMT_Encode4(1789),
523 /* 1463 */ // Label 89: @1463
524 /* 1463 */ GIM_Try, /*On fail goto*//*Label 96*/ GIMT_Encode4(1499), // Rule ID 66 //
525 /* 1468 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
526 /* 1471 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
527 /* 1474 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
528 /* 1478 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
529 /* 1482 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
530 /* 1486 */ // (sub:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SUB_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
531 /* 1486 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I32),
532 /* 1491 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
533 /* 1497 */ GIR_RootConstrainSelectedInstOperands,
534 /* 1498 */ // GIR_Coverage, 66,
535 /* 1498 */ GIR_Done,
536 /* 1499 */ // Label 96: @1499
537 /* 1499 */ GIM_Reject,
538 /* 1500 */ // Label 90: @1500
539 /* 1500 */ GIM_Try, /*On fail goto*//*Label 97*/ GIMT_Encode4(1536), // Rule ID 67 //
540 /* 1505 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
541 /* 1508 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
542 /* 1511 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
543 /* 1515 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
544 /* 1519 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
545 /* 1523 */ // (sub:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SUB_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
546 /* 1523 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I64),
547 /* 1528 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
548 /* 1534 */ GIR_RootConstrainSelectedInstOperands,
549 /* 1535 */ // GIR_Coverage, 67,
550 /* 1535 */ GIR_Done,
551 /* 1536 */ // Label 97: @1536
552 /* 1536 */ GIM_Reject,
553 /* 1537 */ // Label 91: @1537
554 /* 1537 */ GIM_Try, /*On fail goto*//*Label 98*/ GIMT_Encode4(1620),
555 /* 1542 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
556 /* 1545 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
557 /* 1548 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
558 /* 1552 */ GIM_Try, /*On fail goto*//*Label 99*/ GIMT_Encode4(1590), // Rule ID 256 //
559 /* 1557 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
560 /* 1560 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
561 /* 1564 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
562 /* 1570 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
563 /* 1572 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
564 /* 1576 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
565 /* 1578 */ // (sub:{ *:[v2i64] } immAllZerosV:{ *:[v2i64] }, V128:{ *:[v2i64] }:$v) => (NEG_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$v)
566 /* 1578 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I64x2),
567 /* 1581 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
568 /* 1583 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
569 /* 1585 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
570 /* 1588 */ GIR_RootConstrainSelectedInstOperands,
571 /* 1589 */ // GIR_Coverage, 256,
572 /* 1589 */ GIR_EraseRootFromParent_Done,
573 /* 1590 */ // Label 99: @1590
574 /* 1590 */ GIM_Try, /*On fail goto*//*Label 100*/ GIMT_Encode4(1619), // Rule ID 289 //
575 /* 1595 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
576 /* 1598 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
577 /* 1602 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
578 /* 1606 */ // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SUB_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
579 /* 1606 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I64x2),
580 /* 1611 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
581 /* 1617 */ GIR_RootConstrainSelectedInstOperands,
582 /* 1618 */ // GIR_Coverage, 289,
583 /* 1618 */ GIR_Done,
584 /* 1619 */ // Label 100: @1619
585 /* 1619 */ GIM_Reject,
586 /* 1620 */ // Label 98: @1620
587 /* 1620 */ GIM_Reject,
588 /* 1621 */ // Label 92: @1621
589 /* 1621 */ GIM_Try, /*On fail goto*//*Label 101*/ GIMT_Encode4(1704),
590 /* 1626 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
591 /* 1629 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
592 /* 1632 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
593 /* 1636 */ GIM_Try, /*On fail goto*//*Label 102*/ GIMT_Encode4(1674), // Rule ID 255 //
594 /* 1641 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
595 /* 1644 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
596 /* 1648 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
597 /* 1654 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
598 /* 1656 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
599 /* 1660 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
600 /* 1662 */ // (sub:{ *:[v4i32] } immAllZerosV:{ *:[v4i32] }, V128:{ *:[v4i32] }:$v) => (NEG_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$v)
601 /* 1662 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I32x4),
602 /* 1665 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
603 /* 1667 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
604 /* 1669 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
605 /* 1672 */ GIR_RootConstrainSelectedInstOperands,
606 /* 1673 */ // GIR_Coverage, 255,
607 /* 1673 */ GIR_EraseRootFromParent_Done,
608 /* 1674 */ // Label 102: @1674
609 /* 1674 */ GIM_Try, /*On fail goto*//*Label 103*/ GIMT_Encode4(1703), // Rule ID 288 //
610 /* 1679 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
611 /* 1682 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
612 /* 1686 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
613 /* 1690 */ // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SUB_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
614 /* 1690 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I32x4),
615 /* 1695 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
616 /* 1701 */ GIR_RootConstrainSelectedInstOperands,
617 /* 1702 */ // GIR_Coverage, 288,
618 /* 1702 */ GIR_Done,
619 /* 1703 */ // Label 103: @1703
620 /* 1703 */ GIM_Reject,
621 /* 1704 */ // Label 101: @1704
622 /* 1704 */ GIM_Reject,
623 /* 1705 */ // Label 93: @1705
624 /* 1705 */ GIM_Try, /*On fail goto*//*Label 104*/ GIMT_Encode4(1788),
625 /* 1710 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
626 /* 1713 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
627 /* 1716 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
628 /* 1720 */ GIM_Try, /*On fail goto*//*Label 105*/ GIMT_Encode4(1758), // Rule ID 254 //
629 /* 1725 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
630 /* 1728 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
631 /* 1732 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
632 /* 1738 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
633 /* 1740 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
634 /* 1744 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
635 /* 1746 */ // (sub:{ *:[v8i16] } immAllZerosV:{ *:[v8i16] }, V128:{ *:[v8i16] }:$v) => (NEG_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$v)
636 /* 1746 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I16x8),
637 /* 1749 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
638 /* 1751 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
639 /* 1753 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
640 /* 1756 */ GIR_RootConstrainSelectedInstOperands,
641 /* 1757 */ // GIR_Coverage, 254,
642 /* 1757 */ GIR_EraseRootFromParent_Done,
643 /* 1758 */ // Label 105: @1758
644 /* 1758 */ GIM_Try, /*On fail goto*//*Label 106*/ GIMT_Encode4(1787), // Rule ID 287 //
645 /* 1763 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
646 /* 1766 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
647 /* 1770 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
648 /* 1774 */ // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SUB_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
649 /* 1774 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I16x8),
650 /* 1779 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
651 /* 1785 */ GIR_RootConstrainSelectedInstOperands,
652 /* 1786 */ // GIR_Coverage, 287,
653 /* 1786 */ GIR_Done,
654 /* 1787 */ // Label 106: @1787
655 /* 1787 */ GIM_Reject,
656 /* 1788 */ // Label 104: @1788
657 /* 1788 */ GIM_Reject,
658 /* 1789 */ // Label 94: @1789
659 /* 1789 */ GIM_Try, /*On fail goto*//*Label 107*/ GIMT_Encode4(1872),
660 /* 1794 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
661 /* 1797 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
662 /* 1800 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
663 /* 1804 */ GIM_Try, /*On fail goto*//*Label 108*/ GIMT_Encode4(1842), // Rule ID 253 //
664 /* 1809 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
665 /* 1812 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
666 /* 1816 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
667 /* 1822 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
668 /* 1824 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
669 /* 1828 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
670 /* 1830 */ // (sub:{ *:[v16i8] } immAllZerosV:{ *:[v16i8] }, V128:{ *:[v16i8] }:$v) => (NEG_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$v)
671 /* 1830 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I8x16),
672 /* 1833 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
673 /* 1835 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
674 /* 1837 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
675 /* 1840 */ GIR_RootConstrainSelectedInstOperands,
676 /* 1841 */ // GIR_Coverage, 253,
677 /* 1841 */ GIR_EraseRootFromParent_Done,
678 /* 1842 */ // Label 108: @1842
679 /* 1842 */ GIM_Try, /*On fail goto*//*Label 109*/ GIMT_Encode4(1871), // Rule ID 286 //
680 /* 1847 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
681 /* 1850 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
682 /* 1854 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
683 /* 1858 */ // (sub:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SUB_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
684 /* 1858 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I8x16),
685 /* 1863 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
686 /* 1869 */ GIR_RootConstrainSelectedInstOperands,
687 /* 1870 */ // GIR_Coverage, 286,
688 /* 1870 */ GIR_Done,
689 /* 1871 */ // Label 109: @1871
690 /* 1871 */ GIM_Reject,
691 /* 1872 */ // Label 107: @1872
692 /* 1872 */ GIM_Reject,
693 /* 1873 */ // Label 95: @1873
694 /* 1873 */ GIM_Reject,
695 /* 1874 */ // Label 2: @1874
696 /* 1874 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 115*/ GIMT_Encode4(2099),
697 /* 1885 */ /*GILLT_s32*//*Label 110*/ GIMT_Encode4(1905),
698 /* 1889 */ /*GILLT_s64*//*Label 111*/ GIMT_Encode4(1942),
699 /* 1893 */ /*GILLT_v2s64*//*Label 112*/ GIMT_Encode4(1979),
700 /* 1897 */ /*GILLT_v4s32*//*Label 113*/ GIMT_Encode4(2019),
701 /* 1901 */ /*GILLT_v8s16*//*Label 114*/ GIMT_Encode4(2059),
702 /* 1905 */ // Label 110: @1905
703 /* 1905 */ GIM_Try, /*On fail goto*//*Label 116*/ GIMT_Encode4(1941), // Rule ID 68 //
704 /* 1910 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
705 /* 1913 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
706 /* 1916 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
707 /* 1920 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
708 /* 1924 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
709 /* 1928 */ // (mul:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (MUL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
710 /* 1928 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I32),
711 /* 1933 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
712 /* 1939 */ GIR_RootConstrainSelectedInstOperands,
713 /* 1940 */ // GIR_Coverage, 68,
714 /* 1940 */ GIR_Done,
715 /* 1941 */ // Label 116: @1941
716 /* 1941 */ GIM_Reject,
717 /* 1942 */ // Label 111: @1942
718 /* 1942 */ GIM_Try, /*On fail goto*//*Label 117*/ GIMT_Encode4(1978), // Rule ID 69 //
719 /* 1947 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
720 /* 1950 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
721 /* 1953 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
722 /* 1957 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
723 /* 1961 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
724 /* 1965 */ // (mul:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (MUL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
725 /* 1965 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I64),
726 /* 1970 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
727 /* 1976 */ GIR_RootConstrainSelectedInstOperands,
728 /* 1977 */ // GIR_Coverage, 69,
729 /* 1977 */ GIR_Done,
730 /* 1978 */ // Label 117: @1978
731 /* 1978 */ GIM_Reject,
732 /* 1979 */ // Label 112: @1979
733 /* 1979 */ GIM_Try, /*On fail goto*//*Label 118*/ GIMT_Encode4(2018), // Rule ID 296 //
734 /* 1984 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
735 /* 1987 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
736 /* 1990 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
737 /* 1993 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
738 /* 1997 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
739 /* 2001 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
740 /* 2005 */ // (mul:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (MUL_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
741 /* 2005 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I64x2),
742 /* 2010 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
743 /* 2016 */ GIR_RootConstrainSelectedInstOperands,
744 /* 2017 */ // GIR_Coverage, 296,
745 /* 2017 */ GIR_Done,
746 /* 2018 */ // Label 118: @2018
747 /* 2018 */ GIM_Reject,
748 /* 2019 */ // Label 113: @2019
749 /* 2019 */ GIM_Try, /*On fail goto*//*Label 119*/ GIMT_Encode4(2058), // Rule ID 295 //
750 /* 2024 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
751 /* 2027 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
752 /* 2030 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
753 /* 2033 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
754 /* 2037 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
755 /* 2041 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
756 /* 2045 */ // (mul:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MUL_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
757 /* 2045 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I32x4),
758 /* 2050 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
759 /* 2056 */ GIR_RootConstrainSelectedInstOperands,
760 /* 2057 */ // GIR_Coverage, 295,
761 /* 2057 */ GIR_Done,
762 /* 2058 */ // Label 119: @2058
763 /* 2058 */ GIM_Reject,
764 /* 2059 */ // Label 114: @2059
765 /* 2059 */ GIM_Try, /*On fail goto*//*Label 120*/ GIMT_Encode4(2098), // Rule ID 294 //
766 /* 2064 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
767 /* 2067 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
768 /* 2070 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
769 /* 2073 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
770 /* 2077 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
771 /* 2081 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
772 /* 2085 */ // (mul:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MUL_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
773 /* 2085 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I16x8),
774 /* 2090 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
775 /* 2096 */ GIR_RootConstrainSelectedInstOperands,
776 /* 2097 */ // GIR_Coverage, 294,
777 /* 2097 */ GIR_Done,
778 /* 2098 */ // Label 120: @2098
779 /* 2098 */ GIM_Reject,
780 /* 2099 */ // Label 115: @2099
781 /* 2099 */ GIM_Reject,
782 /* 2100 */ // Label 3: @2100
783 /* 2100 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 123*/ GIMT_Encode4(2193),
784 /* 2111 */ /*GILLT_s32*//*Label 121*/ GIMT_Encode4(2119),
785 /* 2115 */ /*GILLT_s64*//*Label 122*/ GIMT_Encode4(2156),
786 /* 2119 */ // Label 121: @2119
787 /* 2119 */ GIM_Try, /*On fail goto*//*Label 124*/ GIMT_Encode4(2155), // Rule ID 70 //
788 /* 2124 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
789 /* 2127 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
790 /* 2130 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
791 /* 2134 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
792 /* 2138 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
793 /* 2142 */ // (sdiv:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (DIV_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
794 /* 2142 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_S_I32),
795 /* 2147 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
796 /* 2153 */ GIR_RootConstrainSelectedInstOperands,
797 /* 2154 */ // GIR_Coverage, 70,
798 /* 2154 */ GIR_Done,
799 /* 2155 */ // Label 124: @2155
800 /* 2155 */ GIM_Reject,
801 /* 2156 */ // Label 122: @2156
802 /* 2156 */ GIM_Try, /*On fail goto*//*Label 125*/ GIMT_Encode4(2192), // Rule ID 71 //
803 /* 2161 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
804 /* 2164 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
805 /* 2167 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
806 /* 2171 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
807 /* 2175 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
808 /* 2179 */ // (sdiv:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (DIV_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
809 /* 2179 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_S_I64),
810 /* 2184 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
811 /* 2190 */ GIR_RootConstrainSelectedInstOperands,
812 /* 2191 */ // GIR_Coverage, 71,
813 /* 2191 */ GIR_Done,
814 /* 2192 */ // Label 125: @2192
815 /* 2192 */ GIM_Reject,
816 /* 2193 */ // Label 123: @2193
817 /* 2193 */ GIM_Reject,
818 /* 2194 */ // Label 4: @2194
819 /* 2194 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 128*/ GIMT_Encode4(2287),
820 /* 2205 */ /*GILLT_s32*//*Label 126*/ GIMT_Encode4(2213),
821 /* 2209 */ /*GILLT_s64*//*Label 127*/ GIMT_Encode4(2250),
822 /* 2213 */ // Label 126: @2213
823 /* 2213 */ GIM_Try, /*On fail goto*//*Label 129*/ GIMT_Encode4(2249), // Rule ID 72 //
824 /* 2218 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
825 /* 2221 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
826 /* 2224 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
827 /* 2228 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
828 /* 2232 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
829 /* 2236 */ // (udiv:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (DIV_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
830 /* 2236 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_U_I32),
831 /* 2241 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
832 /* 2247 */ GIR_RootConstrainSelectedInstOperands,
833 /* 2248 */ // GIR_Coverage, 72,
834 /* 2248 */ GIR_Done,
835 /* 2249 */ // Label 129: @2249
836 /* 2249 */ GIM_Reject,
837 /* 2250 */ // Label 127: @2250
838 /* 2250 */ GIM_Try, /*On fail goto*//*Label 130*/ GIMT_Encode4(2286), // Rule ID 73 //
839 /* 2255 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
840 /* 2258 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
841 /* 2261 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
842 /* 2265 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
843 /* 2269 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
844 /* 2273 */ // (udiv:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (DIV_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
845 /* 2273 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_U_I64),
846 /* 2278 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
847 /* 2284 */ GIR_RootConstrainSelectedInstOperands,
848 /* 2285 */ // GIR_Coverage, 73,
849 /* 2285 */ GIR_Done,
850 /* 2286 */ // Label 130: @2286
851 /* 2286 */ GIM_Reject,
852 /* 2287 */ // Label 128: @2287
853 /* 2287 */ GIM_Reject,
854 /* 2288 */ // Label 5: @2288
855 /* 2288 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 133*/ GIMT_Encode4(2381),
856 /* 2299 */ /*GILLT_s32*//*Label 131*/ GIMT_Encode4(2307),
857 /* 2303 */ /*GILLT_s64*//*Label 132*/ GIMT_Encode4(2344),
858 /* 2307 */ // Label 131: @2307
859 /* 2307 */ GIM_Try, /*On fail goto*//*Label 134*/ GIMT_Encode4(2343), // Rule ID 74 //
860 /* 2312 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
861 /* 2315 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
862 /* 2318 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
863 /* 2322 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
864 /* 2326 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
865 /* 2330 */ // (srem:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (REM_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
866 /* 2330 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_S_I32),
867 /* 2335 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
868 /* 2341 */ GIR_RootConstrainSelectedInstOperands,
869 /* 2342 */ // GIR_Coverage, 74,
870 /* 2342 */ GIR_Done,
871 /* 2343 */ // Label 134: @2343
872 /* 2343 */ GIM_Reject,
873 /* 2344 */ // Label 132: @2344
874 /* 2344 */ GIM_Try, /*On fail goto*//*Label 135*/ GIMT_Encode4(2380), // Rule ID 75 //
875 /* 2349 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
876 /* 2352 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
877 /* 2355 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
878 /* 2359 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
879 /* 2363 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
880 /* 2367 */ // (srem:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (REM_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
881 /* 2367 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_S_I64),
882 /* 2372 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
883 /* 2378 */ GIR_RootConstrainSelectedInstOperands,
884 /* 2379 */ // GIR_Coverage, 75,
885 /* 2379 */ GIR_Done,
886 /* 2380 */ // Label 135: @2380
887 /* 2380 */ GIM_Reject,
888 /* 2381 */ // Label 133: @2381
889 /* 2381 */ GIM_Reject,
890 /* 2382 */ // Label 6: @2382
891 /* 2382 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 138*/ GIMT_Encode4(2475),
892 /* 2393 */ /*GILLT_s32*//*Label 136*/ GIMT_Encode4(2401),
893 /* 2397 */ /*GILLT_s64*//*Label 137*/ GIMT_Encode4(2438),
894 /* 2401 */ // Label 136: @2401
895 /* 2401 */ GIM_Try, /*On fail goto*//*Label 139*/ GIMT_Encode4(2437), // Rule ID 76 //
896 /* 2406 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
897 /* 2409 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
898 /* 2412 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
899 /* 2416 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
900 /* 2420 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
901 /* 2424 */ // (urem:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (REM_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
902 /* 2424 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_U_I32),
903 /* 2429 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
904 /* 2435 */ GIR_RootConstrainSelectedInstOperands,
905 /* 2436 */ // GIR_Coverage, 76,
906 /* 2436 */ GIR_Done,
907 /* 2437 */ // Label 139: @2437
908 /* 2437 */ GIM_Reject,
909 /* 2438 */ // Label 137: @2438
910 /* 2438 */ GIM_Try, /*On fail goto*//*Label 140*/ GIMT_Encode4(2474), // Rule ID 77 //
911 /* 2443 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
912 /* 2446 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
913 /* 2449 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
914 /* 2453 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
915 /* 2457 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
916 /* 2461 */ // (urem:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (REM_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
917 /* 2461 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_U_I64),
918 /* 2466 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
919 /* 2472 */ GIR_RootConstrainSelectedInstOperands,
920 /* 2473 */ // GIR_Coverage, 77,
921 /* 2473 */ GIR_Done,
922 /* 2474 */ // Label 140: @2474
923 /* 2474 */ GIM_Reject,
924 /* 2475 */ // Label 138: @2475
925 /* 2475 */ GIM_Reject,
926 /* 2476 */ // Label 7: @2476
927 /* 2476 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 147*/ GIMT_Encode4(3643),
928 /* 2487 */ /*GILLT_s32*//*Label 141*/ GIMT_Encode4(2511),
929 /* 2491 */ /*GILLT_s64*//*Label 142*/ GIMT_Encode4(2954),
930 /* 2495 */ /*GILLT_v2s64*//*Label 143*/ GIMT_Encode4(2991),
931 /* 2499 */ /*GILLT_v4s32*//*Label 144*/ GIMT_Encode4(3154),
932 /* 2503 */ /*GILLT_v8s16*//*Label 145*/ GIMT_Encode4(3317),
933 /* 2507 */ /*GILLT_v16s8*//*Label 146*/ GIMT_Encode4(3480),
934 /* 2511 */ // Label 141: @2511
935 /* 2511 */ GIM_Try, /*On fail goto*//*Label 148*/ GIMT_Encode4(2953),
936 /* 2516 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
937 /* 2519 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
938 /* 2522 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
939 /* 2526 */ GIM_Try, /*On fail goto*//*Label 149*/ GIMT_Encode4(2576), // Rule ID 1114 //
940 /* 2531 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
941 /* 2535 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
942 /* 2539 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
943 /* 2542 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
944 /* 2547 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
945 /* 2551 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
946 /* 2556 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
947 /* 2560 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
948 /* 2562 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14430:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x)
949 /* 2562 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
950 /* 2565 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
951 /* 2567 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
952 /* 2571 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
953 /* 2574 */ GIR_RootConstrainSelectedInstOperands,
954 /* 2575 */ // GIR_Coverage, 1114,
955 /* 2575 */ GIR_EraseRootFromParent_Done,
956 /* 2576 */ // Label 149: @2576
957 /* 2576 */ GIM_Try, /*On fail goto*//*Label 150*/ GIMT_Encode4(2626), // Rule ID 1117 //
958 /* 2581 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
959 /* 2585 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
960 /* 2589 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
961 /* 2592 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
962 /* 2597 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
963 /* 2601 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
964 /* 2606 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
965 /* 2610 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
966 /* 2612 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14430:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x)
967 /* 2612 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
968 /* 2615 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
969 /* 2617 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
970 /* 2621 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
971 /* 2624 */ GIR_RootConstrainSelectedInstOperands,
972 /* 2625 */ // GIR_Coverage, 1117,
973 /* 2625 */ GIR_EraseRootFromParent_Done,
974 /* 2626 */ // Label 150: @2626
975 /* 2626 */ GIM_Try, /*On fail goto*//*Label 151*/ GIMT_Encode4(2676), // Rule ID 1120 //
976 /* 2631 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
977 /* 2635 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
978 /* 2639 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
979 /* 2642 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
980 /* 2647 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
981 /* 2651 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
982 /* 2656 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
983 /* 2660 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
984 /* 2662 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14430:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x)
985 /* 2662 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
986 /* 2665 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
987 /* 2667 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
988 /* 2671 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
989 /* 2674 */ GIR_RootConstrainSelectedInstOperands,
990 /* 2675 */ // GIR_Coverage, 1120,
991 /* 2675 */ GIR_EraseRootFromParent_Done,
992 /* 2676 */ // Label 151: @2676
993 /* 2676 */ GIM_Try, /*On fail goto*//*Label 152*/ GIMT_Encode4(2726), // Rule ID 1123 //
994 /* 2681 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
995 /* 2685 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
996 /* 2689 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
997 /* 2692 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
998 /* 2697 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
999 /* 2701 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1000 /* 2706 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1001 /* 2710 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1002 /* 2712 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14430:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x)
1003 /* 2712 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
1004 /* 2715 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1005 /* 2717 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1006 /* 2721 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1007 /* 2724 */ GIR_RootConstrainSelectedInstOperands,
1008 /* 2725 */ // GIR_Coverage, 1123,
1009 /* 2725 */ GIR_EraseRootFromParent_Done,
1010 /* 2726 */ // Label 152: @2726
1011 /* 2726 */ GIM_Try, /*On fail goto*//*Label 153*/ GIMT_Encode4(2776), // Rule ID 1126 //
1012 /* 2731 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1013 /* 2735 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1014 /* 2739 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1015 /* 2742 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1016 /* 2747 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
1017 /* 2751 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1018 /* 2756 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1019 /* 2760 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1020 /* 2762 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14429:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x)
1021 /* 2762 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
1022 /* 2765 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1023 /* 2767 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1024 /* 2771 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1025 /* 2774 */ GIR_RootConstrainSelectedInstOperands,
1026 /* 2775 */ // GIR_Coverage, 1126,
1027 /* 2775 */ GIR_EraseRootFromParent_Done,
1028 /* 2776 */ // Label 153: @2776
1029 /* 2776 */ GIM_Try, /*On fail goto*//*Label 154*/ GIMT_Encode4(2826), // Rule ID 1129 //
1030 /* 2781 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1031 /* 2785 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1032 /* 2789 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1033 /* 2792 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1034 /* 2797 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1035 /* 2801 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1036 /* 2806 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1037 /* 2810 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1038 /* 2812 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14429:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x)
1039 /* 2812 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
1040 /* 2815 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1041 /* 2817 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1042 /* 2821 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1043 /* 2824 */ GIR_RootConstrainSelectedInstOperands,
1044 /* 2825 */ // GIR_Coverage, 1129,
1045 /* 2825 */ GIR_EraseRootFromParent_Done,
1046 /* 2826 */ // Label 154: @2826
1047 /* 2826 */ GIM_Try, /*On fail goto*//*Label 155*/ GIMT_Encode4(2876), // Rule ID 1132 //
1048 /* 2831 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1049 /* 2835 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1050 /* 2839 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1051 /* 2842 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1052 /* 2847 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1053 /* 2851 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1054 /* 2856 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1055 /* 2860 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1056 /* 2862 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14429:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x)
1057 /* 2862 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
1058 /* 2865 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1059 /* 2867 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1060 /* 2871 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1061 /* 2874 */ GIR_RootConstrainSelectedInstOperands,
1062 /* 2875 */ // GIR_Coverage, 1132,
1063 /* 2875 */ GIR_EraseRootFromParent_Done,
1064 /* 2876 */ // Label 155: @2876
1065 /* 2876 */ GIM_Try, /*On fail goto*//*Label 156*/ GIMT_Encode4(2926), // Rule ID 1135 //
1066 /* 2881 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1067 /* 2885 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1068 /* 2889 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1069 /* 2892 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1070 /* 2897 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
1071 /* 2901 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1072 /* 2906 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1073 /* 2910 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1074 /* 2912 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14429:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x)
1075 /* 2912 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
1076 /* 2915 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1077 /* 2917 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1078 /* 2921 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1079 /* 2924 */ GIR_RootConstrainSelectedInstOperands,
1080 /* 2925 */ // GIR_Coverage, 1135,
1081 /* 2925 */ GIR_EraseRootFromParent_Done,
1082 /* 2926 */ // Label 156: @2926
1083 /* 2926 */ GIM_Try, /*On fail goto*//*Label 157*/ GIMT_Encode4(2952), // Rule ID 78 //
1084 /* 2931 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1085 /* 2935 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1086 /* 2939 */ // (and:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (AND_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
1087 /* 2939 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND_I32),
1088 /* 2944 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1089 /* 2950 */ GIR_RootConstrainSelectedInstOperands,
1090 /* 2951 */ // GIR_Coverage, 78,
1091 /* 2951 */ GIR_Done,
1092 /* 2952 */ // Label 157: @2952
1093 /* 2952 */ GIM_Reject,
1094 /* 2953 */ // Label 148: @2953
1095 /* 2953 */ GIM_Reject,
1096 /* 2954 */ // Label 142: @2954
1097 /* 2954 */ GIM_Try, /*On fail goto*//*Label 158*/ GIMT_Encode4(2990), // Rule ID 79 //
1098 /* 2959 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
1099 /* 2962 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
1100 /* 2965 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1101 /* 2969 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1102 /* 2973 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1103 /* 2977 */ // (and:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (AND_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
1104 /* 2977 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND_I64),
1105 /* 2982 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1106 /* 2988 */ GIR_RootConstrainSelectedInstOperands,
1107 /* 2989 */ // GIR_Coverage, 79,
1108 /* 2989 */ GIR_Done,
1109 /* 2990 */ // Label 158: @2990
1110 /* 2990 */ GIM_Reject,
1111 /* 2991 */ // Label 143: @2991
1112 /* 2991 */ GIM_Try, /*On fail goto*//*Label 159*/ GIMT_Encode4(3153),
1113 /* 2996 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
1114 /* 2999 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
1115 /* 3002 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1116 /* 3006 */ GIM_Try, /*On fail goto*//*Label 160*/ GIMT_Encode4(3066), // Rule ID 1319 //
1117 /* 3011 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1118 /* 3015 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1119 /* 3019 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
1120 /* 3023 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
1121 /* 3027 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1122 /* 3032 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1123 /* 3036 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1124 /* 3042 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1125 /* 3044 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1126 /* 3048 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1127 /* 3050 */ // (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$rhs, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$lhs) => (ANDNOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
1128 /* 3050 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1129 /* 3053 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1130 /* 3055 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1131 /* 3057 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1132 /* 3061 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1133 /* 3064 */ GIR_RootConstrainSelectedInstOperands,
1134 /* 3065 */ // GIR_Coverage, 1319,
1135 /* 3065 */ GIR_EraseRootFromParent_Done,
1136 /* 3066 */ // Label 160: @3066
1137 /* 3066 */ GIM_Try, /*On fail goto*//*Label 161*/ GIMT_Encode4(3126), // Rule ID 1067 //
1138 /* 3071 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1139 /* 3075 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1140 /* 3079 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1141 /* 3083 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
1142 /* 3087 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
1143 /* 3091 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1144 /* 3096 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1145 /* 3100 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1146 /* 3106 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1147 /* 3108 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1148 /* 3110 */ // (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$rhs, immAllOnesV:{ *:[v2i64] })) => (ANDNOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
1149 /* 3110 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1150 /* 3113 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1151 /* 3115 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1152 /* 3117 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1153 /* 3121 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1154 /* 3124 */ GIR_RootConstrainSelectedInstOperands,
1155 /* 3125 */ // GIR_Coverage, 1067,
1156 /* 3125 */ GIR_EraseRootFromParent_Done,
1157 /* 3126 */ // Label 161: @3126
1158 /* 3126 */ GIM_Try, /*On fail goto*//*Label 162*/ GIMT_Encode4(3152), // Rule ID 1055 //
1159 /* 3131 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1160 /* 3135 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1161 /* 3139 */ // (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (AND:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
1162 /* 3139 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1163 /* 3144 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1164 /* 3150 */ GIR_RootConstrainSelectedInstOperands,
1165 /* 3151 */ // GIR_Coverage, 1055,
1166 /* 3151 */ GIR_Done,
1167 /* 3152 */ // Label 162: @3152
1168 /* 3152 */ GIM_Reject,
1169 /* 3153 */ // Label 159: @3153
1170 /* 3153 */ GIM_Reject,
1171 /* 3154 */ // Label 144: @3154
1172 /* 3154 */ GIM_Try, /*On fail goto*//*Label 163*/ GIMT_Encode4(3316),
1173 /* 3159 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
1174 /* 3162 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
1175 /* 3165 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1176 /* 3169 */ GIM_Try, /*On fail goto*//*Label 164*/ GIMT_Encode4(3229), // Rule ID 1318 //
1177 /* 3174 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1178 /* 3178 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1179 /* 3182 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1180 /* 3186 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1181 /* 3190 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1182 /* 3195 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1183 /* 3199 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1184 /* 3205 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1185 /* 3207 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1186 /* 3211 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1187 /* 3213 */ // (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$rhs, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$lhs) => (ANDNOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
1188 /* 3213 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1189 /* 3216 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1190 /* 3218 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1191 /* 3220 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1192 /* 3224 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1193 /* 3227 */ GIR_RootConstrainSelectedInstOperands,
1194 /* 3228 */ // GIR_Coverage, 1318,
1195 /* 3228 */ GIR_EraseRootFromParent_Done,
1196 /* 3229 */ // Label 164: @3229
1197 /* 3229 */ GIM_Try, /*On fail goto*//*Label 165*/ GIMT_Encode4(3289), // Rule ID 1066 //
1198 /* 3234 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1199 /* 3238 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1200 /* 3242 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1201 /* 3246 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1202 /* 3250 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1203 /* 3254 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1204 /* 3259 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1205 /* 3263 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1206 /* 3269 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1207 /* 3271 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1208 /* 3273 */ // (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$rhs, immAllOnesV:{ *:[v4i32] })) => (ANDNOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
1209 /* 3273 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1210 /* 3276 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1211 /* 3278 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1212 /* 3280 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1213 /* 3284 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1214 /* 3287 */ GIR_RootConstrainSelectedInstOperands,
1215 /* 3288 */ // GIR_Coverage, 1066,
1216 /* 3288 */ GIR_EraseRootFromParent_Done,
1217 /* 3289 */ // Label 165: @3289
1218 /* 3289 */ GIM_Try, /*On fail goto*//*Label 166*/ GIMT_Encode4(3315), // Rule ID 1054 //
1219 /* 3294 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1220 /* 3298 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1221 /* 3302 */ // (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (AND:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
1222 /* 3302 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1223 /* 3307 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1224 /* 3313 */ GIR_RootConstrainSelectedInstOperands,
1225 /* 3314 */ // GIR_Coverage, 1054,
1226 /* 3314 */ GIR_Done,
1227 /* 3315 */ // Label 166: @3315
1228 /* 3315 */ GIM_Reject,
1229 /* 3316 */ // Label 163: @3316
1230 /* 3316 */ GIM_Reject,
1231 /* 3317 */ // Label 145: @3317
1232 /* 3317 */ GIM_Try, /*On fail goto*//*Label 167*/ GIMT_Encode4(3479),
1233 /* 3322 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
1234 /* 3325 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
1235 /* 3328 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1236 /* 3332 */ GIM_Try, /*On fail goto*//*Label 168*/ GIMT_Encode4(3392), // Rule ID 1317 //
1237 /* 3337 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1238 /* 3341 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1239 /* 3345 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1240 /* 3349 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1241 /* 3353 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1242 /* 3358 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1243 /* 3362 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1244 /* 3368 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1245 /* 3370 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1246 /* 3374 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1247 /* 3376 */ // (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$rhs, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$lhs) => (ANDNOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1248 /* 3376 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1249 /* 3379 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1250 /* 3381 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1251 /* 3383 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1252 /* 3387 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1253 /* 3390 */ GIR_RootConstrainSelectedInstOperands,
1254 /* 3391 */ // GIR_Coverage, 1317,
1255 /* 3391 */ GIR_EraseRootFromParent_Done,
1256 /* 3392 */ // Label 168: @3392
1257 /* 3392 */ GIM_Try, /*On fail goto*//*Label 169*/ GIMT_Encode4(3452), // Rule ID 1065 //
1258 /* 3397 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1259 /* 3401 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1260 /* 3405 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1261 /* 3409 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1262 /* 3413 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1263 /* 3417 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1264 /* 3422 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1265 /* 3426 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1266 /* 3432 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1267 /* 3434 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1268 /* 3436 */ // (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$rhs, immAllOnesV:{ *:[v8i16] })) => (ANDNOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1269 /* 3436 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1270 /* 3439 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1271 /* 3441 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1272 /* 3443 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1273 /* 3447 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1274 /* 3450 */ GIR_RootConstrainSelectedInstOperands,
1275 /* 3451 */ // GIR_Coverage, 1065,
1276 /* 3451 */ GIR_EraseRootFromParent_Done,
1277 /* 3452 */ // Label 169: @3452
1278 /* 3452 */ GIM_Try, /*On fail goto*//*Label 170*/ GIMT_Encode4(3478), // Rule ID 1053 //
1279 /* 3457 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1280 /* 3461 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1281 /* 3465 */ // (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (AND:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1282 /* 3465 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1283 /* 3470 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1284 /* 3476 */ GIR_RootConstrainSelectedInstOperands,
1285 /* 3477 */ // GIR_Coverage, 1053,
1286 /* 3477 */ GIR_Done,
1287 /* 3478 */ // Label 170: @3478
1288 /* 3478 */ GIM_Reject,
1289 /* 3479 */ // Label 167: @3479
1290 /* 3479 */ GIM_Reject,
1291 /* 3480 */ // Label 146: @3480
1292 /* 3480 */ GIM_Try, /*On fail goto*//*Label 171*/ GIMT_Encode4(3642),
1293 /* 3485 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
1294 /* 3488 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
1295 /* 3491 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1296 /* 3495 */ GIM_Try, /*On fail goto*//*Label 172*/ GIMT_Encode4(3555), // Rule ID 1316 //
1297 /* 3500 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1298 /* 3504 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1299 /* 3508 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
1300 /* 3512 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
1301 /* 3516 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1302 /* 3521 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1303 /* 3525 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1304 /* 3531 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1305 /* 3533 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1306 /* 3537 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1307 /* 3539 */ // (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$rhs, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$lhs) => (ANDNOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1308 /* 3539 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1309 /* 3542 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1310 /* 3544 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1311 /* 3546 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1312 /* 3550 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1313 /* 3553 */ GIR_RootConstrainSelectedInstOperands,
1314 /* 3554 */ // GIR_Coverage, 1316,
1315 /* 3554 */ GIR_EraseRootFromParent_Done,
1316 /* 3555 */ // Label 172: @3555
1317 /* 3555 */ GIM_Try, /*On fail goto*//*Label 173*/ GIMT_Encode4(3615), // Rule ID 1064 //
1318 /* 3560 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1319 /* 3564 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1320 /* 3568 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1321 /* 3572 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
1322 /* 3576 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
1323 /* 3580 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1324 /* 3585 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1325 /* 3589 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1326 /* 3595 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1327 /* 3597 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1328 /* 3599 */ // (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$rhs, immAllOnesV:{ *:[v16i8] })) => (ANDNOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1329 /* 3599 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1330 /* 3602 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1331 /* 3604 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1332 /* 3606 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1333 /* 3610 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1334 /* 3613 */ GIR_RootConstrainSelectedInstOperands,
1335 /* 3614 */ // GIR_Coverage, 1064,
1336 /* 3614 */ GIR_EraseRootFromParent_Done,
1337 /* 3615 */ // Label 173: @3615
1338 /* 3615 */ GIM_Try, /*On fail goto*//*Label 174*/ GIMT_Encode4(3641), // Rule ID 1048 //
1339 /* 3620 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1340 /* 3624 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1341 /* 3628 */ // (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (AND:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1342 /* 3628 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1343 /* 3633 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1344 /* 3639 */ GIR_RootConstrainSelectedInstOperands,
1345 /* 3640 */ // GIR_Coverage, 1048,
1346 /* 3640 */ GIR_Done,
1347 /* 3641 */ // Label 174: @3641
1348 /* 3641 */ GIM_Reject,
1349 /* 3642 */ // Label 171: @3642
1350 /* 3642 */ GIM_Reject,
1351 /* 3643 */ // Label 147: @3643
1352 /* 3643 */ GIM_Reject,
1353 /* 3644 */ // Label 8: @3644
1354 /* 3644 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 181*/ GIMT_Encode4(7285),
1355 /* 3655 */ /*GILLT_s32*//*Label 175*/ GIMT_Encode4(3679),
1356 /* 3659 */ /*GILLT_s64*//*Label 176*/ GIMT_Encode4(3716),
1357 /* 3663 */ /*GILLT_v2s64*//*Label 177*/ GIMT_Encode4(3753),
1358 /* 3667 */ /*GILLT_v4s32*//*Label 178*/ GIMT_Encode4(4636),
1359 /* 3671 */ /*GILLT_v8s16*//*Label 179*/ GIMT_Encode4(5519),
1360 /* 3675 */ /*GILLT_v16s8*//*Label 180*/ GIMT_Encode4(6402),
1361 /* 3679 */ // Label 175: @3679
1362 /* 3679 */ GIM_Try, /*On fail goto*//*Label 182*/ GIMT_Encode4(3715), // Rule ID 80 //
1363 /* 3684 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
1364 /* 3687 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
1365 /* 3690 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1366 /* 3694 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1367 /* 3698 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1368 /* 3702 */ // (or:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (OR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
1369 /* 3702 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR_I32),
1370 /* 3707 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1371 /* 3713 */ GIR_RootConstrainSelectedInstOperands,
1372 /* 3714 */ // GIR_Coverage, 80,
1373 /* 3714 */ GIR_Done,
1374 /* 3715 */ // Label 182: @3715
1375 /* 3715 */ GIM_Reject,
1376 /* 3716 */ // Label 176: @3716
1377 /* 3716 */ GIM_Try, /*On fail goto*//*Label 183*/ GIMT_Encode4(3752), // Rule ID 81 //
1378 /* 3721 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
1379 /* 3724 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
1380 /* 3727 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1381 /* 3731 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1382 /* 3735 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1383 /* 3739 */ // (or:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (OR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
1384 /* 3739 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR_I64),
1385 /* 3744 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1386 /* 3750 */ GIR_RootConstrainSelectedInstOperands,
1387 /* 3751 */ // GIR_Coverage, 81,
1388 /* 3751 */ GIR_Done,
1389 /* 3752 */ // Label 183: @3752
1390 /* 3752 */ GIM_Reject,
1391 /* 3753 */ // Label 177: @3753
1392 /* 3753 */ GIM_Try, /*On fail goto*//*Label 184*/ GIMT_Encode4(4635),
1393 /* 3758 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
1394 /* 3761 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
1395 /* 3764 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1396 /* 3768 */ GIM_Try, /*On fail goto*//*Label 185*/ GIMT_Encode4(3873), // Rule ID 1345 //
1397 /* 3773 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1398 /* 3777 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1399 /* 3781 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
1400 /* 3785 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
1401 /* 3789 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1402 /* 3793 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1403 /* 3797 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
1404 /* 3801 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
1405 /* 3805 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1406 /* 3810 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1407 /* 3814 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1408 /* 3820 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1409 /* 3822 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1410 /* 3827 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1411 /* 3831 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1412 /* 3835 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2s64,
1413 /* 3839 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1414 /* 3844 */ // MIs[4] c
1415 /* 3844 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1416 /* 3849 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1417 /* 3851 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
1418 /* 3851 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1419 /* 3854 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1420 /* 3856 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1421 /* 3860 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1422 /* 3864 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1423 /* 3868 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1424 /* 3871 */ GIR_RootConstrainSelectedInstOperands,
1425 /* 3872 */ // GIR_Coverage, 1345,
1426 /* 3872 */ GIR_EraseRootFromParent_Done,
1427 /* 3873 */ // Label 185: @3873
1428 /* 3873 */ GIM_Try, /*On fail goto*//*Label 186*/ GIMT_Encode4(3978), // Rule ID 1344 //
1429 /* 3878 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1430 /* 3882 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1431 /* 3886 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
1432 /* 3890 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
1433 /* 3894 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1434 /* 3898 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1435 /* 3902 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
1436 /* 3906 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
1437 /* 3910 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1438 /* 3915 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1439 /* 3919 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1440 /* 3925 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1441 /* 3927 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1442 /* 3932 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1443 /* 3936 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1444 /* 3940 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2s64,
1445 /* 3944 */ // MIs[4] c
1446 /* 3944 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1447 /* 3949 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1448 /* 3954 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1449 /* 3956 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
1450 /* 3956 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1451 /* 3959 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1452 /* 3961 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1453 /* 3965 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1454 /* 3969 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1455 /* 3973 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1456 /* 3976 */ GIR_RootConstrainSelectedInstOperands,
1457 /* 3977 */ // GIR_Coverage, 1344,
1458 /* 3977 */ GIR_EraseRootFromParent_Done,
1459 /* 3978 */ // Label 186: @3978
1460 /* 3978 */ GIM_Try, /*On fail goto*//*Label 187*/ GIMT_Encode4(4083), // Rule ID 1347 //
1461 /* 3983 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1462 /* 3987 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1463 /* 3991 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
1464 /* 3995 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
1465 /* 3999 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1466 /* 4004 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1467 /* 4008 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1468 /* 4012 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
1469 /* 4016 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
1470 /* 4020 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1471 /* 4025 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1472 /* 4029 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1473 /* 4035 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1474 /* 4037 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1475 /* 4041 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1476 /* 4045 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2s64,
1477 /* 4049 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1478 /* 4054 */ // MIs[4] c
1479 /* 4054 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1480 /* 4059 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1481 /* 4061 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
1482 /* 4061 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1483 /* 4064 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1484 /* 4066 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1485 /* 4070 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1486 /* 4074 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1487 /* 4078 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1488 /* 4081 */ GIR_RootConstrainSelectedInstOperands,
1489 /* 4082 */ // GIR_Coverage, 1347,
1490 /* 4082 */ GIR_EraseRootFromParent_Done,
1491 /* 4083 */ // Label 187: @4083
1492 /* 4083 */ GIM_Try, /*On fail goto*//*Label 188*/ GIMT_Encode4(4188), // Rule ID 1346 //
1493 /* 4088 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1494 /* 4092 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1495 /* 4096 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
1496 /* 4100 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
1497 /* 4104 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1498 /* 4109 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1499 /* 4113 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1500 /* 4117 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
1501 /* 4121 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
1502 /* 4125 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1503 /* 4130 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1504 /* 4134 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1505 /* 4140 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1506 /* 4142 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1507 /* 4146 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1508 /* 4150 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2s64,
1509 /* 4154 */ // MIs[4] c
1510 /* 4154 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1511 /* 4159 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1512 /* 4164 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1513 /* 4166 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
1514 /* 4166 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1515 /* 4169 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1516 /* 4171 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1517 /* 4175 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1518 /* 4179 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1519 /* 4183 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1520 /* 4186 */ GIR_RootConstrainSelectedInstOperands,
1521 /* 4187 */ // GIR_Coverage, 1346,
1522 /* 4187 */ GIR_EraseRootFromParent_Done,
1523 /* 4188 */ // Label 188: @4188
1524 /* 4188 */ GIM_Try, /*On fail goto*//*Label 189*/ GIMT_Encode4(4293), // Rule ID 1077 //
1525 /* 4193 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1526 /* 4197 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1527 /* 4201 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
1528 /* 4205 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
1529 /* 4209 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1530 /* 4214 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1531 /* 4219 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1532 /* 4223 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1533 /* 4227 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
1534 /* 4231 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
1535 /* 4235 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1536 /* 4239 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1537 /* 4243 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2s64,
1538 /* 4247 */ // MIs[3] c
1539 /* 4247 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1540 /* 4252 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1541 /* 4256 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1542 /* 4262 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1543 /* 4264 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1544 /* 4269 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1545 /* 4271 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1), (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
1546 /* 4271 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1547 /* 4274 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1548 /* 4276 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1549 /* 4280 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1550 /* 4284 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1551 /* 4288 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1552 /* 4291 */ GIR_RootConstrainSelectedInstOperands,
1553 /* 4292 */ // GIR_Coverage, 1077,
1554 /* 4292 */ GIR_EraseRootFromParent_Done,
1555 /* 4293 */ // Label 189: @4293
1556 /* 4293 */ GIM_Try, /*On fail goto*//*Label 190*/ GIMT_Encode4(4398), // Rule ID 1342 //
1557 /* 4298 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1558 /* 4302 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1559 /* 4306 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
1560 /* 4310 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
1561 /* 4314 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1562 /* 4319 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1563 /* 4324 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1564 /* 4328 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1565 /* 4332 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
1566 /* 4336 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
1567 /* 4340 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1568 /* 4344 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1569 /* 4348 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2s64,
1570 /* 4352 */ // MIs[3] c
1571 /* 4352 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1572 /* 4357 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1573 /* 4361 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1574 /* 4367 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1575 /* 4369 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1576 /* 4374 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1577 /* 4376 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c), (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
1578 /* 4376 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1579 /* 4379 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1580 /* 4381 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1581 /* 4385 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1582 /* 4389 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1583 /* 4393 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1584 /* 4396 */ GIR_RootConstrainSelectedInstOperands,
1585 /* 4397 */ // GIR_Coverage, 1342,
1586 /* 4397 */ GIR_EraseRootFromParent_Done,
1587 /* 4398 */ // Label 190: @4398
1588 /* 4398 */ GIM_Try, /*On fail goto*//*Label 191*/ GIMT_Encode4(4503), // Rule ID 1341 //
1589 /* 4403 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1590 /* 4407 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1591 /* 4411 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
1592 /* 4415 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
1593 /* 4419 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1594 /* 4424 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1595 /* 4429 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1596 /* 4433 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1597 /* 4437 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
1598 /* 4441 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
1599 /* 4445 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1600 /* 4450 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1601 /* 4454 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1602 /* 4458 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2s64,
1603 /* 4462 */ // MIs[3] c
1604 /* 4462 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1605 /* 4467 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1606 /* 4471 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1607 /* 4477 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1608 /* 4479 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1609 /* 4481 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
1610 /* 4481 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1611 /* 4484 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1612 /* 4486 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1613 /* 4490 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1614 /* 4494 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1615 /* 4498 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1616 /* 4501 */ GIR_RootConstrainSelectedInstOperands,
1617 /* 4502 */ // GIR_Coverage, 1341,
1618 /* 4502 */ GIR_EraseRootFromParent_Done,
1619 /* 4503 */ // Label 191: @4503
1620 /* 4503 */ GIM_Try, /*On fail goto*//*Label 192*/ GIMT_Encode4(4608), // Rule ID 1343 //
1621 /* 4508 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1622 /* 4512 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1623 /* 4516 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
1624 /* 4520 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
1625 /* 4524 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1626 /* 4529 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1627 /* 4534 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1628 /* 4538 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1629 /* 4542 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
1630 /* 4546 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
1631 /* 4550 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1632 /* 4555 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1633 /* 4559 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1634 /* 4563 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2s64,
1635 /* 4567 */ // MIs[3] c
1636 /* 4567 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1637 /* 4572 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1638 /* 4576 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1639 /* 4582 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1640 /* 4584 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1641 /* 4586 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
1642 /* 4586 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1643 /* 4589 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1644 /* 4591 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1645 /* 4595 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1646 /* 4599 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1647 /* 4603 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1648 /* 4606 */ GIR_RootConstrainSelectedInstOperands,
1649 /* 4607 */ // GIR_Coverage, 1343,
1650 /* 4607 */ GIR_EraseRootFromParent_Done,
1651 /* 4608 */ // Label 192: @4608
1652 /* 4608 */ GIM_Try, /*On fail goto*//*Label 193*/ GIMT_Encode4(4634), // Rule ID 1059 //
1653 /* 4613 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1654 /* 4617 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1655 /* 4621 */ // (or:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (OR:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
1656 /* 4621 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
1657 /* 4626 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1658 /* 4632 */ GIR_RootConstrainSelectedInstOperands,
1659 /* 4633 */ // GIR_Coverage, 1059,
1660 /* 4633 */ GIR_Done,
1661 /* 4634 */ // Label 193: @4634
1662 /* 4634 */ GIM_Reject,
1663 /* 4635 */ // Label 184: @4635
1664 /* 4635 */ GIM_Reject,
1665 /* 4636 */ // Label 178: @4636
1666 /* 4636 */ GIM_Try, /*On fail goto*//*Label 194*/ GIMT_Encode4(5518),
1667 /* 4641 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
1668 /* 4644 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
1669 /* 4647 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1670 /* 4651 */ GIM_Try, /*On fail goto*//*Label 195*/ GIMT_Encode4(4756), // Rule ID 1338 //
1671 /* 4656 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1672 /* 4660 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1673 /* 4664 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1674 /* 4668 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1675 /* 4672 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1676 /* 4676 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1677 /* 4680 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
1678 /* 4684 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
1679 /* 4688 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1680 /* 4693 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1681 /* 4697 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1682 /* 4703 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1683 /* 4705 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1684 /* 4710 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1685 /* 4714 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1686 /* 4718 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4s32,
1687 /* 4722 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1688 /* 4727 */ // MIs[4] c
1689 /* 4727 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1690 /* 4732 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1691 /* 4734 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
1692 /* 4734 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1693 /* 4737 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1694 /* 4739 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1695 /* 4743 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1696 /* 4747 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1697 /* 4751 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1698 /* 4754 */ GIR_RootConstrainSelectedInstOperands,
1699 /* 4755 */ // GIR_Coverage, 1338,
1700 /* 4755 */ GIR_EraseRootFromParent_Done,
1701 /* 4756 */ // Label 195: @4756
1702 /* 4756 */ GIM_Try, /*On fail goto*//*Label 196*/ GIMT_Encode4(4861), // Rule ID 1337 //
1703 /* 4761 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1704 /* 4765 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1705 /* 4769 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1706 /* 4773 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1707 /* 4777 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1708 /* 4781 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1709 /* 4785 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
1710 /* 4789 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
1711 /* 4793 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1712 /* 4798 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1713 /* 4802 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1714 /* 4808 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1715 /* 4810 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1716 /* 4815 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1717 /* 4819 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1718 /* 4823 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4s32,
1719 /* 4827 */ // MIs[4] c
1720 /* 4827 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1721 /* 4832 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1722 /* 4837 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1723 /* 4839 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
1724 /* 4839 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1725 /* 4842 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1726 /* 4844 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1727 /* 4848 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1728 /* 4852 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1729 /* 4856 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1730 /* 4859 */ GIR_RootConstrainSelectedInstOperands,
1731 /* 4860 */ // GIR_Coverage, 1337,
1732 /* 4860 */ GIR_EraseRootFromParent_Done,
1733 /* 4861 */ // Label 196: @4861
1734 /* 4861 */ GIM_Try, /*On fail goto*//*Label 197*/ GIMT_Encode4(4966), // Rule ID 1340 //
1735 /* 4866 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1736 /* 4870 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1737 /* 4874 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1738 /* 4878 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1739 /* 4882 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1740 /* 4887 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1741 /* 4891 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1742 /* 4895 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
1743 /* 4899 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
1744 /* 4903 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1745 /* 4908 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1746 /* 4912 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1747 /* 4918 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1748 /* 4920 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1749 /* 4924 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1750 /* 4928 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4s32,
1751 /* 4932 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1752 /* 4937 */ // MIs[4] c
1753 /* 4937 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1754 /* 4942 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1755 /* 4944 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
1756 /* 4944 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1757 /* 4947 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1758 /* 4949 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1759 /* 4953 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1760 /* 4957 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1761 /* 4961 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1762 /* 4964 */ GIR_RootConstrainSelectedInstOperands,
1763 /* 4965 */ // GIR_Coverage, 1340,
1764 /* 4965 */ GIR_EraseRootFromParent_Done,
1765 /* 4966 */ // Label 197: @4966
1766 /* 4966 */ GIM_Try, /*On fail goto*//*Label 198*/ GIMT_Encode4(5071), // Rule ID 1339 //
1767 /* 4971 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1768 /* 4975 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1769 /* 4979 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1770 /* 4983 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1771 /* 4987 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1772 /* 4992 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1773 /* 4996 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1774 /* 5000 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
1775 /* 5004 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
1776 /* 5008 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1777 /* 5013 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1778 /* 5017 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1779 /* 5023 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1780 /* 5025 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1781 /* 5029 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1782 /* 5033 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4s32,
1783 /* 5037 */ // MIs[4] c
1784 /* 5037 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1785 /* 5042 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1786 /* 5047 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1787 /* 5049 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
1788 /* 5049 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1789 /* 5052 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1790 /* 5054 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1791 /* 5058 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1792 /* 5062 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1793 /* 5066 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1794 /* 5069 */ GIR_RootConstrainSelectedInstOperands,
1795 /* 5070 */ // GIR_Coverage, 1339,
1796 /* 5070 */ GIR_EraseRootFromParent_Done,
1797 /* 5071 */ // Label 198: @5071
1798 /* 5071 */ GIM_Try, /*On fail goto*//*Label 199*/ GIMT_Encode4(5176), // Rule ID 1076 //
1799 /* 5076 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1800 /* 5080 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1801 /* 5084 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1802 /* 5088 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1803 /* 5092 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1804 /* 5097 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1805 /* 5102 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1806 /* 5106 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1807 /* 5110 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
1808 /* 5114 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
1809 /* 5118 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1810 /* 5122 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1811 /* 5126 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4s32,
1812 /* 5130 */ // MIs[3] c
1813 /* 5130 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1814 /* 5135 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1815 /* 5139 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1816 /* 5145 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1817 /* 5147 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1818 /* 5152 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1819 /* 5154 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1), (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
1820 /* 5154 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1821 /* 5157 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1822 /* 5159 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1823 /* 5163 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1824 /* 5167 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1825 /* 5171 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1826 /* 5174 */ GIR_RootConstrainSelectedInstOperands,
1827 /* 5175 */ // GIR_Coverage, 1076,
1828 /* 5175 */ GIR_EraseRootFromParent_Done,
1829 /* 5176 */ // Label 199: @5176
1830 /* 5176 */ GIM_Try, /*On fail goto*//*Label 200*/ GIMT_Encode4(5281), // Rule ID 1335 //
1831 /* 5181 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1832 /* 5185 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1833 /* 5189 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1834 /* 5193 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1835 /* 5197 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1836 /* 5202 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1837 /* 5207 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1838 /* 5211 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1839 /* 5215 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
1840 /* 5219 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
1841 /* 5223 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1842 /* 5227 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1843 /* 5231 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4s32,
1844 /* 5235 */ // MIs[3] c
1845 /* 5235 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1846 /* 5240 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1847 /* 5244 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1848 /* 5250 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1849 /* 5252 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1850 /* 5257 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1851 /* 5259 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c), (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
1852 /* 5259 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1853 /* 5262 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1854 /* 5264 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1855 /* 5268 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1856 /* 5272 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1857 /* 5276 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1858 /* 5279 */ GIR_RootConstrainSelectedInstOperands,
1859 /* 5280 */ // GIR_Coverage, 1335,
1860 /* 5280 */ GIR_EraseRootFromParent_Done,
1861 /* 5281 */ // Label 200: @5281
1862 /* 5281 */ GIM_Try, /*On fail goto*//*Label 201*/ GIMT_Encode4(5386), // Rule ID 1334 //
1863 /* 5286 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1864 /* 5290 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1865 /* 5294 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1866 /* 5298 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1867 /* 5302 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1868 /* 5307 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1869 /* 5312 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1870 /* 5316 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1871 /* 5320 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
1872 /* 5324 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
1873 /* 5328 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1874 /* 5333 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1875 /* 5337 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1876 /* 5341 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4s32,
1877 /* 5345 */ // MIs[3] c
1878 /* 5345 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1879 /* 5350 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1880 /* 5354 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1881 /* 5360 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1882 /* 5362 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1883 /* 5364 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
1884 /* 5364 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1885 /* 5367 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1886 /* 5369 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1887 /* 5373 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1888 /* 5377 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1889 /* 5381 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1890 /* 5384 */ GIR_RootConstrainSelectedInstOperands,
1891 /* 5385 */ // GIR_Coverage, 1334,
1892 /* 5385 */ GIR_EraseRootFromParent_Done,
1893 /* 5386 */ // Label 201: @5386
1894 /* 5386 */ GIM_Try, /*On fail goto*//*Label 202*/ GIMT_Encode4(5491), // Rule ID 1336 //
1895 /* 5391 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1896 /* 5395 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1897 /* 5399 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1898 /* 5403 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1899 /* 5407 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1900 /* 5412 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1901 /* 5417 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1902 /* 5421 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1903 /* 5425 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
1904 /* 5429 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
1905 /* 5433 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1906 /* 5438 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1907 /* 5442 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1908 /* 5446 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4s32,
1909 /* 5450 */ // MIs[3] c
1910 /* 5450 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1911 /* 5455 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1912 /* 5459 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1913 /* 5465 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1914 /* 5467 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1915 /* 5469 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
1916 /* 5469 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1917 /* 5472 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1918 /* 5474 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1919 /* 5478 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1920 /* 5482 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1921 /* 5486 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1922 /* 5489 */ GIR_RootConstrainSelectedInstOperands,
1923 /* 5490 */ // GIR_Coverage, 1336,
1924 /* 5490 */ GIR_EraseRootFromParent_Done,
1925 /* 5491 */ // Label 202: @5491
1926 /* 5491 */ GIM_Try, /*On fail goto*//*Label 203*/ GIMT_Encode4(5517), // Rule ID 1058 //
1927 /* 5496 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1928 /* 5500 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1929 /* 5504 */ // (or:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (OR:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
1930 /* 5504 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
1931 /* 5509 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1932 /* 5515 */ GIR_RootConstrainSelectedInstOperands,
1933 /* 5516 */ // GIR_Coverage, 1058,
1934 /* 5516 */ GIR_Done,
1935 /* 5517 */ // Label 203: @5517
1936 /* 5517 */ GIM_Reject,
1937 /* 5518 */ // Label 194: @5518
1938 /* 5518 */ GIM_Reject,
1939 /* 5519 */ // Label 179: @5519
1940 /* 5519 */ GIM_Try, /*On fail goto*//*Label 204*/ GIMT_Encode4(6401),
1941 /* 5524 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
1942 /* 5527 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
1943 /* 5530 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1944 /* 5534 */ GIM_Try, /*On fail goto*//*Label 205*/ GIMT_Encode4(5639), // Rule ID 1331 //
1945 /* 5539 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1946 /* 5543 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1947 /* 5547 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1948 /* 5551 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1949 /* 5555 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1950 /* 5559 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1951 /* 5563 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
1952 /* 5567 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
1953 /* 5571 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1954 /* 5576 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1955 /* 5580 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1956 /* 5586 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1957 /* 5588 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1958 /* 5593 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1959 /* 5597 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1960 /* 5601 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8s16,
1961 /* 5605 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1962 /* 5610 */ // MIs[4] c
1963 /* 5610 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1964 /* 5615 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1965 /* 5617 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1966 /* 5617 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1967 /* 5620 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1968 /* 5622 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1969 /* 5626 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1970 /* 5630 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1971 /* 5634 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1972 /* 5637 */ GIR_RootConstrainSelectedInstOperands,
1973 /* 5638 */ // GIR_Coverage, 1331,
1974 /* 5638 */ GIR_EraseRootFromParent_Done,
1975 /* 5639 */ // Label 205: @5639
1976 /* 5639 */ GIM_Try, /*On fail goto*//*Label 206*/ GIMT_Encode4(5744), // Rule ID 1330 //
1977 /* 5644 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1978 /* 5648 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1979 /* 5652 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1980 /* 5656 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1981 /* 5660 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1982 /* 5664 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1983 /* 5668 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
1984 /* 5672 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
1985 /* 5676 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1986 /* 5681 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1987 /* 5685 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1988 /* 5691 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1989 /* 5693 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1990 /* 5698 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1991 /* 5702 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1992 /* 5706 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8s16,
1993 /* 5710 */ // MIs[4] c
1994 /* 5710 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1995 /* 5715 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1996 /* 5720 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1997 /* 5722 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1998 /* 5722 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1999 /* 5725 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2000 /* 5727 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2001 /* 5731 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
2002 /* 5735 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2003 /* 5739 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2004 /* 5742 */ GIR_RootConstrainSelectedInstOperands,
2005 /* 5743 */ // GIR_Coverage, 1330,
2006 /* 5743 */ GIR_EraseRootFromParent_Done,
2007 /* 5744 */ // Label 206: @5744
2008 /* 5744 */ GIM_Try, /*On fail goto*//*Label 207*/ GIMT_Encode4(5849), // Rule ID 1333 //
2009 /* 5749 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2010 /* 5753 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2011 /* 5757 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
2012 /* 5761 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
2013 /* 5765 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2014 /* 5770 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2015 /* 5774 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2016 /* 5778 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
2017 /* 5782 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
2018 /* 5786 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2019 /* 5791 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2020 /* 5795 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2021 /* 5801 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2022 /* 5803 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2023 /* 5807 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2024 /* 5811 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8s16,
2025 /* 5815 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2026 /* 5820 */ // MIs[4] c
2027 /* 5820 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2028 /* 5825 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2029 /* 5827 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
2030 /* 5827 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2031 /* 5830 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2032 /* 5832 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2033 /* 5836 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2034 /* 5840 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2035 /* 5844 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2036 /* 5847 */ GIR_RootConstrainSelectedInstOperands,
2037 /* 5848 */ // GIR_Coverage, 1333,
2038 /* 5848 */ GIR_EraseRootFromParent_Done,
2039 /* 5849 */ // Label 207: @5849
2040 /* 5849 */ GIM_Try, /*On fail goto*//*Label 208*/ GIMT_Encode4(5954), // Rule ID 1332 //
2041 /* 5854 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2042 /* 5858 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2043 /* 5862 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
2044 /* 5866 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
2045 /* 5870 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2046 /* 5875 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2047 /* 5879 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2048 /* 5883 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
2049 /* 5887 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
2050 /* 5891 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2051 /* 5896 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2052 /* 5900 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2053 /* 5906 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2054 /* 5908 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2055 /* 5912 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2056 /* 5916 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8s16,
2057 /* 5920 */ // MIs[4] c
2058 /* 5920 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2059 /* 5925 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2060 /* 5930 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2061 /* 5932 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
2062 /* 5932 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2063 /* 5935 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2064 /* 5937 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2065 /* 5941 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2066 /* 5945 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2067 /* 5949 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2068 /* 5952 */ GIR_RootConstrainSelectedInstOperands,
2069 /* 5953 */ // GIR_Coverage, 1332,
2070 /* 5953 */ GIR_EraseRootFromParent_Done,
2071 /* 5954 */ // Label 208: @5954
2072 /* 5954 */ GIM_Try, /*On fail goto*//*Label 209*/ GIMT_Encode4(6059), // Rule ID 1075 //
2073 /* 5959 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2074 /* 5963 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2075 /* 5967 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
2076 /* 5971 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
2077 /* 5975 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2078 /* 5980 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2079 /* 5985 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2080 /* 5989 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2081 /* 5993 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
2082 /* 5997 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
2083 /* 6001 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2084 /* 6005 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2085 /* 6009 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8s16,
2086 /* 6013 */ // MIs[3] c
2087 /* 6013 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2088 /* 6018 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2089 /* 6022 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2090 /* 6028 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2091 /* 6030 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2092 /* 6035 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2093 /* 6037 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1), (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
2094 /* 6037 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2095 /* 6040 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2096 /* 6042 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2097 /* 6046 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2098 /* 6050 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2099 /* 6054 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2100 /* 6057 */ GIR_RootConstrainSelectedInstOperands,
2101 /* 6058 */ // GIR_Coverage, 1075,
2102 /* 6058 */ GIR_EraseRootFromParent_Done,
2103 /* 6059 */ // Label 209: @6059
2104 /* 6059 */ GIM_Try, /*On fail goto*//*Label 210*/ GIMT_Encode4(6164), // Rule ID 1328 //
2105 /* 6064 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2106 /* 6068 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2107 /* 6072 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
2108 /* 6076 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
2109 /* 6080 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2110 /* 6085 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2111 /* 6090 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2112 /* 6094 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2113 /* 6098 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
2114 /* 6102 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
2115 /* 6106 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2116 /* 6110 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2117 /* 6114 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8s16,
2118 /* 6118 */ // MIs[3] c
2119 /* 6118 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2120 /* 6123 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2121 /* 6127 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2122 /* 6133 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2123 /* 6135 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2124 /* 6140 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2125 /* 6142 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c), (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
2126 /* 6142 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2127 /* 6145 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2128 /* 6147 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2129 /* 6151 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2130 /* 6155 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2131 /* 6159 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2132 /* 6162 */ GIR_RootConstrainSelectedInstOperands,
2133 /* 6163 */ // GIR_Coverage, 1328,
2134 /* 6163 */ GIR_EraseRootFromParent_Done,
2135 /* 6164 */ // Label 210: @6164
2136 /* 6164 */ GIM_Try, /*On fail goto*//*Label 211*/ GIMT_Encode4(6269), // Rule ID 1327 //
2137 /* 6169 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2138 /* 6173 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2139 /* 6177 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
2140 /* 6181 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
2141 /* 6185 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2142 /* 6190 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2143 /* 6195 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2144 /* 6199 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2145 /* 6203 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
2146 /* 6207 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
2147 /* 6211 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2148 /* 6216 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2149 /* 6220 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2150 /* 6224 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8s16,
2151 /* 6228 */ // MIs[3] c
2152 /* 6228 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2153 /* 6233 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2154 /* 6237 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2155 /* 6243 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2156 /* 6245 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2157 /* 6247 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
2158 /* 6247 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2159 /* 6250 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2160 /* 6252 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2161 /* 6256 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2162 /* 6260 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2163 /* 6264 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2164 /* 6267 */ GIR_RootConstrainSelectedInstOperands,
2165 /* 6268 */ // GIR_Coverage, 1327,
2166 /* 6268 */ GIR_EraseRootFromParent_Done,
2167 /* 6269 */ // Label 211: @6269
2168 /* 6269 */ GIM_Try, /*On fail goto*//*Label 212*/ GIMT_Encode4(6374), // Rule ID 1329 //
2169 /* 6274 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2170 /* 6278 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2171 /* 6282 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
2172 /* 6286 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
2173 /* 6290 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2174 /* 6295 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2175 /* 6300 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2176 /* 6304 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2177 /* 6308 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
2178 /* 6312 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
2179 /* 6316 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2180 /* 6321 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2181 /* 6325 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2182 /* 6329 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8s16,
2183 /* 6333 */ // MIs[3] c
2184 /* 6333 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2185 /* 6338 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2186 /* 6342 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2187 /* 6348 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2188 /* 6350 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2189 /* 6352 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
2190 /* 6352 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2191 /* 6355 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2192 /* 6357 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2193 /* 6361 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2194 /* 6365 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2195 /* 6369 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2196 /* 6372 */ GIR_RootConstrainSelectedInstOperands,
2197 /* 6373 */ // GIR_Coverage, 1329,
2198 /* 6373 */ GIR_EraseRootFromParent_Done,
2199 /* 6374 */ // Label 212: @6374
2200 /* 6374 */ GIM_Try, /*On fail goto*//*Label 213*/ GIMT_Encode4(6400), // Rule ID 1057 //
2201 /* 6379 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2202 /* 6383 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2203 /* 6387 */ // (or:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (OR:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
2204 /* 6387 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
2205 /* 6392 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2206 /* 6398 */ GIR_RootConstrainSelectedInstOperands,
2207 /* 6399 */ // GIR_Coverage, 1057,
2208 /* 6399 */ GIR_Done,
2209 /* 6400 */ // Label 213: @6400
2210 /* 6400 */ GIM_Reject,
2211 /* 6401 */ // Label 204: @6401
2212 /* 6401 */ GIM_Reject,
2213 /* 6402 */ // Label 180: @6402
2214 /* 6402 */ GIM_Try, /*On fail goto*//*Label 214*/ GIMT_Encode4(7284),
2215 /* 6407 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
2216 /* 6410 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
2217 /* 6413 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2218 /* 6417 */ GIM_Try, /*On fail goto*//*Label 215*/ GIMT_Encode4(6522), // Rule ID 1324 //
2219 /* 6422 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2220 /* 6426 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2221 /* 6430 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2222 /* 6434 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2223 /* 6438 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2224 /* 6442 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2225 /* 6446 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2226 /* 6450 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2227 /* 6454 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2228 /* 6459 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2229 /* 6463 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2230 /* 6469 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2231 /* 6471 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2232 /* 6476 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2233 /* 6480 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2234 /* 6484 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16s8,
2235 /* 6488 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2236 /* 6493 */ // MIs[4] c
2237 /* 6493 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2238 /* 6498 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2239 /* 6500 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2240 /* 6500 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2241 /* 6503 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2242 /* 6505 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2243 /* 6509 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
2244 /* 6513 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2245 /* 6517 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2246 /* 6520 */ GIR_RootConstrainSelectedInstOperands,
2247 /* 6521 */ // GIR_Coverage, 1324,
2248 /* 6521 */ GIR_EraseRootFromParent_Done,
2249 /* 6522 */ // Label 215: @6522
2250 /* 6522 */ GIM_Try, /*On fail goto*//*Label 216*/ GIMT_Encode4(6627), // Rule ID 1323 //
2251 /* 6527 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2252 /* 6531 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2253 /* 6535 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2254 /* 6539 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2255 /* 6543 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2256 /* 6547 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2257 /* 6551 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2258 /* 6555 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2259 /* 6559 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2260 /* 6564 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2261 /* 6568 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2262 /* 6574 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2263 /* 6576 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2264 /* 6581 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2265 /* 6585 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2266 /* 6589 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16s8,
2267 /* 6593 */ // MIs[4] c
2268 /* 6593 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2269 /* 6598 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2270 /* 6603 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2271 /* 6605 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2272 /* 6605 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2273 /* 6608 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2274 /* 6610 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2275 /* 6614 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
2276 /* 6618 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2277 /* 6622 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2278 /* 6625 */ GIR_RootConstrainSelectedInstOperands,
2279 /* 6626 */ // GIR_Coverage, 1323,
2280 /* 6626 */ GIR_EraseRootFromParent_Done,
2281 /* 6627 */ // Label 216: @6627
2282 /* 6627 */ GIM_Try, /*On fail goto*//*Label 217*/ GIMT_Encode4(6732), // Rule ID 1326 //
2283 /* 6632 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2284 /* 6636 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2285 /* 6640 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2286 /* 6644 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2287 /* 6648 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2288 /* 6653 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2289 /* 6657 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2290 /* 6661 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2291 /* 6665 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2292 /* 6669 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2293 /* 6674 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2294 /* 6678 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2295 /* 6684 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2296 /* 6686 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2297 /* 6690 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2298 /* 6694 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16s8,
2299 /* 6698 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2300 /* 6703 */ // MIs[4] c
2301 /* 6703 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2302 /* 6708 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2303 /* 6710 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2304 /* 6710 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2305 /* 6713 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2306 /* 6715 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2307 /* 6719 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2308 /* 6723 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2309 /* 6727 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2310 /* 6730 */ GIR_RootConstrainSelectedInstOperands,
2311 /* 6731 */ // GIR_Coverage, 1326,
2312 /* 6731 */ GIR_EraseRootFromParent_Done,
2313 /* 6732 */ // Label 217: @6732
2314 /* 6732 */ GIM_Try, /*On fail goto*//*Label 218*/ GIMT_Encode4(6837), // Rule ID 1325 //
2315 /* 6737 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2316 /* 6741 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2317 /* 6745 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2318 /* 6749 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2319 /* 6753 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2320 /* 6758 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2321 /* 6762 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2322 /* 6766 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2323 /* 6770 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2324 /* 6774 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2325 /* 6779 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2326 /* 6783 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2327 /* 6789 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2328 /* 6791 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2329 /* 6795 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2330 /* 6799 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16s8,
2331 /* 6803 */ // MIs[4] c
2332 /* 6803 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2333 /* 6808 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2334 /* 6813 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2335 /* 6815 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2336 /* 6815 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2337 /* 6818 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2338 /* 6820 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2339 /* 6824 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2340 /* 6828 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2341 /* 6832 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2342 /* 6835 */ GIR_RootConstrainSelectedInstOperands,
2343 /* 6836 */ // GIR_Coverage, 1325,
2344 /* 6836 */ GIR_EraseRootFromParent_Done,
2345 /* 6837 */ // Label 218: @6837
2346 /* 6837 */ GIM_Try, /*On fail goto*//*Label 219*/ GIMT_Encode4(6942), // Rule ID 1074 //
2347 /* 6842 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2348 /* 6846 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2349 /* 6850 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2350 /* 6854 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2351 /* 6858 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2352 /* 6863 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2353 /* 6868 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2354 /* 6872 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2355 /* 6876 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2356 /* 6880 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2357 /* 6884 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2358 /* 6888 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2359 /* 6892 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16s8,
2360 /* 6896 */ // MIs[3] c
2361 /* 6896 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2362 /* 6901 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2363 /* 6905 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2364 /* 6911 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2365 /* 6913 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2366 /* 6918 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2367 /* 6920 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1), (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2368 /* 6920 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2369 /* 6923 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2370 /* 6925 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2371 /* 6929 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2372 /* 6933 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2373 /* 6937 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2374 /* 6940 */ GIR_RootConstrainSelectedInstOperands,
2375 /* 6941 */ // GIR_Coverage, 1074,
2376 /* 6941 */ GIR_EraseRootFromParent_Done,
2377 /* 6942 */ // Label 219: @6942
2378 /* 6942 */ GIM_Try, /*On fail goto*//*Label 220*/ GIMT_Encode4(7047), // Rule ID 1321 //
2379 /* 6947 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2380 /* 6951 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2381 /* 6955 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2382 /* 6959 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2383 /* 6963 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2384 /* 6968 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2385 /* 6973 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2386 /* 6977 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2387 /* 6981 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2388 /* 6985 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2389 /* 6989 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2390 /* 6993 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2391 /* 6997 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16s8,
2392 /* 7001 */ // MIs[3] c
2393 /* 7001 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2394 /* 7006 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2395 /* 7010 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2396 /* 7016 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2397 /* 7018 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2398 /* 7023 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2399 /* 7025 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c), (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2400 /* 7025 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2401 /* 7028 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2402 /* 7030 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2403 /* 7034 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2404 /* 7038 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2405 /* 7042 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2406 /* 7045 */ GIR_RootConstrainSelectedInstOperands,
2407 /* 7046 */ // GIR_Coverage, 1321,
2408 /* 7046 */ GIR_EraseRootFromParent_Done,
2409 /* 7047 */ // Label 220: @7047
2410 /* 7047 */ GIM_Try, /*On fail goto*//*Label 221*/ GIMT_Encode4(7152), // Rule ID 1320 //
2411 /* 7052 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2412 /* 7056 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2413 /* 7060 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2414 /* 7064 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2415 /* 7068 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2416 /* 7073 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2417 /* 7078 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2418 /* 7082 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2419 /* 7086 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2420 /* 7090 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2421 /* 7094 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2422 /* 7099 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2423 /* 7103 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2424 /* 7107 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16s8,
2425 /* 7111 */ // MIs[3] c
2426 /* 7111 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2427 /* 7116 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2428 /* 7120 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2429 /* 7126 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2430 /* 7128 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2431 /* 7130 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2432 /* 7130 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2433 /* 7133 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2434 /* 7135 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2435 /* 7139 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2436 /* 7143 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2437 /* 7147 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2438 /* 7150 */ GIR_RootConstrainSelectedInstOperands,
2439 /* 7151 */ // GIR_Coverage, 1320,
2440 /* 7151 */ GIR_EraseRootFromParent_Done,
2441 /* 7152 */ // Label 221: @7152
2442 /* 7152 */ GIM_Try, /*On fail goto*//*Label 222*/ GIMT_Encode4(7257), // Rule ID 1322 //
2443 /* 7157 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2444 /* 7161 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2445 /* 7165 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2446 /* 7169 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2447 /* 7173 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2448 /* 7178 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2449 /* 7183 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2450 /* 7187 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2451 /* 7191 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2452 /* 7195 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2453 /* 7199 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2454 /* 7204 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2455 /* 7208 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2456 /* 7212 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16s8,
2457 /* 7216 */ // MIs[3] c
2458 /* 7216 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2459 /* 7221 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2460 /* 7225 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2461 /* 7231 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2462 /* 7233 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2463 /* 7235 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2464 /* 7235 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2465 /* 7238 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2466 /* 7240 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2467 /* 7244 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2468 /* 7248 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2469 /* 7252 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2470 /* 7255 */ GIR_RootConstrainSelectedInstOperands,
2471 /* 7256 */ // GIR_Coverage, 1322,
2472 /* 7256 */ GIR_EraseRootFromParent_Done,
2473 /* 7257 */ // Label 222: @7257
2474 /* 7257 */ GIM_Try, /*On fail goto*//*Label 223*/ GIMT_Encode4(7283), // Rule ID 1056 //
2475 /* 7262 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2476 /* 7266 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2477 /* 7270 */ // (or:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (OR:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
2478 /* 7270 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
2479 /* 7275 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2480 /* 7281 */ GIR_RootConstrainSelectedInstOperands,
2481 /* 7282 */ // GIR_Coverage, 1056,
2482 /* 7282 */ GIR_Done,
2483 /* 7283 */ // Label 223: @7283
2484 /* 7283 */ GIM_Reject,
2485 /* 7284 */ // Label 214: @7284
2486 /* 7284 */ GIM_Reject,
2487 /* 7285 */ // Label 181: @7285
2488 /* 7285 */ GIM_Reject,
2489 /* 7286 */ // Label 9: @7286
2490 /* 7286 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 230*/ GIMT_Encode4(13943),
2491 /* 7297 */ /*GILLT_s32*//*Label 224*/ GIMT_Encode4(7321),
2492 /* 7301 */ /*GILLT_s64*//*Label 225*/ GIMT_Encode4(7358),
2493 /* 7305 */ /*GILLT_v2s64*//*Label 226*/ GIMT_Encode4(7395),
2494 /* 7309 */ /*GILLT_v4s32*//*Label 227*/ GIMT_Encode4(9032),
2495 /* 7313 */ /*GILLT_v8s16*//*Label 228*/ GIMT_Encode4(10669),
2496 /* 7317 */ /*GILLT_v16s8*//*Label 229*/ GIMT_Encode4(12306),
2497 /* 7321 */ // Label 224: @7321
2498 /* 7321 */ GIM_Try, /*On fail goto*//*Label 231*/ GIMT_Encode4(7357), // Rule ID 82 //
2499 /* 7326 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
2500 /* 7329 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
2501 /* 7332 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
2502 /* 7336 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
2503 /* 7340 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
2504 /* 7344 */ // (xor:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (XOR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
2505 /* 7344 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR_I32),
2506 /* 7349 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2507 /* 7355 */ GIR_RootConstrainSelectedInstOperands,
2508 /* 7356 */ // GIR_Coverage, 82,
2509 /* 7356 */ GIR_Done,
2510 /* 7357 */ // Label 231: @7357
2511 /* 7357 */ GIM_Reject,
2512 /* 7358 */ // Label 225: @7358
2513 /* 7358 */ GIM_Try, /*On fail goto*//*Label 232*/ GIMT_Encode4(7394), // Rule ID 83 //
2514 /* 7363 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
2515 /* 7366 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
2516 /* 7369 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
2517 /* 7373 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
2518 /* 7377 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
2519 /* 7381 */ // (xor:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (XOR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
2520 /* 7381 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR_I64),
2521 /* 7386 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2522 /* 7392 */ GIR_RootConstrainSelectedInstOperands,
2523 /* 7393 */ // GIR_Coverage, 83,
2524 /* 7393 */ GIR_Done,
2525 /* 7394 */ // Label 232: @7394
2526 /* 7394 */ GIM_Reject,
2527 /* 7395 */ // Label 226: @7395
2528 /* 7395 */ GIM_Try, /*On fail goto*//*Label 233*/ GIMT_Encode4(9031),
2529 /* 7400 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
2530 /* 7403 */ GIM_Try, /*On fail goto*//*Label 234*/ GIMT_Encode4(7516), // Rule ID 1398 //
2531 /* 7408 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2532 /* 7412 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2533 /* 7416 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2534 /* 7420 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2535 /* 7424 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2536 /* 7428 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2537 /* 7432 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2538 /* 7436 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2539 /* 7440 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2540 /* 7444 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2541 /* 7449 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2542 /* 7453 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2543 /* 7459 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2544 /* 7461 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2545 /* 7465 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2546 /* 7469 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2s64,
2547 /* 7473 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2s64,
2548 /* 7477 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2549 /* 7482 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2550 /* 7487 */ // MIs[0] v2
2551 /* 7487 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
2552 /* 7492 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2553 /* 7494 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
2554 /* 7494 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2555 /* 7497 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2556 /* 7499 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
2557 /* 7503 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2558 /* 7507 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2559 /* 7511 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2560 /* 7514 */ GIR_RootConstrainSelectedInstOperands,
2561 /* 7515 */ // GIR_Coverage, 1398,
2562 /* 7515 */ GIR_EraseRootFromParent_Done,
2563 /* 7516 */ // Label 234: @7516
2564 /* 7516 */ GIM_Try, /*On fail goto*//*Label 235*/ GIMT_Encode4(7629), // Rule ID 1399 //
2565 /* 7521 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2566 /* 7525 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2567 /* 7529 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2568 /* 7533 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2569 /* 7537 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2570 /* 7541 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2571 /* 7545 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2572 /* 7549 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2573 /* 7553 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2574 /* 7557 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2575 /* 7562 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2576 /* 7566 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2577 /* 7572 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2578 /* 7574 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2579 /* 7578 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2580 /* 7582 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2s64,
2581 /* 7586 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2s64,
2582 /* 7590 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2583 /* 7595 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2584 /* 7600 */ // MIs[0] v2
2585 /* 7600 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
2586 /* 7605 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2587 /* 7607 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
2588 /* 7607 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2589 /* 7610 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2590 /* 7612 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
2591 /* 7616 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2592 /* 7620 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2593 /* 7624 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2594 /* 7627 */ GIR_RootConstrainSelectedInstOperands,
2595 /* 7628 */ // GIR_Coverage, 1399,
2596 /* 7628 */ GIR_EraseRootFromParent_Done,
2597 /* 7629 */ // Label 235: @7629
2598 /* 7629 */ GIM_Try, /*On fail goto*//*Label 236*/ GIMT_Encode4(7742), // Rule ID 1085 //
2599 /* 7634 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2600 /* 7638 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2601 /* 7642 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2602 /* 7646 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2603 /* 7650 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2604 /* 7654 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2605 /* 7658 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2606 /* 7662 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2607 /* 7666 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2608 /* 7670 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2609 /* 7675 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2610 /* 7680 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2611 /* 7684 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2612 /* 7688 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
2613 /* 7692 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2s64,
2614 /* 7696 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2615 /* 7701 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2616 /* 7705 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2617 /* 7711 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2618 /* 7713 */ // MIs[0] v2
2619 /* 7713 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
2620 /* 7718 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2621 /* 7720 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
2622 /* 7720 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2623 /* 7723 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2624 /* 7725 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2625 /* 7729 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2626 /* 7733 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2627 /* 7737 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2628 /* 7740 */ GIR_RootConstrainSelectedInstOperands,
2629 /* 7741 */ // GIR_Coverage, 1085,
2630 /* 7741 */ GIR_EraseRootFromParent_Done,
2631 /* 7742 */ // Label 236: @7742
2632 /* 7742 */ GIM_Try, /*On fail goto*//*Label 237*/ GIMT_Encode4(7855), // Rule ID 1397 //
2633 /* 7747 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2634 /* 7751 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2635 /* 7755 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2636 /* 7759 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2637 /* 7763 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2638 /* 7767 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2639 /* 7771 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2640 /* 7775 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2641 /* 7779 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2642 /* 7783 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2643 /* 7788 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2644 /* 7793 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2645 /* 7797 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2646 /* 7801 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
2647 /* 7805 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2s64,
2648 /* 7809 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2649 /* 7814 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2650 /* 7818 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2651 /* 7824 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2652 /* 7826 */ // MIs[0] v2
2653 /* 7826 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2654 /* 7831 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2655 /* 7833 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
2656 /* 7833 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2657 /* 7836 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2658 /* 7838 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2659 /* 7842 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2660 /* 7846 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2661 /* 7850 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2662 /* 7853 */ GIR_RootConstrainSelectedInstOperands,
2663 /* 7854 */ // GIR_Coverage, 1397,
2664 /* 7854 */ GIR_EraseRootFromParent_Done,
2665 /* 7855 */ // Label 237: @7855
2666 /* 7855 */ GIM_Try, /*On fail goto*//*Label 238*/ GIMT_Encode4(7964), // Rule ID 1402 //
2667 /* 7860 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
2668 /* 7863 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2669 /* 7867 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2670 /* 7871 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2671 /* 7875 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2672 /* 7879 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2673 /* 7883 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2674 /* 7887 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2675 /* 7891 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2676 /* 7895 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2677 /* 7899 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2678 /* 7903 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2679 /* 7908 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2680 /* 7912 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2681 /* 7918 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2682 /* 7920 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2683 /* 7924 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2684 /* 7928 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2s64,
2685 /* 7932 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2686 /* 7937 */ // MIs[4] v2
2687 /* 7937 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
2688 /* 7942 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2689 /* 7944 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
2690 /* 7944 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2691 /* 7947 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2692 /* 7949 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2693 /* 7951 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2694 /* 7955 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2695 /* 7959 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2696 /* 7962 */ GIR_RootConstrainSelectedInstOperands,
2697 /* 7963 */ // GIR_Coverage, 1402,
2698 /* 7963 */ GIR_EraseRootFromParent_Done,
2699 /* 7964 */ // Label 238: @7964
2700 /* 7964 */ GIM_Try, /*On fail goto*//*Label 239*/ GIMT_Encode4(8073), // Rule ID 1403 //
2701 /* 7969 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
2702 /* 7972 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2703 /* 7976 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2704 /* 7980 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2705 /* 7984 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2706 /* 7988 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2707 /* 7992 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2708 /* 7996 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2709 /* 8000 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2710 /* 8004 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2711 /* 8008 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2712 /* 8012 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2713 /* 8017 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2714 /* 8021 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2715 /* 8027 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2716 /* 8029 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2717 /* 8033 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2718 /* 8037 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2s64,
2719 /* 8041 */ // MIs[4] v2
2720 /* 8041 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
2721 /* 8046 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2722 /* 8051 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2723 /* 8053 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
2724 /* 8053 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2725 /* 8056 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2726 /* 8058 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2727 /* 8060 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2728 /* 8064 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2729 /* 8068 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2730 /* 8071 */ GIR_RootConstrainSelectedInstOperands,
2731 /* 8072 */ // GIR_Coverage, 1403,
2732 /* 8072 */ GIR_EraseRootFromParent_Done,
2733 /* 8073 */ // Label 239: @8073
2734 /* 8073 */ GIM_Try, /*On fail goto*//*Label 240*/ GIMT_Encode4(8182), // Rule ID 1400 //
2735 /* 8078 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
2736 /* 8081 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2737 /* 8085 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2738 /* 8089 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2739 /* 8093 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2740 /* 8097 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2741 /* 8101 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2742 /* 8105 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2743 /* 8109 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2744 /* 8113 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2745 /* 8117 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2746 /* 8122 */ // MIs[2] v2
2747 /* 8122 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
2748 /* 8127 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2749 /* 8131 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2750 /* 8135 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
2751 /* 8139 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2s64,
2752 /* 8143 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2753 /* 8148 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2754 /* 8152 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2755 /* 8158 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2756 /* 8160 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2757 /* 8162 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
2758 /* 8162 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2759 /* 8165 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2760 /* 8167 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2761 /* 8169 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2762 /* 8173 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2763 /* 8177 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2764 /* 8180 */ GIR_RootConstrainSelectedInstOperands,
2765 /* 8181 */ // GIR_Coverage, 1400,
2766 /* 8181 */ GIR_EraseRootFromParent_Done,
2767 /* 8182 */ // Label 240: @8182
2768 /* 8182 */ GIM_Try, /*On fail goto*//*Label 241*/ GIMT_Encode4(8291), // Rule ID 1401 //
2769 /* 8187 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
2770 /* 8190 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2771 /* 8194 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2772 /* 8198 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2773 /* 8202 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2774 /* 8206 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2775 /* 8210 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2776 /* 8214 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2777 /* 8218 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2778 /* 8222 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2779 /* 8226 */ // MIs[2] v2
2780 /* 8226 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
2781 /* 8231 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2782 /* 8236 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2783 /* 8240 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2784 /* 8244 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
2785 /* 8248 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2s64,
2786 /* 8252 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2787 /* 8257 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2788 /* 8261 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2789 /* 8267 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2790 /* 8269 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2791 /* 8271 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
2792 /* 8271 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2793 /* 8274 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2794 /* 8276 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2795 /* 8278 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2796 /* 8282 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2797 /* 8286 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2798 /* 8289 */ GIR_RootConstrainSelectedInstOperands,
2799 /* 8290 */ // GIR_Coverage, 1401,
2800 /* 8290 */ GIR_EraseRootFromParent_Done,
2801 /* 8291 */ // Label 241: @8291
2802 /* 8291 */ GIM_Try, /*On fail goto*//*Label 242*/ GIMT_Encode4(8376), // Rule ID 1081 //
2803 /* 8296 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2804 /* 8300 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2805 /* 8304 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2806 /* 8308 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2807 /* 8312 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2808 /* 8316 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2809 /* 8320 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2810 /* 8324 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2811 /* 8328 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2812 /* 8332 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2813 /* 8337 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2814 /* 8342 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2815 /* 8347 */ // MIs[0] v2
2816 /* 8347 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
2817 /* 8352 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2818 /* 8354 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), V128:{ *:[v2i64] }:$c), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2819 /* 8354 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2820 /* 8357 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2821 /* 8359 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2822 /* 8363 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2823 /* 8367 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2824 /* 8371 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2825 /* 8374 */ GIR_RootConstrainSelectedInstOperands,
2826 /* 8375 */ // GIR_Coverage, 1081,
2827 /* 8375 */ GIR_EraseRootFromParent_Done,
2828 /* 8376 */ // Label 242: @8376
2829 /* 8376 */ GIM_Try, /*On fail goto*//*Label 243*/ GIMT_Encode4(8461), // Rule ID 1369 //
2830 /* 8381 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2831 /* 8385 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2832 /* 8389 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2833 /* 8393 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2834 /* 8397 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2835 /* 8401 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2836 /* 8405 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2837 /* 8409 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2838 /* 8413 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2839 /* 8417 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2840 /* 8422 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2841 /* 8427 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2842 /* 8432 */ // MIs[0] v2
2843 /* 8432 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2844 /* 8437 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2845 /* 8439 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), V128:{ *:[v2i64] }:$c), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2846 /* 8439 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2847 /* 8442 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2848 /* 8444 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2849 /* 8448 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2850 /* 8452 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2851 /* 8456 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2852 /* 8459 */ GIR_RootConstrainSelectedInstOperands,
2853 /* 8460 */ // GIR_Coverage, 1369,
2854 /* 8460 */ GIR_EraseRootFromParent_Done,
2855 /* 8461 */ // Label 243: @8461
2856 /* 8461 */ GIM_Try, /*On fail goto*//*Label 244*/ GIMT_Encode4(8546), // Rule ID 1370 //
2857 /* 8466 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2858 /* 8470 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2859 /* 8474 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2860 /* 8478 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2861 /* 8482 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2862 /* 8486 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2863 /* 8491 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2864 /* 8495 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2865 /* 8499 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2866 /* 8503 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2867 /* 8507 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2868 /* 8512 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2869 /* 8517 */ // MIs[0] v2
2870 /* 8517 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
2871 /* 8522 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2872 /* 8524 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2873 /* 8524 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2874 /* 8527 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2875 /* 8529 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2876 /* 8533 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2877 /* 8537 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2878 /* 8541 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2879 /* 8544 */ GIR_RootConstrainSelectedInstOperands,
2880 /* 8545 */ // GIR_Coverage, 1370,
2881 /* 8545 */ GIR_EraseRootFromParent_Done,
2882 /* 8546 */ // Label 244: @8546
2883 /* 8546 */ GIM_Try, /*On fail goto*//*Label 245*/ GIMT_Encode4(8631), // Rule ID 1371 //
2884 /* 8551 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2885 /* 8555 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2886 /* 8559 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2887 /* 8563 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2888 /* 8567 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2889 /* 8571 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2890 /* 8576 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2891 /* 8580 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2892 /* 8584 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2893 /* 8588 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2894 /* 8592 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2895 /* 8597 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2896 /* 8602 */ // MIs[0] v2
2897 /* 8602 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2898 /* 8607 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2899 /* 8609 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2900 /* 8609 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2901 /* 8612 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2902 /* 8614 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2903 /* 8618 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2904 /* 8622 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2905 /* 8626 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2906 /* 8629 */ GIR_RootConstrainSelectedInstOperands,
2907 /* 8630 */ // GIR_Coverage, 1371,
2908 /* 8630 */ GIR_EraseRootFromParent_Done,
2909 /* 8631 */ // Label 245: @8631
2910 /* 8631 */ GIM_Try, /*On fail goto*//*Label 246*/ GIMT_Encode4(8712), // Rule ID 1372 //
2911 /* 8636 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
2912 /* 8639 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2913 /* 8643 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2914 /* 8647 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2915 /* 8651 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2916 /* 8655 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2917 /* 8659 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2918 /* 8663 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2919 /* 8667 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2920 /* 8671 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2921 /* 8675 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2922 /* 8680 */ // MIs[2] v2
2923 /* 8680 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
2924 /* 8685 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2925 /* 8690 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2926 /* 8692 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2927 /* 8692 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2928 /* 8695 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2929 /* 8697 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2930 /* 8701 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2931 /* 8703 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2932 /* 8707 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2933 /* 8710 */ GIR_RootConstrainSelectedInstOperands,
2934 /* 8711 */ // GIR_Coverage, 1372,
2935 /* 8711 */ GIR_EraseRootFromParent_Done,
2936 /* 8712 */ // Label 246: @8712
2937 /* 8712 */ GIM_Try, /*On fail goto*//*Label 247*/ GIMT_Encode4(8793), // Rule ID 1373 //
2938 /* 8717 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
2939 /* 8720 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2940 /* 8724 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2941 /* 8728 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2942 /* 8732 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2943 /* 8736 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2944 /* 8740 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2945 /* 8744 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2946 /* 8748 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2947 /* 8752 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2948 /* 8756 */ // MIs[2] v2
2949 /* 8756 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
2950 /* 8761 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2951 /* 8766 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2952 /* 8771 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2953 /* 8773 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2954 /* 8773 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2955 /* 8776 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2956 /* 8778 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2957 /* 8782 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2958 /* 8784 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2959 /* 8788 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2960 /* 8791 */ GIR_RootConstrainSelectedInstOperands,
2961 /* 8792 */ // GIR_Coverage, 1373,
2962 /* 8792 */ GIR_EraseRootFromParent_Done,
2963 /* 8793 */ // Label 247: @8793
2964 /* 8793 */ GIM_Try, /*On fail goto*//*Label 248*/ GIMT_Encode4(8874), // Rule ID 1374 //
2965 /* 8798 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
2966 /* 8801 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2967 /* 8805 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2968 /* 8809 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2969 /* 8813 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2970 /* 8817 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2971 /* 8821 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2972 /* 8825 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2973 /* 8830 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2974 /* 8834 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2975 /* 8838 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2976 /* 8842 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2977 /* 8847 */ // MIs[2] v2
2978 /* 8847 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
2979 /* 8852 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2980 /* 8854 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2981 /* 8854 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2982 /* 8857 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2983 /* 8859 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2984 /* 8863 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2985 /* 8865 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2986 /* 8869 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2987 /* 8872 */ GIR_RootConstrainSelectedInstOperands,
2988 /* 8873 */ // GIR_Coverage, 1374,
2989 /* 8873 */ GIR_EraseRootFromParent_Done,
2990 /* 8874 */ // Label 248: @8874
2991 /* 8874 */ GIM_Try, /*On fail goto*//*Label 249*/ GIMT_Encode4(8955), // Rule ID 1375 //
2992 /* 8879 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
2993 /* 8882 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2994 /* 8886 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2995 /* 8890 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2996 /* 8894 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2997 /* 8898 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2998 /* 8902 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2999 /* 8906 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3000 /* 8911 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3001 /* 8915 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3002 /* 8919 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
3003 /* 8923 */ // MIs[2] v2
3004 /* 8923 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3005 /* 8928 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3006 /* 8933 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3007 /* 8935 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
3008 /* 8935 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3009 /* 8938 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3010 /* 8940 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3011 /* 8944 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3012 /* 8946 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3013 /* 8950 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3014 /* 8953 */ GIR_RootConstrainSelectedInstOperands,
3015 /* 8954 */ // GIR_Coverage, 1375,
3016 /* 8954 */ GIR_EraseRootFromParent_Done,
3017 /* 8955 */ // Label 249: @8955
3018 /* 8955 */ GIM_Try, /*On fail goto*//*Label 250*/ GIMT_Encode4(8997), // Rule ID 1052 //
3019 /* 8960 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
3020 /* 8963 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3021 /* 8967 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3022 /* 8971 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3023 /* 8975 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3024 /* 8981 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
3025 /* 8983 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
3026 /* 8985 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v, immAllOnesV:{ *:[v2i64] }) => (NOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v)
3027 /* 8985 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
3028 /* 8988 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3029 /* 8990 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
3030 /* 8992 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3031 /* 8995 */ GIR_RootConstrainSelectedInstOperands,
3032 /* 8996 */ // GIR_Coverage, 1052,
3033 /* 8996 */ GIR_EraseRootFromParent_Done,
3034 /* 8997 */ // Label 250: @8997
3035 /* 8997 */ GIM_Try, /*On fail goto*//*Label 251*/ GIMT_Encode4(9030), // Rule ID 1063 //
3036 /* 9002 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
3037 /* 9005 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3038 /* 9009 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3039 /* 9013 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3040 /* 9017 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (XOR:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
3041 /* 9017 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
3042 /* 9022 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
3043 /* 9028 */ GIR_RootConstrainSelectedInstOperands,
3044 /* 9029 */ // GIR_Coverage, 1063,
3045 /* 9029 */ GIR_Done,
3046 /* 9030 */ // Label 251: @9030
3047 /* 9030 */ GIM_Reject,
3048 /* 9031 */ // Label 233: @9031
3049 /* 9031 */ GIM_Reject,
3050 /* 9032 */ // Label 227: @9032
3051 /* 9032 */ GIM_Try, /*On fail goto*//*Label 252*/ GIMT_Encode4(10668),
3052 /* 9037 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
3053 /* 9040 */ GIM_Try, /*On fail goto*//*Label 253*/ GIMT_Encode4(9153), // Rule ID 1391 //
3054 /* 9045 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3055 /* 9049 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3056 /* 9053 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3057 /* 9057 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3058 /* 9061 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3059 /* 9065 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3060 /* 9069 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3061 /* 9073 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3062 /* 9077 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3063 /* 9081 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3064 /* 9086 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3065 /* 9090 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3066 /* 9096 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3067 /* 9098 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3068 /* 9102 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3069 /* 9106 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4s32,
3070 /* 9110 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4s32,
3071 /* 9114 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3072 /* 9119 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3073 /* 9124 */ // MIs[0] v2
3074 /* 9124 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
3075 /* 9129 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3076 /* 9131 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3077 /* 9131 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3078 /* 9134 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3079 /* 9136 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
3080 /* 9140 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3081 /* 9144 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3082 /* 9148 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3083 /* 9151 */ GIR_RootConstrainSelectedInstOperands,
3084 /* 9152 */ // GIR_Coverage, 1391,
3085 /* 9152 */ GIR_EraseRootFromParent_Done,
3086 /* 9153 */ // Label 253: @9153
3087 /* 9153 */ GIM_Try, /*On fail goto*//*Label 254*/ GIMT_Encode4(9266), // Rule ID 1392 //
3088 /* 9158 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3089 /* 9162 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3090 /* 9166 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3091 /* 9170 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3092 /* 9174 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3093 /* 9178 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3094 /* 9182 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3095 /* 9186 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3096 /* 9190 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3097 /* 9194 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3098 /* 9199 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3099 /* 9203 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3100 /* 9209 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3101 /* 9211 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3102 /* 9215 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3103 /* 9219 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4s32,
3104 /* 9223 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4s32,
3105 /* 9227 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3106 /* 9232 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3107 /* 9237 */ // MIs[0] v2
3108 /* 9237 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
3109 /* 9242 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3110 /* 9244 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3111 /* 9244 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3112 /* 9247 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3113 /* 9249 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
3114 /* 9253 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3115 /* 9257 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3116 /* 9261 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3117 /* 9264 */ GIR_RootConstrainSelectedInstOperands,
3118 /* 9265 */ // GIR_Coverage, 1392,
3119 /* 9265 */ GIR_EraseRootFromParent_Done,
3120 /* 9266 */ // Label 254: @9266
3121 /* 9266 */ GIM_Try, /*On fail goto*//*Label 255*/ GIMT_Encode4(9379), // Rule ID 1084 //
3122 /* 9271 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3123 /* 9275 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3124 /* 9279 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3125 /* 9283 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3126 /* 9287 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3127 /* 9291 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3128 /* 9295 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3129 /* 9299 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3130 /* 9303 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3131 /* 9307 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3132 /* 9312 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3133 /* 9317 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3134 /* 9321 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3135 /* 9325 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
3136 /* 9329 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4s32,
3137 /* 9333 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3138 /* 9338 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3139 /* 9342 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3140 /* 9348 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3141 /* 9350 */ // MIs[0] v2
3142 /* 9350 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3143 /* 9355 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3144 /* 9357 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3145 /* 9357 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3146 /* 9360 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3147 /* 9362 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3148 /* 9366 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3149 /* 9370 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3150 /* 9374 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3151 /* 9377 */ GIR_RootConstrainSelectedInstOperands,
3152 /* 9378 */ // GIR_Coverage, 1084,
3153 /* 9378 */ GIR_EraseRootFromParent_Done,
3154 /* 9379 */ // Label 255: @9379
3155 /* 9379 */ GIM_Try, /*On fail goto*//*Label 256*/ GIMT_Encode4(9492), // Rule ID 1390 //
3156 /* 9384 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3157 /* 9388 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3158 /* 9392 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3159 /* 9396 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3160 /* 9400 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3161 /* 9404 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3162 /* 9408 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3163 /* 9412 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3164 /* 9416 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3165 /* 9420 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3166 /* 9425 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3167 /* 9430 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3168 /* 9434 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3169 /* 9438 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
3170 /* 9442 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4s32,
3171 /* 9446 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3172 /* 9451 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3173 /* 9455 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3174 /* 9461 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3175 /* 9463 */ // MIs[0] v2
3176 /* 9463 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3177 /* 9468 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3178 /* 9470 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3179 /* 9470 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3180 /* 9473 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3181 /* 9475 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3182 /* 9479 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3183 /* 9483 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3184 /* 9487 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3185 /* 9490 */ GIR_RootConstrainSelectedInstOperands,
3186 /* 9491 */ // GIR_Coverage, 1390,
3187 /* 9491 */ GIR_EraseRootFromParent_Done,
3188 /* 9492 */ // Label 256: @9492
3189 /* 9492 */ GIM_Try, /*On fail goto*//*Label 257*/ GIMT_Encode4(9601), // Rule ID 1395 //
3190 /* 9497 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
3191 /* 9500 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3192 /* 9504 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3193 /* 9508 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3194 /* 9512 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3195 /* 9516 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3196 /* 9520 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3197 /* 9524 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3198 /* 9528 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3199 /* 9532 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3200 /* 9536 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3201 /* 9540 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3202 /* 9545 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3203 /* 9549 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3204 /* 9555 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3205 /* 9557 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3206 /* 9561 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3207 /* 9565 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4s32,
3208 /* 9569 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3209 /* 9574 */ // MIs[4] v2
3210 /* 9574 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3211 /* 9579 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3212 /* 9581 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3213 /* 9581 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3214 /* 9584 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3215 /* 9586 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3216 /* 9588 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3217 /* 9592 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3218 /* 9596 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3219 /* 9599 */ GIR_RootConstrainSelectedInstOperands,
3220 /* 9600 */ // GIR_Coverage, 1395,
3221 /* 9600 */ GIR_EraseRootFromParent_Done,
3222 /* 9601 */ // Label 257: @9601
3223 /* 9601 */ GIM_Try, /*On fail goto*//*Label 258*/ GIMT_Encode4(9710), // Rule ID 1396 //
3224 /* 9606 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
3225 /* 9609 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3226 /* 9613 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3227 /* 9617 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3228 /* 9621 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3229 /* 9625 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3230 /* 9629 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3231 /* 9633 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3232 /* 9637 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3233 /* 9641 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3234 /* 9645 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3235 /* 9649 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3236 /* 9654 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3237 /* 9658 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3238 /* 9664 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3239 /* 9666 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3240 /* 9670 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3241 /* 9674 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4s32,
3242 /* 9678 */ // MIs[4] v2
3243 /* 9678 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3244 /* 9683 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3245 /* 9688 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3246 /* 9690 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3247 /* 9690 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3248 /* 9693 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3249 /* 9695 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3250 /* 9697 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3251 /* 9701 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3252 /* 9705 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3253 /* 9708 */ GIR_RootConstrainSelectedInstOperands,
3254 /* 9709 */ // GIR_Coverage, 1396,
3255 /* 9709 */ GIR_EraseRootFromParent_Done,
3256 /* 9710 */ // Label 258: @9710
3257 /* 9710 */ GIM_Try, /*On fail goto*//*Label 259*/ GIMT_Encode4(9819), // Rule ID 1393 //
3258 /* 9715 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
3259 /* 9718 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3260 /* 9722 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3261 /* 9726 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3262 /* 9730 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3263 /* 9734 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3264 /* 9738 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3265 /* 9742 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3266 /* 9746 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3267 /* 9750 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3268 /* 9754 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3269 /* 9759 */ // MIs[2] v2
3270 /* 9759 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3271 /* 9764 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3272 /* 9768 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3273 /* 9772 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
3274 /* 9776 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4s32,
3275 /* 9780 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3276 /* 9785 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3277 /* 9789 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3278 /* 9795 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3279 /* 9797 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3280 /* 9799 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3281 /* 9799 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3282 /* 9802 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3283 /* 9804 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3284 /* 9806 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3285 /* 9810 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3286 /* 9814 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3287 /* 9817 */ GIR_RootConstrainSelectedInstOperands,
3288 /* 9818 */ // GIR_Coverage, 1393,
3289 /* 9818 */ GIR_EraseRootFromParent_Done,
3290 /* 9819 */ // Label 259: @9819
3291 /* 9819 */ GIM_Try, /*On fail goto*//*Label 260*/ GIMT_Encode4(9928), // Rule ID 1394 //
3292 /* 9824 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
3293 /* 9827 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3294 /* 9831 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3295 /* 9835 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3296 /* 9839 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3297 /* 9843 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3298 /* 9847 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3299 /* 9851 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3300 /* 9855 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3301 /* 9859 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3302 /* 9863 */ // MIs[2] v2
3303 /* 9863 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3304 /* 9868 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3305 /* 9873 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3306 /* 9877 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3307 /* 9881 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
3308 /* 9885 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4s32,
3309 /* 9889 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3310 /* 9894 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3311 /* 9898 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3312 /* 9904 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3313 /* 9906 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3314 /* 9908 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3315 /* 9908 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3316 /* 9911 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3317 /* 9913 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3318 /* 9915 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3319 /* 9919 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3320 /* 9923 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3321 /* 9926 */ GIR_RootConstrainSelectedInstOperands,
3322 /* 9927 */ // GIR_Coverage, 1394,
3323 /* 9927 */ GIR_EraseRootFromParent_Done,
3324 /* 9928 */ // Label 260: @9928
3325 /* 9928 */ GIM_Try, /*On fail goto*//*Label 261*/ GIMT_Encode4(10013), // Rule ID 1080 //
3326 /* 9933 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3327 /* 9937 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3328 /* 9941 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3329 /* 9945 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3330 /* 9949 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3331 /* 9953 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3332 /* 9957 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3333 /* 9961 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3334 /* 9965 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3335 /* 9969 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3336 /* 9974 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3337 /* 9979 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3338 /* 9984 */ // MIs[0] v2
3339 /* 9984 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3340 /* 9989 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3341 /* 9991 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), V128:{ *:[v4i32] }:$c), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3342 /* 9991 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3343 /* 9994 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3344 /* 9996 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3345 /* 10000 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3346 /* 10004 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3347 /* 10008 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3348 /* 10011 */ GIR_RootConstrainSelectedInstOperands,
3349 /* 10012 */ // GIR_Coverage, 1080,
3350 /* 10012 */ GIR_EraseRootFromParent_Done,
3351 /* 10013 */ // Label 261: @10013
3352 /* 10013 */ GIM_Try, /*On fail goto*//*Label 262*/ GIMT_Encode4(10098), // Rule ID 1362 //
3353 /* 10018 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3354 /* 10022 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3355 /* 10026 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3356 /* 10030 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3357 /* 10034 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3358 /* 10038 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3359 /* 10042 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3360 /* 10046 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3361 /* 10050 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3362 /* 10054 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3363 /* 10059 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3364 /* 10064 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3365 /* 10069 */ // MIs[0] v2
3366 /* 10069 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3367 /* 10074 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3368 /* 10076 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), V128:{ *:[v4i32] }:$c), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3369 /* 10076 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3370 /* 10079 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3371 /* 10081 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3372 /* 10085 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3373 /* 10089 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3374 /* 10093 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3375 /* 10096 */ GIR_RootConstrainSelectedInstOperands,
3376 /* 10097 */ // GIR_Coverage, 1362,
3377 /* 10097 */ GIR_EraseRootFromParent_Done,
3378 /* 10098 */ // Label 262: @10098
3379 /* 10098 */ GIM_Try, /*On fail goto*//*Label 263*/ GIMT_Encode4(10183), // Rule ID 1363 //
3380 /* 10103 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3381 /* 10107 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3382 /* 10111 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3383 /* 10115 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3384 /* 10119 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3385 /* 10123 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3386 /* 10128 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3387 /* 10132 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3388 /* 10136 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3389 /* 10140 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3390 /* 10144 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3391 /* 10149 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3392 /* 10154 */ // MIs[0] v2
3393 /* 10154 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3394 /* 10159 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3395 /* 10161 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3396 /* 10161 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3397 /* 10164 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3398 /* 10166 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3399 /* 10170 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3400 /* 10174 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3401 /* 10178 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3402 /* 10181 */ GIR_RootConstrainSelectedInstOperands,
3403 /* 10182 */ // GIR_Coverage, 1363,
3404 /* 10182 */ GIR_EraseRootFromParent_Done,
3405 /* 10183 */ // Label 263: @10183
3406 /* 10183 */ GIM_Try, /*On fail goto*//*Label 264*/ GIMT_Encode4(10268), // Rule ID 1364 //
3407 /* 10188 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3408 /* 10192 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3409 /* 10196 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3410 /* 10200 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3411 /* 10204 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3412 /* 10208 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3413 /* 10213 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3414 /* 10217 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3415 /* 10221 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3416 /* 10225 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3417 /* 10229 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3418 /* 10234 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3419 /* 10239 */ // MIs[0] v2
3420 /* 10239 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3421 /* 10244 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3422 /* 10246 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3423 /* 10246 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3424 /* 10249 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3425 /* 10251 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3426 /* 10255 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3427 /* 10259 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3428 /* 10263 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3429 /* 10266 */ GIR_RootConstrainSelectedInstOperands,
3430 /* 10267 */ // GIR_Coverage, 1364,
3431 /* 10267 */ GIR_EraseRootFromParent_Done,
3432 /* 10268 */ // Label 264: @10268
3433 /* 10268 */ GIM_Try, /*On fail goto*//*Label 265*/ GIMT_Encode4(10349), // Rule ID 1365 //
3434 /* 10273 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
3435 /* 10276 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3436 /* 10280 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3437 /* 10284 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3438 /* 10288 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3439 /* 10292 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3440 /* 10296 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3441 /* 10300 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3442 /* 10304 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3443 /* 10308 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3444 /* 10312 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3445 /* 10317 */ // MIs[2] v2
3446 /* 10317 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3447 /* 10322 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3448 /* 10327 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3449 /* 10329 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3450 /* 10329 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3451 /* 10332 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3452 /* 10334 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3453 /* 10338 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3454 /* 10340 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3455 /* 10344 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3456 /* 10347 */ GIR_RootConstrainSelectedInstOperands,
3457 /* 10348 */ // GIR_Coverage, 1365,
3458 /* 10348 */ GIR_EraseRootFromParent_Done,
3459 /* 10349 */ // Label 265: @10349
3460 /* 10349 */ GIM_Try, /*On fail goto*//*Label 266*/ GIMT_Encode4(10430), // Rule ID 1366 //
3461 /* 10354 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
3462 /* 10357 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3463 /* 10361 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3464 /* 10365 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3465 /* 10369 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3466 /* 10373 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3467 /* 10377 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3468 /* 10381 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3469 /* 10385 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3470 /* 10389 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3471 /* 10393 */ // MIs[2] v2
3472 /* 10393 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3473 /* 10398 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3474 /* 10403 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3475 /* 10408 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3476 /* 10410 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3477 /* 10410 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3478 /* 10413 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3479 /* 10415 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3480 /* 10419 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3481 /* 10421 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3482 /* 10425 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3483 /* 10428 */ GIR_RootConstrainSelectedInstOperands,
3484 /* 10429 */ // GIR_Coverage, 1366,
3485 /* 10429 */ GIR_EraseRootFromParent_Done,
3486 /* 10430 */ // Label 266: @10430
3487 /* 10430 */ GIM_Try, /*On fail goto*//*Label 267*/ GIMT_Encode4(10511), // Rule ID 1367 //
3488 /* 10435 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
3489 /* 10438 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3490 /* 10442 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3491 /* 10446 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3492 /* 10450 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3493 /* 10454 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3494 /* 10458 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3495 /* 10462 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3496 /* 10467 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3497 /* 10471 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3498 /* 10475 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3499 /* 10479 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3500 /* 10484 */ // MIs[2] v2
3501 /* 10484 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3502 /* 10489 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3503 /* 10491 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3504 /* 10491 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3505 /* 10494 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3506 /* 10496 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3507 /* 10500 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3508 /* 10502 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3509 /* 10506 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3510 /* 10509 */ GIR_RootConstrainSelectedInstOperands,
3511 /* 10510 */ // GIR_Coverage, 1367,
3512 /* 10510 */ GIR_EraseRootFromParent_Done,
3513 /* 10511 */ // Label 267: @10511
3514 /* 10511 */ GIM_Try, /*On fail goto*//*Label 268*/ GIMT_Encode4(10592), // Rule ID 1368 //
3515 /* 10516 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
3516 /* 10519 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3517 /* 10523 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3518 /* 10527 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3519 /* 10531 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3520 /* 10535 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3521 /* 10539 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3522 /* 10543 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3523 /* 10548 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3524 /* 10552 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3525 /* 10556 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3526 /* 10560 */ // MIs[2] v2
3527 /* 10560 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3528 /* 10565 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3529 /* 10570 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3530 /* 10572 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3531 /* 10572 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3532 /* 10575 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3533 /* 10577 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3534 /* 10581 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3535 /* 10583 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3536 /* 10587 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3537 /* 10590 */ GIR_RootConstrainSelectedInstOperands,
3538 /* 10591 */ // GIR_Coverage, 1368,
3539 /* 10591 */ GIR_EraseRootFromParent_Done,
3540 /* 10592 */ // Label 268: @10592
3541 /* 10592 */ GIM_Try, /*On fail goto*//*Label 269*/ GIMT_Encode4(10634), // Rule ID 1051 //
3542 /* 10597 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
3543 /* 10600 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3544 /* 10604 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3545 /* 10608 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3546 /* 10612 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3547 /* 10618 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
3548 /* 10620 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
3549 /* 10622 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v, immAllOnesV:{ *:[v4i32] }) => (NOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v)
3550 /* 10622 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
3551 /* 10625 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3552 /* 10627 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
3553 /* 10629 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3554 /* 10632 */ GIR_RootConstrainSelectedInstOperands,
3555 /* 10633 */ // GIR_Coverage, 1051,
3556 /* 10633 */ GIR_EraseRootFromParent_Done,
3557 /* 10634 */ // Label 269: @10634
3558 /* 10634 */ GIM_Try, /*On fail goto*//*Label 270*/ GIMT_Encode4(10667), // Rule ID 1062 //
3559 /* 10639 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
3560 /* 10642 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3561 /* 10646 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3562 /* 10650 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3563 /* 10654 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (XOR:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
3564 /* 10654 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
3565 /* 10659 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
3566 /* 10665 */ GIR_RootConstrainSelectedInstOperands,
3567 /* 10666 */ // GIR_Coverage, 1062,
3568 /* 10666 */ GIR_Done,
3569 /* 10667 */ // Label 270: @10667
3570 /* 10667 */ GIM_Reject,
3571 /* 10668 */ // Label 252: @10668
3572 /* 10668 */ GIM_Reject,
3573 /* 10669 */ // Label 228: @10669
3574 /* 10669 */ GIM_Try, /*On fail goto*//*Label 271*/ GIMT_Encode4(12305),
3575 /* 10674 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
3576 /* 10677 */ GIM_Try, /*On fail goto*//*Label 272*/ GIMT_Encode4(10790), // Rule ID 1384 //
3577 /* 10682 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3578 /* 10686 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3579 /* 10690 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3580 /* 10694 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3581 /* 10698 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3582 /* 10702 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3583 /* 10706 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3584 /* 10710 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3585 /* 10714 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3586 /* 10718 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3587 /* 10723 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3588 /* 10727 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3589 /* 10733 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3590 /* 10735 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3591 /* 10739 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3592 /* 10743 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8s16,
3593 /* 10747 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8s16,
3594 /* 10751 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3595 /* 10756 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3596 /* 10761 */ // MIs[0] v2
3597 /* 10761 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
3598 /* 10766 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3599 /* 10768 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3600 /* 10768 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3601 /* 10771 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3602 /* 10773 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
3603 /* 10777 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3604 /* 10781 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3605 /* 10785 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3606 /* 10788 */ GIR_RootConstrainSelectedInstOperands,
3607 /* 10789 */ // GIR_Coverage, 1384,
3608 /* 10789 */ GIR_EraseRootFromParent_Done,
3609 /* 10790 */ // Label 272: @10790
3610 /* 10790 */ GIM_Try, /*On fail goto*//*Label 273*/ GIMT_Encode4(10903), // Rule ID 1385 //
3611 /* 10795 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3612 /* 10799 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3613 /* 10803 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3614 /* 10807 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3615 /* 10811 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3616 /* 10815 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3617 /* 10819 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3618 /* 10823 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3619 /* 10827 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3620 /* 10831 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3621 /* 10836 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3622 /* 10840 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3623 /* 10846 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3624 /* 10848 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3625 /* 10852 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3626 /* 10856 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8s16,
3627 /* 10860 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8s16,
3628 /* 10864 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3629 /* 10869 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3630 /* 10874 */ // MIs[0] v2
3631 /* 10874 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
3632 /* 10879 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3633 /* 10881 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3634 /* 10881 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3635 /* 10884 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3636 /* 10886 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
3637 /* 10890 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3638 /* 10894 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3639 /* 10898 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3640 /* 10901 */ GIR_RootConstrainSelectedInstOperands,
3641 /* 10902 */ // GIR_Coverage, 1385,
3642 /* 10902 */ GIR_EraseRootFromParent_Done,
3643 /* 10903 */ // Label 273: @10903
3644 /* 10903 */ GIM_Try, /*On fail goto*//*Label 274*/ GIMT_Encode4(11016), // Rule ID 1083 //
3645 /* 10908 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3646 /* 10912 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3647 /* 10916 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3648 /* 10920 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3649 /* 10924 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3650 /* 10928 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3651 /* 10932 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3652 /* 10936 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3653 /* 10940 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3654 /* 10944 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3655 /* 10949 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3656 /* 10954 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3657 /* 10958 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3658 /* 10962 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
3659 /* 10966 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8s16,
3660 /* 10970 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3661 /* 10975 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3662 /* 10979 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3663 /* 10985 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3664 /* 10987 */ // MIs[0] v2
3665 /* 10987 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3666 /* 10992 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3667 /* 10994 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3668 /* 10994 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3669 /* 10997 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3670 /* 10999 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3671 /* 11003 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3672 /* 11007 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3673 /* 11011 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3674 /* 11014 */ GIR_RootConstrainSelectedInstOperands,
3675 /* 11015 */ // GIR_Coverage, 1083,
3676 /* 11015 */ GIR_EraseRootFromParent_Done,
3677 /* 11016 */ // Label 274: @11016
3678 /* 11016 */ GIM_Try, /*On fail goto*//*Label 275*/ GIMT_Encode4(11129), // Rule ID 1383 //
3679 /* 11021 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3680 /* 11025 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3681 /* 11029 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3682 /* 11033 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3683 /* 11037 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3684 /* 11041 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3685 /* 11045 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3686 /* 11049 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3687 /* 11053 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3688 /* 11057 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3689 /* 11062 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3690 /* 11067 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3691 /* 11071 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3692 /* 11075 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
3693 /* 11079 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8s16,
3694 /* 11083 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3695 /* 11088 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3696 /* 11092 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3697 /* 11098 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3698 /* 11100 */ // MIs[0] v2
3699 /* 11100 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3700 /* 11105 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3701 /* 11107 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3702 /* 11107 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3703 /* 11110 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3704 /* 11112 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3705 /* 11116 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3706 /* 11120 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3707 /* 11124 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3708 /* 11127 */ GIR_RootConstrainSelectedInstOperands,
3709 /* 11128 */ // GIR_Coverage, 1383,
3710 /* 11128 */ GIR_EraseRootFromParent_Done,
3711 /* 11129 */ // Label 275: @11129
3712 /* 11129 */ GIM_Try, /*On fail goto*//*Label 276*/ GIMT_Encode4(11238), // Rule ID 1388 //
3713 /* 11134 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
3714 /* 11137 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3715 /* 11141 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3716 /* 11145 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3717 /* 11149 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3718 /* 11153 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3719 /* 11157 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3720 /* 11161 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3721 /* 11165 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3722 /* 11169 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3723 /* 11173 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3724 /* 11177 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3725 /* 11182 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3726 /* 11186 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3727 /* 11192 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3728 /* 11194 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3729 /* 11198 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3730 /* 11202 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8s16,
3731 /* 11206 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3732 /* 11211 */ // MIs[4] v2
3733 /* 11211 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3734 /* 11216 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3735 /* 11218 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3736 /* 11218 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3737 /* 11221 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3738 /* 11223 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3739 /* 11225 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3740 /* 11229 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3741 /* 11233 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3742 /* 11236 */ GIR_RootConstrainSelectedInstOperands,
3743 /* 11237 */ // GIR_Coverage, 1388,
3744 /* 11237 */ GIR_EraseRootFromParent_Done,
3745 /* 11238 */ // Label 276: @11238
3746 /* 11238 */ GIM_Try, /*On fail goto*//*Label 277*/ GIMT_Encode4(11347), // Rule ID 1389 //
3747 /* 11243 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
3748 /* 11246 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3749 /* 11250 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3750 /* 11254 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3751 /* 11258 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3752 /* 11262 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3753 /* 11266 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3754 /* 11270 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3755 /* 11274 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3756 /* 11278 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3757 /* 11282 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3758 /* 11286 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3759 /* 11291 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3760 /* 11295 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3761 /* 11301 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3762 /* 11303 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3763 /* 11307 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3764 /* 11311 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8s16,
3765 /* 11315 */ // MIs[4] v2
3766 /* 11315 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3767 /* 11320 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3768 /* 11325 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3769 /* 11327 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3770 /* 11327 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3771 /* 11330 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3772 /* 11332 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3773 /* 11334 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3774 /* 11338 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3775 /* 11342 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3776 /* 11345 */ GIR_RootConstrainSelectedInstOperands,
3777 /* 11346 */ // GIR_Coverage, 1389,
3778 /* 11346 */ GIR_EraseRootFromParent_Done,
3779 /* 11347 */ // Label 277: @11347
3780 /* 11347 */ GIM_Try, /*On fail goto*//*Label 278*/ GIMT_Encode4(11456), // Rule ID 1386 //
3781 /* 11352 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
3782 /* 11355 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3783 /* 11359 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3784 /* 11363 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3785 /* 11367 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3786 /* 11371 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3787 /* 11375 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3788 /* 11379 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3789 /* 11383 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3790 /* 11387 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3791 /* 11391 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3792 /* 11396 */ // MIs[2] v2
3793 /* 11396 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3794 /* 11401 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3795 /* 11405 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3796 /* 11409 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
3797 /* 11413 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8s16,
3798 /* 11417 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3799 /* 11422 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3800 /* 11426 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3801 /* 11432 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3802 /* 11434 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3803 /* 11436 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3804 /* 11436 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3805 /* 11439 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3806 /* 11441 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3807 /* 11443 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3808 /* 11447 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3809 /* 11451 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3810 /* 11454 */ GIR_RootConstrainSelectedInstOperands,
3811 /* 11455 */ // GIR_Coverage, 1386,
3812 /* 11455 */ GIR_EraseRootFromParent_Done,
3813 /* 11456 */ // Label 278: @11456
3814 /* 11456 */ GIM_Try, /*On fail goto*//*Label 279*/ GIMT_Encode4(11565), // Rule ID 1387 //
3815 /* 11461 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
3816 /* 11464 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3817 /* 11468 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3818 /* 11472 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3819 /* 11476 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3820 /* 11480 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3821 /* 11484 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3822 /* 11488 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3823 /* 11492 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3824 /* 11496 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3825 /* 11500 */ // MIs[2] v2
3826 /* 11500 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3827 /* 11505 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3828 /* 11510 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3829 /* 11514 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3830 /* 11518 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
3831 /* 11522 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8s16,
3832 /* 11526 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3833 /* 11531 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3834 /* 11535 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3835 /* 11541 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3836 /* 11543 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3837 /* 11545 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3838 /* 11545 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3839 /* 11548 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3840 /* 11550 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3841 /* 11552 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3842 /* 11556 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3843 /* 11560 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3844 /* 11563 */ GIR_RootConstrainSelectedInstOperands,
3845 /* 11564 */ // GIR_Coverage, 1387,
3846 /* 11564 */ GIR_EraseRootFromParent_Done,
3847 /* 11565 */ // Label 279: @11565
3848 /* 11565 */ GIM_Try, /*On fail goto*//*Label 280*/ GIMT_Encode4(11650), // Rule ID 1079 //
3849 /* 11570 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3850 /* 11574 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3851 /* 11578 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3852 /* 11582 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3853 /* 11586 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3854 /* 11590 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3855 /* 11594 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3856 /* 11598 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3857 /* 11602 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3858 /* 11606 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3859 /* 11611 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3860 /* 11616 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3861 /* 11621 */ // MIs[0] v2
3862 /* 11621 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3863 /* 11626 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3864 /* 11628 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), V128:{ *:[v8i16] }:$c), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3865 /* 11628 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3866 /* 11631 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3867 /* 11633 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3868 /* 11637 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3869 /* 11641 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3870 /* 11645 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3871 /* 11648 */ GIR_RootConstrainSelectedInstOperands,
3872 /* 11649 */ // GIR_Coverage, 1079,
3873 /* 11649 */ GIR_EraseRootFromParent_Done,
3874 /* 11650 */ // Label 280: @11650
3875 /* 11650 */ GIM_Try, /*On fail goto*//*Label 281*/ GIMT_Encode4(11735), // Rule ID 1355 //
3876 /* 11655 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3877 /* 11659 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3878 /* 11663 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3879 /* 11667 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3880 /* 11671 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3881 /* 11675 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3882 /* 11679 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3883 /* 11683 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3884 /* 11687 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3885 /* 11691 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3886 /* 11696 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3887 /* 11701 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3888 /* 11706 */ // MIs[0] v2
3889 /* 11706 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3890 /* 11711 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3891 /* 11713 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), V128:{ *:[v8i16] }:$c), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3892 /* 11713 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3893 /* 11716 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3894 /* 11718 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3895 /* 11722 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3896 /* 11726 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3897 /* 11730 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3898 /* 11733 */ GIR_RootConstrainSelectedInstOperands,
3899 /* 11734 */ // GIR_Coverage, 1355,
3900 /* 11734 */ GIR_EraseRootFromParent_Done,
3901 /* 11735 */ // Label 281: @11735
3902 /* 11735 */ GIM_Try, /*On fail goto*//*Label 282*/ GIMT_Encode4(11820), // Rule ID 1356 //
3903 /* 11740 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3904 /* 11744 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3905 /* 11748 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3906 /* 11752 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3907 /* 11756 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3908 /* 11760 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3909 /* 11765 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3910 /* 11769 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3911 /* 11773 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3912 /* 11777 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3913 /* 11781 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3914 /* 11786 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3915 /* 11791 */ // MIs[0] v2
3916 /* 11791 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3917 /* 11796 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3918 /* 11798 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3919 /* 11798 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3920 /* 11801 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3921 /* 11803 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3922 /* 11807 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3923 /* 11811 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3924 /* 11815 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3925 /* 11818 */ GIR_RootConstrainSelectedInstOperands,
3926 /* 11819 */ // GIR_Coverage, 1356,
3927 /* 11819 */ GIR_EraseRootFromParent_Done,
3928 /* 11820 */ // Label 282: @11820
3929 /* 11820 */ GIM_Try, /*On fail goto*//*Label 283*/ GIMT_Encode4(11905), // Rule ID 1357 //
3930 /* 11825 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3931 /* 11829 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3932 /* 11833 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3933 /* 11837 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3934 /* 11841 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3935 /* 11845 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3936 /* 11850 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3937 /* 11854 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3938 /* 11858 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3939 /* 11862 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3940 /* 11866 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3941 /* 11871 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3942 /* 11876 */ // MIs[0] v2
3943 /* 11876 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3944 /* 11881 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3945 /* 11883 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3946 /* 11883 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3947 /* 11886 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3948 /* 11888 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3949 /* 11892 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3950 /* 11896 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3951 /* 11900 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3952 /* 11903 */ GIR_RootConstrainSelectedInstOperands,
3953 /* 11904 */ // GIR_Coverage, 1357,
3954 /* 11904 */ GIR_EraseRootFromParent_Done,
3955 /* 11905 */ // Label 283: @11905
3956 /* 11905 */ GIM_Try, /*On fail goto*//*Label 284*/ GIMT_Encode4(11986), // Rule ID 1358 //
3957 /* 11910 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
3958 /* 11913 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3959 /* 11917 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3960 /* 11921 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3961 /* 11925 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3962 /* 11929 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3963 /* 11933 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3964 /* 11937 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3965 /* 11941 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3966 /* 11945 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3967 /* 11949 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3968 /* 11954 */ // MIs[2] v2
3969 /* 11954 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3970 /* 11959 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3971 /* 11964 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3972 /* 11966 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3973 /* 11966 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3974 /* 11969 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3975 /* 11971 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3976 /* 11975 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3977 /* 11977 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3978 /* 11981 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3979 /* 11984 */ GIR_RootConstrainSelectedInstOperands,
3980 /* 11985 */ // GIR_Coverage, 1358,
3981 /* 11985 */ GIR_EraseRootFromParent_Done,
3982 /* 11986 */ // Label 284: @11986
3983 /* 11986 */ GIM_Try, /*On fail goto*//*Label 285*/ GIMT_Encode4(12067), // Rule ID 1359 //
3984 /* 11991 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
3985 /* 11994 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3986 /* 11998 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3987 /* 12002 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3988 /* 12006 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3989 /* 12010 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3990 /* 12014 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3991 /* 12018 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3992 /* 12022 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3993 /* 12026 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3994 /* 12030 */ // MIs[2] v2
3995 /* 12030 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3996 /* 12035 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3997 /* 12040 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3998 /* 12045 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3999 /* 12047 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
4000 /* 12047 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4001 /* 12050 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4002 /* 12052 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4003 /* 12056 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4004 /* 12058 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4005 /* 12062 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4006 /* 12065 */ GIR_RootConstrainSelectedInstOperands,
4007 /* 12066 */ // GIR_Coverage, 1359,
4008 /* 12066 */ GIR_EraseRootFromParent_Done,
4009 /* 12067 */ // Label 285: @12067
4010 /* 12067 */ GIM_Try, /*On fail goto*//*Label 286*/ GIMT_Encode4(12148), // Rule ID 1360 //
4011 /* 12072 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
4012 /* 12075 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4013 /* 12079 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4014 /* 12083 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4015 /* 12087 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4016 /* 12091 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
4017 /* 12095 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
4018 /* 12099 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4019 /* 12104 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4020 /* 12108 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4021 /* 12112 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
4022 /* 12116 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4023 /* 12121 */ // MIs[2] v2
4024 /* 12121 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4025 /* 12126 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4026 /* 12128 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
4027 /* 12128 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4028 /* 12131 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4029 /* 12133 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4030 /* 12137 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4031 /* 12139 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4032 /* 12143 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4033 /* 12146 */ GIR_RootConstrainSelectedInstOperands,
4034 /* 12147 */ // GIR_Coverage, 1360,
4035 /* 12147 */ GIR_EraseRootFromParent_Done,
4036 /* 12148 */ // Label 286: @12148
4037 /* 12148 */ GIM_Try, /*On fail goto*//*Label 287*/ GIMT_Encode4(12229), // Rule ID 1361 //
4038 /* 12153 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
4039 /* 12156 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4040 /* 12160 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4041 /* 12164 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4042 /* 12168 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4043 /* 12172 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
4044 /* 12176 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
4045 /* 12180 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4046 /* 12185 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4047 /* 12189 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4048 /* 12193 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
4049 /* 12197 */ // MIs[2] v2
4050 /* 12197 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4051 /* 12202 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4052 /* 12207 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4053 /* 12209 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
4054 /* 12209 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4055 /* 12212 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4056 /* 12214 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4057 /* 12218 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4058 /* 12220 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4059 /* 12224 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4060 /* 12227 */ GIR_RootConstrainSelectedInstOperands,
4061 /* 12228 */ // GIR_Coverage, 1361,
4062 /* 12228 */ GIR_EraseRootFromParent_Done,
4063 /* 12229 */ // Label 287: @12229
4064 /* 12229 */ GIM_Try, /*On fail goto*//*Label 288*/ GIMT_Encode4(12271), // Rule ID 1050 //
4065 /* 12234 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
4066 /* 12237 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4067 /* 12241 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4068 /* 12245 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4069 /* 12249 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4070 /* 12255 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
4071 /* 12257 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
4072 /* 12259 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v, immAllOnesV:{ *:[v8i16] }) => (NOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v)
4073 /* 12259 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
4074 /* 12262 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4075 /* 12264 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
4076 /* 12266 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4077 /* 12269 */ GIR_RootConstrainSelectedInstOperands,
4078 /* 12270 */ // GIR_Coverage, 1050,
4079 /* 12270 */ GIR_EraseRootFromParent_Done,
4080 /* 12271 */ // Label 288: @12271
4081 /* 12271 */ GIM_Try, /*On fail goto*//*Label 289*/ GIMT_Encode4(12304), // Rule ID 1061 //
4082 /* 12276 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
4083 /* 12279 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4084 /* 12283 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4085 /* 12287 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4086 /* 12291 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (XOR:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
4087 /* 12291 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
4088 /* 12296 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4089 /* 12302 */ GIR_RootConstrainSelectedInstOperands,
4090 /* 12303 */ // GIR_Coverage, 1061,
4091 /* 12303 */ GIR_Done,
4092 /* 12304 */ // Label 289: @12304
4093 /* 12304 */ GIM_Reject,
4094 /* 12305 */ // Label 271: @12305
4095 /* 12305 */ GIM_Reject,
4096 /* 12306 */ // Label 229: @12306
4097 /* 12306 */ GIM_Try, /*On fail goto*//*Label 290*/ GIMT_Encode4(13942),
4098 /* 12311 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
4099 /* 12314 */ GIM_Try, /*On fail goto*//*Label 291*/ GIMT_Encode4(12427), // Rule ID 1377 //
4100 /* 12319 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4101 /* 12323 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4102 /* 12327 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4103 /* 12331 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
4104 /* 12335 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
4105 /* 12339 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4106 /* 12343 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4107 /* 12347 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
4108 /* 12351 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
4109 /* 12355 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4110 /* 12360 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4111 /* 12364 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4112 /* 12370 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4113 /* 12372 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4114 /* 12376 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4115 /* 12380 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16s8,
4116 /* 12384 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16s8,
4117 /* 12388 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4118 /* 12393 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4119 /* 12398 */ // MIs[0] v2
4120 /* 12398 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
4121 /* 12403 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4122 /* 12405 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
4123 /* 12405 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4124 /* 12408 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4125 /* 12410 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
4126 /* 12414 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
4127 /* 12418 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4128 /* 12422 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4129 /* 12425 */ GIR_RootConstrainSelectedInstOperands,
4130 /* 12426 */ // GIR_Coverage, 1377,
4131 /* 12426 */ GIR_EraseRootFromParent_Done,
4132 /* 12427 */ // Label 291: @12427
4133 /* 12427 */ GIM_Try, /*On fail goto*//*Label 292*/ GIMT_Encode4(12540), // Rule ID 1378 //
4134 /* 12432 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4135 /* 12436 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4136 /* 12440 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4137 /* 12444 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
4138 /* 12448 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
4139 /* 12452 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4140 /* 12456 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4141 /* 12460 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
4142 /* 12464 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
4143 /* 12468 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4144 /* 12473 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4145 /* 12477 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4146 /* 12483 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4147 /* 12485 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4148 /* 12489 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4149 /* 12493 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16s8,
4150 /* 12497 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16s8,
4151 /* 12501 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4152 /* 12506 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4153 /* 12511 */ // MIs[0] v2
4154 /* 12511 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
4155 /* 12516 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4156 /* 12518 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
4157 /* 12518 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4158 /* 12521 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4159 /* 12523 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
4160 /* 12527 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
4161 /* 12531 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4162 /* 12535 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4163 /* 12538 */ GIR_RootConstrainSelectedInstOperands,
4164 /* 12539 */ // GIR_Coverage, 1378,
4165 /* 12539 */ GIR_EraseRootFromParent_Done,
4166 /* 12540 */ // Label 292: @12540
4167 /* 12540 */ GIM_Try, /*On fail goto*//*Label 293*/ GIMT_Encode4(12653), // Rule ID 1082 //
4168 /* 12545 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4169 /* 12549 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4170 /* 12553 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4171 /* 12557 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
4172 /* 12561 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
4173 /* 12565 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4174 /* 12569 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4175 /* 12573 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
4176 /* 12577 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
4177 /* 12581 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4178 /* 12586 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4179 /* 12591 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4180 /* 12595 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4181 /* 12599 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16s8,
4182 /* 12603 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16s8,
4183 /* 12607 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4184 /* 12612 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4185 /* 12616 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4186 /* 12622 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4187 /* 12624 */ // MIs[0] v2
4188 /* 12624 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
4189 /* 12629 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4190 /* 12631 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
4191 /* 12631 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4192 /* 12634 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4193 /* 12636 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
4194 /* 12640 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4195 /* 12644 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4196 /* 12648 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4197 /* 12651 */ GIR_RootConstrainSelectedInstOperands,
4198 /* 12652 */ // GIR_Coverage, 1082,
4199 /* 12652 */ GIR_EraseRootFromParent_Done,
4200 /* 12653 */ // Label 293: @12653
4201 /* 12653 */ GIM_Try, /*On fail goto*//*Label 294*/ GIMT_Encode4(12766), // Rule ID 1376 //
4202 /* 12658 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4203 /* 12662 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4204 /* 12666 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4205 /* 12670 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
4206 /* 12674 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
4207 /* 12678 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4208 /* 12682 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4209 /* 12686 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
4210 /* 12690 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
4211 /* 12694 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4212 /* 12699 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4213 /* 12704 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4214 /* 12708 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4215 /* 12712 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16s8,
4216 /* 12716 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16s8,
4217 /* 12720 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4218 /* 12725 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4219 /* 12729 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4220 /* 12735 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4221 /* 12737 */ // MIs[0] v2
4222 /* 12737 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4223 /* 12742 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4224 /* 12744 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
4225 /* 12744 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4226 /* 12747 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4227 /* 12749 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4228 /* 12753 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4229 /* 12757 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4230 /* 12761 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4231 /* 12764 */ GIR_RootConstrainSelectedInstOperands,
4232 /* 12765 */ // GIR_Coverage, 1376,
4233 /* 12765 */ GIR_EraseRootFromParent_Done,
4234 /* 12766 */ // Label 294: @12766
4235 /* 12766 */ GIM_Try, /*On fail goto*//*Label 295*/ GIMT_Encode4(12875), // Rule ID 1381 //
4236 /* 12771 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
4237 /* 12774 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4238 /* 12778 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4239 /* 12782 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4240 /* 12786 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4241 /* 12790 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
4242 /* 12794 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
4243 /* 12798 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4244 /* 12802 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4245 /* 12806 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
4246 /* 12810 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
4247 /* 12814 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4248 /* 12819 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4249 /* 12823 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4250 /* 12829 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4251 /* 12831 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4252 /* 12835 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4253 /* 12839 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16s8,
4254 /* 12843 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4255 /* 12848 */ // MIs[4] v2
4256 /* 12848 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4257 /* 12853 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4258 /* 12855 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
4259 /* 12855 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4260 /* 12858 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4261 /* 12860 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4262 /* 12862 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
4263 /* 12866 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4264 /* 12870 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4265 /* 12873 */ GIR_RootConstrainSelectedInstOperands,
4266 /* 12874 */ // GIR_Coverage, 1381,
4267 /* 12874 */ GIR_EraseRootFromParent_Done,
4268 /* 12875 */ // Label 295: @12875
4269 /* 12875 */ GIM_Try, /*On fail goto*//*Label 296*/ GIMT_Encode4(12984), // Rule ID 1382 //
4270 /* 12880 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
4271 /* 12883 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4272 /* 12887 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4273 /* 12891 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4274 /* 12895 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4275 /* 12899 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
4276 /* 12903 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
4277 /* 12907 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4278 /* 12911 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4279 /* 12915 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
4280 /* 12919 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
4281 /* 12923 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4282 /* 12928 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4283 /* 12932 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4284 /* 12938 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4285 /* 12940 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4286 /* 12944 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4287 /* 12948 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16s8,
4288 /* 12952 */ // MIs[4] v2
4289 /* 12952 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4290 /* 12957 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4291 /* 12962 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4292 /* 12964 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
4293 /* 12964 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4294 /* 12967 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4295 /* 12969 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4296 /* 12971 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
4297 /* 12975 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4298 /* 12979 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4299 /* 12982 */ GIR_RootConstrainSelectedInstOperands,
4300 /* 12983 */ // GIR_Coverage, 1382,
4301 /* 12983 */ GIR_EraseRootFromParent_Done,
4302 /* 12984 */ // Label 296: @12984
4303 /* 12984 */ GIM_Try, /*On fail goto*//*Label 297*/ GIMT_Encode4(13093), // Rule ID 1379 //
4304 /* 12989 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
4305 /* 12992 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4306 /* 12996 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4307 /* 13000 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4308 /* 13004 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4309 /* 13008 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
4310 /* 13012 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
4311 /* 13016 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4312 /* 13020 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4313 /* 13024 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
4314 /* 13028 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4315 /* 13033 */ // MIs[2] v2
4316 /* 13033 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4317 /* 13038 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4318 /* 13042 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4319 /* 13046 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16s8,
4320 /* 13050 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16s8,
4321 /* 13054 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4322 /* 13059 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4323 /* 13063 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4324 /* 13069 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4325 /* 13071 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4326 /* 13073 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
4327 /* 13073 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4328 /* 13076 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4329 /* 13078 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4330 /* 13080 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4331 /* 13084 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4332 /* 13088 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4333 /* 13091 */ GIR_RootConstrainSelectedInstOperands,
4334 /* 13092 */ // GIR_Coverage, 1379,
4335 /* 13092 */ GIR_EraseRootFromParent_Done,
4336 /* 13093 */ // Label 297: @13093
4337 /* 13093 */ GIM_Try, /*On fail goto*//*Label 298*/ GIMT_Encode4(13202), // Rule ID 1380 //
4338 /* 13098 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
4339 /* 13101 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4340 /* 13105 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4341 /* 13109 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4342 /* 13113 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4343 /* 13117 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
4344 /* 13121 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
4345 /* 13125 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4346 /* 13129 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4347 /* 13133 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
4348 /* 13137 */ // MIs[2] v2
4349 /* 13137 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4350 /* 13142 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4351 /* 13147 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4352 /* 13151 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4353 /* 13155 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16s8,
4354 /* 13159 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16s8,
4355 /* 13163 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4356 /* 13168 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4357 /* 13172 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4358 /* 13178 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4359 /* 13180 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4360 /* 13182 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
4361 /* 13182 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4362 /* 13185 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4363 /* 13187 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4364 /* 13189 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4365 /* 13193 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4366 /* 13197 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4367 /* 13200 */ GIR_RootConstrainSelectedInstOperands,
4368 /* 13201 */ // GIR_Coverage, 1380,
4369 /* 13201 */ GIR_EraseRootFromParent_Done,
4370 /* 13202 */ // Label 298: @13202
4371 /* 13202 */ GIM_Try, /*On fail goto*//*Label 299*/ GIMT_Encode4(13287), // Rule ID 1078 //
4372 /* 13207 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4373 /* 13211 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4374 /* 13215 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4375 /* 13219 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
4376 /* 13223 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
4377 /* 13227 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4378 /* 13231 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4379 /* 13235 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
4380 /* 13239 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
4381 /* 13243 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4382 /* 13248 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4383 /* 13253 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4384 /* 13258 */ // MIs[0] v2
4385 /* 13258 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
4386 /* 13263 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4387 /* 13265 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), V128:{ *:[v16i8] }:$c), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
4388 /* 13265 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4389 /* 13268 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4390 /* 13270 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4391 /* 13274 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
4392 /* 13278 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4393 /* 13282 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4394 /* 13285 */ GIR_RootConstrainSelectedInstOperands,
4395 /* 13286 */ // GIR_Coverage, 1078,
4396 /* 13286 */ GIR_EraseRootFromParent_Done,
4397 /* 13287 */ // Label 299: @13287
4398 /* 13287 */ GIM_Try, /*On fail goto*//*Label 300*/ GIMT_Encode4(13372), // Rule ID 1348 //
4399 /* 13292 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4400 /* 13296 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4401 /* 13300 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4402 /* 13304 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
4403 /* 13308 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
4404 /* 13312 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4405 /* 13316 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4406 /* 13320 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
4407 /* 13324 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
4408 /* 13328 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4409 /* 13333 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4410 /* 13338 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4411 /* 13343 */ // MIs[0] v2
4412 /* 13343 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4413 /* 13348 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4414 /* 13350 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), V128:{ *:[v16i8] }:$c), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
4415 /* 13350 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4416 /* 13353 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4417 /* 13355 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4418 /* 13359 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4419 /* 13363 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4420 /* 13367 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4421 /* 13370 */ GIR_RootConstrainSelectedInstOperands,
4422 /* 13371 */ // GIR_Coverage, 1348,
4423 /* 13371 */ GIR_EraseRootFromParent_Done,
4424 /* 13372 */ // Label 300: @13372
4425 /* 13372 */ GIM_Try, /*On fail goto*//*Label 301*/ GIMT_Encode4(13457), // Rule ID 1349 //
4426 /* 13377 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4427 /* 13381 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4428 /* 13385 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4429 /* 13389 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
4430 /* 13393 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
4431 /* 13397 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4432 /* 13402 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4433 /* 13406 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4434 /* 13410 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
4435 /* 13414 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
4436 /* 13418 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4437 /* 13423 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4438 /* 13428 */ // MIs[0] v2
4439 /* 13428 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
4440 /* 13433 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4441 /* 13435 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
4442 /* 13435 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4443 /* 13438 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4444 /* 13440 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4445 /* 13444 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
4446 /* 13448 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4447 /* 13452 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4448 /* 13455 */ GIR_RootConstrainSelectedInstOperands,
4449 /* 13456 */ // GIR_Coverage, 1349,
4450 /* 13456 */ GIR_EraseRootFromParent_Done,
4451 /* 13457 */ // Label 301: @13457
4452 /* 13457 */ GIM_Try, /*On fail goto*//*Label 302*/ GIMT_Encode4(13542), // Rule ID 1350 //
4453 /* 13462 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4454 /* 13466 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4455 /* 13470 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4456 /* 13474 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
4457 /* 13478 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
4458 /* 13482 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4459 /* 13487 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4460 /* 13491 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4461 /* 13495 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
4462 /* 13499 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
4463 /* 13503 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4464 /* 13508 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4465 /* 13513 */ // MIs[0] v2
4466 /* 13513 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4467 /* 13518 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4468 /* 13520 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
4469 /* 13520 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4470 /* 13523 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4471 /* 13525 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4472 /* 13529 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4473 /* 13533 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4474 /* 13537 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4475 /* 13540 */ GIR_RootConstrainSelectedInstOperands,
4476 /* 13541 */ // GIR_Coverage, 1350,
4477 /* 13541 */ GIR_EraseRootFromParent_Done,
4478 /* 13542 */ // Label 302: @13542
4479 /* 13542 */ GIM_Try, /*On fail goto*//*Label 303*/ GIMT_Encode4(13623), // Rule ID 1351 //
4480 /* 13547 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
4481 /* 13550 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4482 /* 13554 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4483 /* 13558 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4484 /* 13562 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4485 /* 13566 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
4486 /* 13570 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
4487 /* 13574 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4488 /* 13578 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4489 /* 13582 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
4490 /* 13586 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4491 /* 13591 */ // MIs[2] v2
4492 /* 13591 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4493 /* 13596 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4494 /* 13601 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4495 /* 13603 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
4496 /* 13603 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4497 /* 13606 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4498 /* 13608 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4499 /* 13612 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4500 /* 13614 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4501 /* 13618 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4502 /* 13621 */ GIR_RootConstrainSelectedInstOperands,
4503 /* 13622 */ // GIR_Coverage, 1351,
4504 /* 13622 */ GIR_EraseRootFromParent_Done,
4505 /* 13623 */ // Label 303: @13623
4506 /* 13623 */ GIM_Try, /*On fail goto*//*Label 304*/ GIMT_Encode4(13704), // Rule ID 1352 //
4507 /* 13628 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
4508 /* 13631 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4509 /* 13635 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4510 /* 13639 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4511 /* 13643 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4512 /* 13647 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
4513 /* 13651 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
4514 /* 13655 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4515 /* 13659 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4516 /* 13663 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
4517 /* 13667 */ // MIs[2] v2
4518 /* 13667 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4519 /* 13672 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4520 /* 13677 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4521 /* 13682 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4522 /* 13684 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
4523 /* 13684 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4524 /* 13687 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4525 /* 13689 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4526 /* 13693 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4527 /* 13695 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4528 /* 13699 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4529 /* 13702 */ GIR_RootConstrainSelectedInstOperands,
4530 /* 13703 */ // GIR_Coverage, 1352,
4531 /* 13703 */ GIR_EraseRootFromParent_Done,
4532 /* 13704 */ // Label 304: @13704
4533 /* 13704 */ GIM_Try, /*On fail goto*//*Label 305*/ GIMT_Encode4(13785), // Rule ID 1353 //
4534 /* 13709 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
4535 /* 13712 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4536 /* 13716 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4537 /* 13720 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4538 /* 13724 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4539 /* 13728 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
4540 /* 13732 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
4541 /* 13736 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4542 /* 13741 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4543 /* 13745 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4544 /* 13749 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
4545 /* 13753 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4546 /* 13758 */ // MIs[2] v2
4547 /* 13758 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4548 /* 13763 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4549 /* 13765 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
4550 /* 13765 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4551 /* 13768 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4552 /* 13770 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4553 /* 13774 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4554 /* 13776 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4555 /* 13780 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4556 /* 13783 */ GIR_RootConstrainSelectedInstOperands,
4557 /* 13784 */ // GIR_Coverage, 1353,
4558 /* 13784 */ GIR_EraseRootFromParent_Done,
4559 /* 13785 */ // Label 305: @13785
4560 /* 13785 */ GIM_Try, /*On fail goto*//*Label 306*/ GIMT_Encode4(13866), // Rule ID 1354 //
4561 /* 13790 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
4562 /* 13793 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4563 /* 13797 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4564 /* 13801 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4565 /* 13805 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4566 /* 13809 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
4567 /* 13813 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
4568 /* 13817 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4569 /* 13822 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4570 /* 13826 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4571 /* 13830 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
4572 /* 13834 */ // MIs[2] v2
4573 /* 13834 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4574 /* 13839 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4575 /* 13844 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4576 /* 13846 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
4577 /* 13846 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4578 /* 13849 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4579 /* 13851 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4580 /* 13855 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4581 /* 13857 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4582 /* 13861 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4583 /* 13864 */ GIR_RootConstrainSelectedInstOperands,
4584 /* 13865 */ // GIR_Coverage, 1354,
4585 /* 13865 */ GIR_EraseRootFromParent_Done,
4586 /* 13866 */ // Label 306: @13866
4587 /* 13866 */ GIM_Try, /*On fail goto*//*Label 307*/ GIMT_Encode4(13908), // Rule ID 1049 //
4588 /* 13871 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
4589 /* 13874 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4590 /* 13878 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4591 /* 13882 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4592 /* 13886 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4593 /* 13892 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
4594 /* 13894 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
4595 /* 13896 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v, immAllOnesV:{ *:[v16i8] }) => (NOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v)
4596 /* 13896 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
4597 /* 13899 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4598 /* 13901 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
4599 /* 13903 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4600 /* 13906 */ GIR_RootConstrainSelectedInstOperands,
4601 /* 13907 */ // GIR_Coverage, 1049,
4602 /* 13907 */ GIR_EraseRootFromParent_Done,
4603 /* 13908 */ // Label 307: @13908
4604 /* 13908 */ GIM_Try, /*On fail goto*//*Label 308*/ GIMT_Encode4(13941), // Rule ID 1060 //
4605 /* 13913 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
4606 /* 13916 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4607 /* 13920 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4608 /* 13924 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4609 /* 13928 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (XOR:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
4610 /* 13928 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
4611 /* 13933 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4612 /* 13939 */ GIR_RootConstrainSelectedInstOperands,
4613 /* 13940 */ // GIR_Coverage, 1060,
4614 /* 13940 */ GIR_Done,
4615 /* 13941 */ // Label 308: @13941
4616 /* 13941 */ GIM_Reject,
4617 /* 13942 */ // Label 290: @13942
4618 /* 13942 */ GIM_Reject,
4619 /* 13943 */ // Label 230: @13943
4620 /* 13943 */ GIM_Reject,
4621 /* 13944 */ // Label 10: @13944
4622 /* 13944 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 311*/ GIMT_Encode4(14037),
4623 /* 13955 */ /*GILLT_v8s16*//*Label 309*/ GIMT_Encode4(13963),
4624 /* 13959 */ /*GILLT_v16s8*//*Label 310*/ GIMT_Encode4(14000),
4625 /* 13963 */ // Label 309: @13963
4626 /* 13963 */ GIM_Try, /*On fail goto*//*Label 312*/ GIMT_Encode4(13999), // Rule ID 1156 //
4627 /* 13968 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
4628 /* 13971 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
4629 /* 13974 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4630 /* 13978 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4631 /* 13982 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4632 /* 13986 */ // (avgceilu:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (AVGR_U_I16x8:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
4633 /* 13986 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I16x8),
4634 /* 13991 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4635 /* 13997 */ GIR_RootConstrainSelectedInstOperands,
4636 /* 13998 */ // GIR_Coverage, 1156,
4637 /* 13998 */ GIR_Done,
4638 /* 13999 */ // Label 312: @13999
4639 /* 13999 */ GIM_Reject,
4640 /* 14000 */ // Label 310: @14000
4641 /* 14000 */ GIM_Try, /*On fail goto*//*Label 313*/ GIMT_Encode4(14036), // Rule ID 1154 //
4642 /* 14005 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
4643 /* 14008 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
4644 /* 14011 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4645 /* 14015 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4646 /* 14019 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4647 /* 14023 */ // (avgceilu:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (AVGR_U_I8x16:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
4648 /* 14023 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I8x16),
4649 /* 14028 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4650 /* 14034 */ GIR_RootConstrainSelectedInstOperands,
4651 /* 14035 */ // GIR_Coverage, 1154,
4652 /* 14035 */ GIR_Done,
4653 /* 14036 */ // Label 313: @14036
4654 /* 14036 */ GIM_Reject,
4655 /* 14037 */ // Label 311: @14037
4656 /* 14037 */ GIM_Reject,
4657 /* 14038 */ // Label 11: @14038
4658 /* 14038 */ GIM_Try, /*On fail goto*//*Label 314*/ GIMT_Encode4(14144),
4659 /* 14043 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
4660 /* 14046 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
4661 /* 14049 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
4662 /* 14052 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
4663 /* 14055 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4664 /* 14059 */ GIM_Try, /*On fail goto*//*Label 315*/ GIMT_Encode4(14101), // Rule ID 178 //
4665 /* 14064 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
4666 /* 14067 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4667 /* 14071 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4668 /* 14075 */ // MIs[1] Operand 1
4669 /* 14075 */ // No operand predicates
4670 /* 14075 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4671 /* 14079 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4672 /* 14083 */ // MIs[2] Operand 1
4673 /* 14083 */ // No operand predicates
4674 /* 14083 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4675 /* 14085 */ // (build_vector:{ *:[v2f64] } (fpimm:{ *:[f64] }):$i0, (fpimm:{ *:[f64] }):$i1) => (CONST_V128_F64x2:{ *:[v2f64] } (fpimm:{ *:[f64] }):$i0, (fpimm:{ *:[f64] }):$i1)
4676 /* 14085 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F64x2),
4677 /* 14088 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4678 /* 14090 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4679 /* 14093 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4680 /* 14096 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4681 /* 14099 */ GIR_RootConstrainSelectedInstOperands,
4682 /* 14100 */ // GIR_Coverage, 178,
4683 /* 14100 */ GIR_EraseRootFromParent_Done,
4684 /* 14101 */ // Label 315: @14101
4685 /* 14101 */ GIM_Try, /*On fail goto*//*Label 316*/ GIMT_Encode4(14143), // Rule ID 176 //
4686 /* 14106 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
4687 /* 14109 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4688 /* 14113 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4689 /* 14117 */ // MIs[1] Operand 1
4690 /* 14117 */ // No operand predicates
4691 /* 14117 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4692 /* 14121 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4693 /* 14125 */ // MIs[2] Operand 1
4694 /* 14125 */ // No operand predicates
4695 /* 14125 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4696 /* 14127 */ // (build_vector:{ *:[v2i64] } (imm:{ *:[i64] }):$i0, (imm:{ *:[i64] }):$i1) => (CONST_V128_I64x2:{ *:[v2i64] } (imm:{ *:[i64] }):$i0, (imm:{ *:[i64] }):$i1)
4697 /* 14127 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I64x2),
4698 /* 14130 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4699 /* 14132 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4700 /* 14135 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4701 /* 14138 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4702 /* 14141 */ GIR_RootConstrainSelectedInstOperands,
4703 /* 14142 */ // GIR_Coverage, 176,
4704 /* 14142 */ GIR_EraseRootFromParent_Done,
4705 /* 14143 */ // Label 316: @14143
4706 /* 14143 */ GIM_Reject,
4707 /* 14144 */ // Label 314: @14144
4708 /* 14144 */ GIM_Try, /*On fail goto*//*Label 317*/ GIMT_Encode4(14300),
4709 /* 14149 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
4710 /* 14152 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
4711 /* 14155 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
4712 /* 14158 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
4713 /* 14161 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
4714 /* 14164 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
4715 /* 14167 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4716 /* 14171 */ GIM_Try, /*On fail goto*//*Label 318*/ GIMT_Encode4(14235), // Rule ID 177 //
4717 /* 14176 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
4718 /* 14179 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4719 /* 14183 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4720 /* 14187 */ // MIs[1] Operand 1
4721 /* 14187 */ // No operand predicates
4722 /* 14187 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4723 /* 14191 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4724 /* 14195 */ // MIs[2] Operand 1
4725 /* 14195 */ // No operand predicates
4726 /* 14195 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
4727 /* 14199 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4728 /* 14203 */ // MIs[3] Operand 1
4729 /* 14203 */ // No operand predicates
4730 /* 14203 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
4731 /* 14207 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4732 /* 14211 */ // MIs[4] Operand 1
4733 /* 14211 */ // No operand predicates
4734 /* 14211 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4735 /* 14213 */ // (build_vector:{ *:[v4f32] } (fpimm:{ *:[f32] }):$i0, (fpimm:{ *:[f32] }):$i1, (fpimm:{ *:[f32] }):$i2, (fpimm:{ *:[f32] }):$i3) => (CONST_V128_F32x4:{ *:[v4f32] } (fpimm:{ *:[f32] }):$i0, (fpimm:{ *:[f32] }):$i1, (fpimm:{ *:[f32] }):$i2, (fpimm:{ *:[f32] }):$i3)
4736 /* 14213 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F32x4),
4737 /* 14216 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4738 /* 14218 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4739 /* 14221 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4740 /* 14224 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
4741 /* 14227 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
4742 /* 14230 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4743 /* 14233 */ GIR_RootConstrainSelectedInstOperands,
4744 /* 14234 */ // GIR_Coverage, 177,
4745 /* 14234 */ GIR_EraseRootFromParent_Done,
4746 /* 14235 */ // Label 318: @14235
4747 /* 14235 */ GIM_Try, /*On fail goto*//*Label 319*/ GIMT_Encode4(14299), // Rule ID 175 //
4748 /* 14240 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
4749 /* 14243 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4750 /* 14247 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4751 /* 14251 */ // MIs[1] Operand 1
4752 /* 14251 */ // No operand predicates
4753 /* 14251 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4754 /* 14255 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4755 /* 14259 */ // MIs[2] Operand 1
4756 /* 14259 */ // No operand predicates
4757 /* 14259 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
4758 /* 14263 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4759 /* 14267 */ // MIs[3] Operand 1
4760 /* 14267 */ // No operand predicates
4761 /* 14267 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
4762 /* 14271 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4763 /* 14275 */ // MIs[4] Operand 1
4764 /* 14275 */ // No operand predicates
4765 /* 14275 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4766 /* 14277 */ // (build_vector:{ *:[v4i32] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3) => (CONST_V128_I32x4:{ *:[v4i32] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3)
4767 /* 14277 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I32x4),
4768 /* 14280 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4769 /* 14282 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4770 /* 14285 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4771 /* 14288 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
4772 /* 14291 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
4773 /* 14294 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4774 /* 14297 */ GIR_RootConstrainSelectedInstOperands,
4775 /* 14298 */ // GIR_Coverage, 175,
4776 /* 14298 */ GIR_EraseRootFromParent_Done,
4777 /* 14299 */ // Label 319: @14299
4778 /* 14299 */ GIM_Reject,
4779 /* 14300 */ // Label 317: @14300
4780 /* 14300 */ GIM_Try, /*On fail goto*//*Label 320*/ GIMT_Encode4(14474), // Rule ID 174 //
4781 /* 14305 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
4782 /* 14308 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/9,
4783 /* 14311 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
4784 /* 14314 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
4785 /* 14317 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
4786 /* 14320 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
4787 /* 14323 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
4788 /* 14326 */ GIM_RootCheckType, /*Op*/5, /*Type*/GILLT_s32,
4789 /* 14329 */ GIM_RootCheckType, /*Op*/6, /*Type*/GILLT_s32,
4790 /* 14332 */ GIM_RootCheckType, /*Op*/7, /*Type*/GILLT_s32,
4791 /* 14335 */ GIM_RootCheckType, /*Op*/8, /*Type*/GILLT_s32,
4792 /* 14338 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4793 /* 14342 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4794 /* 14346 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4795 /* 14350 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4796 /* 14354 */ // MIs[1] Operand 1
4797 /* 14354 */ // No operand predicates
4798 /* 14354 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4799 /* 14358 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4800 /* 14362 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4801 /* 14366 */ // MIs[2] Operand 1
4802 /* 14366 */ // No operand predicates
4803 /* 14366 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
4804 /* 14370 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4805 /* 14374 */ GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4806 /* 14378 */ // MIs[3] Operand 1
4807 /* 14378 */ // No operand predicates
4808 /* 14378 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
4809 /* 14382 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4810 /* 14386 */ GIM_CheckI64ImmPredicate, /*MI*/4, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4811 /* 14390 */ // MIs[4] Operand 1
4812 /* 14390 */ // No operand predicates
4813 /* 14390 */ GIM_RecordInsn, /*DefineMI*/5, /*MI*/0, /*OpIdx*/5, // MIs[5]
4814 /* 14394 */ GIM_CheckOpcode, /*MI*/5, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4815 /* 14398 */ GIM_CheckI64ImmPredicate, /*MI*/5, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4816 /* 14402 */ // MIs[5] Operand 1
4817 /* 14402 */ // No operand predicates
4818 /* 14402 */ GIM_RecordInsn, /*DefineMI*/6, /*MI*/0, /*OpIdx*/6, // MIs[6]
4819 /* 14406 */ GIM_CheckOpcode, /*MI*/6, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4820 /* 14410 */ GIM_CheckI64ImmPredicate, /*MI*/6, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4821 /* 14414 */ // MIs[6] Operand 1
4822 /* 14414 */ // No operand predicates
4823 /* 14414 */ GIM_RecordInsn, /*DefineMI*/7, /*MI*/0, /*OpIdx*/7, // MIs[7]
4824 /* 14418 */ GIM_CheckOpcode, /*MI*/7, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4825 /* 14422 */ GIM_CheckI64ImmPredicate, /*MI*/7, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4826 /* 14426 */ // MIs[7] Operand 1
4827 /* 14426 */ // No operand predicates
4828 /* 14426 */ GIM_RecordInsn, /*DefineMI*/8, /*MI*/0, /*OpIdx*/8, // MIs[8]
4829 /* 14430 */ GIM_CheckOpcode, /*MI*/8, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4830 /* 14434 */ GIM_CheckI64ImmPredicate, /*MI*/8, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4831 /* 14438 */ // MIs[8] Operand 1
4832 /* 14438 */ // No operand predicates
4833 /* 14438 */ GIM_CheckIsSafeToFold, /*NumInsns*/8,
4834 /* 14440 */ // (build_vector:{ *:[v8i16] } (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i0, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i1, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i2, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i3, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i4, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i5, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i6, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i7) => (CONST_V128_I16x8:{ *:[v8i16] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3, (imm:{ *:[i32] }):$i4, (imm:{ *:[i32] }):$i5, (imm:{ *:[i32] }):$i6, (imm:{ *:[i32] }):$i7)
4835 /* 14440 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I16x8),
4836 /* 14443 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4837 /* 14445 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4838 /* 14448 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4839 /* 14451 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
4840 /* 14454 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
4841 /* 14457 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/5, // i4
4842 /* 14460 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/6, // i5
4843 /* 14463 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/7, // i6
4844 /* 14466 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/8, // i7
4845 /* 14469 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4846 /* 14472 */ GIR_RootConstrainSelectedInstOperands,
4847 /* 14473 */ // GIR_Coverage, 174,
4848 /* 14473 */ GIR_EraseRootFromParent_Done,
4849 /* 14474 */ // Label 320: @14474
4850 /* 14474 */ GIM_Try, /*On fail goto*//*Label 321*/ GIMT_Encode4(14792), // Rule ID 173 //
4851 /* 14479 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
4852 /* 14482 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/17,
4853 /* 14485 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
4854 /* 14488 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
4855 /* 14491 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
4856 /* 14494 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
4857 /* 14497 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
4858 /* 14500 */ GIM_RootCheckType, /*Op*/5, /*Type*/GILLT_s32,
4859 /* 14503 */ GIM_RootCheckType, /*Op*/6, /*Type*/GILLT_s32,
4860 /* 14506 */ GIM_RootCheckType, /*Op*/7, /*Type*/GILLT_s32,
4861 /* 14509 */ GIM_RootCheckType, /*Op*/8, /*Type*/GILLT_s32,
4862 /* 14512 */ GIM_RootCheckType, /*Op*/9, /*Type*/GILLT_s32,
4863 /* 14515 */ GIM_RootCheckType, /*Op*/10, /*Type*/GILLT_s32,
4864 /* 14518 */ GIM_RootCheckType, /*Op*/11, /*Type*/GILLT_s32,
4865 /* 14521 */ GIM_RootCheckType, /*Op*/12, /*Type*/GILLT_s32,
4866 /* 14524 */ GIM_RootCheckType, /*Op*/13, /*Type*/GILLT_s32,
4867 /* 14527 */ GIM_RootCheckType, /*Op*/14, /*Type*/GILLT_s32,
4868 /* 14530 */ GIM_RootCheckType, /*Op*/15, /*Type*/GILLT_s32,
4869 /* 14533 */ GIM_RootCheckType, /*Op*/16, /*Type*/GILLT_s32,
4870 /* 14536 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4871 /* 14540 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4872 /* 14544 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4873 /* 14548 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4874 /* 14552 */ // MIs[1] Operand 1
4875 /* 14552 */ // No operand predicates
4876 /* 14552 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4877 /* 14556 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4878 /* 14560 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4879 /* 14564 */ // MIs[2] Operand 1
4880 /* 14564 */ // No operand predicates
4881 /* 14564 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
4882 /* 14568 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4883 /* 14572 */ GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4884 /* 14576 */ // MIs[3] Operand 1
4885 /* 14576 */ // No operand predicates
4886 /* 14576 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
4887 /* 14580 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4888 /* 14584 */ GIM_CheckI64ImmPredicate, /*MI*/4, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4889 /* 14588 */ // MIs[4] Operand 1
4890 /* 14588 */ // No operand predicates
4891 /* 14588 */ GIM_RecordInsn, /*DefineMI*/5, /*MI*/0, /*OpIdx*/5, // MIs[5]
4892 /* 14592 */ GIM_CheckOpcode, /*MI*/5, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4893 /* 14596 */ GIM_CheckI64ImmPredicate, /*MI*/5, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4894 /* 14600 */ // MIs[5] Operand 1
4895 /* 14600 */ // No operand predicates
4896 /* 14600 */ GIM_RecordInsn, /*DefineMI*/6, /*MI*/0, /*OpIdx*/6, // MIs[6]
4897 /* 14604 */ GIM_CheckOpcode, /*MI*/6, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4898 /* 14608 */ GIM_CheckI64ImmPredicate, /*MI*/6, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4899 /* 14612 */ // MIs[6] Operand 1
4900 /* 14612 */ // No operand predicates
4901 /* 14612 */ GIM_RecordInsn, /*DefineMI*/7, /*MI*/0, /*OpIdx*/7, // MIs[7]
4902 /* 14616 */ GIM_CheckOpcode, /*MI*/7, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4903 /* 14620 */ GIM_CheckI64ImmPredicate, /*MI*/7, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4904 /* 14624 */ // MIs[7] Operand 1
4905 /* 14624 */ // No operand predicates
4906 /* 14624 */ GIM_RecordInsn, /*DefineMI*/8, /*MI*/0, /*OpIdx*/8, // MIs[8]
4907 /* 14628 */ GIM_CheckOpcode, /*MI*/8, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4908 /* 14632 */ GIM_CheckI64ImmPredicate, /*MI*/8, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4909 /* 14636 */ // MIs[8] Operand 1
4910 /* 14636 */ // No operand predicates
4911 /* 14636 */ GIM_RecordInsn, /*DefineMI*/9, /*MI*/0, /*OpIdx*/9, // MIs[9]
4912 /* 14640 */ GIM_CheckOpcode, /*MI*/9, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4913 /* 14644 */ GIM_CheckI64ImmPredicate, /*MI*/9, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4914 /* 14648 */ // MIs[9] Operand 1
4915 /* 14648 */ // No operand predicates
4916 /* 14648 */ GIM_RecordInsn, /*DefineMI*/10, /*MI*/0, /*OpIdx*/10, // MIs[10]
4917 /* 14652 */ GIM_CheckOpcode, /*MI*/10, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4918 /* 14656 */ GIM_CheckI64ImmPredicate, /*MI*/10, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4919 /* 14660 */ // MIs[10] Operand 1
4920 /* 14660 */ // No operand predicates
4921 /* 14660 */ GIM_RecordInsn, /*DefineMI*/11, /*MI*/0, /*OpIdx*/11, // MIs[11]
4922 /* 14664 */ GIM_CheckOpcode, /*MI*/11, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4923 /* 14668 */ GIM_CheckI64ImmPredicate, /*MI*/11, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4924 /* 14672 */ // MIs[11] Operand 1
4925 /* 14672 */ // No operand predicates
4926 /* 14672 */ GIM_RecordInsn, /*DefineMI*/12, /*MI*/0, /*OpIdx*/12, // MIs[12]
4927 /* 14676 */ GIM_CheckOpcode, /*MI*/12, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4928 /* 14680 */ GIM_CheckI64ImmPredicate, /*MI*/12, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4929 /* 14684 */ // MIs[12] Operand 1
4930 /* 14684 */ // No operand predicates
4931 /* 14684 */ GIM_RecordInsn, /*DefineMI*/13, /*MI*/0, /*OpIdx*/13, // MIs[13]
4932 /* 14688 */ GIM_CheckOpcode, /*MI*/13, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4933 /* 14692 */ GIM_CheckI64ImmPredicate, /*MI*/13, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4934 /* 14696 */ // MIs[13] Operand 1
4935 /* 14696 */ // No operand predicates
4936 /* 14696 */ GIM_RecordInsn, /*DefineMI*/14, /*MI*/0, /*OpIdx*/14, // MIs[14]
4937 /* 14700 */ GIM_CheckOpcode, /*MI*/14, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4938 /* 14704 */ GIM_CheckI64ImmPredicate, /*MI*/14, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4939 /* 14708 */ // MIs[14] Operand 1
4940 /* 14708 */ // No operand predicates
4941 /* 14708 */ GIM_RecordInsn, /*DefineMI*/15, /*MI*/0, /*OpIdx*/15, // MIs[15]
4942 /* 14712 */ GIM_CheckOpcode, /*MI*/15, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4943 /* 14716 */ GIM_CheckI64ImmPredicate, /*MI*/15, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4944 /* 14720 */ // MIs[15] Operand 1
4945 /* 14720 */ // No operand predicates
4946 /* 14720 */ GIM_RecordInsn, /*DefineMI*/16, /*MI*/0, /*OpIdx*/16, // MIs[16]
4947 /* 14724 */ GIM_CheckOpcode, /*MI*/16, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4948 /* 14728 */ GIM_CheckI64ImmPredicate, /*MI*/16, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4949 /* 14732 */ // MIs[16] Operand 1
4950 /* 14732 */ // No operand predicates
4951 /* 14732 */ GIM_CheckIsSafeToFold, /*NumInsns*/16,
4952 /* 14734 */ // (build_vector:{ *:[v16i8] } (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i0, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i1, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i2, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i3, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i4, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i5, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i6, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i7, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i8, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i9, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iA, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iB, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iC, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iD, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iE, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iF) => (CONST_V128_I8x16:{ *:[v16i8] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3, (imm:{ *:[i32] }):$i4, (imm:{ *:[i32] }):$i5, (imm:{ *:[i32] }):$i6, (imm:{ *:[i32] }):$i7, (imm:{ *:[i32] }):$i8, (imm:{ *:[i32] }):$i9, (imm:{ *:[i32] }):$iA, (imm:{ *:[i32] }):$iB, (imm:{ *:[i32] }):$iC, (imm:{ *:[i32] }):$iD, (imm:{ *:[i32] }):$iE, (imm:{ *:[i32] }):$iF)
4953 /* 14734 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I8x16),
4954 /* 14737 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4955 /* 14739 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4956 /* 14742 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4957 /* 14745 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
4958 /* 14748 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
4959 /* 14751 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/5, // i4
4960 /* 14754 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/6, // i5
4961 /* 14757 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/7, // i6
4962 /* 14760 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/8, // i7
4963 /* 14763 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/9, // i8
4964 /* 14766 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/10, // i9
4965 /* 14769 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/11, // iA
4966 /* 14772 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/12, // iB
4967 /* 14775 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/13, // iC
4968 /* 14778 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/14, // iD
4969 /* 14781 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/15, // iE
4970 /* 14784 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/16, // iF
4971 /* 14787 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4972 /* 14790 */ GIR_RootConstrainSelectedInstOperands,
4973 /* 14791 */ // GIR_Coverage, 173,
4974 /* 14791 */ GIR_EraseRootFromParent_Done,
4975 /* 14792 */ // Label 321: @14792
4976 /* 14792 */ GIM_Reject,
4977 /* 14793 */ // Label 12: @14793
4978 /* 14793 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 328*/ GIMT_Encode4(16174),
4979 /* 14804 */ /*GILLT_s32*//*Label 322*/ GIMT_Encode4(14828),
4980 /* 14808 */ /*GILLT_s64*//*Label 323*/ GIMT_Encode4(14890),
4981 /* 14812 */ /*GILLT_v2s64*//*Label 324*/ GIMT_Encode4(14952),
4982 /* 14816 */ /*GILLT_v4s32*//*Label 325*/ GIMT_Encode4(15301),
4983 /* 14820 */ /*GILLT_v8s16*//*Label 326*/ GIMT_Encode4(15650),
4984 /* 14824 */ /*GILLT_v16s8*//*Label 327*/ GIMT_Encode4(15999),
4985 /* 14828 */ // Label 322: @14828
4986 /* 14828 */ GIM_Try, /*On fail goto*//*Label 329*/ GIMT_Encode4(14889),
4987 /* 14833 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
4988 /* 14836 */ GIM_Try, /*On fail goto*//*Label 330*/ GIMT_Encode4(14862), // Rule ID 60 //
4989 /* 14841 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
4990 /* 14845 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
4991 /* 14849 */ // (bitconvert:{ *:[i32] } F32:{ *:[f32] }:$src) => (I32_REINTERPRET_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
4992 /* 14849 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_REINTERPRET_F32),
4993 /* 14854 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4994 /* 14860 */ GIR_RootConstrainSelectedInstOperands,
4995 /* 14861 */ // GIR_Coverage, 60,
4996 /* 14861 */ GIR_Done,
4997 /* 14862 */ // Label 330: @14862
4998 /* 14862 */ GIM_Try, /*On fail goto*//*Label 331*/ GIMT_Encode4(14888), // Rule ID 61 //
4999 /* 14867 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5000 /* 14871 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5001 /* 14875 */ // (bitconvert:{ *:[f32] } I32:{ *:[i32] }:$src) => (F32_REINTERPRET_I32:{ *:[f32] } I32:{ *:[i32] }:$src)
5002 /* 14875 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_REINTERPRET_I32),
5003 /* 14880 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5004 /* 14886 */ GIR_RootConstrainSelectedInstOperands,
5005 /* 14887 */ // GIR_Coverage, 61,
5006 /* 14887 */ GIR_Done,
5007 /* 14888 */ // Label 331: @14888
5008 /* 14888 */ GIM_Reject,
5009 /* 14889 */ // Label 329: @14889
5010 /* 14889 */ GIM_Reject,
5011 /* 14890 */ // Label 323: @14890
5012 /* 14890 */ GIM_Try, /*On fail goto*//*Label 332*/ GIMT_Encode4(14951),
5013 /* 14895 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
5014 /* 14898 */ GIM_Try, /*On fail goto*//*Label 333*/ GIMT_Encode4(14924), // Rule ID 62 //
5015 /* 14903 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
5016 /* 14907 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5017 /* 14911 */ // (bitconvert:{ *:[i64] } F64:{ *:[f64] }:$src) => (I64_REINTERPRET_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
5018 /* 14911 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_REINTERPRET_F64),
5019 /* 14916 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5020 /* 14922 */ GIR_RootConstrainSelectedInstOperands,
5021 /* 14923 */ // GIR_Coverage, 62,
5022 /* 14923 */ GIR_Done,
5023 /* 14924 */ // Label 333: @14924
5024 /* 14924 */ GIM_Try, /*On fail goto*//*Label 334*/ GIMT_Encode4(14950), // Rule ID 63 //
5025 /* 14929 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5026 /* 14933 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
5027 /* 14937 */ // (bitconvert:{ *:[f64] } I64:{ *:[i64] }:$src) => (F64_REINTERPRET_I64:{ *:[f64] } I64:{ *:[i64] }:$src)
5028 /* 14937 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_REINTERPRET_I64),
5029 /* 14942 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5030 /* 14948 */ GIR_RootConstrainSelectedInstOperands,
5031 /* 14949 */ // GIR_Coverage, 63,
5032 /* 14949 */ GIR_Done,
5033 /* 14950 */ // Label 334: @14950
5034 /* 14950 */ GIM_Reject,
5035 /* 14951 */ // Label 332: @14951
5036 /* 14951 */ GIM_Reject,
5037 /* 14952 */ // Label 324: @14952
5038 /* 14952 */ GIM_Try, /*On fail goto*//*Label 335*/ GIMT_Encode4(14981), // Rule ID 1207 //
5039 /* 14957 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
5040 /* 14960 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5041 /* 14964 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5042 /* 14968 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v2i64] }:$v
5043 /* 14968 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5044 /* 14971 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5045 /* 14973 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5046 /* 14975 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5047 /* 14980 */ // GIR_Coverage, 1207,
5048 /* 14980 */ GIR_EraseRootFromParent_Done,
5049 /* 14981 */ // Label 335: @14981
5050 /* 14981 */ GIM_Try, /*On fail goto*//*Label 336*/ GIMT_Encode4(15010), // Rule ID 1208 //
5051 /* 14986 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5052 /* 14989 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5053 /* 14993 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5054 /* 14997 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v2i64] }:$v
5055 /* 14997 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5056 /* 15000 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5057 /* 15002 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5058 /* 15004 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5059 /* 15009 */ // GIR_Coverage, 1208,
5060 /* 15009 */ GIR_EraseRootFromParent_Done,
5061 /* 15010 */ // Label 336: @15010
5062 /* 15010 */ GIM_Try, /*On fail goto*//*Label 337*/ GIMT_Encode4(15039), // Rule ID 1209 //
5063 /* 15015 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5064 /* 15018 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5065 /* 15022 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5066 /* 15026 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v2i64] }:$v
5067 /* 15026 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5068 /* 15029 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5069 /* 15031 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5070 /* 15033 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5071 /* 15038 */ // GIR_Coverage, 1209,
5072 /* 15038 */ GIR_EraseRootFromParent_Done,
5073 /* 15039 */ // Label 337: @15039
5074 /* 15039 */ GIM_Try, /*On fail goto*//*Label 338*/ GIMT_Encode4(15068), // Rule ID 1210 //
5075 /* 15044 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5076 /* 15047 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5077 /* 15051 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5078 /* 15055 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v2i64] }:$v
5079 /* 15055 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5080 /* 15058 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5081 /* 15060 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5082 /* 15062 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5083 /* 15067 */ // GIR_Coverage, 1210,
5084 /* 15067 */ GIR_EraseRootFromParent_Done,
5085 /* 15068 */ // Label 338: @15068
5086 /* 15068 */ GIM_Try, /*On fail goto*//*Label 339*/ GIMT_Encode4(15097), // Rule ID 1211 //
5087 /* 15073 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5088 /* 15076 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5089 /* 15080 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5090 /* 15084 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v2i64] }:$v
5091 /* 15084 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5092 /* 15087 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5093 /* 15089 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5094 /* 15091 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5095 /* 15096 */ // GIR_Coverage, 1211,
5096 /* 15096 */ GIR_EraseRootFromParent_Done,
5097 /* 15097 */ // Label 339: @15097
5098 /* 15097 */ GIM_Try, /*On fail goto*//*Label 340*/ GIMT_Encode4(15126), // Rule ID 1212 //
5099 /* 15102 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5100 /* 15105 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5101 /* 15109 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5102 /* 15113 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v2i64] }:$v
5103 /* 15113 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5104 /* 15116 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5105 /* 15118 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5106 /* 15120 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5107 /* 15125 */ // GIR_Coverage, 1212,
5108 /* 15125 */ GIR_EraseRootFromParent_Done,
5109 /* 15126 */ // Label 340: @15126
5110 /* 15126 */ GIM_Try, /*On fail goto*//*Label 341*/ GIMT_Encode4(15155), // Rule ID 1219 //
5111 /* 15131 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
5112 /* 15134 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5113 /* 15138 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5114 /* 15142 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v2f64] }:$v
5115 /* 15142 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5116 /* 15145 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5117 /* 15147 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5118 /* 15149 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5119 /* 15154 */ // GIR_Coverage, 1219,
5120 /* 15154 */ GIR_EraseRootFromParent_Done,
5121 /* 15155 */ // Label 341: @15155
5122 /* 15155 */ GIM_Try, /*On fail goto*//*Label 342*/ GIMT_Encode4(15184), // Rule ID 1220 //
5123 /* 15160 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5124 /* 15163 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5125 /* 15167 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5126 /* 15171 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v2f64] }:$v
5127 /* 15171 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5128 /* 15174 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5129 /* 15176 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5130 /* 15178 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5131 /* 15183 */ // GIR_Coverage, 1220,
5132 /* 15183 */ GIR_EraseRootFromParent_Done,
5133 /* 15184 */ // Label 342: @15184
5134 /* 15184 */ GIM_Try, /*On fail goto*//*Label 343*/ GIMT_Encode4(15213), // Rule ID 1221 //
5135 /* 15189 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5136 /* 15192 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5137 /* 15196 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5138 /* 15200 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v2f64] }:$v
5139 /* 15200 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5140 /* 15203 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5141 /* 15205 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5142 /* 15207 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5143 /* 15212 */ // GIR_Coverage, 1221,
5144 /* 15212 */ GIR_EraseRootFromParent_Done,
5145 /* 15213 */ // Label 343: @15213
5146 /* 15213 */ GIM_Try, /*On fail goto*//*Label 344*/ GIMT_Encode4(15242), // Rule ID 1222 //
5147 /* 15218 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5148 /* 15221 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5149 /* 15225 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5150 /* 15229 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v2f64] }:$v
5151 /* 15229 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5152 /* 15232 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5153 /* 15234 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5154 /* 15236 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5155 /* 15241 */ // GIR_Coverage, 1222,
5156 /* 15241 */ GIR_EraseRootFromParent_Done,
5157 /* 15242 */ // Label 344: @15242
5158 /* 15242 */ GIM_Try, /*On fail goto*//*Label 345*/ GIMT_Encode4(15271), // Rule ID 1223 //
5159 /* 15247 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5160 /* 15250 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5161 /* 15254 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5162 /* 15258 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v2f64] }:$v
5163 /* 15258 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5164 /* 15261 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5165 /* 15263 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5166 /* 15265 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5167 /* 15270 */ // GIR_Coverage, 1223,
5168 /* 15270 */ GIR_EraseRootFromParent_Done,
5169 /* 15271 */ // Label 345: @15271
5170 /* 15271 */ GIM_Try, /*On fail goto*//*Label 346*/ GIMT_Encode4(15300), // Rule ID 1224 //
5171 /* 15276 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5172 /* 15279 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5173 /* 15283 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5174 /* 15287 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v2f64] }:$v
5175 /* 15287 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5176 /* 15290 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5177 /* 15292 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5178 /* 15294 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5179 /* 15299 */ // GIR_Coverage, 1224,
5180 /* 15299 */ GIR_EraseRootFromParent_Done,
5181 /* 15300 */ // Label 346: @15300
5182 /* 15300 */ GIM_Reject,
5183 /* 15301 */ // Label 325: @15301
5184 /* 15301 */ GIM_Try, /*On fail goto*//*Label 347*/ GIMT_Encode4(15330), // Rule ID 1201 //
5185 /* 15306 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
5186 /* 15309 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5187 /* 15313 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5188 /* 15317 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v4i32] }:$v
5189 /* 15317 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5190 /* 15320 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5191 /* 15322 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5192 /* 15324 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5193 /* 15329 */ // GIR_Coverage, 1201,
5194 /* 15329 */ GIR_EraseRootFromParent_Done,
5195 /* 15330 */ // Label 347: @15330
5196 /* 15330 */ GIM_Try, /*On fail goto*//*Label 348*/ GIMT_Encode4(15359), // Rule ID 1202 //
5197 /* 15335 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5198 /* 15338 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5199 /* 15342 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5200 /* 15346 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v4i32] }:$v
5201 /* 15346 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5202 /* 15349 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5203 /* 15351 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5204 /* 15353 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5205 /* 15358 */ // GIR_Coverage, 1202,
5206 /* 15358 */ GIR_EraseRootFromParent_Done,
5207 /* 15359 */ // Label 348: @15359
5208 /* 15359 */ GIM_Try, /*On fail goto*//*Label 349*/ GIMT_Encode4(15388), // Rule ID 1203 //
5209 /* 15364 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5210 /* 15367 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5211 /* 15371 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5212 /* 15375 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v4i32] }:$v
5213 /* 15375 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5214 /* 15378 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5215 /* 15380 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5216 /* 15382 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5217 /* 15387 */ // GIR_Coverage, 1203,
5218 /* 15387 */ GIR_EraseRootFromParent_Done,
5219 /* 15388 */ // Label 349: @15388
5220 /* 15388 */ GIM_Try, /*On fail goto*//*Label 350*/ GIMT_Encode4(15417), // Rule ID 1204 //
5221 /* 15393 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5222 /* 15396 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5223 /* 15400 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5224 /* 15404 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v4i32] }:$v
5225 /* 15404 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5226 /* 15407 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5227 /* 15409 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5228 /* 15411 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5229 /* 15416 */ // GIR_Coverage, 1204,
5230 /* 15416 */ GIR_EraseRootFromParent_Done,
5231 /* 15417 */ // Label 350: @15417
5232 /* 15417 */ GIM_Try, /*On fail goto*//*Label 351*/ GIMT_Encode4(15446), // Rule ID 1205 //
5233 /* 15422 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5234 /* 15425 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5235 /* 15429 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5236 /* 15433 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v4i32] }:$v
5237 /* 15433 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5238 /* 15436 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5239 /* 15438 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5240 /* 15440 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5241 /* 15445 */ // GIR_Coverage, 1205,
5242 /* 15445 */ GIR_EraseRootFromParent_Done,
5243 /* 15446 */ // Label 351: @15446
5244 /* 15446 */ GIM_Try, /*On fail goto*//*Label 352*/ GIMT_Encode4(15475), // Rule ID 1206 //
5245 /* 15451 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5246 /* 15454 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5247 /* 15458 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5248 /* 15462 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v4i32] }:$v
5249 /* 15462 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5250 /* 15465 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5251 /* 15467 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5252 /* 15469 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5253 /* 15474 */ // GIR_Coverage, 1206,
5254 /* 15474 */ GIR_EraseRootFromParent_Done,
5255 /* 15475 */ // Label 352: @15475
5256 /* 15475 */ GIM_Try, /*On fail goto*//*Label 353*/ GIMT_Encode4(15504), // Rule ID 1213 //
5257 /* 15480 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
5258 /* 15483 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5259 /* 15487 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5260 /* 15491 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v4f32] }:$v
5261 /* 15491 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5262 /* 15494 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5263 /* 15496 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5264 /* 15498 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5265 /* 15503 */ // GIR_Coverage, 1213,
5266 /* 15503 */ GIR_EraseRootFromParent_Done,
5267 /* 15504 */ // Label 353: @15504
5268 /* 15504 */ GIM_Try, /*On fail goto*//*Label 354*/ GIMT_Encode4(15533), // Rule ID 1214 //
5269 /* 15509 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5270 /* 15512 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5271 /* 15516 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5272 /* 15520 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v4f32] }:$v
5273 /* 15520 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5274 /* 15523 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5275 /* 15525 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5276 /* 15527 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5277 /* 15532 */ // GIR_Coverage, 1214,
5278 /* 15532 */ GIR_EraseRootFromParent_Done,
5279 /* 15533 */ // Label 354: @15533
5280 /* 15533 */ GIM_Try, /*On fail goto*//*Label 355*/ GIMT_Encode4(15562), // Rule ID 1215 //
5281 /* 15538 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5282 /* 15541 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5283 /* 15545 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5284 /* 15549 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v4f32] }:$v
5285 /* 15549 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5286 /* 15552 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5287 /* 15554 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5288 /* 15556 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5289 /* 15561 */ // GIR_Coverage, 1215,
5290 /* 15561 */ GIR_EraseRootFromParent_Done,
5291 /* 15562 */ // Label 355: @15562
5292 /* 15562 */ GIM_Try, /*On fail goto*//*Label 356*/ GIMT_Encode4(15591), // Rule ID 1216 //
5293 /* 15567 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5294 /* 15570 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5295 /* 15574 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5296 /* 15578 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v4f32] }:$v
5297 /* 15578 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5298 /* 15581 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5299 /* 15583 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5300 /* 15585 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5301 /* 15590 */ // GIR_Coverage, 1216,
5302 /* 15590 */ GIR_EraseRootFromParent_Done,
5303 /* 15591 */ // Label 356: @15591
5304 /* 15591 */ GIM_Try, /*On fail goto*//*Label 357*/ GIMT_Encode4(15620), // Rule ID 1217 //
5305 /* 15596 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5306 /* 15599 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5307 /* 15603 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5308 /* 15607 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v4f32] }:$v
5309 /* 15607 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5310 /* 15610 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5311 /* 15612 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5312 /* 15614 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5313 /* 15619 */ // GIR_Coverage, 1217,
5314 /* 15619 */ GIR_EraseRootFromParent_Done,
5315 /* 15620 */ // Label 357: @15620
5316 /* 15620 */ GIM_Try, /*On fail goto*//*Label 358*/ GIMT_Encode4(15649), // Rule ID 1218 //
5317 /* 15625 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5318 /* 15628 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5319 /* 15632 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5320 /* 15636 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v4f32] }:$v
5321 /* 15636 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5322 /* 15639 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5323 /* 15641 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5324 /* 15643 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5325 /* 15648 */ // GIR_Coverage, 1218,
5326 /* 15648 */ GIR_EraseRootFromParent_Done,
5327 /* 15649 */ // Label 358: @15649
5328 /* 15649 */ GIM_Reject,
5329 /* 15650 */ // Label 326: @15650
5330 /* 15650 */ GIM_Try, /*On fail goto*//*Label 359*/ GIMT_Encode4(15679), // Rule ID 1195 //
5331 /* 15655 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
5332 /* 15658 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5333 /* 15662 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5334 /* 15666 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v8i16] }:$v
5335 /* 15666 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5336 /* 15669 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5337 /* 15671 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5338 /* 15673 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5339 /* 15678 */ // GIR_Coverage, 1195,
5340 /* 15678 */ GIR_EraseRootFromParent_Done,
5341 /* 15679 */ // Label 359: @15679
5342 /* 15679 */ GIM_Try, /*On fail goto*//*Label 360*/ GIMT_Encode4(15708), // Rule ID 1196 //
5343 /* 15684 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5344 /* 15687 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5345 /* 15691 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5346 /* 15695 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v8i16] }:$v
5347 /* 15695 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5348 /* 15698 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5349 /* 15700 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5350 /* 15702 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5351 /* 15707 */ // GIR_Coverage, 1196,
5352 /* 15707 */ GIR_EraseRootFromParent_Done,
5353 /* 15708 */ // Label 360: @15708
5354 /* 15708 */ GIM_Try, /*On fail goto*//*Label 361*/ GIMT_Encode4(15737), // Rule ID 1197 //
5355 /* 15713 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5356 /* 15716 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5357 /* 15720 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5358 /* 15724 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v8i16] }:$v
5359 /* 15724 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5360 /* 15727 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5361 /* 15729 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5362 /* 15731 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5363 /* 15736 */ // GIR_Coverage, 1197,
5364 /* 15736 */ GIR_EraseRootFromParent_Done,
5365 /* 15737 */ // Label 361: @15737
5366 /* 15737 */ GIM_Try, /*On fail goto*//*Label 362*/ GIMT_Encode4(15766), // Rule ID 1198 //
5367 /* 15742 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5368 /* 15745 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5369 /* 15749 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5370 /* 15753 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v8i16] }:$v
5371 /* 15753 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5372 /* 15756 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5373 /* 15758 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5374 /* 15760 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5375 /* 15765 */ // GIR_Coverage, 1198,
5376 /* 15765 */ GIR_EraseRootFromParent_Done,
5377 /* 15766 */ // Label 362: @15766
5378 /* 15766 */ GIM_Try, /*On fail goto*//*Label 363*/ GIMT_Encode4(15795), // Rule ID 1199 //
5379 /* 15771 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5380 /* 15774 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5381 /* 15778 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5382 /* 15782 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v8i16] }:$v
5383 /* 15782 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5384 /* 15785 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5385 /* 15787 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5386 /* 15789 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5387 /* 15794 */ // GIR_Coverage, 1199,
5388 /* 15794 */ GIR_EraseRootFromParent_Done,
5389 /* 15795 */ // Label 363: @15795
5390 /* 15795 */ GIM_Try, /*On fail goto*//*Label 364*/ GIMT_Encode4(15824), // Rule ID 1200 //
5391 /* 15800 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5392 /* 15803 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5393 /* 15807 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5394 /* 15811 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v8i16] }:$v
5395 /* 15811 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5396 /* 15814 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5397 /* 15816 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5398 /* 15818 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5399 /* 15823 */ // GIR_Coverage, 1200,
5400 /* 15823 */ GIR_EraseRootFromParent_Done,
5401 /* 15824 */ // Label 364: @15824
5402 /* 15824 */ GIM_Try, /*On fail goto*//*Label 365*/ GIMT_Encode4(15853), // Rule ID 1225 //
5403 /* 15829 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
5404 /* 15832 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5405 /* 15836 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5406 /* 15840 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v8f16] }:$v
5407 /* 15840 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5408 /* 15843 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5409 /* 15845 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5410 /* 15847 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5411 /* 15852 */ // GIR_Coverage, 1225,
5412 /* 15852 */ GIR_EraseRootFromParent_Done,
5413 /* 15853 */ // Label 365: @15853
5414 /* 15853 */ GIM_Try, /*On fail goto*//*Label 366*/ GIMT_Encode4(15882), // Rule ID 1226 //
5415 /* 15858 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5416 /* 15861 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5417 /* 15865 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5418 /* 15869 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v8f16] }:$v
5419 /* 15869 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5420 /* 15872 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5421 /* 15874 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5422 /* 15876 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5423 /* 15881 */ // GIR_Coverage, 1226,
5424 /* 15881 */ GIR_EraseRootFromParent_Done,
5425 /* 15882 */ // Label 366: @15882
5426 /* 15882 */ GIM_Try, /*On fail goto*//*Label 367*/ GIMT_Encode4(15911), // Rule ID 1227 //
5427 /* 15887 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5428 /* 15890 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5429 /* 15894 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5430 /* 15898 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v8f16] }:$v
5431 /* 15898 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5432 /* 15901 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5433 /* 15903 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5434 /* 15905 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5435 /* 15910 */ // GIR_Coverage, 1227,
5436 /* 15910 */ GIR_EraseRootFromParent_Done,
5437 /* 15911 */ // Label 367: @15911
5438 /* 15911 */ GIM_Try, /*On fail goto*//*Label 368*/ GIMT_Encode4(15940), // Rule ID 1228 //
5439 /* 15916 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5440 /* 15919 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5441 /* 15923 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5442 /* 15927 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v8f16] }:$v
5443 /* 15927 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5444 /* 15930 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5445 /* 15932 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5446 /* 15934 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5447 /* 15939 */ // GIR_Coverage, 1228,
5448 /* 15939 */ GIR_EraseRootFromParent_Done,
5449 /* 15940 */ // Label 368: @15940
5450 /* 15940 */ GIM_Try, /*On fail goto*//*Label 369*/ GIMT_Encode4(15969), // Rule ID 1229 //
5451 /* 15945 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5452 /* 15948 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5453 /* 15952 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5454 /* 15956 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v8f16] }:$v
5455 /* 15956 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5456 /* 15959 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5457 /* 15961 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5458 /* 15963 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5459 /* 15968 */ // GIR_Coverage, 1229,
5460 /* 15968 */ GIR_EraseRootFromParent_Done,
5461 /* 15969 */ // Label 369: @15969
5462 /* 15969 */ GIM_Try, /*On fail goto*//*Label 370*/ GIMT_Encode4(15998), // Rule ID 1230 //
5463 /* 15974 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5464 /* 15977 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5465 /* 15981 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5466 /* 15985 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v8f16] }:$v
5467 /* 15985 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5468 /* 15988 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5469 /* 15990 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5470 /* 15992 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5471 /* 15997 */ // GIR_Coverage, 1230,
5472 /* 15997 */ GIR_EraseRootFromParent_Done,
5473 /* 15998 */ // Label 370: @15998
5474 /* 15998 */ GIM_Reject,
5475 /* 15999 */ // Label 327: @15999
5476 /* 15999 */ GIM_Try, /*On fail goto*//*Label 371*/ GIMT_Encode4(16028), // Rule ID 1189 //
5477 /* 16004 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5478 /* 16007 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5479 /* 16011 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5480 /* 16015 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v16i8] }:$v
5481 /* 16015 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5482 /* 16018 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5483 /* 16020 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5484 /* 16022 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5485 /* 16027 */ // GIR_Coverage, 1189,
5486 /* 16027 */ GIR_EraseRootFromParent_Done,
5487 /* 16028 */ // Label 371: @16028
5488 /* 16028 */ GIM_Try, /*On fail goto*//*Label 372*/ GIMT_Encode4(16057), // Rule ID 1190 //
5489 /* 16033 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5490 /* 16036 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5491 /* 16040 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5492 /* 16044 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v16i8] }:$v
5493 /* 16044 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5494 /* 16047 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5495 /* 16049 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5496 /* 16051 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5497 /* 16056 */ // GIR_Coverage, 1190,
5498 /* 16056 */ GIR_EraseRootFromParent_Done,
5499 /* 16057 */ // Label 372: @16057
5500 /* 16057 */ GIM_Try, /*On fail goto*//*Label 373*/ GIMT_Encode4(16086), // Rule ID 1191 //
5501 /* 16062 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5502 /* 16065 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5503 /* 16069 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5504 /* 16073 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v16i8] }:$v
5505 /* 16073 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5506 /* 16076 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5507 /* 16078 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5508 /* 16080 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5509 /* 16085 */ // GIR_Coverage, 1191,
5510 /* 16085 */ GIR_EraseRootFromParent_Done,
5511 /* 16086 */ // Label 373: @16086
5512 /* 16086 */ GIM_Try, /*On fail goto*//*Label 374*/ GIMT_Encode4(16115), // Rule ID 1192 //
5513 /* 16091 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5514 /* 16094 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5515 /* 16098 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5516 /* 16102 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v16i8] }:$v
5517 /* 16102 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5518 /* 16105 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5519 /* 16107 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5520 /* 16109 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5521 /* 16114 */ // GIR_Coverage, 1192,
5522 /* 16114 */ GIR_EraseRootFromParent_Done,
5523 /* 16115 */ // Label 374: @16115
5524 /* 16115 */ GIM_Try, /*On fail goto*//*Label 375*/ GIMT_Encode4(16144), // Rule ID 1193 //
5525 /* 16120 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5526 /* 16123 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5527 /* 16127 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5528 /* 16131 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v16i8] }:$v
5529 /* 16131 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5530 /* 16134 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5531 /* 16136 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5532 /* 16138 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5533 /* 16143 */ // GIR_Coverage, 1193,
5534 /* 16143 */ GIR_EraseRootFromParent_Done,
5535 /* 16144 */ // Label 375: @16144
5536 /* 16144 */ GIM_Try, /*On fail goto*//*Label 376*/ GIMT_Encode4(16173), // Rule ID 1194 //
5537 /* 16149 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5538 /* 16152 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5539 /* 16156 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5540 /* 16160 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v16i8] }:$v
5541 /* 16160 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5542 /* 16163 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5543 /* 16165 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5544 /* 16167 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5545 /* 16172 */ // GIR_Coverage, 1194,
5546 /* 16172 */ GIR_EraseRootFromParent_Done,
5547 /* 16173 */ // Label 376: @16173
5548 /* 16173 */ GIM_Reject,
5549 /* 16174 */ // Label 328: @16174
5550 /* 16174 */ GIM_Reject,
5551 /* 16175 */ // Label 13: @16175
5552 /* 16175 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 382*/ GIMT_Encode4(16365),
5553 /* 16186 */ /*GILLT_s32*//*Label 377*/ GIMT_Encode4(16206),
5554 /* 16190 */ /*GILLT_s64*//*Label 378*/ GIMT_Encode4(16236),
5555 /* 16194 */ /*GILLT_v2s64*//*Label 379*/ GIMT_Encode4(16266),
5556 /* 16198 */ /*GILLT_v4s32*//*Label 380*/ GIMT_Encode4(16299),
5557 /* 16202 */ /*GILLT_v8s16*//*Label 381*/ GIMT_Encode4(16332),
5558 /* 16206 */ // Label 377: @16206
5559 /* 16206 */ GIM_Try, /*On fail goto*//*Label 383*/ GIMT_Encode4(16235), // Rule ID 148 //
5560 /* 16211 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
5561 /* 16214 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5562 /* 16218 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5563 /* 16222 */ // (ftrunc:{ *:[f32] } F32:{ *:[f32] }:$src) => (TRUNC_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
5564 /* 16222 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F32),
5565 /* 16227 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5566 /* 16233 */ GIR_RootConstrainSelectedInstOperands,
5567 /* 16234 */ // GIR_Coverage, 148,
5568 /* 16234 */ GIR_Done,
5569 /* 16235 */ // Label 383: @16235
5570 /* 16235 */ GIM_Reject,
5571 /* 16236 */ // Label 378: @16236
5572 /* 16236 */ GIM_Try, /*On fail goto*//*Label 384*/ GIMT_Encode4(16265), // Rule ID 149 //
5573 /* 16241 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
5574 /* 16244 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5575 /* 16248 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5576 /* 16252 */ // (ftrunc:{ *:[f64] } F64:{ *:[f64] }:$src) => (TRUNC_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
5577 /* 16252 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F64),
5578 /* 16257 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5579 /* 16263 */ GIR_RootConstrainSelectedInstOperands,
5580 /* 16264 */ // GIR_Coverage, 149,
5581 /* 16264 */ GIR_Done,
5582 /* 16265 */ // Label 384: @16265
5583 /* 16265 */ GIM_Reject,
5584 /* 16266 */ // Label 379: @16266
5585 /* 16266 */ GIM_Try, /*On fail goto*//*Label 385*/ GIMT_Encode4(16298), // Rule ID 339 //
5586 /* 16271 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5587 /* 16274 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5588 /* 16277 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5589 /* 16281 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5590 /* 16285 */ // (ftrunc:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (TRUNC_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
5591 /* 16285 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F64x2),
5592 /* 16290 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5593 /* 16296 */ GIR_RootConstrainSelectedInstOperands,
5594 /* 16297 */ // GIR_Coverage, 339,
5595 /* 16297 */ GIR_Done,
5596 /* 16298 */ // Label 385: @16298
5597 /* 16298 */ GIM_Reject,
5598 /* 16299 */ // Label 380: @16299
5599 /* 16299 */ GIM_Try, /*On fail goto*//*Label 386*/ GIMT_Encode4(16331), // Rule ID 335 //
5600 /* 16304 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5601 /* 16307 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5602 /* 16310 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5603 /* 16314 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5604 /* 16318 */ // (ftrunc:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (TRUNC_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
5605 /* 16318 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F32x4),
5606 /* 16323 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5607 /* 16329 */ GIR_RootConstrainSelectedInstOperands,
5608 /* 16330 */ // GIR_Coverage, 335,
5609 /* 16330 */ GIR_Done,
5610 /* 16331 */ // Label 386: @16331
5611 /* 16331 */ GIM_Reject,
5612 /* 16332 */ // Label 381: @16332
5613 /* 16332 */ GIM_Try, /*On fail goto*//*Label 387*/ GIMT_Encode4(16364), // Rule ID 343 //
5614 /* 16337 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
5615 /* 16340 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5616 /* 16343 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5617 /* 16347 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5618 /* 16351 */ // (ftrunc:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (TRUNC_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
5619 /* 16351 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F16x8),
5620 /* 16356 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5621 /* 16362 */ GIR_RootConstrainSelectedInstOperands,
5622 /* 16363 */ // GIR_Coverage, 343,
5623 /* 16363 */ GIR_Done,
5624 /* 16364 */ // Label 387: @16364
5625 /* 16364 */ GIM_Reject,
5626 /* 16365 */ // Label 382: @16365
5627 /* 16365 */ GIM_Reject,
5628 /* 16366 */ // Label 14: @16366
5629 /* 16366 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 393*/ GIMT_Encode4(16539),
5630 /* 16377 */ /*GILLT_s32*//*Label 388*/ GIMT_Encode4(16397),
5631 /* 16381 */ /*GILLT_s64*//*Label 389*/ GIMT_Encode4(16423),
5632 /* 16385 */ /*GILLT_v2s64*//*Label 390*/ GIMT_Encode4(16449),
5633 /* 16389 */ /*GILLT_v4s32*//*Label 391*/ GIMT_Encode4(16479),
5634 /* 16393 */ /*GILLT_v8s16*//*Label 392*/ GIMT_Encode4(16509),
5635 /* 16397 */ // Label 388: @16397
5636 /* 16397 */ GIM_Try, /*On fail goto*//*Label 394*/ GIMT_Encode4(16422), // Rule ID 675 //
5637 /* 16402 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
5638 /* 16405 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5639 /* 16409 */ // (froundeven:{ *:[f32] } f32:{ *:[f32] }:$src) => (NEAREST_F32:{ *:[f32] } f32:{ *:[f32] }:$src)
5640 /* 16409 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32),
5641 /* 16414 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5642 /* 16420 */ GIR_RootConstrainSelectedInstOperands,
5643 /* 16421 */ // GIR_Coverage, 675,
5644 /* 16421 */ GIR_Done,
5645 /* 16422 */ // Label 394: @16422
5646 /* 16422 */ GIM_Reject,
5647 /* 16423 */ // Label 389: @16423
5648 /* 16423 */ GIM_Try, /*On fail goto*//*Label 395*/ GIMT_Encode4(16448), // Rule ID 676 //
5649 /* 16428 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
5650 /* 16431 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5651 /* 16435 */ // (froundeven:{ *:[f64] } f64:{ *:[f64] }:$src) => (NEAREST_F64:{ *:[f64] } f64:{ *:[f64] }:$src)
5652 /* 16435 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64),
5653 /* 16440 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5654 /* 16446 */ GIR_RootConstrainSelectedInstOperands,
5655 /* 16447 */ // GIR_Coverage, 676,
5656 /* 16447 */ GIR_Done,
5657 /* 16448 */ // Label 395: @16448
5658 /* 16448 */ GIM_Reject,
5659 /* 16449 */ // Label 390: @16449
5660 /* 16449 */ GIM_Try, /*On fail goto*//*Label 396*/ GIMT_Encode4(16478), // Rule ID 1163 //
5661 /* 16454 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5662 /* 16457 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5663 /* 16461 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5664 /* 16465 */ // (froundeven:{ *:[v2f64] } V128:{ *:[v2f64] }:$src) => (NEAREST_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$src)
5665 /* 16465 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64x2),
5666 /* 16470 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5667 /* 16476 */ GIR_RootConstrainSelectedInstOperands,
5668 /* 16477 */ // GIR_Coverage, 1163,
5669 /* 16477 */ GIR_Done,
5670 /* 16478 */ // Label 396: @16478
5671 /* 16478 */ GIM_Reject,
5672 /* 16479 */ // Label 391: @16479
5673 /* 16479 */ GIM_Try, /*On fail goto*//*Label 397*/ GIMT_Encode4(16508), // Rule ID 1162 //
5674 /* 16484 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5675 /* 16487 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5676 /* 16491 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5677 /* 16495 */ // (froundeven:{ *:[v4f32] } V128:{ *:[v4f32] }:$src) => (NEAREST_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$src)
5678 /* 16495 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32x4),
5679 /* 16500 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5680 /* 16506 */ GIR_RootConstrainSelectedInstOperands,
5681 /* 16507 */ // GIR_Coverage, 1162,
5682 /* 16507 */ GIR_Done,
5683 /* 16508 */ // Label 397: @16508
5684 /* 16508 */ GIM_Reject,
5685 /* 16509 */ // Label 392: @16509
5686 /* 16509 */ GIM_Try, /*On fail goto*//*Label 398*/ GIMT_Encode4(16538), // Rule ID 1164 //
5687 /* 16514 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5688 /* 16517 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5689 /* 16521 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5690 /* 16525 */ // (froundeven:{ *:[v8f16] } V128:{ *:[v8f16] }:$src) => (NEAREST_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$src)
5691 /* 16525 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F16x8),
5692 /* 16530 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5693 /* 16536 */ GIR_RootConstrainSelectedInstOperands,
5694 /* 16537 */ // GIR_Coverage, 1164,
5695 /* 16537 */ GIR_Done,
5696 /* 16538 */ // Label 398: @16538
5697 /* 16538 */ GIM_Reject,
5698 /* 16539 */ // Label 393: @16539
5699 /* 16539 */ GIM_Reject,
5700 /* 16540 */ // Label 15: @16540
5701 /* 16540 */ GIM_Try, /*On fail goto*//*Label 399*/ GIMT_Encode4(16680),
5702 /* 16545 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
5703 /* 16548 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
5704 /* 16551 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
5705 /* 16555 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5706 /* 16559 */ GIM_Try, /*On fail goto*//*Label 400*/ GIMT_Encode4(16619), // Rule ID 1239 //
5707 /* 16564 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAddr32),
5708 /* 16567 */ // MIs[0] addr
5709 /* 16567 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
5710 /* 16571 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5711 /* 16575 */ // (ld:{ *:[v2f64] } I32:{ *:[i32] }:$addr)<<P:Predicate_unindexedload>><<P:Predicate_extload>> => (promote_low_F64x2:{ *:[v2f64] } (LOAD_ZERO_64_A32:{ *:[v16i8] } 0:{ *:[i32] }, 0:{ *:[i32] }, I32:{ *:[i32] }:$addr))
5712 /* 16575 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s8,
5713 /* 16578 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_ZERO_64_A32),
5714 /* 16582 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
5715 /* 16587 */ GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
5716 /* 16590 */ GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
5717 /* 16593 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // addr
5718 /* 16597 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5719 /* 16600 */ GIR_MergeMemOperands, /*InsnID*/1, /*NumInsns*/1, /*MergeInsnID's*/0,
5720 /* 16604 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
5721 /* 16606 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::promote_low_F64x2),
5722 /* 16609 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5723 /* 16611 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
5724 /* 16614 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5725 /* 16617 */ GIR_RootConstrainSelectedInstOperands,
5726 /* 16618 */ // GIR_Coverage, 1239,
5727 /* 16618 */ GIR_EraseRootFromParent_Done,
5728 /* 16619 */ // Label 400: @16619
5729 /* 16619 */ GIM_Try, /*On fail goto*//*Label 401*/ GIMT_Encode4(16679), // Rule ID 1240 //
5730 /* 16624 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAddr64),
5731 /* 16627 */ // MIs[0] addr
5732 /* 16627 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
5733 /* 16631 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
5734 /* 16635 */ // (ld:{ *:[v2f64] } I64:{ *:[i64] }:$addr)<<P:Predicate_unindexedload>><<P:Predicate_extload>> => (promote_low_F64x2:{ *:[v2f64] } (LOAD_ZERO_64_A64:{ *:[v16i8] } 0:{ *:[i32] }, 0:{ *:[i64] }, I64:{ *:[i64] }:$addr))
5735 /* 16635 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s8,
5736 /* 16638 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_ZERO_64_A64),
5737 /* 16642 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
5738 /* 16647 */ GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
5739 /* 16650 */ GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
5740 /* 16653 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // addr
5741 /* 16657 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5742 /* 16660 */ GIR_MergeMemOperands, /*InsnID*/1, /*NumInsns*/1, /*MergeInsnID's*/0,
5743 /* 16664 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
5744 /* 16666 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::promote_low_F64x2),
5745 /* 16669 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5746 /* 16671 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
5747 /* 16674 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5748 /* 16677 */ GIR_RootConstrainSelectedInstOperands,
5749 /* 16678 */ // GIR_Coverage, 1240,
5750 /* 16678 */ GIR_EraseRootFromParent_Done,
5751 /* 16679 */ // Label 401: @16679
5752 /* 16679 */ GIM_Reject,
5753 /* 16680 */ // Label 399: @16680
5754 /* 16680 */ GIM_Reject,
5755 /* 16681 */ // Label 16: @16681
5756 /* 16681 */ GIM_Try, /*On fail goto*//*Label 402*/ GIMT_Encode4(16708), // Rule ID 17 //
5757 /* 16686 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5758 /* 16689 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5759 /* 16693 */ // MIs[0] dst
5760 /* 16693 */ GIM_CheckIsMBB, /*MI*/0, /*Op*/1,
5761 /* 16696 */ // (brcond I32:{ *:[i32] }:$cond, (bb:{ *:[Other] }):$dst) => (BR_IF (bb:{ *:[Other] }):$dst, I32:{ *:[i32] }:$cond)
5762 /* 16696 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BR_IF),
5763 /* 16699 */ GIR_RootToRootCopy, /*OpIdx*/1, // dst
5764 /* 16701 */ GIR_RootToRootCopy, /*OpIdx*/0, // cond
5765 /* 16703 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5766 /* 16706 */ GIR_RootConstrainSelectedInstOperands,
5767 /* 16707 */ // GIR_Coverage, 17,
5768 /* 16707 */ GIR_EraseRootFromParent_Done,
5769 /* 16708 */ // Label 402: @16708
5770 /* 16708 */ GIM_Reject,
5771 /* 16709 */ // Label 17: @16709
5772 /* 16709 */ GIM_Try, /*On fail goto*//*Label 403*/ GIMT_Encode4(17801),
5773 /* 16714 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
5774 /* 16717 */ GIM_Try, /*On fail goto*//*Label 404*/ GIMT_Encode4(16756), // Rule ID 186 //
5775 /* 16722 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
5776 /* 16725 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_splat_f16x8),
5777 /* 16730 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
5778 /* 16733 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5779 /* 16736 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5780 /* 16740 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5781 /* 16744 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14478:{ *:[iPTR] }, F32:{ *:[f32] }:$x) => (SPLAT_F16x8:{ *:[v8f16] } F32:{ *:[f32] }:$x)
5782 /* 16744 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_F16x8),
5783 /* 16747 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5784 /* 16749 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
5785 /* 16751 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5786 /* 16754 */ GIR_RootConstrainSelectedInstOperands,
5787 /* 16755 */ // GIR_Coverage, 186,
5788 /* 16755 */ GIR_EraseRootFromParent_Done,
5789 /* 16756 */ // Label 404: @16756
5790 /* 16756 */ GIM_Try, /*On fail goto*//*Label 405*/ GIMT_Encode4(16795), // Rule ID 258 //
5791 /* 16761 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5792 /* 16764 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
5793 /* 16769 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5794 /* 16772 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
5795 /* 16775 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5796 /* 16779 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5797 /* 16783 */ // (intrinsic_wo_chain:{ *:[i32] } 14429:{ *:[iPTR] }, V128:{ *:[v16i8] }:$vec) => (ALLTRUE_I8x16:{ *:[i32] } V128:{ *:[v16i8] }:$vec)
5798 /* 16783 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
5799 /* 16786 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5800 /* 16788 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5801 /* 16790 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5802 /* 16793 */ GIR_RootConstrainSelectedInstOperands,
5803 /* 16794 */ // GIR_Coverage, 258,
5804 /* 16794 */ GIR_EraseRootFromParent_Done,
5805 /* 16795 */ // Label 405: @16795
5806 /* 16795 */ GIM_Try, /*On fail goto*//*Label 406*/ GIMT_Encode4(16834), // Rule ID 259 //
5807 /* 16800 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5808 /* 16803 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
5809 /* 16808 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5810 /* 16811 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
5811 /* 16814 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5812 /* 16818 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5813 /* 16822 */ // (intrinsic_wo_chain:{ *:[i32] } 14429:{ *:[iPTR] }, V128:{ *:[v8i16] }:$vec) => (ALLTRUE_I16x8:{ *:[i32] } V128:{ *:[v8i16] }:$vec)
5814 /* 16822 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
5815 /* 16825 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5816 /* 16827 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5817 /* 16829 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5818 /* 16832 */ GIR_RootConstrainSelectedInstOperands,
5819 /* 16833 */ // GIR_Coverage, 259,
5820 /* 16833 */ GIR_EraseRootFromParent_Done,
5821 /* 16834 */ // Label 406: @16834
5822 /* 16834 */ GIM_Try, /*On fail goto*//*Label 407*/ GIMT_Encode4(16873), // Rule ID 260 //
5823 /* 16839 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5824 /* 16842 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
5825 /* 16847 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5826 /* 16850 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
5827 /* 16853 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5828 /* 16857 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5829 /* 16861 */ // (intrinsic_wo_chain:{ *:[i32] } 14429:{ *:[iPTR] }, V128:{ *:[v4i32] }:$vec) => (ALLTRUE_I32x4:{ *:[i32] } V128:{ *:[v4i32] }:$vec)
5830 /* 16861 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
5831 /* 16864 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5832 /* 16866 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5833 /* 16868 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5834 /* 16871 */ GIR_RootConstrainSelectedInstOperands,
5835 /* 16872 */ // GIR_Coverage, 260,
5836 /* 16872 */ GIR_EraseRootFromParent_Done,
5837 /* 16873 */ // Label 407: @16873
5838 /* 16873 */ GIM_Try, /*On fail goto*//*Label 408*/ GIMT_Encode4(16912), // Rule ID 261 //
5839 /* 16878 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5840 /* 16881 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
5841 /* 16886 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5842 /* 16889 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
5843 /* 16892 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5844 /* 16896 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5845 /* 16900 */ // (intrinsic_wo_chain:{ *:[i32] } 14429:{ *:[iPTR] }, V128:{ *:[v2i64] }:$vec) => (ALLTRUE_I64x2:{ *:[i32] } V128:{ *:[v2i64] }:$vec)
5846 /* 16900 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
5847 /* 16903 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5848 /* 16905 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5849 /* 16907 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5850 /* 16910 */ GIR_RootConstrainSelectedInstOperands,
5851 /* 16911 */ // GIR_Coverage, 261,
5852 /* 16911 */ GIR_EraseRootFromParent_Done,
5853 /* 16912 */ // Label 408: @16912
5854 /* 16912 */ GIM_Try, /*On fail goto*//*Label 409*/ GIMT_Encode4(16951), // Rule ID 262 //
5855 /* 16917 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5856 /* 16920 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitmask),
5857 /* 16925 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5858 /* 16928 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
5859 /* 16931 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5860 /* 16935 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5861 /* 16939 */ // (intrinsic_wo_chain:{ *:[i32] } 14432:{ *:[iPTR] }, V128:{ *:[v16i8] }:$vec) => (BITMASK_I8x16:{ *:[i32] } V128:{ *:[v16i8] }:$vec)
5862 /* 16939 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I8x16),
5863 /* 16942 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5864 /* 16944 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5865 /* 16946 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5866 /* 16949 */ GIR_RootConstrainSelectedInstOperands,
5867 /* 16950 */ // GIR_Coverage, 262,
5868 /* 16950 */ GIR_EraseRootFromParent_Done,
5869 /* 16951 */ // Label 409: @16951
5870 /* 16951 */ GIM_Try, /*On fail goto*//*Label 410*/ GIMT_Encode4(16990), // Rule ID 263 //
5871 /* 16956 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5872 /* 16959 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitmask),
5873 /* 16964 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5874 /* 16967 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
5875 /* 16970 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5876 /* 16974 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5877 /* 16978 */ // (intrinsic_wo_chain:{ *:[i32] } 14432:{ *:[iPTR] }, V128:{ *:[v8i16] }:$vec) => (BITMASK_I16x8:{ *:[i32] } V128:{ *:[v8i16] }:$vec)
5878 /* 16978 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I16x8),
5879 /* 16981 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5880 /* 16983 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5881 /* 16985 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5882 /* 16988 */ GIR_RootConstrainSelectedInstOperands,
5883 /* 16989 */ // GIR_Coverage, 263,
5884 /* 16989 */ GIR_EraseRootFromParent_Done,
5885 /* 16990 */ // Label 410: @16990
5886 /* 16990 */ GIM_Try, /*On fail goto*//*Label 411*/ GIMT_Encode4(17029), // Rule ID 264 //
5887 /* 16995 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5888 /* 16998 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitmask),
5889 /* 17003 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5890 /* 17006 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
5891 /* 17009 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5892 /* 17013 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5893 /* 17017 */ // (intrinsic_wo_chain:{ *:[i32] } 14432:{ *:[iPTR] }, V128:{ *:[v4i32] }:$vec) => (BITMASK_I32x4:{ *:[i32] } V128:{ *:[v4i32] }:$vec)
5894 /* 17017 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I32x4),
5895 /* 17020 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5896 /* 17022 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5897 /* 17024 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5898 /* 17027 */ GIR_RootConstrainSelectedInstOperands,
5899 /* 17028 */ // GIR_Coverage, 264,
5900 /* 17028 */ GIR_EraseRootFromParent_Done,
5901 /* 17029 */ // Label 411: @17029
5902 /* 17029 */ GIM_Try, /*On fail goto*//*Label 412*/ GIMT_Encode4(17068), // Rule ID 265 //
5903 /* 17034 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5904 /* 17037 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitmask),
5905 /* 17042 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5906 /* 17045 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
5907 /* 17048 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5908 /* 17052 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5909 /* 17056 */ // (intrinsic_wo_chain:{ *:[i32] } 14432:{ *:[iPTR] }, V128:{ *:[v2i64] }:$vec) => (BITMASK_I64x2:{ *:[i32] } V128:{ *:[v2i64] }:$vec)
5910 /* 17056 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I64x2),
5911 /* 17059 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5912 /* 17061 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5913 /* 17063 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5914 /* 17066 */ GIR_RootConstrainSelectedInstOperands,
5915 /* 17067 */ // GIR_Coverage, 265,
5916 /* 17067 */ GIR_EraseRootFromParent_Done,
5917 /* 17068 */ // Label 412: @17068
5918 /* 17068 */ GIM_Try, /*On fail goto*//*Label 413*/ GIMT_Encode4(17107), // Rule ID 447 //
5919 /* 17073 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
5920 /* 17076 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_signed),
5921 /* 17081 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
5922 /* 17084 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
5923 /* 17087 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5924 /* 17091 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5925 /* 17095 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14471:{ *:[iPTR] }, V128:{ *:[v4f32] }:$vec) => (int_wasm_relaxed_trunc_signed_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
5926 /* 17095 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_signed_I32x4),
5927 /* 17098 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5928 /* 17100 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5929 /* 17102 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5930 /* 17105 */ GIR_RootConstrainSelectedInstOperands,
5931 /* 17106 */ // GIR_Coverage, 447,
5932 /* 17106 */ GIR_EraseRootFromParent_Done,
5933 /* 17107 */ // Label 413: @17107
5934 /* 17107 */ GIM_Try, /*On fail goto*//*Label 414*/ GIMT_Encode4(17146), // Rule ID 448 //
5935 /* 17112 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
5936 /* 17115 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_unsigned),
5937 /* 17120 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
5938 /* 17123 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
5939 /* 17126 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5940 /* 17130 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5941 /* 17134 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14473:{ *:[iPTR] }, V128:{ *:[v4f32] }:$vec) => (int_wasm_relaxed_trunc_unsigned_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
5942 /* 17134 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_unsigned_I32x4),
5943 /* 17137 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5944 /* 17139 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5945 /* 17141 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5946 /* 17144 */ GIR_RootConstrainSelectedInstOperands,
5947 /* 17145 */ // GIR_Coverage, 448,
5948 /* 17145 */ GIR_EraseRootFromParent_Done,
5949 /* 17146 */ // Label 414: @17146
5950 /* 17146 */ GIM_Try, /*On fail goto*//*Label 415*/ GIMT_Encode4(17185), // Rule ID 449 //
5951 /* 17151 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
5952 /* 17154 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_signed_zero),
5953 /* 17159 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
5954 /* 17162 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
5955 /* 17165 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5956 /* 17169 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5957 /* 17173 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14472:{ *:[iPTR] }, V128:{ *:[v2f64] }:$vec) => (int_wasm_relaxed_trunc_signed_zero_I32x4:{ *:[v4i32] } V128:{ *:[v2f64] }:$vec)
5958 /* 17173 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_signed_zero_I32x4),
5959 /* 17176 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5960 /* 17178 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5961 /* 17180 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5962 /* 17183 */ GIR_RootConstrainSelectedInstOperands,
5963 /* 17184 */ // GIR_Coverage, 449,
5964 /* 17184 */ GIR_EraseRootFromParent_Done,
5965 /* 17185 */ // Label 415: @17185
5966 /* 17185 */ GIM_Try, /*On fail goto*//*Label 416*/ GIMT_Encode4(17224), // Rule ID 450 //
5967 /* 17190 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
5968 /* 17193 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_unsigned_zero),
5969 /* 17198 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
5970 /* 17201 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
5971 /* 17204 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5972 /* 17208 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5973 /* 17212 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14474:{ *:[iPTR] }, V128:{ *:[v2f64] }:$vec) => (int_wasm_relaxed_trunc_unsigned_zero_I32x4:{ *:[v4i32] } V128:{ *:[v2f64] }:$vec)
5974 /* 17212 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_unsigned_zero_I32x4),
5975 /* 17215 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5976 /* 17217 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5977 /* 17219 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5978 /* 17222 */ GIR_RootConstrainSelectedInstOperands,
5979 /* 17223 */ // GIR_Coverage, 450,
5980 /* 17223 */ GIR_EraseRootFromParent_Done,
5981 /* 17224 */ // Label 416: @17224
5982 /* 17224 */ GIM_Try, /*On fail goto*//*Label 417*/ GIMT_Encode4(17260), // Rule ID 642 //
5983 /* 17229 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
5984 /* 17234 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5985 /* 17237 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5986 /* 17240 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5987 /* 17244 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5988 /* 17248 */ // (intrinsic_wo_chain:{ *:[i32] } 14501:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I32_TRUNC_S_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
5989 /* 17248 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_F32),
5990 /* 17251 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5991 /* 17253 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
5992 /* 17255 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5993 /* 17258 */ GIR_RootConstrainSelectedInstOperands,
5994 /* 17259 */ // GIR_Coverage, 642,
5995 /* 17259 */ GIR_EraseRootFromParent_Done,
5996 /* 17260 */ // Label 417: @17260
5997 /* 17260 */ GIM_Try, /*On fail goto*//*Label 418*/ GIMT_Encode4(17296), // Rule ID 643 //
5998 /* 17265 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
5999 /* 17270 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
6000 /* 17273 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
6001 /* 17276 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6002 /* 17280 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6003 /* 17284 */ // (intrinsic_wo_chain:{ *:[i32] } 14502:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I32_TRUNC_U_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
6004 /* 17284 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_F32),
6005 /* 17287 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6006 /* 17289 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6007 /* 17291 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6008 /* 17294 */ GIR_RootConstrainSelectedInstOperands,
6009 /* 17295 */ // GIR_Coverage, 643,
6010 /* 17295 */ GIR_EraseRootFromParent_Done,
6011 /* 17296 */ // Label 418: @17296
6012 /* 17296 */ GIM_Try, /*On fail goto*//*Label 419*/ GIMT_Encode4(17332), // Rule ID 644 //
6013 /* 17301 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
6014 /* 17306 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
6015 /* 17309 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6016 /* 17312 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6017 /* 17316 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
6018 /* 17320 */ // (intrinsic_wo_chain:{ *:[i32] } 14501:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I32_TRUNC_S_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
6019 /* 17320 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_F64),
6020 /* 17323 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6021 /* 17325 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6022 /* 17327 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6023 /* 17330 */ GIR_RootConstrainSelectedInstOperands,
6024 /* 17331 */ // GIR_Coverage, 644,
6025 /* 17331 */ GIR_EraseRootFromParent_Done,
6026 /* 17332 */ // Label 419: @17332
6027 /* 17332 */ GIM_Try, /*On fail goto*//*Label 420*/ GIMT_Encode4(17368), // Rule ID 645 //
6028 /* 17337 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
6029 /* 17342 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
6030 /* 17345 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6031 /* 17348 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6032 /* 17352 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
6033 /* 17356 */ // (intrinsic_wo_chain:{ *:[i32] } 14502:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I32_TRUNC_U_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
6034 /* 17356 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_F64),
6035 /* 17359 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6036 /* 17361 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6037 /* 17363 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6038 /* 17366 */ GIR_RootConstrainSelectedInstOperands,
6039 /* 17367 */ // GIR_Coverage, 645,
6040 /* 17367 */ GIR_EraseRootFromParent_Done,
6041 /* 17368 */ // Label 420: @17368
6042 /* 17368 */ GIM_Try, /*On fail goto*//*Label 421*/ GIMT_Encode4(17404), // Rule ID 646 //
6043 /* 17373 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
6044 /* 17378 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
6045 /* 17381 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
6046 /* 17384 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6047 /* 17388 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6048 /* 17392 */ // (intrinsic_wo_chain:{ *:[i64] } 14501:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I64_TRUNC_S_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
6049 /* 17392 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_F32),
6050 /* 17395 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6051 /* 17397 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6052 /* 17399 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6053 /* 17402 */ GIR_RootConstrainSelectedInstOperands,
6054 /* 17403 */ // GIR_Coverage, 646,
6055 /* 17403 */ GIR_EraseRootFromParent_Done,
6056 /* 17404 */ // Label 421: @17404
6057 /* 17404 */ GIM_Try, /*On fail goto*//*Label 422*/ GIMT_Encode4(17440), // Rule ID 647 //
6058 /* 17409 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
6059 /* 17414 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
6060 /* 17417 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
6061 /* 17420 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6062 /* 17424 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6063 /* 17428 */ // (intrinsic_wo_chain:{ *:[i64] } 14502:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I64_TRUNC_U_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
6064 /* 17428 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_F32),
6065 /* 17431 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6066 /* 17433 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6067 /* 17435 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6068 /* 17438 */ GIR_RootConstrainSelectedInstOperands,
6069 /* 17439 */ // GIR_Coverage, 647,
6070 /* 17439 */ GIR_EraseRootFromParent_Done,
6071 /* 17440 */ // Label 422: @17440
6072 /* 17440 */ GIM_Try, /*On fail goto*//*Label 423*/ GIMT_Encode4(17476), // Rule ID 648 //
6073 /* 17445 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
6074 /* 17450 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
6075 /* 17453 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6076 /* 17456 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6077 /* 17460 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
6078 /* 17464 */ // (intrinsic_wo_chain:{ *:[i64] } 14501:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I64_TRUNC_S_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
6079 /* 17464 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_F64),
6080 /* 17467 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6081 /* 17469 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6082 /* 17471 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6083 /* 17474 */ GIR_RootConstrainSelectedInstOperands,
6084 /* 17475 */ // GIR_Coverage, 648,
6085 /* 17475 */ GIR_EraseRootFromParent_Done,
6086 /* 17476 */ // Label 423: @17476
6087 /* 17476 */ GIM_Try, /*On fail goto*//*Label 424*/ GIMT_Encode4(17512), // Rule ID 649 //
6088 /* 17481 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
6089 /* 17486 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
6090 /* 17489 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6091 /* 17492 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6092 /* 17496 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
6093 /* 17500 */ // (intrinsic_wo_chain:{ *:[i64] } 14502:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I64_TRUNC_U_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
6094 /* 17500 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_F64),
6095 /* 17503 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6096 /* 17505 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6097 /* 17507 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6098 /* 17510 */ GIR_RootConstrainSelectedInstOperands,
6099 /* 17511 */ // GIR_Coverage, 649,
6100 /* 17511 */ GIR_EraseRootFromParent_Done,
6101 /* 17512 */ // Label 424: @17512
6102 /* 17512 */ GIM_Try, /*On fail goto*//*Label 425*/ GIMT_Encode4(17548), // Rule ID 1110 //
6103 /* 17517 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
6104 /* 17522 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
6105 /* 17525 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6106 /* 17528 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6107 /* 17532 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6108 /* 17536 */ // (intrinsic_wo_chain:{ *:[i32] } 14430:{ *:[iPTR] }, V128:{ *:[v16i8] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v16i8] }:$vec)
6109 /* 17536 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
6110 /* 17539 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6111 /* 17541 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6112 /* 17543 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6113 /* 17546 */ GIR_RootConstrainSelectedInstOperands,
6114 /* 17547 */ // GIR_Coverage, 1110,
6115 /* 17547 */ GIR_EraseRootFromParent_Done,
6116 /* 17548 */ // Label 425: @17548
6117 /* 17548 */ GIM_Try, /*On fail goto*//*Label 426*/ GIMT_Encode4(17584), // Rule ID 1111 //
6118 /* 17553 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
6119 /* 17558 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
6120 /* 17561 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6121 /* 17564 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6122 /* 17568 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6123 /* 17572 */ // (intrinsic_wo_chain:{ *:[i32] } 14430:{ *:[iPTR] }, V128:{ *:[v8i16] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v8i16] }:$vec)
6124 /* 17572 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
6125 /* 17575 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6126 /* 17577 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6127 /* 17579 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6128 /* 17582 */ GIR_RootConstrainSelectedInstOperands,
6129 /* 17583 */ // GIR_Coverage, 1111,
6130 /* 17583 */ GIR_EraseRootFromParent_Done,
6131 /* 17584 */ // Label 426: @17584
6132 /* 17584 */ GIM_Try, /*On fail goto*//*Label 427*/ GIMT_Encode4(17620), // Rule ID 1112 //
6133 /* 17589 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
6134 /* 17594 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
6135 /* 17597 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6136 /* 17600 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6137 /* 17604 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6138 /* 17608 */ // (intrinsic_wo_chain:{ *:[i32] } 14430:{ *:[iPTR] }, V128:{ *:[v4i32] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v4i32] }:$vec)
6139 /* 17608 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
6140 /* 17611 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6141 /* 17613 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6142 /* 17615 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6143 /* 17618 */ GIR_RootConstrainSelectedInstOperands,
6144 /* 17619 */ // GIR_Coverage, 1112,
6145 /* 17619 */ GIR_EraseRootFromParent_Done,
6146 /* 17620 */ // Label 427: @17620
6147 /* 17620 */ GIM_Try, /*On fail goto*//*Label 428*/ GIMT_Encode4(17656), // Rule ID 1113 //
6148 /* 17625 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
6149 /* 17630 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
6150 /* 17633 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6151 /* 17636 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6152 /* 17640 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6153 /* 17644 */ // (intrinsic_wo_chain:{ *:[i32] } 14430:{ *:[iPTR] }, V128:{ *:[v2i64] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v2i64] }:$vec)
6154 /* 17644 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
6155 /* 17647 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6156 /* 17649 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6157 /* 17651 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6158 /* 17654 */ GIR_RootConstrainSelectedInstOperands,
6159 /* 17655 */ // GIR_Coverage, 1113,
6160 /* 17655 */ GIR_EraseRootFromParent_Done,
6161 /* 17656 */ // Label 428: @17656
6162 /* 17656 */ GIM_Try, /*On fail goto*//*Label 429*/ GIMT_Encode4(17692), // Rule ID 1231 //
6163 /* 17661 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_unsigned),
6164 /* 17666 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6165 /* 17669 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6166 /* 17672 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6167 /* 17676 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6168 /* 17680 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14437:{ *:[iPTR] }, V128:{ *:[v8i16] }:$in) => (extadd_pairwise_u_I32x4:{ *:[v4i32] } V128:{ *:[v8i16] }:$in)
6169 /* 17680 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_u_I32x4),
6170 /* 17683 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6171 /* 17685 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
6172 /* 17687 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6173 /* 17690 */ GIR_RootConstrainSelectedInstOperands,
6174 /* 17691 */ // GIR_Coverage, 1231,
6175 /* 17691 */ GIR_EraseRootFromParent_Done,
6176 /* 17692 */ // Label 429: @17692
6177 /* 17692 */ GIM_Try, /*On fail goto*//*Label 430*/ GIMT_Encode4(17728), // Rule ID 1232 //
6178 /* 17697 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_unsigned),
6179 /* 17702 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6180 /* 17705 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6181 /* 17708 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6182 /* 17712 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6183 /* 17716 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14437:{ *:[iPTR] }, V128:{ *:[v16i8] }:$in) => (extadd_pairwise_u_I16x8:{ *:[v8i16] } V128:{ *:[v16i8] }:$in)
6184 /* 17716 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_u_I16x8),
6185 /* 17719 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6186 /* 17721 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
6187 /* 17723 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6188 /* 17726 */ GIR_RootConstrainSelectedInstOperands,
6189 /* 17727 */ // GIR_Coverage, 1232,
6190 /* 17727 */ GIR_EraseRootFromParent_Done,
6191 /* 17728 */ // Label 430: @17728
6192 /* 17728 */ GIM_Try, /*On fail goto*//*Label 431*/ GIMT_Encode4(17764), // Rule ID 1233 //
6193 /* 17733 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_signed),
6194 /* 17738 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6195 /* 17741 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6196 /* 17744 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6197 /* 17748 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6198 /* 17752 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14436:{ *:[iPTR] }, V128:{ *:[v8i16] }:$in) => (extadd_pairwise_s_I32x4:{ *:[v4i32] } V128:{ *:[v8i16] }:$in)
6199 /* 17752 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_s_I32x4),
6200 /* 17755 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6201 /* 17757 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
6202 /* 17759 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6203 /* 17762 */ GIR_RootConstrainSelectedInstOperands,
6204 /* 17763 */ // GIR_Coverage, 1233,
6205 /* 17763 */ GIR_EraseRootFromParent_Done,
6206 /* 17764 */ // Label 431: @17764
6207 /* 17764 */ GIM_Try, /*On fail goto*//*Label 432*/ GIMT_Encode4(17800), // Rule ID 1234 //
6208 /* 17769 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_signed),
6209 /* 17774 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6210 /* 17777 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6211 /* 17780 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6212 /* 17784 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6213 /* 17788 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14436:{ *:[iPTR] }, V128:{ *:[v16i8] }:$in) => (extadd_pairwise_s_I16x8:{ *:[v8i16] } V128:{ *:[v16i8] }:$in)
6214 /* 17788 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_s_I16x8),
6215 /* 17791 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6216 /* 17793 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
6217 /* 17795 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6218 /* 17798 */ GIR_RootConstrainSelectedInstOperands,
6219 /* 17799 */ // GIR_Coverage, 1234,
6220 /* 17799 */ GIR_EraseRootFromParent_Done,
6221 /* 17800 */ // Label 432: @17800
6222 /* 17800 */ GIM_Reject,
6223 /* 17801 */ // Label 403: @17801
6224 /* 17801 */ GIM_Try, /*On fail goto*//*Label 433*/ GIMT_Encode4(18904),
6225 /* 17806 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
6226 /* 17809 */ GIM_Try, /*On fail goto*//*Label 434*/ GIMT_Encode4(17868), // Rule ID 187 //
6227 /* 17814 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
6228 /* 17817 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extract_lane_f16x8),
6229 /* 17822 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
6230 /* 17825 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6231 /* 17828 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
6232 /* 17831 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6233 /* 17835 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6234 /* 17839 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
6235 /* 17843 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
6236 /* 17847 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
6237 /* 17851 */ // MIs[1] Operand 1
6238 /* 17851 */ // No operand predicates
6239 /* 17851 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
6240 /* 17853 */ // (intrinsic_wo_chain:{ *:[f32] } 14438:{ *:[iPTR] }, V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx) => (EXTRACT_LANE_F16x8:{ *:[f32] } V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] }):$idx)
6241 /* 17853 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EXTRACT_LANE_F16x8),
6242 /* 17856 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6243 /* 17858 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6244 /* 17860 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
6245 /* 17863 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6246 /* 17866 */ GIR_RootConstrainSelectedInstOperands,
6247 /* 17867 */ // GIR_Coverage, 187,
6248 /* 17867 */ GIR_EraseRootFromParent_Done,
6249 /* 17868 */ // Label 434: @17868
6250 /* 17868 */ GIM_Try, /*On fail goto*//*Label 435*/ GIMT_Encode4(17916), // Rule ID 309 //
6251 /* 17873 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
6252 /* 17876 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_avgr_unsigned),
6253 /* 17881 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
6254 /* 17884 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6255 /* 17887 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
6256 /* 17890 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6257 /* 17894 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6258 /* 17898 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6259 /* 17902 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14431:{ *:[iPTR] }, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (AVGR_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
6260 /* 17902 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I8x16),
6261 /* 17905 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6262 /* 17907 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6263 /* 17909 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6264 /* 17911 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6265 /* 17914 */ GIR_RootConstrainSelectedInstOperands,
6266 /* 17915 */ // GIR_Coverage, 309,
6267 /* 17915 */ GIR_EraseRootFromParent_Done,
6268 /* 17916 */ // Label 435: @17916
6269 /* 17916 */ GIM_Try, /*On fail goto*//*Label 436*/ GIMT_Encode4(17964), // Rule ID 310 //
6270 /* 17921 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
6271 /* 17924 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_avgr_unsigned),
6272 /* 17929 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6273 /* 17932 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6274 /* 17935 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6275 /* 17938 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6276 /* 17942 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6277 /* 17946 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6278 /* 17950 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14431:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (AVGR_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
6279 /* 17950 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I16x8),
6280 /* 17953 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6281 /* 17955 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6282 /* 17957 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6283 /* 17959 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6284 /* 17962 */ GIR_RootConstrainSelectedInstOperands,
6285 /* 17963 */ // GIR_Coverage, 310,
6286 /* 17963 */ GIR_EraseRootFromParent_Done,
6287 /* 17964 */ // Label 436: @17964
6288 /* 17964 */ GIM_Try, /*On fail goto*//*Label 437*/ GIMT_Encode4(18012), // Rule ID 311 //
6289 /* 17969 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
6290 /* 17972 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_dot),
6291 /* 17977 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6292 /* 17980 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6293 /* 17983 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6294 /* 17986 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6295 /* 17990 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6296 /* 17994 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6297 /* 17998 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14435:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (DOT:{ *:[v4i32] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
6298 /* 17998 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::DOT),
6299 /* 18001 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6300 /* 18003 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6301 /* 18005 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6302 /* 18007 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6303 /* 18010 */ GIR_RootConstrainSelectedInstOperands,
6304 /* 18011 */ // GIR_Coverage, 311,
6305 /* 18011 */ GIR_EraseRootFromParent_Done,
6306 /* 18012 */ // Label 437: @18012
6307 /* 18012 */ GIM_Try, /*On fail goto*//*Label 438*/ GIMT_Encode4(18060), // Rule ID 435 //
6308 /* 18017 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
6309 /* 18020 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_signed),
6310 /* 18025 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
6311 /* 18028 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6312 /* 18031 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6313 /* 18034 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6314 /* 18038 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6315 /* 18042 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6316 /* 18046 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14449:{ *:[iPTR] }, V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high) => (NARROW_S_I8x16:{ *:[v16i8] } V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high)
6317 /* 18046 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_S_I8x16),
6318 /* 18049 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6319 /* 18051 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
6320 /* 18053 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
6321 /* 18055 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6322 /* 18058 */ GIR_RootConstrainSelectedInstOperands,
6323 /* 18059 */ // GIR_Coverage, 435,
6324 /* 18059 */ GIR_EraseRootFromParent_Done,
6325 /* 18060 */ // Label 438: @18060
6326 /* 18060 */ GIM_Try, /*On fail goto*//*Label 439*/ GIMT_Encode4(18108), // Rule ID 436 //
6327 /* 18065 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
6328 /* 18068 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_unsigned),
6329 /* 18073 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
6330 /* 18076 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6331 /* 18079 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6332 /* 18082 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6333 /* 18086 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6334 /* 18090 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6335 /* 18094 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14450:{ *:[iPTR] }, V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high) => (NARROW_U_I8x16:{ *:[v16i8] } V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high)
6336 /* 18094 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_U_I8x16),
6337 /* 18097 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6338 /* 18099 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
6339 /* 18101 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
6340 /* 18103 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6341 /* 18106 */ GIR_RootConstrainSelectedInstOperands,
6342 /* 18107 */ // GIR_Coverage, 436,
6343 /* 18107 */ GIR_EraseRootFromParent_Done,
6344 /* 18108 */ // Label 439: @18108
6345 /* 18108 */ GIM_Try, /*On fail goto*//*Label 440*/ GIMT_Encode4(18156), // Rule ID 437 //
6346 /* 18113 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
6347 /* 18116 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_signed),
6348 /* 18121 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6349 /* 18124 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6350 /* 18127 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6351 /* 18130 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6352 /* 18134 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6353 /* 18138 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6354 /* 18142 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14449:{ *:[iPTR] }, V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high) => (NARROW_S_I16x8:{ *:[v8i16] } V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high)
6355 /* 18142 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_S_I16x8),
6356 /* 18145 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6357 /* 18147 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
6358 /* 18149 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
6359 /* 18151 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6360 /* 18154 */ GIR_RootConstrainSelectedInstOperands,
6361 /* 18155 */ // GIR_Coverage, 437,
6362 /* 18155 */ GIR_EraseRootFromParent_Done,
6363 /* 18156 */ // Label 440: @18156
6364 /* 18156 */ GIM_Try, /*On fail goto*//*Label 441*/ GIMT_Encode4(18204), // Rule ID 438 //
6365 /* 18161 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
6366 /* 18164 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_unsigned),
6367 /* 18169 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6368 /* 18172 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6369 /* 18175 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6370 /* 18178 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6371 /* 18182 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6372 /* 18186 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6373 /* 18190 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14450:{ *:[iPTR] }, V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high) => (NARROW_U_I16x8:{ *:[v8i16] } V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high)
6374 /* 18190 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_U_I16x8),
6375 /* 18193 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6376 /* 18195 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
6377 /* 18197 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
6378 /* 18199 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6379 /* 18202 */ GIR_RootConstrainSelectedInstOperands,
6380 /* 18203 */ // GIR_Coverage, 438,
6381 /* 18203 */ GIR_EraseRootFromParent_Done,
6382 /* 18204 */ // Label 441: @18204
6383 /* 18204 */ GIM_Try, /*On fail goto*//*Label 442*/ GIMT_Encode4(18252), // Rule ID 445 //
6384 /* 18209 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
6385 /* 18212 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_q15mulr_sat_signed),
6386 /* 18217 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6387 /* 18220 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6388 /* 18223 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6389 /* 18226 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6390 /* 18230 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6391 /* 18234 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6392 /* 18238 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14453:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (Q15MULR_SAT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
6393 /* 18238 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::Q15MULR_SAT_S_I16x8),
6394 /* 18241 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6395 /* 18243 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6396 /* 18245 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6397 /* 18247 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6398 /* 18250 */ GIR_RootConstrainSelectedInstOperands,
6399 /* 18251 */ // GIR_Coverage, 445,
6400 /* 18251 */ GIR_EraseRootFromParent_Done,
6401 /* 18252 */ // Label 442: @18252
6402 /* 18252 */ GIM_Try, /*On fail goto*//*Label 443*/ GIMT_Encode4(18300), // Rule ID 446 //
6403 /* 18257 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6404 /* 18260 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_swizzle),
6405 /* 18265 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
6406 /* 18268 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6407 /* 18271 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
6408 /* 18274 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6409 /* 18278 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6410 /* 18282 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6411 /* 18286 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14470:{ *:[iPTR] }, V128:{ *:[v16i8] }:$src, V128:{ *:[v16i8] }:$mask) => (RELAXED_SWIZZLE:{ *:[v16i8] } V128:{ *:[v16i8] }:$src, V128:{ *:[v16i8] }:$mask)
6412 /* 18286 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_SWIZZLE),
6413 /* 18289 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6414 /* 18291 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6415 /* 18293 */ GIR_RootToRootCopy, /*OpIdx*/3, // mask
6416 /* 18295 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6417 /* 18298 */ GIR_RootConstrainSelectedInstOperands,
6418 /* 18299 */ // GIR_Coverage, 446,
6419 /* 18299 */ GIR_EraseRootFromParent_Done,
6420 /* 18300 */ // Label 443: @18300
6421 /* 18300 */ GIM_Try, /*On fail goto*//*Label 444*/ GIMT_Encode4(18348), // Rule ID 461 //
6422 /* 18305 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6423 /* 18308 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_min),
6424 /* 18313 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6425 /* 18316 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6426 /* 18319 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6427 /* 18322 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6428 /* 18326 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6429 /* 18330 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6430 /* 18334 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14467:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SIMD_RELAXED_FMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
6431 /* 18334 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F32x4),
6432 /* 18337 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6433 /* 18339 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6434 /* 18341 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6435 /* 18343 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6436 /* 18346 */ GIR_RootConstrainSelectedInstOperands,
6437 /* 18347 */ // GIR_Coverage, 461,
6438 /* 18347 */ GIR_EraseRootFromParent_Done,
6439 /* 18348 */ // Label 444: @18348
6440 /* 18348 */ GIM_Try, /*On fail goto*//*Label 445*/ GIMT_Encode4(18396), // Rule ID 462 //
6441 /* 18353 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6442 /* 18356 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_max),
6443 /* 18361 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6444 /* 18364 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6445 /* 18367 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6446 /* 18370 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6447 /* 18374 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6448 /* 18378 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6449 /* 18382 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14466:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SIMD_RELAXED_FMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
6450 /* 18382 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F32x4),
6451 /* 18385 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6452 /* 18387 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6453 /* 18389 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6454 /* 18391 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6455 /* 18394 */ GIR_RootConstrainSelectedInstOperands,
6456 /* 18395 */ // GIR_Coverage, 462,
6457 /* 18395 */ GIR_EraseRootFromParent_Done,
6458 /* 18396 */ // Label 445: @18396
6459 /* 18396 */ GIM_Try, /*On fail goto*//*Label 446*/ GIMT_Encode4(18444), // Rule ID 463 //
6460 /* 18401 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6461 /* 18404 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_min),
6462 /* 18409 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
6463 /* 18412 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6464 /* 18415 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
6465 /* 18418 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6466 /* 18422 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6467 /* 18426 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6468 /* 18430 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14467:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SIMD_RELAXED_FMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
6469 /* 18430 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F64x2),
6470 /* 18433 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6471 /* 18435 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6472 /* 18437 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6473 /* 18439 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6474 /* 18442 */ GIR_RootConstrainSelectedInstOperands,
6475 /* 18443 */ // GIR_Coverage, 463,
6476 /* 18443 */ GIR_EraseRootFromParent_Done,
6477 /* 18444 */ // Label 446: @18444
6478 /* 18444 */ GIM_Try, /*On fail goto*//*Label 447*/ GIMT_Encode4(18492), // Rule ID 464 //
6479 /* 18449 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6480 /* 18452 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_max),
6481 /* 18457 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
6482 /* 18460 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6483 /* 18463 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
6484 /* 18466 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6485 /* 18470 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6486 /* 18474 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6487 /* 18478 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14466:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SIMD_RELAXED_FMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
6488 /* 18478 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F64x2),
6489 /* 18481 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6490 /* 18483 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6491 /* 18485 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6492 /* 18487 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6493 /* 18490 */ GIR_RootConstrainSelectedInstOperands,
6494 /* 18491 */ // GIR_Coverage, 464,
6495 /* 18491 */ GIR_EraseRootFromParent_Done,
6496 /* 18492 */ // Label 447: @18492
6497 /* 18492 */ GIM_Try, /*On fail goto*//*Label 448*/ GIMT_Encode4(18540), // Rule ID 465 //
6498 /* 18497 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6499 /* 18500 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_q15mulr_signed),
6500 /* 18505 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6501 /* 18508 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6502 /* 18511 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6503 /* 18514 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6504 /* 18518 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6505 /* 18522 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6506 /* 18526 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14469:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (RELAXED_Q15MULR_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
6507 /* 18526 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_Q15MULR_S_I16x8),
6508 /* 18529 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6509 /* 18531 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6510 /* 18533 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6511 /* 18535 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6512 /* 18538 */ GIR_RootConstrainSelectedInstOperands,
6513 /* 18539 */ // GIR_Coverage, 465,
6514 /* 18539 */ GIR_EraseRootFromParent_Done,
6515 /* 18540 */ // Label 448: @18540
6516 /* 18540 */ GIM_Try, /*On fail goto*//*Label 449*/ GIMT_Encode4(18588), // Rule ID 466 //
6517 /* 18545 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6518 /* 18548 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_signed),
6519 /* 18553 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6520 /* 18556 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6521 /* 18559 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
6522 /* 18562 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6523 /* 18566 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6524 /* 18570 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6525 /* 18574 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14463:{ *:[iPTR] }, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (RELAXED_DOT:{ *:[v8i16] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
6526 /* 18574 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT),
6527 /* 18577 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6528 /* 18579 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6529 /* 18581 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6530 /* 18583 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6531 /* 18586 */ GIR_RootConstrainSelectedInstOperands,
6532 /* 18587 */ // GIR_Coverage, 466,
6533 /* 18587 */ GIR_EraseRootFromParent_Done,
6534 /* 18588 */ // Label 449: @18588
6535 /* 18588 */ GIM_Try, /*On fail goto*//*Label 450*/ GIMT_Encode4(18633), // Rule ID 1013 //
6536 /* 18593 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_swizzle),
6537 /* 18598 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
6538 /* 18601 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6539 /* 18604 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
6540 /* 18607 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6541 /* 18611 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6542 /* 18615 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6543 /* 18619 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14480:{ *:[iPTR] }, V128:{ *:[v16i8] }:$src, V128:{ *:[v16i8] }:$mask) => (SWIZZLE:{ *:[v16i8] } ?:{ *:[v16i8] }:$src, ?:{ *:[v16i8] }:$mask)
6544 /* 18619 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SWIZZLE),
6545 /* 18622 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6546 /* 18624 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6547 /* 18626 */ GIR_RootToRootCopy, /*OpIdx*/3, // mask
6548 /* 18628 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6549 /* 18631 */ GIR_RootConstrainSelectedInstOperands,
6550 /* 18632 */ // GIR_Coverage, 1013,
6551 /* 18632 */ GIR_EraseRootFromParent_Done,
6552 /* 18633 */ // Label 450: @18633
6553 /* 18633 */ GIM_Try, /*On fail goto*//*Label 451*/ GIMT_Encode4(18678), // Rule ID 1171 //
6554 /* 18638 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmin),
6555 /* 18643 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6556 /* 18646 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6557 /* 18649 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6558 /* 18652 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6559 /* 18656 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6560 /* 18660 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6561 /* 18664 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14452:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (PMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
6562 /* 18664 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
6563 /* 18667 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6564 /* 18669 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6565 /* 18671 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6566 /* 18673 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6567 /* 18676 */ GIR_RootConstrainSelectedInstOperands,
6568 /* 18677 */ // GIR_Coverage, 1171,
6569 /* 18677 */ GIR_EraseRootFromParent_Done,
6570 /* 18678 */ // Label 451: @18678
6571 /* 18678 */ GIM_Try, /*On fail goto*//*Label 452*/ GIMT_Encode4(18723), // Rule ID 1172 //
6572 /* 18683 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmax),
6573 /* 18688 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6574 /* 18691 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6575 /* 18694 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6576 /* 18697 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6577 /* 18701 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6578 /* 18705 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6579 /* 18709 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14451:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (PMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
6580 /* 18709 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
6581 /* 18712 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6582 /* 18714 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6583 /* 18716 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6584 /* 18718 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6585 /* 18721 */ GIR_RootConstrainSelectedInstOperands,
6586 /* 18722 */ // GIR_Coverage, 1172,
6587 /* 18722 */ GIR_EraseRootFromParent_Done,
6588 /* 18723 */ // Label 452: @18723
6589 /* 18723 */ GIM_Try, /*On fail goto*//*Label 453*/ GIMT_Encode4(18768), // Rule ID 1173 //
6590 /* 18728 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmin),
6591 /* 18733 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
6592 /* 18736 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6593 /* 18739 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
6594 /* 18742 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6595 /* 18746 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6596 /* 18750 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6597 /* 18754 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14452:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (PMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
6598 /* 18754 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
6599 /* 18757 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6600 /* 18759 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6601 /* 18761 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6602 /* 18763 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6603 /* 18766 */ GIR_RootConstrainSelectedInstOperands,
6604 /* 18767 */ // GIR_Coverage, 1173,
6605 /* 18767 */ GIR_EraseRootFromParent_Done,
6606 /* 18768 */ // Label 453: @18768
6607 /* 18768 */ GIM_Try, /*On fail goto*//*Label 454*/ GIMT_Encode4(18813), // Rule ID 1174 //
6608 /* 18773 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmax),
6609 /* 18778 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
6610 /* 18781 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6611 /* 18784 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
6612 /* 18787 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6613 /* 18791 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6614 /* 18795 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6615 /* 18799 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14451:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (PMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
6616 /* 18799 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
6617 /* 18802 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6618 /* 18804 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6619 /* 18806 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6620 /* 18808 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6621 /* 18811 */ GIR_RootConstrainSelectedInstOperands,
6622 /* 18812 */ // GIR_Coverage, 1174,
6623 /* 18812 */ GIR_EraseRootFromParent_Done,
6624 /* 18813 */ // Label 454: @18813
6625 /* 18813 */ GIM_Try, /*On fail goto*//*Label 455*/ GIMT_Encode4(18858), // Rule ID 1175 //
6626 /* 18818 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmin),
6627 /* 18823 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6628 /* 18826 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6629 /* 18829 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6630 /* 18832 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6631 /* 18836 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6632 /* 18840 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6633 /* 18844 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14452:{ *:[iPTR] }, V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (PMIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
6634 /* 18844 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
6635 /* 18847 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6636 /* 18849 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6637 /* 18851 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6638 /* 18853 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6639 /* 18856 */ GIR_RootConstrainSelectedInstOperands,
6640 /* 18857 */ // GIR_Coverage, 1175,
6641 /* 18857 */ GIR_EraseRootFromParent_Done,
6642 /* 18858 */ // Label 455: @18858
6643 /* 18858 */ GIM_Try, /*On fail goto*//*Label 456*/ GIMT_Encode4(18903), // Rule ID 1176 //
6644 /* 18863 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmax),
6645 /* 18868 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6646 /* 18871 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6647 /* 18874 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6648 /* 18877 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6649 /* 18881 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6650 /* 18885 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6651 /* 18889 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14451:{ *:[iPTR] }, V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (PMAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
6652 /* 18889 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
6653 /* 18892 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6654 /* 18894 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6655 /* 18896 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6656 /* 18898 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6657 /* 18901 */ GIR_RootConstrainSelectedInstOperands,
6658 /* 18902 */ // GIR_Coverage, 1176,
6659 /* 18902 */ GIR_EraseRootFromParent_Done,
6660 /* 18903 */ // Label 456: @18903
6661 /* 18903 */ GIM_Reject,
6662 /* 18904 */ // Label 433: @18904
6663 /* 18904 */ GIM_Try, /*On fail goto*//*Label 457*/ GIMT_Encode4(19983),
6664 /* 18909 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
6665 /* 18912 */ GIM_Try, /*On fail goto*//*Label 458*/ GIMT_Encode4(18980), // Rule ID 194 //
6666 /* 18917 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
6667 /* 18920 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_replace_lane_f16x8),
6668 /* 18925 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6669 /* 18928 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6670 /* 18931 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
6671 /* 18934 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
6672 /* 18937 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6673 /* 18941 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6674 /* 18945 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
6675 /* 18949 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
6676 /* 18953 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
6677 /* 18957 */ // MIs[1] Operand 1
6678 /* 18957 */ // No operand predicates
6679 /* 18957 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6680 /* 18961 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
6681 /* 18963 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14475:{ *:[iPTR] }, V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx, F32:{ *:[f32] }:$x) => (REPLACE_LANE_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] }):$idx, F32:{ *:[f32] }:$x)
6682 /* 18963 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_F16x8),
6683 /* 18966 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6684 /* 18968 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6685 /* 18970 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
6686 /* 18973 */ GIR_RootToRootCopy, /*OpIdx*/4, // x
6687 /* 18975 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6688 /* 18978 */ GIR_RootConstrainSelectedInstOperands,
6689 /* 18979 */ // GIR_Coverage, 194,
6690 /* 18979 */ GIR_EraseRootFromParent_Done,
6691 /* 18980 */ // Label 458: @18980
6692 /* 18980 */ GIM_Try, /*On fail goto*//*Label 459*/ GIMT_Encode4(19037), // Rule ID 451 //
6693 /* 18985 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128),
6694 /* 18988 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_madd),
6695 /* 18993 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6696 /* 18996 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6697 /* 18999 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6698 /* 19002 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
6699 /* 19005 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6700 /* 19009 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6701 /* 19013 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6702 /* 19017 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6703 /* 19021 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14465:{ *:[iPTR] }, V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c) => (MADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c)
6704 /* 19021 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F32x4),
6705 /* 19024 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6706 /* 19026 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6707 /* 19028 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6708 /* 19030 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6709 /* 19032 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6710 /* 19035 */ GIR_RootConstrainSelectedInstOperands,
6711 /* 19036 */ // GIR_Coverage, 451,
6712 /* 19036 */ GIR_EraseRootFromParent_Done,
6713 /* 19037 */ // Label 459: @19037
6714 /* 19037 */ GIM_Try, /*On fail goto*//*Label 460*/ GIMT_Encode4(19094), // Rule ID 452 //
6715 /* 19042 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128),
6716 /* 19045 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_nmadd),
6717 /* 19050 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6718 /* 19053 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6719 /* 19056 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6720 /* 19059 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
6721 /* 19062 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6722 /* 19066 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6723 /* 19070 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6724 /* 19074 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6725 /* 19078 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14468:{ *:[iPTR] }, V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c) => (NMADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c)
6726 /* 19078 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F32x4),
6727 /* 19081 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6728 /* 19083 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6729 /* 19085 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6730 /* 19087 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6731 /* 19089 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6732 /* 19092 */ GIR_RootConstrainSelectedInstOperands,
6733 /* 19093 */ // GIR_Coverage, 452,
6734 /* 19093 */ GIR_EraseRootFromParent_Done,
6735 /* 19094 */ // Label 460: @19094
6736 /* 19094 */ GIM_Try, /*On fail goto*//*Label 461*/ GIMT_Encode4(19151), // Rule ID 453 //
6737 /* 19099 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128),
6738 /* 19102 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_madd),
6739 /* 19107 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
6740 /* 19110 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6741 /* 19113 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
6742 /* 19116 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64,
6743 /* 19119 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6744 /* 19123 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6745 /* 19127 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6746 /* 19131 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6747 /* 19135 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14465:{ *:[iPTR] }, V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c) => (MADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c)
6748 /* 19135 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F64x2),
6749 /* 19138 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6750 /* 19140 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6751 /* 19142 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6752 /* 19144 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6753 /* 19146 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6754 /* 19149 */ GIR_RootConstrainSelectedInstOperands,
6755 /* 19150 */ // GIR_Coverage, 453,
6756 /* 19150 */ GIR_EraseRootFromParent_Done,
6757 /* 19151 */ // Label 461: @19151
6758 /* 19151 */ GIM_Try, /*On fail goto*//*Label 462*/ GIMT_Encode4(19208), // Rule ID 454 //
6759 /* 19156 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128),
6760 /* 19159 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_nmadd),
6761 /* 19164 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
6762 /* 19167 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6763 /* 19170 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
6764 /* 19173 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64,
6765 /* 19176 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6766 /* 19180 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6767 /* 19184 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6768 /* 19188 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6769 /* 19192 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14468:{ *:[iPTR] }, V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c) => (NMADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c)
6770 /* 19192 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F64x2),
6771 /* 19195 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6772 /* 19197 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6773 /* 19199 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6774 /* 19201 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6775 /* 19203 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6776 /* 19206 */ GIR_RootConstrainSelectedInstOperands,
6777 /* 19207 */ // GIR_Coverage, 454,
6778 /* 19207 */ GIR_EraseRootFromParent_Done,
6779 /* 19208 */ // Label 462: @19208
6780 /* 19208 */ GIM_Try, /*On fail goto*//*Label 463*/ GIMT_Encode4(19265), // Rule ID 457 //
6781 /* 19213 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6782 /* 19216 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_laneselect),
6783 /* 19221 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
6784 /* 19224 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6785 /* 19227 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
6786 /* 19230 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v16s8,
6787 /* 19233 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6788 /* 19237 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6789 /* 19241 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6790 /* 19245 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6791 /* 19249 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14464:{ *:[iPTR] }, V128:{ *:[v16i8] }:$a, V128:{ *:[v16i8] }:$b, V128:{ *:[v16i8] }:$c) => (LANESELECT_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$a, V128:{ *:[v16i8] }:$b, V128:{ *:[v16i8] }:$c)
6792 /* 19249 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I8x16),
6793 /* 19252 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6794 /* 19254 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6795 /* 19256 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6796 /* 19258 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6797 /* 19260 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6798 /* 19263 */ GIR_RootConstrainSelectedInstOperands,
6799 /* 19264 */ // GIR_Coverage, 457,
6800 /* 19264 */ GIR_EraseRootFromParent_Done,
6801 /* 19265 */ // Label 463: @19265
6802 /* 19265 */ GIM_Try, /*On fail goto*//*Label 464*/ GIMT_Encode4(19322), // Rule ID 458 //
6803 /* 19270 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6804 /* 19273 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_laneselect),
6805 /* 19278 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6806 /* 19281 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6807 /* 19284 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6808 /* 19287 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s16,
6809 /* 19290 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6810 /* 19294 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6811 /* 19298 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6812 /* 19302 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6813 /* 19306 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14464:{ *:[iPTR] }, V128:{ *:[v8i16] }:$a, V128:{ *:[v8i16] }:$b, V128:{ *:[v8i16] }:$c) => (LANESELECT_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$a, V128:{ *:[v8i16] }:$b, V128:{ *:[v8i16] }:$c)
6814 /* 19306 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I16x8),
6815 /* 19309 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6816 /* 19311 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6817 /* 19313 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6818 /* 19315 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6819 /* 19317 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6820 /* 19320 */ GIR_RootConstrainSelectedInstOperands,
6821 /* 19321 */ // GIR_Coverage, 458,
6822 /* 19321 */ GIR_EraseRootFromParent_Done,
6823 /* 19322 */ // Label 464: @19322
6824 /* 19322 */ GIM_Try, /*On fail goto*//*Label 465*/ GIMT_Encode4(19379), // Rule ID 459 //
6825 /* 19327 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6826 /* 19330 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_laneselect),
6827 /* 19335 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6828 /* 19338 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6829 /* 19341 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6830 /* 19344 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
6831 /* 19347 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6832 /* 19351 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6833 /* 19355 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6834 /* 19359 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6835 /* 19363 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14464:{ *:[iPTR] }, V128:{ *:[v4i32] }:$a, V128:{ *:[v4i32] }:$b, V128:{ *:[v4i32] }:$c) => (LANESELECT_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$a, V128:{ *:[v4i32] }:$b, V128:{ *:[v4i32] }:$c)
6836 /* 19363 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I32x4),
6837 /* 19366 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6838 /* 19368 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6839 /* 19370 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6840 /* 19372 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6841 /* 19374 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6842 /* 19377 */ GIR_RootConstrainSelectedInstOperands,
6843 /* 19378 */ // GIR_Coverage, 459,
6844 /* 19378 */ GIR_EraseRootFromParent_Done,
6845 /* 19379 */ // Label 465: @19379
6846 /* 19379 */ GIM_Try, /*On fail goto*//*Label 466*/ GIMT_Encode4(19436), // Rule ID 460 //
6847 /* 19384 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6848 /* 19387 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_laneselect),
6849 /* 19392 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
6850 /* 19395 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6851 /* 19398 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
6852 /* 19401 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64,
6853 /* 19404 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6854 /* 19408 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6855 /* 19412 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6856 /* 19416 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6857 /* 19420 */ // (intrinsic_wo_chain:{ *:[v2i64] } 14464:{ *:[iPTR] }, V128:{ *:[v2i64] }:$a, V128:{ *:[v2i64] }:$b, V128:{ *:[v2i64] }:$c) => (LANESELECT_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$a, V128:{ *:[v2i64] }:$b, V128:{ *:[v2i64] }:$c)
6858 /* 19420 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I64x2),
6859 /* 19423 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6860 /* 19425 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6861 /* 19427 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6862 /* 19429 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6863 /* 19431 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6864 /* 19434 */ GIR_RootConstrainSelectedInstOperands,
6865 /* 19435 */ // GIR_Coverage, 460,
6866 /* 19435 */ GIR_EraseRootFromParent_Done,
6867 /* 19436 */ // Label 466: @19436
6868 /* 19436 */ GIM_Try, /*On fail goto*//*Label 467*/ GIMT_Encode4(19493), // Rule ID 467 //
6869 /* 19441 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6870 /* 19444 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_add_signed),
6871 /* 19449 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6872 /* 19452 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6873 /* 19455 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
6874 /* 19458 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
6875 /* 19461 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6876 /* 19465 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6877 /* 19469 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6878 /* 19473 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6879 /* 19477 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14462:{ *:[iPTR] }, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc) => (RELAXED_DOT_ADD:{ *:[v4i32] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc)
6880 /* 19477 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_ADD),
6881 /* 19480 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6882 /* 19482 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6883 /* 19484 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6884 /* 19486 */ GIR_RootToRootCopy, /*OpIdx*/4, // acc
6885 /* 19488 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6886 /* 19491 */ GIR_RootConstrainSelectedInstOperands,
6887 /* 19492 */ // GIR_Coverage, 467,
6888 /* 19492 */ GIR_EraseRootFromParent_Done,
6889 /* 19493 */ // Label 467: @19493
6890 /* 19493 */ GIM_Try, /*On fail goto*//*Label 468*/ GIMT_Encode4(19550), // Rule ID 468 //
6891 /* 19498 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6892 /* 19501 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_bf16x8_add_f32),
6893 /* 19506 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6894 /* 19509 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6895 /* 19512 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6896 /* 19515 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
6897 /* 19518 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6898 /* 19522 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6899 /* 19526 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6900 /* 19530 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6901 /* 19534 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14461:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, V128:{ *:[v4f32] }:$acc) => (RELAXED_DOT_BFLOAT:{ *:[v4f32] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, V128:{ *:[v4f32] }:$acc)
6902 /* 19534 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_BFLOAT),
6903 /* 19537 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6904 /* 19539 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6905 /* 19541 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6906 /* 19543 */ GIR_RootToRootCopy, /*OpIdx*/4, // acc
6907 /* 19545 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6908 /* 19548 */ GIR_RootConstrainSelectedInstOperands,
6909 /* 19549 */ // GIR_Coverage, 468,
6910 /* 19549 */ GIR_EraseRootFromParent_Done,
6911 /* 19550 */ // Label 468: @19550
6912 /* 19550 */ GIM_Try, /*On fail goto*//*Label 469*/ GIMT_Encode4(19604), // Rule ID 1068 //
6913 /* 19555 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitselect),
6914 /* 19560 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
6915 /* 19563 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6916 /* 19566 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
6917 /* 19569 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v16s8,
6918 /* 19572 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6919 /* 19576 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6920 /* 19580 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6921 /* 19584 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6922 /* 19588 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14433:{ *:[iPTR] }, V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$c) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
6923 /* 19588 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
6924 /* 19591 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6925 /* 19593 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
6926 /* 19595 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
6927 /* 19597 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6928 /* 19599 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6929 /* 19602 */ GIR_RootConstrainSelectedInstOperands,
6930 /* 19603 */ // GIR_Coverage, 1068,
6931 /* 19603 */ GIR_EraseRootFromParent_Done,
6932 /* 19604 */ // Label 469: @19604
6933 /* 19604 */ GIM_Try, /*On fail goto*//*Label 470*/ GIMT_Encode4(19658), // Rule ID 1069 //
6934 /* 19609 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitselect),
6935 /* 19614 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6936 /* 19617 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6937 /* 19620 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6938 /* 19623 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s16,
6939 /* 19626 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6940 /* 19630 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6941 /* 19634 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6942 /* 19638 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6943 /* 19642 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14433:{ *:[iPTR] }, V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$c) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
6944 /* 19642 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
6945 /* 19645 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6946 /* 19647 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
6947 /* 19649 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
6948 /* 19651 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6949 /* 19653 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6950 /* 19656 */ GIR_RootConstrainSelectedInstOperands,
6951 /* 19657 */ // GIR_Coverage, 1069,
6952 /* 19657 */ GIR_EraseRootFromParent_Done,
6953 /* 19658 */ // Label 470: @19658
6954 /* 19658 */ GIM_Try, /*On fail goto*//*Label 471*/ GIMT_Encode4(19712), // Rule ID 1070 //
6955 /* 19663 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitselect),
6956 /* 19668 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6957 /* 19671 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6958 /* 19674 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6959 /* 19677 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
6960 /* 19680 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6961 /* 19684 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6962 /* 19688 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6963 /* 19692 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6964 /* 19696 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14433:{ *:[iPTR] }, V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$c) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
6965 /* 19696 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
6966 /* 19699 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6967 /* 19701 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
6968 /* 19703 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
6969 /* 19705 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6970 /* 19707 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6971 /* 19710 */ GIR_RootConstrainSelectedInstOperands,
6972 /* 19711 */ // GIR_Coverage, 1070,
6973 /* 19711 */ GIR_EraseRootFromParent_Done,
6974 /* 19712 */ // Label 471: @19712
6975 /* 19712 */ GIM_Try, /*On fail goto*//*Label 472*/ GIMT_Encode4(19766), // Rule ID 1071 //
6976 /* 19717 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitselect),
6977 /* 19722 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
6978 /* 19725 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6979 /* 19728 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
6980 /* 19731 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64,
6981 /* 19734 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6982 /* 19738 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6983 /* 19742 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6984 /* 19746 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6985 /* 19750 */ // (intrinsic_wo_chain:{ *:[v2i64] } 14433:{ *:[iPTR] }, V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$c) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
6986 /* 19750 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
6987 /* 19753 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6988 /* 19755 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
6989 /* 19757 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
6990 /* 19759 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6991 /* 19761 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6992 /* 19764 */ GIR_RootConstrainSelectedInstOperands,
6993 /* 19765 */ // GIR_Coverage, 1071,
6994 /* 19765 */ GIR_EraseRootFromParent_Done,
6995 /* 19766 */ // Label 472: @19766
6996 /* 19766 */ GIM_Try, /*On fail goto*//*Label 473*/ GIMT_Encode4(19820), // Rule ID 1072 //
6997 /* 19771 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitselect),
6998 /* 19776 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6999 /* 19779 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
7000 /* 19782 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
7001 /* 19785 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
7002 /* 19788 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7003 /* 19792 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7004 /* 19796 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7005 /* 19800 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7006 /* 19804 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14433:{ *:[iPTR] }, V128:{ *:[v4f32] }:$v1, V128:{ *:[v4f32] }:$v2, V128:{ *:[v4f32] }:$c) => (BITSELECT:{ *:[v4f32] } ?:{ *:[v4f32] }:$v1, ?:{ *:[v4f32] }:$v2, ?:{ *:[v4f32] }:$c)
7007 /* 19804 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
7008 /* 19807 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7009 /* 19809 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
7010 /* 19811 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
7011 /* 19813 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
7012 /* 19815 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7013 /* 19818 */ GIR_RootConstrainSelectedInstOperands,
7014 /* 19819 */ // GIR_Coverage, 1072,
7015 /* 19819 */ GIR_EraseRootFromParent_Done,
7016 /* 19820 */ // Label 473: @19820
7017 /* 19820 */ GIM_Try, /*On fail goto*//*Label 474*/ GIMT_Encode4(19874), // Rule ID 1073 //
7018 /* 19825 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitselect),
7019 /* 19830 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
7020 /* 19833 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
7021 /* 19836 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
7022 /* 19839 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64,
7023 /* 19842 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7024 /* 19846 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7025 /* 19850 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7026 /* 19854 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7027 /* 19858 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14433:{ *:[iPTR] }, V128:{ *:[v2f64] }:$v1, V128:{ *:[v2f64] }:$v2, V128:{ *:[v2f64] }:$c) => (BITSELECT:{ *:[v2f64] } ?:{ *:[v2f64] }:$v1, ?:{ *:[v2f64] }:$v2, ?:{ *:[v2f64] }:$c)
7028 /* 19858 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
7029 /* 19861 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7030 /* 19863 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
7031 /* 19865 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
7032 /* 19867 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
7033 /* 19869 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7034 /* 19872 */ GIR_RootConstrainSelectedInstOperands,
7035 /* 19873 */ // GIR_Coverage, 1073,
7036 /* 19873 */ GIR_EraseRootFromParent_Done,
7037 /* 19874 */ // Label 474: @19874
7038 /* 19874 */ GIM_Try, /*On fail goto*//*Label 475*/ GIMT_Encode4(19928), // Rule ID 1257 //
7039 /* 19879 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_madd),
7040 /* 19884 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
7041 /* 19887 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
7042 /* 19890 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
7043 /* 19893 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s16,
7044 /* 19896 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7045 /* 19900 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7046 /* 19904 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7047 /* 19908 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7048 /* 19912 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14465:{ *:[iPTR] }, V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (MADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
7049 /* 19912 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F16x8),
7050 /* 19915 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7051 /* 19917 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
7052 /* 19919 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
7053 /* 19921 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
7054 /* 19923 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7055 /* 19926 */ GIR_RootConstrainSelectedInstOperands,
7056 /* 19927 */ // GIR_Coverage, 1257,
7057 /* 19927 */ GIR_EraseRootFromParent_Done,
7058 /* 19928 */ // Label 475: @19928
7059 /* 19928 */ GIM_Try, /*On fail goto*//*Label 476*/ GIMT_Encode4(19982), // Rule ID 1258 //
7060 /* 19933 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_nmadd),
7061 /* 19938 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
7062 /* 19941 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
7063 /* 19944 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
7064 /* 19947 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s16,
7065 /* 19950 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7066 /* 19954 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7067 /* 19958 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7068 /* 19962 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7069 /* 19966 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14468:{ *:[iPTR] }, V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (NMADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
7070 /* 19966 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F16x8),
7071 /* 19969 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7072 /* 19971 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
7073 /* 19973 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
7074 /* 19975 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
7075 /* 19977 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7076 /* 19980 */ GIR_RootConstrainSelectedInstOperands,
7077 /* 19981 */ // GIR_Coverage, 1258,
7078 /* 19981 */ GIR_EraseRootFromParent_Done,
7079 /* 19982 */ // Label 476: @19982
7080 /* 19982 */ GIM_Reject,
7081 /* 19983 */ // Label 457: @19983
7082 /* 19983 */ GIM_Reject,
7083 /* 19984 */ // Label 18: @19984
7084 /* 19984 */ GIM_Try, /*On fail goto*//*Label 477*/ GIMT_Encode4(20084),
7085 /* 19989 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
7086 /* 19992 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_memory_size),
7087 /* 19997 */ GIM_Try, /*On fail goto*//*Label 478*/ GIMT_Encode4(20040), // Rule ID 11 //
7088 /* 20002 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
7089 /* 20005 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7090 /* 20008 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7091 /* 20012 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7092 /* 20016 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7093 /* 20020 */ // MIs[1] Operand 1
7094 /* 20020 */ // No operand predicates
7095 /* 20020 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7096 /* 20022 */ // (intrinsic_w_chain:{ *:[i32] } 14448:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags) => (anonymous_14761MEMORY_SIZE_A32:{ *:[i32] } (imm:{ *:[i32] }):$flags)
7097 /* 20022 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_14761MEMORY_SIZE_A32),
7098 /* 20025 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7099 /* 20027 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
7100 /* 20030 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7101 /* 20033 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7102 /* 20038 */ GIR_RootConstrainSelectedInstOperands,
7103 /* 20039 */ // GIR_Coverage, 11,
7104 /* 20039 */ GIR_EraseRootFromParent_Done,
7105 /* 20040 */ // Label 478: @20040
7106 /* 20040 */ GIM_Try, /*On fail goto*//*Label 479*/ GIMT_Encode4(20083), // Rule ID 13 //
7107 /* 20045 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
7108 /* 20048 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7109 /* 20051 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7110 /* 20055 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7111 /* 20059 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7112 /* 20063 */ // MIs[1] Operand 1
7113 /* 20063 */ // No operand predicates
7114 /* 20063 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7115 /* 20065 */ // (intrinsic_w_chain:{ *:[i64] } 14448:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags) => (anonymous_14762MEMORY_SIZE_A64:{ *:[i64] } (imm:{ *:[i32] }):$flags)
7116 /* 20065 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_14762MEMORY_SIZE_A64),
7117 /* 20068 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7118 /* 20070 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
7119 /* 20073 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7120 /* 20076 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7121 /* 20081 */ GIR_RootConstrainSelectedInstOperands,
7122 /* 20082 */ // GIR_Coverage, 13,
7123 /* 20082 */ GIR_EraseRootFromParent_Done,
7124 /* 20083 */ // Label 479: @20083
7125 /* 20083 */ GIM_Reject,
7126 /* 20084 */ // Label 477: @20084
7127 /* 20084 */ GIM_Try, /*On fail goto*//*Label 480*/ GIMT_Encode4(20202),
7128 /* 20089 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
7129 /* 20092 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_memory_grow),
7130 /* 20097 */ GIM_Try, /*On fail goto*//*Label 481*/ GIMT_Encode4(20149), // Rule ID 12 //
7131 /* 20102 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
7132 /* 20105 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7133 /* 20108 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
7134 /* 20111 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7135 /* 20115 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7136 /* 20119 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7137 /* 20123 */ // MIs[1] Operand 1
7138 /* 20123 */ // No operand predicates
7139 /* 20123 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7140 /* 20127 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7141 /* 20129 */ // (intrinsic_w_chain:{ *:[i32] } 14447:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags, I32:{ *:[i32] }:$delta) => (anonymous_14761MEMORY_GROW_A32:{ *:[i32] } (imm:{ *:[i32] }):$flags, I32:{ *:[i32] }:$delta)
7142 /* 20129 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_14761MEMORY_GROW_A32),
7143 /* 20132 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7144 /* 20134 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
7145 /* 20137 */ GIR_RootToRootCopy, /*OpIdx*/3, // delta
7146 /* 20139 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7147 /* 20142 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7148 /* 20147 */ GIR_RootConstrainSelectedInstOperands,
7149 /* 20148 */ // GIR_Coverage, 12,
7150 /* 20148 */ GIR_EraseRootFromParent_Done,
7151 /* 20149 */ // Label 481: @20149
7152 /* 20149 */ GIM_Try, /*On fail goto*//*Label 482*/ GIMT_Encode4(20201), // Rule ID 14 //
7153 /* 20154 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
7154 /* 20157 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7155 /* 20160 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
7156 /* 20163 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7157 /* 20167 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7158 /* 20171 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7159 /* 20175 */ // MIs[1] Operand 1
7160 /* 20175 */ // No operand predicates
7161 /* 20175 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7162 /* 20179 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7163 /* 20181 */ // (intrinsic_w_chain:{ *:[i64] } 14447:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags, I64:{ *:[i64] }:$delta) => (anonymous_14762MEMORY_GROW_A64:{ *:[i64] } (imm:{ *:[i32] }):$flags, I64:{ *:[i64] }:$delta)
7164 /* 20181 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_14762MEMORY_GROW_A64),
7165 /* 20184 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7166 /* 20186 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
7167 /* 20189 */ GIR_RootToRootCopy, /*OpIdx*/3, // delta
7168 /* 20191 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7169 /* 20194 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7170 /* 20199 */ GIR_RootConstrainSelectedInstOperands,
7171 /* 20200 */ // GIR_Coverage, 14,
7172 /* 20200 */ GIR_EraseRootFromParent_Done,
7173 /* 20201 */ // Label 482: @20201
7174 /* 20201 */ GIM_Reject,
7175 /* 20202 */ // Label 480: @20202
7176 /* 20202 */ GIM_Reject,
7177 /* 20203 */ // Label 19: @20203
7178 /* 20203 */ GIM_Try, /*On fail goto*//*Label 483*/ GIMT_Encode4(20235), // Rule ID 633 //
7179 /* 20208 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
7180 /* 20211 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7181 /* 20214 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7182 /* 20218 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7183 /* 20222 */ // (anyext:{ *:[i64] } I32:{ *:[i32] }:$src) => (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$src)
7184 /* 20222 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
7185 /* 20227 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7186 /* 20233 */ GIR_RootConstrainSelectedInstOperands,
7187 /* 20234 */ // GIR_Coverage, 633,
7188 /* 20234 */ GIR_Done,
7189 /* 20235 */ // Label 483: @20235
7190 /* 20235 */ GIM_Reject,
7191 /* 20236 */ // Label 20: @20236
7192 /* 20236 */ GIM_Try, /*On fail goto*//*Label 484*/ GIMT_Encode4(20268), // Rule ID 26 //
7193 /* 20241 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
7194 /* 20244 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
7195 /* 20247 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7196 /* 20251 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7197 /* 20255 */ // (trunc:{ *:[i32] } I64:{ *:[i64] }:$src) => (I32_WRAP_I64:{ *:[i32] } I64:{ *:[i64] }:$src)
7198 /* 20255 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_WRAP_I64),
7199 /* 20260 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7200 /* 20266 */ GIR_RootConstrainSelectedInstOperands,
7201 /* 20267 */ // GIR_Coverage, 26,
7202 /* 20267 */ GIR_Done,
7203 /* 20268 */ // Label 484: @20268
7204 /* 20268 */ GIM_Reject,
7205 /* 20269 */ // Label 21: @20269
7206 /* 20269 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 487*/ GIMT_Encode4(20334),
7207 /* 20280 */ /*GILLT_s32*//*Label 485*/ GIMT_Encode4(20288),
7208 /* 20284 */ /*GILLT_s64*//*Label 486*/ GIMT_Encode4(20311),
7209 /* 20288 */ // Label 485: @20288
7210 /* 20288 */ GIM_Try, /*On fail goto*//*Label 488*/ GIMT_Encode4(20310), // Rule ID 7 //
7211 /* 20293 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7212 /* 20297 */ // MIs[0] Operand 1
7213 /* 20297 */ // No operand predicates
7214 /* 20297 */ // (imm:{ *:[i32] }):$imm => (CONST_I32:{ *:[i32] } (imm:{ *:[i32] }):$imm)
7215 /* 20297 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_I32),
7216 /* 20300 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
7217 /* 20302 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
7218 /* 20305 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7219 /* 20308 */ GIR_RootConstrainSelectedInstOperands,
7220 /* 20309 */ // GIR_Coverage, 7,
7221 /* 20309 */ GIR_EraseRootFromParent_Done,
7222 /* 20310 */ // Label 488: @20310
7223 /* 20310 */ GIM_Reject,
7224 /* 20311 */ // Label 486: @20311
7225 /* 20311 */ GIM_Try, /*On fail goto*//*Label 489*/ GIMT_Encode4(20333), // Rule ID 8 //
7226 /* 20316 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7227 /* 20320 */ // MIs[0] Operand 1
7228 /* 20320 */ // No operand predicates
7229 /* 20320 */ // (imm:{ *:[i64] }):$imm => (CONST_I64:{ *:[i64] } (imm:{ *:[i64] }):$imm)
7230 /* 20320 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_I64),
7231 /* 20323 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
7232 /* 20325 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
7233 /* 20328 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7234 /* 20331 */ GIR_RootConstrainSelectedInstOperands,
7235 /* 20332 */ // GIR_Coverage, 8,
7236 /* 20332 */ GIR_EraseRootFromParent_Done,
7237 /* 20333 */ // Label 489: @20333
7238 /* 20333 */ GIM_Reject,
7239 /* 20334 */ // Label 487: @20334
7240 /* 20334 */ GIM_Reject,
7241 /* 20335 */ // Label 22: @20335
7242 /* 20335 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 492*/ GIMT_Encode4(20400),
7243 /* 20346 */ /*GILLT_s32*//*Label 490*/ GIMT_Encode4(20354),
7244 /* 20350 */ /*GILLT_s64*//*Label 491*/ GIMT_Encode4(20377),
7245 /* 20354 */ // Label 490: @20354
7246 /* 20354 */ GIM_Try, /*On fail goto*//*Label 493*/ GIMT_Encode4(20376), // Rule ID 9 //
7247 /* 20359 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
7248 /* 20363 */ // MIs[0] Operand 1
7249 /* 20363 */ // No operand predicates
7250 /* 20363 */ // (fpimm:{ *:[f32] }):$imm => (CONST_F32:{ *:[f32] } (fpimm:{ *:[f32] }):$imm)
7251 /* 20363 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_F32),
7252 /* 20366 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
7253 /* 20368 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
7254 /* 20371 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7255 /* 20374 */ GIR_RootConstrainSelectedInstOperands,
7256 /* 20375 */ // GIR_Coverage, 9,
7257 /* 20375 */ GIR_EraseRootFromParent_Done,
7258 /* 20376 */ // Label 493: @20376
7259 /* 20376 */ GIM_Reject,
7260 /* 20377 */ // Label 491: @20377
7261 /* 20377 */ GIM_Try, /*On fail goto*//*Label 494*/ GIMT_Encode4(20399), // Rule ID 10 //
7262 /* 20382 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
7263 /* 20386 */ // MIs[0] Operand 1
7264 /* 20386 */ // No operand predicates
7265 /* 20386 */ // (fpimm:{ *:[f64] }):$imm => (CONST_F64:{ *:[f64] } (fpimm:{ *:[f64] }):$imm)
7266 /* 20386 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_F64),
7267 /* 20389 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
7268 /* 20391 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
7269 /* 20394 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7270 /* 20397 */ GIR_RootConstrainSelectedInstOperands,
7271 /* 20398 */ // GIR_Coverage, 10,
7272 /* 20398 */ GIR_EraseRootFromParent_Done,
7273 /* 20399 */ // Label 494: @20399
7274 /* 20399 */ GIM_Reject,
7275 /* 20400 */ // Label 492: @20400
7276 /* 20400 */ GIM_Reject,
7277 /* 20401 */ // Label 23: @20401
7278 /* 20401 */ GIM_Try, /*On fail goto*//*Label 495*/ GIMT_Encode4(20433), // Rule ID 27 //
7279 /* 20406 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
7280 /* 20409 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7281 /* 20412 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7282 /* 20416 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7283 /* 20420 */ // (sext:{ *:[i64] } I32:{ *:[i32] }:$src) => (I64_EXTEND_S_I32:{ *:[i64] } I32:{ *:[i32] }:$src)
7284 /* 20420 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_S_I32),
7285 /* 20425 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7286 /* 20431 */ GIR_RootConstrainSelectedInstOperands,
7287 /* 20432 */ // GIR_Coverage, 27,
7288 /* 20432 */ GIR_Done,
7289 /* 20433 */ // Label 495: @20433
7290 /* 20433 */ GIM_Reject,
7291 /* 20434 */ // Label 24: @20434
7292 /* 20434 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 498*/ GIMT_Encode4(20644),
7293 /* 20445 */ /*GILLT_s32*//*Label 496*/ GIMT_Encode4(20453),
7294 /* 20449 */ /*GILLT_s64*//*Label 497*/ GIMT_Encode4(20533),
7295 /* 20453 */ // Label 496: @20453
7296 /* 20453 */ GIM_Try, /*On fail goto*//*Label 499*/ GIMT_Encode4(20532),
7297 /* 20458 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7298 /* 20461 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7299 /* 20465 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7300 /* 20469 */ GIM_Try, /*On fail goto*//*Label 500*/ GIMT_Encode4(20500), // Rule ID 29 //
7301 /* 20474 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSignExt),
7302 /* 20477 */ // MIs[0] Operand 2
7303 /* 20477 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(8),
7304 /* 20488 */ // (sext_inreg:{ *:[i32] } I32:{ *:[i32] }:$src, i8:{ *:[Other] }) => (I32_EXTEND8_S_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
7305 /* 20488 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_EXTEND8_S_I32),
7306 /* 20491 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7307 /* 20493 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
7308 /* 20495 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7309 /* 20498 */ GIR_RootConstrainSelectedInstOperands,
7310 /* 20499 */ // GIR_Coverage, 29,
7311 /* 20499 */ GIR_EraseRootFromParent_Done,
7312 /* 20500 */ // Label 500: @20500
7313 /* 20500 */ GIM_Try, /*On fail goto*//*Label 501*/ GIMT_Encode4(20531), // Rule ID 30 //
7314 /* 20505 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSignExt),
7315 /* 20508 */ // MIs[0] Operand 2
7316 /* 20508 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(16),
7317 /* 20519 */ // (sext_inreg:{ *:[i32] } I32:{ *:[i32] }:$src, i16:{ *:[Other] }) => (I32_EXTEND16_S_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
7318 /* 20519 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_EXTEND16_S_I32),
7319 /* 20522 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7320 /* 20524 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
7321 /* 20526 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7322 /* 20529 */ GIR_RootConstrainSelectedInstOperands,
7323 /* 20530 */ // GIR_Coverage, 30,
7324 /* 20530 */ GIR_EraseRootFromParent_Done,
7325 /* 20531 */ // Label 501: @20531
7326 /* 20531 */ GIM_Reject,
7327 /* 20532 */ // Label 499: @20532
7328 /* 20532 */ GIM_Reject,
7329 /* 20533 */ // Label 497: @20533
7330 /* 20533 */ GIM_Try, /*On fail goto*//*Label 502*/ GIMT_Encode4(20643),
7331 /* 20538 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
7332 /* 20541 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7333 /* 20545 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7334 /* 20549 */ GIM_Try, /*On fail goto*//*Label 503*/ GIMT_Encode4(20580), // Rule ID 31 //
7335 /* 20554 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSignExt),
7336 /* 20557 */ // MIs[0] Operand 2
7337 /* 20557 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(8),
7338 /* 20568 */ // (sext_inreg:{ *:[i64] } I64:{ *:[i64] }:$src, i8:{ *:[Other] }) => (I64_EXTEND8_S_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
7339 /* 20568 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND8_S_I64),
7340 /* 20571 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7341 /* 20573 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
7342 /* 20575 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7343 /* 20578 */ GIR_RootConstrainSelectedInstOperands,
7344 /* 20579 */ // GIR_Coverage, 31,
7345 /* 20579 */ GIR_EraseRootFromParent_Done,
7346 /* 20580 */ // Label 503: @20580
7347 /* 20580 */ GIM_Try, /*On fail goto*//*Label 504*/ GIMT_Encode4(20611), // Rule ID 32 //
7348 /* 20585 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSignExt),
7349 /* 20588 */ // MIs[0] Operand 2
7350 /* 20588 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(16),
7351 /* 20599 */ // (sext_inreg:{ *:[i64] } I64:{ *:[i64] }:$src, i16:{ *:[Other] }) => (I64_EXTEND16_S_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
7352 /* 20599 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND16_S_I64),
7353 /* 20602 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7354 /* 20604 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
7355 /* 20606 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7356 /* 20609 */ GIR_RootConstrainSelectedInstOperands,
7357 /* 20610 */ // GIR_Coverage, 32,
7358 /* 20610 */ GIR_EraseRootFromParent_Done,
7359 /* 20611 */ // Label 504: @20611
7360 /* 20611 */ GIM_Try, /*On fail goto*//*Label 505*/ GIMT_Encode4(20642), // Rule ID 33 //
7361 /* 20616 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSignExt),
7362 /* 20619 */ // MIs[0] Operand 2
7363 /* 20619 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(32),
7364 /* 20630 */ // (sext_inreg:{ *:[i64] } I64:{ *:[i64] }:$src, i32:{ *:[Other] }) => (I64_EXTEND32_S_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
7365 /* 20630 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND32_S_I64),
7366 /* 20633 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7367 /* 20635 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
7368 /* 20637 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7369 /* 20640 */ GIR_RootConstrainSelectedInstOperands,
7370 /* 20641 */ // GIR_Coverage, 33,
7371 /* 20641 */ GIR_EraseRootFromParent_Done,
7372 /* 20642 */ // Label 505: @20642
7373 /* 20642 */ GIM_Reject,
7374 /* 20643 */ // Label 502: @20643
7375 /* 20643 */ GIM_Reject,
7376 /* 20644 */ // Label 498: @20644
7377 /* 20644 */ GIM_Reject,
7378 /* 20645 */ // Label 25: @20645
7379 /* 20645 */ GIM_Try, /*On fail goto*//*Label 506*/ GIMT_Encode4(20677), // Rule ID 28 //
7380 /* 20650 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
7381 /* 20653 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7382 /* 20656 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7383 /* 20660 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7384 /* 20664 */ // (zext:{ *:[i64] } I32:{ *:[i32] }:$src) => (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$src)
7385 /* 20664 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
7386 /* 20669 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7387 /* 20675 */ GIR_RootConstrainSelectedInstOperands,
7388 /* 20676 */ // GIR_Coverage, 28,
7389 /* 20676 */ GIR_Done,
7390 /* 20677 */ // Label 506: @20677
7391 /* 20677 */ GIM_Reject,
7392 /* 20678 */ // Label 26: @20678
7393 /* 20678 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 509*/ GIMT_Encode4(20959),
7394 /* 20689 */ /*GILLT_s32*//*Label 507*/ GIMT_Encode4(20697),
7395 /* 20693 */ /*GILLT_s64*//*Label 508*/ GIMT_Encode4(20788),
7396 /* 20697 */ // Label 507: @20697
7397 /* 20697 */ GIM_Try, /*On fail goto*//*Label 510*/ GIMT_Encode4(20787),
7398 /* 20702 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7399 /* 20705 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7400 /* 20708 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7401 /* 20712 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7402 /* 20716 */ GIM_Try, /*On fail goto*//*Label 511*/ GIMT_Encode4(20764), // Rule ID 650 //
7403 /* 20721 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7404 /* 20725 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7405 /* 20729 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7406 /* 20733 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
7407 /* 20737 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7408 /* 20742 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
7409 /* 20746 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7410 /* 20748 */ // (shl:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (SHL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7411 /* 20748 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I32),
7412 /* 20751 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7413 /* 20753 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7414 /* 20755 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7415 /* 20759 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7416 /* 20762 */ GIR_RootConstrainSelectedInstOperands,
7417 /* 20763 */ // GIR_Coverage, 650,
7418 /* 20763 */ GIR_EraseRootFromParent_Done,
7419 /* 20764 */ // Label 511: @20764
7420 /* 20764 */ GIM_Try, /*On fail goto*//*Label 512*/ GIMT_Encode4(20786), // Rule ID 84 //
7421 /* 20769 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7422 /* 20773 */ // (shl:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SHL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7423 /* 20773 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I32),
7424 /* 20778 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7425 /* 20784 */ GIR_RootConstrainSelectedInstOperands,
7426 /* 20785 */ // GIR_Coverage, 84,
7427 /* 20785 */ GIR_Done,
7428 /* 20786 */ // Label 512: @20786
7429 /* 20786 */ GIM_Reject,
7430 /* 20787 */ // Label 510: @20787
7431 /* 20787 */ GIM_Reject,
7432 /* 20788 */ // Label 508: @20788
7433 /* 20788 */ GIM_Try, /*On fail goto*//*Label 513*/ GIMT_Encode4(20958),
7434 /* 20793 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
7435 /* 20796 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7436 /* 20799 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7437 /* 20803 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7438 /* 20807 */ GIM_Try, /*On fail goto*//*Label 514*/ GIMT_Encode4(20887), // Rule ID 660 //
7439 /* 20812 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7440 /* 20816 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ZEXT),
7441 /* 20820 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7442 /* 20824 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
7443 /* 20828 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
7444 /* 20832 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
7445 /* 20836 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
7446 /* 20840 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7447 /* 20845 */ GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 63,
7448 /* 20849 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
7449 /* 20851 */ // (shl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (zext:{ *:[i64] } (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 63:{ *:[i32] }))) => (SHL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$rhs))
7450 /* 20851 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
7451 /* 20854 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
7452 /* 20858 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
7453 /* 20863 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/2, /*OpIdx*/1, // rhs
7454 /* 20867 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7455 /* 20870 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7456 /* 20872 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I64),
7457 /* 20875 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7458 /* 20877 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7459 /* 20879 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7460 /* 20882 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7461 /* 20885 */ GIR_RootConstrainSelectedInstOperands,
7462 /* 20886 */ // GIR_Coverage, 660,
7463 /* 20886 */ GIR_EraseRootFromParent_Done,
7464 /* 20887 */ // Label 514: @20887
7465 /* 20887 */ GIM_Try, /*On fail goto*//*Label 515*/ GIMT_Encode4(20935), // Rule ID 653 //
7466 /* 20892 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7467 /* 20896 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7468 /* 20900 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
7469 /* 20904 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
7470 /* 20908 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7471 /* 20913 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
7472 /* 20917 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7473 /* 20919 */ // (shl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (SHL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7474 /* 20919 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I64),
7475 /* 20922 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7476 /* 20924 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7477 /* 20926 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7478 /* 20930 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7479 /* 20933 */ GIR_RootConstrainSelectedInstOperands,
7480 /* 20934 */ // GIR_Coverage, 653,
7481 /* 20934 */ GIR_EraseRootFromParent_Done,
7482 /* 20935 */ // Label 515: @20935
7483 /* 20935 */ GIM_Try, /*On fail goto*//*Label 516*/ GIMT_Encode4(20957), // Rule ID 85 //
7484 /* 20940 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7485 /* 20944 */ // (shl:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SHL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7486 /* 20944 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I64),
7487 /* 20949 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7488 /* 20955 */ GIR_RootConstrainSelectedInstOperands,
7489 /* 20956 */ // GIR_Coverage, 85,
7490 /* 20956 */ GIR_Done,
7491 /* 20957 */ // Label 516: @20957
7492 /* 20957 */ GIM_Reject,
7493 /* 20958 */ // Label 513: @20958
7494 /* 20958 */ GIM_Reject,
7495 /* 20959 */ // Label 509: @20959
7496 /* 20959 */ GIM_Reject,
7497 /* 20960 */ // Label 27: @20960
7498 /* 20960 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 519*/ GIMT_Encode4(21241),
7499 /* 20971 */ /*GILLT_s32*//*Label 517*/ GIMT_Encode4(20979),
7500 /* 20975 */ /*GILLT_s64*//*Label 518*/ GIMT_Encode4(21070),
7501 /* 20979 */ // Label 517: @20979
7502 /* 20979 */ GIM_Try, /*On fail goto*//*Label 520*/ GIMT_Encode4(21069),
7503 /* 20984 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7504 /* 20987 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7505 /* 20990 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7506 /* 20994 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7507 /* 20998 */ GIM_Try, /*On fail goto*//*Label 521*/ GIMT_Encode4(21046), // Rule ID 652 //
7508 /* 21003 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7509 /* 21007 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7510 /* 21011 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7511 /* 21015 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
7512 /* 21019 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7513 /* 21024 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
7514 /* 21028 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7515 /* 21030 */ // (srl:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (SHR_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7516 /* 21030 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I32),
7517 /* 21033 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7518 /* 21035 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7519 /* 21037 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7520 /* 21041 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7521 /* 21044 */ GIR_RootConstrainSelectedInstOperands,
7522 /* 21045 */ // GIR_Coverage, 652,
7523 /* 21045 */ GIR_EraseRootFromParent_Done,
7524 /* 21046 */ // Label 521: @21046
7525 /* 21046 */ GIM_Try, /*On fail goto*//*Label 522*/ GIMT_Encode4(21068), // Rule ID 88 //
7526 /* 21051 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7527 /* 21055 */ // (srl:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SHR_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7528 /* 21055 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I32),
7529 /* 21060 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7530 /* 21066 */ GIR_RootConstrainSelectedInstOperands,
7531 /* 21067 */ // GIR_Coverage, 88,
7532 /* 21067 */ GIR_Done,
7533 /* 21068 */ // Label 522: @21068
7534 /* 21068 */ GIM_Reject,
7535 /* 21069 */ // Label 520: @21069
7536 /* 21069 */ GIM_Reject,
7537 /* 21070 */ // Label 518: @21070
7538 /* 21070 */ GIM_Try, /*On fail goto*//*Label 523*/ GIMT_Encode4(21240),
7539 /* 21075 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
7540 /* 21078 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7541 /* 21081 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7542 /* 21085 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7543 /* 21089 */ GIM_Try, /*On fail goto*//*Label 524*/ GIMT_Encode4(21169), // Rule ID 662 //
7544 /* 21094 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7545 /* 21098 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ZEXT),
7546 /* 21102 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7547 /* 21106 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
7548 /* 21110 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
7549 /* 21114 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
7550 /* 21118 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
7551 /* 21122 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7552 /* 21127 */ GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 63,
7553 /* 21131 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
7554 /* 21133 */ // (srl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (zext:{ *:[i64] } (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 63:{ *:[i32] }))) => (SHR_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$rhs))
7555 /* 21133 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
7556 /* 21136 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
7557 /* 21140 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
7558 /* 21145 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/2, /*OpIdx*/1, // rhs
7559 /* 21149 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7560 /* 21152 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7561 /* 21154 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I64),
7562 /* 21157 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7563 /* 21159 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7564 /* 21161 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7565 /* 21164 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7566 /* 21167 */ GIR_RootConstrainSelectedInstOperands,
7567 /* 21168 */ // GIR_Coverage, 662,
7568 /* 21168 */ GIR_EraseRootFromParent_Done,
7569 /* 21169 */ // Label 524: @21169
7570 /* 21169 */ GIM_Try, /*On fail goto*//*Label 525*/ GIMT_Encode4(21217), // Rule ID 655 //
7571 /* 21174 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7572 /* 21178 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7573 /* 21182 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
7574 /* 21186 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
7575 /* 21190 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7576 /* 21195 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
7577 /* 21199 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7578 /* 21201 */ // (srl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (SHR_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7579 /* 21201 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I64),
7580 /* 21204 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7581 /* 21206 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7582 /* 21208 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7583 /* 21212 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7584 /* 21215 */ GIR_RootConstrainSelectedInstOperands,
7585 /* 21216 */ // GIR_Coverage, 655,
7586 /* 21216 */ GIR_EraseRootFromParent_Done,
7587 /* 21217 */ // Label 525: @21217
7588 /* 21217 */ GIM_Try, /*On fail goto*//*Label 526*/ GIMT_Encode4(21239), // Rule ID 89 //
7589 /* 21222 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7590 /* 21226 */ // (srl:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SHR_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7591 /* 21226 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I64),
7592 /* 21231 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7593 /* 21237 */ GIR_RootConstrainSelectedInstOperands,
7594 /* 21238 */ // GIR_Coverage, 89,
7595 /* 21238 */ GIR_Done,
7596 /* 21239 */ // Label 526: @21239
7597 /* 21239 */ GIM_Reject,
7598 /* 21240 */ // Label 523: @21240
7599 /* 21240 */ GIM_Reject,
7600 /* 21241 */ // Label 519: @21241
7601 /* 21241 */ GIM_Reject,
7602 /* 21242 */ // Label 28: @21242
7603 /* 21242 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 529*/ GIMT_Encode4(21523),
7604 /* 21253 */ /*GILLT_s32*//*Label 527*/ GIMT_Encode4(21261),
7605 /* 21257 */ /*GILLT_s64*//*Label 528*/ GIMT_Encode4(21352),
7606 /* 21261 */ // Label 527: @21261
7607 /* 21261 */ GIM_Try, /*On fail goto*//*Label 530*/ GIMT_Encode4(21351),
7608 /* 21266 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7609 /* 21269 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7610 /* 21272 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7611 /* 21276 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7612 /* 21280 */ GIM_Try, /*On fail goto*//*Label 531*/ GIMT_Encode4(21328), // Rule ID 651 //
7613 /* 21285 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7614 /* 21289 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7615 /* 21293 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7616 /* 21297 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
7617 /* 21301 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7618 /* 21306 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
7619 /* 21310 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7620 /* 21312 */ // (sra:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (SHR_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7621 /* 21312 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I32),
7622 /* 21315 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7623 /* 21317 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7624 /* 21319 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7625 /* 21323 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7626 /* 21326 */ GIR_RootConstrainSelectedInstOperands,
7627 /* 21327 */ // GIR_Coverage, 651,
7628 /* 21327 */ GIR_EraseRootFromParent_Done,
7629 /* 21328 */ // Label 531: @21328
7630 /* 21328 */ GIM_Try, /*On fail goto*//*Label 532*/ GIMT_Encode4(21350), // Rule ID 86 //
7631 /* 21333 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7632 /* 21337 */ // (sra:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SHR_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7633 /* 21337 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I32),
7634 /* 21342 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7635 /* 21348 */ GIR_RootConstrainSelectedInstOperands,
7636 /* 21349 */ // GIR_Coverage, 86,
7637 /* 21349 */ GIR_Done,
7638 /* 21350 */ // Label 532: @21350
7639 /* 21350 */ GIM_Reject,
7640 /* 21351 */ // Label 530: @21351
7641 /* 21351 */ GIM_Reject,
7642 /* 21352 */ // Label 528: @21352
7643 /* 21352 */ GIM_Try, /*On fail goto*//*Label 533*/ GIMT_Encode4(21522),
7644 /* 21357 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
7645 /* 21360 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7646 /* 21363 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7647 /* 21367 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7648 /* 21371 */ GIM_Try, /*On fail goto*//*Label 534*/ GIMT_Encode4(21451), // Rule ID 661 //
7649 /* 21376 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7650 /* 21380 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ZEXT),
7651 /* 21384 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7652 /* 21388 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
7653 /* 21392 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
7654 /* 21396 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
7655 /* 21400 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
7656 /* 21404 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7657 /* 21409 */ GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 63,
7658 /* 21413 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
7659 /* 21415 */ // (sra:{ *:[i64] } I64:{ *:[i64] }:$lhs, (zext:{ *:[i64] } (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 63:{ *:[i32] }))) => (SHR_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$rhs))
7660 /* 21415 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
7661 /* 21418 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
7662 /* 21422 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
7663 /* 21427 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/2, /*OpIdx*/1, // rhs
7664 /* 21431 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7665 /* 21434 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7666 /* 21436 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I64),
7667 /* 21439 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7668 /* 21441 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7669 /* 21443 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7670 /* 21446 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7671 /* 21449 */ GIR_RootConstrainSelectedInstOperands,
7672 /* 21450 */ // GIR_Coverage, 661,
7673 /* 21450 */ GIR_EraseRootFromParent_Done,
7674 /* 21451 */ // Label 534: @21451
7675 /* 21451 */ GIM_Try, /*On fail goto*//*Label 535*/ GIMT_Encode4(21499), // Rule ID 654 //
7676 /* 21456 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7677 /* 21460 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7678 /* 21464 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
7679 /* 21468 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
7680 /* 21472 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7681 /* 21477 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
7682 /* 21481 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7683 /* 21483 */ // (sra:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (SHR_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7684 /* 21483 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I64),
7685 /* 21486 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7686 /* 21488 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7687 /* 21490 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7688 /* 21494 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7689 /* 21497 */ GIR_RootConstrainSelectedInstOperands,
7690 /* 21498 */ // GIR_Coverage, 654,
7691 /* 21498 */ GIR_EraseRootFromParent_Done,
7692 /* 21499 */ // Label 535: @21499
7693 /* 21499 */ GIM_Try, /*On fail goto*//*Label 536*/ GIMT_Encode4(21521), // Rule ID 87 //
7694 /* 21504 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7695 /* 21508 */ // (sra:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SHR_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7696 /* 21508 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I64),
7697 /* 21513 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7698 /* 21519 */ GIR_RootConstrainSelectedInstOperands,
7699 /* 21520 */ // GIR_Coverage, 87,
7700 /* 21520 */ GIR_Done,
7701 /* 21521 */ // Label 536: @21521
7702 /* 21521 */ GIM_Reject,
7703 /* 21522 */ // Label 533: @21522
7704 /* 21522 */ GIM_Reject,
7705 /* 21523 */ // Label 529: @21523
7706 /* 21523 */ GIM_Reject,
7707 /* 21524 */ // Label 29: @21524
7708 /* 21524 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 539*/ GIMT_Encode4(21725),
7709 /* 21535 */ /*GILLT_s32*//*Label 537*/ GIMT_Encode4(21543),
7710 /* 21539 */ /*GILLT_s64*//*Label 538*/ GIMT_Encode4(21634),
7711 /* 21543 */ // Label 537: @21543
7712 /* 21543 */ GIM_Try, /*On fail goto*//*Label 540*/ GIMT_Encode4(21633),
7713 /* 21548 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7714 /* 21551 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7715 /* 21554 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7716 /* 21558 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7717 /* 21562 */ GIM_Try, /*On fail goto*//*Label 541*/ GIMT_Encode4(21610), // Rule ID 657 //
7718 /* 21567 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7719 /* 21571 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7720 /* 21575 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7721 /* 21579 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
7722 /* 21583 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7723 /* 21588 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
7724 /* 21592 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7725 /* 21594 */ // (rotr:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (ROTR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7726 /* 21594 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I32),
7727 /* 21597 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7728 /* 21599 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7729 /* 21601 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7730 /* 21605 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7731 /* 21608 */ GIR_RootConstrainSelectedInstOperands,
7732 /* 21609 */ // GIR_Coverage, 657,
7733 /* 21609 */ GIR_EraseRootFromParent_Done,
7734 /* 21610 */ // Label 541: @21610
7735 /* 21610 */ GIM_Try, /*On fail goto*//*Label 542*/ GIMT_Encode4(21632), // Rule ID 92 //
7736 /* 21615 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7737 /* 21619 */ // (rotr:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (ROTR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7738 /* 21619 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I32),
7739 /* 21624 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7740 /* 21630 */ GIR_RootConstrainSelectedInstOperands,
7741 /* 21631 */ // GIR_Coverage, 92,
7742 /* 21631 */ GIR_Done,
7743 /* 21632 */ // Label 542: @21632
7744 /* 21632 */ GIM_Reject,
7745 /* 21633 */ // Label 540: @21633
7746 /* 21633 */ GIM_Reject,
7747 /* 21634 */ // Label 538: @21634
7748 /* 21634 */ GIM_Try, /*On fail goto*//*Label 543*/ GIMT_Encode4(21724),
7749 /* 21639 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
7750 /* 21642 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7751 /* 21645 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7752 /* 21649 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7753 /* 21653 */ GIM_Try, /*On fail goto*//*Label 544*/ GIMT_Encode4(21701), // Rule ID 659 //
7754 /* 21658 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7755 /* 21662 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7756 /* 21666 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
7757 /* 21670 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
7758 /* 21674 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7759 /* 21679 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
7760 /* 21683 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7761 /* 21685 */ // (rotr:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (ROTR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7762 /* 21685 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I64),
7763 /* 21688 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7764 /* 21690 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7765 /* 21692 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7766 /* 21696 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7767 /* 21699 */ GIR_RootConstrainSelectedInstOperands,
7768 /* 21700 */ // GIR_Coverage, 659,
7769 /* 21700 */ GIR_EraseRootFromParent_Done,
7770 /* 21701 */ // Label 544: @21701
7771 /* 21701 */ GIM_Try, /*On fail goto*//*Label 545*/ GIMT_Encode4(21723), // Rule ID 93 //
7772 /* 21706 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7773 /* 21710 */ // (rotr:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (ROTR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7774 /* 21710 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I64),
7775 /* 21715 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7776 /* 21721 */ GIR_RootConstrainSelectedInstOperands,
7777 /* 21722 */ // GIR_Coverage, 93,
7778 /* 21722 */ GIR_Done,
7779 /* 21723 */ // Label 545: @21723
7780 /* 21723 */ GIM_Reject,
7781 /* 21724 */ // Label 543: @21724
7782 /* 21724 */ GIM_Reject,
7783 /* 21725 */ // Label 539: @21725
7784 /* 21725 */ GIM_Reject,
7785 /* 21726 */ // Label 30: @21726
7786 /* 21726 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 548*/ GIMT_Encode4(21927),
7787 /* 21737 */ /*GILLT_s32*//*Label 546*/ GIMT_Encode4(21745),
7788 /* 21741 */ /*GILLT_s64*//*Label 547*/ GIMT_Encode4(21836),
7789 /* 21745 */ // Label 546: @21745
7790 /* 21745 */ GIM_Try, /*On fail goto*//*Label 549*/ GIMT_Encode4(21835),
7791 /* 21750 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7792 /* 21753 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7793 /* 21756 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7794 /* 21760 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7795 /* 21764 */ GIM_Try, /*On fail goto*//*Label 550*/ GIMT_Encode4(21812), // Rule ID 656 //
7796 /* 21769 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7797 /* 21773 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7798 /* 21777 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7799 /* 21781 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
7800 /* 21785 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7801 /* 21790 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
7802 /* 21794 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7803 /* 21796 */ // (rotl:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (ROTL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7804 /* 21796 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I32),
7805 /* 21799 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7806 /* 21801 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7807 /* 21803 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7808 /* 21807 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7809 /* 21810 */ GIR_RootConstrainSelectedInstOperands,
7810 /* 21811 */ // GIR_Coverage, 656,
7811 /* 21811 */ GIR_EraseRootFromParent_Done,
7812 /* 21812 */ // Label 550: @21812
7813 /* 21812 */ GIM_Try, /*On fail goto*//*Label 551*/ GIMT_Encode4(21834), // Rule ID 90 //
7814 /* 21817 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7815 /* 21821 */ // (rotl:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (ROTL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7816 /* 21821 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I32),
7817 /* 21826 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7818 /* 21832 */ GIR_RootConstrainSelectedInstOperands,
7819 /* 21833 */ // GIR_Coverage, 90,
7820 /* 21833 */ GIR_Done,
7821 /* 21834 */ // Label 551: @21834
7822 /* 21834 */ GIM_Reject,
7823 /* 21835 */ // Label 549: @21835
7824 /* 21835 */ GIM_Reject,
7825 /* 21836 */ // Label 547: @21836
7826 /* 21836 */ GIM_Try, /*On fail goto*//*Label 552*/ GIMT_Encode4(21926),
7827 /* 21841 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
7828 /* 21844 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7829 /* 21847 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7830 /* 21851 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7831 /* 21855 */ GIM_Try, /*On fail goto*//*Label 553*/ GIMT_Encode4(21903), // Rule ID 658 //
7832 /* 21860 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7833 /* 21864 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7834 /* 21868 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
7835 /* 21872 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
7836 /* 21876 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7837 /* 21881 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
7838 /* 21885 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7839 /* 21887 */ // (rotl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (ROTL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7840 /* 21887 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I64),
7841 /* 21890 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7842 /* 21892 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7843 /* 21894 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7844 /* 21898 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7845 /* 21901 */ GIR_RootConstrainSelectedInstOperands,
7846 /* 21902 */ // GIR_Coverage, 658,
7847 /* 21902 */ GIR_EraseRootFromParent_Done,
7848 /* 21903 */ // Label 553: @21903
7849 /* 21903 */ GIM_Try, /*On fail goto*//*Label 554*/ GIMT_Encode4(21925), // Rule ID 91 //
7850 /* 21908 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7851 /* 21912 */ // (rotl:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (ROTL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7852 /* 21912 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I64),
7853 /* 21917 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7854 /* 21923 */ GIR_RootConstrainSelectedInstOperands,
7855 /* 21924 */ // GIR_Coverage, 91,
7856 /* 21924 */ GIR_Done,
7857 /* 21925 */ // Label 554: @21925
7858 /* 21925 */ GIM_Reject,
7859 /* 21926 */ // Label 552: @21926
7860 /* 21926 */ GIM_Reject,
7861 /* 21927 */ // Label 548: @21927
7862 /* 21927 */ GIM_Reject,
7863 /* 21928 */ // Label 31: @21928
7864 /* 21928 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 560*/ GIMT_Encode4(25252),
7865 /* 21939 */ /*GILLT_s32*//*Label 555*/ GIMT_Encode4(21963), GIMT_Encode4(0),
7866 /* 21947 */ /*GILLT_v2s64*//*Label 556*/ GIMT_Encode4(23924),
7867 /* 21951 */ /*GILLT_v4s32*//*Label 557*/ GIMT_Encode4(24151),
7868 /* 21955 */ /*GILLT_v8s16*//*Label 558*/ GIMT_Encode4(24518),
7869 /* 21959 */ /*GILLT_v16s8*//*Label 559*/ GIMT_Encode4(24885),
7870 /* 21963 */ // Label 555: @21963
7871 /* 21963 */ GIM_Try, /*On fail goto*//*Label 561*/ GIMT_Encode4(22028), // Rule ID 1115 //
7872 /* 21968 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7873 /* 21971 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
7874 /* 21974 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7875 /* 21978 */ // MIs[0] Operand 1
7876 /* 21978 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
7877 /* 21983 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7878 /* 21987 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
7879 /* 21991 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7880 /* 21994 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
7881 /* 21999 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
7882 /* 22003 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7883 /* 22008 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
7884 /* 22012 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7885 /* 22014 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14430:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x)
7886 /* 22014 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7887 /* 22017 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7888 /* 22019 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
7889 /* 22023 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7890 /* 22026 */ GIR_RootConstrainSelectedInstOperands,
7891 /* 22027 */ // GIR_Coverage, 1115,
7892 /* 22027 */ GIR_EraseRootFromParent_Done,
7893 /* 22028 */ // Label 561: @22028
7894 /* 22028 */ GIM_Try, /*On fail goto*//*Label 562*/ GIMT_Encode4(22093), // Rule ID 1116 //
7895 /* 22033 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7896 /* 22036 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
7897 /* 22039 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7898 /* 22043 */ // MIs[0] Operand 1
7899 /* 22043 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
7900 /* 22048 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7901 /* 22052 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
7902 /* 22056 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7903 /* 22059 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
7904 /* 22064 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
7905 /* 22068 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7906 /* 22073 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
7907 /* 22077 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7908 /* 22079 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14430:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x)
7909 /* 22079 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7910 /* 22082 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7911 /* 22084 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
7912 /* 22088 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7913 /* 22091 */ GIR_RootConstrainSelectedInstOperands,
7914 /* 22092 */ // GIR_Coverage, 1116,
7915 /* 22092 */ GIR_EraseRootFromParent_Done,
7916 /* 22093 */ // Label 562: @22093
7917 /* 22093 */ GIM_Try, /*On fail goto*//*Label 563*/ GIMT_Encode4(22158), // Rule ID 1118 //
7918 /* 22098 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7919 /* 22101 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
7920 /* 22104 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7921 /* 22108 */ // MIs[0] Operand 1
7922 /* 22108 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
7923 /* 22113 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7924 /* 22117 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
7925 /* 22121 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7926 /* 22124 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
7927 /* 22129 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
7928 /* 22133 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7929 /* 22138 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
7930 /* 22142 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7931 /* 22144 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14430:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x)
7932 /* 22144 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7933 /* 22147 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7934 /* 22149 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
7935 /* 22153 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7936 /* 22156 */ GIR_RootConstrainSelectedInstOperands,
7937 /* 22157 */ // GIR_Coverage, 1118,
7938 /* 22157 */ GIR_EraseRootFromParent_Done,
7939 /* 22158 */ // Label 563: @22158
7940 /* 22158 */ GIM_Try, /*On fail goto*//*Label 564*/ GIMT_Encode4(22223), // Rule ID 1119 //
7941 /* 22163 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7942 /* 22166 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
7943 /* 22169 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7944 /* 22173 */ // MIs[0] Operand 1
7945 /* 22173 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
7946 /* 22178 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7947 /* 22182 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
7948 /* 22186 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7949 /* 22189 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
7950 /* 22194 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
7951 /* 22198 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7952 /* 22203 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
7953 /* 22207 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7954 /* 22209 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14430:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x)
7955 /* 22209 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7956 /* 22212 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7957 /* 22214 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
7958 /* 22218 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7959 /* 22221 */ GIR_RootConstrainSelectedInstOperands,
7960 /* 22222 */ // GIR_Coverage, 1119,
7961 /* 22222 */ GIR_EraseRootFromParent_Done,
7962 /* 22223 */ // Label 564: @22223
7963 /* 22223 */ GIM_Try, /*On fail goto*//*Label 565*/ GIMT_Encode4(22288), // Rule ID 1121 //
7964 /* 22228 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7965 /* 22231 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
7966 /* 22234 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7967 /* 22238 */ // MIs[0] Operand 1
7968 /* 22238 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
7969 /* 22243 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7970 /* 22247 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
7971 /* 22251 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7972 /* 22254 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
7973 /* 22259 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
7974 /* 22263 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7975 /* 22268 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
7976 /* 22272 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7977 /* 22274 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14430:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x)
7978 /* 22274 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7979 /* 22277 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7980 /* 22279 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
7981 /* 22283 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7982 /* 22286 */ GIR_RootConstrainSelectedInstOperands,
7983 /* 22287 */ // GIR_Coverage, 1121,
7984 /* 22287 */ GIR_EraseRootFromParent_Done,
7985 /* 22288 */ // Label 565: @22288
7986 /* 22288 */ GIM_Try, /*On fail goto*//*Label 566*/ GIMT_Encode4(22353), // Rule ID 1122 //
7987 /* 22293 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7988 /* 22296 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
7989 /* 22299 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7990 /* 22303 */ // MIs[0] Operand 1
7991 /* 22303 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
7992 /* 22308 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7993 /* 22312 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
7994 /* 22316 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7995 /* 22319 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
7996 /* 22324 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
7997 /* 22328 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7998 /* 22333 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
7999 /* 22337 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8000 /* 22339 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14430:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x)
8001 /* 22339 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8002 /* 22342 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8003 /* 22344 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8004 /* 22348 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8005 /* 22351 */ GIR_RootConstrainSelectedInstOperands,
8006 /* 22352 */ // GIR_Coverage, 1122,
8007 /* 22352 */ GIR_EraseRootFromParent_Done,
8008 /* 22353 */ // Label 566: @22353
8009 /* 22353 */ GIM_Try, /*On fail goto*//*Label 567*/ GIMT_Encode4(22418), // Rule ID 1124 //
8010 /* 22358 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8011 /* 22361 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8012 /* 22364 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8013 /* 22368 */ // MIs[0] Operand 1
8014 /* 22368 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8015 /* 22373 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8016 /* 22377 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8017 /* 22381 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8018 /* 22384 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8019 /* 22389 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
8020 /* 22393 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8021 /* 22398 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8022 /* 22402 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8023 /* 22404 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14430:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x)
8024 /* 22404 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8025 /* 22407 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8026 /* 22409 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8027 /* 22413 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8028 /* 22416 */ GIR_RootConstrainSelectedInstOperands,
8029 /* 22417 */ // GIR_Coverage, 1124,
8030 /* 22417 */ GIR_EraseRootFromParent_Done,
8031 /* 22418 */ // Label 567: @22418
8032 /* 22418 */ GIM_Try, /*On fail goto*//*Label 568*/ GIMT_Encode4(22483), // Rule ID 1125 //
8033 /* 22423 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8034 /* 22426 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8035 /* 22429 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8036 /* 22433 */ // MIs[0] Operand 1
8037 /* 22433 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8038 /* 22438 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8039 /* 22442 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8040 /* 22446 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8041 /* 22449 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8042 /* 22454 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
8043 /* 22458 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8044 /* 22463 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8045 /* 22467 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8046 /* 22469 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14430:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x)
8047 /* 22469 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8048 /* 22472 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8049 /* 22474 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8050 /* 22478 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8051 /* 22481 */ GIR_RootConstrainSelectedInstOperands,
8052 /* 22482 */ // GIR_Coverage, 1125,
8053 /* 22482 */ GIR_EraseRootFromParent_Done,
8054 /* 22483 */ // Label 568: @22483
8055 /* 22483 */ GIM_Try, /*On fail goto*//*Label 569*/ GIMT_Encode4(22548), // Rule ID 1127 //
8056 /* 22488 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8057 /* 22491 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8058 /* 22494 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8059 /* 22498 */ // MIs[0] Operand 1
8060 /* 22498 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8061 /* 22503 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8062 /* 22507 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8063 /* 22511 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8064 /* 22514 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8065 /* 22519 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
8066 /* 22523 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8067 /* 22528 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8068 /* 22532 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8069 /* 22534 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14429:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x)
8070 /* 22534 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
8071 /* 22537 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8072 /* 22539 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8073 /* 22543 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8074 /* 22546 */ GIR_RootConstrainSelectedInstOperands,
8075 /* 22547 */ // GIR_Coverage, 1127,
8076 /* 22547 */ GIR_EraseRootFromParent_Done,
8077 /* 22548 */ // Label 569: @22548
8078 /* 22548 */ GIM_Try, /*On fail goto*//*Label 570*/ GIMT_Encode4(22613), // Rule ID 1128 //
8079 /* 22553 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8080 /* 22556 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8081 /* 22559 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8082 /* 22563 */ // MIs[0] Operand 1
8083 /* 22563 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8084 /* 22568 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8085 /* 22572 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8086 /* 22576 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8087 /* 22579 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8088 /* 22584 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
8089 /* 22588 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8090 /* 22593 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8091 /* 22597 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8092 /* 22599 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14429:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x)
8093 /* 22599 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
8094 /* 22602 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8095 /* 22604 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8096 /* 22608 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8097 /* 22611 */ GIR_RootConstrainSelectedInstOperands,
8098 /* 22612 */ // GIR_Coverage, 1128,
8099 /* 22612 */ GIR_EraseRootFromParent_Done,
8100 /* 22613 */ // Label 570: @22613
8101 /* 22613 */ GIM_Try, /*On fail goto*//*Label 571*/ GIMT_Encode4(22678), // Rule ID 1130 //
8102 /* 22618 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8103 /* 22621 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8104 /* 22624 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8105 /* 22628 */ // MIs[0] Operand 1
8106 /* 22628 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8107 /* 22633 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8108 /* 22637 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8109 /* 22641 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8110 /* 22644 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8111 /* 22649 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
8112 /* 22653 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8113 /* 22658 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8114 /* 22662 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8115 /* 22664 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14429:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x)
8116 /* 22664 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
8117 /* 22667 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8118 /* 22669 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8119 /* 22673 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8120 /* 22676 */ GIR_RootConstrainSelectedInstOperands,
8121 /* 22677 */ // GIR_Coverage, 1130,
8122 /* 22677 */ GIR_EraseRootFromParent_Done,
8123 /* 22678 */ // Label 571: @22678
8124 /* 22678 */ GIM_Try, /*On fail goto*//*Label 572*/ GIMT_Encode4(22743), // Rule ID 1131 //
8125 /* 22683 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8126 /* 22686 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8127 /* 22689 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8128 /* 22693 */ // MIs[0] Operand 1
8129 /* 22693 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8130 /* 22698 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8131 /* 22702 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8132 /* 22706 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8133 /* 22709 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8134 /* 22714 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
8135 /* 22718 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8136 /* 22723 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8137 /* 22727 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8138 /* 22729 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14429:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x)
8139 /* 22729 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
8140 /* 22732 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8141 /* 22734 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8142 /* 22738 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8143 /* 22741 */ GIR_RootConstrainSelectedInstOperands,
8144 /* 22742 */ // GIR_Coverage, 1131,
8145 /* 22742 */ GIR_EraseRootFromParent_Done,
8146 /* 22743 */ // Label 572: @22743
8147 /* 22743 */ GIM_Try, /*On fail goto*//*Label 573*/ GIMT_Encode4(22808), // Rule ID 1133 //
8148 /* 22748 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8149 /* 22751 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8150 /* 22754 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8151 /* 22758 */ // MIs[0] Operand 1
8152 /* 22758 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8153 /* 22763 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8154 /* 22767 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8155 /* 22771 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8156 /* 22774 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8157 /* 22779 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
8158 /* 22783 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8159 /* 22788 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8160 /* 22792 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8161 /* 22794 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14429:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x)
8162 /* 22794 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
8163 /* 22797 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8164 /* 22799 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8165 /* 22803 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8166 /* 22806 */ GIR_RootConstrainSelectedInstOperands,
8167 /* 22807 */ // GIR_Coverage, 1133,
8168 /* 22807 */ GIR_EraseRootFromParent_Done,
8169 /* 22808 */ // Label 573: @22808
8170 /* 22808 */ GIM_Try, /*On fail goto*//*Label 574*/ GIMT_Encode4(22873), // Rule ID 1134 //
8171 /* 22813 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8172 /* 22816 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8173 /* 22819 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8174 /* 22823 */ // MIs[0] Operand 1
8175 /* 22823 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8176 /* 22828 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8177 /* 22832 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8178 /* 22836 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8179 /* 22839 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8180 /* 22844 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
8181 /* 22848 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8182 /* 22853 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8183 /* 22857 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8184 /* 22859 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14429:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x)
8185 /* 22859 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
8186 /* 22862 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8187 /* 22864 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8188 /* 22868 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8189 /* 22871 */ GIR_RootConstrainSelectedInstOperands,
8190 /* 22872 */ // GIR_Coverage, 1134,
8191 /* 22872 */ GIR_EraseRootFromParent_Done,
8192 /* 22873 */ // Label 574: @22873
8193 /* 22873 */ GIM_Try, /*On fail goto*//*Label 575*/ GIMT_Encode4(22938), // Rule ID 1136 //
8194 /* 22878 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8195 /* 22881 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8196 /* 22884 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8197 /* 22888 */ // MIs[0] Operand 1
8198 /* 22888 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8199 /* 22893 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8200 /* 22897 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8201 /* 22901 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8202 /* 22904 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8203 /* 22909 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
8204 /* 22913 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8205 /* 22918 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8206 /* 22922 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8207 /* 22924 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14429:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x)
8208 /* 22924 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
8209 /* 22927 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8210 /* 22929 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8211 /* 22933 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8212 /* 22936 */ GIR_RootConstrainSelectedInstOperands,
8213 /* 22937 */ // GIR_Coverage, 1136,
8214 /* 22937 */ GIR_EraseRootFromParent_Done,
8215 /* 22938 */ // Label 575: @22938
8216 /* 22938 */ GIM_Try, /*On fail goto*//*Label 576*/ GIMT_Encode4(23003), // Rule ID 1137 //
8217 /* 22943 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8218 /* 22946 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8219 /* 22949 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8220 /* 22953 */ // MIs[0] Operand 1
8221 /* 22953 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8222 /* 22958 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8223 /* 22962 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8224 /* 22966 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8225 /* 22969 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8226 /* 22974 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
8227 /* 22978 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8228 /* 22983 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8229 /* 22987 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8230 /* 22989 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14429:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x)
8231 /* 22989 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
8232 /* 22992 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8233 /* 22994 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8234 /* 22998 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8235 /* 23001 */ GIR_RootConstrainSelectedInstOperands,
8236 /* 23002 */ // GIR_Coverage, 1137,
8237 /* 23002 */ GIR_EraseRootFromParent_Done,
8238 /* 23003 */ // Label 576: @23003
8239 /* 23003 */ GIM_Try, /*On fail goto*//*Label 577*/ GIMT_Encode4(23043), // Rule ID 120 //
8240 /* 23008 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8241 /* 23011 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8242 /* 23014 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8243 /* 23018 */ // MIs[0] Operand 1
8244 /* 23018 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8245 /* 23023 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8246 /* 23027 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8247 /* 23031 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$src, 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
8248 /* 23031 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8249 /* 23034 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8250 /* 23036 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8251 /* 23038 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8252 /* 23041 */ GIR_RootConstrainSelectedInstOperands,
8253 /* 23042 */ // GIR_Coverage, 120,
8254 /* 23042 */ GIR_EraseRootFromParent_Done,
8255 /* 23043 */ // Label 577: @23043
8256 /* 23043 */ GIM_Try, /*On fail goto*//*Label 578*/ GIMT_Encode4(23083), // Rule ID 121 //
8257 /* 23048 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8258 /* 23051 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8259 /* 23054 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8260 /* 23058 */ // MIs[0] Operand 1
8261 /* 23058 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8262 /* 23063 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8263 /* 23067 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8264 /* 23071 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$src, 0:{ *:[i64] }, SETEQ:{ *:[Other] }) => (EQZ_I64:{ *:[i32] } I64:{ *:[i64] }:$src)
8265 /* 23071 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I64),
8266 /* 23074 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8267 /* 23076 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8268 /* 23078 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8269 /* 23081 */ GIR_RootConstrainSelectedInstOperands,
8270 /* 23082 */ // GIR_Coverage, 121,
8271 /* 23082 */ GIR_EraseRootFromParent_Done,
8272 /* 23083 */ // Label 578: @23083
8273 /* 23083 */ GIM_Try, /*On fail goto*//*Label 579*/ GIMT_Encode4(23125), // Rule ID 94 //
8274 /* 23088 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8275 /* 23091 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8276 /* 23094 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8277 /* 23098 */ // MIs[0] Operand 1
8278 /* 23098 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8279 /* 23103 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8280 /* 23107 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8281 /* 23111 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8282 /* 23111 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I32),
8283 /* 23114 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8284 /* 23116 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8285 /* 23118 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8286 /* 23120 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8287 /* 23123 */ GIR_RootConstrainSelectedInstOperands,
8288 /* 23124 */ // GIR_Coverage, 94,
8289 /* 23124 */ GIR_EraseRootFromParent_Done,
8290 /* 23125 */ // Label 579: @23125
8291 /* 23125 */ GIM_Try, /*On fail goto*//*Label 580*/ GIMT_Encode4(23167), // Rule ID 95 //
8292 /* 23130 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8293 /* 23133 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8294 /* 23136 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8295 /* 23140 */ // MIs[0] Operand 1
8296 /* 23140 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8297 /* 23145 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8298 /* 23149 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8299 /* 23153 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8300 /* 23153 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I64),
8301 /* 23156 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8302 /* 23158 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8303 /* 23160 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8304 /* 23162 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8305 /* 23165 */ GIR_RootConstrainSelectedInstOperands,
8306 /* 23166 */ // GIR_Coverage, 95,
8307 /* 23166 */ GIR_EraseRootFromParent_Done,
8308 /* 23167 */ // Label 580: @23167
8309 /* 23167 */ GIM_Try, /*On fail goto*//*Label 581*/ GIMT_Encode4(23209), // Rule ID 96 //
8310 /* 23172 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8311 /* 23175 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8312 /* 23178 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8313 /* 23182 */ // MIs[0] Operand 1
8314 /* 23182 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8315 /* 23187 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8316 /* 23191 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8317 /* 23195 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETNE:{ *:[Other] }) => (NE_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8318 /* 23195 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I32),
8319 /* 23198 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8320 /* 23200 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8321 /* 23202 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8322 /* 23204 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8323 /* 23207 */ GIR_RootConstrainSelectedInstOperands,
8324 /* 23208 */ // GIR_Coverage, 96,
8325 /* 23208 */ GIR_EraseRootFromParent_Done,
8326 /* 23209 */ // Label 581: @23209
8327 /* 23209 */ GIM_Try, /*On fail goto*//*Label 582*/ GIMT_Encode4(23251), // Rule ID 97 //
8328 /* 23214 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8329 /* 23217 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8330 /* 23220 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8331 /* 23224 */ // MIs[0] Operand 1
8332 /* 23224 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8333 /* 23229 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8334 /* 23233 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8335 /* 23237 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETNE:{ *:[Other] }) => (NE_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8336 /* 23237 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I64),
8337 /* 23240 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8338 /* 23242 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8339 /* 23244 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8340 /* 23246 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8341 /* 23249 */ GIR_RootConstrainSelectedInstOperands,
8342 /* 23250 */ // GIR_Coverage, 97,
8343 /* 23250 */ GIR_EraseRootFromParent_Done,
8344 /* 23251 */ // Label 582: @23251
8345 /* 23251 */ GIM_Try, /*On fail goto*//*Label 583*/ GIMT_Encode4(23293), // Rule ID 98 //
8346 /* 23256 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8347 /* 23259 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8348 /* 23262 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8349 /* 23266 */ // MIs[0] Operand 1
8350 /* 23266 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
8351 /* 23271 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8352 /* 23275 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8353 /* 23279 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8354 /* 23279 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I32),
8355 /* 23282 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8356 /* 23284 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8357 /* 23286 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8358 /* 23288 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8359 /* 23291 */ GIR_RootConstrainSelectedInstOperands,
8360 /* 23292 */ // GIR_Coverage, 98,
8361 /* 23292 */ GIR_EraseRootFromParent_Done,
8362 /* 23293 */ // Label 583: @23293
8363 /* 23293 */ GIM_Try, /*On fail goto*//*Label 584*/ GIMT_Encode4(23335), // Rule ID 99 //
8364 /* 23298 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8365 /* 23301 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8366 /* 23304 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8367 /* 23308 */ // MIs[0] Operand 1
8368 /* 23308 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
8369 /* 23313 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8370 /* 23317 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8371 /* 23321 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8372 /* 23321 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I64),
8373 /* 23324 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8374 /* 23326 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8375 /* 23328 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8376 /* 23330 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8377 /* 23333 */ GIR_RootConstrainSelectedInstOperands,
8378 /* 23334 */ // GIR_Coverage, 99,
8379 /* 23334 */ GIR_EraseRootFromParent_Done,
8380 /* 23335 */ // Label 584: @23335
8381 /* 23335 */ GIM_Try, /*On fail goto*//*Label 585*/ GIMT_Encode4(23377), // Rule ID 100 //
8382 /* 23340 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8383 /* 23343 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8384 /* 23346 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8385 /* 23350 */ // MIs[0] Operand 1
8386 /* 23350 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
8387 /* 23355 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8388 /* 23359 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8389 /* 23363 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8390 /* 23363 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I32),
8391 /* 23366 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8392 /* 23368 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8393 /* 23370 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8394 /* 23372 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8395 /* 23375 */ GIR_RootConstrainSelectedInstOperands,
8396 /* 23376 */ // GIR_Coverage, 100,
8397 /* 23376 */ GIR_EraseRootFromParent_Done,
8398 /* 23377 */ // Label 585: @23377
8399 /* 23377 */ GIM_Try, /*On fail goto*//*Label 586*/ GIMT_Encode4(23419), // Rule ID 101 //
8400 /* 23382 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8401 /* 23385 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8402 /* 23388 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8403 /* 23392 */ // MIs[0] Operand 1
8404 /* 23392 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
8405 /* 23397 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8406 /* 23401 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8407 /* 23405 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8408 /* 23405 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I64),
8409 /* 23408 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8410 /* 23410 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8411 /* 23412 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8412 /* 23414 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8413 /* 23417 */ GIR_RootConstrainSelectedInstOperands,
8414 /* 23418 */ // GIR_Coverage, 101,
8415 /* 23418 */ GIR_EraseRootFromParent_Done,
8416 /* 23419 */ // Label 586: @23419
8417 /* 23419 */ GIM_Try, /*On fail goto*//*Label 587*/ GIMT_Encode4(23461), // Rule ID 102 //
8418 /* 23424 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8419 /* 23427 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8420 /* 23430 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8421 /* 23434 */ // MIs[0] Operand 1
8422 /* 23434 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
8423 /* 23439 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8424 /* 23443 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8425 /* 23447 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8426 /* 23447 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I32),
8427 /* 23450 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8428 /* 23452 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8429 /* 23454 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8430 /* 23456 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8431 /* 23459 */ GIR_RootConstrainSelectedInstOperands,
8432 /* 23460 */ // GIR_Coverage, 102,
8433 /* 23460 */ GIR_EraseRootFromParent_Done,
8434 /* 23461 */ // Label 587: @23461
8435 /* 23461 */ GIM_Try, /*On fail goto*//*Label 588*/ GIMT_Encode4(23503), // Rule ID 103 //
8436 /* 23466 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8437 /* 23469 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8438 /* 23472 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8439 /* 23476 */ // MIs[0] Operand 1
8440 /* 23476 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
8441 /* 23481 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8442 /* 23485 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8443 /* 23489 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8444 /* 23489 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I64),
8445 /* 23492 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8446 /* 23494 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8447 /* 23496 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8448 /* 23498 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8449 /* 23501 */ GIR_RootConstrainSelectedInstOperands,
8450 /* 23502 */ // GIR_Coverage, 103,
8451 /* 23502 */ GIR_EraseRootFromParent_Done,
8452 /* 23503 */ // Label 588: @23503
8453 /* 23503 */ GIM_Try, /*On fail goto*//*Label 589*/ GIMT_Encode4(23545), // Rule ID 104 //
8454 /* 23508 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8455 /* 23511 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8456 /* 23514 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8457 /* 23518 */ // MIs[0] Operand 1
8458 /* 23518 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
8459 /* 23523 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8460 /* 23527 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8461 /* 23531 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8462 /* 23531 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I32),
8463 /* 23534 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8464 /* 23536 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8465 /* 23538 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8466 /* 23540 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8467 /* 23543 */ GIR_RootConstrainSelectedInstOperands,
8468 /* 23544 */ // GIR_Coverage, 104,
8469 /* 23544 */ GIR_EraseRootFromParent_Done,
8470 /* 23545 */ // Label 589: @23545
8471 /* 23545 */ GIM_Try, /*On fail goto*//*Label 590*/ GIMT_Encode4(23587), // Rule ID 105 //
8472 /* 23550 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8473 /* 23553 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8474 /* 23556 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8475 /* 23560 */ // MIs[0] Operand 1
8476 /* 23560 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
8477 /* 23565 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8478 /* 23569 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8479 /* 23573 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8480 /* 23573 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I64),
8481 /* 23576 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8482 /* 23578 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8483 /* 23580 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8484 /* 23582 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8485 /* 23585 */ GIR_RootConstrainSelectedInstOperands,
8486 /* 23586 */ // GIR_Coverage, 105,
8487 /* 23586 */ GIR_EraseRootFromParent_Done,
8488 /* 23587 */ // Label 590: @23587
8489 /* 23587 */ GIM_Try, /*On fail goto*//*Label 591*/ GIMT_Encode4(23629), // Rule ID 106 //
8490 /* 23592 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8491 /* 23595 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8492 /* 23598 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8493 /* 23602 */ // MIs[0] Operand 1
8494 /* 23602 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
8495 /* 23607 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8496 /* 23611 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8497 /* 23615 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8498 /* 23615 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I32),
8499 /* 23618 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8500 /* 23620 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8501 /* 23622 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8502 /* 23624 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8503 /* 23627 */ GIR_RootConstrainSelectedInstOperands,
8504 /* 23628 */ // GIR_Coverage, 106,
8505 /* 23628 */ GIR_EraseRootFromParent_Done,
8506 /* 23629 */ // Label 591: @23629
8507 /* 23629 */ GIM_Try, /*On fail goto*//*Label 592*/ GIMT_Encode4(23671), // Rule ID 107 //
8508 /* 23634 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8509 /* 23637 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8510 /* 23640 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8511 /* 23644 */ // MIs[0] Operand 1
8512 /* 23644 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
8513 /* 23649 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8514 /* 23653 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8515 /* 23657 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8516 /* 23657 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I64),
8517 /* 23660 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8518 /* 23662 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8519 /* 23664 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8520 /* 23666 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8521 /* 23669 */ GIR_RootConstrainSelectedInstOperands,
8522 /* 23670 */ // GIR_Coverage, 107,
8523 /* 23670 */ GIR_EraseRootFromParent_Done,
8524 /* 23671 */ // Label 592: @23671
8525 /* 23671 */ GIM_Try, /*On fail goto*//*Label 593*/ GIMT_Encode4(23713), // Rule ID 108 //
8526 /* 23676 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8527 /* 23679 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8528 /* 23682 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8529 /* 23686 */ // MIs[0] Operand 1
8530 /* 23686 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
8531 /* 23691 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8532 /* 23695 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8533 /* 23699 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8534 /* 23699 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I32),
8535 /* 23702 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8536 /* 23704 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8537 /* 23706 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8538 /* 23708 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8539 /* 23711 */ GIR_RootConstrainSelectedInstOperands,
8540 /* 23712 */ // GIR_Coverage, 108,
8541 /* 23712 */ GIR_EraseRootFromParent_Done,
8542 /* 23713 */ // Label 593: @23713
8543 /* 23713 */ GIM_Try, /*On fail goto*//*Label 594*/ GIMT_Encode4(23755), // Rule ID 109 //
8544 /* 23718 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8545 /* 23721 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8546 /* 23724 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8547 /* 23728 */ // MIs[0] Operand 1
8548 /* 23728 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
8549 /* 23733 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8550 /* 23737 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8551 /* 23741 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8552 /* 23741 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I64),
8553 /* 23744 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8554 /* 23746 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8555 /* 23748 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8556 /* 23750 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8557 /* 23753 */ GIR_RootConstrainSelectedInstOperands,
8558 /* 23754 */ // GIR_Coverage, 109,
8559 /* 23754 */ GIR_EraseRootFromParent_Done,
8560 /* 23755 */ // Label 594: @23755
8561 /* 23755 */ GIM_Try, /*On fail goto*//*Label 595*/ GIMT_Encode4(23797), // Rule ID 110 //
8562 /* 23760 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8563 /* 23763 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8564 /* 23766 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8565 /* 23770 */ // MIs[0] Operand 1
8566 /* 23770 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
8567 /* 23775 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8568 /* 23779 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8569 /* 23783 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8570 /* 23783 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I32),
8571 /* 23786 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8572 /* 23788 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8573 /* 23790 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8574 /* 23792 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8575 /* 23795 */ GIR_RootConstrainSelectedInstOperands,
8576 /* 23796 */ // GIR_Coverage, 110,
8577 /* 23796 */ GIR_EraseRootFromParent_Done,
8578 /* 23797 */ // Label 595: @23797
8579 /* 23797 */ GIM_Try, /*On fail goto*//*Label 596*/ GIMT_Encode4(23839), // Rule ID 111 //
8580 /* 23802 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8581 /* 23805 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8582 /* 23808 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8583 /* 23812 */ // MIs[0] Operand 1
8584 /* 23812 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
8585 /* 23817 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8586 /* 23821 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8587 /* 23825 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8588 /* 23825 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I64),
8589 /* 23828 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8590 /* 23830 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8591 /* 23832 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8592 /* 23834 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8593 /* 23837 */ GIR_RootConstrainSelectedInstOperands,
8594 /* 23838 */ // GIR_Coverage, 111,
8595 /* 23838 */ GIR_EraseRootFromParent_Done,
8596 /* 23839 */ // Label 596: @23839
8597 /* 23839 */ GIM_Try, /*On fail goto*//*Label 597*/ GIMT_Encode4(23881), // Rule ID 112 //
8598 /* 23844 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8599 /* 23847 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8600 /* 23850 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8601 /* 23854 */ // MIs[0] Operand 1
8602 /* 23854 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
8603 /* 23859 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8604 /* 23863 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8605 /* 23867 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8606 /* 23867 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I32),
8607 /* 23870 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8608 /* 23872 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8609 /* 23874 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8610 /* 23876 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8611 /* 23879 */ GIR_RootConstrainSelectedInstOperands,
8612 /* 23880 */ // GIR_Coverage, 112,
8613 /* 23880 */ GIR_EraseRootFromParent_Done,
8614 /* 23881 */ // Label 597: @23881
8615 /* 23881 */ GIM_Try, /*On fail goto*//*Label 598*/ GIMT_Encode4(23923), // Rule ID 113 //
8616 /* 23886 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8617 /* 23889 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8618 /* 23892 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8619 /* 23896 */ // MIs[0] Operand 1
8620 /* 23896 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
8621 /* 23901 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8622 /* 23905 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8623 /* 23909 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8624 /* 23909 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I64),
8625 /* 23912 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8626 /* 23914 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8627 /* 23916 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8628 /* 23918 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8629 /* 23921 */ GIR_RootConstrainSelectedInstOperands,
8630 /* 23922 */ // GIR_Coverage, 113,
8631 /* 23922 */ GIR_EraseRootFromParent_Done,
8632 /* 23923 */ // Label 598: @23923
8633 /* 23923 */ GIM_Reject,
8634 /* 23924 */ // Label 556: @23924
8635 /* 23924 */ GIM_Try, /*On fail goto*//*Label 599*/ GIMT_Encode4(24150),
8636 /* 23929 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
8637 /* 23932 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
8638 /* 23935 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8639 /* 23939 */ GIM_Try, /*On fail goto*//*Label 600*/ GIMT_Encode4(23974), // Rule ID 198 //
8640 /* 23944 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8641 /* 23947 */ // MIs[0] Operand 1
8642 /* 23947 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8643 /* 23952 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8644 /* 23956 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8645 /* 23960 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
8646 /* 23960 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I64x2),
8647 /* 23963 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8648 /* 23965 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8649 /* 23967 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8650 /* 23969 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8651 /* 23972 */ GIR_RootConstrainSelectedInstOperands,
8652 /* 23973 */ // GIR_Coverage, 198,
8653 /* 23973 */ GIR_EraseRootFromParent_Done,
8654 /* 23974 */ // Label 600: @23974
8655 /* 23974 */ GIM_Try, /*On fail goto*//*Label 601*/ GIMT_Encode4(24009), // Rule ID 205 //
8656 /* 23979 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8657 /* 23982 */ // MIs[0] Operand 1
8658 /* 23982 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8659 /* 23987 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8660 /* 23991 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8661 /* 23995 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETNE:{ *:[Other] }) => (NE_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
8662 /* 23995 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I64x2),
8663 /* 23998 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8664 /* 24000 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8665 /* 24002 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8666 /* 24004 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8667 /* 24007 */ GIR_RootConstrainSelectedInstOperands,
8668 /* 24008 */ // GIR_Coverage, 205,
8669 /* 24008 */ GIR_EraseRootFromParent_Done,
8670 /* 24009 */ // Label 601: @24009
8671 /* 24009 */ GIM_Try, /*On fail goto*//*Label 602*/ GIMT_Encode4(24044), // Rule ID 212 //
8672 /* 24014 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8673 /* 24017 */ // MIs[0] Operand 1
8674 /* 24017 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
8675 /* 24022 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8676 /* 24026 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8677 /* 24030 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
8678 /* 24030 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I64x2),
8679 /* 24033 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8680 /* 24035 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8681 /* 24037 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8682 /* 24039 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8683 /* 24042 */ GIR_RootConstrainSelectedInstOperands,
8684 /* 24043 */ // GIR_Coverage, 212,
8685 /* 24043 */ GIR_EraseRootFromParent_Done,
8686 /* 24044 */ // Label 602: @24044
8687 /* 24044 */ GIM_Try, /*On fail goto*//*Label 603*/ GIMT_Encode4(24079), // Rule ID 222 //
8688 /* 24049 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8689 /* 24052 */ // MIs[0] Operand 1
8690 /* 24052 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
8691 /* 24057 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8692 /* 24061 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8693 /* 24065 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
8694 /* 24065 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I64x2),
8695 /* 24068 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8696 /* 24070 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8697 /* 24072 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8698 /* 24074 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8699 /* 24077 */ GIR_RootConstrainSelectedInstOperands,
8700 /* 24078 */ // GIR_Coverage, 222,
8701 /* 24078 */ GIR_EraseRootFromParent_Done,
8702 /* 24079 */ // Label 603: @24079
8703 /* 24079 */ GIM_Try, /*On fail goto*//*Label 604*/ GIMT_Encode4(24114), // Rule ID 232 //
8704 /* 24084 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8705 /* 24087 */ // MIs[0] Operand 1
8706 /* 24087 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
8707 /* 24092 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8708 /* 24096 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8709 /* 24100 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
8710 /* 24100 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I64x2),
8711 /* 24103 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8712 /* 24105 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8713 /* 24107 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8714 /* 24109 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8715 /* 24112 */ GIR_RootConstrainSelectedInstOperands,
8716 /* 24113 */ // GIR_Coverage, 232,
8717 /* 24113 */ GIR_EraseRootFromParent_Done,
8718 /* 24114 */ // Label 604: @24114
8719 /* 24114 */ GIM_Try, /*On fail goto*//*Label 605*/ GIMT_Encode4(24149), // Rule ID 242 //
8720 /* 24119 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8721 /* 24122 */ // MIs[0] Operand 1
8722 /* 24122 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
8723 /* 24127 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8724 /* 24131 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8725 /* 24135 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
8726 /* 24135 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I64x2),
8727 /* 24138 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8728 /* 24140 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8729 /* 24142 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8730 /* 24144 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8731 /* 24147 */ GIR_RootConstrainSelectedInstOperands,
8732 /* 24148 */ // GIR_Coverage, 242,
8733 /* 24148 */ GIR_EraseRootFromParent_Done,
8734 /* 24149 */ // Label 605: @24149
8735 /* 24149 */ GIM_Reject,
8736 /* 24150 */ // Label 599: @24150
8737 /* 24150 */ GIM_Reject,
8738 /* 24151 */ // Label 557: @24151
8739 /* 24151 */ GIM_Try, /*On fail goto*//*Label 606*/ GIMT_Encode4(24517),
8740 /* 24156 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
8741 /* 24159 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
8742 /* 24162 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8743 /* 24166 */ GIM_Try, /*On fail goto*//*Label 607*/ GIMT_Encode4(24201), // Rule ID 197 //
8744 /* 24171 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8745 /* 24174 */ // MIs[0] Operand 1
8746 /* 24174 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8747 /* 24179 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8748 /* 24183 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8749 /* 24187 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
8750 /* 24187 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I32x4),
8751 /* 24190 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8752 /* 24192 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8753 /* 24194 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8754 /* 24196 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8755 /* 24199 */ GIR_RootConstrainSelectedInstOperands,
8756 /* 24200 */ // GIR_Coverage, 197,
8757 /* 24200 */ GIR_EraseRootFromParent_Done,
8758 /* 24201 */ // Label 607: @24201
8759 /* 24201 */ GIM_Try, /*On fail goto*//*Label 608*/ GIMT_Encode4(24236), // Rule ID 204 //
8760 /* 24206 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8761 /* 24209 */ // MIs[0] Operand 1
8762 /* 24209 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8763 /* 24214 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8764 /* 24218 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8765 /* 24222 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETNE:{ *:[Other] }) => (NE_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
8766 /* 24222 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I32x4),
8767 /* 24225 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8768 /* 24227 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8769 /* 24229 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8770 /* 24231 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8771 /* 24234 */ GIR_RootConstrainSelectedInstOperands,
8772 /* 24235 */ // GIR_Coverage, 204,
8773 /* 24235 */ GIR_EraseRootFromParent_Done,
8774 /* 24236 */ // Label 608: @24236
8775 /* 24236 */ GIM_Try, /*On fail goto*//*Label 609*/ GIMT_Encode4(24271), // Rule ID 211 //
8776 /* 24241 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8777 /* 24244 */ // MIs[0] Operand 1
8778 /* 24244 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
8779 /* 24249 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8780 /* 24253 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8781 /* 24257 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
8782 /* 24257 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I32x4),
8783 /* 24260 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8784 /* 24262 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8785 /* 24264 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8786 /* 24266 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8787 /* 24269 */ GIR_RootConstrainSelectedInstOperands,
8788 /* 24270 */ // GIR_Coverage, 211,
8789 /* 24270 */ GIR_EraseRootFromParent_Done,
8790 /* 24271 */ // Label 609: @24271
8791 /* 24271 */ GIM_Try, /*On fail goto*//*Label 610*/ GIMT_Encode4(24306), // Rule ID 215 //
8792 /* 24276 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8793 /* 24279 */ // MIs[0] Operand 1
8794 /* 24279 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
8795 /* 24284 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8796 /* 24288 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8797 /* 24292 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
8798 /* 24292 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I32x4),
8799 /* 24295 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8800 /* 24297 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8801 /* 24299 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8802 /* 24301 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8803 /* 24304 */ GIR_RootConstrainSelectedInstOperands,
8804 /* 24305 */ // GIR_Coverage, 215,
8805 /* 24305 */ GIR_EraseRootFromParent_Done,
8806 /* 24306 */ // Label 610: @24306
8807 /* 24306 */ GIM_Try, /*On fail goto*//*Label 611*/ GIMT_Encode4(24341), // Rule ID 221 //
8808 /* 24311 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8809 /* 24314 */ // MIs[0] Operand 1
8810 /* 24314 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
8811 /* 24319 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8812 /* 24323 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8813 /* 24327 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
8814 /* 24327 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I32x4),
8815 /* 24330 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8816 /* 24332 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8817 /* 24334 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8818 /* 24336 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8819 /* 24339 */ GIR_RootConstrainSelectedInstOperands,
8820 /* 24340 */ // GIR_Coverage, 221,
8821 /* 24340 */ GIR_EraseRootFromParent_Done,
8822 /* 24341 */ // Label 611: @24341
8823 /* 24341 */ GIM_Try, /*On fail goto*//*Label 612*/ GIMT_Encode4(24376), // Rule ID 225 //
8824 /* 24346 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8825 /* 24349 */ // MIs[0] Operand 1
8826 /* 24349 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
8827 /* 24354 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8828 /* 24358 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8829 /* 24362 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
8830 /* 24362 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I32x4),
8831 /* 24365 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8832 /* 24367 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8833 /* 24369 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8834 /* 24371 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8835 /* 24374 */ GIR_RootConstrainSelectedInstOperands,
8836 /* 24375 */ // GIR_Coverage, 225,
8837 /* 24375 */ GIR_EraseRootFromParent_Done,
8838 /* 24376 */ // Label 612: @24376
8839 /* 24376 */ GIM_Try, /*On fail goto*//*Label 613*/ GIMT_Encode4(24411), // Rule ID 231 //
8840 /* 24381 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8841 /* 24384 */ // MIs[0] Operand 1
8842 /* 24384 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
8843 /* 24389 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8844 /* 24393 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8845 /* 24397 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
8846 /* 24397 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I32x4),
8847 /* 24400 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8848 /* 24402 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8849 /* 24404 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8850 /* 24406 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8851 /* 24409 */ GIR_RootConstrainSelectedInstOperands,
8852 /* 24410 */ // GIR_Coverage, 231,
8853 /* 24410 */ GIR_EraseRootFromParent_Done,
8854 /* 24411 */ // Label 613: @24411
8855 /* 24411 */ GIM_Try, /*On fail goto*//*Label 614*/ GIMT_Encode4(24446), // Rule ID 235 //
8856 /* 24416 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8857 /* 24419 */ // MIs[0] Operand 1
8858 /* 24419 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
8859 /* 24424 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8860 /* 24428 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8861 /* 24432 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
8862 /* 24432 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I32x4),
8863 /* 24435 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8864 /* 24437 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8865 /* 24439 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8866 /* 24441 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8867 /* 24444 */ GIR_RootConstrainSelectedInstOperands,
8868 /* 24445 */ // GIR_Coverage, 235,
8869 /* 24445 */ GIR_EraseRootFromParent_Done,
8870 /* 24446 */ // Label 614: @24446
8871 /* 24446 */ GIM_Try, /*On fail goto*//*Label 615*/ GIMT_Encode4(24481), // Rule ID 241 //
8872 /* 24451 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8873 /* 24454 */ // MIs[0] Operand 1
8874 /* 24454 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
8875 /* 24459 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8876 /* 24463 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8877 /* 24467 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
8878 /* 24467 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I32x4),
8879 /* 24470 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8880 /* 24472 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8881 /* 24474 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8882 /* 24476 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8883 /* 24479 */ GIR_RootConstrainSelectedInstOperands,
8884 /* 24480 */ // GIR_Coverage, 241,
8885 /* 24480 */ GIR_EraseRootFromParent_Done,
8886 /* 24481 */ // Label 615: @24481
8887 /* 24481 */ GIM_Try, /*On fail goto*//*Label 616*/ GIMT_Encode4(24516), // Rule ID 245 //
8888 /* 24486 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8889 /* 24489 */ // MIs[0] Operand 1
8890 /* 24489 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
8891 /* 24494 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8892 /* 24498 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8893 /* 24502 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
8894 /* 24502 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I32x4),
8895 /* 24505 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8896 /* 24507 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8897 /* 24509 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8898 /* 24511 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8899 /* 24514 */ GIR_RootConstrainSelectedInstOperands,
8900 /* 24515 */ // GIR_Coverage, 245,
8901 /* 24515 */ GIR_EraseRootFromParent_Done,
8902 /* 24516 */ // Label 616: @24516
8903 /* 24516 */ GIM_Reject,
8904 /* 24517 */ // Label 606: @24517
8905 /* 24517 */ GIM_Reject,
8906 /* 24518 */ // Label 558: @24518
8907 /* 24518 */ GIM_Try, /*On fail goto*//*Label 617*/ GIMT_Encode4(24884),
8908 /* 24523 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
8909 /* 24526 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
8910 /* 24529 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8911 /* 24533 */ GIM_Try, /*On fail goto*//*Label 618*/ GIMT_Encode4(24568), // Rule ID 196 //
8912 /* 24538 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8913 /* 24541 */ // MIs[0] Operand 1
8914 /* 24541 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8915 /* 24546 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8916 /* 24550 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8917 /* 24554 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
8918 /* 24554 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I16x8),
8919 /* 24557 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8920 /* 24559 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8921 /* 24561 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8922 /* 24563 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8923 /* 24566 */ GIR_RootConstrainSelectedInstOperands,
8924 /* 24567 */ // GIR_Coverage, 196,
8925 /* 24567 */ GIR_EraseRootFromParent_Done,
8926 /* 24568 */ // Label 618: @24568
8927 /* 24568 */ GIM_Try, /*On fail goto*//*Label 619*/ GIMT_Encode4(24603), // Rule ID 203 //
8928 /* 24573 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8929 /* 24576 */ // MIs[0] Operand 1
8930 /* 24576 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8931 /* 24581 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8932 /* 24585 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8933 /* 24589 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETNE:{ *:[Other] }) => (NE_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
8934 /* 24589 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I16x8),
8935 /* 24592 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8936 /* 24594 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8937 /* 24596 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8938 /* 24598 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8939 /* 24601 */ GIR_RootConstrainSelectedInstOperands,
8940 /* 24602 */ // GIR_Coverage, 203,
8941 /* 24602 */ GIR_EraseRootFromParent_Done,
8942 /* 24603 */ // Label 619: @24603
8943 /* 24603 */ GIM_Try, /*On fail goto*//*Label 620*/ GIMT_Encode4(24638), // Rule ID 210 //
8944 /* 24608 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8945 /* 24611 */ // MIs[0] Operand 1
8946 /* 24611 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
8947 /* 24616 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8948 /* 24620 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8949 /* 24624 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
8950 /* 24624 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I16x8),
8951 /* 24627 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8952 /* 24629 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8953 /* 24631 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8954 /* 24633 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8955 /* 24636 */ GIR_RootConstrainSelectedInstOperands,
8956 /* 24637 */ // GIR_Coverage, 210,
8957 /* 24637 */ GIR_EraseRootFromParent_Done,
8958 /* 24638 */ // Label 620: @24638
8959 /* 24638 */ GIM_Try, /*On fail goto*//*Label 621*/ GIMT_Encode4(24673), // Rule ID 214 //
8960 /* 24643 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8961 /* 24646 */ // MIs[0] Operand 1
8962 /* 24646 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
8963 /* 24651 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8964 /* 24655 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8965 /* 24659 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
8966 /* 24659 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I16x8),
8967 /* 24662 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8968 /* 24664 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8969 /* 24666 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8970 /* 24668 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8971 /* 24671 */ GIR_RootConstrainSelectedInstOperands,
8972 /* 24672 */ // GIR_Coverage, 214,
8973 /* 24672 */ GIR_EraseRootFromParent_Done,
8974 /* 24673 */ // Label 621: @24673
8975 /* 24673 */ GIM_Try, /*On fail goto*//*Label 622*/ GIMT_Encode4(24708), // Rule ID 220 //
8976 /* 24678 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8977 /* 24681 */ // MIs[0] Operand 1
8978 /* 24681 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
8979 /* 24686 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8980 /* 24690 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8981 /* 24694 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
8982 /* 24694 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I16x8),
8983 /* 24697 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8984 /* 24699 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8985 /* 24701 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8986 /* 24703 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8987 /* 24706 */ GIR_RootConstrainSelectedInstOperands,
8988 /* 24707 */ // GIR_Coverage, 220,
8989 /* 24707 */ GIR_EraseRootFromParent_Done,
8990 /* 24708 */ // Label 622: @24708
8991 /* 24708 */ GIM_Try, /*On fail goto*//*Label 623*/ GIMT_Encode4(24743), // Rule ID 224 //
8992 /* 24713 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
8993 /* 24716 */ // MIs[0] Operand 1
8994 /* 24716 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
8995 /* 24721 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8996 /* 24725 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8997 /* 24729 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
8998 /* 24729 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I16x8),
8999 /* 24732 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9000 /* 24734 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9001 /* 24736 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9002 /* 24738 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9003 /* 24741 */ GIR_RootConstrainSelectedInstOperands,
9004 /* 24742 */ // GIR_Coverage, 224,
9005 /* 24742 */ GIR_EraseRootFromParent_Done,
9006 /* 24743 */ // Label 623: @24743
9007 /* 24743 */ GIM_Try, /*On fail goto*//*Label 624*/ GIMT_Encode4(24778), // Rule ID 230 //
9008 /* 24748 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9009 /* 24751 */ // MIs[0] Operand 1
9010 /* 24751 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
9011 /* 24756 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9012 /* 24760 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9013 /* 24764 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9014 /* 24764 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I16x8),
9015 /* 24767 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9016 /* 24769 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9017 /* 24771 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9018 /* 24773 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9019 /* 24776 */ GIR_RootConstrainSelectedInstOperands,
9020 /* 24777 */ // GIR_Coverage, 230,
9021 /* 24777 */ GIR_EraseRootFromParent_Done,
9022 /* 24778 */ // Label 624: @24778
9023 /* 24778 */ GIM_Try, /*On fail goto*//*Label 625*/ GIMT_Encode4(24813), // Rule ID 234 //
9024 /* 24783 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9025 /* 24786 */ // MIs[0] Operand 1
9026 /* 24786 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
9027 /* 24791 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9028 /* 24795 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9029 /* 24799 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9030 /* 24799 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I16x8),
9031 /* 24802 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9032 /* 24804 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9033 /* 24806 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9034 /* 24808 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9035 /* 24811 */ GIR_RootConstrainSelectedInstOperands,
9036 /* 24812 */ // GIR_Coverage, 234,
9037 /* 24812 */ GIR_EraseRootFromParent_Done,
9038 /* 24813 */ // Label 625: @24813
9039 /* 24813 */ GIM_Try, /*On fail goto*//*Label 626*/ GIMT_Encode4(24848), // Rule ID 240 //
9040 /* 24818 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9041 /* 24821 */ // MIs[0] Operand 1
9042 /* 24821 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
9043 /* 24826 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9044 /* 24830 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9045 /* 24834 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9046 /* 24834 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I16x8),
9047 /* 24837 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9048 /* 24839 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9049 /* 24841 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9050 /* 24843 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9051 /* 24846 */ GIR_RootConstrainSelectedInstOperands,
9052 /* 24847 */ // GIR_Coverage, 240,
9053 /* 24847 */ GIR_EraseRootFromParent_Done,
9054 /* 24848 */ // Label 626: @24848
9055 /* 24848 */ GIM_Try, /*On fail goto*//*Label 627*/ GIMT_Encode4(24883), // Rule ID 244 //
9056 /* 24853 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9057 /* 24856 */ // MIs[0] Operand 1
9058 /* 24856 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
9059 /* 24861 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9060 /* 24865 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9061 /* 24869 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9062 /* 24869 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I16x8),
9063 /* 24872 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9064 /* 24874 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9065 /* 24876 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9066 /* 24878 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9067 /* 24881 */ GIR_RootConstrainSelectedInstOperands,
9068 /* 24882 */ // GIR_Coverage, 244,
9069 /* 24882 */ GIR_EraseRootFromParent_Done,
9070 /* 24883 */ // Label 627: @24883
9071 /* 24883 */ GIM_Reject,
9072 /* 24884 */ // Label 617: @24884
9073 /* 24884 */ GIM_Reject,
9074 /* 24885 */ // Label 559: @24885
9075 /* 24885 */ GIM_Try, /*On fail goto*//*Label 628*/ GIMT_Encode4(25251),
9076 /* 24890 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
9077 /* 24893 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
9078 /* 24896 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9079 /* 24900 */ GIM_Try, /*On fail goto*//*Label 629*/ GIMT_Encode4(24935), // Rule ID 195 //
9080 /* 24905 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9081 /* 24908 */ // MIs[0] Operand 1
9082 /* 24908 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
9083 /* 24913 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9084 /* 24917 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9085 /* 24921 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9086 /* 24921 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I8x16),
9087 /* 24924 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9088 /* 24926 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9089 /* 24928 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9090 /* 24930 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9091 /* 24933 */ GIR_RootConstrainSelectedInstOperands,
9092 /* 24934 */ // GIR_Coverage, 195,
9093 /* 24934 */ GIR_EraseRootFromParent_Done,
9094 /* 24935 */ // Label 629: @24935
9095 /* 24935 */ GIM_Try, /*On fail goto*//*Label 630*/ GIMT_Encode4(24970), // Rule ID 202 //
9096 /* 24940 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9097 /* 24943 */ // MIs[0] Operand 1
9098 /* 24943 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
9099 /* 24948 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9100 /* 24952 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9101 /* 24956 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETNE:{ *:[Other] }) => (NE_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9102 /* 24956 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I8x16),
9103 /* 24959 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9104 /* 24961 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9105 /* 24963 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9106 /* 24965 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9107 /* 24968 */ GIR_RootConstrainSelectedInstOperands,
9108 /* 24969 */ // GIR_Coverage, 202,
9109 /* 24969 */ GIR_EraseRootFromParent_Done,
9110 /* 24970 */ // Label 630: @24970
9111 /* 24970 */ GIM_Try, /*On fail goto*//*Label 631*/ GIMT_Encode4(25005), // Rule ID 209 //
9112 /* 24975 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9113 /* 24978 */ // MIs[0] Operand 1
9114 /* 24978 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
9115 /* 24983 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9116 /* 24987 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9117 /* 24991 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9118 /* 24991 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I8x16),
9119 /* 24994 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9120 /* 24996 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9121 /* 24998 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9122 /* 25000 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9123 /* 25003 */ GIR_RootConstrainSelectedInstOperands,
9124 /* 25004 */ // GIR_Coverage, 209,
9125 /* 25004 */ GIR_EraseRootFromParent_Done,
9126 /* 25005 */ // Label 631: @25005
9127 /* 25005 */ GIM_Try, /*On fail goto*//*Label 632*/ GIMT_Encode4(25040), // Rule ID 213 //
9128 /* 25010 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9129 /* 25013 */ // MIs[0] Operand 1
9130 /* 25013 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
9131 /* 25018 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9132 /* 25022 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9133 /* 25026 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9134 /* 25026 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I8x16),
9135 /* 25029 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9136 /* 25031 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9137 /* 25033 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9138 /* 25035 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9139 /* 25038 */ GIR_RootConstrainSelectedInstOperands,
9140 /* 25039 */ // GIR_Coverage, 213,
9141 /* 25039 */ GIR_EraseRootFromParent_Done,
9142 /* 25040 */ // Label 632: @25040
9143 /* 25040 */ GIM_Try, /*On fail goto*//*Label 633*/ GIMT_Encode4(25075), // Rule ID 219 //
9144 /* 25045 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9145 /* 25048 */ // MIs[0] Operand 1
9146 /* 25048 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
9147 /* 25053 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9148 /* 25057 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9149 /* 25061 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9150 /* 25061 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I8x16),
9151 /* 25064 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9152 /* 25066 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9153 /* 25068 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9154 /* 25070 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9155 /* 25073 */ GIR_RootConstrainSelectedInstOperands,
9156 /* 25074 */ // GIR_Coverage, 219,
9157 /* 25074 */ GIR_EraseRootFromParent_Done,
9158 /* 25075 */ // Label 633: @25075
9159 /* 25075 */ GIM_Try, /*On fail goto*//*Label 634*/ GIMT_Encode4(25110), // Rule ID 223 //
9160 /* 25080 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9161 /* 25083 */ // MIs[0] Operand 1
9162 /* 25083 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
9163 /* 25088 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9164 /* 25092 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9165 /* 25096 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9166 /* 25096 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I8x16),
9167 /* 25099 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9168 /* 25101 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9169 /* 25103 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9170 /* 25105 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9171 /* 25108 */ GIR_RootConstrainSelectedInstOperands,
9172 /* 25109 */ // GIR_Coverage, 223,
9173 /* 25109 */ GIR_EraseRootFromParent_Done,
9174 /* 25110 */ // Label 634: @25110
9175 /* 25110 */ GIM_Try, /*On fail goto*//*Label 635*/ GIMT_Encode4(25145), // Rule ID 229 //
9176 /* 25115 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9177 /* 25118 */ // MIs[0] Operand 1
9178 /* 25118 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
9179 /* 25123 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9180 /* 25127 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9181 /* 25131 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9182 /* 25131 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I8x16),
9183 /* 25134 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9184 /* 25136 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9185 /* 25138 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9186 /* 25140 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9187 /* 25143 */ GIR_RootConstrainSelectedInstOperands,
9188 /* 25144 */ // GIR_Coverage, 229,
9189 /* 25144 */ GIR_EraseRootFromParent_Done,
9190 /* 25145 */ // Label 635: @25145
9191 /* 25145 */ GIM_Try, /*On fail goto*//*Label 636*/ GIMT_Encode4(25180), // Rule ID 233 //
9192 /* 25150 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9193 /* 25153 */ // MIs[0] Operand 1
9194 /* 25153 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
9195 /* 25158 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9196 /* 25162 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9197 /* 25166 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9198 /* 25166 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I8x16),
9199 /* 25169 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9200 /* 25171 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9201 /* 25173 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9202 /* 25175 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9203 /* 25178 */ GIR_RootConstrainSelectedInstOperands,
9204 /* 25179 */ // GIR_Coverage, 233,
9205 /* 25179 */ GIR_EraseRootFromParent_Done,
9206 /* 25180 */ // Label 636: @25180
9207 /* 25180 */ GIM_Try, /*On fail goto*//*Label 637*/ GIMT_Encode4(25215), // Rule ID 239 //
9208 /* 25185 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9209 /* 25188 */ // MIs[0] Operand 1
9210 /* 25188 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
9211 /* 25193 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9212 /* 25197 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9213 /* 25201 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9214 /* 25201 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I8x16),
9215 /* 25204 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9216 /* 25206 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9217 /* 25208 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9218 /* 25210 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9219 /* 25213 */ GIR_RootConstrainSelectedInstOperands,
9220 /* 25214 */ // GIR_Coverage, 239,
9221 /* 25214 */ GIR_EraseRootFromParent_Done,
9222 /* 25215 */ // Label 637: @25215
9223 /* 25215 */ GIM_Try, /*On fail goto*//*Label 638*/ GIMT_Encode4(25250), // Rule ID 243 //
9224 /* 25220 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9225 /* 25223 */ // MIs[0] Operand 1
9226 /* 25223 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
9227 /* 25228 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9228 /* 25232 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9229 /* 25236 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9230 /* 25236 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I8x16),
9231 /* 25239 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9232 /* 25241 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9233 /* 25243 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9234 /* 25245 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9235 /* 25248 */ GIR_RootConstrainSelectedInstOperands,
9236 /* 25249 */ // GIR_Coverage, 243,
9237 /* 25249 */ GIR_EraseRootFromParent_Done,
9238 /* 25250 */ // Label 638: @25250
9239 /* 25250 */ GIM_Reject,
9240 /* 25251 */ // Label 628: @25251
9241 /* 25251 */ GIM_Reject,
9242 /* 25252 */ // Label 560: @25252
9243 /* 25252 */ GIM_Reject,
9244 /* 25253 */ // Label 32: @25253
9245 /* 25253 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 643*/ GIMT_Encode4(26470),
9246 /* 25264 */ /*GILLT_s32*//*Label 639*/ GIMT_Encode4(25284), GIMT_Encode4(0),
9247 /* 25272 */ /*GILLT_v2s64*//*Label 640*/ GIMT_Encode4(25789),
9248 /* 25276 */ /*GILLT_v4s32*//*Label 641*/ GIMT_Encode4(26016),
9249 /* 25280 */ /*GILLT_v8s16*//*Label 642*/ GIMT_Encode4(26243),
9250 /* 25284 */ // Label 639: @25284
9251 /* 25284 */ GIM_Try, /*On fail goto*//*Label 644*/ GIMT_Encode4(25326), // Rule ID 152 //
9252 /* 25289 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
9253 /* 25292 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
9254 /* 25295 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9255 /* 25299 */ // MIs[0] Operand 1
9256 /* 25299 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
9257 /* 25304 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9258 /* 25308 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9259 /* 25312 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9260 /* 25312 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F32),
9261 /* 25315 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9262 /* 25317 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9263 /* 25319 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9264 /* 25321 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9265 /* 25324 */ GIR_RootConstrainSelectedInstOperands,
9266 /* 25325 */ // GIR_Coverage, 152,
9267 /* 25325 */ GIR_EraseRootFromParent_Done,
9268 /* 25326 */ // Label 644: @25326
9269 /* 25326 */ GIM_Try, /*On fail goto*//*Label 645*/ GIMT_Encode4(25368), // Rule ID 153 //
9270 /* 25331 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
9271 /* 25334 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
9272 /* 25337 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9273 /* 25341 */ // MIs[0] Operand 1
9274 /* 25341 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
9275 /* 25346 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9276 /* 25350 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9277 /* 25354 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9278 /* 25354 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F64),
9279 /* 25357 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9280 /* 25359 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9281 /* 25361 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9282 /* 25363 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9283 /* 25366 */ GIR_RootConstrainSelectedInstOperands,
9284 /* 25367 */ // GIR_Coverage, 153,
9285 /* 25367 */ GIR_EraseRootFromParent_Done,
9286 /* 25368 */ // Label 645: @25368
9287 /* 25368 */ GIM_Try, /*On fail goto*//*Label 646*/ GIMT_Encode4(25410), // Rule ID 154 //
9288 /* 25373 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
9289 /* 25376 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
9290 /* 25379 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9291 /* 25383 */ // MIs[0] Operand 1
9292 /* 25383 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
9293 /* 25388 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9294 /* 25392 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9295 /* 25396 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9296 /* 25396 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F32),
9297 /* 25399 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9298 /* 25401 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9299 /* 25403 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9300 /* 25405 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9301 /* 25408 */ GIR_RootConstrainSelectedInstOperands,
9302 /* 25409 */ // GIR_Coverage, 154,
9303 /* 25409 */ GIR_EraseRootFromParent_Done,
9304 /* 25410 */ // Label 646: @25410
9305 /* 25410 */ GIM_Try, /*On fail goto*//*Label 647*/ GIMT_Encode4(25452), // Rule ID 155 //
9306 /* 25415 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
9307 /* 25418 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
9308 /* 25421 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9309 /* 25425 */ // MIs[0] Operand 1
9310 /* 25425 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
9311 /* 25430 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9312 /* 25434 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9313 /* 25438 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9314 /* 25438 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F64),
9315 /* 25441 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9316 /* 25443 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9317 /* 25445 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9318 /* 25447 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9319 /* 25450 */ GIR_RootConstrainSelectedInstOperands,
9320 /* 25451 */ // GIR_Coverage, 155,
9321 /* 25451 */ GIR_EraseRootFromParent_Done,
9322 /* 25452 */ // Label 647: @25452
9323 /* 25452 */ GIM_Try, /*On fail goto*//*Label 648*/ GIMT_Encode4(25494), // Rule ID 156 //
9324 /* 25457 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
9325 /* 25460 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
9326 /* 25463 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9327 /* 25467 */ // MIs[0] Operand 1
9328 /* 25467 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
9329 /* 25472 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9330 /* 25476 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9331 /* 25480 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9332 /* 25480 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F32),
9333 /* 25483 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9334 /* 25485 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9335 /* 25487 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9336 /* 25489 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9337 /* 25492 */ GIR_RootConstrainSelectedInstOperands,
9338 /* 25493 */ // GIR_Coverage, 156,
9339 /* 25493 */ GIR_EraseRootFromParent_Done,
9340 /* 25494 */ // Label 648: @25494
9341 /* 25494 */ GIM_Try, /*On fail goto*//*Label 649*/ GIMT_Encode4(25536), // Rule ID 157 //
9342 /* 25499 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
9343 /* 25502 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
9344 /* 25505 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9345 /* 25509 */ // MIs[0] Operand 1
9346 /* 25509 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
9347 /* 25514 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9348 /* 25518 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9349 /* 25522 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9350 /* 25522 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F64),
9351 /* 25525 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9352 /* 25527 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9353 /* 25529 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9354 /* 25531 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9355 /* 25534 */ GIR_RootConstrainSelectedInstOperands,
9356 /* 25535 */ // GIR_Coverage, 157,
9357 /* 25535 */ GIR_EraseRootFromParent_Done,
9358 /* 25536 */ // Label 649: @25536
9359 /* 25536 */ GIM_Try, /*On fail goto*//*Label 650*/ GIMT_Encode4(25578), // Rule ID 158 //
9360 /* 25541 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
9361 /* 25544 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
9362 /* 25547 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9363 /* 25551 */ // MIs[0] Operand 1
9364 /* 25551 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
9365 /* 25556 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9366 /* 25560 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9367 /* 25564 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9368 /* 25564 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F32),
9369 /* 25567 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9370 /* 25569 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9371 /* 25571 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9372 /* 25573 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9373 /* 25576 */ GIR_RootConstrainSelectedInstOperands,
9374 /* 25577 */ // GIR_Coverage, 158,
9375 /* 25577 */ GIR_EraseRootFromParent_Done,
9376 /* 25578 */ // Label 650: @25578
9377 /* 25578 */ GIM_Try, /*On fail goto*//*Label 651*/ GIMT_Encode4(25620), // Rule ID 159 //
9378 /* 25583 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
9379 /* 25586 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
9380 /* 25589 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9381 /* 25593 */ // MIs[0] Operand 1
9382 /* 25593 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
9383 /* 25598 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9384 /* 25602 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9385 /* 25606 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9386 /* 25606 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F64),
9387 /* 25609 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9388 /* 25611 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9389 /* 25613 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9390 /* 25615 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9391 /* 25618 */ GIR_RootConstrainSelectedInstOperands,
9392 /* 25619 */ // GIR_Coverage, 159,
9393 /* 25619 */ GIR_EraseRootFromParent_Done,
9394 /* 25620 */ // Label 651: @25620
9395 /* 25620 */ GIM_Try, /*On fail goto*//*Label 652*/ GIMT_Encode4(25662), // Rule ID 160 //
9396 /* 25625 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
9397 /* 25628 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
9398 /* 25631 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9399 /* 25635 */ // MIs[0] Operand 1
9400 /* 25635 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
9401 /* 25640 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9402 /* 25644 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9403 /* 25648 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9404 /* 25648 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F32),
9405 /* 25651 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9406 /* 25653 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9407 /* 25655 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9408 /* 25657 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9409 /* 25660 */ GIR_RootConstrainSelectedInstOperands,
9410 /* 25661 */ // GIR_Coverage, 160,
9411 /* 25661 */ GIR_EraseRootFromParent_Done,
9412 /* 25662 */ // Label 652: @25662
9413 /* 25662 */ GIM_Try, /*On fail goto*//*Label 653*/ GIMT_Encode4(25704), // Rule ID 161 //
9414 /* 25667 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
9415 /* 25670 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
9416 /* 25673 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9417 /* 25677 */ // MIs[0] Operand 1
9418 /* 25677 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
9419 /* 25682 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9420 /* 25686 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9421 /* 25690 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9422 /* 25690 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F64),
9423 /* 25693 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9424 /* 25695 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9425 /* 25697 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9426 /* 25699 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9427 /* 25702 */ GIR_RootConstrainSelectedInstOperands,
9428 /* 25703 */ // GIR_Coverage, 161,
9429 /* 25703 */ GIR_EraseRootFromParent_Done,
9430 /* 25704 */ // Label 653: @25704
9431 /* 25704 */ GIM_Try, /*On fail goto*//*Label 654*/ GIMT_Encode4(25746), // Rule ID 162 //
9432 /* 25709 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
9433 /* 25712 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
9434 /* 25715 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9435 /* 25719 */ // MIs[0] Operand 1
9436 /* 25719 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
9437 /* 25724 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9438 /* 25728 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9439 /* 25732 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9440 /* 25732 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F32),
9441 /* 25735 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9442 /* 25737 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9443 /* 25739 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9444 /* 25741 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9445 /* 25744 */ GIR_RootConstrainSelectedInstOperands,
9446 /* 25745 */ // GIR_Coverage, 162,
9447 /* 25745 */ GIR_EraseRootFromParent_Done,
9448 /* 25746 */ // Label 654: @25746
9449 /* 25746 */ GIM_Try, /*On fail goto*//*Label 655*/ GIMT_Encode4(25788), // Rule ID 163 //
9450 /* 25751 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
9451 /* 25754 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
9452 /* 25757 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9453 /* 25761 */ // MIs[0] Operand 1
9454 /* 25761 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
9455 /* 25766 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9456 /* 25770 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9457 /* 25774 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9458 /* 25774 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F64),
9459 /* 25777 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9460 /* 25779 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9461 /* 25781 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9462 /* 25783 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9463 /* 25786 */ GIR_RootConstrainSelectedInstOperands,
9464 /* 25787 */ // GIR_Coverage, 163,
9465 /* 25787 */ GIR_EraseRootFromParent_Done,
9466 /* 25788 */ // Label 655: @25788
9467 /* 25788 */ GIM_Reject,
9468 /* 25789 */ // Label 640: @25789
9469 /* 25789 */ GIM_Try, /*On fail goto*//*Label 656*/ GIMT_Encode4(26015),
9470 /* 25794 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
9471 /* 25797 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
9472 /* 25800 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9473 /* 25804 */ GIM_Try, /*On fail goto*//*Label 657*/ GIMT_Encode4(25839), // Rule ID 200 //
9474 /* 25809 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9475 /* 25812 */ // MIs[0] Operand 1
9476 /* 25812 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
9477 /* 25817 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9478 /* 25821 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9479 /* 25825 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
9480 /* 25825 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F64x2),
9481 /* 25828 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9482 /* 25830 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9483 /* 25832 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9484 /* 25834 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9485 /* 25837 */ GIR_RootConstrainSelectedInstOperands,
9486 /* 25838 */ // GIR_Coverage, 200,
9487 /* 25838 */ GIR_EraseRootFromParent_Done,
9488 /* 25839 */ // Label 657: @25839
9489 /* 25839 */ GIM_Try, /*On fail goto*//*Label 658*/ GIMT_Encode4(25874), // Rule ID 207 //
9490 /* 25844 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9491 /* 25847 */ // MIs[0] Operand 1
9492 /* 25847 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
9493 /* 25852 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9494 /* 25856 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9495 /* 25860 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
9496 /* 25860 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F64x2),
9497 /* 25863 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9498 /* 25865 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9499 /* 25867 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9500 /* 25869 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9501 /* 25872 */ GIR_RootConstrainSelectedInstOperands,
9502 /* 25873 */ // GIR_Coverage, 207,
9503 /* 25873 */ GIR_EraseRootFromParent_Done,
9504 /* 25874 */ // Label 658: @25874
9505 /* 25874 */ GIM_Try, /*On fail goto*//*Label 659*/ GIMT_Encode4(25909), // Rule ID 217 //
9506 /* 25879 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9507 /* 25882 */ // MIs[0] Operand 1
9508 /* 25882 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
9509 /* 25887 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9510 /* 25891 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9511 /* 25895 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
9512 /* 25895 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F64x2),
9513 /* 25898 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9514 /* 25900 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9515 /* 25902 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9516 /* 25904 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9517 /* 25907 */ GIR_RootConstrainSelectedInstOperands,
9518 /* 25908 */ // GIR_Coverage, 217,
9519 /* 25908 */ GIR_EraseRootFromParent_Done,
9520 /* 25909 */ // Label 659: @25909
9521 /* 25909 */ GIM_Try, /*On fail goto*//*Label 660*/ GIMT_Encode4(25944), // Rule ID 227 //
9522 /* 25914 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9523 /* 25917 */ // MIs[0] Operand 1
9524 /* 25917 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
9525 /* 25922 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9526 /* 25926 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9527 /* 25930 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
9528 /* 25930 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F64x2),
9529 /* 25933 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9530 /* 25935 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9531 /* 25937 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9532 /* 25939 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9533 /* 25942 */ GIR_RootConstrainSelectedInstOperands,
9534 /* 25943 */ // GIR_Coverage, 227,
9535 /* 25943 */ GIR_EraseRootFromParent_Done,
9536 /* 25944 */ // Label 660: @25944
9537 /* 25944 */ GIM_Try, /*On fail goto*//*Label 661*/ GIMT_Encode4(25979), // Rule ID 237 //
9538 /* 25949 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9539 /* 25952 */ // MIs[0] Operand 1
9540 /* 25952 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
9541 /* 25957 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9542 /* 25961 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9543 /* 25965 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
9544 /* 25965 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F64x2),
9545 /* 25968 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9546 /* 25970 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9547 /* 25972 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9548 /* 25974 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9549 /* 25977 */ GIR_RootConstrainSelectedInstOperands,
9550 /* 25978 */ // GIR_Coverage, 237,
9551 /* 25978 */ GIR_EraseRootFromParent_Done,
9552 /* 25979 */ // Label 661: @25979
9553 /* 25979 */ GIM_Try, /*On fail goto*//*Label 662*/ GIMT_Encode4(26014), // Rule ID 247 //
9554 /* 25984 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9555 /* 25987 */ // MIs[0] Operand 1
9556 /* 25987 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
9557 /* 25992 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9558 /* 25996 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9559 /* 26000 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
9560 /* 26000 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F64x2),
9561 /* 26003 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9562 /* 26005 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9563 /* 26007 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9564 /* 26009 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9565 /* 26012 */ GIR_RootConstrainSelectedInstOperands,
9566 /* 26013 */ // GIR_Coverage, 247,
9567 /* 26013 */ GIR_EraseRootFromParent_Done,
9568 /* 26014 */ // Label 662: @26014
9569 /* 26014 */ GIM_Reject,
9570 /* 26015 */ // Label 656: @26015
9571 /* 26015 */ GIM_Reject,
9572 /* 26016 */ // Label 641: @26016
9573 /* 26016 */ GIM_Try, /*On fail goto*//*Label 663*/ GIMT_Encode4(26242),
9574 /* 26021 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
9575 /* 26024 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
9576 /* 26027 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9577 /* 26031 */ GIM_Try, /*On fail goto*//*Label 664*/ GIMT_Encode4(26066), // Rule ID 199 //
9578 /* 26036 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9579 /* 26039 */ // MIs[0] Operand 1
9580 /* 26039 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
9581 /* 26044 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9582 /* 26048 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9583 /* 26052 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
9584 /* 26052 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F32x4),
9585 /* 26055 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9586 /* 26057 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9587 /* 26059 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9588 /* 26061 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9589 /* 26064 */ GIR_RootConstrainSelectedInstOperands,
9590 /* 26065 */ // GIR_Coverage, 199,
9591 /* 26065 */ GIR_EraseRootFromParent_Done,
9592 /* 26066 */ // Label 664: @26066
9593 /* 26066 */ GIM_Try, /*On fail goto*//*Label 665*/ GIMT_Encode4(26101), // Rule ID 206 //
9594 /* 26071 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9595 /* 26074 */ // MIs[0] Operand 1
9596 /* 26074 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
9597 /* 26079 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9598 /* 26083 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9599 /* 26087 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
9600 /* 26087 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F32x4),
9601 /* 26090 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9602 /* 26092 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9603 /* 26094 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9604 /* 26096 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9605 /* 26099 */ GIR_RootConstrainSelectedInstOperands,
9606 /* 26100 */ // GIR_Coverage, 206,
9607 /* 26100 */ GIR_EraseRootFromParent_Done,
9608 /* 26101 */ // Label 665: @26101
9609 /* 26101 */ GIM_Try, /*On fail goto*//*Label 666*/ GIMT_Encode4(26136), // Rule ID 216 //
9610 /* 26106 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9611 /* 26109 */ // MIs[0] Operand 1
9612 /* 26109 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
9613 /* 26114 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9614 /* 26118 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9615 /* 26122 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
9616 /* 26122 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F32x4),
9617 /* 26125 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9618 /* 26127 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9619 /* 26129 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9620 /* 26131 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9621 /* 26134 */ GIR_RootConstrainSelectedInstOperands,
9622 /* 26135 */ // GIR_Coverage, 216,
9623 /* 26135 */ GIR_EraseRootFromParent_Done,
9624 /* 26136 */ // Label 666: @26136
9625 /* 26136 */ GIM_Try, /*On fail goto*//*Label 667*/ GIMT_Encode4(26171), // Rule ID 226 //
9626 /* 26141 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9627 /* 26144 */ // MIs[0] Operand 1
9628 /* 26144 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
9629 /* 26149 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9630 /* 26153 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9631 /* 26157 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
9632 /* 26157 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F32x4),
9633 /* 26160 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9634 /* 26162 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9635 /* 26164 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9636 /* 26166 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9637 /* 26169 */ GIR_RootConstrainSelectedInstOperands,
9638 /* 26170 */ // GIR_Coverage, 226,
9639 /* 26170 */ GIR_EraseRootFromParent_Done,
9640 /* 26171 */ // Label 667: @26171
9641 /* 26171 */ GIM_Try, /*On fail goto*//*Label 668*/ GIMT_Encode4(26206), // Rule ID 236 //
9642 /* 26176 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9643 /* 26179 */ // MIs[0] Operand 1
9644 /* 26179 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
9645 /* 26184 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9646 /* 26188 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9647 /* 26192 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
9648 /* 26192 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F32x4),
9649 /* 26195 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9650 /* 26197 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9651 /* 26199 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9652 /* 26201 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9653 /* 26204 */ GIR_RootConstrainSelectedInstOperands,
9654 /* 26205 */ // GIR_Coverage, 236,
9655 /* 26205 */ GIR_EraseRootFromParent_Done,
9656 /* 26206 */ // Label 668: @26206
9657 /* 26206 */ GIM_Try, /*On fail goto*//*Label 669*/ GIMT_Encode4(26241), // Rule ID 246 //
9658 /* 26211 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9659 /* 26214 */ // MIs[0] Operand 1
9660 /* 26214 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
9661 /* 26219 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9662 /* 26223 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9663 /* 26227 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
9664 /* 26227 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F32x4),
9665 /* 26230 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9666 /* 26232 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9667 /* 26234 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9668 /* 26236 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9669 /* 26239 */ GIR_RootConstrainSelectedInstOperands,
9670 /* 26240 */ // GIR_Coverage, 246,
9671 /* 26240 */ GIR_EraseRootFromParent_Done,
9672 /* 26241 */ // Label 669: @26241
9673 /* 26241 */ GIM_Reject,
9674 /* 26242 */ // Label 663: @26242
9675 /* 26242 */ GIM_Reject,
9676 /* 26243 */ // Label 642: @26243
9677 /* 26243 */ GIM_Try, /*On fail goto*//*Label 670*/ GIMT_Encode4(26469),
9678 /* 26248 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
9679 /* 26251 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
9680 /* 26254 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9681 /* 26258 */ GIM_Try, /*On fail goto*//*Label 671*/ GIMT_Encode4(26293), // Rule ID 201 //
9682 /* 26263 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
9683 /* 26266 */ // MIs[0] Operand 1
9684 /* 26266 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
9685 /* 26271 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9686 /* 26275 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9687 /* 26279 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
9688 /* 26279 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F16x8),
9689 /* 26282 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9690 /* 26284 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9691 /* 26286 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9692 /* 26288 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9693 /* 26291 */ GIR_RootConstrainSelectedInstOperands,
9694 /* 26292 */ // GIR_Coverage, 201,
9695 /* 26292 */ GIR_EraseRootFromParent_Done,
9696 /* 26293 */ // Label 671: @26293
9697 /* 26293 */ GIM_Try, /*On fail goto*//*Label 672*/ GIMT_Encode4(26328), // Rule ID 208 //
9698 /* 26298 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
9699 /* 26301 */ // MIs[0] Operand 1
9700 /* 26301 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
9701 /* 26306 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9702 /* 26310 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9703 /* 26314 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
9704 /* 26314 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F16x8),
9705 /* 26317 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9706 /* 26319 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9707 /* 26321 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9708 /* 26323 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9709 /* 26326 */ GIR_RootConstrainSelectedInstOperands,
9710 /* 26327 */ // GIR_Coverage, 208,
9711 /* 26327 */ GIR_EraseRootFromParent_Done,
9712 /* 26328 */ // Label 672: @26328
9713 /* 26328 */ GIM_Try, /*On fail goto*//*Label 673*/ GIMT_Encode4(26363), // Rule ID 218 //
9714 /* 26333 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
9715 /* 26336 */ // MIs[0] Operand 1
9716 /* 26336 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
9717 /* 26341 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9718 /* 26345 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9719 /* 26349 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
9720 /* 26349 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F16x8),
9721 /* 26352 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9722 /* 26354 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9723 /* 26356 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9724 /* 26358 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9725 /* 26361 */ GIR_RootConstrainSelectedInstOperands,
9726 /* 26362 */ // GIR_Coverage, 218,
9727 /* 26362 */ GIR_EraseRootFromParent_Done,
9728 /* 26363 */ // Label 673: @26363
9729 /* 26363 */ GIM_Try, /*On fail goto*//*Label 674*/ GIMT_Encode4(26398), // Rule ID 228 //
9730 /* 26368 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
9731 /* 26371 */ // MIs[0] Operand 1
9732 /* 26371 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
9733 /* 26376 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9734 /* 26380 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9735 /* 26384 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
9736 /* 26384 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F16x8),
9737 /* 26387 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9738 /* 26389 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9739 /* 26391 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9740 /* 26393 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9741 /* 26396 */ GIR_RootConstrainSelectedInstOperands,
9742 /* 26397 */ // GIR_Coverage, 228,
9743 /* 26397 */ GIR_EraseRootFromParent_Done,
9744 /* 26398 */ // Label 674: @26398
9745 /* 26398 */ GIM_Try, /*On fail goto*//*Label 675*/ GIMT_Encode4(26433), // Rule ID 238 //
9746 /* 26403 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
9747 /* 26406 */ // MIs[0] Operand 1
9748 /* 26406 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
9749 /* 26411 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9750 /* 26415 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9751 /* 26419 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
9752 /* 26419 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F16x8),
9753 /* 26422 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9754 /* 26424 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9755 /* 26426 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9756 /* 26428 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9757 /* 26431 */ GIR_RootConstrainSelectedInstOperands,
9758 /* 26432 */ // GIR_Coverage, 238,
9759 /* 26432 */ GIR_EraseRootFromParent_Done,
9760 /* 26433 */ // Label 675: @26433
9761 /* 26433 */ GIM_Try, /*On fail goto*//*Label 676*/ GIMT_Encode4(26468), // Rule ID 248 //
9762 /* 26438 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
9763 /* 26441 */ // MIs[0] Operand 1
9764 /* 26441 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
9765 /* 26446 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9766 /* 26450 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9767 /* 26454 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
9768 /* 26454 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F16x8),
9769 /* 26457 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9770 /* 26459 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9771 /* 26461 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9772 /* 26463 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9773 /* 26466 */ GIR_RootConstrainSelectedInstOperands,
9774 /* 26467 */ // GIR_Coverage, 248,
9775 /* 26467 */ GIR_EraseRootFromParent_Done,
9776 /* 26468 */ // Label 676: @26468
9777 /* 26468 */ GIM_Reject,
9778 /* 26469 */ // Label 670: @26469
9779 /* 26469 */ GIM_Reject,
9780 /* 26470 */ // Label 643: @26470
9781 /* 26470 */ GIM_Reject,
9782 /* 26471 */ // Label 33: @26471
9783 /* 26471 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 683*/ GIMT_Encode4(31496),
9784 /* 26482 */ /*GILLT_s32*//*Label 677*/ GIMT_Encode4(26506),
9785 /* 26486 */ /*GILLT_s64*//*Label 678*/ GIMT_Encode4(26864),
9786 /* 26490 */ /*GILLT_v2s64*//*Label 679*/ GIMT_Encode4(27222),
9787 /* 26494 */ /*GILLT_v4s32*//*Label 680*/ GIMT_Encode4(28713),
9788 /* 26498 */ /*GILLT_v8s16*//*Label 681*/ GIMT_Encode4(30204),
9789 /* 26502 */ /*GILLT_v16s8*//*Label 682*/ GIMT_Encode4(31251),
9790 /* 26506 */ // Label 677: @26506
9791 /* 26506 */ GIM_Try, /*On fail goto*//*Label 684*/ GIMT_Encode4(26863),
9792 /* 26511 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
9793 /* 26514 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
9794 /* 26517 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
9795 /* 26520 */ GIM_Try, /*On fail goto*//*Label 685*/ GIMT_Encode4(26587), // Rule ID 663 //
9796 /* 26525 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9797 /* 26529 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
9798 /* 26533 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
9799 /* 26537 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
9800 /* 26541 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
9801 /* 26545 */ // MIs[1] Operand 1
9802 /* 26545 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
9803 /* 26550 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9804 /* 26555 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
9805 /* 26559 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9806 /* 26563 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9807 /* 26567 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9808 /* 26569 */ // (select:{ *:[i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$cond)
9809 /* 26569 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
9810 /* 26572 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9811 /* 26574 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9812 /* 26576 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9813 /* 26578 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
9814 /* 26582 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9815 /* 26585 */ GIR_RootConstrainSelectedInstOperands,
9816 /* 26586 */ // GIR_Coverage, 663,
9817 /* 26586 */ GIR_EraseRootFromParent_Done,
9818 /* 26587 */ // Label 685: @26587
9819 /* 26587 */ GIM_Try, /*On fail goto*//*Label 686*/ GIMT_Encode4(26654), // Rule ID 665 //
9820 /* 26592 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9821 /* 26596 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
9822 /* 26600 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
9823 /* 26604 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
9824 /* 26608 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
9825 /* 26612 */ // MIs[1] Operand 1
9826 /* 26612 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
9827 /* 26617 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9828 /* 26622 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
9829 /* 26626 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9830 /* 26630 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9831 /* 26634 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9832 /* 26636 */ // (select:{ *:[i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$cond)
9833 /* 26636 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
9834 /* 26639 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9835 /* 26641 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9836 /* 26643 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9837 /* 26645 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
9838 /* 26649 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9839 /* 26652 */ GIR_RootConstrainSelectedInstOperands,
9840 /* 26653 */ // GIR_Coverage, 665,
9841 /* 26653 */ GIR_EraseRootFromParent_Done,
9842 /* 26654 */ // Label 686: @26654
9843 /* 26654 */ GIM_Try, /*On fail goto*//*Label 687*/ GIMT_Encode4(26721), // Rule ID 689 //
9844 /* 26659 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9845 /* 26663 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
9846 /* 26667 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
9847 /* 26671 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
9848 /* 26675 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
9849 /* 26679 */ // MIs[1] Operand 1
9850 /* 26679 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
9851 /* 26684 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9852 /* 26689 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
9853 /* 26693 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9854 /* 26697 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9855 /* 26701 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9856 /* 26703 */ // (select:{ *:[f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SELECT_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, I32:{ *:[i32] }:$cond)
9857 /* 26703 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F32),
9858 /* 26706 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9859 /* 26708 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9860 /* 26710 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9861 /* 26712 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
9862 /* 26716 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9863 /* 26719 */ GIR_RootConstrainSelectedInstOperands,
9864 /* 26720 */ // GIR_Coverage, 689,
9865 /* 26720 */ GIR_EraseRootFromParent_Done,
9866 /* 26721 */ // Label 687: @26721
9867 /* 26721 */ GIM_Try, /*On fail goto*//*Label 688*/ GIMT_Encode4(26788), // Rule ID 691 //
9868 /* 26726 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9869 /* 26730 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
9870 /* 26734 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
9871 /* 26738 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
9872 /* 26742 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
9873 /* 26746 */ // MIs[1] Operand 1
9874 /* 26746 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
9875 /* 26751 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9876 /* 26756 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
9877 /* 26760 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9878 /* 26764 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9879 /* 26768 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9880 /* 26770 */ // (select:{ *:[f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SELECT_F32:{ *:[f32] } F32:{ *:[f32] }:$rhs, F32:{ *:[f32] }:$lhs, I32:{ *:[i32] }:$cond)
9881 /* 26770 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F32),
9882 /* 26773 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9883 /* 26775 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9884 /* 26777 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9885 /* 26779 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
9886 /* 26783 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9887 /* 26786 */ GIR_RootConstrainSelectedInstOperands,
9888 /* 26787 */ // GIR_Coverage, 691,
9889 /* 26787 */ GIR_EraseRootFromParent_Done,
9890 /* 26788 */ // Label 688: @26788
9891 /* 26788 */ GIM_Try, /*On fail goto*//*Label 689*/ GIMT_Encode4(26825), // Rule ID 122 //
9892 /* 26793 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9893 /* 26797 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9894 /* 26801 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9895 /* 26805 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9896 /* 26809 */ // (select:{ *:[i32] } I32:{ *:[i32] }:$cond, I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$cond)
9897 /* 26809 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
9898 /* 26812 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9899 /* 26814 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9900 /* 26816 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9901 /* 26818 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
9902 /* 26820 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9903 /* 26823 */ GIR_RootConstrainSelectedInstOperands,
9904 /* 26824 */ // GIR_Coverage, 122,
9905 /* 26824 */ GIR_EraseRootFromParent_Done,
9906 /* 26825 */ // Label 689: @26825
9907 /* 26825 */ GIM_Try, /*On fail goto*//*Label 690*/ GIMT_Encode4(26862), // Rule ID 164 //
9908 /* 26830 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9909 /* 26834 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9910 /* 26838 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9911 /* 26842 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9912 /* 26846 */ // (select:{ *:[f32] } I32:{ *:[i32] }:$cond, F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SELECT_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, I32:{ *:[i32] }:$cond)
9913 /* 26846 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F32),
9914 /* 26849 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9915 /* 26851 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9916 /* 26853 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9917 /* 26855 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
9918 /* 26857 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9919 /* 26860 */ GIR_RootConstrainSelectedInstOperands,
9920 /* 26861 */ // GIR_Coverage, 164,
9921 /* 26861 */ GIR_EraseRootFromParent_Done,
9922 /* 26862 */ // Label 690: @26862
9923 /* 26862 */ GIM_Reject,
9924 /* 26863 */ // Label 684: @26863
9925 /* 26863 */ GIM_Reject,
9926 /* 26864 */ // Label 678: @26864
9927 /* 26864 */ GIM_Try, /*On fail goto*//*Label 691*/ GIMT_Encode4(27221),
9928 /* 26869 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
9929 /* 26872 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
9930 /* 26875 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
9931 /* 26878 */ GIM_Try, /*On fail goto*//*Label 692*/ GIMT_Encode4(26945), // Rule ID 664 //
9932 /* 26883 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9933 /* 26887 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
9934 /* 26891 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
9935 /* 26895 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
9936 /* 26899 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
9937 /* 26903 */ // MIs[1] Operand 1
9938 /* 26903 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
9939 /* 26908 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9940 /* 26913 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
9941 /* 26917 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9942 /* 26921 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9943 /* 26925 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9944 /* 26927 */ // (select:{ *:[i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, I32:{ *:[i32] }:$cond)
9945 /* 26927 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
9946 /* 26930 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9947 /* 26932 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9948 /* 26934 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9949 /* 26936 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
9950 /* 26940 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9951 /* 26943 */ GIR_RootConstrainSelectedInstOperands,
9952 /* 26944 */ // GIR_Coverage, 664,
9953 /* 26944 */ GIR_EraseRootFromParent_Done,
9954 /* 26945 */ // Label 692: @26945
9955 /* 26945 */ GIM_Try, /*On fail goto*//*Label 693*/ GIMT_Encode4(27012), // Rule ID 666 //
9956 /* 26950 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9957 /* 26954 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
9958 /* 26958 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
9959 /* 26962 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
9960 /* 26966 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
9961 /* 26970 */ // MIs[1] Operand 1
9962 /* 26970 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
9963 /* 26975 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9964 /* 26980 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
9965 /* 26984 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9966 /* 26988 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9967 /* 26992 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9968 /* 26994 */ // (select:{ *:[i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$rhs, I64:{ *:[i64] }:$lhs, I32:{ *:[i32] }:$cond)
9969 /* 26994 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
9970 /* 26997 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9971 /* 26999 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9972 /* 27001 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9973 /* 27003 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
9974 /* 27007 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9975 /* 27010 */ GIR_RootConstrainSelectedInstOperands,
9976 /* 27011 */ // GIR_Coverage, 666,
9977 /* 27011 */ GIR_EraseRootFromParent_Done,
9978 /* 27012 */ // Label 693: @27012
9979 /* 27012 */ GIM_Try, /*On fail goto*//*Label 694*/ GIMT_Encode4(27079), // Rule ID 690 //
9980 /* 27017 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9981 /* 27021 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
9982 /* 27025 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
9983 /* 27029 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
9984 /* 27033 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
9985 /* 27037 */ // MIs[1] Operand 1
9986 /* 27037 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
9987 /* 27042 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9988 /* 27047 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
9989 /* 27051 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9990 /* 27055 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9991 /* 27059 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9992 /* 27061 */ // (select:{ *:[f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SELECT_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, I32:{ *:[i32] }:$cond)
9993 /* 27061 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F64),
9994 /* 27064 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9995 /* 27066 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9996 /* 27068 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9997 /* 27070 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
9998 /* 27074 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9999 /* 27077 */ GIR_RootConstrainSelectedInstOperands,
10000 /* 27078 */ // GIR_Coverage, 690,
10001 /* 27078 */ GIR_EraseRootFromParent_Done,
10002 /* 27079 */ // Label 694: @27079
10003 /* 27079 */ GIM_Try, /*On fail goto*//*Label 695*/ GIMT_Encode4(27146), // Rule ID 692 //
10004 /* 27084 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10005 /* 27088 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10006 /* 27092 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10007 /* 27096 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10008 /* 27100 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10009 /* 27104 */ // MIs[1] Operand 1
10010 /* 27104 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10011 /* 27109 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10012 /* 27114 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10013 /* 27118 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10014 /* 27122 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10015 /* 27126 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10016 /* 27128 */ // (select:{ *:[f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SELECT_F64:{ *:[f64] } F64:{ *:[f64] }:$rhs, F64:{ *:[f64] }:$lhs, I32:{ *:[i32] }:$cond)
10017 /* 27128 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F64),
10018 /* 27131 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10019 /* 27133 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10020 /* 27135 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10021 /* 27137 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10022 /* 27141 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10023 /* 27144 */ GIR_RootConstrainSelectedInstOperands,
10024 /* 27145 */ // GIR_Coverage, 692,
10025 /* 27145 */ GIR_EraseRootFromParent_Done,
10026 /* 27146 */ // Label 695: @27146
10027 /* 27146 */ GIM_Try, /*On fail goto*//*Label 696*/ GIMT_Encode4(27183), // Rule ID 123 //
10028 /* 27151 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10029 /* 27155 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10030 /* 27159 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10031 /* 27163 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10032 /* 27167 */ // (select:{ *:[i64] } I32:{ *:[i32] }:$cond, I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, I32:{ *:[i32] }:$cond)
10033 /* 27167 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
10034 /* 27170 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10035 /* 27172 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10036 /* 27174 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10037 /* 27176 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
10038 /* 27178 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10039 /* 27181 */ GIR_RootConstrainSelectedInstOperands,
10040 /* 27182 */ // GIR_Coverage, 123,
10041 /* 27182 */ GIR_EraseRootFromParent_Done,
10042 /* 27183 */ // Label 696: @27183
10043 /* 27183 */ GIM_Try, /*On fail goto*//*Label 697*/ GIMT_Encode4(27220), // Rule ID 165 //
10044 /* 27188 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10045 /* 27192 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10046 /* 27196 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10047 /* 27200 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10048 /* 27204 */ // (select:{ *:[f64] } I32:{ *:[i32] }:$cond, F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SELECT_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, I32:{ *:[i32] }:$cond)
10049 /* 27204 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F64),
10050 /* 27207 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10051 /* 27209 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10052 /* 27211 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10053 /* 27213 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
10054 /* 27215 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10055 /* 27218 */ GIR_RootConstrainSelectedInstOperands,
10056 /* 27219 */ // GIR_Coverage, 165,
10057 /* 27219 */ GIR_EraseRootFromParent_Done,
10058 /* 27220 */ // Label 697: @27220
10059 /* 27220 */ GIM_Reject,
10060 /* 27221 */ // Label 691: @27221
10061 /* 27221 */ GIM_Reject,
10062 /* 27222 */ // Label 679: @27222
10063 /* 27222 */ GIM_Try, /*On fail goto*//*Label 698*/ GIMT_Encode4(27322), // Rule ID 1297 //
10064 /* 27227 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
10065 /* 27230 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
10066 /* 27233 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10067 /* 27237 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10068 /* 27241 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10069 /* 27245 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
10070 /* 27249 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
10071 /* 27253 */ // MIs[1] Operand 1
10072 /* 27253 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10073 /* 27258 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10074 /* 27262 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
10075 /* 27266 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
10076 /* 27270 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10077 /* 27275 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
10078 /* 27279 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
10079 /* 27283 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
10080 /* 27287 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10081 /* 27292 */ // MIs[0] rhs
10082 /* 27292 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
10083 /* 27297 */ // MIs[0] lhs
10084 /* 27297 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
10085 /* 27302 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10086 /* 27304 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (SIMD_RELAXED_FMIN_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
10087 /* 27304 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F64x2),
10088 /* 27307 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10089 /* 27309 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
10090 /* 27313 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
10091 /* 27317 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10092 /* 27320 */ GIR_RootConstrainSelectedInstOperands,
10093 /* 27321 */ // GIR_Coverage, 1297,
10094 /* 27321 */ GIR_EraseRootFromParent_Done,
10095 /* 27322 */ // Label 698: @27322
10096 /* 27322 */ GIM_Try, /*On fail goto*//*Label 699*/ GIMT_Encode4(27422), // Rule ID 1298 //
10097 /* 27327 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
10098 /* 27330 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
10099 /* 27333 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10100 /* 27337 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10101 /* 27341 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10102 /* 27345 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
10103 /* 27349 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
10104 /* 27353 */ // MIs[1] Operand 1
10105 /* 27353 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10106 /* 27358 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10107 /* 27362 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
10108 /* 27366 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
10109 /* 27370 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10110 /* 27375 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
10111 /* 27379 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
10112 /* 27383 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
10113 /* 27387 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10114 /* 27392 */ // MIs[0] rhs
10115 /* 27392 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
10116 /* 27397 */ // MIs[0] lhs
10117 /* 27397 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
10118 /* 27402 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10119 /* 27404 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (SIMD_RELAXED_FMAX_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
10120 /* 27404 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F64x2),
10121 /* 27407 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10122 /* 27409 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
10123 /* 27413 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
10124 /* 27417 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10125 /* 27420 */ GIR_RootConstrainSelectedInstOperands,
10126 /* 27421 */ // GIR_Coverage, 1298,
10127 /* 27421 */ GIR_EraseRootFromParent_Done,
10128 /* 27422 */ // Label 699: @27422
10129 /* 27422 */ GIM_Try, /*On fail goto*//*Label 700*/ GIMT_Encode4(27519), // Rule ID 1167 //
10130 /* 27427 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
10131 /* 27430 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10132 /* 27434 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10133 /* 27438 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10134 /* 27442 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
10135 /* 27446 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
10136 /* 27450 */ // MIs[1] Operand 1
10137 /* 27450 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10138 /* 27455 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10139 /* 27459 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
10140 /* 27463 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
10141 /* 27467 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10142 /* 27472 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
10143 /* 27476 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
10144 /* 27480 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
10145 /* 27484 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10146 /* 27489 */ // MIs[0] rhs
10147 /* 27489 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
10148 /* 27494 */ // MIs[0] lhs
10149 /* 27494 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
10150 /* 27499 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10151 /* 27501 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (PMIN_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
10152 /* 27501 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
10153 /* 27504 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10154 /* 27506 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
10155 /* 27510 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
10156 /* 27514 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10157 /* 27517 */ GIR_RootConstrainSelectedInstOperands,
10158 /* 27518 */ // GIR_Coverage, 1167,
10159 /* 27518 */ GIR_EraseRootFromParent_Done,
10160 /* 27519 */ // Label 700: @27519
10161 /* 27519 */ GIM_Try, /*On fail goto*//*Label 701*/ GIMT_Encode4(27616), // Rule ID 1168 //
10162 /* 27524 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
10163 /* 27527 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10164 /* 27531 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10165 /* 27535 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10166 /* 27539 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
10167 /* 27543 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
10168 /* 27547 */ // MIs[1] Operand 1
10169 /* 27547 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10170 /* 27552 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10171 /* 27556 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
10172 /* 27560 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
10173 /* 27564 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10174 /* 27569 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
10175 /* 27573 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
10176 /* 27577 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
10177 /* 27581 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10178 /* 27586 */ // MIs[0] rhs
10179 /* 27586 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
10180 /* 27591 */ // MIs[0] lhs
10181 /* 27591 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
10182 /* 27596 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10183 /* 27598 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (PMAX_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
10184 /* 27598 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
10185 /* 27601 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10186 /* 27603 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
10187 /* 27607 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
10188 /* 27611 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10189 /* 27614 */ GIR_RootConstrainSelectedInstOperands,
10190 /* 27615 */ // GIR_Coverage, 1168,
10191 /* 27615 */ GIR_EraseRootFromParent_Done,
10192 /* 27616 */ // Label 701: @27616
10193 /* 27616 */ GIM_Try, /*On fail goto*//*Label 702*/ GIMT_Encode4(27692), // Rule ID 1102 //
10194 /* 27621 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10195 /* 27624 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
10196 /* 27627 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
10197 /* 27630 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10198 /* 27634 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10199 /* 27638 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10200 /* 27642 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10201 /* 27646 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10202 /* 27650 */ // MIs[1] Operand 1
10203 /* 27650 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10204 /* 27655 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10205 /* 27660 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10206 /* 27664 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10207 /* 27668 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10208 /* 27672 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10209 /* 27674 */ // (select:{ *:[v2i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SELECT_V128:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs, ?:{ *:[i32] }:$cond)
10210 /* 27674 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10211 /* 27677 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10212 /* 27679 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10213 /* 27681 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10214 /* 27683 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10215 /* 27687 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10216 /* 27690 */ GIR_RootConstrainSelectedInstOperands,
10217 /* 27691 */ // GIR_Coverage, 1102,
10218 /* 27691 */ GIR_EraseRootFromParent_Done,
10219 /* 27692 */ // Label 702: @27692
10220 /* 27692 */ GIM_Try, /*On fail goto*//*Label 703*/ GIMT_Encode4(27768), // Rule ID 1103 //
10221 /* 27697 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10222 /* 27700 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
10223 /* 27703 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
10224 /* 27706 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10225 /* 27710 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10226 /* 27714 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10227 /* 27718 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10228 /* 27722 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10229 /* 27726 */ // MIs[1] Operand 1
10230 /* 27726 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10231 /* 27731 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10232 /* 27736 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10233 /* 27740 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10234 /* 27744 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10235 /* 27748 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10236 /* 27750 */ // (select:{ *:[v2i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SELECT_V128:{ *:[v2i64] } ?:{ *:[v2i64] }:$rhs, ?:{ *:[v2i64] }:$lhs, ?:{ *:[i32] }:$cond)
10237 /* 27750 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10238 /* 27753 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10239 /* 27755 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10240 /* 27757 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10241 /* 27759 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10242 /* 27763 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10243 /* 27766 */ GIR_RootConstrainSelectedInstOperands,
10244 /* 27767 */ // GIR_Coverage, 1103,
10245 /* 27767 */ GIR_EraseRootFromParent_Done,
10246 /* 27768 */ // Label 703: @27768
10247 /* 27768 */ GIM_Try, /*On fail goto*//*Label 704*/ GIMT_Encode4(27844), // Rule ID 1108 //
10248 /* 27773 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10249 /* 27776 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
10250 /* 27779 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
10251 /* 27782 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10252 /* 27786 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10253 /* 27790 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10254 /* 27794 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10255 /* 27798 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10256 /* 27802 */ // MIs[1] Operand 1
10257 /* 27802 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10258 /* 27807 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10259 /* 27812 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10260 /* 27816 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10261 /* 27820 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10262 /* 27824 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10263 /* 27826 */ // (select:{ *:[v2f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SELECT_V128:{ *:[v2f64] } ?:{ *:[v2f64] }:$lhs, ?:{ *:[v2f64] }:$rhs, ?:{ *:[i32] }:$cond)
10264 /* 27826 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10265 /* 27829 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10266 /* 27831 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10267 /* 27833 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10268 /* 27835 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10269 /* 27839 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10270 /* 27842 */ GIR_RootConstrainSelectedInstOperands,
10271 /* 27843 */ // GIR_Coverage, 1108,
10272 /* 27843 */ GIR_EraseRootFromParent_Done,
10273 /* 27844 */ // Label 704: @27844
10274 /* 27844 */ GIM_Try, /*On fail goto*//*Label 705*/ GIMT_Encode4(27920), // Rule ID 1109 //
10275 /* 27849 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10276 /* 27852 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
10277 /* 27855 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
10278 /* 27858 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10279 /* 27862 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10280 /* 27866 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10281 /* 27870 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10282 /* 27874 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10283 /* 27878 */ // MIs[1] Operand 1
10284 /* 27878 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10285 /* 27883 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10286 /* 27888 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10287 /* 27892 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10288 /* 27896 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10289 /* 27900 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10290 /* 27902 */ // (select:{ *:[v2f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SELECT_V128:{ *:[v2f64] } ?:{ *:[v2f64] }:$rhs, ?:{ *:[v2f64] }:$lhs, ?:{ *:[i32] }:$cond)
10291 /* 27902 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10292 /* 27905 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10293 /* 27907 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10294 /* 27909 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10295 /* 27911 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10296 /* 27915 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10297 /* 27918 */ GIR_RootConstrainSelectedInstOperands,
10298 /* 27919 */ // GIR_Coverage, 1109,
10299 /* 27919 */ GIR_EraseRootFromParent_Done,
10300 /* 27920 */ // Label 705: @27920
10301 /* 27920 */ GIM_Try, /*On fail goto*//*Label 706*/ GIMT_Encode4(27996), // Rule ID 371 //
10302 /* 27925 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10303 /* 27928 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
10304 /* 27931 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10305 /* 27935 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10306 /* 27939 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10307 /* 27943 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
10308 /* 27947 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
10309 /* 27951 */ // MIs[1] Operand 1
10310 /* 27951 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10311 /* 27956 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10312 /* 27961 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10313 /* 27966 */ // MIs[0] rhs
10314 /* 27966 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
10315 /* 27971 */ // MIs[0] lhs
10316 /* 27971 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
10317 /* 27976 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10318 /* 27978 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs, SETOLT:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10319 /* 27978 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
10320 /* 27981 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10321 /* 27983 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
10322 /* 27987 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
10323 /* 27991 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10324 /* 27994 */ GIR_RootConstrainSelectedInstOperands,
10325 /* 27995 */ // GIR_Coverage, 371,
10326 /* 27995 */ GIR_EraseRootFromParent_Done,
10327 /* 27996 */ // Label 706: @27996
10328 /* 27996 */ GIM_Try, /*On fail goto*//*Label 707*/ GIMT_Encode4(28072), // Rule ID 372 //
10329 /* 28001 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10330 /* 28004 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
10331 /* 28007 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10332 /* 28011 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10333 /* 28015 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10334 /* 28019 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
10335 /* 28023 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
10336 /* 28027 */ // MIs[1] Operand 1
10337 /* 28027 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
10338 /* 28032 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10339 /* 28037 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10340 /* 28042 */ // MIs[0] rhs
10341 /* 28042 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
10342 /* 28047 */ // MIs[0] lhs
10343 /* 28047 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
10344 /* 28052 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10345 /* 28054 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs, SETOLE:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10346 /* 28054 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
10347 /* 28057 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10348 /* 28059 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
10349 /* 28063 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
10350 /* 28067 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10351 /* 28070 */ GIR_RootConstrainSelectedInstOperands,
10352 /* 28071 */ // GIR_Coverage, 372,
10353 /* 28071 */ GIR_EraseRootFromParent_Done,
10354 /* 28072 */ // Label 707: @28072
10355 /* 28072 */ GIM_Try, /*On fail goto*//*Label 708*/ GIMT_Encode4(28148), // Rule ID 373 //
10356 /* 28077 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10357 /* 28080 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
10358 /* 28083 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10359 /* 28087 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10360 /* 28091 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10361 /* 28095 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
10362 /* 28099 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
10363 /* 28103 */ // MIs[1] Operand 1
10364 /* 28103 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
10365 /* 28108 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10366 /* 28113 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10367 /* 28118 */ // MIs[0] rhs
10368 /* 28118 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
10369 /* 28123 */ // MIs[0] lhs
10370 /* 28123 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
10371 /* 28128 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10372 /* 28130 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOGT:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10373 /* 28130 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
10374 /* 28133 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10375 /* 28135 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
10376 /* 28139 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
10377 /* 28143 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10378 /* 28146 */ GIR_RootConstrainSelectedInstOperands,
10379 /* 28147 */ // GIR_Coverage, 373,
10380 /* 28147 */ GIR_EraseRootFromParent_Done,
10381 /* 28148 */ // Label 708: @28148
10382 /* 28148 */ GIM_Try, /*On fail goto*//*Label 709*/ GIMT_Encode4(28224), // Rule ID 374 //
10383 /* 28153 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10384 /* 28156 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
10385 /* 28159 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10386 /* 28163 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10387 /* 28167 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10388 /* 28171 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
10389 /* 28175 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
10390 /* 28179 */ // MIs[1] Operand 1
10391 /* 28179 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
10392 /* 28184 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10393 /* 28189 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10394 /* 28194 */ // MIs[0] rhs
10395 /* 28194 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
10396 /* 28199 */ // MIs[0] lhs
10397 /* 28199 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
10398 /* 28204 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10399 /* 28206 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOGE:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10400 /* 28206 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
10401 /* 28209 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10402 /* 28211 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
10403 /* 28215 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
10404 /* 28219 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10405 /* 28222 */ GIR_RootConstrainSelectedInstOperands,
10406 /* 28223 */ // GIR_Coverage, 374,
10407 /* 28223 */ GIR_EraseRootFromParent_Done,
10408 /* 28224 */ // Label 709: @28224
10409 /* 28224 */ GIM_Try, /*On fail goto*//*Label 710*/ GIMT_Encode4(28300), // Rule ID 395 //
10410 /* 28229 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10411 /* 28232 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
10412 /* 28235 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10413 /* 28239 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10414 /* 28243 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10415 /* 28247 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
10416 /* 28251 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
10417 /* 28255 */ // MIs[1] Operand 1
10418 /* 28255 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
10419 /* 28260 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10420 /* 28265 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10421 /* 28270 */ // MIs[0] rhs
10422 /* 28270 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
10423 /* 28275 */ // MIs[0] lhs
10424 /* 28275 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
10425 /* 28280 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10426 /* 28282 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs, SETOGT:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10427 /* 28282 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
10428 /* 28285 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10429 /* 28287 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
10430 /* 28291 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
10431 /* 28295 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10432 /* 28298 */ GIR_RootConstrainSelectedInstOperands,
10433 /* 28299 */ // GIR_Coverage, 395,
10434 /* 28299 */ GIR_EraseRootFromParent_Done,
10435 /* 28300 */ // Label 710: @28300
10436 /* 28300 */ GIM_Try, /*On fail goto*//*Label 711*/ GIMT_Encode4(28376), // Rule ID 396 //
10437 /* 28305 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10438 /* 28308 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
10439 /* 28311 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10440 /* 28315 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10441 /* 28319 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10442 /* 28323 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
10443 /* 28327 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
10444 /* 28331 */ // MIs[1] Operand 1
10445 /* 28331 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
10446 /* 28336 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10447 /* 28341 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10448 /* 28346 */ // MIs[0] rhs
10449 /* 28346 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
10450 /* 28351 */ // MIs[0] lhs
10451 /* 28351 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
10452 /* 28356 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10453 /* 28358 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs, SETOGE:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10454 /* 28358 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
10455 /* 28361 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10456 /* 28363 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
10457 /* 28367 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
10458 /* 28371 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10459 /* 28374 */ GIR_RootConstrainSelectedInstOperands,
10460 /* 28375 */ // GIR_Coverage, 396,
10461 /* 28375 */ GIR_EraseRootFromParent_Done,
10462 /* 28376 */ // Label 711: @28376
10463 /* 28376 */ GIM_Try, /*On fail goto*//*Label 712*/ GIMT_Encode4(28452), // Rule ID 397 //
10464 /* 28381 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10465 /* 28384 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
10466 /* 28387 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10467 /* 28391 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10468 /* 28395 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10469 /* 28399 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
10470 /* 28403 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
10471 /* 28407 */ // MIs[1] Operand 1
10472 /* 28407 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10473 /* 28412 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10474 /* 28417 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10475 /* 28422 */ // MIs[0] rhs
10476 /* 28422 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
10477 /* 28427 */ // MIs[0] lhs
10478 /* 28427 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
10479 /* 28432 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10480 /* 28434 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOLT:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10481 /* 28434 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
10482 /* 28437 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10483 /* 28439 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
10484 /* 28443 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
10485 /* 28447 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10486 /* 28450 */ GIR_RootConstrainSelectedInstOperands,
10487 /* 28451 */ // GIR_Coverage, 397,
10488 /* 28451 */ GIR_EraseRootFromParent_Done,
10489 /* 28452 */ // Label 712: @28452
10490 /* 28452 */ GIM_Try, /*On fail goto*//*Label 713*/ GIMT_Encode4(28528), // Rule ID 398 //
10491 /* 28457 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10492 /* 28460 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
10493 /* 28463 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10494 /* 28467 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10495 /* 28471 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10496 /* 28475 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
10497 /* 28479 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
10498 /* 28483 */ // MIs[1] Operand 1
10499 /* 28483 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
10500 /* 28488 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10501 /* 28493 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10502 /* 28498 */ // MIs[0] rhs
10503 /* 28498 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
10504 /* 28503 */ // MIs[0] lhs
10505 /* 28503 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
10506 /* 28508 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10507 /* 28510 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOLE:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10508 /* 28510 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
10509 /* 28513 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10510 /* 28515 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
10511 /* 28519 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
10512 /* 28523 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10513 /* 28526 */ GIR_RootConstrainSelectedInstOperands,
10514 /* 28527 */ // GIR_Coverage, 398,
10515 /* 28527 */ GIR_EraseRootFromParent_Done,
10516 /* 28528 */ // Label 713: @28528
10517 /* 28528 */ GIM_Try, /*On fail goto*//*Label 714*/ GIMT_Encode4(28574), // Rule ID 1089 //
10518 /* 28533 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
10519 /* 28536 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
10520 /* 28539 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
10521 /* 28542 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10522 /* 28546 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10523 /* 28550 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10524 /* 28554 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10525 /* 28558 */ // (vselect:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
10526 /* 28558 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
10527 /* 28561 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10528 /* 28563 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
10529 /* 28565 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
10530 /* 28567 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
10531 /* 28569 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10532 /* 28572 */ GIR_RootConstrainSelectedInstOperands,
10533 /* 28573 */ // GIR_Coverage, 1089,
10534 /* 28573 */ GIR_EraseRootFromParent_Done,
10535 /* 28574 */ // Label 714: @28574
10536 /* 28574 */ GIM_Try, /*On fail goto*//*Label 715*/ GIMT_Encode4(28620), // Rule ID 1091 //
10537 /* 28579 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
10538 /* 28582 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
10539 /* 28585 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
10540 /* 28588 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10541 /* 28592 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10542 /* 28596 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10543 /* 28600 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10544 /* 28604 */ // (vselect:{ *:[v2f64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2f64] }:$v1, V128:{ *:[v2f64] }:$v2) => (BITSELECT:{ *:[v2f64] } ?:{ *:[v2f64] }:$v1, ?:{ *:[v2f64] }:$v2, ?:{ *:[v2i64] }:$c)
10545 /* 28604 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
10546 /* 28607 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10547 /* 28609 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
10548 /* 28611 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
10549 /* 28613 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
10550 /* 28615 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10551 /* 28618 */ GIR_RootConstrainSelectedInstOperands,
10552 /* 28619 */ // GIR_Coverage, 1091,
10553 /* 28619 */ GIR_EraseRootFromParent_Done,
10554 /* 28620 */ // Label 715: @28620
10555 /* 28620 */ GIM_Try, /*On fail goto*//*Label 716*/ GIMT_Encode4(28666), // Rule ID 1101 //
10556 /* 28625 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10557 /* 28628 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
10558 /* 28631 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
10559 /* 28634 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10560 /* 28638 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10561 /* 28642 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10562 /* 28646 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10563 /* 28650 */ // (select:{ *:[v2i64] } I32:{ *:[i32] }:$cond, V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SELECT_V128:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs, ?:{ *:[i32] }:$cond)
10564 /* 28650 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10565 /* 28653 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10566 /* 28655 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10567 /* 28657 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10568 /* 28659 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
10569 /* 28661 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10570 /* 28664 */ GIR_RootConstrainSelectedInstOperands,
10571 /* 28665 */ // GIR_Coverage, 1101,
10572 /* 28665 */ GIR_EraseRootFromParent_Done,
10573 /* 28666 */ // Label 716: @28666
10574 /* 28666 */ GIM_Try, /*On fail goto*//*Label 717*/ GIMT_Encode4(28712), // Rule ID 1107 //
10575 /* 28671 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10576 /* 28674 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
10577 /* 28677 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
10578 /* 28680 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10579 /* 28684 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10580 /* 28688 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10581 /* 28692 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10582 /* 28696 */ // (select:{ *:[v2f64] } I32:{ *:[i32] }:$cond, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SELECT_V128:{ *:[v2f64] } ?:{ *:[v2f64] }:$lhs, ?:{ *:[v2f64] }:$rhs, ?:{ *:[i32] }:$cond)
10583 /* 28696 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10584 /* 28699 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10585 /* 28701 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10586 /* 28703 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10587 /* 28705 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
10588 /* 28707 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10589 /* 28710 */ GIR_RootConstrainSelectedInstOperands,
10590 /* 28711 */ // GIR_Coverage, 1107,
10591 /* 28711 */ GIR_EraseRootFromParent_Done,
10592 /* 28712 */ // Label 717: @28712
10593 /* 28712 */ GIM_Reject,
10594 /* 28713 */ // Label 680: @28713
10595 /* 28713 */ GIM_Try, /*On fail goto*//*Label 718*/ GIMT_Encode4(28813), // Rule ID 1277 //
10596 /* 28718 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
10597 /* 28721 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
10598 /* 28724 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10599 /* 28728 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10600 /* 28732 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10601 /* 28736 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
10602 /* 28740 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
10603 /* 28744 */ // MIs[1] Operand 1
10604 /* 28744 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10605 /* 28749 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10606 /* 28753 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
10607 /* 28757 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
10608 /* 28761 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10609 /* 28766 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
10610 /* 28770 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
10611 /* 28774 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
10612 /* 28778 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10613 /* 28783 */ // MIs[0] rhs
10614 /* 28783 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
10615 /* 28788 */ // MIs[0] lhs
10616 /* 28788 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
10617 /* 28793 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10618 /* 28795 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (SIMD_RELAXED_FMIN_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
10619 /* 28795 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F32x4),
10620 /* 28798 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10621 /* 28800 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
10622 /* 28804 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
10623 /* 28808 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10624 /* 28811 */ GIR_RootConstrainSelectedInstOperands,
10625 /* 28812 */ // GIR_Coverage, 1277,
10626 /* 28812 */ GIR_EraseRootFromParent_Done,
10627 /* 28813 */ // Label 718: @28813
10628 /* 28813 */ GIM_Try, /*On fail goto*//*Label 719*/ GIMT_Encode4(28913), // Rule ID 1278 //
10629 /* 28818 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
10630 /* 28821 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
10631 /* 28824 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10632 /* 28828 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10633 /* 28832 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10634 /* 28836 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
10635 /* 28840 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
10636 /* 28844 */ // MIs[1] Operand 1
10637 /* 28844 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10638 /* 28849 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10639 /* 28853 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
10640 /* 28857 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
10641 /* 28861 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10642 /* 28866 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
10643 /* 28870 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
10644 /* 28874 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
10645 /* 28878 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10646 /* 28883 */ // MIs[0] rhs
10647 /* 28883 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
10648 /* 28888 */ // MIs[0] lhs
10649 /* 28888 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
10650 /* 28893 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10651 /* 28895 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (SIMD_RELAXED_FMAX_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
10652 /* 28895 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F32x4),
10653 /* 28898 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10654 /* 28900 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
10655 /* 28904 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
10656 /* 28908 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10657 /* 28911 */ GIR_RootConstrainSelectedInstOperands,
10658 /* 28912 */ // GIR_Coverage, 1278,
10659 /* 28912 */ GIR_EraseRootFromParent_Done,
10660 /* 28913 */ // Label 719: @28913
10661 /* 28913 */ GIM_Try, /*On fail goto*//*Label 720*/ GIMT_Encode4(29010), // Rule ID 1165 //
10662 /* 28918 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
10663 /* 28921 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10664 /* 28925 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10665 /* 28929 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10666 /* 28933 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
10667 /* 28937 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
10668 /* 28941 */ // MIs[1] Operand 1
10669 /* 28941 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10670 /* 28946 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10671 /* 28950 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
10672 /* 28954 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
10673 /* 28958 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10674 /* 28963 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
10675 /* 28967 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
10676 /* 28971 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
10677 /* 28975 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10678 /* 28980 */ // MIs[0] rhs
10679 /* 28980 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
10680 /* 28985 */ // MIs[0] lhs
10681 /* 28985 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
10682 /* 28990 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10683 /* 28992 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (PMIN_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
10684 /* 28992 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
10685 /* 28995 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10686 /* 28997 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
10687 /* 29001 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
10688 /* 29005 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10689 /* 29008 */ GIR_RootConstrainSelectedInstOperands,
10690 /* 29009 */ // GIR_Coverage, 1165,
10691 /* 29009 */ GIR_EraseRootFromParent_Done,
10692 /* 29010 */ // Label 720: @29010
10693 /* 29010 */ GIM_Try, /*On fail goto*//*Label 721*/ GIMT_Encode4(29107), // Rule ID 1166 //
10694 /* 29015 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
10695 /* 29018 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10696 /* 29022 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10697 /* 29026 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10698 /* 29030 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
10699 /* 29034 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
10700 /* 29038 */ // MIs[1] Operand 1
10701 /* 29038 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10702 /* 29043 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10703 /* 29047 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
10704 /* 29051 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
10705 /* 29055 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10706 /* 29060 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
10707 /* 29064 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
10708 /* 29068 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
10709 /* 29072 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10710 /* 29077 */ // MIs[0] rhs
10711 /* 29077 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
10712 /* 29082 */ // MIs[0] lhs
10713 /* 29082 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
10714 /* 29087 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10715 /* 29089 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (PMAX_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
10716 /* 29089 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
10717 /* 29092 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10718 /* 29094 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
10719 /* 29098 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
10720 /* 29102 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10721 /* 29105 */ GIR_RootConstrainSelectedInstOperands,
10722 /* 29106 */ // GIR_Coverage, 1166,
10723 /* 29106 */ GIR_EraseRootFromParent_Done,
10724 /* 29107 */ // Label 721: @29107
10725 /* 29107 */ GIM_Try, /*On fail goto*//*Label 722*/ GIMT_Encode4(29183), // Rule ID 1099 //
10726 /* 29112 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10727 /* 29115 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
10728 /* 29118 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
10729 /* 29121 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10730 /* 29125 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10731 /* 29129 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10732 /* 29133 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10733 /* 29137 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10734 /* 29141 */ // MIs[1] Operand 1
10735 /* 29141 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10736 /* 29146 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10737 /* 29151 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10738 /* 29155 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10739 /* 29159 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10740 /* 29163 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10741 /* 29165 */ // (select:{ *:[v4i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SELECT_V128:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs, ?:{ *:[i32] }:$cond)
10742 /* 29165 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10743 /* 29168 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10744 /* 29170 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10745 /* 29172 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10746 /* 29174 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10747 /* 29178 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10748 /* 29181 */ GIR_RootConstrainSelectedInstOperands,
10749 /* 29182 */ // GIR_Coverage, 1099,
10750 /* 29182 */ GIR_EraseRootFromParent_Done,
10751 /* 29183 */ // Label 722: @29183
10752 /* 29183 */ GIM_Try, /*On fail goto*//*Label 723*/ GIMT_Encode4(29259), // Rule ID 1100 //
10753 /* 29188 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10754 /* 29191 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
10755 /* 29194 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
10756 /* 29197 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10757 /* 29201 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10758 /* 29205 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10759 /* 29209 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10760 /* 29213 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10761 /* 29217 */ // MIs[1] Operand 1
10762 /* 29217 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10763 /* 29222 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10764 /* 29227 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10765 /* 29231 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10766 /* 29235 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10767 /* 29239 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10768 /* 29241 */ // (select:{ *:[v4i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SELECT_V128:{ *:[v4i32] } ?:{ *:[v4i32] }:$rhs, ?:{ *:[v4i32] }:$lhs, ?:{ *:[i32] }:$cond)
10769 /* 29241 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10770 /* 29244 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10771 /* 29246 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10772 /* 29248 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10773 /* 29250 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10774 /* 29254 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10775 /* 29257 */ GIR_RootConstrainSelectedInstOperands,
10776 /* 29258 */ // GIR_Coverage, 1100,
10777 /* 29258 */ GIR_EraseRootFromParent_Done,
10778 /* 29259 */ // Label 723: @29259
10779 /* 29259 */ GIM_Try, /*On fail goto*//*Label 724*/ GIMT_Encode4(29335), // Rule ID 1105 //
10780 /* 29264 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10781 /* 29267 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
10782 /* 29270 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
10783 /* 29273 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10784 /* 29277 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10785 /* 29281 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10786 /* 29285 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10787 /* 29289 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10788 /* 29293 */ // MIs[1] Operand 1
10789 /* 29293 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10790 /* 29298 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10791 /* 29303 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10792 /* 29307 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10793 /* 29311 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10794 /* 29315 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10795 /* 29317 */ // (select:{ *:[v4f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SELECT_V128:{ *:[v4f32] } ?:{ *:[v4f32] }:$lhs, ?:{ *:[v4f32] }:$rhs, ?:{ *:[i32] }:$cond)
10796 /* 29317 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10797 /* 29320 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10798 /* 29322 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10799 /* 29324 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10800 /* 29326 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10801 /* 29330 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10802 /* 29333 */ GIR_RootConstrainSelectedInstOperands,
10803 /* 29334 */ // GIR_Coverage, 1105,
10804 /* 29334 */ GIR_EraseRootFromParent_Done,
10805 /* 29335 */ // Label 724: @29335
10806 /* 29335 */ GIM_Try, /*On fail goto*//*Label 725*/ GIMT_Encode4(29411), // Rule ID 1106 //
10807 /* 29340 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10808 /* 29343 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
10809 /* 29346 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
10810 /* 29349 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10811 /* 29353 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10812 /* 29357 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10813 /* 29361 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10814 /* 29365 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10815 /* 29369 */ // MIs[1] Operand 1
10816 /* 29369 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10817 /* 29374 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10818 /* 29379 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10819 /* 29383 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10820 /* 29387 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10821 /* 29391 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10822 /* 29393 */ // (select:{ *:[v4f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SELECT_V128:{ *:[v4f32] } ?:{ *:[v4f32] }:$rhs, ?:{ *:[v4f32] }:$lhs, ?:{ *:[i32] }:$cond)
10823 /* 29393 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10824 /* 29396 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10825 /* 29398 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10826 /* 29400 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10827 /* 29402 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10828 /* 29406 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10829 /* 29409 */ GIR_RootConstrainSelectedInstOperands,
10830 /* 29410 */ // GIR_Coverage, 1106,
10831 /* 29410 */ GIR_EraseRootFromParent_Done,
10832 /* 29411 */ // Label 725: @29411
10833 /* 29411 */ GIM_Try, /*On fail goto*//*Label 726*/ GIMT_Encode4(29487), // Rule ID 363 //
10834 /* 29416 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10835 /* 29419 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
10836 /* 29422 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10837 /* 29426 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10838 /* 29430 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10839 /* 29434 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
10840 /* 29438 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
10841 /* 29442 */ // MIs[1] Operand 1
10842 /* 29442 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10843 /* 29447 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10844 /* 29452 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10845 /* 29457 */ // MIs[0] rhs
10846 /* 29457 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
10847 /* 29462 */ // MIs[0] lhs
10848 /* 29462 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
10849 /* 29467 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10850 /* 29469 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs, SETOLT:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
10851 /* 29469 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
10852 /* 29472 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10853 /* 29474 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
10854 /* 29478 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
10855 /* 29482 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10856 /* 29485 */ GIR_RootConstrainSelectedInstOperands,
10857 /* 29486 */ // GIR_Coverage, 363,
10858 /* 29486 */ GIR_EraseRootFromParent_Done,
10859 /* 29487 */ // Label 726: @29487
10860 /* 29487 */ GIM_Try, /*On fail goto*//*Label 727*/ GIMT_Encode4(29563), // Rule ID 364 //
10861 /* 29492 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10862 /* 29495 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
10863 /* 29498 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10864 /* 29502 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10865 /* 29506 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10866 /* 29510 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
10867 /* 29514 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
10868 /* 29518 */ // MIs[1] Operand 1
10869 /* 29518 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
10870 /* 29523 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10871 /* 29528 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10872 /* 29533 */ // MIs[0] rhs
10873 /* 29533 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
10874 /* 29538 */ // MIs[0] lhs
10875 /* 29538 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
10876 /* 29543 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10877 /* 29545 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs, SETOLE:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
10878 /* 29545 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
10879 /* 29548 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10880 /* 29550 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
10881 /* 29554 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
10882 /* 29558 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10883 /* 29561 */ GIR_RootConstrainSelectedInstOperands,
10884 /* 29562 */ // GIR_Coverage, 364,
10885 /* 29562 */ GIR_EraseRootFromParent_Done,
10886 /* 29563 */ // Label 727: @29563
10887 /* 29563 */ GIM_Try, /*On fail goto*//*Label 728*/ GIMT_Encode4(29639), // Rule ID 365 //
10888 /* 29568 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10889 /* 29571 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
10890 /* 29574 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10891 /* 29578 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10892 /* 29582 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10893 /* 29586 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
10894 /* 29590 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
10895 /* 29594 */ // MIs[1] Operand 1
10896 /* 29594 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
10897 /* 29599 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10898 /* 29604 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10899 /* 29609 */ // MIs[0] rhs
10900 /* 29609 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
10901 /* 29614 */ // MIs[0] lhs
10902 /* 29614 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
10903 /* 29619 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10904 /* 29621 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOGT:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
10905 /* 29621 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
10906 /* 29624 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10907 /* 29626 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
10908 /* 29630 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
10909 /* 29634 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10910 /* 29637 */ GIR_RootConstrainSelectedInstOperands,
10911 /* 29638 */ // GIR_Coverage, 365,
10912 /* 29638 */ GIR_EraseRootFromParent_Done,
10913 /* 29639 */ // Label 728: @29639
10914 /* 29639 */ GIM_Try, /*On fail goto*//*Label 729*/ GIMT_Encode4(29715), // Rule ID 366 //
10915 /* 29644 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10916 /* 29647 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
10917 /* 29650 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10918 /* 29654 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10919 /* 29658 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10920 /* 29662 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
10921 /* 29666 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
10922 /* 29670 */ // MIs[1] Operand 1
10923 /* 29670 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
10924 /* 29675 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10925 /* 29680 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10926 /* 29685 */ // MIs[0] rhs
10927 /* 29685 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
10928 /* 29690 */ // MIs[0] lhs
10929 /* 29690 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
10930 /* 29695 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10931 /* 29697 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOGE:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
10932 /* 29697 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
10933 /* 29700 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10934 /* 29702 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
10935 /* 29706 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
10936 /* 29710 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10937 /* 29713 */ GIR_RootConstrainSelectedInstOperands,
10938 /* 29714 */ // GIR_Coverage, 366,
10939 /* 29714 */ GIR_EraseRootFromParent_Done,
10940 /* 29715 */ // Label 729: @29715
10941 /* 29715 */ GIM_Try, /*On fail goto*//*Label 730*/ GIMT_Encode4(29791), // Rule ID 387 //
10942 /* 29720 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10943 /* 29723 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
10944 /* 29726 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10945 /* 29730 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10946 /* 29734 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10947 /* 29738 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
10948 /* 29742 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
10949 /* 29746 */ // MIs[1] Operand 1
10950 /* 29746 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
10951 /* 29751 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10952 /* 29756 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10953 /* 29761 */ // MIs[0] rhs
10954 /* 29761 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
10955 /* 29766 */ // MIs[0] lhs
10956 /* 29766 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
10957 /* 29771 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10958 /* 29773 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs, SETOGT:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
10959 /* 29773 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
10960 /* 29776 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10961 /* 29778 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
10962 /* 29782 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
10963 /* 29786 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10964 /* 29789 */ GIR_RootConstrainSelectedInstOperands,
10965 /* 29790 */ // GIR_Coverage, 387,
10966 /* 29790 */ GIR_EraseRootFromParent_Done,
10967 /* 29791 */ // Label 730: @29791
10968 /* 29791 */ GIM_Try, /*On fail goto*//*Label 731*/ GIMT_Encode4(29867), // Rule ID 388 //
10969 /* 29796 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10970 /* 29799 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
10971 /* 29802 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10972 /* 29806 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10973 /* 29810 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10974 /* 29814 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
10975 /* 29818 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
10976 /* 29822 */ // MIs[1] Operand 1
10977 /* 29822 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
10978 /* 29827 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10979 /* 29832 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10980 /* 29837 */ // MIs[0] rhs
10981 /* 29837 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
10982 /* 29842 */ // MIs[0] lhs
10983 /* 29842 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
10984 /* 29847 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10985 /* 29849 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs, SETOGE:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
10986 /* 29849 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
10987 /* 29852 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10988 /* 29854 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
10989 /* 29858 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
10990 /* 29862 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10991 /* 29865 */ GIR_RootConstrainSelectedInstOperands,
10992 /* 29866 */ // GIR_Coverage, 388,
10993 /* 29866 */ GIR_EraseRootFromParent_Done,
10994 /* 29867 */ // Label 731: @29867
10995 /* 29867 */ GIM_Try, /*On fail goto*//*Label 732*/ GIMT_Encode4(29943), // Rule ID 389 //
10996 /* 29872 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10997 /* 29875 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
10998 /* 29878 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10999 /* 29882 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11000 /* 29886 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11001 /* 29890 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
11002 /* 29894 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
11003 /* 29898 */ // MIs[1] Operand 1
11004 /* 29898 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11005 /* 29903 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11006 /* 29908 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11007 /* 29913 */ // MIs[0] rhs
11008 /* 29913 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11009 /* 29918 */ // MIs[0] lhs
11010 /* 29918 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11011 /* 29923 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11012 /* 29925 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOLT:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11013 /* 29925 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
11014 /* 29928 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11015 /* 29930 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11016 /* 29934 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11017 /* 29938 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11018 /* 29941 */ GIR_RootConstrainSelectedInstOperands,
11019 /* 29942 */ // GIR_Coverage, 389,
11020 /* 29942 */ GIR_EraseRootFromParent_Done,
11021 /* 29943 */ // Label 732: @29943
11022 /* 29943 */ GIM_Try, /*On fail goto*//*Label 733*/ GIMT_Encode4(30019), // Rule ID 390 //
11023 /* 29948 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11024 /* 29951 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11025 /* 29954 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11026 /* 29958 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11027 /* 29962 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11028 /* 29966 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
11029 /* 29970 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
11030 /* 29974 */ // MIs[1] Operand 1
11031 /* 29974 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
11032 /* 29979 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11033 /* 29984 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11034 /* 29989 */ // MIs[0] rhs
11035 /* 29989 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11036 /* 29994 */ // MIs[0] lhs
11037 /* 29994 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11038 /* 29999 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11039 /* 30001 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOLE:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11040 /* 30001 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
11041 /* 30004 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11042 /* 30006 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11043 /* 30010 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11044 /* 30014 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11045 /* 30017 */ GIR_RootConstrainSelectedInstOperands,
11046 /* 30018 */ // GIR_Coverage, 390,
11047 /* 30018 */ GIR_EraseRootFromParent_Done,
11048 /* 30019 */ // Label 733: @30019
11049 /* 30019 */ GIM_Try, /*On fail goto*//*Label 734*/ GIMT_Encode4(30065), // Rule ID 1088 //
11050 /* 30024 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11051 /* 30027 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11052 /* 30030 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11053 /* 30033 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11054 /* 30037 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11055 /* 30041 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11056 /* 30045 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11057 /* 30049 */ // (vselect:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
11058 /* 30049 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
11059 /* 30052 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11060 /* 30054 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
11061 /* 30056 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
11062 /* 30058 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
11063 /* 30060 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11064 /* 30063 */ GIR_RootConstrainSelectedInstOperands,
11065 /* 30064 */ // GIR_Coverage, 1088,
11066 /* 30064 */ GIR_EraseRootFromParent_Done,
11067 /* 30065 */ // Label 734: @30065
11068 /* 30065 */ GIM_Try, /*On fail goto*//*Label 735*/ GIMT_Encode4(30111), // Rule ID 1090 //
11069 /* 30070 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11070 /* 30073 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11071 /* 30076 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11072 /* 30079 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11073 /* 30083 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11074 /* 30087 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11075 /* 30091 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11076 /* 30095 */ // (vselect:{ *:[v4f32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4f32] }:$v1, V128:{ *:[v4f32] }:$v2) => (BITSELECT:{ *:[v4f32] } ?:{ *:[v4f32] }:$v1, ?:{ *:[v4f32] }:$v2, ?:{ *:[v4i32] }:$c)
11077 /* 30095 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
11078 /* 30098 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11079 /* 30100 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
11080 /* 30102 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
11081 /* 30104 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
11082 /* 30106 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11083 /* 30109 */ GIR_RootConstrainSelectedInstOperands,
11084 /* 30110 */ // GIR_Coverage, 1090,
11085 /* 30110 */ GIR_EraseRootFromParent_Done,
11086 /* 30111 */ // Label 735: @30111
11087 /* 30111 */ GIM_Try, /*On fail goto*//*Label 736*/ GIMT_Encode4(30157), // Rule ID 1098 //
11088 /* 30116 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11089 /* 30119 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11090 /* 30122 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11091 /* 30125 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11092 /* 30129 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11093 /* 30133 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11094 /* 30137 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11095 /* 30141 */ // (select:{ *:[v4i32] } I32:{ *:[i32] }:$cond, V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SELECT_V128:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs, ?:{ *:[i32] }:$cond)
11096 /* 30141 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11097 /* 30144 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11098 /* 30146 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11099 /* 30148 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11100 /* 30150 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
11101 /* 30152 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11102 /* 30155 */ GIR_RootConstrainSelectedInstOperands,
11103 /* 30156 */ // GIR_Coverage, 1098,
11104 /* 30156 */ GIR_EraseRootFromParent_Done,
11105 /* 30157 */ // Label 736: @30157
11106 /* 30157 */ GIM_Try, /*On fail goto*//*Label 737*/ GIMT_Encode4(30203), // Rule ID 1104 //
11107 /* 30162 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11108 /* 30165 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11109 /* 30168 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11110 /* 30171 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11111 /* 30175 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11112 /* 30179 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11113 /* 30183 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11114 /* 30187 */ // (select:{ *:[v4f32] } I32:{ *:[i32] }:$cond, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SELECT_V128:{ *:[v4f32] } ?:{ *:[v4f32] }:$lhs, ?:{ *:[v4f32] }:$rhs, ?:{ *:[i32] }:$cond)
11115 /* 30187 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11116 /* 30190 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11117 /* 30192 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11118 /* 30194 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11119 /* 30196 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
11120 /* 30198 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11121 /* 30201 */ GIR_RootConstrainSelectedInstOperands,
11122 /* 30202 */ // GIR_Coverage, 1104,
11123 /* 30202 */ GIR_EraseRootFromParent_Done,
11124 /* 30203 */ // Label 737: @30203
11125 /* 30203 */ GIM_Reject,
11126 /* 30204 */ // Label 681: @30204
11127 /* 30204 */ GIM_Try, /*On fail goto*//*Label 738*/ GIMT_Encode4(30301), // Rule ID 1169 //
11128 /* 30209 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11129 /* 30212 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11130 /* 30216 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11131 /* 30220 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11132 /* 30224 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
11133 /* 30228 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
11134 /* 30232 */ // MIs[1] Operand 1
11135 /* 30232 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11136 /* 30237 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
11137 /* 30241 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
11138 /* 30245 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
11139 /* 30249 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11140 /* 30254 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
11141 /* 30258 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
11142 /* 30262 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
11143 /* 30266 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11144 /* 30271 */ // MIs[0] rhs
11145 /* 30271 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
11146 /* 30276 */ // MIs[0] lhs
11147 /* 30276 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
11148 /* 30281 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
11149 /* 30283 */ // (vselect:{ *:[v8i16] } (setcc:{ *:[v8i16] } (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$rhs), (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v8i16] }:$rhs, V128:{ *:[v8i16] }:$lhs) => (PMIN_F16x8:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
11150 /* 30283 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
11151 /* 30286 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11152 /* 30288 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
11153 /* 30292 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
11154 /* 30296 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11155 /* 30299 */ GIR_RootConstrainSelectedInstOperands,
11156 /* 30300 */ // GIR_Coverage, 1169,
11157 /* 30300 */ GIR_EraseRootFromParent_Done,
11158 /* 30301 */ // Label 738: @30301
11159 /* 30301 */ GIM_Try, /*On fail goto*//*Label 739*/ GIMT_Encode4(30398), // Rule ID 1170 //
11160 /* 30306 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11161 /* 30309 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11162 /* 30313 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11163 /* 30317 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11164 /* 30321 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
11165 /* 30325 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
11166 /* 30329 */ // MIs[1] Operand 1
11167 /* 30329 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11168 /* 30334 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
11169 /* 30338 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
11170 /* 30342 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
11171 /* 30346 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11172 /* 30351 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
11173 /* 30355 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
11174 /* 30359 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
11175 /* 30363 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11176 /* 30368 */ // MIs[0] rhs
11177 /* 30368 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
11178 /* 30373 */ // MIs[0] lhs
11179 /* 30373 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
11180 /* 30378 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
11181 /* 30380 */ // (vselect:{ *:[v8i16] } (setcc:{ *:[v8i16] } (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$lhs), (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v8i16] }:$rhs, V128:{ *:[v8i16] }:$lhs) => (PMAX_F16x8:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
11182 /* 30380 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
11183 /* 30383 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11184 /* 30385 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
11185 /* 30389 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
11186 /* 30393 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11187 /* 30396 */ GIR_RootConstrainSelectedInstOperands,
11188 /* 30397 */ // GIR_Coverage, 1170,
11189 /* 30397 */ GIR_EraseRootFromParent_Done,
11190 /* 30398 */ // Label 739: @30398
11191 /* 30398 */ GIM_Try, /*On fail goto*//*Label 740*/ GIMT_Encode4(30474), // Rule ID 1096 //
11192 /* 30403 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11193 /* 30406 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11194 /* 30409 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
11195 /* 30412 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11196 /* 30416 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11197 /* 30420 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
11198 /* 30424 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
11199 /* 30428 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
11200 /* 30432 */ // MIs[1] Operand 1
11201 /* 30432 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11202 /* 30437 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11203 /* 30442 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
11204 /* 30446 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11205 /* 30450 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11206 /* 30454 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11207 /* 30456 */ // (select:{ *:[v8i16] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SELECT_V128:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs, ?:{ *:[i32] }:$cond)
11208 /* 30456 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11209 /* 30459 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11210 /* 30461 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11211 /* 30463 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11212 /* 30465 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
11213 /* 30469 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11214 /* 30472 */ GIR_RootConstrainSelectedInstOperands,
11215 /* 30473 */ // GIR_Coverage, 1096,
11216 /* 30473 */ GIR_EraseRootFromParent_Done,
11217 /* 30474 */ // Label 740: @30474
11218 /* 30474 */ GIM_Try, /*On fail goto*//*Label 741*/ GIMT_Encode4(30550), // Rule ID 1097 //
11219 /* 30479 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11220 /* 30482 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11221 /* 30485 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
11222 /* 30488 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11223 /* 30492 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11224 /* 30496 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
11225 /* 30500 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
11226 /* 30504 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
11227 /* 30508 */ // MIs[1] Operand 1
11228 /* 30508 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11229 /* 30513 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11230 /* 30518 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
11231 /* 30522 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11232 /* 30526 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11233 /* 30530 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11234 /* 30532 */ // (select:{ *:[v8i16] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SELECT_V128:{ *:[v8i16] } ?:{ *:[v8i16] }:$rhs, ?:{ *:[v8i16] }:$lhs, ?:{ *:[i32] }:$cond)
11235 /* 30532 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11236 /* 30535 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11237 /* 30537 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11238 /* 30539 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11239 /* 30541 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
11240 /* 30545 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11241 /* 30548 */ GIR_RootConstrainSelectedInstOperands,
11242 /* 30549 */ // GIR_Coverage, 1097,
11243 /* 30549 */ GIR_EraseRootFromParent_Done,
11244 /* 30550 */ // Label 741: @30550
11245 /* 30550 */ GIM_Try, /*On fail goto*//*Label 742*/ GIMT_Encode4(30626), // Rule ID 379 //
11246 /* 30555 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
11247 /* 30558 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11248 /* 30561 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11249 /* 30565 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11250 /* 30569 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11251 /* 30573 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
11252 /* 30577 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
11253 /* 30581 */ // MIs[1] Operand 1
11254 /* 30581 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11255 /* 30586 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11256 /* 30591 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11257 /* 30596 */ // MIs[0] rhs
11258 /* 30596 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11259 /* 30601 */ // MIs[0] lhs
11260 /* 30601 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11261 /* 30606 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11262 /* 30608 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs, SETOLT:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11263 /* 30608 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
11264 /* 30611 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11265 /* 30613 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11266 /* 30617 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11267 /* 30621 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11268 /* 30624 */ GIR_RootConstrainSelectedInstOperands,
11269 /* 30625 */ // GIR_Coverage, 379,
11270 /* 30625 */ GIR_EraseRootFromParent_Done,
11271 /* 30626 */ // Label 742: @30626
11272 /* 30626 */ GIM_Try, /*On fail goto*//*Label 743*/ GIMT_Encode4(30702), // Rule ID 380 //
11273 /* 30631 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
11274 /* 30634 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11275 /* 30637 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11276 /* 30641 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11277 /* 30645 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11278 /* 30649 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
11279 /* 30653 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
11280 /* 30657 */ // MIs[1] Operand 1
11281 /* 30657 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
11282 /* 30662 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11283 /* 30667 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11284 /* 30672 */ // MIs[0] rhs
11285 /* 30672 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11286 /* 30677 */ // MIs[0] lhs
11287 /* 30677 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11288 /* 30682 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11289 /* 30684 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs, SETOLE:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11290 /* 30684 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
11291 /* 30687 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11292 /* 30689 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11293 /* 30693 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11294 /* 30697 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11295 /* 30700 */ GIR_RootConstrainSelectedInstOperands,
11296 /* 30701 */ // GIR_Coverage, 380,
11297 /* 30701 */ GIR_EraseRootFromParent_Done,
11298 /* 30702 */ // Label 743: @30702
11299 /* 30702 */ GIM_Try, /*On fail goto*//*Label 744*/ GIMT_Encode4(30778), // Rule ID 381 //
11300 /* 30707 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
11301 /* 30710 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11302 /* 30713 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11303 /* 30717 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11304 /* 30721 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11305 /* 30725 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
11306 /* 30729 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
11307 /* 30733 */ // MIs[1] Operand 1
11308 /* 30733 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
11309 /* 30738 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11310 /* 30743 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11311 /* 30748 */ // MIs[0] rhs
11312 /* 30748 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11313 /* 30753 */ // MIs[0] lhs
11314 /* 30753 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11315 /* 30758 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11316 /* 30760 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOGT:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11317 /* 30760 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
11318 /* 30763 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11319 /* 30765 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11320 /* 30769 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11321 /* 30773 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11322 /* 30776 */ GIR_RootConstrainSelectedInstOperands,
11323 /* 30777 */ // GIR_Coverage, 381,
11324 /* 30777 */ GIR_EraseRootFromParent_Done,
11325 /* 30778 */ // Label 744: @30778
11326 /* 30778 */ GIM_Try, /*On fail goto*//*Label 745*/ GIMT_Encode4(30854), // Rule ID 382 //
11327 /* 30783 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
11328 /* 30786 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11329 /* 30789 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11330 /* 30793 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11331 /* 30797 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11332 /* 30801 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
11333 /* 30805 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
11334 /* 30809 */ // MIs[1] Operand 1
11335 /* 30809 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
11336 /* 30814 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11337 /* 30819 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11338 /* 30824 */ // MIs[0] rhs
11339 /* 30824 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11340 /* 30829 */ // MIs[0] lhs
11341 /* 30829 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11342 /* 30834 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11343 /* 30836 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOGE:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11344 /* 30836 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
11345 /* 30839 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11346 /* 30841 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11347 /* 30845 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11348 /* 30849 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11349 /* 30852 */ GIR_RootConstrainSelectedInstOperands,
11350 /* 30853 */ // GIR_Coverage, 382,
11351 /* 30853 */ GIR_EraseRootFromParent_Done,
11352 /* 30854 */ // Label 745: @30854
11353 /* 30854 */ GIM_Try, /*On fail goto*//*Label 746*/ GIMT_Encode4(30930), // Rule ID 403 //
11354 /* 30859 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
11355 /* 30862 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11356 /* 30865 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11357 /* 30869 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11358 /* 30873 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11359 /* 30877 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
11360 /* 30881 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
11361 /* 30885 */ // MIs[1] Operand 1
11362 /* 30885 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
11363 /* 30890 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11364 /* 30895 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11365 /* 30900 */ // MIs[0] rhs
11366 /* 30900 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11367 /* 30905 */ // MIs[0] lhs
11368 /* 30905 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11369 /* 30910 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11370 /* 30912 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs, SETOGT:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11371 /* 30912 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
11372 /* 30915 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11373 /* 30917 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11374 /* 30921 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11375 /* 30925 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11376 /* 30928 */ GIR_RootConstrainSelectedInstOperands,
11377 /* 30929 */ // GIR_Coverage, 403,
11378 /* 30929 */ GIR_EraseRootFromParent_Done,
11379 /* 30930 */ // Label 746: @30930
11380 /* 30930 */ GIM_Try, /*On fail goto*//*Label 747*/ GIMT_Encode4(31006), // Rule ID 404 //
11381 /* 30935 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
11382 /* 30938 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11383 /* 30941 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11384 /* 30945 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11385 /* 30949 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11386 /* 30953 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
11387 /* 30957 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
11388 /* 30961 */ // MIs[1] Operand 1
11389 /* 30961 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
11390 /* 30966 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11391 /* 30971 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11392 /* 30976 */ // MIs[0] rhs
11393 /* 30976 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11394 /* 30981 */ // MIs[0] lhs
11395 /* 30981 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11396 /* 30986 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11397 /* 30988 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs, SETOGE:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11398 /* 30988 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
11399 /* 30991 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11400 /* 30993 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11401 /* 30997 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11402 /* 31001 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11403 /* 31004 */ GIR_RootConstrainSelectedInstOperands,
11404 /* 31005 */ // GIR_Coverage, 404,
11405 /* 31005 */ GIR_EraseRootFromParent_Done,
11406 /* 31006 */ // Label 747: @31006
11407 /* 31006 */ GIM_Try, /*On fail goto*//*Label 748*/ GIMT_Encode4(31082), // Rule ID 405 //
11408 /* 31011 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
11409 /* 31014 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11410 /* 31017 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11411 /* 31021 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11412 /* 31025 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11413 /* 31029 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
11414 /* 31033 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
11415 /* 31037 */ // MIs[1] Operand 1
11416 /* 31037 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11417 /* 31042 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11418 /* 31047 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11419 /* 31052 */ // MIs[0] rhs
11420 /* 31052 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11421 /* 31057 */ // MIs[0] lhs
11422 /* 31057 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11423 /* 31062 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11424 /* 31064 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOLT:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11425 /* 31064 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
11426 /* 31067 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11427 /* 31069 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11428 /* 31073 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11429 /* 31077 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11430 /* 31080 */ GIR_RootConstrainSelectedInstOperands,
11431 /* 31081 */ // GIR_Coverage, 405,
11432 /* 31081 */ GIR_EraseRootFromParent_Done,
11433 /* 31082 */ // Label 748: @31082
11434 /* 31082 */ GIM_Try, /*On fail goto*//*Label 749*/ GIMT_Encode4(31158), // Rule ID 406 //
11435 /* 31087 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
11436 /* 31090 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11437 /* 31093 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11438 /* 31097 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11439 /* 31101 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11440 /* 31105 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
11441 /* 31109 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
11442 /* 31113 */ // MIs[1] Operand 1
11443 /* 31113 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
11444 /* 31118 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11445 /* 31123 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11446 /* 31128 */ // MIs[0] rhs
11447 /* 31128 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11448 /* 31133 */ // MIs[0] lhs
11449 /* 31133 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11450 /* 31138 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11451 /* 31140 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOLE:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11452 /* 31140 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
11453 /* 31143 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11454 /* 31145 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11455 /* 31149 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11456 /* 31153 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11457 /* 31156 */ GIR_RootConstrainSelectedInstOperands,
11458 /* 31157 */ // GIR_Coverage, 406,
11459 /* 31157 */ GIR_EraseRootFromParent_Done,
11460 /* 31158 */ // Label 749: @31158
11461 /* 31158 */ GIM_Try, /*On fail goto*//*Label 750*/ GIMT_Encode4(31204), // Rule ID 1087 //
11462 /* 31163 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11463 /* 31166 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11464 /* 31169 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
11465 /* 31172 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11466 /* 31176 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11467 /* 31180 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11468 /* 31184 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11469 /* 31188 */ // (vselect:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
11470 /* 31188 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
11471 /* 31191 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11472 /* 31193 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
11473 /* 31195 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
11474 /* 31197 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
11475 /* 31199 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11476 /* 31202 */ GIR_RootConstrainSelectedInstOperands,
11477 /* 31203 */ // GIR_Coverage, 1087,
11478 /* 31203 */ GIR_EraseRootFromParent_Done,
11479 /* 31204 */ // Label 750: @31204
11480 /* 31204 */ GIM_Try, /*On fail goto*//*Label 751*/ GIMT_Encode4(31250), // Rule ID 1095 //
11481 /* 31209 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11482 /* 31212 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11483 /* 31215 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
11484 /* 31218 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11485 /* 31222 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11486 /* 31226 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11487 /* 31230 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11488 /* 31234 */ // (select:{ *:[v8i16] } I32:{ *:[i32] }:$cond, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SELECT_V128:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs, ?:{ *:[i32] }:$cond)
11489 /* 31234 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11490 /* 31237 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11491 /* 31239 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11492 /* 31241 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11493 /* 31243 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
11494 /* 31245 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11495 /* 31248 */ GIR_RootConstrainSelectedInstOperands,
11496 /* 31249 */ // GIR_Coverage, 1095,
11497 /* 31249 */ GIR_EraseRootFromParent_Done,
11498 /* 31250 */ // Label 751: @31250
11499 /* 31250 */ GIM_Reject,
11500 /* 31251 */ // Label 682: @31251
11501 /* 31251 */ GIM_Try, /*On fail goto*//*Label 752*/ GIMT_Encode4(31327), // Rule ID 1093 //
11502 /* 31256 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11503 /* 31259 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
11504 /* 31262 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
11505 /* 31265 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11506 /* 31269 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11507 /* 31273 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
11508 /* 31277 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
11509 /* 31281 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
11510 /* 31285 */ // MIs[1] Operand 1
11511 /* 31285 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11512 /* 31290 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11513 /* 31295 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
11514 /* 31299 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11515 /* 31303 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11516 /* 31307 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11517 /* 31309 */ // (select:{ *:[v16i8] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SELECT_V128:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs, ?:{ *:[i32] }:$cond)
11518 /* 31309 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11519 /* 31312 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11520 /* 31314 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11521 /* 31316 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11522 /* 31318 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
11523 /* 31322 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11524 /* 31325 */ GIR_RootConstrainSelectedInstOperands,
11525 /* 31326 */ // GIR_Coverage, 1093,
11526 /* 31326 */ GIR_EraseRootFromParent_Done,
11527 /* 31327 */ // Label 752: @31327
11528 /* 31327 */ GIM_Try, /*On fail goto*//*Label 753*/ GIMT_Encode4(31403), // Rule ID 1094 //
11529 /* 31332 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11530 /* 31335 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
11531 /* 31338 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
11532 /* 31341 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11533 /* 31345 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11534 /* 31349 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
11535 /* 31353 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
11536 /* 31357 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
11537 /* 31361 */ // MIs[1] Operand 1
11538 /* 31361 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11539 /* 31366 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11540 /* 31371 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
11541 /* 31375 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11542 /* 31379 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11543 /* 31383 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11544 /* 31385 */ // (select:{ *:[v16i8] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SELECT_V128:{ *:[v16i8] } ?:{ *:[v16i8] }:$rhs, ?:{ *:[v16i8] }:$lhs, ?:{ *:[i32] }:$cond)
11545 /* 31385 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11546 /* 31388 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11547 /* 31390 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11548 /* 31392 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11549 /* 31394 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
11550 /* 31398 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11551 /* 31401 */ GIR_RootConstrainSelectedInstOperands,
11552 /* 31402 */ // GIR_Coverage, 1094,
11553 /* 31402 */ GIR_EraseRootFromParent_Done,
11554 /* 31403 */ // Label 753: @31403
11555 /* 31403 */ GIM_Try, /*On fail goto*//*Label 754*/ GIMT_Encode4(31449), // Rule ID 1086 //
11556 /* 31408 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
11557 /* 31411 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
11558 /* 31414 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
11559 /* 31417 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11560 /* 31421 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11561 /* 31425 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11562 /* 31429 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11563 /* 31433 */ // (vselect:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
11564 /* 31433 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
11565 /* 31436 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11566 /* 31438 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
11567 /* 31440 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
11568 /* 31442 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
11569 /* 31444 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11570 /* 31447 */ GIR_RootConstrainSelectedInstOperands,
11571 /* 31448 */ // GIR_Coverage, 1086,
11572 /* 31448 */ GIR_EraseRootFromParent_Done,
11573 /* 31449 */ // Label 754: @31449
11574 /* 31449 */ GIM_Try, /*On fail goto*//*Label 755*/ GIMT_Encode4(31495), // Rule ID 1092 //
11575 /* 31454 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11576 /* 31457 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
11577 /* 31460 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
11578 /* 31463 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11579 /* 31467 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11580 /* 31471 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11581 /* 31475 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11582 /* 31479 */ // (select:{ *:[v16i8] } I32:{ *:[i32] }:$cond, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SELECT_V128:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs, ?:{ *:[i32] }:$cond)
11583 /* 31479 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11584 /* 31482 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11585 /* 31484 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11586 /* 31486 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11587 /* 31488 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
11588 /* 31490 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11589 /* 31493 */ GIR_RootConstrainSelectedInstOperands,
11590 /* 31494 */ // GIR_Coverage, 1092,
11591 /* 31494 */ GIR_EraseRootFromParent_Done,
11592 /* 31495 */ // Label 755: @31495
11593 /* 31495 */ GIM_Reject,
11594 /* 31496 */ // Label 683: @31496
11595 /* 31496 */ GIM_Reject,
11596 /* 31497 */ // Label 34: @31497
11597 /* 31497 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 758*/ GIMT_Encode4(31596),
11598 /* 31508 */ /*GILLT_v8s16*//*Label 756*/ GIMT_Encode4(31516),
11599 /* 31512 */ /*GILLT_v16s8*//*Label 757*/ GIMT_Encode4(31556),
11600 /* 31516 */ // Label 756: @31516
11601 /* 31516 */ GIM_Try, /*On fail goto*//*Label 759*/ GIMT_Encode4(31555), // Rule ID 285 //
11602 /* 31521 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11603 /* 31524 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11604 /* 31527 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11605 /* 31530 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11606 /* 31534 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11607 /* 31538 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11608 /* 31542 */ // (uaddsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (ADD_SAT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
11609 /* 31542 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_U_I16x8),
11610 /* 31547 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11611 /* 31553 */ GIR_RootConstrainSelectedInstOperands,
11612 /* 31554 */ // GIR_Coverage, 285,
11613 /* 31554 */ GIR_Done,
11614 /* 31555 */ // Label 759: @31555
11615 /* 31555 */ GIM_Reject,
11616 /* 31556 */ // Label 757: @31556
11617 /* 31556 */ GIM_Try, /*On fail goto*//*Label 760*/ GIMT_Encode4(31595), // Rule ID 284 //
11618 /* 31561 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11619 /* 31564 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
11620 /* 31567 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
11621 /* 31570 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11622 /* 31574 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11623 /* 31578 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11624 /* 31582 */ // (uaddsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (ADD_SAT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11625 /* 31582 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_U_I8x16),
11626 /* 31587 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11627 /* 31593 */ GIR_RootConstrainSelectedInstOperands,
11628 /* 31594 */ // GIR_Coverage, 284,
11629 /* 31594 */ GIR_Done,
11630 /* 31595 */ // Label 760: @31595
11631 /* 31595 */ GIM_Reject,
11632 /* 31596 */ // Label 758: @31596
11633 /* 31596 */ GIM_Reject,
11634 /* 31597 */ // Label 35: @31597
11635 /* 31597 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 763*/ GIMT_Encode4(31696),
11636 /* 31608 */ /*GILLT_v8s16*//*Label 761*/ GIMT_Encode4(31616),
11637 /* 31612 */ /*GILLT_v16s8*//*Label 762*/ GIMT_Encode4(31656),
11638 /* 31616 */ // Label 761: @31616
11639 /* 31616 */ GIM_Try, /*On fail goto*//*Label 764*/ GIMT_Encode4(31655), // Rule ID 283 //
11640 /* 31621 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11641 /* 31624 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11642 /* 31627 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11643 /* 31630 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11644 /* 31634 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11645 /* 31638 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11646 /* 31642 */ // (saddsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (ADD_SAT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
11647 /* 31642 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_S_I16x8),
11648 /* 31647 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11649 /* 31653 */ GIR_RootConstrainSelectedInstOperands,
11650 /* 31654 */ // GIR_Coverage, 283,
11651 /* 31654 */ GIR_Done,
11652 /* 31655 */ // Label 764: @31655
11653 /* 31655 */ GIM_Reject,
11654 /* 31656 */ // Label 762: @31656
11655 /* 31656 */ GIM_Try, /*On fail goto*//*Label 765*/ GIMT_Encode4(31695), // Rule ID 282 //
11656 /* 31661 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11657 /* 31664 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
11658 /* 31667 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
11659 /* 31670 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11660 /* 31674 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11661 /* 31678 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11662 /* 31682 */ // (saddsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (ADD_SAT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11663 /* 31682 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_S_I8x16),
11664 /* 31687 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11665 /* 31693 */ GIR_RootConstrainSelectedInstOperands,
11666 /* 31694 */ // GIR_Coverage, 282,
11667 /* 31694 */ GIR_Done,
11668 /* 31695 */ // Label 765: @31695
11669 /* 31695 */ GIM_Reject,
11670 /* 31696 */ // Label 763: @31696
11671 /* 31696 */ GIM_Reject,
11672 /* 31697 */ // Label 36: @31697
11673 /* 31697 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 768*/ GIMT_Encode4(31796),
11674 /* 31708 */ /*GILLT_v8s16*//*Label 766*/ GIMT_Encode4(31716),
11675 /* 31712 */ /*GILLT_v16s8*//*Label 767*/ GIMT_Encode4(31756),
11676 /* 31716 */ // Label 766: @31716
11677 /* 31716 */ GIM_Try, /*On fail goto*//*Label 769*/ GIMT_Encode4(31755), // Rule ID 293 //
11678 /* 31721 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11679 /* 31724 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11680 /* 31727 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11681 /* 31730 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11682 /* 31734 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11683 /* 31738 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11684 /* 31742 */ // (usubsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SUB_SAT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
11685 /* 31742 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_U_I16x8),
11686 /* 31747 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11687 /* 31753 */ GIR_RootConstrainSelectedInstOperands,
11688 /* 31754 */ // GIR_Coverage, 293,
11689 /* 31754 */ GIR_Done,
11690 /* 31755 */ // Label 769: @31755
11691 /* 31755 */ GIM_Reject,
11692 /* 31756 */ // Label 767: @31756
11693 /* 31756 */ GIM_Try, /*On fail goto*//*Label 770*/ GIMT_Encode4(31795), // Rule ID 292 //
11694 /* 31761 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11695 /* 31764 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
11696 /* 31767 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
11697 /* 31770 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11698 /* 31774 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11699 /* 31778 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11700 /* 31782 */ // (usubsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SUB_SAT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11701 /* 31782 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_U_I8x16),
11702 /* 31787 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11703 /* 31793 */ GIR_RootConstrainSelectedInstOperands,
11704 /* 31794 */ // GIR_Coverage, 292,
11705 /* 31794 */ GIR_Done,
11706 /* 31795 */ // Label 770: @31795
11707 /* 31795 */ GIM_Reject,
11708 /* 31796 */ // Label 768: @31796
11709 /* 31796 */ GIM_Reject,
11710 /* 31797 */ // Label 37: @31797
11711 /* 31797 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 773*/ GIMT_Encode4(31896),
11712 /* 31808 */ /*GILLT_v8s16*//*Label 771*/ GIMT_Encode4(31816),
11713 /* 31812 */ /*GILLT_v16s8*//*Label 772*/ GIMT_Encode4(31856),
11714 /* 31816 */ // Label 771: @31816
11715 /* 31816 */ GIM_Try, /*On fail goto*//*Label 774*/ GIMT_Encode4(31855), // Rule ID 291 //
11716 /* 31821 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11717 /* 31824 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11718 /* 31827 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11719 /* 31830 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11720 /* 31834 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11721 /* 31838 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11722 /* 31842 */ // (ssubsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SUB_SAT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
11723 /* 31842 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_S_I16x8),
11724 /* 31847 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11725 /* 31853 */ GIR_RootConstrainSelectedInstOperands,
11726 /* 31854 */ // GIR_Coverage, 291,
11727 /* 31854 */ GIR_Done,
11728 /* 31855 */ // Label 774: @31855
11729 /* 31855 */ GIM_Reject,
11730 /* 31856 */ // Label 772: @31856
11731 /* 31856 */ GIM_Try, /*On fail goto*//*Label 775*/ GIMT_Encode4(31895), // Rule ID 290 //
11732 /* 31861 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11733 /* 31864 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
11734 /* 31867 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
11735 /* 31870 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11736 /* 31874 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11737 /* 31878 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11738 /* 31882 */ // (ssubsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SUB_SAT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11739 /* 31882 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_S_I8x16),
11740 /* 31887 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11741 /* 31893 */ GIR_RootConstrainSelectedInstOperands,
11742 /* 31894 */ // GIR_Coverage, 290,
11743 /* 31894 */ GIR_Done,
11744 /* 31895 */ // Label 775: @31895
11745 /* 31895 */ GIM_Reject,
11746 /* 31896 */ // Label 773: @31896
11747 /* 31896 */ GIM_Reject,
11748 /* 31897 */ // Label 38: @31897
11749 /* 31897 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 781*/ GIMT_Encode4(32122),
11750 /* 31908 */ /*GILLT_s32*//*Label 776*/ GIMT_Encode4(31928),
11751 /* 31912 */ /*GILLT_s64*//*Label 777*/ GIMT_Encode4(31965),
11752 /* 31916 */ /*GILLT_v2s64*//*Label 778*/ GIMT_Encode4(32002),
11753 /* 31920 */ /*GILLT_v4s32*//*Label 779*/ GIMT_Encode4(32042),
11754 /* 31924 */ /*GILLT_v8s16*//*Label 780*/ GIMT_Encode4(32082),
11755 /* 31928 */ // Label 776: @31928
11756 /* 31928 */ GIM_Try, /*On fail goto*//*Label 782*/ GIMT_Encode4(31964), // Rule ID 124 //
11757 /* 31933 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11758 /* 31936 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
11759 /* 31939 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11760 /* 31943 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11761 /* 31947 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11762 /* 31951 */ // (fadd:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (ADD_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
11763 /* 31951 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F32),
11764 /* 31956 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11765 /* 31962 */ GIR_RootConstrainSelectedInstOperands,
11766 /* 31963 */ // GIR_Coverage, 124,
11767 /* 31963 */ GIR_Done,
11768 /* 31964 */ // Label 782: @31964
11769 /* 31964 */ GIM_Reject,
11770 /* 31965 */ // Label 777: @31965
11771 /* 31965 */ GIM_Try, /*On fail goto*//*Label 783*/ GIMT_Encode4(32001), // Rule ID 125 //
11772 /* 31970 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
11773 /* 31973 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
11774 /* 31976 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
11775 /* 31980 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
11776 /* 31984 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
11777 /* 31988 */ // (fadd:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (ADD_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
11778 /* 31988 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F64),
11779 /* 31993 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11780 /* 31999 */ GIR_RootConstrainSelectedInstOperands,
11781 /* 32000 */ // GIR_Coverage, 125,
11782 /* 32000 */ GIR_Done,
11783 /* 32001 */ // Label 783: @32001
11784 /* 32001 */ GIM_Reject,
11785 /* 32002 */ // Label 778: @32002
11786 /* 32002 */ GIM_Try, /*On fail goto*//*Label 784*/ GIMT_Encode4(32041), // Rule ID 346 //
11787 /* 32007 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11788 /* 32010 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
11789 /* 32013 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11790 /* 32016 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11791 /* 32020 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11792 /* 32024 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11793 /* 32028 */ // (fadd:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (ADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
11794 /* 32028 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F64x2),
11795 /* 32033 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11796 /* 32039 */ GIR_RootConstrainSelectedInstOperands,
11797 /* 32040 */ // GIR_Coverage, 346,
11798 /* 32040 */ GIR_Done,
11799 /* 32041 */ // Label 784: @32041
11800 /* 32041 */ GIM_Reject,
11801 /* 32042 */ // Label 779: @32042
11802 /* 32042 */ GIM_Try, /*On fail goto*//*Label 785*/ GIMT_Encode4(32081), // Rule ID 345 //
11803 /* 32047 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11804 /* 32050 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11805 /* 32053 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11806 /* 32056 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11807 /* 32060 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11808 /* 32064 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11809 /* 32068 */ // (fadd:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (ADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11810 /* 32068 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F32x4),
11811 /* 32073 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11812 /* 32079 */ GIR_RootConstrainSelectedInstOperands,
11813 /* 32080 */ // GIR_Coverage, 345,
11814 /* 32080 */ GIR_Done,
11815 /* 32081 */ // Label 785: @32081
11816 /* 32081 */ GIM_Reject,
11817 /* 32082 */ // Label 780: @32082
11818 /* 32082 */ GIM_Try, /*On fail goto*//*Label 786*/ GIMT_Encode4(32121), // Rule ID 347 //
11819 /* 32087 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
11820 /* 32090 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11821 /* 32093 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11822 /* 32096 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11823 /* 32100 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11824 /* 32104 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11825 /* 32108 */ // (fadd:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (ADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11826 /* 32108 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F16x8),
11827 /* 32113 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11828 /* 32119 */ GIR_RootConstrainSelectedInstOperands,
11829 /* 32120 */ // GIR_Coverage, 347,
11830 /* 32120 */ GIR_Done,
11831 /* 32121 */ // Label 786: @32121
11832 /* 32121 */ GIM_Reject,
11833 /* 32122 */ // Label 781: @32122
11834 /* 32122 */ GIM_Reject,
11835 /* 32123 */ // Label 39: @32123
11836 /* 32123 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 792*/ GIMT_Encode4(32348),
11837 /* 32134 */ /*GILLT_s32*//*Label 787*/ GIMT_Encode4(32154),
11838 /* 32138 */ /*GILLT_s64*//*Label 788*/ GIMT_Encode4(32191),
11839 /* 32142 */ /*GILLT_v2s64*//*Label 789*/ GIMT_Encode4(32228),
11840 /* 32146 */ /*GILLT_v4s32*//*Label 790*/ GIMT_Encode4(32268),
11841 /* 32150 */ /*GILLT_v8s16*//*Label 791*/ GIMT_Encode4(32308),
11842 /* 32154 */ // Label 787: @32154
11843 /* 32154 */ GIM_Try, /*On fail goto*//*Label 793*/ GIMT_Encode4(32190), // Rule ID 126 //
11844 /* 32159 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11845 /* 32162 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
11846 /* 32165 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11847 /* 32169 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11848 /* 32173 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11849 /* 32177 */ // (fsub:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SUB_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
11850 /* 32177 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F32),
11851 /* 32182 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11852 /* 32188 */ GIR_RootConstrainSelectedInstOperands,
11853 /* 32189 */ // GIR_Coverage, 126,
11854 /* 32189 */ GIR_Done,
11855 /* 32190 */ // Label 793: @32190
11856 /* 32190 */ GIM_Reject,
11857 /* 32191 */ // Label 788: @32191
11858 /* 32191 */ GIM_Try, /*On fail goto*//*Label 794*/ GIMT_Encode4(32227), // Rule ID 127 //
11859 /* 32196 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
11860 /* 32199 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
11861 /* 32202 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
11862 /* 32206 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
11863 /* 32210 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
11864 /* 32214 */ // (fsub:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SUB_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
11865 /* 32214 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F64),
11866 /* 32219 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11867 /* 32225 */ GIR_RootConstrainSelectedInstOperands,
11868 /* 32226 */ // GIR_Coverage, 127,
11869 /* 32226 */ GIR_Done,
11870 /* 32227 */ // Label 794: @32227
11871 /* 32227 */ GIM_Reject,
11872 /* 32228 */ // Label 789: @32228
11873 /* 32228 */ GIM_Try, /*On fail goto*//*Label 795*/ GIMT_Encode4(32267), // Rule ID 349 //
11874 /* 32233 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11875 /* 32236 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
11876 /* 32239 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11877 /* 32242 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11878 /* 32246 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11879 /* 32250 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11880 /* 32254 */ // (fsub:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SUB_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
11881 /* 32254 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F64x2),
11882 /* 32259 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11883 /* 32265 */ GIR_RootConstrainSelectedInstOperands,
11884 /* 32266 */ // GIR_Coverage, 349,
11885 /* 32266 */ GIR_Done,
11886 /* 32267 */ // Label 795: @32267
11887 /* 32267 */ GIM_Reject,
11888 /* 32268 */ // Label 790: @32268
11889 /* 32268 */ GIM_Try, /*On fail goto*//*Label 796*/ GIMT_Encode4(32307), // Rule ID 348 //
11890 /* 32273 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11891 /* 32276 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11892 /* 32279 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11893 /* 32282 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11894 /* 32286 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11895 /* 32290 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11896 /* 32294 */ // (fsub:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SUB_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11897 /* 32294 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F32x4),
11898 /* 32299 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11899 /* 32305 */ GIR_RootConstrainSelectedInstOperands,
11900 /* 32306 */ // GIR_Coverage, 348,
11901 /* 32306 */ GIR_Done,
11902 /* 32307 */ // Label 796: @32307
11903 /* 32307 */ GIM_Reject,
11904 /* 32308 */ // Label 791: @32308
11905 /* 32308 */ GIM_Try, /*On fail goto*//*Label 797*/ GIMT_Encode4(32347), // Rule ID 350 //
11906 /* 32313 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
11907 /* 32316 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11908 /* 32319 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11909 /* 32322 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11910 /* 32326 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11911 /* 32330 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11912 /* 32334 */ // (fsub:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (SUB_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11913 /* 32334 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F16x8),
11914 /* 32339 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11915 /* 32345 */ GIR_RootConstrainSelectedInstOperands,
11916 /* 32346 */ // GIR_Coverage, 350,
11917 /* 32346 */ GIR_Done,
11918 /* 32347 */ // Label 797: @32347
11919 /* 32347 */ GIM_Reject,
11920 /* 32348 */ // Label 792: @32348
11921 /* 32348 */ GIM_Reject,
11922 /* 32349 */ // Label 40: @32349
11923 /* 32349 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 803*/ GIMT_Encode4(32574),
11924 /* 32360 */ /*GILLT_s32*//*Label 798*/ GIMT_Encode4(32380),
11925 /* 32364 */ /*GILLT_s64*//*Label 799*/ GIMT_Encode4(32417),
11926 /* 32368 */ /*GILLT_v2s64*//*Label 800*/ GIMT_Encode4(32454),
11927 /* 32372 */ /*GILLT_v4s32*//*Label 801*/ GIMT_Encode4(32494),
11928 /* 32376 */ /*GILLT_v8s16*//*Label 802*/ GIMT_Encode4(32534),
11929 /* 32380 */ // Label 798: @32380
11930 /* 32380 */ GIM_Try, /*On fail goto*//*Label 804*/ GIMT_Encode4(32416), // Rule ID 128 //
11931 /* 32385 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11932 /* 32388 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
11933 /* 32391 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11934 /* 32395 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11935 /* 32399 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11936 /* 32403 */ // (fmul:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (MUL_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
11937 /* 32403 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F32),
11938 /* 32408 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11939 /* 32414 */ GIR_RootConstrainSelectedInstOperands,
11940 /* 32415 */ // GIR_Coverage, 128,
11941 /* 32415 */ GIR_Done,
11942 /* 32416 */ // Label 804: @32416
11943 /* 32416 */ GIM_Reject,
11944 /* 32417 */ // Label 799: @32417
11945 /* 32417 */ GIM_Try, /*On fail goto*//*Label 805*/ GIMT_Encode4(32453), // Rule ID 129 //
11946 /* 32422 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
11947 /* 32425 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
11948 /* 32428 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
11949 /* 32432 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
11950 /* 32436 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
11951 /* 32440 */ // (fmul:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (MUL_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
11952 /* 32440 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F64),
11953 /* 32445 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11954 /* 32451 */ GIR_RootConstrainSelectedInstOperands,
11955 /* 32452 */ // GIR_Coverage, 129,
11956 /* 32452 */ GIR_Done,
11957 /* 32453 */ // Label 805: @32453
11958 /* 32453 */ GIM_Reject,
11959 /* 32454 */ // Label 800: @32454
11960 /* 32454 */ GIM_Try, /*On fail goto*//*Label 806*/ GIMT_Encode4(32493), // Rule ID 352 //
11961 /* 32459 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11962 /* 32462 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
11963 /* 32465 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11964 /* 32468 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11965 /* 32472 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11966 /* 32476 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11967 /* 32480 */ // (fmul:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (MUL_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
11968 /* 32480 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F64x2),
11969 /* 32485 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11970 /* 32491 */ GIR_RootConstrainSelectedInstOperands,
11971 /* 32492 */ // GIR_Coverage, 352,
11972 /* 32492 */ GIR_Done,
11973 /* 32493 */ // Label 806: @32493
11974 /* 32493 */ GIM_Reject,
11975 /* 32494 */ // Label 801: @32494
11976 /* 32494 */ GIM_Try, /*On fail goto*//*Label 807*/ GIMT_Encode4(32533), // Rule ID 351 //
11977 /* 32499 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11978 /* 32502 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11979 /* 32505 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11980 /* 32508 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11981 /* 32512 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11982 /* 32516 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11983 /* 32520 */ // (fmul:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (MUL_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11984 /* 32520 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F32x4),
11985 /* 32525 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11986 /* 32531 */ GIR_RootConstrainSelectedInstOperands,
11987 /* 32532 */ // GIR_Coverage, 351,
11988 /* 32532 */ GIR_Done,
11989 /* 32533 */ // Label 807: @32533
11990 /* 32533 */ GIM_Reject,
11991 /* 32534 */ // Label 802: @32534
11992 /* 32534 */ GIM_Try, /*On fail goto*//*Label 808*/ GIMT_Encode4(32573), // Rule ID 353 //
11993 /* 32539 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
11994 /* 32542 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11995 /* 32545 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11996 /* 32548 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11997 /* 32552 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11998 /* 32556 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11999 /* 32560 */ // (fmul:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (MUL_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12000 /* 32560 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F16x8),
12001 /* 32565 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12002 /* 32571 */ GIR_RootConstrainSelectedInstOperands,
12003 /* 32572 */ // GIR_Coverage, 353,
12004 /* 32572 */ GIR_Done,
12005 /* 32573 */ // Label 808: @32573
12006 /* 32573 */ GIM_Reject,
12007 /* 32574 */ // Label 803: @32574
12008 /* 32574 */ GIM_Reject,
12009 /* 32575 */ // Label 41: @32575
12010 /* 32575 */ GIM_Try, /*On fail goto*//*Label 809*/ GIMT_Encode4(32738),
12011 /* 32580 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
12012 /* 32583 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12013 /* 32586 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12014 /* 32589 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
12015 /* 32592 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12016 /* 32596 */ GIM_Try, /*On fail goto*//*Label 810*/ GIMT_Encode4(32649), // Rule ID 456 //
12017 /* 32601 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12018 /* 32604 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12019 /* 32608 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FNEG),
12020 /* 32612 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
12021 /* 32616 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12022 /* 32621 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12023 /* 32625 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12024 /* 32629 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12025 /* 32631 */ // (fma:{ *:[v8f16] } (fneg:{ *:[v8f16] } V128:{ *:[v8f16] }:$a), V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (NMADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
12026 /* 32631 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F16x8),
12027 /* 32634 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12028 /* 32636 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // a
12029 /* 32640 */ GIR_RootToRootCopy, /*OpIdx*/2, // b
12030 /* 32642 */ GIR_RootToRootCopy, /*OpIdx*/3, // c
12031 /* 32644 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12032 /* 32647 */ GIR_RootConstrainSelectedInstOperands,
12033 /* 32648 */ // GIR_Coverage, 456,
12034 /* 32648 */ GIR_EraseRootFromParent_Done,
12035 /* 32649 */ // Label 810: @32649
12036 /* 32649 */ GIM_Try, /*On fail goto*//*Label 811*/ GIMT_Encode4(32737),
12037 /* 32654 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12038 /* 32658 */ GIM_Try, /*On fail goto*//*Label 812*/ GIMT_Encode4(32707), // Rule ID 1315 //
12039 /* 32663 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12040 /* 32666 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
12041 /* 32670 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FNEG),
12042 /* 32674 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
12043 /* 32678 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12044 /* 32683 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12045 /* 32687 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12046 /* 32689 */ // (fma:{ *:[v8f16] } V128:{ *:[v8f16] }:$b, (fneg:{ *:[v8f16] } V128:{ *:[v8f16] }:$a), V128:{ *:[v8f16] }:$c) => (NMADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
12047 /* 32689 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F16x8),
12048 /* 32692 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12049 /* 32694 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // a
12050 /* 32698 */ GIR_RootToRootCopy, /*OpIdx*/1, // b
12051 /* 32700 */ GIR_RootToRootCopy, /*OpIdx*/3, // c
12052 /* 32702 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12053 /* 32705 */ GIR_RootConstrainSelectedInstOperands,
12054 /* 32706 */ // GIR_Coverage, 1315,
12055 /* 32706 */ GIR_EraseRootFromParent_Done,
12056 /* 32707 */ // Label 812: @32707
12057 /* 32707 */ GIM_Try, /*On fail goto*//*Label 813*/ GIMT_Encode4(32736), // Rule ID 455 //
12058 /* 32712 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12059 /* 32715 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12060 /* 32719 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12061 /* 32723 */ // (fma:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (MADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
12062 /* 32723 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F16x8),
12063 /* 32728 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12064 /* 32734 */ GIR_RootConstrainSelectedInstOperands,
12065 /* 32735 */ // GIR_Coverage, 455,
12066 /* 32735 */ GIR_Done,
12067 /* 32736 */ // Label 813: @32736
12068 /* 32736 */ GIM_Reject,
12069 /* 32737 */ // Label 811: @32737
12070 /* 32737 */ GIM_Reject,
12071 /* 32738 */ // Label 809: @32738
12072 /* 32738 */ GIM_Reject,
12073 /* 32739 */ // Label 42: @32739
12074 /* 32739 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 819*/ GIMT_Encode4(32964),
12075 /* 32750 */ /*GILLT_s32*//*Label 814*/ GIMT_Encode4(32770),
12076 /* 32754 */ /*GILLT_s64*//*Label 815*/ GIMT_Encode4(32807),
12077 /* 32758 */ /*GILLT_v2s64*//*Label 816*/ GIMT_Encode4(32844),
12078 /* 32762 */ /*GILLT_v4s32*//*Label 817*/ GIMT_Encode4(32884),
12079 /* 32766 */ /*GILLT_v8s16*//*Label 818*/ GIMT_Encode4(32924),
12080 /* 32770 */ // Label 814: @32770
12081 /* 32770 */ GIM_Try, /*On fail goto*//*Label 820*/ GIMT_Encode4(32806), // Rule ID 130 //
12082 /* 32775 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12083 /* 32778 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
12084 /* 32781 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12085 /* 32785 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12086 /* 32789 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12087 /* 32793 */ // (fdiv:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (DIV_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12088 /* 32793 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F32),
12089 /* 32798 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12090 /* 32804 */ GIR_RootConstrainSelectedInstOperands,
12091 /* 32805 */ // GIR_Coverage, 130,
12092 /* 32805 */ GIR_Done,
12093 /* 32806 */ // Label 820: @32806
12094 /* 32806 */ GIM_Reject,
12095 /* 32807 */ // Label 815: @32807
12096 /* 32807 */ GIM_Try, /*On fail goto*//*Label 821*/ GIMT_Encode4(32843), // Rule ID 131 //
12097 /* 32812 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12098 /* 32815 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
12099 /* 32818 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12100 /* 32822 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12101 /* 32826 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12102 /* 32830 */ // (fdiv:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (DIV_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12103 /* 32830 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F64),
12104 /* 32835 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12105 /* 32841 */ GIR_RootConstrainSelectedInstOperands,
12106 /* 32842 */ // GIR_Coverage, 131,
12107 /* 32842 */ GIR_Done,
12108 /* 32843 */ // Label 821: @32843
12109 /* 32843 */ GIM_Reject,
12110 /* 32844 */ // Label 816: @32844
12111 /* 32844 */ GIM_Try, /*On fail goto*//*Label 822*/ GIMT_Encode4(32883), // Rule ID 355 //
12112 /* 32849 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12113 /* 32852 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
12114 /* 32855 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12115 /* 32858 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12116 /* 32862 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12117 /* 32866 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12118 /* 32870 */ // (fdiv:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (DIV_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12119 /* 32870 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F64x2),
12120 /* 32875 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12121 /* 32881 */ GIR_RootConstrainSelectedInstOperands,
12122 /* 32882 */ // GIR_Coverage, 355,
12123 /* 32882 */ GIR_Done,
12124 /* 32883 */ // Label 822: @32883
12125 /* 32883 */ GIM_Reject,
12126 /* 32884 */ // Label 817: @32884
12127 /* 32884 */ GIM_Try, /*On fail goto*//*Label 823*/ GIMT_Encode4(32923), // Rule ID 354 //
12128 /* 32889 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12129 /* 32892 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
12130 /* 32895 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
12131 /* 32898 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12132 /* 32902 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12133 /* 32906 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12134 /* 32910 */ // (fdiv:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (DIV_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12135 /* 32910 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F32x4),
12136 /* 32915 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12137 /* 32921 */ GIR_RootConstrainSelectedInstOperands,
12138 /* 32922 */ // GIR_Coverage, 354,
12139 /* 32922 */ GIR_Done,
12140 /* 32923 */ // Label 823: @32923
12141 /* 32923 */ GIM_Reject,
12142 /* 32924 */ // Label 818: @32924
12143 /* 32924 */ GIM_Try, /*On fail goto*//*Label 824*/ GIMT_Encode4(32963), // Rule ID 356 //
12144 /* 32929 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12145 /* 32932 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12146 /* 32935 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12147 /* 32938 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12148 /* 32942 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12149 /* 32946 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12150 /* 32950 */ // (fdiv:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (DIV_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12151 /* 32950 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F16x8),
12152 /* 32955 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12153 /* 32961 */ GIR_RootConstrainSelectedInstOperands,
12154 /* 32962 */ // GIR_Coverage, 356,
12155 /* 32962 */ GIR_Done,
12156 /* 32963 */ // Label 824: @32963
12157 /* 32963 */ GIM_Reject,
12158 /* 32964 */ // Label 819: @32964
12159 /* 32964 */ GIM_Reject,
12160 /* 32965 */ // Label 43: @32965
12161 /* 32965 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 830*/ GIMT_Encode4(33155),
12162 /* 32976 */ /*GILLT_s32*//*Label 825*/ GIMT_Encode4(32996),
12163 /* 32980 */ /*GILLT_s64*//*Label 826*/ GIMT_Encode4(33026),
12164 /* 32984 */ /*GILLT_v2s64*//*Label 827*/ GIMT_Encode4(33056),
12165 /* 32988 */ /*GILLT_v4s32*//*Label 828*/ GIMT_Encode4(33089),
12166 /* 32992 */ /*GILLT_v8s16*//*Label 829*/ GIMT_Encode4(33122),
12167 /* 32996 */ // Label 825: @32996
12168 /* 32996 */ GIM_Try, /*On fail goto*//*Label 831*/ GIMT_Encode4(33025), // Rule ID 136 //
12169 /* 33001 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12170 /* 33004 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12171 /* 33008 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12172 /* 33012 */ // (fneg:{ *:[f32] } F32:{ *:[f32] }:$src) => (NEG_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
12173 /* 33012 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F32),
12174 /* 33017 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12175 /* 33023 */ GIR_RootConstrainSelectedInstOperands,
12176 /* 33024 */ // GIR_Coverage, 136,
12177 /* 33024 */ GIR_Done,
12178 /* 33025 */ // Label 831: @33025
12179 /* 33025 */ GIM_Reject,
12180 /* 33026 */ // Label 826: @33026
12181 /* 33026 */ GIM_Try, /*On fail goto*//*Label 832*/ GIMT_Encode4(33055), // Rule ID 137 //
12182 /* 33031 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12183 /* 33034 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12184 /* 33038 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12185 /* 33042 */ // (fneg:{ *:[f64] } F64:{ *:[f64] }:$src) => (NEG_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
12186 /* 33042 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F64),
12187 /* 33047 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12188 /* 33053 */ GIR_RootConstrainSelectedInstOperands,
12189 /* 33054 */ // GIR_Coverage, 137,
12190 /* 33054 */ GIR_Done,
12191 /* 33055 */ // Label 832: @33055
12192 /* 33055 */ GIM_Reject,
12193 /* 33056 */ // Label 827: @33056
12194 /* 33056 */ GIM_Try, /*On fail goto*//*Label 833*/ GIMT_Encode4(33088), // Rule ID 328 //
12195 /* 33061 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12196 /* 33064 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
12197 /* 33067 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12198 /* 33071 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12199 /* 33075 */ // (fneg:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (NEG_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
12200 /* 33075 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F64x2),
12201 /* 33080 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12202 /* 33086 */ GIR_RootConstrainSelectedInstOperands,
12203 /* 33087 */ // GIR_Coverage, 328,
12204 /* 33087 */ GIR_Done,
12205 /* 33088 */ // Label 833: @33088
12206 /* 33088 */ GIM_Reject,
12207 /* 33089 */ // Label 828: @33089
12208 /* 33089 */ GIM_Try, /*On fail goto*//*Label 834*/ GIMT_Encode4(33121), // Rule ID 327 //
12209 /* 33094 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12210 /* 33097 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
12211 /* 33100 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12212 /* 33104 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12213 /* 33108 */ // (fneg:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (NEG_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
12214 /* 33108 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F32x4),
12215 /* 33113 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12216 /* 33119 */ GIR_RootConstrainSelectedInstOperands,
12217 /* 33120 */ // GIR_Coverage, 327,
12218 /* 33120 */ GIR_Done,
12219 /* 33121 */ // Label 834: @33121
12220 /* 33121 */ GIM_Reject,
12221 /* 33122 */ // Label 829: @33122
12222 /* 33122 */ GIM_Try, /*On fail goto*//*Label 835*/ GIMT_Encode4(33154), // Rule ID 329 //
12223 /* 33127 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12224 /* 33130 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12225 /* 33133 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12226 /* 33137 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12227 /* 33141 */ // (fneg:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (NEG_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
12228 /* 33141 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F16x8),
12229 /* 33146 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12230 /* 33152 */ GIR_RootConstrainSelectedInstOperands,
12231 /* 33153 */ // GIR_Coverage, 329,
12232 /* 33153 */ GIR_Done,
12233 /* 33154 */ // Label 835: @33154
12234 /* 33154 */ GIM_Reject,
12235 /* 33155 */ // Label 830: @33155
12236 /* 33155 */ GIM_Reject,
12237 /* 33156 */ // Label 44: @33156
12238 /* 33156 */ GIM_Try, /*On fail goto*//*Label 836*/ GIMT_Encode4(33188), // Rule ID 58 //
12239 /* 33161 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
12240 /* 33164 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12241 /* 33167 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12242 /* 33171 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12243 /* 33175 */ // (fpextend:{ *:[f64] } F32:{ *:[f32] }:$src) => (F64_PROMOTE_F32:{ *:[f64] } F32:{ *:[f32] }:$src)
12244 /* 33175 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_PROMOTE_F32),
12245 /* 33180 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12246 /* 33186 */ GIR_RootConstrainSelectedInstOperands,
12247 /* 33187 */ // GIR_Coverage, 58,
12248 /* 33187 */ GIR_Done,
12249 /* 33188 */ // Label 836: @33188
12250 /* 33188 */ GIM_Reject,
12251 /* 33189 */ // Label 45: @33189
12252 /* 33189 */ GIM_Try, /*On fail goto*//*Label 837*/ GIMT_Encode4(33221), // Rule ID 59 //
12253 /* 33194 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
12254 /* 33197 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12255 /* 33200 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12256 /* 33204 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12257 /* 33208 */ // (fpround:{ *:[f32] } F64:{ *:[f64] }:$src) => (F32_DEMOTE_F64:{ *:[f32] } F64:{ *:[f64] }:$src)
12258 /* 33208 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_DEMOTE_F64),
12259 /* 33213 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12260 /* 33219 */ GIR_RootConstrainSelectedInstOperands,
12261 /* 33220 */ // GIR_Coverage, 59,
12262 /* 33220 */ GIR_Done,
12263 /* 33221 */ // Label 837: @33221
12264 /* 33221 */ GIM_Reject,
12265 /* 33222 */ // Label 46: @33222
12266 /* 33222 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 842*/ GIMT_Encode4(33577),
12267 /* 33233 */ /*GILLT_s32*//*Label 838*/ GIMT_Encode4(33253),
12268 /* 33237 */ /*GILLT_s64*//*Label 839*/ GIMT_Encode4(33382), GIMT_Encode4(0),
12269 /* 33245 */ /*GILLT_v4s32*//*Label 840*/ GIMT_Encode4(33511),
12270 /* 33249 */ /*GILLT_v8s16*//*Label 841*/ GIMT_Encode4(33544),
12271 /* 33253 */ // Label 838: @33253
12272 /* 33253 */ GIM_Try, /*On fail goto*//*Label 843*/ GIMT_Encode4(33285), // Rule ID 34 //
12273 /* 33258 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNontrappingFPToInt),
12274 /* 33261 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12275 /* 33264 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12276 /* 33268 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12277 /* 33272 */ // (fp_to_sint:{ *:[i32] } F32:{ *:[f32] }:$src) => (I32_TRUNC_S_SAT_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
12278 /* 33272 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_SAT_F32),
12279 /* 33277 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12280 /* 33283 */ GIR_RootConstrainSelectedInstOperands,
12281 /* 33284 */ // GIR_Coverage, 34,
12282 /* 33284 */ GIR_Done,
12283 /* 33285 */ // Label 843: @33285
12284 /* 33285 */ GIM_Try, /*On fail goto*//*Label 844*/ GIMT_Encode4(33317), // Rule ID 38 //
12285 /* 33290 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNontrappingFPToInt),
12286 /* 33293 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12287 /* 33296 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12288 /* 33300 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12289 /* 33304 */ // (fp_to_sint:{ *:[i32] } F64:{ *:[f64] }:$src) => (I32_TRUNC_S_SAT_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
12290 /* 33304 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_SAT_F64),
12291 /* 33309 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12292 /* 33315 */ GIR_RootConstrainSelectedInstOperands,
12293 /* 33316 */ // GIR_Coverage, 38,
12294 /* 33316 */ GIR_Done,
12295 /* 33317 */ // Label 844: @33317
12296 /* 33317 */ GIM_Try, /*On fail goto*//*Label 845*/ GIMT_Encode4(33349), // Rule ID 42 //
12297 /* 33322 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt),
12298 /* 33325 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12299 /* 33328 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12300 /* 33332 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12301 /* 33336 */ // (fp_to_sint:{ *:[i32] } F32:{ *:[f32] }:$src) => (FP_TO_SINT_I32_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
12302 /* 33336 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I32_F32),
12303 /* 33341 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12304 /* 33347 */ GIR_RootConstrainSelectedInstOperands,
12305 /* 33348 */ // GIR_Coverage, 42,
12306 /* 33348 */ GIR_Done,
12307 /* 33349 */ // Label 845: @33349
12308 /* 33349 */ GIM_Try, /*On fail goto*//*Label 846*/ GIMT_Encode4(33381), // Rule ID 46 //
12309 /* 33354 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt),
12310 /* 33357 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12311 /* 33360 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12312 /* 33364 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12313 /* 33368 */ // (fp_to_sint:{ *:[i32] } F64:{ *:[f64] }:$src) => (FP_TO_SINT_I32_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
12314 /* 33368 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I32_F64),
12315 /* 33373 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12316 /* 33379 */ GIR_RootConstrainSelectedInstOperands,
12317 /* 33380 */ // GIR_Coverage, 46,
12318 /* 33380 */ GIR_Done,
12319 /* 33381 */ // Label 846: @33381
12320 /* 33381 */ GIM_Reject,
12321 /* 33382 */ // Label 839: @33382
12322 /* 33382 */ GIM_Try, /*On fail goto*//*Label 847*/ GIMT_Encode4(33414), // Rule ID 36 //
12323 /* 33387 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNontrappingFPToInt),
12324 /* 33390 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12325 /* 33393 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12326 /* 33397 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12327 /* 33401 */ // (fp_to_sint:{ *:[i64] } F32:{ *:[f32] }:$src) => (I64_TRUNC_S_SAT_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
12328 /* 33401 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_SAT_F32),
12329 /* 33406 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12330 /* 33412 */ GIR_RootConstrainSelectedInstOperands,
12331 /* 33413 */ // GIR_Coverage, 36,
12332 /* 33413 */ GIR_Done,
12333 /* 33414 */ // Label 847: @33414
12334 /* 33414 */ GIM_Try, /*On fail goto*//*Label 848*/ GIMT_Encode4(33446), // Rule ID 40 //
12335 /* 33419 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNontrappingFPToInt),
12336 /* 33422 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12337 /* 33425 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12338 /* 33429 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12339 /* 33433 */ // (fp_to_sint:{ *:[i64] } F64:{ *:[f64] }:$src) => (I64_TRUNC_S_SAT_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
12340 /* 33433 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_SAT_F64),
12341 /* 33438 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12342 /* 33444 */ GIR_RootConstrainSelectedInstOperands,
12343 /* 33445 */ // GIR_Coverage, 40,
12344 /* 33445 */ GIR_Done,
12345 /* 33446 */ // Label 848: @33446
12346 /* 33446 */ GIM_Try, /*On fail goto*//*Label 849*/ GIMT_Encode4(33478), // Rule ID 44 //
12347 /* 33451 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt),
12348 /* 33454 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12349 /* 33457 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12350 /* 33461 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12351 /* 33465 */ // (fp_to_sint:{ *:[i64] } F32:{ *:[f32] }:$src) => (FP_TO_SINT_I64_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
12352 /* 33465 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I64_F32),
12353 /* 33470 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12354 /* 33476 */ GIR_RootConstrainSelectedInstOperands,
12355 /* 33477 */ // GIR_Coverage, 44,
12356 /* 33477 */ GIR_Done,
12357 /* 33478 */ // Label 849: @33478
12358 /* 33478 */ GIM_Try, /*On fail goto*//*Label 850*/ GIMT_Encode4(33510), // Rule ID 48 //
12359 /* 33483 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt),
12360 /* 33486 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12361 /* 33489 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12362 /* 33493 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12363 /* 33497 */ // (fp_to_sint:{ *:[i64] } F64:{ *:[f64] }:$src) => (FP_TO_SINT_I64_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
12364 /* 33497 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I64_F64),
12365 /* 33502 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12366 /* 33508 */ GIR_RootConstrainSelectedInstOperands,
12367 /* 33509 */ // GIR_Coverage, 48,
12368 /* 33509 */ GIR_Done,
12369 /* 33510 */ // Label 850: @33510
12370 /* 33510 */ GIM_Reject,
12371 /* 33511 */ // Label 840: @33511
12372 /* 33511 */ GIM_Try, /*On fail goto*//*Label 851*/ GIMT_Encode4(33543), // Rule ID 411 //
12373 /* 33516 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12374 /* 33519 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
12375 /* 33522 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12376 /* 33526 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12377 /* 33530 */ // (fp_to_sint:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec) => (fp_to_sint_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
12378 /* 33530 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_sint_I32x4),
12379 /* 33535 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12380 /* 33541 */ GIR_RootConstrainSelectedInstOperands,
12381 /* 33542 */ // GIR_Coverage, 411,
12382 /* 33542 */ GIR_Done,
12383 /* 33543 */ // Label 851: @33543
12384 /* 33543 */ GIM_Reject,
12385 /* 33544 */ // Label 841: @33544
12386 /* 33544 */ GIM_Try, /*On fail goto*//*Label 852*/ GIMT_Encode4(33576), // Rule ID 413 //
12387 /* 33549 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12388 /* 33552 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12389 /* 33555 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12390 /* 33559 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12391 /* 33563 */ // (fp_to_sint:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec) => (fp_to_sint_I16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec)
12392 /* 33563 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_sint_I16x8),
12393 /* 33568 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12394 /* 33574 */ GIR_RootConstrainSelectedInstOperands,
12395 /* 33575 */ // GIR_Coverage, 413,
12396 /* 33575 */ GIR_Done,
12397 /* 33576 */ // Label 852: @33576
12398 /* 33576 */ GIM_Reject,
12399 /* 33577 */ // Label 842: @33577
12400 /* 33577 */ GIM_Reject,
12401 /* 33578 */ // Label 47: @33578
12402 /* 33578 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 857*/ GIMT_Encode4(33933),
12403 /* 33589 */ /*GILLT_s32*//*Label 853*/ GIMT_Encode4(33609),
12404 /* 33593 */ /*GILLT_s64*//*Label 854*/ GIMT_Encode4(33738), GIMT_Encode4(0),
12405 /* 33601 */ /*GILLT_v4s32*//*Label 855*/ GIMT_Encode4(33867),
12406 /* 33605 */ /*GILLT_v8s16*//*Label 856*/ GIMT_Encode4(33900),
12407 /* 33609 */ // Label 853: @33609
12408 /* 33609 */ GIM_Try, /*On fail goto*//*Label 858*/ GIMT_Encode4(33641), // Rule ID 35 //
12409 /* 33614 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNontrappingFPToInt),
12410 /* 33617 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12411 /* 33620 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12412 /* 33624 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12413 /* 33628 */ // (fp_to_uint:{ *:[i32] } F32:{ *:[f32] }:$src) => (I32_TRUNC_U_SAT_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
12414 /* 33628 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_SAT_F32),
12415 /* 33633 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12416 /* 33639 */ GIR_RootConstrainSelectedInstOperands,
12417 /* 33640 */ // GIR_Coverage, 35,
12418 /* 33640 */ GIR_Done,
12419 /* 33641 */ // Label 858: @33641
12420 /* 33641 */ GIM_Try, /*On fail goto*//*Label 859*/ GIMT_Encode4(33673), // Rule ID 39 //
12421 /* 33646 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNontrappingFPToInt),
12422 /* 33649 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12423 /* 33652 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12424 /* 33656 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12425 /* 33660 */ // (fp_to_uint:{ *:[i32] } F64:{ *:[f64] }:$src) => (I32_TRUNC_U_SAT_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
12426 /* 33660 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_SAT_F64),
12427 /* 33665 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12428 /* 33671 */ GIR_RootConstrainSelectedInstOperands,
12429 /* 33672 */ // GIR_Coverage, 39,
12430 /* 33672 */ GIR_Done,
12431 /* 33673 */ // Label 859: @33673
12432 /* 33673 */ GIM_Try, /*On fail goto*//*Label 860*/ GIMT_Encode4(33705), // Rule ID 43 //
12433 /* 33678 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt),
12434 /* 33681 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12435 /* 33684 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12436 /* 33688 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12437 /* 33692 */ // (fp_to_uint:{ *:[i32] } F32:{ *:[f32] }:$src) => (FP_TO_UINT_I32_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
12438 /* 33692 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I32_F32),
12439 /* 33697 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12440 /* 33703 */ GIR_RootConstrainSelectedInstOperands,
12441 /* 33704 */ // GIR_Coverage, 43,
12442 /* 33704 */ GIR_Done,
12443 /* 33705 */ // Label 860: @33705
12444 /* 33705 */ GIM_Try, /*On fail goto*//*Label 861*/ GIMT_Encode4(33737), // Rule ID 47 //
12445 /* 33710 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt),
12446 /* 33713 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12447 /* 33716 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12448 /* 33720 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12449 /* 33724 */ // (fp_to_uint:{ *:[i32] } F64:{ *:[f64] }:$src) => (FP_TO_UINT_I32_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
12450 /* 33724 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I32_F64),
12451 /* 33729 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12452 /* 33735 */ GIR_RootConstrainSelectedInstOperands,
12453 /* 33736 */ // GIR_Coverage, 47,
12454 /* 33736 */ GIR_Done,
12455 /* 33737 */ // Label 861: @33737
12456 /* 33737 */ GIM_Reject,
12457 /* 33738 */ // Label 854: @33738
12458 /* 33738 */ GIM_Try, /*On fail goto*//*Label 862*/ GIMT_Encode4(33770), // Rule ID 37 //
12459 /* 33743 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNontrappingFPToInt),
12460 /* 33746 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12461 /* 33749 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12462 /* 33753 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12463 /* 33757 */ // (fp_to_uint:{ *:[i64] } F32:{ *:[f32] }:$src) => (I64_TRUNC_U_SAT_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
12464 /* 33757 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_SAT_F32),
12465 /* 33762 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12466 /* 33768 */ GIR_RootConstrainSelectedInstOperands,
12467 /* 33769 */ // GIR_Coverage, 37,
12468 /* 33769 */ GIR_Done,
12469 /* 33770 */ // Label 862: @33770
12470 /* 33770 */ GIM_Try, /*On fail goto*//*Label 863*/ GIMT_Encode4(33802), // Rule ID 41 //
12471 /* 33775 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNontrappingFPToInt),
12472 /* 33778 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12473 /* 33781 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12474 /* 33785 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12475 /* 33789 */ // (fp_to_uint:{ *:[i64] } F64:{ *:[f64] }:$src) => (I64_TRUNC_U_SAT_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
12476 /* 33789 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_SAT_F64),
12477 /* 33794 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12478 /* 33800 */ GIR_RootConstrainSelectedInstOperands,
12479 /* 33801 */ // GIR_Coverage, 41,
12480 /* 33801 */ GIR_Done,
12481 /* 33802 */ // Label 863: @33802
12482 /* 33802 */ GIM_Try, /*On fail goto*//*Label 864*/ GIMT_Encode4(33834), // Rule ID 45 //
12483 /* 33807 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt),
12484 /* 33810 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12485 /* 33813 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12486 /* 33817 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12487 /* 33821 */ // (fp_to_uint:{ *:[i64] } F32:{ *:[f32] }:$src) => (FP_TO_UINT_I64_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
12488 /* 33821 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I64_F32),
12489 /* 33826 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12490 /* 33832 */ GIR_RootConstrainSelectedInstOperands,
12491 /* 33833 */ // GIR_Coverage, 45,
12492 /* 33833 */ GIR_Done,
12493 /* 33834 */ // Label 864: @33834
12494 /* 33834 */ GIM_Try, /*On fail goto*//*Label 865*/ GIMT_Encode4(33866), // Rule ID 49 //
12495 /* 33839 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt),
12496 /* 33842 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12497 /* 33845 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12498 /* 33849 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12499 /* 33853 */ // (fp_to_uint:{ *:[i64] } F64:{ *:[f64] }:$src) => (FP_TO_UINT_I64_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
12500 /* 33853 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I64_F64),
12501 /* 33858 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12502 /* 33864 */ GIR_RootConstrainSelectedInstOperands,
12503 /* 33865 */ // GIR_Coverage, 49,
12504 /* 33865 */ GIR_Done,
12505 /* 33866 */ // Label 865: @33866
12506 /* 33866 */ GIM_Reject,
12507 /* 33867 */ // Label 855: @33867
12508 /* 33867 */ GIM_Try, /*On fail goto*//*Label 866*/ GIMT_Encode4(33899), // Rule ID 412 //
12509 /* 33872 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12510 /* 33875 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
12511 /* 33878 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12512 /* 33882 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12513 /* 33886 */ // (fp_to_uint:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec) => (fp_to_uint_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
12514 /* 33886 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_uint_I32x4),
12515 /* 33891 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12516 /* 33897 */ GIR_RootConstrainSelectedInstOperands,
12517 /* 33898 */ // GIR_Coverage, 412,
12518 /* 33898 */ GIR_Done,
12519 /* 33899 */ // Label 866: @33899
12520 /* 33899 */ GIM_Reject,
12521 /* 33900 */ // Label 856: @33900
12522 /* 33900 */ GIM_Try, /*On fail goto*//*Label 867*/ GIMT_Encode4(33932), // Rule ID 414 //
12523 /* 33905 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12524 /* 33908 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12525 /* 33911 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12526 /* 33915 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12527 /* 33919 */ // (fp_to_uint:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec) => (fp_to_uint_I16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec)
12528 /* 33919 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_uint_I16x8),
12529 /* 33924 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12530 /* 33930 */ GIR_RootConstrainSelectedInstOperands,
12531 /* 33931 */ // GIR_Coverage, 414,
12532 /* 33931 */ GIR_Done,
12533 /* 33932 */ // Label 867: @33932
12534 /* 33932 */ GIM_Reject,
12535 /* 33933 */ // Label 857: @33933
12536 /* 33933 */ GIM_Reject,
12537 /* 33934 */ // Label 48: @33934
12538 /* 33934 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 872*/ GIMT_Encode4(34149),
12539 /* 33945 */ /*GILLT_s32*//*Label 868*/ GIMT_Encode4(33965),
12540 /* 33949 */ /*GILLT_s64*//*Label 869*/ GIMT_Encode4(34024), GIMT_Encode4(0),
12541 /* 33957 */ /*GILLT_v4s32*//*Label 870*/ GIMT_Encode4(34083),
12542 /* 33961 */ /*GILLT_v8s16*//*Label 871*/ GIMT_Encode4(34116),
12543 /* 33965 */ // Label 868: @33965
12544 /* 33965 */ GIM_Try, /*On fail goto*//*Label 873*/ GIMT_Encode4(33994), // Rule ID 50 //
12545 /* 33970 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12546 /* 33973 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12547 /* 33977 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12548 /* 33981 */ // (sint_to_fp:{ *:[f32] } I32:{ *:[i32] }:$src) => (F32_CONVERT_S_I32:{ *:[f32] } I32:{ *:[i32] }:$src)
12549 /* 33981 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_S_I32),
12550 /* 33986 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12551 /* 33992 */ GIR_RootConstrainSelectedInstOperands,
12552 /* 33993 */ // GIR_Coverage, 50,
12553 /* 33993 */ GIR_Done,
12554 /* 33994 */ // Label 873: @33994
12555 /* 33994 */ GIM_Try, /*On fail goto*//*Label 874*/ GIMT_Encode4(34023), // Rule ID 54 //
12556 /* 33999 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12557 /* 34002 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12558 /* 34006 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12559 /* 34010 */ // (sint_to_fp:{ *:[f32] } I64:{ *:[i64] }:$src) => (F32_CONVERT_S_I64:{ *:[f32] } I64:{ *:[i64] }:$src)
12560 /* 34010 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_S_I64),
12561 /* 34015 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12562 /* 34021 */ GIR_RootConstrainSelectedInstOperands,
12563 /* 34022 */ // GIR_Coverage, 54,
12564 /* 34022 */ GIR_Done,
12565 /* 34023 */ // Label 874: @34023
12566 /* 34023 */ GIM_Reject,
12567 /* 34024 */ // Label 869: @34024
12568 /* 34024 */ GIM_Try, /*On fail goto*//*Label 875*/ GIMT_Encode4(34053), // Rule ID 52 //
12569 /* 34029 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12570 /* 34032 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12571 /* 34036 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12572 /* 34040 */ // (sint_to_fp:{ *:[f64] } I32:{ *:[i32] }:$src) => (F64_CONVERT_S_I32:{ *:[f64] } I32:{ *:[i32] }:$src)
12573 /* 34040 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_S_I32),
12574 /* 34045 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12575 /* 34051 */ GIR_RootConstrainSelectedInstOperands,
12576 /* 34052 */ // GIR_Coverage, 52,
12577 /* 34052 */ GIR_Done,
12578 /* 34053 */ // Label 875: @34053
12579 /* 34053 */ GIM_Try, /*On fail goto*//*Label 876*/ GIMT_Encode4(34082), // Rule ID 56 //
12580 /* 34058 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12581 /* 34061 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12582 /* 34065 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12583 /* 34069 */ // (sint_to_fp:{ *:[f64] } I64:{ *:[i64] }:$src) => (F64_CONVERT_S_I64:{ *:[f64] } I64:{ *:[i64] }:$src)
12584 /* 34069 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_S_I64),
12585 /* 34074 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12586 /* 34080 */ GIR_RootConstrainSelectedInstOperands,
12587 /* 34081 */ // GIR_Coverage, 56,
12588 /* 34081 */ GIR_Done,
12589 /* 34082 */ // Label 876: @34082
12590 /* 34082 */ GIM_Reject,
12591 /* 34083 */ // Label 870: @34083
12592 /* 34083 */ GIM_Try, /*On fail goto*//*Label 877*/ GIMT_Encode4(34115), // Rule ID 417 //
12593 /* 34088 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12594 /* 34091 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
12595 /* 34094 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12596 /* 34098 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12597 /* 34102 */ // (sint_to_fp:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec) => (sint_to_fp_F32x4:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec)
12598 /* 34102 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::sint_to_fp_F32x4),
12599 /* 34107 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12600 /* 34113 */ GIR_RootConstrainSelectedInstOperands,
12601 /* 34114 */ // GIR_Coverage, 417,
12602 /* 34114 */ GIR_Done,
12603 /* 34115 */ // Label 877: @34115
12604 /* 34115 */ GIM_Reject,
12605 /* 34116 */ // Label 871: @34116
12606 /* 34116 */ GIM_Try, /*On fail goto*//*Label 878*/ GIMT_Encode4(34148), // Rule ID 421 //
12607 /* 34121 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12608 /* 34124 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12609 /* 34127 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12610 /* 34131 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12611 /* 34135 */ // (sint_to_fp:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec) => (sint_to_fp_F16x8:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec)
12612 /* 34135 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::sint_to_fp_F16x8),
12613 /* 34140 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12614 /* 34146 */ GIR_RootConstrainSelectedInstOperands,
12615 /* 34147 */ // GIR_Coverage, 421,
12616 /* 34147 */ GIR_Done,
12617 /* 34148 */ // Label 878: @34148
12618 /* 34148 */ GIM_Reject,
12619 /* 34149 */ // Label 872: @34149
12620 /* 34149 */ GIM_Reject,
12621 /* 34150 */ // Label 49: @34150
12622 /* 34150 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 883*/ GIMT_Encode4(34365),
12623 /* 34161 */ /*GILLT_s32*//*Label 879*/ GIMT_Encode4(34181),
12624 /* 34165 */ /*GILLT_s64*//*Label 880*/ GIMT_Encode4(34240), GIMT_Encode4(0),
12625 /* 34173 */ /*GILLT_v4s32*//*Label 881*/ GIMT_Encode4(34299),
12626 /* 34177 */ /*GILLT_v8s16*//*Label 882*/ GIMT_Encode4(34332),
12627 /* 34181 */ // Label 879: @34181
12628 /* 34181 */ GIM_Try, /*On fail goto*//*Label 884*/ GIMT_Encode4(34210), // Rule ID 51 //
12629 /* 34186 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12630 /* 34189 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12631 /* 34193 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12632 /* 34197 */ // (uint_to_fp:{ *:[f32] } I32:{ *:[i32] }:$src) => (F32_CONVERT_U_I32:{ *:[f32] } I32:{ *:[i32] }:$src)
12633 /* 34197 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_U_I32),
12634 /* 34202 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12635 /* 34208 */ GIR_RootConstrainSelectedInstOperands,
12636 /* 34209 */ // GIR_Coverage, 51,
12637 /* 34209 */ GIR_Done,
12638 /* 34210 */ // Label 884: @34210
12639 /* 34210 */ GIM_Try, /*On fail goto*//*Label 885*/ GIMT_Encode4(34239), // Rule ID 55 //
12640 /* 34215 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12641 /* 34218 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12642 /* 34222 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12643 /* 34226 */ // (uint_to_fp:{ *:[f32] } I64:{ *:[i64] }:$src) => (F32_CONVERT_U_I64:{ *:[f32] } I64:{ *:[i64] }:$src)
12644 /* 34226 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_U_I64),
12645 /* 34231 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12646 /* 34237 */ GIR_RootConstrainSelectedInstOperands,
12647 /* 34238 */ // GIR_Coverage, 55,
12648 /* 34238 */ GIR_Done,
12649 /* 34239 */ // Label 885: @34239
12650 /* 34239 */ GIM_Reject,
12651 /* 34240 */ // Label 880: @34240
12652 /* 34240 */ GIM_Try, /*On fail goto*//*Label 886*/ GIMT_Encode4(34269), // Rule ID 53 //
12653 /* 34245 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12654 /* 34248 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12655 /* 34252 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12656 /* 34256 */ // (uint_to_fp:{ *:[f64] } I32:{ *:[i32] }:$src) => (F64_CONVERT_U_I32:{ *:[f64] } I32:{ *:[i32] }:$src)
12657 /* 34256 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_U_I32),
12658 /* 34261 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12659 /* 34267 */ GIR_RootConstrainSelectedInstOperands,
12660 /* 34268 */ // GIR_Coverage, 53,
12661 /* 34268 */ GIR_Done,
12662 /* 34269 */ // Label 886: @34269
12663 /* 34269 */ GIM_Try, /*On fail goto*//*Label 887*/ GIMT_Encode4(34298), // Rule ID 57 //
12664 /* 34274 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12665 /* 34277 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12666 /* 34281 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12667 /* 34285 */ // (uint_to_fp:{ *:[f64] } I64:{ *:[i64] }:$src) => (F64_CONVERT_U_I64:{ *:[f64] } I64:{ *:[i64] }:$src)
12668 /* 34285 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_U_I64),
12669 /* 34290 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12670 /* 34296 */ GIR_RootConstrainSelectedInstOperands,
12671 /* 34297 */ // GIR_Coverage, 57,
12672 /* 34297 */ GIR_Done,
12673 /* 34298 */ // Label 887: @34298
12674 /* 34298 */ GIM_Reject,
12675 /* 34299 */ // Label 881: @34299
12676 /* 34299 */ GIM_Try, /*On fail goto*//*Label 888*/ GIMT_Encode4(34331), // Rule ID 418 //
12677 /* 34304 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12678 /* 34307 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
12679 /* 34310 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12680 /* 34314 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12681 /* 34318 */ // (uint_to_fp:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec) => (uint_to_fp_F32x4:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec)
12682 /* 34318 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::uint_to_fp_F32x4),
12683 /* 34323 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12684 /* 34329 */ GIR_RootConstrainSelectedInstOperands,
12685 /* 34330 */ // GIR_Coverage, 418,
12686 /* 34330 */ GIR_Done,
12687 /* 34331 */ // Label 888: @34331
12688 /* 34331 */ GIM_Reject,
12689 /* 34332 */ // Label 882: @34332
12690 /* 34332 */ GIM_Try, /*On fail goto*//*Label 889*/ GIMT_Encode4(34364), // Rule ID 422 //
12691 /* 34337 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12692 /* 34340 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12693 /* 34343 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12694 /* 34347 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12695 /* 34351 */ // (uint_to_fp:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec) => (uint_to_fp_F16x8:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec)
12696 /* 34351 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::uint_to_fp_F16x8),
12697 /* 34356 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12698 /* 34362 */ GIR_RootConstrainSelectedInstOperands,
12699 /* 34363 */ // GIR_Coverage, 422,
12700 /* 34363 */ GIR_Done,
12701 /* 34364 */ // Label 889: @34364
12702 /* 34364 */ GIM_Reject,
12703 /* 34365 */ // Label 883: @34365
12704 /* 34365 */ GIM_Reject,
12705 /* 34366 */ // Label 50: @34366
12706 /* 34366 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 895*/ GIMT_Encode4(34556),
12707 /* 34377 */ /*GILLT_s32*//*Label 890*/ GIMT_Encode4(34397),
12708 /* 34381 */ /*GILLT_s64*//*Label 891*/ GIMT_Encode4(34427),
12709 /* 34385 */ /*GILLT_v2s64*//*Label 892*/ GIMT_Encode4(34457),
12710 /* 34389 */ /*GILLT_v4s32*//*Label 893*/ GIMT_Encode4(34490),
12711 /* 34393 */ /*GILLT_v8s16*//*Label 894*/ GIMT_Encode4(34523),
12712 /* 34397 */ // Label 890: @34397
12713 /* 34397 */ GIM_Try, /*On fail goto*//*Label 896*/ GIMT_Encode4(34426), // Rule ID 134 //
12714 /* 34402 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12715 /* 34405 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12716 /* 34409 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12717 /* 34413 */ // (fabs:{ *:[f32] } F32:{ *:[f32] }:$src) => (ABS_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
12718 /* 34413 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F32),
12719 /* 34418 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12720 /* 34424 */ GIR_RootConstrainSelectedInstOperands,
12721 /* 34425 */ // GIR_Coverage, 134,
12722 /* 34425 */ GIR_Done,
12723 /* 34426 */ // Label 896: @34426
12724 /* 34426 */ GIM_Reject,
12725 /* 34427 */ // Label 891: @34427
12726 /* 34427 */ GIM_Try, /*On fail goto*//*Label 897*/ GIMT_Encode4(34456), // Rule ID 135 //
12727 /* 34432 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12728 /* 34435 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12729 /* 34439 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12730 /* 34443 */ // (fabs:{ *:[f64] } F64:{ *:[f64] }:$src) => (ABS_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
12731 /* 34443 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F64),
12732 /* 34448 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12733 /* 34454 */ GIR_RootConstrainSelectedInstOperands,
12734 /* 34455 */ // GIR_Coverage, 135,
12735 /* 34455 */ GIR_Done,
12736 /* 34456 */ // Label 897: @34456
12737 /* 34456 */ GIM_Reject,
12738 /* 34457 */ // Label 892: @34457
12739 /* 34457 */ GIM_Try, /*On fail goto*//*Label 898*/ GIMT_Encode4(34489), // Rule ID 325 //
12740 /* 34462 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12741 /* 34465 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
12742 /* 34468 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12743 /* 34472 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12744 /* 34476 */ // (fabs:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (ABS_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
12745 /* 34476 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F64x2),
12746 /* 34481 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12747 /* 34487 */ GIR_RootConstrainSelectedInstOperands,
12748 /* 34488 */ // GIR_Coverage, 325,
12749 /* 34488 */ GIR_Done,
12750 /* 34489 */ // Label 898: @34489
12751 /* 34489 */ GIM_Reject,
12752 /* 34490 */ // Label 893: @34490
12753 /* 34490 */ GIM_Try, /*On fail goto*//*Label 899*/ GIMT_Encode4(34522), // Rule ID 324 //
12754 /* 34495 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12755 /* 34498 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
12756 /* 34501 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12757 /* 34505 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12758 /* 34509 */ // (fabs:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (ABS_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
12759 /* 34509 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F32x4),
12760 /* 34514 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12761 /* 34520 */ GIR_RootConstrainSelectedInstOperands,
12762 /* 34521 */ // GIR_Coverage, 324,
12763 /* 34521 */ GIR_Done,
12764 /* 34522 */ // Label 899: @34522
12765 /* 34522 */ GIM_Reject,
12766 /* 34523 */ // Label 894: @34523
12767 /* 34523 */ GIM_Try, /*On fail goto*//*Label 900*/ GIMT_Encode4(34555), // Rule ID 326 //
12768 /* 34528 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12769 /* 34531 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12770 /* 34534 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12771 /* 34538 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12772 /* 34542 */ // (fabs:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (ABS_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
12773 /* 34542 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F16x8),
12774 /* 34547 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12775 /* 34553 */ GIR_RootConstrainSelectedInstOperands,
12776 /* 34554 */ // GIR_Coverage, 326,
12777 /* 34554 */ GIR_Done,
12778 /* 34555 */ // Label 900: @34555
12779 /* 34555 */ GIM_Reject,
12780 /* 34556 */ // Label 895: @34556
12781 /* 34556 */ GIM_Reject,
12782 /* 34557 */ // Label 51: @34557
12783 /* 34557 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 903*/ GIMT_Encode4(34774),
12784 /* 34568 */ /*GILLT_s32*//*Label 901*/ GIMT_Encode4(34576),
12785 /* 34572 */ /*GILLT_s64*//*Label 902*/ GIMT_Encode4(34675),
12786 /* 34576 */ // Label 901: @34576
12787 /* 34576 */ GIM_Try, /*On fail goto*//*Label 904*/ GIMT_Encode4(34674),
12788 /* 34581 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12789 /* 34584 */ GIM_Try, /*On fail goto*//*Label 905*/ GIMT_Encode4(34617), // Rule ID 138 //
12790 /* 34589 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
12791 /* 34592 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12792 /* 34596 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12793 /* 34600 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12794 /* 34604 */ // (fcopysign:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (COPYSIGN_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12795 /* 34604 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F32),
12796 /* 34609 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12797 /* 34615 */ GIR_RootConstrainSelectedInstOperands,
12798 /* 34616 */ // GIR_Coverage, 138,
12799 /* 34616 */ GIR_Done,
12800 /* 34617 */ // Label 905: @34617
12801 /* 34617 */ GIM_Try, /*On fail goto*//*Label 906*/ GIMT_Encode4(34673), // Rule ID 672 //
12802 /* 34622 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
12803 /* 34625 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12804 /* 34629 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12805 /* 34633 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12806 /* 34637 */ // (fcopysign:{ *:[f32] } F32:{ *:[f32] }:$lhs, F64:{ *:[f64] }:$rhs) => (COPYSIGN_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, (F32_DEMOTE_F64:{ *:[f32] } F64:{ *:[f64] }:$rhs))
12807 /* 34637 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
12808 /* 34640 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::F32_DEMOTE_F64),
12809 /* 34644 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
12810 /* 34649 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // rhs
12811 /* 34653 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12812 /* 34656 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
12813 /* 34658 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F32),
12814 /* 34661 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12815 /* 34663 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
12816 /* 34665 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
12817 /* 34668 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12818 /* 34671 */ GIR_RootConstrainSelectedInstOperands,
12819 /* 34672 */ // GIR_Coverage, 672,
12820 /* 34672 */ GIR_EraseRootFromParent_Done,
12821 /* 34673 */ // Label 906: @34673
12822 /* 34673 */ GIM_Reject,
12823 /* 34674 */ // Label 904: @34674
12824 /* 34674 */ GIM_Reject,
12825 /* 34675 */ // Label 902: @34675
12826 /* 34675 */ GIM_Try, /*On fail goto*//*Label 907*/ GIMT_Encode4(34773),
12827 /* 34680 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12828 /* 34683 */ GIM_Try, /*On fail goto*//*Label 908*/ GIMT_Encode4(34716), // Rule ID 139 //
12829 /* 34688 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
12830 /* 34691 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12831 /* 34695 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12832 /* 34699 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12833 /* 34703 */ // (fcopysign:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (COPYSIGN_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12834 /* 34703 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F64),
12835 /* 34708 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12836 /* 34714 */ GIR_RootConstrainSelectedInstOperands,
12837 /* 34715 */ // GIR_Coverage, 139,
12838 /* 34715 */ GIR_Done,
12839 /* 34716 */ // Label 908: @34716
12840 /* 34716 */ GIM_Try, /*On fail goto*//*Label 909*/ GIMT_Encode4(34772), // Rule ID 671 //
12841 /* 34721 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
12842 /* 34724 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12843 /* 34728 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12844 /* 34732 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12845 /* 34736 */ // (fcopysign:{ *:[f64] } F64:{ *:[f64] }:$lhs, F32:{ *:[f32] }:$rhs) => (COPYSIGN_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, (F64_PROMOTE_F32:{ *:[f64] } F32:{ *:[f32] }:$rhs))
12846 /* 34736 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
12847 /* 34739 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::F64_PROMOTE_F32),
12848 /* 34743 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
12849 /* 34748 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // rhs
12850 /* 34752 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12851 /* 34755 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
12852 /* 34757 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F64),
12853 /* 34760 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12854 /* 34762 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
12855 /* 34764 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
12856 /* 34767 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12857 /* 34770 */ GIR_RootConstrainSelectedInstOperands,
12858 /* 34771 */ // GIR_Coverage, 671,
12859 /* 34771 */ GIR_EraseRootFromParent_Done,
12860 /* 34772 */ // Label 909: @34772
12861 /* 34772 */ GIM_Reject,
12862 /* 34773 */ // Label 907: @34773
12863 /* 34773 */ GIM_Reject,
12864 /* 34774 */ // Label 903: @34774
12865 /* 34774 */ GIM_Reject,
12866 /* 34775 */ // Label 52: @34775
12867 /* 34775 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 915*/ GIMT_Encode4(35000),
12868 /* 34786 */ /*GILLT_s32*//*Label 910*/ GIMT_Encode4(34806),
12869 /* 34790 */ /*GILLT_s64*//*Label 911*/ GIMT_Encode4(34843),
12870 /* 34794 */ /*GILLT_v2s64*//*Label 912*/ GIMT_Encode4(34880),
12871 /* 34798 */ /*GILLT_v4s32*//*Label 913*/ GIMT_Encode4(34920),
12872 /* 34802 */ /*GILLT_v8s16*//*Label 914*/ GIMT_Encode4(34960),
12873 /* 34806 */ // Label 910: @34806
12874 /* 34806 */ GIM_Try, /*On fail goto*//*Label 916*/ GIMT_Encode4(34842), // Rule ID 140 //
12875 /* 34811 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12876 /* 34814 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
12877 /* 34817 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12878 /* 34821 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12879 /* 34825 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12880 /* 34829 */ // (fminimum:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (MIN_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12881 /* 34829 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F32),
12882 /* 34834 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12883 /* 34840 */ GIR_RootConstrainSelectedInstOperands,
12884 /* 34841 */ // GIR_Coverage, 140,
12885 /* 34841 */ GIR_Done,
12886 /* 34842 */ // Label 916: @34842
12887 /* 34842 */ GIM_Reject,
12888 /* 34843 */ // Label 911: @34843
12889 /* 34843 */ GIM_Try, /*On fail goto*//*Label 917*/ GIMT_Encode4(34879), // Rule ID 141 //
12890 /* 34848 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12891 /* 34851 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
12892 /* 34854 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12893 /* 34858 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12894 /* 34862 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12895 /* 34866 */ // (fminimum:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (MIN_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12896 /* 34866 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F64),
12897 /* 34871 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12898 /* 34877 */ GIR_RootConstrainSelectedInstOperands,
12899 /* 34878 */ // GIR_Coverage, 141,
12900 /* 34878 */ GIR_Done,
12901 /* 34879 */ // Label 917: @34879
12902 /* 34879 */ GIM_Reject,
12903 /* 34880 */ // Label 912: @34880
12904 /* 34880 */ GIM_Try, /*On fail goto*//*Label 918*/ GIMT_Encode4(34919), // Rule ID 358 //
12905 /* 34885 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12906 /* 34888 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
12907 /* 34891 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12908 /* 34894 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12909 /* 34898 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12910 /* 34902 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12911 /* 34906 */ // (fminimum:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (MIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12912 /* 34906 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F64x2),
12913 /* 34911 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12914 /* 34917 */ GIR_RootConstrainSelectedInstOperands,
12915 /* 34918 */ // GIR_Coverage, 358,
12916 /* 34918 */ GIR_Done,
12917 /* 34919 */ // Label 918: @34919
12918 /* 34919 */ GIM_Reject,
12919 /* 34920 */ // Label 913: @34920
12920 /* 34920 */ GIM_Try, /*On fail goto*//*Label 919*/ GIMT_Encode4(34959), // Rule ID 357 //
12921 /* 34925 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12922 /* 34928 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
12923 /* 34931 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
12924 /* 34934 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12925 /* 34938 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12926 /* 34942 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12927 /* 34946 */ // (fminimum:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (MIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12928 /* 34946 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F32x4),
12929 /* 34951 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12930 /* 34957 */ GIR_RootConstrainSelectedInstOperands,
12931 /* 34958 */ // GIR_Coverage, 357,
12932 /* 34958 */ GIR_Done,
12933 /* 34959 */ // Label 919: @34959
12934 /* 34959 */ GIM_Reject,
12935 /* 34960 */ // Label 914: @34960
12936 /* 34960 */ GIM_Try, /*On fail goto*//*Label 920*/ GIMT_Encode4(34999), // Rule ID 359 //
12937 /* 34965 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12938 /* 34968 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12939 /* 34971 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12940 /* 34974 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12941 /* 34978 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12942 /* 34982 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12943 /* 34986 */ // (fminimum:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (MIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12944 /* 34986 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F16x8),
12945 /* 34991 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12946 /* 34997 */ GIR_RootConstrainSelectedInstOperands,
12947 /* 34998 */ // GIR_Coverage, 359,
12948 /* 34998 */ GIR_Done,
12949 /* 34999 */ // Label 920: @34999
12950 /* 34999 */ GIM_Reject,
12951 /* 35000 */ // Label 915: @35000
12952 /* 35000 */ GIM_Reject,
12953 /* 35001 */ // Label 53: @35001
12954 /* 35001 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 926*/ GIMT_Encode4(35226),
12955 /* 35012 */ /*GILLT_s32*//*Label 921*/ GIMT_Encode4(35032),
12956 /* 35016 */ /*GILLT_s64*//*Label 922*/ GIMT_Encode4(35069),
12957 /* 35020 */ /*GILLT_v2s64*//*Label 923*/ GIMT_Encode4(35106),
12958 /* 35024 */ /*GILLT_v4s32*//*Label 924*/ GIMT_Encode4(35146),
12959 /* 35028 */ /*GILLT_v8s16*//*Label 925*/ GIMT_Encode4(35186),
12960 /* 35032 */ // Label 921: @35032
12961 /* 35032 */ GIM_Try, /*On fail goto*//*Label 927*/ GIMT_Encode4(35068), // Rule ID 142 //
12962 /* 35037 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12963 /* 35040 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
12964 /* 35043 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12965 /* 35047 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12966 /* 35051 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12967 /* 35055 */ // (fmaximum:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (MAX_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12968 /* 35055 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F32),
12969 /* 35060 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12970 /* 35066 */ GIR_RootConstrainSelectedInstOperands,
12971 /* 35067 */ // GIR_Coverage, 142,
12972 /* 35067 */ GIR_Done,
12973 /* 35068 */ // Label 927: @35068
12974 /* 35068 */ GIM_Reject,
12975 /* 35069 */ // Label 922: @35069
12976 /* 35069 */ GIM_Try, /*On fail goto*//*Label 928*/ GIMT_Encode4(35105), // Rule ID 143 //
12977 /* 35074 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12978 /* 35077 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
12979 /* 35080 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12980 /* 35084 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12981 /* 35088 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12982 /* 35092 */ // (fmaximum:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (MAX_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12983 /* 35092 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F64),
12984 /* 35097 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12985 /* 35103 */ GIR_RootConstrainSelectedInstOperands,
12986 /* 35104 */ // GIR_Coverage, 143,
12987 /* 35104 */ GIR_Done,
12988 /* 35105 */ // Label 928: @35105
12989 /* 35105 */ GIM_Reject,
12990 /* 35106 */ // Label 923: @35106
12991 /* 35106 */ GIM_Try, /*On fail goto*//*Label 929*/ GIMT_Encode4(35145), // Rule ID 361 //
12992 /* 35111 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12993 /* 35114 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
12994 /* 35117 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12995 /* 35120 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12996 /* 35124 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12997 /* 35128 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12998 /* 35132 */ // (fmaximum:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (MAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12999 /* 35132 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F64x2),
13000 /* 35137 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13001 /* 35143 */ GIR_RootConstrainSelectedInstOperands,
13002 /* 35144 */ // GIR_Coverage, 361,
13003 /* 35144 */ GIR_Done,
13004 /* 35145 */ // Label 929: @35145
13005 /* 35145 */ GIM_Reject,
13006 /* 35146 */ // Label 924: @35146
13007 /* 35146 */ GIM_Try, /*On fail goto*//*Label 930*/ GIMT_Encode4(35185), // Rule ID 360 //
13008 /* 35151 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13009 /* 35154 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13010 /* 35157 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13011 /* 35160 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13012 /* 35164 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13013 /* 35168 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13014 /* 35172 */ // (fmaximum:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (MAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
13015 /* 35172 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F32x4),
13016 /* 35177 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13017 /* 35183 */ GIR_RootConstrainSelectedInstOperands,
13018 /* 35184 */ // GIR_Coverage, 360,
13019 /* 35184 */ GIR_Done,
13020 /* 35185 */ // Label 930: @35185
13021 /* 35185 */ GIM_Reject,
13022 /* 35186 */ // Label 925: @35186
13023 /* 35186 */ GIM_Try, /*On fail goto*//*Label 931*/ GIMT_Encode4(35225), // Rule ID 362 //
13024 /* 35191 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
13025 /* 35194 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13026 /* 35197 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
13027 /* 35200 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13028 /* 35204 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13029 /* 35208 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13030 /* 35212 */ // (fmaximum:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (MAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
13031 /* 35212 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F16x8),
13032 /* 35217 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13033 /* 35223 */ GIR_RootConstrainSelectedInstOperands,
13034 /* 35224 */ // GIR_Coverage, 362,
13035 /* 35224 */ GIR_Done,
13036 /* 35225 */ // Label 931: @35225
13037 /* 35225 */ GIM_Reject,
13038 /* 35226 */ // Label 926: @35226
13039 /* 35226 */ GIM_Reject,
13040 /* 35227 */ // Label 54: @35227
13041 /* 35227 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(3), GIMT_Encode2(6), /*)*//*default:*//*Label 935*/ GIMT_Encode4(35370),
13042 /* 35238 */ /*GILLT_v4s32*//*Label 932*/ GIMT_Encode4(35250),
13043 /* 35242 */ /*GILLT_v8s16*//*Label 933*/ GIMT_Encode4(35290),
13044 /* 35246 */ /*GILLT_v16s8*//*Label 934*/ GIMT_Encode4(35330),
13045 /* 35250 */ // Label 932: @35250
13046 /* 35250 */ GIM_Try, /*On fail goto*//*Label 936*/ GIMT_Encode4(35289), // Rule ID 299 //
13047 /* 35255 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13048 /* 35258 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13049 /* 35261 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13050 /* 35264 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13051 /* 35268 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13052 /* 35272 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13053 /* 35276 */ // (smin:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MIN_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
13054 /* 35276 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_S_I32x4),
13055 /* 35281 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13056 /* 35287 */ GIR_RootConstrainSelectedInstOperands,
13057 /* 35288 */ // GIR_Coverage, 299,
13058 /* 35288 */ GIR_Done,
13059 /* 35289 */ // Label 936: @35289
13060 /* 35289 */ GIM_Reject,
13061 /* 35290 */ // Label 933: @35290
13062 /* 35290 */ GIM_Try, /*On fail goto*//*Label 937*/ GIMT_Encode4(35329), // Rule ID 298 //
13063 /* 35295 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13064 /* 35298 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13065 /* 35301 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
13066 /* 35304 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13067 /* 35308 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13068 /* 35312 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13069 /* 35316 */ // (smin:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MIN_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
13070 /* 35316 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_S_I16x8),
13071 /* 35321 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13072 /* 35327 */ GIR_RootConstrainSelectedInstOperands,
13073 /* 35328 */ // GIR_Coverage, 298,
13074 /* 35328 */ GIR_Done,
13075 /* 35329 */ // Label 937: @35329
13076 /* 35329 */ GIM_Reject,
13077 /* 35330 */ // Label 934: @35330
13078 /* 35330 */ GIM_Try, /*On fail goto*//*Label 938*/ GIMT_Encode4(35369), // Rule ID 297 //
13079 /* 35335 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13080 /* 35338 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
13081 /* 35341 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
13082 /* 35344 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13083 /* 35348 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13084 /* 35352 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13085 /* 35356 */ // (smin:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MIN_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
13086 /* 35356 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_S_I8x16),
13087 /* 35361 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13088 /* 35367 */ GIR_RootConstrainSelectedInstOperands,
13089 /* 35368 */ // GIR_Coverage, 297,
13090 /* 35368 */ GIR_Done,
13091 /* 35369 */ // Label 938: @35369
13092 /* 35369 */ GIM_Reject,
13093 /* 35370 */ // Label 935: @35370
13094 /* 35370 */ GIM_Reject,
13095 /* 35371 */ // Label 55: @35371
13096 /* 35371 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(3), GIMT_Encode2(6), /*)*//*default:*//*Label 942*/ GIMT_Encode4(35514),
13097 /* 35382 */ /*GILLT_v4s32*//*Label 939*/ GIMT_Encode4(35394),
13098 /* 35386 */ /*GILLT_v8s16*//*Label 940*/ GIMT_Encode4(35434),
13099 /* 35390 */ /*GILLT_v16s8*//*Label 941*/ GIMT_Encode4(35474),
13100 /* 35394 */ // Label 939: @35394
13101 /* 35394 */ GIM_Try, /*On fail goto*//*Label 943*/ GIMT_Encode4(35433), // Rule ID 305 //
13102 /* 35399 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13103 /* 35402 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13104 /* 35405 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13105 /* 35408 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13106 /* 35412 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13107 /* 35416 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13108 /* 35420 */ // (smax:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MAX_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
13109 /* 35420 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_S_I32x4),
13110 /* 35425 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13111 /* 35431 */ GIR_RootConstrainSelectedInstOperands,
13112 /* 35432 */ // GIR_Coverage, 305,
13113 /* 35432 */ GIR_Done,
13114 /* 35433 */ // Label 943: @35433
13115 /* 35433 */ GIM_Reject,
13116 /* 35434 */ // Label 940: @35434
13117 /* 35434 */ GIM_Try, /*On fail goto*//*Label 944*/ GIMT_Encode4(35473), // Rule ID 304 //
13118 /* 35439 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13119 /* 35442 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13120 /* 35445 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
13121 /* 35448 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13122 /* 35452 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13123 /* 35456 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13124 /* 35460 */ // (smax:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MAX_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
13125 /* 35460 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_S_I16x8),
13126 /* 35465 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13127 /* 35471 */ GIR_RootConstrainSelectedInstOperands,
13128 /* 35472 */ // GIR_Coverage, 304,
13129 /* 35472 */ GIR_Done,
13130 /* 35473 */ // Label 944: @35473
13131 /* 35473 */ GIM_Reject,
13132 /* 35474 */ // Label 941: @35474
13133 /* 35474 */ GIM_Try, /*On fail goto*//*Label 945*/ GIMT_Encode4(35513), // Rule ID 303 //
13134 /* 35479 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13135 /* 35482 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
13136 /* 35485 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
13137 /* 35488 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13138 /* 35492 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13139 /* 35496 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13140 /* 35500 */ // (smax:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MAX_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
13141 /* 35500 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_S_I8x16),
13142 /* 35505 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13143 /* 35511 */ GIR_RootConstrainSelectedInstOperands,
13144 /* 35512 */ // GIR_Coverage, 303,
13145 /* 35512 */ GIR_Done,
13146 /* 35513 */ // Label 945: @35513
13147 /* 35513 */ GIM_Reject,
13148 /* 35514 */ // Label 942: @35514
13149 /* 35514 */ GIM_Reject,
13150 /* 35515 */ // Label 56: @35515
13151 /* 35515 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(3), GIMT_Encode2(6), /*)*//*default:*//*Label 949*/ GIMT_Encode4(35658),
13152 /* 35526 */ /*GILLT_v4s32*//*Label 946*/ GIMT_Encode4(35538),
13153 /* 35530 */ /*GILLT_v8s16*//*Label 947*/ GIMT_Encode4(35578),
13154 /* 35534 */ /*GILLT_v16s8*//*Label 948*/ GIMT_Encode4(35618),
13155 /* 35538 */ // Label 946: @35538
13156 /* 35538 */ GIM_Try, /*On fail goto*//*Label 950*/ GIMT_Encode4(35577), // Rule ID 302 //
13157 /* 35543 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13158 /* 35546 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13159 /* 35549 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13160 /* 35552 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13161 /* 35556 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13162 /* 35560 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13163 /* 35564 */ // (umin:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MIN_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
13164 /* 35564 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_U_I32x4),
13165 /* 35569 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13166 /* 35575 */ GIR_RootConstrainSelectedInstOperands,
13167 /* 35576 */ // GIR_Coverage, 302,
13168 /* 35576 */ GIR_Done,
13169 /* 35577 */ // Label 950: @35577
13170 /* 35577 */ GIM_Reject,
13171 /* 35578 */ // Label 947: @35578
13172 /* 35578 */ GIM_Try, /*On fail goto*//*Label 951*/ GIMT_Encode4(35617), // Rule ID 301 //
13173 /* 35583 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13174 /* 35586 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13175 /* 35589 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
13176 /* 35592 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13177 /* 35596 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13178 /* 35600 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13179 /* 35604 */ // (umin:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MIN_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
13180 /* 35604 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_U_I16x8),
13181 /* 35609 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13182 /* 35615 */ GIR_RootConstrainSelectedInstOperands,
13183 /* 35616 */ // GIR_Coverage, 301,
13184 /* 35616 */ GIR_Done,
13185 /* 35617 */ // Label 951: @35617
13186 /* 35617 */ GIM_Reject,
13187 /* 35618 */ // Label 948: @35618
13188 /* 35618 */ GIM_Try, /*On fail goto*//*Label 952*/ GIMT_Encode4(35657), // Rule ID 300 //
13189 /* 35623 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13190 /* 35626 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
13191 /* 35629 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
13192 /* 35632 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13193 /* 35636 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13194 /* 35640 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13195 /* 35644 */ // (umin:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MIN_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
13196 /* 35644 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_U_I8x16),
13197 /* 35649 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13198 /* 35655 */ GIR_RootConstrainSelectedInstOperands,
13199 /* 35656 */ // GIR_Coverage, 300,
13200 /* 35656 */ GIR_Done,
13201 /* 35657 */ // Label 952: @35657
13202 /* 35657 */ GIM_Reject,
13203 /* 35658 */ // Label 949: @35658
13204 /* 35658 */ GIM_Reject,
13205 /* 35659 */ // Label 57: @35659
13206 /* 35659 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(3), GIMT_Encode2(6), /*)*//*default:*//*Label 956*/ GIMT_Encode4(35802),
13207 /* 35670 */ /*GILLT_v4s32*//*Label 953*/ GIMT_Encode4(35682),
13208 /* 35674 */ /*GILLT_v8s16*//*Label 954*/ GIMT_Encode4(35722),
13209 /* 35678 */ /*GILLT_v16s8*//*Label 955*/ GIMT_Encode4(35762),
13210 /* 35682 */ // Label 953: @35682
13211 /* 35682 */ GIM_Try, /*On fail goto*//*Label 957*/ GIMT_Encode4(35721), // Rule ID 308 //
13212 /* 35687 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13213 /* 35690 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13214 /* 35693 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13215 /* 35696 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13216 /* 35700 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13217 /* 35704 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13218 /* 35708 */ // (umax:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MAX_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
13219 /* 35708 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_U_I32x4),
13220 /* 35713 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13221 /* 35719 */ GIR_RootConstrainSelectedInstOperands,
13222 /* 35720 */ // GIR_Coverage, 308,
13223 /* 35720 */ GIR_Done,
13224 /* 35721 */ // Label 957: @35721
13225 /* 35721 */ GIM_Reject,
13226 /* 35722 */ // Label 954: @35722
13227 /* 35722 */ GIM_Try, /*On fail goto*//*Label 958*/ GIMT_Encode4(35761), // Rule ID 307 //
13228 /* 35727 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13229 /* 35730 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13230 /* 35733 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
13231 /* 35736 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13232 /* 35740 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13233 /* 35744 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13234 /* 35748 */ // (umax:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MAX_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
13235 /* 35748 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_U_I16x8),
13236 /* 35753 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13237 /* 35759 */ GIR_RootConstrainSelectedInstOperands,
13238 /* 35760 */ // GIR_Coverage, 307,
13239 /* 35760 */ GIR_Done,
13240 /* 35761 */ // Label 958: @35761
13241 /* 35761 */ GIM_Reject,
13242 /* 35762 */ // Label 955: @35762
13243 /* 35762 */ GIM_Try, /*On fail goto*//*Label 959*/ GIMT_Encode4(35801), // Rule ID 306 //
13244 /* 35767 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13245 /* 35770 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
13246 /* 35773 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
13247 /* 35776 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13248 /* 35780 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13249 /* 35784 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13250 /* 35788 */ // (umax:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MAX_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
13251 /* 35788 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_U_I8x16),
13252 /* 35793 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13253 /* 35799 */ GIR_RootConstrainSelectedInstOperands,
13254 /* 35800 */ // GIR_Coverage, 306,
13255 /* 35800 */ GIR_Done,
13256 /* 35801 */ // Label 959: @35801
13257 /* 35801 */ GIM_Reject,
13258 /* 35802 */ // Label 956: @35802
13259 /* 35802 */ GIM_Reject,
13260 /* 35803 */ // Label 58: @35803
13261 /* 35803 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(6), /*)*//*default:*//*Label 964*/ GIMT_Encode4(35962),
13262 /* 35814 */ /*GILLT_v2s64*//*Label 960*/ GIMT_Encode4(35830),
13263 /* 35818 */ /*GILLT_v4s32*//*Label 961*/ GIMT_Encode4(35863),
13264 /* 35822 */ /*GILLT_v8s16*//*Label 962*/ GIMT_Encode4(35896),
13265 /* 35826 */ /*GILLT_v16s8*//*Label 963*/ GIMT_Encode4(35929),
13266 /* 35830 */ // Label 960: @35830
13267 /* 35830 */ GIM_Try, /*On fail goto*//*Label 965*/ GIMT_Encode4(35862), // Rule ID 252 //
13268 /* 35835 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13269 /* 35838 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
13270 /* 35841 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13271 /* 35845 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13272 /* 35849 */ // (abs:{ *:[v2i64] } V128:{ *:[v2i64] }:$v) => (ABS_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$v)
13273 /* 35849 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I64x2),
13274 /* 35854 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13275 /* 35860 */ GIR_RootConstrainSelectedInstOperands,
13276 /* 35861 */ // GIR_Coverage, 252,
13277 /* 35861 */ GIR_Done,
13278 /* 35862 */ // Label 965: @35862
13279 /* 35862 */ GIM_Reject,
13280 /* 35863 */ // Label 961: @35863
13281 /* 35863 */ GIM_Try, /*On fail goto*//*Label 966*/ GIMT_Encode4(35895), // Rule ID 251 //
13282 /* 35868 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13283 /* 35871 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13284 /* 35874 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13285 /* 35878 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13286 /* 35882 */ // (abs:{ *:[v4i32] } V128:{ *:[v4i32] }:$v) => (ABS_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$v)
13287 /* 35882 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I32x4),
13288 /* 35887 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13289 /* 35893 */ GIR_RootConstrainSelectedInstOperands,
13290 /* 35894 */ // GIR_Coverage, 251,
13291 /* 35894 */ GIR_Done,
13292 /* 35895 */ // Label 966: @35895
13293 /* 35895 */ GIM_Reject,
13294 /* 35896 */ // Label 962: @35896
13295 /* 35896 */ GIM_Try, /*On fail goto*//*Label 967*/ GIMT_Encode4(35928), // Rule ID 250 //
13296 /* 35901 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13297 /* 35904 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13298 /* 35907 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13299 /* 35911 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13300 /* 35915 */ // (abs:{ *:[v8i16] } V128:{ *:[v8i16] }:$v) => (ABS_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$v)
13301 /* 35915 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I16x8),
13302 /* 35920 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13303 /* 35926 */ GIR_RootConstrainSelectedInstOperands,
13304 /* 35927 */ // GIR_Coverage, 250,
13305 /* 35927 */ GIR_Done,
13306 /* 35928 */ // Label 967: @35928
13307 /* 35928 */ GIM_Reject,
13308 /* 35929 */ // Label 963: @35929
13309 /* 35929 */ GIM_Try, /*On fail goto*//*Label 968*/ GIMT_Encode4(35961), // Rule ID 249 //
13310 /* 35934 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13311 /* 35937 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
13312 /* 35940 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13313 /* 35944 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13314 /* 35948 */ // (abs:{ *:[v16i8] } V128:{ *:[v16i8] }:$v) => (ABS_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$v)
13315 /* 35948 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I8x16),
13316 /* 35953 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13317 /* 35959 */ GIR_RootConstrainSelectedInstOperands,
13318 /* 35960 */ // GIR_Coverage, 249,
13319 /* 35960 */ GIR_Done,
13320 /* 35961 */ // Label 968: @35961
13321 /* 35961 */ GIM_Reject,
13322 /* 35962 */ // Label 964: @35962
13323 /* 35962 */ GIM_Reject,
13324 /* 35963 */ // Label 59: @35963
13325 /* 35963 */ GIM_Try, /*On fail goto*//*Label 969*/ GIMT_Encode4(35984), // Rule ID 18 //
13326 /* 35968 */ // MIs[0] dst
13327 /* 35968 */ GIM_CheckIsMBB, /*MI*/0, /*Op*/0,
13328 /* 35971 */ // (br (bb:{ *:[Other] }):$dst) => (BR (bb:{ *:[Other] }):$dst)
13329 /* 35971 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::BR),
13330 /* 35976 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13331 /* 35982 */ GIR_RootConstrainSelectedInstOperands,
13332 /* 35983 */ // GIR_Coverage, 18,
13333 /* 35983 */ GIR_Done,
13334 /* 35984 */ // Label 969: @35984
13335 /* 35984 */ GIM_Reject,
13336 /* 35985 */ // Label 60: @35985
13337 /* 35985 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(6), /*)*//*default:*//*Label 974*/ GIMT_Encode4(36354),
13338 /* 35996 */ /*GILLT_v2s64*//*Label 970*/ GIMT_Encode4(36012),
13339 /* 36000 */ /*GILLT_v4s32*//*Label 971*/ GIMT_Encode4(36122),
13340 /* 36004 */ /*GILLT_v8s16*//*Label 972*/ GIMT_Encode4(36232),
13341 /* 36008 */ /*GILLT_v16s8*//*Label 973*/ GIMT_Encode4(36293),
13342 /* 36012 */ // Label 970: @36012
13343 /* 36012 */ GIM_Try, /*On fail goto*//*Label 975*/ GIMT_Encode4(36121),
13344 /* 36017 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
13345 /* 36020 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
13346 /* 36023 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
13347 /* 36026 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13348 /* 36030 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13349 /* 36034 */ GIM_Try, /*On fail goto*//*Label 976*/ GIMT_Encode4(36077), // Rule ID 191 //
13350 /* 36039 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13351 /* 36042 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13352 /* 36046 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
13353 /* 36050 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13354 /* 36054 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
13355 /* 36058 */ // MIs[1] Operand 1
13356 /* 36058 */ // No operand predicates
13357 /* 36058 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13358 /* 36060 */ // (vector_insert:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, I64:{ *:[i64] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (REPLACE_LANE_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, (imm:{ *:[i32] }):$idx, I64:{ *:[i64] }:$x)
13359 /* 36060 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I64x2),
13360 /* 36063 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13361 /* 36065 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
13362 /* 36067 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
13363 /* 36070 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
13364 /* 36072 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13365 /* 36075 */ GIR_RootConstrainSelectedInstOperands,
13366 /* 36076 */ // GIR_Coverage, 191,
13367 /* 36076 */ GIR_EraseRootFromParent_Done,
13368 /* 36077 */ // Label 976: @36077
13369 /* 36077 */ GIM_Try, /*On fail goto*//*Label 977*/ GIMT_Encode4(36120), // Rule ID 193 //
13370 /* 36082 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13371 /* 36085 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13372 /* 36089 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
13373 /* 36093 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13374 /* 36097 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
13375 /* 36101 */ // MIs[1] Operand 1
13376 /* 36101 */ // No operand predicates
13377 /* 36101 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13378 /* 36103 */ // (vector_insert:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, F64:{ *:[f64] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (REPLACE_LANE_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, (imm:{ *:[i32] }):$idx, F64:{ *:[f64] }:$x)
13379 /* 36103 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_F64x2),
13380 /* 36106 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13381 /* 36108 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
13382 /* 36110 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
13383 /* 36113 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
13384 /* 36115 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13385 /* 36118 */ GIR_RootConstrainSelectedInstOperands,
13386 /* 36119 */ // GIR_Coverage, 193,
13387 /* 36119 */ GIR_EraseRootFromParent_Done,
13388 /* 36120 */ // Label 977: @36120
13389 /* 36120 */ GIM_Reject,
13390 /* 36121 */ // Label 975: @36121
13391 /* 36121 */ GIM_Reject,
13392 /* 36122 */ // Label 971: @36122
13393 /* 36122 */ GIM_Try, /*On fail goto*//*Label 978*/ GIMT_Encode4(36231),
13394 /* 36127 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13395 /* 36130 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
13396 /* 36133 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
13397 /* 36136 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13398 /* 36140 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13399 /* 36144 */ GIM_Try, /*On fail goto*//*Label 979*/ GIMT_Encode4(36187), // Rule ID 190 //
13400 /* 36149 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13401 /* 36152 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13402 /* 36156 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
13403 /* 36160 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13404 /* 36164 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
13405 /* 36168 */ // MIs[1] Operand 1
13406 /* 36168 */ // No operand predicates
13407 /* 36168 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13408 /* 36170 */ // (vector_insert:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, I32:{ *:[i32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (REPLACE_LANE_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, (imm:{ *:[i32] }):$idx, I32:{ *:[i32] }:$x)
13409 /* 36170 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I32x4),
13410 /* 36173 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13411 /* 36175 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
13412 /* 36177 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
13413 /* 36180 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
13414 /* 36182 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13415 /* 36185 */ GIR_RootConstrainSelectedInstOperands,
13416 /* 36186 */ // GIR_Coverage, 190,
13417 /* 36186 */ GIR_EraseRootFromParent_Done,
13418 /* 36187 */ // Label 979: @36187
13419 /* 36187 */ GIM_Try, /*On fail goto*//*Label 980*/ GIMT_Encode4(36230), // Rule ID 192 //
13420 /* 36192 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13421 /* 36195 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13422 /* 36199 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
13423 /* 36203 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13424 /* 36207 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
13425 /* 36211 */ // MIs[1] Operand 1
13426 /* 36211 */ // No operand predicates
13427 /* 36211 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13428 /* 36213 */ // (vector_insert:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, F32:{ *:[f32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (REPLACE_LANE_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, (imm:{ *:[i32] }):$idx, F32:{ *:[f32] }:$x)
13429 /* 36213 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_F32x4),
13430 /* 36216 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13431 /* 36218 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
13432 /* 36220 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
13433 /* 36223 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
13434 /* 36225 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13435 /* 36228 */ GIR_RootConstrainSelectedInstOperands,
13436 /* 36229 */ // GIR_Coverage, 192,
13437 /* 36229 */ GIR_EraseRootFromParent_Done,
13438 /* 36230 */ // Label 980: @36230
13439 /* 36230 */ GIM_Reject,
13440 /* 36231 */ // Label 978: @36231
13441 /* 36231 */ GIM_Reject,
13442 /* 36232 */ // Label 972: @36232
13443 /* 36232 */ GIM_Try, /*On fail goto*//*Label 981*/ GIMT_Encode4(36292), // Rule ID 189 //
13444 /* 36237 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13445 /* 36240 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13446 /* 36243 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
13447 /* 36246 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
13448 /* 36249 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13449 /* 36253 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13450 /* 36257 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13451 /* 36261 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
13452 /* 36265 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13453 /* 36269 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
13454 /* 36273 */ // MIs[1] Operand 1
13455 /* 36273 */ // No operand predicates
13456 /* 36273 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13457 /* 36275 */ // (vector_insert:{ *:[v8i16] } V128:{ *:[v8i16] }:$vec, I32:{ *:[i32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx) => (REPLACE_LANE_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$vec, (imm:{ *:[i32] }):$idx, I32:{ *:[i32] }:$x)
13458 /* 36275 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I16x8),
13459 /* 36278 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13460 /* 36280 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
13461 /* 36282 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
13462 /* 36285 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
13463 /* 36287 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13464 /* 36290 */ GIR_RootConstrainSelectedInstOperands,
13465 /* 36291 */ // GIR_Coverage, 189,
13466 /* 36291 */ GIR_EraseRootFromParent_Done,
13467 /* 36292 */ // Label 981: @36292
13468 /* 36292 */ GIM_Reject,
13469 /* 36293 */ // Label 973: @36293
13470 /* 36293 */ GIM_Try, /*On fail goto*//*Label 982*/ GIMT_Encode4(36353), // Rule ID 188 //
13471 /* 36298 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13472 /* 36301 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
13473 /* 36304 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
13474 /* 36307 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
13475 /* 36310 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13476 /* 36314 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13477 /* 36318 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13478 /* 36322 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
13479 /* 36326 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13480 /* 36330 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx16),
13481 /* 36334 */ // MIs[1] Operand 1
13482 /* 36334 */ // No operand predicates
13483 /* 36334 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13484 /* 36336 */ // (vector_insert:{ *:[v16i8] } V128:{ *:[v16i8] }:$vec, I32:{ *:[i32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx16>>:$idx) => (REPLACE_LANE_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$vec, (imm:{ *:[i32] }):$idx, I32:{ *:[i32] }:$x)
13485 /* 36336 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I8x16),
13486 /* 36339 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13487 /* 36341 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
13488 /* 36343 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
13489 /* 36346 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
13490 /* 36348 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13491 /* 36351 */ GIR_RootConstrainSelectedInstOperands,
13492 /* 36352 */ // GIR_Coverage, 188,
13493 /* 36352 */ GIR_EraseRootFromParent_Done,
13494 /* 36353 */ // Label 982: @36353
13495 /* 36353 */ GIM_Reject,
13496 /* 36354 */ // Label 974: @36354
13497 /* 36354 */ GIM_Reject,
13498 /* 36355 */ // Label 61: @36355
13499 /* 36355 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(6), /*)*//*default:*//*Label 987*/ GIMT_Encode4(36846),
13500 /* 36366 */ /*GILLT_v2s64*//*Label 983*/ GIMT_Encode4(36382),
13501 /* 36370 */ /*GILLT_v4s32*//*Label 984*/ GIMT_Encode4(36508),
13502 /* 36374 */ /*GILLT_v8s16*//*Label 985*/ GIMT_Encode4(36646),
13503 /* 36378 */ /*GILLT_v16s8*//*Label 986*/ GIMT_Encode4(36734),
13504 /* 36382 */ // Label 983: @36382
13505 /* 36382 */ GIM_Try, /*On fail goto*//*Label 988*/ GIMT_Encode4(36507),
13506 /* 36387 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13507 /* 36390 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13508 /* 36394 */ GIM_Try, /*On fail goto*//*Label 989*/ GIMT_Encode4(36425), // Rule ID 998 //
13509 /* 36399 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13510 /* 36403 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
13511 /* 36407 */ // MIs[1] Operand 1
13512 /* 36407 */ // No operand predicates
13513 /* 36407 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13514 /* 36409 */ // (splat_vector:{ *:[v2f64] } (fpimm:{ *:[f64] }):$x) => (CONST_V128_F64x2:{ *:[v2f64] } (fpimm:{ *:[f64] }):$x, (fpimm:{ *:[f64] }):$x)
13515 /* 36409 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F64x2),
13516 /* 36412 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13517 /* 36414 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13518 /* 36417 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13519 /* 36420 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13520 /* 36423 */ GIR_RootConstrainSelectedInstOperands,
13521 /* 36424 */ // GIR_Coverage, 998,
13522 /* 36424 */ GIR_EraseRootFromParent_Done,
13523 /* 36425 */ // Label 989: @36425
13524 /* 36425 */ GIM_Try, /*On fail goto*//*Label 990*/ GIMT_Encode4(36456), // Rule ID 996 //
13525 /* 36430 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13526 /* 36434 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13527 /* 36438 */ // MIs[1] Operand 1
13528 /* 36438 */ // No operand predicates
13529 /* 36438 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13530 /* 36440 */ // (splat_vector:{ *:[v2i64] } (imm:{ *:[i64] }):$x) => (CONST_V128_I64x2:{ *:[v2i64] } (imm:{ *:[i64] }):$x, (imm:{ *:[i64] }):$x)
13531 /* 36440 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I64x2),
13532 /* 36443 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13533 /* 36445 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13534 /* 36448 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13535 /* 36451 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13536 /* 36454 */ GIR_RootConstrainSelectedInstOperands,
13537 /* 36455 */ // GIR_Coverage, 996,
13538 /* 36455 */ GIR_EraseRootFromParent_Done,
13539 /* 36456 */ // Label 990: @36456
13540 /* 36456 */ GIM_Try, /*On fail goto*//*Label 991*/ GIMT_Encode4(36481), // Rule ID 183 //
13541 /* 36461 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13542 /* 36464 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13543 /* 36468 */ // (splat_vector:{ *:[v2i64] } I64:{ *:[i64] }:$x) => (SPLAT_I64x2:{ *:[v2i64] } I64:{ *:[i64] }:$x)
13544 /* 36468 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I64x2),
13545 /* 36473 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13546 /* 36479 */ GIR_RootConstrainSelectedInstOperands,
13547 /* 36480 */ // GIR_Coverage, 183,
13548 /* 36480 */ GIR_Done,
13549 /* 36481 */ // Label 991: @36481
13550 /* 36481 */ GIM_Try, /*On fail goto*//*Label 992*/ GIMT_Encode4(36506), // Rule ID 185 //
13551 /* 36486 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13552 /* 36489 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13553 /* 36493 */ // (splat_vector:{ *:[v2f64] } F64:{ *:[f64] }:$x) => (SPLAT_F64x2:{ *:[v2f64] } F64:{ *:[f64] }:$x)
13554 /* 36493 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_F64x2),
13555 /* 36498 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13556 /* 36504 */ GIR_RootConstrainSelectedInstOperands,
13557 /* 36505 */ // GIR_Coverage, 185,
13558 /* 36505 */ GIR_Done,
13559 /* 36506 */ // Label 992: @36506
13560 /* 36506 */ GIM_Reject,
13561 /* 36507 */ // Label 988: @36507
13562 /* 36507 */ GIM_Reject,
13563 /* 36508 */ // Label 984: @36508
13564 /* 36508 */ GIM_Try, /*On fail goto*//*Label 993*/ GIMT_Encode4(36645),
13565 /* 36513 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13566 /* 36516 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13567 /* 36520 */ GIM_Try, /*On fail goto*//*Label 994*/ GIMT_Encode4(36557), // Rule ID 997 //
13568 /* 36525 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13569 /* 36529 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
13570 /* 36533 */ // MIs[1] Operand 1
13571 /* 36533 */ // No operand predicates
13572 /* 36533 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13573 /* 36535 */ // (splat_vector:{ *:[v4f32] } (fpimm:{ *:[f32] }):$x) => (CONST_V128_F32x4:{ *:[v4f32] } (fpimm:{ *:[f32] }):$x, (fpimm:{ *:[f32] }):$x, (fpimm:{ *:[f32] }):$x, (fpimm:{ *:[f32] }):$x)
13574 /* 36535 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F32x4),
13575 /* 36538 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13576 /* 36540 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13577 /* 36543 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13578 /* 36546 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13579 /* 36549 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13580 /* 36552 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13581 /* 36555 */ GIR_RootConstrainSelectedInstOperands,
13582 /* 36556 */ // GIR_Coverage, 997,
13583 /* 36556 */ GIR_EraseRootFromParent_Done,
13584 /* 36557 */ // Label 994: @36557
13585 /* 36557 */ GIM_Try, /*On fail goto*//*Label 995*/ GIMT_Encode4(36594), // Rule ID 995 //
13586 /* 36562 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13587 /* 36566 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13588 /* 36570 */ // MIs[1] Operand 1
13589 /* 36570 */ // No operand predicates
13590 /* 36570 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13591 /* 36572 */ // (splat_vector:{ *:[v4i32] } (imm:{ *:[i32] }):$x) => (CONST_V128_I32x4:{ *:[v4i32] } (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x)
13592 /* 36572 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I32x4),
13593 /* 36575 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13594 /* 36577 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13595 /* 36580 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13596 /* 36583 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13597 /* 36586 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13598 /* 36589 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13599 /* 36592 */ GIR_RootConstrainSelectedInstOperands,
13600 /* 36593 */ // GIR_Coverage, 995,
13601 /* 36593 */ GIR_EraseRootFromParent_Done,
13602 /* 36594 */ // Label 995: @36594
13603 /* 36594 */ GIM_Try, /*On fail goto*//*Label 996*/ GIMT_Encode4(36619), // Rule ID 182 //
13604 /* 36599 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13605 /* 36602 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13606 /* 36606 */ // (splat_vector:{ *:[v4i32] } I32:{ *:[i32] }:$x) => (SPLAT_I32x4:{ *:[v4i32] } I32:{ *:[i32] }:$x)
13607 /* 36606 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I32x4),
13608 /* 36611 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13609 /* 36617 */ GIR_RootConstrainSelectedInstOperands,
13610 /* 36618 */ // GIR_Coverage, 182,
13611 /* 36618 */ GIR_Done,
13612 /* 36619 */ // Label 996: @36619
13613 /* 36619 */ GIM_Try, /*On fail goto*//*Label 997*/ GIMT_Encode4(36644), // Rule ID 184 //
13614 /* 36624 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13615 /* 36627 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13616 /* 36631 */ // (splat_vector:{ *:[v4f32] } F32:{ *:[f32] }:$x) => (SPLAT_F32x4:{ *:[v4f32] } F32:{ *:[f32] }:$x)
13617 /* 36631 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_F32x4),
13618 /* 36636 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13619 /* 36642 */ GIR_RootConstrainSelectedInstOperands,
13620 /* 36643 */ // GIR_Coverage, 184,
13621 /* 36643 */ GIR_Done,
13622 /* 36644 */ // Label 997: @36644
13623 /* 36644 */ GIM_Reject,
13624 /* 36645 */ // Label 993: @36645
13625 /* 36645 */ GIM_Reject,
13626 /* 36646 */ // Label 985: @36646
13627 /* 36646 */ GIM_Try, /*On fail goto*//*Label 998*/ GIMT_Encode4(36733),
13628 /* 36651 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13629 /* 36654 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13630 /* 36658 */ GIM_Try, /*On fail goto*//*Label 999*/ GIMT_Encode4(36707), // Rule ID 994 //
13631 /* 36663 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13632 /* 36667 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13633 /* 36671 */ // MIs[1] Operand 1
13634 /* 36671 */ // No operand predicates
13635 /* 36671 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13636 /* 36673 */ // (splat_vector:{ *:[v8i16] } (imm:{ *:[i32] }):$x) => (CONST_V128_I16x8:{ *:[v8i16] } (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x)
13637 /* 36673 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I16x8),
13638 /* 36676 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13639 /* 36678 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13640 /* 36681 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13641 /* 36684 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13642 /* 36687 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13643 /* 36690 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13644 /* 36693 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13645 /* 36696 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13646 /* 36699 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13647 /* 36702 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13648 /* 36705 */ GIR_RootConstrainSelectedInstOperands,
13649 /* 36706 */ // GIR_Coverage, 994,
13650 /* 36706 */ GIR_EraseRootFromParent_Done,
13651 /* 36707 */ // Label 999: @36707
13652 /* 36707 */ GIM_Try, /*On fail goto*//*Label 1000*/ GIMT_Encode4(36732), // Rule ID 181 //
13653 /* 36712 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13654 /* 36715 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13655 /* 36719 */ // (splat_vector:{ *:[v8i16] } I32:{ *:[i32] }:$x) => (SPLAT_I16x8:{ *:[v8i16] } I32:{ *:[i32] }:$x)
13656 /* 36719 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I16x8),
13657 /* 36724 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13658 /* 36730 */ GIR_RootConstrainSelectedInstOperands,
13659 /* 36731 */ // GIR_Coverage, 181,
13660 /* 36731 */ GIR_Done,
13661 /* 36732 */ // Label 1000: @36732
13662 /* 36732 */ GIM_Reject,
13663 /* 36733 */ // Label 998: @36733
13664 /* 36733 */ GIM_Reject,
13665 /* 36734 */ // Label 986: @36734
13666 /* 36734 */ GIM_Try, /*On fail goto*//*Label 1001*/ GIMT_Encode4(36845),
13667 /* 36739 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13668 /* 36742 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13669 /* 36746 */ GIM_Try, /*On fail goto*//*Label 1002*/ GIMT_Encode4(36819), // Rule ID 993 //
13670 /* 36751 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13671 /* 36755 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13672 /* 36759 */ // MIs[1] Operand 1
13673 /* 36759 */ // No operand predicates
13674 /* 36759 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13675 /* 36761 */ // (splat_vector:{ *:[v16i8] } (imm:{ *:[i32] }):$x) => (CONST_V128_I8x16:{ *:[v16i8] } (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x)
13676 /* 36761 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I8x16),
13677 /* 36764 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13678 /* 36766 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13679 /* 36769 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13680 /* 36772 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13681 /* 36775 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13682 /* 36778 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13683 /* 36781 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13684 /* 36784 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13685 /* 36787 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13686 /* 36790 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13687 /* 36793 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13688 /* 36796 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13689 /* 36799 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13690 /* 36802 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13691 /* 36805 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13692 /* 36808 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13693 /* 36811 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
13694 /* 36814 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13695 /* 36817 */ GIR_RootConstrainSelectedInstOperands,
13696 /* 36818 */ // GIR_Coverage, 993,
13697 /* 36818 */ GIR_EraseRootFromParent_Done,
13698 /* 36819 */ // Label 1002: @36819
13699 /* 36819 */ GIM_Try, /*On fail goto*//*Label 1003*/ GIMT_Encode4(36844), // Rule ID 180 //
13700 /* 36824 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13701 /* 36827 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13702 /* 36831 */ // (splat_vector:{ *:[v16i8] } I32:{ *:[i32] }:$x) => (SPLAT_I8x16:{ *:[v16i8] } I32:{ *:[i32] }:$x)
13703 /* 36831 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I8x16),
13704 /* 36836 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13705 /* 36842 */ GIR_RootConstrainSelectedInstOperands,
13706 /* 36843 */ // GIR_Coverage, 180,
13707 /* 36843 */ GIR_Done,
13708 /* 36844 */ // Label 1003: @36844
13709 /* 36844 */ GIM_Reject,
13710 /* 36845 */ // Label 1001: @36845
13711 /* 36845 */ GIM_Reject,
13712 /* 36846 */ // Label 987: @36846
13713 /* 36846 */ GIM_Reject,
13714 /* 36847 */ // Label 62: @36847
13715 /* 36847 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 1006*/ GIMT_Encode4(36926),
13716 /* 36858 */ /*GILLT_s32*//*Label 1004*/ GIMT_Encode4(36866),
13717 /* 36862 */ /*GILLT_s64*//*Label 1005*/ GIMT_Encode4(36896),
13718 /* 36866 */ // Label 1004: @36866
13719 /* 36866 */ GIM_Try, /*On fail goto*//*Label 1007*/ GIMT_Encode4(36895), // Rule ID 116 //
13720 /* 36871 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13721 /* 36874 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13722 /* 36878 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13723 /* 36882 */ // (cttz:{ *:[i32] } I32:{ *:[i32] }:$src) => (CTZ_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
13724 /* 36882 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CTZ_I32),
13725 /* 36887 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13726 /* 36893 */ GIR_RootConstrainSelectedInstOperands,
13727 /* 36894 */ // GIR_Coverage, 116,
13728 /* 36894 */ GIR_Done,
13729 /* 36895 */ // Label 1007: @36895
13730 /* 36895 */ GIM_Reject,
13731 /* 36896 */ // Label 1005: @36896
13732 /* 36896 */ GIM_Try, /*On fail goto*//*Label 1008*/ GIMT_Encode4(36925), // Rule ID 117 //
13733 /* 36901 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13734 /* 36904 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13735 /* 36908 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13736 /* 36912 */ // (cttz:{ *:[i64] } I64:{ *:[i64] }:$src) => (CTZ_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
13737 /* 36912 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CTZ_I64),
13738 /* 36917 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13739 /* 36923 */ GIR_RootConstrainSelectedInstOperands,
13740 /* 36924 */ // GIR_Coverage, 117,
13741 /* 36924 */ GIR_Done,
13742 /* 36925 */ // Label 1008: @36925
13743 /* 36925 */ GIM_Reject,
13744 /* 36926 */ // Label 1006: @36926
13745 /* 36926 */ GIM_Reject,
13746 /* 36927 */ // Label 63: @36927
13747 /* 36927 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 1011*/ GIMT_Encode4(37006),
13748 /* 36938 */ /*GILLT_s32*//*Label 1009*/ GIMT_Encode4(36946),
13749 /* 36942 */ /*GILLT_s64*//*Label 1010*/ GIMT_Encode4(36976),
13750 /* 36946 */ // Label 1009: @36946
13751 /* 36946 */ GIM_Try, /*On fail goto*//*Label 1012*/ GIMT_Encode4(36975), // Rule ID 114 //
13752 /* 36951 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13753 /* 36954 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13754 /* 36958 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13755 /* 36962 */ // (ctlz:{ *:[i32] } I32:{ *:[i32] }:$src) => (CLZ_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
13756 /* 36962 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CLZ_I32),
13757 /* 36967 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13758 /* 36973 */ GIR_RootConstrainSelectedInstOperands,
13759 /* 36974 */ // GIR_Coverage, 114,
13760 /* 36974 */ GIR_Done,
13761 /* 36975 */ // Label 1012: @36975
13762 /* 36975 */ GIM_Reject,
13763 /* 36976 */ // Label 1010: @36976
13764 /* 36976 */ GIM_Try, /*On fail goto*//*Label 1013*/ GIMT_Encode4(37005), // Rule ID 115 //
13765 /* 36981 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13766 /* 36984 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13767 /* 36988 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13768 /* 36992 */ // (ctlz:{ *:[i64] } I64:{ *:[i64] }:$src) => (CLZ_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
13769 /* 36992 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CLZ_I64),
13770 /* 36997 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13771 /* 37003 */ GIR_RootConstrainSelectedInstOperands,
13772 /* 37004 */ // GIR_Coverage, 115,
13773 /* 37004 */ GIR_Done,
13774 /* 37005 */ // Label 1013: @37005
13775 /* 37005 */ GIM_Reject,
13776 /* 37006 */ // Label 1011: @37006
13777 /* 37006 */ GIM_Reject,
13778 /* 37007 */ // Label 64: @37007
13779 /* 37007 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 1017*/ GIMT_Encode4(37135),
13780 /* 37018 */ /*GILLT_s32*//*Label 1014*/ GIMT_Encode4(37042),
13781 /* 37022 */ /*GILLT_s64*//*Label 1015*/ GIMT_Encode4(37072), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
13782 /* 37038 */ /*GILLT_v16s8*//*Label 1016*/ GIMT_Encode4(37102),
13783 /* 37042 */ // Label 1014: @37042
13784 /* 37042 */ GIM_Try, /*On fail goto*//*Label 1018*/ GIMT_Encode4(37071), // Rule ID 118 //
13785 /* 37047 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13786 /* 37050 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13787 /* 37054 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13788 /* 37058 */ // (ctpop:{ *:[i32] } I32:{ *:[i32] }:$src) => (POPCNT_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
13789 /* 37058 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::POPCNT_I32),
13790 /* 37063 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13791 /* 37069 */ GIR_RootConstrainSelectedInstOperands,
13792 /* 37070 */ // GIR_Coverage, 118,
13793 /* 37070 */ GIR_Done,
13794 /* 37071 */ // Label 1018: @37071
13795 /* 37071 */ GIM_Reject,
13796 /* 37072 */ // Label 1015: @37072
13797 /* 37072 */ GIM_Try, /*On fail goto*//*Label 1019*/ GIMT_Encode4(37101), // Rule ID 119 //
13798 /* 37077 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13799 /* 37080 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13800 /* 37084 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13801 /* 37088 */ // (ctpop:{ *:[i64] } I64:{ *:[i64] }:$src) => (POPCNT_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
13802 /* 37088 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::POPCNT_I64),
13803 /* 37093 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13804 /* 37099 */ GIR_RootConstrainSelectedInstOperands,
13805 /* 37100 */ // GIR_Coverage, 119,
13806 /* 37100 */ GIR_Done,
13807 /* 37101 */ // Label 1019: @37101
13808 /* 37101 */ GIM_Reject,
13809 /* 37102 */ // Label 1016: @37102
13810 /* 37102 */ GIM_Try, /*On fail goto*//*Label 1020*/ GIMT_Encode4(37134), // Rule ID 257 //
13811 /* 37107 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13812 /* 37110 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
13813 /* 37113 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13814 /* 37117 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13815 /* 37121 */ // (ctpop:{ *:[v16i8] } V128:{ *:[v16i8] }:$v) => (POPCNT_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$v)
13816 /* 37121 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::POPCNT_I8x16),
13817 /* 37126 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13818 /* 37132 */ GIR_RootConstrainSelectedInstOperands,
13819 /* 37133 */ // GIR_Coverage, 257,
13820 /* 37133 */ GIR_Done,
13821 /* 37134 */ // Label 1020: @37134
13822 /* 37134 */ GIM_Reject,
13823 /* 37135 */ // Label 1017: @37135
13824 /* 37135 */ GIM_Reject,
13825 /* 37136 */ // Label 65: @37136
13826 /* 37136 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 1026*/ GIMT_Encode4(37326),
13827 /* 37147 */ /*GILLT_s32*//*Label 1021*/ GIMT_Encode4(37167),
13828 /* 37151 */ /*GILLT_s64*//*Label 1022*/ GIMT_Encode4(37197),
13829 /* 37155 */ /*GILLT_v2s64*//*Label 1023*/ GIMT_Encode4(37227),
13830 /* 37159 */ /*GILLT_v4s32*//*Label 1024*/ GIMT_Encode4(37260),
13831 /* 37163 */ /*GILLT_v8s16*//*Label 1025*/ GIMT_Encode4(37293),
13832 /* 37167 */ // Label 1021: @37167
13833 /* 37167 */ GIM_Try, /*On fail goto*//*Label 1027*/ GIMT_Encode4(37196), // Rule ID 144 //
13834 /* 37172 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13835 /* 37175 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13836 /* 37179 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13837 /* 37183 */ // (fceil:{ *:[f32] } F32:{ *:[f32] }:$src) => (CEIL_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
13838 /* 37183 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F32),
13839 /* 37188 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13840 /* 37194 */ GIR_RootConstrainSelectedInstOperands,
13841 /* 37195 */ // GIR_Coverage, 144,
13842 /* 37195 */ GIR_Done,
13843 /* 37196 */ // Label 1027: @37196
13844 /* 37196 */ GIM_Reject,
13845 /* 37197 */ // Label 1022: @37197
13846 /* 37197 */ GIM_Try, /*On fail goto*//*Label 1028*/ GIMT_Encode4(37226), // Rule ID 145 //
13847 /* 37202 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13848 /* 37205 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13849 /* 37209 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13850 /* 37213 */ // (fceil:{ *:[f64] } F64:{ *:[f64] }:$src) => (CEIL_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
13851 /* 37213 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F64),
13852 /* 37218 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13853 /* 37224 */ GIR_RootConstrainSelectedInstOperands,
13854 /* 37225 */ // GIR_Coverage, 145,
13855 /* 37225 */ GIR_Done,
13856 /* 37226 */ // Label 1028: @37226
13857 /* 37226 */ GIM_Reject,
13858 /* 37227 */ // Label 1023: @37227
13859 /* 37227 */ GIM_Try, /*On fail goto*//*Label 1029*/ GIMT_Encode4(37259), // Rule ID 337 //
13860 /* 37232 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13861 /* 37235 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
13862 /* 37238 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13863 /* 37242 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13864 /* 37246 */ // (fceil:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (CEIL_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
13865 /* 37246 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F64x2),
13866 /* 37251 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13867 /* 37257 */ GIR_RootConstrainSelectedInstOperands,
13868 /* 37258 */ // GIR_Coverage, 337,
13869 /* 37258 */ GIR_Done,
13870 /* 37259 */ // Label 1029: @37259
13871 /* 37259 */ GIM_Reject,
13872 /* 37260 */ // Label 1024: @37260
13873 /* 37260 */ GIM_Try, /*On fail goto*//*Label 1030*/ GIMT_Encode4(37292), // Rule ID 333 //
13874 /* 37265 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13875 /* 37268 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13876 /* 37271 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13877 /* 37275 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13878 /* 37279 */ // (fceil:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (CEIL_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
13879 /* 37279 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F32x4),
13880 /* 37284 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13881 /* 37290 */ GIR_RootConstrainSelectedInstOperands,
13882 /* 37291 */ // GIR_Coverage, 333,
13883 /* 37291 */ GIR_Done,
13884 /* 37292 */ // Label 1030: @37292
13885 /* 37292 */ GIM_Reject,
13886 /* 37293 */ // Label 1025: @37293
13887 /* 37293 */ GIM_Try, /*On fail goto*//*Label 1031*/ GIMT_Encode4(37325), // Rule ID 341 //
13888 /* 37298 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
13889 /* 37301 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13890 /* 37304 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13891 /* 37308 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13892 /* 37312 */ // (fceil:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (CEIL_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
13893 /* 37312 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F16x8),
13894 /* 37317 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13895 /* 37323 */ GIR_RootConstrainSelectedInstOperands,
13896 /* 37324 */ // GIR_Coverage, 341,
13897 /* 37324 */ GIR_Done,
13898 /* 37325 */ // Label 1031: @37325
13899 /* 37325 */ GIM_Reject,
13900 /* 37326 */ // Label 1026: @37326
13901 /* 37326 */ GIM_Reject,
13902 /* 37327 */ // Label 66: @37327
13903 /* 37327 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 1037*/ GIMT_Encode4(37517),
13904 /* 37338 */ /*GILLT_s32*//*Label 1032*/ GIMT_Encode4(37358),
13905 /* 37342 */ /*GILLT_s64*//*Label 1033*/ GIMT_Encode4(37388),
13906 /* 37346 */ /*GILLT_v2s64*//*Label 1034*/ GIMT_Encode4(37418),
13907 /* 37350 */ /*GILLT_v4s32*//*Label 1035*/ GIMT_Encode4(37451),
13908 /* 37354 */ /*GILLT_v8s16*//*Label 1036*/ GIMT_Encode4(37484),
13909 /* 37358 */ // Label 1032: @37358
13910 /* 37358 */ GIM_Try, /*On fail goto*//*Label 1038*/ GIMT_Encode4(37387), // Rule ID 132 //
13911 /* 37363 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13912 /* 37366 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13913 /* 37370 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13914 /* 37374 */ // (fsqrt:{ *:[f32] } F32:{ *:[f32] }:$src) => (SQRT_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
13915 /* 37374 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F32),
13916 /* 37379 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13917 /* 37385 */ GIR_RootConstrainSelectedInstOperands,
13918 /* 37386 */ // GIR_Coverage, 132,
13919 /* 37386 */ GIR_Done,
13920 /* 37387 */ // Label 1038: @37387
13921 /* 37387 */ GIM_Reject,
13922 /* 37388 */ // Label 1033: @37388
13923 /* 37388 */ GIM_Try, /*On fail goto*//*Label 1039*/ GIMT_Encode4(37417), // Rule ID 133 //
13924 /* 37393 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13925 /* 37396 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13926 /* 37400 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13927 /* 37404 */ // (fsqrt:{ *:[f64] } F64:{ *:[f64] }:$src) => (SQRT_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
13928 /* 37404 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F64),
13929 /* 37409 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13930 /* 37415 */ GIR_RootConstrainSelectedInstOperands,
13931 /* 37416 */ // GIR_Coverage, 133,
13932 /* 37416 */ GIR_Done,
13933 /* 37417 */ // Label 1039: @37417
13934 /* 37417 */ GIM_Reject,
13935 /* 37418 */ // Label 1034: @37418
13936 /* 37418 */ GIM_Try, /*On fail goto*//*Label 1040*/ GIMT_Encode4(37450), // Rule ID 331 //
13937 /* 37423 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13938 /* 37426 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
13939 /* 37429 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13940 /* 37433 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13941 /* 37437 */ // (fsqrt:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (SQRT_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
13942 /* 37437 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F64x2),
13943 /* 37442 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13944 /* 37448 */ GIR_RootConstrainSelectedInstOperands,
13945 /* 37449 */ // GIR_Coverage, 331,
13946 /* 37449 */ GIR_Done,
13947 /* 37450 */ // Label 1040: @37450
13948 /* 37450 */ GIM_Reject,
13949 /* 37451 */ // Label 1035: @37451
13950 /* 37451 */ GIM_Try, /*On fail goto*//*Label 1041*/ GIMT_Encode4(37483), // Rule ID 330 //
13951 /* 37456 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13952 /* 37459 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13953 /* 37462 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13954 /* 37466 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13955 /* 37470 */ // (fsqrt:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (SQRT_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
13956 /* 37470 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F32x4),
13957 /* 37475 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13958 /* 37481 */ GIR_RootConstrainSelectedInstOperands,
13959 /* 37482 */ // GIR_Coverage, 330,
13960 /* 37482 */ GIR_Done,
13961 /* 37483 */ // Label 1041: @37483
13962 /* 37483 */ GIM_Reject,
13963 /* 37484 */ // Label 1036: @37484
13964 /* 37484 */ GIM_Try, /*On fail goto*//*Label 1042*/ GIMT_Encode4(37516), // Rule ID 332 //
13965 /* 37489 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
13966 /* 37492 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13967 /* 37495 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13968 /* 37499 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13969 /* 37503 */ // (fsqrt:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (SQRT_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
13970 /* 37503 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F16x8),
13971 /* 37508 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13972 /* 37514 */ GIR_RootConstrainSelectedInstOperands,
13973 /* 37515 */ // GIR_Coverage, 332,
13974 /* 37515 */ GIR_Done,
13975 /* 37516 */ // Label 1042: @37516
13976 /* 37516 */ GIM_Reject,
13977 /* 37517 */ // Label 1037: @37517
13978 /* 37517 */ GIM_Reject,
13979 /* 37518 */ // Label 67: @37518
13980 /* 37518 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 1048*/ GIMT_Encode4(37708),
13981 /* 37529 */ /*GILLT_s32*//*Label 1043*/ GIMT_Encode4(37549),
13982 /* 37533 */ /*GILLT_s64*//*Label 1044*/ GIMT_Encode4(37579),
13983 /* 37537 */ /*GILLT_v2s64*//*Label 1045*/ GIMT_Encode4(37609),
13984 /* 37541 */ /*GILLT_v4s32*//*Label 1046*/ GIMT_Encode4(37642),
13985 /* 37545 */ /*GILLT_v8s16*//*Label 1047*/ GIMT_Encode4(37675),
13986 /* 37549 */ // Label 1043: @37549
13987 /* 37549 */ GIM_Try, /*On fail goto*//*Label 1049*/ GIMT_Encode4(37578), // Rule ID 146 //
13988 /* 37554 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13989 /* 37557 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13990 /* 37561 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13991 /* 37565 */ // (ffloor:{ *:[f32] } F32:{ *:[f32] }:$src) => (FLOOR_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
13992 /* 37565 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F32),
13993 /* 37570 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13994 /* 37576 */ GIR_RootConstrainSelectedInstOperands,
13995 /* 37577 */ // GIR_Coverage, 146,
13996 /* 37577 */ GIR_Done,
13997 /* 37578 */ // Label 1049: @37578
13998 /* 37578 */ GIM_Reject,
13999 /* 37579 */ // Label 1044: @37579
14000 /* 37579 */ GIM_Try, /*On fail goto*//*Label 1050*/ GIMT_Encode4(37608), // Rule ID 147 //
14001 /* 37584 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
14002 /* 37587 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14003 /* 37591 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14004 /* 37595 */ // (ffloor:{ *:[f64] } F64:{ *:[f64] }:$src) => (FLOOR_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
14005 /* 37595 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F64),
14006 /* 37600 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14007 /* 37606 */ GIR_RootConstrainSelectedInstOperands,
14008 /* 37607 */ // GIR_Coverage, 147,
14009 /* 37607 */ GIR_Done,
14010 /* 37608 */ // Label 1050: @37608
14011 /* 37608 */ GIM_Reject,
14012 /* 37609 */ // Label 1045: @37609
14013 /* 37609 */ GIM_Try, /*On fail goto*//*Label 1051*/ GIMT_Encode4(37641), // Rule ID 338 //
14014 /* 37614 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14015 /* 37617 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
14016 /* 37620 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14017 /* 37624 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14018 /* 37628 */ // (ffloor:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (FLOOR_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
14019 /* 37628 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F64x2),
14020 /* 37633 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14021 /* 37639 */ GIR_RootConstrainSelectedInstOperands,
14022 /* 37640 */ // GIR_Coverage, 338,
14023 /* 37640 */ GIR_Done,
14024 /* 37641 */ // Label 1051: @37641
14025 /* 37641 */ GIM_Reject,
14026 /* 37642 */ // Label 1046: @37642
14027 /* 37642 */ GIM_Try, /*On fail goto*//*Label 1052*/ GIMT_Encode4(37674), // Rule ID 334 //
14028 /* 37647 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14029 /* 37650 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
14030 /* 37653 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14031 /* 37657 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14032 /* 37661 */ // (ffloor:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (FLOOR_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
14033 /* 37661 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F32x4),
14034 /* 37666 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14035 /* 37672 */ GIR_RootConstrainSelectedInstOperands,
14036 /* 37673 */ // GIR_Coverage, 334,
14037 /* 37673 */ GIR_Done,
14038 /* 37674 */ // Label 1052: @37674
14039 /* 37674 */ GIM_Reject,
14040 /* 37675 */ // Label 1047: @37675
14041 /* 37675 */ GIM_Try, /*On fail goto*//*Label 1053*/ GIMT_Encode4(37707), // Rule ID 342 //
14042 /* 37680 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
14043 /* 37683 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
14044 /* 37686 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14045 /* 37690 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14046 /* 37694 */ // (ffloor:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (FLOOR_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
14047 /* 37694 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F16x8),
14048 /* 37699 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14049 /* 37705 */ GIR_RootConstrainSelectedInstOperands,
14050 /* 37706 */ // GIR_Coverage, 342,
14051 /* 37706 */ GIR_Done,
14052 /* 37707 */ // Label 1053: @37707
14053 /* 37707 */ GIM_Reject,
14054 /* 37708 */ // Label 1048: @37708
14055 /* 37708 */ GIM_Reject,
14056 /* 37709 */ // Label 68: @37709
14057 /* 37709 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 1059*/ GIMT_Encode4(37882),
14058 /* 37720 */ /*GILLT_s32*//*Label 1054*/ GIMT_Encode4(37740),
14059 /* 37724 */ /*GILLT_s64*//*Label 1055*/ GIMT_Encode4(37766),
14060 /* 37728 */ /*GILLT_v2s64*//*Label 1056*/ GIMT_Encode4(37792),
14061 /* 37732 */ /*GILLT_v4s32*//*Label 1057*/ GIMT_Encode4(37822),
14062 /* 37736 */ /*GILLT_v8s16*//*Label 1058*/ GIMT_Encode4(37852),
14063 /* 37740 */ // Label 1054: @37740
14064 /* 37740 */ GIM_Try, /*On fail goto*//*Label 1060*/ GIMT_Encode4(37765), // Rule ID 673 //
14065 /* 37745 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14066 /* 37748 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14067 /* 37752 */ // (frint:{ *:[f32] } f32:{ *:[f32] }:$src) => (NEAREST_F32:{ *:[f32] } f32:{ *:[f32] }:$src)
14068 /* 37752 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32),
14069 /* 37757 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14070 /* 37763 */ GIR_RootConstrainSelectedInstOperands,
14071 /* 37764 */ // GIR_Coverage, 673,
14072 /* 37764 */ GIR_Done,
14073 /* 37765 */ // Label 1060: @37765
14074 /* 37765 */ GIM_Reject,
14075 /* 37766 */ // Label 1055: @37766
14076 /* 37766 */ GIM_Try, /*On fail goto*//*Label 1061*/ GIMT_Encode4(37791), // Rule ID 674 //
14077 /* 37771 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
14078 /* 37774 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14079 /* 37778 */ // (frint:{ *:[f64] } f64:{ *:[f64] }:$src) => (NEAREST_F64:{ *:[f64] } f64:{ *:[f64] }:$src)
14080 /* 37778 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64),
14081 /* 37783 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14082 /* 37789 */ GIR_RootConstrainSelectedInstOperands,
14083 /* 37790 */ // GIR_Coverage, 674,
14084 /* 37790 */ GIR_Done,
14085 /* 37791 */ // Label 1061: @37791
14086 /* 37791 */ GIM_Reject,
14087 /* 37792 */ // Label 1056: @37792
14088 /* 37792 */ GIM_Try, /*On fail goto*//*Label 1062*/ GIMT_Encode4(37821), // Rule ID 1160 //
14089 /* 37797 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
14090 /* 37800 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14091 /* 37804 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14092 /* 37808 */ // (frint:{ *:[v2f64] } V128:{ *:[v2f64] }:$src) => (NEAREST_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$src)
14093 /* 37808 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64x2),
14094 /* 37813 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14095 /* 37819 */ GIR_RootConstrainSelectedInstOperands,
14096 /* 37820 */ // GIR_Coverage, 1160,
14097 /* 37820 */ GIR_Done,
14098 /* 37821 */ // Label 1062: @37821
14099 /* 37821 */ GIM_Reject,
14100 /* 37822 */ // Label 1057: @37822
14101 /* 37822 */ GIM_Try, /*On fail goto*//*Label 1063*/ GIMT_Encode4(37851), // Rule ID 1159 //
14102 /* 37827 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
14103 /* 37830 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14104 /* 37834 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14105 /* 37838 */ // (frint:{ *:[v4f32] } V128:{ *:[v4f32] }:$src) => (NEAREST_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$src)
14106 /* 37838 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32x4),
14107 /* 37843 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14108 /* 37849 */ GIR_RootConstrainSelectedInstOperands,
14109 /* 37850 */ // GIR_Coverage, 1159,
14110 /* 37850 */ GIR_Done,
14111 /* 37851 */ // Label 1063: @37851
14112 /* 37851 */ GIM_Reject,
14113 /* 37852 */ // Label 1058: @37852
14114 /* 37852 */ GIM_Try, /*On fail goto*//*Label 1064*/ GIMT_Encode4(37881), // Rule ID 1161 //
14115 /* 37857 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
14116 /* 37860 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14117 /* 37864 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14118 /* 37868 */ // (frint:{ *:[v8f16] } V128:{ *:[v8f16] }:$src) => (NEAREST_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$src)
14119 /* 37868 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F16x8),
14120 /* 37873 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14121 /* 37879 */ GIR_RootConstrainSelectedInstOperands,
14122 /* 37880 */ // GIR_Coverage, 1161,
14123 /* 37880 */ GIR_Done,
14124 /* 37881 */ // Label 1064: @37881
14125 /* 37881 */ GIM_Reject,
14126 /* 37882 */ // Label 1059: @37882
14127 /* 37882 */ GIM_Reject,
14128 /* 37883 */ // Label 69: @37883
14129 /* 37883 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 1070*/ GIMT_Encode4(38073),
14130 /* 37894 */ /*GILLT_s32*//*Label 1065*/ GIMT_Encode4(37914),
14131 /* 37898 */ /*GILLT_s64*//*Label 1066*/ GIMT_Encode4(37944),
14132 /* 37902 */ /*GILLT_v2s64*//*Label 1067*/ GIMT_Encode4(37974),
14133 /* 37906 */ /*GILLT_v4s32*//*Label 1068*/ GIMT_Encode4(38007),
14134 /* 37910 */ /*GILLT_v8s16*//*Label 1069*/ GIMT_Encode4(38040),
14135 /* 37914 */ // Label 1065: @37914
14136 /* 37914 */ GIM_Try, /*On fail goto*//*Label 1071*/ GIMT_Encode4(37943), // Rule ID 150 //
14137 /* 37919 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14138 /* 37922 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14139 /* 37926 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14140 /* 37930 */ // (fnearbyint:{ *:[f32] } F32:{ *:[f32] }:$src) => (NEAREST_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
14141 /* 37930 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32),
14142 /* 37935 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14143 /* 37941 */ GIR_RootConstrainSelectedInstOperands,
14144 /* 37942 */ // GIR_Coverage, 150,
14145 /* 37942 */ GIR_Done,
14146 /* 37943 */ // Label 1071: @37943
14147 /* 37943 */ GIM_Reject,
14148 /* 37944 */ // Label 1066: @37944
14149 /* 37944 */ GIM_Try, /*On fail goto*//*Label 1072*/ GIMT_Encode4(37973), // Rule ID 151 //
14150 /* 37949 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
14151 /* 37952 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14152 /* 37956 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14153 /* 37960 */ // (fnearbyint:{ *:[f64] } F64:{ *:[f64] }:$src) => (NEAREST_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
14154 /* 37960 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64),
14155 /* 37965 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14156 /* 37971 */ GIR_RootConstrainSelectedInstOperands,
14157 /* 37972 */ // GIR_Coverage, 151,
14158 /* 37972 */ GIR_Done,
14159 /* 37973 */ // Label 1072: @37973
14160 /* 37973 */ GIM_Reject,
14161 /* 37974 */ // Label 1067: @37974
14162 /* 37974 */ GIM_Try, /*On fail goto*//*Label 1073*/ GIMT_Encode4(38006), // Rule ID 340 //
14163 /* 37979 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14164 /* 37982 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
14165 /* 37985 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14166 /* 37989 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14167 /* 37993 */ // (fnearbyint:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (NEAREST_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
14168 /* 37993 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64x2),
14169 /* 37998 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14170 /* 38004 */ GIR_RootConstrainSelectedInstOperands,
14171 /* 38005 */ // GIR_Coverage, 340,
14172 /* 38005 */ GIR_Done,
14173 /* 38006 */ // Label 1073: @38006
14174 /* 38006 */ GIM_Reject,
14175 /* 38007 */ // Label 1068: @38007
14176 /* 38007 */ GIM_Try, /*On fail goto*//*Label 1074*/ GIMT_Encode4(38039), // Rule ID 336 //
14177 /* 38012 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14178 /* 38015 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
14179 /* 38018 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14180 /* 38022 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14181 /* 38026 */ // (fnearbyint:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (NEAREST_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
14182 /* 38026 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32x4),
14183 /* 38031 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14184 /* 38037 */ GIR_RootConstrainSelectedInstOperands,
14185 /* 38038 */ // GIR_Coverage, 336,
14186 /* 38038 */ GIR_Done,
14187 /* 38039 */ // Label 1074: @38039
14188 /* 38039 */ GIM_Reject,
14189 /* 38040 */ // Label 1069: @38040
14190 /* 38040 */ GIM_Try, /*On fail goto*//*Label 1075*/ GIMT_Encode4(38072), // Rule ID 344 //
14191 /* 38045 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
14192 /* 38048 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
14193 /* 38051 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14194 /* 38055 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14195 /* 38059 */ // (fnearbyint:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (NEAREST_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
14196 /* 38059 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F16x8),
14197 /* 38064 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14198 /* 38070 */ GIR_RootConstrainSelectedInstOperands,
14199 /* 38071 */ // GIR_Coverage, 344,
14200 /* 38071 */ GIR_Done,
14201 /* 38072 */ // Label 1075: @38072
14202 /* 38072 */ GIM_Reject,
14203 /* 38073 */ // Label 1070: @38073
14204 /* 38073 */ GIM_Reject,
14205 /* 38074 */ // Label 70: @38074
14206 /* 38074 */ GIM_Try, /*On fail goto*//*Label 1076*/ GIMT_Encode4(38092), // Rule ID 22 //
14207 /* 38079 */ // (trap) => (UNREACHABLE)
14208 /* 38079 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::UNREACHABLE),
14209 /* 38084 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14210 /* 38090 */ GIR_RootConstrainSelectedInstOperands,
14211 /* 38091 */ // GIR_Coverage, 22,
14212 /* 38091 */ GIR_Done,
14213 /* 38092 */ // Label 1076: @38092
14214 /* 38092 */ GIM_Reject,
14215 /* 38093 */ // Label 71: @38093
14216 /* 38093 */ GIM_Try, /*On fail goto*//*Label 1077*/ GIMT_Encode4(38111), // Rule ID 23 //
14217 /* 38098 */ // (debugtrap) => (DEBUG_UNREACHABLE)
14218 /* 38098 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DEBUG_UNREACHABLE),
14219 /* 38103 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14220 /* 38109 */ GIR_RootConstrainSelectedInstOperands,
14221 /* 38110 */ // GIR_Coverage, 23,
14222 /* 38110 */ GIR_Done,
14223 /* 38111 */ // Label 1077: @38111
14224 /* 38111 */ GIM_Reject,
14225 /* 38112 */ // Label 72: @38112
14226 /* 38112 */ GIM_Reject,
14227 /* 38113 */ }; // Size: 38113 bytes
14228 return MatchTable0;
14229}
14230#undef GIMT_Encode2
14231#undef GIMT_Encode4
14232#undef GIMT_Encode8
14233
14234
14235#endif // GET_GLOBALISEL_IMPL
14236
14237#ifdef GET_GLOBALISEL_PREDICATES_DECL
14238
14239PredicateBitset AvailableModuleFeatures;
14240mutable PredicateBitset AvailableFunctionFeatures;
14241PredicateBitset getAvailableFeatures() const {
14242 return AvailableModuleFeatures | AvailableFunctionFeatures;
14243}
14244PredicateBitset
14245computeAvailableModuleFeatures(const WebAssemblySubtarget *Subtarget) const;
14246PredicateBitset
14247computeAvailableFunctionFeatures(const WebAssemblySubtarget *Subtarget,
14248 const MachineFunction *MF) const;
14249void setupGeneratedPerFunctionState(MachineFunction &MF) override;
14250
14251#endif // GET_GLOBALISEL_PREDICATES_DECL
14252
14253#ifdef GET_GLOBALISEL_PREDICATES_INIT
14254
14255AvailableModuleFeatures(computeAvailableModuleFeatures(&STI)),
14256AvailableFunctionFeatures()
14257
14258#endif // GET_GLOBALISEL_PREDICATES_INIT
14259
14260