1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Global Instruction Selector for the WebAssembly target *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_GLOBALISEL_PREDICATE_BITSET
10
11const unsigned MAX_SUBTARGET_PREDICATES = 14;
12using PredicateBitset = llvm::Bitset<MAX_SUBTARGET_PREDICATES>;
13
14#endif // GET_GLOBALISEL_PREDICATE_BITSET
15
16#ifdef GET_GLOBALISEL_TEMPORARIES_DECL
17
18 mutable MatcherState State;
19 typedef ComplexRendererFns(WebAssemblyInstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const;
20 typedef void(WebAssemblyInstructionSelector::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr &, int) const;
21 const ExecInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn> ExecInfo;
22 static WebAssemblyInstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[];
23 static WebAssemblyInstructionSelector::CustomRendererFn CustomRenderers[];
24 bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
25 bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override;
26 bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override;
27 const uint8_t *getMatchTable() const override;
28 bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI, const MatcherState &State) const override;
29 bool testMOPredicate_MO(unsigned PredicateID, const MachineOperand &MO, const MatcherState &State) const override;
30 bool testSimplePredicate(unsigned PredicateID) const override;
31 bool runCustomAction(unsigned FnID, const MatcherState &State, NewMIVector &OutMIs) const override;
32
33#endif // GET_GLOBALISEL_TEMPORARIES_DECL
34
35#ifdef GET_GLOBALISEL_TEMPORARIES_INIT
36
37, State(0),
38ExecInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers)
39
40#endif // GET_GLOBALISEL_TEMPORARIES_INIT
41
42#ifdef GET_GLOBALISEL_IMPL
43
44// LLT Objects.
45enum {
46 GILLT_s32,
47 GILLT_s64,
48 GILLT_i32,
49 GILLT_i64,
50 GILLT_f32,
51 GILLT_f64,
52 GILLT_v16s8,
53 GILLT_v8s16,
54 GILLT_v4s32,
55 GILLT_v2s64,
56 GILLT_v16i8,
57 GILLT_v8i16,
58 GILLT_v4i32,
59 GILLT_v2i64,
60 GILLT_v8f16,
61 GILLT_v4f32,
62 GILLT_v2f64,
63};
64const static size_t NumTypeObjects = 17;
65const static LLT TypeObjects[] = {
66 LLT::scalar(32),
67 LLT::scalar(64),
68 LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 32),
69 LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 64),
70 LLT(LLT::Kind::FLOAT, ElementCount::getFixed(0), 32, LLT::FpSemantics::S_IEEEsingle),
71 LLT(LLT::Kind::FLOAT, ElementCount::getFixed(0), 64, LLT::FpSemantics::S_IEEEdouble),
72 LLT::vector(ElementCount::getFixed(16), LLT::scalar(8)),
73 LLT::vector(ElementCount::getFixed(8), LLT::scalar(16)),
74 LLT::vector(ElementCount::getFixed(4), LLT::scalar(32)),
75 LLT::vector(ElementCount::getFixed(2), LLT::scalar(64)),
76 LLT::vector(ElementCount::getFixed(16), LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 8)),
77 LLT::vector(ElementCount::getFixed(8), LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 16)),
78 LLT::vector(ElementCount::getFixed(4), LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 32)),
79 LLT::vector(ElementCount::getFixed(2), LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 64)),
80 LLT::vector(ElementCount::getFixed(8), LLT(LLT::Kind::FLOAT, ElementCount::getFixed(0), 16, LLT::FpSemantics::S_IEEEhalf)),
81 LLT::vector(ElementCount::getFixed(4), LLT(LLT::Kind::FLOAT, ElementCount::getFixed(0), 32, LLT::FpSemantics::S_IEEEsingle)),
82 LLT::vector(ElementCount::getFixed(2), LLT(LLT::Kind::FLOAT, ElementCount::getFixed(0), 64, LLT::FpSemantics::S_IEEEdouble)),
83};
84
85// Bits for subtarget features that participate in instruction matching.
86enum SubtargetFeatureBits : uint8_t {
87 Feature_IsPICBit = 13,
88 Feature_IsNotPICBit = 12,
89 Feature_HasAddr32Bit = 9,
90 Feature_HasAddr64Bit = 11,
91 Feature_HasAtomicsBit = 10,
92 Feature_HasBulkMemoryOptBit = 8,
93 Feature_HasExceptionHandlingBit = 0,
94 Feature_HasFP16Bit = 5,
95 Feature_HasNontrappingFPToIntBit = 2,
96 Feature_NotHasNontrappingFPToIntBit = 3,
97 Feature_HasReferenceTypesBit = 7,
98 Feature_HasRelaxedSIMDBit = 6,
99 Feature_HasSignExtBit = 1,
100 Feature_HasSIMD128Bit = 4,
101};
102
103PredicateBitset WebAssemblyInstructionSelector::
104computeAvailableModuleFeatures(const WebAssemblySubtarget *Subtarget) const {
105 PredicateBitset Features{};
106 if (TM.isPositionIndependent())
107 Features.set(Feature_IsPICBit);
108 if (!TM.isPositionIndependent())
109 Features.set(Feature_IsNotPICBit);
110 if (!Subtarget->hasAddr64())
111 Features.set(Feature_HasAddr32Bit);
112 if (Subtarget->hasAddr64())
113 Features.set(Feature_HasAddr64Bit);
114 if (Subtarget->hasAtomics())
115 Features.set(Feature_HasAtomicsBit);
116 if (Subtarget->hasBulkMemoryOpt())
117 Features.set(Feature_HasBulkMemoryOptBit);
118 if (Subtarget->hasExceptionHandling())
119 Features.set(Feature_HasExceptionHandlingBit);
120 if (Subtarget->hasFP16())
121 Features.set(Feature_HasFP16Bit);
122 if (Subtarget->hasNontrappingFPToInt())
123 Features.set(Feature_HasNontrappingFPToIntBit);
124 if (!Subtarget->hasNontrappingFPToInt())
125 Features.set(Feature_NotHasNontrappingFPToIntBit);
126 if (Subtarget->hasReferenceTypes())
127 Features.set(Feature_HasReferenceTypesBit);
128 if (Subtarget->hasRelaxedSIMD())
129 Features.set(Feature_HasRelaxedSIMDBit);
130 if (Subtarget->hasSignExt())
131 Features.set(Feature_HasSignExtBit);
132 if (Subtarget->hasSIMD128())
133 Features.set(Feature_HasSIMD128Bit);
134 return Features;
135}
136
137void WebAssemblyInstructionSelector::setupGeneratedPerFunctionState(MachineFunction &MF) {
138 AvailableFunctionFeatures = computeAvailableFunctionFeatures((const WebAssemblySubtarget *)&MF.getSubtarget(), &MF);
139}
140PredicateBitset WebAssemblyInstructionSelector::
141computeAvailableFunctionFeatures(const WebAssemblySubtarget *Subtarget, const MachineFunction *MF) const {
142 PredicateBitset Features{};
143 return Features;
144}
145
146// Feature bitsets.
147enum {
148 GIFBS_Invalid,
149 GIFBS_HasAddr32,
150 GIFBS_HasAddr64,
151 GIFBS_HasFP16,
152 GIFBS_HasNontrappingFPToInt,
153 GIFBS_HasRelaxedSIMD,
154 GIFBS_HasSIMD128,
155 GIFBS_HasSignExt,
156 GIFBS_NotHasNontrappingFPToInt,
157 GIFBS_HasFP16_HasSIMD128,
158 GIFBS_HasRelaxedSIMD_HasSIMD128,
159};
160constexpr static PredicateBitset FeatureBitsets[] {
161 {}, // GIFBS_Invalid
162 {Feature_HasAddr32Bit, },
163 {Feature_HasAddr64Bit, },
164 {Feature_HasFP16Bit, },
165 {Feature_HasNontrappingFPToIntBit, },
166 {Feature_HasRelaxedSIMDBit, },
167 {Feature_HasSIMD128Bit, },
168 {Feature_HasSignExtBit, },
169 {Feature_NotHasNontrappingFPToIntBit, },
170 {Feature_HasFP16Bit, Feature_HasSIMD128Bit, },
171 {Feature_HasRelaxedSIMDBit, Feature_HasSIMD128Bit, },
172};
173
174// ComplexPattern predicates.
175enum {
176 GICP_Invalid,
177};
178// See constructor for table contents
179
180WebAssemblyInstructionSelector::ComplexMatcherMemFn
181WebAssemblyInstructionSelector::ComplexPredicateFns[] = {
182 nullptr, // GICP_Invalid
183};
184
185// PatFrag predicates.
186enum {
187 GICXXPred_MI_Predicate_ffloor_nnan = GICXXPred_Invalid + 1,
188 GICXXPred_MI_Predicate_or_disjoint,
189};
190bool WebAssemblyInstructionSelector::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI, const MatcherState &State) const {
191 const MachineFunction &MF = *MI.getParent()->getParent();
192 const MachineRegisterInfo &MRI = MF.getRegInfo();
193 const auto &Operands = State.RecordedOperands;
194 (void)Operands;
195 (void)MRI;
196 switch (PredicateID) {
197 case GICXXPred_MI_Predicate_ffloor_nnan: {
198
199 return MI.getFlag(MachineInstr::FmNoNans);
200
201 }
202 case GICXXPred_MI_Predicate_or_disjoint: {
203
204 return MI.getFlag(MachineInstr::Disjoint);
205
206 }
207 }
208 llvm_unreachable("Unknown predicate");
209 return false;
210}
211// PatFrag predicates.
212bool WebAssemblyInstructionSelector::testMOPredicate_MO(unsigned PredicateID, const MachineOperand & MO, const MatcherState &State) const {
213 const auto &Operands = State.RecordedOperands;
214 Register Reg = MO.getReg();
215 (void)Operands;
216 (void)Reg;
217 llvm_unreachable("Unknown predicate");
218 return false;
219}
220// PatFrag predicates.
221enum {
222 GICXXPred_I64_Predicate_ImmI8 = GICXXPred_Invalid + 1,
223 GICXXPred_I64_Predicate_ImmI16,
224 GICXXPred_I64_Predicate_LaneIdx2,
225 GICXXPred_I64_Predicate_LaneIdx4,
226 GICXXPred_I64_Predicate_LaneIdx8,
227 GICXXPred_I64_Predicate_LaneIdx16,
228 GICXXPred_I64_Predicate_LaneIdx32,
229};
230bool WebAssemblyInstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
231 switch (PredicateID) {
232 case GICXXPred_I64_Predicate_ImmI8: {
233 return -(1 << (8 - 1)) <= Imm && Imm < (1 << 8);
234 }
235 case GICXXPred_I64_Predicate_ImmI16: {
236 return -(1 << (16 - 1)) <= Imm && Imm < (1 << 16);
237 }
238 case GICXXPred_I64_Predicate_LaneIdx2: {
239 return 0 <= Imm && Imm < 2;
240 }
241 case GICXXPred_I64_Predicate_LaneIdx4: {
242 return 0 <= Imm && Imm < 4;
243 }
244 case GICXXPred_I64_Predicate_LaneIdx8: {
245 return 0 <= Imm && Imm < 8;
246 }
247 case GICXXPred_I64_Predicate_LaneIdx16: {
248 return 0 <= Imm && Imm < 16;
249 }
250 case GICXXPred_I64_Predicate_LaneIdx32: {
251 return 0 <= Imm && Imm < 32;
252 }
253 }
254 llvm_unreachable("Unknown predicate");
255 return false;
256}
257// PatFrag predicates.
258bool WebAssemblyInstructionSelector::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const {
259 llvm_unreachable("Unknown predicate");
260 return false;
261}
262// PatFrag predicates.
263bool WebAssemblyInstructionSelector::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const {
264 llvm_unreachable("Unknown predicate");
265 return false;
266}
267bool WebAssemblyInstructionSelector::testSimplePredicate(unsigned) const {
268 llvm_unreachable("WebAssemblyInstructionSelector does not support simple predicates!");
269 return false;
270}
271// Custom renderers.
272enum {
273 GICR_Invalid,
274};
275WebAssemblyInstructionSelector::CustomRendererFn
276WebAssemblyInstructionSelector::CustomRenderers[] = {
277 nullptr, // GICR_Invalid
278};
279
280bool WebAssemblyInstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const {
281 const PredicateBitset AvailableFeatures = getAvailableFeatures();
282 MachineIRBuilder B(I);
283 State.MIs.clear();
284 State.MIs.push_back(&I);
285
286 if (executeMatchTable(*this, State, ExecInfo, B, getMatchTable(), TII, MF->getRegInfo(), TRI, RBI, AvailableFeatures, &CoverageInfo)) {
287 return true;
288 }
289
290 return false;
291}
292
293bool WebAssemblyInstructionSelector::runCustomAction(unsigned, const MatcherState&, NewMIVector &) const {
294 llvm_unreachable("WebAssemblyInstructionSelector does not support custom C++ actions!");
295}
296#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
297#define GIMT_Encode2(Val) uint8_t(Val), uint8_t((Val) >> 8)
298#define GIMT_Encode4(Val) uint8_t(Val), uint8_t((Val) >> 8), uint8_t((Val) >> 16), uint8_t((Val) >> 24)
299#define GIMT_Encode8(Val) uint8_t(Val), uint8_t((Val) >> 8), uint8_t((Val) >> 16), uint8_t((Val) >> 24), uint8_t(uint64_t(Val) >> 32), uint8_t(uint64_t(Val) >> 40), uint8_t(uint64_t(Val) >> 48), uint8_t(uint64_t(Val) >> 56)
300#else
301#define GIMT_Encode2(Val) uint8_t((Val) >> 8), uint8_t(Val)
302#define GIMT_Encode4(Val) uint8_t((Val) >> 24), uint8_t((Val) >> 16), uint8_t((Val) >> 8), uint8_t(Val)
303#define GIMT_Encode8(Val) uint8_t(uint64_t(Val) >> 56), uint8_t(uint64_t(Val) >> 48), uint8_t(uint64_t(Val) >> 40), uint8_t(uint64_t(Val) >> 32), uint8_t((Val) >> 24), uint8_t((Val) >> 16), uint8_t((Val) >> 8), uint8_t(Val)
304#endif
305const uint8_t *WebAssemblyInstructionSelector::getMatchTable() const {
306 constexpr static uint8_t MatchTable0[] = {
307 /* 0 */ GIM_SwitchOpcode, /*MI*/0, /*[*/GIMT_Encode2(55), GIMT_Encode2(311), /*)*//*default:*//*Label 74*/ GIMT_Encode4(40280),
308 /* 10 */ /*TargetOpcode::G_ADD*//*Label 0*/ GIMT_Encode4(1034),
309 /* 14 */ /*TargetOpcode::G_SUB*//*Label 1*/ GIMT_Encode4(1482),
310 /* 18 */ /*TargetOpcode::G_MUL*//*Label 2*/ GIMT_Encode4(1944),
311 /* 22 */ /*TargetOpcode::G_SDIV*//*Label 3*/ GIMT_Encode4(2195),
312 /* 26 */ /*TargetOpcode::G_UDIV*//*Label 4*/ GIMT_Encode4(2289),
313 /* 30 */ /*TargetOpcode::G_SREM*//*Label 5*/ GIMT_Encode4(2383),
314 /* 34 */ /*TargetOpcode::G_UREM*//*Label 6*/ GIMT_Encode4(2477), GIMT_Encode4(0), GIMT_Encode4(0),
315 /* 46 */ /*TargetOpcode::G_AND*//*Label 7*/ GIMT_Encode4(2571),
316 /* 50 */ /*TargetOpcode::G_OR*//*Label 8*/ GIMT_Encode4(3749),
317 /* 54 */ /*TargetOpcode::G_XOR*//*Label 9*/ GIMT_Encode4(7415), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
318 /* 70 */ /*TargetOpcode::G_UAVGCEIL*//*Label 10*/ GIMT_Encode4(13745), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
319 /* 122 */ /*TargetOpcode::G_BUILD_VECTOR*//*Label 11*/ GIMT_Encode4(13839), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
320 /* 142 */ /*TargetOpcode::G_BITCAST*//*Label 12*/ GIMT_Encode4(14588), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
321 /* 158 */ /*TargetOpcode::G_INTRINSIC_TRUNC*//*Label 13*/ GIMT_Encode4(16042), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
322 /* 174 */ /*TargetOpcode::G_INTRINSIC_ROUNDEVEN*//*Label 14*/ GIMT_Encode4(16262), GIMT_Encode4(0), GIMT_Encode4(0),
323 /* 186 */ /*TargetOpcode::G_LOAD*//*Label 15*/ GIMT_Encode4(16468), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
324 /* 334 */ /*TargetOpcode::G_BRCOND*//*Label 16*/ GIMT_Encode4(16607), GIMT_Encode4(0), GIMT_Encode4(0),
325 /* 346 */ /*TargetOpcode::G_INTRINSIC*//*Label 17*/ GIMT_Encode4(16635),
326 /* 350 */ /*TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS*//*Label 18*/ GIMT_Encode4(19939), GIMT_Encode4(0), GIMT_Encode4(0),
327 /* 362 */ /*TargetOpcode::G_ANYEXT*//*Label 19*/ GIMT_Encode4(20188),
328 /* 366 */ /*TargetOpcode::G_TRUNC*//*Label 20*/ GIMT_Encode4(20221), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
329 /* 382 */ /*TargetOpcode::G_CONSTANT*//*Label 21*/ GIMT_Encode4(20254),
330 /* 386 */ /*TargetOpcode::G_FCONSTANT*//*Label 22*/ GIMT_Encode4(20320), GIMT_Encode4(0), GIMT_Encode4(0),
331 /* 398 */ /*TargetOpcode::G_SEXT*//*Label 23*/ GIMT_Encode4(20386),
332 /* 402 */ /*TargetOpcode::G_SEXT_INREG*//*Label 24*/ GIMT_Encode4(20419),
333 /* 406 */ /*TargetOpcode::G_ZEXT*//*Label 25*/ GIMT_Encode4(20625),
334 /* 410 */ /*TargetOpcode::G_SHL*//*Label 26*/ GIMT_Encode4(20658),
335 /* 414 */ /*TargetOpcode::G_LSHR*//*Label 27*/ GIMT_Encode4(20940),
336 /* 418 */ /*TargetOpcode::G_ASHR*//*Label 28*/ GIMT_Encode4(21222), GIMT_Encode4(0), GIMT_Encode4(0),
337 /* 430 */ /*TargetOpcode::G_ROTR*//*Label 29*/ GIMT_Encode4(21504),
338 /* 434 */ /*TargetOpcode::G_ROTL*//*Label 30*/ GIMT_Encode4(21706),
339 /* 438 */ /*TargetOpcode::G_ICMP*//*Label 31*/ GIMT_Encode4(21908),
340 /* 442 */ /*TargetOpcode::G_FCMP*//*Label 32*/ GIMT_Encode4(26096), GIMT_Encode4(0), GIMT_Encode4(0),
341 /* 454 */ /*TargetOpcode::G_SELECT*//*Label 33*/ GIMT_Encode4(27251), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
342 /* 506 */ /*TargetOpcode::G_UADDSAT*//*Label 34*/ GIMT_Encode4(32595),
343 /* 510 */ /*TargetOpcode::G_SADDSAT*//*Label 35*/ GIMT_Encode4(32693),
344 /* 514 */ /*TargetOpcode::G_USUBSAT*//*Label 36*/ GIMT_Encode4(32791),
345 /* 518 */ /*TargetOpcode::G_SSUBSAT*//*Label 37*/ GIMT_Encode4(32889), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
346 /* 562 */ /*TargetOpcode::G_FADD*//*Label 38*/ GIMT_Encode4(32987),
347 /* 566 */ /*TargetOpcode::G_FSUB*//*Label 39*/ GIMT_Encode4(33242),
348 /* 570 */ /*TargetOpcode::G_FMUL*//*Label 40*/ GIMT_Encode4(33497),
349 /* 574 */ /*TargetOpcode::G_FMA*//*Label 41*/ GIMT_Encode4(33752), GIMT_Encode4(0),
350 /* 582 */ /*TargetOpcode::G_FDIV*//*Label 42*/ GIMT_Encode4(33913), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
351 /* 634 */ /*TargetOpcode::G_FNEG*//*Label 43*/ GIMT_Encode4(34168),
352 /* 638 */ /*TargetOpcode::G_FPEXT*//*Label 44*/ GIMT_Encode4(34388),
353 /* 642 */ /*TargetOpcode::G_FPTRUNC*//*Label 45*/ GIMT_Encode4(34421),
354 /* 646 */ /*TargetOpcode::G_FPTOSI*//*Label 46*/ GIMT_Encode4(34454),
355 /* 650 */ /*TargetOpcode::G_FPTOUI*//*Label 47*/ GIMT_Encode4(34834),
356 /* 654 */ /*TargetOpcode::G_SITOFP*//*Label 48*/ GIMT_Encode4(35214),
357 /* 658 */ /*TargetOpcode::G_UITOFP*//*Label 49*/ GIMT_Encode4(35486),
358 /* 662 */ /*TargetOpcode::G_FPTOSI_SAT*//*Label 50*/ GIMT_Encode4(35758),
359 /* 666 */ /*TargetOpcode::G_FPTOUI_SAT*//*Label 51*/ GIMT_Encode4(36022),
360 /* 670 */ /*TargetOpcode::G_FABS*//*Label 52*/ GIMT_Encode4(36286),
361 /* 674 */ /*TargetOpcode::G_FCOPYSIGN*//*Label 53*/ GIMT_Encode4(36506), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
362 /* 702 */ /*TargetOpcode::G_FMINIMUM*//*Label 54*/ GIMT_Encode4(36754),
363 /* 706 */ /*TargetOpcode::G_FMAXIMUM*//*Label 55*/ GIMT_Encode4(37009), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
364 /* 758 */ /*TargetOpcode::G_SMIN*//*Label 56*/ GIMT_Encode4(37264),
365 /* 762 */ /*TargetOpcode::G_SMAX*//*Label 57*/ GIMT_Encode4(37405),
366 /* 766 */ /*TargetOpcode::G_UMIN*//*Label 58*/ GIMT_Encode4(37546),
367 /* 770 */ /*TargetOpcode::G_UMAX*//*Label 59*/ GIMT_Encode4(37687),
368 /* 774 */ /*TargetOpcode::G_ABS*//*Label 60*/ GIMT_Encode4(37828), GIMT_Encode4(0), GIMT_Encode4(0),
369 /* 786 */ /*TargetOpcode::G_BR*//*Label 61*/ GIMT_Encode4(37984), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
370 /* 806 */ /*TargetOpcode::G_INSERT_VECTOR_ELT*//*Label 62*/ GIMT_Encode4(38006), GIMT_Encode4(0), GIMT_Encode4(0),
371 /* 818 */ /*TargetOpcode::G_SPLAT_VECTOR*//*Label 63*/ GIMT_Encode4(38370), GIMT_Encode4(0), GIMT_Encode4(0),
372 /* 830 */ /*TargetOpcode::G_CTTZ*//*Label 64*/ GIMT_Encode4(38856), GIMT_Encode4(0),
373 /* 838 */ /*TargetOpcode::G_CTLZ*//*Label 65*/ GIMT_Encode4(38936), GIMT_Encode4(0), GIMT_Encode4(0),
374 /* 850 */ /*TargetOpcode::G_CTPOP*//*Label 66*/ GIMT_Encode4(39016), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
375 /* 866 */ /*TargetOpcode::G_FCEIL*//*Label 67*/ GIMT_Encode4(39156), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
376 /* 914 */ /*TargetOpcode::G_FSQRT*//*Label 68*/ GIMT_Encode4(39376),
377 /* 918 */ /*TargetOpcode::G_FFLOOR*//*Label 69*/ GIMT_Encode4(39596),
378 /* 922 */ /*TargetOpcode::G_FRINT*//*Label 70*/ GIMT_Encode4(39816),
379 /* 926 */ /*TargetOpcode::G_FNEARBYINT*//*Label 71*/ GIMT_Encode4(40022), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
380 /* 1026 */ /*TargetOpcode::G_TRAP*//*Label 72*/ GIMT_Encode4(40242),
381 /* 1030 */ /*TargetOpcode::G_DEBUGTRAP*//*Label 73*/ GIMT_Encode4(40261),
382 /* 1034 */ // Label 0: @1034
383 /* 1034 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(14), /*)*//*default:*//*Label 81*/ GIMT_Encode4(1481),
384 /* 1045 */ /*GILLT_i32*//*Label 75*/ GIMT_Encode4(1093),
385 /* 1049 */ /*GILLT_i64*//*Label 76*/ GIMT_Encode4(1130), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
386 /* 1077 */ /*GILLT_v16i8*//*Label 77*/ GIMT_Encode4(1167),
387 /* 1081 */ /*GILLT_v8i16*//*Label 78*/ GIMT_Encode4(1206),
388 /* 1085 */ /*GILLT_v4i32*//*Label 79*/ GIMT_Encode4(1245),
389 /* 1089 */ /*GILLT_v2i64*//*Label 80*/ GIMT_Encode4(1442),
390 /* 1093 */ // Label 75: @1093
391 /* 1093 */ GIM_Try, /*On fail goto*//*Label 82*/ GIMT_Encode4(1129), // Rule ID 64 //
392 /* 1098 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
393 /* 1101 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
394 /* 1104 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
395 /* 1108 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
396 /* 1112 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
397 /* 1116 */ // (add:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (ADD_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
398 /* 1116 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I32),
399 /* 1121 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
400 /* 1127 */ GIR_RootConstrainSelectedInstOperands,
401 /* 1128 */ // GIR_Coverage, 64,
402 /* 1128 */ GIR_Done,
403 /* 1129 */ // Label 82: @1129
404 /* 1129 */ GIM_Reject,
405 /* 1130 */ // Label 76: @1130
406 /* 1130 */ GIM_Try, /*On fail goto*//*Label 83*/ GIMT_Encode4(1166), // Rule ID 65 //
407 /* 1135 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
408 /* 1138 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
409 /* 1141 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
410 /* 1145 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
411 /* 1149 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
412 /* 1153 */ // (add:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (ADD_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
413 /* 1153 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I64),
414 /* 1158 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
415 /* 1164 */ GIR_RootConstrainSelectedInstOperands,
416 /* 1165 */ // GIR_Coverage, 65,
417 /* 1165 */ GIR_Done,
418 /* 1166 */ // Label 83: @1166
419 /* 1166 */ GIM_Reject,
420 /* 1167 */ // Label 77: @1167
421 /* 1167 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 84*/ GIMT_Encode4(1205), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 278 //
422 /* 1174 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
423 /* 1177 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
424 /* 1180 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
425 /* 1184 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
426 /* 1188 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
427 /* 1192 */ // (add:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (ADD_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
428 /* 1192 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I8x16),
429 /* 1197 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
430 /* 1203 */ GIR_RootConstrainSelectedInstOperands,
431 /* 1204 */ // GIR_Coverage, 278,
432 /* 1204 */ GIR_Done,
433 /* 1205 */ // Label 84: @1205
434 /* 1205 */ GIM_Reject,
435 /* 1206 */ // Label 78: @1206
436 /* 1206 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 85*/ GIMT_Encode4(1244), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 279 //
437 /* 1213 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
438 /* 1216 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
439 /* 1219 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
440 /* 1223 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
441 /* 1227 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
442 /* 1231 */ // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (ADD_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
443 /* 1231 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I16x8),
444 /* 1236 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
445 /* 1242 */ GIR_RootConstrainSelectedInstOperands,
446 /* 1243 */ // GIR_Coverage, 279,
447 /* 1243 */ GIR_Done,
448 /* 1244 */ // Label 85: @1244
449 /* 1244 */ GIM_Reject,
450 /* 1245 */ // Label 79: @1245
451 /* 1245 */ GIM_Try, /*On fail goto*//*Label 86*/ GIMT_Encode4(1441),
452 /* 1250 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
453 /* 1253 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
454 /* 1256 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
455 /* 1260 */ GIM_Try, /*On fail goto*//*Label 87*/ GIMT_Encode4(1335), // Rule ID 1336 //
456 /* 1265 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
457 /* 1269 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
458 /* 1273 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
459 /* 1276 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_signed),
460 /* 1281 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
461 /* 1285 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
462 /* 1289 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
463 /* 1293 */ GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
464 /* 1296 */ GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_signed),
465 /* 1301 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
466 /* 1305 */ GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v16i8,
467 /* 1309 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
468 /* 1313 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
469 /* 1315 */ // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 14604:{ *:[iPTR] }, (intrinsic_wo_chain:{ *:[v8i16] } 14633:{ *:[iPTR] }, v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs)), V128:{ *:[v4i32] }:$acc) => (RELAXED_DOT_ADD:{ *:[v4i32] } v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc)
470 /* 1315 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_ADD),
471 /* 1318 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
472 /* 1320 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // lhs
473 /* 1324 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // rhs
474 /* 1328 */ GIR_RootToRootCopy, /*OpIdx*/2, // acc
475 /* 1330 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
476 /* 1333 */ GIR_RootConstrainSelectedInstOperands,
477 /* 1334 */ // GIR_Coverage, 1336,
478 /* 1334 */ GIR_EraseRootFromParent_Done,
479 /* 1335 */ // Label 87: @1335
480 /* 1335 */ GIM_Try, /*On fail goto*//*Label 88*/ GIMT_Encode4(1440),
481 /* 1340 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
482 /* 1344 */ GIM_Try, /*On fail goto*//*Label 89*/ GIMT_Encode4(1415), // Rule ID 1828 //
483 /* 1349 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
484 /* 1353 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
485 /* 1357 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
486 /* 1360 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_signed),
487 /* 1365 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
488 /* 1369 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
489 /* 1373 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
490 /* 1377 */ GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
491 /* 1380 */ GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_signed),
492 /* 1385 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
493 /* 1389 */ GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v16i8,
494 /* 1393 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
495 /* 1395 */ // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$acc, (intrinsic_wo_chain:{ *:[v4i32] } 14604:{ *:[iPTR] }, (intrinsic_wo_chain:{ *:[v8i16] } 14633:{ *:[iPTR] }, v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs))) => (RELAXED_DOT_ADD:{ *:[v4i32] } v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc)
496 /* 1395 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_ADD),
497 /* 1398 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
498 /* 1400 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // lhs
499 /* 1404 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // rhs
500 /* 1408 */ GIR_RootToRootCopy, /*OpIdx*/1, // acc
501 /* 1410 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
502 /* 1413 */ GIR_RootConstrainSelectedInstOperands,
503 /* 1414 */ // GIR_Coverage, 1828,
504 /* 1414 */ GIR_EraseRootFromParent_Done,
505 /* 1415 */ // Label 89: @1415
506 /* 1415 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 90*/ GIMT_Encode4(1439), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 280 //
507 /* 1422 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
508 /* 1426 */ // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (ADD_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
509 /* 1426 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I32x4),
510 /* 1431 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
511 /* 1437 */ GIR_RootConstrainSelectedInstOperands,
512 /* 1438 */ // GIR_Coverage, 280,
513 /* 1438 */ GIR_Done,
514 /* 1439 */ // Label 90: @1439
515 /* 1439 */ GIM_Reject,
516 /* 1440 */ // Label 88: @1440
517 /* 1440 */ GIM_Reject,
518 /* 1441 */ // Label 86: @1441
519 /* 1441 */ GIM_Reject,
520 /* 1442 */ // Label 80: @1442
521 /* 1442 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 91*/ GIMT_Encode4(1480), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 281 //
522 /* 1449 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
523 /* 1452 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
524 /* 1455 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
525 /* 1459 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
526 /* 1463 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
527 /* 1467 */ // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (ADD_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
528 /* 1467 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I64x2),
529 /* 1472 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
530 /* 1478 */ GIR_RootConstrainSelectedInstOperands,
531 /* 1479 */ // GIR_Coverage, 281,
532 /* 1479 */ GIR_Done,
533 /* 1480 */ // Label 91: @1480
534 /* 1480 */ GIM_Reject,
535 /* 1481 */ // Label 81: @1481
536 /* 1481 */ GIM_Reject,
537 /* 1482 */ // Label 1: @1482
538 /* 1482 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(14), /*)*//*default:*//*Label 98*/ GIMT_Encode4(1943),
539 /* 1493 */ /*GILLT_i32*//*Label 92*/ GIMT_Encode4(1541),
540 /* 1497 */ /*GILLT_i64*//*Label 93*/ GIMT_Encode4(1578), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
541 /* 1525 */ /*GILLT_v16i8*//*Label 94*/ GIMT_Encode4(1615),
542 /* 1529 */ /*GILLT_v8i16*//*Label 95*/ GIMT_Encode4(1697),
543 /* 1533 */ /*GILLT_v4i32*//*Label 96*/ GIMT_Encode4(1779),
544 /* 1537 */ /*GILLT_v2i64*//*Label 97*/ GIMT_Encode4(1861),
545 /* 1541 */ // Label 92: @1541
546 /* 1541 */ GIM_Try, /*On fail goto*//*Label 99*/ GIMT_Encode4(1577), // Rule ID 66 //
547 /* 1546 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
548 /* 1549 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
549 /* 1552 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
550 /* 1556 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
551 /* 1560 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
552 /* 1564 */ // (sub:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SUB_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
553 /* 1564 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I32),
554 /* 1569 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
555 /* 1575 */ GIR_RootConstrainSelectedInstOperands,
556 /* 1576 */ // GIR_Coverage, 66,
557 /* 1576 */ GIR_Done,
558 /* 1577 */ // Label 99: @1577
559 /* 1577 */ GIM_Reject,
560 /* 1578 */ // Label 93: @1578
561 /* 1578 */ GIM_Try, /*On fail goto*//*Label 100*/ GIMT_Encode4(1614), // Rule ID 67 //
562 /* 1583 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
563 /* 1586 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
564 /* 1589 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
565 /* 1593 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
566 /* 1597 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
567 /* 1601 */ // (sub:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SUB_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
568 /* 1601 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I64),
569 /* 1606 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
570 /* 1612 */ GIR_RootConstrainSelectedInstOperands,
571 /* 1613 */ // GIR_Coverage, 67,
572 /* 1613 */ GIR_Done,
573 /* 1614 */ // Label 100: @1614
574 /* 1614 */ GIM_Reject,
575 /* 1615 */ // Label 94: @1615
576 /* 1615 */ GIM_Try, /*On fail goto*//*Label 101*/ GIMT_Encode4(1696),
577 /* 1620 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
578 /* 1623 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
579 /* 1626 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
580 /* 1630 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 102*/ GIMT_Encode4(1667), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 253 //
581 /* 1637 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
582 /* 1641 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
583 /* 1647 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
584 /* 1649 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
585 /* 1653 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
586 /* 1655 */ // (sub:{ *:[v16i8] } immAllZerosV:{ *:[v16i8] }, V128:{ *:[v16i8] }:$v) => (NEG_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$v)
587 /* 1655 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I8x16),
588 /* 1658 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
589 /* 1660 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
590 /* 1662 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
591 /* 1665 */ GIR_RootConstrainSelectedInstOperands,
592 /* 1666 */ // GIR_Coverage, 253,
593 /* 1666 */ GIR_EraseRootFromParent_Done,
594 /* 1667 */ // Label 102: @1667
595 /* 1667 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 103*/ GIMT_Encode4(1695), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 286 //
596 /* 1674 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
597 /* 1678 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
598 /* 1682 */ // (sub:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SUB_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
599 /* 1682 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I8x16),
600 /* 1687 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
601 /* 1693 */ GIR_RootConstrainSelectedInstOperands,
602 /* 1694 */ // GIR_Coverage, 286,
603 /* 1694 */ GIR_Done,
604 /* 1695 */ // Label 103: @1695
605 /* 1695 */ GIM_Reject,
606 /* 1696 */ // Label 101: @1696
607 /* 1696 */ GIM_Reject,
608 /* 1697 */ // Label 95: @1697
609 /* 1697 */ GIM_Try, /*On fail goto*//*Label 104*/ GIMT_Encode4(1778),
610 /* 1702 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
611 /* 1705 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
612 /* 1708 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
613 /* 1712 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 105*/ GIMT_Encode4(1749), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 254 //
614 /* 1719 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
615 /* 1723 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
616 /* 1729 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
617 /* 1731 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
618 /* 1735 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
619 /* 1737 */ // (sub:{ *:[v8i16] } immAllZerosV:{ *:[v8i16] }, V128:{ *:[v8i16] }:$v) => (NEG_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$v)
620 /* 1737 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I16x8),
621 /* 1740 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
622 /* 1742 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
623 /* 1744 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
624 /* 1747 */ GIR_RootConstrainSelectedInstOperands,
625 /* 1748 */ // GIR_Coverage, 254,
626 /* 1748 */ GIR_EraseRootFromParent_Done,
627 /* 1749 */ // Label 105: @1749
628 /* 1749 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 106*/ GIMT_Encode4(1777), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 287 //
629 /* 1756 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
630 /* 1760 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
631 /* 1764 */ // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SUB_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
632 /* 1764 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I16x8),
633 /* 1769 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
634 /* 1775 */ GIR_RootConstrainSelectedInstOperands,
635 /* 1776 */ // GIR_Coverage, 287,
636 /* 1776 */ GIR_Done,
637 /* 1777 */ // Label 106: @1777
638 /* 1777 */ GIM_Reject,
639 /* 1778 */ // Label 104: @1778
640 /* 1778 */ GIM_Reject,
641 /* 1779 */ // Label 96: @1779
642 /* 1779 */ GIM_Try, /*On fail goto*//*Label 107*/ GIMT_Encode4(1860),
643 /* 1784 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
644 /* 1787 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
645 /* 1790 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
646 /* 1794 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 108*/ GIMT_Encode4(1831), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 255 //
647 /* 1801 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
648 /* 1805 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
649 /* 1811 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
650 /* 1813 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
651 /* 1817 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
652 /* 1819 */ // (sub:{ *:[v4i32] } immAllZerosV:{ *:[v4i32] }, V128:{ *:[v4i32] }:$v) => (NEG_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$v)
653 /* 1819 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I32x4),
654 /* 1822 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
655 /* 1824 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
656 /* 1826 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
657 /* 1829 */ GIR_RootConstrainSelectedInstOperands,
658 /* 1830 */ // GIR_Coverage, 255,
659 /* 1830 */ GIR_EraseRootFromParent_Done,
660 /* 1831 */ // Label 108: @1831
661 /* 1831 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 109*/ GIMT_Encode4(1859), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 288 //
662 /* 1838 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
663 /* 1842 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
664 /* 1846 */ // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SUB_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
665 /* 1846 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I32x4),
666 /* 1851 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
667 /* 1857 */ GIR_RootConstrainSelectedInstOperands,
668 /* 1858 */ // GIR_Coverage, 288,
669 /* 1858 */ GIR_Done,
670 /* 1859 */ // Label 109: @1859
671 /* 1859 */ GIM_Reject,
672 /* 1860 */ // Label 107: @1860
673 /* 1860 */ GIM_Reject,
674 /* 1861 */ // Label 97: @1861
675 /* 1861 */ GIM_Try, /*On fail goto*//*Label 110*/ GIMT_Encode4(1942),
676 /* 1866 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
677 /* 1869 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
678 /* 1872 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
679 /* 1876 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 111*/ GIMT_Encode4(1913), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 256 //
680 /* 1883 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
681 /* 1887 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
682 /* 1893 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
683 /* 1895 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
684 /* 1899 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
685 /* 1901 */ // (sub:{ *:[v2i64] } immAllZerosV:{ *:[v2i64] }, V128:{ *:[v2i64] }:$v) => (NEG_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$v)
686 /* 1901 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I64x2),
687 /* 1904 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
688 /* 1906 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
689 /* 1908 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
690 /* 1911 */ GIR_RootConstrainSelectedInstOperands,
691 /* 1912 */ // GIR_Coverage, 256,
692 /* 1912 */ GIR_EraseRootFromParent_Done,
693 /* 1913 */ // Label 111: @1913
694 /* 1913 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 112*/ GIMT_Encode4(1941), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 289 //
695 /* 1920 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
696 /* 1924 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
697 /* 1928 */ // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SUB_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
698 /* 1928 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I64x2),
699 /* 1933 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
700 /* 1939 */ GIR_RootConstrainSelectedInstOperands,
701 /* 1940 */ // GIR_Coverage, 289,
702 /* 1940 */ GIR_Done,
703 /* 1941 */ // Label 112: @1941
704 /* 1941 */ GIM_Reject,
705 /* 1942 */ // Label 110: @1942
706 /* 1942 */ GIM_Reject,
707 /* 1943 */ // Label 98: @1943
708 /* 1943 */ GIM_Reject,
709 /* 1944 */ // Label 2: @1944
710 /* 1944 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(14), /*)*//*default:*//*Label 118*/ GIMT_Encode4(2194),
711 /* 1955 */ /*GILLT_i32*//*Label 113*/ GIMT_Encode4(2003),
712 /* 1959 */ /*GILLT_i64*//*Label 114*/ GIMT_Encode4(2040), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
713 /* 1991 */ /*GILLT_v8i16*//*Label 115*/ GIMT_Encode4(2077),
714 /* 1995 */ /*GILLT_v4i32*//*Label 116*/ GIMT_Encode4(2116),
715 /* 1999 */ /*GILLT_v2i64*//*Label 117*/ GIMT_Encode4(2155),
716 /* 2003 */ // Label 113: @2003
717 /* 2003 */ GIM_Try, /*On fail goto*//*Label 119*/ GIMT_Encode4(2039), // Rule ID 68 //
718 /* 2008 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
719 /* 2011 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
720 /* 2014 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
721 /* 2018 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
722 /* 2022 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
723 /* 2026 */ // (mul:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (MUL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
724 /* 2026 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I32),
725 /* 2031 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
726 /* 2037 */ GIR_RootConstrainSelectedInstOperands,
727 /* 2038 */ // GIR_Coverage, 68,
728 /* 2038 */ GIR_Done,
729 /* 2039 */ // Label 119: @2039
730 /* 2039 */ GIM_Reject,
731 /* 2040 */ // Label 114: @2040
732 /* 2040 */ GIM_Try, /*On fail goto*//*Label 120*/ GIMT_Encode4(2076), // Rule ID 69 //
733 /* 2045 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
734 /* 2048 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
735 /* 2051 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
736 /* 2055 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
737 /* 2059 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
738 /* 2063 */ // (mul:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (MUL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
739 /* 2063 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I64),
740 /* 2068 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
741 /* 2074 */ GIR_RootConstrainSelectedInstOperands,
742 /* 2075 */ // GIR_Coverage, 69,
743 /* 2075 */ GIR_Done,
744 /* 2076 */ // Label 120: @2076
745 /* 2076 */ GIM_Reject,
746 /* 2077 */ // Label 115: @2077
747 /* 2077 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 121*/ GIMT_Encode4(2115), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 294 //
748 /* 2084 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
749 /* 2087 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
750 /* 2090 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
751 /* 2094 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
752 /* 2098 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
753 /* 2102 */ // (mul:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MUL_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
754 /* 2102 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I16x8),
755 /* 2107 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
756 /* 2113 */ GIR_RootConstrainSelectedInstOperands,
757 /* 2114 */ // GIR_Coverage, 294,
758 /* 2114 */ GIR_Done,
759 /* 2115 */ // Label 121: @2115
760 /* 2115 */ GIM_Reject,
761 /* 2116 */ // Label 116: @2116
762 /* 2116 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 122*/ GIMT_Encode4(2154), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 295 //
763 /* 2123 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
764 /* 2126 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
765 /* 2129 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
766 /* 2133 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
767 /* 2137 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
768 /* 2141 */ // (mul:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MUL_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
769 /* 2141 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I32x4),
770 /* 2146 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
771 /* 2152 */ GIR_RootConstrainSelectedInstOperands,
772 /* 2153 */ // GIR_Coverage, 295,
773 /* 2153 */ GIR_Done,
774 /* 2154 */ // Label 122: @2154
775 /* 2154 */ GIM_Reject,
776 /* 2155 */ // Label 117: @2155
777 /* 2155 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 123*/ GIMT_Encode4(2193), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 296 //
778 /* 2162 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
779 /* 2165 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
780 /* 2168 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
781 /* 2172 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
782 /* 2176 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
783 /* 2180 */ // (mul:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (MUL_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
784 /* 2180 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I64x2),
785 /* 2185 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
786 /* 2191 */ GIR_RootConstrainSelectedInstOperands,
787 /* 2192 */ // GIR_Coverage, 296,
788 /* 2192 */ GIR_Done,
789 /* 2193 */ // Label 123: @2193
790 /* 2193 */ GIM_Reject,
791 /* 2194 */ // Label 118: @2194
792 /* 2194 */ GIM_Reject,
793 /* 2195 */ // Label 3: @2195
794 /* 2195 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 126*/ GIMT_Encode4(2288),
795 /* 2206 */ /*GILLT_i32*//*Label 124*/ GIMT_Encode4(2214),
796 /* 2210 */ /*GILLT_i64*//*Label 125*/ GIMT_Encode4(2251),
797 /* 2214 */ // Label 124: @2214
798 /* 2214 */ GIM_Try, /*On fail goto*//*Label 127*/ GIMT_Encode4(2250), // Rule ID 70 //
799 /* 2219 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
800 /* 2222 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
801 /* 2225 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
802 /* 2229 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
803 /* 2233 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
804 /* 2237 */ // (sdiv:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (DIV_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
805 /* 2237 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_S_I32),
806 /* 2242 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
807 /* 2248 */ GIR_RootConstrainSelectedInstOperands,
808 /* 2249 */ // GIR_Coverage, 70,
809 /* 2249 */ GIR_Done,
810 /* 2250 */ // Label 127: @2250
811 /* 2250 */ GIM_Reject,
812 /* 2251 */ // Label 125: @2251
813 /* 2251 */ GIM_Try, /*On fail goto*//*Label 128*/ GIMT_Encode4(2287), // Rule ID 71 //
814 /* 2256 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
815 /* 2259 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
816 /* 2262 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
817 /* 2266 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
818 /* 2270 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
819 /* 2274 */ // (sdiv:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (DIV_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
820 /* 2274 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_S_I64),
821 /* 2279 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
822 /* 2285 */ GIR_RootConstrainSelectedInstOperands,
823 /* 2286 */ // GIR_Coverage, 71,
824 /* 2286 */ GIR_Done,
825 /* 2287 */ // Label 128: @2287
826 /* 2287 */ GIM_Reject,
827 /* 2288 */ // Label 126: @2288
828 /* 2288 */ GIM_Reject,
829 /* 2289 */ // Label 4: @2289
830 /* 2289 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 131*/ GIMT_Encode4(2382),
831 /* 2300 */ /*GILLT_i32*//*Label 129*/ GIMT_Encode4(2308),
832 /* 2304 */ /*GILLT_i64*//*Label 130*/ GIMT_Encode4(2345),
833 /* 2308 */ // Label 129: @2308
834 /* 2308 */ GIM_Try, /*On fail goto*//*Label 132*/ GIMT_Encode4(2344), // Rule ID 72 //
835 /* 2313 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
836 /* 2316 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
837 /* 2319 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
838 /* 2323 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
839 /* 2327 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
840 /* 2331 */ // (udiv:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (DIV_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
841 /* 2331 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_U_I32),
842 /* 2336 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
843 /* 2342 */ GIR_RootConstrainSelectedInstOperands,
844 /* 2343 */ // GIR_Coverage, 72,
845 /* 2343 */ GIR_Done,
846 /* 2344 */ // Label 132: @2344
847 /* 2344 */ GIM_Reject,
848 /* 2345 */ // Label 130: @2345
849 /* 2345 */ GIM_Try, /*On fail goto*//*Label 133*/ GIMT_Encode4(2381), // Rule ID 73 //
850 /* 2350 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
851 /* 2353 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
852 /* 2356 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
853 /* 2360 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
854 /* 2364 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
855 /* 2368 */ // (udiv:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (DIV_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
856 /* 2368 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_U_I64),
857 /* 2373 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
858 /* 2379 */ GIR_RootConstrainSelectedInstOperands,
859 /* 2380 */ // GIR_Coverage, 73,
860 /* 2380 */ GIR_Done,
861 /* 2381 */ // Label 133: @2381
862 /* 2381 */ GIM_Reject,
863 /* 2382 */ // Label 131: @2382
864 /* 2382 */ GIM_Reject,
865 /* 2383 */ // Label 5: @2383
866 /* 2383 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 136*/ GIMT_Encode4(2476),
867 /* 2394 */ /*GILLT_i32*//*Label 134*/ GIMT_Encode4(2402),
868 /* 2398 */ /*GILLT_i64*//*Label 135*/ GIMT_Encode4(2439),
869 /* 2402 */ // Label 134: @2402
870 /* 2402 */ GIM_Try, /*On fail goto*//*Label 137*/ GIMT_Encode4(2438), // Rule ID 74 //
871 /* 2407 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
872 /* 2410 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
873 /* 2413 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
874 /* 2417 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
875 /* 2421 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
876 /* 2425 */ // (srem:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (REM_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
877 /* 2425 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_S_I32),
878 /* 2430 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
879 /* 2436 */ GIR_RootConstrainSelectedInstOperands,
880 /* 2437 */ // GIR_Coverage, 74,
881 /* 2437 */ GIR_Done,
882 /* 2438 */ // Label 137: @2438
883 /* 2438 */ GIM_Reject,
884 /* 2439 */ // Label 135: @2439
885 /* 2439 */ GIM_Try, /*On fail goto*//*Label 138*/ GIMT_Encode4(2475), // Rule ID 75 //
886 /* 2444 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
887 /* 2447 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
888 /* 2450 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
889 /* 2454 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
890 /* 2458 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
891 /* 2462 */ // (srem:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (REM_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
892 /* 2462 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_S_I64),
893 /* 2467 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
894 /* 2473 */ GIR_RootConstrainSelectedInstOperands,
895 /* 2474 */ // GIR_Coverage, 75,
896 /* 2474 */ GIR_Done,
897 /* 2475 */ // Label 138: @2475
898 /* 2475 */ GIM_Reject,
899 /* 2476 */ // Label 136: @2476
900 /* 2476 */ GIM_Reject,
901 /* 2477 */ // Label 6: @2477
902 /* 2477 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 141*/ GIMT_Encode4(2570),
903 /* 2488 */ /*GILLT_i32*//*Label 139*/ GIMT_Encode4(2496),
904 /* 2492 */ /*GILLT_i64*//*Label 140*/ GIMT_Encode4(2533),
905 /* 2496 */ // Label 139: @2496
906 /* 2496 */ GIM_Try, /*On fail goto*//*Label 142*/ GIMT_Encode4(2532), // Rule ID 76 //
907 /* 2501 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
908 /* 2504 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
909 /* 2507 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
910 /* 2511 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
911 /* 2515 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
912 /* 2519 */ // (urem:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (REM_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
913 /* 2519 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_U_I32),
914 /* 2524 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
915 /* 2530 */ GIR_RootConstrainSelectedInstOperands,
916 /* 2531 */ // GIR_Coverage, 76,
917 /* 2531 */ GIR_Done,
918 /* 2532 */ // Label 142: @2532
919 /* 2532 */ GIM_Reject,
920 /* 2533 */ // Label 140: @2533
921 /* 2533 */ GIM_Try, /*On fail goto*//*Label 143*/ GIMT_Encode4(2569), // Rule ID 77 //
922 /* 2538 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
923 /* 2541 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
924 /* 2544 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
925 /* 2548 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
926 /* 2552 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
927 /* 2556 */ // (urem:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (REM_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
928 /* 2556 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_U_I64),
929 /* 2561 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
930 /* 2567 */ GIR_RootConstrainSelectedInstOperands,
931 /* 2568 */ // GIR_Coverage, 77,
932 /* 2568 */ GIR_Done,
933 /* 2569 */ // Label 143: @2569
934 /* 2569 */ GIM_Reject,
935 /* 2570 */ // Label 141: @2570
936 /* 2570 */ GIM_Reject,
937 /* 2571 */ // Label 7: @2571
938 /* 2571 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(14), /*)*//*default:*//*Label 150*/ GIMT_Encode4(3748),
939 /* 2582 */ /*GILLT_i32*//*Label 144*/ GIMT_Encode4(2630),
940 /* 2586 */ /*GILLT_i64*//*Label 145*/ GIMT_Encode4(3051), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
941 /* 2614 */ /*GILLT_v16i8*//*Label 146*/ GIMT_Encode4(3088),
942 /* 2618 */ /*GILLT_v8i16*//*Label 147*/ GIMT_Encode4(3253),
943 /* 2622 */ /*GILLT_v4i32*//*Label 148*/ GIMT_Encode4(3418),
944 /* 2626 */ /*GILLT_v2i64*//*Label 149*/ GIMT_Encode4(3583),
945 /* 2630 */ // Label 144: @2630
946 /* 2630 */ GIM_Try, /*On fail goto*//*Label 151*/ GIMT_Encode4(3050),
947 /* 2635 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
948 /* 2638 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
949 /* 2641 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
950 /* 2645 */ GIM_Try, /*On fail goto*//*Label 152*/ GIMT_Encode4(3023),
951 /* 2650 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
952 /* 2654 */ GIM_Try, /*On fail goto*//*Label 153*/ GIMT_Encode4(2700), // Rule ID 1128 //
953 /* 2659 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
954 /* 2663 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
955 /* 2667 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
956 /* 2670 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
957 /* 2675 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
958 /* 2679 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
959 /* 2684 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
960 /* 2686 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x)
961 /* 2686 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
962 /* 2689 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
963 /* 2691 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
964 /* 2695 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
965 /* 2698 */ GIR_RootConstrainSelectedInstOperands,
966 /* 2699 */ // GIR_Coverage, 1128,
967 /* 2699 */ GIR_EraseRootFromParent_Done,
968 /* 2700 */ // Label 153: @2700
969 /* 2700 */ GIM_Try, /*On fail goto*//*Label 154*/ GIMT_Encode4(2746), // Rule ID 1133 //
970 /* 2705 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
971 /* 2709 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
972 /* 2713 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
973 /* 2716 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
974 /* 2721 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
975 /* 2725 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
976 /* 2730 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
977 /* 2732 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x)
978 /* 2732 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
979 /* 2735 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
980 /* 2737 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
981 /* 2741 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
982 /* 2744 */ GIR_RootConstrainSelectedInstOperands,
983 /* 2745 */ // GIR_Coverage, 1133,
984 /* 2745 */ GIR_EraseRootFromParent_Done,
985 /* 2746 */ // Label 154: @2746
986 /* 2746 */ GIM_Try, /*On fail goto*//*Label 155*/ GIMT_Encode4(2792), // Rule ID 1138 //
987 /* 2751 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
988 /* 2755 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
989 /* 2759 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
990 /* 2762 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
991 /* 2767 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
992 /* 2771 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
993 /* 2776 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
994 /* 2778 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x)
995 /* 2778 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
996 /* 2781 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
997 /* 2783 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
998 /* 2787 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
999 /* 2790 */ GIR_RootConstrainSelectedInstOperands,
1000 /* 2791 */ // GIR_Coverage, 1138,
1001 /* 2791 */ GIR_EraseRootFromParent_Done,
1002 /* 2792 */ // Label 155: @2792
1003 /* 2792 */ GIM_Try, /*On fail goto*//*Label 156*/ GIMT_Encode4(2838), // Rule ID 1143 //
1004 /* 2797 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1005 /* 2801 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1006 /* 2805 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1007 /* 2808 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
1008 /* 2813 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
1009 /* 2817 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1010 /* 2822 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1011 /* 2824 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x)
1012 /* 2824 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
1013 /* 2827 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1014 /* 2829 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1015 /* 2833 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1016 /* 2836 */ GIR_RootConstrainSelectedInstOperands,
1017 /* 2837 */ // GIR_Coverage, 1143,
1018 /* 2837 */ GIR_EraseRootFromParent_Done,
1019 /* 2838 */ // Label 156: @2838
1020 /* 2838 */ GIM_Try, /*On fail goto*//*Label 157*/ GIMT_Encode4(2884), // Rule ID 1148 //
1021 /* 2843 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1022 /* 2847 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1023 /* 2851 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1024 /* 2854 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1025 /* 2859 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1026 /* 2863 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1027 /* 2868 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1028 /* 2870 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x)
1029 /* 2870 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
1030 /* 2873 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1031 /* 2875 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1032 /* 2879 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1033 /* 2882 */ GIR_RootConstrainSelectedInstOperands,
1034 /* 2883 */ // GIR_Coverage, 1148,
1035 /* 2883 */ GIR_EraseRootFromParent_Done,
1036 /* 2884 */ // Label 157: @2884
1037 /* 2884 */ GIM_Try, /*On fail goto*//*Label 158*/ GIMT_Encode4(2930), // Rule ID 1153 //
1038 /* 2889 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1039 /* 2893 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1040 /* 2897 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1041 /* 2900 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1042 /* 2905 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1043 /* 2909 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1044 /* 2914 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1045 /* 2916 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x)
1046 /* 2916 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
1047 /* 2919 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1048 /* 2921 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1049 /* 2925 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1050 /* 2928 */ GIR_RootConstrainSelectedInstOperands,
1051 /* 2929 */ // GIR_Coverage, 1153,
1052 /* 2929 */ GIR_EraseRootFromParent_Done,
1053 /* 2930 */ // Label 158: @2930
1054 /* 2930 */ GIM_Try, /*On fail goto*//*Label 159*/ GIMT_Encode4(2976), // Rule ID 1158 //
1055 /* 2935 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1056 /* 2939 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1057 /* 2943 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1058 /* 2946 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1059 /* 2951 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
1060 /* 2955 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1061 /* 2960 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1062 /* 2962 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x)
1063 /* 2962 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
1064 /* 2965 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1065 /* 2967 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1066 /* 2971 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1067 /* 2974 */ GIR_RootConstrainSelectedInstOperands,
1068 /* 2975 */ // GIR_Coverage, 1158,
1069 /* 2975 */ GIR_EraseRootFromParent_Done,
1070 /* 2976 */ // Label 159: @2976
1071 /* 2976 */ GIM_Try, /*On fail goto*//*Label 160*/ GIMT_Encode4(3022), // Rule ID 1163 //
1072 /* 2981 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1073 /* 2985 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1074 /* 2989 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1075 /* 2992 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1076 /* 2997 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
1077 /* 3001 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1078 /* 3006 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1079 /* 3008 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x)
1080 /* 3008 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
1081 /* 3011 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1082 /* 3013 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1083 /* 3017 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1084 /* 3020 */ GIR_RootConstrainSelectedInstOperands,
1085 /* 3021 */ // GIR_Coverage, 1163,
1086 /* 3021 */ GIR_EraseRootFromParent_Done,
1087 /* 3022 */ // Label 160: @3022
1088 /* 3022 */ GIM_Reject,
1089 /* 3023 */ // Label 152: @3023
1090 /* 3023 */ GIM_Try, /*On fail goto*//*Label 161*/ GIMT_Encode4(3049), // Rule ID 78 //
1091 /* 3028 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1092 /* 3032 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1093 /* 3036 */ // (and:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (AND_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
1094 /* 3036 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND_I32),
1095 /* 3041 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1096 /* 3047 */ GIR_RootConstrainSelectedInstOperands,
1097 /* 3048 */ // GIR_Coverage, 78,
1098 /* 3048 */ GIR_Done,
1099 /* 3049 */ // Label 161: @3049
1100 /* 3049 */ GIM_Reject,
1101 /* 3050 */ // Label 151: @3050
1102 /* 3050 */ GIM_Reject,
1103 /* 3051 */ // Label 145: @3051
1104 /* 3051 */ GIM_Try, /*On fail goto*//*Label 162*/ GIMT_Encode4(3087), // Rule ID 79 //
1105 /* 3056 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
1106 /* 3059 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
1107 /* 3062 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1108 /* 3066 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1109 /* 3070 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1110 /* 3074 */ // (and:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (AND_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
1111 /* 3074 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND_I64),
1112 /* 3079 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1113 /* 3085 */ GIR_RootConstrainSelectedInstOperands,
1114 /* 3086 */ // GIR_Coverage, 79,
1115 /* 3086 */ GIR_Done,
1116 /* 3087 */ // Label 162: @3087
1117 /* 3087 */ GIM_Reject,
1118 /* 3088 */ // Label 146: @3088
1119 /* 3088 */ GIM_Try, /*On fail goto*//*Label 163*/ GIMT_Encode4(3252),
1120 /* 3093 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
1121 /* 3096 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
1122 /* 3099 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1123 /* 3103 */ GIM_Try, /*On fail goto*//*Label 164*/ GIMT_Encode4(3163), // Rule ID 1352 //
1124 /* 3108 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1125 /* 3112 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1126 /* 3116 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1127 /* 3120 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1128 /* 3124 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1129 /* 3129 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1130 /* 3133 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1131 /* 3139 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1132 /* 3141 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1133 /* 3145 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1134 /* 3147 */ // (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$rhs, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$lhs) => (ANDNOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1135 /* 3147 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1136 /* 3150 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1137 /* 3152 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1138 /* 3154 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1139 /* 3158 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1140 /* 3161 */ GIR_RootConstrainSelectedInstOperands,
1141 /* 3162 */ // GIR_Coverage, 1352,
1142 /* 3162 */ GIR_EraseRootFromParent_Done,
1143 /* 3163 */ // Label 164: @3163
1144 /* 3163 */ GIM_Try, /*On fail goto*//*Label 165*/ GIMT_Encode4(3251),
1145 /* 3168 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1146 /* 3172 */ GIM_Try, /*On fail goto*//*Label 166*/ GIMT_Encode4(3228), // Rule ID 1074 //
1147 /* 3177 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1148 /* 3181 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1149 /* 3185 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1150 /* 3189 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1151 /* 3193 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1152 /* 3198 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1153 /* 3202 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1154 /* 3208 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1155 /* 3210 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1156 /* 3212 */ // (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$rhs, immAllOnesV:{ *:[v16i8] })) => (ANDNOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1157 /* 3212 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1158 /* 3215 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1159 /* 3217 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1160 /* 3219 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1161 /* 3223 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1162 /* 3226 */ GIR_RootConstrainSelectedInstOperands,
1163 /* 3227 */ // GIR_Coverage, 1074,
1164 /* 3227 */ GIR_EraseRootFromParent_Done,
1165 /* 3228 */ // Label 166: @3228
1166 /* 3228 */ GIM_Try, /*On fail goto*//*Label 167*/ GIMT_Encode4(3250), // Rule ID 1058 //
1167 /* 3233 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1168 /* 3237 */ // (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (AND:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1169 /* 3237 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1170 /* 3242 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1171 /* 3248 */ GIR_RootConstrainSelectedInstOperands,
1172 /* 3249 */ // GIR_Coverage, 1058,
1173 /* 3249 */ GIR_Done,
1174 /* 3250 */ // Label 167: @3250
1175 /* 3250 */ GIM_Reject,
1176 /* 3251 */ // Label 165: @3251
1177 /* 3251 */ GIM_Reject,
1178 /* 3252 */ // Label 163: @3252
1179 /* 3252 */ GIM_Reject,
1180 /* 3253 */ // Label 147: @3253
1181 /* 3253 */ GIM_Try, /*On fail goto*//*Label 168*/ GIMT_Encode4(3417),
1182 /* 3258 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
1183 /* 3261 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
1184 /* 3264 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1185 /* 3268 */ GIM_Try, /*On fail goto*//*Label 169*/ GIMT_Encode4(3328), // Rule ID 1353 //
1186 /* 3273 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1187 /* 3277 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1188 /* 3281 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1189 /* 3285 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1190 /* 3289 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1191 /* 3294 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1192 /* 3298 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1193 /* 3304 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1194 /* 3306 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1195 /* 3310 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1196 /* 3312 */ // (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$rhs, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$lhs) => (ANDNOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1197 /* 3312 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1198 /* 3315 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1199 /* 3317 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1200 /* 3319 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1201 /* 3323 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1202 /* 3326 */ GIR_RootConstrainSelectedInstOperands,
1203 /* 3327 */ // GIR_Coverage, 1353,
1204 /* 3327 */ GIR_EraseRootFromParent_Done,
1205 /* 3328 */ // Label 169: @3328
1206 /* 3328 */ GIM_Try, /*On fail goto*//*Label 170*/ GIMT_Encode4(3416),
1207 /* 3333 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1208 /* 3337 */ GIM_Try, /*On fail goto*//*Label 171*/ GIMT_Encode4(3393), // Rule ID 1075 //
1209 /* 3342 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1210 /* 3346 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1211 /* 3350 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1212 /* 3354 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1213 /* 3358 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1214 /* 3363 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1215 /* 3367 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1216 /* 3373 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1217 /* 3375 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1218 /* 3377 */ // (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$rhs, immAllOnesV:{ *:[v8i16] })) => (ANDNOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1219 /* 3377 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1220 /* 3380 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1221 /* 3382 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1222 /* 3384 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1223 /* 3388 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1224 /* 3391 */ GIR_RootConstrainSelectedInstOperands,
1225 /* 3392 */ // GIR_Coverage, 1075,
1226 /* 3392 */ GIR_EraseRootFromParent_Done,
1227 /* 3393 */ // Label 171: @3393
1228 /* 3393 */ GIM_Try, /*On fail goto*//*Label 172*/ GIMT_Encode4(3415), // Rule ID 1063 //
1229 /* 3398 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1230 /* 3402 */ // (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (AND:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1231 /* 3402 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1232 /* 3407 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1233 /* 3413 */ GIR_RootConstrainSelectedInstOperands,
1234 /* 3414 */ // GIR_Coverage, 1063,
1235 /* 3414 */ GIR_Done,
1236 /* 3415 */ // Label 172: @3415
1237 /* 3415 */ GIM_Reject,
1238 /* 3416 */ // Label 170: @3416
1239 /* 3416 */ GIM_Reject,
1240 /* 3417 */ // Label 168: @3417
1241 /* 3417 */ GIM_Reject,
1242 /* 3418 */ // Label 148: @3418
1243 /* 3418 */ GIM_Try, /*On fail goto*//*Label 173*/ GIMT_Encode4(3582),
1244 /* 3423 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
1245 /* 3426 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
1246 /* 3429 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1247 /* 3433 */ GIM_Try, /*On fail goto*//*Label 174*/ GIMT_Encode4(3493), // Rule ID 1354 //
1248 /* 3438 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1249 /* 3442 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1250 /* 3446 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
1251 /* 3450 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
1252 /* 3454 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1253 /* 3459 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1254 /* 3463 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1255 /* 3469 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1256 /* 3471 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1257 /* 3475 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1258 /* 3477 */ // (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$rhs, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$lhs) => (ANDNOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
1259 /* 3477 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1260 /* 3480 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1261 /* 3482 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1262 /* 3484 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1263 /* 3488 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1264 /* 3491 */ GIR_RootConstrainSelectedInstOperands,
1265 /* 3492 */ // GIR_Coverage, 1354,
1266 /* 3492 */ GIR_EraseRootFromParent_Done,
1267 /* 3493 */ // Label 174: @3493
1268 /* 3493 */ GIM_Try, /*On fail goto*//*Label 175*/ GIMT_Encode4(3581),
1269 /* 3498 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1270 /* 3502 */ GIM_Try, /*On fail goto*//*Label 176*/ GIMT_Encode4(3558), // Rule ID 1076 //
1271 /* 3507 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1272 /* 3511 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1273 /* 3515 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
1274 /* 3519 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
1275 /* 3523 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1276 /* 3528 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1277 /* 3532 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1278 /* 3538 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1279 /* 3540 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1280 /* 3542 */ // (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$rhs, immAllOnesV:{ *:[v4i32] })) => (ANDNOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
1281 /* 3542 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1282 /* 3545 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1283 /* 3547 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1284 /* 3549 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1285 /* 3553 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1286 /* 3556 */ GIR_RootConstrainSelectedInstOperands,
1287 /* 3557 */ // GIR_Coverage, 1076,
1288 /* 3557 */ GIR_EraseRootFromParent_Done,
1289 /* 3558 */ // Label 176: @3558
1290 /* 3558 */ GIM_Try, /*On fail goto*//*Label 177*/ GIMT_Encode4(3580), // Rule ID 1064 //
1291 /* 3563 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1292 /* 3567 */ // (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (AND:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
1293 /* 3567 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1294 /* 3572 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1295 /* 3578 */ GIR_RootConstrainSelectedInstOperands,
1296 /* 3579 */ // GIR_Coverage, 1064,
1297 /* 3579 */ GIR_Done,
1298 /* 3580 */ // Label 177: @3580
1299 /* 3580 */ GIM_Reject,
1300 /* 3581 */ // Label 175: @3581
1301 /* 3581 */ GIM_Reject,
1302 /* 3582 */ // Label 173: @3582
1303 /* 3582 */ GIM_Reject,
1304 /* 3583 */ // Label 149: @3583
1305 /* 3583 */ GIM_Try, /*On fail goto*//*Label 178*/ GIMT_Encode4(3747),
1306 /* 3588 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
1307 /* 3591 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
1308 /* 3594 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1309 /* 3598 */ GIM_Try, /*On fail goto*//*Label 179*/ GIMT_Encode4(3658), // Rule ID 1355 //
1310 /* 3603 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1311 /* 3607 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1312 /* 3611 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
1313 /* 3615 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
1314 /* 3619 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1315 /* 3624 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1316 /* 3628 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1317 /* 3634 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1318 /* 3636 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1319 /* 3640 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1320 /* 3642 */ // (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$rhs, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$lhs) => (ANDNOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
1321 /* 3642 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1322 /* 3645 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1323 /* 3647 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1324 /* 3649 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1325 /* 3653 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1326 /* 3656 */ GIR_RootConstrainSelectedInstOperands,
1327 /* 3657 */ // GIR_Coverage, 1355,
1328 /* 3657 */ GIR_EraseRootFromParent_Done,
1329 /* 3658 */ // Label 179: @3658
1330 /* 3658 */ GIM_Try, /*On fail goto*//*Label 180*/ GIMT_Encode4(3746),
1331 /* 3663 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1332 /* 3667 */ GIM_Try, /*On fail goto*//*Label 181*/ GIMT_Encode4(3723), // Rule ID 1077 //
1333 /* 3672 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1334 /* 3676 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1335 /* 3680 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
1336 /* 3684 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
1337 /* 3688 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1338 /* 3693 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1339 /* 3697 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1340 /* 3703 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1341 /* 3705 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1342 /* 3707 */ // (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$rhs, immAllOnesV:{ *:[v2i64] })) => (ANDNOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
1343 /* 3707 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1344 /* 3710 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1345 /* 3712 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1346 /* 3714 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1347 /* 3718 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1348 /* 3721 */ GIR_RootConstrainSelectedInstOperands,
1349 /* 3722 */ // GIR_Coverage, 1077,
1350 /* 3722 */ GIR_EraseRootFromParent_Done,
1351 /* 3723 */ // Label 181: @3723
1352 /* 3723 */ GIM_Try, /*On fail goto*//*Label 182*/ GIMT_Encode4(3745), // Rule ID 1065 //
1353 /* 3728 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1354 /* 3732 */ // (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (AND:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
1355 /* 3732 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1356 /* 3737 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1357 /* 3743 */ GIR_RootConstrainSelectedInstOperands,
1358 /* 3744 */ // GIR_Coverage, 1065,
1359 /* 3744 */ GIR_Done,
1360 /* 3745 */ // Label 182: @3745
1361 /* 3745 */ GIM_Reject,
1362 /* 3746 */ // Label 180: @3746
1363 /* 3746 */ GIM_Reject,
1364 /* 3747 */ // Label 178: @3747
1365 /* 3747 */ GIM_Reject,
1366 /* 3748 */ // Label 150: @3748
1367 /* 3748 */ GIM_Reject,
1368 /* 3749 */ // Label 8: @3749
1369 /* 3749 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(14), /*)*//*default:*//*Label 189*/ GIMT_Encode4(7414),
1370 /* 3760 */ /*GILLT_i32*//*Label 183*/ GIMT_Encode4(3808),
1371 /* 3764 */ /*GILLT_i64*//*Label 184*/ GIMT_Encode4(3845), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
1372 /* 3792 */ /*GILLT_v16i8*//*Label 185*/ GIMT_Encode4(3882),
1373 /* 3796 */ /*GILLT_v8i16*//*Label 186*/ GIMT_Encode4(4765),
1374 /* 3800 */ /*GILLT_v4i32*//*Label 187*/ GIMT_Encode4(5648),
1375 /* 3804 */ /*GILLT_v2i64*//*Label 188*/ GIMT_Encode4(6531),
1376 /* 3808 */ // Label 183: @3808
1377 /* 3808 */ GIM_Try, /*On fail goto*//*Label 190*/ GIMT_Encode4(3844), // Rule ID 80 //
1378 /* 3813 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
1379 /* 3816 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
1380 /* 3819 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1381 /* 3823 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1382 /* 3827 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1383 /* 3831 */ // (or:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (OR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
1384 /* 3831 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR_I32),
1385 /* 3836 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1386 /* 3842 */ GIR_RootConstrainSelectedInstOperands,
1387 /* 3843 */ // GIR_Coverage, 80,
1388 /* 3843 */ GIR_Done,
1389 /* 3844 */ // Label 190: @3844
1390 /* 3844 */ GIM_Reject,
1391 /* 3845 */ // Label 184: @3845
1392 /* 3845 */ GIM_Try, /*On fail goto*//*Label 191*/ GIMT_Encode4(3881), // Rule ID 81 //
1393 /* 3850 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
1394 /* 3853 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
1395 /* 3856 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1396 /* 3860 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1397 /* 3864 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1398 /* 3868 */ // (or:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (OR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
1399 /* 3868 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR_I64),
1400 /* 3873 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1401 /* 3879 */ GIR_RootConstrainSelectedInstOperands,
1402 /* 3880 */ // GIR_Coverage, 81,
1403 /* 3880 */ GIR_Done,
1404 /* 3881 */ // Label 191: @3881
1405 /* 3881 */ GIM_Reject,
1406 /* 3882 */ // Label 185: @3882
1407 /* 3882 */ GIM_Try, /*On fail goto*//*Label 192*/ GIMT_Encode4(4764),
1408 /* 3887 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
1409 /* 3890 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
1410 /* 3893 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1411 /* 3897 */ GIM_Try, /*On fail goto*//*Label 193*/ GIMT_Encode4(4002), // Rule ID 1360 //
1412 /* 3902 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1413 /* 3906 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1414 /* 3910 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1415 /* 3914 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1416 /* 3918 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1417 /* 3922 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1418 /* 3926 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1419 /* 3930 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1420 /* 3934 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1421 /* 3939 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1422 /* 3943 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1423 /* 3949 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1424 /* 3951 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1425 /* 3956 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1426 /* 3960 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1427 /* 3964 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16i8,
1428 /* 3968 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1429 /* 3973 */ // MIs[4] c
1430 /* 3973 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1431 /* 3978 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1432 /* 3980 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1433 /* 3980 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1434 /* 3983 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1435 /* 3985 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1436 /* 3989 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1437 /* 3993 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1438 /* 3997 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1439 /* 4000 */ GIR_RootConstrainSelectedInstOperands,
1440 /* 4001 */ // GIR_Coverage, 1360,
1441 /* 4001 */ GIR_EraseRootFromParent_Done,
1442 /* 4002 */ // Label 193: @4002
1443 /* 4002 */ GIM_Try, /*On fail goto*//*Label 194*/ GIMT_Encode4(4107), // Rule ID 1359 //
1444 /* 4007 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1445 /* 4011 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1446 /* 4015 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1447 /* 4019 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1448 /* 4023 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1449 /* 4027 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1450 /* 4031 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1451 /* 4035 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1452 /* 4039 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1453 /* 4044 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1454 /* 4048 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1455 /* 4054 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1456 /* 4056 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1457 /* 4061 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1458 /* 4065 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1459 /* 4069 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16i8,
1460 /* 4073 */ // MIs[4] c
1461 /* 4073 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1462 /* 4078 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1463 /* 4083 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1464 /* 4085 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1465 /* 4085 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1466 /* 4088 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1467 /* 4090 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1468 /* 4094 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1469 /* 4098 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1470 /* 4102 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1471 /* 4105 */ GIR_RootConstrainSelectedInstOperands,
1472 /* 4106 */ // GIR_Coverage, 1359,
1473 /* 4106 */ GIR_EraseRootFromParent_Done,
1474 /* 4107 */ // Label 194: @4107
1475 /* 4107 */ GIM_Try, /*On fail goto*//*Label 195*/ GIMT_Encode4(4212), // Rule ID 1362 //
1476 /* 4112 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1477 /* 4116 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1478 /* 4120 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1479 /* 4124 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1480 /* 4128 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1481 /* 4133 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1482 /* 4137 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1483 /* 4141 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1484 /* 4145 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1485 /* 4149 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1486 /* 4154 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1487 /* 4158 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1488 /* 4164 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1489 /* 4166 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1490 /* 4170 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1491 /* 4174 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16i8,
1492 /* 4178 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1493 /* 4183 */ // MIs[4] c
1494 /* 4183 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1495 /* 4188 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1496 /* 4190 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1497 /* 4190 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1498 /* 4193 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1499 /* 4195 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1500 /* 4199 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1501 /* 4203 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1502 /* 4207 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1503 /* 4210 */ GIR_RootConstrainSelectedInstOperands,
1504 /* 4211 */ // GIR_Coverage, 1362,
1505 /* 4211 */ GIR_EraseRootFromParent_Done,
1506 /* 4212 */ // Label 195: @4212
1507 /* 4212 */ GIM_Try, /*On fail goto*//*Label 196*/ GIMT_Encode4(4317), // Rule ID 1361 //
1508 /* 4217 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1509 /* 4221 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1510 /* 4225 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1511 /* 4229 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1512 /* 4233 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1513 /* 4238 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1514 /* 4242 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1515 /* 4246 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1516 /* 4250 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1517 /* 4254 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1518 /* 4259 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1519 /* 4263 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1520 /* 4269 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1521 /* 4271 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1522 /* 4275 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1523 /* 4279 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16i8,
1524 /* 4283 */ // MIs[4] c
1525 /* 4283 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1526 /* 4288 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1527 /* 4293 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1528 /* 4295 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1529 /* 4295 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1530 /* 4298 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1531 /* 4300 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1532 /* 4304 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1533 /* 4308 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1534 /* 4312 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1535 /* 4315 */ GIR_RootConstrainSelectedInstOperands,
1536 /* 4316 */ // GIR_Coverage, 1361,
1537 /* 4316 */ GIR_EraseRootFromParent_Done,
1538 /* 4317 */ // Label 196: @4317
1539 /* 4317 */ GIM_Try, /*On fail goto*//*Label 197*/ GIMT_Encode4(4422), // Rule ID 1084 //
1540 /* 4322 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1541 /* 4326 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1542 /* 4330 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1543 /* 4334 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1544 /* 4338 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1545 /* 4343 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1546 /* 4348 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1547 /* 4352 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1548 /* 4356 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1549 /* 4360 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1550 /* 4364 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1551 /* 4368 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1552 /* 4372 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
1553 /* 4376 */ // MIs[3] c
1554 /* 4376 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1555 /* 4381 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1556 /* 4385 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1557 /* 4391 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1558 /* 4393 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1559 /* 4398 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1560 /* 4400 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1), (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1561 /* 4400 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1562 /* 4403 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1563 /* 4405 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1564 /* 4409 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1565 /* 4413 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1566 /* 4417 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1567 /* 4420 */ GIR_RootConstrainSelectedInstOperands,
1568 /* 4421 */ // GIR_Coverage, 1084,
1569 /* 4421 */ GIR_EraseRootFromParent_Done,
1570 /* 4422 */ // Label 197: @4422
1571 /* 4422 */ GIM_Try, /*On fail goto*//*Label 198*/ GIMT_Encode4(4527), // Rule ID 1357 //
1572 /* 4427 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1573 /* 4431 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1574 /* 4435 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1575 /* 4439 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1576 /* 4443 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1577 /* 4448 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1578 /* 4453 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1579 /* 4457 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1580 /* 4461 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1581 /* 4465 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1582 /* 4469 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1583 /* 4473 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1584 /* 4477 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
1585 /* 4481 */ // MIs[3] c
1586 /* 4481 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1587 /* 4486 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1588 /* 4490 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1589 /* 4496 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1590 /* 4498 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1591 /* 4503 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1592 /* 4505 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c), (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1593 /* 4505 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1594 /* 4508 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1595 /* 4510 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1596 /* 4514 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1597 /* 4518 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1598 /* 4522 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1599 /* 4525 */ GIR_RootConstrainSelectedInstOperands,
1600 /* 4526 */ // GIR_Coverage, 1357,
1601 /* 4526 */ GIR_EraseRootFromParent_Done,
1602 /* 4527 */ // Label 198: @4527
1603 /* 4527 */ GIM_Try, /*On fail goto*//*Label 199*/ GIMT_Encode4(4632), // Rule ID 1356 //
1604 /* 4532 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1605 /* 4536 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1606 /* 4540 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1607 /* 4544 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1608 /* 4548 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1609 /* 4553 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1610 /* 4558 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1611 /* 4562 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1612 /* 4566 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1613 /* 4570 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1614 /* 4574 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1615 /* 4579 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1616 /* 4583 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1617 /* 4587 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
1618 /* 4591 */ // MIs[3] c
1619 /* 4591 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1620 /* 4596 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1621 /* 4600 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1622 /* 4606 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1623 /* 4608 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1624 /* 4610 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1625 /* 4610 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1626 /* 4613 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1627 /* 4615 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1628 /* 4619 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1629 /* 4623 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1630 /* 4627 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1631 /* 4630 */ GIR_RootConstrainSelectedInstOperands,
1632 /* 4631 */ // GIR_Coverage, 1356,
1633 /* 4631 */ GIR_EraseRootFromParent_Done,
1634 /* 4632 */ // Label 199: @4632
1635 /* 4632 */ GIM_Try, /*On fail goto*//*Label 200*/ GIMT_Encode4(4737), // Rule ID 1358 //
1636 /* 4637 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1637 /* 4641 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1638 /* 4645 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1639 /* 4649 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1640 /* 4653 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1641 /* 4658 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1642 /* 4663 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1643 /* 4667 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1644 /* 4671 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1645 /* 4675 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1646 /* 4679 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1647 /* 4684 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1648 /* 4688 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1649 /* 4692 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
1650 /* 4696 */ // MIs[3] c
1651 /* 4696 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1652 /* 4701 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1653 /* 4705 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1654 /* 4711 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1655 /* 4713 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1656 /* 4715 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1657 /* 4715 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1658 /* 4718 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1659 /* 4720 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1660 /* 4724 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1661 /* 4728 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1662 /* 4732 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1663 /* 4735 */ GIR_RootConstrainSelectedInstOperands,
1664 /* 4736 */ // GIR_Coverage, 1358,
1665 /* 4736 */ GIR_EraseRootFromParent_Done,
1666 /* 4737 */ // Label 200: @4737
1667 /* 4737 */ GIM_Try, /*On fail goto*//*Label 201*/ GIMT_Encode4(4763), // Rule ID 1066 //
1668 /* 4742 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1669 /* 4746 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1670 /* 4750 */ // (or:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (OR:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1671 /* 4750 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
1672 /* 4755 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1673 /* 4761 */ GIR_RootConstrainSelectedInstOperands,
1674 /* 4762 */ // GIR_Coverage, 1066,
1675 /* 4762 */ GIR_Done,
1676 /* 4763 */ // Label 201: @4763
1677 /* 4763 */ GIM_Reject,
1678 /* 4764 */ // Label 192: @4764
1679 /* 4764 */ GIM_Reject,
1680 /* 4765 */ // Label 186: @4765
1681 /* 4765 */ GIM_Try, /*On fail goto*//*Label 202*/ GIMT_Encode4(5647),
1682 /* 4770 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
1683 /* 4773 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
1684 /* 4776 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1685 /* 4780 */ GIM_Try, /*On fail goto*//*Label 203*/ GIMT_Encode4(4885), // Rule ID 1367 //
1686 /* 4785 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1687 /* 4789 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1688 /* 4793 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1689 /* 4797 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1690 /* 4801 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1691 /* 4805 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1692 /* 4809 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1693 /* 4813 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1694 /* 4817 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1695 /* 4822 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1696 /* 4826 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1697 /* 4832 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1698 /* 4834 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1699 /* 4839 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1700 /* 4843 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1701 /* 4847 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8i16,
1702 /* 4851 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1703 /* 4856 */ // MIs[4] c
1704 /* 4856 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1705 /* 4861 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1706 /* 4863 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1707 /* 4863 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1708 /* 4866 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1709 /* 4868 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1710 /* 4872 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1711 /* 4876 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1712 /* 4880 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1713 /* 4883 */ GIR_RootConstrainSelectedInstOperands,
1714 /* 4884 */ // GIR_Coverage, 1367,
1715 /* 4884 */ GIR_EraseRootFromParent_Done,
1716 /* 4885 */ // Label 203: @4885
1717 /* 4885 */ GIM_Try, /*On fail goto*//*Label 204*/ GIMT_Encode4(4990), // Rule ID 1366 //
1718 /* 4890 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1719 /* 4894 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1720 /* 4898 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1721 /* 4902 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1722 /* 4906 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1723 /* 4910 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1724 /* 4914 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1725 /* 4918 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1726 /* 4922 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1727 /* 4927 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1728 /* 4931 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1729 /* 4937 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1730 /* 4939 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1731 /* 4944 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1732 /* 4948 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1733 /* 4952 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8i16,
1734 /* 4956 */ // MIs[4] c
1735 /* 4956 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1736 /* 4961 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1737 /* 4966 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1738 /* 4968 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1739 /* 4968 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1740 /* 4971 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1741 /* 4973 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1742 /* 4977 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1743 /* 4981 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1744 /* 4985 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1745 /* 4988 */ GIR_RootConstrainSelectedInstOperands,
1746 /* 4989 */ // GIR_Coverage, 1366,
1747 /* 4989 */ GIR_EraseRootFromParent_Done,
1748 /* 4990 */ // Label 204: @4990
1749 /* 4990 */ GIM_Try, /*On fail goto*//*Label 205*/ GIMT_Encode4(5095), // Rule ID 1369 //
1750 /* 4995 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1751 /* 4999 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1752 /* 5003 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1753 /* 5007 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1754 /* 5011 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1755 /* 5016 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1756 /* 5020 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1757 /* 5024 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1758 /* 5028 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1759 /* 5032 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1760 /* 5037 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1761 /* 5041 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1762 /* 5047 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1763 /* 5049 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1764 /* 5053 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1765 /* 5057 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8i16,
1766 /* 5061 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1767 /* 5066 */ // MIs[4] c
1768 /* 5066 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1769 /* 5071 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1770 /* 5073 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1771 /* 5073 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1772 /* 5076 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1773 /* 5078 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1774 /* 5082 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1775 /* 5086 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1776 /* 5090 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1777 /* 5093 */ GIR_RootConstrainSelectedInstOperands,
1778 /* 5094 */ // GIR_Coverage, 1369,
1779 /* 5094 */ GIR_EraseRootFromParent_Done,
1780 /* 5095 */ // Label 205: @5095
1781 /* 5095 */ GIM_Try, /*On fail goto*//*Label 206*/ GIMT_Encode4(5200), // Rule ID 1368 //
1782 /* 5100 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1783 /* 5104 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1784 /* 5108 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1785 /* 5112 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1786 /* 5116 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1787 /* 5121 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1788 /* 5125 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1789 /* 5129 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1790 /* 5133 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1791 /* 5137 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1792 /* 5142 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1793 /* 5146 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1794 /* 5152 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1795 /* 5154 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1796 /* 5158 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1797 /* 5162 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8i16,
1798 /* 5166 */ // MIs[4] c
1799 /* 5166 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1800 /* 5171 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1801 /* 5176 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1802 /* 5178 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1803 /* 5178 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1804 /* 5181 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1805 /* 5183 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1806 /* 5187 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1807 /* 5191 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1808 /* 5195 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1809 /* 5198 */ GIR_RootConstrainSelectedInstOperands,
1810 /* 5199 */ // GIR_Coverage, 1368,
1811 /* 5199 */ GIR_EraseRootFromParent_Done,
1812 /* 5200 */ // Label 206: @5200
1813 /* 5200 */ GIM_Try, /*On fail goto*//*Label 207*/ GIMT_Encode4(5305), // Rule ID 1085 //
1814 /* 5205 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1815 /* 5209 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1816 /* 5213 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1817 /* 5217 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1818 /* 5221 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1819 /* 5226 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1820 /* 5231 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1821 /* 5235 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1822 /* 5239 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1823 /* 5243 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1824 /* 5247 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1825 /* 5251 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1826 /* 5255 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
1827 /* 5259 */ // MIs[3] c
1828 /* 5259 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1829 /* 5264 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1830 /* 5268 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1831 /* 5274 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1832 /* 5276 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1833 /* 5281 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1834 /* 5283 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1), (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1835 /* 5283 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1836 /* 5286 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1837 /* 5288 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1838 /* 5292 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1839 /* 5296 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1840 /* 5300 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1841 /* 5303 */ GIR_RootConstrainSelectedInstOperands,
1842 /* 5304 */ // GIR_Coverage, 1085,
1843 /* 5304 */ GIR_EraseRootFromParent_Done,
1844 /* 5305 */ // Label 207: @5305
1845 /* 5305 */ GIM_Try, /*On fail goto*//*Label 208*/ GIMT_Encode4(5410), // Rule ID 1364 //
1846 /* 5310 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1847 /* 5314 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1848 /* 5318 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1849 /* 5322 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1850 /* 5326 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1851 /* 5331 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1852 /* 5336 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1853 /* 5340 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1854 /* 5344 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1855 /* 5348 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1856 /* 5352 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1857 /* 5356 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1858 /* 5360 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
1859 /* 5364 */ // MIs[3] c
1860 /* 5364 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1861 /* 5369 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1862 /* 5373 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1863 /* 5379 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1864 /* 5381 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1865 /* 5386 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1866 /* 5388 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c), (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1867 /* 5388 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1868 /* 5391 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1869 /* 5393 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1870 /* 5397 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1871 /* 5401 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1872 /* 5405 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1873 /* 5408 */ GIR_RootConstrainSelectedInstOperands,
1874 /* 5409 */ // GIR_Coverage, 1364,
1875 /* 5409 */ GIR_EraseRootFromParent_Done,
1876 /* 5410 */ // Label 208: @5410
1877 /* 5410 */ GIM_Try, /*On fail goto*//*Label 209*/ GIMT_Encode4(5515), // Rule ID 1363 //
1878 /* 5415 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1879 /* 5419 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1880 /* 5423 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1881 /* 5427 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1882 /* 5431 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1883 /* 5436 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1884 /* 5441 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1885 /* 5445 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1886 /* 5449 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1887 /* 5453 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1888 /* 5457 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1889 /* 5462 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1890 /* 5466 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1891 /* 5470 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
1892 /* 5474 */ // MIs[3] c
1893 /* 5474 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1894 /* 5479 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1895 /* 5483 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1896 /* 5489 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1897 /* 5491 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1898 /* 5493 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1899 /* 5493 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1900 /* 5496 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1901 /* 5498 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1902 /* 5502 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1903 /* 5506 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1904 /* 5510 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1905 /* 5513 */ GIR_RootConstrainSelectedInstOperands,
1906 /* 5514 */ // GIR_Coverage, 1363,
1907 /* 5514 */ GIR_EraseRootFromParent_Done,
1908 /* 5515 */ // Label 209: @5515
1909 /* 5515 */ GIM_Try, /*On fail goto*//*Label 210*/ GIMT_Encode4(5620), // Rule ID 1365 //
1910 /* 5520 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1911 /* 5524 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1912 /* 5528 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1913 /* 5532 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1914 /* 5536 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1915 /* 5541 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1916 /* 5546 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1917 /* 5550 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1918 /* 5554 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1919 /* 5558 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1920 /* 5562 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1921 /* 5567 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1922 /* 5571 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1923 /* 5575 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
1924 /* 5579 */ // MIs[3] c
1925 /* 5579 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1926 /* 5584 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1927 /* 5588 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1928 /* 5594 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1929 /* 5596 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1930 /* 5598 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1931 /* 5598 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1932 /* 5601 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1933 /* 5603 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1934 /* 5607 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1935 /* 5611 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1936 /* 5615 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1937 /* 5618 */ GIR_RootConstrainSelectedInstOperands,
1938 /* 5619 */ // GIR_Coverage, 1365,
1939 /* 5619 */ GIR_EraseRootFromParent_Done,
1940 /* 5620 */ // Label 210: @5620
1941 /* 5620 */ GIM_Try, /*On fail goto*//*Label 211*/ GIMT_Encode4(5646), // Rule ID 1067 //
1942 /* 5625 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1943 /* 5629 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1944 /* 5633 */ // (or:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (OR:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1945 /* 5633 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
1946 /* 5638 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1947 /* 5644 */ GIR_RootConstrainSelectedInstOperands,
1948 /* 5645 */ // GIR_Coverage, 1067,
1949 /* 5645 */ GIR_Done,
1950 /* 5646 */ // Label 211: @5646
1951 /* 5646 */ GIM_Reject,
1952 /* 5647 */ // Label 202: @5647
1953 /* 5647 */ GIM_Reject,
1954 /* 5648 */ // Label 187: @5648
1955 /* 5648 */ GIM_Try, /*On fail goto*//*Label 212*/ GIMT_Encode4(6530),
1956 /* 5653 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
1957 /* 5656 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
1958 /* 5659 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1959 /* 5663 */ GIM_Try, /*On fail goto*//*Label 213*/ GIMT_Encode4(5768), // Rule ID 1374 //
1960 /* 5668 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1961 /* 5672 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1962 /* 5676 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
1963 /* 5680 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
1964 /* 5684 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1965 /* 5688 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1966 /* 5692 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
1967 /* 5696 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
1968 /* 5700 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1969 /* 5705 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1970 /* 5709 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1971 /* 5715 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1972 /* 5717 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1973 /* 5722 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1974 /* 5726 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1975 /* 5730 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4i32,
1976 /* 5734 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1977 /* 5739 */ // MIs[4] c
1978 /* 5739 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1979 /* 5744 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1980 /* 5746 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
1981 /* 5746 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1982 /* 5749 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1983 /* 5751 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1984 /* 5755 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1985 /* 5759 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1986 /* 5763 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1987 /* 5766 */ GIR_RootConstrainSelectedInstOperands,
1988 /* 5767 */ // GIR_Coverage, 1374,
1989 /* 5767 */ GIR_EraseRootFromParent_Done,
1990 /* 5768 */ // Label 213: @5768
1991 /* 5768 */ GIM_Try, /*On fail goto*//*Label 214*/ GIMT_Encode4(5873), // Rule ID 1373 //
1992 /* 5773 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1993 /* 5777 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1994 /* 5781 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
1995 /* 5785 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
1996 /* 5789 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1997 /* 5793 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1998 /* 5797 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
1999 /* 5801 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2000 /* 5805 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2001 /* 5810 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2002 /* 5814 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2003 /* 5820 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2004 /* 5822 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2005 /* 5827 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2006 /* 5831 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2007 /* 5835 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4i32,
2008 /* 5839 */ // MIs[4] c
2009 /* 5839 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2010 /* 5844 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2011 /* 5849 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2012 /* 5851 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2013 /* 5851 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2014 /* 5854 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2015 /* 5856 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2016 /* 5860 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
2017 /* 5864 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2018 /* 5868 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2019 /* 5871 */ GIR_RootConstrainSelectedInstOperands,
2020 /* 5872 */ // GIR_Coverage, 1373,
2021 /* 5872 */ GIR_EraseRootFromParent_Done,
2022 /* 5873 */ // Label 214: @5873
2023 /* 5873 */ GIM_Try, /*On fail goto*//*Label 215*/ GIMT_Encode4(5978), // Rule ID 1376 //
2024 /* 5878 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2025 /* 5882 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2026 /* 5886 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2027 /* 5890 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2028 /* 5894 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2029 /* 5899 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2030 /* 5903 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2031 /* 5907 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2032 /* 5911 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2033 /* 5915 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2034 /* 5920 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2035 /* 5924 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2036 /* 5930 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2037 /* 5932 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2038 /* 5936 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2039 /* 5940 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4i32,
2040 /* 5944 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2041 /* 5949 */ // MIs[4] c
2042 /* 5949 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2043 /* 5954 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2044 /* 5956 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2045 /* 5956 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2046 /* 5959 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2047 /* 5961 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2048 /* 5965 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2049 /* 5969 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2050 /* 5973 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2051 /* 5976 */ GIR_RootConstrainSelectedInstOperands,
2052 /* 5977 */ // GIR_Coverage, 1376,
2053 /* 5977 */ GIR_EraseRootFromParent_Done,
2054 /* 5978 */ // Label 215: @5978
2055 /* 5978 */ GIM_Try, /*On fail goto*//*Label 216*/ GIMT_Encode4(6083), // Rule ID 1375 //
2056 /* 5983 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2057 /* 5987 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2058 /* 5991 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2059 /* 5995 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2060 /* 5999 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2061 /* 6004 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2062 /* 6008 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2063 /* 6012 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2064 /* 6016 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2065 /* 6020 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2066 /* 6025 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2067 /* 6029 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2068 /* 6035 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2069 /* 6037 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2070 /* 6041 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2071 /* 6045 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4i32,
2072 /* 6049 */ // MIs[4] c
2073 /* 6049 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2074 /* 6054 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2075 /* 6059 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2076 /* 6061 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2077 /* 6061 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2078 /* 6064 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2079 /* 6066 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2080 /* 6070 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2081 /* 6074 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2082 /* 6078 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2083 /* 6081 */ GIR_RootConstrainSelectedInstOperands,
2084 /* 6082 */ // GIR_Coverage, 1375,
2085 /* 6082 */ GIR_EraseRootFromParent_Done,
2086 /* 6083 */ // Label 216: @6083
2087 /* 6083 */ GIM_Try, /*On fail goto*//*Label 217*/ GIMT_Encode4(6188), // Rule ID 1086 //
2088 /* 6088 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2089 /* 6092 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2090 /* 6096 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2091 /* 6100 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2092 /* 6104 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2093 /* 6109 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2094 /* 6114 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2095 /* 6118 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2096 /* 6122 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2097 /* 6126 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2098 /* 6130 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2099 /* 6134 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2100 /* 6138 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
2101 /* 6142 */ // MIs[3] c
2102 /* 6142 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2103 /* 6147 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2104 /* 6151 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2105 /* 6157 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2106 /* 6159 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2107 /* 6164 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2108 /* 6166 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1), (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2109 /* 6166 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2110 /* 6169 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2111 /* 6171 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2112 /* 6175 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2113 /* 6179 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2114 /* 6183 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2115 /* 6186 */ GIR_RootConstrainSelectedInstOperands,
2116 /* 6187 */ // GIR_Coverage, 1086,
2117 /* 6187 */ GIR_EraseRootFromParent_Done,
2118 /* 6188 */ // Label 217: @6188
2119 /* 6188 */ GIM_Try, /*On fail goto*//*Label 218*/ GIMT_Encode4(6293), // Rule ID 1371 //
2120 /* 6193 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2121 /* 6197 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2122 /* 6201 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2123 /* 6205 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2124 /* 6209 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2125 /* 6214 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2126 /* 6219 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2127 /* 6223 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2128 /* 6227 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2129 /* 6231 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2130 /* 6235 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2131 /* 6239 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2132 /* 6243 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
2133 /* 6247 */ // MIs[3] c
2134 /* 6247 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2135 /* 6252 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2136 /* 6256 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2137 /* 6262 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2138 /* 6264 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2139 /* 6269 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2140 /* 6271 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c), (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2141 /* 6271 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2142 /* 6274 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2143 /* 6276 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2144 /* 6280 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2145 /* 6284 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2146 /* 6288 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2147 /* 6291 */ GIR_RootConstrainSelectedInstOperands,
2148 /* 6292 */ // GIR_Coverage, 1371,
2149 /* 6292 */ GIR_EraseRootFromParent_Done,
2150 /* 6293 */ // Label 218: @6293
2151 /* 6293 */ GIM_Try, /*On fail goto*//*Label 219*/ GIMT_Encode4(6398), // Rule ID 1370 //
2152 /* 6298 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2153 /* 6302 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2154 /* 6306 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2155 /* 6310 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2156 /* 6314 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2157 /* 6319 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2158 /* 6324 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2159 /* 6328 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2160 /* 6332 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2161 /* 6336 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2162 /* 6340 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2163 /* 6345 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2164 /* 6349 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2165 /* 6353 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
2166 /* 6357 */ // MIs[3] c
2167 /* 6357 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2168 /* 6362 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2169 /* 6366 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2170 /* 6372 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2171 /* 6374 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2172 /* 6376 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2173 /* 6376 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2174 /* 6379 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2175 /* 6381 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2176 /* 6385 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2177 /* 6389 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2178 /* 6393 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2179 /* 6396 */ GIR_RootConstrainSelectedInstOperands,
2180 /* 6397 */ // GIR_Coverage, 1370,
2181 /* 6397 */ GIR_EraseRootFromParent_Done,
2182 /* 6398 */ // Label 219: @6398
2183 /* 6398 */ GIM_Try, /*On fail goto*//*Label 220*/ GIMT_Encode4(6503), // Rule ID 1372 //
2184 /* 6403 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2185 /* 6407 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2186 /* 6411 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2187 /* 6415 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2188 /* 6419 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2189 /* 6424 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2190 /* 6429 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2191 /* 6433 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2192 /* 6437 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2193 /* 6441 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2194 /* 6445 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2195 /* 6450 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2196 /* 6454 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2197 /* 6458 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
2198 /* 6462 */ // MIs[3] c
2199 /* 6462 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2200 /* 6467 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2201 /* 6471 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2202 /* 6477 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2203 /* 6479 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2204 /* 6481 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2205 /* 6481 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2206 /* 6484 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2207 /* 6486 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2208 /* 6490 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2209 /* 6494 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2210 /* 6498 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2211 /* 6501 */ GIR_RootConstrainSelectedInstOperands,
2212 /* 6502 */ // GIR_Coverage, 1372,
2213 /* 6502 */ GIR_EraseRootFromParent_Done,
2214 /* 6503 */ // Label 220: @6503
2215 /* 6503 */ GIM_Try, /*On fail goto*//*Label 221*/ GIMT_Encode4(6529), // Rule ID 1068 //
2216 /* 6508 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2217 /* 6512 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2218 /* 6516 */ // (or:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (OR:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
2219 /* 6516 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
2220 /* 6521 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2221 /* 6527 */ GIR_RootConstrainSelectedInstOperands,
2222 /* 6528 */ // GIR_Coverage, 1068,
2223 /* 6528 */ GIR_Done,
2224 /* 6529 */ // Label 221: @6529
2225 /* 6529 */ GIM_Reject,
2226 /* 6530 */ // Label 212: @6530
2227 /* 6530 */ GIM_Reject,
2228 /* 6531 */ // Label 188: @6531
2229 /* 6531 */ GIM_Try, /*On fail goto*//*Label 222*/ GIMT_Encode4(7413),
2230 /* 6536 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
2231 /* 6539 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
2232 /* 6542 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2233 /* 6546 */ GIM_Try, /*On fail goto*//*Label 223*/ GIMT_Encode4(6651), // Rule ID 1381 //
2234 /* 6551 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2235 /* 6555 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2236 /* 6559 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2237 /* 6563 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2238 /* 6567 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2239 /* 6571 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2240 /* 6575 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2241 /* 6579 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2242 /* 6583 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2243 /* 6588 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2244 /* 6592 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2245 /* 6598 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2246 /* 6600 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2247 /* 6605 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2248 /* 6609 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2249 /* 6613 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2i64,
2250 /* 6617 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2251 /* 6622 */ // MIs[4] c
2252 /* 6622 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2253 /* 6627 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2254 /* 6629 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2255 /* 6629 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2256 /* 6632 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2257 /* 6634 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2258 /* 6638 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
2259 /* 6642 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2260 /* 6646 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2261 /* 6649 */ GIR_RootConstrainSelectedInstOperands,
2262 /* 6650 */ // GIR_Coverage, 1381,
2263 /* 6650 */ GIR_EraseRootFromParent_Done,
2264 /* 6651 */ // Label 223: @6651
2265 /* 6651 */ GIM_Try, /*On fail goto*//*Label 224*/ GIMT_Encode4(6756), // Rule ID 1380 //
2266 /* 6656 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2267 /* 6660 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2268 /* 6664 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2269 /* 6668 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2270 /* 6672 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2271 /* 6676 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2272 /* 6680 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2273 /* 6684 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2274 /* 6688 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2275 /* 6693 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2276 /* 6697 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2277 /* 6703 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2278 /* 6705 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2279 /* 6710 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2280 /* 6714 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2281 /* 6718 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2i64,
2282 /* 6722 */ // MIs[4] c
2283 /* 6722 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2284 /* 6727 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2285 /* 6732 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2286 /* 6734 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2287 /* 6734 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2288 /* 6737 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2289 /* 6739 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2290 /* 6743 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
2291 /* 6747 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2292 /* 6751 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2293 /* 6754 */ GIR_RootConstrainSelectedInstOperands,
2294 /* 6755 */ // GIR_Coverage, 1380,
2295 /* 6755 */ GIR_EraseRootFromParent_Done,
2296 /* 6756 */ // Label 224: @6756
2297 /* 6756 */ GIM_Try, /*On fail goto*//*Label 225*/ GIMT_Encode4(6861), // Rule ID 1383 //
2298 /* 6761 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2299 /* 6765 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2300 /* 6769 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2301 /* 6773 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2302 /* 6777 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2303 /* 6782 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2304 /* 6786 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2305 /* 6790 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2306 /* 6794 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2307 /* 6798 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2308 /* 6803 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2309 /* 6807 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2310 /* 6813 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2311 /* 6815 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2312 /* 6819 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2313 /* 6823 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2i64,
2314 /* 6827 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2315 /* 6832 */ // MIs[4] c
2316 /* 6832 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2317 /* 6837 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2318 /* 6839 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2319 /* 6839 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2320 /* 6842 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2321 /* 6844 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2322 /* 6848 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2323 /* 6852 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2324 /* 6856 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2325 /* 6859 */ GIR_RootConstrainSelectedInstOperands,
2326 /* 6860 */ // GIR_Coverage, 1383,
2327 /* 6860 */ GIR_EraseRootFromParent_Done,
2328 /* 6861 */ // Label 225: @6861
2329 /* 6861 */ GIM_Try, /*On fail goto*//*Label 226*/ GIMT_Encode4(6966), // Rule ID 1382 //
2330 /* 6866 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2331 /* 6870 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2332 /* 6874 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2333 /* 6878 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2334 /* 6882 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2335 /* 6887 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2336 /* 6891 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2337 /* 6895 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2338 /* 6899 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2339 /* 6903 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2340 /* 6908 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2341 /* 6912 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2342 /* 6918 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2343 /* 6920 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2344 /* 6924 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2345 /* 6928 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2i64,
2346 /* 6932 */ // MIs[4] c
2347 /* 6932 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2348 /* 6937 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2349 /* 6942 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2350 /* 6944 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2351 /* 6944 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2352 /* 6947 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2353 /* 6949 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2354 /* 6953 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2355 /* 6957 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2356 /* 6961 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2357 /* 6964 */ GIR_RootConstrainSelectedInstOperands,
2358 /* 6965 */ // GIR_Coverage, 1382,
2359 /* 6965 */ GIR_EraseRootFromParent_Done,
2360 /* 6966 */ // Label 226: @6966
2361 /* 6966 */ GIM_Try, /*On fail goto*//*Label 227*/ GIMT_Encode4(7071), // Rule ID 1087 //
2362 /* 6971 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2363 /* 6975 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2364 /* 6979 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2365 /* 6983 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2366 /* 6987 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2367 /* 6992 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2368 /* 6997 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2369 /* 7001 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2370 /* 7005 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2371 /* 7009 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2372 /* 7013 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2373 /* 7017 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2374 /* 7021 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
2375 /* 7025 */ // MIs[3] c
2376 /* 7025 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2377 /* 7030 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2378 /* 7034 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2379 /* 7040 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2380 /* 7042 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2381 /* 7047 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2382 /* 7049 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1), (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2383 /* 7049 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2384 /* 7052 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2385 /* 7054 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2386 /* 7058 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2387 /* 7062 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2388 /* 7066 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2389 /* 7069 */ GIR_RootConstrainSelectedInstOperands,
2390 /* 7070 */ // GIR_Coverage, 1087,
2391 /* 7070 */ GIR_EraseRootFromParent_Done,
2392 /* 7071 */ // Label 227: @7071
2393 /* 7071 */ GIM_Try, /*On fail goto*//*Label 228*/ GIMT_Encode4(7176), // Rule ID 1378 //
2394 /* 7076 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2395 /* 7080 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2396 /* 7084 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2397 /* 7088 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2398 /* 7092 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2399 /* 7097 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2400 /* 7102 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2401 /* 7106 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2402 /* 7110 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2403 /* 7114 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2404 /* 7118 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2405 /* 7122 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2406 /* 7126 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
2407 /* 7130 */ // MIs[3] c
2408 /* 7130 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2409 /* 7135 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2410 /* 7139 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2411 /* 7145 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2412 /* 7147 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2413 /* 7152 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2414 /* 7154 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c), (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2415 /* 7154 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2416 /* 7157 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2417 /* 7159 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2418 /* 7163 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2419 /* 7167 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2420 /* 7171 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2421 /* 7174 */ GIR_RootConstrainSelectedInstOperands,
2422 /* 7175 */ // GIR_Coverage, 1378,
2423 /* 7175 */ GIR_EraseRootFromParent_Done,
2424 /* 7176 */ // Label 228: @7176
2425 /* 7176 */ GIM_Try, /*On fail goto*//*Label 229*/ GIMT_Encode4(7281), // Rule ID 1377 //
2426 /* 7181 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2427 /* 7185 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2428 /* 7189 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2429 /* 7193 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2430 /* 7197 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2431 /* 7202 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2432 /* 7207 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2433 /* 7211 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2434 /* 7215 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2435 /* 7219 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2436 /* 7223 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2437 /* 7228 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2438 /* 7232 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2439 /* 7236 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
2440 /* 7240 */ // MIs[3] c
2441 /* 7240 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2442 /* 7245 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2443 /* 7249 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2444 /* 7255 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2445 /* 7257 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2446 /* 7259 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2447 /* 7259 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2448 /* 7262 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2449 /* 7264 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2450 /* 7268 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2451 /* 7272 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2452 /* 7276 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2453 /* 7279 */ GIR_RootConstrainSelectedInstOperands,
2454 /* 7280 */ // GIR_Coverage, 1377,
2455 /* 7280 */ GIR_EraseRootFromParent_Done,
2456 /* 7281 */ // Label 229: @7281
2457 /* 7281 */ GIM_Try, /*On fail goto*//*Label 230*/ GIMT_Encode4(7386), // Rule ID 1379 //
2458 /* 7286 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2459 /* 7290 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2460 /* 7294 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2461 /* 7298 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2462 /* 7302 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2463 /* 7307 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2464 /* 7312 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2465 /* 7316 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2466 /* 7320 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2467 /* 7324 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2468 /* 7328 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2469 /* 7333 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2470 /* 7337 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2471 /* 7341 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
2472 /* 7345 */ // MIs[3] c
2473 /* 7345 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2474 /* 7350 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2475 /* 7354 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2476 /* 7360 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2477 /* 7362 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2478 /* 7364 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2479 /* 7364 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2480 /* 7367 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2481 /* 7369 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2482 /* 7373 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2483 /* 7377 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2484 /* 7381 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2485 /* 7384 */ GIR_RootConstrainSelectedInstOperands,
2486 /* 7385 */ // GIR_Coverage, 1379,
2487 /* 7385 */ GIR_EraseRootFromParent_Done,
2488 /* 7386 */ // Label 230: @7386
2489 /* 7386 */ GIM_Try, /*On fail goto*//*Label 231*/ GIMT_Encode4(7412), // Rule ID 1069 //
2490 /* 7391 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2491 /* 7395 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2492 /* 7399 */ // (or:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (OR:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
2493 /* 7399 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
2494 /* 7404 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2495 /* 7410 */ GIR_RootConstrainSelectedInstOperands,
2496 /* 7411 */ // GIR_Coverage, 1069,
2497 /* 7411 */ GIR_Done,
2498 /* 7412 */ // Label 231: @7412
2499 /* 7412 */ GIM_Reject,
2500 /* 7413 */ // Label 222: @7413
2501 /* 7413 */ GIM_Reject,
2502 /* 7414 */ // Label 189: @7414
2503 /* 7414 */ GIM_Reject,
2504 /* 7415 */ // Label 9: @7415
2505 /* 7415 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(14), /*)*//*default:*//*Label 238*/ GIMT_Encode4(13744),
2506 /* 7426 */ /*GILLT_i32*//*Label 232*/ GIMT_Encode4(7474),
2507 /* 7430 */ /*GILLT_i64*//*Label 233*/ GIMT_Encode4(7511), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
2508 /* 7458 */ /*GILLT_v16i8*//*Label 234*/ GIMT_Encode4(7548),
2509 /* 7462 */ /*GILLT_v8i16*//*Label 235*/ GIMT_Encode4(9097),
2510 /* 7466 */ /*GILLT_v4i32*//*Label 236*/ GIMT_Encode4(10646),
2511 /* 7470 */ /*GILLT_v2i64*//*Label 237*/ GIMT_Encode4(12195),
2512 /* 7474 */ // Label 232: @7474
2513 /* 7474 */ GIM_Try, /*On fail goto*//*Label 239*/ GIMT_Encode4(7510), // Rule ID 82 //
2514 /* 7479 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
2515 /* 7482 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
2516 /* 7485 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
2517 /* 7489 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
2518 /* 7493 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
2519 /* 7497 */ // (xor:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (XOR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
2520 /* 7497 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR_I32),
2521 /* 7502 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2522 /* 7508 */ GIR_RootConstrainSelectedInstOperands,
2523 /* 7509 */ // GIR_Coverage, 82,
2524 /* 7509 */ GIR_Done,
2525 /* 7510 */ // Label 239: @7510
2526 /* 7510 */ GIM_Reject,
2527 /* 7511 */ // Label 233: @7511
2528 /* 7511 */ GIM_Try, /*On fail goto*//*Label 240*/ GIMT_Encode4(7547), // Rule ID 83 //
2529 /* 7516 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
2530 /* 7519 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
2531 /* 7522 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
2532 /* 7526 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
2533 /* 7530 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
2534 /* 7534 */ // (xor:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (XOR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
2535 /* 7534 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR_I64),
2536 /* 7539 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2537 /* 7545 */ GIR_RootConstrainSelectedInstOperands,
2538 /* 7546 */ // GIR_Coverage, 83,
2539 /* 7546 */ GIR_Done,
2540 /* 7547 */ // Label 240: @7547
2541 /* 7547 */ GIM_Reject,
2542 /* 7548 */ // Label 234: @7548
2543 /* 7548 */ GIM_Try, /*On fail goto*//*Label 241*/ GIMT_Encode4(9096),
2544 /* 7553 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
2545 /* 7556 */ GIM_Try, /*On fail goto*//*Label 242*/ GIMT_Encode4(8002),
2546 /* 7561 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2547 /* 7565 */ GIM_Try, /*On fail goto*//*Label 243*/ GIMT_Encode4(7674), // Rule ID 1413 //
2548 /* 7570 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2549 /* 7574 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2550 /* 7578 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2551 /* 7582 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2552 /* 7586 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2553 /* 7590 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2554 /* 7594 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2555 /* 7598 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2556 /* 7602 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2557 /* 7607 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2558 /* 7611 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2559 /* 7617 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2560 /* 7619 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2561 /* 7623 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2562 /* 7627 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16i8,
2563 /* 7631 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16i8,
2564 /* 7635 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2565 /* 7640 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2566 /* 7645 */ // MIs[0] v2
2567 /* 7645 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
2568 /* 7650 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2569 /* 7652 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2570 /* 7652 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2571 /* 7655 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2572 /* 7657 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
2573 /* 7661 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2574 /* 7665 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2575 /* 7669 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2576 /* 7672 */ GIR_RootConstrainSelectedInstOperands,
2577 /* 7673 */ // GIR_Coverage, 1413,
2578 /* 7673 */ GIR_EraseRootFromParent_Done,
2579 /* 7674 */ // Label 243: @7674
2580 /* 7674 */ GIM_Try, /*On fail goto*//*Label 244*/ GIMT_Encode4(7783), // Rule ID 1414 //
2581 /* 7679 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2582 /* 7683 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2583 /* 7687 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2584 /* 7691 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2585 /* 7695 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2586 /* 7699 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2587 /* 7703 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2588 /* 7707 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2589 /* 7711 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2590 /* 7716 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2591 /* 7720 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2592 /* 7726 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2593 /* 7728 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2594 /* 7732 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2595 /* 7736 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16i8,
2596 /* 7740 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16i8,
2597 /* 7744 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2598 /* 7749 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2599 /* 7754 */ // MIs[0] v2
2600 /* 7754 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
2601 /* 7759 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2602 /* 7761 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2603 /* 7761 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2604 /* 7764 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2605 /* 7766 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
2606 /* 7770 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2607 /* 7774 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2608 /* 7778 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2609 /* 7781 */ GIR_RootConstrainSelectedInstOperands,
2610 /* 7782 */ // GIR_Coverage, 1414,
2611 /* 7782 */ GIR_EraseRootFromParent_Done,
2612 /* 7783 */ // Label 244: @7783
2613 /* 7783 */ GIM_Try, /*On fail goto*//*Label 245*/ GIMT_Encode4(7892), // Rule ID 1092 //
2614 /* 7788 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2615 /* 7792 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2616 /* 7796 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2617 /* 7800 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2618 /* 7804 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2619 /* 7808 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2620 /* 7812 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2621 /* 7816 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2622 /* 7820 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2623 /* 7825 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2624 /* 7830 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2625 /* 7834 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2626 /* 7838 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16i8,
2627 /* 7842 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
2628 /* 7846 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2629 /* 7851 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2630 /* 7855 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2631 /* 7861 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2632 /* 7863 */ // MIs[0] v2
2633 /* 7863 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
2634 /* 7868 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2635 /* 7870 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2636 /* 7870 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2637 /* 7873 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2638 /* 7875 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2639 /* 7879 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2640 /* 7883 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2641 /* 7887 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2642 /* 7890 */ GIR_RootConstrainSelectedInstOperands,
2643 /* 7891 */ // GIR_Coverage, 1092,
2644 /* 7891 */ GIR_EraseRootFromParent_Done,
2645 /* 7892 */ // Label 245: @7892
2646 /* 7892 */ GIM_Try, /*On fail goto*//*Label 246*/ GIMT_Encode4(8001), // Rule ID 1412 //
2647 /* 7897 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2648 /* 7901 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2649 /* 7905 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2650 /* 7909 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2651 /* 7913 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2652 /* 7917 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2653 /* 7921 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2654 /* 7925 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2655 /* 7929 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2656 /* 7934 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2657 /* 7939 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2658 /* 7943 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2659 /* 7947 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16i8,
2660 /* 7951 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
2661 /* 7955 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2662 /* 7960 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2663 /* 7964 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2664 /* 7970 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2665 /* 7972 */ // MIs[0] v2
2666 /* 7972 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2667 /* 7977 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2668 /* 7979 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2669 /* 7979 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2670 /* 7982 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2671 /* 7984 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2672 /* 7988 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2673 /* 7992 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2674 /* 7996 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2675 /* 7999 */ GIR_RootConstrainSelectedInstOperands,
2676 /* 8000 */ // GIR_Coverage, 1412,
2677 /* 8000 */ GIR_EraseRootFromParent_Done,
2678 /* 8001 */ // Label 246: @8001
2679 /* 8001 */ GIM_Reject,
2680 /* 8002 */ // Label 242: @8002
2681 /* 8002 */ GIM_Try, /*On fail goto*//*Label 247*/ GIMT_Encode4(8411),
2682 /* 8007 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
2683 /* 8010 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2684 /* 8014 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2685 /* 8018 */ GIM_Try, /*On fail goto*//*Label 248*/ GIMT_Encode4(8116), // Rule ID 1417 //
2686 /* 8023 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2687 /* 8027 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2688 /* 8031 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2689 /* 8035 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2690 /* 8039 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2691 /* 8043 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2692 /* 8047 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2693 /* 8051 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2694 /* 8055 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2695 /* 8060 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2696 /* 8064 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2697 /* 8070 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2698 /* 8072 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2699 /* 8076 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2700 /* 8080 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16i8,
2701 /* 8084 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2702 /* 8089 */ // MIs[4] v2
2703 /* 8089 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
2704 /* 8094 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2705 /* 8096 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2706 /* 8096 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2707 /* 8099 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2708 /* 8101 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2709 /* 8103 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2710 /* 8107 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2711 /* 8111 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2712 /* 8114 */ GIR_RootConstrainSelectedInstOperands,
2713 /* 8115 */ // GIR_Coverage, 1417,
2714 /* 8115 */ GIR_EraseRootFromParent_Done,
2715 /* 8116 */ // Label 248: @8116
2716 /* 8116 */ GIM_Try, /*On fail goto*//*Label 249*/ GIMT_Encode4(8214), // Rule ID 1418 //
2717 /* 8121 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2718 /* 8125 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2719 /* 8129 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2720 /* 8133 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2721 /* 8137 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2722 /* 8141 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2723 /* 8145 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2724 /* 8149 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2725 /* 8153 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2726 /* 8158 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2727 /* 8162 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2728 /* 8168 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2729 /* 8170 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2730 /* 8174 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2731 /* 8178 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16i8,
2732 /* 8182 */ // MIs[4] v2
2733 /* 8182 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
2734 /* 8187 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2735 /* 8192 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2736 /* 8194 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2737 /* 8194 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2738 /* 8197 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2739 /* 8199 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2740 /* 8201 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2741 /* 8205 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2742 /* 8209 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2743 /* 8212 */ GIR_RootConstrainSelectedInstOperands,
2744 /* 8213 */ // GIR_Coverage, 1418,
2745 /* 8213 */ GIR_EraseRootFromParent_Done,
2746 /* 8214 */ // Label 249: @8214
2747 /* 8214 */ GIM_Try, /*On fail goto*//*Label 250*/ GIMT_Encode4(8312), // Rule ID 1415 //
2748 /* 8219 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2749 /* 8223 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2750 /* 8227 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2751 /* 8231 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2752 /* 8235 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2753 /* 8239 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2754 /* 8243 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2755 /* 8247 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2756 /* 8252 */ // MIs[2] v2
2757 /* 8252 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
2758 /* 8257 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2759 /* 8261 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2760 /* 8265 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16i8,
2761 /* 8269 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
2762 /* 8273 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2763 /* 8278 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2764 /* 8282 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2765 /* 8288 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2766 /* 8290 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2767 /* 8292 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2768 /* 8292 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2769 /* 8295 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2770 /* 8297 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2771 /* 8299 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2772 /* 8303 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2773 /* 8307 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2774 /* 8310 */ GIR_RootConstrainSelectedInstOperands,
2775 /* 8311 */ // GIR_Coverage, 1415,
2776 /* 8311 */ GIR_EraseRootFromParent_Done,
2777 /* 8312 */ // Label 250: @8312
2778 /* 8312 */ GIM_Try, /*On fail goto*//*Label 251*/ GIMT_Encode4(8410), // Rule ID 1416 //
2779 /* 8317 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2780 /* 8321 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2781 /* 8325 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2782 /* 8329 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2783 /* 8333 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2784 /* 8337 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2785 /* 8341 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2786 /* 8345 */ // MIs[2] v2
2787 /* 8345 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
2788 /* 8350 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2789 /* 8355 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2790 /* 8359 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2791 /* 8363 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16i8,
2792 /* 8367 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
2793 /* 8371 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2794 /* 8376 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2795 /* 8380 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2796 /* 8386 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2797 /* 8388 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2798 /* 8390 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2799 /* 8390 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2800 /* 8393 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2801 /* 8395 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2802 /* 8397 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2803 /* 8401 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2804 /* 8405 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2805 /* 8408 */ GIR_RootConstrainSelectedInstOperands,
2806 /* 8409 */ // GIR_Coverage, 1416,
2807 /* 8409 */ GIR_EraseRootFromParent_Done,
2808 /* 8410 */ // Label 251: @8410
2809 /* 8410 */ GIM_Reject,
2810 /* 8411 */ // Label 247: @8411
2811 /* 8411 */ GIM_Try, /*On fail goto*//*Label 252*/ GIMT_Encode4(8745),
2812 /* 8416 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2813 /* 8420 */ GIM_Try, /*On fail goto*//*Label 253*/ GIMT_Encode4(8501), // Rule ID 1088 //
2814 /* 8425 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2815 /* 8429 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2816 /* 8433 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2817 /* 8437 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2818 /* 8441 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2819 /* 8445 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2820 /* 8449 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2821 /* 8453 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2822 /* 8457 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2823 /* 8462 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2824 /* 8467 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2825 /* 8472 */ // MIs[0] v2
2826 /* 8472 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
2827 /* 8477 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2828 /* 8479 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), V128:{ *:[v16i8] }:$c), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2829 /* 8479 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2830 /* 8482 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2831 /* 8484 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2832 /* 8488 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2833 /* 8492 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2834 /* 8496 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2835 /* 8499 */ GIR_RootConstrainSelectedInstOperands,
2836 /* 8500 */ // GIR_Coverage, 1088,
2837 /* 8500 */ GIR_EraseRootFromParent_Done,
2838 /* 8501 */ // Label 253: @8501
2839 /* 8501 */ GIM_Try, /*On fail goto*//*Label 254*/ GIMT_Encode4(8582), // Rule ID 1384 //
2840 /* 8506 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2841 /* 8510 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2842 /* 8514 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2843 /* 8518 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2844 /* 8522 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2845 /* 8526 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2846 /* 8530 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2847 /* 8534 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2848 /* 8538 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2849 /* 8543 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2850 /* 8548 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2851 /* 8553 */ // MIs[0] v2
2852 /* 8553 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2853 /* 8558 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2854 /* 8560 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), V128:{ *:[v16i8] }:$c), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2855 /* 8560 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2856 /* 8563 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2857 /* 8565 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2858 /* 8569 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2859 /* 8573 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2860 /* 8577 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2861 /* 8580 */ GIR_RootConstrainSelectedInstOperands,
2862 /* 8581 */ // GIR_Coverage, 1384,
2863 /* 8581 */ GIR_EraseRootFromParent_Done,
2864 /* 8582 */ // Label 254: @8582
2865 /* 8582 */ GIM_Try, /*On fail goto*//*Label 255*/ GIMT_Encode4(8663), // Rule ID 1385 //
2866 /* 8587 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2867 /* 8591 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2868 /* 8595 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2869 /* 8599 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2870 /* 8603 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2871 /* 8608 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2872 /* 8612 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2873 /* 8616 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2874 /* 8620 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2875 /* 8624 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2876 /* 8629 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2877 /* 8634 */ // MIs[0] v2
2878 /* 8634 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
2879 /* 8639 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2880 /* 8641 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2881 /* 8641 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2882 /* 8644 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2883 /* 8646 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2884 /* 8650 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2885 /* 8654 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2886 /* 8658 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2887 /* 8661 */ GIR_RootConstrainSelectedInstOperands,
2888 /* 8662 */ // GIR_Coverage, 1385,
2889 /* 8662 */ GIR_EraseRootFromParent_Done,
2890 /* 8663 */ // Label 255: @8663
2891 /* 8663 */ GIM_Try, /*On fail goto*//*Label 256*/ GIMT_Encode4(8744), // Rule ID 1386 //
2892 /* 8668 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2893 /* 8672 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2894 /* 8676 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2895 /* 8680 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2896 /* 8684 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2897 /* 8689 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2898 /* 8693 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2899 /* 8697 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2900 /* 8701 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2901 /* 8705 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2902 /* 8710 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2903 /* 8715 */ // MIs[0] v2
2904 /* 8715 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2905 /* 8720 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2906 /* 8722 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2907 /* 8722 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2908 /* 8725 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2909 /* 8727 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2910 /* 8731 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2911 /* 8735 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2912 /* 8739 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2913 /* 8742 */ GIR_RootConstrainSelectedInstOperands,
2914 /* 8743 */ // GIR_Coverage, 1386,
2915 /* 8743 */ GIR_EraseRootFromParent_Done,
2916 /* 8744 */ // Label 256: @8744
2917 /* 8744 */ GIM_Reject,
2918 /* 8745 */ // Label 252: @8745
2919 /* 8745 */ GIM_Try, /*On fail goto*//*Label 257*/ GIMT_Encode4(9095),
2920 /* 8750 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
2921 /* 8753 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2922 /* 8757 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2923 /* 8761 */ GIM_Try, /*On fail goto*//*Label 258*/ GIMT_Encode4(8831), // Rule ID 1387 //
2924 /* 8766 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2925 /* 8770 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2926 /* 8774 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2927 /* 8778 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2928 /* 8782 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2929 /* 8786 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2930 /* 8790 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2931 /* 8794 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2932 /* 8799 */ // MIs[2] v2
2933 /* 8799 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
2934 /* 8804 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2935 /* 8809 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2936 /* 8811 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2937 /* 8811 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2938 /* 8814 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2939 /* 8816 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2940 /* 8820 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2941 /* 8822 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2942 /* 8826 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2943 /* 8829 */ GIR_RootConstrainSelectedInstOperands,
2944 /* 8830 */ // GIR_Coverage, 1387,
2945 /* 8830 */ GIR_EraseRootFromParent_Done,
2946 /* 8831 */ // Label 258: @8831
2947 /* 8831 */ GIM_Try, /*On fail goto*//*Label 259*/ GIMT_Encode4(8901), // Rule ID 1388 //
2948 /* 8836 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2949 /* 8840 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2950 /* 8844 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2951 /* 8848 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2952 /* 8852 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2953 /* 8856 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2954 /* 8860 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2955 /* 8864 */ // MIs[2] v2
2956 /* 8864 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
2957 /* 8869 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2958 /* 8874 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2959 /* 8879 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2960 /* 8881 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2961 /* 8881 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2962 /* 8884 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2963 /* 8886 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2964 /* 8890 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2965 /* 8892 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2966 /* 8896 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2967 /* 8899 */ GIR_RootConstrainSelectedInstOperands,
2968 /* 8900 */ // GIR_Coverage, 1388,
2969 /* 8900 */ GIR_EraseRootFromParent_Done,
2970 /* 8901 */ // Label 259: @8901
2971 /* 8901 */ GIM_Try, /*On fail goto*//*Label 260*/ GIMT_Encode4(8971), // Rule ID 1389 //
2972 /* 8906 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2973 /* 8910 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2974 /* 8914 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2975 /* 8918 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2976 /* 8922 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2977 /* 8927 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2978 /* 8931 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2979 /* 8935 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2980 /* 8939 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2981 /* 8944 */ // MIs[2] v2
2982 /* 8944 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
2983 /* 8949 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2984 /* 8951 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2985 /* 8951 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2986 /* 8954 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2987 /* 8956 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2988 /* 8960 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2989 /* 8962 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2990 /* 8966 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2991 /* 8969 */ GIR_RootConstrainSelectedInstOperands,
2992 /* 8970 */ // GIR_Coverage, 1389,
2993 /* 8970 */ GIR_EraseRootFromParent_Done,
2994 /* 8971 */ // Label 260: @8971
2995 /* 8971 */ GIM_Try, /*On fail goto*//*Label 261*/ GIMT_Encode4(9041), // Rule ID 1390 //
2996 /* 8976 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2997 /* 8980 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2998 /* 8984 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2999 /* 8988 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
3000 /* 8992 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3001 /* 8997 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3002 /* 9001 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3003 /* 9005 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
3004 /* 9009 */ // MIs[2] v2
3005 /* 9009 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3006 /* 9014 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3007 /* 9019 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3008 /* 9021 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
3009 /* 9021 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3010 /* 9024 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3011 /* 9026 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3012 /* 9030 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3013 /* 9032 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3014 /* 9036 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3015 /* 9039 */ GIR_RootConstrainSelectedInstOperands,
3016 /* 9040 */ // GIR_Coverage, 1390,
3017 /* 9040 */ GIR_EraseRootFromParent_Done,
3018 /* 9041 */ // Label 261: @9041
3019 /* 9041 */ GIM_Try, /*On fail goto*//*Label 262*/ GIMT_Encode4(9072), // Rule ID 1059 //
3020 /* 9046 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3021 /* 9050 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3022 /* 9056 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
3023 /* 9058 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
3024 /* 9060 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v, immAllOnesV:{ *:[v16i8] }) => (NOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v)
3025 /* 9060 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
3026 /* 9063 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3027 /* 9065 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
3028 /* 9067 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3029 /* 9070 */ GIR_RootConstrainSelectedInstOperands,
3030 /* 9071 */ // GIR_Coverage, 1059,
3031 /* 9071 */ GIR_EraseRootFromParent_Done,
3032 /* 9072 */ // Label 262: @9072
3033 /* 9072 */ GIM_Try, /*On fail goto*//*Label 263*/ GIMT_Encode4(9094), // Rule ID 1070 //
3034 /* 9077 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3035 /* 9081 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (XOR:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
3036 /* 9081 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
3037 /* 9086 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
3038 /* 9092 */ GIR_RootConstrainSelectedInstOperands,
3039 /* 9093 */ // GIR_Coverage, 1070,
3040 /* 9093 */ GIR_Done,
3041 /* 9094 */ // Label 263: @9094
3042 /* 9094 */ GIM_Reject,
3043 /* 9095 */ // Label 257: @9095
3044 /* 9095 */ GIM_Reject,
3045 /* 9096 */ // Label 241: @9096
3046 /* 9096 */ GIM_Reject,
3047 /* 9097 */ // Label 235: @9097
3048 /* 9097 */ GIM_Try, /*On fail goto*//*Label 264*/ GIMT_Encode4(10645),
3049 /* 9102 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
3050 /* 9105 */ GIM_Try, /*On fail goto*//*Label 265*/ GIMT_Encode4(9551),
3051 /* 9110 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3052 /* 9114 */ GIM_Try, /*On fail goto*//*Label 266*/ GIMT_Encode4(9223), // Rule ID 1420 //
3053 /* 9119 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3054 /* 9123 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3055 /* 9127 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3056 /* 9131 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3057 /* 9135 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3058 /* 9139 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3059 /* 9143 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3060 /* 9147 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3061 /* 9151 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3062 /* 9156 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3063 /* 9160 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3064 /* 9166 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3065 /* 9168 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3066 /* 9172 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3067 /* 9176 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8i16,
3068 /* 9180 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8i16,
3069 /* 9184 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3070 /* 9189 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3071 /* 9194 */ // MIs[0] v2
3072 /* 9194 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
3073 /* 9199 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3074 /* 9201 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3075 /* 9201 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3076 /* 9204 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3077 /* 9206 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
3078 /* 9210 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3079 /* 9214 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3080 /* 9218 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3081 /* 9221 */ GIR_RootConstrainSelectedInstOperands,
3082 /* 9222 */ // GIR_Coverage, 1420,
3083 /* 9222 */ GIR_EraseRootFromParent_Done,
3084 /* 9223 */ // Label 266: @9223
3085 /* 9223 */ GIM_Try, /*On fail goto*//*Label 267*/ GIMT_Encode4(9332), // Rule ID 1421 //
3086 /* 9228 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3087 /* 9232 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3088 /* 9236 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3089 /* 9240 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3090 /* 9244 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3091 /* 9248 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3092 /* 9252 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3093 /* 9256 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3094 /* 9260 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3095 /* 9265 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3096 /* 9269 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3097 /* 9275 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3098 /* 9277 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3099 /* 9281 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3100 /* 9285 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8i16,
3101 /* 9289 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8i16,
3102 /* 9293 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3103 /* 9298 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3104 /* 9303 */ // MIs[0] v2
3105 /* 9303 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
3106 /* 9308 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3107 /* 9310 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3108 /* 9310 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3109 /* 9313 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3110 /* 9315 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
3111 /* 9319 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3112 /* 9323 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3113 /* 9327 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3114 /* 9330 */ GIR_RootConstrainSelectedInstOperands,
3115 /* 9331 */ // GIR_Coverage, 1421,
3116 /* 9331 */ GIR_EraseRootFromParent_Done,
3117 /* 9332 */ // Label 267: @9332
3118 /* 9332 */ GIM_Try, /*On fail goto*//*Label 268*/ GIMT_Encode4(9441), // Rule ID 1093 //
3119 /* 9337 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3120 /* 9341 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3121 /* 9345 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3122 /* 9349 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3123 /* 9353 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3124 /* 9357 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3125 /* 9361 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3126 /* 9365 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3127 /* 9369 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3128 /* 9374 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3129 /* 9379 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3130 /* 9383 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3131 /* 9387 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8i16,
3132 /* 9391 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
3133 /* 9395 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3134 /* 9400 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3135 /* 9404 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3136 /* 9410 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3137 /* 9412 */ // MIs[0] v2
3138 /* 9412 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3139 /* 9417 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3140 /* 9419 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3141 /* 9419 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3142 /* 9422 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3143 /* 9424 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3144 /* 9428 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3145 /* 9432 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3146 /* 9436 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3147 /* 9439 */ GIR_RootConstrainSelectedInstOperands,
3148 /* 9440 */ // GIR_Coverage, 1093,
3149 /* 9440 */ GIR_EraseRootFromParent_Done,
3150 /* 9441 */ // Label 268: @9441
3151 /* 9441 */ GIM_Try, /*On fail goto*//*Label 269*/ GIMT_Encode4(9550), // Rule ID 1419 //
3152 /* 9446 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3153 /* 9450 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3154 /* 9454 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3155 /* 9458 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3156 /* 9462 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3157 /* 9466 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3158 /* 9470 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3159 /* 9474 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3160 /* 9478 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3161 /* 9483 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3162 /* 9488 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3163 /* 9492 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3164 /* 9496 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8i16,
3165 /* 9500 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
3166 /* 9504 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3167 /* 9509 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3168 /* 9513 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3169 /* 9519 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3170 /* 9521 */ // MIs[0] v2
3171 /* 9521 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3172 /* 9526 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3173 /* 9528 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3174 /* 9528 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3175 /* 9531 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3176 /* 9533 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3177 /* 9537 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3178 /* 9541 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3179 /* 9545 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3180 /* 9548 */ GIR_RootConstrainSelectedInstOperands,
3181 /* 9549 */ // GIR_Coverage, 1419,
3182 /* 9549 */ GIR_EraseRootFromParent_Done,
3183 /* 9550 */ // Label 269: @9550
3184 /* 9550 */ GIM_Reject,
3185 /* 9551 */ // Label 265: @9551
3186 /* 9551 */ GIM_Try, /*On fail goto*//*Label 270*/ GIMT_Encode4(9960),
3187 /* 9556 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
3188 /* 9559 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3189 /* 9563 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3190 /* 9567 */ GIM_Try, /*On fail goto*//*Label 271*/ GIMT_Encode4(9665), // Rule ID 1424 //
3191 /* 9572 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3192 /* 9576 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3193 /* 9580 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3194 /* 9584 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3195 /* 9588 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3196 /* 9592 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3197 /* 9596 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3198 /* 9600 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3199 /* 9604 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3200 /* 9609 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3201 /* 9613 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3202 /* 9619 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3203 /* 9621 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3204 /* 9625 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3205 /* 9629 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8i16,
3206 /* 9633 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3207 /* 9638 */ // MIs[4] v2
3208 /* 9638 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3209 /* 9643 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3210 /* 9645 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3211 /* 9645 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3212 /* 9648 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3213 /* 9650 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3214 /* 9652 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3215 /* 9656 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3216 /* 9660 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3217 /* 9663 */ GIR_RootConstrainSelectedInstOperands,
3218 /* 9664 */ // GIR_Coverage, 1424,
3219 /* 9664 */ GIR_EraseRootFromParent_Done,
3220 /* 9665 */ // Label 271: @9665
3221 /* 9665 */ GIM_Try, /*On fail goto*//*Label 272*/ GIMT_Encode4(9763), // Rule ID 1425 //
3222 /* 9670 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3223 /* 9674 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3224 /* 9678 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3225 /* 9682 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3226 /* 9686 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3227 /* 9690 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3228 /* 9694 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3229 /* 9698 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3230 /* 9702 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3231 /* 9707 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3232 /* 9711 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3233 /* 9717 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3234 /* 9719 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3235 /* 9723 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3236 /* 9727 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8i16,
3237 /* 9731 */ // MIs[4] v2
3238 /* 9731 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3239 /* 9736 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3240 /* 9741 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3241 /* 9743 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3242 /* 9743 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3243 /* 9746 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3244 /* 9748 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3245 /* 9750 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3246 /* 9754 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3247 /* 9758 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3248 /* 9761 */ GIR_RootConstrainSelectedInstOperands,
3249 /* 9762 */ // GIR_Coverage, 1425,
3250 /* 9762 */ GIR_EraseRootFromParent_Done,
3251 /* 9763 */ // Label 272: @9763
3252 /* 9763 */ GIM_Try, /*On fail goto*//*Label 273*/ GIMT_Encode4(9861), // Rule ID 1422 //
3253 /* 9768 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3254 /* 9772 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3255 /* 9776 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3256 /* 9780 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3257 /* 9784 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3258 /* 9788 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3259 /* 9792 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3260 /* 9796 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3261 /* 9801 */ // MIs[2] v2
3262 /* 9801 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3263 /* 9806 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3264 /* 9810 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3265 /* 9814 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8i16,
3266 /* 9818 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
3267 /* 9822 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3268 /* 9827 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3269 /* 9831 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3270 /* 9837 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3271 /* 9839 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3272 /* 9841 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3273 /* 9841 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3274 /* 9844 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3275 /* 9846 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3276 /* 9848 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3277 /* 9852 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3278 /* 9856 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3279 /* 9859 */ GIR_RootConstrainSelectedInstOperands,
3280 /* 9860 */ // GIR_Coverage, 1422,
3281 /* 9860 */ GIR_EraseRootFromParent_Done,
3282 /* 9861 */ // Label 273: @9861
3283 /* 9861 */ GIM_Try, /*On fail goto*//*Label 274*/ GIMT_Encode4(9959), // Rule ID 1423 //
3284 /* 9866 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3285 /* 9870 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3286 /* 9874 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3287 /* 9878 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3288 /* 9882 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3289 /* 9886 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3290 /* 9890 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3291 /* 9894 */ // MIs[2] v2
3292 /* 9894 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3293 /* 9899 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3294 /* 9904 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3295 /* 9908 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3296 /* 9912 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8i16,
3297 /* 9916 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
3298 /* 9920 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3299 /* 9925 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3300 /* 9929 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3301 /* 9935 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3302 /* 9937 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3303 /* 9939 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3304 /* 9939 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3305 /* 9942 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3306 /* 9944 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3307 /* 9946 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3308 /* 9950 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3309 /* 9954 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3310 /* 9957 */ GIR_RootConstrainSelectedInstOperands,
3311 /* 9958 */ // GIR_Coverage, 1423,
3312 /* 9958 */ GIR_EraseRootFromParent_Done,
3313 /* 9959 */ // Label 274: @9959
3314 /* 9959 */ GIM_Reject,
3315 /* 9960 */ // Label 270: @9960
3316 /* 9960 */ GIM_Try, /*On fail goto*//*Label 275*/ GIMT_Encode4(10294),
3317 /* 9965 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3318 /* 9969 */ GIM_Try, /*On fail goto*//*Label 276*/ GIMT_Encode4(10050), // Rule ID 1089 //
3319 /* 9974 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3320 /* 9978 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3321 /* 9982 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3322 /* 9986 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3323 /* 9990 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3324 /* 9994 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3325 /* 9998 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3326 /* 10002 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3327 /* 10006 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3328 /* 10011 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3329 /* 10016 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3330 /* 10021 */ // MIs[0] v2
3331 /* 10021 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3332 /* 10026 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3333 /* 10028 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), V128:{ *:[v8i16] }:$c), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3334 /* 10028 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3335 /* 10031 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3336 /* 10033 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3337 /* 10037 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3338 /* 10041 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3339 /* 10045 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3340 /* 10048 */ GIR_RootConstrainSelectedInstOperands,
3341 /* 10049 */ // GIR_Coverage, 1089,
3342 /* 10049 */ GIR_EraseRootFromParent_Done,
3343 /* 10050 */ // Label 276: @10050
3344 /* 10050 */ GIM_Try, /*On fail goto*//*Label 277*/ GIMT_Encode4(10131), // Rule ID 1391 //
3345 /* 10055 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3346 /* 10059 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3347 /* 10063 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3348 /* 10067 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3349 /* 10071 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3350 /* 10075 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3351 /* 10079 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3352 /* 10083 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3353 /* 10087 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3354 /* 10092 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3355 /* 10097 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3356 /* 10102 */ // MIs[0] v2
3357 /* 10102 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3358 /* 10107 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3359 /* 10109 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), V128:{ *:[v8i16] }:$c), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3360 /* 10109 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3361 /* 10112 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3362 /* 10114 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3363 /* 10118 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3364 /* 10122 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3365 /* 10126 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3366 /* 10129 */ GIR_RootConstrainSelectedInstOperands,
3367 /* 10130 */ // GIR_Coverage, 1391,
3368 /* 10130 */ GIR_EraseRootFromParent_Done,
3369 /* 10131 */ // Label 277: @10131
3370 /* 10131 */ GIM_Try, /*On fail goto*//*Label 278*/ GIMT_Encode4(10212), // Rule ID 1392 //
3371 /* 10136 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3372 /* 10140 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3373 /* 10144 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3374 /* 10148 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3375 /* 10152 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3376 /* 10157 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3377 /* 10161 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3378 /* 10165 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3379 /* 10169 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3380 /* 10173 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3381 /* 10178 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3382 /* 10183 */ // MIs[0] v2
3383 /* 10183 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3384 /* 10188 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3385 /* 10190 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3386 /* 10190 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3387 /* 10193 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3388 /* 10195 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3389 /* 10199 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3390 /* 10203 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3391 /* 10207 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3392 /* 10210 */ GIR_RootConstrainSelectedInstOperands,
3393 /* 10211 */ // GIR_Coverage, 1392,
3394 /* 10211 */ GIR_EraseRootFromParent_Done,
3395 /* 10212 */ // Label 278: @10212
3396 /* 10212 */ GIM_Try, /*On fail goto*//*Label 279*/ GIMT_Encode4(10293), // Rule ID 1393 //
3397 /* 10217 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3398 /* 10221 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3399 /* 10225 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3400 /* 10229 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3401 /* 10233 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3402 /* 10238 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3403 /* 10242 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3404 /* 10246 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3405 /* 10250 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3406 /* 10254 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3407 /* 10259 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3408 /* 10264 */ // MIs[0] v2
3409 /* 10264 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3410 /* 10269 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3411 /* 10271 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3412 /* 10271 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3413 /* 10274 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3414 /* 10276 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3415 /* 10280 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3416 /* 10284 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3417 /* 10288 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3418 /* 10291 */ GIR_RootConstrainSelectedInstOperands,
3419 /* 10292 */ // GIR_Coverage, 1393,
3420 /* 10292 */ GIR_EraseRootFromParent_Done,
3421 /* 10293 */ // Label 279: @10293
3422 /* 10293 */ GIM_Reject,
3423 /* 10294 */ // Label 275: @10294
3424 /* 10294 */ GIM_Try, /*On fail goto*//*Label 280*/ GIMT_Encode4(10644),
3425 /* 10299 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
3426 /* 10302 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3427 /* 10306 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3428 /* 10310 */ GIM_Try, /*On fail goto*//*Label 281*/ GIMT_Encode4(10380), // Rule ID 1394 //
3429 /* 10315 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3430 /* 10319 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3431 /* 10323 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3432 /* 10327 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3433 /* 10331 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3434 /* 10335 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3435 /* 10339 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3436 /* 10343 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3437 /* 10348 */ // MIs[2] v2
3438 /* 10348 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3439 /* 10353 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3440 /* 10358 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3441 /* 10360 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3442 /* 10360 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3443 /* 10363 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3444 /* 10365 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3445 /* 10369 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3446 /* 10371 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3447 /* 10375 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3448 /* 10378 */ GIR_RootConstrainSelectedInstOperands,
3449 /* 10379 */ // GIR_Coverage, 1394,
3450 /* 10379 */ GIR_EraseRootFromParent_Done,
3451 /* 10380 */ // Label 281: @10380
3452 /* 10380 */ GIM_Try, /*On fail goto*//*Label 282*/ GIMT_Encode4(10450), // Rule ID 1395 //
3453 /* 10385 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3454 /* 10389 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3455 /* 10393 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3456 /* 10397 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3457 /* 10401 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3458 /* 10405 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3459 /* 10409 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3460 /* 10413 */ // MIs[2] v2
3461 /* 10413 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3462 /* 10418 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3463 /* 10423 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3464 /* 10428 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3465 /* 10430 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3466 /* 10430 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3467 /* 10433 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3468 /* 10435 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3469 /* 10439 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3470 /* 10441 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3471 /* 10445 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3472 /* 10448 */ GIR_RootConstrainSelectedInstOperands,
3473 /* 10449 */ // GIR_Coverage, 1395,
3474 /* 10449 */ GIR_EraseRootFromParent_Done,
3475 /* 10450 */ // Label 282: @10450
3476 /* 10450 */ GIM_Try, /*On fail goto*//*Label 283*/ GIMT_Encode4(10520), // Rule ID 1396 //
3477 /* 10455 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3478 /* 10459 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3479 /* 10463 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3480 /* 10467 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3481 /* 10471 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3482 /* 10476 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3483 /* 10480 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3484 /* 10484 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3485 /* 10488 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3486 /* 10493 */ // MIs[2] v2
3487 /* 10493 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3488 /* 10498 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3489 /* 10500 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3490 /* 10500 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3491 /* 10503 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3492 /* 10505 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3493 /* 10509 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3494 /* 10511 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3495 /* 10515 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3496 /* 10518 */ GIR_RootConstrainSelectedInstOperands,
3497 /* 10519 */ // GIR_Coverage, 1396,
3498 /* 10519 */ GIR_EraseRootFromParent_Done,
3499 /* 10520 */ // Label 283: @10520
3500 /* 10520 */ GIM_Try, /*On fail goto*//*Label 284*/ GIMT_Encode4(10590), // Rule ID 1397 //
3501 /* 10525 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3502 /* 10529 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3503 /* 10533 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3504 /* 10537 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3505 /* 10541 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3506 /* 10546 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3507 /* 10550 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3508 /* 10554 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3509 /* 10558 */ // MIs[2] v2
3510 /* 10558 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3511 /* 10563 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3512 /* 10568 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3513 /* 10570 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3514 /* 10570 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3515 /* 10573 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3516 /* 10575 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3517 /* 10579 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3518 /* 10581 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3519 /* 10585 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3520 /* 10588 */ GIR_RootConstrainSelectedInstOperands,
3521 /* 10589 */ // GIR_Coverage, 1397,
3522 /* 10589 */ GIR_EraseRootFromParent_Done,
3523 /* 10590 */ // Label 284: @10590
3524 /* 10590 */ GIM_Try, /*On fail goto*//*Label 285*/ GIMT_Encode4(10621), // Rule ID 1060 //
3525 /* 10595 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3526 /* 10599 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3527 /* 10605 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
3528 /* 10607 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
3529 /* 10609 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v, immAllOnesV:{ *:[v8i16] }) => (NOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v)
3530 /* 10609 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
3531 /* 10612 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3532 /* 10614 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
3533 /* 10616 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3534 /* 10619 */ GIR_RootConstrainSelectedInstOperands,
3535 /* 10620 */ // GIR_Coverage, 1060,
3536 /* 10620 */ GIR_EraseRootFromParent_Done,
3537 /* 10621 */ // Label 285: @10621
3538 /* 10621 */ GIM_Try, /*On fail goto*//*Label 286*/ GIMT_Encode4(10643), // Rule ID 1071 //
3539 /* 10626 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3540 /* 10630 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (XOR:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
3541 /* 10630 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
3542 /* 10635 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
3543 /* 10641 */ GIR_RootConstrainSelectedInstOperands,
3544 /* 10642 */ // GIR_Coverage, 1071,
3545 /* 10642 */ GIR_Done,
3546 /* 10643 */ // Label 286: @10643
3547 /* 10643 */ GIM_Reject,
3548 /* 10644 */ // Label 280: @10644
3549 /* 10644 */ GIM_Reject,
3550 /* 10645 */ // Label 264: @10645
3551 /* 10645 */ GIM_Reject,
3552 /* 10646 */ // Label 236: @10646
3553 /* 10646 */ GIM_Try, /*On fail goto*//*Label 287*/ GIMT_Encode4(12194),
3554 /* 10651 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
3555 /* 10654 */ GIM_Try, /*On fail goto*//*Label 288*/ GIMT_Encode4(11100),
3556 /* 10659 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3557 /* 10663 */ GIM_Try, /*On fail goto*//*Label 289*/ GIMT_Encode4(10772), // Rule ID 1427 //
3558 /* 10668 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3559 /* 10672 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3560 /* 10676 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3561 /* 10680 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3562 /* 10684 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3563 /* 10688 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3564 /* 10692 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3565 /* 10696 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3566 /* 10700 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3567 /* 10705 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3568 /* 10709 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3569 /* 10715 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3570 /* 10717 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3571 /* 10721 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3572 /* 10725 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4i32,
3573 /* 10729 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4i32,
3574 /* 10733 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3575 /* 10738 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3576 /* 10743 */ // MIs[0] v2
3577 /* 10743 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
3578 /* 10748 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3579 /* 10750 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3580 /* 10750 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3581 /* 10753 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3582 /* 10755 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
3583 /* 10759 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3584 /* 10763 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3585 /* 10767 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3586 /* 10770 */ GIR_RootConstrainSelectedInstOperands,
3587 /* 10771 */ // GIR_Coverage, 1427,
3588 /* 10771 */ GIR_EraseRootFromParent_Done,
3589 /* 10772 */ // Label 289: @10772
3590 /* 10772 */ GIM_Try, /*On fail goto*//*Label 290*/ GIMT_Encode4(10881), // Rule ID 1428 //
3591 /* 10777 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3592 /* 10781 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3593 /* 10785 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3594 /* 10789 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3595 /* 10793 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3596 /* 10797 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3597 /* 10801 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3598 /* 10805 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3599 /* 10809 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3600 /* 10814 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3601 /* 10818 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3602 /* 10824 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3603 /* 10826 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3604 /* 10830 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3605 /* 10834 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4i32,
3606 /* 10838 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4i32,
3607 /* 10842 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3608 /* 10847 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3609 /* 10852 */ // MIs[0] v2
3610 /* 10852 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
3611 /* 10857 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3612 /* 10859 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3613 /* 10859 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3614 /* 10862 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3615 /* 10864 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
3616 /* 10868 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3617 /* 10872 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3618 /* 10876 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3619 /* 10879 */ GIR_RootConstrainSelectedInstOperands,
3620 /* 10880 */ // GIR_Coverage, 1428,
3621 /* 10880 */ GIR_EraseRootFromParent_Done,
3622 /* 10881 */ // Label 290: @10881
3623 /* 10881 */ GIM_Try, /*On fail goto*//*Label 291*/ GIMT_Encode4(10990), // Rule ID 1094 //
3624 /* 10886 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3625 /* 10890 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3626 /* 10894 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3627 /* 10898 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3628 /* 10902 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3629 /* 10906 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3630 /* 10910 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3631 /* 10914 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3632 /* 10918 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3633 /* 10923 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3634 /* 10928 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3635 /* 10932 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3636 /* 10936 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4i32,
3637 /* 10940 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
3638 /* 10944 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3639 /* 10949 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3640 /* 10953 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3641 /* 10959 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3642 /* 10961 */ // MIs[0] v2
3643 /* 10961 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3644 /* 10966 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3645 /* 10968 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3646 /* 10968 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3647 /* 10971 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3648 /* 10973 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3649 /* 10977 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3650 /* 10981 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3651 /* 10985 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3652 /* 10988 */ GIR_RootConstrainSelectedInstOperands,
3653 /* 10989 */ // GIR_Coverage, 1094,
3654 /* 10989 */ GIR_EraseRootFromParent_Done,
3655 /* 10990 */ // Label 291: @10990
3656 /* 10990 */ GIM_Try, /*On fail goto*//*Label 292*/ GIMT_Encode4(11099), // Rule ID 1426 //
3657 /* 10995 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3658 /* 10999 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3659 /* 11003 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3660 /* 11007 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3661 /* 11011 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3662 /* 11015 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3663 /* 11019 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3664 /* 11023 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3665 /* 11027 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3666 /* 11032 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3667 /* 11037 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3668 /* 11041 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3669 /* 11045 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4i32,
3670 /* 11049 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
3671 /* 11053 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3672 /* 11058 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3673 /* 11062 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3674 /* 11068 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3675 /* 11070 */ // MIs[0] v2
3676 /* 11070 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3677 /* 11075 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3678 /* 11077 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3679 /* 11077 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3680 /* 11080 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3681 /* 11082 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3682 /* 11086 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3683 /* 11090 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3684 /* 11094 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3685 /* 11097 */ GIR_RootConstrainSelectedInstOperands,
3686 /* 11098 */ // GIR_Coverage, 1426,
3687 /* 11098 */ GIR_EraseRootFromParent_Done,
3688 /* 11099 */ // Label 292: @11099
3689 /* 11099 */ GIM_Reject,
3690 /* 11100 */ // Label 288: @11100
3691 /* 11100 */ GIM_Try, /*On fail goto*//*Label 293*/ GIMT_Encode4(11509),
3692 /* 11105 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
3693 /* 11108 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3694 /* 11112 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3695 /* 11116 */ GIM_Try, /*On fail goto*//*Label 294*/ GIMT_Encode4(11214), // Rule ID 1431 //
3696 /* 11121 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3697 /* 11125 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3698 /* 11129 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3699 /* 11133 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3700 /* 11137 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3701 /* 11141 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3702 /* 11145 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3703 /* 11149 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3704 /* 11153 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3705 /* 11158 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3706 /* 11162 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3707 /* 11168 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3708 /* 11170 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3709 /* 11174 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3710 /* 11178 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4i32,
3711 /* 11182 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3712 /* 11187 */ // MIs[4] v2
3713 /* 11187 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3714 /* 11192 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3715 /* 11194 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3716 /* 11194 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3717 /* 11197 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3718 /* 11199 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3719 /* 11201 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3720 /* 11205 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3721 /* 11209 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3722 /* 11212 */ GIR_RootConstrainSelectedInstOperands,
3723 /* 11213 */ // GIR_Coverage, 1431,
3724 /* 11213 */ GIR_EraseRootFromParent_Done,
3725 /* 11214 */ // Label 294: @11214
3726 /* 11214 */ GIM_Try, /*On fail goto*//*Label 295*/ GIMT_Encode4(11312), // Rule ID 1432 //
3727 /* 11219 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3728 /* 11223 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3729 /* 11227 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3730 /* 11231 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3731 /* 11235 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3732 /* 11239 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3733 /* 11243 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3734 /* 11247 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3735 /* 11251 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3736 /* 11256 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3737 /* 11260 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3738 /* 11266 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3739 /* 11268 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3740 /* 11272 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3741 /* 11276 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4i32,
3742 /* 11280 */ // MIs[4] v2
3743 /* 11280 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3744 /* 11285 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3745 /* 11290 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3746 /* 11292 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3747 /* 11292 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3748 /* 11295 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3749 /* 11297 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3750 /* 11299 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3751 /* 11303 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3752 /* 11307 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3753 /* 11310 */ GIR_RootConstrainSelectedInstOperands,
3754 /* 11311 */ // GIR_Coverage, 1432,
3755 /* 11311 */ GIR_EraseRootFromParent_Done,
3756 /* 11312 */ // Label 295: @11312
3757 /* 11312 */ GIM_Try, /*On fail goto*//*Label 296*/ GIMT_Encode4(11410), // Rule ID 1429 //
3758 /* 11317 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3759 /* 11321 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3760 /* 11325 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3761 /* 11329 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3762 /* 11333 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3763 /* 11337 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3764 /* 11341 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3765 /* 11345 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3766 /* 11350 */ // MIs[2] v2
3767 /* 11350 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3768 /* 11355 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3769 /* 11359 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3770 /* 11363 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4i32,
3771 /* 11367 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
3772 /* 11371 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3773 /* 11376 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3774 /* 11380 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3775 /* 11386 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3776 /* 11388 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3777 /* 11390 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3778 /* 11390 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3779 /* 11393 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3780 /* 11395 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3781 /* 11397 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3782 /* 11401 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3783 /* 11405 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3784 /* 11408 */ GIR_RootConstrainSelectedInstOperands,
3785 /* 11409 */ // GIR_Coverage, 1429,
3786 /* 11409 */ GIR_EraseRootFromParent_Done,
3787 /* 11410 */ // Label 296: @11410
3788 /* 11410 */ GIM_Try, /*On fail goto*//*Label 297*/ GIMT_Encode4(11508), // Rule ID 1430 //
3789 /* 11415 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3790 /* 11419 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3791 /* 11423 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3792 /* 11427 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3793 /* 11431 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3794 /* 11435 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3795 /* 11439 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3796 /* 11443 */ // MIs[2] v2
3797 /* 11443 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3798 /* 11448 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3799 /* 11453 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3800 /* 11457 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3801 /* 11461 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4i32,
3802 /* 11465 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
3803 /* 11469 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3804 /* 11474 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3805 /* 11478 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3806 /* 11484 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3807 /* 11486 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3808 /* 11488 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3809 /* 11488 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3810 /* 11491 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3811 /* 11493 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3812 /* 11495 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3813 /* 11499 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3814 /* 11503 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3815 /* 11506 */ GIR_RootConstrainSelectedInstOperands,
3816 /* 11507 */ // GIR_Coverage, 1430,
3817 /* 11507 */ GIR_EraseRootFromParent_Done,
3818 /* 11508 */ // Label 297: @11508
3819 /* 11508 */ GIM_Reject,
3820 /* 11509 */ // Label 293: @11509
3821 /* 11509 */ GIM_Try, /*On fail goto*//*Label 298*/ GIMT_Encode4(11843),
3822 /* 11514 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3823 /* 11518 */ GIM_Try, /*On fail goto*//*Label 299*/ GIMT_Encode4(11599), // Rule ID 1090 //
3824 /* 11523 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3825 /* 11527 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3826 /* 11531 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3827 /* 11535 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3828 /* 11539 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3829 /* 11543 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3830 /* 11547 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3831 /* 11551 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3832 /* 11555 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3833 /* 11560 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3834 /* 11565 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3835 /* 11570 */ // MIs[0] v2
3836 /* 11570 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3837 /* 11575 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3838 /* 11577 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), V128:{ *:[v4i32] }:$c), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3839 /* 11577 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3840 /* 11580 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3841 /* 11582 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3842 /* 11586 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3843 /* 11590 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3844 /* 11594 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3845 /* 11597 */ GIR_RootConstrainSelectedInstOperands,
3846 /* 11598 */ // GIR_Coverage, 1090,
3847 /* 11598 */ GIR_EraseRootFromParent_Done,
3848 /* 11599 */ // Label 299: @11599
3849 /* 11599 */ GIM_Try, /*On fail goto*//*Label 300*/ GIMT_Encode4(11680), // Rule ID 1398 //
3850 /* 11604 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3851 /* 11608 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3852 /* 11612 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3853 /* 11616 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3854 /* 11620 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3855 /* 11624 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3856 /* 11628 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3857 /* 11632 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3858 /* 11636 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3859 /* 11641 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3860 /* 11646 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3861 /* 11651 */ // MIs[0] v2
3862 /* 11651 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3863 /* 11656 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3864 /* 11658 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), V128:{ *:[v4i32] }:$c), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3865 /* 11658 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3866 /* 11661 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3867 /* 11663 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3868 /* 11667 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3869 /* 11671 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3870 /* 11675 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3871 /* 11678 */ GIR_RootConstrainSelectedInstOperands,
3872 /* 11679 */ // GIR_Coverage, 1398,
3873 /* 11679 */ GIR_EraseRootFromParent_Done,
3874 /* 11680 */ // Label 300: @11680
3875 /* 11680 */ GIM_Try, /*On fail goto*//*Label 301*/ GIMT_Encode4(11761), // Rule ID 1399 //
3876 /* 11685 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3877 /* 11689 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3878 /* 11693 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3879 /* 11697 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3880 /* 11701 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3881 /* 11706 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3882 /* 11710 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3883 /* 11714 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3884 /* 11718 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3885 /* 11722 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3886 /* 11727 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3887 /* 11732 */ // MIs[0] v2
3888 /* 11732 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3889 /* 11737 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3890 /* 11739 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3891 /* 11739 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3892 /* 11742 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3893 /* 11744 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3894 /* 11748 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3895 /* 11752 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3896 /* 11756 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3897 /* 11759 */ GIR_RootConstrainSelectedInstOperands,
3898 /* 11760 */ // GIR_Coverage, 1399,
3899 /* 11760 */ GIR_EraseRootFromParent_Done,
3900 /* 11761 */ // Label 301: @11761
3901 /* 11761 */ GIM_Try, /*On fail goto*//*Label 302*/ GIMT_Encode4(11842), // Rule ID 1400 //
3902 /* 11766 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3903 /* 11770 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3904 /* 11774 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3905 /* 11778 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3906 /* 11782 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3907 /* 11787 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3908 /* 11791 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3909 /* 11795 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3910 /* 11799 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3911 /* 11803 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3912 /* 11808 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3913 /* 11813 */ // MIs[0] v2
3914 /* 11813 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3915 /* 11818 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3916 /* 11820 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3917 /* 11820 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3918 /* 11823 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3919 /* 11825 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3920 /* 11829 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3921 /* 11833 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3922 /* 11837 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3923 /* 11840 */ GIR_RootConstrainSelectedInstOperands,
3924 /* 11841 */ // GIR_Coverage, 1400,
3925 /* 11841 */ GIR_EraseRootFromParent_Done,
3926 /* 11842 */ // Label 302: @11842
3927 /* 11842 */ GIM_Reject,
3928 /* 11843 */ // Label 298: @11843
3929 /* 11843 */ GIM_Try, /*On fail goto*//*Label 303*/ GIMT_Encode4(12193),
3930 /* 11848 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
3931 /* 11851 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3932 /* 11855 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3933 /* 11859 */ GIM_Try, /*On fail goto*//*Label 304*/ GIMT_Encode4(11929), // Rule ID 1401 //
3934 /* 11864 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3935 /* 11868 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3936 /* 11872 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3937 /* 11876 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3938 /* 11880 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3939 /* 11884 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3940 /* 11888 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3941 /* 11892 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3942 /* 11897 */ // MIs[2] v2
3943 /* 11897 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3944 /* 11902 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3945 /* 11907 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3946 /* 11909 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3947 /* 11909 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3948 /* 11912 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3949 /* 11914 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3950 /* 11918 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3951 /* 11920 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3952 /* 11924 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3953 /* 11927 */ GIR_RootConstrainSelectedInstOperands,
3954 /* 11928 */ // GIR_Coverage, 1401,
3955 /* 11928 */ GIR_EraseRootFromParent_Done,
3956 /* 11929 */ // Label 304: @11929
3957 /* 11929 */ GIM_Try, /*On fail goto*//*Label 305*/ GIMT_Encode4(11999), // Rule ID 1402 //
3958 /* 11934 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3959 /* 11938 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3960 /* 11942 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3961 /* 11946 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3962 /* 11950 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3963 /* 11954 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3964 /* 11958 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3965 /* 11962 */ // MIs[2] v2
3966 /* 11962 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3967 /* 11967 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3968 /* 11972 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3969 /* 11977 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3970 /* 11979 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3971 /* 11979 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3972 /* 11982 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3973 /* 11984 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3974 /* 11988 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3975 /* 11990 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3976 /* 11994 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3977 /* 11997 */ GIR_RootConstrainSelectedInstOperands,
3978 /* 11998 */ // GIR_Coverage, 1402,
3979 /* 11998 */ GIR_EraseRootFromParent_Done,
3980 /* 11999 */ // Label 305: @11999
3981 /* 11999 */ GIM_Try, /*On fail goto*//*Label 306*/ GIMT_Encode4(12069), // Rule ID 1403 //
3982 /* 12004 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3983 /* 12008 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3984 /* 12012 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3985 /* 12016 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3986 /* 12020 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3987 /* 12025 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3988 /* 12029 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3989 /* 12033 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3990 /* 12037 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3991 /* 12042 */ // MIs[2] v2
3992 /* 12042 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3993 /* 12047 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3994 /* 12049 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3995 /* 12049 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3996 /* 12052 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3997 /* 12054 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3998 /* 12058 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3999 /* 12060 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4000 /* 12064 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4001 /* 12067 */ GIR_RootConstrainSelectedInstOperands,
4002 /* 12068 */ // GIR_Coverage, 1403,
4003 /* 12068 */ GIR_EraseRootFromParent_Done,
4004 /* 12069 */ // Label 306: @12069
4005 /* 12069 */ GIM_Try, /*On fail goto*//*Label 307*/ GIMT_Encode4(12139), // Rule ID 1404 //
4006 /* 12074 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4007 /* 12078 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4008 /* 12082 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
4009 /* 12086 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
4010 /* 12090 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4011 /* 12095 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4012 /* 12099 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4013 /* 12103 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
4014 /* 12107 */ // MIs[2] v2
4015 /* 12107 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4016 /* 12112 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4017 /* 12117 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4018 /* 12119 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
4019 /* 12119 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4020 /* 12122 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4021 /* 12124 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4022 /* 12128 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4023 /* 12130 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4024 /* 12134 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4025 /* 12137 */ GIR_RootConstrainSelectedInstOperands,
4026 /* 12138 */ // GIR_Coverage, 1404,
4027 /* 12138 */ GIR_EraseRootFromParent_Done,
4028 /* 12139 */ // Label 307: @12139
4029 /* 12139 */ GIM_Try, /*On fail goto*//*Label 308*/ GIMT_Encode4(12170), // Rule ID 1061 //
4030 /* 12144 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4031 /* 12148 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4032 /* 12154 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
4033 /* 12156 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
4034 /* 12158 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v, immAllOnesV:{ *:[v4i32] }) => (NOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v)
4035 /* 12158 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
4036 /* 12161 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4037 /* 12163 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
4038 /* 12165 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4039 /* 12168 */ GIR_RootConstrainSelectedInstOperands,
4040 /* 12169 */ // GIR_Coverage, 1061,
4041 /* 12169 */ GIR_EraseRootFromParent_Done,
4042 /* 12170 */ // Label 308: @12170
4043 /* 12170 */ GIM_Try, /*On fail goto*//*Label 309*/ GIMT_Encode4(12192), // Rule ID 1072 //
4044 /* 12175 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4045 /* 12179 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (XOR:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
4046 /* 12179 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
4047 /* 12184 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4048 /* 12190 */ GIR_RootConstrainSelectedInstOperands,
4049 /* 12191 */ // GIR_Coverage, 1072,
4050 /* 12191 */ GIR_Done,
4051 /* 12192 */ // Label 309: @12192
4052 /* 12192 */ GIM_Reject,
4053 /* 12193 */ // Label 303: @12193
4054 /* 12193 */ GIM_Reject,
4055 /* 12194 */ // Label 287: @12194
4056 /* 12194 */ GIM_Reject,
4057 /* 12195 */ // Label 237: @12195
4058 /* 12195 */ GIM_Try, /*On fail goto*//*Label 310*/ GIMT_Encode4(13743),
4059 /* 12200 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
4060 /* 12203 */ GIM_Try, /*On fail goto*//*Label 311*/ GIMT_Encode4(12649),
4061 /* 12208 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4062 /* 12212 */ GIM_Try, /*On fail goto*//*Label 312*/ GIMT_Encode4(12321), // Rule ID 1434 //
4063 /* 12217 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4064 /* 12221 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4065 /* 12225 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4066 /* 12229 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4067 /* 12233 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4068 /* 12237 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4069 /* 12241 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4070 /* 12245 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4071 /* 12249 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4072 /* 12254 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4073 /* 12258 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4074 /* 12264 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4075 /* 12266 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4076 /* 12270 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4077 /* 12274 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2i64,
4078 /* 12278 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2i64,
4079 /* 12282 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4080 /* 12287 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4081 /* 12292 */ // MIs[0] v2
4082 /* 12292 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
4083 /* 12297 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4084 /* 12299 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4085 /* 12299 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4086 /* 12302 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4087 /* 12304 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
4088 /* 12308 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
4089 /* 12312 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4090 /* 12316 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4091 /* 12319 */ GIR_RootConstrainSelectedInstOperands,
4092 /* 12320 */ // GIR_Coverage, 1434,
4093 /* 12320 */ GIR_EraseRootFromParent_Done,
4094 /* 12321 */ // Label 312: @12321
4095 /* 12321 */ GIM_Try, /*On fail goto*//*Label 313*/ GIMT_Encode4(12430), // Rule ID 1435 //
4096 /* 12326 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4097 /* 12330 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4098 /* 12334 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4099 /* 12338 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4100 /* 12342 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4101 /* 12346 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4102 /* 12350 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4103 /* 12354 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4104 /* 12358 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4105 /* 12363 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4106 /* 12367 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4107 /* 12373 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4108 /* 12375 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4109 /* 12379 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4110 /* 12383 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2i64,
4111 /* 12387 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2i64,
4112 /* 12391 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4113 /* 12396 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4114 /* 12401 */ // MIs[0] v2
4115 /* 12401 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
4116 /* 12406 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4117 /* 12408 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4118 /* 12408 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4119 /* 12411 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4120 /* 12413 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
4121 /* 12417 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
4122 /* 12421 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4123 /* 12425 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4124 /* 12428 */ GIR_RootConstrainSelectedInstOperands,
4125 /* 12429 */ // GIR_Coverage, 1435,
4126 /* 12429 */ GIR_EraseRootFromParent_Done,
4127 /* 12430 */ // Label 313: @12430
4128 /* 12430 */ GIM_Try, /*On fail goto*//*Label 314*/ GIMT_Encode4(12539), // Rule ID 1095 //
4129 /* 12435 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4130 /* 12439 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4131 /* 12443 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4132 /* 12447 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4133 /* 12451 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4134 /* 12455 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4135 /* 12459 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4136 /* 12463 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4137 /* 12467 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4138 /* 12472 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4139 /* 12477 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4140 /* 12481 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4141 /* 12485 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2i64,
4142 /* 12489 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
4143 /* 12493 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4144 /* 12498 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4145 /* 12502 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4146 /* 12508 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4147 /* 12510 */ // MIs[0] v2
4148 /* 12510 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
4149 /* 12515 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4150 /* 12517 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4151 /* 12517 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4152 /* 12520 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4153 /* 12522 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
4154 /* 12526 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4155 /* 12530 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4156 /* 12534 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4157 /* 12537 */ GIR_RootConstrainSelectedInstOperands,
4158 /* 12538 */ // GIR_Coverage, 1095,
4159 /* 12538 */ GIR_EraseRootFromParent_Done,
4160 /* 12539 */ // Label 314: @12539
4161 /* 12539 */ GIM_Try, /*On fail goto*//*Label 315*/ GIMT_Encode4(12648), // Rule ID 1433 //
4162 /* 12544 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4163 /* 12548 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4164 /* 12552 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4165 /* 12556 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4166 /* 12560 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4167 /* 12564 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4168 /* 12568 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4169 /* 12572 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4170 /* 12576 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4171 /* 12581 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4172 /* 12586 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4173 /* 12590 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4174 /* 12594 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2i64,
4175 /* 12598 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
4176 /* 12602 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4177 /* 12607 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4178 /* 12611 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4179 /* 12617 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4180 /* 12619 */ // MIs[0] v2
4181 /* 12619 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4182 /* 12624 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4183 /* 12626 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4184 /* 12626 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4185 /* 12629 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4186 /* 12631 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4187 /* 12635 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4188 /* 12639 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4189 /* 12643 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4190 /* 12646 */ GIR_RootConstrainSelectedInstOperands,
4191 /* 12647 */ // GIR_Coverage, 1433,
4192 /* 12647 */ GIR_EraseRootFromParent_Done,
4193 /* 12648 */ // Label 315: @12648
4194 /* 12648 */ GIM_Reject,
4195 /* 12649 */ // Label 311: @12649
4196 /* 12649 */ GIM_Try, /*On fail goto*//*Label 316*/ GIMT_Encode4(13058),
4197 /* 12654 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
4198 /* 12657 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4199 /* 12661 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4200 /* 12665 */ GIM_Try, /*On fail goto*//*Label 317*/ GIMT_Encode4(12763), // Rule ID 1438 //
4201 /* 12670 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4202 /* 12674 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4203 /* 12678 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4204 /* 12682 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4205 /* 12686 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4206 /* 12690 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4207 /* 12694 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4208 /* 12698 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4209 /* 12702 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4210 /* 12707 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4211 /* 12711 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4212 /* 12717 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4213 /* 12719 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4214 /* 12723 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4215 /* 12727 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2i64,
4216 /* 12731 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4217 /* 12736 */ // MIs[4] v2
4218 /* 12736 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4219 /* 12741 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4220 /* 12743 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4221 /* 12743 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4222 /* 12746 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4223 /* 12748 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4224 /* 12750 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
4225 /* 12754 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4226 /* 12758 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4227 /* 12761 */ GIR_RootConstrainSelectedInstOperands,
4228 /* 12762 */ // GIR_Coverage, 1438,
4229 /* 12762 */ GIR_EraseRootFromParent_Done,
4230 /* 12763 */ // Label 317: @12763
4231 /* 12763 */ GIM_Try, /*On fail goto*//*Label 318*/ GIMT_Encode4(12861), // Rule ID 1439 //
4232 /* 12768 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4233 /* 12772 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4234 /* 12776 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4235 /* 12780 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4236 /* 12784 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4237 /* 12788 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4238 /* 12792 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4239 /* 12796 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4240 /* 12800 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4241 /* 12805 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4242 /* 12809 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4243 /* 12815 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4244 /* 12817 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4245 /* 12821 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4246 /* 12825 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2i64,
4247 /* 12829 */ // MIs[4] v2
4248 /* 12829 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4249 /* 12834 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4250 /* 12839 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4251 /* 12841 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4252 /* 12841 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4253 /* 12844 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4254 /* 12846 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4255 /* 12848 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
4256 /* 12852 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4257 /* 12856 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4258 /* 12859 */ GIR_RootConstrainSelectedInstOperands,
4259 /* 12860 */ // GIR_Coverage, 1439,
4260 /* 12860 */ GIR_EraseRootFromParent_Done,
4261 /* 12861 */ // Label 318: @12861
4262 /* 12861 */ GIM_Try, /*On fail goto*//*Label 319*/ GIMT_Encode4(12959), // Rule ID 1436 //
4263 /* 12866 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4264 /* 12870 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4265 /* 12874 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4266 /* 12878 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4267 /* 12882 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4268 /* 12886 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4269 /* 12890 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4270 /* 12894 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4271 /* 12899 */ // MIs[2] v2
4272 /* 12899 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4273 /* 12904 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4274 /* 12908 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4275 /* 12912 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2i64,
4276 /* 12916 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
4277 /* 12920 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4278 /* 12925 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4279 /* 12929 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4280 /* 12935 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4281 /* 12937 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4282 /* 12939 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4283 /* 12939 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4284 /* 12942 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4285 /* 12944 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4286 /* 12946 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4287 /* 12950 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4288 /* 12954 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4289 /* 12957 */ GIR_RootConstrainSelectedInstOperands,
4290 /* 12958 */ // GIR_Coverage, 1436,
4291 /* 12958 */ GIR_EraseRootFromParent_Done,
4292 /* 12959 */ // Label 319: @12959
4293 /* 12959 */ GIM_Try, /*On fail goto*//*Label 320*/ GIMT_Encode4(13057), // Rule ID 1437 //
4294 /* 12964 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4295 /* 12968 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4296 /* 12972 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4297 /* 12976 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4298 /* 12980 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4299 /* 12984 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4300 /* 12988 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4301 /* 12992 */ // MIs[2] v2
4302 /* 12992 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4303 /* 12997 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4304 /* 13002 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4305 /* 13006 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4306 /* 13010 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2i64,
4307 /* 13014 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
4308 /* 13018 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4309 /* 13023 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4310 /* 13027 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4311 /* 13033 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4312 /* 13035 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4313 /* 13037 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4314 /* 13037 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4315 /* 13040 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4316 /* 13042 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4317 /* 13044 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4318 /* 13048 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4319 /* 13052 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4320 /* 13055 */ GIR_RootConstrainSelectedInstOperands,
4321 /* 13056 */ // GIR_Coverage, 1437,
4322 /* 13056 */ GIR_EraseRootFromParent_Done,
4323 /* 13057 */ // Label 320: @13057
4324 /* 13057 */ GIM_Reject,
4325 /* 13058 */ // Label 316: @13058
4326 /* 13058 */ GIM_Try, /*On fail goto*//*Label 321*/ GIMT_Encode4(13392),
4327 /* 13063 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4328 /* 13067 */ GIM_Try, /*On fail goto*//*Label 322*/ GIMT_Encode4(13148), // Rule ID 1091 //
4329 /* 13072 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4330 /* 13076 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4331 /* 13080 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4332 /* 13084 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4333 /* 13088 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4334 /* 13092 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4335 /* 13096 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4336 /* 13100 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4337 /* 13104 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4338 /* 13109 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4339 /* 13114 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4340 /* 13119 */ // MIs[0] v2
4341 /* 13119 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
4342 /* 13124 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4343 /* 13126 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), V128:{ *:[v2i64] }:$c), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4344 /* 13126 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4345 /* 13129 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4346 /* 13131 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4347 /* 13135 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
4348 /* 13139 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4349 /* 13143 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4350 /* 13146 */ GIR_RootConstrainSelectedInstOperands,
4351 /* 13147 */ // GIR_Coverage, 1091,
4352 /* 13147 */ GIR_EraseRootFromParent_Done,
4353 /* 13148 */ // Label 322: @13148
4354 /* 13148 */ GIM_Try, /*On fail goto*//*Label 323*/ GIMT_Encode4(13229), // Rule ID 1405 //
4355 /* 13153 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4356 /* 13157 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4357 /* 13161 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4358 /* 13165 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4359 /* 13169 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4360 /* 13173 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4361 /* 13177 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4362 /* 13181 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4363 /* 13185 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4364 /* 13190 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4365 /* 13195 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4366 /* 13200 */ // MIs[0] v2
4367 /* 13200 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4368 /* 13205 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4369 /* 13207 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), V128:{ *:[v2i64] }:$c), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4370 /* 13207 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4371 /* 13210 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4372 /* 13212 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4373 /* 13216 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4374 /* 13220 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4375 /* 13224 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4376 /* 13227 */ GIR_RootConstrainSelectedInstOperands,
4377 /* 13228 */ // GIR_Coverage, 1405,
4378 /* 13228 */ GIR_EraseRootFromParent_Done,
4379 /* 13229 */ // Label 323: @13229
4380 /* 13229 */ GIM_Try, /*On fail goto*//*Label 324*/ GIMT_Encode4(13310), // Rule ID 1406 //
4381 /* 13234 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4382 /* 13238 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4383 /* 13242 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4384 /* 13246 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4385 /* 13250 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4386 /* 13255 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4387 /* 13259 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4388 /* 13263 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4389 /* 13267 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4390 /* 13271 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4391 /* 13276 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4392 /* 13281 */ // MIs[0] v2
4393 /* 13281 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
4394 /* 13286 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4395 /* 13288 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4396 /* 13288 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4397 /* 13291 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4398 /* 13293 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4399 /* 13297 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
4400 /* 13301 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4401 /* 13305 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4402 /* 13308 */ GIR_RootConstrainSelectedInstOperands,
4403 /* 13309 */ // GIR_Coverage, 1406,
4404 /* 13309 */ GIR_EraseRootFromParent_Done,
4405 /* 13310 */ // Label 324: @13310
4406 /* 13310 */ GIM_Try, /*On fail goto*//*Label 325*/ GIMT_Encode4(13391), // Rule ID 1407 //
4407 /* 13315 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4408 /* 13319 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4409 /* 13323 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4410 /* 13327 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4411 /* 13331 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4412 /* 13336 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4413 /* 13340 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4414 /* 13344 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4415 /* 13348 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4416 /* 13352 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4417 /* 13357 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4418 /* 13362 */ // MIs[0] v2
4419 /* 13362 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4420 /* 13367 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4421 /* 13369 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4422 /* 13369 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4423 /* 13372 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4424 /* 13374 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4425 /* 13378 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4426 /* 13382 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4427 /* 13386 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4428 /* 13389 */ GIR_RootConstrainSelectedInstOperands,
4429 /* 13390 */ // GIR_Coverage, 1407,
4430 /* 13390 */ GIR_EraseRootFromParent_Done,
4431 /* 13391 */ // Label 325: @13391
4432 /* 13391 */ GIM_Reject,
4433 /* 13392 */ // Label 321: @13392
4434 /* 13392 */ GIM_Try, /*On fail goto*//*Label 326*/ GIMT_Encode4(13742),
4435 /* 13397 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
4436 /* 13400 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4437 /* 13404 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4438 /* 13408 */ GIM_Try, /*On fail goto*//*Label 327*/ GIMT_Encode4(13478), // Rule ID 1408 //
4439 /* 13413 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4440 /* 13417 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4441 /* 13421 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4442 /* 13425 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4443 /* 13429 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4444 /* 13433 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4445 /* 13437 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4446 /* 13441 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4447 /* 13446 */ // MIs[2] v2
4448 /* 13446 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4449 /* 13451 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4450 /* 13456 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4451 /* 13458 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4452 /* 13458 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4453 /* 13461 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4454 /* 13463 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4455 /* 13467 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4456 /* 13469 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4457 /* 13473 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4458 /* 13476 */ GIR_RootConstrainSelectedInstOperands,
4459 /* 13477 */ // GIR_Coverage, 1408,
4460 /* 13477 */ GIR_EraseRootFromParent_Done,
4461 /* 13478 */ // Label 327: @13478
4462 /* 13478 */ GIM_Try, /*On fail goto*//*Label 328*/ GIMT_Encode4(13548), // Rule ID 1409 //
4463 /* 13483 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4464 /* 13487 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4465 /* 13491 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4466 /* 13495 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4467 /* 13499 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4468 /* 13503 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4469 /* 13507 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4470 /* 13511 */ // MIs[2] v2
4471 /* 13511 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4472 /* 13516 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4473 /* 13521 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4474 /* 13526 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4475 /* 13528 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4476 /* 13528 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4477 /* 13531 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4478 /* 13533 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4479 /* 13537 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4480 /* 13539 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4481 /* 13543 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4482 /* 13546 */ GIR_RootConstrainSelectedInstOperands,
4483 /* 13547 */ // GIR_Coverage, 1409,
4484 /* 13547 */ GIR_EraseRootFromParent_Done,
4485 /* 13548 */ // Label 328: @13548
4486 /* 13548 */ GIM_Try, /*On fail goto*//*Label 329*/ GIMT_Encode4(13618), // Rule ID 1410 //
4487 /* 13553 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4488 /* 13557 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4489 /* 13561 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4490 /* 13565 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4491 /* 13569 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4492 /* 13574 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4493 /* 13578 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4494 /* 13582 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4495 /* 13586 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4496 /* 13591 */ // MIs[2] v2
4497 /* 13591 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4498 /* 13596 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4499 /* 13598 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4500 /* 13598 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4501 /* 13601 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4502 /* 13603 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4503 /* 13607 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4504 /* 13609 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4505 /* 13613 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4506 /* 13616 */ GIR_RootConstrainSelectedInstOperands,
4507 /* 13617 */ // GIR_Coverage, 1410,
4508 /* 13617 */ GIR_EraseRootFromParent_Done,
4509 /* 13618 */ // Label 329: @13618
4510 /* 13618 */ GIM_Try, /*On fail goto*//*Label 330*/ GIMT_Encode4(13688), // Rule ID 1411 //
4511 /* 13623 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4512 /* 13627 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4513 /* 13631 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4514 /* 13635 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4515 /* 13639 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4516 /* 13644 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4517 /* 13648 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4518 /* 13652 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4519 /* 13656 */ // MIs[2] v2
4520 /* 13656 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4521 /* 13661 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4522 /* 13666 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4523 /* 13668 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4524 /* 13668 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4525 /* 13671 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4526 /* 13673 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4527 /* 13677 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4528 /* 13679 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4529 /* 13683 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4530 /* 13686 */ GIR_RootConstrainSelectedInstOperands,
4531 /* 13687 */ // GIR_Coverage, 1411,
4532 /* 13687 */ GIR_EraseRootFromParent_Done,
4533 /* 13688 */ // Label 330: @13688
4534 /* 13688 */ GIM_Try, /*On fail goto*//*Label 331*/ GIMT_Encode4(13719), // Rule ID 1062 //
4535 /* 13693 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4536 /* 13697 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4537 /* 13703 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
4538 /* 13705 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
4539 /* 13707 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v, immAllOnesV:{ *:[v2i64] }) => (NOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v)
4540 /* 13707 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
4541 /* 13710 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4542 /* 13712 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
4543 /* 13714 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4544 /* 13717 */ GIR_RootConstrainSelectedInstOperands,
4545 /* 13718 */ // GIR_Coverage, 1062,
4546 /* 13718 */ GIR_EraseRootFromParent_Done,
4547 /* 13719 */ // Label 331: @13719
4548 /* 13719 */ GIM_Try, /*On fail goto*//*Label 332*/ GIMT_Encode4(13741), // Rule ID 1073 //
4549 /* 13724 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4550 /* 13728 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (XOR:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
4551 /* 13728 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
4552 /* 13733 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4553 /* 13739 */ GIR_RootConstrainSelectedInstOperands,
4554 /* 13740 */ // GIR_Coverage, 1073,
4555 /* 13740 */ GIR_Done,
4556 /* 13741 */ // Label 332: @13741
4557 /* 13741 */ GIM_Reject,
4558 /* 13742 */ // Label 326: @13742
4559 /* 13742 */ GIM_Reject,
4560 /* 13743 */ // Label 310: @13743
4561 /* 13743 */ GIM_Reject,
4562 /* 13744 */ // Label 238: @13744
4563 /* 13744 */ GIM_Reject,
4564 /* 13745 */ // Label 10: @13745
4565 /* 13745 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(10), GIMT_Encode2(12), /*)*//*default:*//*Label 335*/ GIMT_Encode4(13838),
4566 /* 13756 */ /*GILLT_v16i8*//*Label 333*/ GIMT_Encode4(13764),
4567 /* 13760 */ /*GILLT_v8i16*//*Label 334*/ GIMT_Encode4(13801),
4568 /* 13764 */ // Label 333: @13764
4569 /* 13764 */ GIM_Try, /*On fail goto*//*Label 336*/ GIMT_Encode4(13800), // Rule ID 1184 //
4570 /* 13769 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
4571 /* 13772 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
4572 /* 13775 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4573 /* 13779 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4574 /* 13783 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4575 /* 13787 */ // (avgceilu:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (AVGR_U_I8x16:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
4576 /* 13787 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I8x16),
4577 /* 13792 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4578 /* 13798 */ GIR_RootConstrainSelectedInstOperands,
4579 /* 13799 */ // GIR_Coverage, 1184,
4580 /* 13799 */ GIR_Done,
4581 /* 13800 */ // Label 336: @13800
4582 /* 13800 */ GIM_Reject,
4583 /* 13801 */ // Label 334: @13801
4584 /* 13801 */ GIM_Try, /*On fail goto*//*Label 337*/ GIMT_Encode4(13837), // Rule ID 1186 //
4585 /* 13806 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
4586 /* 13809 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
4587 /* 13812 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4588 /* 13816 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4589 /* 13820 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4590 /* 13824 */ // (avgceilu:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (AVGR_U_I16x8:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
4591 /* 13824 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I16x8),
4592 /* 13829 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4593 /* 13835 */ GIR_RootConstrainSelectedInstOperands,
4594 /* 13836 */ // GIR_Coverage, 1186,
4595 /* 13836 */ GIR_Done,
4596 /* 13837 */ // Label 337: @13837
4597 /* 13837 */ GIM_Reject,
4598 /* 13838 */ // Label 335: @13838
4599 /* 13838 */ GIM_Reject,
4600 /* 13839 */ // Label 11: @13839
4601 /* 13839 */ GIM_Try, /*On fail goto*//*Label 338*/ GIMT_Encode4(13943),
4602 /* 13844 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
4603 /* 13847 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
4604 /* 13850 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
4605 /* 13853 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
4606 /* 13856 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4607 /* 13860 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 339*/ GIMT_Encode4(13901), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 178 //
4608 /* 13867 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4609 /* 13871 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4610 /* 13875 */ // MIs[1] Operand 1
4611 /* 13875 */ // No operand predicates
4612 /* 13875 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4613 /* 13879 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4614 /* 13883 */ // MIs[2] Operand 1
4615 /* 13883 */ // No operand predicates
4616 /* 13883 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4617 /* 13885 */ // (build_vector:{ *:[v2f64] } (fpimm:{ *:[f64] }):$i0, (fpimm:{ *:[f64] }):$i1) => (CONST_V128_F64x2:{ *:[v2f64] } (fpimm:{ *:[f64] }):$i0, (fpimm:{ *:[f64] }):$i1)
4618 /* 13885 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F64x2),
4619 /* 13888 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4620 /* 13890 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4621 /* 13893 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4622 /* 13896 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4623 /* 13899 */ GIR_RootConstrainSelectedInstOperands,
4624 /* 13900 */ // GIR_Coverage, 178,
4625 /* 13900 */ GIR_EraseRootFromParent_Done,
4626 /* 13901 */ // Label 339: @13901
4627 /* 13901 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 340*/ GIMT_Encode4(13942), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 176 //
4628 /* 13908 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4629 /* 13912 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4630 /* 13916 */ // MIs[1] Operand 1
4631 /* 13916 */ // No operand predicates
4632 /* 13916 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4633 /* 13920 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4634 /* 13924 */ // MIs[2] Operand 1
4635 /* 13924 */ // No operand predicates
4636 /* 13924 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4637 /* 13926 */ // (build_vector:{ *:[v2i64] } (imm:{ *:[i64] }):$i0, (imm:{ *:[i64] }):$i1) => (CONST_V128_I64x2:{ *:[v2i64] } (imm:{ *:[i64] }):$i0, (imm:{ *:[i64] }):$i1)
4638 /* 13926 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I64x2),
4639 /* 13929 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4640 /* 13931 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4641 /* 13934 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4642 /* 13937 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4643 /* 13940 */ GIR_RootConstrainSelectedInstOperands,
4644 /* 13941 */ // GIR_Coverage, 176,
4645 /* 13941 */ GIR_EraseRootFromParent_Done,
4646 /* 13942 */ // Label 340: @13942
4647 /* 13942 */ GIM_Reject,
4648 /* 13943 */ // Label 338: @13943
4649 /* 13943 */ GIM_Try, /*On fail goto*//*Label 341*/ GIMT_Encode4(14097),
4650 /* 13948 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
4651 /* 13951 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
4652 /* 13954 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
4653 /* 13957 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
4654 /* 13960 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
4655 /* 13963 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
4656 /* 13966 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4657 /* 13970 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 342*/ GIMT_Encode4(14033), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 177 //
4658 /* 13977 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4659 /* 13981 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4660 /* 13985 */ // MIs[1] Operand 1
4661 /* 13985 */ // No operand predicates
4662 /* 13985 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4663 /* 13989 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4664 /* 13993 */ // MIs[2] Operand 1
4665 /* 13993 */ // No operand predicates
4666 /* 13993 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
4667 /* 13997 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4668 /* 14001 */ // MIs[3] Operand 1
4669 /* 14001 */ // No operand predicates
4670 /* 14001 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
4671 /* 14005 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4672 /* 14009 */ // MIs[4] Operand 1
4673 /* 14009 */ // No operand predicates
4674 /* 14009 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4675 /* 14011 */ // (build_vector:{ *:[v4f32] } (fpimm:{ *:[f32] }):$i0, (fpimm:{ *:[f32] }):$i1, (fpimm:{ *:[f32] }):$i2, (fpimm:{ *:[f32] }):$i3) => (CONST_V128_F32x4:{ *:[v4f32] } (fpimm:{ *:[f32] }):$i0, (fpimm:{ *:[f32] }):$i1, (fpimm:{ *:[f32] }):$i2, (fpimm:{ *:[f32] }):$i3)
4676 /* 14011 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F32x4),
4677 /* 14014 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4678 /* 14016 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4679 /* 14019 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4680 /* 14022 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
4681 /* 14025 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
4682 /* 14028 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4683 /* 14031 */ GIR_RootConstrainSelectedInstOperands,
4684 /* 14032 */ // GIR_Coverage, 177,
4685 /* 14032 */ GIR_EraseRootFromParent_Done,
4686 /* 14033 */ // Label 342: @14033
4687 /* 14033 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 343*/ GIMT_Encode4(14096), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 175 //
4688 /* 14040 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4689 /* 14044 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4690 /* 14048 */ // MIs[1] Operand 1
4691 /* 14048 */ // No operand predicates
4692 /* 14048 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4693 /* 14052 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4694 /* 14056 */ // MIs[2] Operand 1
4695 /* 14056 */ // No operand predicates
4696 /* 14056 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
4697 /* 14060 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4698 /* 14064 */ // MIs[3] Operand 1
4699 /* 14064 */ // No operand predicates
4700 /* 14064 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
4701 /* 14068 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4702 /* 14072 */ // MIs[4] Operand 1
4703 /* 14072 */ // No operand predicates
4704 /* 14072 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4705 /* 14074 */ // (build_vector:{ *:[v4i32] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3) => (CONST_V128_I32x4:{ *:[v4i32] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3)
4706 /* 14074 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I32x4),
4707 /* 14077 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4708 /* 14079 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4709 /* 14082 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4710 /* 14085 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
4711 /* 14088 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
4712 /* 14091 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4713 /* 14094 */ GIR_RootConstrainSelectedInstOperands,
4714 /* 14095 */ // GIR_Coverage, 175,
4715 /* 14095 */ GIR_EraseRootFromParent_Done,
4716 /* 14096 */ // Label 343: @14096
4717 /* 14096 */ GIM_Reject,
4718 /* 14097 */ // Label 341: @14097
4719 /* 14097 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 344*/ GIMT_Encode4(14270), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 174 //
4720 /* 14104 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/9,
4721 /* 14107 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
4722 /* 14110 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
4723 /* 14113 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
4724 /* 14116 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
4725 /* 14119 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
4726 /* 14122 */ GIM_RootCheckType, /*Op*/5, /*Type*/GILLT_s32,
4727 /* 14125 */ GIM_RootCheckType, /*Op*/6, /*Type*/GILLT_s32,
4728 /* 14128 */ GIM_RootCheckType, /*Op*/7, /*Type*/GILLT_s32,
4729 /* 14131 */ GIM_RootCheckType, /*Op*/8, /*Type*/GILLT_s32,
4730 /* 14134 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4731 /* 14138 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4732 /* 14142 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4733 /* 14146 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4734 /* 14150 */ // MIs[1] Operand 1
4735 /* 14150 */ // No operand predicates
4736 /* 14150 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4737 /* 14154 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4738 /* 14158 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4739 /* 14162 */ // MIs[2] Operand 1
4740 /* 14162 */ // No operand predicates
4741 /* 14162 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
4742 /* 14166 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4743 /* 14170 */ GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4744 /* 14174 */ // MIs[3] Operand 1
4745 /* 14174 */ // No operand predicates
4746 /* 14174 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
4747 /* 14178 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4748 /* 14182 */ GIM_CheckI64ImmPredicate, /*MI*/4, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4749 /* 14186 */ // MIs[4] Operand 1
4750 /* 14186 */ // No operand predicates
4751 /* 14186 */ GIM_RecordInsn, /*DefineMI*/5, /*MI*/0, /*OpIdx*/5, // MIs[5]
4752 /* 14190 */ GIM_CheckOpcode, /*MI*/5, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4753 /* 14194 */ GIM_CheckI64ImmPredicate, /*MI*/5, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4754 /* 14198 */ // MIs[5] Operand 1
4755 /* 14198 */ // No operand predicates
4756 /* 14198 */ GIM_RecordInsn, /*DefineMI*/6, /*MI*/0, /*OpIdx*/6, // MIs[6]
4757 /* 14202 */ GIM_CheckOpcode, /*MI*/6, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4758 /* 14206 */ GIM_CheckI64ImmPredicate, /*MI*/6, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4759 /* 14210 */ // MIs[6] Operand 1
4760 /* 14210 */ // No operand predicates
4761 /* 14210 */ GIM_RecordInsn, /*DefineMI*/7, /*MI*/0, /*OpIdx*/7, // MIs[7]
4762 /* 14214 */ GIM_CheckOpcode, /*MI*/7, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4763 /* 14218 */ GIM_CheckI64ImmPredicate, /*MI*/7, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4764 /* 14222 */ // MIs[7] Operand 1
4765 /* 14222 */ // No operand predicates
4766 /* 14222 */ GIM_RecordInsn, /*DefineMI*/8, /*MI*/0, /*OpIdx*/8, // MIs[8]
4767 /* 14226 */ GIM_CheckOpcode, /*MI*/8, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4768 /* 14230 */ GIM_CheckI64ImmPredicate, /*MI*/8, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4769 /* 14234 */ // MIs[8] Operand 1
4770 /* 14234 */ // No operand predicates
4771 /* 14234 */ GIM_CheckIsSafeToFold, /*NumInsns*/8,
4772 /* 14236 */ // (build_vector:{ *:[v8i16] } (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i0, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i1, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i2, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i3, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i4, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i5, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i6, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i7) => (CONST_V128_I16x8:{ *:[v8i16] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3, (imm:{ *:[i32] }):$i4, (imm:{ *:[i32] }):$i5, (imm:{ *:[i32] }):$i6, (imm:{ *:[i32] }):$i7)
4773 /* 14236 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I16x8),
4774 /* 14239 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4775 /* 14241 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4776 /* 14244 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4777 /* 14247 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
4778 /* 14250 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
4779 /* 14253 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/5, // i4
4780 /* 14256 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/6, // i5
4781 /* 14259 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/7, // i6
4782 /* 14262 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/8, // i7
4783 /* 14265 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4784 /* 14268 */ GIR_RootConstrainSelectedInstOperands,
4785 /* 14269 */ // GIR_Coverage, 174,
4786 /* 14269 */ GIR_EraseRootFromParent_Done,
4787 /* 14270 */ // Label 344: @14270
4788 /* 14270 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 345*/ GIMT_Encode4(14587), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 173 //
4789 /* 14277 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/17,
4790 /* 14280 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
4791 /* 14283 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
4792 /* 14286 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
4793 /* 14289 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
4794 /* 14292 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
4795 /* 14295 */ GIM_RootCheckType, /*Op*/5, /*Type*/GILLT_s32,
4796 /* 14298 */ GIM_RootCheckType, /*Op*/6, /*Type*/GILLT_s32,
4797 /* 14301 */ GIM_RootCheckType, /*Op*/7, /*Type*/GILLT_s32,
4798 /* 14304 */ GIM_RootCheckType, /*Op*/8, /*Type*/GILLT_s32,
4799 /* 14307 */ GIM_RootCheckType, /*Op*/9, /*Type*/GILLT_s32,
4800 /* 14310 */ GIM_RootCheckType, /*Op*/10, /*Type*/GILLT_s32,
4801 /* 14313 */ GIM_RootCheckType, /*Op*/11, /*Type*/GILLT_s32,
4802 /* 14316 */ GIM_RootCheckType, /*Op*/12, /*Type*/GILLT_s32,
4803 /* 14319 */ GIM_RootCheckType, /*Op*/13, /*Type*/GILLT_s32,
4804 /* 14322 */ GIM_RootCheckType, /*Op*/14, /*Type*/GILLT_s32,
4805 /* 14325 */ GIM_RootCheckType, /*Op*/15, /*Type*/GILLT_s32,
4806 /* 14328 */ GIM_RootCheckType, /*Op*/16, /*Type*/GILLT_s32,
4807 /* 14331 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4808 /* 14335 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4809 /* 14339 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4810 /* 14343 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4811 /* 14347 */ // MIs[1] Operand 1
4812 /* 14347 */ // No operand predicates
4813 /* 14347 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4814 /* 14351 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4815 /* 14355 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4816 /* 14359 */ // MIs[2] Operand 1
4817 /* 14359 */ // No operand predicates
4818 /* 14359 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
4819 /* 14363 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4820 /* 14367 */ GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4821 /* 14371 */ // MIs[3] Operand 1
4822 /* 14371 */ // No operand predicates
4823 /* 14371 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
4824 /* 14375 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4825 /* 14379 */ GIM_CheckI64ImmPredicate, /*MI*/4, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4826 /* 14383 */ // MIs[4] Operand 1
4827 /* 14383 */ // No operand predicates
4828 /* 14383 */ GIM_RecordInsn, /*DefineMI*/5, /*MI*/0, /*OpIdx*/5, // MIs[5]
4829 /* 14387 */ GIM_CheckOpcode, /*MI*/5, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4830 /* 14391 */ GIM_CheckI64ImmPredicate, /*MI*/5, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4831 /* 14395 */ // MIs[5] Operand 1
4832 /* 14395 */ // No operand predicates
4833 /* 14395 */ GIM_RecordInsn, /*DefineMI*/6, /*MI*/0, /*OpIdx*/6, // MIs[6]
4834 /* 14399 */ GIM_CheckOpcode, /*MI*/6, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4835 /* 14403 */ GIM_CheckI64ImmPredicate, /*MI*/6, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4836 /* 14407 */ // MIs[6] Operand 1
4837 /* 14407 */ // No operand predicates
4838 /* 14407 */ GIM_RecordInsn, /*DefineMI*/7, /*MI*/0, /*OpIdx*/7, // MIs[7]
4839 /* 14411 */ GIM_CheckOpcode, /*MI*/7, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4840 /* 14415 */ GIM_CheckI64ImmPredicate, /*MI*/7, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4841 /* 14419 */ // MIs[7] Operand 1
4842 /* 14419 */ // No operand predicates
4843 /* 14419 */ GIM_RecordInsn, /*DefineMI*/8, /*MI*/0, /*OpIdx*/8, // MIs[8]
4844 /* 14423 */ GIM_CheckOpcode, /*MI*/8, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4845 /* 14427 */ GIM_CheckI64ImmPredicate, /*MI*/8, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4846 /* 14431 */ // MIs[8] Operand 1
4847 /* 14431 */ // No operand predicates
4848 /* 14431 */ GIM_RecordInsn, /*DefineMI*/9, /*MI*/0, /*OpIdx*/9, // MIs[9]
4849 /* 14435 */ GIM_CheckOpcode, /*MI*/9, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4850 /* 14439 */ GIM_CheckI64ImmPredicate, /*MI*/9, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4851 /* 14443 */ // MIs[9] Operand 1
4852 /* 14443 */ // No operand predicates
4853 /* 14443 */ GIM_RecordInsn, /*DefineMI*/10, /*MI*/0, /*OpIdx*/10, // MIs[10]
4854 /* 14447 */ GIM_CheckOpcode, /*MI*/10, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4855 /* 14451 */ GIM_CheckI64ImmPredicate, /*MI*/10, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4856 /* 14455 */ // MIs[10] Operand 1
4857 /* 14455 */ // No operand predicates
4858 /* 14455 */ GIM_RecordInsn, /*DefineMI*/11, /*MI*/0, /*OpIdx*/11, // MIs[11]
4859 /* 14459 */ GIM_CheckOpcode, /*MI*/11, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4860 /* 14463 */ GIM_CheckI64ImmPredicate, /*MI*/11, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4861 /* 14467 */ // MIs[11] Operand 1
4862 /* 14467 */ // No operand predicates
4863 /* 14467 */ GIM_RecordInsn, /*DefineMI*/12, /*MI*/0, /*OpIdx*/12, // MIs[12]
4864 /* 14471 */ GIM_CheckOpcode, /*MI*/12, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4865 /* 14475 */ GIM_CheckI64ImmPredicate, /*MI*/12, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4866 /* 14479 */ // MIs[12] Operand 1
4867 /* 14479 */ // No operand predicates
4868 /* 14479 */ GIM_RecordInsn, /*DefineMI*/13, /*MI*/0, /*OpIdx*/13, // MIs[13]
4869 /* 14483 */ GIM_CheckOpcode, /*MI*/13, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4870 /* 14487 */ GIM_CheckI64ImmPredicate, /*MI*/13, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4871 /* 14491 */ // MIs[13] Operand 1
4872 /* 14491 */ // No operand predicates
4873 /* 14491 */ GIM_RecordInsn, /*DefineMI*/14, /*MI*/0, /*OpIdx*/14, // MIs[14]
4874 /* 14495 */ GIM_CheckOpcode, /*MI*/14, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4875 /* 14499 */ GIM_CheckI64ImmPredicate, /*MI*/14, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4876 /* 14503 */ // MIs[14] Operand 1
4877 /* 14503 */ // No operand predicates
4878 /* 14503 */ GIM_RecordInsn, /*DefineMI*/15, /*MI*/0, /*OpIdx*/15, // MIs[15]
4879 /* 14507 */ GIM_CheckOpcode, /*MI*/15, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4880 /* 14511 */ GIM_CheckI64ImmPredicate, /*MI*/15, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4881 /* 14515 */ // MIs[15] Operand 1
4882 /* 14515 */ // No operand predicates
4883 /* 14515 */ GIM_RecordInsn, /*DefineMI*/16, /*MI*/0, /*OpIdx*/16, // MIs[16]
4884 /* 14519 */ GIM_CheckOpcode, /*MI*/16, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4885 /* 14523 */ GIM_CheckI64ImmPredicate, /*MI*/16, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4886 /* 14527 */ // MIs[16] Operand 1
4887 /* 14527 */ // No operand predicates
4888 /* 14527 */ GIM_CheckIsSafeToFold, /*NumInsns*/16,
4889 /* 14529 */ // (build_vector:{ *:[v16i8] } (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i0, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i1, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i2, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i3, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i4, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i5, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i6, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i7, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i8, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i9, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iA, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iB, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iC, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iD, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iE, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iF) => (CONST_V128_I8x16:{ *:[v16i8] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3, (imm:{ *:[i32] }):$i4, (imm:{ *:[i32] }):$i5, (imm:{ *:[i32] }):$i6, (imm:{ *:[i32] }):$i7, (imm:{ *:[i32] }):$i8, (imm:{ *:[i32] }):$i9, (imm:{ *:[i32] }):$iA, (imm:{ *:[i32] }):$iB, (imm:{ *:[i32] }):$iC, (imm:{ *:[i32] }):$iD, (imm:{ *:[i32] }):$iE, (imm:{ *:[i32] }):$iF)
4890 /* 14529 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I8x16),
4891 /* 14532 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4892 /* 14534 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4893 /* 14537 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4894 /* 14540 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
4895 /* 14543 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
4896 /* 14546 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/5, // i4
4897 /* 14549 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/6, // i5
4898 /* 14552 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/7, // i6
4899 /* 14555 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/8, // i7
4900 /* 14558 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/9, // i8
4901 /* 14561 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/10, // i9
4902 /* 14564 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/11, // iA
4903 /* 14567 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/12, // iB
4904 /* 14570 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/13, // iC
4905 /* 14573 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/14, // iD
4906 /* 14576 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/15, // iE
4907 /* 14579 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/16, // iF
4908 /* 14582 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4909 /* 14585 */ GIR_RootConstrainSelectedInstOperands,
4910 /* 14586 */ // GIR_Coverage, 173,
4911 /* 14586 */ GIR_EraseRootFromParent_Done,
4912 /* 14587 */ // Label 345: @14587
4913 /* 14587 */ GIM_Reject,
4914 /* 14588 */ // Label 12: @14588
4915 /* 14588 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(10), /*)*//*default:*//*Label 352*/ GIMT_Encode4(16041),
4916 /* 14599 */ /*GILLT_s32*//*Label 346*/ GIMT_Encode4(14639),
4917 /* 14603 */ /*GILLT_s64*//*Label 347*/ GIMT_Encode4(14701), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
4918 /* 14623 */ /*GILLT_v16s8*//*Label 348*/ GIMT_Encode4(14763),
4919 /* 14627 */ /*GILLT_v8s16*//*Label 349*/ GIMT_Encode4(14940),
4920 /* 14631 */ /*GILLT_v4s32*//*Label 350*/ GIMT_Encode4(15307),
4921 /* 14635 */ /*GILLT_v2s64*//*Label 351*/ GIMT_Encode4(15674),
4922 /* 14639 */ // Label 346: @14639
4923 /* 14639 */ GIM_Try, /*On fail goto*//*Label 353*/ GIMT_Encode4(14700),
4924 /* 14644 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
4925 /* 14647 */ GIM_Try, /*On fail goto*//*Label 354*/ GIMT_Encode4(14673), // Rule ID 60 //
4926 /* 14652 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
4927 /* 14656 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
4928 /* 14660 */ // (bitconvert:{ *:[i32] } F32:{ *:[f32] }:$src) => (I32_REINTERPRET_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
4929 /* 14660 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_REINTERPRET_F32),
4930 /* 14665 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4931 /* 14671 */ GIR_RootConstrainSelectedInstOperands,
4932 /* 14672 */ // GIR_Coverage, 60,
4933 /* 14672 */ GIR_Done,
4934 /* 14673 */ // Label 354: @14673
4935 /* 14673 */ GIM_Try, /*On fail goto*//*Label 355*/ GIMT_Encode4(14699), // Rule ID 61 //
4936 /* 14678 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
4937 /* 14682 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
4938 /* 14686 */ // (bitconvert:{ *:[f32] } I32:{ *:[i32] }:$src) => (F32_REINTERPRET_I32:{ *:[f32] } I32:{ *:[i32] }:$src)
4939 /* 14686 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_REINTERPRET_I32),
4940 /* 14691 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4941 /* 14697 */ GIR_RootConstrainSelectedInstOperands,
4942 /* 14698 */ // GIR_Coverage, 61,
4943 /* 14698 */ GIR_Done,
4944 /* 14699 */ // Label 355: @14699
4945 /* 14699 */ GIM_Reject,
4946 /* 14700 */ // Label 353: @14700
4947 /* 14700 */ GIM_Reject,
4948 /* 14701 */ // Label 347: @14701
4949 /* 14701 */ GIM_Try, /*On fail goto*//*Label 356*/ GIMT_Encode4(14762),
4950 /* 14706 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
4951 /* 14709 */ GIM_Try, /*On fail goto*//*Label 357*/ GIMT_Encode4(14735), // Rule ID 62 //
4952 /* 14714 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
4953 /* 14718 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
4954 /* 14722 */ // (bitconvert:{ *:[i64] } F64:{ *:[f64] }:$src) => (I64_REINTERPRET_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
4955 /* 14722 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_REINTERPRET_F64),
4956 /* 14727 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4957 /* 14733 */ GIR_RootConstrainSelectedInstOperands,
4958 /* 14734 */ // GIR_Coverage, 62,
4959 /* 14734 */ GIR_Done,
4960 /* 14735 */ // Label 357: @14735
4961 /* 14735 */ GIM_Try, /*On fail goto*//*Label 358*/ GIMT_Encode4(14761), // Rule ID 63 //
4962 /* 14740 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
4963 /* 14744 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
4964 /* 14748 */ // (bitconvert:{ *:[f64] } I64:{ *:[i64] }:$src) => (F64_REINTERPRET_I64:{ *:[f64] } I64:{ *:[i64] }:$src)
4965 /* 14748 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_REINTERPRET_I64),
4966 /* 14753 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4967 /* 14759 */ GIR_RootConstrainSelectedInstOperands,
4968 /* 14760 */ // GIR_Coverage, 63,
4969 /* 14760 */ GIR_Done,
4970 /* 14761 */ // Label 358: @14761
4971 /* 14761 */ GIM_Reject,
4972 /* 14762 */ // Label 356: @14762
4973 /* 14762 */ GIM_Reject,
4974 /* 14763 */ // Label 348: @14763
4975 /* 14763 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(7), GIMT_Encode2(10), /*)*//*default:*//*Label 362*/ GIMT_Encode4(14939),
4976 /* 14774 */ /*GILLT_v8s16*//*Label 359*/ GIMT_Encode4(14786),
4977 /* 14778 */ /*GILLT_v4s32*//*Label 360*/ GIMT_Encode4(14837),
4978 /* 14782 */ /*GILLT_v2s64*//*Label 361*/ GIMT_Encode4(14888),
4979 /* 14786 */ // Label 359: @14786
4980 /* 14786 */ GIM_Try, /*On fail goto*//*Label 363*/ GIMT_Encode4(14836),
4981 /* 14791 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4982 /* 14795 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4983 /* 14799 */ GIM_Try, /*On fail goto*//*Label 364*/ GIMT_Encode4(14817), // Rule ID 1221 //
4984 /* 14804 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v16i8] }:$v
4985 /* 14804 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4986 /* 14807 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
4987 /* 14809 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
4988 /* 14811 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
4989 /* 14816 */ // GIR_Coverage, 1221,
4990 /* 14816 */ GIR_EraseRootFromParent_Done,
4991 /* 14817 */ // Label 364: @14817
4992 /* 14817 */ GIM_Try, /*On fail goto*//*Label 365*/ GIMT_Encode4(14835), // Rule ID 1226 //
4993 /* 14822 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v16i8] }:$v
4994 /* 14822 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
4995 /* 14825 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
4996 /* 14827 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
4997 /* 14829 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
4998 /* 14834 */ // GIR_Coverage, 1226,
4999 /* 14834 */ GIR_EraseRootFromParent_Done,
5000 /* 14835 */ // Label 365: @14835
5001 /* 14835 */ GIM_Reject,
5002 /* 14836 */ // Label 363: @14836
5003 /* 14836 */ GIM_Reject,
5004 /* 14837 */ // Label 360: @14837
5005 /* 14837 */ GIM_Try, /*On fail goto*//*Label 366*/ GIMT_Encode4(14887),
5006 /* 14842 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5007 /* 14846 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5008 /* 14850 */ GIM_Try, /*On fail goto*//*Label 367*/ GIMT_Encode4(14868), // Rule ID 1222 //
5009 /* 14855 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v16i8] }:$v
5010 /* 14855 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5011 /* 14858 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5012 /* 14860 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5013 /* 14862 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5014 /* 14867 */ // GIR_Coverage, 1222,
5015 /* 14867 */ GIR_EraseRootFromParent_Done,
5016 /* 14868 */ // Label 367: @14868
5017 /* 14868 */ GIM_Try, /*On fail goto*//*Label 368*/ GIMT_Encode4(14886), // Rule ID 1224 //
5018 /* 14873 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v16i8] }:$v
5019 /* 14873 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5020 /* 14876 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5021 /* 14878 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5022 /* 14880 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5023 /* 14885 */ // GIR_Coverage, 1224,
5024 /* 14885 */ GIR_EraseRootFromParent_Done,
5025 /* 14886 */ // Label 368: @14886
5026 /* 14886 */ GIM_Reject,
5027 /* 14887 */ // Label 366: @14887
5028 /* 14887 */ GIM_Reject,
5029 /* 14888 */ // Label 361: @14888
5030 /* 14888 */ GIM_Try, /*On fail goto*//*Label 369*/ GIMT_Encode4(14938),
5031 /* 14893 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5032 /* 14897 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5033 /* 14901 */ GIM_Try, /*On fail goto*//*Label 370*/ GIMT_Encode4(14919), // Rule ID 1223 //
5034 /* 14906 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v16i8] }:$v
5035 /* 14906 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5036 /* 14909 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5037 /* 14911 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5038 /* 14913 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5039 /* 14918 */ // GIR_Coverage, 1223,
5040 /* 14918 */ GIR_EraseRootFromParent_Done,
5041 /* 14919 */ // Label 370: @14919
5042 /* 14919 */ GIM_Try, /*On fail goto*//*Label 371*/ GIMT_Encode4(14937), // Rule ID 1225 //
5043 /* 14924 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v16i8] }:$v
5044 /* 14924 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5045 /* 14927 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5046 /* 14929 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5047 /* 14931 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5048 /* 14936 */ // GIR_Coverage, 1225,
5049 /* 14936 */ GIR_EraseRootFromParent_Done,
5050 /* 14937 */ // Label 371: @14937
5051 /* 14937 */ GIM_Reject,
5052 /* 14938 */ // Label 369: @14938
5053 /* 14938 */ GIM_Reject,
5054 /* 14939 */ // Label 362: @14939
5055 /* 14939 */ GIM_Reject,
5056 /* 14940 */ // Label 349: @14940
5057 /* 14940 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(6), GIMT_Encode2(10), /*)*//*default:*//*Label 376*/ GIMT_Encode4(15123),
5058 /* 14951 */ /*GILLT_v16s8*//*Label 372*/ GIMT_Encode4(14967),
5059 /* 14955 */ /*GILLT_v8s16*//*Label 373*/ GIMT_Encode4(14994),
5060 /* 14959 */ /*GILLT_v4s32*//*Label 374*/ GIMT_Encode4(15021),
5061 /* 14963 */ /*GILLT_v2s64*//*Label 375*/ GIMT_Encode4(15072),
5062 /* 14967 */ // Label 372: @14967
5063 /* 14967 */ GIM_Try, /*On fail goto*//*Label 377*/ GIMT_Encode4(14993), // Rule ID 1227 //
5064 /* 14972 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5065 /* 14976 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5066 /* 14980 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v8i16] }:$v
5067 /* 14980 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5068 /* 14983 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5069 /* 14985 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5070 /* 14987 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5071 /* 14992 */ // GIR_Coverage, 1227,
5072 /* 14992 */ GIR_EraseRootFromParent_Done,
5073 /* 14993 */ // Label 377: @14993
5074 /* 14993 */ GIM_Reject,
5075 /* 14994 */ // Label 373: @14994
5076 /* 14994 */ GIM_Try, /*On fail goto*//*Label 378*/ GIMT_Encode4(15020), // Rule ID 1232 //
5077 /* 14999 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5078 /* 15003 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5079 /* 15007 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v8i16] }:$v
5080 /* 15007 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5081 /* 15010 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5082 /* 15012 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5083 /* 15014 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5084 /* 15019 */ // GIR_Coverage, 1232,
5085 /* 15019 */ GIR_EraseRootFromParent_Done,
5086 /* 15020 */ // Label 378: @15020
5087 /* 15020 */ GIM_Reject,
5088 /* 15021 */ // Label 374: @15021
5089 /* 15021 */ GIM_Try, /*On fail goto*//*Label 379*/ GIMT_Encode4(15071),
5090 /* 15026 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5091 /* 15030 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5092 /* 15034 */ GIM_Try, /*On fail goto*//*Label 380*/ GIMT_Encode4(15052), // Rule ID 1228 //
5093 /* 15039 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v8i16] }:$v
5094 /* 15039 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5095 /* 15042 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5096 /* 15044 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5097 /* 15046 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5098 /* 15051 */ // GIR_Coverage, 1228,
5099 /* 15051 */ GIR_EraseRootFromParent_Done,
5100 /* 15052 */ // Label 380: @15052
5101 /* 15052 */ GIM_Try, /*On fail goto*//*Label 381*/ GIMT_Encode4(15070), // Rule ID 1230 //
5102 /* 15057 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v8i16] }:$v
5103 /* 15057 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5104 /* 15060 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5105 /* 15062 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5106 /* 15064 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5107 /* 15069 */ // GIR_Coverage, 1230,
5108 /* 15069 */ GIR_EraseRootFromParent_Done,
5109 /* 15070 */ // Label 381: @15070
5110 /* 15070 */ GIM_Reject,
5111 /* 15071 */ // Label 379: @15071
5112 /* 15071 */ GIM_Reject,
5113 /* 15072 */ // Label 375: @15072
5114 /* 15072 */ GIM_Try, /*On fail goto*//*Label 382*/ GIMT_Encode4(15122),
5115 /* 15077 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5116 /* 15081 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5117 /* 15085 */ GIM_Try, /*On fail goto*//*Label 383*/ GIMT_Encode4(15103), // Rule ID 1229 //
5118 /* 15090 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v8i16] }:$v
5119 /* 15090 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5120 /* 15093 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5121 /* 15095 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5122 /* 15097 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5123 /* 15102 */ // GIR_Coverage, 1229,
5124 /* 15102 */ GIR_EraseRootFromParent_Done,
5125 /* 15103 */ // Label 383: @15103
5126 /* 15103 */ GIM_Try, /*On fail goto*//*Label 384*/ GIMT_Encode4(15121), // Rule ID 1231 //
5127 /* 15108 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v8i16] }:$v
5128 /* 15108 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5129 /* 15111 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5130 /* 15113 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5131 /* 15115 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5132 /* 15120 */ // GIR_Coverage, 1231,
5133 /* 15120 */ GIR_EraseRootFromParent_Done,
5134 /* 15121 */ // Label 384: @15121
5135 /* 15121 */ GIM_Reject,
5136 /* 15122 */ // Label 382: @15122
5137 /* 15122 */ GIM_Reject,
5138 /* 15123 */ // Label 376: @15123
5139 /* 15123 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(6), GIMT_Encode2(10), /*)*//*default:*//*Label 389*/ GIMT_Encode4(15306),
5140 /* 15134 */ /*GILLT_v16s8*//*Label 385*/ GIMT_Encode4(15150),
5141 /* 15138 */ /*GILLT_v8s16*//*Label 386*/ GIMT_Encode4(15177),
5142 /* 15142 */ /*GILLT_v4s32*//*Label 387*/ GIMT_Encode4(15204),
5143 /* 15146 */ /*GILLT_v2s64*//*Label 388*/ GIMT_Encode4(15255),
5144 /* 15150 */ // Label 385: @15150
5145 /* 15150 */ GIM_Try, /*On fail goto*//*Label 390*/ GIMT_Encode4(15176), // Rule ID 1257 //
5146 /* 15155 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5147 /* 15159 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5148 /* 15163 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v8f16] }:$v
5149 /* 15163 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5150 /* 15166 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5151 /* 15168 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5152 /* 15170 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5153 /* 15175 */ // GIR_Coverage, 1257,
5154 /* 15175 */ GIR_EraseRootFromParent_Done,
5155 /* 15176 */ // Label 390: @15176
5156 /* 15176 */ GIM_Reject,
5157 /* 15177 */ // Label 386: @15177
5158 /* 15177 */ GIM_Try, /*On fail goto*//*Label 391*/ GIMT_Encode4(15203), // Rule ID 1258 //
5159 /* 15182 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5160 /* 15186 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5161 /* 15190 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v8f16] }:$v
5162 /* 15190 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5163 /* 15193 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5164 /* 15195 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5165 /* 15197 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5166 /* 15202 */ // GIR_Coverage, 1258,
5167 /* 15202 */ GIR_EraseRootFromParent_Done,
5168 /* 15203 */ // Label 391: @15203
5169 /* 15203 */ GIM_Reject,
5170 /* 15204 */ // Label 387: @15204
5171 /* 15204 */ GIM_Try, /*On fail goto*//*Label 392*/ GIMT_Encode4(15254),
5172 /* 15209 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5173 /* 15213 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5174 /* 15217 */ GIM_Try, /*On fail goto*//*Label 393*/ GIMT_Encode4(15235), // Rule ID 1259 //
5175 /* 15222 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v8f16] }:$v
5176 /* 15222 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5177 /* 15225 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5178 /* 15227 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5179 /* 15229 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5180 /* 15234 */ // GIR_Coverage, 1259,
5181 /* 15234 */ GIR_EraseRootFromParent_Done,
5182 /* 15235 */ // Label 393: @15235
5183 /* 15235 */ GIM_Try, /*On fail goto*//*Label 394*/ GIMT_Encode4(15253), // Rule ID 1261 //
5184 /* 15240 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v8f16] }:$v
5185 /* 15240 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5186 /* 15243 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5187 /* 15245 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5188 /* 15247 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5189 /* 15252 */ // GIR_Coverage, 1261,
5190 /* 15252 */ GIR_EraseRootFromParent_Done,
5191 /* 15253 */ // Label 394: @15253
5192 /* 15253 */ GIM_Reject,
5193 /* 15254 */ // Label 392: @15254
5194 /* 15254 */ GIM_Reject,
5195 /* 15255 */ // Label 388: @15255
5196 /* 15255 */ GIM_Try, /*On fail goto*//*Label 395*/ GIMT_Encode4(15305),
5197 /* 15260 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5198 /* 15264 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5199 /* 15268 */ GIM_Try, /*On fail goto*//*Label 396*/ GIMT_Encode4(15286), // Rule ID 1260 //
5200 /* 15273 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v8f16] }:$v
5201 /* 15273 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5202 /* 15276 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5203 /* 15278 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5204 /* 15280 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5205 /* 15285 */ // GIR_Coverage, 1260,
5206 /* 15285 */ GIR_EraseRootFromParent_Done,
5207 /* 15286 */ // Label 396: @15286
5208 /* 15286 */ GIM_Try, /*On fail goto*//*Label 397*/ GIMT_Encode4(15304), // Rule ID 1262 //
5209 /* 15291 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v8f16] }:$v
5210 /* 15291 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5211 /* 15294 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5212 /* 15296 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5213 /* 15298 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5214 /* 15303 */ // GIR_Coverage, 1262,
5215 /* 15303 */ GIR_EraseRootFromParent_Done,
5216 /* 15304 */ // Label 397: @15304
5217 /* 15304 */ GIM_Reject,
5218 /* 15305 */ // Label 395: @15305
5219 /* 15305 */ GIM_Reject,
5220 /* 15306 */ // Label 389: @15306
5221 /* 15306 */ GIM_Reject,
5222 /* 15307 */ // Label 350: @15307
5223 /* 15307 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(6), GIMT_Encode2(10), /*)*//*default:*//*Label 402*/ GIMT_Encode4(15490),
5224 /* 15318 */ /*GILLT_v16s8*//*Label 398*/ GIMT_Encode4(15334),
5225 /* 15322 */ /*GILLT_v8s16*//*Label 399*/ GIMT_Encode4(15361),
5226 /* 15326 */ /*GILLT_v4s32*//*Label 400*/ GIMT_Encode4(15412),
5227 /* 15330 */ /*GILLT_v2s64*//*Label 401*/ GIMT_Encode4(15439),
5228 /* 15334 */ // Label 398: @15334
5229 /* 15334 */ GIM_Try, /*On fail goto*//*Label 403*/ GIMT_Encode4(15360), // Rule ID 1233 //
5230 /* 15339 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5231 /* 15343 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5232 /* 15347 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v4i32] }:$v
5233 /* 15347 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5234 /* 15350 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5235 /* 15352 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5236 /* 15354 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5237 /* 15359 */ // GIR_Coverage, 1233,
5238 /* 15359 */ GIR_EraseRootFromParent_Done,
5239 /* 15360 */ // Label 403: @15360
5240 /* 15360 */ GIM_Reject,
5241 /* 15361 */ // Label 399: @15361
5242 /* 15361 */ GIM_Try, /*On fail goto*//*Label 404*/ GIMT_Encode4(15411),
5243 /* 15366 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5244 /* 15370 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5245 /* 15374 */ GIM_Try, /*On fail goto*//*Label 405*/ GIMT_Encode4(15392), // Rule ID 1234 //
5246 /* 15379 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v4i32] }:$v
5247 /* 15379 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5248 /* 15382 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5249 /* 15384 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5250 /* 15386 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5251 /* 15391 */ // GIR_Coverage, 1234,
5252 /* 15391 */ GIR_EraseRootFromParent_Done,
5253 /* 15392 */ // Label 405: @15392
5254 /* 15392 */ GIM_Try, /*On fail goto*//*Label 406*/ GIMT_Encode4(15410), // Rule ID 1238 //
5255 /* 15397 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v4i32] }:$v
5256 /* 15397 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5257 /* 15400 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5258 /* 15402 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5259 /* 15404 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5260 /* 15409 */ // GIR_Coverage, 1238,
5261 /* 15409 */ GIR_EraseRootFromParent_Done,
5262 /* 15410 */ // Label 406: @15410
5263 /* 15410 */ GIM_Reject,
5264 /* 15411 */ // Label 404: @15411
5265 /* 15411 */ GIM_Reject,
5266 /* 15412 */ // Label 400: @15412
5267 /* 15412 */ GIM_Try, /*On fail goto*//*Label 407*/ GIMT_Encode4(15438), // Rule ID 1236 //
5268 /* 15417 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5269 /* 15421 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5270 /* 15425 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v4i32] }:$v
5271 /* 15425 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5272 /* 15428 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5273 /* 15430 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5274 /* 15432 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5275 /* 15437 */ // GIR_Coverage, 1236,
5276 /* 15437 */ GIR_EraseRootFromParent_Done,
5277 /* 15438 */ // Label 407: @15438
5278 /* 15438 */ GIM_Reject,
5279 /* 15439 */ // Label 401: @15439
5280 /* 15439 */ GIM_Try, /*On fail goto*//*Label 408*/ GIMT_Encode4(15489),
5281 /* 15444 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5282 /* 15448 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5283 /* 15452 */ GIM_Try, /*On fail goto*//*Label 409*/ GIMT_Encode4(15470), // Rule ID 1235 //
5284 /* 15457 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v4i32] }:$v
5285 /* 15457 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5286 /* 15460 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5287 /* 15462 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5288 /* 15464 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5289 /* 15469 */ // GIR_Coverage, 1235,
5290 /* 15469 */ GIR_EraseRootFromParent_Done,
5291 /* 15470 */ // Label 409: @15470
5292 /* 15470 */ GIM_Try, /*On fail goto*//*Label 410*/ GIMT_Encode4(15488), // Rule ID 1237 //
5293 /* 15475 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v4i32] }:$v
5294 /* 15475 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5295 /* 15478 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5296 /* 15480 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5297 /* 15482 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5298 /* 15487 */ // GIR_Coverage, 1237,
5299 /* 15487 */ GIR_EraseRootFromParent_Done,
5300 /* 15488 */ // Label 410: @15488
5301 /* 15488 */ GIM_Reject,
5302 /* 15489 */ // Label 408: @15489
5303 /* 15489 */ GIM_Reject,
5304 /* 15490 */ // Label 402: @15490
5305 /* 15490 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(6), GIMT_Encode2(10), /*)*//*default:*//*Label 415*/ GIMT_Encode4(15673),
5306 /* 15501 */ /*GILLT_v16s8*//*Label 411*/ GIMT_Encode4(15517),
5307 /* 15505 */ /*GILLT_v8s16*//*Label 412*/ GIMT_Encode4(15544),
5308 /* 15509 */ /*GILLT_v4s32*//*Label 413*/ GIMT_Encode4(15595),
5309 /* 15513 */ /*GILLT_v2s64*//*Label 414*/ GIMT_Encode4(15622),
5310 /* 15517 */ // Label 411: @15517
5311 /* 15517 */ GIM_Try, /*On fail goto*//*Label 416*/ GIMT_Encode4(15543), // Rule ID 1245 //
5312 /* 15522 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5313 /* 15526 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5314 /* 15530 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v4f32] }:$v
5315 /* 15530 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5316 /* 15533 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5317 /* 15535 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5318 /* 15537 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5319 /* 15542 */ // GIR_Coverage, 1245,
5320 /* 15542 */ GIR_EraseRootFromParent_Done,
5321 /* 15543 */ // Label 416: @15543
5322 /* 15543 */ GIM_Reject,
5323 /* 15544 */ // Label 412: @15544
5324 /* 15544 */ GIM_Try, /*On fail goto*//*Label 417*/ GIMT_Encode4(15594),
5325 /* 15549 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5326 /* 15553 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5327 /* 15557 */ GIM_Try, /*On fail goto*//*Label 418*/ GIMT_Encode4(15575), // Rule ID 1246 //
5328 /* 15562 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v4f32] }:$v
5329 /* 15562 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5330 /* 15565 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5331 /* 15567 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5332 /* 15569 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5333 /* 15574 */ // GIR_Coverage, 1246,
5334 /* 15574 */ GIR_EraseRootFromParent_Done,
5335 /* 15575 */ // Label 418: @15575
5336 /* 15575 */ GIM_Try, /*On fail goto*//*Label 419*/ GIMT_Encode4(15593), // Rule ID 1250 //
5337 /* 15580 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v4f32] }:$v
5338 /* 15580 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5339 /* 15583 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5340 /* 15585 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5341 /* 15587 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5342 /* 15592 */ // GIR_Coverage, 1250,
5343 /* 15592 */ GIR_EraseRootFromParent_Done,
5344 /* 15593 */ // Label 419: @15593
5345 /* 15593 */ GIM_Reject,
5346 /* 15594 */ // Label 417: @15594
5347 /* 15594 */ GIM_Reject,
5348 /* 15595 */ // Label 413: @15595
5349 /* 15595 */ GIM_Try, /*On fail goto*//*Label 420*/ GIMT_Encode4(15621), // Rule ID 1247 //
5350 /* 15600 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5351 /* 15604 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5352 /* 15608 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v4f32] }:$v
5353 /* 15608 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5354 /* 15611 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5355 /* 15613 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5356 /* 15615 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5357 /* 15620 */ // GIR_Coverage, 1247,
5358 /* 15620 */ GIR_EraseRootFromParent_Done,
5359 /* 15621 */ // Label 420: @15621
5360 /* 15621 */ GIM_Reject,
5361 /* 15622 */ // Label 414: @15622
5362 /* 15622 */ GIM_Try, /*On fail goto*//*Label 421*/ GIMT_Encode4(15672),
5363 /* 15627 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5364 /* 15631 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5365 /* 15635 */ GIM_Try, /*On fail goto*//*Label 422*/ GIMT_Encode4(15653), // Rule ID 1248 //
5366 /* 15640 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v4f32] }:$v
5367 /* 15640 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5368 /* 15643 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5369 /* 15645 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5370 /* 15647 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5371 /* 15652 */ // GIR_Coverage, 1248,
5372 /* 15652 */ GIR_EraseRootFromParent_Done,
5373 /* 15653 */ // Label 422: @15653
5374 /* 15653 */ GIM_Try, /*On fail goto*//*Label 423*/ GIMT_Encode4(15671), // Rule ID 1249 //
5375 /* 15658 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v4f32] }:$v
5376 /* 15658 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5377 /* 15661 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5378 /* 15663 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5379 /* 15665 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5380 /* 15670 */ // GIR_Coverage, 1249,
5381 /* 15670 */ GIR_EraseRootFromParent_Done,
5382 /* 15671 */ // Label 423: @15671
5383 /* 15671 */ GIM_Reject,
5384 /* 15672 */ // Label 421: @15672
5385 /* 15672 */ GIM_Reject,
5386 /* 15673 */ // Label 415: @15673
5387 /* 15673 */ GIM_Reject,
5388 /* 15674 */ // Label 351: @15674
5389 /* 15674 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(6), GIMT_Encode2(10), /*)*//*default:*//*Label 428*/ GIMT_Encode4(15857),
5390 /* 15685 */ /*GILLT_v16s8*//*Label 424*/ GIMT_Encode4(15701),
5391 /* 15689 */ /*GILLT_v8s16*//*Label 425*/ GIMT_Encode4(15728),
5392 /* 15693 */ /*GILLT_v4s32*//*Label 426*/ GIMT_Encode4(15779),
5393 /* 15697 */ /*GILLT_v2s64*//*Label 427*/ GIMT_Encode4(15830),
5394 /* 15701 */ // Label 424: @15701
5395 /* 15701 */ GIM_Try, /*On fail goto*//*Label 429*/ GIMT_Encode4(15727), // Rule ID 1239 //
5396 /* 15706 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5397 /* 15710 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5398 /* 15714 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v2i64] }:$v
5399 /* 15714 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5400 /* 15717 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5401 /* 15719 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5402 /* 15721 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5403 /* 15726 */ // GIR_Coverage, 1239,
5404 /* 15726 */ GIR_EraseRootFromParent_Done,
5405 /* 15727 */ // Label 429: @15727
5406 /* 15727 */ GIM_Reject,
5407 /* 15728 */ // Label 425: @15728
5408 /* 15728 */ GIM_Try, /*On fail goto*//*Label 430*/ GIMT_Encode4(15778),
5409 /* 15733 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5410 /* 15737 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5411 /* 15741 */ GIM_Try, /*On fail goto*//*Label 431*/ GIMT_Encode4(15759), // Rule ID 1240 //
5412 /* 15746 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v2i64] }:$v
5413 /* 15746 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5414 /* 15749 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5415 /* 15751 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5416 /* 15753 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5417 /* 15758 */ // GIR_Coverage, 1240,
5418 /* 15758 */ GIR_EraseRootFromParent_Done,
5419 /* 15759 */ // Label 431: @15759
5420 /* 15759 */ GIM_Try, /*On fail goto*//*Label 432*/ GIMT_Encode4(15777), // Rule ID 1244 //
5421 /* 15764 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v2i64] }:$v
5422 /* 15764 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5423 /* 15767 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5424 /* 15769 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5425 /* 15771 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5426 /* 15776 */ // GIR_Coverage, 1244,
5427 /* 15776 */ GIR_EraseRootFromParent_Done,
5428 /* 15777 */ // Label 432: @15777
5429 /* 15777 */ GIM_Reject,
5430 /* 15778 */ // Label 430: @15778
5431 /* 15778 */ GIM_Reject,
5432 /* 15779 */ // Label 426: @15779
5433 /* 15779 */ GIM_Try, /*On fail goto*//*Label 433*/ GIMT_Encode4(15829),
5434 /* 15784 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5435 /* 15788 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5436 /* 15792 */ GIM_Try, /*On fail goto*//*Label 434*/ GIMT_Encode4(15810), // Rule ID 1241 //
5437 /* 15797 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v2i64] }:$v
5438 /* 15797 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5439 /* 15800 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5440 /* 15802 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5441 /* 15804 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5442 /* 15809 */ // GIR_Coverage, 1241,
5443 /* 15809 */ GIR_EraseRootFromParent_Done,
5444 /* 15810 */ // Label 434: @15810
5445 /* 15810 */ GIM_Try, /*On fail goto*//*Label 435*/ GIMT_Encode4(15828), // Rule ID 1242 //
5446 /* 15815 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v2i64] }:$v
5447 /* 15815 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5448 /* 15818 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5449 /* 15820 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5450 /* 15822 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5451 /* 15827 */ // GIR_Coverage, 1242,
5452 /* 15827 */ GIR_EraseRootFromParent_Done,
5453 /* 15828 */ // Label 435: @15828
5454 /* 15828 */ GIM_Reject,
5455 /* 15829 */ // Label 433: @15829
5456 /* 15829 */ GIM_Reject,
5457 /* 15830 */ // Label 427: @15830
5458 /* 15830 */ GIM_Try, /*On fail goto*//*Label 436*/ GIMT_Encode4(15856), // Rule ID 1243 //
5459 /* 15835 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5460 /* 15839 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5461 /* 15843 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v2i64] }:$v
5462 /* 15843 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5463 /* 15846 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5464 /* 15848 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5465 /* 15850 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5466 /* 15855 */ // GIR_Coverage, 1243,
5467 /* 15855 */ GIR_EraseRootFromParent_Done,
5468 /* 15856 */ // Label 436: @15856
5469 /* 15856 */ GIM_Reject,
5470 /* 15857 */ // Label 428: @15857
5471 /* 15857 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(6), GIMT_Encode2(10), /*)*//*default:*//*Label 441*/ GIMT_Encode4(16040),
5472 /* 15868 */ /*GILLT_v16s8*//*Label 437*/ GIMT_Encode4(15884),
5473 /* 15872 */ /*GILLT_v8s16*//*Label 438*/ GIMT_Encode4(15911),
5474 /* 15876 */ /*GILLT_v4s32*//*Label 439*/ GIMT_Encode4(15962),
5475 /* 15880 */ /*GILLT_v2s64*//*Label 440*/ GIMT_Encode4(16013),
5476 /* 15884 */ // Label 437: @15884
5477 /* 15884 */ GIM_Try, /*On fail goto*//*Label 442*/ GIMT_Encode4(15910), // Rule ID 1251 //
5478 /* 15889 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5479 /* 15893 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5480 /* 15897 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v2f64] }:$v
5481 /* 15897 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5482 /* 15900 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5483 /* 15902 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5484 /* 15904 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5485 /* 15909 */ // GIR_Coverage, 1251,
5486 /* 15909 */ GIR_EraseRootFromParent_Done,
5487 /* 15910 */ // Label 442: @15910
5488 /* 15910 */ GIM_Reject,
5489 /* 15911 */ // Label 438: @15911
5490 /* 15911 */ GIM_Try, /*On fail goto*//*Label 443*/ GIMT_Encode4(15961),
5491 /* 15916 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5492 /* 15920 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5493 /* 15924 */ GIM_Try, /*On fail goto*//*Label 444*/ GIMT_Encode4(15942), // Rule ID 1252 //
5494 /* 15929 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v2f64] }:$v
5495 /* 15929 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5496 /* 15932 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5497 /* 15934 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5498 /* 15936 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5499 /* 15941 */ // GIR_Coverage, 1252,
5500 /* 15941 */ GIR_EraseRootFromParent_Done,
5501 /* 15942 */ // Label 444: @15942
5502 /* 15942 */ GIM_Try, /*On fail goto*//*Label 445*/ GIMT_Encode4(15960), // Rule ID 1256 //
5503 /* 15947 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v2f64] }:$v
5504 /* 15947 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5505 /* 15950 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5506 /* 15952 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5507 /* 15954 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5508 /* 15959 */ // GIR_Coverage, 1256,
5509 /* 15959 */ GIR_EraseRootFromParent_Done,
5510 /* 15960 */ // Label 445: @15960
5511 /* 15960 */ GIM_Reject,
5512 /* 15961 */ // Label 443: @15961
5513 /* 15961 */ GIM_Reject,
5514 /* 15962 */ // Label 439: @15962
5515 /* 15962 */ GIM_Try, /*On fail goto*//*Label 446*/ GIMT_Encode4(16012),
5516 /* 15967 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5517 /* 15971 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5518 /* 15975 */ GIM_Try, /*On fail goto*//*Label 447*/ GIMT_Encode4(15993), // Rule ID 1253 //
5519 /* 15980 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v2f64] }:$v
5520 /* 15980 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5521 /* 15983 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5522 /* 15985 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5523 /* 15987 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5524 /* 15992 */ // GIR_Coverage, 1253,
5525 /* 15992 */ GIR_EraseRootFromParent_Done,
5526 /* 15993 */ // Label 447: @15993
5527 /* 15993 */ GIM_Try, /*On fail goto*//*Label 448*/ GIMT_Encode4(16011), // Rule ID 1255 //
5528 /* 15998 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v2f64] }:$v
5529 /* 15998 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5530 /* 16001 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5531 /* 16003 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5532 /* 16005 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5533 /* 16010 */ // GIR_Coverage, 1255,
5534 /* 16010 */ GIR_EraseRootFromParent_Done,
5535 /* 16011 */ // Label 448: @16011
5536 /* 16011 */ GIM_Reject,
5537 /* 16012 */ // Label 446: @16012
5538 /* 16012 */ GIM_Reject,
5539 /* 16013 */ // Label 440: @16013
5540 /* 16013 */ GIM_Try, /*On fail goto*//*Label 449*/ GIMT_Encode4(16039), // Rule ID 1254 //
5541 /* 16018 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5542 /* 16022 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5543 /* 16026 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v2f64] }:$v
5544 /* 16026 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5545 /* 16029 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5546 /* 16031 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5547 /* 16033 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5548 /* 16038 */ // GIR_Coverage, 1254,
5549 /* 16038 */ GIR_EraseRootFromParent_Done,
5550 /* 16039 */ // Label 449: @16039
5551 /* 16039 */ GIM_Reject,
5552 /* 16040 */ // Label 441: @16040
5553 /* 16040 */ GIM_Reject,
5554 /* 16041 */ // Label 352: @16041
5555 /* 16041 */ GIM_Reject,
5556 /* 16042 */ // Label 13: @16042
5557 /* 16042 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(17), /*)*//*default:*//*Label 455*/ GIMT_Encode4(16261),
5558 /* 16053 */ /*GILLT_f32*//*Label 450*/ GIMT_Encode4(16105),
5559 /* 16057 */ /*GILLT_f64*//*Label 451*/ GIMT_Encode4(16135), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
5560 /* 16093 */ /*GILLT_v8f16*//*Label 452*/ GIMT_Encode4(16165),
5561 /* 16097 */ /*GILLT_v4f32*//*Label 453*/ GIMT_Encode4(16197),
5562 /* 16101 */ /*GILLT_v2f64*//*Label 454*/ GIMT_Encode4(16229),
5563 /* 16105 */ // Label 450: @16105
5564 /* 16105 */ GIM_Try, /*On fail goto*//*Label 456*/ GIMT_Encode4(16134), // Rule ID 148 //
5565 /* 16110 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
5566 /* 16113 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5567 /* 16117 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5568 /* 16121 */ // (ftrunc:{ *:[f32] } F32:{ *:[f32] }:$src) => (TRUNC_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
5569 /* 16121 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F32),
5570 /* 16126 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5571 /* 16132 */ GIR_RootConstrainSelectedInstOperands,
5572 /* 16133 */ // GIR_Coverage, 148,
5573 /* 16133 */ GIR_Done,
5574 /* 16134 */ // Label 456: @16134
5575 /* 16134 */ GIM_Reject,
5576 /* 16135 */ // Label 451: @16135
5577 /* 16135 */ GIM_Try, /*On fail goto*//*Label 457*/ GIMT_Encode4(16164), // Rule ID 149 //
5578 /* 16140 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
5579 /* 16143 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5580 /* 16147 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5581 /* 16151 */ // (ftrunc:{ *:[f64] } F64:{ *:[f64] }:$src) => (TRUNC_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
5582 /* 16151 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F64),
5583 /* 16156 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5584 /* 16162 */ GIR_RootConstrainSelectedInstOperands,
5585 /* 16163 */ // GIR_Coverage, 149,
5586 /* 16163 */ GIR_Done,
5587 /* 16164 */ // Label 457: @16164
5588 /* 16164 */ GIM_Reject,
5589 /* 16165 */ // Label 452: @16165
5590 /* 16165 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 458*/ GIMT_Encode4(16196), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 343 //
5591 /* 16172 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
5592 /* 16175 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5593 /* 16179 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5594 /* 16183 */ // (ftrunc:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (TRUNC_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
5595 /* 16183 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F16x8),
5596 /* 16188 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5597 /* 16194 */ GIR_RootConstrainSelectedInstOperands,
5598 /* 16195 */ // GIR_Coverage, 343,
5599 /* 16195 */ GIR_Done,
5600 /* 16196 */ // Label 458: @16196
5601 /* 16196 */ GIM_Reject,
5602 /* 16197 */ // Label 453: @16197
5603 /* 16197 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 459*/ GIMT_Encode4(16228), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 335 //
5604 /* 16204 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
5605 /* 16207 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5606 /* 16211 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5607 /* 16215 */ // (ftrunc:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (TRUNC_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
5608 /* 16215 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F32x4),
5609 /* 16220 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5610 /* 16226 */ GIR_RootConstrainSelectedInstOperands,
5611 /* 16227 */ // GIR_Coverage, 335,
5612 /* 16227 */ GIR_Done,
5613 /* 16228 */ // Label 459: @16228
5614 /* 16228 */ GIM_Reject,
5615 /* 16229 */ // Label 454: @16229
5616 /* 16229 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 460*/ GIMT_Encode4(16260), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 339 //
5617 /* 16236 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
5618 /* 16239 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5619 /* 16243 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5620 /* 16247 */ // (ftrunc:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (TRUNC_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
5621 /* 16247 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F64x2),
5622 /* 16252 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5623 /* 16258 */ GIR_RootConstrainSelectedInstOperands,
5624 /* 16259 */ // GIR_Coverage, 339,
5625 /* 16259 */ GIR_Done,
5626 /* 16260 */ // Label 460: @16260
5627 /* 16260 */ GIM_Reject,
5628 /* 16261 */ // Label 455: @16261
5629 /* 16261 */ GIM_Reject,
5630 /* 16262 */ // Label 14: @16262
5631 /* 16262 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(17), /*)*//*default:*//*Label 466*/ GIMT_Encode4(16467),
5632 /* 16273 */ /*GILLT_f32*//*Label 461*/ GIMT_Encode4(16325),
5633 /* 16277 */ /*GILLT_f64*//*Label 462*/ GIMT_Encode4(16351), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
5634 /* 16313 */ /*GILLT_v8f16*//*Label 463*/ GIMT_Encode4(16377),
5635 /* 16317 */ /*GILLT_v4f32*//*Label 464*/ GIMT_Encode4(16407),
5636 /* 16321 */ /*GILLT_v2f64*//*Label 465*/ GIMT_Encode4(16437),
5637 /* 16325 */ // Label 461: @16325
5638 /* 16325 */ GIM_Try, /*On fail goto*//*Label 467*/ GIMT_Encode4(16350), // Rule ID 681 //
5639 /* 16330 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
5640 /* 16333 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5641 /* 16337 */ // (froundeven:{ *:[f32] } f32:{ *:[f32] }:$src) => (NEAREST_F32:{ *:[f32] } f32:{ *:[f32] }:$src)
5642 /* 16337 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32),
5643 /* 16342 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5644 /* 16348 */ GIR_RootConstrainSelectedInstOperands,
5645 /* 16349 */ // GIR_Coverage, 681,
5646 /* 16349 */ GIR_Done,
5647 /* 16350 */ // Label 467: @16350
5648 /* 16350 */ GIM_Reject,
5649 /* 16351 */ // Label 462: @16351
5650 /* 16351 */ GIM_Try, /*On fail goto*//*Label 468*/ GIMT_Encode4(16376), // Rule ID 682 //
5651 /* 16356 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
5652 /* 16359 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5653 /* 16363 */ // (froundeven:{ *:[f64] } f64:{ *:[f64] }:$src) => (NEAREST_F64:{ *:[f64] } f64:{ *:[f64] }:$src)
5654 /* 16363 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64),
5655 /* 16368 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5656 /* 16374 */ GIR_RootConstrainSelectedInstOperands,
5657 /* 16375 */ // GIR_Coverage, 682,
5658 /* 16375 */ GIR_Done,
5659 /* 16376 */ // Label 468: @16376
5660 /* 16376 */ GIM_Reject,
5661 /* 16377 */ // Label 463: @16377
5662 /* 16377 */ GIM_Try, /*On fail goto*//*Label 469*/ GIMT_Encode4(16406), // Rule ID 1194 //
5663 /* 16382 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
5664 /* 16385 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5665 /* 16389 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5666 /* 16393 */ // (froundeven:{ *:[v8f16] } V128:{ *:[v8f16] }:$src) => (NEAREST_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$src)
5667 /* 16393 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F16x8),
5668 /* 16398 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5669 /* 16404 */ GIR_RootConstrainSelectedInstOperands,
5670 /* 16405 */ // GIR_Coverage, 1194,
5671 /* 16405 */ GIR_Done,
5672 /* 16406 */ // Label 469: @16406
5673 /* 16406 */ GIM_Reject,
5674 /* 16407 */ // Label 464: @16407
5675 /* 16407 */ GIM_Try, /*On fail goto*//*Label 470*/ GIMT_Encode4(16436), // Rule ID 1192 //
5676 /* 16412 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
5677 /* 16415 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5678 /* 16419 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5679 /* 16423 */ // (froundeven:{ *:[v4f32] } V128:{ *:[v4f32] }:$src) => (NEAREST_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$src)
5680 /* 16423 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32x4),
5681 /* 16428 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5682 /* 16434 */ GIR_RootConstrainSelectedInstOperands,
5683 /* 16435 */ // GIR_Coverage, 1192,
5684 /* 16435 */ GIR_Done,
5685 /* 16436 */ // Label 470: @16436
5686 /* 16436 */ GIM_Reject,
5687 /* 16437 */ // Label 465: @16437
5688 /* 16437 */ GIM_Try, /*On fail goto*//*Label 471*/ GIMT_Encode4(16466), // Rule ID 1193 //
5689 /* 16442 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
5690 /* 16445 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5691 /* 16449 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5692 /* 16453 */ // (froundeven:{ *:[v2f64] } V128:{ *:[v2f64] }:$src) => (NEAREST_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$src)
5693 /* 16453 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64x2),
5694 /* 16458 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5695 /* 16464 */ GIR_RootConstrainSelectedInstOperands,
5696 /* 16465 */ // GIR_Coverage, 1193,
5697 /* 16465 */ GIR_Done,
5698 /* 16466 */ // Label 471: @16466
5699 /* 16466 */ GIM_Reject,
5700 /* 16467 */ // Label 466: @16467
5701 /* 16467 */ GIM_Reject,
5702 /* 16468 */ // Label 15: @16468
5703 /* 16468 */ GIM_Try, /*On fail goto*//*Label 472*/ GIMT_Encode4(16606),
5704 /* 16473 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
5705 /* 16476 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
5706 /* 16479 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
5707 /* 16483 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5708 /* 16487 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 473*/ GIMT_Encode4(16546), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 1275 //
5709 /* 16494 */ // MIs[0] addr
5710 /* 16494 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
5711 /* 16498 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5712 /* 16502 */ // (ld:{ *:[v2f64] } I32:{ *:[i32] }:$addr)<<P:Predicate_unindexedload>><<P:Predicate_extload>> => (promote_low_F64x2:{ *:[v2f64] } (LOAD_ZERO_64_A32:{ *:[v16i8] } 0:{ *:[i32] }, 0:{ *:[i32] }, I32:{ *:[i32] }:$addr))
5713 /* 16502 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16i8,
5714 /* 16505 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_ZERO_64_A32),
5715 /* 16509 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
5716 /* 16514 */ GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
5717 /* 16517 */ GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
5718 /* 16520 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // addr
5719 /* 16524 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5720 /* 16527 */ GIR_MergeMemOperands, /*InsnID*/1, /*NumInsns*/1, /*MergeInsnID's*/0,
5721 /* 16531 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
5722 /* 16533 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::promote_low_F64x2),
5723 /* 16536 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5724 /* 16538 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
5725 /* 16541 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5726 /* 16544 */ GIR_RootConstrainSelectedInstOperands,
5727 /* 16545 */ // GIR_Coverage, 1275,
5728 /* 16545 */ GIR_EraseRootFromParent_Done,
5729 /* 16546 */ // Label 473: @16546
5730 /* 16546 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 474*/ GIMT_Encode4(16605), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 1276 //
5731 /* 16553 */ // MIs[0] addr
5732 /* 16553 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
5733 /* 16557 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
5734 /* 16561 */ // (ld:{ *:[v2f64] } I64:{ *:[i64] }:$addr)<<P:Predicate_unindexedload>><<P:Predicate_extload>> => (promote_low_F64x2:{ *:[v2f64] } (LOAD_ZERO_64_A64:{ *:[v16i8] } 0:{ *:[i32] }, 0:{ *:[i64] }, I64:{ *:[i64] }:$addr))
5735 /* 16561 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16i8,
5736 /* 16564 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_ZERO_64_A64),
5737 /* 16568 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
5738 /* 16573 */ GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
5739 /* 16576 */ GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
5740 /* 16579 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // addr
5741 /* 16583 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5742 /* 16586 */ GIR_MergeMemOperands, /*InsnID*/1, /*NumInsns*/1, /*MergeInsnID's*/0,
5743 /* 16590 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
5744 /* 16592 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::promote_low_F64x2),
5745 /* 16595 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5746 /* 16597 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
5747 /* 16600 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5748 /* 16603 */ GIR_RootConstrainSelectedInstOperands,
5749 /* 16604 */ // GIR_Coverage, 1276,
5750 /* 16604 */ GIR_EraseRootFromParent_Done,
5751 /* 16605 */ // Label 474: @16605
5752 /* 16605 */ GIM_Reject,
5753 /* 16606 */ // Label 472: @16606
5754 /* 16606 */ GIM_Reject,
5755 /* 16607 */ // Label 16: @16607
5756 /* 16607 */ GIM_Try, /*On fail goto*//*Label 475*/ GIMT_Encode4(16634), // Rule ID 17 //
5757 /* 16612 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
5758 /* 16615 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5759 /* 16619 */ // MIs[0] dst
5760 /* 16619 */ GIM_CheckIsMBB, /*MI*/0, /*Op*/1,
5761 /* 16622 */ // (brcond I32:{ *:[i32] }:$cond, (bb:{ *:[Other] }):$dst) => (BR_IF (bb:{ *:[Other] }):$dst, I32:{ *:[i32] }:$cond)
5762 /* 16622 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BR_IF),
5763 /* 16625 */ GIR_RootToRootCopy, /*OpIdx*/1, // dst
5764 /* 16627 */ GIR_RootToRootCopy, /*OpIdx*/0, // cond
5765 /* 16629 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5766 /* 16632 */ GIR_RootConstrainSelectedInstOperands,
5767 /* 16633 */ // GIR_Coverage, 17,
5768 /* 16633 */ GIR_EraseRootFromParent_Done,
5769 /* 16634 */ // Label 475: @16634
5770 /* 16634 */ GIM_Reject,
5771 /* 16635 */ // Label 17: @16635
5772 /* 16635 */ GIM_Try, /*On fail goto*//*Label 476*/ GIMT_Encode4(17749),
5773 /* 16640 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
5774 /* 16643 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 477*/ GIMT_Encode4(16681), GIMT_Encode2(GIFBS_HasFP16), // Rule ID 186 //
5775 /* 16650 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_splat_f16x8),
5776 /* 16655 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
5777 /* 16658 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
5778 /* 16661 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5779 /* 16665 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5780 /* 16669 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14648:{ *:[iPTR] }, F32:{ *:[f32] }:$x) => (SPLAT_F16x8:{ *:[v8f16] } F32:{ *:[f32] }:$x)
5781 /* 16669 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_F16x8),
5782 /* 16672 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5783 /* 16674 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
5784 /* 16676 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5785 /* 16679 */ GIR_RootConstrainSelectedInstOperands,
5786 /* 16680 */ // GIR_Coverage, 186,
5787 /* 16680 */ GIR_EraseRootFromParent_Done,
5788 /* 16681 */ // Label 477: @16681
5789 /* 16681 */ GIM_Try, /*On fail goto*//*Label 478*/ GIMT_Encode4(16834),
5790 /* 16686 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
5791 /* 16691 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
5792 /* 16694 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(10), GIMT_Encode2(14), /*)*//*default:*//*Label 483*/ GIMT_Encode4(16833),
5793 /* 16705 */ /*GILLT_v16i8*//*Label 479*/ GIMT_Encode4(16721),
5794 /* 16709 */ /*GILLT_v8i16*//*Label 480*/ GIMT_Encode4(16749),
5795 /* 16713 */ /*GILLT_v4i32*//*Label 481*/ GIMT_Encode4(16777),
5796 /* 16717 */ /*GILLT_v2i64*//*Label 482*/ GIMT_Encode4(16805),
5797 /* 16721 */ // Label 479: @16721
5798 /* 16721 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 484*/ GIMT_Encode4(16748), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 258 //
5799 /* 16728 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5800 /* 16732 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5801 /* 16736 */ // (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v16i8] }:$vec) => (ALLTRUE_I8x16:{ *:[i32] } V128:{ *:[v16i8] }:$vec)
5802 /* 16736 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
5803 /* 16739 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5804 /* 16741 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5805 /* 16743 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5806 /* 16746 */ GIR_RootConstrainSelectedInstOperands,
5807 /* 16747 */ // GIR_Coverage, 258,
5808 /* 16747 */ GIR_EraseRootFromParent_Done,
5809 /* 16748 */ // Label 484: @16748
5810 /* 16748 */ GIM_Reject,
5811 /* 16749 */ // Label 480: @16749
5812 /* 16749 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 485*/ GIMT_Encode4(16776), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 259 //
5813 /* 16756 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5814 /* 16760 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5815 /* 16764 */ // (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v8i16] }:$vec) => (ALLTRUE_I16x8:{ *:[i32] } V128:{ *:[v8i16] }:$vec)
5816 /* 16764 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
5817 /* 16767 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5818 /* 16769 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5819 /* 16771 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5820 /* 16774 */ GIR_RootConstrainSelectedInstOperands,
5821 /* 16775 */ // GIR_Coverage, 259,
5822 /* 16775 */ GIR_EraseRootFromParent_Done,
5823 /* 16776 */ // Label 485: @16776
5824 /* 16776 */ GIM_Reject,
5825 /* 16777 */ // Label 481: @16777
5826 /* 16777 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 486*/ GIMT_Encode4(16804), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 260 //
5827 /* 16784 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5828 /* 16788 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5829 /* 16792 */ // (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v4i32] }:$vec) => (ALLTRUE_I32x4:{ *:[i32] } V128:{ *:[v4i32] }:$vec)
5830 /* 16792 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
5831 /* 16795 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5832 /* 16797 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5833 /* 16799 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5834 /* 16802 */ GIR_RootConstrainSelectedInstOperands,
5835 /* 16803 */ // GIR_Coverage, 260,
5836 /* 16803 */ GIR_EraseRootFromParent_Done,
5837 /* 16804 */ // Label 486: @16804
5838 /* 16804 */ GIM_Reject,
5839 /* 16805 */ // Label 482: @16805
5840 /* 16805 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 487*/ GIMT_Encode4(16832), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 261 //
5841 /* 16812 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5842 /* 16816 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5843 /* 16820 */ // (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v2i64] }:$vec) => (ALLTRUE_I64x2:{ *:[i32] } V128:{ *:[v2i64] }:$vec)
5844 /* 16820 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
5845 /* 16823 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5846 /* 16825 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5847 /* 16827 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5848 /* 16830 */ GIR_RootConstrainSelectedInstOperands,
5849 /* 16831 */ // GIR_Coverage, 261,
5850 /* 16831 */ GIR_EraseRootFromParent_Done,
5851 /* 16832 */ // Label 487: @16832
5852 /* 16832 */ GIM_Reject,
5853 /* 16833 */ // Label 483: @16833
5854 /* 16833 */ GIM_Reject,
5855 /* 16834 */ // Label 478: @16834
5856 /* 16834 */ GIM_Try, /*On fail goto*//*Label 488*/ GIMT_Encode4(16987),
5857 /* 16839 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitmask),
5858 /* 16844 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
5859 /* 16847 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(10), GIMT_Encode2(14), /*)*//*default:*//*Label 493*/ GIMT_Encode4(16986),
5860 /* 16858 */ /*GILLT_v16i8*//*Label 489*/ GIMT_Encode4(16874),
5861 /* 16862 */ /*GILLT_v8i16*//*Label 490*/ GIMT_Encode4(16902),
5862 /* 16866 */ /*GILLT_v4i32*//*Label 491*/ GIMT_Encode4(16930),
5863 /* 16870 */ /*GILLT_v2i64*//*Label 492*/ GIMT_Encode4(16958),
5864 /* 16874 */ // Label 489: @16874
5865 /* 16874 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 494*/ GIMT_Encode4(16901), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 262 //
5866 /* 16881 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5867 /* 16885 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5868 /* 16889 */ // (intrinsic_wo_chain:{ *:[i32] } 14600:{ *:[iPTR] }, V128:{ *:[v16i8] }:$vec) => (BITMASK_I8x16:{ *:[i32] } V128:{ *:[v16i8] }:$vec)
5869 /* 16889 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I8x16),
5870 /* 16892 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5871 /* 16894 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5872 /* 16896 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5873 /* 16899 */ GIR_RootConstrainSelectedInstOperands,
5874 /* 16900 */ // GIR_Coverage, 262,
5875 /* 16900 */ GIR_EraseRootFromParent_Done,
5876 /* 16901 */ // Label 494: @16901
5877 /* 16901 */ GIM_Reject,
5878 /* 16902 */ // Label 490: @16902
5879 /* 16902 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 495*/ GIMT_Encode4(16929), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 263 //
5880 /* 16909 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5881 /* 16913 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5882 /* 16917 */ // (intrinsic_wo_chain:{ *:[i32] } 14600:{ *:[iPTR] }, V128:{ *:[v8i16] }:$vec) => (BITMASK_I16x8:{ *:[i32] } V128:{ *:[v8i16] }:$vec)
5883 /* 16917 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I16x8),
5884 /* 16920 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5885 /* 16922 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5886 /* 16924 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5887 /* 16927 */ GIR_RootConstrainSelectedInstOperands,
5888 /* 16928 */ // GIR_Coverage, 263,
5889 /* 16928 */ GIR_EraseRootFromParent_Done,
5890 /* 16929 */ // Label 495: @16929
5891 /* 16929 */ GIM_Reject,
5892 /* 16930 */ // Label 491: @16930
5893 /* 16930 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 496*/ GIMT_Encode4(16957), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 264 //
5894 /* 16937 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5895 /* 16941 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5896 /* 16945 */ // (intrinsic_wo_chain:{ *:[i32] } 14600:{ *:[iPTR] }, V128:{ *:[v4i32] }:$vec) => (BITMASK_I32x4:{ *:[i32] } V128:{ *:[v4i32] }:$vec)
5897 /* 16945 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I32x4),
5898 /* 16948 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5899 /* 16950 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5900 /* 16952 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5901 /* 16955 */ GIR_RootConstrainSelectedInstOperands,
5902 /* 16956 */ // GIR_Coverage, 264,
5903 /* 16956 */ GIR_EraseRootFromParent_Done,
5904 /* 16957 */ // Label 496: @16957
5905 /* 16957 */ GIM_Reject,
5906 /* 16958 */ // Label 492: @16958
5907 /* 16958 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 497*/ GIMT_Encode4(16985), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 265 //
5908 /* 16965 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5909 /* 16969 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5910 /* 16973 */ // (intrinsic_wo_chain:{ *:[i32] } 14600:{ *:[iPTR] }, V128:{ *:[v2i64] }:$vec) => (BITMASK_I64x2:{ *:[i32] } V128:{ *:[v2i64] }:$vec)
5911 /* 16973 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I64x2),
5912 /* 16976 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5913 /* 16978 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5914 /* 16980 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5915 /* 16983 */ GIR_RootConstrainSelectedInstOperands,
5916 /* 16984 */ // GIR_Coverage, 265,
5917 /* 16984 */ GIR_EraseRootFromParent_Done,
5918 /* 16985 */ // Label 497: @16985
5919 /* 16985 */ GIM_Reject,
5920 /* 16986 */ // Label 493: @16986
5921 /* 16986 */ GIM_Reject,
5922 /* 16987 */ // Label 488: @16987
5923 /* 16987 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 498*/ GIMT_Encode4(17025), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 449 //
5924 /* 16994 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_signed),
5925 /* 16999 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
5926 /* 17002 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
5927 /* 17005 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5928 /* 17009 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5929 /* 17013 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14641:{ *:[iPTR] }, V128:{ *:[v4f32] }:$vec) => (int_wasm_relaxed_trunc_signed_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
5930 /* 17013 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_signed_I32x4),
5931 /* 17016 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5932 /* 17018 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5933 /* 17020 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5934 /* 17023 */ GIR_RootConstrainSelectedInstOperands,
5935 /* 17024 */ // GIR_Coverage, 449,
5936 /* 17024 */ GIR_EraseRootFromParent_Done,
5937 /* 17025 */ // Label 498: @17025
5938 /* 17025 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 499*/ GIMT_Encode4(17063), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 450 //
5939 /* 17032 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_unsigned),
5940 /* 17037 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
5941 /* 17040 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
5942 /* 17043 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5943 /* 17047 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5944 /* 17051 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14643:{ *:[iPTR] }, V128:{ *:[v4f32] }:$vec) => (int_wasm_relaxed_trunc_unsigned_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
5945 /* 17051 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_unsigned_I32x4),
5946 /* 17054 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5947 /* 17056 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5948 /* 17058 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5949 /* 17061 */ GIR_RootConstrainSelectedInstOperands,
5950 /* 17062 */ // GIR_Coverage, 450,
5951 /* 17062 */ GIR_EraseRootFromParent_Done,
5952 /* 17063 */ // Label 499: @17063
5953 /* 17063 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 500*/ GIMT_Encode4(17101), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 451 //
5954 /* 17070 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_signed_zero),
5955 /* 17075 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
5956 /* 17078 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
5957 /* 17081 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5958 /* 17085 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5959 /* 17089 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14642:{ *:[iPTR] }, V128:{ *:[v2f64] }:$vec) => (int_wasm_relaxed_trunc_signed_zero_I32x4:{ *:[v4i32] } V128:{ *:[v2f64] }:$vec)
5960 /* 17089 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_signed_zero_I32x4),
5961 /* 17092 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5962 /* 17094 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5963 /* 17096 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5964 /* 17099 */ GIR_RootConstrainSelectedInstOperands,
5965 /* 17100 */ // GIR_Coverage, 451,
5966 /* 17100 */ GIR_EraseRootFromParent_Done,
5967 /* 17101 */ // Label 500: @17101
5968 /* 17101 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 501*/ GIMT_Encode4(17139), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 452 //
5969 /* 17108 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_unsigned_zero),
5970 /* 17113 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
5971 /* 17116 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
5972 /* 17119 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5973 /* 17123 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5974 /* 17127 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14644:{ *:[iPTR] }, V128:{ *:[v2f64] }:$vec) => (int_wasm_relaxed_trunc_unsigned_zero_I32x4:{ *:[v4i32] } V128:{ *:[v2f64] }:$vec)
5975 /* 17127 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_unsigned_zero_I32x4),
5976 /* 17130 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5977 /* 17132 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5978 /* 17134 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5979 /* 17137 */ GIR_RootConstrainSelectedInstOperands,
5980 /* 17138 */ // GIR_Coverage, 452,
5981 /* 17138 */ GIR_EraseRootFromParent_Done,
5982 /* 17139 */ // Label 501: @17139
5983 /* 17139 */ GIM_Try, /*On fail goto*//*Label 502*/ GIMT_Encode4(17175), // Rule ID 648 //
5984 /* 17144 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
5985 /* 17149 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
5986 /* 17152 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
5987 /* 17155 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5988 /* 17159 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5989 /* 17163 */ // (intrinsic_wo_chain:{ *:[i32] } 14671:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I32_TRUNC_S_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
5990 /* 17163 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_F32),
5991 /* 17166 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5992 /* 17168 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
5993 /* 17170 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5994 /* 17173 */ GIR_RootConstrainSelectedInstOperands,
5995 /* 17174 */ // GIR_Coverage, 648,
5996 /* 17174 */ GIR_EraseRootFromParent_Done,
5997 /* 17175 */ // Label 502: @17175
5998 /* 17175 */ GIM_Try, /*On fail goto*//*Label 503*/ GIMT_Encode4(17211), // Rule ID 649 //
5999 /* 17180 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
6000 /* 17185 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
6001 /* 17188 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
6002 /* 17191 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6003 /* 17195 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6004 /* 17199 */ // (intrinsic_wo_chain:{ *:[i32] } 14672:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I32_TRUNC_U_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
6005 /* 17199 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_F32),
6006 /* 17202 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6007 /* 17204 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6008 /* 17206 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6009 /* 17209 */ GIR_RootConstrainSelectedInstOperands,
6010 /* 17210 */ // GIR_Coverage, 649,
6011 /* 17210 */ GIR_EraseRootFromParent_Done,
6012 /* 17211 */ // Label 503: @17211
6013 /* 17211 */ GIM_Try, /*On fail goto*//*Label 504*/ GIMT_Encode4(17247), // Rule ID 650 //
6014 /* 17216 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
6015 /* 17221 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
6016 /* 17224 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
6017 /* 17227 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6018 /* 17231 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
6019 /* 17235 */ // (intrinsic_wo_chain:{ *:[i32] } 14671:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I32_TRUNC_S_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
6020 /* 17235 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_F64),
6021 /* 17238 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6022 /* 17240 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6023 /* 17242 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6024 /* 17245 */ GIR_RootConstrainSelectedInstOperands,
6025 /* 17246 */ // GIR_Coverage, 650,
6026 /* 17246 */ GIR_EraseRootFromParent_Done,
6027 /* 17247 */ // Label 504: @17247
6028 /* 17247 */ GIM_Try, /*On fail goto*//*Label 505*/ GIMT_Encode4(17283), // Rule ID 651 //
6029 /* 17252 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
6030 /* 17257 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
6031 /* 17260 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
6032 /* 17263 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6033 /* 17267 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
6034 /* 17271 */ // (intrinsic_wo_chain:{ *:[i32] } 14672:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I32_TRUNC_U_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
6035 /* 17271 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_F64),
6036 /* 17274 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6037 /* 17276 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6038 /* 17278 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6039 /* 17281 */ GIR_RootConstrainSelectedInstOperands,
6040 /* 17282 */ // GIR_Coverage, 651,
6041 /* 17282 */ GIR_EraseRootFromParent_Done,
6042 /* 17283 */ // Label 505: @17283
6043 /* 17283 */ GIM_Try, /*On fail goto*//*Label 506*/ GIMT_Encode4(17319), // Rule ID 652 //
6044 /* 17288 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
6045 /* 17293 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
6046 /* 17296 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
6047 /* 17299 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6048 /* 17303 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6049 /* 17307 */ // (intrinsic_wo_chain:{ *:[i64] } 14671:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I64_TRUNC_S_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
6050 /* 17307 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_F32),
6051 /* 17310 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6052 /* 17312 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6053 /* 17314 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6054 /* 17317 */ GIR_RootConstrainSelectedInstOperands,
6055 /* 17318 */ // GIR_Coverage, 652,
6056 /* 17318 */ GIR_EraseRootFromParent_Done,
6057 /* 17319 */ // Label 506: @17319
6058 /* 17319 */ GIM_Try, /*On fail goto*//*Label 507*/ GIMT_Encode4(17355), // Rule ID 653 //
6059 /* 17324 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
6060 /* 17329 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
6061 /* 17332 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
6062 /* 17335 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6063 /* 17339 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6064 /* 17343 */ // (intrinsic_wo_chain:{ *:[i64] } 14672:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I64_TRUNC_U_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
6065 /* 17343 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_F32),
6066 /* 17346 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6067 /* 17348 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6068 /* 17350 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6069 /* 17353 */ GIR_RootConstrainSelectedInstOperands,
6070 /* 17354 */ // GIR_Coverage, 653,
6071 /* 17354 */ GIR_EraseRootFromParent_Done,
6072 /* 17355 */ // Label 507: @17355
6073 /* 17355 */ GIM_Try, /*On fail goto*//*Label 508*/ GIMT_Encode4(17391), // Rule ID 654 //
6074 /* 17360 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
6075 /* 17365 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
6076 /* 17368 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
6077 /* 17371 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6078 /* 17375 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
6079 /* 17379 */ // (intrinsic_wo_chain:{ *:[i64] } 14671:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I64_TRUNC_S_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
6080 /* 17379 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_F64),
6081 /* 17382 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6082 /* 17384 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6083 /* 17386 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6084 /* 17389 */ GIR_RootConstrainSelectedInstOperands,
6085 /* 17390 */ // GIR_Coverage, 654,
6086 /* 17390 */ GIR_EraseRootFromParent_Done,
6087 /* 17391 */ // Label 508: @17391
6088 /* 17391 */ GIM_Try, /*On fail goto*//*Label 509*/ GIMT_Encode4(17427), // Rule ID 655 //
6089 /* 17396 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
6090 /* 17401 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
6091 /* 17404 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
6092 /* 17407 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6093 /* 17411 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
6094 /* 17415 */ // (intrinsic_wo_chain:{ *:[i64] } 14672:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I64_TRUNC_U_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
6095 /* 17415 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_F64),
6096 /* 17418 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6097 /* 17420 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6098 /* 17422 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6099 /* 17425 */ GIR_RootConstrainSelectedInstOperands,
6100 /* 17426 */ // GIR_Coverage, 655,
6101 /* 17426 */ GIR_EraseRootFromParent_Done,
6102 /* 17427 */ // Label 509: @17427
6103 /* 17427 */ GIM_Try, /*On fail goto*//*Label 510*/ GIMT_Encode4(17572),
6104 /* 17432 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
6105 /* 17437 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
6106 /* 17440 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(10), GIMT_Encode2(14), /*)*//*default:*//*Label 515*/ GIMT_Encode4(17571),
6107 /* 17451 */ /*GILLT_v16i8*//*Label 511*/ GIMT_Encode4(17467),
6108 /* 17455 */ /*GILLT_v8i16*//*Label 512*/ GIMT_Encode4(17493),
6109 /* 17459 */ /*GILLT_v4i32*//*Label 513*/ GIMT_Encode4(17519),
6110 /* 17463 */ /*GILLT_v2i64*//*Label 514*/ GIMT_Encode4(17545),
6111 /* 17467 */ // Label 511: @17467
6112 /* 17467 */ GIM_Try, /*On fail goto*//*Label 516*/ GIMT_Encode4(17492), // Rule ID 1124 //
6113 /* 17472 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6114 /* 17476 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6115 /* 17480 */ // (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v16i8] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v16i8] }:$vec)
6116 /* 17480 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
6117 /* 17483 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6118 /* 17485 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6119 /* 17487 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6120 /* 17490 */ GIR_RootConstrainSelectedInstOperands,
6121 /* 17491 */ // GIR_Coverage, 1124,
6122 /* 17491 */ GIR_EraseRootFromParent_Done,
6123 /* 17492 */ // Label 516: @17492
6124 /* 17492 */ GIM_Reject,
6125 /* 17493 */ // Label 512: @17493
6126 /* 17493 */ GIM_Try, /*On fail goto*//*Label 517*/ GIMT_Encode4(17518), // Rule ID 1125 //
6127 /* 17498 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6128 /* 17502 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6129 /* 17506 */ // (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v8i16] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v8i16] }:$vec)
6130 /* 17506 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
6131 /* 17509 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6132 /* 17511 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6133 /* 17513 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6134 /* 17516 */ GIR_RootConstrainSelectedInstOperands,
6135 /* 17517 */ // GIR_Coverage, 1125,
6136 /* 17517 */ GIR_EraseRootFromParent_Done,
6137 /* 17518 */ // Label 517: @17518
6138 /* 17518 */ GIM_Reject,
6139 /* 17519 */ // Label 513: @17519
6140 /* 17519 */ GIM_Try, /*On fail goto*//*Label 518*/ GIMT_Encode4(17544), // Rule ID 1126 //
6141 /* 17524 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6142 /* 17528 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6143 /* 17532 */ // (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v4i32] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v4i32] }:$vec)
6144 /* 17532 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
6145 /* 17535 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6146 /* 17537 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6147 /* 17539 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6148 /* 17542 */ GIR_RootConstrainSelectedInstOperands,
6149 /* 17543 */ // GIR_Coverage, 1126,
6150 /* 17543 */ GIR_EraseRootFromParent_Done,
6151 /* 17544 */ // Label 518: @17544
6152 /* 17544 */ GIM_Reject,
6153 /* 17545 */ // Label 514: @17545
6154 /* 17545 */ GIM_Try, /*On fail goto*//*Label 519*/ GIMT_Encode4(17570), // Rule ID 1127 //
6155 /* 17550 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6156 /* 17554 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6157 /* 17558 */ // (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v2i64] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v2i64] }:$vec)
6158 /* 17558 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
6159 /* 17561 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6160 /* 17563 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6161 /* 17565 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6162 /* 17568 */ GIR_RootConstrainSelectedInstOperands,
6163 /* 17569 */ // GIR_Coverage, 1127,
6164 /* 17569 */ GIR_EraseRootFromParent_Done,
6165 /* 17570 */ // Label 519: @17570
6166 /* 17570 */ GIM_Reject,
6167 /* 17571 */ // Label 515: @17571
6168 /* 17571 */ GIM_Reject,
6169 /* 17572 */ // Label 510: @17572
6170 /* 17572 */ GIM_Try, /*On fail goto*//*Label 520*/ GIMT_Encode4(17660),
6171 /* 17577 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_unsigned),
6172 /* 17582 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(11), GIMT_Encode2(13), /*)*//*default:*//*Label 523*/ GIMT_Encode4(17659),
6173 /* 17593 */ /*GILLT_v8i16*//*Label 521*/ GIMT_Encode4(17601),
6174 /* 17597 */ /*GILLT_v4i32*//*Label 522*/ GIMT_Encode4(17630),
6175 /* 17601 */ // Label 521: @17601
6176 /* 17601 */ GIM_Try, /*On fail goto*//*Label 524*/ GIMT_Encode4(17629), // Rule ID 1264 //
6177 /* 17606 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
6178 /* 17609 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6179 /* 17613 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6180 /* 17617 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14605:{ *:[iPTR] }, V128:{ *:[v16i8] }:$in) => (extadd_pairwise_u_I16x8:{ *:[v8i16] } V128:{ *:[v16i8] }:$in)
6181 /* 17617 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_u_I16x8),
6182 /* 17620 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6183 /* 17622 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
6184 /* 17624 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6185 /* 17627 */ GIR_RootConstrainSelectedInstOperands,
6186 /* 17628 */ // GIR_Coverage, 1264,
6187 /* 17628 */ GIR_EraseRootFromParent_Done,
6188 /* 17629 */ // Label 524: @17629
6189 /* 17629 */ GIM_Reject,
6190 /* 17630 */ // Label 522: @17630
6191 /* 17630 */ GIM_Try, /*On fail goto*//*Label 525*/ GIMT_Encode4(17658), // Rule ID 1263 //
6192 /* 17635 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
6193 /* 17638 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6194 /* 17642 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6195 /* 17646 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14605:{ *:[iPTR] }, V128:{ *:[v8i16] }:$in) => (extadd_pairwise_u_I32x4:{ *:[v4i32] } V128:{ *:[v8i16] }:$in)
6196 /* 17646 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_u_I32x4),
6197 /* 17649 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6198 /* 17651 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
6199 /* 17653 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6200 /* 17656 */ GIR_RootConstrainSelectedInstOperands,
6201 /* 17657 */ // GIR_Coverage, 1263,
6202 /* 17657 */ GIR_EraseRootFromParent_Done,
6203 /* 17658 */ // Label 525: @17658
6204 /* 17658 */ GIM_Reject,
6205 /* 17659 */ // Label 523: @17659
6206 /* 17659 */ GIM_Reject,
6207 /* 17660 */ // Label 520: @17660
6208 /* 17660 */ GIM_Try, /*On fail goto*//*Label 526*/ GIMT_Encode4(17748),
6209 /* 17665 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_signed),
6210 /* 17670 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(11), GIMT_Encode2(13), /*)*//*default:*//*Label 529*/ GIMT_Encode4(17747),
6211 /* 17681 */ /*GILLT_v8i16*//*Label 527*/ GIMT_Encode4(17689),
6212 /* 17685 */ /*GILLT_v4i32*//*Label 528*/ GIMT_Encode4(17718),
6213 /* 17689 */ // Label 527: @17689
6214 /* 17689 */ GIM_Try, /*On fail goto*//*Label 530*/ GIMT_Encode4(17717), // Rule ID 1266 //
6215 /* 17694 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
6216 /* 17697 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6217 /* 17701 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6218 /* 17705 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14604:{ *:[iPTR] }, V128:{ *:[v16i8] }:$in) => (extadd_pairwise_s_I16x8:{ *:[v8i16] } V128:{ *:[v16i8] }:$in)
6219 /* 17705 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_s_I16x8),
6220 /* 17708 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6221 /* 17710 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
6222 /* 17712 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6223 /* 17715 */ GIR_RootConstrainSelectedInstOperands,
6224 /* 17716 */ // GIR_Coverage, 1266,
6225 /* 17716 */ GIR_EraseRootFromParent_Done,
6226 /* 17717 */ // Label 530: @17717
6227 /* 17717 */ GIM_Reject,
6228 /* 17718 */ // Label 528: @17718
6229 /* 17718 */ GIM_Try, /*On fail goto*//*Label 531*/ GIMT_Encode4(17746), // Rule ID 1265 //
6230 /* 17723 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
6231 /* 17726 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6232 /* 17730 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6233 /* 17734 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14604:{ *:[iPTR] }, V128:{ *:[v8i16] }:$in) => (extadd_pairwise_s_I32x4:{ *:[v4i32] } V128:{ *:[v8i16] }:$in)
6234 /* 17734 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_s_I32x4),
6235 /* 17737 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6236 /* 17739 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
6237 /* 17741 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6238 /* 17744 */ GIR_RootConstrainSelectedInstOperands,
6239 /* 17745 */ // GIR_Coverage, 1265,
6240 /* 17745 */ GIR_EraseRootFromParent_Done,
6241 /* 17746 */ // Label 531: @17746
6242 /* 17746 */ GIM_Reject,
6243 /* 17747 */ // Label 529: @17747
6244 /* 17747 */ GIM_Reject,
6245 /* 17748 */ // Label 526: @17748
6246 /* 17748 */ GIM_Reject,
6247 /* 17749 */ // Label 476: @17749
6248 /* 17749 */ GIM_Try, /*On fail goto*//*Label 532*/ GIMT_Encode4(18852),
6249 /* 17754 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
6250 /* 17757 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 533*/ GIMT_Encode4(17815), GIMT_Encode2(GIFBS_HasFP16), // Rule ID 187 //
6251 /* 17764 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extract_lane_f16x8),
6252 /* 17769 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_f32,
6253 /* 17772 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
6254 /* 17775 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
6255 /* 17778 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6256 /* 17782 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6257 /* 17786 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
6258 /* 17790 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
6259 /* 17794 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
6260 /* 17798 */ // MIs[1] Operand 1
6261 /* 17798 */ // No operand predicates
6262 /* 17798 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
6263 /* 17800 */ // (intrinsic_wo_chain:{ *:[f32] } 14606:{ *:[iPTR] }, V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx) => (EXTRACT_LANE_F16x8:{ *:[f32] } V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] }):$idx)
6264 /* 17800 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EXTRACT_LANE_F16x8),
6265 /* 17803 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6266 /* 17805 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6267 /* 17807 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
6268 /* 17810 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6269 /* 17813 */ GIR_RootConstrainSelectedInstOperands,
6270 /* 17814 */ // GIR_Coverage, 187,
6271 /* 17814 */ GIR_EraseRootFromParent_Done,
6272 /* 17815 */ // Label 533: @17815
6273 /* 17815 */ GIM_Try, /*On fail goto*//*Label 534*/ GIMT_Encode4(17925),
6274 /* 17820 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_avgr_unsigned),
6275 /* 17825 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(10), GIMT_Encode2(12), /*)*//*default:*//*Label 537*/ GIMT_Encode4(17924),
6276 /* 17836 */ /*GILLT_v16i8*//*Label 535*/ GIMT_Encode4(17844),
6277 /* 17840 */ /*GILLT_v8i16*//*Label 536*/ GIMT_Encode4(17884),
6278 /* 17844 */ // Label 535: @17844
6279 /* 17844 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 538*/ GIMT_Encode4(17883), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 309 //
6280 /* 17851 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
6281 /* 17854 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
6282 /* 17857 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6283 /* 17861 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6284 /* 17865 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6285 /* 17869 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14599:{ *:[iPTR] }, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (AVGR_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
6286 /* 17869 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I8x16),
6287 /* 17872 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6288 /* 17874 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6289 /* 17876 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6290 /* 17878 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6291 /* 17881 */ GIR_RootConstrainSelectedInstOperands,
6292 /* 17882 */ // GIR_Coverage, 309,
6293 /* 17882 */ GIR_EraseRootFromParent_Done,
6294 /* 17883 */ // Label 538: @17883
6295 /* 17883 */ GIM_Reject,
6296 /* 17884 */ // Label 536: @17884
6297 /* 17884 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 539*/ GIMT_Encode4(17923), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 310 //
6298 /* 17891 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
6299 /* 17894 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
6300 /* 17897 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6301 /* 17901 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6302 /* 17905 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6303 /* 17909 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14599:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (AVGR_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
6304 /* 17909 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I16x8),
6305 /* 17912 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6306 /* 17914 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6307 /* 17916 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6308 /* 17918 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6309 /* 17921 */ GIR_RootConstrainSelectedInstOperands,
6310 /* 17922 */ // GIR_Coverage, 310,
6311 /* 17922 */ GIR_EraseRootFromParent_Done,
6312 /* 17923 */ // Label 539: @17923
6313 /* 17923 */ GIM_Reject,
6314 /* 17924 */ // Label 537: @17924
6315 /* 17924 */ GIM_Reject,
6316 /* 17925 */ // Label 534: @17925
6317 /* 17925 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 540*/ GIMT_Encode4(17972), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 311 //
6318 /* 17932 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_dot),
6319 /* 17937 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
6320 /* 17940 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
6321 /* 17943 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
6322 /* 17946 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6323 /* 17950 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6324 /* 17954 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6325 /* 17958 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14603:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (DOT:{ *:[v4i32] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
6326 /* 17958 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::DOT),
6327 /* 17961 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6328 /* 17963 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6329 /* 17965 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6330 /* 17967 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6331 /* 17970 */ GIR_RootConstrainSelectedInstOperands,
6332 /* 17971 */ // GIR_Coverage, 311,
6333 /* 17971 */ GIR_EraseRootFromParent_Done,
6334 /* 17972 */ // Label 540: @17972
6335 /* 17972 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 541*/ GIMT_Encode4(18019), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 435 //
6336 /* 17979 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_signed),
6337 /* 17984 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16i8,
6338 /* 17987 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
6339 /* 17990 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
6340 /* 17993 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6341 /* 17997 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6342 /* 18001 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6343 /* 18005 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14618:{ *:[iPTR] }, V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high) => (NARROW_S_I8x16:{ *:[v16i8] } V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high)
6344 /* 18005 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_S_I8x16),
6345 /* 18008 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6346 /* 18010 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
6347 /* 18012 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
6348 /* 18014 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6349 /* 18017 */ GIR_RootConstrainSelectedInstOperands,
6350 /* 18018 */ // GIR_Coverage, 435,
6351 /* 18018 */ GIR_EraseRootFromParent_Done,
6352 /* 18019 */ // Label 541: @18019
6353 /* 18019 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 542*/ GIMT_Encode4(18066), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 436 //
6354 /* 18026 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_unsigned),
6355 /* 18031 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16i8,
6356 /* 18034 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
6357 /* 18037 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
6358 /* 18040 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6359 /* 18044 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6360 /* 18048 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6361 /* 18052 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14619:{ *:[iPTR] }, V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high) => (NARROW_U_I8x16:{ *:[v16i8] } V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high)
6362 /* 18052 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_U_I8x16),
6363 /* 18055 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6364 /* 18057 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
6365 /* 18059 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
6366 /* 18061 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6367 /* 18064 */ GIR_RootConstrainSelectedInstOperands,
6368 /* 18065 */ // GIR_Coverage, 436,
6369 /* 18065 */ GIR_EraseRootFromParent_Done,
6370 /* 18066 */ // Label 542: @18066
6371 /* 18066 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 543*/ GIMT_Encode4(18113), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 437 //
6372 /* 18073 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_signed),
6373 /* 18078 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8i16,
6374 /* 18081 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
6375 /* 18084 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
6376 /* 18087 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6377 /* 18091 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6378 /* 18095 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6379 /* 18099 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14618:{ *:[iPTR] }, V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high) => (NARROW_S_I16x8:{ *:[v8i16] } V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high)
6380 /* 18099 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_S_I16x8),
6381 /* 18102 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6382 /* 18104 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
6383 /* 18106 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
6384 /* 18108 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6385 /* 18111 */ GIR_RootConstrainSelectedInstOperands,
6386 /* 18112 */ // GIR_Coverage, 437,
6387 /* 18112 */ GIR_EraseRootFromParent_Done,
6388 /* 18113 */ // Label 543: @18113
6389 /* 18113 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 544*/ GIMT_Encode4(18160), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 438 //
6390 /* 18120 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_unsigned),
6391 /* 18125 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8i16,
6392 /* 18128 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
6393 /* 18131 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
6394 /* 18134 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6395 /* 18138 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6396 /* 18142 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6397 /* 18146 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14619:{ *:[iPTR] }, V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high) => (NARROW_U_I16x8:{ *:[v8i16] } V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high)
6398 /* 18146 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_U_I16x8),
6399 /* 18149 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6400 /* 18151 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
6401 /* 18153 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
6402 /* 18155 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6403 /* 18158 */ GIR_RootConstrainSelectedInstOperands,
6404 /* 18159 */ // GIR_Coverage, 438,
6405 /* 18159 */ GIR_EraseRootFromParent_Done,
6406 /* 18160 */ // Label 544: @18160
6407 /* 18160 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 545*/ GIMT_Encode4(18207), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 447 //
6408 /* 18167 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_q15mulr_sat_signed),
6409 /* 18172 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8i16,
6410 /* 18175 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
6411 /* 18178 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
6412 /* 18181 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6413 /* 18185 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6414 /* 18189 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6415 /* 18193 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14623:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (Q15MULR_SAT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
6416 /* 18193 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::Q15MULR_SAT_S_I16x8),
6417 /* 18196 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6418 /* 18198 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6419 /* 18200 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6420 /* 18202 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6421 /* 18205 */ GIR_RootConstrainSelectedInstOperands,
6422 /* 18206 */ // GIR_Coverage, 447,
6423 /* 18206 */ GIR_EraseRootFromParent_Done,
6424 /* 18207 */ // Label 545: @18207
6425 /* 18207 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 546*/ GIMT_Encode4(18254), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 448 //
6426 /* 18214 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_swizzle),
6427 /* 18219 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16i8,
6428 /* 18222 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
6429 /* 18225 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
6430 /* 18228 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6431 /* 18232 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6432 /* 18236 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6433 /* 18240 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14640:{ *:[iPTR] }, V128:{ *:[v16i8] }:$src, V128:{ *:[v16i8] }:$mask) => (RELAXED_SWIZZLE:{ *:[v16i8] } V128:{ *:[v16i8] }:$src, V128:{ *:[v16i8] }:$mask)
6434 /* 18240 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_SWIZZLE),
6435 /* 18243 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6436 /* 18245 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6437 /* 18247 */ GIR_RootToRootCopy, /*OpIdx*/3, // mask
6438 /* 18249 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6439 /* 18252 */ GIR_RootConstrainSelectedInstOperands,
6440 /* 18253 */ // GIR_Coverage, 448,
6441 /* 18253 */ GIR_EraseRootFromParent_Done,
6442 /* 18254 */ // Label 546: @18254
6443 /* 18254 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 547*/ GIMT_Encode4(18301), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 463 //
6444 /* 18261 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_min),
6445 /* 18266 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
6446 /* 18269 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
6447 /* 18272 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
6448 /* 18275 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6449 /* 18279 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6450 /* 18283 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6451 /* 18287 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14637:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SIMD_RELAXED_FMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
6452 /* 18287 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F32x4),
6453 /* 18290 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6454 /* 18292 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6455 /* 18294 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6456 /* 18296 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6457 /* 18299 */ GIR_RootConstrainSelectedInstOperands,
6458 /* 18300 */ // GIR_Coverage, 463,
6459 /* 18300 */ GIR_EraseRootFromParent_Done,
6460 /* 18301 */ // Label 547: @18301
6461 /* 18301 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 548*/ GIMT_Encode4(18348), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 464 //
6462 /* 18308 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_max),
6463 /* 18313 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
6464 /* 18316 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
6465 /* 18319 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
6466 /* 18322 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6467 /* 18326 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6468 /* 18330 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6469 /* 18334 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14636:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SIMD_RELAXED_FMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
6470 /* 18334 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F32x4),
6471 /* 18337 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6472 /* 18339 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6473 /* 18341 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6474 /* 18343 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6475 /* 18346 */ GIR_RootConstrainSelectedInstOperands,
6476 /* 18347 */ // GIR_Coverage, 464,
6477 /* 18347 */ GIR_EraseRootFromParent_Done,
6478 /* 18348 */ // Label 548: @18348
6479 /* 18348 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 549*/ GIMT_Encode4(18395), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 465 //
6480 /* 18355 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_min),
6481 /* 18360 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
6482 /* 18363 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
6483 /* 18366 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
6484 /* 18369 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6485 /* 18373 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6486 /* 18377 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6487 /* 18381 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14637:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SIMD_RELAXED_FMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
6488 /* 18381 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F64x2),
6489 /* 18384 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6490 /* 18386 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6491 /* 18388 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6492 /* 18390 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6493 /* 18393 */ GIR_RootConstrainSelectedInstOperands,
6494 /* 18394 */ // GIR_Coverage, 465,
6495 /* 18394 */ GIR_EraseRootFromParent_Done,
6496 /* 18395 */ // Label 549: @18395
6497 /* 18395 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 550*/ GIMT_Encode4(18442), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 466 //
6498 /* 18402 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_max),
6499 /* 18407 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
6500 /* 18410 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
6501 /* 18413 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
6502 /* 18416 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6503 /* 18420 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6504 /* 18424 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6505 /* 18428 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14636:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SIMD_RELAXED_FMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
6506 /* 18428 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F64x2),
6507 /* 18431 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6508 /* 18433 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6509 /* 18435 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6510 /* 18437 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6511 /* 18440 */ GIR_RootConstrainSelectedInstOperands,
6512 /* 18441 */ // GIR_Coverage, 466,
6513 /* 18441 */ GIR_EraseRootFromParent_Done,
6514 /* 18442 */ // Label 550: @18442
6515 /* 18442 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 551*/ GIMT_Encode4(18489), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 467 //
6516 /* 18449 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_q15mulr_signed),
6517 /* 18454 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8i16,
6518 /* 18457 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
6519 /* 18460 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
6520 /* 18463 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6521 /* 18467 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6522 /* 18471 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6523 /* 18475 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14639:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (RELAXED_Q15MULR_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
6524 /* 18475 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_Q15MULR_S_I16x8),
6525 /* 18478 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6526 /* 18480 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6527 /* 18482 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6528 /* 18484 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6529 /* 18487 */ GIR_RootConstrainSelectedInstOperands,
6530 /* 18488 */ // GIR_Coverage, 467,
6531 /* 18488 */ GIR_EraseRootFromParent_Done,
6532 /* 18489 */ // Label 551: @18489
6533 /* 18489 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 552*/ GIMT_Encode4(18536), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 468 //
6534 /* 18496 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_signed),
6535 /* 18501 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8i16,
6536 /* 18504 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
6537 /* 18507 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
6538 /* 18510 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6539 /* 18514 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6540 /* 18518 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6541 /* 18522 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14633:{ *:[iPTR] }, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (RELAXED_DOT:{ *:[v8i16] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
6542 /* 18522 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT),
6543 /* 18525 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6544 /* 18527 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6545 /* 18529 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6546 /* 18531 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6547 /* 18534 */ GIR_RootConstrainSelectedInstOperands,
6548 /* 18535 */ // GIR_Coverage, 468,
6549 /* 18535 */ GIR_EraseRootFromParent_Done,
6550 /* 18536 */ // Label 552: @18536
6551 /* 18536 */ GIM_Try, /*On fail goto*//*Label 553*/ GIMT_Encode4(18581), // Rule ID 1023 //
6552 /* 18541 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_swizzle),
6553 /* 18546 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16i8,
6554 /* 18549 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
6555 /* 18552 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
6556 /* 18555 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6557 /* 18559 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6558 /* 18563 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6559 /* 18567 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14650:{ *:[iPTR] }, V128:{ *:[v16i8] }:$src, V128:{ *:[v16i8] }:$mask) => (SWIZZLE:{ *:[v16i8] } ?:{ *:[v16i8] }:$src, ?:{ *:[v16i8] }:$mask)
6560 /* 18567 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SWIZZLE),
6561 /* 18570 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6562 /* 18572 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6563 /* 18574 */ GIR_RootToRootCopy, /*OpIdx*/3, // mask
6564 /* 18576 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6565 /* 18579 */ GIR_RootConstrainSelectedInstOperands,
6566 /* 18580 */ // GIR_Coverage, 1023,
6567 /* 18580 */ GIR_EraseRootFromParent_Done,
6568 /* 18581 */ // Label 553: @18581
6569 /* 18581 */ GIM_Try, /*On fail goto*//*Label 554*/ GIMT_Encode4(18626), // Rule ID 1201 //
6570 /* 18586 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmin),
6571 /* 18591 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
6572 /* 18594 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
6573 /* 18597 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
6574 /* 18600 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6575 /* 18604 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6576 /* 18608 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6577 /* 18612 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14621:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (PMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
6578 /* 18612 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
6579 /* 18615 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6580 /* 18617 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6581 /* 18619 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6582 /* 18621 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6583 /* 18624 */ GIR_RootConstrainSelectedInstOperands,
6584 /* 18625 */ // GIR_Coverage, 1201,
6585 /* 18625 */ GIR_EraseRootFromParent_Done,
6586 /* 18626 */ // Label 554: @18626
6587 /* 18626 */ GIM_Try, /*On fail goto*//*Label 555*/ GIMT_Encode4(18671), // Rule ID 1202 //
6588 /* 18631 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmax),
6589 /* 18636 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
6590 /* 18639 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
6591 /* 18642 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
6592 /* 18645 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6593 /* 18649 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6594 /* 18653 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6595 /* 18657 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14620:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (PMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
6596 /* 18657 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
6597 /* 18660 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6598 /* 18662 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6599 /* 18664 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6600 /* 18666 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6601 /* 18669 */ GIR_RootConstrainSelectedInstOperands,
6602 /* 18670 */ // GIR_Coverage, 1202,
6603 /* 18670 */ GIR_EraseRootFromParent_Done,
6604 /* 18671 */ // Label 555: @18671
6605 /* 18671 */ GIM_Try, /*On fail goto*//*Label 556*/ GIMT_Encode4(18716), // Rule ID 1203 //
6606 /* 18676 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmin),
6607 /* 18681 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
6608 /* 18684 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
6609 /* 18687 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
6610 /* 18690 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6611 /* 18694 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6612 /* 18698 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6613 /* 18702 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14621:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (PMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
6614 /* 18702 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
6615 /* 18705 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6616 /* 18707 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6617 /* 18709 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6618 /* 18711 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6619 /* 18714 */ GIR_RootConstrainSelectedInstOperands,
6620 /* 18715 */ // GIR_Coverage, 1203,
6621 /* 18715 */ GIR_EraseRootFromParent_Done,
6622 /* 18716 */ // Label 556: @18716
6623 /* 18716 */ GIM_Try, /*On fail goto*//*Label 557*/ GIMT_Encode4(18761), // Rule ID 1204 //
6624 /* 18721 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmax),
6625 /* 18726 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
6626 /* 18729 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
6627 /* 18732 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
6628 /* 18735 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6629 /* 18739 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6630 /* 18743 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6631 /* 18747 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14620:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (PMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
6632 /* 18747 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
6633 /* 18750 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6634 /* 18752 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6635 /* 18754 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6636 /* 18756 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6637 /* 18759 */ GIR_RootConstrainSelectedInstOperands,
6638 /* 18760 */ // GIR_Coverage, 1204,
6639 /* 18760 */ GIR_EraseRootFromParent_Done,
6640 /* 18761 */ // Label 557: @18761
6641 /* 18761 */ GIM_Try, /*On fail goto*//*Label 558*/ GIMT_Encode4(18806), // Rule ID 1205 //
6642 /* 18766 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmin),
6643 /* 18771 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
6644 /* 18774 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
6645 /* 18777 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
6646 /* 18780 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6647 /* 18784 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6648 /* 18788 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6649 /* 18792 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14621:{ *:[iPTR] }, V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (PMIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
6650 /* 18792 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
6651 /* 18795 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6652 /* 18797 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6653 /* 18799 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6654 /* 18801 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6655 /* 18804 */ GIR_RootConstrainSelectedInstOperands,
6656 /* 18805 */ // GIR_Coverage, 1205,
6657 /* 18805 */ GIR_EraseRootFromParent_Done,
6658 /* 18806 */ // Label 558: @18806
6659 /* 18806 */ GIM_Try, /*On fail goto*//*Label 559*/ GIMT_Encode4(18851), // Rule ID 1206 //
6660 /* 18811 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmax),
6661 /* 18816 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
6662 /* 18819 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
6663 /* 18822 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
6664 /* 18825 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6665 /* 18829 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6666 /* 18833 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6667 /* 18837 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14620:{ *:[iPTR] }, V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (PMAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
6668 /* 18837 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
6669 /* 18840 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6670 /* 18842 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6671 /* 18844 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6672 /* 18846 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6673 /* 18849 */ GIR_RootConstrainSelectedInstOperands,
6674 /* 18850 */ // GIR_Coverage, 1206,
6675 /* 18850 */ GIR_EraseRootFromParent_Done,
6676 /* 18851 */ // Label 559: @18851
6677 /* 18851 */ GIM_Reject,
6678 /* 18852 */ // Label 532: @18852
6679 /* 18852 */ GIM_Try, /*On fail goto*//*Label 560*/ GIMT_Encode4(19938),
6680 /* 18857 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
6681 /* 18860 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 561*/ GIMT_Encode4(18927), GIMT_Encode2(GIFBS_HasFP16), // Rule ID 194 //
6682 /* 18867 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_replace_lane_f16x8),
6683 /* 18872 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
6684 /* 18875 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
6685 /* 18878 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
6686 /* 18881 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_f32,
6687 /* 18884 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6688 /* 18888 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6689 /* 18892 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
6690 /* 18896 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
6691 /* 18900 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
6692 /* 18904 */ // MIs[1] Operand 1
6693 /* 18904 */ // No operand predicates
6694 /* 18904 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6695 /* 18908 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
6696 /* 18910 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14645:{ *:[iPTR] }, V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx, F32:{ *:[f32] }:$x) => (REPLACE_LANE_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] }):$idx, F32:{ *:[f32] }:$x)
6697 /* 18910 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_F16x8),
6698 /* 18913 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6699 /* 18915 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6700 /* 18917 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
6701 /* 18920 */ GIR_RootToRootCopy, /*OpIdx*/4, // x
6702 /* 18922 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6703 /* 18925 */ GIR_RootConstrainSelectedInstOperands,
6704 /* 18926 */ // GIR_Coverage, 194,
6705 /* 18926 */ GIR_EraseRootFromParent_Done,
6706 /* 18927 */ // Label 561: @18927
6707 /* 18927 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 562*/ GIMT_Encode4(18983), GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128), // Rule ID 453 //
6708 /* 18934 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_madd),
6709 /* 18939 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
6710 /* 18942 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
6711 /* 18945 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
6712 /* 18948 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4f32,
6713 /* 18951 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6714 /* 18955 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6715 /* 18959 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6716 /* 18963 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6717 /* 18967 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14635:{ *:[iPTR] }, V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c) => (MADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c)
6718 /* 18967 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F32x4),
6719 /* 18970 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6720 /* 18972 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6721 /* 18974 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6722 /* 18976 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6723 /* 18978 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6724 /* 18981 */ GIR_RootConstrainSelectedInstOperands,
6725 /* 18982 */ // GIR_Coverage, 453,
6726 /* 18982 */ GIR_EraseRootFromParent_Done,
6727 /* 18983 */ // Label 562: @18983
6728 /* 18983 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 563*/ GIMT_Encode4(19039), GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128), // Rule ID 454 //
6729 /* 18990 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_nmadd),
6730 /* 18995 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
6731 /* 18998 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
6732 /* 19001 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
6733 /* 19004 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4f32,
6734 /* 19007 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6735 /* 19011 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6736 /* 19015 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6737 /* 19019 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6738 /* 19023 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14638:{ *:[iPTR] }, V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c) => (NMADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c)
6739 /* 19023 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F32x4),
6740 /* 19026 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6741 /* 19028 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6742 /* 19030 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6743 /* 19032 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6744 /* 19034 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6745 /* 19037 */ GIR_RootConstrainSelectedInstOperands,
6746 /* 19038 */ // GIR_Coverage, 454,
6747 /* 19038 */ GIR_EraseRootFromParent_Done,
6748 /* 19039 */ // Label 563: @19039
6749 /* 19039 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 564*/ GIMT_Encode4(19095), GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128), // Rule ID 455 //
6750 /* 19046 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_madd),
6751 /* 19051 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
6752 /* 19054 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
6753 /* 19057 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
6754 /* 19060 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2f64,
6755 /* 19063 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6756 /* 19067 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6757 /* 19071 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6758 /* 19075 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6759 /* 19079 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14635:{ *:[iPTR] }, V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c) => (MADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c)
6760 /* 19079 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F64x2),
6761 /* 19082 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6762 /* 19084 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6763 /* 19086 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6764 /* 19088 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6765 /* 19090 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6766 /* 19093 */ GIR_RootConstrainSelectedInstOperands,
6767 /* 19094 */ // GIR_Coverage, 455,
6768 /* 19094 */ GIR_EraseRootFromParent_Done,
6769 /* 19095 */ // Label 564: @19095
6770 /* 19095 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 565*/ GIMT_Encode4(19151), GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128), // Rule ID 456 //
6771 /* 19102 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_nmadd),
6772 /* 19107 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
6773 /* 19110 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
6774 /* 19113 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
6775 /* 19116 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2f64,
6776 /* 19119 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6777 /* 19123 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6778 /* 19127 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6779 /* 19131 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6780 /* 19135 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14638:{ *:[iPTR] }, V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c) => (NMADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c)
6781 /* 19135 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F64x2),
6782 /* 19138 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6783 /* 19140 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6784 /* 19142 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6785 /* 19144 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6786 /* 19146 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6787 /* 19149 */ GIR_RootConstrainSelectedInstOperands,
6788 /* 19150 */ // GIR_Coverage, 456,
6789 /* 19150 */ GIR_EraseRootFromParent_Done,
6790 /* 19151 */ // Label 565: @19151
6791 /* 19151 */ GIM_Try, /*On fail goto*//*Label 566*/ GIMT_Encode4(19385),
6792 /* 19156 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_laneselect),
6793 /* 19161 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(10), GIMT_Encode2(14), /*)*//*default:*//*Label 571*/ GIMT_Encode4(19384),
6794 /* 19172 */ /*GILLT_v16i8*//*Label 567*/ GIMT_Encode4(19188),
6795 /* 19176 */ /*GILLT_v8i16*//*Label 568*/ GIMT_Encode4(19237),
6796 /* 19180 */ /*GILLT_v4i32*//*Label 569*/ GIMT_Encode4(19286),
6797 /* 19184 */ /*GILLT_v2i64*//*Label 570*/ GIMT_Encode4(19335),
6798 /* 19188 */ // Label 567: @19188
6799 /* 19188 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 572*/ GIMT_Encode4(19236), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 459 //
6800 /* 19195 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
6801 /* 19198 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
6802 /* 19201 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v16i8,
6803 /* 19204 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6804 /* 19208 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6805 /* 19212 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6806 /* 19216 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6807 /* 19220 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14634:{ *:[iPTR] }, V128:{ *:[v16i8] }:$a, V128:{ *:[v16i8] }:$b, V128:{ *:[v16i8] }:$c) => (LANESELECT_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$a, V128:{ *:[v16i8] }:$b, V128:{ *:[v16i8] }:$c)
6808 /* 19220 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I8x16),
6809 /* 19223 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6810 /* 19225 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6811 /* 19227 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6812 /* 19229 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6813 /* 19231 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6814 /* 19234 */ GIR_RootConstrainSelectedInstOperands,
6815 /* 19235 */ // GIR_Coverage, 459,
6816 /* 19235 */ GIR_EraseRootFromParent_Done,
6817 /* 19236 */ // Label 572: @19236
6818 /* 19236 */ GIM_Reject,
6819 /* 19237 */ // Label 568: @19237
6820 /* 19237 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 573*/ GIMT_Encode4(19285), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 460 //
6821 /* 19244 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
6822 /* 19247 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
6823 /* 19250 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8i16,
6824 /* 19253 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6825 /* 19257 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6826 /* 19261 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6827 /* 19265 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6828 /* 19269 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14634:{ *:[iPTR] }, V128:{ *:[v8i16] }:$a, V128:{ *:[v8i16] }:$b, V128:{ *:[v8i16] }:$c) => (LANESELECT_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$a, V128:{ *:[v8i16] }:$b, V128:{ *:[v8i16] }:$c)
6829 /* 19269 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I16x8),
6830 /* 19272 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6831 /* 19274 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6832 /* 19276 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6833 /* 19278 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6834 /* 19280 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6835 /* 19283 */ GIR_RootConstrainSelectedInstOperands,
6836 /* 19284 */ // GIR_Coverage, 460,
6837 /* 19284 */ GIR_EraseRootFromParent_Done,
6838 /* 19285 */ // Label 573: @19285
6839 /* 19285 */ GIM_Reject,
6840 /* 19286 */ // Label 569: @19286
6841 /* 19286 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 574*/ GIMT_Encode4(19334), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 461 //
6842 /* 19293 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
6843 /* 19296 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
6844 /* 19299 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4i32,
6845 /* 19302 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6846 /* 19306 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6847 /* 19310 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6848 /* 19314 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6849 /* 19318 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14634:{ *:[iPTR] }, V128:{ *:[v4i32] }:$a, V128:{ *:[v4i32] }:$b, V128:{ *:[v4i32] }:$c) => (LANESELECT_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$a, V128:{ *:[v4i32] }:$b, V128:{ *:[v4i32] }:$c)
6850 /* 19318 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I32x4),
6851 /* 19321 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6852 /* 19323 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6853 /* 19325 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6854 /* 19327 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6855 /* 19329 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6856 /* 19332 */ GIR_RootConstrainSelectedInstOperands,
6857 /* 19333 */ // GIR_Coverage, 461,
6858 /* 19333 */ GIR_EraseRootFromParent_Done,
6859 /* 19334 */ // Label 574: @19334
6860 /* 19334 */ GIM_Reject,
6861 /* 19335 */ // Label 570: @19335
6862 /* 19335 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 575*/ GIMT_Encode4(19383), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 462 //
6863 /* 19342 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
6864 /* 19345 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
6865 /* 19348 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2i64,
6866 /* 19351 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6867 /* 19355 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6868 /* 19359 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6869 /* 19363 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6870 /* 19367 */ // (intrinsic_wo_chain:{ *:[v2i64] } 14634:{ *:[iPTR] }, V128:{ *:[v2i64] }:$a, V128:{ *:[v2i64] }:$b, V128:{ *:[v2i64] }:$c) => (LANESELECT_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$a, V128:{ *:[v2i64] }:$b, V128:{ *:[v2i64] }:$c)
6871 /* 19367 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I64x2),
6872 /* 19370 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6873 /* 19372 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6874 /* 19374 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6875 /* 19376 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6876 /* 19378 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6877 /* 19381 */ GIR_RootConstrainSelectedInstOperands,
6878 /* 19382 */ // GIR_Coverage, 462,
6879 /* 19382 */ GIR_EraseRootFromParent_Done,
6880 /* 19383 */ // Label 575: @19383
6881 /* 19383 */ GIM_Reject,
6882 /* 19384 */ // Label 571: @19384
6883 /* 19384 */ GIM_Reject,
6884 /* 19385 */ // Label 566: @19385
6885 /* 19385 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 576*/ GIMT_Encode4(19441), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 469 //
6886 /* 19392 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_add_signed),
6887 /* 19397 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
6888 /* 19400 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
6889 /* 19403 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
6890 /* 19406 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4i32,
6891 /* 19409 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6892 /* 19413 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6893 /* 19417 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6894 /* 19421 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6895 /* 19425 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14632:{ *:[iPTR] }, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc) => (RELAXED_DOT_ADD:{ *:[v4i32] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc)
6896 /* 19425 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_ADD),
6897 /* 19428 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6898 /* 19430 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6899 /* 19432 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6900 /* 19434 */ GIR_RootToRootCopy, /*OpIdx*/4, // acc
6901 /* 19436 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6902 /* 19439 */ GIR_RootConstrainSelectedInstOperands,
6903 /* 19440 */ // GIR_Coverage, 469,
6904 /* 19440 */ GIR_EraseRootFromParent_Done,
6905 /* 19441 */ // Label 576: @19441
6906 /* 19441 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 577*/ GIMT_Encode4(19497), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 470 //
6907 /* 19448 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_bf16x8_add_f32),
6908 /* 19453 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
6909 /* 19456 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
6910 /* 19459 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
6911 /* 19462 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4f32,
6912 /* 19465 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6913 /* 19469 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6914 /* 19473 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6915 /* 19477 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6916 /* 19481 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14631:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, V128:{ *:[v4f32] }:$acc) => (RELAXED_DOT_BFLOAT:{ *:[v4f32] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, V128:{ *:[v4f32] }:$acc)
6917 /* 19481 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_BFLOAT),
6918 /* 19484 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6919 /* 19486 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6920 /* 19488 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6921 /* 19490 */ GIR_RootToRootCopy, /*OpIdx*/4, // acc
6922 /* 19492 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6923 /* 19495 */ GIR_RootConstrainSelectedInstOperands,
6924 /* 19496 */ // GIR_Coverage, 470,
6925 /* 19496 */ GIR_EraseRootFromParent_Done,
6926 /* 19497 */ // Label 577: @19497
6927 /* 19497 */ GIM_Try, /*On fail goto*//*Label 578*/ GIMT_Encode4(19829),
6928 /* 19502 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitselect),
6929 /* 19507 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(10), GIMT_Encode2(17), /*)*//*default:*//*Label 585*/ GIMT_Encode4(19828),
6930 /* 19518 */ /*GILLT_v16i8*//*Label 579*/ GIMT_Encode4(19546),
6931 /* 19522 */ /*GILLT_v8i16*//*Label 580*/ GIMT_Encode4(19593),
6932 /* 19526 */ /*GILLT_v4i32*//*Label 581*/ GIMT_Encode4(19640),
6933 /* 19530 */ /*GILLT_v2i64*//*Label 582*/ GIMT_Encode4(19687), GIMT_Encode4(0),
6934 /* 19538 */ /*GILLT_v4f32*//*Label 583*/ GIMT_Encode4(19734),
6935 /* 19542 */ /*GILLT_v2f64*//*Label 584*/ GIMT_Encode4(19781),
6936 /* 19546 */ // Label 579: @19546
6937 /* 19546 */ GIM_Try, /*On fail goto*//*Label 586*/ GIMT_Encode4(19592), // Rule ID 1078 //
6938 /* 19551 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
6939 /* 19554 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
6940 /* 19557 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v16i8,
6941 /* 19560 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6942 /* 19564 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6943 /* 19568 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6944 /* 19572 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6945 /* 19576 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14601:{ *:[iPTR] }, V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$c) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
6946 /* 19576 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
6947 /* 19579 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6948 /* 19581 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
6949 /* 19583 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
6950 /* 19585 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6951 /* 19587 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6952 /* 19590 */ GIR_RootConstrainSelectedInstOperands,
6953 /* 19591 */ // GIR_Coverage, 1078,
6954 /* 19591 */ GIR_EraseRootFromParent_Done,
6955 /* 19592 */ // Label 586: @19592
6956 /* 19592 */ GIM_Reject,
6957 /* 19593 */ // Label 580: @19593
6958 /* 19593 */ GIM_Try, /*On fail goto*//*Label 587*/ GIMT_Encode4(19639), // Rule ID 1079 //
6959 /* 19598 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
6960 /* 19601 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
6961 /* 19604 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8i16,
6962 /* 19607 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6963 /* 19611 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6964 /* 19615 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6965 /* 19619 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6966 /* 19623 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14601:{ *:[iPTR] }, V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$c) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
6967 /* 19623 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
6968 /* 19626 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6969 /* 19628 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
6970 /* 19630 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
6971 /* 19632 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6972 /* 19634 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6973 /* 19637 */ GIR_RootConstrainSelectedInstOperands,
6974 /* 19638 */ // GIR_Coverage, 1079,
6975 /* 19638 */ GIR_EraseRootFromParent_Done,
6976 /* 19639 */ // Label 587: @19639
6977 /* 19639 */ GIM_Reject,
6978 /* 19640 */ // Label 581: @19640
6979 /* 19640 */ GIM_Try, /*On fail goto*//*Label 588*/ GIMT_Encode4(19686), // Rule ID 1080 //
6980 /* 19645 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
6981 /* 19648 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
6982 /* 19651 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4i32,
6983 /* 19654 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6984 /* 19658 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6985 /* 19662 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6986 /* 19666 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6987 /* 19670 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14601:{ *:[iPTR] }, V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$c) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
6988 /* 19670 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
6989 /* 19673 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6990 /* 19675 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
6991 /* 19677 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
6992 /* 19679 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6993 /* 19681 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6994 /* 19684 */ GIR_RootConstrainSelectedInstOperands,
6995 /* 19685 */ // GIR_Coverage, 1080,
6996 /* 19685 */ GIR_EraseRootFromParent_Done,
6997 /* 19686 */ // Label 588: @19686
6998 /* 19686 */ GIM_Reject,
6999 /* 19687 */ // Label 582: @19687
7000 /* 19687 */ GIM_Try, /*On fail goto*//*Label 589*/ GIMT_Encode4(19733), // Rule ID 1081 //
7001 /* 19692 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
7002 /* 19695 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
7003 /* 19698 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2i64,
7004 /* 19701 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7005 /* 19705 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7006 /* 19709 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7007 /* 19713 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7008 /* 19717 */ // (intrinsic_wo_chain:{ *:[v2i64] } 14601:{ *:[iPTR] }, V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$c) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
7009 /* 19717 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
7010 /* 19720 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7011 /* 19722 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
7012 /* 19724 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
7013 /* 19726 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
7014 /* 19728 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7015 /* 19731 */ GIR_RootConstrainSelectedInstOperands,
7016 /* 19732 */ // GIR_Coverage, 1081,
7017 /* 19732 */ GIR_EraseRootFromParent_Done,
7018 /* 19733 */ // Label 589: @19733
7019 /* 19733 */ GIM_Reject,
7020 /* 19734 */ // Label 583: @19734
7021 /* 19734 */ GIM_Try, /*On fail goto*//*Label 590*/ GIMT_Encode4(19780), // Rule ID 1082 //
7022 /* 19739 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
7023 /* 19742 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
7024 /* 19745 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4f32,
7025 /* 19748 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7026 /* 19752 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7027 /* 19756 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7028 /* 19760 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7029 /* 19764 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14601:{ *:[iPTR] }, V128:{ *:[v4f32] }:$v1, V128:{ *:[v4f32] }:$v2, V128:{ *:[v4f32] }:$c) => (BITSELECT:{ *:[v4f32] } ?:{ *:[v4f32] }:$v1, ?:{ *:[v4f32] }:$v2, ?:{ *:[v4f32] }:$c)
7030 /* 19764 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
7031 /* 19767 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7032 /* 19769 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
7033 /* 19771 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
7034 /* 19773 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
7035 /* 19775 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7036 /* 19778 */ GIR_RootConstrainSelectedInstOperands,
7037 /* 19779 */ // GIR_Coverage, 1082,
7038 /* 19779 */ GIR_EraseRootFromParent_Done,
7039 /* 19780 */ // Label 590: @19780
7040 /* 19780 */ GIM_Reject,
7041 /* 19781 */ // Label 584: @19781
7042 /* 19781 */ GIM_Try, /*On fail goto*//*Label 591*/ GIMT_Encode4(19827), // Rule ID 1083 //
7043 /* 19786 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
7044 /* 19789 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
7045 /* 19792 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2f64,
7046 /* 19795 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7047 /* 19799 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7048 /* 19803 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7049 /* 19807 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7050 /* 19811 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14601:{ *:[iPTR] }, V128:{ *:[v2f64] }:$v1, V128:{ *:[v2f64] }:$v2, V128:{ *:[v2f64] }:$c) => (BITSELECT:{ *:[v2f64] } ?:{ *:[v2f64] }:$v1, ?:{ *:[v2f64] }:$v2, ?:{ *:[v2f64] }:$c)
7051 /* 19811 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
7052 /* 19814 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7053 /* 19816 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
7054 /* 19818 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
7055 /* 19820 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
7056 /* 19822 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7057 /* 19825 */ GIR_RootConstrainSelectedInstOperands,
7058 /* 19826 */ // GIR_Coverage, 1083,
7059 /* 19826 */ GIR_EraseRootFromParent_Done,
7060 /* 19827 */ // Label 591: @19827
7061 /* 19827 */ GIM_Reject,
7062 /* 19828 */ // Label 585: @19828
7063 /* 19828 */ GIM_Reject,
7064 /* 19829 */ // Label 578: @19829
7065 /* 19829 */ GIM_Try, /*On fail goto*//*Label 592*/ GIMT_Encode4(19883), // Rule ID 1293 //
7066 /* 19834 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_madd),
7067 /* 19839 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
7068 /* 19842 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
7069 /* 19845 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
7070 /* 19848 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8f16,
7071 /* 19851 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7072 /* 19855 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7073 /* 19859 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7074 /* 19863 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7075 /* 19867 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14635:{ *:[iPTR] }, V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (MADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
7076 /* 19867 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F16x8),
7077 /* 19870 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7078 /* 19872 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
7079 /* 19874 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
7080 /* 19876 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
7081 /* 19878 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7082 /* 19881 */ GIR_RootConstrainSelectedInstOperands,
7083 /* 19882 */ // GIR_Coverage, 1293,
7084 /* 19882 */ GIR_EraseRootFromParent_Done,
7085 /* 19883 */ // Label 592: @19883
7086 /* 19883 */ GIM_Try, /*On fail goto*//*Label 593*/ GIMT_Encode4(19937), // Rule ID 1294 //
7087 /* 19888 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_nmadd),
7088 /* 19893 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
7089 /* 19896 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
7090 /* 19899 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
7091 /* 19902 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8f16,
7092 /* 19905 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7093 /* 19909 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7094 /* 19913 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7095 /* 19917 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7096 /* 19921 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14638:{ *:[iPTR] }, V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (NMADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
7097 /* 19921 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F16x8),
7098 /* 19924 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7099 /* 19926 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
7100 /* 19928 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
7101 /* 19930 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
7102 /* 19932 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7103 /* 19935 */ GIR_RootConstrainSelectedInstOperands,
7104 /* 19936 */ // GIR_Coverage, 1294,
7105 /* 19936 */ GIR_EraseRootFromParent_Done,
7106 /* 19937 */ // Label 593: @19937
7107 /* 19937 */ GIM_Reject,
7108 /* 19938 */ // Label 560: @19938
7109 /* 19938 */ GIM_Reject,
7110 /* 19939 */ // Label 18: @19939
7111 /* 19939 */ GIM_Try, /*On fail goto*//*Label 594*/ GIMT_Encode4(20054),
7112 /* 19944 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
7113 /* 19947 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_memory_size),
7114 /* 19952 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 597*/ GIMT_Encode4(20053),
7115 /* 19963 */ /*GILLT_i32*//*Label 595*/ GIMT_Encode4(19971),
7116 /* 19967 */ /*GILLT_i64*//*Label 596*/ GIMT_Encode4(20012),
7117 /* 19971 */ // Label 595: @19971
7118 /* 19971 */ GIM_Try, /*On fail goto*//*Label 598*/ GIMT_Encode4(20011), // Rule ID 11 //
7119 /* 19976 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
7120 /* 19979 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7121 /* 19983 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7122 /* 19987 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7123 /* 19991 */ // MIs[1] Operand 1
7124 /* 19991 */ // No operand predicates
7125 /* 19991 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7126 /* 19993 */ // (intrinsic_w_chain:{ *:[i32] } 14617:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags) => (anonymous_13995MEMORY_SIZE_A32:{ *:[i32] } (imm:{ *:[i32] }):$flags)
7127 /* 19993 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_13995MEMORY_SIZE_A32),
7128 /* 19996 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7129 /* 19998 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
7130 /* 20001 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7131 /* 20004 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7132 /* 20009 */ GIR_RootConstrainSelectedInstOperands,
7133 /* 20010 */ // GIR_Coverage, 11,
7134 /* 20010 */ GIR_EraseRootFromParent_Done,
7135 /* 20011 */ // Label 598: @20011
7136 /* 20011 */ GIM_Reject,
7137 /* 20012 */ // Label 596: @20012
7138 /* 20012 */ GIM_Try, /*On fail goto*//*Label 599*/ GIMT_Encode4(20052), // Rule ID 13 //
7139 /* 20017 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
7140 /* 20020 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7141 /* 20024 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7142 /* 20028 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7143 /* 20032 */ // MIs[1] Operand 1
7144 /* 20032 */ // No operand predicates
7145 /* 20032 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7146 /* 20034 */ // (intrinsic_w_chain:{ *:[i64] } 14617:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags) => (anonymous_13996MEMORY_SIZE_A64:{ *:[i64] } (imm:{ *:[i32] }):$flags)
7147 /* 20034 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_13996MEMORY_SIZE_A64),
7148 /* 20037 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7149 /* 20039 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
7150 /* 20042 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7151 /* 20045 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7152 /* 20050 */ GIR_RootConstrainSelectedInstOperands,
7153 /* 20051 */ // GIR_Coverage, 13,
7154 /* 20051 */ GIR_EraseRootFromParent_Done,
7155 /* 20052 */ // Label 599: @20052
7156 /* 20052 */ GIM_Reject,
7157 /* 20053 */ // Label 597: @20053
7158 /* 20053 */ GIM_Reject,
7159 /* 20054 */ // Label 594: @20054
7160 /* 20054 */ GIM_Try, /*On fail goto*//*Label 600*/ GIMT_Encode4(20187),
7161 /* 20059 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
7162 /* 20062 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_memory_grow),
7163 /* 20067 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 603*/ GIMT_Encode4(20186),
7164 /* 20078 */ /*GILLT_i32*//*Label 601*/ GIMT_Encode4(20086),
7165 /* 20082 */ /*GILLT_i64*//*Label 602*/ GIMT_Encode4(20136),
7166 /* 20086 */ // Label 601: @20086
7167 /* 20086 */ GIM_Try, /*On fail goto*//*Label 604*/ GIMT_Encode4(20135), // Rule ID 12 //
7168 /* 20091 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
7169 /* 20094 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
7170 /* 20097 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7171 /* 20101 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7172 /* 20105 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7173 /* 20109 */ // MIs[1] Operand 1
7174 /* 20109 */ // No operand predicates
7175 /* 20109 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7176 /* 20113 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7177 /* 20115 */ // (intrinsic_w_chain:{ *:[i32] } 14616:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags, I32:{ *:[i32] }:$delta) => (anonymous_13995MEMORY_GROW_A32:{ *:[i32] } (imm:{ *:[i32] }):$flags, I32:{ *:[i32] }:$delta)
7178 /* 20115 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_13995MEMORY_GROW_A32),
7179 /* 20118 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7180 /* 20120 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
7181 /* 20123 */ GIR_RootToRootCopy, /*OpIdx*/3, // delta
7182 /* 20125 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7183 /* 20128 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7184 /* 20133 */ GIR_RootConstrainSelectedInstOperands,
7185 /* 20134 */ // GIR_Coverage, 12,
7186 /* 20134 */ GIR_EraseRootFromParent_Done,
7187 /* 20135 */ // Label 604: @20135
7188 /* 20135 */ GIM_Reject,
7189 /* 20136 */ // Label 602: @20136
7190 /* 20136 */ GIM_Try, /*On fail goto*//*Label 605*/ GIMT_Encode4(20185), // Rule ID 14 //
7191 /* 20141 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
7192 /* 20144 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i64,
7193 /* 20147 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7194 /* 20151 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7195 /* 20155 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7196 /* 20159 */ // MIs[1] Operand 1
7197 /* 20159 */ // No operand predicates
7198 /* 20159 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7199 /* 20163 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7200 /* 20165 */ // (intrinsic_w_chain:{ *:[i64] } 14616:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags, I64:{ *:[i64] }:$delta) => (anonymous_13996MEMORY_GROW_A64:{ *:[i64] } (imm:{ *:[i32] }):$flags, I64:{ *:[i64] }:$delta)
7201 /* 20165 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_13996MEMORY_GROW_A64),
7202 /* 20168 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7203 /* 20170 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
7204 /* 20173 */ GIR_RootToRootCopy, /*OpIdx*/3, // delta
7205 /* 20175 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7206 /* 20178 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7207 /* 20183 */ GIR_RootConstrainSelectedInstOperands,
7208 /* 20184 */ // GIR_Coverage, 14,
7209 /* 20184 */ GIR_EraseRootFromParent_Done,
7210 /* 20185 */ // Label 605: @20185
7211 /* 20185 */ GIM_Reject,
7212 /* 20186 */ // Label 603: @20186
7213 /* 20186 */ GIM_Reject,
7214 /* 20187 */ // Label 600: @20187
7215 /* 20187 */ GIM_Reject,
7216 /* 20188 */ // Label 19: @20188
7217 /* 20188 */ GIM_Try, /*On fail goto*//*Label 606*/ GIMT_Encode4(20220), // Rule ID 639 //
7218 /* 20193 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
7219 /* 20196 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
7220 /* 20199 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7221 /* 20203 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7222 /* 20207 */ // (anyext:{ *:[i64] } I32:{ *:[i32] }:$src) => (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$src)
7223 /* 20207 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
7224 /* 20212 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7225 /* 20218 */ GIR_RootConstrainSelectedInstOperands,
7226 /* 20219 */ // GIR_Coverage, 639,
7227 /* 20219 */ GIR_Done,
7228 /* 20220 */ // Label 606: @20220
7229 /* 20220 */ GIM_Reject,
7230 /* 20221 */ // Label 20: @20221
7231 /* 20221 */ GIM_Try, /*On fail goto*//*Label 607*/ GIMT_Encode4(20253), // Rule ID 26 //
7232 /* 20226 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
7233 /* 20229 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
7234 /* 20232 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7235 /* 20236 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7236 /* 20240 */ // (trunc:{ *:[i32] } I64:{ *:[i64] }:$src) => (I32_WRAP_I64:{ *:[i32] } I64:{ *:[i64] }:$src)
7237 /* 20240 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_WRAP_I64),
7238 /* 20245 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7239 /* 20251 */ GIR_RootConstrainSelectedInstOperands,
7240 /* 20252 */ // GIR_Coverage, 26,
7241 /* 20252 */ GIR_Done,
7242 /* 20253 */ // Label 607: @20253
7243 /* 20253 */ GIM_Reject,
7244 /* 20254 */ // Label 21: @20254
7245 /* 20254 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 610*/ GIMT_Encode4(20319),
7246 /* 20265 */ /*GILLT_s32*//*Label 608*/ GIMT_Encode4(20273),
7247 /* 20269 */ /*GILLT_s64*//*Label 609*/ GIMT_Encode4(20296),
7248 /* 20273 */ // Label 608: @20273
7249 /* 20273 */ GIM_Try, /*On fail goto*//*Label 611*/ GIMT_Encode4(20295), // Rule ID 7 //
7250 /* 20278 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7251 /* 20282 */ // MIs[0] Operand 1
7252 /* 20282 */ // No operand predicates
7253 /* 20282 */ // (imm:{ *:[i32] }):$imm => (CONST_I32:{ *:[i32] } (imm:{ *:[i32] }):$imm)
7254 /* 20282 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_I32),
7255 /* 20285 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
7256 /* 20287 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
7257 /* 20290 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7258 /* 20293 */ GIR_RootConstrainSelectedInstOperands,
7259 /* 20294 */ // GIR_Coverage, 7,
7260 /* 20294 */ GIR_EraseRootFromParent_Done,
7261 /* 20295 */ // Label 611: @20295
7262 /* 20295 */ GIM_Reject,
7263 /* 20296 */ // Label 609: @20296
7264 /* 20296 */ GIM_Try, /*On fail goto*//*Label 612*/ GIMT_Encode4(20318), // Rule ID 8 //
7265 /* 20301 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7266 /* 20305 */ // MIs[0] Operand 1
7267 /* 20305 */ // No operand predicates
7268 /* 20305 */ // (imm:{ *:[i64] }):$imm => (CONST_I64:{ *:[i64] } (imm:{ *:[i64] }):$imm)
7269 /* 20305 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_I64),
7270 /* 20308 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
7271 /* 20310 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
7272 /* 20313 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7273 /* 20316 */ GIR_RootConstrainSelectedInstOperands,
7274 /* 20317 */ // GIR_Coverage, 8,
7275 /* 20317 */ GIR_EraseRootFromParent_Done,
7276 /* 20318 */ // Label 612: @20318
7277 /* 20318 */ GIM_Reject,
7278 /* 20319 */ // Label 610: @20319
7279 /* 20319 */ GIM_Reject,
7280 /* 20320 */ // Label 22: @20320
7281 /* 20320 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 615*/ GIMT_Encode4(20385),
7282 /* 20331 */ /*GILLT_s32*//*Label 613*/ GIMT_Encode4(20339),
7283 /* 20335 */ /*GILLT_s64*//*Label 614*/ GIMT_Encode4(20362),
7284 /* 20339 */ // Label 613: @20339
7285 /* 20339 */ GIM_Try, /*On fail goto*//*Label 616*/ GIMT_Encode4(20361), // Rule ID 9 //
7286 /* 20344 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
7287 /* 20348 */ // MIs[0] Operand 1
7288 /* 20348 */ // No operand predicates
7289 /* 20348 */ // (fpimm:{ *:[f32] }):$imm => (CONST_F32:{ *:[f32] } (fpimm:{ *:[f32] }):$imm)
7290 /* 20348 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_F32),
7291 /* 20351 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
7292 /* 20353 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
7293 /* 20356 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7294 /* 20359 */ GIR_RootConstrainSelectedInstOperands,
7295 /* 20360 */ // GIR_Coverage, 9,
7296 /* 20360 */ GIR_EraseRootFromParent_Done,
7297 /* 20361 */ // Label 616: @20361
7298 /* 20361 */ GIM_Reject,
7299 /* 20362 */ // Label 614: @20362
7300 /* 20362 */ GIM_Try, /*On fail goto*//*Label 617*/ GIMT_Encode4(20384), // Rule ID 10 //
7301 /* 20367 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
7302 /* 20371 */ // MIs[0] Operand 1
7303 /* 20371 */ // No operand predicates
7304 /* 20371 */ // (fpimm:{ *:[f64] }):$imm => (CONST_F64:{ *:[f64] } (fpimm:{ *:[f64] }):$imm)
7305 /* 20371 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_F64),
7306 /* 20374 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
7307 /* 20376 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
7308 /* 20379 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7309 /* 20382 */ GIR_RootConstrainSelectedInstOperands,
7310 /* 20383 */ // GIR_Coverage, 10,
7311 /* 20383 */ GIR_EraseRootFromParent_Done,
7312 /* 20384 */ // Label 617: @20384
7313 /* 20384 */ GIM_Reject,
7314 /* 20385 */ // Label 615: @20385
7315 /* 20385 */ GIM_Reject,
7316 /* 20386 */ // Label 23: @20386
7317 /* 20386 */ GIM_Try, /*On fail goto*//*Label 618*/ GIMT_Encode4(20418), // Rule ID 27 //
7318 /* 20391 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
7319 /* 20394 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
7320 /* 20397 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7321 /* 20401 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7322 /* 20405 */ // (sext:{ *:[i64] } I32:{ *:[i32] }:$src) => (I64_EXTEND_S_I32:{ *:[i64] } I32:{ *:[i32] }:$src)
7323 /* 20405 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_S_I32),
7324 /* 20410 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7325 /* 20416 */ GIR_RootConstrainSelectedInstOperands,
7326 /* 20417 */ // GIR_Coverage, 27,
7327 /* 20417 */ GIR_Done,
7328 /* 20418 */ // Label 618: @20418
7329 /* 20418 */ GIM_Reject,
7330 /* 20419 */ // Label 24: @20419
7331 /* 20419 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 621*/ GIMT_Encode4(20624),
7332 /* 20430 */ /*GILLT_i32*//*Label 619*/ GIMT_Encode4(20438),
7333 /* 20434 */ /*GILLT_i64*//*Label 620*/ GIMT_Encode4(20516),
7334 /* 20438 */ // Label 619: @20438
7335 /* 20438 */ GIM_Try, /*On fail goto*//*Label 622*/ GIMT_Encode4(20515),
7336 /* 20443 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
7337 /* 20446 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7338 /* 20450 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7339 /* 20454 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 623*/ GIMT_Encode4(20484), GIMT_Encode2(GIFBS_HasSignExt), // Rule ID 29 //
7340 /* 20461 */ // MIs[0] Operand 2
7341 /* 20461 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(8),
7342 /* 20472 */ // (sext_inreg:{ *:[i32] } I32:{ *:[i32] }:$src, i8:{ *:[Other] }) => (I32_EXTEND8_S_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
7343 /* 20472 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_EXTEND8_S_I32),
7344 /* 20475 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7345 /* 20477 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
7346 /* 20479 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7347 /* 20482 */ GIR_RootConstrainSelectedInstOperands,
7348 /* 20483 */ // GIR_Coverage, 29,
7349 /* 20483 */ GIR_EraseRootFromParent_Done,
7350 /* 20484 */ // Label 623: @20484
7351 /* 20484 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 624*/ GIMT_Encode4(20514), GIMT_Encode2(GIFBS_HasSignExt), // Rule ID 30 //
7352 /* 20491 */ // MIs[0] Operand 2
7353 /* 20491 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(16),
7354 /* 20502 */ // (sext_inreg:{ *:[i32] } I32:{ *:[i32] }:$src, i16:{ *:[Other] }) => (I32_EXTEND16_S_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
7355 /* 20502 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_EXTEND16_S_I32),
7356 /* 20505 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7357 /* 20507 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
7358 /* 20509 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7359 /* 20512 */ GIR_RootConstrainSelectedInstOperands,
7360 /* 20513 */ // GIR_Coverage, 30,
7361 /* 20513 */ GIR_EraseRootFromParent_Done,
7362 /* 20514 */ // Label 624: @20514
7363 /* 20514 */ GIM_Reject,
7364 /* 20515 */ // Label 622: @20515
7365 /* 20515 */ GIM_Reject,
7366 /* 20516 */ // Label 620: @20516
7367 /* 20516 */ GIM_Try, /*On fail goto*//*Label 625*/ GIMT_Encode4(20623),
7368 /* 20521 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
7369 /* 20524 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7370 /* 20528 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7371 /* 20532 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 626*/ GIMT_Encode4(20562), GIMT_Encode2(GIFBS_HasSignExt), // Rule ID 31 //
7372 /* 20539 */ // MIs[0] Operand 2
7373 /* 20539 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(8),
7374 /* 20550 */ // (sext_inreg:{ *:[i64] } I64:{ *:[i64] }:$src, i8:{ *:[Other] }) => (I64_EXTEND8_S_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
7375 /* 20550 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND8_S_I64),
7376 /* 20553 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7377 /* 20555 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
7378 /* 20557 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7379 /* 20560 */ GIR_RootConstrainSelectedInstOperands,
7380 /* 20561 */ // GIR_Coverage, 31,
7381 /* 20561 */ GIR_EraseRootFromParent_Done,
7382 /* 20562 */ // Label 626: @20562
7383 /* 20562 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 627*/ GIMT_Encode4(20592), GIMT_Encode2(GIFBS_HasSignExt), // Rule ID 32 //
7384 /* 20569 */ // MIs[0] Operand 2
7385 /* 20569 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(16),
7386 /* 20580 */ // (sext_inreg:{ *:[i64] } I64:{ *:[i64] }:$src, i16:{ *:[Other] }) => (I64_EXTEND16_S_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
7387 /* 20580 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND16_S_I64),
7388 /* 20583 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7389 /* 20585 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
7390 /* 20587 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7391 /* 20590 */ GIR_RootConstrainSelectedInstOperands,
7392 /* 20591 */ // GIR_Coverage, 32,
7393 /* 20591 */ GIR_EraseRootFromParent_Done,
7394 /* 20592 */ // Label 627: @20592
7395 /* 20592 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 628*/ GIMT_Encode4(20622), GIMT_Encode2(GIFBS_HasSignExt), // Rule ID 33 //
7396 /* 20599 */ // MIs[0] Operand 2
7397 /* 20599 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(32),
7398 /* 20610 */ // (sext_inreg:{ *:[i64] } I64:{ *:[i64] }:$src, i32:{ *:[Other] }) => (I64_EXTEND32_S_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
7399 /* 20610 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND32_S_I64),
7400 /* 20613 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7401 /* 20615 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
7402 /* 20617 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7403 /* 20620 */ GIR_RootConstrainSelectedInstOperands,
7404 /* 20621 */ // GIR_Coverage, 33,
7405 /* 20621 */ GIR_EraseRootFromParent_Done,
7406 /* 20622 */ // Label 628: @20622
7407 /* 20622 */ GIM_Reject,
7408 /* 20623 */ // Label 625: @20623
7409 /* 20623 */ GIM_Reject,
7410 /* 20624 */ // Label 621: @20624
7411 /* 20624 */ GIM_Reject,
7412 /* 20625 */ // Label 25: @20625
7413 /* 20625 */ GIM_Try, /*On fail goto*//*Label 629*/ GIMT_Encode4(20657), // Rule ID 28 //
7414 /* 20630 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
7415 /* 20633 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
7416 /* 20636 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7417 /* 20640 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7418 /* 20644 */ // (zext:{ *:[i64] } I32:{ *:[i32] }:$src) => (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$src)
7419 /* 20644 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
7420 /* 20649 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7421 /* 20655 */ GIR_RootConstrainSelectedInstOperands,
7422 /* 20656 */ // GIR_Coverage, 28,
7423 /* 20656 */ GIR_Done,
7424 /* 20657 */ // Label 629: @20657
7425 /* 20657 */ GIM_Reject,
7426 /* 20658 */ // Label 26: @20658
7427 /* 20658 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 632*/ GIMT_Encode4(20939),
7428 /* 20669 */ /*GILLT_i32*//*Label 630*/ GIMT_Encode4(20677),
7429 /* 20673 */ /*GILLT_i64*//*Label 631*/ GIMT_Encode4(20768),
7430 /* 20677 */ // Label 630: @20677
7431 /* 20677 */ GIM_Try, /*On fail goto*//*Label 633*/ GIMT_Encode4(20767),
7432 /* 20682 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
7433 /* 20685 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
7434 /* 20688 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7435 /* 20692 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7436 /* 20696 */ GIM_Try, /*On fail goto*//*Label 634*/ GIMT_Encode4(20744), // Rule ID 656 //
7437 /* 20701 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7438 /* 20705 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7439 /* 20709 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
7440 /* 20713 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
7441 /* 20717 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7442 /* 20722 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
7443 /* 20726 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7444 /* 20728 */ // (shl:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (SHL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7445 /* 20728 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I32),
7446 /* 20731 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7447 /* 20733 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7448 /* 20735 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7449 /* 20739 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7450 /* 20742 */ GIR_RootConstrainSelectedInstOperands,
7451 /* 20743 */ // GIR_Coverage, 656,
7452 /* 20743 */ GIR_EraseRootFromParent_Done,
7453 /* 20744 */ // Label 634: @20744
7454 /* 20744 */ GIM_Try, /*On fail goto*//*Label 635*/ GIMT_Encode4(20766), // Rule ID 84 //
7455 /* 20749 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7456 /* 20753 */ // (shl:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SHL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7457 /* 20753 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I32),
7458 /* 20758 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7459 /* 20764 */ GIR_RootConstrainSelectedInstOperands,
7460 /* 20765 */ // GIR_Coverage, 84,
7461 /* 20765 */ GIR_Done,
7462 /* 20766 */ // Label 635: @20766
7463 /* 20766 */ GIM_Reject,
7464 /* 20767 */ // Label 633: @20767
7465 /* 20767 */ GIM_Reject,
7466 /* 20768 */ // Label 631: @20768
7467 /* 20768 */ GIM_Try, /*On fail goto*//*Label 636*/ GIMT_Encode4(20938),
7468 /* 20773 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
7469 /* 20776 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
7470 /* 20779 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7471 /* 20783 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7472 /* 20787 */ GIM_Try, /*On fail goto*//*Label 637*/ GIMT_Encode4(20867), // Rule ID 666 //
7473 /* 20792 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7474 /* 20796 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ZEXT),
7475 /* 20800 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
7476 /* 20804 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
7477 /* 20808 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
7478 /* 20812 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_i32,
7479 /* 20816 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_i32,
7480 /* 20820 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7481 /* 20825 */ GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 63,
7482 /* 20829 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
7483 /* 20831 */ // (shl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (zext:{ *:[i64] } (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 63:{ *:[i32] }))) => (SHL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$rhs))
7484 /* 20831 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i64,
7485 /* 20834 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
7486 /* 20838 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
7487 /* 20843 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/2, /*OpIdx*/1, // rhs
7488 /* 20847 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7489 /* 20850 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7490 /* 20852 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I64),
7491 /* 20855 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7492 /* 20857 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7493 /* 20859 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7494 /* 20862 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7495 /* 20865 */ GIR_RootConstrainSelectedInstOperands,
7496 /* 20866 */ // GIR_Coverage, 666,
7497 /* 20866 */ GIR_EraseRootFromParent_Done,
7498 /* 20867 */ // Label 637: @20867
7499 /* 20867 */ GIM_Try, /*On fail goto*//*Label 638*/ GIMT_Encode4(20915), // Rule ID 659 //
7500 /* 20872 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7501 /* 20876 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7502 /* 20880 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i64,
7503 /* 20884 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i64,
7504 /* 20888 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7505 /* 20893 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
7506 /* 20897 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7507 /* 20899 */ // (shl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (SHL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7508 /* 20899 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I64),
7509 /* 20902 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7510 /* 20904 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7511 /* 20906 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7512 /* 20910 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7513 /* 20913 */ GIR_RootConstrainSelectedInstOperands,
7514 /* 20914 */ // GIR_Coverage, 659,
7515 /* 20914 */ GIR_EraseRootFromParent_Done,
7516 /* 20915 */ // Label 638: @20915
7517 /* 20915 */ GIM_Try, /*On fail goto*//*Label 639*/ GIMT_Encode4(20937), // Rule ID 85 //
7518 /* 20920 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7519 /* 20924 */ // (shl:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SHL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7520 /* 20924 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I64),
7521 /* 20929 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7522 /* 20935 */ GIR_RootConstrainSelectedInstOperands,
7523 /* 20936 */ // GIR_Coverage, 85,
7524 /* 20936 */ GIR_Done,
7525 /* 20937 */ // Label 639: @20937
7526 /* 20937 */ GIM_Reject,
7527 /* 20938 */ // Label 636: @20938
7528 /* 20938 */ GIM_Reject,
7529 /* 20939 */ // Label 632: @20939
7530 /* 20939 */ GIM_Reject,
7531 /* 20940 */ // Label 27: @20940
7532 /* 20940 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 642*/ GIMT_Encode4(21221),
7533 /* 20951 */ /*GILLT_i32*//*Label 640*/ GIMT_Encode4(20959),
7534 /* 20955 */ /*GILLT_i64*//*Label 641*/ GIMT_Encode4(21050),
7535 /* 20959 */ // Label 640: @20959
7536 /* 20959 */ GIM_Try, /*On fail goto*//*Label 643*/ GIMT_Encode4(21049),
7537 /* 20964 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
7538 /* 20967 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
7539 /* 20970 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7540 /* 20974 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7541 /* 20978 */ GIM_Try, /*On fail goto*//*Label 644*/ GIMT_Encode4(21026), // Rule ID 658 //
7542 /* 20983 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7543 /* 20987 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7544 /* 20991 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
7545 /* 20995 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
7546 /* 20999 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7547 /* 21004 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
7548 /* 21008 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7549 /* 21010 */ // (srl:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (SHR_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7550 /* 21010 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I32),
7551 /* 21013 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7552 /* 21015 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7553 /* 21017 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7554 /* 21021 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7555 /* 21024 */ GIR_RootConstrainSelectedInstOperands,
7556 /* 21025 */ // GIR_Coverage, 658,
7557 /* 21025 */ GIR_EraseRootFromParent_Done,
7558 /* 21026 */ // Label 644: @21026
7559 /* 21026 */ GIM_Try, /*On fail goto*//*Label 645*/ GIMT_Encode4(21048), // Rule ID 88 //
7560 /* 21031 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7561 /* 21035 */ // (srl:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SHR_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7562 /* 21035 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I32),
7563 /* 21040 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7564 /* 21046 */ GIR_RootConstrainSelectedInstOperands,
7565 /* 21047 */ // GIR_Coverage, 88,
7566 /* 21047 */ GIR_Done,
7567 /* 21048 */ // Label 645: @21048
7568 /* 21048 */ GIM_Reject,
7569 /* 21049 */ // Label 643: @21049
7570 /* 21049 */ GIM_Reject,
7571 /* 21050 */ // Label 641: @21050
7572 /* 21050 */ GIM_Try, /*On fail goto*//*Label 646*/ GIMT_Encode4(21220),
7573 /* 21055 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
7574 /* 21058 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
7575 /* 21061 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7576 /* 21065 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7577 /* 21069 */ GIM_Try, /*On fail goto*//*Label 647*/ GIMT_Encode4(21149), // Rule ID 668 //
7578 /* 21074 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7579 /* 21078 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ZEXT),
7580 /* 21082 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
7581 /* 21086 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
7582 /* 21090 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
7583 /* 21094 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_i32,
7584 /* 21098 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_i32,
7585 /* 21102 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7586 /* 21107 */ GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 63,
7587 /* 21111 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
7588 /* 21113 */ // (srl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (zext:{ *:[i64] } (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 63:{ *:[i32] }))) => (SHR_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$rhs))
7589 /* 21113 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i64,
7590 /* 21116 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
7591 /* 21120 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
7592 /* 21125 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/2, /*OpIdx*/1, // rhs
7593 /* 21129 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7594 /* 21132 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7595 /* 21134 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I64),
7596 /* 21137 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7597 /* 21139 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7598 /* 21141 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7599 /* 21144 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7600 /* 21147 */ GIR_RootConstrainSelectedInstOperands,
7601 /* 21148 */ // GIR_Coverage, 668,
7602 /* 21148 */ GIR_EraseRootFromParent_Done,
7603 /* 21149 */ // Label 647: @21149
7604 /* 21149 */ GIM_Try, /*On fail goto*//*Label 648*/ GIMT_Encode4(21197), // Rule ID 661 //
7605 /* 21154 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7606 /* 21158 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7607 /* 21162 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i64,
7608 /* 21166 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i64,
7609 /* 21170 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7610 /* 21175 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
7611 /* 21179 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7612 /* 21181 */ // (srl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (SHR_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7613 /* 21181 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I64),
7614 /* 21184 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7615 /* 21186 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7616 /* 21188 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7617 /* 21192 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7618 /* 21195 */ GIR_RootConstrainSelectedInstOperands,
7619 /* 21196 */ // GIR_Coverage, 661,
7620 /* 21196 */ GIR_EraseRootFromParent_Done,
7621 /* 21197 */ // Label 648: @21197
7622 /* 21197 */ GIM_Try, /*On fail goto*//*Label 649*/ GIMT_Encode4(21219), // Rule ID 89 //
7623 /* 21202 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7624 /* 21206 */ // (srl:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SHR_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7625 /* 21206 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I64),
7626 /* 21211 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7627 /* 21217 */ GIR_RootConstrainSelectedInstOperands,
7628 /* 21218 */ // GIR_Coverage, 89,
7629 /* 21218 */ GIR_Done,
7630 /* 21219 */ // Label 649: @21219
7631 /* 21219 */ GIM_Reject,
7632 /* 21220 */ // Label 646: @21220
7633 /* 21220 */ GIM_Reject,
7634 /* 21221 */ // Label 642: @21221
7635 /* 21221 */ GIM_Reject,
7636 /* 21222 */ // Label 28: @21222
7637 /* 21222 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 652*/ GIMT_Encode4(21503),
7638 /* 21233 */ /*GILLT_i32*//*Label 650*/ GIMT_Encode4(21241),
7639 /* 21237 */ /*GILLT_i64*//*Label 651*/ GIMT_Encode4(21332),
7640 /* 21241 */ // Label 650: @21241
7641 /* 21241 */ GIM_Try, /*On fail goto*//*Label 653*/ GIMT_Encode4(21331),
7642 /* 21246 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
7643 /* 21249 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
7644 /* 21252 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7645 /* 21256 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7646 /* 21260 */ GIM_Try, /*On fail goto*//*Label 654*/ GIMT_Encode4(21308), // Rule ID 657 //
7647 /* 21265 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7648 /* 21269 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7649 /* 21273 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
7650 /* 21277 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
7651 /* 21281 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7652 /* 21286 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
7653 /* 21290 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7654 /* 21292 */ // (sra:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (SHR_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7655 /* 21292 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I32),
7656 /* 21295 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7657 /* 21297 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7658 /* 21299 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7659 /* 21303 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7660 /* 21306 */ GIR_RootConstrainSelectedInstOperands,
7661 /* 21307 */ // GIR_Coverage, 657,
7662 /* 21307 */ GIR_EraseRootFromParent_Done,
7663 /* 21308 */ // Label 654: @21308
7664 /* 21308 */ GIM_Try, /*On fail goto*//*Label 655*/ GIMT_Encode4(21330), // Rule ID 86 //
7665 /* 21313 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7666 /* 21317 */ // (sra:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SHR_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7667 /* 21317 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I32),
7668 /* 21322 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7669 /* 21328 */ GIR_RootConstrainSelectedInstOperands,
7670 /* 21329 */ // GIR_Coverage, 86,
7671 /* 21329 */ GIR_Done,
7672 /* 21330 */ // Label 655: @21330
7673 /* 21330 */ GIM_Reject,
7674 /* 21331 */ // Label 653: @21331
7675 /* 21331 */ GIM_Reject,
7676 /* 21332 */ // Label 651: @21332
7677 /* 21332 */ GIM_Try, /*On fail goto*//*Label 656*/ GIMT_Encode4(21502),
7678 /* 21337 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
7679 /* 21340 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
7680 /* 21343 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7681 /* 21347 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7682 /* 21351 */ GIM_Try, /*On fail goto*//*Label 657*/ GIMT_Encode4(21431), // Rule ID 667 //
7683 /* 21356 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7684 /* 21360 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ZEXT),
7685 /* 21364 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
7686 /* 21368 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
7687 /* 21372 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
7688 /* 21376 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_i32,
7689 /* 21380 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_i32,
7690 /* 21384 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7691 /* 21389 */ GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 63,
7692 /* 21393 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
7693 /* 21395 */ // (sra:{ *:[i64] } I64:{ *:[i64] }:$lhs, (zext:{ *:[i64] } (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 63:{ *:[i32] }))) => (SHR_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$rhs))
7694 /* 21395 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i64,
7695 /* 21398 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
7696 /* 21402 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
7697 /* 21407 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/2, /*OpIdx*/1, // rhs
7698 /* 21411 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7699 /* 21414 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7700 /* 21416 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I64),
7701 /* 21419 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7702 /* 21421 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7703 /* 21423 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7704 /* 21426 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7705 /* 21429 */ GIR_RootConstrainSelectedInstOperands,
7706 /* 21430 */ // GIR_Coverage, 667,
7707 /* 21430 */ GIR_EraseRootFromParent_Done,
7708 /* 21431 */ // Label 657: @21431
7709 /* 21431 */ GIM_Try, /*On fail goto*//*Label 658*/ GIMT_Encode4(21479), // Rule ID 660 //
7710 /* 21436 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7711 /* 21440 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7712 /* 21444 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i64,
7713 /* 21448 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i64,
7714 /* 21452 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7715 /* 21457 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
7716 /* 21461 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7717 /* 21463 */ // (sra:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (SHR_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7718 /* 21463 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I64),
7719 /* 21466 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7720 /* 21468 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7721 /* 21470 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7722 /* 21474 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7723 /* 21477 */ GIR_RootConstrainSelectedInstOperands,
7724 /* 21478 */ // GIR_Coverage, 660,
7725 /* 21478 */ GIR_EraseRootFromParent_Done,
7726 /* 21479 */ // Label 658: @21479
7727 /* 21479 */ GIM_Try, /*On fail goto*//*Label 659*/ GIMT_Encode4(21501), // Rule ID 87 //
7728 /* 21484 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7729 /* 21488 */ // (sra:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SHR_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7730 /* 21488 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I64),
7731 /* 21493 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7732 /* 21499 */ GIR_RootConstrainSelectedInstOperands,
7733 /* 21500 */ // GIR_Coverage, 87,
7734 /* 21500 */ GIR_Done,
7735 /* 21501 */ // Label 659: @21501
7736 /* 21501 */ GIM_Reject,
7737 /* 21502 */ // Label 656: @21502
7738 /* 21502 */ GIM_Reject,
7739 /* 21503 */ // Label 652: @21503
7740 /* 21503 */ GIM_Reject,
7741 /* 21504 */ // Label 29: @21504
7742 /* 21504 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 662*/ GIMT_Encode4(21705),
7743 /* 21515 */ /*GILLT_i32*//*Label 660*/ GIMT_Encode4(21523),
7744 /* 21519 */ /*GILLT_i64*//*Label 661*/ GIMT_Encode4(21614),
7745 /* 21523 */ // Label 660: @21523
7746 /* 21523 */ GIM_Try, /*On fail goto*//*Label 663*/ GIMT_Encode4(21613),
7747 /* 21528 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
7748 /* 21531 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
7749 /* 21534 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7750 /* 21538 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7751 /* 21542 */ GIM_Try, /*On fail goto*//*Label 664*/ GIMT_Encode4(21590), // Rule ID 663 //
7752 /* 21547 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7753 /* 21551 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7754 /* 21555 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
7755 /* 21559 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
7756 /* 21563 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7757 /* 21568 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
7758 /* 21572 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7759 /* 21574 */ // (rotr:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (ROTR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7760 /* 21574 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I32),
7761 /* 21577 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7762 /* 21579 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7763 /* 21581 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7764 /* 21585 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7765 /* 21588 */ GIR_RootConstrainSelectedInstOperands,
7766 /* 21589 */ // GIR_Coverage, 663,
7767 /* 21589 */ GIR_EraseRootFromParent_Done,
7768 /* 21590 */ // Label 664: @21590
7769 /* 21590 */ GIM_Try, /*On fail goto*//*Label 665*/ GIMT_Encode4(21612), // Rule ID 92 //
7770 /* 21595 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7771 /* 21599 */ // (rotr:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (ROTR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7772 /* 21599 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I32),
7773 /* 21604 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7774 /* 21610 */ GIR_RootConstrainSelectedInstOperands,
7775 /* 21611 */ // GIR_Coverage, 92,
7776 /* 21611 */ GIR_Done,
7777 /* 21612 */ // Label 665: @21612
7778 /* 21612 */ GIM_Reject,
7779 /* 21613 */ // Label 663: @21613
7780 /* 21613 */ GIM_Reject,
7781 /* 21614 */ // Label 661: @21614
7782 /* 21614 */ GIM_Try, /*On fail goto*//*Label 666*/ GIMT_Encode4(21704),
7783 /* 21619 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
7784 /* 21622 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
7785 /* 21625 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7786 /* 21629 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7787 /* 21633 */ GIM_Try, /*On fail goto*//*Label 667*/ GIMT_Encode4(21681), // Rule ID 665 //
7788 /* 21638 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7789 /* 21642 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7790 /* 21646 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i64,
7791 /* 21650 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i64,
7792 /* 21654 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7793 /* 21659 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
7794 /* 21663 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7795 /* 21665 */ // (rotr:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (ROTR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7796 /* 21665 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I64),
7797 /* 21668 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7798 /* 21670 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7799 /* 21672 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7800 /* 21676 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7801 /* 21679 */ GIR_RootConstrainSelectedInstOperands,
7802 /* 21680 */ // GIR_Coverage, 665,
7803 /* 21680 */ GIR_EraseRootFromParent_Done,
7804 /* 21681 */ // Label 667: @21681
7805 /* 21681 */ GIM_Try, /*On fail goto*//*Label 668*/ GIMT_Encode4(21703), // Rule ID 93 //
7806 /* 21686 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7807 /* 21690 */ // (rotr:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (ROTR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7808 /* 21690 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I64),
7809 /* 21695 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7810 /* 21701 */ GIR_RootConstrainSelectedInstOperands,
7811 /* 21702 */ // GIR_Coverage, 93,
7812 /* 21702 */ GIR_Done,
7813 /* 21703 */ // Label 668: @21703
7814 /* 21703 */ GIM_Reject,
7815 /* 21704 */ // Label 666: @21704
7816 /* 21704 */ GIM_Reject,
7817 /* 21705 */ // Label 662: @21705
7818 /* 21705 */ GIM_Reject,
7819 /* 21706 */ // Label 30: @21706
7820 /* 21706 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 671*/ GIMT_Encode4(21907),
7821 /* 21717 */ /*GILLT_i32*//*Label 669*/ GIMT_Encode4(21725),
7822 /* 21721 */ /*GILLT_i64*//*Label 670*/ GIMT_Encode4(21816),
7823 /* 21725 */ // Label 669: @21725
7824 /* 21725 */ GIM_Try, /*On fail goto*//*Label 672*/ GIMT_Encode4(21815),
7825 /* 21730 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
7826 /* 21733 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
7827 /* 21736 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7828 /* 21740 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7829 /* 21744 */ GIM_Try, /*On fail goto*//*Label 673*/ GIMT_Encode4(21792), // Rule ID 662 //
7830 /* 21749 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7831 /* 21753 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7832 /* 21757 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
7833 /* 21761 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
7834 /* 21765 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7835 /* 21770 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
7836 /* 21774 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7837 /* 21776 */ // (rotl:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (ROTL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7838 /* 21776 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I32),
7839 /* 21779 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7840 /* 21781 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7841 /* 21783 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7842 /* 21787 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7843 /* 21790 */ GIR_RootConstrainSelectedInstOperands,
7844 /* 21791 */ // GIR_Coverage, 662,
7845 /* 21791 */ GIR_EraseRootFromParent_Done,
7846 /* 21792 */ // Label 673: @21792
7847 /* 21792 */ GIM_Try, /*On fail goto*//*Label 674*/ GIMT_Encode4(21814), // Rule ID 90 //
7848 /* 21797 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7849 /* 21801 */ // (rotl:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (ROTL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7850 /* 21801 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I32),
7851 /* 21806 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7852 /* 21812 */ GIR_RootConstrainSelectedInstOperands,
7853 /* 21813 */ // GIR_Coverage, 90,
7854 /* 21813 */ GIR_Done,
7855 /* 21814 */ // Label 674: @21814
7856 /* 21814 */ GIM_Reject,
7857 /* 21815 */ // Label 672: @21815
7858 /* 21815 */ GIM_Reject,
7859 /* 21816 */ // Label 670: @21816
7860 /* 21816 */ GIM_Try, /*On fail goto*//*Label 675*/ GIMT_Encode4(21906),
7861 /* 21821 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
7862 /* 21824 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
7863 /* 21827 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7864 /* 21831 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7865 /* 21835 */ GIM_Try, /*On fail goto*//*Label 676*/ GIMT_Encode4(21883), // Rule ID 664 //
7866 /* 21840 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7867 /* 21844 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7868 /* 21848 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i64,
7869 /* 21852 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i64,
7870 /* 21856 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7871 /* 21861 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
7872 /* 21865 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7873 /* 21867 */ // (rotl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (ROTL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7874 /* 21867 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I64),
7875 /* 21870 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7876 /* 21872 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7877 /* 21874 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7878 /* 21878 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7879 /* 21881 */ GIR_RootConstrainSelectedInstOperands,
7880 /* 21882 */ // GIR_Coverage, 664,
7881 /* 21882 */ GIR_EraseRootFromParent_Done,
7882 /* 21883 */ // Label 676: @21883
7883 /* 21883 */ GIM_Try, /*On fail goto*//*Label 677*/ GIMT_Encode4(21905), // Rule ID 91 //
7884 /* 21888 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7885 /* 21892 */ // (rotl:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (ROTL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7886 /* 21892 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I64),
7887 /* 21897 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7888 /* 21903 */ GIR_RootConstrainSelectedInstOperands,
7889 /* 21904 */ // GIR_Coverage, 91,
7890 /* 21904 */ GIR_Done,
7891 /* 21905 */ // Label 677: @21905
7892 /* 21905 */ GIM_Reject,
7893 /* 21906 */ // Label 675: @21906
7894 /* 21906 */ GIM_Reject,
7895 /* 21907 */ // Label 671: @21907
7896 /* 21907 */ GIM_Reject,
7897 /* 21908 */ // Label 31: @21908
7898 /* 21908 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(14), /*)*//*default:*//*Label 683*/ GIMT_Encode4(26095),
7899 /* 21919 */ /*GILLT_i32*//*Label 678*/ GIMT_Encode4(21967), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
7900 /* 21951 */ /*GILLT_v16i8*//*Label 679*/ GIMT_Encode4(24803),
7901 /* 21955 */ /*GILLT_v8i16*//*Label 680*/ GIMT_Encode4(25160),
7902 /* 21959 */ /*GILLT_v4i32*//*Label 681*/ GIMT_Encode4(25517),
7903 /* 21963 */ /*GILLT_v2i64*//*Label 682*/ GIMT_Encode4(25874),
7904 /* 21967 */ // Label 678: @21967
7905 /* 21967 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 686*/ GIMT_Encode4(24802),
7906 /* 21978 */ /*GILLT_i32*//*Label 684*/ GIMT_Encode4(21986),
7907 /* 21982 */ /*GILLT_i64*//*Label 685*/ GIMT_Encode4(24441),
7908 /* 21986 */ // Label 684: @21986
7909 /* 21986 */ GIM_Try, /*On fail goto*//*Label 687*/ GIMT_Encode4(24440),
7910 /* 21991 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
7911 /* 21994 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7912 /* 21998 */ GIM_Try, /*On fail goto*//*Label 688*/ GIMT_Encode4(22129),
7913 /* 22003 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
7914 /* 22008 */ GIM_Try, /*On fail goto*//*Label 689*/ GIMT_Encode4(22058), // Rule ID 1129 //
7915 /* 22013 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7916 /* 22017 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
7917 /* 22021 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7918 /* 22024 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
7919 /* 22029 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
7920 /* 22033 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7921 /* 22038 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
7922 /* 22042 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7923 /* 22044 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x)
7924 /* 22044 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7925 /* 22047 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7926 /* 22049 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
7927 /* 22053 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7928 /* 22056 */ GIR_RootConstrainSelectedInstOperands,
7929 /* 22057 */ // GIR_Coverage, 1129,
7930 /* 22057 */ GIR_EraseRootFromParent_Done,
7931 /* 22058 */ // Label 689: @22058
7932 /* 22058 */ GIM_Try, /*On fail goto*//*Label 690*/ GIMT_Encode4(22128), // Rule ID 1130 //
7933 /* 22063 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7934 /* 22067 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
7935 /* 22071 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7936 /* 22074 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
7937 /* 22079 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
7938 /* 22083 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7939 /* 22088 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
7940 /* 22092 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7941 /* 22094 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x))
7942 /* 22094 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
7943 /* 22097 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7944 /* 22101 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
7945 /* 22106 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
7946 /* 22110 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7947 /* 22113 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7948 /* 22115 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
7949 /* 22118 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7950 /* 22120 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7951 /* 22123 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7952 /* 22126 */ GIR_RootConstrainSelectedInstOperands,
7953 /* 22127 */ // GIR_Coverage, 1130,
7954 /* 22127 */ GIR_EraseRootFromParent_Done,
7955 /* 22128 */ // Label 690: @22128
7956 /* 22128 */ GIM_Reject,
7957 /* 22129 */ // Label 688: @22129
7958 /* 22129 */ GIM_Try, /*On fail goto*//*Label 691*/ GIMT_Encode4(22260),
7959 /* 22134 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
7960 /* 22139 */ GIM_Try, /*On fail goto*//*Label 692*/ GIMT_Encode4(22189), // Rule ID 1131 //
7961 /* 22144 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7962 /* 22148 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
7963 /* 22152 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7964 /* 22155 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
7965 /* 22160 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
7966 /* 22164 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7967 /* 22169 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
7968 /* 22173 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7969 /* 22175 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x)
7970 /* 22175 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7971 /* 22178 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7972 /* 22180 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
7973 /* 22184 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7974 /* 22187 */ GIR_RootConstrainSelectedInstOperands,
7975 /* 22188 */ // GIR_Coverage, 1131,
7976 /* 22188 */ GIR_EraseRootFromParent_Done,
7977 /* 22189 */ // Label 692: @22189
7978 /* 22189 */ GIM_Try, /*On fail goto*//*Label 693*/ GIMT_Encode4(22259), // Rule ID 1132 //
7979 /* 22194 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7980 /* 22198 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
7981 /* 22202 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7982 /* 22205 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
7983 /* 22210 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
7984 /* 22214 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7985 /* 22219 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
7986 /* 22223 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7987 /* 22225 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x))
7988 /* 22225 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
7989 /* 22228 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7990 /* 22232 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
7991 /* 22237 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
7992 /* 22241 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7993 /* 22244 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7994 /* 22246 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
7995 /* 22249 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7996 /* 22251 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7997 /* 22254 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7998 /* 22257 */ GIR_RootConstrainSelectedInstOperands,
7999 /* 22258 */ // GIR_Coverage, 1132,
8000 /* 22258 */ GIR_EraseRootFromParent_Done,
8001 /* 22259 */ // Label 693: @22259
8002 /* 22259 */ GIM_Reject,
8003 /* 22260 */ // Label 691: @22260
8004 /* 22260 */ GIM_Try, /*On fail goto*//*Label 694*/ GIMT_Encode4(22391),
8005 /* 22265 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8006 /* 22270 */ GIM_Try, /*On fail goto*//*Label 695*/ GIMT_Encode4(22320), // Rule ID 1134 //
8007 /* 22275 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8008 /* 22279 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8009 /* 22283 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8010 /* 22286 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8011 /* 22291 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
8012 /* 22295 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8013 /* 22300 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8014 /* 22304 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8015 /* 22306 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x)
8016 /* 22306 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8017 /* 22309 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8018 /* 22311 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8019 /* 22315 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8020 /* 22318 */ GIR_RootConstrainSelectedInstOperands,
8021 /* 22319 */ // GIR_Coverage, 1134,
8022 /* 22319 */ GIR_EraseRootFromParent_Done,
8023 /* 22320 */ // Label 695: @22320
8024 /* 22320 */ GIM_Try, /*On fail goto*//*Label 696*/ GIMT_Encode4(22390), // Rule ID 1135 //
8025 /* 22325 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8026 /* 22329 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8027 /* 22333 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8028 /* 22336 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8029 /* 22341 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
8030 /* 22345 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8031 /* 22350 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8032 /* 22354 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8033 /* 22356 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x))
8034 /* 22356 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
8035 /* 22359 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8036 /* 22363 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8037 /* 22368 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8038 /* 22372 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8039 /* 22375 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8040 /* 22377 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8041 /* 22380 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8042 /* 22382 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8043 /* 22385 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8044 /* 22388 */ GIR_RootConstrainSelectedInstOperands,
8045 /* 22389 */ // GIR_Coverage, 1135,
8046 /* 22389 */ GIR_EraseRootFromParent_Done,
8047 /* 22390 */ // Label 696: @22390
8048 /* 22390 */ GIM_Reject,
8049 /* 22391 */ // Label 694: @22391
8050 /* 22391 */ GIM_Try, /*On fail goto*//*Label 697*/ GIMT_Encode4(22522),
8051 /* 22396 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8052 /* 22401 */ GIM_Try, /*On fail goto*//*Label 698*/ GIMT_Encode4(22451), // Rule ID 1136 //
8053 /* 22406 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8054 /* 22410 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8055 /* 22414 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8056 /* 22417 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8057 /* 22422 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
8058 /* 22426 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8059 /* 22431 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8060 /* 22435 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8061 /* 22437 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x)
8062 /* 22437 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8063 /* 22440 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8064 /* 22442 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8065 /* 22446 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8066 /* 22449 */ GIR_RootConstrainSelectedInstOperands,
8067 /* 22450 */ // GIR_Coverage, 1136,
8068 /* 22450 */ GIR_EraseRootFromParent_Done,
8069 /* 22451 */ // Label 698: @22451
8070 /* 22451 */ GIM_Try, /*On fail goto*//*Label 699*/ GIMT_Encode4(22521), // Rule ID 1137 //
8071 /* 22456 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8072 /* 22460 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8073 /* 22464 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8074 /* 22467 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8075 /* 22472 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
8076 /* 22476 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8077 /* 22481 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8078 /* 22485 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8079 /* 22487 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x))
8080 /* 22487 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
8081 /* 22490 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8082 /* 22494 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8083 /* 22499 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8084 /* 22503 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8085 /* 22506 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8086 /* 22508 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8087 /* 22511 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8088 /* 22513 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8089 /* 22516 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8090 /* 22519 */ GIR_RootConstrainSelectedInstOperands,
8091 /* 22520 */ // GIR_Coverage, 1137,
8092 /* 22520 */ GIR_EraseRootFromParent_Done,
8093 /* 22521 */ // Label 699: @22521
8094 /* 22521 */ GIM_Reject,
8095 /* 22522 */ // Label 697: @22522
8096 /* 22522 */ GIM_Try, /*On fail goto*//*Label 700*/ GIMT_Encode4(22653),
8097 /* 22527 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8098 /* 22532 */ GIM_Try, /*On fail goto*//*Label 701*/ GIMT_Encode4(22582), // Rule ID 1139 //
8099 /* 22537 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8100 /* 22541 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8101 /* 22545 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8102 /* 22548 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8103 /* 22553 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
8104 /* 22557 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8105 /* 22562 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8106 /* 22566 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8107 /* 22568 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x)
8108 /* 22568 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8109 /* 22571 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8110 /* 22573 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8111 /* 22577 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8112 /* 22580 */ GIR_RootConstrainSelectedInstOperands,
8113 /* 22581 */ // GIR_Coverage, 1139,
8114 /* 22581 */ GIR_EraseRootFromParent_Done,
8115 /* 22582 */ // Label 701: @22582
8116 /* 22582 */ GIM_Try, /*On fail goto*//*Label 702*/ GIMT_Encode4(22652), // Rule ID 1140 //
8117 /* 22587 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8118 /* 22591 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8119 /* 22595 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8120 /* 22598 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8121 /* 22603 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
8122 /* 22607 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8123 /* 22612 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8124 /* 22616 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8125 /* 22618 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x))
8126 /* 22618 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
8127 /* 22621 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8128 /* 22625 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8129 /* 22630 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8130 /* 22634 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8131 /* 22637 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8132 /* 22639 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8133 /* 22642 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8134 /* 22644 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8135 /* 22647 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8136 /* 22650 */ GIR_RootConstrainSelectedInstOperands,
8137 /* 22651 */ // GIR_Coverage, 1140,
8138 /* 22651 */ GIR_EraseRootFromParent_Done,
8139 /* 22652 */ // Label 702: @22652
8140 /* 22652 */ GIM_Reject,
8141 /* 22653 */ // Label 700: @22653
8142 /* 22653 */ GIM_Try, /*On fail goto*//*Label 703*/ GIMT_Encode4(22784),
8143 /* 22658 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8144 /* 22663 */ GIM_Try, /*On fail goto*//*Label 704*/ GIMT_Encode4(22713), // Rule ID 1141 //
8145 /* 22668 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8146 /* 22672 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8147 /* 22676 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8148 /* 22679 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8149 /* 22684 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
8150 /* 22688 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8151 /* 22693 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8152 /* 22697 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8153 /* 22699 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x)
8154 /* 22699 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8155 /* 22702 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8156 /* 22704 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8157 /* 22708 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8158 /* 22711 */ GIR_RootConstrainSelectedInstOperands,
8159 /* 22712 */ // GIR_Coverage, 1141,
8160 /* 22712 */ GIR_EraseRootFromParent_Done,
8161 /* 22713 */ // Label 704: @22713
8162 /* 22713 */ GIM_Try, /*On fail goto*//*Label 705*/ GIMT_Encode4(22783), // Rule ID 1142 //
8163 /* 22718 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8164 /* 22722 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8165 /* 22726 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8166 /* 22729 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8167 /* 22734 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
8168 /* 22738 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8169 /* 22743 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8170 /* 22747 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8171 /* 22749 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x))
8172 /* 22749 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
8173 /* 22752 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8174 /* 22756 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8175 /* 22761 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8176 /* 22765 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8177 /* 22768 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8178 /* 22770 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8179 /* 22773 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8180 /* 22775 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8181 /* 22778 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8182 /* 22781 */ GIR_RootConstrainSelectedInstOperands,
8183 /* 22782 */ // GIR_Coverage, 1142,
8184 /* 22782 */ GIR_EraseRootFromParent_Done,
8185 /* 22783 */ // Label 705: @22783
8186 /* 22783 */ GIM_Reject,
8187 /* 22784 */ // Label 703: @22784
8188 /* 22784 */ GIM_Try, /*On fail goto*//*Label 706*/ GIMT_Encode4(22915),
8189 /* 22789 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8190 /* 22794 */ GIM_Try, /*On fail goto*//*Label 707*/ GIMT_Encode4(22844), // Rule ID 1144 //
8191 /* 22799 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8192 /* 22803 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8193 /* 22807 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8194 /* 22810 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8195 /* 22815 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
8196 /* 22819 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8197 /* 22824 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8198 /* 22828 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8199 /* 22830 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x)
8200 /* 22830 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8201 /* 22833 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8202 /* 22835 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8203 /* 22839 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8204 /* 22842 */ GIR_RootConstrainSelectedInstOperands,
8205 /* 22843 */ // GIR_Coverage, 1144,
8206 /* 22843 */ GIR_EraseRootFromParent_Done,
8207 /* 22844 */ // Label 707: @22844
8208 /* 22844 */ GIM_Try, /*On fail goto*//*Label 708*/ GIMT_Encode4(22914), // Rule ID 1145 //
8209 /* 22849 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8210 /* 22853 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8211 /* 22857 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8212 /* 22860 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8213 /* 22865 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
8214 /* 22869 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8215 /* 22874 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8216 /* 22878 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8217 /* 22880 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x))
8218 /* 22880 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
8219 /* 22883 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8220 /* 22887 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8221 /* 22892 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8222 /* 22896 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8223 /* 22899 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8224 /* 22901 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8225 /* 22904 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8226 /* 22906 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8227 /* 22909 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8228 /* 22912 */ GIR_RootConstrainSelectedInstOperands,
8229 /* 22913 */ // GIR_Coverage, 1145,
8230 /* 22913 */ GIR_EraseRootFromParent_Done,
8231 /* 22914 */ // Label 708: @22914
8232 /* 22914 */ GIM_Reject,
8233 /* 22915 */ // Label 706: @22915
8234 /* 22915 */ GIM_Try, /*On fail goto*//*Label 709*/ GIMT_Encode4(23046),
8235 /* 22920 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8236 /* 22925 */ GIM_Try, /*On fail goto*//*Label 710*/ GIMT_Encode4(22975), // Rule ID 1146 //
8237 /* 22930 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8238 /* 22934 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8239 /* 22938 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8240 /* 22941 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8241 /* 22946 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
8242 /* 22950 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8243 /* 22955 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8244 /* 22959 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8245 /* 22961 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x)
8246 /* 22961 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8247 /* 22964 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8248 /* 22966 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8249 /* 22970 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8250 /* 22973 */ GIR_RootConstrainSelectedInstOperands,
8251 /* 22974 */ // GIR_Coverage, 1146,
8252 /* 22974 */ GIR_EraseRootFromParent_Done,
8253 /* 22975 */ // Label 710: @22975
8254 /* 22975 */ GIM_Try, /*On fail goto*//*Label 711*/ GIMT_Encode4(23045), // Rule ID 1147 //
8255 /* 22980 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8256 /* 22984 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8257 /* 22988 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8258 /* 22991 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8259 /* 22996 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
8260 /* 23000 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8261 /* 23005 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8262 /* 23009 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8263 /* 23011 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14598:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x))
8264 /* 23011 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
8265 /* 23014 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8266 /* 23018 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8267 /* 23023 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8268 /* 23027 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8269 /* 23030 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8270 /* 23032 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8271 /* 23035 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8272 /* 23037 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8273 /* 23040 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8274 /* 23043 */ GIR_RootConstrainSelectedInstOperands,
8275 /* 23044 */ // GIR_Coverage, 1147,
8276 /* 23044 */ GIR_EraseRootFromParent_Done,
8277 /* 23045 */ // Label 711: @23045
8278 /* 23045 */ GIM_Reject,
8279 /* 23046 */ // Label 709: @23046
8280 /* 23046 */ GIM_Try, /*On fail goto*//*Label 712*/ GIMT_Encode4(23177),
8281 /* 23051 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8282 /* 23056 */ GIM_Try, /*On fail goto*//*Label 713*/ GIMT_Encode4(23106), // Rule ID 1149 //
8283 /* 23061 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8284 /* 23065 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8285 /* 23069 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8286 /* 23072 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8287 /* 23077 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
8288 /* 23081 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8289 /* 23086 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8290 /* 23090 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8291 /* 23092 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x)
8292 /* 23092 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
8293 /* 23095 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8294 /* 23097 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8295 /* 23101 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8296 /* 23104 */ GIR_RootConstrainSelectedInstOperands,
8297 /* 23105 */ // GIR_Coverage, 1149,
8298 /* 23105 */ GIR_EraseRootFromParent_Done,
8299 /* 23106 */ // Label 713: @23106
8300 /* 23106 */ GIM_Try, /*On fail goto*//*Label 714*/ GIMT_Encode4(23176), // Rule ID 1150 //
8301 /* 23111 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8302 /* 23115 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8303 /* 23119 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8304 /* 23122 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8305 /* 23127 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
8306 /* 23131 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8307 /* 23136 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8308 /* 23140 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8309 /* 23142 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x))
8310 /* 23142 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
8311 /* 23145 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
8312 /* 23149 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8313 /* 23154 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8314 /* 23158 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8315 /* 23161 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8316 /* 23163 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8317 /* 23166 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8318 /* 23168 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8319 /* 23171 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8320 /* 23174 */ GIR_RootConstrainSelectedInstOperands,
8321 /* 23175 */ // GIR_Coverage, 1150,
8322 /* 23175 */ GIR_EraseRootFromParent_Done,
8323 /* 23176 */ // Label 714: @23176
8324 /* 23176 */ GIM_Reject,
8325 /* 23177 */ // Label 712: @23177
8326 /* 23177 */ GIM_Try, /*On fail goto*//*Label 715*/ GIMT_Encode4(23308),
8327 /* 23182 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8328 /* 23187 */ GIM_Try, /*On fail goto*//*Label 716*/ GIMT_Encode4(23237), // Rule ID 1151 //
8329 /* 23192 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8330 /* 23196 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8331 /* 23200 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8332 /* 23203 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8333 /* 23208 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
8334 /* 23212 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8335 /* 23217 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8336 /* 23221 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8337 /* 23223 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x)
8338 /* 23223 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
8339 /* 23226 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8340 /* 23228 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8341 /* 23232 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8342 /* 23235 */ GIR_RootConstrainSelectedInstOperands,
8343 /* 23236 */ // GIR_Coverage, 1151,
8344 /* 23236 */ GIR_EraseRootFromParent_Done,
8345 /* 23237 */ // Label 716: @23237
8346 /* 23237 */ GIM_Try, /*On fail goto*//*Label 717*/ GIMT_Encode4(23307), // Rule ID 1152 //
8347 /* 23242 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8348 /* 23246 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8349 /* 23250 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8350 /* 23253 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8351 /* 23258 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
8352 /* 23262 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8353 /* 23267 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8354 /* 23271 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8355 /* 23273 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x))
8356 /* 23273 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
8357 /* 23276 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
8358 /* 23280 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8359 /* 23285 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8360 /* 23289 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8361 /* 23292 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8362 /* 23294 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8363 /* 23297 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8364 /* 23299 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8365 /* 23302 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8366 /* 23305 */ GIR_RootConstrainSelectedInstOperands,
8367 /* 23306 */ // GIR_Coverage, 1152,
8368 /* 23306 */ GIR_EraseRootFromParent_Done,
8369 /* 23307 */ // Label 717: @23307
8370 /* 23307 */ GIM_Reject,
8371 /* 23308 */ // Label 715: @23308
8372 /* 23308 */ GIM_Try, /*On fail goto*//*Label 718*/ GIMT_Encode4(23439),
8373 /* 23313 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8374 /* 23318 */ GIM_Try, /*On fail goto*//*Label 719*/ GIMT_Encode4(23368), // Rule ID 1154 //
8375 /* 23323 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8376 /* 23327 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8377 /* 23331 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8378 /* 23334 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8379 /* 23339 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
8380 /* 23343 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8381 /* 23348 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8382 /* 23352 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8383 /* 23354 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x)
8384 /* 23354 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
8385 /* 23357 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8386 /* 23359 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8387 /* 23363 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8388 /* 23366 */ GIR_RootConstrainSelectedInstOperands,
8389 /* 23367 */ // GIR_Coverage, 1154,
8390 /* 23367 */ GIR_EraseRootFromParent_Done,
8391 /* 23368 */ // Label 719: @23368
8392 /* 23368 */ GIM_Try, /*On fail goto*//*Label 720*/ GIMT_Encode4(23438), // Rule ID 1155 //
8393 /* 23373 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8394 /* 23377 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8395 /* 23381 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8396 /* 23384 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8397 /* 23389 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
8398 /* 23393 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8399 /* 23398 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8400 /* 23402 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8401 /* 23404 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x))
8402 /* 23404 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
8403 /* 23407 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
8404 /* 23411 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8405 /* 23416 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8406 /* 23420 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8407 /* 23423 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8408 /* 23425 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8409 /* 23428 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8410 /* 23430 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8411 /* 23433 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8412 /* 23436 */ GIR_RootConstrainSelectedInstOperands,
8413 /* 23437 */ // GIR_Coverage, 1155,
8414 /* 23437 */ GIR_EraseRootFromParent_Done,
8415 /* 23438 */ // Label 720: @23438
8416 /* 23438 */ GIM_Reject,
8417 /* 23439 */ // Label 718: @23439
8418 /* 23439 */ GIM_Try, /*On fail goto*//*Label 721*/ GIMT_Encode4(23570),
8419 /* 23444 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8420 /* 23449 */ GIM_Try, /*On fail goto*//*Label 722*/ GIMT_Encode4(23499), // Rule ID 1156 //
8421 /* 23454 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8422 /* 23458 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8423 /* 23462 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8424 /* 23465 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8425 /* 23470 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
8426 /* 23474 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8427 /* 23479 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8428 /* 23483 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8429 /* 23485 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x)
8430 /* 23485 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
8431 /* 23488 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8432 /* 23490 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8433 /* 23494 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8434 /* 23497 */ GIR_RootConstrainSelectedInstOperands,
8435 /* 23498 */ // GIR_Coverage, 1156,
8436 /* 23498 */ GIR_EraseRootFromParent_Done,
8437 /* 23499 */ // Label 722: @23499
8438 /* 23499 */ GIM_Try, /*On fail goto*//*Label 723*/ GIMT_Encode4(23569), // Rule ID 1157 //
8439 /* 23504 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8440 /* 23508 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8441 /* 23512 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8442 /* 23515 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8443 /* 23520 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
8444 /* 23524 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8445 /* 23529 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8446 /* 23533 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8447 /* 23535 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x))
8448 /* 23535 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
8449 /* 23538 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
8450 /* 23542 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8451 /* 23547 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8452 /* 23551 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8453 /* 23554 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8454 /* 23556 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8455 /* 23559 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8456 /* 23561 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8457 /* 23564 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8458 /* 23567 */ GIR_RootConstrainSelectedInstOperands,
8459 /* 23568 */ // GIR_Coverage, 1157,
8460 /* 23568 */ GIR_EraseRootFromParent_Done,
8461 /* 23569 */ // Label 723: @23569
8462 /* 23569 */ GIM_Reject,
8463 /* 23570 */ // Label 721: @23570
8464 /* 23570 */ GIM_Try, /*On fail goto*//*Label 724*/ GIMT_Encode4(23701),
8465 /* 23575 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8466 /* 23580 */ GIM_Try, /*On fail goto*//*Label 725*/ GIMT_Encode4(23630), // Rule ID 1159 //
8467 /* 23585 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8468 /* 23589 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8469 /* 23593 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8470 /* 23596 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8471 /* 23601 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
8472 /* 23605 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8473 /* 23610 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8474 /* 23614 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8475 /* 23616 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x)
8476 /* 23616 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
8477 /* 23619 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8478 /* 23621 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8479 /* 23625 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8480 /* 23628 */ GIR_RootConstrainSelectedInstOperands,
8481 /* 23629 */ // GIR_Coverage, 1159,
8482 /* 23629 */ GIR_EraseRootFromParent_Done,
8483 /* 23630 */ // Label 725: @23630
8484 /* 23630 */ GIM_Try, /*On fail goto*//*Label 726*/ GIMT_Encode4(23700), // Rule ID 1160 //
8485 /* 23635 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8486 /* 23639 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8487 /* 23643 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8488 /* 23646 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8489 /* 23651 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
8490 /* 23655 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8491 /* 23660 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8492 /* 23664 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8493 /* 23666 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x))
8494 /* 23666 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
8495 /* 23669 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
8496 /* 23673 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8497 /* 23678 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8498 /* 23682 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8499 /* 23685 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8500 /* 23687 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8501 /* 23690 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8502 /* 23692 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8503 /* 23695 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8504 /* 23698 */ GIR_RootConstrainSelectedInstOperands,
8505 /* 23699 */ // GIR_Coverage, 1160,
8506 /* 23699 */ GIR_EraseRootFromParent_Done,
8507 /* 23700 */ // Label 726: @23700
8508 /* 23700 */ GIM_Reject,
8509 /* 23701 */ // Label 724: @23701
8510 /* 23701 */ GIM_Try, /*On fail goto*//*Label 727*/ GIMT_Encode4(23832),
8511 /* 23706 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8512 /* 23711 */ GIM_Try, /*On fail goto*//*Label 728*/ GIMT_Encode4(23761), // Rule ID 1161 //
8513 /* 23716 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8514 /* 23720 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8515 /* 23724 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8516 /* 23727 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8517 /* 23732 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
8518 /* 23736 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8519 /* 23741 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8520 /* 23745 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8521 /* 23747 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x)
8522 /* 23747 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
8523 /* 23750 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8524 /* 23752 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8525 /* 23756 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8526 /* 23759 */ GIR_RootConstrainSelectedInstOperands,
8527 /* 23760 */ // GIR_Coverage, 1161,
8528 /* 23760 */ GIR_EraseRootFromParent_Done,
8529 /* 23761 */ // Label 728: @23761
8530 /* 23761 */ GIM_Try, /*On fail goto*//*Label 729*/ GIMT_Encode4(23831), // Rule ID 1162 //
8531 /* 23766 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8532 /* 23770 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8533 /* 23774 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8534 /* 23777 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8535 /* 23782 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
8536 /* 23786 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8537 /* 23791 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8538 /* 23795 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8539 /* 23797 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x))
8540 /* 23797 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
8541 /* 23800 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
8542 /* 23804 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8543 /* 23809 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8544 /* 23813 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8545 /* 23816 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8546 /* 23818 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8547 /* 23821 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8548 /* 23823 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8549 /* 23826 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8550 /* 23829 */ GIR_RootConstrainSelectedInstOperands,
8551 /* 23830 */ // GIR_Coverage, 1162,
8552 /* 23830 */ GIR_EraseRootFromParent_Done,
8553 /* 23831 */ // Label 729: @23831
8554 /* 23831 */ GIM_Reject,
8555 /* 23832 */ // Label 727: @23832
8556 /* 23832 */ GIM_Try, /*On fail goto*//*Label 730*/ GIMT_Encode4(23963),
8557 /* 23837 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8558 /* 23842 */ GIM_Try, /*On fail goto*//*Label 731*/ GIMT_Encode4(23892), // Rule ID 1164 //
8559 /* 23847 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8560 /* 23851 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8561 /* 23855 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8562 /* 23858 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8563 /* 23863 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
8564 /* 23867 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8565 /* 23872 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8566 /* 23876 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8567 /* 23878 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x)
8568 /* 23878 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
8569 /* 23881 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8570 /* 23883 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8571 /* 23887 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8572 /* 23890 */ GIR_RootConstrainSelectedInstOperands,
8573 /* 23891 */ // GIR_Coverage, 1164,
8574 /* 23891 */ GIR_EraseRootFromParent_Done,
8575 /* 23892 */ // Label 731: @23892
8576 /* 23892 */ GIM_Try, /*On fail goto*//*Label 732*/ GIMT_Encode4(23962), // Rule ID 1165 //
8577 /* 23897 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8578 /* 23901 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8579 /* 23905 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8580 /* 23908 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8581 /* 23913 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
8582 /* 23917 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8583 /* 23922 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8584 /* 23926 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8585 /* 23928 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x))
8586 /* 23928 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
8587 /* 23931 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
8588 /* 23935 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8589 /* 23940 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8590 /* 23944 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8591 /* 23947 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8592 /* 23949 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8593 /* 23952 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8594 /* 23954 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8595 /* 23957 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8596 /* 23960 */ GIR_RootConstrainSelectedInstOperands,
8597 /* 23961 */ // GIR_Coverage, 1165,
8598 /* 23961 */ GIR_EraseRootFromParent_Done,
8599 /* 23962 */ // Label 732: @23962
8600 /* 23962 */ GIM_Reject,
8601 /* 23963 */ // Label 730: @23963
8602 /* 23963 */ GIM_Try, /*On fail goto*//*Label 733*/ GIMT_Encode4(24119),
8603 /* 23968 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8604 /* 23973 */ GIM_Try, /*On fail goto*//*Label 734*/ GIMT_Encode4(24023), // Rule ID 1166 //
8605 /* 23978 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8606 /* 23982 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8607 /* 23986 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8608 /* 23989 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8609 /* 23994 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
8610 /* 23998 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8611 /* 24003 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8612 /* 24007 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8613 /* 24009 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x)
8614 /* 24009 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
8615 /* 24012 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8616 /* 24014 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8617 /* 24018 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8618 /* 24021 */ GIR_RootConstrainSelectedInstOperands,
8619 /* 24022 */ // GIR_Coverage, 1166,
8620 /* 24022 */ GIR_EraseRootFromParent_Done,
8621 /* 24023 */ // Label 734: @24023
8622 /* 24023 */ GIM_Try, /*On fail goto*//*Label 735*/ GIMT_Encode4(24093), // Rule ID 1167 //
8623 /* 24028 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8624 /* 24032 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8625 /* 24036 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8626 /* 24039 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8627 /* 24044 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
8628 /* 24048 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8629 /* 24053 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8630 /* 24057 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8631 /* 24059 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14597:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x))
8632 /* 24059 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
8633 /* 24062 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
8634 /* 24066 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8635 /* 24071 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8636 /* 24075 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8637 /* 24078 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8638 /* 24080 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8639 /* 24083 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8640 /* 24085 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8641 /* 24088 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8642 /* 24091 */ GIR_RootConstrainSelectedInstOperands,
8643 /* 24092 */ // GIR_Coverage, 1167,
8644 /* 24092 */ GIR_EraseRootFromParent_Done,
8645 /* 24093 */ // Label 735: @24093
8646 /* 24093 */ GIM_Try, /*On fail goto*//*Label 736*/ GIMT_Encode4(24118), // Rule ID 120 //
8647 /* 24098 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8648 /* 24102 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8649 /* 24106 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$src, 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
8650 /* 24106 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8651 /* 24109 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8652 /* 24111 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8653 /* 24113 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8654 /* 24116 */ GIR_RootConstrainSelectedInstOperands,
8655 /* 24117 */ // GIR_Coverage, 120,
8656 /* 24117 */ GIR_EraseRootFromParent_Done,
8657 /* 24118 */ // Label 736: @24118
8658 /* 24118 */ GIM_Reject,
8659 /* 24119 */ // Label 733: @24119
8660 /* 24119 */ GIM_Try, /*On fail goto*//*Label 737*/ GIMT_Encode4(24151), // Rule ID 94 //
8661 /* 24124 */ // MIs[0] Operand 1
8662 /* 24124 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8663 /* 24129 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8664 /* 24133 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8665 /* 24137 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8666 /* 24137 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I32),
8667 /* 24140 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8668 /* 24142 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8669 /* 24144 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8670 /* 24146 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8671 /* 24149 */ GIR_RootConstrainSelectedInstOperands,
8672 /* 24150 */ // GIR_Coverage, 94,
8673 /* 24150 */ GIR_EraseRootFromParent_Done,
8674 /* 24151 */ // Label 737: @24151
8675 /* 24151 */ GIM_Try, /*On fail goto*//*Label 738*/ GIMT_Encode4(24183), // Rule ID 96 //
8676 /* 24156 */ // MIs[0] Operand 1
8677 /* 24156 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8678 /* 24161 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8679 /* 24165 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8680 /* 24169 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETNE:{ *:[Other] }) => (NE_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8681 /* 24169 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I32),
8682 /* 24172 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8683 /* 24174 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8684 /* 24176 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8685 /* 24178 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8686 /* 24181 */ GIR_RootConstrainSelectedInstOperands,
8687 /* 24182 */ // GIR_Coverage, 96,
8688 /* 24182 */ GIR_EraseRootFromParent_Done,
8689 /* 24183 */ // Label 738: @24183
8690 /* 24183 */ GIM_Try, /*On fail goto*//*Label 739*/ GIMT_Encode4(24215), // Rule ID 98 //
8691 /* 24188 */ // MIs[0] Operand 1
8692 /* 24188 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
8693 /* 24193 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8694 /* 24197 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8695 /* 24201 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8696 /* 24201 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I32),
8697 /* 24204 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8698 /* 24206 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8699 /* 24208 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8700 /* 24210 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8701 /* 24213 */ GIR_RootConstrainSelectedInstOperands,
8702 /* 24214 */ // GIR_Coverage, 98,
8703 /* 24214 */ GIR_EraseRootFromParent_Done,
8704 /* 24215 */ // Label 739: @24215
8705 /* 24215 */ GIM_Try, /*On fail goto*//*Label 740*/ GIMT_Encode4(24247), // Rule ID 100 //
8706 /* 24220 */ // MIs[0] Operand 1
8707 /* 24220 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
8708 /* 24225 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8709 /* 24229 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8710 /* 24233 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8711 /* 24233 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I32),
8712 /* 24236 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8713 /* 24238 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8714 /* 24240 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8715 /* 24242 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8716 /* 24245 */ GIR_RootConstrainSelectedInstOperands,
8717 /* 24246 */ // GIR_Coverage, 100,
8718 /* 24246 */ GIR_EraseRootFromParent_Done,
8719 /* 24247 */ // Label 740: @24247
8720 /* 24247 */ GIM_Try, /*On fail goto*//*Label 741*/ GIMT_Encode4(24279), // Rule ID 102 //
8721 /* 24252 */ // MIs[0] Operand 1
8722 /* 24252 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
8723 /* 24257 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8724 /* 24261 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8725 /* 24265 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8726 /* 24265 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I32),
8727 /* 24268 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8728 /* 24270 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8729 /* 24272 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8730 /* 24274 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8731 /* 24277 */ GIR_RootConstrainSelectedInstOperands,
8732 /* 24278 */ // GIR_Coverage, 102,
8733 /* 24278 */ GIR_EraseRootFromParent_Done,
8734 /* 24279 */ // Label 741: @24279
8735 /* 24279 */ GIM_Try, /*On fail goto*//*Label 742*/ GIMT_Encode4(24311), // Rule ID 104 //
8736 /* 24284 */ // MIs[0] Operand 1
8737 /* 24284 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
8738 /* 24289 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8739 /* 24293 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8740 /* 24297 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8741 /* 24297 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I32),
8742 /* 24300 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8743 /* 24302 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8744 /* 24304 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8745 /* 24306 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8746 /* 24309 */ GIR_RootConstrainSelectedInstOperands,
8747 /* 24310 */ // GIR_Coverage, 104,
8748 /* 24310 */ GIR_EraseRootFromParent_Done,
8749 /* 24311 */ // Label 742: @24311
8750 /* 24311 */ GIM_Try, /*On fail goto*//*Label 743*/ GIMT_Encode4(24343), // Rule ID 106 //
8751 /* 24316 */ // MIs[0] Operand 1
8752 /* 24316 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
8753 /* 24321 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8754 /* 24325 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8755 /* 24329 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8756 /* 24329 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I32),
8757 /* 24332 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8758 /* 24334 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8759 /* 24336 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8760 /* 24338 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8761 /* 24341 */ GIR_RootConstrainSelectedInstOperands,
8762 /* 24342 */ // GIR_Coverage, 106,
8763 /* 24342 */ GIR_EraseRootFromParent_Done,
8764 /* 24343 */ // Label 743: @24343
8765 /* 24343 */ GIM_Try, /*On fail goto*//*Label 744*/ GIMT_Encode4(24375), // Rule ID 108 //
8766 /* 24348 */ // MIs[0] Operand 1
8767 /* 24348 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
8768 /* 24353 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8769 /* 24357 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8770 /* 24361 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8771 /* 24361 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I32),
8772 /* 24364 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8773 /* 24366 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8774 /* 24368 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8775 /* 24370 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8776 /* 24373 */ GIR_RootConstrainSelectedInstOperands,
8777 /* 24374 */ // GIR_Coverage, 108,
8778 /* 24374 */ GIR_EraseRootFromParent_Done,
8779 /* 24375 */ // Label 744: @24375
8780 /* 24375 */ GIM_Try, /*On fail goto*//*Label 745*/ GIMT_Encode4(24407), // Rule ID 110 //
8781 /* 24380 */ // MIs[0] Operand 1
8782 /* 24380 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
8783 /* 24385 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8784 /* 24389 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8785 /* 24393 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8786 /* 24393 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I32),
8787 /* 24396 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8788 /* 24398 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8789 /* 24400 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8790 /* 24402 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8791 /* 24405 */ GIR_RootConstrainSelectedInstOperands,
8792 /* 24406 */ // GIR_Coverage, 110,
8793 /* 24406 */ GIR_EraseRootFromParent_Done,
8794 /* 24407 */ // Label 745: @24407
8795 /* 24407 */ GIM_Try, /*On fail goto*//*Label 746*/ GIMT_Encode4(24439), // Rule ID 112 //
8796 /* 24412 */ // MIs[0] Operand 1
8797 /* 24412 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
8798 /* 24417 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8799 /* 24421 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8800 /* 24425 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8801 /* 24425 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I32),
8802 /* 24428 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8803 /* 24430 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8804 /* 24432 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8805 /* 24434 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8806 /* 24437 */ GIR_RootConstrainSelectedInstOperands,
8807 /* 24438 */ // GIR_Coverage, 112,
8808 /* 24438 */ GIR_EraseRootFromParent_Done,
8809 /* 24439 */ // Label 746: @24439
8810 /* 24439 */ GIM_Reject,
8811 /* 24440 */ // Label 687: @24440
8812 /* 24440 */ GIM_Reject,
8813 /* 24441 */ // Label 685: @24441
8814 /* 24441 */ GIM_Try, /*On fail goto*//*Label 747*/ GIMT_Encode4(24801),
8815 /* 24446 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i64,
8816 /* 24449 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8817 /* 24453 */ GIM_Try, /*On fail goto*//*Label 748*/ GIMT_Encode4(24512),
8818 /* 24458 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8819 /* 24463 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8820 /* 24467 */ GIM_Try, /*On fail goto*//*Label 749*/ GIMT_Encode4(24488), // Rule ID 121 //
8821 /* 24472 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8822 /* 24476 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$src, 0:{ *:[i64] }, SETEQ:{ *:[Other] }) => (EQZ_I64:{ *:[i32] } I64:{ *:[i64] }:$src)
8823 /* 24476 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I64),
8824 /* 24479 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8825 /* 24481 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8826 /* 24483 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8827 /* 24486 */ GIR_RootConstrainSelectedInstOperands,
8828 /* 24487 */ // GIR_Coverage, 121,
8829 /* 24487 */ GIR_EraseRootFromParent_Done,
8830 /* 24488 */ // Label 749: @24488
8831 /* 24488 */ GIM_Try, /*On fail goto*//*Label 750*/ GIMT_Encode4(24511), // Rule ID 95 //
8832 /* 24493 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8833 /* 24497 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8834 /* 24497 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I64),
8835 /* 24500 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8836 /* 24502 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8837 /* 24504 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8838 /* 24506 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8839 /* 24509 */ GIR_RootConstrainSelectedInstOperands,
8840 /* 24510 */ // GIR_Coverage, 95,
8841 /* 24510 */ GIR_EraseRootFromParent_Done,
8842 /* 24511 */ // Label 750: @24511
8843 /* 24511 */ GIM_Reject,
8844 /* 24512 */ // Label 748: @24512
8845 /* 24512 */ GIM_Try, /*On fail goto*//*Label 751*/ GIMT_Encode4(24544), // Rule ID 97 //
8846 /* 24517 */ // MIs[0] Operand 1
8847 /* 24517 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8848 /* 24522 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8849 /* 24526 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8850 /* 24530 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETNE:{ *:[Other] }) => (NE_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8851 /* 24530 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I64),
8852 /* 24533 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8853 /* 24535 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8854 /* 24537 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8855 /* 24539 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8856 /* 24542 */ GIR_RootConstrainSelectedInstOperands,
8857 /* 24543 */ // GIR_Coverage, 97,
8858 /* 24543 */ GIR_EraseRootFromParent_Done,
8859 /* 24544 */ // Label 751: @24544
8860 /* 24544 */ GIM_Try, /*On fail goto*//*Label 752*/ GIMT_Encode4(24576), // Rule ID 99 //
8861 /* 24549 */ // MIs[0] Operand 1
8862 /* 24549 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
8863 /* 24554 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8864 /* 24558 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8865 /* 24562 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8866 /* 24562 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I64),
8867 /* 24565 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8868 /* 24567 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8869 /* 24569 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8870 /* 24571 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8871 /* 24574 */ GIR_RootConstrainSelectedInstOperands,
8872 /* 24575 */ // GIR_Coverage, 99,
8873 /* 24575 */ GIR_EraseRootFromParent_Done,
8874 /* 24576 */ // Label 752: @24576
8875 /* 24576 */ GIM_Try, /*On fail goto*//*Label 753*/ GIMT_Encode4(24608), // Rule ID 101 //
8876 /* 24581 */ // MIs[0] Operand 1
8877 /* 24581 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
8878 /* 24586 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8879 /* 24590 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8880 /* 24594 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8881 /* 24594 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I64),
8882 /* 24597 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8883 /* 24599 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8884 /* 24601 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8885 /* 24603 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8886 /* 24606 */ GIR_RootConstrainSelectedInstOperands,
8887 /* 24607 */ // GIR_Coverage, 101,
8888 /* 24607 */ GIR_EraseRootFromParent_Done,
8889 /* 24608 */ // Label 753: @24608
8890 /* 24608 */ GIM_Try, /*On fail goto*//*Label 754*/ GIMT_Encode4(24640), // Rule ID 103 //
8891 /* 24613 */ // MIs[0] Operand 1
8892 /* 24613 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
8893 /* 24618 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8894 /* 24622 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8895 /* 24626 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8896 /* 24626 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I64),
8897 /* 24629 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8898 /* 24631 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8899 /* 24633 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8900 /* 24635 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8901 /* 24638 */ GIR_RootConstrainSelectedInstOperands,
8902 /* 24639 */ // GIR_Coverage, 103,
8903 /* 24639 */ GIR_EraseRootFromParent_Done,
8904 /* 24640 */ // Label 754: @24640
8905 /* 24640 */ GIM_Try, /*On fail goto*//*Label 755*/ GIMT_Encode4(24672), // Rule ID 105 //
8906 /* 24645 */ // MIs[0] Operand 1
8907 /* 24645 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
8908 /* 24650 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8909 /* 24654 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8910 /* 24658 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8911 /* 24658 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I64),
8912 /* 24661 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8913 /* 24663 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8914 /* 24665 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8915 /* 24667 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8916 /* 24670 */ GIR_RootConstrainSelectedInstOperands,
8917 /* 24671 */ // GIR_Coverage, 105,
8918 /* 24671 */ GIR_EraseRootFromParent_Done,
8919 /* 24672 */ // Label 755: @24672
8920 /* 24672 */ GIM_Try, /*On fail goto*//*Label 756*/ GIMT_Encode4(24704), // Rule ID 107 //
8921 /* 24677 */ // MIs[0] Operand 1
8922 /* 24677 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
8923 /* 24682 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8924 /* 24686 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8925 /* 24690 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8926 /* 24690 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I64),
8927 /* 24693 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8928 /* 24695 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8929 /* 24697 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8930 /* 24699 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8931 /* 24702 */ GIR_RootConstrainSelectedInstOperands,
8932 /* 24703 */ // GIR_Coverage, 107,
8933 /* 24703 */ GIR_EraseRootFromParent_Done,
8934 /* 24704 */ // Label 756: @24704
8935 /* 24704 */ GIM_Try, /*On fail goto*//*Label 757*/ GIMT_Encode4(24736), // Rule ID 109 //
8936 /* 24709 */ // MIs[0] Operand 1
8937 /* 24709 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
8938 /* 24714 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8939 /* 24718 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8940 /* 24722 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8941 /* 24722 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I64),
8942 /* 24725 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8943 /* 24727 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8944 /* 24729 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8945 /* 24731 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8946 /* 24734 */ GIR_RootConstrainSelectedInstOperands,
8947 /* 24735 */ // GIR_Coverage, 109,
8948 /* 24735 */ GIR_EraseRootFromParent_Done,
8949 /* 24736 */ // Label 757: @24736
8950 /* 24736 */ GIM_Try, /*On fail goto*//*Label 758*/ GIMT_Encode4(24768), // Rule ID 111 //
8951 /* 24741 */ // MIs[0] Operand 1
8952 /* 24741 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
8953 /* 24746 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8954 /* 24750 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8955 /* 24754 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8956 /* 24754 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I64),
8957 /* 24757 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8958 /* 24759 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8959 /* 24761 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8960 /* 24763 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8961 /* 24766 */ GIR_RootConstrainSelectedInstOperands,
8962 /* 24767 */ // GIR_Coverage, 111,
8963 /* 24767 */ GIR_EraseRootFromParent_Done,
8964 /* 24768 */ // Label 758: @24768
8965 /* 24768 */ GIM_Try, /*On fail goto*//*Label 759*/ GIMT_Encode4(24800), // Rule ID 113 //
8966 /* 24773 */ // MIs[0] Operand 1
8967 /* 24773 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
8968 /* 24778 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8969 /* 24782 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8970 /* 24786 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8971 /* 24786 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I64),
8972 /* 24789 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8973 /* 24791 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8974 /* 24793 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8975 /* 24795 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8976 /* 24798 */ GIR_RootConstrainSelectedInstOperands,
8977 /* 24799 */ // GIR_Coverage, 113,
8978 /* 24799 */ GIR_EraseRootFromParent_Done,
8979 /* 24800 */ // Label 759: @24800
8980 /* 24800 */ GIM_Reject,
8981 /* 24801 */ // Label 747: @24801
8982 /* 24801 */ GIM_Reject,
8983 /* 24802 */ // Label 686: @24802
8984 /* 24802 */ GIM_Reject,
8985 /* 24803 */ // Label 679: @24803
8986 /* 24803 */ GIM_Try, /*On fail goto*//*Label 760*/ GIMT_Encode4(25159),
8987 /* 24808 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
8988 /* 24811 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
8989 /* 24814 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8990 /* 24818 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 761*/ GIMT_Encode4(24852), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 195 //
8991 /* 24825 */ // MIs[0] Operand 1
8992 /* 24825 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8993 /* 24830 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8994 /* 24834 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8995 /* 24838 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
8996 /* 24838 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I8x16),
8997 /* 24841 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8998 /* 24843 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8999 /* 24845 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9000 /* 24847 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9001 /* 24850 */ GIR_RootConstrainSelectedInstOperands,
9002 /* 24851 */ // GIR_Coverage, 195,
9003 /* 24851 */ GIR_EraseRootFromParent_Done,
9004 /* 24852 */ // Label 761: @24852
9005 /* 24852 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 762*/ GIMT_Encode4(24886), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 202 //
9006 /* 24859 */ // MIs[0] Operand 1
9007 /* 24859 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
9008 /* 24864 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9009 /* 24868 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9010 /* 24872 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETNE:{ *:[Other] }) => (NE_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9011 /* 24872 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I8x16),
9012 /* 24875 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9013 /* 24877 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9014 /* 24879 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9015 /* 24881 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9016 /* 24884 */ GIR_RootConstrainSelectedInstOperands,
9017 /* 24885 */ // GIR_Coverage, 202,
9018 /* 24885 */ GIR_EraseRootFromParent_Done,
9019 /* 24886 */ // Label 762: @24886
9020 /* 24886 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 763*/ GIMT_Encode4(24920), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 209 //
9021 /* 24893 */ // MIs[0] Operand 1
9022 /* 24893 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
9023 /* 24898 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9024 /* 24902 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9025 /* 24906 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9026 /* 24906 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I8x16),
9027 /* 24909 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9028 /* 24911 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9029 /* 24913 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9030 /* 24915 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9031 /* 24918 */ GIR_RootConstrainSelectedInstOperands,
9032 /* 24919 */ // GIR_Coverage, 209,
9033 /* 24919 */ GIR_EraseRootFromParent_Done,
9034 /* 24920 */ // Label 763: @24920
9035 /* 24920 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 764*/ GIMT_Encode4(24954), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 213 //
9036 /* 24927 */ // MIs[0] Operand 1
9037 /* 24927 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
9038 /* 24932 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9039 /* 24936 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9040 /* 24940 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9041 /* 24940 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I8x16),
9042 /* 24943 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9043 /* 24945 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9044 /* 24947 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9045 /* 24949 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9046 /* 24952 */ GIR_RootConstrainSelectedInstOperands,
9047 /* 24953 */ // GIR_Coverage, 213,
9048 /* 24953 */ GIR_EraseRootFromParent_Done,
9049 /* 24954 */ // Label 764: @24954
9050 /* 24954 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 765*/ GIMT_Encode4(24988), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 219 //
9051 /* 24961 */ // MIs[0] Operand 1
9052 /* 24961 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
9053 /* 24966 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9054 /* 24970 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9055 /* 24974 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9056 /* 24974 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I8x16),
9057 /* 24977 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9058 /* 24979 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9059 /* 24981 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9060 /* 24983 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9061 /* 24986 */ GIR_RootConstrainSelectedInstOperands,
9062 /* 24987 */ // GIR_Coverage, 219,
9063 /* 24987 */ GIR_EraseRootFromParent_Done,
9064 /* 24988 */ // Label 765: @24988
9065 /* 24988 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 766*/ GIMT_Encode4(25022), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 223 //
9066 /* 24995 */ // MIs[0] Operand 1
9067 /* 24995 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
9068 /* 25000 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9069 /* 25004 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9070 /* 25008 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9071 /* 25008 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I8x16),
9072 /* 25011 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9073 /* 25013 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9074 /* 25015 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9075 /* 25017 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9076 /* 25020 */ GIR_RootConstrainSelectedInstOperands,
9077 /* 25021 */ // GIR_Coverage, 223,
9078 /* 25021 */ GIR_EraseRootFromParent_Done,
9079 /* 25022 */ // Label 766: @25022
9080 /* 25022 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 767*/ GIMT_Encode4(25056), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 229 //
9081 /* 25029 */ // MIs[0] Operand 1
9082 /* 25029 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
9083 /* 25034 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9084 /* 25038 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9085 /* 25042 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9086 /* 25042 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I8x16),
9087 /* 25045 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9088 /* 25047 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9089 /* 25049 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9090 /* 25051 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9091 /* 25054 */ GIR_RootConstrainSelectedInstOperands,
9092 /* 25055 */ // GIR_Coverage, 229,
9093 /* 25055 */ GIR_EraseRootFromParent_Done,
9094 /* 25056 */ // Label 767: @25056
9095 /* 25056 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 768*/ GIMT_Encode4(25090), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 233 //
9096 /* 25063 */ // MIs[0] Operand 1
9097 /* 25063 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
9098 /* 25068 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9099 /* 25072 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9100 /* 25076 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9101 /* 25076 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I8x16),
9102 /* 25079 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9103 /* 25081 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9104 /* 25083 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9105 /* 25085 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9106 /* 25088 */ GIR_RootConstrainSelectedInstOperands,
9107 /* 25089 */ // GIR_Coverage, 233,
9108 /* 25089 */ GIR_EraseRootFromParent_Done,
9109 /* 25090 */ // Label 768: @25090
9110 /* 25090 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 769*/ GIMT_Encode4(25124), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 239 //
9111 /* 25097 */ // MIs[0] Operand 1
9112 /* 25097 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
9113 /* 25102 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9114 /* 25106 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9115 /* 25110 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9116 /* 25110 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I8x16),
9117 /* 25113 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9118 /* 25115 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9119 /* 25117 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9120 /* 25119 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9121 /* 25122 */ GIR_RootConstrainSelectedInstOperands,
9122 /* 25123 */ // GIR_Coverage, 239,
9123 /* 25123 */ GIR_EraseRootFromParent_Done,
9124 /* 25124 */ // Label 769: @25124
9125 /* 25124 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 770*/ GIMT_Encode4(25158), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 243 //
9126 /* 25131 */ // MIs[0] Operand 1
9127 /* 25131 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
9128 /* 25136 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9129 /* 25140 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9130 /* 25144 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9131 /* 25144 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I8x16),
9132 /* 25147 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9133 /* 25149 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9134 /* 25151 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9135 /* 25153 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9136 /* 25156 */ GIR_RootConstrainSelectedInstOperands,
9137 /* 25157 */ // GIR_Coverage, 243,
9138 /* 25157 */ GIR_EraseRootFromParent_Done,
9139 /* 25158 */ // Label 770: @25158
9140 /* 25158 */ GIM_Reject,
9141 /* 25159 */ // Label 760: @25159
9142 /* 25159 */ GIM_Reject,
9143 /* 25160 */ // Label 680: @25160
9144 /* 25160 */ GIM_Try, /*On fail goto*//*Label 771*/ GIMT_Encode4(25516),
9145 /* 25165 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
9146 /* 25168 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
9147 /* 25171 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9148 /* 25175 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 772*/ GIMT_Encode4(25209), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 196 //
9149 /* 25182 */ // MIs[0] Operand 1
9150 /* 25182 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
9151 /* 25187 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9152 /* 25191 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9153 /* 25195 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9154 /* 25195 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I16x8),
9155 /* 25198 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9156 /* 25200 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9157 /* 25202 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9158 /* 25204 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9159 /* 25207 */ GIR_RootConstrainSelectedInstOperands,
9160 /* 25208 */ // GIR_Coverage, 196,
9161 /* 25208 */ GIR_EraseRootFromParent_Done,
9162 /* 25209 */ // Label 772: @25209
9163 /* 25209 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 773*/ GIMT_Encode4(25243), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 203 //
9164 /* 25216 */ // MIs[0] Operand 1
9165 /* 25216 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
9166 /* 25221 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9167 /* 25225 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9168 /* 25229 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETNE:{ *:[Other] }) => (NE_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9169 /* 25229 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I16x8),
9170 /* 25232 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9171 /* 25234 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9172 /* 25236 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9173 /* 25238 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9174 /* 25241 */ GIR_RootConstrainSelectedInstOperands,
9175 /* 25242 */ // GIR_Coverage, 203,
9176 /* 25242 */ GIR_EraseRootFromParent_Done,
9177 /* 25243 */ // Label 773: @25243
9178 /* 25243 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 774*/ GIMT_Encode4(25277), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 210 //
9179 /* 25250 */ // MIs[0] Operand 1
9180 /* 25250 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
9181 /* 25255 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9182 /* 25259 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9183 /* 25263 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9184 /* 25263 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I16x8),
9185 /* 25266 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9186 /* 25268 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9187 /* 25270 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9188 /* 25272 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9189 /* 25275 */ GIR_RootConstrainSelectedInstOperands,
9190 /* 25276 */ // GIR_Coverage, 210,
9191 /* 25276 */ GIR_EraseRootFromParent_Done,
9192 /* 25277 */ // Label 774: @25277
9193 /* 25277 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 775*/ GIMT_Encode4(25311), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 214 //
9194 /* 25284 */ // MIs[0] Operand 1
9195 /* 25284 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
9196 /* 25289 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9197 /* 25293 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9198 /* 25297 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9199 /* 25297 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I16x8),
9200 /* 25300 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9201 /* 25302 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9202 /* 25304 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9203 /* 25306 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9204 /* 25309 */ GIR_RootConstrainSelectedInstOperands,
9205 /* 25310 */ // GIR_Coverage, 214,
9206 /* 25310 */ GIR_EraseRootFromParent_Done,
9207 /* 25311 */ // Label 775: @25311
9208 /* 25311 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 776*/ GIMT_Encode4(25345), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 220 //
9209 /* 25318 */ // MIs[0] Operand 1
9210 /* 25318 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
9211 /* 25323 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9212 /* 25327 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9213 /* 25331 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9214 /* 25331 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I16x8),
9215 /* 25334 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9216 /* 25336 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9217 /* 25338 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9218 /* 25340 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9219 /* 25343 */ GIR_RootConstrainSelectedInstOperands,
9220 /* 25344 */ // GIR_Coverage, 220,
9221 /* 25344 */ GIR_EraseRootFromParent_Done,
9222 /* 25345 */ // Label 776: @25345
9223 /* 25345 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 777*/ GIMT_Encode4(25379), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 224 //
9224 /* 25352 */ // MIs[0] Operand 1
9225 /* 25352 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
9226 /* 25357 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9227 /* 25361 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9228 /* 25365 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9229 /* 25365 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I16x8),
9230 /* 25368 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9231 /* 25370 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9232 /* 25372 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9233 /* 25374 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9234 /* 25377 */ GIR_RootConstrainSelectedInstOperands,
9235 /* 25378 */ // GIR_Coverage, 224,
9236 /* 25378 */ GIR_EraseRootFromParent_Done,
9237 /* 25379 */ // Label 777: @25379
9238 /* 25379 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 778*/ GIMT_Encode4(25413), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 230 //
9239 /* 25386 */ // MIs[0] Operand 1
9240 /* 25386 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
9241 /* 25391 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9242 /* 25395 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9243 /* 25399 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9244 /* 25399 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I16x8),
9245 /* 25402 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9246 /* 25404 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9247 /* 25406 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9248 /* 25408 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9249 /* 25411 */ GIR_RootConstrainSelectedInstOperands,
9250 /* 25412 */ // GIR_Coverage, 230,
9251 /* 25412 */ GIR_EraseRootFromParent_Done,
9252 /* 25413 */ // Label 778: @25413
9253 /* 25413 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 779*/ GIMT_Encode4(25447), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 234 //
9254 /* 25420 */ // MIs[0] Operand 1
9255 /* 25420 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
9256 /* 25425 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9257 /* 25429 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9258 /* 25433 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9259 /* 25433 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I16x8),
9260 /* 25436 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9261 /* 25438 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9262 /* 25440 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9263 /* 25442 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9264 /* 25445 */ GIR_RootConstrainSelectedInstOperands,
9265 /* 25446 */ // GIR_Coverage, 234,
9266 /* 25446 */ GIR_EraseRootFromParent_Done,
9267 /* 25447 */ // Label 779: @25447
9268 /* 25447 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 780*/ GIMT_Encode4(25481), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 240 //
9269 /* 25454 */ // MIs[0] Operand 1
9270 /* 25454 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
9271 /* 25459 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9272 /* 25463 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9273 /* 25467 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9274 /* 25467 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I16x8),
9275 /* 25470 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9276 /* 25472 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9277 /* 25474 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9278 /* 25476 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9279 /* 25479 */ GIR_RootConstrainSelectedInstOperands,
9280 /* 25480 */ // GIR_Coverage, 240,
9281 /* 25480 */ GIR_EraseRootFromParent_Done,
9282 /* 25481 */ // Label 780: @25481
9283 /* 25481 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 781*/ GIMT_Encode4(25515), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 244 //
9284 /* 25488 */ // MIs[0] Operand 1
9285 /* 25488 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
9286 /* 25493 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9287 /* 25497 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9288 /* 25501 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9289 /* 25501 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I16x8),
9290 /* 25504 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9291 /* 25506 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9292 /* 25508 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9293 /* 25510 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9294 /* 25513 */ GIR_RootConstrainSelectedInstOperands,
9295 /* 25514 */ // GIR_Coverage, 244,
9296 /* 25514 */ GIR_EraseRootFromParent_Done,
9297 /* 25515 */ // Label 781: @25515
9298 /* 25515 */ GIM_Reject,
9299 /* 25516 */ // Label 771: @25516
9300 /* 25516 */ GIM_Reject,
9301 /* 25517 */ // Label 681: @25517
9302 /* 25517 */ GIM_Try, /*On fail goto*//*Label 782*/ GIMT_Encode4(25873),
9303 /* 25522 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
9304 /* 25525 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
9305 /* 25528 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9306 /* 25532 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 783*/ GIMT_Encode4(25566), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 197 //
9307 /* 25539 */ // MIs[0] Operand 1
9308 /* 25539 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
9309 /* 25544 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9310 /* 25548 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9311 /* 25552 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9312 /* 25552 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I32x4),
9313 /* 25555 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9314 /* 25557 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9315 /* 25559 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9316 /* 25561 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9317 /* 25564 */ GIR_RootConstrainSelectedInstOperands,
9318 /* 25565 */ // GIR_Coverage, 197,
9319 /* 25565 */ GIR_EraseRootFromParent_Done,
9320 /* 25566 */ // Label 783: @25566
9321 /* 25566 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 784*/ GIMT_Encode4(25600), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 204 //
9322 /* 25573 */ // MIs[0] Operand 1
9323 /* 25573 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
9324 /* 25578 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9325 /* 25582 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9326 /* 25586 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETNE:{ *:[Other] }) => (NE_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9327 /* 25586 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I32x4),
9328 /* 25589 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9329 /* 25591 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9330 /* 25593 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9331 /* 25595 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9332 /* 25598 */ GIR_RootConstrainSelectedInstOperands,
9333 /* 25599 */ // GIR_Coverage, 204,
9334 /* 25599 */ GIR_EraseRootFromParent_Done,
9335 /* 25600 */ // Label 784: @25600
9336 /* 25600 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 785*/ GIMT_Encode4(25634), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 211 //
9337 /* 25607 */ // MIs[0] Operand 1
9338 /* 25607 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
9339 /* 25612 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9340 /* 25616 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9341 /* 25620 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9342 /* 25620 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I32x4),
9343 /* 25623 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9344 /* 25625 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9345 /* 25627 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9346 /* 25629 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9347 /* 25632 */ GIR_RootConstrainSelectedInstOperands,
9348 /* 25633 */ // GIR_Coverage, 211,
9349 /* 25633 */ GIR_EraseRootFromParent_Done,
9350 /* 25634 */ // Label 785: @25634
9351 /* 25634 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 786*/ GIMT_Encode4(25668), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 215 //
9352 /* 25641 */ // MIs[0] Operand 1
9353 /* 25641 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
9354 /* 25646 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9355 /* 25650 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9356 /* 25654 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9357 /* 25654 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I32x4),
9358 /* 25657 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9359 /* 25659 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9360 /* 25661 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9361 /* 25663 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9362 /* 25666 */ GIR_RootConstrainSelectedInstOperands,
9363 /* 25667 */ // GIR_Coverage, 215,
9364 /* 25667 */ GIR_EraseRootFromParent_Done,
9365 /* 25668 */ // Label 786: @25668
9366 /* 25668 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 787*/ GIMT_Encode4(25702), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 221 //
9367 /* 25675 */ // MIs[0] Operand 1
9368 /* 25675 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
9369 /* 25680 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9370 /* 25684 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9371 /* 25688 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9372 /* 25688 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I32x4),
9373 /* 25691 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9374 /* 25693 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9375 /* 25695 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9376 /* 25697 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9377 /* 25700 */ GIR_RootConstrainSelectedInstOperands,
9378 /* 25701 */ // GIR_Coverage, 221,
9379 /* 25701 */ GIR_EraseRootFromParent_Done,
9380 /* 25702 */ // Label 787: @25702
9381 /* 25702 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 788*/ GIMT_Encode4(25736), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 225 //
9382 /* 25709 */ // MIs[0] Operand 1
9383 /* 25709 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
9384 /* 25714 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9385 /* 25718 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9386 /* 25722 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9387 /* 25722 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I32x4),
9388 /* 25725 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9389 /* 25727 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9390 /* 25729 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9391 /* 25731 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9392 /* 25734 */ GIR_RootConstrainSelectedInstOperands,
9393 /* 25735 */ // GIR_Coverage, 225,
9394 /* 25735 */ GIR_EraseRootFromParent_Done,
9395 /* 25736 */ // Label 788: @25736
9396 /* 25736 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 789*/ GIMT_Encode4(25770), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 231 //
9397 /* 25743 */ // MIs[0] Operand 1
9398 /* 25743 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
9399 /* 25748 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9400 /* 25752 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9401 /* 25756 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9402 /* 25756 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I32x4),
9403 /* 25759 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9404 /* 25761 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9405 /* 25763 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9406 /* 25765 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9407 /* 25768 */ GIR_RootConstrainSelectedInstOperands,
9408 /* 25769 */ // GIR_Coverage, 231,
9409 /* 25769 */ GIR_EraseRootFromParent_Done,
9410 /* 25770 */ // Label 789: @25770
9411 /* 25770 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 790*/ GIMT_Encode4(25804), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 235 //
9412 /* 25777 */ // MIs[0] Operand 1
9413 /* 25777 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
9414 /* 25782 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9415 /* 25786 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9416 /* 25790 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9417 /* 25790 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I32x4),
9418 /* 25793 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9419 /* 25795 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9420 /* 25797 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9421 /* 25799 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9422 /* 25802 */ GIR_RootConstrainSelectedInstOperands,
9423 /* 25803 */ // GIR_Coverage, 235,
9424 /* 25803 */ GIR_EraseRootFromParent_Done,
9425 /* 25804 */ // Label 790: @25804
9426 /* 25804 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 791*/ GIMT_Encode4(25838), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 241 //
9427 /* 25811 */ // MIs[0] Operand 1
9428 /* 25811 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
9429 /* 25816 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9430 /* 25820 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9431 /* 25824 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9432 /* 25824 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I32x4),
9433 /* 25827 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9434 /* 25829 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9435 /* 25831 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9436 /* 25833 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9437 /* 25836 */ GIR_RootConstrainSelectedInstOperands,
9438 /* 25837 */ // GIR_Coverage, 241,
9439 /* 25837 */ GIR_EraseRootFromParent_Done,
9440 /* 25838 */ // Label 791: @25838
9441 /* 25838 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 792*/ GIMT_Encode4(25872), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 245 //
9442 /* 25845 */ // MIs[0] Operand 1
9443 /* 25845 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
9444 /* 25850 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9445 /* 25854 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9446 /* 25858 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9447 /* 25858 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I32x4),
9448 /* 25861 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9449 /* 25863 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9450 /* 25865 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9451 /* 25867 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9452 /* 25870 */ GIR_RootConstrainSelectedInstOperands,
9453 /* 25871 */ // GIR_Coverage, 245,
9454 /* 25871 */ GIR_EraseRootFromParent_Done,
9455 /* 25872 */ // Label 792: @25872
9456 /* 25872 */ GIM_Reject,
9457 /* 25873 */ // Label 782: @25873
9458 /* 25873 */ GIM_Reject,
9459 /* 25874 */ // Label 682: @25874
9460 /* 25874 */ GIM_Try, /*On fail goto*//*Label 793*/ GIMT_Encode4(26094),
9461 /* 25879 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
9462 /* 25882 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
9463 /* 25885 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9464 /* 25889 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 794*/ GIMT_Encode4(25923), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 198 //
9465 /* 25896 */ // MIs[0] Operand 1
9466 /* 25896 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
9467 /* 25901 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9468 /* 25905 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9469 /* 25909 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
9470 /* 25909 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I64x2),
9471 /* 25912 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9472 /* 25914 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9473 /* 25916 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9474 /* 25918 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9475 /* 25921 */ GIR_RootConstrainSelectedInstOperands,
9476 /* 25922 */ // GIR_Coverage, 198,
9477 /* 25922 */ GIR_EraseRootFromParent_Done,
9478 /* 25923 */ // Label 794: @25923
9479 /* 25923 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 795*/ GIMT_Encode4(25957), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 205 //
9480 /* 25930 */ // MIs[0] Operand 1
9481 /* 25930 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
9482 /* 25935 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9483 /* 25939 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9484 /* 25943 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETNE:{ *:[Other] }) => (NE_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
9485 /* 25943 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I64x2),
9486 /* 25946 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9487 /* 25948 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9488 /* 25950 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9489 /* 25952 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9490 /* 25955 */ GIR_RootConstrainSelectedInstOperands,
9491 /* 25956 */ // GIR_Coverage, 205,
9492 /* 25956 */ GIR_EraseRootFromParent_Done,
9493 /* 25957 */ // Label 795: @25957
9494 /* 25957 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 796*/ GIMT_Encode4(25991), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 212 //
9495 /* 25964 */ // MIs[0] Operand 1
9496 /* 25964 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
9497 /* 25969 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9498 /* 25973 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9499 /* 25977 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
9500 /* 25977 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I64x2),
9501 /* 25980 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9502 /* 25982 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9503 /* 25984 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9504 /* 25986 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9505 /* 25989 */ GIR_RootConstrainSelectedInstOperands,
9506 /* 25990 */ // GIR_Coverage, 212,
9507 /* 25990 */ GIR_EraseRootFromParent_Done,
9508 /* 25991 */ // Label 796: @25991
9509 /* 25991 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 797*/ GIMT_Encode4(26025), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 222 //
9510 /* 25998 */ // MIs[0] Operand 1
9511 /* 25998 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
9512 /* 26003 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9513 /* 26007 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9514 /* 26011 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
9515 /* 26011 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I64x2),
9516 /* 26014 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9517 /* 26016 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9518 /* 26018 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9519 /* 26020 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9520 /* 26023 */ GIR_RootConstrainSelectedInstOperands,
9521 /* 26024 */ // GIR_Coverage, 222,
9522 /* 26024 */ GIR_EraseRootFromParent_Done,
9523 /* 26025 */ // Label 797: @26025
9524 /* 26025 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 798*/ GIMT_Encode4(26059), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 232 //
9525 /* 26032 */ // MIs[0] Operand 1
9526 /* 26032 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
9527 /* 26037 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9528 /* 26041 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9529 /* 26045 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
9530 /* 26045 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I64x2),
9531 /* 26048 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9532 /* 26050 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9533 /* 26052 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9534 /* 26054 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9535 /* 26057 */ GIR_RootConstrainSelectedInstOperands,
9536 /* 26058 */ // GIR_Coverage, 232,
9537 /* 26058 */ GIR_EraseRootFromParent_Done,
9538 /* 26059 */ // Label 798: @26059
9539 /* 26059 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 799*/ GIMT_Encode4(26093), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 242 //
9540 /* 26066 */ // MIs[0] Operand 1
9541 /* 26066 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
9542 /* 26071 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9543 /* 26075 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9544 /* 26079 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
9545 /* 26079 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I64x2),
9546 /* 26082 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9547 /* 26084 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9548 /* 26086 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9549 /* 26088 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9550 /* 26091 */ GIR_RootConstrainSelectedInstOperands,
9551 /* 26092 */ // GIR_Coverage, 242,
9552 /* 26092 */ GIR_EraseRootFromParent_Done,
9553 /* 26093 */ // Label 799: @26093
9554 /* 26093 */ GIM_Reject,
9555 /* 26094 */ // Label 793: @26094
9556 /* 26094 */ GIM_Reject,
9557 /* 26095 */ // Label 683: @26095
9558 /* 26095 */ GIM_Reject,
9559 /* 26096 */ // Label 32: @26096
9560 /* 26096 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(14), /*)*//*default:*//*Label 804*/ GIMT_Encode4(27250),
9561 /* 26107 */ /*GILLT_i32*//*Label 800*/ GIMT_Encode4(26155), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
9562 /* 26143 */ /*GILLT_v8i16*//*Label 801*/ GIMT_Encode4(26587),
9563 /* 26147 */ /*GILLT_v4i32*//*Label 802*/ GIMT_Encode4(26808),
9564 /* 26151 */ /*GILLT_v2i64*//*Label 803*/ GIMT_Encode4(27029),
9565 /* 26155 */ // Label 800: @26155
9566 /* 26155 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 807*/ GIMT_Encode4(26586),
9567 /* 26166 */ /*GILLT_f32*//*Label 805*/ GIMT_Encode4(26174),
9568 /* 26170 */ /*GILLT_f64*//*Label 806*/ GIMT_Encode4(26380),
9569 /* 26174 */ // Label 805: @26174
9570 /* 26174 */ GIM_Try, /*On fail goto*//*Label 808*/ GIMT_Encode4(26379),
9571 /* 26179 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_f32,
9572 /* 26182 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9573 /* 26186 */ GIM_Try, /*On fail goto*//*Label 809*/ GIMT_Encode4(26218), // Rule ID 152 //
9574 /* 26191 */ // MIs[0] Operand 1
9575 /* 26191 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
9576 /* 26196 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9577 /* 26200 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9578 /* 26204 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9579 /* 26204 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F32),
9580 /* 26207 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9581 /* 26209 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9582 /* 26211 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9583 /* 26213 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9584 /* 26216 */ GIR_RootConstrainSelectedInstOperands,
9585 /* 26217 */ // GIR_Coverage, 152,
9586 /* 26217 */ GIR_EraseRootFromParent_Done,
9587 /* 26218 */ // Label 809: @26218
9588 /* 26218 */ GIM_Try, /*On fail goto*//*Label 810*/ GIMT_Encode4(26250), // Rule ID 154 //
9589 /* 26223 */ // MIs[0] Operand 1
9590 /* 26223 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
9591 /* 26228 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9592 /* 26232 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9593 /* 26236 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9594 /* 26236 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F32),
9595 /* 26239 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9596 /* 26241 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9597 /* 26243 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9598 /* 26245 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9599 /* 26248 */ GIR_RootConstrainSelectedInstOperands,
9600 /* 26249 */ // GIR_Coverage, 154,
9601 /* 26249 */ GIR_EraseRootFromParent_Done,
9602 /* 26250 */ // Label 810: @26250
9603 /* 26250 */ GIM_Try, /*On fail goto*//*Label 811*/ GIMT_Encode4(26282), // Rule ID 156 //
9604 /* 26255 */ // MIs[0] Operand 1
9605 /* 26255 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
9606 /* 26260 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9607 /* 26264 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9608 /* 26268 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9609 /* 26268 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F32),
9610 /* 26271 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9611 /* 26273 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9612 /* 26275 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9613 /* 26277 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9614 /* 26280 */ GIR_RootConstrainSelectedInstOperands,
9615 /* 26281 */ // GIR_Coverage, 156,
9616 /* 26281 */ GIR_EraseRootFromParent_Done,
9617 /* 26282 */ // Label 811: @26282
9618 /* 26282 */ GIM_Try, /*On fail goto*//*Label 812*/ GIMT_Encode4(26314), // Rule ID 158 //
9619 /* 26287 */ // MIs[0] Operand 1
9620 /* 26287 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
9621 /* 26292 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9622 /* 26296 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9623 /* 26300 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9624 /* 26300 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F32),
9625 /* 26303 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9626 /* 26305 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9627 /* 26307 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9628 /* 26309 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9629 /* 26312 */ GIR_RootConstrainSelectedInstOperands,
9630 /* 26313 */ // GIR_Coverage, 158,
9631 /* 26313 */ GIR_EraseRootFromParent_Done,
9632 /* 26314 */ // Label 812: @26314
9633 /* 26314 */ GIM_Try, /*On fail goto*//*Label 813*/ GIMT_Encode4(26346), // Rule ID 160 //
9634 /* 26319 */ // MIs[0] Operand 1
9635 /* 26319 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
9636 /* 26324 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9637 /* 26328 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9638 /* 26332 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9639 /* 26332 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F32),
9640 /* 26335 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9641 /* 26337 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9642 /* 26339 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9643 /* 26341 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9644 /* 26344 */ GIR_RootConstrainSelectedInstOperands,
9645 /* 26345 */ // GIR_Coverage, 160,
9646 /* 26345 */ GIR_EraseRootFromParent_Done,
9647 /* 26346 */ // Label 813: @26346
9648 /* 26346 */ GIM_Try, /*On fail goto*//*Label 814*/ GIMT_Encode4(26378), // Rule ID 162 //
9649 /* 26351 */ // MIs[0] Operand 1
9650 /* 26351 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
9651 /* 26356 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9652 /* 26360 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9653 /* 26364 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9654 /* 26364 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F32),
9655 /* 26367 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9656 /* 26369 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9657 /* 26371 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9658 /* 26373 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9659 /* 26376 */ GIR_RootConstrainSelectedInstOperands,
9660 /* 26377 */ // GIR_Coverage, 162,
9661 /* 26377 */ GIR_EraseRootFromParent_Done,
9662 /* 26378 */ // Label 814: @26378
9663 /* 26378 */ GIM_Reject,
9664 /* 26379 */ // Label 808: @26379
9665 /* 26379 */ GIM_Reject,
9666 /* 26380 */ // Label 806: @26380
9667 /* 26380 */ GIM_Try, /*On fail goto*//*Label 815*/ GIMT_Encode4(26585),
9668 /* 26385 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_f64,
9669 /* 26388 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9670 /* 26392 */ GIM_Try, /*On fail goto*//*Label 816*/ GIMT_Encode4(26424), // Rule ID 153 //
9671 /* 26397 */ // MIs[0] Operand 1
9672 /* 26397 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
9673 /* 26402 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9674 /* 26406 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9675 /* 26410 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9676 /* 26410 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F64),
9677 /* 26413 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9678 /* 26415 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9679 /* 26417 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9680 /* 26419 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9681 /* 26422 */ GIR_RootConstrainSelectedInstOperands,
9682 /* 26423 */ // GIR_Coverage, 153,
9683 /* 26423 */ GIR_EraseRootFromParent_Done,
9684 /* 26424 */ // Label 816: @26424
9685 /* 26424 */ GIM_Try, /*On fail goto*//*Label 817*/ GIMT_Encode4(26456), // Rule ID 155 //
9686 /* 26429 */ // MIs[0] Operand 1
9687 /* 26429 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
9688 /* 26434 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9689 /* 26438 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9690 /* 26442 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9691 /* 26442 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F64),
9692 /* 26445 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9693 /* 26447 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9694 /* 26449 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9695 /* 26451 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9696 /* 26454 */ GIR_RootConstrainSelectedInstOperands,
9697 /* 26455 */ // GIR_Coverage, 155,
9698 /* 26455 */ GIR_EraseRootFromParent_Done,
9699 /* 26456 */ // Label 817: @26456
9700 /* 26456 */ GIM_Try, /*On fail goto*//*Label 818*/ GIMT_Encode4(26488), // Rule ID 157 //
9701 /* 26461 */ // MIs[0] Operand 1
9702 /* 26461 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
9703 /* 26466 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9704 /* 26470 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9705 /* 26474 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9706 /* 26474 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F64),
9707 /* 26477 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9708 /* 26479 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9709 /* 26481 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9710 /* 26483 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9711 /* 26486 */ GIR_RootConstrainSelectedInstOperands,
9712 /* 26487 */ // GIR_Coverage, 157,
9713 /* 26487 */ GIR_EraseRootFromParent_Done,
9714 /* 26488 */ // Label 818: @26488
9715 /* 26488 */ GIM_Try, /*On fail goto*//*Label 819*/ GIMT_Encode4(26520), // Rule ID 159 //
9716 /* 26493 */ // MIs[0] Operand 1
9717 /* 26493 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
9718 /* 26498 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9719 /* 26502 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9720 /* 26506 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9721 /* 26506 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F64),
9722 /* 26509 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9723 /* 26511 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9724 /* 26513 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9725 /* 26515 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9726 /* 26518 */ GIR_RootConstrainSelectedInstOperands,
9727 /* 26519 */ // GIR_Coverage, 159,
9728 /* 26519 */ GIR_EraseRootFromParent_Done,
9729 /* 26520 */ // Label 819: @26520
9730 /* 26520 */ GIM_Try, /*On fail goto*//*Label 820*/ GIMT_Encode4(26552), // Rule ID 161 //
9731 /* 26525 */ // MIs[0] Operand 1
9732 /* 26525 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
9733 /* 26530 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9734 /* 26534 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9735 /* 26538 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9736 /* 26538 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F64),
9737 /* 26541 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9738 /* 26543 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9739 /* 26545 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9740 /* 26547 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9741 /* 26550 */ GIR_RootConstrainSelectedInstOperands,
9742 /* 26551 */ // GIR_Coverage, 161,
9743 /* 26551 */ GIR_EraseRootFromParent_Done,
9744 /* 26552 */ // Label 820: @26552
9745 /* 26552 */ GIM_Try, /*On fail goto*//*Label 821*/ GIMT_Encode4(26584), // Rule ID 163 //
9746 /* 26557 */ // MIs[0] Operand 1
9747 /* 26557 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
9748 /* 26562 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9749 /* 26566 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9750 /* 26570 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9751 /* 26570 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F64),
9752 /* 26573 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9753 /* 26575 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9754 /* 26577 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9755 /* 26579 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9756 /* 26582 */ GIR_RootConstrainSelectedInstOperands,
9757 /* 26583 */ // GIR_Coverage, 163,
9758 /* 26583 */ GIR_EraseRootFromParent_Done,
9759 /* 26584 */ // Label 821: @26584
9760 /* 26584 */ GIM_Reject,
9761 /* 26585 */ // Label 815: @26585
9762 /* 26585 */ GIM_Reject,
9763 /* 26586 */ // Label 807: @26586
9764 /* 26586 */ GIM_Reject,
9765 /* 26587 */ // Label 801: @26587
9766 /* 26587 */ GIM_Try, /*On fail goto*//*Label 822*/ GIMT_Encode4(26807),
9767 /* 26592 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
9768 /* 26595 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
9769 /* 26598 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9770 /* 26602 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 823*/ GIMT_Encode4(26636), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 201 //
9771 /* 26609 */ // MIs[0] Operand 1
9772 /* 26609 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
9773 /* 26614 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9774 /* 26618 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9775 /* 26622 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
9776 /* 26622 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F16x8),
9777 /* 26625 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9778 /* 26627 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9779 /* 26629 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9780 /* 26631 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9781 /* 26634 */ GIR_RootConstrainSelectedInstOperands,
9782 /* 26635 */ // GIR_Coverage, 201,
9783 /* 26635 */ GIR_EraseRootFromParent_Done,
9784 /* 26636 */ // Label 823: @26636
9785 /* 26636 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 824*/ GIMT_Encode4(26670), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 208 //
9786 /* 26643 */ // MIs[0] Operand 1
9787 /* 26643 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
9788 /* 26648 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9789 /* 26652 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9790 /* 26656 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
9791 /* 26656 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F16x8),
9792 /* 26659 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9793 /* 26661 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9794 /* 26663 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9795 /* 26665 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9796 /* 26668 */ GIR_RootConstrainSelectedInstOperands,
9797 /* 26669 */ // GIR_Coverage, 208,
9798 /* 26669 */ GIR_EraseRootFromParent_Done,
9799 /* 26670 */ // Label 824: @26670
9800 /* 26670 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 825*/ GIMT_Encode4(26704), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 218 //
9801 /* 26677 */ // MIs[0] Operand 1
9802 /* 26677 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
9803 /* 26682 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9804 /* 26686 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9805 /* 26690 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
9806 /* 26690 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F16x8),
9807 /* 26693 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9808 /* 26695 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9809 /* 26697 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9810 /* 26699 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9811 /* 26702 */ GIR_RootConstrainSelectedInstOperands,
9812 /* 26703 */ // GIR_Coverage, 218,
9813 /* 26703 */ GIR_EraseRootFromParent_Done,
9814 /* 26704 */ // Label 825: @26704
9815 /* 26704 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 826*/ GIMT_Encode4(26738), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 228 //
9816 /* 26711 */ // MIs[0] Operand 1
9817 /* 26711 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
9818 /* 26716 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9819 /* 26720 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9820 /* 26724 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
9821 /* 26724 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F16x8),
9822 /* 26727 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9823 /* 26729 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9824 /* 26731 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9825 /* 26733 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9826 /* 26736 */ GIR_RootConstrainSelectedInstOperands,
9827 /* 26737 */ // GIR_Coverage, 228,
9828 /* 26737 */ GIR_EraseRootFromParent_Done,
9829 /* 26738 */ // Label 826: @26738
9830 /* 26738 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 827*/ GIMT_Encode4(26772), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 238 //
9831 /* 26745 */ // MIs[0] Operand 1
9832 /* 26745 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
9833 /* 26750 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9834 /* 26754 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9835 /* 26758 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
9836 /* 26758 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F16x8),
9837 /* 26761 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9838 /* 26763 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9839 /* 26765 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9840 /* 26767 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9841 /* 26770 */ GIR_RootConstrainSelectedInstOperands,
9842 /* 26771 */ // GIR_Coverage, 238,
9843 /* 26771 */ GIR_EraseRootFromParent_Done,
9844 /* 26772 */ // Label 827: @26772
9845 /* 26772 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 828*/ GIMT_Encode4(26806), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 248 //
9846 /* 26779 */ // MIs[0] Operand 1
9847 /* 26779 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
9848 /* 26784 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9849 /* 26788 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9850 /* 26792 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
9851 /* 26792 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F16x8),
9852 /* 26795 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9853 /* 26797 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9854 /* 26799 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9855 /* 26801 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9856 /* 26804 */ GIR_RootConstrainSelectedInstOperands,
9857 /* 26805 */ // GIR_Coverage, 248,
9858 /* 26805 */ GIR_EraseRootFromParent_Done,
9859 /* 26806 */ // Label 828: @26806
9860 /* 26806 */ GIM_Reject,
9861 /* 26807 */ // Label 822: @26807
9862 /* 26807 */ GIM_Reject,
9863 /* 26808 */ // Label 802: @26808
9864 /* 26808 */ GIM_Try, /*On fail goto*//*Label 829*/ GIMT_Encode4(27028),
9865 /* 26813 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
9866 /* 26816 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
9867 /* 26819 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9868 /* 26823 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 830*/ GIMT_Encode4(26857), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 199 //
9869 /* 26830 */ // MIs[0] Operand 1
9870 /* 26830 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
9871 /* 26835 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9872 /* 26839 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9873 /* 26843 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
9874 /* 26843 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F32x4),
9875 /* 26846 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9876 /* 26848 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9877 /* 26850 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9878 /* 26852 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9879 /* 26855 */ GIR_RootConstrainSelectedInstOperands,
9880 /* 26856 */ // GIR_Coverage, 199,
9881 /* 26856 */ GIR_EraseRootFromParent_Done,
9882 /* 26857 */ // Label 830: @26857
9883 /* 26857 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 831*/ GIMT_Encode4(26891), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 206 //
9884 /* 26864 */ // MIs[0] Operand 1
9885 /* 26864 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
9886 /* 26869 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9887 /* 26873 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9888 /* 26877 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
9889 /* 26877 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F32x4),
9890 /* 26880 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9891 /* 26882 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9892 /* 26884 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9893 /* 26886 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9894 /* 26889 */ GIR_RootConstrainSelectedInstOperands,
9895 /* 26890 */ // GIR_Coverage, 206,
9896 /* 26890 */ GIR_EraseRootFromParent_Done,
9897 /* 26891 */ // Label 831: @26891
9898 /* 26891 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 832*/ GIMT_Encode4(26925), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 216 //
9899 /* 26898 */ // MIs[0] Operand 1
9900 /* 26898 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
9901 /* 26903 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9902 /* 26907 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9903 /* 26911 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
9904 /* 26911 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F32x4),
9905 /* 26914 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9906 /* 26916 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9907 /* 26918 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9908 /* 26920 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9909 /* 26923 */ GIR_RootConstrainSelectedInstOperands,
9910 /* 26924 */ // GIR_Coverage, 216,
9911 /* 26924 */ GIR_EraseRootFromParent_Done,
9912 /* 26925 */ // Label 832: @26925
9913 /* 26925 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 833*/ GIMT_Encode4(26959), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 226 //
9914 /* 26932 */ // MIs[0] Operand 1
9915 /* 26932 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
9916 /* 26937 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9917 /* 26941 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9918 /* 26945 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
9919 /* 26945 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F32x4),
9920 /* 26948 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9921 /* 26950 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9922 /* 26952 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9923 /* 26954 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9924 /* 26957 */ GIR_RootConstrainSelectedInstOperands,
9925 /* 26958 */ // GIR_Coverage, 226,
9926 /* 26958 */ GIR_EraseRootFromParent_Done,
9927 /* 26959 */ // Label 833: @26959
9928 /* 26959 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 834*/ GIMT_Encode4(26993), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 236 //
9929 /* 26966 */ // MIs[0] Operand 1
9930 /* 26966 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
9931 /* 26971 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9932 /* 26975 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9933 /* 26979 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
9934 /* 26979 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F32x4),
9935 /* 26982 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9936 /* 26984 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9937 /* 26986 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9938 /* 26988 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9939 /* 26991 */ GIR_RootConstrainSelectedInstOperands,
9940 /* 26992 */ // GIR_Coverage, 236,
9941 /* 26992 */ GIR_EraseRootFromParent_Done,
9942 /* 26993 */ // Label 834: @26993
9943 /* 26993 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 835*/ GIMT_Encode4(27027), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 246 //
9944 /* 27000 */ // MIs[0] Operand 1
9945 /* 27000 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
9946 /* 27005 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9947 /* 27009 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9948 /* 27013 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
9949 /* 27013 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F32x4),
9950 /* 27016 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9951 /* 27018 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9952 /* 27020 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9953 /* 27022 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9954 /* 27025 */ GIR_RootConstrainSelectedInstOperands,
9955 /* 27026 */ // GIR_Coverage, 246,
9956 /* 27026 */ GIR_EraseRootFromParent_Done,
9957 /* 27027 */ // Label 835: @27027
9958 /* 27027 */ GIM_Reject,
9959 /* 27028 */ // Label 829: @27028
9960 /* 27028 */ GIM_Reject,
9961 /* 27029 */ // Label 803: @27029
9962 /* 27029 */ GIM_Try, /*On fail goto*//*Label 836*/ GIMT_Encode4(27249),
9963 /* 27034 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
9964 /* 27037 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
9965 /* 27040 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9966 /* 27044 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 837*/ GIMT_Encode4(27078), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 200 //
9967 /* 27051 */ // MIs[0] Operand 1
9968 /* 27051 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
9969 /* 27056 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9970 /* 27060 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9971 /* 27064 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
9972 /* 27064 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F64x2),
9973 /* 27067 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9974 /* 27069 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9975 /* 27071 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9976 /* 27073 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9977 /* 27076 */ GIR_RootConstrainSelectedInstOperands,
9978 /* 27077 */ // GIR_Coverage, 200,
9979 /* 27077 */ GIR_EraseRootFromParent_Done,
9980 /* 27078 */ // Label 837: @27078
9981 /* 27078 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 838*/ GIMT_Encode4(27112), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 207 //
9982 /* 27085 */ // MIs[0] Operand 1
9983 /* 27085 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
9984 /* 27090 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9985 /* 27094 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9986 /* 27098 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
9987 /* 27098 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F64x2),
9988 /* 27101 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9989 /* 27103 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9990 /* 27105 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9991 /* 27107 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9992 /* 27110 */ GIR_RootConstrainSelectedInstOperands,
9993 /* 27111 */ // GIR_Coverage, 207,
9994 /* 27111 */ GIR_EraseRootFromParent_Done,
9995 /* 27112 */ // Label 838: @27112
9996 /* 27112 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 839*/ GIMT_Encode4(27146), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 217 //
9997 /* 27119 */ // MIs[0] Operand 1
9998 /* 27119 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
9999 /* 27124 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10000 /* 27128 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10001 /* 27132 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10002 /* 27132 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F64x2),
10003 /* 27135 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10004 /* 27137 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10005 /* 27139 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10006 /* 27141 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10007 /* 27144 */ GIR_RootConstrainSelectedInstOperands,
10008 /* 27145 */ // GIR_Coverage, 217,
10009 /* 27145 */ GIR_EraseRootFromParent_Done,
10010 /* 27146 */ // Label 839: @27146
10011 /* 27146 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 840*/ GIMT_Encode4(27180), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 227 //
10012 /* 27153 */ // MIs[0] Operand 1
10013 /* 27153 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
10014 /* 27158 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10015 /* 27162 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10016 /* 27166 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10017 /* 27166 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F64x2),
10018 /* 27169 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10019 /* 27171 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10020 /* 27173 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10021 /* 27175 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10022 /* 27178 */ GIR_RootConstrainSelectedInstOperands,
10023 /* 27179 */ // GIR_Coverage, 227,
10024 /* 27179 */ GIR_EraseRootFromParent_Done,
10025 /* 27180 */ // Label 840: @27180
10026 /* 27180 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 841*/ GIMT_Encode4(27214), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 237 //
10027 /* 27187 */ // MIs[0] Operand 1
10028 /* 27187 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
10029 /* 27192 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10030 /* 27196 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10031 /* 27200 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10032 /* 27200 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F64x2),
10033 /* 27203 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10034 /* 27205 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10035 /* 27207 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10036 /* 27209 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10037 /* 27212 */ GIR_RootConstrainSelectedInstOperands,
10038 /* 27213 */ // GIR_Coverage, 237,
10039 /* 27213 */ GIR_EraseRootFromParent_Done,
10040 /* 27214 */ // Label 841: @27214
10041 /* 27214 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 842*/ GIMT_Encode4(27248), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 247 //
10042 /* 27221 */ // MIs[0] Operand 1
10043 /* 27221 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
10044 /* 27226 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10045 /* 27230 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10046 /* 27234 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10047 /* 27234 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F64x2),
10048 /* 27237 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10049 /* 27239 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10050 /* 27241 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10051 /* 27243 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10052 /* 27246 */ GIR_RootConstrainSelectedInstOperands,
10053 /* 27247 */ // GIR_Coverage, 247,
10054 /* 27247 */ GIR_EraseRootFromParent_Done,
10055 /* 27248 */ // Label 842: @27248
10056 /* 27248 */ GIM_Reject,
10057 /* 27249 */ // Label 836: @27249
10058 /* 27249 */ GIM_Reject,
10059 /* 27250 */ // Label 804: @27250
10060 /* 27250 */ GIM_Reject,
10061 /* 27251 */ // Label 33: @27251
10062 /* 27251 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(17), /*)*//*default:*//*Label 854*/ GIMT_Encode4(32594),
10063 /* 27262 */ /*GILLT_i32*//*Label 843*/ GIMT_Encode4(27322),
10064 /* 27266 */ /*GILLT_i64*//*Label 844*/ GIMT_Encode4(27499),
10065 /* 27270 */ /*GILLT_f32*//*Label 845*/ GIMT_Encode4(27676),
10066 /* 27274 */ /*GILLT_f64*//*Label 846*/ GIMT_Encode4(27853), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
10067 /* 27294 */ /*GILLT_v16i8*//*Label 847*/ GIMT_Encode4(28030),
10068 /* 27298 */ /*GILLT_v8i16*//*Label 848*/ GIMT_Encode4(28370),
10069 /* 27302 */ /*GILLT_v4i32*//*Label 849*/ GIMT_Encode4(28912),
10070 /* 27306 */ /*GILLT_v2i64*//*Label 850*/ GIMT_Encode4(29642),
10071 /* 27310 */ /*GILLT_v8f16*//*Label 851*/ GIMT_Encode4(30376),
10072 /* 27314 */ /*GILLT_v4f32*//*Label 852*/ GIMT_Encode4(30934),
10073 /* 27318 */ /*GILLT_v2f64*//*Label 853*/ GIMT_Encode4(31762),
10074 /* 27322 */ // Label 843: @27322
10075 /* 27322 */ GIM_Try, /*On fail goto*//*Label 855*/ GIMT_Encode4(27498),
10076 /* 27327 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
10077 /* 27330 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
10078 /* 27333 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
10079 /* 27336 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10080 /* 27340 */ GIM_Try, /*On fail goto*//*Label 856*/ GIMT_Encode4(27464),
10081 /* 27345 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10082 /* 27349 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10083 /* 27353 */ GIM_Try, /*On fail goto*//*Label 857*/ GIMT_Encode4(27408), // Rule ID 669 //
10084 /* 27358 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10085 /* 27362 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10086 /* 27366 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10087 /* 27370 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
10088 /* 27374 */ // MIs[1] Operand 1
10089 /* 27374 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10090 /* 27379 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10091 /* 27384 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10092 /* 27388 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10093 /* 27390 */ // (select:{ *:[i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$cond)
10094 /* 27390 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
10095 /* 27393 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10096 /* 27395 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10097 /* 27397 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10098 /* 27399 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10099 /* 27403 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10100 /* 27406 */ GIR_RootConstrainSelectedInstOperands,
10101 /* 27407 */ // GIR_Coverage, 669,
10102 /* 27407 */ GIR_EraseRootFromParent_Done,
10103 /* 27408 */ // Label 857: @27408
10104 /* 27408 */ GIM_Try, /*On fail goto*//*Label 858*/ GIMT_Encode4(27463), // Rule ID 671 //
10105 /* 27413 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10106 /* 27417 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10107 /* 27421 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10108 /* 27425 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
10109 /* 27429 */ // MIs[1] Operand 1
10110 /* 27429 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10111 /* 27434 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10112 /* 27439 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10113 /* 27443 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10114 /* 27445 */ // (select:{ *:[i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$cond)
10115 /* 27445 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
10116 /* 27448 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10117 /* 27450 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10118 /* 27452 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10119 /* 27454 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10120 /* 27458 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10121 /* 27461 */ GIR_RootConstrainSelectedInstOperands,
10122 /* 27462 */ // GIR_Coverage, 671,
10123 /* 27462 */ GIR_EraseRootFromParent_Done,
10124 /* 27463 */ // Label 858: @27463
10125 /* 27463 */ GIM_Reject,
10126 /* 27464 */ // Label 856: @27464
10127 /* 27464 */ GIM_Try, /*On fail goto*//*Label 859*/ GIMT_Encode4(27497), // Rule ID 122 //
10128 /* 27469 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10129 /* 27473 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10130 /* 27477 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10131 /* 27481 */ // (select:{ *:[i32] } I32:{ *:[i32] }:$cond, I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$cond)
10132 /* 27481 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
10133 /* 27484 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10134 /* 27486 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10135 /* 27488 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10136 /* 27490 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
10137 /* 27492 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10138 /* 27495 */ GIR_RootConstrainSelectedInstOperands,
10139 /* 27496 */ // GIR_Coverage, 122,
10140 /* 27496 */ GIR_EraseRootFromParent_Done,
10141 /* 27497 */ // Label 859: @27497
10142 /* 27497 */ GIM_Reject,
10143 /* 27498 */ // Label 855: @27498
10144 /* 27498 */ GIM_Reject,
10145 /* 27499 */ // Label 844: @27499
10146 /* 27499 */ GIM_Try, /*On fail goto*//*Label 860*/ GIMT_Encode4(27675),
10147 /* 27504 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
10148 /* 27507 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
10149 /* 27510 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i64,
10150 /* 27513 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10151 /* 27517 */ GIM_Try, /*On fail goto*//*Label 861*/ GIMT_Encode4(27641),
10152 /* 27522 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10153 /* 27526 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10154 /* 27530 */ GIM_Try, /*On fail goto*//*Label 862*/ GIMT_Encode4(27585), // Rule ID 670 //
10155 /* 27535 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10156 /* 27539 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10157 /* 27543 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10158 /* 27547 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
10159 /* 27551 */ // MIs[1] Operand 1
10160 /* 27551 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10161 /* 27556 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10162 /* 27561 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10163 /* 27565 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10164 /* 27567 */ // (select:{ *:[i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, I32:{ *:[i32] }:$cond)
10165 /* 27567 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
10166 /* 27570 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10167 /* 27572 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10168 /* 27574 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10169 /* 27576 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10170 /* 27580 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10171 /* 27583 */ GIR_RootConstrainSelectedInstOperands,
10172 /* 27584 */ // GIR_Coverage, 670,
10173 /* 27584 */ GIR_EraseRootFromParent_Done,
10174 /* 27585 */ // Label 862: @27585
10175 /* 27585 */ GIM_Try, /*On fail goto*//*Label 863*/ GIMT_Encode4(27640), // Rule ID 672 //
10176 /* 27590 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10177 /* 27594 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10178 /* 27598 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10179 /* 27602 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
10180 /* 27606 */ // MIs[1] Operand 1
10181 /* 27606 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10182 /* 27611 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10183 /* 27616 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10184 /* 27620 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10185 /* 27622 */ // (select:{ *:[i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$rhs, I64:{ *:[i64] }:$lhs, I32:{ *:[i32] }:$cond)
10186 /* 27622 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
10187 /* 27625 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10188 /* 27627 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10189 /* 27629 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10190 /* 27631 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10191 /* 27635 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10192 /* 27638 */ GIR_RootConstrainSelectedInstOperands,
10193 /* 27639 */ // GIR_Coverage, 672,
10194 /* 27639 */ GIR_EraseRootFromParent_Done,
10195 /* 27640 */ // Label 863: @27640
10196 /* 27640 */ GIM_Reject,
10197 /* 27641 */ // Label 861: @27641
10198 /* 27641 */ GIM_Try, /*On fail goto*//*Label 864*/ GIMT_Encode4(27674), // Rule ID 123 //
10199 /* 27646 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10200 /* 27650 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10201 /* 27654 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10202 /* 27658 */ // (select:{ *:[i64] } I32:{ *:[i32] }:$cond, I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, I32:{ *:[i32] }:$cond)
10203 /* 27658 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
10204 /* 27661 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10205 /* 27663 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10206 /* 27665 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10207 /* 27667 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
10208 /* 27669 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10209 /* 27672 */ GIR_RootConstrainSelectedInstOperands,
10210 /* 27673 */ // GIR_Coverage, 123,
10211 /* 27673 */ GIR_EraseRootFromParent_Done,
10212 /* 27674 */ // Label 864: @27674
10213 /* 27674 */ GIM_Reject,
10214 /* 27675 */ // Label 860: @27675
10215 /* 27675 */ GIM_Reject,
10216 /* 27676 */ // Label 845: @27676
10217 /* 27676 */ GIM_Try, /*On fail goto*//*Label 865*/ GIMT_Encode4(27852),
10218 /* 27681 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
10219 /* 27684 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
10220 /* 27687 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_f32,
10221 /* 27690 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
10222 /* 27694 */ GIM_Try, /*On fail goto*//*Label 866*/ GIMT_Encode4(27818),
10223 /* 27699 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
10224 /* 27703 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
10225 /* 27707 */ GIM_Try, /*On fail goto*//*Label 867*/ GIMT_Encode4(27762), // Rule ID 695 //
10226 /* 27712 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10227 /* 27716 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10228 /* 27720 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10229 /* 27724 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
10230 /* 27728 */ // MIs[1] Operand 1
10231 /* 27728 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10232 /* 27733 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10233 /* 27738 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10234 /* 27742 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10235 /* 27744 */ // (select:{ *:[f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SELECT_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, I32:{ *:[i32] }:$cond)
10236 /* 27744 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F32),
10237 /* 27747 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10238 /* 27749 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10239 /* 27751 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10240 /* 27753 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10241 /* 27757 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10242 /* 27760 */ GIR_RootConstrainSelectedInstOperands,
10243 /* 27761 */ // GIR_Coverage, 695,
10244 /* 27761 */ GIR_EraseRootFromParent_Done,
10245 /* 27762 */ // Label 867: @27762
10246 /* 27762 */ GIM_Try, /*On fail goto*//*Label 868*/ GIMT_Encode4(27817), // Rule ID 697 //
10247 /* 27767 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10248 /* 27771 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10249 /* 27775 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10250 /* 27779 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
10251 /* 27783 */ // MIs[1] Operand 1
10252 /* 27783 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10253 /* 27788 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10254 /* 27793 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10255 /* 27797 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10256 /* 27799 */ // (select:{ *:[f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SELECT_F32:{ *:[f32] } F32:{ *:[f32] }:$rhs, F32:{ *:[f32] }:$lhs, I32:{ *:[i32] }:$cond)
10257 /* 27799 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F32),
10258 /* 27802 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10259 /* 27804 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10260 /* 27806 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10261 /* 27808 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10262 /* 27812 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10263 /* 27815 */ GIR_RootConstrainSelectedInstOperands,
10264 /* 27816 */ // GIR_Coverage, 697,
10265 /* 27816 */ GIR_EraseRootFromParent_Done,
10266 /* 27817 */ // Label 868: @27817
10267 /* 27817 */ GIM_Reject,
10268 /* 27818 */ // Label 866: @27818
10269 /* 27818 */ GIM_Try, /*On fail goto*//*Label 869*/ GIMT_Encode4(27851), // Rule ID 164 //
10270 /* 27823 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10271 /* 27827 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
10272 /* 27831 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
10273 /* 27835 */ // (select:{ *:[f32] } I32:{ *:[i32] }:$cond, F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SELECT_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, I32:{ *:[i32] }:$cond)
10274 /* 27835 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F32),
10275 /* 27838 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10276 /* 27840 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10277 /* 27842 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10278 /* 27844 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
10279 /* 27846 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10280 /* 27849 */ GIR_RootConstrainSelectedInstOperands,
10281 /* 27850 */ // GIR_Coverage, 164,
10282 /* 27850 */ GIR_EraseRootFromParent_Done,
10283 /* 27851 */ // Label 869: @27851
10284 /* 27851 */ GIM_Reject,
10285 /* 27852 */ // Label 865: @27852
10286 /* 27852 */ GIM_Reject,
10287 /* 27853 */ // Label 846: @27853
10288 /* 27853 */ GIM_Try, /*On fail goto*//*Label 870*/ GIMT_Encode4(28029),
10289 /* 27858 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
10290 /* 27861 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
10291 /* 27864 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_f64,
10292 /* 27867 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10293 /* 27871 */ GIM_Try, /*On fail goto*//*Label 871*/ GIMT_Encode4(27995),
10294 /* 27876 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10295 /* 27880 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10296 /* 27884 */ GIM_Try, /*On fail goto*//*Label 872*/ GIMT_Encode4(27939), // Rule ID 696 //
10297 /* 27889 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10298 /* 27893 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10299 /* 27897 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10300 /* 27901 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
10301 /* 27905 */ // MIs[1] Operand 1
10302 /* 27905 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10303 /* 27910 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10304 /* 27915 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10305 /* 27919 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10306 /* 27921 */ // (select:{ *:[f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SELECT_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, I32:{ *:[i32] }:$cond)
10307 /* 27921 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F64),
10308 /* 27924 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10309 /* 27926 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10310 /* 27928 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10311 /* 27930 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10312 /* 27934 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10313 /* 27937 */ GIR_RootConstrainSelectedInstOperands,
10314 /* 27938 */ // GIR_Coverage, 696,
10315 /* 27938 */ GIR_EraseRootFromParent_Done,
10316 /* 27939 */ // Label 872: @27939
10317 /* 27939 */ GIM_Try, /*On fail goto*//*Label 873*/ GIMT_Encode4(27994), // Rule ID 698 //
10318 /* 27944 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10319 /* 27948 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10320 /* 27952 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10321 /* 27956 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
10322 /* 27960 */ // MIs[1] Operand 1
10323 /* 27960 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10324 /* 27965 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10325 /* 27970 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10326 /* 27974 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10327 /* 27976 */ // (select:{ *:[f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SELECT_F64:{ *:[f64] } F64:{ *:[f64] }:$rhs, F64:{ *:[f64] }:$lhs, I32:{ *:[i32] }:$cond)
10328 /* 27976 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F64),
10329 /* 27979 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10330 /* 27981 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10331 /* 27983 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10332 /* 27985 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10333 /* 27989 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10334 /* 27992 */ GIR_RootConstrainSelectedInstOperands,
10335 /* 27993 */ // GIR_Coverage, 698,
10336 /* 27993 */ GIR_EraseRootFromParent_Done,
10337 /* 27994 */ // Label 873: @27994
10338 /* 27994 */ GIM_Reject,
10339 /* 27995 */ // Label 871: @27995
10340 /* 27995 */ GIM_Try, /*On fail goto*//*Label 874*/ GIMT_Encode4(28028), // Rule ID 165 //
10341 /* 28000 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10342 /* 28004 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10343 /* 28008 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10344 /* 28012 */ // (select:{ *:[f64] } I32:{ *:[i32] }:$cond, F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SELECT_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, I32:{ *:[i32] }:$cond)
10345 /* 28012 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F64),
10346 /* 28015 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10347 /* 28017 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10348 /* 28019 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10349 /* 28021 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
10350 /* 28023 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10351 /* 28026 */ GIR_RootConstrainSelectedInstOperands,
10352 /* 28027 */ // GIR_Coverage, 165,
10353 /* 28027 */ GIR_EraseRootFromParent_Done,
10354 /* 28028 */ // Label 874: @28028
10355 /* 28028 */ GIM_Reject,
10356 /* 28029 */ // Label 870: @28029
10357 /* 28029 */ GIM_Reject,
10358 /* 28030 */ // Label 847: @28030
10359 /* 28030 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(11), /*)*//*default:*//*Label 877*/ GIMT_Encode4(28369),
10360 /* 28041 */ /*GILLT_i32*//*Label 875*/ GIMT_Encode4(28077), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
10361 /* 28073 */ /*GILLT_v16i8*//*Label 876*/ GIMT_Encode4(28251),
10362 /* 28077 */ // Label 875: @28077
10363 /* 28077 */ GIM_Try, /*On fail goto*//*Label 878*/ GIMT_Encode4(28250),
10364 /* 28082 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
10365 /* 28085 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
10366 /* 28088 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10367 /* 28092 */ GIM_Try, /*On fail goto*//*Label 879*/ GIMT_Encode4(28216),
10368 /* 28097 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10369 /* 28101 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10370 /* 28105 */ GIM_Try, /*On fail goto*//*Label 880*/ GIMT_Encode4(28160), // Rule ID 1107 //
10371 /* 28110 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10372 /* 28114 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10373 /* 28118 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10374 /* 28122 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
10375 /* 28126 */ // MIs[1] Operand 1
10376 /* 28126 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10377 /* 28131 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10378 /* 28136 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10379 /* 28140 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10380 /* 28142 */ // (select:{ *:[v16i8] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SELECT_V128:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs, ?:{ *:[i32] }:$cond)
10381 /* 28142 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10382 /* 28145 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10383 /* 28147 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10384 /* 28149 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10385 /* 28151 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10386 /* 28155 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10387 /* 28158 */ GIR_RootConstrainSelectedInstOperands,
10388 /* 28159 */ // GIR_Coverage, 1107,
10389 /* 28159 */ GIR_EraseRootFromParent_Done,
10390 /* 28160 */ // Label 880: @28160
10391 /* 28160 */ GIM_Try, /*On fail goto*//*Label 881*/ GIMT_Encode4(28215), // Rule ID 1108 //
10392 /* 28165 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10393 /* 28169 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10394 /* 28173 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10395 /* 28177 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
10396 /* 28181 */ // MIs[1] Operand 1
10397 /* 28181 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10398 /* 28186 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10399 /* 28191 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10400 /* 28195 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10401 /* 28197 */ // (select:{ *:[v16i8] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SELECT_V128:{ *:[v16i8] } ?:{ *:[v16i8] }:$rhs, ?:{ *:[v16i8] }:$lhs, ?:{ *:[i32] }:$cond)
10402 /* 28197 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10403 /* 28200 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10404 /* 28202 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10405 /* 28204 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10406 /* 28206 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10407 /* 28210 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10408 /* 28213 */ GIR_RootConstrainSelectedInstOperands,
10409 /* 28214 */ // GIR_Coverage, 1108,
10410 /* 28214 */ GIR_EraseRootFromParent_Done,
10411 /* 28215 */ // Label 881: @28215
10412 /* 28215 */ GIM_Reject,
10413 /* 28216 */ // Label 879: @28216
10414 /* 28216 */ GIM_Try, /*On fail goto*//*Label 882*/ GIMT_Encode4(28249), // Rule ID 1106 //
10415 /* 28221 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10416 /* 28225 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10417 /* 28229 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10418 /* 28233 */ // (select:{ *:[v16i8] } I32:{ *:[i32] }:$cond, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SELECT_V128:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs, ?:{ *:[i32] }:$cond)
10419 /* 28233 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10420 /* 28236 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10421 /* 28238 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10422 /* 28240 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10423 /* 28242 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
10424 /* 28244 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10425 /* 28247 */ GIR_RootConstrainSelectedInstOperands,
10426 /* 28248 */ // GIR_Coverage, 1106,
10427 /* 28248 */ GIR_EraseRootFromParent_Done,
10428 /* 28249 */ // Label 882: @28249
10429 /* 28249 */ GIM_Reject,
10430 /* 28250 */ // Label 878: @28250
10431 /* 28250 */ GIM_Reject,
10432 /* 28251 */ // Label 876: @28251
10433 /* 28251 */ GIM_Try, /*On fail goto*//*Label 883*/ GIMT_Encode4(28368),
10434 /* 28256 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
10435 /* 28259 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
10436 /* 28262 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10437 /* 28266 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10438 /* 28270 */ GIM_Try, /*On fail goto*//*Label 884*/ GIMT_Encode4(28338), // Rule ID 1096 //
10439 /* 28275 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10440 /* 28279 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
10441 /* 28283 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
10442 /* 28287 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
10443 /* 28291 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10444 /* 28296 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10445 /* 28300 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
10446 /* 28306 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
10447 /* 28308 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
10448 /* 28312 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
10449 /* 28318 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
10450 /* 28320 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10451 /* 28322 */ // (vselect:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$x, immAllOnesV:{ *:[v16i8] }), immAllZerosV:{ *:[v16i8] }) => (ANDNOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$c, ?:{ *:[v16i8] }:$x)
10452 /* 28322 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
10453 /* 28325 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10454 /* 28327 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
10455 /* 28329 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // x
10456 /* 28333 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10457 /* 28336 */ GIR_RootConstrainSelectedInstOperands,
10458 /* 28337 */ // GIR_Coverage, 1096,
10459 /* 28337 */ GIR_EraseRootFromParent_Done,
10460 /* 28338 */ // Label 884: @28338
10461 /* 28338 */ GIM_Try, /*On fail goto*//*Label 885*/ GIMT_Encode4(28367), // Rule ID 1100 //
10462 /* 28343 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10463 /* 28347 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10464 /* 28351 */ // (vselect:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
10465 /* 28351 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
10466 /* 28354 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10467 /* 28356 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
10468 /* 28358 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
10469 /* 28360 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
10470 /* 28362 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10471 /* 28365 */ GIR_RootConstrainSelectedInstOperands,
10472 /* 28366 */ // GIR_Coverage, 1100,
10473 /* 28366 */ GIR_EraseRootFromParent_Done,
10474 /* 28367 */ // Label 885: @28367
10475 /* 28367 */ GIM_Reject,
10476 /* 28368 */ // Label 883: @28368
10477 /* 28368 */ GIM_Reject,
10478 /* 28369 */ // Label 877: @28369
10479 /* 28369 */ GIM_Reject,
10480 /* 28370 */ // Label 848: @28370
10481 /* 28370 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(12), /*)*//*default:*//*Label 888*/ GIMT_Encode4(28911),
10482 /* 28381 */ /*GILLT_i32*//*Label 886*/ GIMT_Encode4(28421), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
10483 /* 28417 */ /*GILLT_v8i16*//*Label 887*/ GIMT_Encode4(28595),
10484 /* 28421 */ // Label 886: @28421
10485 /* 28421 */ GIM_Try, /*On fail goto*//*Label 889*/ GIMT_Encode4(28594),
10486 /* 28426 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
10487 /* 28429 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
10488 /* 28432 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10489 /* 28436 */ GIM_Try, /*On fail goto*//*Label 890*/ GIMT_Encode4(28560),
10490 /* 28441 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10491 /* 28445 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10492 /* 28449 */ GIM_Try, /*On fail goto*//*Label 891*/ GIMT_Encode4(28504), // Rule ID 1110 //
10493 /* 28454 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10494 /* 28458 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10495 /* 28462 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10496 /* 28466 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
10497 /* 28470 */ // MIs[1] Operand 1
10498 /* 28470 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10499 /* 28475 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10500 /* 28480 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10501 /* 28484 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10502 /* 28486 */ // (select:{ *:[v8i16] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SELECT_V128:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs, ?:{ *:[i32] }:$cond)
10503 /* 28486 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10504 /* 28489 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10505 /* 28491 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10506 /* 28493 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10507 /* 28495 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10508 /* 28499 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10509 /* 28502 */ GIR_RootConstrainSelectedInstOperands,
10510 /* 28503 */ // GIR_Coverage, 1110,
10511 /* 28503 */ GIR_EraseRootFromParent_Done,
10512 /* 28504 */ // Label 891: @28504
10513 /* 28504 */ GIM_Try, /*On fail goto*//*Label 892*/ GIMT_Encode4(28559), // Rule ID 1111 //
10514 /* 28509 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10515 /* 28513 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10516 /* 28517 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10517 /* 28521 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
10518 /* 28525 */ // MIs[1] Operand 1
10519 /* 28525 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10520 /* 28530 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10521 /* 28535 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10522 /* 28539 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10523 /* 28541 */ // (select:{ *:[v8i16] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SELECT_V128:{ *:[v8i16] } ?:{ *:[v8i16] }:$rhs, ?:{ *:[v8i16] }:$lhs, ?:{ *:[i32] }:$cond)
10524 /* 28541 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10525 /* 28544 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10526 /* 28546 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10527 /* 28548 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10528 /* 28550 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10529 /* 28554 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10530 /* 28557 */ GIR_RootConstrainSelectedInstOperands,
10531 /* 28558 */ // GIR_Coverage, 1111,
10532 /* 28558 */ GIR_EraseRootFromParent_Done,
10533 /* 28559 */ // Label 892: @28559
10534 /* 28559 */ GIM_Reject,
10535 /* 28560 */ // Label 890: @28560
10536 /* 28560 */ GIM_Try, /*On fail goto*//*Label 893*/ GIMT_Encode4(28593), // Rule ID 1109 //
10537 /* 28565 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10538 /* 28569 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10539 /* 28573 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10540 /* 28577 */ // (select:{ *:[v8i16] } I32:{ *:[i32] }:$cond, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SELECT_V128:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs, ?:{ *:[i32] }:$cond)
10541 /* 28577 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10542 /* 28580 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10543 /* 28582 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10544 /* 28584 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10545 /* 28586 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
10546 /* 28588 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10547 /* 28591 */ GIR_RootConstrainSelectedInstOperands,
10548 /* 28592 */ // GIR_Coverage, 1109,
10549 /* 28592 */ GIR_EraseRootFromParent_Done,
10550 /* 28593 */ // Label 893: @28593
10551 /* 28593 */ GIM_Reject,
10552 /* 28594 */ // Label 889: @28594
10553 /* 28594 */ GIM_Reject,
10554 /* 28595 */ // Label 887: @28595
10555 /* 28595 */ GIM_Try, /*On fail goto*//*Label 894*/ GIMT_Encode4(28677), // Rule ID 1097 //
10556 /* 28600 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
10557 /* 28603 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
10558 /* 28606 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10559 /* 28610 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10560 /* 28614 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10561 /* 28618 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
10562 /* 28622 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
10563 /* 28626 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
10564 /* 28630 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10565 /* 28635 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10566 /* 28639 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
10567 /* 28645 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
10568 /* 28647 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
10569 /* 28651 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
10570 /* 28657 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
10571 /* 28659 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10572 /* 28661 */ // (vselect:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$x, immAllOnesV:{ *:[v8i16] }), immAllZerosV:{ *:[v8i16] }) => (ANDNOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$c, ?:{ *:[v8i16] }:$x)
10573 /* 28661 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
10574 /* 28664 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10575 /* 28666 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
10576 /* 28668 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // x
10577 /* 28672 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10578 /* 28675 */ GIR_RootConstrainSelectedInstOperands,
10579 /* 28676 */ // GIR_Coverage, 1097,
10580 /* 28676 */ GIR_EraseRootFromParent_Done,
10581 /* 28677 */ // Label 894: @28677
10582 /* 28677 */ GIM_Try, /*On fail goto*//*Label 895*/ GIMT_Encode4(28867),
10583 /* 28682 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10584 /* 28686 */ GIM_Try, /*On fail goto*//*Label 896*/ GIMT_Encode4(28776), // Rule ID 1199 //
10585 /* 28691 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10586 /* 28695 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10587 /* 28699 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8f16,
10588 /* 28703 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8f16,
10589 /* 28707 */ // MIs[1] Operand 1
10590 /* 28707 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10591 /* 28712 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10592 /* 28716 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
10593 /* 28720 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
10594 /* 28724 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10595 /* 28729 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
10596 /* 28733 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
10597 /* 28737 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
10598 /* 28741 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10599 /* 28746 */ // MIs[0] rhs
10600 /* 28746 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
10601 /* 28751 */ // MIs[0] lhs
10602 /* 28751 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
10603 /* 28756 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10604 /* 28758 */ // (vselect:{ *:[v8i16] } (setcc:{ *:[v8i16] } (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$rhs), (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v8i16] }:$rhs, V128:{ *:[v8i16] }:$lhs) => (PMIN_F16x8:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
10605 /* 28758 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
10606 /* 28761 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10607 /* 28763 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
10608 /* 28767 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
10609 /* 28771 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10610 /* 28774 */ GIR_RootConstrainSelectedInstOperands,
10611 /* 28775 */ // GIR_Coverage, 1199,
10612 /* 28775 */ GIR_EraseRootFromParent_Done,
10613 /* 28776 */ // Label 896: @28776
10614 /* 28776 */ GIM_Try, /*On fail goto*//*Label 897*/ GIMT_Encode4(28866), // Rule ID 1200 //
10615 /* 28781 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10616 /* 28785 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10617 /* 28789 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8f16,
10618 /* 28793 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8f16,
10619 /* 28797 */ // MIs[1] Operand 1
10620 /* 28797 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10621 /* 28802 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10622 /* 28806 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
10623 /* 28810 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
10624 /* 28814 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10625 /* 28819 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
10626 /* 28823 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
10627 /* 28827 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
10628 /* 28831 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10629 /* 28836 */ // MIs[0] rhs
10630 /* 28836 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
10631 /* 28841 */ // MIs[0] lhs
10632 /* 28841 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
10633 /* 28846 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10634 /* 28848 */ // (vselect:{ *:[v8i16] } (setcc:{ *:[v8i16] } (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$lhs), (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v8i16] }:$rhs, V128:{ *:[v8i16] }:$lhs) => (PMAX_F16x8:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
10635 /* 28848 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
10636 /* 28851 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10637 /* 28853 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
10638 /* 28857 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
10639 /* 28861 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10640 /* 28864 */ GIR_RootConstrainSelectedInstOperands,
10641 /* 28865 */ // GIR_Coverage, 1200,
10642 /* 28865 */ GIR_EraseRootFromParent_Done,
10643 /* 28866 */ // Label 897: @28866
10644 /* 28866 */ GIM_Reject,
10645 /* 28867 */ // Label 895: @28867
10646 /* 28867 */ GIM_Try, /*On fail goto*//*Label 898*/ GIMT_Encode4(28910), // Rule ID 1101 //
10647 /* 28872 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
10648 /* 28875 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
10649 /* 28878 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10650 /* 28882 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10651 /* 28886 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10652 /* 28890 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10653 /* 28894 */ // (vselect:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
10654 /* 28894 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
10655 /* 28897 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10656 /* 28899 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
10657 /* 28901 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
10658 /* 28903 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
10659 /* 28905 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10660 /* 28908 */ GIR_RootConstrainSelectedInstOperands,
10661 /* 28909 */ // GIR_Coverage, 1101,
10662 /* 28909 */ GIR_EraseRootFromParent_Done,
10663 /* 28910 */ // Label 898: @28910
10664 /* 28910 */ GIM_Reject,
10665 /* 28911 */ // Label 888: @28911
10666 /* 28911 */ GIM_Reject,
10667 /* 28912 */ // Label 849: @28912
10668 /* 28912 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(13), /*)*//*default:*//*Label 901*/ GIMT_Encode4(29641),
10669 /* 28923 */ /*GILLT_i32*//*Label 899*/ GIMT_Encode4(28967), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
10670 /* 28963 */ /*GILLT_v4i32*//*Label 900*/ GIMT_Encode4(29141),
10671 /* 28967 */ // Label 899: @28967
10672 /* 28967 */ GIM_Try, /*On fail goto*//*Label 902*/ GIMT_Encode4(29140),
10673 /* 28972 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
10674 /* 28975 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
10675 /* 28978 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10676 /* 28982 */ GIM_Try, /*On fail goto*//*Label 903*/ GIMT_Encode4(29106),
10677 /* 28987 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10678 /* 28991 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10679 /* 28995 */ GIM_Try, /*On fail goto*//*Label 904*/ GIMT_Encode4(29050), // Rule ID 1113 //
10680 /* 29000 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10681 /* 29004 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10682 /* 29008 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10683 /* 29012 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
10684 /* 29016 */ // MIs[1] Operand 1
10685 /* 29016 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10686 /* 29021 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10687 /* 29026 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10688 /* 29030 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10689 /* 29032 */ // (select:{ *:[v4i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SELECT_V128:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs, ?:{ *:[i32] }:$cond)
10690 /* 29032 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10691 /* 29035 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10692 /* 29037 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10693 /* 29039 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10694 /* 29041 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10695 /* 29045 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10696 /* 29048 */ GIR_RootConstrainSelectedInstOperands,
10697 /* 29049 */ // GIR_Coverage, 1113,
10698 /* 29049 */ GIR_EraseRootFromParent_Done,
10699 /* 29050 */ // Label 904: @29050
10700 /* 29050 */ GIM_Try, /*On fail goto*//*Label 905*/ GIMT_Encode4(29105), // Rule ID 1114 //
10701 /* 29055 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10702 /* 29059 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10703 /* 29063 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10704 /* 29067 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
10705 /* 29071 */ // MIs[1] Operand 1
10706 /* 29071 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10707 /* 29076 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10708 /* 29081 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10709 /* 29085 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10710 /* 29087 */ // (select:{ *:[v4i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SELECT_V128:{ *:[v4i32] } ?:{ *:[v4i32] }:$rhs, ?:{ *:[v4i32] }:$lhs, ?:{ *:[i32] }:$cond)
10711 /* 29087 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10712 /* 29090 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10713 /* 29092 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10714 /* 29094 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10715 /* 29096 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10716 /* 29100 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10717 /* 29103 */ GIR_RootConstrainSelectedInstOperands,
10718 /* 29104 */ // GIR_Coverage, 1114,
10719 /* 29104 */ GIR_EraseRootFromParent_Done,
10720 /* 29105 */ // Label 905: @29105
10721 /* 29105 */ GIM_Reject,
10722 /* 29106 */ // Label 903: @29106
10723 /* 29106 */ GIM_Try, /*On fail goto*//*Label 906*/ GIMT_Encode4(29139), // Rule ID 1112 //
10724 /* 29111 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10725 /* 29115 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10726 /* 29119 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10727 /* 29123 */ // (select:{ *:[v4i32] } I32:{ *:[i32] }:$cond, V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SELECT_V128:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs, ?:{ *:[i32] }:$cond)
10728 /* 29123 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10729 /* 29126 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10730 /* 29128 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10731 /* 29130 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10732 /* 29132 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
10733 /* 29134 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10734 /* 29137 */ GIR_RootConstrainSelectedInstOperands,
10735 /* 29138 */ // GIR_Coverage, 1112,
10736 /* 29138 */ GIR_EraseRootFromParent_Done,
10737 /* 29139 */ // Label 906: @29139
10738 /* 29139 */ GIM_Reject,
10739 /* 29140 */ // Label 902: @29140
10740 /* 29140 */ GIM_Reject,
10741 /* 29141 */ // Label 900: @29141
10742 /* 29141 */ GIM_Try, /*On fail goto*//*Label 907*/ GIMT_Encode4(29223), // Rule ID 1098 //
10743 /* 29146 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
10744 /* 29149 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
10745 /* 29152 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10746 /* 29156 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10747 /* 29160 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10748 /* 29164 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
10749 /* 29168 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
10750 /* 29172 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
10751 /* 29176 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10752 /* 29181 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10753 /* 29185 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
10754 /* 29191 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
10755 /* 29193 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
10756 /* 29197 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
10757 /* 29203 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
10758 /* 29205 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10759 /* 29207 */ // (vselect:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$x, immAllOnesV:{ *:[v4i32] }), immAllZerosV:{ *:[v4i32] }) => (ANDNOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$c, ?:{ *:[v4i32] }:$x)
10760 /* 29207 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
10761 /* 29210 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10762 /* 29212 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
10763 /* 29214 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // x
10764 /* 29218 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10765 /* 29221 */ GIR_RootConstrainSelectedInstOperands,
10766 /* 29222 */ // GIR_Coverage, 1098,
10767 /* 29222 */ GIR_EraseRootFromParent_Done,
10768 /* 29223 */ // Label 907: @29223
10769 /* 29223 */ GIM_Try, /*On fail goto*//*Label 908*/ GIMT_Encode4(29597),
10770 /* 29228 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10771 /* 29232 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 909*/ GIMT_Encode4(29324), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1313 //
10772 /* 29239 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10773 /* 29243 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10774 /* 29247 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
10775 /* 29251 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
10776 /* 29255 */ // MIs[1] Operand 1
10777 /* 29255 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10778 /* 29260 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10779 /* 29264 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
10780 /* 29268 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
10781 /* 29272 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10782 /* 29277 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
10783 /* 29281 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
10784 /* 29285 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
10785 /* 29289 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10786 /* 29294 */ // MIs[0] rhs
10787 /* 29294 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
10788 /* 29299 */ // MIs[0] lhs
10789 /* 29299 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
10790 /* 29304 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10791 /* 29306 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (SIMD_RELAXED_FMIN_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
10792 /* 29306 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F32x4),
10793 /* 29309 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10794 /* 29311 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
10795 /* 29315 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
10796 /* 29319 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10797 /* 29322 */ GIR_RootConstrainSelectedInstOperands,
10798 /* 29323 */ // GIR_Coverage, 1313,
10799 /* 29323 */ GIR_EraseRootFromParent_Done,
10800 /* 29324 */ // Label 909: @29324
10801 /* 29324 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 910*/ GIMT_Encode4(29416), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1314 //
10802 /* 29331 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10803 /* 29335 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10804 /* 29339 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
10805 /* 29343 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
10806 /* 29347 */ // MIs[1] Operand 1
10807 /* 29347 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10808 /* 29352 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10809 /* 29356 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
10810 /* 29360 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
10811 /* 29364 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10812 /* 29369 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
10813 /* 29373 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
10814 /* 29377 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
10815 /* 29381 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10816 /* 29386 */ // MIs[0] rhs
10817 /* 29386 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
10818 /* 29391 */ // MIs[0] lhs
10819 /* 29391 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
10820 /* 29396 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10821 /* 29398 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (SIMD_RELAXED_FMAX_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
10822 /* 29398 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F32x4),
10823 /* 29401 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10824 /* 29403 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
10825 /* 29407 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
10826 /* 29411 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10827 /* 29414 */ GIR_RootConstrainSelectedInstOperands,
10828 /* 29415 */ // GIR_Coverage, 1314,
10829 /* 29415 */ GIR_EraseRootFromParent_Done,
10830 /* 29416 */ // Label 910: @29416
10831 /* 29416 */ GIM_Try, /*On fail goto*//*Label 911*/ GIMT_Encode4(29506), // Rule ID 1195 //
10832 /* 29421 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10833 /* 29425 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10834 /* 29429 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
10835 /* 29433 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
10836 /* 29437 */ // MIs[1] Operand 1
10837 /* 29437 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10838 /* 29442 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10839 /* 29446 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
10840 /* 29450 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
10841 /* 29454 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10842 /* 29459 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
10843 /* 29463 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
10844 /* 29467 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
10845 /* 29471 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10846 /* 29476 */ // MIs[0] rhs
10847 /* 29476 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
10848 /* 29481 */ // MIs[0] lhs
10849 /* 29481 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
10850 /* 29486 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10851 /* 29488 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (PMIN_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
10852 /* 29488 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
10853 /* 29491 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10854 /* 29493 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
10855 /* 29497 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
10856 /* 29501 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10857 /* 29504 */ GIR_RootConstrainSelectedInstOperands,
10858 /* 29505 */ // GIR_Coverage, 1195,
10859 /* 29505 */ GIR_EraseRootFromParent_Done,
10860 /* 29506 */ // Label 911: @29506
10861 /* 29506 */ GIM_Try, /*On fail goto*//*Label 912*/ GIMT_Encode4(29596), // Rule ID 1196 //
10862 /* 29511 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10863 /* 29515 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10864 /* 29519 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
10865 /* 29523 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
10866 /* 29527 */ // MIs[1] Operand 1
10867 /* 29527 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10868 /* 29532 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10869 /* 29536 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
10870 /* 29540 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
10871 /* 29544 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10872 /* 29549 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
10873 /* 29553 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
10874 /* 29557 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
10875 /* 29561 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10876 /* 29566 */ // MIs[0] rhs
10877 /* 29566 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
10878 /* 29571 */ // MIs[0] lhs
10879 /* 29571 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
10880 /* 29576 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10881 /* 29578 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (PMAX_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
10882 /* 29578 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
10883 /* 29581 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10884 /* 29583 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
10885 /* 29587 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
10886 /* 29591 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10887 /* 29594 */ GIR_RootConstrainSelectedInstOperands,
10888 /* 29595 */ // GIR_Coverage, 1196,
10889 /* 29595 */ GIR_EraseRootFromParent_Done,
10890 /* 29596 */ // Label 912: @29596
10891 /* 29596 */ GIM_Reject,
10892 /* 29597 */ // Label 908: @29597
10893 /* 29597 */ GIM_Try, /*On fail goto*//*Label 913*/ GIMT_Encode4(29640), // Rule ID 1102 //
10894 /* 29602 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
10895 /* 29605 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
10896 /* 29608 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10897 /* 29612 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10898 /* 29616 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10899 /* 29620 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10900 /* 29624 */ // (vselect:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
10901 /* 29624 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
10902 /* 29627 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10903 /* 29629 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
10904 /* 29631 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
10905 /* 29633 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
10906 /* 29635 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10907 /* 29638 */ GIR_RootConstrainSelectedInstOperands,
10908 /* 29639 */ // GIR_Coverage, 1102,
10909 /* 29639 */ GIR_EraseRootFromParent_Done,
10910 /* 29640 */ // Label 913: @29640
10911 /* 29640 */ GIM_Reject,
10912 /* 29641 */ // Label 901: @29641
10913 /* 29641 */ GIM_Reject,
10914 /* 29642 */ // Label 850: @29642
10915 /* 29642 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(14), /*)*//*default:*//*Label 916*/ GIMT_Encode4(30375),
10916 /* 29653 */ /*GILLT_i32*//*Label 914*/ GIMT_Encode4(29701), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
10917 /* 29697 */ /*GILLT_v2i64*//*Label 915*/ GIMT_Encode4(29875),
10918 /* 29701 */ // Label 914: @29701
10919 /* 29701 */ GIM_Try, /*On fail goto*//*Label 917*/ GIMT_Encode4(29874),
10920 /* 29706 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
10921 /* 29709 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
10922 /* 29712 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10923 /* 29716 */ GIM_Try, /*On fail goto*//*Label 918*/ GIMT_Encode4(29840),
10924 /* 29721 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10925 /* 29725 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10926 /* 29729 */ GIM_Try, /*On fail goto*//*Label 919*/ GIMT_Encode4(29784), // Rule ID 1116 //
10927 /* 29734 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10928 /* 29738 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10929 /* 29742 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10930 /* 29746 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
10931 /* 29750 */ // MIs[1] Operand 1
10932 /* 29750 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10933 /* 29755 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10934 /* 29760 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10935 /* 29764 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10936 /* 29766 */ // (select:{ *:[v2i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SELECT_V128:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs, ?:{ *:[i32] }:$cond)
10937 /* 29766 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10938 /* 29769 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10939 /* 29771 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10940 /* 29773 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10941 /* 29775 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10942 /* 29779 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10943 /* 29782 */ GIR_RootConstrainSelectedInstOperands,
10944 /* 29783 */ // GIR_Coverage, 1116,
10945 /* 29783 */ GIR_EraseRootFromParent_Done,
10946 /* 29784 */ // Label 919: @29784
10947 /* 29784 */ GIM_Try, /*On fail goto*//*Label 920*/ GIMT_Encode4(29839), // Rule ID 1117 //
10948 /* 29789 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10949 /* 29793 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10950 /* 29797 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10951 /* 29801 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
10952 /* 29805 */ // MIs[1] Operand 1
10953 /* 29805 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10954 /* 29810 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10955 /* 29815 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10956 /* 29819 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10957 /* 29821 */ // (select:{ *:[v2i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SELECT_V128:{ *:[v2i64] } ?:{ *:[v2i64] }:$rhs, ?:{ *:[v2i64] }:$lhs, ?:{ *:[i32] }:$cond)
10958 /* 29821 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10959 /* 29824 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10960 /* 29826 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10961 /* 29828 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10962 /* 29830 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10963 /* 29834 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10964 /* 29837 */ GIR_RootConstrainSelectedInstOperands,
10965 /* 29838 */ // GIR_Coverage, 1117,
10966 /* 29838 */ GIR_EraseRootFromParent_Done,
10967 /* 29839 */ // Label 920: @29839
10968 /* 29839 */ GIM_Reject,
10969 /* 29840 */ // Label 918: @29840
10970 /* 29840 */ GIM_Try, /*On fail goto*//*Label 921*/ GIMT_Encode4(29873), // Rule ID 1115 //
10971 /* 29845 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10972 /* 29849 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10973 /* 29853 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10974 /* 29857 */ // (select:{ *:[v2i64] } I32:{ *:[i32] }:$cond, V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SELECT_V128:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs, ?:{ *:[i32] }:$cond)
10975 /* 29857 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10976 /* 29860 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10977 /* 29862 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10978 /* 29864 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10979 /* 29866 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
10980 /* 29868 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10981 /* 29871 */ GIR_RootConstrainSelectedInstOperands,
10982 /* 29872 */ // GIR_Coverage, 1115,
10983 /* 29872 */ GIR_EraseRootFromParent_Done,
10984 /* 29873 */ // Label 921: @29873
10985 /* 29873 */ GIM_Reject,
10986 /* 29874 */ // Label 917: @29874
10987 /* 29874 */ GIM_Reject,
10988 /* 29875 */ // Label 915: @29875
10989 /* 29875 */ GIM_Try, /*On fail goto*//*Label 922*/ GIMT_Encode4(29957), // Rule ID 1099 //
10990 /* 29880 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
10991 /* 29883 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
10992 /* 29886 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10993 /* 29890 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10994 /* 29894 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10995 /* 29898 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
10996 /* 29902 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
10997 /* 29906 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
10998 /* 29910 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10999 /* 29915 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
11000 /* 29919 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
11001 /* 29925 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
11002 /* 29927 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
11003 /* 29931 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
11004 /* 29937 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
11005 /* 29939 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
11006 /* 29941 */ // (vselect:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$x, immAllOnesV:{ *:[v2i64] }), immAllZerosV:{ *:[v2i64] }) => (ANDNOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$c, ?:{ *:[v2i64] }:$x)
11007 /* 29941 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
11008 /* 29944 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11009 /* 29946 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
11010 /* 29948 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // x
11011 /* 29952 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11012 /* 29955 */ GIR_RootConstrainSelectedInstOperands,
11013 /* 29956 */ // GIR_Coverage, 1099,
11014 /* 29956 */ GIR_EraseRootFromParent_Done,
11015 /* 29957 */ // Label 922: @29957
11016 /* 29957 */ GIM_Try, /*On fail goto*//*Label 923*/ GIMT_Encode4(30331),
11017 /* 29962 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11018 /* 29966 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 924*/ GIMT_Encode4(30058), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1333 //
11019 /* 29973 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11020 /* 29977 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11021 /* 29981 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
11022 /* 29985 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
11023 /* 29989 */ // MIs[1] Operand 1
11024 /* 29989 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11025 /* 29994 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
11026 /* 29998 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
11027 /* 30002 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
11028 /* 30006 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11029 /* 30011 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
11030 /* 30015 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
11031 /* 30019 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
11032 /* 30023 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11033 /* 30028 */ // MIs[0] rhs
11034 /* 30028 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
11035 /* 30033 */ // MIs[0] lhs
11036 /* 30033 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
11037 /* 30038 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
11038 /* 30040 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (SIMD_RELAXED_FMIN_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
11039 /* 30040 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F64x2),
11040 /* 30043 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11041 /* 30045 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
11042 /* 30049 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
11043 /* 30053 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11044 /* 30056 */ GIR_RootConstrainSelectedInstOperands,
11045 /* 30057 */ // GIR_Coverage, 1333,
11046 /* 30057 */ GIR_EraseRootFromParent_Done,
11047 /* 30058 */ // Label 924: @30058
11048 /* 30058 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 925*/ GIMT_Encode4(30150), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1334 //
11049 /* 30065 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11050 /* 30069 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11051 /* 30073 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
11052 /* 30077 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
11053 /* 30081 */ // MIs[1] Operand 1
11054 /* 30081 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11055 /* 30086 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
11056 /* 30090 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
11057 /* 30094 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
11058 /* 30098 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11059 /* 30103 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
11060 /* 30107 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
11061 /* 30111 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
11062 /* 30115 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11063 /* 30120 */ // MIs[0] rhs
11064 /* 30120 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
11065 /* 30125 */ // MIs[0] lhs
11066 /* 30125 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
11067 /* 30130 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
11068 /* 30132 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (SIMD_RELAXED_FMAX_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
11069 /* 30132 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F64x2),
11070 /* 30135 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11071 /* 30137 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
11072 /* 30141 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
11073 /* 30145 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11074 /* 30148 */ GIR_RootConstrainSelectedInstOperands,
11075 /* 30149 */ // GIR_Coverage, 1334,
11076 /* 30149 */ GIR_EraseRootFromParent_Done,
11077 /* 30150 */ // Label 925: @30150
11078 /* 30150 */ GIM_Try, /*On fail goto*//*Label 926*/ GIMT_Encode4(30240), // Rule ID 1197 //
11079 /* 30155 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11080 /* 30159 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11081 /* 30163 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
11082 /* 30167 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
11083 /* 30171 */ // MIs[1] Operand 1
11084 /* 30171 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11085 /* 30176 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
11086 /* 30180 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
11087 /* 30184 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
11088 /* 30188 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11089 /* 30193 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
11090 /* 30197 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
11091 /* 30201 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
11092 /* 30205 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11093 /* 30210 */ // MIs[0] rhs
11094 /* 30210 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
11095 /* 30215 */ // MIs[0] lhs
11096 /* 30215 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
11097 /* 30220 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
11098 /* 30222 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (PMIN_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
11099 /* 30222 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
11100 /* 30225 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11101 /* 30227 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
11102 /* 30231 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
11103 /* 30235 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11104 /* 30238 */ GIR_RootConstrainSelectedInstOperands,
11105 /* 30239 */ // GIR_Coverage, 1197,
11106 /* 30239 */ GIR_EraseRootFromParent_Done,
11107 /* 30240 */ // Label 926: @30240
11108 /* 30240 */ GIM_Try, /*On fail goto*//*Label 927*/ GIMT_Encode4(30330), // Rule ID 1198 //
11109 /* 30245 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11110 /* 30249 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11111 /* 30253 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
11112 /* 30257 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
11113 /* 30261 */ // MIs[1] Operand 1
11114 /* 30261 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11115 /* 30266 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
11116 /* 30270 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
11117 /* 30274 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
11118 /* 30278 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11119 /* 30283 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
11120 /* 30287 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
11121 /* 30291 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
11122 /* 30295 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11123 /* 30300 */ // MIs[0] rhs
11124 /* 30300 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
11125 /* 30305 */ // MIs[0] lhs
11126 /* 30305 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
11127 /* 30310 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
11128 /* 30312 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (PMAX_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
11129 /* 30312 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
11130 /* 30315 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11131 /* 30317 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
11132 /* 30321 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
11133 /* 30325 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11134 /* 30328 */ GIR_RootConstrainSelectedInstOperands,
11135 /* 30329 */ // GIR_Coverage, 1198,
11136 /* 30329 */ GIR_EraseRootFromParent_Done,
11137 /* 30330 */ // Label 927: @30330
11138 /* 30330 */ GIM_Reject,
11139 /* 30331 */ // Label 923: @30331
11140 /* 30331 */ GIM_Try, /*On fail goto*//*Label 928*/ GIMT_Encode4(30374), // Rule ID 1103 //
11141 /* 30336 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
11142 /* 30339 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
11143 /* 30342 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11144 /* 30346 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11145 /* 30350 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11146 /* 30354 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11147 /* 30358 */ // (vselect:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
11148 /* 30358 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
11149 /* 30361 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11150 /* 30363 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
11151 /* 30365 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
11152 /* 30367 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
11153 /* 30369 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11154 /* 30372 */ GIR_RootConstrainSelectedInstOperands,
11155 /* 30373 */ // GIR_Coverage, 1103,
11156 /* 30373 */ GIR_EraseRootFromParent_Done,
11157 /* 30374 */ // Label 928: @30374
11158 /* 30374 */ GIM_Reject,
11159 /* 30375 */ // Label 916: @30375
11160 /* 30375 */ GIM_Reject,
11161 /* 30376 */ // Label 851: @30376
11162 /* 30376 */ GIM_Try, /*On fail goto*//*Label 929*/ GIMT_Encode4(30933),
11163 /* 30381 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
11164 /* 30384 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11165 /* 30388 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 930*/ GIMT_Encode4(30456), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 379 //
11166 /* 30395 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11167 /* 30399 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11168 /* 30403 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8f16,
11169 /* 30407 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8f16,
11170 /* 30411 */ // MIs[1] Operand 1
11171 /* 30411 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11172 /* 30416 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11173 /* 30421 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11174 /* 30426 */ // MIs[0] rhs
11175 /* 30426 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11176 /* 30431 */ // MIs[0] lhs
11177 /* 30431 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11178 /* 30436 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11179 /* 30438 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs, SETOLT:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11180 /* 30438 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
11181 /* 30441 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11182 /* 30443 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11183 /* 30447 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11184 /* 30451 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11185 /* 30454 */ GIR_RootConstrainSelectedInstOperands,
11186 /* 30455 */ // GIR_Coverage, 379,
11187 /* 30455 */ GIR_EraseRootFromParent_Done,
11188 /* 30456 */ // Label 930: @30456
11189 /* 30456 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 931*/ GIMT_Encode4(30524), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 380 //
11190 /* 30463 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11191 /* 30467 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11192 /* 30471 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8f16,
11193 /* 30475 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8f16,
11194 /* 30479 */ // MIs[1] Operand 1
11195 /* 30479 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
11196 /* 30484 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11197 /* 30489 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11198 /* 30494 */ // MIs[0] rhs
11199 /* 30494 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11200 /* 30499 */ // MIs[0] lhs
11201 /* 30499 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11202 /* 30504 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11203 /* 30506 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs, SETOLE:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11204 /* 30506 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
11205 /* 30509 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11206 /* 30511 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11207 /* 30515 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11208 /* 30519 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11209 /* 30522 */ GIR_RootConstrainSelectedInstOperands,
11210 /* 30523 */ // GIR_Coverage, 380,
11211 /* 30523 */ GIR_EraseRootFromParent_Done,
11212 /* 30524 */ // Label 931: @30524
11213 /* 30524 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 932*/ GIMT_Encode4(30592), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 381 //
11214 /* 30531 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11215 /* 30535 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11216 /* 30539 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8f16,
11217 /* 30543 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8f16,
11218 /* 30547 */ // MIs[1] Operand 1
11219 /* 30547 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
11220 /* 30552 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11221 /* 30557 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11222 /* 30562 */ // MIs[0] rhs
11223 /* 30562 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11224 /* 30567 */ // MIs[0] lhs
11225 /* 30567 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11226 /* 30572 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11227 /* 30574 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOGT:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11228 /* 30574 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
11229 /* 30577 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11230 /* 30579 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11231 /* 30583 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11232 /* 30587 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11233 /* 30590 */ GIR_RootConstrainSelectedInstOperands,
11234 /* 30591 */ // GIR_Coverage, 381,
11235 /* 30591 */ GIR_EraseRootFromParent_Done,
11236 /* 30592 */ // Label 932: @30592
11237 /* 30592 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 933*/ GIMT_Encode4(30660), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 382 //
11238 /* 30599 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11239 /* 30603 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11240 /* 30607 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8f16,
11241 /* 30611 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8f16,
11242 /* 30615 */ // MIs[1] Operand 1
11243 /* 30615 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
11244 /* 30620 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11245 /* 30625 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11246 /* 30630 */ // MIs[0] rhs
11247 /* 30630 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11248 /* 30635 */ // MIs[0] lhs
11249 /* 30635 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11250 /* 30640 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11251 /* 30642 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOGE:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11252 /* 30642 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
11253 /* 30645 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11254 /* 30647 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11255 /* 30651 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11256 /* 30655 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11257 /* 30658 */ GIR_RootConstrainSelectedInstOperands,
11258 /* 30659 */ // GIR_Coverage, 382,
11259 /* 30659 */ GIR_EraseRootFromParent_Done,
11260 /* 30660 */ // Label 933: @30660
11261 /* 30660 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 934*/ GIMT_Encode4(30728), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 403 //
11262 /* 30667 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11263 /* 30671 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11264 /* 30675 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8f16,
11265 /* 30679 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8f16,
11266 /* 30683 */ // MIs[1] Operand 1
11267 /* 30683 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
11268 /* 30688 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11269 /* 30693 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11270 /* 30698 */ // MIs[0] rhs
11271 /* 30698 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11272 /* 30703 */ // MIs[0] lhs
11273 /* 30703 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11274 /* 30708 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11275 /* 30710 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs, SETOGT:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11276 /* 30710 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
11277 /* 30713 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11278 /* 30715 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11279 /* 30719 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11280 /* 30723 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11281 /* 30726 */ GIR_RootConstrainSelectedInstOperands,
11282 /* 30727 */ // GIR_Coverage, 403,
11283 /* 30727 */ GIR_EraseRootFromParent_Done,
11284 /* 30728 */ // Label 934: @30728
11285 /* 30728 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 935*/ GIMT_Encode4(30796), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 404 //
11286 /* 30735 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11287 /* 30739 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11288 /* 30743 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8f16,
11289 /* 30747 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8f16,
11290 /* 30751 */ // MIs[1] Operand 1
11291 /* 30751 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
11292 /* 30756 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11293 /* 30761 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11294 /* 30766 */ // MIs[0] rhs
11295 /* 30766 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11296 /* 30771 */ // MIs[0] lhs
11297 /* 30771 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11298 /* 30776 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11299 /* 30778 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs, SETOGE:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11300 /* 30778 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
11301 /* 30781 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11302 /* 30783 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11303 /* 30787 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11304 /* 30791 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11305 /* 30794 */ GIR_RootConstrainSelectedInstOperands,
11306 /* 30795 */ // GIR_Coverage, 404,
11307 /* 30795 */ GIR_EraseRootFromParent_Done,
11308 /* 30796 */ // Label 935: @30796
11309 /* 30796 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 936*/ GIMT_Encode4(30864), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 405 //
11310 /* 30803 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11311 /* 30807 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11312 /* 30811 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8f16,
11313 /* 30815 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8f16,
11314 /* 30819 */ // MIs[1] Operand 1
11315 /* 30819 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11316 /* 30824 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11317 /* 30829 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11318 /* 30834 */ // MIs[0] rhs
11319 /* 30834 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11320 /* 30839 */ // MIs[0] lhs
11321 /* 30839 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11322 /* 30844 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11323 /* 30846 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOLT:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11324 /* 30846 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
11325 /* 30849 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11326 /* 30851 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11327 /* 30855 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11328 /* 30859 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11329 /* 30862 */ GIR_RootConstrainSelectedInstOperands,
11330 /* 30863 */ // GIR_Coverage, 405,
11331 /* 30863 */ GIR_EraseRootFromParent_Done,
11332 /* 30864 */ // Label 936: @30864
11333 /* 30864 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 937*/ GIMT_Encode4(30932), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 406 //
11334 /* 30871 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11335 /* 30875 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11336 /* 30879 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8f16,
11337 /* 30883 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8f16,
11338 /* 30887 */ // MIs[1] Operand 1
11339 /* 30887 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
11340 /* 30892 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11341 /* 30897 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11342 /* 30902 */ // MIs[0] rhs
11343 /* 30902 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11344 /* 30907 */ // MIs[0] lhs
11345 /* 30907 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11346 /* 30912 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11347 /* 30914 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOLE:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11348 /* 30914 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
11349 /* 30917 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11350 /* 30919 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11351 /* 30923 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11352 /* 30927 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11353 /* 30930 */ GIR_RootConstrainSelectedInstOperands,
11354 /* 30931 */ // GIR_Coverage, 406,
11355 /* 30931 */ GIR_EraseRootFromParent_Done,
11356 /* 30932 */ // Label 937: @30932
11357 /* 30932 */ GIM_Reject,
11358 /* 30933 */ // Label 929: @30933
11359 /* 30933 */ GIM_Reject,
11360 /* 30934 */ // Label 852: @30934
11361 /* 30934 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(13), /*)*//*default:*//*Label 940*/ GIMT_Encode4(31761),
11362 /* 30945 */ /*GILLT_i32*//*Label 938*/ GIMT_Encode4(30989), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
11363 /* 30985 */ /*GILLT_v4i32*//*Label 939*/ GIMT_Encode4(31163),
11364 /* 30989 */ // Label 938: @30989
11365 /* 30989 */ GIM_Try, /*On fail goto*//*Label 941*/ GIMT_Encode4(31162),
11366 /* 30994 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
11367 /* 30997 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
11368 /* 31000 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11369 /* 31004 */ GIM_Try, /*On fail goto*//*Label 942*/ GIMT_Encode4(31128),
11370 /* 31009 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11371 /* 31013 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11372 /* 31017 */ GIM_Try, /*On fail goto*//*Label 943*/ GIMT_Encode4(31072), // Rule ID 1119 //
11373 /* 31022 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11374 /* 31026 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
11375 /* 31030 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
11376 /* 31034 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
11377 /* 31038 */ // MIs[1] Operand 1
11378 /* 31038 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11379 /* 31043 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11380 /* 31048 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
11381 /* 31052 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11382 /* 31054 */ // (select:{ *:[v4f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SELECT_V128:{ *:[v4f32] } ?:{ *:[v4f32] }:$lhs, ?:{ *:[v4f32] }:$rhs, ?:{ *:[i32] }:$cond)
11383 /* 31054 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11384 /* 31057 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11385 /* 31059 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11386 /* 31061 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11387 /* 31063 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
11388 /* 31067 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11389 /* 31070 */ GIR_RootConstrainSelectedInstOperands,
11390 /* 31071 */ // GIR_Coverage, 1119,
11391 /* 31071 */ GIR_EraseRootFromParent_Done,
11392 /* 31072 */ // Label 943: @31072
11393 /* 31072 */ GIM_Try, /*On fail goto*//*Label 944*/ GIMT_Encode4(31127), // Rule ID 1120 //
11394 /* 31077 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11395 /* 31081 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
11396 /* 31085 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
11397 /* 31089 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
11398 /* 31093 */ // MIs[1] Operand 1
11399 /* 31093 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11400 /* 31098 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11401 /* 31103 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
11402 /* 31107 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11403 /* 31109 */ // (select:{ *:[v4f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SELECT_V128:{ *:[v4f32] } ?:{ *:[v4f32] }:$rhs, ?:{ *:[v4f32] }:$lhs, ?:{ *:[i32] }:$cond)
11404 /* 31109 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11405 /* 31112 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11406 /* 31114 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11407 /* 31116 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11408 /* 31118 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
11409 /* 31122 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11410 /* 31125 */ GIR_RootConstrainSelectedInstOperands,
11411 /* 31126 */ // GIR_Coverage, 1120,
11412 /* 31126 */ GIR_EraseRootFromParent_Done,
11413 /* 31127 */ // Label 944: @31127
11414 /* 31127 */ GIM_Reject,
11415 /* 31128 */ // Label 942: @31128
11416 /* 31128 */ GIM_Try, /*On fail goto*//*Label 945*/ GIMT_Encode4(31161), // Rule ID 1118 //
11417 /* 31133 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11418 /* 31137 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11419 /* 31141 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11420 /* 31145 */ // (select:{ *:[v4f32] } I32:{ *:[i32] }:$cond, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SELECT_V128:{ *:[v4f32] } ?:{ *:[v4f32] }:$lhs, ?:{ *:[v4f32] }:$rhs, ?:{ *:[i32] }:$cond)
11421 /* 31145 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11422 /* 31148 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11423 /* 31150 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11424 /* 31152 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11425 /* 31154 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
11426 /* 31156 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11427 /* 31159 */ GIR_RootConstrainSelectedInstOperands,
11428 /* 31160 */ // GIR_Coverage, 1118,
11429 /* 31160 */ GIR_EraseRootFromParent_Done,
11430 /* 31161 */ // Label 945: @31161
11431 /* 31161 */ GIM_Reject,
11432 /* 31162 */ // Label 941: @31162
11433 /* 31162 */ GIM_Reject,
11434 /* 31163 */ // Label 939: @31163
11435 /* 31163 */ GIM_Try, /*On fail goto*//*Label 946*/ GIMT_Encode4(31717),
11436 /* 31168 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11437 /* 31172 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 947*/ GIMT_Encode4(31240), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 363 //
11438 /* 31179 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11439 /* 31183 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11440 /* 31187 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
11441 /* 31191 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
11442 /* 31195 */ // MIs[1] Operand 1
11443 /* 31195 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11444 /* 31200 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11445 /* 31205 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11446 /* 31210 */ // MIs[0] rhs
11447 /* 31210 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11448 /* 31215 */ // MIs[0] lhs
11449 /* 31215 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11450 /* 31220 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11451 /* 31222 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs, SETOLT:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11452 /* 31222 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
11453 /* 31225 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11454 /* 31227 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11455 /* 31231 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11456 /* 31235 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11457 /* 31238 */ GIR_RootConstrainSelectedInstOperands,
11458 /* 31239 */ // GIR_Coverage, 363,
11459 /* 31239 */ GIR_EraseRootFromParent_Done,
11460 /* 31240 */ // Label 947: @31240
11461 /* 31240 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 948*/ GIMT_Encode4(31308), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 364 //
11462 /* 31247 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11463 /* 31251 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11464 /* 31255 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
11465 /* 31259 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
11466 /* 31263 */ // MIs[1] Operand 1
11467 /* 31263 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
11468 /* 31268 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11469 /* 31273 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11470 /* 31278 */ // MIs[0] rhs
11471 /* 31278 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11472 /* 31283 */ // MIs[0] lhs
11473 /* 31283 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11474 /* 31288 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11475 /* 31290 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs, SETOLE:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11476 /* 31290 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
11477 /* 31293 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11478 /* 31295 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11479 /* 31299 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11480 /* 31303 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11481 /* 31306 */ GIR_RootConstrainSelectedInstOperands,
11482 /* 31307 */ // GIR_Coverage, 364,
11483 /* 31307 */ GIR_EraseRootFromParent_Done,
11484 /* 31308 */ // Label 948: @31308
11485 /* 31308 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 949*/ GIMT_Encode4(31376), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 365 //
11486 /* 31315 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11487 /* 31319 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11488 /* 31323 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
11489 /* 31327 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
11490 /* 31331 */ // MIs[1] Operand 1
11491 /* 31331 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
11492 /* 31336 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11493 /* 31341 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11494 /* 31346 */ // MIs[0] rhs
11495 /* 31346 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11496 /* 31351 */ // MIs[0] lhs
11497 /* 31351 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11498 /* 31356 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11499 /* 31358 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOGT:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11500 /* 31358 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
11501 /* 31361 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11502 /* 31363 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11503 /* 31367 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11504 /* 31371 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11505 /* 31374 */ GIR_RootConstrainSelectedInstOperands,
11506 /* 31375 */ // GIR_Coverage, 365,
11507 /* 31375 */ GIR_EraseRootFromParent_Done,
11508 /* 31376 */ // Label 949: @31376
11509 /* 31376 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 950*/ GIMT_Encode4(31444), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 366 //
11510 /* 31383 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11511 /* 31387 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11512 /* 31391 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
11513 /* 31395 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
11514 /* 31399 */ // MIs[1] Operand 1
11515 /* 31399 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
11516 /* 31404 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11517 /* 31409 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11518 /* 31414 */ // MIs[0] rhs
11519 /* 31414 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11520 /* 31419 */ // MIs[0] lhs
11521 /* 31419 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11522 /* 31424 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11523 /* 31426 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOGE:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11524 /* 31426 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
11525 /* 31429 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11526 /* 31431 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11527 /* 31435 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11528 /* 31439 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11529 /* 31442 */ GIR_RootConstrainSelectedInstOperands,
11530 /* 31443 */ // GIR_Coverage, 366,
11531 /* 31443 */ GIR_EraseRootFromParent_Done,
11532 /* 31444 */ // Label 950: @31444
11533 /* 31444 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 951*/ GIMT_Encode4(31512), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 387 //
11534 /* 31451 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11535 /* 31455 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11536 /* 31459 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
11537 /* 31463 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
11538 /* 31467 */ // MIs[1] Operand 1
11539 /* 31467 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
11540 /* 31472 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11541 /* 31477 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11542 /* 31482 */ // MIs[0] rhs
11543 /* 31482 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11544 /* 31487 */ // MIs[0] lhs
11545 /* 31487 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11546 /* 31492 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11547 /* 31494 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs, SETOGT:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11548 /* 31494 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
11549 /* 31497 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11550 /* 31499 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11551 /* 31503 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11552 /* 31507 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11553 /* 31510 */ GIR_RootConstrainSelectedInstOperands,
11554 /* 31511 */ // GIR_Coverage, 387,
11555 /* 31511 */ GIR_EraseRootFromParent_Done,
11556 /* 31512 */ // Label 951: @31512
11557 /* 31512 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 952*/ GIMT_Encode4(31580), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 388 //
11558 /* 31519 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11559 /* 31523 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11560 /* 31527 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
11561 /* 31531 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
11562 /* 31535 */ // MIs[1] Operand 1
11563 /* 31535 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
11564 /* 31540 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11565 /* 31545 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11566 /* 31550 */ // MIs[0] rhs
11567 /* 31550 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11568 /* 31555 */ // MIs[0] lhs
11569 /* 31555 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11570 /* 31560 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11571 /* 31562 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs, SETOGE:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11572 /* 31562 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
11573 /* 31565 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11574 /* 31567 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11575 /* 31571 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11576 /* 31575 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11577 /* 31578 */ GIR_RootConstrainSelectedInstOperands,
11578 /* 31579 */ // GIR_Coverage, 388,
11579 /* 31579 */ GIR_EraseRootFromParent_Done,
11580 /* 31580 */ // Label 952: @31580
11581 /* 31580 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 953*/ GIMT_Encode4(31648), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 389 //
11582 /* 31587 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11583 /* 31591 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11584 /* 31595 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
11585 /* 31599 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
11586 /* 31603 */ // MIs[1] Operand 1
11587 /* 31603 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11588 /* 31608 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11589 /* 31613 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11590 /* 31618 */ // MIs[0] rhs
11591 /* 31618 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11592 /* 31623 */ // MIs[0] lhs
11593 /* 31623 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11594 /* 31628 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11595 /* 31630 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOLT:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11596 /* 31630 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
11597 /* 31633 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11598 /* 31635 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11599 /* 31639 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11600 /* 31643 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11601 /* 31646 */ GIR_RootConstrainSelectedInstOperands,
11602 /* 31647 */ // GIR_Coverage, 389,
11603 /* 31647 */ GIR_EraseRootFromParent_Done,
11604 /* 31648 */ // Label 953: @31648
11605 /* 31648 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 954*/ GIMT_Encode4(31716), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 390 //
11606 /* 31655 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11607 /* 31659 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11608 /* 31663 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
11609 /* 31667 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
11610 /* 31671 */ // MIs[1] Operand 1
11611 /* 31671 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
11612 /* 31676 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11613 /* 31681 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11614 /* 31686 */ // MIs[0] rhs
11615 /* 31686 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11616 /* 31691 */ // MIs[0] lhs
11617 /* 31691 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11618 /* 31696 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11619 /* 31698 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOLE:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11620 /* 31698 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
11621 /* 31701 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11622 /* 31703 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11623 /* 31707 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11624 /* 31711 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11625 /* 31714 */ GIR_RootConstrainSelectedInstOperands,
11626 /* 31715 */ // GIR_Coverage, 390,
11627 /* 31715 */ GIR_EraseRootFromParent_Done,
11628 /* 31716 */ // Label 954: @31716
11629 /* 31716 */ GIM_Reject,
11630 /* 31717 */ // Label 946: @31717
11631 /* 31717 */ GIM_Try, /*On fail goto*//*Label 955*/ GIMT_Encode4(31760), // Rule ID 1104 //
11632 /* 31722 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
11633 /* 31725 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
11634 /* 31728 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11635 /* 31732 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11636 /* 31736 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11637 /* 31740 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11638 /* 31744 */ // (vselect:{ *:[v4f32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4f32] }:$v1, V128:{ *:[v4f32] }:$v2) => (BITSELECT:{ *:[v4f32] } ?:{ *:[v4f32] }:$v1, ?:{ *:[v4f32] }:$v2, ?:{ *:[v4i32] }:$c)
11639 /* 31744 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
11640 /* 31747 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11641 /* 31749 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
11642 /* 31751 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
11643 /* 31753 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
11644 /* 31755 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11645 /* 31758 */ GIR_RootConstrainSelectedInstOperands,
11646 /* 31759 */ // GIR_Coverage, 1104,
11647 /* 31759 */ GIR_EraseRootFromParent_Done,
11648 /* 31760 */ // Label 955: @31760
11649 /* 31760 */ GIM_Reject,
11650 /* 31761 */ // Label 940: @31761
11651 /* 31761 */ GIM_Reject,
11652 /* 31762 */ // Label 853: @31762
11653 /* 31762 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(14), /*)*//*default:*//*Label 958*/ GIMT_Encode4(32593),
11654 /* 31773 */ /*GILLT_i32*//*Label 956*/ GIMT_Encode4(31821), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
11655 /* 31817 */ /*GILLT_v2i64*//*Label 957*/ GIMT_Encode4(31995),
11656 /* 31821 */ // Label 956: @31821
11657 /* 31821 */ GIM_Try, /*On fail goto*//*Label 959*/ GIMT_Encode4(31994),
11658 /* 31826 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
11659 /* 31829 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
11660 /* 31832 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11661 /* 31836 */ GIM_Try, /*On fail goto*//*Label 960*/ GIMT_Encode4(31960),
11662 /* 31841 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11663 /* 31845 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11664 /* 31849 */ GIM_Try, /*On fail goto*//*Label 961*/ GIMT_Encode4(31904), // Rule ID 1122 //
11665 /* 31854 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11666 /* 31858 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
11667 /* 31862 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
11668 /* 31866 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
11669 /* 31870 */ // MIs[1] Operand 1
11670 /* 31870 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11671 /* 31875 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11672 /* 31880 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
11673 /* 31884 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11674 /* 31886 */ // (select:{ *:[v2f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SELECT_V128:{ *:[v2f64] } ?:{ *:[v2f64] }:$lhs, ?:{ *:[v2f64] }:$rhs, ?:{ *:[i32] }:$cond)
11675 /* 31886 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11676 /* 31889 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11677 /* 31891 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11678 /* 31893 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11679 /* 31895 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
11680 /* 31899 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11681 /* 31902 */ GIR_RootConstrainSelectedInstOperands,
11682 /* 31903 */ // GIR_Coverage, 1122,
11683 /* 31903 */ GIR_EraseRootFromParent_Done,
11684 /* 31904 */ // Label 961: @31904
11685 /* 31904 */ GIM_Try, /*On fail goto*//*Label 962*/ GIMT_Encode4(31959), // Rule ID 1123 //
11686 /* 31909 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11687 /* 31913 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
11688 /* 31917 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
11689 /* 31921 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
11690 /* 31925 */ // MIs[1] Operand 1
11691 /* 31925 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11692 /* 31930 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11693 /* 31935 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
11694 /* 31939 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11695 /* 31941 */ // (select:{ *:[v2f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SELECT_V128:{ *:[v2f64] } ?:{ *:[v2f64] }:$rhs, ?:{ *:[v2f64] }:$lhs, ?:{ *:[i32] }:$cond)
11696 /* 31941 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11697 /* 31944 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11698 /* 31946 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11699 /* 31948 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11700 /* 31950 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
11701 /* 31954 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11702 /* 31957 */ GIR_RootConstrainSelectedInstOperands,
11703 /* 31958 */ // GIR_Coverage, 1123,
11704 /* 31958 */ GIR_EraseRootFromParent_Done,
11705 /* 31959 */ // Label 962: @31959
11706 /* 31959 */ GIM_Reject,
11707 /* 31960 */ // Label 960: @31960
11708 /* 31960 */ GIM_Try, /*On fail goto*//*Label 963*/ GIMT_Encode4(31993), // Rule ID 1121 //
11709 /* 31965 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11710 /* 31969 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11711 /* 31973 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11712 /* 31977 */ // (select:{ *:[v2f64] } I32:{ *:[i32] }:$cond, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SELECT_V128:{ *:[v2f64] } ?:{ *:[v2f64] }:$lhs, ?:{ *:[v2f64] }:$rhs, ?:{ *:[i32] }:$cond)
11713 /* 31977 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11714 /* 31980 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11715 /* 31982 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11716 /* 31984 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11717 /* 31986 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
11718 /* 31988 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11719 /* 31991 */ GIR_RootConstrainSelectedInstOperands,
11720 /* 31992 */ // GIR_Coverage, 1121,
11721 /* 31992 */ GIR_EraseRootFromParent_Done,
11722 /* 31993 */ // Label 963: @31993
11723 /* 31993 */ GIM_Reject,
11724 /* 31994 */ // Label 959: @31994
11725 /* 31994 */ GIM_Reject,
11726 /* 31995 */ // Label 957: @31995
11727 /* 31995 */ GIM_Try, /*On fail goto*//*Label 964*/ GIMT_Encode4(32549),
11728 /* 32000 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11729 /* 32004 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 965*/ GIMT_Encode4(32072), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 371 //
11730 /* 32011 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11731 /* 32015 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11732 /* 32019 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
11733 /* 32023 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
11734 /* 32027 */ // MIs[1] Operand 1
11735 /* 32027 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11736 /* 32032 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11737 /* 32037 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11738 /* 32042 */ // MIs[0] rhs
11739 /* 32042 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11740 /* 32047 */ // MIs[0] lhs
11741 /* 32047 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11742 /* 32052 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11743 /* 32054 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs, SETOLT:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
11744 /* 32054 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
11745 /* 32057 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11746 /* 32059 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11747 /* 32063 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11748 /* 32067 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11749 /* 32070 */ GIR_RootConstrainSelectedInstOperands,
11750 /* 32071 */ // GIR_Coverage, 371,
11751 /* 32071 */ GIR_EraseRootFromParent_Done,
11752 /* 32072 */ // Label 965: @32072
11753 /* 32072 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 966*/ GIMT_Encode4(32140), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 372 //
11754 /* 32079 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11755 /* 32083 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11756 /* 32087 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
11757 /* 32091 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
11758 /* 32095 */ // MIs[1] Operand 1
11759 /* 32095 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
11760 /* 32100 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11761 /* 32105 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11762 /* 32110 */ // MIs[0] rhs
11763 /* 32110 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11764 /* 32115 */ // MIs[0] lhs
11765 /* 32115 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11766 /* 32120 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11767 /* 32122 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs, SETOLE:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
11768 /* 32122 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
11769 /* 32125 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11770 /* 32127 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11771 /* 32131 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11772 /* 32135 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11773 /* 32138 */ GIR_RootConstrainSelectedInstOperands,
11774 /* 32139 */ // GIR_Coverage, 372,
11775 /* 32139 */ GIR_EraseRootFromParent_Done,
11776 /* 32140 */ // Label 966: @32140
11777 /* 32140 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 967*/ GIMT_Encode4(32208), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 373 //
11778 /* 32147 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11779 /* 32151 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11780 /* 32155 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
11781 /* 32159 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
11782 /* 32163 */ // MIs[1] Operand 1
11783 /* 32163 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
11784 /* 32168 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11785 /* 32173 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11786 /* 32178 */ // MIs[0] rhs
11787 /* 32178 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11788 /* 32183 */ // MIs[0] lhs
11789 /* 32183 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11790 /* 32188 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11791 /* 32190 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOGT:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
11792 /* 32190 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
11793 /* 32193 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11794 /* 32195 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11795 /* 32199 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11796 /* 32203 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11797 /* 32206 */ GIR_RootConstrainSelectedInstOperands,
11798 /* 32207 */ // GIR_Coverage, 373,
11799 /* 32207 */ GIR_EraseRootFromParent_Done,
11800 /* 32208 */ // Label 967: @32208
11801 /* 32208 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 968*/ GIMT_Encode4(32276), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 374 //
11802 /* 32215 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11803 /* 32219 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11804 /* 32223 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
11805 /* 32227 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
11806 /* 32231 */ // MIs[1] Operand 1
11807 /* 32231 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
11808 /* 32236 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11809 /* 32241 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11810 /* 32246 */ // MIs[0] rhs
11811 /* 32246 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11812 /* 32251 */ // MIs[0] lhs
11813 /* 32251 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11814 /* 32256 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11815 /* 32258 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOGE:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
11816 /* 32258 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
11817 /* 32261 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11818 /* 32263 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11819 /* 32267 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11820 /* 32271 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11821 /* 32274 */ GIR_RootConstrainSelectedInstOperands,
11822 /* 32275 */ // GIR_Coverage, 374,
11823 /* 32275 */ GIR_EraseRootFromParent_Done,
11824 /* 32276 */ // Label 968: @32276
11825 /* 32276 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 969*/ GIMT_Encode4(32344), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 395 //
11826 /* 32283 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11827 /* 32287 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11828 /* 32291 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
11829 /* 32295 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
11830 /* 32299 */ // MIs[1] Operand 1
11831 /* 32299 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
11832 /* 32304 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11833 /* 32309 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11834 /* 32314 */ // MIs[0] rhs
11835 /* 32314 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11836 /* 32319 */ // MIs[0] lhs
11837 /* 32319 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11838 /* 32324 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11839 /* 32326 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs, SETOGT:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
11840 /* 32326 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
11841 /* 32329 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11842 /* 32331 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11843 /* 32335 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11844 /* 32339 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11845 /* 32342 */ GIR_RootConstrainSelectedInstOperands,
11846 /* 32343 */ // GIR_Coverage, 395,
11847 /* 32343 */ GIR_EraseRootFromParent_Done,
11848 /* 32344 */ // Label 969: @32344
11849 /* 32344 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 970*/ GIMT_Encode4(32412), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 396 //
11850 /* 32351 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11851 /* 32355 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11852 /* 32359 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
11853 /* 32363 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
11854 /* 32367 */ // MIs[1] Operand 1
11855 /* 32367 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
11856 /* 32372 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11857 /* 32377 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11858 /* 32382 */ // MIs[0] rhs
11859 /* 32382 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11860 /* 32387 */ // MIs[0] lhs
11861 /* 32387 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11862 /* 32392 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11863 /* 32394 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs, SETOGE:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
11864 /* 32394 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
11865 /* 32397 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11866 /* 32399 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11867 /* 32403 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11868 /* 32407 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11869 /* 32410 */ GIR_RootConstrainSelectedInstOperands,
11870 /* 32411 */ // GIR_Coverage, 396,
11871 /* 32411 */ GIR_EraseRootFromParent_Done,
11872 /* 32412 */ // Label 970: @32412
11873 /* 32412 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 971*/ GIMT_Encode4(32480), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 397 //
11874 /* 32419 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11875 /* 32423 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11876 /* 32427 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
11877 /* 32431 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
11878 /* 32435 */ // MIs[1] Operand 1
11879 /* 32435 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11880 /* 32440 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11881 /* 32445 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11882 /* 32450 */ // MIs[0] rhs
11883 /* 32450 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11884 /* 32455 */ // MIs[0] lhs
11885 /* 32455 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11886 /* 32460 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11887 /* 32462 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOLT:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
11888 /* 32462 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
11889 /* 32465 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11890 /* 32467 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11891 /* 32471 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11892 /* 32475 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11893 /* 32478 */ GIR_RootConstrainSelectedInstOperands,
11894 /* 32479 */ // GIR_Coverage, 397,
11895 /* 32479 */ GIR_EraseRootFromParent_Done,
11896 /* 32480 */ // Label 971: @32480
11897 /* 32480 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 972*/ GIMT_Encode4(32548), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 398 //
11898 /* 32487 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11899 /* 32491 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11900 /* 32495 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
11901 /* 32499 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
11902 /* 32503 */ // MIs[1] Operand 1
11903 /* 32503 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
11904 /* 32508 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11905 /* 32513 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11906 /* 32518 */ // MIs[0] rhs
11907 /* 32518 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11908 /* 32523 */ // MIs[0] lhs
11909 /* 32523 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11910 /* 32528 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11911 /* 32530 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOLE:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
11912 /* 32530 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
11913 /* 32533 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11914 /* 32535 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11915 /* 32539 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11916 /* 32543 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11917 /* 32546 */ GIR_RootConstrainSelectedInstOperands,
11918 /* 32547 */ // GIR_Coverage, 398,
11919 /* 32547 */ GIR_EraseRootFromParent_Done,
11920 /* 32548 */ // Label 972: @32548
11921 /* 32548 */ GIM_Reject,
11922 /* 32549 */ // Label 964: @32549
11923 /* 32549 */ GIM_Try, /*On fail goto*//*Label 973*/ GIMT_Encode4(32592), // Rule ID 1105 //
11924 /* 32554 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
11925 /* 32557 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
11926 /* 32560 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11927 /* 32564 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11928 /* 32568 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11929 /* 32572 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11930 /* 32576 */ // (vselect:{ *:[v2f64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2f64] }:$v1, V128:{ *:[v2f64] }:$v2) => (BITSELECT:{ *:[v2f64] } ?:{ *:[v2f64] }:$v1, ?:{ *:[v2f64] }:$v2, ?:{ *:[v2i64] }:$c)
11931 /* 32576 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
11932 /* 32579 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11933 /* 32581 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
11934 /* 32583 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
11935 /* 32585 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
11936 /* 32587 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11937 /* 32590 */ GIR_RootConstrainSelectedInstOperands,
11938 /* 32591 */ // GIR_Coverage, 1105,
11939 /* 32591 */ GIR_EraseRootFromParent_Done,
11940 /* 32592 */ // Label 973: @32592
11941 /* 32592 */ GIM_Reject,
11942 /* 32593 */ // Label 958: @32593
11943 /* 32593 */ GIM_Reject,
11944 /* 32594 */ // Label 854: @32594
11945 /* 32594 */ GIM_Reject,
11946 /* 32595 */ // Label 34: @32595
11947 /* 32595 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(10), GIMT_Encode2(12), /*)*//*default:*//*Label 976*/ GIMT_Encode4(32692),
11948 /* 32606 */ /*GILLT_v16i8*//*Label 974*/ GIMT_Encode4(32614),
11949 /* 32610 */ /*GILLT_v8i16*//*Label 975*/ GIMT_Encode4(32653),
11950 /* 32614 */ // Label 974: @32614
11951 /* 32614 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 977*/ GIMT_Encode4(32652), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 284 //
11952 /* 32621 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
11953 /* 32624 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
11954 /* 32627 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11955 /* 32631 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11956 /* 32635 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11957 /* 32639 */ // (uaddsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (ADD_SAT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11958 /* 32639 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_U_I8x16),
11959 /* 32644 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11960 /* 32650 */ GIR_RootConstrainSelectedInstOperands,
11961 /* 32651 */ // GIR_Coverage, 284,
11962 /* 32651 */ GIR_Done,
11963 /* 32652 */ // Label 977: @32652
11964 /* 32652 */ GIM_Reject,
11965 /* 32653 */ // Label 975: @32653
11966 /* 32653 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 978*/ GIMT_Encode4(32691), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 285 //
11967 /* 32660 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
11968 /* 32663 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
11969 /* 32666 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11970 /* 32670 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11971 /* 32674 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11972 /* 32678 */ // (uaddsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (ADD_SAT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
11973 /* 32678 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_U_I16x8),
11974 /* 32683 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11975 /* 32689 */ GIR_RootConstrainSelectedInstOperands,
11976 /* 32690 */ // GIR_Coverage, 285,
11977 /* 32690 */ GIR_Done,
11978 /* 32691 */ // Label 978: @32691
11979 /* 32691 */ GIM_Reject,
11980 /* 32692 */ // Label 976: @32692
11981 /* 32692 */ GIM_Reject,
11982 /* 32693 */ // Label 35: @32693
11983 /* 32693 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(10), GIMT_Encode2(12), /*)*//*default:*//*Label 981*/ GIMT_Encode4(32790),
11984 /* 32704 */ /*GILLT_v16i8*//*Label 979*/ GIMT_Encode4(32712),
11985 /* 32708 */ /*GILLT_v8i16*//*Label 980*/ GIMT_Encode4(32751),
11986 /* 32712 */ // Label 979: @32712
11987 /* 32712 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 982*/ GIMT_Encode4(32750), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 282 //
11988 /* 32719 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
11989 /* 32722 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
11990 /* 32725 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11991 /* 32729 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11992 /* 32733 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11993 /* 32737 */ // (saddsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (ADD_SAT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11994 /* 32737 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_S_I8x16),
11995 /* 32742 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
11996 /* 32748 */ GIR_RootConstrainSelectedInstOperands,
11997 /* 32749 */ // GIR_Coverage, 282,
11998 /* 32749 */ GIR_Done,
11999 /* 32750 */ // Label 982: @32750
12000 /* 32750 */ GIM_Reject,
12001 /* 32751 */ // Label 980: @32751
12002 /* 32751 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 983*/ GIMT_Encode4(32789), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 283 //
12003 /* 32758 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
12004 /* 32761 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
12005 /* 32764 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12006 /* 32768 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12007 /* 32772 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12008 /* 32776 */ // (saddsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (ADD_SAT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
12009 /* 32776 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_S_I16x8),
12010 /* 32781 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12011 /* 32787 */ GIR_RootConstrainSelectedInstOperands,
12012 /* 32788 */ // GIR_Coverage, 283,
12013 /* 32788 */ GIR_Done,
12014 /* 32789 */ // Label 983: @32789
12015 /* 32789 */ GIM_Reject,
12016 /* 32790 */ // Label 981: @32790
12017 /* 32790 */ GIM_Reject,
12018 /* 32791 */ // Label 36: @32791
12019 /* 32791 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(10), GIMT_Encode2(12), /*)*//*default:*//*Label 986*/ GIMT_Encode4(32888),
12020 /* 32802 */ /*GILLT_v16i8*//*Label 984*/ GIMT_Encode4(32810),
12021 /* 32806 */ /*GILLT_v8i16*//*Label 985*/ GIMT_Encode4(32849),
12022 /* 32810 */ // Label 984: @32810
12023 /* 32810 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 987*/ GIMT_Encode4(32848), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 292 //
12024 /* 32817 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
12025 /* 32820 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
12026 /* 32823 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12027 /* 32827 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12028 /* 32831 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12029 /* 32835 */ // (usubsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SUB_SAT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
12030 /* 32835 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_U_I8x16),
12031 /* 32840 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12032 /* 32846 */ GIR_RootConstrainSelectedInstOperands,
12033 /* 32847 */ // GIR_Coverage, 292,
12034 /* 32847 */ GIR_Done,
12035 /* 32848 */ // Label 987: @32848
12036 /* 32848 */ GIM_Reject,
12037 /* 32849 */ // Label 985: @32849
12038 /* 32849 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 988*/ GIMT_Encode4(32887), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 293 //
12039 /* 32856 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
12040 /* 32859 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
12041 /* 32862 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12042 /* 32866 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12043 /* 32870 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12044 /* 32874 */ // (usubsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SUB_SAT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
12045 /* 32874 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_U_I16x8),
12046 /* 32879 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12047 /* 32885 */ GIR_RootConstrainSelectedInstOperands,
12048 /* 32886 */ // GIR_Coverage, 293,
12049 /* 32886 */ GIR_Done,
12050 /* 32887 */ // Label 988: @32887
12051 /* 32887 */ GIM_Reject,
12052 /* 32888 */ // Label 986: @32888
12053 /* 32888 */ GIM_Reject,
12054 /* 32889 */ // Label 37: @32889
12055 /* 32889 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(10), GIMT_Encode2(12), /*)*//*default:*//*Label 991*/ GIMT_Encode4(32986),
12056 /* 32900 */ /*GILLT_v16i8*//*Label 989*/ GIMT_Encode4(32908),
12057 /* 32904 */ /*GILLT_v8i16*//*Label 990*/ GIMT_Encode4(32947),
12058 /* 32908 */ // Label 989: @32908
12059 /* 32908 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 992*/ GIMT_Encode4(32946), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 290 //
12060 /* 32915 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
12061 /* 32918 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
12062 /* 32921 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12063 /* 32925 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12064 /* 32929 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12065 /* 32933 */ // (ssubsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SUB_SAT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
12066 /* 32933 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_S_I8x16),
12067 /* 32938 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12068 /* 32944 */ GIR_RootConstrainSelectedInstOperands,
12069 /* 32945 */ // GIR_Coverage, 290,
12070 /* 32945 */ GIR_Done,
12071 /* 32946 */ // Label 992: @32946
12072 /* 32946 */ GIM_Reject,
12073 /* 32947 */ // Label 990: @32947
12074 /* 32947 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 993*/ GIMT_Encode4(32985), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 291 //
12075 /* 32954 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
12076 /* 32957 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
12077 /* 32960 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12078 /* 32964 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12079 /* 32968 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12080 /* 32972 */ // (ssubsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SUB_SAT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
12081 /* 32972 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_S_I16x8),
12082 /* 32977 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12083 /* 32983 */ GIR_RootConstrainSelectedInstOperands,
12084 /* 32984 */ // GIR_Coverage, 291,
12085 /* 32984 */ GIR_Done,
12086 /* 32985 */ // Label 993: @32985
12087 /* 32985 */ GIM_Reject,
12088 /* 32986 */ // Label 991: @32986
12089 /* 32986 */ GIM_Reject,
12090 /* 32987 */ // Label 38: @32987
12091 /* 32987 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(17), /*)*//*default:*//*Label 999*/ GIMT_Encode4(33241),
12092 /* 32998 */ /*GILLT_f32*//*Label 994*/ GIMT_Encode4(33050),
12093 /* 33002 */ /*GILLT_f64*//*Label 995*/ GIMT_Encode4(33087), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
12094 /* 33038 */ /*GILLT_v8f16*//*Label 996*/ GIMT_Encode4(33124),
12095 /* 33042 */ /*GILLT_v4f32*//*Label 997*/ GIMT_Encode4(33163),
12096 /* 33046 */ /*GILLT_v2f64*//*Label 998*/ GIMT_Encode4(33202),
12097 /* 33050 */ // Label 994: @33050
12098 /* 33050 */ GIM_Try, /*On fail goto*//*Label 1000*/ GIMT_Encode4(33086), // Rule ID 124 //
12099 /* 33055 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
12100 /* 33058 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
12101 /* 33061 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12102 /* 33065 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12103 /* 33069 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12104 /* 33073 */ // (fadd:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (ADD_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12105 /* 33073 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F32),
12106 /* 33078 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12107 /* 33084 */ GIR_RootConstrainSelectedInstOperands,
12108 /* 33085 */ // GIR_Coverage, 124,
12109 /* 33085 */ GIR_Done,
12110 /* 33086 */ // Label 1000: @33086
12111 /* 33086 */ GIM_Reject,
12112 /* 33087 */ // Label 995: @33087
12113 /* 33087 */ GIM_Try, /*On fail goto*//*Label 1001*/ GIMT_Encode4(33123), // Rule ID 125 //
12114 /* 33092 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
12115 /* 33095 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
12116 /* 33098 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12117 /* 33102 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12118 /* 33106 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12119 /* 33110 */ // (fadd:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (ADD_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12120 /* 33110 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F64),
12121 /* 33115 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12122 /* 33121 */ GIR_RootConstrainSelectedInstOperands,
12123 /* 33122 */ // GIR_Coverage, 125,
12124 /* 33122 */ GIR_Done,
12125 /* 33123 */ // Label 1001: @33123
12126 /* 33123 */ GIM_Reject,
12127 /* 33124 */ // Label 996: @33124
12128 /* 33124 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1002*/ GIMT_Encode4(33162), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 347 //
12129 /* 33131 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
12130 /* 33134 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
12131 /* 33137 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12132 /* 33141 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12133 /* 33145 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12134 /* 33149 */ // (fadd:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (ADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12135 /* 33149 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F16x8),
12136 /* 33154 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12137 /* 33160 */ GIR_RootConstrainSelectedInstOperands,
12138 /* 33161 */ // GIR_Coverage, 347,
12139 /* 33161 */ GIR_Done,
12140 /* 33162 */ // Label 1002: @33162
12141 /* 33162 */ GIM_Reject,
12142 /* 33163 */ // Label 997: @33163
12143 /* 33163 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1003*/ GIMT_Encode4(33201), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 345 //
12144 /* 33170 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
12145 /* 33173 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
12146 /* 33176 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12147 /* 33180 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12148 /* 33184 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12149 /* 33188 */ // (fadd:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (ADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12150 /* 33188 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F32x4),
12151 /* 33193 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12152 /* 33199 */ GIR_RootConstrainSelectedInstOperands,
12153 /* 33200 */ // GIR_Coverage, 345,
12154 /* 33200 */ GIR_Done,
12155 /* 33201 */ // Label 1003: @33201
12156 /* 33201 */ GIM_Reject,
12157 /* 33202 */ // Label 998: @33202
12158 /* 33202 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1004*/ GIMT_Encode4(33240), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 346 //
12159 /* 33209 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
12160 /* 33212 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
12161 /* 33215 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12162 /* 33219 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12163 /* 33223 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12164 /* 33227 */ // (fadd:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (ADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12165 /* 33227 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F64x2),
12166 /* 33232 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12167 /* 33238 */ GIR_RootConstrainSelectedInstOperands,
12168 /* 33239 */ // GIR_Coverage, 346,
12169 /* 33239 */ GIR_Done,
12170 /* 33240 */ // Label 1004: @33240
12171 /* 33240 */ GIM_Reject,
12172 /* 33241 */ // Label 999: @33241
12173 /* 33241 */ GIM_Reject,
12174 /* 33242 */ // Label 39: @33242
12175 /* 33242 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(17), /*)*//*default:*//*Label 1010*/ GIMT_Encode4(33496),
12176 /* 33253 */ /*GILLT_f32*//*Label 1005*/ GIMT_Encode4(33305),
12177 /* 33257 */ /*GILLT_f64*//*Label 1006*/ GIMT_Encode4(33342), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
12178 /* 33293 */ /*GILLT_v8f16*//*Label 1007*/ GIMT_Encode4(33379),
12179 /* 33297 */ /*GILLT_v4f32*//*Label 1008*/ GIMT_Encode4(33418),
12180 /* 33301 */ /*GILLT_v2f64*//*Label 1009*/ GIMT_Encode4(33457),
12181 /* 33305 */ // Label 1005: @33305
12182 /* 33305 */ GIM_Try, /*On fail goto*//*Label 1011*/ GIMT_Encode4(33341), // Rule ID 126 //
12183 /* 33310 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
12184 /* 33313 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
12185 /* 33316 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12186 /* 33320 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12187 /* 33324 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12188 /* 33328 */ // (fsub:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SUB_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12189 /* 33328 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F32),
12190 /* 33333 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12191 /* 33339 */ GIR_RootConstrainSelectedInstOperands,
12192 /* 33340 */ // GIR_Coverage, 126,
12193 /* 33340 */ GIR_Done,
12194 /* 33341 */ // Label 1011: @33341
12195 /* 33341 */ GIM_Reject,
12196 /* 33342 */ // Label 1006: @33342
12197 /* 33342 */ GIM_Try, /*On fail goto*//*Label 1012*/ GIMT_Encode4(33378), // Rule ID 127 //
12198 /* 33347 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
12199 /* 33350 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
12200 /* 33353 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12201 /* 33357 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12202 /* 33361 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12203 /* 33365 */ // (fsub:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SUB_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12204 /* 33365 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F64),
12205 /* 33370 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12206 /* 33376 */ GIR_RootConstrainSelectedInstOperands,
12207 /* 33377 */ // GIR_Coverage, 127,
12208 /* 33377 */ GIR_Done,
12209 /* 33378 */ // Label 1012: @33378
12210 /* 33378 */ GIM_Reject,
12211 /* 33379 */ // Label 1007: @33379
12212 /* 33379 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1013*/ GIMT_Encode4(33417), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 350 //
12213 /* 33386 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
12214 /* 33389 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
12215 /* 33392 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12216 /* 33396 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12217 /* 33400 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12218 /* 33404 */ // (fsub:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (SUB_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12219 /* 33404 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F16x8),
12220 /* 33409 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12221 /* 33415 */ GIR_RootConstrainSelectedInstOperands,
12222 /* 33416 */ // GIR_Coverage, 350,
12223 /* 33416 */ GIR_Done,
12224 /* 33417 */ // Label 1013: @33417
12225 /* 33417 */ GIM_Reject,
12226 /* 33418 */ // Label 1008: @33418
12227 /* 33418 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1014*/ GIMT_Encode4(33456), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 348 //
12228 /* 33425 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
12229 /* 33428 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
12230 /* 33431 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12231 /* 33435 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12232 /* 33439 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12233 /* 33443 */ // (fsub:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SUB_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12234 /* 33443 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F32x4),
12235 /* 33448 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12236 /* 33454 */ GIR_RootConstrainSelectedInstOperands,
12237 /* 33455 */ // GIR_Coverage, 348,
12238 /* 33455 */ GIR_Done,
12239 /* 33456 */ // Label 1014: @33456
12240 /* 33456 */ GIM_Reject,
12241 /* 33457 */ // Label 1009: @33457
12242 /* 33457 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1015*/ GIMT_Encode4(33495), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 349 //
12243 /* 33464 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
12244 /* 33467 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
12245 /* 33470 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12246 /* 33474 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12247 /* 33478 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12248 /* 33482 */ // (fsub:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SUB_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12249 /* 33482 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F64x2),
12250 /* 33487 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12251 /* 33493 */ GIR_RootConstrainSelectedInstOperands,
12252 /* 33494 */ // GIR_Coverage, 349,
12253 /* 33494 */ GIR_Done,
12254 /* 33495 */ // Label 1015: @33495
12255 /* 33495 */ GIM_Reject,
12256 /* 33496 */ // Label 1010: @33496
12257 /* 33496 */ GIM_Reject,
12258 /* 33497 */ // Label 40: @33497
12259 /* 33497 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(17), /*)*//*default:*//*Label 1021*/ GIMT_Encode4(33751),
12260 /* 33508 */ /*GILLT_f32*//*Label 1016*/ GIMT_Encode4(33560),
12261 /* 33512 */ /*GILLT_f64*//*Label 1017*/ GIMT_Encode4(33597), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
12262 /* 33548 */ /*GILLT_v8f16*//*Label 1018*/ GIMT_Encode4(33634),
12263 /* 33552 */ /*GILLT_v4f32*//*Label 1019*/ GIMT_Encode4(33673),
12264 /* 33556 */ /*GILLT_v2f64*//*Label 1020*/ GIMT_Encode4(33712),
12265 /* 33560 */ // Label 1016: @33560
12266 /* 33560 */ GIM_Try, /*On fail goto*//*Label 1022*/ GIMT_Encode4(33596), // Rule ID 128 //
12267 /* 33565 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
12268 /* 33568 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
12269 /* 33571 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12270 /* 33575 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12271 /* 33579 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12272 /* 33583 */ // (fmul:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (MUL_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12273 /* 33583 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F32),
12274 /* 33588 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12275 /* 33594 */ GIR_RootConstrainSelectedInstOperands,
12276 /* 33595 */ // GIR_Coverage, 128,
12277 /* 33595 */ GIR_Done,
12278 /* 33596 */ // Label 1022: @33596
12279 /* 33596 */ GIM_Reject,
12280 /* 33597 */ // Label 1017: @33597
12281 /* 33597 */ GIM_Try, /*On fail goto*//*Label 1023*/ GIMT_Encode4(33633), // Rule ID 129 //
12282 /* 33602 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
12283 /* 33605 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
12284 /* 33608 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12285 /* 33612 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12286 /* 33616 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12287 /* 33620 */ // (fmul:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (MUL_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12288 /* 33620 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F64),
12289 /* 33625 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12290 /* 33631 */ GIR_RootConstrainSelectedInstOperands,
12291 /* 33632 */ // GIR_Coverage, 129,
12292 /* 33632 */ GIR_Done,
12293 /* 33633 */ // Label 1023: @33633
12294 /* 33633 */ GIM_Reject,
12295 /* 33634 */ // Label 1018: @33634
12296 /* 33634 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1024*/ GIMT_Encode4(33672), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 353 //
12297 /* 33641 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
12298 /* 33644 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
12299 /* 33647 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12300 /* 33651 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12301 /* 33655 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12302 /* 33659 */ // (fmul:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (MUL_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12303 /* 33659 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F16x8),
12304 /* 33664 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12305 /* 33670 */ GIR_RootConstrainSelectedInstOperands,
12306 /* 33671 */ // GIR_Coverage, 353,
12307 /* 33671 */ GIR_Done,
12308 /* 33672 */ // Label 1024: @33672
12309 /* 33672 */ GIM_Reject,
12310 /* 33673 */ // Label 1019: @33673
12311 /* 33673 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1025*/ GIMT_Encode4(33711), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 351 //
12312 /* 33680 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
12313 /* 33683 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
12314 /* 33686 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12315 /* 33690 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12316 /* 33694 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12317 /* 33698 */ // (fmul:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (MUL_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12318 /* 33698 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F32x4),
12319 /* 33703 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12320 /* 33709 */ GIR_RootConstrainSelectedInstOperands,
12321 /* 33710 */ // GIR_Coverage, 351,
12322 /* 33710 */ GIR_Done,
12323 /* 33711 */ // Label 1025: @33711
12324 /* 33711 */ GIM_Reject,
12325 /* 33712 */ // Label 1020: @33712
12326 /* 33712 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1026*/ GIMT_Encode4(33750), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 352 //
12327 /* 33719 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
12328 /* 33722 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
12329 /* 33725 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12330 /* 33729 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12331 /* 33733 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12332 /* 33737 */ // (fmul:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (MUL_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12333 /* 33737 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F64x2),
12334 /* 33742 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12335 /* 33748 */ GIR_RootConstrainSelectedInstOperands,
12336 /* 33749 */ // GIR_Coverage, 352,
12337 /* 33749 */ GIR_Done,
12338 /* 33750 */ // Label 1026: @33750
12339 /* 33750 */ GIM_Reject,
12340 /* 33751 */ // Label 1021: @33751
12341 /* 33751 */ GIM_Reject,
12342 /* 33752 */ // Label 41: @33752
12343 /* 33752 */ GIM_Try, /*On fail goto*//*Label 1027*/ GIMT_Encode4(33912),
12344 /* 33757 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
12345 /* 33760 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
12346 /* 33763 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
12347 /* 33766 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
12348 /* 33769 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12349 /* 33773 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1028*/ GIMT_Encode4(33825), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 458 //
12350 /* 33780 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12351 /* 33784 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FNEG),
12352 /* 33788 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8f16,
12353 /* 33792 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12354 /* 33797 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12355 /* 33801 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12356 /* 33805 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12357 /* 33807 */ // (fma:{ *:[v8f16] } (fneg:{ *:[v8f16] } V128:{ *:[v8f16] }:$a), V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (NMADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
12358 /* 33807 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F16x8),
12359 /* 33810 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12360 /* 33812 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // a
12361 /* 33816 */ GIR_RootToRootCopy, /*OpIdx*/2, // b
12362 /* 33818 */ GIR_RootToRootCopy, /*OpIdx*/3, // c
12363 /* 33820 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12364 /* 33823 */ GIR_RootConstrainSelectedInstOperands,
12365 /* 33824 */ // GIR_Coverage, 458,
12366 /* 33824 */ GIR_EraseRootFromParent_Done,
12367 /* 33825 */ // Label 1028: @33825
12368 /* 33825 */ GIM_Try, /*On fail goto*//*Label 1029*/ GIMT_Encode4(33911),
12369 /* 33830 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12370 /* 33834 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1030*/ GIMT_Encode4(33882), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 1351 //
12371 /* 33841 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
12372 /* 33845 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FNEG),
12373 /* 33849 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8f16,
12374 /* 33853 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12375 /* 33858 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12376 /* 33862 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12377 /* 33864 */ // (fma:{ *:[v8f16] } V128:{ *:[v8f16] }:$b, (fneg:{ *:[v8f16] } V128:{ *:[v8f16] }:$a), V128:{ *:[v8f16] }:$c) => (NMADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
12378 /* 33864 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F16x8),
12379 /* 33867 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12380 /* 33869 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // a
12381 /* 33873 */ GIR_RootToRootCopy, /*OpIdx*/1, // b
12382 /* 33875 */ GIR_RootToRootCopy, /*OpIdx*/3, // c
12383 /* 33877 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12384 /* 33880 */ GIR_RootConstrainSelectedInstOperands,
12385 /* 33881 */ // GIR_Coverage, 1351,
12386 /* 33881 */ GIR_EraseRootFromParent_Done,
12387 /* 33882 */ // Label 1030: @33882
12388 /* 33882 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1031*/ GIMT_Encode4(33910), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 457 //
12389 /* 33889 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12390 /* 33893 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12391 /* 33897 */ // (fma:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (MADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
12392 /* 33897 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F16x8),
12393 /* 33902 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12394 /* 33908 */ GIR_RootConstrainSelectedInstOperands,
12395 /* 33909 */ // GIR_Coverage, 457,
12396 /* 33909 */ GIR_Done,
12397 /* 33910 */ // Label 1031: @33910
12398 /* 33910 */ GIM_Reject,
12399 /* 33911 */ // Label 1029: @33911
12400 /* 33911 */ GIM_Reject,
12401 /* 33912 */ // Label 1027: @33912
12402 /* 33912 */ GIM_Reject,
12403 /* 33913 */ // Label 42: @33913
12404 /* 33913 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(17), /*)*//*default:*//*Label 1037*/ GIMT_Encode4(34167),
12405 /* 33924 */ /*GILLT_f32*//*Label 1032*/ GIMT_Encode4(33976),
12406 /* 33928 */ /*GILLT_f64*//*Label 1033*/ GIMT_Encode4(34013), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
12407 /* 33964 */ /*GILLT_v8f16*//*Label 1034*/ GIMT_Encode4(34050),
12408 /* 33968 */ /*GILLT_v4f32*//*Label 1035*/ GIMT_Encode4(34089),
12409 /* 33972 */ /*GILLT_v2f64*//*Label 1036*/ GIMT_Encode4(34128),
12410 /* 33976 */ // Label 1032: @33976
12411 /* 33976 */ GIM_Try, /*On fail goto*//*Label 1038*/ GIMT_Encode4(34012), // Rule ID 130 //
12412 /* 33981 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
12413 /* 33984 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
12414 /* 33987 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12415 /* 33991 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12416 /* 33995 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12417 /* 33999 */ // (fdiv:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (DIV_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12418 /* 33999 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F32),
12419 /* 34004 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12420 /* 34010 */ GIR_RootConstrainSelectedInstOperands,
12421 /* 34011 */ // GIR_Coverage, 130,
12422 /* 34011 */ GIR_Done,
12423 /* 34012 */ // Label 1038: @34012
12424 /* 34012 */ GIM_Reject,
12425 /* 34013 */ // Label 1033: @34013
12426 /* 34013 */ GIM_Try, /*On fail goto*//*Label 1039*/ GIMT_Encode4(34049), // Rule ID 131 //
12427 /* 34018 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
12428 /* 34021 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
12429 /* 34024 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12430 /* 34028 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12431 /* 34032 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12432 /* 34036 */ // (fdiv:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (DIV_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12433 /* 34036 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F64),
12434 /* 34041 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12435 /* 34047 */ GIR_RootConstrainSelectedInstOperands,
12436 /* 34048 */ // GIR_Coverage, 131,
12437 /* 34048 */ GIR_Done,
12438 /* 34049 */ // Label 1039: @34049
12439 /* 34049 */ GIM_Reject,
12440 /* 34050 */ // Label 1034: @34050
12441 /* 34050 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1040*/ GIMT_Encode4(34088), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 356 //
12442 /* 34057 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
12443 /* 34060 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
12444 /* 34063 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12445 /* 34067 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12446 /* 34071 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12447 /* 34075 */ // (fdiv:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (DIV_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12448 /* 34075 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F16x8),
12449 /* 34080 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12450 /* 34086 */ GIR_RootConstrainSelectedInstOperands,
12451 /* 34087 */ // GIR_Coverage, 356,
12452 /* 34087 */ GIR_Done,
12453 /* 34088 */ // Label 1040: @34088
12454 /* 34088 */ GIM_Reject,
12455 /* 34089 */ // Label 1035: @34089
12456 /* 34089 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1041*/ GIMT_Encode4(34127), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 354 //
12457 /* 34096 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
12458 /* 34099 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
12459 /* 34102 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12460 /* 34106 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12461 /* 34110 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12462 /* 34114 */ // (fdiv:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (DIV_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12463 /* 34114 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F32x4),
12464 /* 34119 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12465 /* 34125 */ GIR_RootConstrainSelectedInstOperands,
12466 /* 34126 */ // GIR_Coverage, 354,
12467 /* 34126 */ GIR_Done,
12468 /* 34127 */ // Label 1041: @34127
12469 /* 34127 */ GIM_Reject,
12470 /* 34128 */ // Label 1036: @34128
12471 /* 34128 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1042*/ GIMT_Encode4(34166), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 355 //
12472 /* 34135 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
12473 /* 34138 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
12474 /* 34141 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12475 /* 34145 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12476 /* 34149 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12477 /* 34153 */ // (fdiv:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (DIV_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12478 /* 34153 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F64x2),
12479 /* 34158 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12480 /* 34164 */ GIR_RootConstrainSelectedInstOperands,
12481 /* 34165 */ // GIR_Coverage, 355,
12482 /* 34165 */ GIR_Done,
12483 /* 34166 */ // Label 1042: @34166
12484 /* 34166 */ GIM_Reject,
12485 /* 34167 */ // Label 1037: @34167
12486 /* 34167 */ GIM_Reject,
12487 /* 34168 */ // Label 43: @34168
12488 /* 34168 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(17), /*)*//*default:*//*Label 1048*/ GIMT_Encode4(34387),
12489 /* 34179 */ /*GILLT_f32*//*Label 1043*/ GIMT_Encode4(34231),
12490 /* 34183 */ /*GILLT_f64*//*Label 1044*/ GIMT_Encode4(34261), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
12491 /* 34219 */ /*GILLT_v8f16*//*Label 1045*/ GIMT_Encode4(34291),
12492 /* 34223 */ /*GILLT_v4f32*//*Label 1046*/ GIMT_Encode4(34323),
12493 /* 34227 */ /*GILLT_v2f64*//*Label 1047*/ GIMT_Encode4(34355),
12494 /* 34231 */ // Label 1043: @34231
12495 /* 34231 */ GIM_Try, /*On fail goto*//*Label 1049*/ GIMT_Encode4(34260), // Rule ID 136 //
12496 /* 34236 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
12497 /* 34239 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12498 /* 34243 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12499 /* 34247 */ // (fneg:{ *:[f32] } F32:{ *:[f32] }:$src) => (NEG_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
12500 /* 34247 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F32),
12501 /* 34252 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12502 /* 34258 */ GIR_RootConstrainSelectedInstOperands,
12503 /* 34259 */ // GIR_Coverage, 136,
12504 /* 34259 */ GIR_Done,
12505 /* 34260 */ // Label 1049: @34260
12506 /* 34260 */ GIM_Reject,
12507 /* 34261 */ // Label 1044: @34261
12508 /* 34261 */ GIM_Try, /*On fail goto*//*Label 1050*/ GIMT_Encode4(34290), // Rule ID 137 //
12509 /* 34266 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
12510 /* 34269 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12511 /* 34273 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12512 /* 34277 */ // (fneg:{ *:[f64] } F64:{ *:[f64] }:$src) => (NEG_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
12513 /* 34277 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F64),
12514 /* 34282 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12515 /* 34288 */ GIR_RootConstrainSelectedInstOperands,
12516 /* 34289 */ // GIR_Coverage, 137,
12517 /* 34289 */ GIR_Done,
12518 /* 34290 */ // Label 1050: @34290
12519 /* 34290 */ GIM_Reject,
12520 /* 34291 */ // Label 1045: @34291
12521 /* 34291 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1051*/ GIMT_Encode4(34322), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 329 //
12522 /* 34298 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
12523 /* 34301 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12524 /* 34305 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12525 /* 34309 */ // (fneg:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (NEG_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
12526 /* 34309 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F16x8),
12527 /* 34314 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12528 /* 34320 */ GIR_RootConstrainSelectedInstOperands,
12529 /* 34321 */ // GIR_Coverage, 329,
12530 /* 34321 */ GIR_Done,
12531 /* 34322 */ // Label 1051: @34322
12532 /* 34322 */ GIM_Reject,
12533 /* 34323 */ // Label 1046: @34323
12534 /* 34323 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1052*/ GIMT_Encode4(34354), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 327 //
12535 /* 34330 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
12536 /* 34333 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12537 /* 34337 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12538 /* 34341 */ // (fneg:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (NEG_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
12539 /* 34341 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F32x4),
12540 /* 34346 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12541 /* 34352 */ GIR_RootConstrainSelectedInstOperands,
12542 /* 34353 */ // GIR_Coverage, 327,
12543 /* 34353 */ GIR_Done,
12544 /* 34354 */ // Label 1052: @34354
12545 /* 34354 */ GIM_Reject,
12546 /* 34355 */ // Label 1047: @34355
12547 /* 34355 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1053*/ GIMT_Encode4(34386), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 328 //
12548 /* 34362 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
12549 /* 34365 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12550 /* 34369 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12551 /* 34373 */ // (fneg:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (NEG_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
12552 /* 34373 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F64x2),
12553 /* 34378 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12554 /* 34384 */ GIR_RootConstrainSelectedInstOperands,
12555 /* 34385 */ // GIR_Coverage, 328,
12556 /* 34385 */ GIR_Done,
12557 /* 34386 */ // Label 1053: @34386
12558 /* 34386 */ GIM_Reject,
12559 /* 34387 */ // Label 1048: @34387
12560 /* 34387 */ GIM_Reject,
12561 /* 34388 */ // Label 44: @34388
12562 /* 34388 */ GIM_Try, /*On fail goto*//*Label 1054*/ GIMT_Encode4(34420), // Rule ID 58 //
12563 /* 34393 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_f64,
12564 /* 34396 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
12565 /* 34399 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12566 /* 34403 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12567 /* 34407 */ // (fpextend:{ *:[f64] } F32:{ *:[f32] }:$src) => (F64_PROMOTE_F32:{ *:[f64] } F32:{ *:[f32] }:$src)
12568 /* 34407 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_PROMOTE_F32),
12569 /* 34412 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12570 /* 34418 */ GIR_RootConstrainSelectedInstOperands,
12571 /* 34419 */ // GIR_Coverage, 58,
12572 /* 34419 */ GIR_Done,
12573 /* 34420 */ // Label 1054: @34420
12574 /* 34420 */ GIM_Reject,
12575 /* 34421 */ // Label 45: @34421
12576 /* 34421 */ GIM_Try, /*On fail goto*//*Label 1055*/ GIMT_Encode4(34453), // Rule ID 59 //
12577 /* 34426 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_f32,
12578 /* 34429 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
12579 /* 34432 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12580 /* 34436 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12581 /* 34440 */ // (fpround:{ *:[f32] } F64:{ *:[f64] }:$src) => (F32_DEMOTE_F64:{ *:[f32] } F64:{ *:[f64] }:$src)
12582 /* 34440 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_DEMOTE_F64),
12583 /* 34445 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12584 /* 34451 */ GIR_RootConstrainSelectedInstOperands,
12585 /* 34452 */ // GIR_Coverage, 59,
12586 /* 34452 */ GIR_Done,
12587 /* 34453 */ // Label 1055: @34453
12588 /* 34453 */ GIM_Reject,
12589 /* 34454 */ // Label 46: @34454
12590 /* 34454 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(13), /*)*//*default:*//*Label 1060*/ GIMT_Encode4(34833),
12591 /* 34465 */ /*GILLT_i32*//*Label 1056*/ GIMT_Encode4(34509),
12592 /* 34469 */ /*GILLT_i64*//*Label 1057*/ GIMT_Encode4(34639), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
12593 /* 34501 */ /*GILLT_v8i16*//*Label 1058*/ GIMT_Encode4(34769),
12594 /* 34505 */ /*GILLT_v4i32*//*Label 1059*/ GIMT_Encode4(34801),
12595 /* 34509 */ // Label 1056: @34509
12596 /* 34509 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1063*/ GIMT_Encode4(34638),
12597 /* 34520 */ /*GILLT_f32*//*Label 1061*/ GIMT_Encode4(34528),
12598 /* 34524 */ /*GILLT_f64*//*Label 1062*/ GIMT_Encode4(34583),
12599 /* 34528 */ // Label 1061: @34528
12600 /* 34528 */ GIM_Try, /*On fail goto*//*Label 1064*/ GIMT_Encode4(34582),
12601 /* 34533 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12602 /* 34537 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12603 /* 34541 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1065*/ GIMT_Encode4(34561), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 34 //
12604 /* 34548 */ // (fp_to_sint:{ *:[i32] } F32:{ *:[f32] }:$src) => (I32_TRUNC_S_SAT_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
12605 /* 34548 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_SAT_F32),
12606 /* 34553 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12607 /* 34559 */ GIR_RootConstrainSelectedInstOperands,
12608 /* 34560 */ // GIR_Coverage, 34,
12609 /* 34560 */ GIR_Done,
12610 /* 34561 */ // Label 1065: @34561
12611 /* 34561 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1066*/ GIMT_Encode4(34581), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 42 //
12612 /* 34568 */ // (fp_to_sint:{ *:[i32] } F32:{ *:[f32] }:$src) => (FP_TO_SINT_I32_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
12613 /* 34568 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I32_F32),
12614 /* 34573 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12615 /* 34579 */ GIR_RootConstrainSelectedInstOperands,
12616 /* 34580 */ // GIR_Coverage, 42,
12617 /* 34580 */ GIR_Done,
12618 /* 34581 */ // Label 1066: @34581
12619 /* 34581 */ GIM_Reject,
12620 /* 34582 */ // Label 1064: @34582
12621 /* 34582 */ GIM_Reject,
12622 /* 34583 */ // Label 1062: @34583
12623 /* 34583 */ GIM_Try, /*On fail goto*//*Label 1067*/ GIMT_Encode4(34637),
12624 /* 34588 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12625 /* 34592 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12626 /* 34596 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1068*/ GIMT_Encode4(34616), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 38 //
12627 /* 34603 */ // (fp_to_sint:{ *:[i32] } F64:{ *:[f64] }:$src) => (I32_TRUNC_S_SAT_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
12628 /* 34603 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_SAT_F64),
12629 /* 34608 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12630 /* 34614 */ GIR_RootConstrainSelectedInstOperands,
12631 /* 34615 */ // GIR_Coverage, 38,
12632 /* 34615 */ GIR_Done,
12633 /* 34616 */ // Label 1068: @34616
12634 /* 34616 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1069*/ GIMT_Encode4(34636), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 46 //
12635 /* 34623 */ // (fp_to_sint:{ *:[i32] } F64:{ *:[f64] }:$src) => (FP_TO_SINT_I32_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
12636 /* 34623 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I32_F64),
12637 /* 34628 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12638 /* 34634 */ GIR_RootConstrainSelectedInstOperands,
12639 /* 34635 */ // GIR_Coverage, 46,
12640 /* 34635 */ GIR_Done,
12641 /* 34636 */ // Label 1069: @34636
12642 /* 34636 */ GIM_Reject,
12643 /* 34637 */ // Label 1067: @34637
12644 /* 34637 */ GIM_Reject,
12645 /* 34638 */ // Label 1063: @34638
12646 /* 34638 */ GIM_Reject,
12647 /* 34639 */ // Label 1057: @34639
12648 /* 34639 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1072*/ GIMT_Encode4(34768),
12649 /* 34650 */ /*GILLT_f32*//*Label 1070*/ GIMT_Encode4(34658),
12650 /* 34654 */ /*GILLT_f64*//*Label 1071*/ GIMT_Encode4(34713),
12651 /* 34658 */ // Label 1070: @34658
12652 /* 34658 */ GIM_Try, /*On fail goto*//*Label 1073*/ GIMT_Encode4(34712),
12653 /* 34663 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12654 /* 34667 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12655 /* 34671 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1074*/ GIMT_Encode4(34691), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 36 //
12656 /* 34678 */ // (fp_to_sint:{ *:[i64] } F32:{ *:[f32] }:$src) => (I64_TRUNC_S_SAT_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
12657 /* 34678 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_SAT_F32),
12658 /* 34683 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12659 /* 34689 */ GIR_RootConstrainSelectedInstOperands,
12660 /* 34690 */ // GIR_Coverage, 36,
12661 /* 34690 */ GIR_Done,
12662 /* 34691 */ // Label 1074: @34691
12663 /* 34691 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1075*/ GIMT_Encode4(34711), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 44 //
12664 /* 34698 */ // (fp_to_sint:{ *:[i64] } F32:{ *:[f32] }:$src) => (FP_TO_SINT_I64_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
12665 /* 34698 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I64_F32),
12666 /* 34703 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12667 /* 34709 */ GIR_RootConstrainSelectedInstOperands,
12668 /* 34710 */ // GIR_Coverage, 44,
12669 /* 34710 */ GIR_Done,
12670 /* 34711 */ // Label 1075: @34711
12671 /* 34711 */ GIM_Reject,
12672 /* 34712 */ // Label 1073: @34712
12673 /* 34712 */ GIM_Reject,
12674 /* 34713 */ // Label 1071: @34713
12675 /* 34713 */ GIM_Try, /*On fail goto*//*Label 1076*/ GIMT_Encode4(34767),
12676 /* 34718 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12677 /* 34722 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12678 /* 34726 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1077*/ GIMT_Encode4(34746), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 40 //
12679 /* 34733 */ // (fp_to_sint:{ *:[i64] } F64:{ *:[f64] }:$src) => (I64_TRUNC_S_SAT_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
12680 /* 34733 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_SAT_F64),
12681 /* 34738 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12682 /* 34744 */ GIR_RootConstrainSelectedInstOperands,
12683 /* 34745 */ // GIR_Coverage, 40,
12684 /* 34745 */ GIR_Done,
12685 /* 34746 */ // Label 1077: @34746
12686 /* 34746 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1078*/ GIMT_Encode4(34766), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 48 //
12687 /* 34753 */ // (fp_to_sint:{ *:[i64] } F64:{ *:[f64] }:$src) => (FP_TO_SINT_I64_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
12688 /* 34753 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I64_F64),
12689 /* 34758 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12690 /* 34764 */ GIR_RootConstrainSelectedInstOperands,
12691 /* 34765 */ // GIR_Coverage, 48,
12692 /* 34765 */ GIR_Done,
12693 /* 34766 */ // Label 1078: @34766
12694 /* 34766 */ GIM_Reject,
12695 /* 34767 */ // Label 1076: @34767
12696 /* 34767 */ GIM_Reject,
12697 /* 34768 */ // Label 1072: @34768
12698 /* 34768 */ GIM_Reject,
12699 /* 34769 */ // Label 1058: @34769
12700 /* 34769 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1079*/ GIMT_Encode4(34800), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 413 //
12701 /* 34776 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
12702 /* 34779 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12703 /* 34783 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12704 /* 34787 */ // (fp_to_sint:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec) => (fp_to_sint_I16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec)
12705 /* 34787 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_sint_I16x8),
12706 /* 34792 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12707 /* 34798 */ GIR_RootConstrainSelectedInstOperands,
12708 /* 34799 */ // GIR_Coverage, 413,
12709 /* 34799 */ GIR_Done,
12710 /* 34800 */ // Label 1079: @34800
12711 /* 34800 */ GIM_Reject,
12712 /* 34801 */ // Label 1059: @34801
12713 /* 34801 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1080*/ GIMT_Encode4(34832), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 411 //
12714 /* 34808 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
12715 /* 34811 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12716 /* 34815 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12717 /* 34819 */ // (fp_to_sint:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec) => (fp_to_sint_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
12718 /* 34819 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_sint_I32x4),
12719 /* 34824 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12720 /* 34830 */ GIR_RootConstrainSelectedInstOperands,
12721 /* 34831 */ // GIR_Coverage, 411,
12722 /* 34831 */ GIR_Done,
12723 /* 34832 */ // Label 1080: @34832
12724 /* 34832 */ GIM_Reject,
12725 /* 34833 */ // Label 1060: @34833
12726 /* 34833 */ GIM_Reject,
12727 /* 34834 */ // Label 47: @34834
12728 /* 34834 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(13), /*)*//*default:*//*Label 1085*/ GIMT_Encode4(35213),
12729 /* 34845 */ /*GILLT_i32*//*Label 1081*/ GIMT_Encode4(34889),
12730 /* 34849 */ /*GILLT_i64*//*Label 1082*/ GIMT_Encode4(35019), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
12731 /* 34881 */ /*GILLT_v8i16*//*Label 1083*/ GIMT_Encode4(35149),
12732 /* 34885 */ /*GILLT_v4i32*//*Label 1084*/ GIMT_Encode4(35181),
12733 /* 34889 */ // Label 1081: @34889
12734 /* 34889 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1088*/ GIMT_Encode4(35018),
12735 /* 34900 */ /*GILLT_f32*//*Label 1086*/ GIMT_Encode4(34908),
12736 /* 34904 */ /*GILLT_f64*//*Label 1087*/ GIMT_Encode4(34963),
12737 /* 34908 */ // Label 1086: @34908
12738 /* 34908 */ GIM_Try, /*On fail goto*//*Label 1089*/ GIMT_Encode4(34962),
12739 /* 34913 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12740 /* 34917 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12741 /* 34921 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1090*/ GIMT_Encode4(34941), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 35 //
12742 /* 34928 */ // (fp_to_uint:{ *:[i32] } F32:{ *:[f32] }:$src) => (I32_TRUNC_U_SAT_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
12743 /* 34928 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_SAT_F32),
12744 /* 34933 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12745 /* 34939 */ GIR_RootConstrainSelectedInstOperands,
12746 /* 34940 */ // GIR_Coverage, 35,
12747 /* 34940 */ GIR_Done,
12748 /* 34941 */ // Label 1090: @34941
12749 /* 34941 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1091*/ GIMT_Encode4(34961), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 43 //
12750 /* 34948 */ // (fp_to_uint:{ *:[i32] } F32:{ *:[f32] }:$src) => (FP_TO_UINT_I32_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
12751 /* 34948 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I32_F32),
12752 /* 34953 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12753 /* 34959 */ GIR_RootConstrainSelectedInstOperands,
12754 /* 34960 */ // GIR_Coverage, 43,
12755 /* 34960 */ GIR_Done,
12756 /* 34961 */ // Label 1091: @34961
12757 /* 34961 */ GIM_Reject,
12758 /* 34962 */ // Label 1089: @34962
12759 /* 34962 */ GIM_Reject,
12760 /* 34963 */ // Label 1087: @34963
12761 /* 34963 */ GIM_Try, /*On fail goto*//*Label 1092*/ GIMT_Encode4(35017),
12762 /* 34968 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12763 /* 34972 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12764 /* 34976 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1093*/ GIMT_Encode4(34996), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 39 //
12765 /* 34983 */ // (fp_to_uint:{ *:[i32] } F64:{ *:[f64] }:$src) => (I32_TRUNC_U_SAT_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
12766 /* 34983 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_SAT_F64),
12767 /* 34988 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12768 /* 34994 */ GIR_RootConstrainSelectedInstOperands,
12769 /* 34995 */ // GIR_Coverage, 39,
12770 /* 34995 */ GIR_Done,
12771 /* 34996 */ // Label 1093: @34996
12772 /* 34996 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1094*/ GIMT_Encode4(35016), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 47 //
12773 /* 35003 */ // (fp_to_uint:{ *:[i32] } F64:{ *:[f64] }:$src) => (FP_TO_UINT_I32_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
12774 /* 35003 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I32_F64),
12775 /* 35008 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12776 /* 35014 */ GIR_RootConstrainSelectedInstOperands,
12777 /* 35015 */ // GIR_Coverage, 47,
12778 /* 35015 */ GIR_Done,
12779 /* 35016 */ // Label 1094: @35016
12780 /* 35016 */ GIM_Reject,
12781 /* 35017 */ // Label 1092: @35017
12782 /* 35017 */ GIM_Reject,
12783 /* 35018 */ // Label 1088: @35018
12784 /* 35018 */ GIM_Reject,
12785 /* 35019 */ // Label 1082: @35019
12786 /* 35019 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1097*/ GIMT_Encode4(35148),
12787 /* 35030 */ /*GILLT_f32*//*Label 1095*/ GIMT_Encode4(35038),
12788 /* 35034 */ /*GILLT_f64*//*Label 1096*/ GIMT_Encode4(35093),
12789 /* 35038 */ // Label 1095: @35038
12790 /* 35038 */ GIM_Try, /*On fail goto*//*Label 1098*/ GIMT_Encode4(35092),
12791 /* 35043 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12792 /* 35047 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12793 /* 35051 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1099*/ GIMT_Encode4(35071), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 37 //
12794 /* 35058 */ // (fp_to_uint:{ *:[i64] } F32:{ *:[f32] }:$src) => (I64_TRUNC_U_SAT_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
12795 /* 35058 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_SAT_F32),
12796 /* 35063 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12797 /* 35069 */ GIR_RootConstrainSelectedInstOperands,
12798 /* 35070 */ // GIR_Coverage, 37,
12799 /* 35070 */ GIR_Done,
12800 /* 35071 */ // Label 1099: @35071
12801 /* 35071 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1100*/ GIMT_Encode4(35091), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 45 //
12802 /* 35078 */ // (fp_to_uint:{ *:[i64] } F32:{ *:[f32] }:$src) => (FP_TO_UINT_I64_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
12803 /* 35078 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I64_F32),
12804 /* 35083 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12805 /* 35089 */ GIR_RootConstrainSelectedInstOperands,
12806 /* 35090 */ // GIR_Coverage, 45,
12807 /* 35090 */ GIR_Done,
12808 /* 35091 */ // Label 1100: @35091
12809 /* 35091 */ GIM_Reject,
12810 /* 35092 */ // Label 1098: @35092
12811 /* 35092 */ GIM_Reject,
12812 /* 35093 */ // Label 1096: @35093
12813 /* 35093 */ GIM_Try, /*On fail goto*//*Label 1101*/ GIMT_Encode4(35147),
12814 /* 35098 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12815 /* 35102 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12816 /* 35106 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1102*/ GIMT_Encode4(35126), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 41 //
12817 /* 35113 */ // (fp_to_uint:{ *:[i64] } F64:{ *:[f64] }:$src) => (I64_TRUNC_U_SAT_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
12818 /* 35113 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_SAT_F64),
12819 /* 35118 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12820 /* 35124 */ GIR_RootConstrainSelectedInstOperands,
12821 /* 35125 */ // GIR_Coverage, 41,
12822 /* 35125 */ GIR_Done,
12823 /* 35126 */ // Label 1102: @35126
12824 /* 35126 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1103*/ GIMT_Encode4(35146), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 49 //
12825 /* 35133 */ // (fp_to_uint:{ *:[i64] } F64:{ *:[f64] }:$src) => (FP_TO_UINT_I64_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
12826 /* 35133 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I64_F64),
12827 /* 35138 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12828 /* 35144 */ GIR_RootConstrainSelectedInstOperands,
12829 /* 35145 */ // GIR_Coverage, 49,
12830 /* 35145 */ GIR_Done,
12831 /* 35146 */ // Label 1103: @35146
12832 /* 35146 */ GIM_Reject,
12833 /* 35147 */ // Label 1101: @35147
12834 /* 35147 */ GIM_Reject,
12835 /* 35148 */ // Label 1097: @35148
12836 /* 35148 */ GIM_Reject,
12837 /* 35149 */ // Label 1083: @35149
12838 /* 35149 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1104*/ GIMT_Encode4(35180), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 414 //
12839 /* 35156 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
12840 /* 35159 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12841 /* 35163 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12842 /* 35167 */ // (fp_to_uint:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec) => (fp_to_uint_I16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec)
12843 /* 35167 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_uint_I16x8),
12844 /* 35172 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12845 /* 35178 */ GIR_RootConstrainSelectedInstOperands,
12846 /* 35179 */ // GIR_Coverage, 414,
12847 /* 35179 */ GIR_Done,
12848 /* 35180 */ // Label 1104: @35180
12849 /* 35180 */ GIM_Reject,
12850 /* 35181 */ // Label 1084: @35181
12851 /* 35181 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1105*/ GIMT_Encode4(35212), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 412 //
12852 /* 35188 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
12853 /* 35191 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12854 /* 35195 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12855 /* 35199 */ // (fp_to_uint:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec) => (fp_to_uint_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
12856 /* 35199 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_uint_I32x4),
12857 /* 35204 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12858 /* 35210 */ GIR_RootConstrainSelectedInstOperands,
12859 /* 35211 */ // GIR_Coverage, 412,
12860 /* 35211 */ GIR_Done,
12861 /* 35212 */ // Label 1105: @35212
12862 /* 35212 */ GIM_Reject,
12863 /* 35213 */ // Label 1085: @35213
12864 /* 35213 */ GIM_Reject,
12865 /* 35214 */ // Label 48: @35214
12866 /* 35214 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(16), /*)*//*default:*//*Label 1110*/ GIMT_Encode4(35485),
12867 /* 35225 */ /*GILLT_f32*//*Label 1106*/ GIMT_Encode4(35273),
12868 /* 35229 */ /*GILLT_f64*//*Label 1107*/ GIMT_Encode4(35347), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
12869 /* 35265 */ /*GILLT_v8f16*//*Label 1108*/ GIMT_Encode4(35421),
12870 /* 35269 */ /*GILLT_v4f32*//*Label 1109*/ GIMT_Encode4(35453),
12871 /* 35273 */ // Label 1106: @35273
12872 /* 35273 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1113*/ GIMT_Encode4(35346),
12873 /* 35284 */ /*GILLT_i32*//*Label 1111*/ GIMT_Encode4(35292),
12874 /* 35288 */ /*GILLT_i64*//*Label 1112*/ GIMT_Encode4(35319),
12875 /* 35292 */ // Label 1111: @35292
12876 /* 35292 */ GIM_Try, /*On fail goto*//*Label 1114*/ GIMT_Encode4(35318), // Rule ID 50 //
12877 /* 35297 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12878 /* 35301 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12879 /* 35305 */ // (sint_to_fp:{ *:[f32] } I32:{ *:[i32] }:$src) => (F32_CONVERT_S_I32:{ *:[f32] } I32:{ *:[i32] }:$src)
12880 /* 35305 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_S_I32),
12881 /* 35310 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12882 /* 35316 */ GIR_RootConstrainSelectedInstOperands,
12883 /* 35317 */ // GIR_Coverage, 50,
12884 /* 35317 */ GIR_Done,
12885 /* 35318 */ // Label 1114: @35318
12886 /* 35318 */ GIM_Reject,
12887 /* 35319 */ // Label 1112: @35319
12888 /* 35319 */ GIM_Try, /*On fail goto*//*Label 1115*/ GIMT_Encode4(35345), // Rule ID 54 //
12889 /* 35324 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12890 /* 35328 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12891 /* 35332 */ // (sint_to_fp:{ *:[f32] } I64:{ *:[i64] }:$src) => (F32_CONVERT_S_I64:{ *:[f32] } I64:{ *:[i64] }:$src)
12892 /* 35332 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_S_I64),
12893 /* 35337 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12894 /* 35343 */ GIR_RootConstrainSelectedInstOperands,
12895 /* 35344 */ // GIR_Coverage, 54,
12896 /* 35344 */ GIR_Done,
12897 /* 35345 */ // Label 1115: @35345
12898 /* 35345 */ GIM_Reject,
12899 /* 35346 */ // Label 1113: @35346
12900 /* 35346 */ GIM_Reject,
12901 /* 35347 */ // Label 1107: @35347
12902 /* 35347 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1118*/ GIMT_Encode4(35420),
12903 /* 35358 */ /*GILLT_i32*//*Label 1116*/ GIMT_Encode4(35366),
12904 /* 35362 */ /*GILLT_i64*//*Label 1117*/ GIMT_Encode4(35393),
12905 /* 35366 */ // Label 1116: @35366
12906 /* 35366 */ GIM_Try, /*On fail goto*//*Label 1119*/ GIMT_Encode4(35392), // Rule ID 52 //
12907 /* 35371 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12908 /* 35375 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12909 /* 35379 */ // (sint_to_fp:{ *:[f64] } I32:{ *:[i32] }:$src) => (F64_CONVERT_S_I32:{ *:[f64] } I32:{ *:[i32] }:$src)
12910 /* 35379 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_S_I32),
12911 /* 35384 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12912 /* 35390 */ GIR_RootConstrainSelectedInstOperands,
12913 /* 35391 */ // GIR_Coverage, 52,
12914 /* 35391 */ GIR_Done,
12915 /* 35392 */ // Label 1119: @35392
12916 /* 35392 */ GIM_Reject,
12917 /* 35393 */ // Label 1117: @35393
12918 /* 35393 */ GIM_Try, /*On fail goto*//*Label 1120*/ GIMT_Encode4(35419), // Rule ID 56 //
12919 /* 35398 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12920 /* 35402 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12921 /* 35406 */ // (sint_to_fp:{ *:[f64] } I64:{ *:[i64] }:$src) => (F64_CONVERT_S_I64:{ *:[f64] } I64:{ *:[i64] }:$src)
12922 /* 35406 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_S_I64),
12923 /* 35411 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12924 /* 35417 */ GIR_RootConstrainSelectedInstOperands,
12925 /* 35418 */ // GIR_Coverage, 56,
12926 /* 35418 */ GIR_Done,
12927 /* 35419 */ // Label 1120: @35419
12928 /* 35419 */ GIM_Reject,
12929 /* 35420 */ // Label 1118: @35420
12930 /* 35420 */ GIM_Reject,
12931 /* 35421 */ // Label 1108: @35421
12932 /* 35421 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1121*/ GIMT_Encode4(35452), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 421 //
12933 /* 35428 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
12934 /* 35431 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12935 /* 35435 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12936 /* 35439 */ // (sint_to_fp:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec) => (sint_to_fp_F16x8:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec)
12937 /* 35439 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::sint_to_fp_F16x8),
12938 /* 35444 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12939 /* 35450 */ GIR_RootConstrainSelectedInstOperands,
12940 /* 35451 */ // GIR_Coverage, 421,
12941 /* 35451 */ GIR_Done,
12942 /* 35452 */ // Label 1121: @35452
12943 /* 35452 */ GIM_Reject,
12944 /* 35453 */ // Label 1109: @35453
12945 /* 35453 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1122*/ GIMT_Encode4(35484), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 417 //
12946 /* 35460 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
12947 /* 35463 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12948 /* 35467 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12949 /* 35471 */ // (sint_to_fp:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec) => (sint_to_fp_F32x4:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec)
12950 /* 35471 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::sint_to_fp_F32x4),
12951 /* 35476 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12952 /* 35482 */ GIR_RootConstrainSelectedInstOperands,
12953 /* 35483 */ // GIR_Coverage, 417,
12954 /* 35483 */ GIR_Done,
12955 /* 35484 */ // Label 1122: @35484
12956 /* 35484 */ GIM_Reject,
12957 /* 35485 */ // Label 1110: @35485
12958 /* 35485 */ GIM_Reject,
12959 /* 35486 */ // Label 49: @35486
12960 /* 35486 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(16), /*)*//*default:*//*Label 1127*/ GIMT_Encode4(35757),
12961 /* 35497 */ /*GILLT_f32*//*Label 1123*/ GIMT_Encode4(35545),
12962 /* 35501 */ /*GILLT_f64*//*Label 1124*/ GIMT_Encode4(35619), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
12963 /* 35537 */ /*GILLT_v8f16*//*Label 1125*/ GIMT_Encode4(35693),
12964 /* 35541 */ /*GILLT_v4f32*//*Label 1126*/ GIMT_Encode4(35725),
12965 /* 35545 */ // Label 1123: @35545
12966 /* 35545 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1130*/ GIMT_Encode4(35618),
12967 /* 35556 */ /*GILLT_i32*//*Label 1128*/ GIMT_Encode4(35564),
12968 /* 35560 */ /*GILLT_i64*//*Label 1129*/ GIMT_Encode4(35591),
12969 /* 35564 */ // Label 1128: @35564
12970 /* 35564 */ GIM_Try, /*On fail goto*//*Label 1131*/ GIMT_Encode4(35590), // Rule ID 51 //
12971 /* 35569 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12972 /* 35573 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12973 /* 35577 */ // (uint_to_fp:{ *:[f32] } I32:{ *:[i32] }:$src) => (F32_CONVERT_U_I32:{ *:[f32] } I32:{ *:[i32] }:$src)
12974 /* 35577 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_U_I32),
12975 /* 35582 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12976 /* 35588 */ GIR_RootConstrainSelectedInstOperands,
12977 /* 35589 */ // GIR_Coverage, 51,
12978 /* 35589 */ GIR_Done,
12979 /* 35590 */ // Label 1131: @35590
12980 /* 35590 */ GIM_Reject,
12981 /* 35591 */ // Label 1129: @35591
12982 /* 35591 */ GIM_Try, /*On fail goto*//*Label 1132*/ GIMT_Encode4(35617), // Rule ID 55 //
12983 /* 35596 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12984 /* 35600 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12985 /* 35604 */ // (uint_to_fp:{ *:[f32] } I64:{ *:[i64] }:$src) => (F32_CONVERT_U_I64:{ *:[f32] } I64:{ *:[i64] }:$src)
12986 /* 35604 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_U_I64),
12987 /* 35609 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12988 /* 35615 */ GIR_RootConstrainSelectedInstOperands,
12989 /* 35616 */ // GIR_Coverage, 55,
12990 /* 35616 */ GIR_Done,
12991 /* 35617 */ // Label 1132: @35617
12992 /* 35617 */ GIM_Reject,
12993 /* 35618 */ // Label 1130: @35618
12994 /* 35618 */ GIM_Reject,
12995 /* 35619 */ // Label 1124: @35619
12996 /* 35619 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1135*/ GIMT_Encode4(35692),
12997 /* 35630 */ /*GILLT_i32*//*Label 1133*/ GIMT_Encode4(35638),
12998 /* 35634 */ /*GILLT_i64*//*Label 1134*/ GIMT_Encode4(35665),
12999 /* 35638 */ // Label 1133: @35638
13000 /* 35638 */ GIM_Try, /*On fail goto*//*Label 1136*/ GIMT_Encode4(35664), // Rule ID 53 //
13001 /* 35643 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13002 /* 35647 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13003 /* 35651 */ // (uint_to_fp:{ *:[f64] } I32:{ *:[i32] }:$src) => (F64_CONVERT_U_I32:{ *:[f64] } I32:{ *:[i32] }:$src)
13004 /* 35651 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_U_I32),
13005 /* 35656 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13006 /* 35662 */ GIR_RootConstrainSelectedInstOperands,
13007 /* 35663 */ // GIR_Coverage, 53,
13008 /* 35663 */ GIR_Done,
13009 /* 35664 */ // Label 1136: @35664
13010 /* 35664 */ GIM_Reject,
13011 /* 35665 */ // Label 1134: @35665
13012 /* 35665 */ GIM_Try, /*On fail goto*//*Label 1137*/ GIMT_Encode4(35691), // Rule ID 57 //
13013 /* 35670 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13014 /* 35674 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13015 /* 35678 */ // (uint_to_fp:{ *:[f64] } I64:{ *:[i64] }:$src) => (F64_CONVERT_U_I64:{ *:[f64] } I64:{ *:[i64] }:$src)
13016 /* 35678 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_U_I64),
13017 /* 35683 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13018 /* 35689 */ GIR_RootConstrainSelectedInstOperands,
13019 /* 35690 */ // GIR_Coverage, 57,
13020 /* 35690 */ GIR_Done,
13021 /* 35691 */ // Label 1137: @35691
13022 /* 35691 */ GIM_Reject,
13023 /* 35692 */ // Label 1135: @35692
13024 /* 35692 */ GIM_Reject,
13025 /* 35693 */ // Label 1125: @35693
13026 /* 35693 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1138*/ GIMT_Encode4(35724), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 422 //
13027 /* 35700 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
13028 /* 35703 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13029 /* 35707 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13030 /* 35711 */ // (uint_to_fp:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec) => (uint_to_fp_F16x8:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec)
13031 /* 35711 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::uint_to_fp_F16x8),
13032 /* 35716 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13033 /* 35722 */ GIR_RootConstrainSelectedInstOperands,
13034 /* 35723 */ // GIR_Coverage, 422,
13035 /* 35723 */ GIR_Done,
13036 /* 35724 */ // Label 1138: @35724
13037 /* 35724 */ GIM_Reject,
13038 /* 35725 */ // Label 1126: @35725
13039 /* 35725 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1139*/ GIMT_Encode4(35756), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 418 //
13040 /* 35732 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
13041 /* 35735 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13042 /* 35739 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13043 /* 35743 */ // (uint_to_fp:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec) => (uint_to_fp_F32x4:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec)
13044 /* 35743 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::uint_to_fp_F32x4),
13045 /* 35748 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13046 /* 35754 */ GIR_RootConstrainSelectedInstOperands,
13047 /* 35755 */ // GIR_Coverage, 418,
13048 /* 35755 */ GIR_Done,
13049 /* 35756 */ // Label 1139: @35756
13050 /* 35756 */ GIM_Reject,
13051 /* 35757 */ // Label 1127: @35757
13052 /* 35757 */ GIM_Reject,
13053 /* 35758 */ // Label 50: @35758
13054 /* 35758 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(13), /*)*//*default:*//*Label 1144*/ GIMT_Encode4(36021),
13055 /* 35769 */ /*GILLT_i32*//*Label 1140*/ GIMT_Encode4(35813),
13056 /* 35773 */ /*GILLT_i64*//*Label 1141*/ GIMT_Encode4(35887), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
13057 /* 35805 */ /*GILLT_v8i16*//*Label 1142*/ GIMT_Encode4(35961),
13058 /* 35809 */ /*GILLT_v4i32*//*Label 1143*/ GIMT_Encode4(35991),
13059 /* 35813 */ // Label 1140: @35813
13060 /* 35813 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1147*/ GIMT_Encode4(35886),
13061 /* 35824 */ /*GILLT_f32*//*Label 1145*/ GIMT_Encode4(35832),
13062 /* 35828 */ /*GILLT_f64*//*Label 1146*/ GIMT_Encode4(35859),
13063 /* 35832 */ // Label 1145: @35832
13064 /* 35832 */ GIM_Try, /*On fail goto*//*Label 1148*/ GIMT_Encode4(35858), // Rule ID 640 //
13065 /* 35837 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13066 /* 35841 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13067 /* 35845 */ // (fp_to_sint_sat:{ *:[i32] } F32:{ *:[f32] }:$src, i32:{ *:[Other] }) => (I32_TRUNC_S_SAT_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
13068 /* 35845 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_SAT_F32),
13069 /* 35850 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13070 /* 35856 */ GIR_RootConstrainSelectedInstOperands,
13071 /* 35857 */ // GIR_Coverage, 640,
13072 /* 35857 */ GIR_Done,
13073 /* 35858 */ // Label 1148: @35858
13074 /* 35858 */ GIM_Reject,
13075 /* 35859 */ // Label 1146: @35859
13076 /* 35859 */ GIM_Try, /*On fail goto*//*Label 1149*/ GIMT_Encode4(35885), // Rule ID 642 //
13077 /* 35864 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13078 /* 35868 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13079 /* 35872 */ // (fp_to_sint_sat:{ *:[i32] } F64:{ *:[f64] }:$src, i32:{ *:[Other] }) => (I32_TRUNC_S_SAT_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
13080 /* 35872 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_SAT_F64),
13081 /* 35877 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13082 /* 35883 */ GIR_RootConstrainSelectedInstOperands,
13083 /* 35884 */ // GIR_Coverage, 642,
13084 /* 35884 */ GIR_Done,
13085 /* 35885 */ // Label 1149: @35885
13086 /* 35885 */ GIM_Reject,
13087 /* 35886 */ // Label 1147: @35886
13088 /* 35886 */ GIM_Reject,
13089 /* 35887 */ // Label 1141: @35887
13090 /* 35887 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1152*/ GIMT_Encode4(35960),
13091 /* 35898 */ /*GILLT_f32*//*Label 1150*/ GIMT_Encode4(35906),
13092 /* 35902 */ /*GILLT_f64*//*Label 1151*/ GIMT_Encode4(35933),
13093 /* 35906 */ // Label 1150: @35906
13094 /* 35906 */ GIM_Try, /*On fail goto*//*Label 1153*/ GIMT_Encode4(35932), // Rule ID 644 //
13095 /* 35911 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13096 /* 35915 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13097 /* 35919 */ // (fp_to_sint_sat:{ *:[i64] } F32:{ *:[f32] }:$src, i64:{ *:[Other] }) => (I64_TRUNC_S_SAT_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
13098 /* 35919 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_SAT_F32),
13099 /* 35924 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13100 /* 35930 */ GIR_RootConstrainSelectedInstOperands,
13101 /* 35931 */ // GIR_Coverage, 644,
13102 /* 35931 */ GIR_Done,
13103 /* 35932 */ // Label 1153: @35932
13104 /* 35932 */ GIM_Reject,
13105 /* 35933 */ // Label 1151: @35933
13106 /* 35933 */ GIM_Try, /*On fail goto*//*Label 1154*/ GIMT_Encode4(35959), // Rule ID 646 //
13107 /* 35938 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13108 /* 35942 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13109 /* 35946 */ // (fp_to_sint_sat:{ *:[i64] } F64:{ *:[f64] }:$src, i64:{ *:[Other] }) => (I64_TRUNC_S_SAT_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
13110 /* 35946 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_SAT_F64),
13111 /* 35951 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13112 /* 35957 */ GIR_RootConstrainSelectedInstOperands,
13113 /* 35958 */ // GIR_Coverage, 646,
13114 /* 35958 */ GIR_Done,
13115 /* 35959 */ // Label 1154: @35959
13116 /* 35959 */ GIM_Reject,
13117 /* 35960 */ // Label 1152: @35960
13118 /* 35960 */ GIM_Reject,
13119 /* 35961 */ // Label 1142: @35961
13120 /* 35961 */ GIM_Try, /*On fail goto*//*Label 1155*/ GIMT_Encode4(35990), // Rule ID 1209 //
13121 /* 35966 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
13122 /* 35969 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13123 /* 35973 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13124 /* 35977 */ // (fp_to_sint_sat:{ *:[v8i16] } V128:{ *:[v8f16] }:$src, i16:{ *:[Other] }) => (fp_to_sint_I16x8:{ *:[v8i16] } ?:{ *:[v8f16] }:$src)
13125 /* 35977 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_sint_I16x8),
13126 /* 35982 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13127 /* 35988 */ GIR_RootConstrainSelectedInstOperands,
13128 /* 35989 */ // GIR_Coverage, 1209,
13129 /* 35989 */ GIR_Done,
13130 /* 35990 */ // Label 1155: @35990
13131 /* 35990 */ GIM_Reject,
13132 /* 35991 */ // Label 1143: @35991
13133 /* 35991 */ GIM_Try, /*On fail goto*//*Label 1156*/ GIMT_Encode4(36020), // Rule ID 1207 //
13134 /* 35996 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
13135 /* 35999 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13136 /* 36003 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13137 /* 36007 */ // (fp_to_sint_sat:{ *:[v4i32] } V128:{ *:[v4f32] }:$src, i32:{ *:[Other] }) => (fp_to_sint_I32x4:{ *:[v4i32] } ?:{ *:[v4f32] }:$src)
13138 /* 36007 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_sint_I32x4),
13139 /* 36012 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13140 /* 36018 */ GIR_RootConstrainSelectedInstOperands,
13141 /* 36019 */ // GIR_Coverage, 1207,
13142 /* 36019 */ GIR_Done,
13143 /* 36020 */ // Label 1156: @36020
13144 /* 36020 */ GIM_Reject,
13145 /* 36021 */ // Label 1144: @36021
13146 /* 36021 */ GIM_Reject,
13147 /* 36022 */ // Label 51: @36022
13148 /* 36022 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(13), /*)*//*default:*//*Label 1161*/ GIMT_Encode4(36285),
13149 /* 36033 */ /*GILLT_i32*//*Label 1157*/ GIMT_Encode4(36077),
13150 /* 36037 */ /*GILLT_i64*//*Label 1158*/ GIMT_Encode4(36151), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
13151 /* 36069 */ /*GILLT_v8i16*//*Label 1159*/ GIMT_Encode4(36225),
13152 /* 36073 */ /*GILLT_v4i32*//*Label 1160*/ GIMT_Encode4(36255),
13153 /* 36077 */ // Label 1157: @36077
13154 /* 36077 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1164*/ GIMT_Encode4(36150),
13155 /* 36088 */ /*GILLT_f32*//*Label 1162*/ GIMT_Encode4(36096),
13156 /* 36092 */ /*GILLT_f64*//*Label 1163*/ GIMT_Encode4(36123),
13157 /* 36096 */ // Label 1162: @36096
13158 /* 36096 */ GIM_Try, /*On fail goto*//*Label 1165*/ GIMT_Encode4(36122), // Rule ID 641 //
13159 /* 36101 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13160 /* 36105 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13161 /* 36109 */ // (fp_to_uint_sat:{ *:[i32] } F32:{ *:[f32] }:$src, i32:{ *:[Other] }) => (I32_TRUNC_U_SAT_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
13162 /* 36109 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_SAT_F32),
13163 /* 36114 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13164 /* 36120 */ GIR_RootConstrainSelectedInstOperands,
13165 /* 36121 */ // GIR_Coverage, 641,
13166 /* 36121 */ GIR_Done,
13167 /* 36122 */ // Label 1165: @36122
13168 /* 36122 */ GIM_Reject,
13169 /* 36123 */ // Label 1163: @36123
13170 /* 36123 */ GIM_Try, /*On fail goto*//*Label 1166*/ GIMT_Encode4(36149), // Rule ID 643 //
13171 /* 36128 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13172 /* 36132 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13173 /* 36136 */ // (fp_to_uint_sat:{ *:[i32] } F64:{ *:[f64] }:$src, i32:{ *:[Other] }) => (I32_TRUNC_U_SAT_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
13174 /* 36136 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_SAT_F64),
13175 /* 36141 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13176 /* 36147 */ GIR_RootConstrainSelectedInstOperands,
13177 /* 36148 */ // GIR_Coverage, 643,
13178 /* 36148 */ GIR_Done,
13179 /* 36149 */ // Label 1166: @36149
13180 /* 36149 */ GIM_Reject,
13181 /* 36150 */ // Label 1164: @36150
13182 /* 36150 */ GIM_Reject,
13183 /* 36151 */ // Label 1158: @36151
13184 /* 36151 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1169*/ GIMT_Encode4(36224),
13185 /* 36162 */ /*GILLT_f32*//*Label 1167*/ GIMT_Encode4(36170),
13186 /* 36166 */ /*GILLT_f64*//*Label 1168*/ GIMT_Encode4(36197),
13187 /* 36170 */ // Label 1167: @36170
13188 /* 36170 */ GIM_Try, /*On fail goto*//*Label 1170*/ GIMT_Encode4(36196), // Rule ID 645 //
13189 /* 36175 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13190 /* 36179 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13191 /* 36183 */ // (fp_to_uint_sat:{ *:[i64] } F32:{ *:[f32] }:$src, i64:{ *:[Other] }) => (I64_TRUNC_U_SAT_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
13192 /* 36183 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_SAT_F32),
13193 /* 36188 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13194 /* 36194 */ GIR_RootConstrainSelectedInstOperands,
13195 /* 36195 */ // GIR_Coverage, 645,
13196 /* 36195 */ GIR_Done,
13197 /* 36196 */ // Label 1170: @36196
13198 /* 36196 */ GIM_Reject,
13199 /* 36197 */ // Label 1168: @36197
13200 /* 36197 */ GIM_Try, /*On fail goto*//*Label 1171*/ GIMT_Encode4(36223), // Rule ID 647 //
13201 /* 36202 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13202 /* 36206 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13203 /* 36210 */ // (fp_to_uint_sat:{ *:[i64] } F64:{ *:[f64] }:$src, i64:{ *:[Other] }) => (I64_TRUNC_U_SAT_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
13204 /* 36210 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_SAT_F64),
13205 /* 36215 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13206 /* 36221 */ GIR_RootConstrainSelectedInstOperands,
13207 /* 36222 */ // GIR_Coverage, 647,
13208 /* 36222 */ GIR_Done,
13209 /* 36223 */ // Label 1171: @36223
13210 /* 36223 */ GIM_Reject,
13211 /* 36224 */ // Label 1169: @36224
13212 /* 36224 */ GIM_Reject,
13213 /* 36225 */ // Label 1159: @36225
13214 /* 36225 */ GIM_Try, /*On fail goto*//*Label 1172*/ GIMT_Encode4(36254), // Rule ID 1210 //
13215 /* 36230 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
13216 /* 36233 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13217 /* 36237 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13218 /* 36241 */ // (fp_to_uint_sat:{ *:[v8i16] } V128:{ *:[v8f16] }:$src, i16:{ *:[Other] }) => (fp_to_uint_I16x8:{ *:[v8i16] } ?:{ *:[v8f16] }:$src)
13219 /* 36241 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_uint_I16x8),
13220 /* 36246 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13221 /* 36252 */ GIR_RootConstrainSelectedInstOperands,
13222 /* 36253 */ // GIR_Coverage, 1210,
13223 /* 36253 */ GIR_Done,
13224 /* 36254 */ // Label 1172: @36254
13225 /* 36254 */ GIM_Reject,
13226 /* 36255 */ // Label 1160: @36255
13227 /* 36255 */ GIM_Try, /*On fail goto*//*Label 1173*/ GIMT_Encode4(36284), // Rule ID 1208 //
13228 /* 36260 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
13229 /* 36263 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13230 /* 36267 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13231 /* 36271 */ // (fp_to_uint_sat:{ *:[v4i32] } V128:{ *:[v4f32] }:$src, i32:{ *:[Other] }) => (fp_to_uint_I32x4:{ *:[v4i32] } ?:{ *:[v4f32] }:$src)
13232 /* 36271 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_uint_I32x4),
13233 /* 36276 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13234 /* 36282 */ GIR_RootConstrainSelectedInstOperands,
13235 /* 36283 */ // GIR_Coverage, 1208,
13236 /* 36283 */ GIR_Done,
13237 /* 36284 */ // Label 1173: @36284
13238 /* 36284 */ GIM_Reject,
13239 /* 36285 */ // Label 1161: @36285
13240 /* 36285 */ GIM_Reject,
13241 /* 36286 */ // Label 52: @36286
13242 /* 36286 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(17), /*)*//*default:*//*Label 1179*/ GIMT_Encode4(36505),
13243 /* 36297 */ /*GILLT_f32*//*Label 1174*/ GIMT_Encode4(36349),
13244 /* 36301 */ /*GILLT_f64*//*Label 1175*/ GIMT_Encode4(36379), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
13245 /* 36337 */ /*GILLT_v8f16*//*Label 1176*/ GIMT_Encode4(36409),
13246 /* 36341 */ /*GILLT_v4f32*//*Label 1177*/ GIMT_Encode4(36441),
13247 /* 36345 */ /*GILLT_v2f64*//*Label 1178*/ GIMT_Encode4(36473),
13248 /* 36349 */ // Label 1174: @36349
13249 /* 36349 */ GIM_Try, /*On fail goto*//*Label 1180*/ GIMT_Encode4(36378), // Rule ID 134 //
13250 /* 36354 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
13251 /* 36357 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13252 /* 36361 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13253 /* 36365 */ // (fabs:{ *:[f32] } F32:{ *:[f32] }:$src) => (ABS_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
13254 /* 36365 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F32),
13255 /* 36370 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13256 /* 36376 */ GIR_RootConstrainSelectedInstOperands,
13257 /* 36377 */ // GIR_Coverage, 134,
13258 /* 36377 */ GIR_Done,
13259 /* 36378 */ // Label 1180: @36378
13260 /* 36378 */ GIM_Reject,
13261 /* 36379 */ // Label 1175: @36379
13262 /* 36379 */ GIM_Try, /*On fail goto*//*Label 1181*/ GIMT_Encode4(36408), // Rule ID 135 //
13263 /* 36384 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
13264 /* 36387 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13265 /* 36391 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13266 /* 36395 */ // (fabs:{ *:[f64] } F64:{ *:[f64] }:$src) => (ABS_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
13267 /* 36395 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F64),
13268 /* 36400 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13269 /* 36406 */ GIR_RootConstrainSelectedInstOperands,
13270 /* 36407 */ // GIR_Coverage, 135,
13271 /* 36407 */ GIR_Done,
13272 /* 36408 */ // Label 1181: @36408
13273 /* 36408 */ GIM_Reject,
13274 /* 36409 */ // Label 1176: @36409
13275 /* 36409 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1182*/ GIMT_Encode4(36440), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 326 //
13276 /* 36416 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
13277 /* 36419 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13278 /* 36423 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13279 /* 36427 */ // (fabs:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (ABS_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
13280 /* 36427 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F16x8),
13281 /* 36432 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13282 /* 36438 */ GIR_RootConstrainSelectedInstOperands,
13283 /* 36439 */ // GIR_Coverage, 326,
13284 /* 36439 */ GIR_Done,
13285 /* 36440 */ // Label 1182: @36440
13286 /* 36440 */ GIM_Reject,
13287 /* 36441 */ // Label 1177: @36441
13288 /* 36441 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1183*/ GIMT_Encode4(36472), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 324 //
13289 /* 36448 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
13290 /* 36451 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13291 /* 36455 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13292 /* 36459 */ // (fabs:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (ABS_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
13293 /* 36459 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F32x4),
13294 /* 36464 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13295 /* 36470 */ GIR_RootConstrainSelectedInstOperands,
13296 /* 36471 */ // GIR_Coverage, 324,
13297 /* 36471 */ GIR_Done,
13298 /* 36472 */ // Label 1183: @36472
13299 /* 36472 */ GIM_Reject,
13300 /* 36473 */ // Label 1178: @36473
13301 /* 36473 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1184*/ GIMT_Encode4(36504), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 325 //
13302 /* 36480 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
13303 /* 36483 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13304 /* 36487 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13305 /* 36491 */ // (fabs:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (ABS_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
13306 /* 36491 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F64x2),
13307 /* 36496 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13308 /* 36502 */ GIR_RootConstrainSelectedInstOperands,
13309 /* 36503 */ // GIR_Coverage, 325,
13310 /* 36503 */ GIR_Done,
13311 /* 36504 */ // Label 1184: @36504
13312 /* 36504 */ GIM_Reject,
13313 /* 36505 */ // Label 1179: @36505
13314 /* 36505 */ GIM_Reject,
13315 /* 36506 */ // Label 53: @36506
13316 /* 36506 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1187*/ GIMT_Encode4(36753),
13317 /* 36517 */ /*GILLT_f32*//*Label 1185*/ GIMT_Encode4(36525),
13318 /* 36521 */ /*GILLT_f64*//*Label 1186*/ GIMT_Encode4(36639),
13319 /* 36525 */ // Label 1185: @36525
13320 /* 36525 */ GIM_Try, /*On fail goto*//*Label 1188*/ GIMT_Encode4(36638),
13321 /* 36530 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
13322 /* 36533 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1191*/ GIMT_Encode4(36637),
13323 /* 36544 */ /*GILLT_f32*//*Label 1189*/ GIMT_Encode4(36552),
13324 /* 36548 */ /*GILLT_f64*//*Label 1190*/ GIMT_Encode4(36583),
13325 /* 36552 */ // Label 1189: @36552
13326 /* 36552 */ GIM_Try, /*On fail goto*//*Label 1192*/ GIMT_Encode4(36582), // Rule ID 138 //
13327 /* 36557 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13328 /* 36561 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13329 /* 36565 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13330 /* 36569 */ // (fcopysign:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (COPYSIGN_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
13331 /* 36569 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F32),
13332 /* 36574 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13333 /* 36580 */ GIR_RootConstrainSelectedInstOperands,
13334 /* 36581 */ // GIR_Coverage, 138,
13335 /* 36581 */ GIR_Done,
13336 /* 36582 */ // Label 1192: @36582
13337 /* 36582 */ GIM_Reject,
13338 /* 36583 */ // Label 1190: @36583
13339 /* 36583 */ GIM_Try, /*On fail goto*//*Label 1193*/ GIMT_Encode4(36636), // Rule ID 678 //
13340 /* 36588 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13341 /* 36592 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13342 /* 36596 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13343 /* 36600 */ // (fcopysign:{ *:[f32] } F32:{ *:[f32] }:$lhs, F64:{ *:[f64] }:$rhs) => (COPYSIGN_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, (F32_DEMOTE_F64:{ *:[f32] } F64:{ *:[f64] }:$rhs))
13344 /* 36600 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_f32,
13345 /* 36603 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::F32_DEMOTE_F64),
13346 /* 36607 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
13347 /* 36612 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // rhs
13348 /* 36616 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13349 /* 36619 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
13350 /* 36621 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F32),
13351 /* 36624 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13352 /* 36626 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
13353 /* 36628 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
13354 /* 36631 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13355 /* 36634 */ GIR_RootConstrainSelectedInstOperands,
13356 /* 36635 */ // GIR_Coverage, 678,
13357 /* 36635 */ GIR_EraseRootFromParent_Done,
13358 /* 36636 */ // Label 1193: @36636
13359 /* 36636 */ GIM_Reject,
13360 /* 36637 */ // Label 1191: @36637
13361 /* 36637 */ GIM_Reject,
13362 /* 36638 */ // Label 1188: @36638
13363 /* 36638 */ GIM_Reject,
13364 /* 36639 */ // Label 1186: @36639
13365 /* 36639 */ GIM_Try, /*On fail goto*//*Label 1194*/ GIMT_Encode4(36752),
13366 /* 36644 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
13367 /* 36647 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1197*/ GIMT_Encode4(36751),
13368 /* 36658 */ /*GILLT_f32*//*Label 1195*/ GIMT_Encode4(36666),
13369 /* 36662 */ /*GILLT_f64*//*Label 1196*/ GIMT_Encode4(36720),
13370 /* 36666 */ // Label 1195: @36666
13371 /* 36666 */ GIM_Try, /*On fail goto*//*Label 1198*/ GIMT_Encode4(36719), // Rule ID 677 //
13372 /* 36671 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13373 /* 36675 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13374 /* 36679 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13375 /* 36683 */ // (fcopysign:{ *:[f64] } F64:{ *:[f64] }:$lhs, F32:{ *:[f32] }:$rhs) => (COPYSIGN_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, (F64_PROMOTE_F32:{ *:[f64] } F32:{ *:[f32] }:$rhs))
13376 /* 36683 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_f64,
13377 /* 36686 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::F64_PROMOTE_F32),
13378 /* 36690 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
13379 /* 36695 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // rhs
13380 /* 36699 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13381 /* 36702 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
13382 /* 36704 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F64),
13383 /* 36707 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13384 /* 36709 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
13385 /* 36711 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
13386 /* 36714 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13387 /* 36717 */ GIR_RootConstrainSelectedInstOperands,
13388 /* 36718 */ // GIR_Coverage, 677,
13389 /* 36718 */ GIR_EraseRootFromParent_Done,
13390 /* 36719 */ // Label 1198: @36719
13391 /* 36719 */ GIM_Reject,
13392 /* 36720 */ // Label 1196: @36720
13393 /* 36720 */ GIM_Try, /*On fail goto*//*Label 1199*/ GIMT_Encode4(36750), // Rule ID 139 //
13394 /* 36725 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13395 /* 36729 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13396 /* 36733 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13397 /* 36737 */ // (fcopysign:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (COPYSIGN_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
13398 /* 36737 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F64),
13399 /* 36742 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13400 /* 36748 */ GIR_RootConstrainSelectedInstOperands,
13401 /* 36749 */ // GIR_Coverage, 139,
13402 /* 36749 */ GIR_Done,
13403 /* 36750 */ // Label 1199: @36750
13404 /* 36750 */ GIM_Reject,
13405 /* 36751 */ // Label 1197: @36751
13406 /* 36751 */ GIM_Reject,
13407 /* 36752 */ // Label 1194: @36752
13408 /* 36752 */ GIM_Reject,
13409 /* 36753 */ // Label 1187: @36753
13410 /* 36753 */ GIM_Reject,
13411 /* 36754 */ // Label 54: @36754
13412 /* 36754 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(17), /*)*//*default:*//*Label 1205*/ GIMT_Encode4(37008),
13413 /* 36765 */ /*GILLT_f32*//*Label 1200*/ GIMT_Encode4(36817),
13414 /* 36769 */ /*GILLT_f64*//*Label 1201*/ GIMT_Encode4(36854), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
13415 /* 36805 */ /*GILLT_v8f16*//*Label 1202*/ GIMT_Encode4(36891),
13416 /* 36809 */ /*GILLT_v4f32*//*Label 1203*/ GIMT_Encode4(36930),
13417 /* 36813 */ /*GILLT_v2f64*//*Label 1204*/ GIMT_Encode4(36969),
13418 /* 36817 */ // Label 1200: @36817
13419 /* 36817 */ GIM_Try, /*On fail goto*//*Label 1206*/ GIMT_Encode4(36853), // Rule ID 140 //
13420 /* 36822 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
13421 /* 36825 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
13422 /* 36828 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13423 /* 36832 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13424 /* 36836 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13425 /* 36840 */ // (fminimum:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (MIN_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
13426 /* 36840 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F32),
13427 /* 36845 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13428 /* 36851 */ GIR_RootConstrainSelectedInstOperands,
13429 /* 36852 */ // GIR_Coverage, 140,
13430 /* 36852 */ GIR_Done,
13431 /* 36853 */ // Label 1206: @36853
13432 /* 36853 */ GIM_Reject,
13433 /* 36854 */ // Label 1201: @36854
13434 /* 36854 */ GIM_Try, /*On fail goto*//*Label 1207*/ GIMT_Encode4(36890), // Rule ID 141 //
13435 /* 36859 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
13436 /* 36862 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
13437 /* 36865 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13438 /* 36869 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13439 /* 36873 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13440 /* 36877 */ // (fminimum:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (MIN_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
13441 /* 36877 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F64),
13442 /* 36882 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13443 /* 36888 */ GIR_RootConstrainSelectedInstOperands,
13444 /* 36889 */ // GIR_Coverage, 141,
13445 /* 36889 */ GIR_Done,
13446 /* 36890 */ // Label 1207: @36890
13447 /* 36890 */ GIM_Reject,
13448 /* 36891 */ // Label 1202: @36891
13449 /* 36891 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1208*/ GIMT_Encode4(36929), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 359 //
13450 /* 36898 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
13451 /* 36901 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
13452 /* 36904 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13453 /* 36908 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13454 /* 36912 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13455 /* 36916 */ // (fminimum:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (MIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
13456 /* 36916 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F16x8),
13457 /* 36921 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13458 /* 36927 */ GIR_RootConstrainSelectedInstOperands,
13459 /* 36928 */ // GIR_Coverage, 359,
13460 /* 36928 */ GIR_Done,
13461 /* 36929 */ // Label 1208: @36929
13462 /* 36929 */ GIM_Reject,
13463 /* 36930 */ // Label 1203: @36930
13464 /* 36930 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1209*/ GIMT_Encode4(36968), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 357 //
13465 /* 36937 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
13466 /* 36940 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
13467 /* 36943 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13468 /* 36947 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13469 /* 36951 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13470 /* 36955 */ // (fminimum:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (MIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
13471 /* 36955 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F32x4),
13472 /* 36960 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13473 /* 36966 */ GIR_RootConstrainSelectedInstOperands,
13474 /* 36967 */ // GIR_Coverage, 357,
13475 /* 36967 */ GIR_Done,
13476 /* 36968 */ // Label 1209: @36968
13477 /* 36968 */ GIM_Reject,
13478 /* 36969 */ // Label 1204: @36969
13479 /* 36969 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1210*/ GIMT_Encode4(37007), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 358 //
13480 /* 36976 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
13481 /* 36979 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
13482 /* 36982 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13483 /* 36986 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13484 /* 36990 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13485 /* 36994 */ // (fminimum:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (MIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
13486 /* 36994 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F64x2),
13487 /* 36999 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13488 /* 37005 */ GIR_RootConstrainSelectedInstOperands,
13489 /* 37006 */ // GIR_Coverage, 358,
13490 /* 37006 */ GIR_Done,
13491 /* 37007 */ // Label 1210: @37007
13492 /* 37007 */ GIM_Reject,
13493 /* 37008 */ // Label 1205: @37008
13494 /* 37008 */ GIM_Reject,
13495 /* 37009 */ // Label 55: @37009
13496 /* 37009 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(17), /*)*//*default:*//*Label 1216*/ GIMT_Encode4(37263),
13497 /* 37020 */ /*GILLT_f32*//*Label 1211*/ GIMT_Encode4(37072),
13498 /* 37024 */ /*GILLT_f64*//*Label 1212*/ GIMT_Encode4(37109), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
13499 /* 37060 */ /*GILLT_v8f16*//*Label 1213*/ GIMT_Encode4(37146),
13500 /* 37064 */ /*GILLT_v4f32*//*Label 1214*/ GIMT_Encode4(37185),
13501 /* 37068 */ /*GILLT_v2f64*//*Label 1215*/ GIMT_Encode4(37224),
13502 /* 37072 */ // Label 1211: @37072
13503 /* 37072 */ GIM_Try, /*On fail goto*//*Label 1217*/ GIMT_Encode4(37108), // Rule ID 142 //
13504 /* 37077 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
13505 /* 37080 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
13506 /* 37083 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13507 /* 37087 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13508 /* 37091 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13509 /* 37095 */ // (fmaximum:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (MAX_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
13510 /* 37095 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F32),
13511 /* 37100 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13512 /* 37106 */ GIR_RootConstrainSelectedInstOperands,
13513 /* 37107 */ // GIR_Coverage, 142,
13514 /* 37107 */ GIR_Done,
13515 /* 37108 */ // Label 1217: @37108
13516 /* 37108 */ GIM_Reject,
13517 /* 37109 */ // Label 1212: @37109
13518 /* 37109 */ GIM_Try, /*On fail goto*//*Label 1218*/ GIMT_Encode4(37145), // Rule ID 143 //
13519 /* 37114 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
13520 /* 37117 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
13521 /* 37120 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13522 /* 37124 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13523 /* 37128 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13524 /* 37132 */ // (fmaximum:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (MAX_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
13525 /* 37132 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F64),
13526 /* 37137 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13527 /* 37143 */ GIR_RootConstrainSelectedInstOperands,
13528 /* 37144 */ // GIR_Coverage, 143,
13529 /* 37144 */ GIR_Done,
13530 /* 37145 */ // Label 1218: @37145
13531 /* 37145 */ GIM_Reject,
13532 /* 37146 */ // Label 1213: @37146
13533 /* 37146 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1219*/ GIMT_Encode4(37184), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 362 //
13534 /* 37153 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
13535 /* 37156 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
13536 /* 37159 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13537 /* 37163 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13538 /* 37167 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13539 /* 37171 */ // (fmaximum:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (MAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
13540 /* 37171 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F16x8),
13541 /* 37176 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13542 /* 37182 */ GIR_RootConstrainSelectedInstOperands,
13543 /* 37183 */ // GIR_Coverage, 362,
13544 /* 37183 */ GIR_Done,
13545 /* 37184 */ // Label 1219: @37184
13546 /* 37184 */ GIM_Reject,
13547 /* 37185 */ // Label 1214: @37185
13548 /* 37185 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1220*/ GIMT_Encode4(37223), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 360 //
13549 /* 37192 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
13550 /* 37195 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
13551 /* 37198 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13552 /* 37202 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13553 /* 37206 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13554 /* 37210 */ // (fmaximum:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (MAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
13555 /* 37210 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F32x4),
13556 /* 37215 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13557 /* 37221 */ GIR_RootConstrainSelectedInstOperands,
13558 /* 37222 */ // GIR_Coverage, 360,
13559 /* 37222 */ GIR_Done,
13560 /* 37223 */ // Label 1220: @37223
13561 /* 37223 */ GIM_Reject,
13562 /* 37224 */ // Label 1215: @37224
13563 /* 37224 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1221*/ GIMT_Encode4(37262), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 361 //
13564 /* 37231 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
13565 /* 37234 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
13566 /* 37237 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13567 /* 37241 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13568 /* 37245 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13569 /* 37249 */ // (fmaximum:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (MAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
13570 /* 37249 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F64x2),
13571 /* 37254 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13572 /* 37260 */ GIR_RootConstrainSelectedInstOperands,
13573 /* 37261 */ // GIR_Coverage, 361,
13574 /* 37261 */ GIR_Done,
13575 /* 37262 */ // Label 1221: @37262
13576 /* 37262 */ GIM_Reject,
13577 /* 37263 */ // Label 1216: @37263
13578 /* 37263 */ GIM_Reject,
13579 /* 37264 */ // Label 56: @37264
13580 /* 37264 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(10), GIMT_Encode2(13), /*)*//*default:*//*Label 1225*/ GIMT_Encode4(37404),
13581 /* 37275 */ /*GILLT_v16i8*//*Label 1222*/ GIMT_Encode4(37287),
13582 /* 37279 */ /*GILLT_v8i16*//*Label 1223*/ GIMT_Encode4(37326),
13583 /* 37283 */ /*GILLT_v4i32*//*Label 1224*/ GIMT_Encode4(37365),
13584 /* 37287 */ // Label 1222: @37287
13585 /* 37287 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1226*/ GIMT_Encode4(37325), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 297 //
13586 /* 37294 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
13587 /* 37297 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
13588 /* 37300 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13589 /* 37304 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13590 /* 37308 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13591 /* 37312 */ // (smin:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MIN_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
13592 /* 37312 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_S_I8x16),
13593 /* 37317 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13594 /* 37323 */ GIR_RootConstrainSelectedInstOperands,
13595 /* 37324 */ // GIR_Coverage, 297,
13596 /* 37324 */ GIR_Done,
13597 /* 37325 */ // Label 1226: @37325
13598 /* 37325 */ GIM_Reject,
13599 /* 37326 */ // Label 1223: @37326
13600 /* 37326 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1227*/ GIMT_Encode4(37364), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 298 //
13601 /* 37333 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
13602 /* 37336 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
13603 /* 37339 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13604 /* 37343 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13605 /* 37347 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13606 /* 37351 */ // (smin:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MIN_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
13607 /* 37351 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_S_I16x8),
13608 /* 37356 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13609 /* 37362 */ GIR_RootConstrainSelectedInstOperands,
13610 /* 37363 */ // GIR_Coverage, 298,
13611 /* 37363 */ GIR_Done,
13612 /* 37364 */ // Label 1227: @37364
13613 /* 37364 */ GIM_Reject,
13614 /* 37365 */ // Label 1224: @37365
13615 /* 37365 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1228*/ GIMT_Encode4(37403), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 299 //
13616 /* 37372 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
13617 /* 37375 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
13618 /* 37378 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13619 /* 37382 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13620 /* 37386 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13621 /* 37390 */ // (smin:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MIN_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
13622 /* 37390 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_S_I32x4),
13623 /* 37395 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13624 /* 37401 */ GIR_RootConstrainSelectedInstOperands,
13625 /* 37402 */ // GIR_Coverage, 299,
13626 /* 37402 */ GIR_Done,
13627 /* 37403 */ // Label 1228: @37403
13628 /* 37403 */ GIM_Reject,
13629 /* 37404 */ // Label 1225: @37404
13630 /* 37404 */ GIM_Reject,
13631 /* 37405 */ // Label 57: @37405
13632 /* 37405 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(10), GIMT_Encode2(13), /*)*//*default:*//*Label 1232*/ GIMT_Encode4(37545),
13633 /* 37416 */ /*GILLT_v16i8*//*Label 1229*/ GIMT_Encode4(37428),
13634 /* 37420 */ /*GILLT_v8i16*//*Label 1230*/ GIMT_Encode4(37467),
13635 /* 37424 */ /*GILLT_v4i32*//*Label 1231*/ GIMT_Encode4(37506),
13636 /* 37428 */ // Label 1229: @37428
13637 /* 37428 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1233*/ GIMT_Encode4(37466), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 303 //
13638 /* 37435 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
13639 /* 37438 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
13640 /* 37441 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13641 /* 37445 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13642 /* 37449 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13643 /* 37453 */ // (smax:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MAX_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
13644 /* 37453 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_S_I8x16),
13645 /* 37458 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13646 /* 37464 */ GIR_RootConstrainSelectedInstOperands,
13647 /* 37465 */ // GIR_Coverage, 303,
13648 /* 37465 */ GIR_Done,
13649 /* 37466 */ // Label 1233: @37466
13650 /* 37466 */ GIM_Reject,
13651 /* 37467 */ // Label 1230: @37467
13652 /* 37467 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1234*/ GIMT_Encode4(37505), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 304 //
13653 /* 37474 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
13654 /* 37477 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
13655 /* 37480 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13656 /* 37484 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13657 /* 37488 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13658 /* 37492 */ // (smax:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MAX_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
13659 /* 37492 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_S_I16x8),
13660 /* 37497 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13661 /* 37503 */ GIR_RootConstrainSelectedInstOperands,
13662 /* 37504 */ // GIR_Coverage, 304,
13663 /* 37504 */ GIR_Done,
13664 /* 37505 */ // Label 1234: @37505
13665 /* 37505 */ GIM_Reject,
13666 /* 37506 */ // Label 1231: @37506
13667 /* 37506 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1235*/ GIMT_Encode4(37544), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 305 //
13668 /* 37513 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
13669 /* 37516 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
13670 /* 37519 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13671 /* 37523 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13672 /* 37527 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13673 /* 37531 */ // (smax:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MAX_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
13674 /* 37531 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_S_I32x4),
13675 /* 37536 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13676 /* 37542 */ GIR_RootConstrainSelectedInstOperands,
13677 /* 37543 */ // GIR_Coverage, 305,
13678 /* 37543 */ GIR_Done,
13679 /* 37544 */ // Label 1235: @37544
13680 /* 37544 */ GIM_Reject,
13681 /* 37545 */ // Label 1232: @37545
13682 /* 37545 */ GIM_Reject,
13683 /* 37546 */ // Label 58: @37546
13684 /* 37546 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(10), GIMT_Encode2(13), /*)*//*default:*//*Label 1239*/ GIMT_Encode4(37686),
13685 /* 37557 */ /*GILLT_v16i8*//*Label 1236*/ GIMT_Encode4(37569),
13686 /* 37561 */ /*GILLT_v8i16*//*Label 1237*/ GIMT_Encode4(37608),
13687 /* 37565 */ /*GILLT_v4i32*//*Label 1238*/ GIMT_Encode4(37647),
13688 /* 37569 */ // Label 1236: @37569
13689 /* 37569 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1240*/ GIMT_Encode4(37607), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 300 //
13690 /* 37576 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
13691 /* 37579 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
13692 /* 37582 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13693 /* 37586 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13694 /* 37590 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13695 /* 37594 */ // (umin:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MIN_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
13696 /* 37594 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_U_I8x16),
13697 /* 37599 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13698 /* 37605 */ GIR_RootConstrainSelectedInstOperands,
13699 /* 37606 */ // GIR_Coverage, 300,
13700 /* 37606 */ GIR_Done,
13701 /* 37607 */ // Label 1240: @37607
13702 /* 37607 */ GIM_Reject,
13703 /* 37608 */ // Label 1237: @37608
13704 /* 37608 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1241*/ GIMT_Encode4(37646), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 301 //
13705 /* 37615 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
13706 /* 37618 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
13707 /* 37621 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13708 /* 37625 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13709 /* 37629 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13710 /* 37633 */ // (umin:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MIN_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
13711 /* 37633 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_U_I16x8),
13712 /* 37638 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13713 /* 37644 */ GIR_RootConstrainSelectedInstOperands,
13714 /* 37645 */ // GIR_Coverage, 301,
13715 /* 37645 */ GIR_Done,
13716 /* 37646 */ // Label 1241: @37646
13717 /* 37646 */ GIM_Reject,
13718 /* 37647 */ // Label 1238: @37647
13719 /* 37647 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1242*/ GIMT_Encode4(37685), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 302 //
13720 /* 37654 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
13721 /* 37657 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
13722 /* 37660 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13723 /* 37664 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13724 /* 37668 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13725 /* 37672 */ // (umin:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MIN_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
13726 /* 37672 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_U_I32x4),
13727 /* 37677 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13728 /* 37683 */ GIR_RootConstrainSelectedInstOperands,
13729 /* 37684 */ // GIR_Coverage, 302,
13730 /* 37684 */ GIR_Done,
13731 /* 37685 */ // Label 1242: @37685
13732 /* 37685 */ GIM_Reject,
13733 /* 37686 */ // Label 1239: @37686
13734 /* 37686 */ GIM_Reject,
13735 /* 37687 */ // Label 59: @37687
13736 /* 37687 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(10), GIMT_Encode2(13), /*)*//*default:*//*Label 1246*/ GIMT_Encode4(37827),
13737 /* 37698 */ /*GILLT_v16i8*//*Label 1243*/ GIMT_Encode4(37710),
13738 /* 37702 */ /*GILLT_v8i16*//*Label 1244*/ GIMT_Encode4(37749),
13739 /* 37706 */ /*GILLT_v4i32*//*Label 1245*/ GIMT_Encode4(37788),
13740 /* 37710 */ // Label 1243: @37710
13741 /* 37710 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1247*/ GIMT_Encode4(37748), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 306 //
13742 /* 37717 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
13743 /* 37720 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
13744 /* 37723 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13745 /* 37727 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13746 /* 37731 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13747 /* 37735 */ // (umax:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MAX_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
13748 /* 37735 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_U_I8x16),
13749 /* 37740 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13750 /* 37746 */ GIR_RootConstrainSelectedInstOperands,
13751 /* 37747 */ // GIR_Coverage, 306,
13752 /* 37747 */ GIR_Done,
13753 /* 37748 */ // Label 1247: @37748
13754 /* 37748 */ GIM_Reject,
13755 /* 37749 */ // Label 1244: @37749
13756 /* 37749 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1248*/ GIMT_Encode4(37787), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 307 //
13757 /* 37756 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
13758 /* 37759 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
13759 /* 37762 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13760 /* 37766 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13761 /* 37770 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13762 /* 37774 */ // (umax:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MAX_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
13763 /* 37774 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_U_I16x8),
13764 /* 37779 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13765 /* 37785 */ GIR_RootConstrainSelectedInstOperands,
13766 /* 37786 */ // GIR_Coverage, 307,
13767 /* 37786 */ GIR_Done,
13768 /* 37787 */ // Label 1248: @37787
13769 /* 37787 */ GIM_Reject,
13770 /* 37788 */ // Label 1245: @37788
13771 /* 37788 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1249*/ GIMT_Encode4(37826), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 308 //
13772 /* 37795 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
13773 /* 37798 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
13774 /* 37801 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13775 /* 37805 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13776 /* 37809 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13777 /* 37813 */ // (umax:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MAX_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
13778 /* 37813 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_U_I32x4),
13779 /* 37818 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13780 /* 37824 */ GIR_RootConstrainSelectedInstOperands,
13781 /* 37825 */ // GIR_Coverage, 308,
13782 /* 37825 */ GIR_Done,
13783 /* 37826 */ // Label 1249: @37826
13784 /* 37826 */ GIM_Reject,
13785 /* 37827 */ // Label 1246: @37827
13786 /* 37827 */ GIM_Reject,
13787 /* 37828 */ // Label 60: @37828
13788 /* 37828 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(10), GIMT_Encode2(14), /*)*//*default:*//*Label 1254*/ GIMT_Encode4(37983),
13789 /* 37839 */ /*GILLT_v16i8*//*Label 1250*/ GIMT_Encode4(37855),
13790 /* 37843 */ /*GILLT_v8i16*//*Label 1251*/ GIMT_Encode4(37887),
13791 /* 37847 */ /*GILLT_v4i32*//*Label 1252*/ GIMT_Encode4(37919),
13792 /* 37851 */ /*GILLT_v2i64*//*Label 1253*/ GIMT_Encode4(37951),
13793 /* 37855 */ // Label 1250: @37855
13794 /* 37855 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1255*/ GIMT_Encode4(37886), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 249 //
13795 /* 37862 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
13796 /* 37865 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13797 /* 37869 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13798 /* 37873 */ // (abs:{ *:[v16i8] } V128:{ *:[v16i8] }:$v) => (ABS_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$v)
13799 /* 37873 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I8x16),
13800 /* 37878 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13801 /* 37884 */ GIR_RootConstrainSelectedInstOperands,
13802 /* 37885 */ // GIR_Coverage, 249,
13803 /* 37885 */ GIR_Done,
13804 /* 37886 */ // Label 1255: @37886
13805 /* 37886 */ GIM_Reject,
13806 /* 37887 */ // Label 1251: @37887
13807 /* 37887 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1256*/ GIMT_Encode4(37918), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 250 //
13808 /* 37894 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
13809 /* 37897 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13810 /* 37901 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13811 /* 37905 */ // (abs:{ *:[v8i16] } V128:{ *:[v8i16] }:$v) => (ABS_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$v)
13812 /* 37905 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I16x8),
13813 /* 37910 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13814 /* 37916 */ GIR_RootConstrainSelectedInstOperands,
13815 /* 37917 */ // GIR_Coverage, 250,
13816 /* 37917 */ GIR_Done,
13817 /* 37918 */ // Label 1256: @37918
13818 /* 37918 */ GIM_Reject,
13819 /* 37919 */ // Label 1252: @37919
13820 /* 37919 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1257*/ GIMT_Encode4(37950), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 251 //
13821 /* 37926 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
13822 /* 37929 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13823 /* 37933 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13824 /* 37937 */ // (abs:{ *:[v4i32] } V128:{ *:[v4i32] }:$v) => (ABS_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$v)
13825 /* 37937 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I32x4),
13826 /* 37942 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13827 /* 37948 */ GIR_RootConstrainSelectedInstOperands,
13828 /* 37949 */ // GIR_Coverage, 251,
13829 /* 37949 */ GIR_Done,
13830 /* 37950 */ // Label 1257: @37950
13831 /* 37950 */ GIM_Reject,
13832 /* 37951 */ // Label 1253: @37951
13833 /* 37951 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1258*/ GIMT_Encode4(37982), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 252 //
13834 /* 37958 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
13835 /* 37961 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13836 /* 37965 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13837 /* 37969 */ // (abs:{ *:[v2i64] } V128:{ *:[v2i64] }:$v) => (ABS_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$v)
13838 /* 37969 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I64x2),
13839 /* 37974 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13840 /* 37980 */ GIR_RootConstrainSelectedInstOperands,
13841 /* 37981 */ // GIR_Coverage, 252,
13842 /* 37981 */ GIR_Done,
13843 /* 37982 */ // Label 1258: @37982
13844 /* 37982 */ GIM_Reject,
13845 /* 37983 */ // Label 1254: @37983
13846 /* 37983 */ GIM_Reject,
13847 /* 37984 */ // Label 61: @37984
13848 /* 37984 */ GIM_Try, /*On fail goto*//*Label 1259*/ GIMT_Encode4(38005), // Rule ID 18 //
13849 /* 37989 */ // MIs[0] dst
13850 /* 37989 */ GIM_CheckIsMBB, /*MI*/0, /*Op*/0,
13851 /* 37992 */ // (br (bb:{ *:[Other] }):$dst) => (BR (bb:{ *:[Other] }):$dst)
13852 /* 37992 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::BR),
13853 /* 37997 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13854 /* 38003 */ GIR_RootConstrainSelectedInstOperands,
13855 /* 38004 */ // GIR_Coverage, 18,
13856 /* 38004 */ GIR_Done,
13857 /* 38005 */ // Label 1259: @38005
13858 /* 38005 */ GIM_Reject,
13859 /* 38006 */ // Label 62: @38006
13860 /* 38006 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(6), GIMT_Encode2(10), /*)*//*default:*//*Label 1264*/ GIMT_Encode4(38369),
13861 /* 38017 */ /*GILLT_v16s8*//*Label 1260*/ GIMT_Encode4(38033),
13862 /* 38021 */ /*GILLT_v8s16*//*Label 1261*/ GIMT_Encode4(38093),
13863 /* 38025 */ /*GILLT_v4s32*//*Label 1262*/ GIMT_Encode4(38153),
13864 /* 38029 */ /*GILLT_v2s64*//*Label 1263*/ GIMT_Encode4(38261),
13865 /* 38033 */ // Label 1260: @38033
13866 /* 38033 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1265*/ GIMT_Encode4(38092), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 188 //
13867 /* 38040 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
13868 /* 38043 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
13869 /* 38046 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
13870 /* 38049 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13871 /* 38053 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13872 /* 38057 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13873 /* 38061 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
13874 /* 38065 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13875 /* 38069 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx16),
13876 /* 38073 */ // MIs[1] Operand 1
13877 /* 38073 */ // No operand predicates
13878 /* 38073 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13879 /* 38075 */ // (vector_insert:{ *:[v16i8] } V128:{ *:[v16i8] }:$vec, I32:{ *:[i32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx16>>:$idx) => (REPLACE_LANE_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$vec, (imm:{ *:[i32] }):$idx, I32:{ *:[i32] }:$x)
13880 /* 38075 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I8x16),
13881 /* 38078 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13882 /* 38080 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
13883 /* 38082 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
13884 /* 38085 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
13885 /* 38087 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13886 /* 38090 */ GIR_RootConstrainSelectedInstOperands,
13887 /* 38091 */ // GIR_Coverage, 188,
13888 /* 38091 */ GIR_EraseRootFromParent_Done,
13889 /* 38092 */ // Label 1265: @38092
13890 /* 38092 */ GIM_Reject,
13891 /* 38093 */ // Label 1261: @38093
13892 /* 38093 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1266*/ GIMT_Encode4(38152), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 189 //
13893 /* 38100 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13894 /* 38103 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
13895 /* 38106 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
13896 /* 38109 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13897 /* 38113 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13898 /* 38117 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13899 /* 38121 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
13900 /* 38125 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13901 /* 38129 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
13902 /* 38133 */ // MIs[1] Operand 1
13903 /* 38133 */ // No operand predicates
13904 /* 38133 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13905 /* 38135 */ // (vector_insert:{ *:[v8i16] } V128:{ *:[v8i16] }:$vec, I32:{ *:[i32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx) => (REPLACE_LANE_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$vec, (imm:{ *:[i32] }):$idx, I32:{ *:[i32] }:$x)
13906 /* 38135 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I16x8),
13907 /* 38138 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13908 /* 38140 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
13909 /* 38142 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
13910 /* 38145 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
13911 /* 38147 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13912 /* 38150 */ GIR_RootConstrainSelectedInstOperands,
13913 /* 38151 */ // GIR_Coverage, 189,
13914 /* 38151 */ GIR_EraseRootFromParent_Done,
13915 /* 38152 */ // Label 1266: @38152
13916 /* 38152 */ GIM_Reject,
13917 /* 38153 */ // Label 1262: @38153
13918 /* 38153 */ GIM_Try, /*On fail goto*//*Label 1267*/ GIMT_Encode4(38260),
13919 /* 38158 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13920 /* 38161 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
13921 /* 38164 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
13922 /* 38167 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13923 /* 38171 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13924 /* 38175 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1268*/ GIMT_Encode4(38217), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 190 //
13925 /* 38182 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13926 /* 38186 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
13927 /* 38190 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13928 /* 38194 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
13929 /* 38198 */ // MIs[1] Operand 1
13930 /* 38198 */ // No operand predicates
13931 /* 38198 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13932 /* 38200 */ // (vector_insert:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, I32:{ *:[i32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (REPLACE_LANE_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, (imm:{ *:[i32] }):$idx, I32:{ *:[i32] }:$x)
13933 /* 38200 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I32x4),
13934 /* 38203 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13935 /* 38205 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
13936 /* 38207 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
13937 /* 38210 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
13938 /* 38212 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13939 /* 38215 */ GIR_RootConstrainSelectedInstOperands,
13940 /* 38216 */ // GIR_Coverage, 190,
13941 /* 38216 */ GIR_EraseRootFromParent_Done,
13942 /* 38217 */ // Label 1268: @38217
13943 /* 38217 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1269*/ GIMT_Encode4(38259), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 192 //
13944 /* 38224 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13945 /* 38228 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
13946 /* 38232 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13947 /* 38236 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
13948 /* 38240 */ // MIs[1] Operand 1
13949 /* 38240 */ // No operand predicates
13950 /* 38240 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13951 /* 38242 */ // (vector_insert:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, F32:{ *:[f32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (REPLACE_LANE_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, (imm:{ *:[i32] }):$idx, F32:{ *:[f32] }:$x)
13952 /* 38242 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_F32x4),
13953 /* 38245 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13954 /* 38247 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
13955 /* 38249 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
13956 /* 38252 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
13957 /* 38254 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13958 /* 38257 */ GIR_RootConstrainSelectedInstOperands,
13959 /* 38258 */ // GIR_Coverage, 192,
13960 /* 38258 */ GIR_EraseRootFromParent_Done,
13961 /* 38259 */ // Label 1269: @38259
13962 /* 38259 */ GIM_Reject,
13963 /* 38260 */ // Label 1267: @38260
13964 /* 38260 */ GIM_Reject,
13965 /* 38261 */ // Label 1263: @38261
13966 /* 38261 */ GIM_Try, /*On fail goto*//*Label 1270*/ GIMT_Encode4(38368),
13967 /* 38266 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
13968 /* 38269 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
13969 /* 38272 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
13970 /* 38275 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13971 /* 38279 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13972 /* 38283 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1271*/ GIMT_Encode4(38325), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 191 //
13973 /* 38290 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13974 /* 38294 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
13975 /* 38298 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13976 /* 38302 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
13977 /* 38306 */ // MIs[1] Operand 1
13978 /* 38306 */ // No operand predicates
13979 /* 38306 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13980 /* 38308 */ // (vector_insert:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, I64:{ *:[i64] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (REPLACE_LANE_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, (imm:{ *:[i32] }):$idx, I64:{ *:[i64] }:$x)
13981 /* 38308 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I64x2),
13982 /* 38311 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13983 /* 38313 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
13984 /* 38315 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
13985 /* 38318 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
13986 /* 38320 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13987 /* 38323 */ GIR_RootConstrainSelectedInstOperands,
13988 /* 38324 */ // GIR_Coverage, 191,
13989 /* 38324 */ GIR_EraseRootFromParent_Done,
13990 /* 38325 */ // Label 1271: @38325
13991 /* 38325 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1272*/ GIMT_Encode4(38367), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 193 //
13992 /* 38332 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13993 /* 38336 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
13994 /* 38340 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13995 /* 38344 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
13996 /* 38348 */ // MIs[1] Operand 1
13997 /* 38348 */ // No operand predicates
13998 /* 38348 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13999 /* 38350 */ // (vector_insert:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, F64:{ *:[f64] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (REPLACE_LANE_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, (imm:{ *:[i32] }):$idx, F64:{ *:[f64] }:$x)
14000 /* 38350 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_F64x2),
14001 /* 38353 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14002 /* 38355 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
14003 /* 38357 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
14004 /* 38360 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
14005 /* 38362 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14006 /* 38365 */ GIR_RootConstrainSelectedInstOperands,
14007 /* 38366 */ // GIR_Coverage, 193,
14008 /* 38366 */ GIR_EraseRootFromParent_Done,
14009 /* 38367 */ // Label 1272: @38367
14010 /* 38367 */ GIM_Reject,
14011 /* 38368 */ // Label 1270: @38368
14012 /* 38368 */ GIM_Reject,
14013 /* 38369 */ // Label 1264: @38369
14014 /* 38369 */ GIM_Reject,
14015 /* 38370 */ // Label 63: @38370
14016 /* 38370 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(6), GIMT_Encode2(10), /*)*//*default:*//*Label 1277*/ GIMT_Encode4(38855),
14017 /* 38381 */ /*GILLT_v16s8*//*Label 1273*/ GIMT_Encode4(38397),
14018 /* 38385 */ /*GILLT_v8s16*//*Label 1274*/ GIMT_Encode4(38508),
14019 /* 38389 */ /*GILLT_v4s32*//*Label 1275*/ GIMT_Encode4(38595),
14020 /* 38393 */ /*GILLT_v2s64*//*Label 1276*/ GIMT_Encode4(38731),
14021 /* 38397 */ // Label 1273: @38397
14022 /* 38397 */ GIM_Try, /*On fail goto*//*Label 1278*/ GIMT_Encode4(38507),
14023 /* 38402 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14024 /* 38405 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14025 /* 38409 */ GIM_Try, /*On fail goto*//*Label 1279*/ GIMT_Encode4(38482), // Rule ID 1003 //
14026 /* 38414 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14027 /* 38418 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
14028 /* 38422 */ // MIs[1] Operand 1
14029 /* 38422 */ // No operand predicates
14030 /* 38422 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14031 /* 38424 */ // (splat_vector:{ *:[v16i8] } (imm:{ *:[i32] }):$x) => (CONST_V128_I8x16:{ *:[v16i8] } (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x)
14032 /* 38424 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I8x16),
14033 /* 38427 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14034 /* 38429 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14035 /* 38432 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14036 /* 38435 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14037 /* 38438 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14038 /* 38441 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14039 /* 38444 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14040 /* 38447 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14041 /* 38450 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14042 /* 38453 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14043 /* 38456 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14044 /* 38459 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14045 /* 38462 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14046 /* 38465 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14047 /* 38468 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14048 /* 38471 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14049 /* 38474 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14050 /* 38477 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14051 /* 38480 */ GIR_RootConstrainSelectedInstOperands,
14052 /* 38481 */ // GIR_Coverage, 1003,
14053 /* 38481 */ GIR_EraseRootFromParent_Done,
14054 /* 38482 */ // Label 1279: @38482
14055 /* 38482 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1280*/ GIMT_Encode4(38506), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 180 //
14056 /* 38489 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14057 /* 38493 */ // (splat_vector:{ *:[v16i8] } I32:{ *:[i32] }:$x) => (SPLAT_I8x16:{ *:[v16i8] } I32:{ *:[i32] }:$x)
14058 /* 38493 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I8x16),
14059 /* 38498 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14060 /* 38504 */ GIR_RootConstrainSelectedInstOperands,
14061 /* 38505 */ // GIR_Coverage, 180,
14062 /* 38505 */ GIR_Done,
14063 /* 38506 */ // Label 1280: @38506
14064 /* 38506 */ GIM_Reject,
14065 /* 38507 */ // Label 1278: @38507
14066 /* 38507 */ GIM_Reject,
14067 /* 38508 */ // Label 1274: @38508
14068 /* 38508 */ GIM_Try, /*On fail goto*//*Label 1281*/ GIMT_Encode4(38594),
14069 /* 38513 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14070 /* 38516 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14071 /* 38520 */ GIM_Try, /*On fail goto*//*Label 1282*/ GIMT_Encode4(38569), // Rule ID 1004 //
14072 /* 38525 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14073 /* 38529 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
14074 /* 38533 */ // MIs[1] Operand 1
14075 /* 38533 */ // No operand predicates
14076 /* 38533 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14077 /* 38535 */ // (splat_vector:{ *:[v8i16] } (imm:{ *:[i32] }):$x) => (CONST_V128_I16x8:{ *:[v8i16] } (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x)
14078 /* 38535 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I16x8),
14079 /* 38538 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14080 /* 38540 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14081 /* 38543 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14082 /* 38546 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14083 /* 38549 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14084 /* 38552 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14085 /* 38555 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14086 /* 38558 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14087 /* 38561 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14088 /* 38564 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14089 /* 38567 */ GIR_RootConstrainSelectedInstOperands,
14090 /* 38568 */ // GIR_Coverage, 1004,
14091 /* 38568 */ GIR_EraseRootFromParent_Done,
14092 /* 38569 */ // Label 1282: @38569
14093 /* 38569 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1283*/ GIMT_Encode4(38593), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 181 //
14094 /* 38576 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14095 /* 38580 */ // (splat_vector:{ *:[v8i16] } I32:{ *:[i32] }:$x) => (SPLAT_I16x8:{ *:[v8i16] } I32:{ *:[i32] }:$x)
14096 /* 38580 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I16x8),
14097 /* 38585 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14098 /* 38591 */ GIR_RootConstrainSelectedInstOperands,
14099 /* 38592 */ // GIR_Coverage, 181,
14100 /* 38592 */ GIR_Done,
14101 /* 38593 */ // Label 1283: @38593
14102 /* 38593 */ GIM_Reject,
14103 /* 38594 */ // Label 1281: @38594
14104 /* 38594 */ GIM_Reject,
14105 /* 38595 */ // Label 1275: @38595
14106 /* 38595 */ GIM_Try, /*On fail goto*//*Label 1284*/ GIMT_Encode4(38730),
14107 /* 38600 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14108 /* 38603 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14109 /* 38607 */ GIM_Try, /*On fail goto*//*Label 1285*/ GIMT_Encode4(38644), // Rule ID 1007 //
14110 /* 38612 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14111 /* 38616 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
14112 /* 38620 */ // MIs[1] Operand 1
14113 /* 38620 */ // No operand predicates
14114 /* 38620 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14115 /* 38622 */ // (splat_vector:{ *:[v4f32] } (fpimm:{ *:[f32] }):$x) => (CONST_V128_F32x4:{ *:[v4f32] } (fpimm:{ *:[f32] }):$x, (fpimm:{ *:[f32] }):$x, (fpimm:{ *:[f32] }):$x, (fpimm:{ *:[f32] }):$x)
14116 /* 38622 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F32x4),
14117 /* 38625 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14118 /* 38627 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14119 /* 38630 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14120 /* 38633 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14121 /* 38636 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14122 /* 38639 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14123 /* 38642 */ GIR_RootConstrainSelectedInstOperands,
14124 /* 38643 */ // GIR_Coverage, 1007,
14125 /* 38643 */ GIR_EraseRootFromParent_Done,
14126 /* 38644 */ // Label 1285: @38644
14127 /* 38644 */ GIM_Try, /*On fail goto*//*Label 1286*/ GIMT_Encode4(38681), // Rule ID 1005 //
14128 /* 38649 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14129 /* 38653 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
14130 /* 38657 */ // MIs[1] Operand 1
14131 /* 38657 */ // No operand predicates
14132 /* 38657 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14133 /* 38659 */ // (splat_vector:{ *:[v4i32] } (imm:{ *:[i32] }):$x) => (CONST_V128_I32x4:{ *:[v4i32] } (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x)
14134 /* 38659 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I32x4),
14135 /* 38662 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14136 /* 38664 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14137 /* 38667 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14138 /* 38670 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14139 /* 38673 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14140 /* 38676 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14141 /* 38679 */ GIR_RootConstrainSelectedInstOperands,
14142 /* 38680 */ // GIR_Coverage, 1005,
14143 /* 38680 */ GIR_EraseRootFromParent_Done,
14144 /* 38681 */ // Label 1286: @38681
14145 /* 38681 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1287*/ GIMT_Encode4(38705), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 182 //
14146 /* 38688 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14147 /* 38692 */ // (splat_vector:{ *:[v4i32] } I32:{ *:[i32] }:$x) => (SPLAT_I32x4:{ *:[v4i32] } I32:{ *:[i32] }:$x)
14148 /* 38692 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I32x4),
14149 /* 38697 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14150 /* 38703 */ GIR_RootConstrainSelectedInstOperands,
14151 /* 38704 */ // GIR_Coverage, 182,
14152 /* 38704 */ GIR_Done,
14153 /* 38705 */ // Label 1287: @38705
14154 /* 38705 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1288*/ GIMT_Encode4(38729), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 184 //
14155 /* 38712 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14156 /* 38716 */ // (splat_vector:{ *:[v4f32] } F32:{ *:[f32] }:$x) => (SPLAT_F32x4:{ *:[v4f32] } F32:{ *:[f32] }:$x)
14157 /* 38716 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_F32x4),
14158 /* 38721 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14159 /* 38727 */ GIR_RootConstrainSelectedInstOperands,
14160 /* 38728 */ // GIR_Coverage, 184,
14161 /* 38728 */ GIR_Done,
14162 /* 38729 */ // Label 1288: @38729
14163 /* 38729 */ GIM_Reject,
14164 /* 38730 */ // Label 1284: @38730
14165 /* 38730 */ GIM_Reject,
14166 /* 38731 */ // Label 1276: @38731
14167 /* 38731 */ GIM_Try, /*On fail goto*//*Label 1289*/ GIMT_Encode4(38854),
14168 /* 38736 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
14169 /* 38739 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14170 /* 38743 */ GIM_Try, /*On fail goto*//*Label 1290*/ GIMT_Encode4(38774), // Rule ID 1008 //
14171 /* 38748 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14172 /* 38752 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
14173 /* 38756 */ // MIs[1] Operand 1
14174 /* 38756 */ // No operand predicates
14175 /* 38756 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14176 /* 38758 */ // (splat_vector:{ *:[v2f64] } (fpimm:{ *:[f64] }):$x) => (CONST_V128_F64x2:{ *:[v2f64] } (fpimm:{ *:[f64] }):$x, (fpimm:{ *:[f64] }):$x)
14177 /* 38758 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F64x2),
14178 /* 38761 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14179 /* 38763 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14180 /* 38766 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14181 /* 38769 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14182 /* 38772 */ GIR_RootConstrainSelectedInstOperands,
14183 /* 38773 */ // GIR_Coverage, 1008,
14184 /* 38773 */ GIR_EraseRootFromParent_Done,
14185 /* 38774 */ // Label 1290: @38774
14186 /* 38774 */ GIM_Try, /*On fail goto*//*Label 1291*/ GIMT_Encode4(38805), // Rule ID 1006 //
14187 /* 38779 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14188 /* 38783 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
14189 /* 38787 */ // MIs[1] Operand 1
14190 /* 38787 */ // No operand predicates
14191 /* 38787 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14192 /* 38789 */ // (splat_vector:{ *:[v2i64] } (imm:{ *:[i64] }):$x) => (CONST_V128_I64x2:{ *:[v2i64] } (imm:{ *:[i64] }):$x, (imm:{ *:[i64] }):$x)
14193 /* 38789 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I64x2),
14194 /* 38792 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14195 /* 38794 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14196 /* 38797 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14197 /* 38800 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14198 /* 38803 */ GIR_RootConstrainSelectedInstOperands,
14199 /* 38804 */ // GIR_Coverage, 1006,
14200 /* 38804 */ GIR_EraseRootFromParent_Done,
14201 /* 38805 */ // Label 1291: @38805
14202 /* 38805 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1292*/ GIMT_Encode4(38829), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 183 //
14203 /* 38812 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14204 /* 38816 */ // (splat_vector:{ *:[v2i64] } I64:{ *:[i64] }:$x) => (SPLAT_I64x2:{ *:[v2i64] } I64:{ *:[i64] }:$x)
14205 /* 38816 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I64x2),
14206 /* 38821 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14207 /* 38827 */ GIR_RootConstrainSelectedInstOperands,
14208 /* 38828 */ // GIR_Coverage, 183,
14209 /* 38828 */ GIR_Done,
14210 /* 38829 */ // Label 1292: @38829
14211 /* 38829 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1293*/ GIMT_Encode4(38853), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 185 //
14212 /* 38836 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14213 /* 38840 */ // (splat_vector:{ *:[v2f64] } F64:{ *:[f64] }:$x) => (SPLAT_F64x2:{ *:[v2f64] } F64:{ *:[f64] }:$x)
14214 /* 38840 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_F64x2),
14215 /* 38845 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14216 /* 38851 */ GIR_RootConstrainSelectedInstOperands,
14217 /* 38852 */ // GIR_Coverage, 185,
14218 /* 38852 */ GIR_Done,
14219 /* 38853 */ // Label 1293: @38853
14220 /* 38853 */ GIM_Reject,
14221 /* 38854 */ // Label 1289: @38854
14222 /* 38854 */ GIM_Reject,
14223 /* 38855 */ // Label 1277: @38855
14224 /* 38855 */ GIM_Reject,
14225 /* 38856 */ // Label 64: @38856
14226 /* 38856 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1296*/ GIMT_Encode4(38935),
14227 /* 38867 */ /*GILLT_i32*//*Label 1294*/ GIMT_Encode4(38875),
14228 /* 38871 */ /*GILLT_i64*//*Label 1295*/ GIMT_Encode4(38905),
14229 /* 38875 */ // Label 1294: @38875
14230 /* 38875 */ GIM_Try, /*On fail goto*//*Label 1297*/ GIMT_Encode4(38904), // Rule ID 116 //
14231 /* 38880 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
14232 /* 38883 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14233 /* 38887 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14234 /* 38891 */ // (cttz:{ *:[i32] } I32:{ *:[i32] }:$src) => (CTZ_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
14235 /* 38891 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CTZ_I32),
14236 /* 38896 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14237 /* 38902 */ GIR_RootConstrainSelectedInstOperands,
14238 /* 38903 */ // GIR_Coverage, 116,
14239 /* 38903 */ GIR_Done,
14240 /* 38904 */ // Label 1297: @38904
14241 /* 38904 */ GIM_Reject,
14242 /* 38905 */ // Label 1295: @38905
14243 /* 38905 */ GIM_Try, /*On fail goto*//*Label 1298*/ GIMT_Encode4(38934), // Rule ID 117 //
14244 /* 38910 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
14245 /* 38913 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14246 /* 38917 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14247 /* 38921 */ // (cttz:{ *:[i64] } I64:{ *:[i64] }:$src) => (CTZ_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
14248 /* 38921 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CTZ_I64),
14249 /* 38926 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14250 /* 38932 */ GIR_RootConstrainSelectedInstOperands,
14251 /* 38933 */ // GIR_Coverage, 117,
14252 /* 38933 */ GIR_Done,
14253 /* 38934 */ // Label 1298: @38934
14254 /* 38934 */ GIM_Reject,
14255 /* 38935 */ // Label 1296: @38935
14256 /* 38935 */ GIM_Reject,
14257 /* 38936 */ // Label 65: @38936
14258 /* 38936 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1301*/ GIMT_Encode4(39015),
14259 /* 38947 */ /*GILLT_i32*//*Label 1299*/ GIMT_Encode4(38955),
14260 /* 38951 */ /*GILLT_i64*//*Label 1300*/ GIMT_Encode4(38985),
14261 /* 38955 */ // Label 1299: @38955
14262 /* 38955 */ GIM_Try, /*On fail goto*//*Label 1302*/ GIMT_Encode4(38984), // Rule ID 114 //
14263 /* 38960 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
14264 /* 38963 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14265 /* 38967 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14266 /* 38971 */ // (ctlz:{ *:[i32] } I32:{ *:[i32] }:$src) => (CLZ_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
14267 /* 38971 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CLZ_I32),
14268 /* 38976 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14269 /* 38982 */ GIR_RootConstrainSelectedInstOperands,
14270 /* 38983 */ // GIR_Coverage, 114,
14271 /* 38983 */ GIR_Done,
14272 /* 38984 */ // Label 1302: @38984
14273 /* 38984 */ GIM_Reject,
14274 /* 38985 */ // Label 1300: @38985
14275 /* 38985 */ GIM_Try, /*On fail goto*//*Label 1303*/ GIMT_Encode4(39014), // Rule ID 115 //
14276 /* 38990 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
14277 /* 38993 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14278 /* 38997 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14279 /* 39001 */ // (ctlz:{ *:[i64] } I64:{ *:[i64] }:$src) => (CLZ_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
14280 /* 39001 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CLZ_I64),
14281 /* 39006 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14282 /* 39012 */ GIR_RootConstrainSelectedInstOperands,
14283 /* 39013 */ // GIR_Coverage, 115,
14284 /* 39013 */ GIR_Done,
14285 /* 39014 */ // Label 1303: @39014
14286 /* 39014 */ GIM_Reject,
14287 /* 39015 */ // Label 1301: @39015
14288 /* 39015 */ GIM_Reject,
14289 /* 39016 */ // Label 66: @39016
14290 /* 39016 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(11), /*)*//*default:*//*Label 1307*/ GIMT_Encode4(39155),
14291 /* 39027 */ /*GILLT_i32*//*Label 1304*/ GIMT_Encode4(39063),
14292 /* 39031 */ /*GILLT_i64*//*Label 1305*/ GIMT_Encode4(39093), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14293 /* 39059 */ /*GILLT_v16i8*//*Label 1306*/ GIMT_Encode4(39123),
14294 /* 39063 */ // Label 1304: @39063
14295 /* 39063 */ GIM_Try, /*On fail goto*//*Label 1308*/ GIMT_Encode4(39092), // Rule ID 118 //
14296 /* 39068 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
14297 /* 39071 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14298 /* 39075 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14299 /* 39079 */ // (ctpop:{ *:[i32] } I32:{ *:[i32] }:$src) => (POPCNT_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
14300 /* 39079 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::POPCNT_I32),
14301 /* 39084 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14302 /* 39090 */ GIR_RootConstrainSelectedInstOperands,
14303 /* 39091 */ // GIR_Coverage, 118,
14304 /* 39091 */ GIR_Done,
14305 /* 39092 */ // Label 1308: @39092
14306 /* 39092 */ GIM_Reject,
14307 /* 39093 */ // Label 1305: @39093
14308 /* 39093 */ GIM_Try, /*On fail goto*//*Label 1309*/ GIMT_Encode4(39122), // Rule ID 119 //
14309 /* 39098 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
14310 /* 39101 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14311 /* 39105 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14312 /* 39109 */ // (ctpop:{ *:[i64] } I64:{ *:[i64] }:$src) => (POPCNT_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
14313 /* 39109 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::POPCNT_I64),
14314 /* 39114 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14315 /* 39120 */ GIR_RootConstrainSelectedInstOperands,
14316 /* 39121 */ // GIR_Coverage, 119,
14317 /* 39121 */ GIR_Done,
14318 /* 39122 */ // Label 1309: @39122
14319 /* 39122 */ GIM_Reject,
14320 /* 39123 */ // Label 1306: @39123
14321 /* 39123 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1310*/ GIMT_Encode4(39154), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 257 //
14322 /* 39130 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
14323 /* 39133 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14324 /* 39137 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14325 /* 39141 */ // (ctpop:{ *:[v16i8] } V128:{ *:[v16i8] }:$v) => (POPCNT_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$v)
14326 /* 39141 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::POPCNT_I8x16),
14327 /* 39146 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14328 /* 39152 */ GIR_RootConstrainSelectedInstOperands,
14329 /* 39153 */ // GIR_Coverage, 257,
14330 /* 39153 */ GIR_Done,
14331 /* 39154 */ // Label 1310: @39154
14332 /* 39154 */ GIM_Reject,
14333 /* 39155 */ // Label 1307: @39155
14334 /* 39155 */ GIM_Reject,
14335 /* 39156 */ // Label 67: @39156
14336 /* 39156 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(17), /*)*//*default:*//*Label 1316*/ GIMT_Encode4(39375),
14337 /* 39167 */ /*GILLT_f32*//*Label 1311*/ GIMT_Encode4(39219),
14338 /* 39171 */ /*GILLT_f64*//*Label 1312*/ GIMT_Encode4(39249), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14339 /* 39207 */ /*GILLT_v8f16*//*Label 1313*/ GIMT_Encode4(39279),
14340 /* 39211 */ /*GILLT_v4f32*//*Label 1314*/ GIMT_Encode4(39311),
14341 /* 39215 */ /*GILLT_v2f64*//*Label 1315*/ GIMT_Encode4(39343),
14342 /* 39219 */ // Label 1311: @39219
14343 /* 39219 */ GIM_Try, /*On fail goto*//*Label 1317*/ GIMT_Encode4(39248), // Rule ID 144 //
14344 /* 39224 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
14345 /* 39227 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14346 /* 39231 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14347 /* 39235 */ // (fceil:{ *:[f32] } F32:{ *:[f32] }:$src) => (CEIL_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
14348 /* 39235 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F32),
14349 /* 39240 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14350 /* 39246 */ GIR_RootConstrainSelectedInstOperands,
14351 /* 39247 */ // GIR_Coverage, 144,
14352 /* 39247 */ GIR_Done,
14353 /* 39248 */ // Label 1317: @39248
14354 /* 39248 */ GIM_Reject,
14355 /* 39249 */ // Label 1312: @39249
14356 /* 39249 */ GIM_Try, /*On fail goto*//*Label 1318*/ GIMT_Encode4(39278), // Rule ID 145 //
14357 /* 39254 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
14358 /* 39257 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14359 /* 39261 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14360 /* 39265 */ // (fceil:{ *:[f64] } F64:{ *:[f64] }:$src) => (CEIL_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
14361 /* 39265 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F64),
14362 /* 39270 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14363 /* 39276 */ GIR_RootConstrainSelectedInstOperands,
14364 /* 39277 */ // GIR_Coverage, 145,
14365 /* 39277 */ GIR_Done,
14366 /* 39278 */ // Label 1318: @39278
14367 /* 39278 */ GIM_Reject,
14368 /* 39279 */ // Label 1313: @39279
14369 /* 39279 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1319*/ GIMT_Encode4(39310), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 341 //
14370 /* 39286 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
14371 /* 39289 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14372 /* 39293 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14373 /* 39297 */ // (fceil:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (CEIL_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
14374 /* 39297 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F16x8),
14375 /* 39302 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14376 /* 39308 */ GIR_RootConstrainSelectedInstOperands,
14377 /* 39309 */ // GIR_Coverage, 341,
14378 /* 39309 */ GIR_Done,
14379 /* 39310 */ // Label 1319: @39310
14380 /* 39310 */ GIM_Reject,
14381 /* 39311 */ // Label 1314: @39311
14382 /* 39311 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1320*/ GIMT_Encode4(39342), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 333 //
14383 /* 39318 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
14384 /* 39321 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14385 /* 39325 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14386 /* 39329 */ // (fceil:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (CEIL_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
14387 /* 39329 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F32x4),
14388 /* 39334 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14389 /* 39340 */ GIR_RootConstrainSelectedInstOperands,
14390 /* 39341 */ // GIR_Coverage, 333,
14391 /* 39341 */ GIR_Done,
14392 /* 39342 */ // Label 1320: @39342
14393 /* 39342 */ GIM_Reject,
14394 /* 39343 */ // Label 1315: @39343
14395 /* 39343 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1321*/ GIMT_Encode4(39374), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 337 //
14396 /* 39350 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
14397 /* 39353 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14398 /* 39357 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14399 /* 39361 */ // (fceil:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (CEIL_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
14400 /* 39361 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F64x2),
14401 /* 39366 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14402 /* 39372 */ GIR_RootConstrainSelectedInstOperands,
14403 /* 39373 */ // GIR_Coverage, 337,
14404 /* 39373 */ GIR_Done,
14405 /* 39374 */ // Label 1321: @39374
14406 /* 39374 */ GIM_Reject,
14407 /* 39375 */ // Label 1316: @39375
14408 /* 39375 */ GIM_Reject,
14409 /* 39376 */ // Label 68: @39376
14410 /* 39376 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(17), /*)*//*default:*//*Label 1327*/ GIMT_Encode4(39595),
14411 /* 39387 */ /*GILLT_f32*//*Label 1322*/ GIMT_Encode4(39439),
14412 /* 39391 */ /*GILLT_f64*//*Label 1323*/ GIMT_Encode4(39469), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14413 /* 39427 */ /*GILLT_v8f16*//*Label 1324*/ GIMT_Encode4(39499),
14414 /* 39431 */ /*GILLT_v4f32*//*Label 1325*/ GIMT_Encode4(39531),
14415 /* 39435 */ /*GILLT_v2f64*//*Label 1326*/ GIMT_Encode4(39563),
14416 /* 39439 */ // Label 1322: @39439
14417 /* 39439 */ GIM_Try, /*On fail goto*//*Label 1328*/ GIMT_Encode4(39468), // Rule ID 132 //
14418 /* 39444 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
14419 /* 39447 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14420 /* 39451 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14421 /* 39455 */ // (fsqrt:{ *:[f32] } F32:{ *:[f32] }:$src) => (SQRT_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
14422 /* 39455 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F32),
14423 /* 39460 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14424 /* 39466 */ GIR_RootConstrainSelectedInstOperands,
14425 /* 39467 */ // GIR_Coverage, 132,
14426 /* 39467 */ GIR_Done,
14427 /* 39468 */ // Label 1328: @39468
14428 /* 39468 */ GIM_Reject,
14429 /* 39469 */ // Label 1323: @39469
14430 /* 39469 */ GIM_Try, /*On fail goto*//*Label 1329*/ GIMT_Encode4(39498), // Rule ID 133 //
14431 /* 39474 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
14432 /* 39477 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14433 /* 39481 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14434 /* 39485 */ // (fsqrt:{ *:[f64] } F64:{ *:[f64] }:$src) => (SQRT_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
14435 /* 39485 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F64),
14436 /* 39490 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14437 /* 39496 */ GIR_RootConstrainSelectedInstOperands,
14438 /* 39497 */ // GIR_Coverage, 133,
14439 /* 39497 */ GIR_Done,
14440 /* 39498 */ // Label 1329: @39498
14441 /* 39498 */ GIM_Reject,
14442 /* 39499 */ // Label 1324: @39499
14443 /* 39499 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1330*/ GIMT_Encode4(39530), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 332 //
14444 /* 39506 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
14445 /* 39509 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14446 /* 39513 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14447 /* 39517 */ // (fsqrt:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (SQRT_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
14448 /* 39517 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F16x8),
14449 /* 39522 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14450 /* 39528 */ GIR_RootConstrainSelectedInstOperands,
14451 /* 39529 */ // GIR_Coverage, 332,
14452 /* 39529 */ GIR_Done,
14453 /* 39530 */ // Label 1330: @39530
14454 /* 39530 */ GIM_Reject,
14455 /* 39531 */ // Label 1325: @39531
14456 /* 39531 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1331*/ GIMT_Encode4(39562), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 330 //
14457 /* 39538 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
14458 /* 39541 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14459 /* 39545 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14460 /* 39549 */ // (fsqrt:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (SQRT_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
14461 /* 39549 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F32x4),
14462 /* 39554 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14463 /* 39560 */ GIR_RootConstrainSelectedInstOperands,
14464 /* 39561 */ // GIR_Coverage, 330,
14465 /* 39561 */ GIR_Done,
14466 /* 39562 */ // Label 1331: @39562
14467 /* 39562 */ GIM_Reject,
14468 /* 39563 */ // Label 1326: @39563
14469 /* 39563 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1332*/ GIMT_Encode4(39594), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 331 //
14470 /* 39570 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
14471 /* 39573 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14472 /* 39577 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14473 /* 39581 */ // (fsqrt:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (SQRT_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
14474 /* 39581 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F64x2),
14475 /* 39586 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14476 /* 39592 */ GIR_RootConstrainSelectedInstOperands,
14477 /* 39593 */ // GIR_Coverage, 331,
14478 /* 39593 */ GIR_Done,
14479 /* 39594 */ // Label 1332: @39594
14480 /* 39594 */ GIM_Reject,
14481 /* 39595 */ // Label 1327: @39595
14482 /* 39595 */ GIM_Reject,
14483 /* 39596 */ // Label 69: @39596
14484 /* 39596 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(17), /*)*//*default:*//*Label 1338*/ GIMT_Encode4(39815),
14485 /* 39607 */ /*GILLT_f32*//*Label 1333*/ GIMT_Encode4(39659),
14486 /* 39611 */ /*GILLT_f64*//*Label 1334*/ GIMT_Encode4(39689), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14487 /* 39647 */ /*GILLT_v8f16*//*Label 1335*/ GIMT_Encode4(39719),
14488 /* 39651 */ /*GILLT_v4f32*//*Label 1336*/ GIMT_Encode4(39751),
14489 /* 39655 */ /*GILLT_v2f64*//*Label 1337*/ GIMT_Encode4(39783),
14490 /* 39659 */ // Label 1333: @39659
14491 /* 39659 */ GIM_Try, /*On fail goto*//*Label 1339*/ GIMT_Encode4(39688), // Rule ID 146 //
14492 /* 39664 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
14493 /* 39667 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14494 /* 39671 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14495 /* 39675 */ // (ffloor:{ *:[f32] } F32:{ *:[f32] }:$src) => (FLOOR_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
14496 /* 39675 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F32),
14497 /* 39680 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14498 /* 39686 */ GIR_RootConstrainSelectedInstOperands,
14499 /* 39687 */ // GIR_Coverage, 146,
14500 /* 39687 */ GIR_Done,
14501 /* 39688 */ // Label 1339: @39688
14502 /* 39688 */ GIM_Reject,
14503 /* 39689 */ // Label 1334: @39689
14504 /* 39689 */ GIM_Try, /*On fail goto*//*Label 1340*/ GIMT_Encode4(39718), // Rule ID 147 //
14505 /* 39694 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
14506 /* 39697 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14507 /* 39701 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14508 /* 39705 */ // (ffloor:{ *:[f64] } F64:{ *:[f64] }:$src) => (FLOOR_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
14509 /* 39705 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F64),
14510 /* 39710 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14511 /* 39716 */ GIR_RootConstrainSelectedInstOperands,
14512 /* 39717 */ // GIR_Coverage, 147,
14513 /* 39717 */ GIR_Done,
14514 /* 39718 */ // Label 1340: @39718
14515 /* 39718 */ GIM_Reject,
14516 /* 39719 */ // Label 1335: @39719
14517 /* 39719 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1341*/ GIMT_Encode4(39750), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 342 //
14518 /* 39726 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
14519 /* 39729 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14520 /* 39733 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14521 /* 39737 */ // (ffloor:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (FLOOR_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
14522 /* 39737 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F16x8),
14523 /* 39742 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14524 /* 39748 */ GIR_RootConstrainSelectedInstOperands,
14525 /* 39749 */ // GIR_Coverage, 342,
14526 /* 39749 */ GIR_Done,
14527 /* 39750 */ // Label 1341: @39750
14528 /* 39750 */ GIM_Reject,
14529 /* 39751 */ // Label 1336: @39751
14530 /* 39751 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1342*/ GIMT_Encode4(39782), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 334 //
14531 /* 39758 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
14532 /* 39761 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14533 /* 39765 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14534 /* 39769 */ // (ffloor:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (FLOOR_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
14535 /* 39769 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F32x4),
14536 /* 39774 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14537 /* 39780 */ GIR_RootConstrainSelectedInstOperands,
14538 /* 39781 */ // GIR_Coverage, 334,
14539 /* 39781 */ GIR_Done,
14540 /* 39782 */ // Label 1342: @39782
14541 /* 39782 */ GIM_Reject,
14542 /* 39783 */ // Label 1337: @39783
14543 /* 39783 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1343*/ GIMT_Encode4(39814), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 338 //
14544 /* 39790 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
14545 /* 39793 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14546 /* 39797 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14547 /* 39801 */ // (ffloor:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (FLOOR_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
14548 /* 39801 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F64x2),
14549 /* 39806 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14550 /* 39812 */ GIR_RootConstrainSelectedInstOperands,
14551 /* 39813 */ // GIR_Coverage, 338,
14552 /* 39813 */ GIR_Done,
14553 /* 39814 */ // Label 1343: @39814
14554 /* 39814 */ GIM_Reject,
14555 /* 39815 */ // Label 1338: @39815
14556 /* 39815 */ GIM_Reject,
14557 /* 39816 */ // Label 70: @39816
14558 /* 39816 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(17), /*)*//*default:*//*Label 1349*/ GIMT_Encode4(40021),
14559 /* 39827 */ /*GILLT_f32*//*Label 1344*/ GIMT_Encode4(39879),
14560 /* 39831 */ /*GILLT_f64*//*Label 1345*/ GIMT_Encode4(39905), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14561 /* 39867 */ /*GILLT_v8f16*//*Label 1346*/ GIMT_Encode4(39931),
14562 /* 39871 */ /*GILLT_v4f32*//*Label 1347*/ GIMT_Encode4(39961),
14563 /* 39875 */ /*GILLT_v2f64*//*Label 1348*/ GIMT_Encode4(39991),
14564 /* 39879 */ // Label 1344: @39879
14565 /* 39879 */ GIM_Try, /*On fail goto*//*Label 1350*/ GIMT_Encode4(39904), // Rule ID 679 //
14566 /* 39884 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
14567 /* 39887 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14568 /* 39891 */ // (frint:{ *:[f32] } f32:{ *:[f32] }:$src) => (NEAREST_F32:{ *:[f32] } f32:{ *:[f32] }:$src)
14569 /* 39891 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32),
14570 /* 39896 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14571 /* 39902 */ GIR_RootConstrainSelectedInstOperands,
14572 /* 39903 */ // GIR_Coverage, 679,
14573 /* 39903 */ GIR_Done,
14574 /* 39904 */ // Label 1350: @39904
14575 /* 39904 */ GIM_Reject,
14576 /* 39905 */ // Label 1345: @39905
14577 /* 39905 */ GIM_Try, /*On fail goto*//*Label 1351*/ GIMT_Encode4(39930), // Rule ID 680 //
14578 /* 39910 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
14579 /* 39913 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14580 /* 39917 */ // (frint:{ *:[f64] } f64:{ *:[f64] }:$src) => (NEAREST_F64:{ *:[f64] } f64:{ *:[f64] }:$src)
14581 /* 39917 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64),
14582 /* 39922 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14583 /* 39928 */ GIR_RootConstrainSelectedInstOperands,
14584 /* 39929 */ // GIR_Coverage, 680,
14585 /* 39929 */ GIR_Done,
14586 /* 39930 */ // Label 1351: @39930
14587 /* 39930 */ GIM_Reject,
14588 /* 39931 */ // Label 1346: @39931
14589 /* 39931 */ GIM_Try, /*On fail goto*//*Label 1352*/ GIMT_Encode4(39960), // Rule ID 1191 //
14590 /* 39936 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
14591 /* 39939 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14592 /* 39943 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14593 /* 39947 */ // (frint:{ *:[v8f16] } V128:{ *:[v8f16] }:$src) => (NEAREST_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$src)
14594 /* 39947 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F16x8),
14595 /* 39952 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14596 /* 39958 */ GIR_RootConstrainSelectedInstOperands,
14597 /* 39959 */ // GIR_Coverage, 1191,
14598 /* 39959 */ GIR_Done,
14599 /* 39960 */ // Label 1352: @39960
14600 /* 39960 */ GIM_Reject,
14601 /* 39961 */ // Label 1347: @39961
14602 /* 39961 */ GIM_Try, /*On fail goto*//*Label 1353*/ GIMT_Encode4(39990), // Rule ID 1189 //
14603 /* 39966 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
14604 /* 39969 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14605 /* 39973 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14606 /* 39977 */ // (frint:{ *:[v4f32] } V128:{ *:[v4f32] }:$src) => (NEAREST_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$src)
14607 /* 39977 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32x4),
14608 /* 39982 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14609 /* 39988 */ GIR_RootConstrainSelectedInstOperands,
14610 /* 39989 */ // GIR_Coverage, 1189,
14611 /* 39989 */ GIR_Done,
14612 /* 39990 */ // Label 1353: @39990
14613 /* 39990 */ GIM_Reject,
14614 /* 39991 */ // Label 1348: @39991
14615 /* 39991 */ GIM_Try, /*On fail goto*//*Label 1354*/ GIMT_Encode4(40020), // Rule ID 1190 //
14616 /* 39996 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
14617 /* 39999 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14618 /* 40003 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14619 /* 40007 */ // (frint:{ *:[v2f64] } V128:{ *:[v2f64] }:$src) => (NEAREST_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$src)
14620 /* 40007 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64x2),
14621 /* 40012 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14622 /* 40018 */ GIR_RootConstrainSelectedInstOperands,
14623 /* 40019 */ // GIR_Coverage, 1190,
14624 /* 40019 */ GIR_Done,
14625 /* 40020 */ // Label 1354: @40020
14626 /* 40020 */ GIM_Reject,
14627 /* 40021 */ // Label 1349: @40021
14628 /* 40021 */ GIM_Reject,
14629 /* 40022 */ // Label 71: @40022
14630 /* 40022 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(17), /*)*//*default:*//*Label 1360*/ GIMT_Encode4(40241),
14631 /* 40033 */ /*GILLT_f32*//*Label 1355*/ GIMT_Encode4(40085),
14632 /* 40037 */ /*GILLT_f64*//*Label 1356*/ GIMT_Encode4(40115), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14633 /* 40073 */ /*GILLT_v8f16*//*Label 1357*/ GIMT_Encode4(40145),
14634 /* 40077 */ /*GILLT_v4f32*//*Label 1358*/ GIMT_Encode4(40177),
14635 /* 40081 */ /*GILLT_v2f64*//*Label 1359*/ GIMT_Encode4(40209),
14636 /* 40085 */ // Label 1355: @40085
14637 /* 40085 */ GIM_Try, /*On fail goto*//*Label 1361*/ GIMT_Encode4(40114), // Rule ID 150 //
14638 /* 40090 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
14639 /* 40093 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14640 /* 40097 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14641 /* 40101 */ // (fnearbyint:{ *:[f32] } F32:{ *:[f32] }:$src) => (NEAREST_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
14642 /* 40101 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32),
14643 /* 40106 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14644 /* 40112 */ GIR_RootConstrainSelectedInstOperands,
14645 /* 40113 */ // GIR_Coverage, 150,
14646 /* 40113 */ GIR_Done,
14647 /* 40114 */ // Label 1361: @40114
14648 /* 40114 */ GIM_Reject,
14649 /* 40115 */ // Label 1356: @40115
14650 /* 40115 */ GIM_Try, /*On fail goto*//*Label 1362*/ GIMT_Encode4(40144), // Rule ID 151 //
14651 /* 40120 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
14652 /* 40123 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14653 /* 40127 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14654 /* 40131 */ // (fnearbyint:{ *:[f64] } F64:{ *:[f64] }:$src) => (NEAREST_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
14655 /* 40131 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64),
14656 /* 40136 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14657 /* 40142 */ GIR_RootConstrainSelectedInstOperands,
14658 /* 40143 */ // GIR_Coverage, 151,
14659 /* 40143 */ GIR_Done,
14660 /* 40144 */ // Label 1362: @40144
14661 /* 40144 */ GIM_Reject,
14662 /* 40145 */ // Label 1357: @40145
14663 /* 40145 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1363*/ GIMT_Encode4(40176), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 344 //
14664 /* 40152 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
14665 /* 40155 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14666 /* 40159 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14667 /* 40163 */ // (fnearbyint:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (NEAREST_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
14668 /* 40163 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F16x8),
14669 /* 40168 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14670 /* 40174 */ GIR_RootConstrainSelectedInstOperands,
14671 /* 40175 */ // GIR_Coverage, 344,
14672 /* 40175 */ GIR_Done,
14673 /* 40176 */ // Label 1363: @40176
14674 /* 40176 */ GIM_Reject,
14675 /* 40177 */ // Label 1358: @40177
14676 /* 40177 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1364*/ GIMT_Encode4(40208), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 336 //
14677 /* 40184 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
14678 /* 40187 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14679 /* 40191 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14680 /* 40195 */ // (fnearbyint:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (NEAREST_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
14681 /* 40195 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32x4),
14682 /* 40200 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14683 /* 40206 */ GIR_RootConstrainSelectedInstOperands,
14684 /* 40207 */ // GIR_Coverage, 336,
14685 /* 40207 */ GIR_Done,
14686 /* 40208 */ // Label 1364: @40208
14687 /* 40208 */ GIM_Reject,
14688 /* 40209 */ // Label 1359: @40209
14689 /* 40209 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1365*/ GIMT_Encode4(40240), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 340 //
14690 /* 40216 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
14691 /* 40219 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14692 /* 40223 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14693 /* 40227 */ // (fnearbyint:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (NEAREST_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
14694 /* 40227 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64x2),
14695 /* 40232 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14696 /* 40238 */ GIR_RootConstrainSelectedInstOperands,
14697 /* 40239 */ // GIR_Coverage, 340,
14698 /* 40239 */ GIR_Done,
14699 /* 40240 */ // Label 1365: @40240
14700 /* 40240 */ GIM_Reject,
14701 /* 40241 */ // Label 1360: @40241
14702 /* 40241 */ GIM_Reject,
14703 /* 40242 */ // Label 72: @40242
14704 /* 40242 */ GIM_Try, /*On fail goto*//*Label 1366*/ GIMT_Encode4(40260), // Rule ID 22 //
14705 /* 40247 */ // (trap) => (UNREACHABLE)
14706 /* 40247 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::UNREACHABLE),
14707 /* 40252 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14708 /* 40258 */ GIR_RootConstrainSelectedInstOperands,
14709 /* 40259 */ // GIR_Coverage, 22,
14710 /* 40259 */ GIR_Done,
14711 /* 40260 */ // Label 1366: @40260
14712 /* 40260 */ GIM_Reject,
14713 /* 40261 */ // Label 73: @40261
14714 /* 40261 */ GIM_Try, /*On fail goto*//*Label 1367*/ GIMT_Encode4(40279), // Rule ID 23 //
14715 /* 40266 */ // (debugtrap) => (DEBUG_UNREACHABLE)
14716 /* 40266 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DEBUG_UNREACHABLE),
14717 /* 40271 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14718 /* 40277 */ GIR_RootConstrainSelectedInstOperands,
14719 /* 40278 */ // GIR_Coverage, 23,
14720 /* 40278 */ GIR_Done,
14721 /* 40279 */ // Label 1367: @40279
14722 /* 40279 */ GIM_Reject,
14723 /* 40280 */ // Label 74: @40280
14724 /* 40280 */ GIM_Reject,
14725 /* 40281 */ }; // Size: 40281 bytes
14726 return MatchTable0;
14727}
14728#undef GIMT_Encode2
14729#undef GIMT_Encode4
14730#undef GIMT_Encode8
14731
14732
14733#endif // GET_GLOBALISEL_IMPL
14734
14735#ifdef GET_GLOBALISEL_PREDICATES_DECL
14736
14737PredicateBitset AvailableModuleFeatures;
14738mutable PredicateBitset AvailableFunctionFeatures;
14739PredicateBitset getAvailableFeatures() const {
14740 return AvailableModuleFeatures | AvailableFunctionFeatures;
14741}
14742PredicateBitset
14743computeAvailableModuleFeatures(const WebAssemblySubtarget *Subtarget) const;
14744PredicateBitset
14745computeAvailableFunctionFeatures(const WebAssemblySubtarget *Subtarget,
14746 const MachineFunction *MF) const;
14747void setupGeneratedPerFunctionState(MachineFunction &MF) override;
14748
14749#endif // GET_GLOBALISEL_PREDICATES_DECL
14750
14751#ifdef GET_GLOBALISEL_PREDICATES_INIT
14752
14753AvailableModuleFeatures(computeAvailableModuleFeatures(&STI)),
14754AvailableFunctionFeatures()
14755
14756#endif // GET_GLOBALISEL_PREDICATES_INIT
14757
14758