1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Global Instruction Selector for the WebAssembly target *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_GLOBALISEL_PREDICATE_BITSET
10
11const unsigned MAX_SUBTARGET_PREDICATES = 14;
12using PredicateBitset = llvm::Bitset<MAX_SUBTARGET_PREDICATES>;
13
14#endif // GET_GLOBALISEL_PREDICATE_BITSET
15
16#ifdef GET_GLOBALISEL_TEMPORARIES_DECL
17
18 mutable MatcherState State;
19 typedef ComplexRendererFns(WebAssemblyInstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const;
20 typedef void(WebAssemblyInstructionSelector::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr &, int) const;
21 const ExecInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn> ExecInfo;
22 static WebAssemblyInstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[];
23 static WebAssemblyInstructionSelector::CustomRendererFn CustomRenderers[];
24 bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
25 bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override;
26 bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override;
27 const uint8_t *getMatchTable() const override;
28 bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI, const MatcherState &State) const override;
29 bool testMOPredicate_MO(unsigned PredicateID, const MachineOperand &MO, const MatcherState &State) const override;
30 bool testSimplePredicate(unsigned PredicateID) const override;
31 bool runCustomAction(unsigned FnID, const MatcherState &State, NewMIVector &OutMIs) const override;
32
33#endif // GET_GLOBALISEL_TEMPORARIES_DECL
34
35#ifdef GET_GLOBALISEL_TEMPORARIES_INIT
36
37, State(0),
38ExecInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers)
39
40#endif // GET_GLOBALISEL_TEMPORARIES_INIT
41
42#ifdef GET_GLOBALISEL_IMPL
43
44// LLT Objects.
45enum {
46 GILLT_s32,
47 GILLT_s64,
48 GILLT_v16s8,
49 GILLT_v8s16,
50 GILLT_v4s32,
51 GILLT_v2s64,
52};
53const static size_t NumTypeObjects = 6;
54const static LLT TypeObjects[] = {
55 LLT::scalar(32),
56 LLT::scalar(64),
57 LLT::vector(ElementCount::getFixed(16), LLT::scalar(8)),
58 LLT::vector(ElementCount::getFixed(8), LLT::scalar(16)),
59 LLT::vector(ElementCount::getFixed(4), LLT::scalar(32)),
60 LLT::vector(ElementCount::getFixed(2), LLT::scalar(64)),
61};
62
63// Bits for subtarget features that participate in instruction matching.
64enum SubtargetFeatureBits : uint8_t {
65 Feature_IsPICBit = 13,
66 Feature_IsNotPICBit = 12,
67 Feature_HasAddr32Bit = 9,
68 Feature_HasAddr64Bit = 11,
69 Feature_HasAtomicsBit = 10,
70 Feature_HasBulkMemoryOptBit = 8,
71 Feature_HasExceptionHandlingBit = 0,
72 Feature_HasFP16Bit = 5,
73 Feature_HasNontrappingFPToIntBit = 2,
74 Feature_NotHasNontrappingFPToIntBit = 3,
75 Feature_HasReferenceTypesBit = 7,
76 Feature_HasRelaxedSIMDBit = 6,
77 Feature_HasSignExtBit = 1,
78 Feature_HasSIMD128Bit = 4,
79};
80
81PredicateBitset WebAssemblyInstructionSelector::
82computeAvailableModuleFeatures(const WebAssemblySubtarget *Subtarget) const {
83 PredicateBitset Features{};
84 if (TM.isPositionIndependent())
85 Features.set(Feature_IsPICBit);
86 if (!TM.isPositionIndependent())
87 Features.set(Feature_IsNotPICBit);
88 if (!Subtarget->hasAddr64())
89 Features.set(Feature_HasAddr32Bit);
90 if (Subtarget->hasAddr64())
91 Features.set(Feature_HasAddr64Bit);
92 if (Subtarget->hasAtomics())
93 Features.set(Feature_HasAtomicsBit);
94 if (Subtarget->hasBulkMemoryOpt())
95 Features.set(Feature_HasBulkMemoryOptBit);
96 if (Subtarget->hasExceptionHandling())
97 Features.set(Feature_HasExceptionHandlingBit);
98 if (Subtarget->hasFP16())
99 Features.set(Feature_HasFP16Bit);
100 if (Subtarget->hasNontrappingFPToInt())
101 Features.set(Feature_HasNontrappingFPToIntBit);
102 if (!Subtarget->hasNontrappingFPToInt())
103 Features.set(Feature_NotHasNontrappingFPToIntBit);
104 if (Subtarget->hasReferenceTypes())
105 Features.set(Feature_HasReferenceTypesBit);
106 if (Subtarget->hasRelaxedSIMD())
107 Features.set(Feature_HasRelaxedSIMDBit);
108 if (Subtarget->hasSignExt())
109 Features.set(Feature_HasSignExtBit);
110 if (Subtarget->hasSIMD128())
111 Features.set(Feature_HasSIMD128Bit);
112 return Features;
113}
114
115void WebAssemblyInstructionSelector::setupGeneratedPerFunctionState(MachineFunction &MF) {
116 AvailableFunctionFeatures = computeAvailableFunctionFeatures((const WebAssemblySubtarget *)&MF.getSubtarget(), &MF);
117}
118PredicateBitset WebAssemblyInstructionSelector::
119computeAvailableFunctionFeatures(const WebAssemblySubtarget *Subtarget, const MachineFunction *MF) const {
120 PredicateBitset Features{};
121 return Features;
122}
123
124// Feature bitsets.
125enum {
126 GIFBS_Invalid,
127 GIFBS_HasAddr32,
128 GIFBS_HasAddr64,
129 GIFBS_HasFP16,
130 GIFBS_HasNontrappingFPToInt,
131 GIFBS_HasRelaxedSIMD,
132 GIFBS_HasSIMD128,
133 GIFBS_HasSignExt,
134 GIFBS_NotHasNontrappingFPToInt,
135 GIFBS_HasFP16_HasSIMD128,
136 GIFBS_HasRelaxedSIMD_HasSIMD128,
137};
138constexpr static PredicateBitset FeatureBitsets[] {
139 {}, // GIFBS_Invalid
140 {Feature_HasAddr32Bit, },
141 {Feature_HasAddr64Bit, },
142 {Feature_HasFP16Bit, },
143 {Feature_HasNontrappingFPToIntBit, },
144 {Feature_HasRelaxedSIMDBit, },
145 {Feature_HasSIMD128Bit, },
146 {Feature_HasSignExtBit, },
147 {Feature_NotHasNontrappingFPToIntBit, },
148 {Feature_HasFP16Bit, Feature_HasSIMD128Bit, },
149 {Feature_HasRelaxedSIMDBit, Feature_HasSIMD128Bit, },
150};
151
152// ComplexPattern predicates.
153enum {
154 GICP_Invalid,
155};
156// See constructor for table contents
157
158WebAssemblyInstructionSelector::ComplexMatcherMemFn
159WebAssemblyInstructionSelector::ComplexPredicateFns[] = {
160 nullptr, // GICP_Invalid
161};
162
163// PatFrag predicates.
164enum {
165 GICXXPred_MI_Predicate_ffloor_nnan = GICXXPred_Invalid + 1,
166 GICXXPred_MI_Predicate_or_disjoint,
167};
168bool WebAssemblyInstructionSelector::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI, const MatcherState &State) const {
169 const MachineFunction &MF = *MI.getParent()->getParent();
170 const MachineRegisterInfo &MRI = MF.getRegInfo();
171 const auto &Operands = State.RecordedOperands;
172 (void)Operands;
173 (void)MRI;
174 switch (PredicateID) {
175 case GICXXPred_MI_Predicate_ffloor_nnan: {
176
177 return MI.getFlag(MachineInstr::FmNoNans);
178
179 }
180 case GICXXPred_MI_Predicate_or_disjoint: {
181
182 return MI.getFlag(MachineInstr::Disjoint);
183
184 }
185 }
186 llvm_unreachable("Unknown predicate");
187 return false;
188}
189// PatFrag predicates.
190bool WebAssemblyInstructionSelector::testMOPredicate_MO(unsigned PredicateID, const MachineOperand & MO, const MatcherState &State) const {
191 const auto &Operands = State.RecordedOperands;
192 Register Reg = MO.getReg();
193 (void)Operands;
194 (void)Reg;
195 llvm_unreachable("Unknown predicate");
196 return false;
197}
198// PatFrag predicates.
199enum {
200 GICXXPred_I64_Predicate_ImmI8 = GICXXPred_Invalid + 1,
201 GICXXPred_I64_Predicate_ImmI16,
202 GICXXPred_I64_Predicate_LaneIdx2,
203 GICXXPred_I64_Predicate_LaneIdx4,
204 GICXXPred_I64_Predicate_LaneIdx8,
205 GICXXPred_I64_Predicate_LaneIdx16,
206 GICXXPred_I64_Predicate_LaneIdx32,
207};
208bool WebAssemblyInstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
209 switch (PredicateID) {
210 case GICXXPred_I64_Predicate_ImmI8: {
211 return -(1 << (8 - 1)) <= Imm && Imm < (1 << 8);
212 }
213 case GICXXPred_I64_Predicate_ImmI16: {
214 return -(1 << (16 - 1)) <= Imm && Imm < (1 << 16);
215 }
216 case GICXXPred_I64_Predicate_LaneIdx2: {
217 return 0 <= Imm && Imm < 2;
218 }
219 case GICXXPred_I64_Predicate_LaneIdx4: {
220 return 0 <= Imm && Imm < 4;
221 }
222 case GICXXPred_I64_Predicate_LaneIdx8: {
223 return 0 <= Imm && Imm < 8;
224 }
225 case GICXXPred_I64_Predicate_LaneIdx16: {
226 return 0 <= Imm && Imm < 16;
227 }
228 case GICXXPred_I64_Predicate_LaneIdx32: {
229 return 0 <= Imm && Imm < 32;
230 }
231 }
232 llvm_unreachable("Unknown predicate");
233 return false;
234}
235// PatFrag predicates.
236bool WebAssemblyInstructionSelector::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const {
237 llvm_unreachable("Unknown predicate");
238 return false;
239}
240// PatFrag predicates.
241bool WebAssemblyInstructionSelector::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const {
242 llvm_unreachable("Unknown predicate");
243 return false;
244}
245bool WebAssemblyInstructionSelector::testSimplePredicate(unsigned) const {
246 llvm_unreachable("WebAssemblyInstructionSelector does not support simple predicates!");
247 return false;
248}
249// Custom renderers.
250enum {
251 GICR_Invalid,
252};
253WebAssemblyInstructionSelector::CustomRendererFn
254WebAssemblyInstructionSelector::CustomRenderers[] = {
255 nullptr, // GICR_Invalid
256};
257
258bool WebAssemblyInstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const {
259 const PredicateBitset AvailableFeatures = getAvailableFeatures();
260 MachineIRBuilder B(I);
261 State.MIs.clear();
262 State.MIs.push_back(&I);
263
264 if (executeMatchTable(*this, State, ExecInfo, B, getMatchTable(), TII, MF->getRegInfo(), TRI, RBI, AvailableFeatures, &CoverageInfo)) {
265 return true;
266 }
267
268 return false;
269}
270
271bool WebAssemblyInstructionSelector::runCustomAction(unsigned, const MatcherState&, NewMIVector &) const {
272 llvm_unreachable("WebAssemblyInstructionSelector does not support custom C++ actions!");
273}
274#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
275#define GIMT_Encode2(Val) uint8_t(Val), uint8_t((Val) >> 8)
276#define GIMT_Encode4(Val) uint8_t(Val), uint8_t((Val) >> 8), uint8_t((Val) >> 16), uint8_t((Val) >> 24)
277#define GIMT_Encode8(Val) uint8_t(Val), uint8_t((Val) >> 8), uint8_t((Val) >> 16), uint8_t((Val) >> 24), uint8_t(uint64_t(Val) >> 32), uint8_t(uint64_t(Val) >> 40), uint8_t(uint64_t(Val) >> 48), uint8_t(uint64_t(Val) >> 56)
278#else
279#define GIMT_Encode2(Val) uint8_t((Val) >> 8), uint8_t(Val)
280#define GIMT_Encode4(Val) uint8_t((Val) >> 24), uint8_t((Val) >> 16), uint8_t((Val) >> 8), uint8_t(Val)
281#define GIMT_Encode8(Val) uint8_t(uint64_t(Val) >> 56), uint8_t(uint64_t(Val) >> 48), uint8_t(uint64_t(Val) >> 40), uint8_t(uint64_t(Val) >> 32), uint8_t((Val) >> 24), uint8_t((Val) >> 16), uint8_t((Val) >> 8), uint8_t(Val)
282#endif
283const uint8_t *WebAssemblyInstructionSelector::getMatchTable() const {
284 constexpr static uint8_t MatchTable0[] = {
285 /* 0 */ GIM_SwitchOpcode, /*MI*/0, /*[*/GIMT_Encode2(55), GIMT_Encode2(305), /*)*//*default:*//*Label 72*/ GIMT_Encode4(39876),
286 /* 10 */ /*TargetOpcode::G_ADD*//*Label 0*/ GIMT_Encode4(1010),
287 /* 14 */ /*TargetOpcode::G_SUB*//*Label 1*/ GIMT_Encode4(1436),
288 /* 18 */ /*TargetOpcode::G_MUL*//*Label 2*/ GIMT_Encode4(1882),
289 /* 22 */ /*TargetOpcode::G_SDIV*//*Label 3*/ GIMT_Encode4(2112),
290 /* 26 */ /*TargetOpcode::G_UDIV*//*Label 4*/ GIMT_Encode4(2206),
291 /* 30 */ /*TargetOpcode::G_SREM*//*Label 5*/ GIMT_Encode4(2300),
292 /* 34 */ /*TargetOpcode::G_UREM*//*Label 6*/ GIMT_Encode4(2394), GIMT_Encode4(0), GIMT_Encode4(0),
293 /* 46 */ /*TargetOpcode::G_AND*//*Label 7*/ GIMT_Encode4(2488),
294 /* 50 */ /*TargetOpcode::G_OR*//*Label 8*/ GIMT_Encode4(3656),
295 /* 54 */ /*TargetOpcode::G_XOR*//*Label 9*/ GIMT_Encode4(7298), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
296 /* 70 */ /*TargetOpcode::G_UAVGCEIL*//*Label 10*/ GIMT_Encode4(13956), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
297 /* 122 */ /*TargetOpcode::G_BUILD_VECTOR*//*Label 11*/ GIMT_Encode4(14050), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
298 /* 142 */ /*TargetOpcode::G_BITCAST*//*Label 12*/ GIMT_Encode4(14805), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
299 /* 158 */ /*TargetOpcode::G_INTRINSIC_TRUNC*//*Label 13*/ GIMT_Encode4(16187), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
300 /* 174 */ /*TargetOpcode::G_INTRINSIC_ROUNDEVEN*//*Label 14*/ GIMT_Encode4(16382), GIMT_Encode4(0), GIMT_Encode4(0),
301 /* 186 */ /*TargetOpcode::G_LOAD*//*Label 15*/ GIMT_Encode4(16560), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
302 /* 326 */ /*TargetOpcode::G_BRCOND*//*Label 16*/ GIMT_Encode4(16701), GIMT_Encode4(0), GIMT_Encode4(0),
303 /* 338 */ /*TargetOpcode::G_INTRINSIC*//*Label 17*/ GIMT_Encode4(16729),
304 /* 342 */ /*TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS*//*Label 18*/ GIMT_Encode4(20004), GIMT_Encode4(0), GIMT_Encode4(0),
305 /* 354 */ /*TargetOpcode::G_ANYEXT*//*Label 19*/ GIMT_Encode4(20223),
306 /* 358 */ /*TargetOpcode::G_TRUNC*//*Label 20*/ GIMT_Encode4(20256), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
307 /* 374 */ /*TargetOpcode::G_CONSTANT*//*Label 21*/ GIMT_Encode4(20289),
308 /* 378 */ /*TargetOpcode::G_FCONSTANT*//*Label 22*/ GIMT_Encode4(20355), GIMT_Encode4(0), GIMT_Encode4(0),
309 /* 390 */ /*TargetOpcode::G_SEXT*//*Label 23*/ GIMT_Encode4(20421),
310 /* 394 */ /*TargetOpcode::G_SEXT_INREG*//*Label 24*/ GIMT_Encode4(20454),
311 /* 398 */ /*TargetOpcode::G_ZEXT*//*Label 25*/ GIMT_Encode4(20665),
312 /* 402 */ /*TargetOpcode::G_SHL*//*Label 26*/ GIMT_Encode4(20698),
313 /* 406 */ /*TargetOpcode::G_LSHR*//*Label 27*/ GIMT_Encode4(20980),
314 /* 410 */ /*TargetOpcode::G_ASHR*//*Label 28*/ GIMT_Encode4(21262), GIMT_Encode4(0), GIMT_Encode4(0),
315 /* 422 */ /*TargetOpcode::G_ROTR*//*Label 29*/ GIMT_Encode4(21544),
316 /* 426 */ /*TargetOpcode::G_ROTL*//*Label 30*/ GIMT_Encode4(21746),
317 /* 430 */ /*TargetOpcode::G_ICMP*//*Label 31*/ GIMT_Encode4(21948),
318 /* 434 */ /*TargetOpcode::G_FCMP*//*Label 32*/ GIMT_Encode4(26633), GIMT_Encode4(0), GIMT_Encode4(0),
319 /* 446 */ /*TargetOpcode::G_SELECT*//*Label 33*/ GIMT_Encode4(27855), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
320 /* 498 */ /*TargetOpcode::G_UADDSAT*//*Label 34*/ GIMT_Encode4(33221),
321 /* 502 */ /*TargetOpcode::G_SADDSAT*//*Label 35*/ GIMT_Encode4(33321),
322 /* 506 */ /*TargetOpcode::G_USUBSAT*//*Label 36*/ GIMT_Encode4(33421),
323 /* 510 */ /*TargetOpcode::G_SSUBSAT*//*Label 37*/ GIMT_Encode4(33521), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
324 /* 554 */ /*TargetOpcode::G_FADD*//*Label 38*/ GIMT_Encode4(33621),
325 /* 558 */ /*TargetOpcode::G_FSUB*//*Label 39*/ GIMT_Encode4(33851),
326 /* 562 */ /*TargetOpcode::G_FMUL*//*Label 40*/ GIMT_Encode4(34081),
327 /* 566 */ /*TargetOpcode::G_FMA*//*Label 41*/ GIMT_Encode4(34311), GIMT_Encode4(0),
328 /* 574 */ /*TargetOpcode::G_FDIV*//*Label 42*/ GIMT_Encode4(34475), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
329 /* 626 */ /*TargetOpcode::G_FNEG*//*Label 43*/ GIMT_Encode4(34705),
330 /* 630 */ /*TargetOpcode::G_FPEXT*//*Label 44*/ GIMT_Encode4(34900),
331 /* 634 */ /*TargetOpcode::G_FPTRUNC*//*Label 45*/ GIMT_Encode4(34933),
332 /* 638 */ /*TargetOpcode::G_FPTOSI*//*Label 46*/ GIMT_Encode4(34966),
333 /* 642 */ /*TargetOpcode::G_FPTOUI*//*Label 47*/ GIMT_Encode4(35322),
334 /* 646 */ /*TargetOpcode::G_SITOFP*//*Label 48*/ GIMT_Encode4(35678),
335 /* 650 */ /*TargetOpcode::G_UITOFP*//*Label 49*/ GIMT_Encode4(35894), GIMT_Encode4(0), GIMT_Encode4(0),
336 /* 662 */ /*TargetOpcode::G_FABS*//*Label 50*/ GIMT_Encode4(36110),
337 /* 666 */ /*TargetOpcode::G_FCOPYSIGN*//*Label 51*/ GIMT_Encode4(36305), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
338 /* 694 */ /*TargetOpcode::G_FMINIMUM*//*Label 52*/ GIMT_Encode4(36523),
339 /* 698 */ /*TargetOpcode::G_FMAXIMUM*//*Label 53*/ GIMT_Encode4(36753), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
340 /* 750 */ /*TargetOpcode::G_SMIN*//*Label 54*/ GIMT_Encode4(36983),
341 /* 754 */ /*TargetOpcode::G_SMAX*//*Label 55*/ GIMT_Encode4(37127),
342 /* 758 */ /*TargetOpcode::G_UMIN*//*Label 56*/ GIMT_Encode4(37271),
343 /* 762 */ /*TargetOpcode::G_UMAX*//*Label 57*/ GIMT_Encode4(37415),
344 /* 766 */ /*TargetOpcode::G_ABS*//*Label 58*/ GIMT_Encode4(37559), GIMT_Encode4(0), GIMT_Encode4(0),
345 /* 778 */ /*TargetOpcode::G_BR*//*Label 59*/ GIMT_Encode4(37719), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
346 /* 798 */ /*TargetOpcode::G_INSERT_VECTOR_ELT*//*Label 60*/ GIMT_Encode4(37741), GIMT_Encode4(0), GIMT_Encode4(0),
347 /* 810 */ /*TargetOpcode::G_SPLAT_VECTOR*//*Label 61*/ GIMT_Encode4(38111), GIMT_Encode4(0), GIMT_Encode4(0),
348 /* 822 */ /*TargetOpcode::G_CTTZ*//*Label 62*/ GIMT_Encode4(38603), GIMT_Encode4(0),
349 /* 830 */ /*TargetOpcode::G_CTLZ*//*Label 63*/ GIMT_Encode4(38683), GIMT_Encode4(0), GIMT_Encode4(0),
350 /* 842 */ /*TargetOpcode::G_CTPOP*//*Label 64*/ GIMT_Encode4(38763), GIMT_Encode4(0), GIMT_Encode4(0),
351 /* 854 */ /*TargetOpcode::G_FCEIL*//*Label 65*/ GIMT_Encode4(38880), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
352 /* 902 */ /*TargetOpcode::G_FSQRT*//*Label 66*/ GIMT_Encode4(39075),
353 /* 906 */ /*TargetOpcode::G_FFLOOR*//*Label 67*/ GIMT_Encode4(39270),
354 /* 910 */ /*TargetOpcode::G_FRINT*//*Label 68*/ GIMT_Encode4(39465),
355 /* 914 */ /*TargetOpcode::G_FNEARBYINT*//*Label 69*/ GIMT_Encode4(39643), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
356 /* 1002 */ /*TargetOpcode::G_TRAP*//*Label 70*/ GIMT_Encode4(39838),
357 /* 1006 */ /*TargetOpcode::G_DEBUGTRAP*//*Label 71*/ GIMT_Encode4(39857),
358 /* 1010 */ // Label 0: @1010
359 /* 1010 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 79*/ GIMT_Encode4(1435),
360 /* 1021 */ /*GILLT_s32*//*Label 73*/ GIMT_Encode4(1045),
361 /* 1025 */ /*GILLT_s64*//*Label 74*/ GIMT_Encode4(1082),
362 /* 1029 */ /*GILLT_v16s8*//*Label 75*/ GIMT_Encode4(1119),
363 /* 1033 */ /*GILLT_v8s16*//*Label 76*/ GIMT_Encode4(1159),
364 /* 1037 */ /*GILLT_v4s32*//*Label 77*/ GIMT_Encode4(1199),
365 /* 1041 */ /*GILLT_v2s64*//*Label 78*/ GIMT_Encode4(1395),
366 /* 1045 */ // Label 73: @1045
367 /* 1045 */ GIM_Try, /*On fail goto*//*Label 80*/ GIMT_Encode4(1081), // Rule ID 64 //
368 /* 1050 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
369 /* 1053 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
370 /* 1056 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
371 /* 1060 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
372 /* 1064 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
373 /* 1068 */ // (add:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (ADD_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
374 /* 1068 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I32),
375 /* 1073 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
376 /* 1079 */ GIR_RootConstrainSelectedInstOperands,
377 /* 1080 */ // GIR_Coverage, 64,
378 /* 1080 */ GIR_Done,
379 /* 1081 */ // Label 80: @1081
380 /* 1081 */ GIM_Reject,
381 /* 1082 */ // Label 74: @1082
382 /* 1082 */ GIM_Try, /*On fail goto*//*Label 81*/ GIMT_Encode4(1118), // Rule ID 65 //
383 /* 1087 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
384 /* 1090 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
385 /* 1093 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
386 /* 1097 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
387 /* 1101 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
388 /* 1105 */ // (add:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (ADD_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
389 /* 1105 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I64),
390 /* 1110 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
391 /* 1116 */ GIR_RootConstrainSelectedInstOperands,
392 /* 1117 */ // GIR_Coverage, 65,
393 /* 1117 */ GIR_Done,
394 /* 1118 */ // Label 81: @1118
395 /* 1118 */ GIM_Reject,
396 /* 1119 */ // Label 75: @1119
397 /* 1119 */ GIM_Try, /*On fail goto*//*Label 82*/ GIMT_Encode4(1158), // Rule ID 278 //
398 /* 1124 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
399 /* 1127 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
400 /* 1130 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
401 /* 1133 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
402 /* 1137 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
403 /* 1141 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
404 /* 1145 */ // (add:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (ADD_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
405 /* 1145 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I8x16),
406 /* 1150 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
407 /* 1156 */ GIR_RootConstrainSelectedInstOperands,
408 /* 1157 */ // GIR_Coverage, 278,
409 /* 1157 */ GIR_Done,
410 /* 1158 */ // Label 82: @1158
411 /* 1158 */ GIM_Reject,
412 /* 1159 */ // Label 76: @1159
413 /* 1159 */ GIM_Try, /*On fail goto*//*Label 83*/ GIMT_Encode4(1198), // Rule ID 279 //
414 /* 1164 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
415 /* 1167 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
416 /* 1170 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
417 /* 1173 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
418 /* 1177 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
419 /* 1181 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
420 /* 1185 */ // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (ADD_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
421 /* 1185 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I16x8),
422 /* 1190 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
423 /* 1196 */ GIR_RootConstrainSelectedInstOperands,
424 /* 1197 */ // GIR_Coverage, 279,
425 /* 1197 */ GIR_Done,
426 /* 1198 */ // Label 83: @1198
427 /* 1198 */ GIM_Reject,
428 /* 1199 */ // Label 77: @1199
429 /* 1199 */ GIM_Try, /*On fail goto*//*Label 84*/ GIMT_Encode4(1394),
430 /* 1204 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
431 /* 1207 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
432 /* 1210 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
433 /* 1214 */ GIM_Try, /*On fail goto*//*Label 85*/ GIMT_Encode4(1289), // Rule ID 1324 //
434 /* 1219 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
435 /* 1223 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
436 /* 1227 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
437 /* 1230 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_signed),
438 /* 1235 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
439 /* 1239 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
440 /* 1243 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
441 /* 1247 */ GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
442 /* 1250 */ GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_signed),
443 /* 1255 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
444 /* 1259 */ GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v16s8,
445 /* 1263 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
446 /* 1267 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
447 /* 1269 */ // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 14486:{ *:[iPTR] }, (intrinsic_wo_chain:{ *:[v8i16] } 14513:{ *:[iPTR] }, v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs)), V128:{ *:[v4i32] }:$acc) => (RELAXED_DOT_ADD:{ *:[v4i32] } v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc)
448 /* 1269 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_ADD),
449 /* 1272 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
450 /* 1274 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // lhs
451 /* 1278 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // rhs
452 /* 1282 */ GIR_RootToRootCopy, /*OpIdx*/2, // acc
453 /* 1284 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
454 /* 1287 */ GIR_RootConstrainSelectedInstOperands,
455 /* 1288 */ // GIR_Coverage, 1324,
456 /* 1288 */ GIR_EraseRootFromParent_Done,
457 /* 1289 */ // Label 85: @1289
458 /* 1289 */ GIM_Try, /*On fail goto*//*Label 86*/ GIMT_Encode4(1364), // Rule ID 1762 //
459 /* 1294 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
460 /* 1298 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
461 /* 1302 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
462 /* 1306 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
463 /* 1309 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_signed),
464 /* 1314 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
465 /* 1318 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
466 /* 1322 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
467 /* 1326 */ GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
468 /* 1329 */ GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_signed),
469 /* 1334 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
470 /* 1338 */ GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v16s8,
471 /* 1342 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
472 /* 1344 */ // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$acc, (intrinsic_wo_chain:{ *:[v4i32] } 14486:{ *:[iPTR] }, (intrinsic_wo_chain:{ *:[v8i16] } 14513:{ *:[iPTR] }, v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs))) => (RELAXED_DOT_ADD:{ *:[v4i32] } v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc)
473 /* 1344 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_ADD),
474 /* 1347 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
475 /* 1349 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // lhs
476 /* 1353 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // rhs
477 /* 1357 */ GIR_RootToRootCopy, /*OpIdx*/1, // acc
478 /* 1359 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
479 /* 1362 */ GIR_RootConstrainSelectedInstOperands,
480 /* 1363 */ // GIR_Coverage, 1762,
481 /* 1363 */ GIR_EraseRootFromParent_Done,
482 /* 1364 */ // Label 86: @1364
483 /* 1364 */ GIM_Try, /*On fail goto*//*Label 87*/ GIMT_Encode4(1393), // Rule ID 280 //
484 /* 1369 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
485 /* 1372 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
486 /* 1376 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
487 /* 1380 */ // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (ADD_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
488 /* 1380 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I32x4),
489 /* 1385 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
490 /* 1391 */ GIR_RootConstrainSelectedInstOperands,
491 /* 1392 */ // GIR_Coverage, 280,
492 /* 1392 */ GIR_Done,
493 /* 1393 */ // Label 87: @1393
494 /* 1393 */ GIM_Reject,
495 /* 1394 */ // Label 84: @1394
496 /* 1394 */ GIM_Reject,
497 /* 1395 */ // Label 78: @1395
498 /* 1395 */ GIM_Try, /*On fail goto*//*Label 88*/ GIMT_Encode4(1434), // Rule ID 281 //
499 /* 1400 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
500 /* 1403 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
501 /* 1406 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
502 /* 1409 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
503 /* 1413 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
504 /* 1417 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
505 /* 1421 */ // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (ADD_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
506 /* 1421 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I64x2),
507 /* 1426 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
508 /* 1432 */ GIR_RootConstrainSelectedInstOperands,
509 /* 1433 */ // GIR_Coverage, 281,
510 /* 1433 */ GIR_Done,
511 /* 1434 */ // Label 88: @1434
512 /* 1434 */ GIM_Reject,
513 /* 1435 */ // Label 79: @1435
514 /* 1435 */ GIM_Reject,
515 /* 1436 */ // Label 1: @1436
516 /* 1436 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 95*/ GIMT_Encode4(1881),
517 /* 1447 */ /*GILLT_s32*//*Label 89*/ GIMT_Encode4(1471),
518 /* 1451 */ /*GILLT_s64*//*Label 90*/ GIMT_Encode4(1508),
519 /* 1455 */ /*GILLT_v16s8*//*Label 91*/ GIMT_Encode4(1545),
520 /* 1459 */ /*GILLT_v8s16*//*Label 92*/ GIMT_Encode4(1629),
521 /* 1463 */ /*GILLT_v4s32*//*Label 93*/ GIMT_Encode4(1713),
522 /* 1467 */ /*GILLT_v2s64*//*Label 94*/ GIMT_Encode4(1797),
523 /* 1471 */ // Label 89: @1471
524 /* 1471 */ GIM_Try, /*On fail goto*//*Label 96*/ GIMT_Encode4(1507), // Rule ID 66 //
525 /* 1476 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
526 /* 1479 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
527 /* 1482 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
528 /* 1486 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
529 /* 1490 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
530 /* 1494 */ // (sub:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SUB_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
531 /* 1494 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I32),
532 /* 1499 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
533 /* 1505 */ GIR_RootConstrainSelectedInstOperands,
534 /* 1506 */ // GIR_Coverage, 66,
535 /* 1506 */ GIR_Done,
536 /* 1507 */ // Label 96: @1507
537 /* 1507 */ GIM_Reject,
538 /* 1508 */ // Label 90: @1508
539 /* 1508 */ GIM_Try, /*On fail goto*//*Label 97*/ GIMT_Encode4(1544), // Rule ID 67 //
540 /* 1513 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
541 /* 1516 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
542 /* 1519 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
543 /* 1523 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
544 /* 1527 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
545 /* 1531 */ // (sub:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SUB_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
546 /* 1531 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I64),
547 /* 1536 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
548 /* 1542 */ GIR_RootConstrainSelectedInstOperands,
549 /* 1543 */ // GIR_Coverage, 67,
550 /* 1543 */ GIR_Done,
551 /* 1544 */ // Label 97: @1544
552 /* 1544 */ GIM_Reject,
553 /* 1545 */ // Label 91: @1545
554 /* 1545 */ GIM_Try, /*On fail goto*//*Label 98*/ GIMT_Encode4(1628),
555 /* 1550 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
556 /* 1553 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
557 /* 1556 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
558 /* 1560 */ GIM_Try, /*On fail goto*//*Label 99*/ GIMT_Encode4(1598), // Rule ID 253 //
559 /* 1565 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
560 /* 1568 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
561 /* 1572 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
562 /* 1578 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
563 /* 1580 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
564 /* 1584 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
565 /* 1586 */ // (sub:{ *:[v16i8] } immAllZerosV:{ *:[v16i8] }, V128:{ *:[v16i8] }:$v) => (NEG_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$v)
566 /* 1586 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I8x16),
567 /* 1589 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
568 /* 1591 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
569 /* 1593 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
570 /* 1596 */ GIR_RootConstrainSelectedInstOperands,
571 /* 1597 */ // GIR_Coverage, 253,
572 /* 1597 */ GIR_EraseRootFromParent_Done,
573 /* 1598 */ // Label 99: @1598
574 /* 1598 */ GIM_Try, /*On fail goto*//*Label 100*/ GIMT_Encode4(1627), // Rule ID 286 //
575 /* 1603 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
576 /* 1606 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
577 /* 1610 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
578 /* 1614 */ // (sub:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SUB_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
579 /* 1614 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I8x16),
580 /* 1619 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
581 /* 1625 */ GIR_RootConstrainSelectedInstOperands,
582 /* 1626 */ // GIR_Coverage, 286,
583 /* 1626 */ GIR_Done,
584 /* 1627 */ // Label 100: @1627
585 /* 1627 */ GIM_Reject,
586 /* 1628 */ // Label 98: @1628
587 /* 1628 */ GIM_Reject,
588 /* 1629 */ // Label 92: @1629
589 /* 1629 */ GIM_Try, /*On fail goto*//*Label 101*/ GIMT_Encode4(1712),
590 /* 1634 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
591 /* 1637 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
592 /* 1640 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
593 /* 1644 */ GIM_Try, /*On fail goto*//*Label 102*/ GIMT_Encode4(1682), // Rule ID 254 //
594 /* 1649 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
595 /* 1652 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
596 /* 1656 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
597 /* 1662 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
598 /* 1664 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
599 /* 1668 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
600 /* 1670 */ // (sub:{ *:[v8i16] } immAllZerosV:{ *:[v8i16] }, V128:{ *:[v8i16] }:$v) => (NEG_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$v)
601 /* 1670 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I16x8),
602 /* 1673 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
603 /* 1675 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
604 /* 1677 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
605 /* 1680 */ GIR_RootConstrainSelectedInstOperands,
606 /* 1681 */ // GIR_Coverage, 254,
607 /* 1681 */ GIR_EraseRootFromParent_Done,
608 /* 1682 */ // Label 102: @1682
609 /* 1682 */ GIM_Try, /*On fail goto*//*Label 103*/ GIMT_Encode4(1711), // Rule ID 287 //
610 /* 1687 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
611 /* 1690 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
612 /* 1694 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
613 /* 1698 */ // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SUB_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
614 /* 1698 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I16x8),
615 /* 1703 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
616 /* 1709 */ GIR_RootConstrainSelectedInstOperands,
617 /* 1710 */ // GIR_Coverage, 287,
618 /* 1710 */ GIR_Done,
619 /* 1711 */ // Label 103: @1711
620 /* 1711 */ GIM_Reject,
621 /* 1712 */ // Label 101: @1712
622 /* 1712 */ GIM_Reject,
623 /* 1713 */ // Label 93: @1713
624 /* 1713 */ GIM_Try, /*On fail goto*//*Label 104*/ GIMT_Encode4(1796),
625 /* 1718 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
626 /* 1721 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
627 /* 1724 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
628 /* 1728 */ GIM_Try, /*On fail goto*//*Label 105*/ GIMT_Encode4(1766), // Rule ID 255 //
629 /* 1733 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
630 /* 1736 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
631 /* 1740 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
632 /* 1746 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
633 /* 1748 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
634 /* 1752 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
635 /* 1754 */ // (sub:{ *:[v4i32] } immAllZerosV:{ *:[v4i32] }, V128:{ *:[v4i32] }:$v) => (NEG_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$v)
636 /* 1754 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I32x4),
637 /* 1757 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
638 /* 1759 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
639 /* 1761 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
640 /* 1764 */ GIR_RootConstrainSelectedInstOperands,
641 /* 1765 */ // GIR_Coverage, 255,
642 /* 1765 */ GIR_EraseRootFromParent_Done,
643 /* 1766 */ // Label 105: @1766
644 /* 1766 */ GIM_Try, /*On fail goto*//*Label 106*/ GIMT_Encode4(1795), // Rule ID 288 //
645 /* 1771 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
646 /* 1774 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
647 /* 1778 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
648 /* 1782 */ // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SUB_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
649 /* 1782 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I32x4),
650 /* 1787 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
651 /* 1793 */ GIR_RootConstrainSelectedInstOperands,
652 /* 1794 */ // GIR_Coverage, 288,
653 /* 1794 */ GIR_Done,
654 /* 1795 */ // Label 106: @1795
655 /* 1795 */ GIM_Reject,
656 /* 1796 */ // Label 104: @1796
657 /* 1796 */ GIM_Reject,
658 /* 1797 */ // Label 94: @1797
659 /* 1797 */ GIM_Try, /*On fail goto*//*Label 107*/ GIMT_Encode4(1880),
660 /* 1802 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
661 /* 1805 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
662 /* 1808 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
663 /* 1812 */ GIM_Try, /*On fail goto*//*Label 108*/ GIMT_Encode4(1850), // Rule ID 256 //
664 /* 1817 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
665 /* 1820 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
666 /* 1824 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
667 /* 1830 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
668 /* 1832 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
669 /* 1836 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
670 /* 1838 */ // (sub:{ *:[v2i64] } immAllZerosV:{ *:[v2i64] }, V128:{ *:[v2i64] }:$v) => (NEG_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$v)
671 /* 1838 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I64x2),
672 /* 1841 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
673 /* 1843 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
674 /* 1845 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
675 /* 1848 */ GIR_RootConstrainSelectedInstOperands,
676 /* 1849 */ // GIR_Coverage, 256,
677 /* 1849 */ GIR_EraseRootFromParent_Done,
678 /* 1850 */ // Label 108: @1850
679 /* 1850 */ GIM_Try, /*On fail goto*//*Label 109*/ GIMT_Encode4(1879), // Rule ID 289 //
680 /* 1855 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
681 /* 1858 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
682 /* 1862 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
683 /* 1866 */ // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SUB_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
684 /* 1866 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I64x2),
685 /* 1871 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
686 /* 1877 */ GIR_RootConstrainSelectedInstOperands,
687 /* 1878 */ // GIR_Coverage, 289,
688 /* 1878 */ GIR_Done,
689 /* 1879 */ // Label 109: @1879
690 /* 1879 */ GIM_Reject,
691 /* 1880 */ // Label 107: @1880
692 /* 1880 */ GIM_Reject,
693 /* 1881 */ // Label 95: @1881
694 /* 1881 */ GIM_Reject,
695 /* 1882 */ // Label 2: @1882
696 /* 1882 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 115*/ GIMT_Encode4(2111),
697 /* 1893 */ /*GILLT_s32*//*Label 110*/ GIMT_Encode4(1917),
698 /* 1897 */ /*GILLT_s64*//*Label 111*/ GIMT_Encode4(1954), GIMT_Encode4(0),
699 /* 1905 */ /*GILLT_v8s16*//*Label 112*/ GIMT_Encode4(1991),
700 /* 1909 */ /*GILLT_v4s32*//*Label 113*/ GIMT_Encode4(2031),
701 /* 1913 */ /*GILLT_v2s64*//*Label 114*/ GIMT_Encode4(2071),
702 /* 1917 */ // Label 110: @1917
703 /* 1917 */ GIM_Try, /*On fail goto*//*Label 116*/ GIMT_Encode4(1953), // Rule ID 68 //
704 /* 1922 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
705 /* 1925 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
706 /* 1928 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
707 /* 1932 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
708 /* 1936 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
709 /* 1940 */ // (mul:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (MUL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
710 /* 1940 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I32),
711 /* 1945 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
712 /* 1951 */ GIR_RootConstrainSelectedInstOperands,
713 /* 1952 */ // GIR_Coverage, 68,
714 /* 1952 */ GIR_Done,
715 /* 1953 */ // Label 116: @1953
716 /* 1953 */ GIM_Reject,
717 /* 1954 */ // Label 111: @1954
718 /* 1954 */ GIM_Try, /*On fail goto*//*Label 117*/ GIMT_Encode4(1990), // Rule ID 69 //
719 /* 1959 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
720 /* 1962 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
721 /* 1965 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
722 /* 1969 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
723 /* 1973 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
724 /* 1977 */ // (mul:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (MUL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
725 /* 1977 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I64),
726 /* 1982 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
727 /* 1988 */ GIR_RootConstrainSelectedInstOperands,
728 /* 1989 */ // GIR_Coverage, 69,
729 /* 1989 */ GIR_Done,
730 /* 1990 */ // Label 117: @1990
731 /* 1990 */ GIM_Reject,
732 /* 1991 */ // Label 112: @1991
733 /* 1991 */ GIM_Try, /*On fail goto*//*Label 118*/ GIMT_Encode4(2030), // Rule ID 294 //
734 /* 1996 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
735 /* 1999 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
736 /* 2002 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
737 /* 2005 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
738 /* 2009 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
739 /* 2013 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
740 /* 2017 */ // (mul:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MUL_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
741 /* 2017 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I16x8),
742 /* 2022 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
743 /* 2028 */ GIR_RootConstrainSelectedInstOperands,
744 /* 2029 */ // GIR_Coverage, 294,
745 /* 2029 */ GIR_Done,
746 /* 2030 */ // Label 118: @2030
747 /* 2030 */ GIM_Reject,
748 /* 2031 */ // Label 113: @2031
749 /* 2031 */ GIM_Try, /*On fail goto*//*Label 119*/ GIMT_Encode4(2070), // Rule ID 295 //
750 /* 2036 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
751 /* 2039 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
752 /* 2042 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
753 /* 2045 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
754 /* 2049 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
755 /* 2053 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
756 /* 2057 */ // (mul:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MUL_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
757 /* 2057 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I32x4),
758 /* 2062 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
759 /* 2068 */ GIR_RootConstrainSelectedInstOperands,
760 /* 2069 */ // GIR_Coverage, 295,
761 /* 2069 */ GIR_Done,
762 /* 2070 */ // Label 119: @2070
763 /* 2070 */ GIM_Reject,
764 /* 2071 */ // Label 114: @2071
765 /* 2071 */ GIM_Try, /*On fail goto*//*Label 120*/ GIMT_Encode4(2110), // Rule ID 296 //
766 /* 2076 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
767 /* 2079 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
768 /* 2082 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
769 /* 2085 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
770 /* 2089 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
771 /* 2093 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
772 /* 2097 */ // (mul:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (MUL_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
773 /* 2097 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I64x2),
774 /* 2102 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
775 /* 2108 */ GIR_RootConstrainSelectedInstOperands,
776 /* 2109 */ // GIR_Coverage, 296,
777 /* 2109 */ GIR_Done,
778 /* 2110 */ // Label 120: @2110
779 /* 2110 */ GIM_Reject,
780 /* 2111 */ // Label 115: @2111
781 /* 2111 */ GIM_Reject,
782 /* 2112 */ // Label 3: @2112
783 /* 2112 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 123*/ GIMT_Encode4(2205),
784 /* 2123 */ /*GILLT_s32*//*Label 121*/ GIMT_Encode4(2131),
785 /* 2127 */ /*GILLT_s64*//*Label 122*/ GIMT_Encode4(2168),
786 /* 2131 */ // Label 121: @2131
787 /* 2131 */ GIM_Try, /*On fail goto*//*Label 124*/ GIMT_Encode4(2167), // Rule ID 70 //
788 /* 2136 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
789 /* 2139 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
790 /* 2142 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
791 /* 2146 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
792 /* 2150 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
793 /* 2154 */ // (sdiv:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (DIV_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
794 /* 2154 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_S_I32),
795 /* 2159 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
796 /* 2165 */ GIR_RootConstrainSelectedInstOperands,
797 /* 2166 */ // GIR_Coverage, 70,
798 /* 2166 */ GIR_Done,
799 /* 2167 */ // Label 124: @2167
800 /* 2167 */ GIM_Reject,
801 /* 2168 */ // Label 122: @2168
802 /* 2168 */ GIM_Try, /*On fail goto*//*Label 125*/ GIMT_Encode4(2204), // Rule ID 71 //
803 /* 2173 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
804 /* 2176 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
805 /* 2179 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
806 /* 2183 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
807 /* 2187 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
808 /* 2191 */ // (sdiv:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (DIV_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
809 /* 2191 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_S_I64),
810 /* 2196 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
811 /* 2202 */ GIR_RootConstrainSelectedInstOperands,
812 /* 2203 */ // GIR_Coverage, 71,
813 /* 2203 */ GIR_Done,
814 /* 2204 */ // Label 125: @2204
815 /* 2204 */ GIM_Reject,
816 /* 2205 */ // Label 123: @2205
817 /* 2205 */ GIM_Reject,
818 /* 2206 */ // Label 4: @2206
819 /* 2206 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 128*/ GIMT_Encode4(2299),
820 /* 2217 */ /*GILLT_s32*//*Label 126*/ GIMT_Encode4(2225),
821 /* 2221 */ /*GILLT_s64*//*Label 127*/ GIMT_Encode4(2262),
822 /* 2225 */ // Label 126: @2225
823 /* 2225 */ GIM_Try, /*On fail goto*//*Label 129*/ GIMT_Encode4(2261), // Rule ID 72 //
824 /* 2230 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
825 /* 2233 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
826 /* 2236 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
827 /* 2240 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
828 /* 2244 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
829 /* 2248 */ // (udiv:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (DIV_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
830 /* 2248 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_U_I32),
831 /* 2253 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
832 /* 2259 */ GIR_RootConstrainSelectedInstOperands,
833 /* 2260 */ // GIR_Coverage, 72,
834 /* 2260 */ GIR_Done,
835 /* 2261 */ // Label 129: @2261
836 /* 2261 */ GIM_Reject,
837 /* 2262 */ // Label 127: @2262
838 /* 2262 */ GIM_Try, /*On fail goto*//*Label 130*/ GIMT_Encode4(2298), // Rule ID 73 //
839 /* 2267 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
840 /* 2270 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
841 /* 2273 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
842 /* 2277 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
843 /* 2281 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
844 /* 2285 */ // (udiv:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (DIV_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
845 /* 2285 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_U_I64),
846 /* 2290 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
847 /* 2296 */ GIR_RootConstrainSelectedInstOperands,
848 /* 2297 */ // GIR_Coverage, 73,
849 /* 2297 */ GIR_Done,
850 /* 2298 */ // Label 130: @2298
851 /* 2298 */ GIM_Reject,
852 /* 2299 */ // Label 128: @2299
853 /* 2299 */ GIM_Reject,
854 /* 2300 */ // Label 5: @2300
855 /* 2300 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 133*/ GIMT_Encode4(2393),
856 /* 2311 */ /*GILLT_s32*//*Label 131*/ GIMT_Encode4(2319),
857 /* 2315 */ /*GILLT_s64*//*Label 132*/ GIMT_Encode4(2356),
858 /* 2319 */ // Label 131: @2319
859 /* 2319 */ GIM_Try, /*On fail goto*//*Label 134*/ GIMT_Encode4(2355), // Rule ID 74 //
860 /* 2324 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
861 /* 2327 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
862 /* 2330 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
863 /* 2334 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
864 /* 2338 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
865 /* 2342 */ // (srem:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (REM_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
866 /* 2342 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_S_I32),
867 /* 2347 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
868 /* 2353 */ GIR_RootConstrainSelectedInstOperands,
869 /* 2354 */ // GIR_Coverage, 74,
870 /* 2354 */ GIR_Done,
871 /* 2355 */ // Label 134: @2355
872 /* 2355 */ GIM_Reject,
873 /* 2356 */ // Label 132: @2356
874 /* 2356 */ GIM_Try, /*On fail goto*//*Label 135*/ GIMT_Encode4(2392), // Rule ID 75 //
875 /* 2361 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
876 /* 2364 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
877 /* 2367 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
878 /* 2371 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
879 /* 2375 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
880 /* 2379 */ // (srem:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (REM_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
881 /* 2379 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_S_I64),
882 /* 2384 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
883 /* 2390 */ GIR_RootConstrainSelectedInstOperands,
884 /* 2391 */ // GIR_Coverage, 75,
885 /* 2391 */ GIR_Done,
886 /* 2392 */ // Label 135: @2392
887 /* 2392 */ GIM_Reject,
888 /* 2393 */ // Label 133: @2393
889 /* 2393 */ GIM_Reject,
890 /* 2394 */ // Label 6: @2394
891 /* 2394 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 138*/ GIMT_Encode4(2487),
892 /* 2405 */ /*GILLT_s32*//*Label 136*/ GIMT_Encode4(2413),
893 /* 2409 */ /*GILLT_s64*//*Label 137*/ GIMT_Encode4(2450),
894 /* 2413 */ // Label 136: @2413
895 /* 2413 */ GIM_Try, /*On fail goto*//*Label 139*/ GIMT_Encode4(2449), // Rule ID 76 //
896 /* 2418 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
897 /* 2421 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
898 /* 2424 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
899 /* 2428 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
900 /* 2432 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
901 /* 2436 */ // (urem:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (REM_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
902 /* 2436 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_U_I32),
903 /* 2441 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
904 /* 2447 */ GIR_RootConstrainSelectedInstOperands,
905 /* 2448 */ // GIR_Coverage, 76,
906 /* 2448 */ GIR_Done,
907 /* 2449 */ // Label 139: @2449
908 /* 2449 */ GIM_Reject,
909 /* 2450 */ // Label 137: @2450
910 /* 2450 */ GIM_Try, /*On fail goto*//*Label 140*/ GIMT_Encode4(2486), // Rule ID 77 //
911 /* 2455 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
912 /* 2458 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
913 /* 2461 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
914 /* 2465 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
915 /* 2469 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
916 /* 2473 */ // (urem:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (REM_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
917 /* 2473 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_U_I64),
918 /* 2478 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
919 /* 2484 */ GIR_RootConstrainSelectedInstOperands,
920 /* 2485 */ // GIR_Coverage, 77,
921 /* 2485 */ GIR_Done,
922 /* 2486 */ // Label 140: @2486
923 /* 2486 */ GIM_Reject,
924 /* 2487 */ // Label 138: @2487
925 /* 2487 */ GIM_Reject,
926 /* 2488 */ // Label 7: @2488
927 /* 2488 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 147*/ GIMT_Encode4(3655),
928 /* 2499 */ /*GILLT_s32*//*Label 141*/ GIMT_Encode4(2523),
929 /* 2503 */ /*GILLT_s64*//*Label 142*/ GIMT_Encode4(2966),
930 /* 2507 */ /*GILLT_v16s8*//*Label 143*/ GIMT_Encode4(3003),
931 /* 2511 */ /*GILLT_v8s16*//*Label 144*/ GIMT_Encode4(3166),
932 /* 2515 */ /*GILLT_v4s32*//*Label 145*/ GIMT_Encode4(3329),
933 /* 2519 */ /*GILLT_v2s64*//*Label 146*/ GIMT_Encode4(3492),
934 /* 2523 */ // Label 141: @2523
935 /* 2523 */ GIM_Try, /*On fail goto*//*Label 148*/ GIMT_Encode4(2965),
936 /* 2528 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
937 /* 2531 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
938 /* 2534 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
939 /* 2538 */ GIM_Try, /*On fail goto*//*Label 149*/ GIMT_Encode4(2588), // Rule ID 1118 //
940 /* 2543 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
941 /* 2547 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
942 /* 2551 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
943 /* 2554 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
944 /* 2559 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
945 /* 2563 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
946 /* 2568 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
947 /* 2572 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
948 /* 2574 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x)
949 /* 2574 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
950 /* 2577 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
951 /* 2579 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
952 /* 2583 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
953 /* 2586 */ GIR_RootConstrainSelectedInstOperands,
954 /* 2587 */ // GIR_Coverage, 1118,
955 /* 2587 */ GIR_EraseRootFromParent_Done,
956 /* 2588 */ // Label 149: @2588
957 /* 2588 */ GIM_Try, /*On fail goto*//*Label 150*/ GIMT_Encode4(2638), // Rule ID 1123 //
958 /* 2593 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
959 /* 2597 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
960 /* 2601 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
961 /* 2604 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
962 /* 2609 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
963 /* 2613 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
964 /* 2618 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
965 /* 2622 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
966 /* 2624 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x)
967 /* 2624 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
968 /* 2627 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
969 /* 2629 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
970 /* 2633 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
971 /* 2636 */ GIR_RootConstrainSelectedInstOperands,
972 /* 2637 */ // GIR_Coverage, 1123,
973 /* 2637 */ GIR_EraseRootFromParent_Done,
974 /* 2638 */ // Label 150: @2638
975 /* 2638 */ GIM_Try, /*On fail goto*//*Label 151*/ GIMT_Encode4(2688), // Rule ID 1128 //
976 /* 2643 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
977 /* 2647 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
978 /* 2651 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
979 /* 2654 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
980 /* 2659 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
981 /* 2663 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
982 /* 2668 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
983 /* 2672 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
984 /* 2674 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x)
985 /* 2674 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
986 /* 2677 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
987 /* 2679 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
988 /* 2683 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
989 /* 2686 */ GIR_RootConstrainSelectedInstOperands,
990 /* 2687 */ // GIR_Coverage, 1128,
991 /* 2687 */ GIR_EraseRootFromParent_Done,
992 /* 2688 */ // Label 151: @2688
993 /* 2688 */ GIM_Try, /*On fail goto*//*Label 152*/ GIMT_Encode4(2738), // Rule ID 1133 //
994 /* 2693 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
995 /* 2697 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
996 /* 2701 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
997 /* 2704 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
998 /* 2709 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
999 /* 2713 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1000 /* 2718 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1001 /* 2722 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1002 /* 2724 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x)
1003 /* 2724 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
1004 /* 2727 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1005 /* 2729 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1006 /* 2733 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1007 /* 2736 */ GIR_RootConstrainSelectedInstOperands,
1008 /* 2737 */ // GIR_Coverage, 1133,
1009 /* 2737 */ GIR_EraseRootFromParent_Done,
1010 /* 2738 */ // Label 152: @2738
1011 /* 2738 */ GIM_Try, /*On fail goto*//*Label 153*/ GIMT_Encode4(2788), // Rule ID 1138 //
1012 /* 2743 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1013 /* 2747 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1014 /* 2751 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1015 /* 2754 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1016 /* 2759 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
1017 /* 2763 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1018 /* 2768 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1019 /* 2772 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1020 /* 2774 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x)
1021 /* 2774 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
1022 /* 2777 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1023 /* 2779 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1024 /* 2783 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1025 /* 2786 */ GIR_RootConstrainSelectedInstOperands,
1026 /* 2787 */ // GIR_Coverage, 1138,
1027 /* 2787 */ GIR_EraseRootFromParent_Done,
1028 /* 2788 */ // Label 153: @2788
1029 /* 2788 */ GIM_Try, /*On fail goto*//*Label 154*/ GIMT_Encode4(2838), // Rule ID 1143 //
1030 /* 2793 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1031 /* 2797 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1032 /* 2801 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1033 /* 2804 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1034 /* 2809 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1035 /* 2813 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1036 /* 2818 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1037 /* 2822 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1038 /* 2824 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x)
1039 /* 2824 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
1040 /* 2827 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1041 /* 2829 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1042 /* 2833 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1043 /* 2836 */ GIR_RootConstrainSelectedInstOperands,
1044 /* 2837 */ // GIR_Coverage, 1143,
1045 /* 2837 */ GIR_EraseRootFromParent_Done,
1046 /* 2838 */ // Label 154: @2838
1047 /* 2838 */ GIM_Try, /*On fail goto*//*Label 155*/ GIMT_Encode4(2888), // Rule ID 1148 //
1048 /* 2843 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1049 /* 2847 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1050 /* 2851 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1051 /* 2854 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1052 /* 2859 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1053 /* 2863 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1054 /* 2868 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1055 /* 2872 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1056 /* 2874 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x)
1057 /* 2874 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
1058 /* 2877 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1059 /* 2879 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1060 /* 2883 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1061 /* 2886 */ GIR_RootConstrainSelectedInstOperands,
1062 /* 2887 */ // GIR_Coverage, 1148,
1063 /* 2887 */ GIR_EraseRootFromParent_Done,
1064 /* 2888 */ // Label 155: @2888
1065 /* 2888 */ GIM_Try, /*On fail goto*//*Label 156*/ GIMT_Encode4(2938), // Rule ID 1153 //
1066 /* 2893 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1067 /* 2897 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1068 /* 2901 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1069 /* 2904 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1070 /* 2909 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
1071 /* 2913 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1072 /* 2918 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1073 /* 2922 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1074 /* 2924 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x)
1075 /* 2924 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
1076 /* 2927 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1077 /* 2929 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1078 /* 2933 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1079 /* 2936 */ GIR_RootConstrainSelectedInstOperands,
1080 /* 2937 */ // GIR_Coverage, 1153,
1081 /* 2937 */ GIR_EraseRootFromParent_Done,
1082 /* 2938 */ // Label 156: @2938
1083 /* 2938 */ GIM_Try, /*On fail goto*//*Label 157*/ GIMT_Encode4(2964), // Rule ID 78 //
1084 /* 2943 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1085 /* 2947 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1086 /* 2951 */ // (and:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (AND_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
1087 /* 2951 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND_I32),
1088 /* 2956 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1089 /* 2962 */ GIR_RootConstrainSelectedInstOperands,
1090 /* 2963 */ // GIR_Coverage, 78,
1091 /* 2963 */ GIR_Done,
1092 /* 2964 */ // Label 157: @2964
1093 /* 2964 */ GIM_Reject,
1094 /* 2965 */ // Label 148: @2965
1095 /* 2965 */ GIM_Reject,
1096 /* 2966 */ // Label 142: @2966
1097 /* 2966 */ GIM_Try, /*On fail goto*//*Label 158*/ GIMT_Encode4(3002), // Rule ID 79 //
1098 /* 2971 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
1099 /* 2974 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
1100 /* 2977 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1101 /* 2981 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1102 /* 2985 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1103 /* 2989 */ // (and:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (AND_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
1104 /* 2989 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND_I64),
1105 /* 2994 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1106 /* 3000 */ GIR_RootConstrainSelectedInstOperands,
1107 /* 3001 */ // GIR_Coverage, 79,
1108 /* 3001 */ GIR_Done,
1109 /* 3002 */ // Label 158: @3002
1110 /* 3002 */ GIM_Reject,
1111 /* 3003 */ // Label 143: @3003
1112 /* 3003 */ GIM_Try, /*On fail goto*//*Label 159*/ GIMT_Encode4(3165),
1113 /* 3008 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
1114 /* 3011 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
1115 /* 3014 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1116 /* 3018 */ GIM_Try, /*On fail goto*//*Label 160*/ GIMT_Encode4(3078), // Rule ID 1340 //
1117 /* 3023 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1118 /* 3027 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1119 /* 3031 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
1120 /* 3035 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
1121 /* 3039 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1122 /* 3044 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1123 /* 3048 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1124 /* 3054 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1125 /* 3056 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1126 /* 3060 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1127 /* 3062 */ // (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$rhs, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$lhs) => (ANDNOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1128 /* 3062 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1129 /* 3065 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1130 /* 3067 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1131 /* 3069 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1132 /* 3073 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1133 /* 3076 */ GIR_RootConstrainSelectedInstOperands,
1134 /* 3077 */ // GIR_Coverage, 1340,
1135 /* 3077 */ GIR_EraseRootFromParent_Done,
1136 /* 3078 */ // Label 160: @3078
1137 /* 3078 */ GIM_Try, /*On fail goto*//*Label 161*/ GIMT_Encode4(3138), // Rule ID 1064 //
1138 /* 3083 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1139 /* 3087 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1140 /* 3091 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1141 /* 3095 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
1142 /* 3099 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
1143 /* 3103 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1144 /* 3108 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1145 /* 3112 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1146 /* 3118 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1147 /* 3120 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1148 /* 3122 */ // (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$rhs, immAllOnesV:{ *:[v16i8] })) => (ANDNOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1149 /* 3122 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1150 /* 3125 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1151 /* 3127 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1152 /* 3129 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1153 /* 3133 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1154 /* 3136 */ GIR_RootConstrainSelectedInstOperands,
1155 /* 3137 */ // GIR_Coverage, 1064,
1156 /* 3137 */ GIR_EraseRootFromParent_Done,
1157 /* 3138 */ // Label 161: @3138
1158 /* 3138 */ GIM_Try, /*On fail goto*//*Label 162*/ GIMT_Encode4(3164), // Rule ID 1048 //
1159 /* 3143 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1160 /* 3147 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1161 /* 3151 */ // (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (AND:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1162 /* 3151 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1163 /* 3156 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1164 /* 3162 */ GIR_RootConstrainSelectedInstOperands,
1165 /* 3163 */ // GIR_Coverage, 1048,
1166 /* 3163 */ GIR_Done,
1167 /* 3164 */ // Label 162: @3164
1168 /* 3164 */ GIM_Reject,
1169 /* 3165 */ // Label 159: @3165
1170 /* 3165 */ GIM_Reject,
1171 /* 3166 */ // Label 144: @3166
1172 /* 3166 */ GIM_Try, /*On fail goto*//*Label 163*/ GIMT_Encode4(3328),
1173 /* 3171 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
1174 /* 3174 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
1175 /* 3177 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1176 /* 3181 */ GIM_Try, /*On fail goto*//*Label 164*/ GIMT_Encode4(3241), // Rule ID 1341 //
1177 /* 3186 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1178 /* 3190 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1179 /* 3194 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1180 /* 3198 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1181 /* 3202 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1182 /* 3207 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1183 /* 3211 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1184 /* 3217 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1185 /* 3219 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1186 /* 3223 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1187 /* 3225 */ // (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$rhs, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$lhs) => (ANDNOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1188 /* 3225 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1189 /* 3228 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1190 /* 3230 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1191 /* 3232 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1192 /* 3236 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1193 /* 3239 */ GIR_RootConstrainSelectedInstOperands,
1194 /* 3240 */ // GIR_Coverage, 1341,
1195 /* 3240 */ GIR_EraseRootFromParent_Done,
1196 /* 3241 */ // Label 164: @3241
1197 /* 3241 */ GIM_Try, /*On fail goto*//*Label 165*/ GIMT_Encode4(3301), // Rule ID 1065 //
1198 /* 3246 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1199 /* 3250 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1200 /* 3254 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1201 /* 3258 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1202 /* 3262 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1203 /* 3266 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1204 /* 3271 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1205 /* 3275 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1206 /* 3281 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1207 /* 3283 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1208 /* 3285 */ // (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$rhs, immAllOnesV:{ *:[v8i16] })) => (ANDNOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1209 /* 3285 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1210 /* 3288 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1211 /* 3290 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1212 /* 3292 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1213 /* 3296 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1214 /* 3299 */ GIR_RootConstrainSelectedInstOperands,
1215 /* 3300 */ // GIR_Coverage, 1065,
1216 /* 3300 */ GIR_EraseRootFromParent_Done,
1217 /* 3301 */ // Label 165: @3301
1218 /* 3301 */ GIM_Try, /*On fail goto*//*Label 166*/ GIMT_Encode4(3327), // Rule ID 1053 //
1219 /* 3306 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1220 /* 3310 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1221 /* 3314 */ // (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (AND:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1222 /* 3314 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1223 /* 3319 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1224 /* 3325 */ GIR_RootConstrainSelectedInstOperands,
1225 /* 3326 */ // GIR_Coverage, 1053,
1226 /* 3326 */ GIR_Done,
1227 /* 3327 */ // Label 166: @3327
1228 /* 3327 */ GIM_Reject,
1229 /* 3328 */ // Label 163: @3328
1230 /* 3328 */ GIM_Reject,
1231 /* 3329 */ // Label 145: @3329
1232 /* 3329 */ GIM_Try, /*On fail goto*//*Label 167*/ GIMT_Encode4(3491),
1233 /* 3334 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
1234 /* 3337 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
1235 /* 3340 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1236 /* 3344 */ GIM_Try, /*On fail goto*//*Label 168*/ GIMT_Encode4(3404), // Rule ID 1342 //
1237 /* 3349 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1238 /* 3353 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1239 /* 3357 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1240 /* 3361 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1241 /* 3365 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1242 /* 3370 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1243 /* 3374 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1244 /* 3380 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1245 /* 3382 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1246 /* 3386 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1247 /* 3388 */ // (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$rhs, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$lhs) => (ANDNOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
1248 /* 3388 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1249 /* 3391 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1250 /* 3393 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1251 /* 3395 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1252 /* 3399 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1253 /* 3402 */ GIR_RootConstrainSelectedInstOperands,
1254 /* 3403 */ // GIR_Coverage, 1342,
1255 /* 3403 */ GIR_EraseRootFromParent_Done,
1256 /* 3404 */ // Label 168: @3404
1257 /* 3404 */ GIM_Try, /*On fail goto*//*Label 169*/ GIMT_Encode4(3464), // Rule ID 1066 //
1258 /* 3409 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1259 /* 3413 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1260 /* 3417 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1261 /* 3421 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1262 /* 3425 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1263 /* 3429 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1264 /* 3434 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1265 /* 3438 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1266 /* 3444 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1267 /* 3446 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1268 /* 3448 */ // (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$rhs, immAllOnesV:{ *:[v4i32] })) => (ANDNOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
1269 /* 3448 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1270 /* 3451 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1271 /* 3453 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1272 /* 3455 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1273 /* 3459 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1274 /* 3462 */ GIR_RootConstrainSelectedInstOperands,
1275 /* 3463 */ // GIR_Coverage, 1066,
1276 /* 3463 */ GIR_EraseRootFromParent_Done,
1277 /* 3464 */ // Label 169: @3464
1278 /* 3464 */ GIM_Try, /*On fail goto*//*Label 170*/ GIMT_Encode4(3490), // Rule ID 1054 //
1279 /* 3469 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1280 /* 3473 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1281 /* 3477 */ // (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (AND:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
1282 /* 3477 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1283 /* 3482 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1284 /* 3488 */ GIR_RootConstrainSelectedInstOperands,
1285 /* 3489 */ // GIR_Coverage, 1054,
1286 /* 3489 */ GIR_Done,
1287 /* 3490 */ // Label 170: @3490
1288 /* 3490 */ GIM_Reject,
1289 /* 3491 */ // Label 167: @3491
1290 /* 3491 */ GIM_Reject,
1291 /* 3492 */ // Label 146: @3492
1292 /* 3492 */ GIM_Try, /*On fail goto*//*Label 171*/ GIMT_Encode4(3654),
1293 /* 3497 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
1294 /* 3500 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
1295 /* 3503 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1296 /* 3507 */ GIM_Try, /*On fail goto*//*Label 172*/ GIMT_Encode4(3567), // Rule ID 1343 //
1297 /* 3512 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1298 /* 3516 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1299 /* 3520 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
1300 /* 3524 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
1301 /* 3528 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1302 /* 3533 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1303 /* 3537 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1304 /* 3543 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1305 /* 3545 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1306 /* 3549 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1307 /* 3551 */ // (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$rhs, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$lhs) => (ANDNOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
1308 /* 3551 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1309 /* 3554 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1310 /* 3556 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1311 /* 3558 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1312 /* 3562 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1313 /* 3565 */ GIR_RootConstrainSelectedInstOperands,
1314 /* 3566 */ // GIR_Coverage, 1343,
1315 /* 3566 */ GIR_EraseRootFromParent_Done,
1316 /* 3567 */ // Label 172: @3567
1317 /* 3567 */ GIM_Try, /*On fail goto*//*Label 173*/ GIMT_Encode4(3627), // Rule ID 1067 //
1318 /* 3572 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1319 /* 3576 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1320 /* 3580 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1321 /* 3584 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
1322 /* 3588 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
1323 /* 3592 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1324 /* 3597 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1325 /* 3601 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1326 /* 3607 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1327 /* 3609 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1328 /* 3611 */ // (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$rhs, immAllOnesV:{ *:[v2i64] })) => (ANDNOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
1329 /* 3611 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1330 /* 3614 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1331 /* 3616 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1332 /* 3618 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1333 /* 3622 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1334 /* 3625 */ GIR_RootConstrainSelectedInstOperands,
1335 /* 3626 */ // GIR_Coverage, 1067,
1336 /* 3626 */ GIR_EraseRootFromParent_Done,
1337 /* 3627 */ // Label 173: @3627
1338 /* 3627 */ GIM_Try, /*On fail goto*//*Label 174*/ GIMT_Encode4(3653), // Rule ID 1055 //
1339 /* 3632 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1340 /* 3636 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1341 /* 3640 */ // (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (AND:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
1342 /* 3640 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1343 /* 3645 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1344 /* 3651 */ GIR_RootConstrainSelectedInstOperands,
1345 /* 3652 */ // GIR_Coverage, 1055,
1346 /* 3652 */ GIR_Done,
1347 /* 3653 */ // Label 174: @3653
1348 /* 3653 */ GIM_Reject,
1349 /* 3654 */ // Label 171: @3654
1350 /* 3654 */ GIM_Reject,
1351 /* 3655 */ // Label 147: @3655
1352 /* 3655 */ GIM_Reject,
1353 /* 3656 */ // Label 8: @3656
1354 /* 3656 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 181*/ GIMT_Encode4(7297),
1355 /* 3667 */ /*GILLT_s32*//*Label 175*/ GIMT_Encode4(3691),
1356 /* 3671 */ /*GILLT_s64*//*Label 176*/ GIMT_Encode4(3728),
1357 /* 3675 */ /*GILLT_v16s8*//*Label 177*/ GIMT_Encode4(3765),
1358 /* 3679 */ /*GILLT_v8s16*//*Label 178*/ GIMT_Encode4(4648),
1359 /* 3683 */ /*GILLT_v4s32*//*Label 179*/ GIMT_Encode4(5531),
1360 /* 3687 */ /*GILLT_v2s64*//*Label 180*/ GIMT_Encode4(6414),
1361 /* 3691 */ // Label 175: @3691
1362 /* 3691 */ GIM_Try, /*On fail goto*//*Label 182*/ GIMT_Encode4(3727), // Rule ID 80 //
1363 /* 3696 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
1364 /* 3699 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
1365 /* 3702 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1366 /* 3706 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1367 /* 3710 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1368 /* 3714 */ // (or:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (OR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
1369 /* 3714 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR_I32),
1370 /* 3719 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1371 /* 3725 */ GIR_RootConstrainSelectedInstOperands,
1372 /* 3726 */ // GIR_Coverage, 80,
1373 /* 3726 */ GIR_Done,
1374 /* 3727 */ // Label 182: @3727
1375 /* 3727 */ GIM_Reject,
1376 /* 3728 */ // Label 176: @3728
1377 /* 3728 */ GIM_Try, /*On fail goto*//*Label 183*/ GIMT_Encode4(3764), // Rule ID 81 //
1378 /* 3733 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
1379 /* 3736 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
1380 /* 3739 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1381 /* 3743 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1382 /* 3747 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1383 /* 3751 */ // (or:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (OR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
1384 /* 3751 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR_I64),
1385 /* 3756 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1386 /* 3762 */ GIR_RootConstrainSelectedInstOperands,
1387 /* 3763 */ // GIR_Coverage, 81,
1388 /* 3763 */ GIR_Done,
1389 /* 3764 */ // Label 183: @3764
1390 /* 3764 */ GIM_Reject,
1391 /* 3765 */ // Label 177: @3765
1392 /* 3765 */ GIM_Try, /*On fail goto*//*Label 184*/ GIMT_Encode4(4647),
1393 /* 3770 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
1394 /* 3773 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
1395 /* 3776 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1396 /* 3780 */ GIM_Try, /*On fail goto*//*Label 185*/ GIMT_Encode4(3885), // Rule ID 1348 //
1397 /* 3785 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1398 /* 3789 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1399 /* 3793 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
1400 /* 3797 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
1401 /* 3801 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1402 /* 3805 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1403 /* 3809 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
1404 /* 3813 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
1405 /* 3817 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1406 /* 3822 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1407 /* 3826 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1408 /* 3832 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1409 /* 3834 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1410 /* 3839 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1411 /* 3843 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1412 /* 3847 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16s8,
1413 /* 3851 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1414 /* 3856 */ // MIs[4] c
1415 /* 3856 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1416 /* 3861 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1417 /* 3863 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1418 /* 3863 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1419 /* 3866 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1420 /* 3868 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1421 /* 3872 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1422 /* 3876 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1423 /* 3880 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1424 /* 3883 */ GIR_RootConstrainSelectedInstOperands,
1425 /* 3884 */ // GIR_Coverage, 1348,
1426 /* 3884 */ GIR_EraseRootFromParent_Done,
1427 /* 3885 */ // Label 185: @3885
1428 /* 3885 */ GIM_Try, /*On fail goto*//*Label 186*/ GIMT_Encode4(3990), // Rule ID 1347 //
1429 /* 3890 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1430 /* 3894 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1431 /* 3898 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
1432 /* 3902 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
1433 /* 3906 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1434 /* 3910 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1435 /* 3914 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
1436 /* 3918 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
1437 /* 3922 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1438 /* 3927 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1439 /* 3931 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1440 /* 3937 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1441 /* 3939 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1442 /* 3944 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1443 /* 3948 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1444 /* 3952 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16s8,
1445 /* 3956 */ // MIs[4] c
1446 /* 3956 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1447 /* 3961 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1448 /* 3966 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1449 /* 3968 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1450 /* 3968 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1451 /* 3971 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1452 /* 3973 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1453 /* 3977 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1454 /* 3981 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1455 /* 3985 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1456 /* 3988 */ GIR_RootConstrainSelectedInstOperands,
1457 /* 3989 */ // GIR_Coverage, 1347,
1458 /* 3989 */ GIR_EraseRootFromParent_Done,
1459 /* 3990 */ // Label 186: @3990
1460 /* 3990 */ GIM_Try, /*On fail goto*//*Label 187*/ GIMT_Encode4(4095), // Rule ID 1350 //
1461 /* 3995 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1462 /* 3999 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1463 /* 4003 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
1464 /* 4007 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
1465 /* 4011 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1466 /* 4016 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1467 /* 4020 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1468 /* 4024 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
1469 /* 4028 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
1470 /* 4032 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1471 /* 4037 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1472 /* 4041 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1473 /* 4047 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1474 /* 4049 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1475 /* 4053 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1476 /* 4057 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16s8,
1477 /* 4061 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1478 /* 4066 */ // MIs[4] c
1479 /* 4066 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1480 /* 4071 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1481 /* 4073 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1482 /* 4073 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1483 /* 4076 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1484 /* 4078 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1485 /* 4082 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1486 /* 4086 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1487 /* 4090 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1488 /* 4093 */ GIR_RootConstrainSelectedInstOperands,
1489 /* 4094 */ // GIR_Coverage, 1350,
1490 /* 4094 */ GIR_EraseRootFromParent_Done,
1491 /* 4095 */ // Label 187: @4095
1492 /* 4095 */ GIM_Try, /*On fail goto*//*Label 188*/ GIMT_Encode4(4200), // Rule ID 1349 //
1493 /* 4100 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1494 /* 4104 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1495 /* 4108 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
1496 /* 4112 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
1497 /* 4116 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1498 /* 4121 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1499 /* 4125 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1500 /* 4129 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
1501 /* 4133 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
1502 /* 4137 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1503 /* 4142 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1504 /* 4146 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1505 /* 4152 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1506 /* 4154 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1507 /* 4158 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1508 /* 4162 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16s8,
1509 /* 4166 */ // MIs[4] c
1510 /* 4166 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1511 /* 4171 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1512 /* 4176 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1513 /* 4178 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1514 /* 4178 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1515 /* 4181 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1516 /* 4183 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1517 /* 4187 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1518 /* 4191 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1519 /* 4195 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1520 /* 4198 */ GIR_RootConstrainSelectedInstOperands,
1521 /* 4199 */ // GIR_Coverage, 1349,
1522 /* 4199 */ GIR_EraseRootFromParent_Done,
1523 /* 4200 */ // Label 188: @4200
1524 /* 4200 */ GIM_Try, /*On fail goto*//*Label 189*/ GIMT_Encode4(4305), // Rule ID 1074 //
1525 /* 4205 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1526 /* 4209 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1527 /* 4213 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
1528 /* 4217 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
1529 /* 4221 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1530 /* 4226 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1531 /* 4231 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1532 /* 4235 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1533 /* 4239 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
1534 /* 4243 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
1535 /* 4247 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1536 /* 4251 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1537 /* 4255 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16s8,
1538 /* 4259 */ // MIs[3] c
1539 /* 4259 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1540 /* 4264 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1541 /* 4268 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1542 /* 4274 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1543 /* 4276 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1544 /* 4281 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1545 /* 4283 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1), (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1546 /* 4283 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1547 /* 4286 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1548 /* 4288 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1549 /* 4292 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1550 /* 4296 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1551 /* 4300 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1552 /* 4303 */ GIR_RootConstrainSelectedInstOperands,
1553 /* 4304 */ // GIR_Coverage, 1074,
1554 /* 4304 */ GIR_EraseRootFromParent_Done,
1555 /* 4305 */ // Label 189: @4305
1556 /* 4305 */ GIM_Try, /*On fail goto*//*Label 190*/ GIMT_Encode4(4410), // Rule ID 1345 //
1557 /* 4310 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1558 /* 4314 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1559 /* 4318 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
1560 /* 4322 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
1561 /* 4326 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1562 /* 4331 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1563 /* 4336 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1564 /* 4340 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1565 /* 4344 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
1566 /* 4348 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
1567 /* 4352 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1568 /* 4356 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1569 /* 4360 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16s8,
1570 /* 4364 */ // MIs[3] c
1571 /* 4364 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1572 /* 4369 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1573 /* 4373 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1574 /* 4379 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1575 /* 4381 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1576 /* 4386 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1577 /* 4388 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c), (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1578 /* 4388 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1579 /* 4391 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1580 /* 4393 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1581 /* 4397 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1582 /* 4401 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1583 /* 4405 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1584 /* 4408 */ GIR_RootConstrainSelectedInstOperands,
1585 /* 4409 */ // GIR_Coverage, 1345,
1586 /* 4409 */ GIR_EraseRootFromParent_Done,
1587 /* 4410 */ // Label 190: @4410
1588 /* 4410 */ GIM_Try, /*On fail goto*//*Label 191*/ GIMT_Encode4(4515), // Rule ID 1344 //
1589 /* 4415 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1590 /* 4419 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1591 /* 4423 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
1592 /* 4427 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
1593 /* 4431 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1594 /* 4436 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1595 /* 4441 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1596 /* 4445 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1597 /* 4449 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
1598 /* 4453 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
1599 /* 4457 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1600 /* 4462 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1601 /* 4466 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1602 /* 4470 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16s8,
1603 /* 4474 */ // MIs[3] c
1604 /* 4474 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1605 /* 4479 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1606 /* 4483 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1607 /* 4489 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1608 /* 4491 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1609 /* 4493 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1610 /* 4493 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1611 /* 4496 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1612 /* 4498 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1613 /* 4502 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1614 /* 4506 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1615 /* 4510 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1616 /* 4513 */ GIR_RootConstrainSelectedInstOperands,
1617 /* 4514 */ // GIR_Coverage, 1344,
1618 /* 4514 */ GIR_EraseRootFromParent_Done,
1619 /* 4515 */ // Label 191: @4515
1620 /* 4515 */ GIM_Try, /*On fail goto*//*Label 192*/ GIMT_Encode4(4620), // Rule ID 1346 //
1621 /* 4520 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1622 /* 4524 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1623 /* 4528 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
1624 /* 4532 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
1625 /* 4536 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1626 /* 4541 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1627 /* 4546 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1628 /* 4550 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1629 /* 4554 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
1630 /* 4558 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
1631 /* 4562 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1632 /* 4567 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1633 /* 4571 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1634 /* 4575 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16s8,
1635 /* 4579 */ // MIs[3] c
1636 /* 4579 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1637 /* 4584 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1638 /* 4588 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1639 /* 4594 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1640 /* 4596 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1641 /* 4598 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1642 /* 4598 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1643 /* 4601 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1644 /* 4603 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1645 /* 4607 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1646 /* 4611 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1647 /* 4615 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1648 /* 4618 */ GIR_RootConstrainSelectedInstOperands,
1649 /* 4619 */ // GIR_Coverage, 1346,
1650 /* 4619 */ GIR_EraseRootFromParent_Done,
1651 /* 4620 */ // Label 192: @4620
1652 /* 4620 */ GIM_Try, /*On fail goto*//*Label 193*/ GIMT_Encode4(4646), // Rule ID 1056 //
1653 /* 4625 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1654 /* 4629 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1655 /* 4633 */ // (or:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (OR:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1656 /* 4633 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
1657 /* 4638 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1658 /* 4644 */ GIR_RootConstrainSelectedInstOperands,
1659 /* 4645 */ // GIR_Coverage, 1056,
1660 /* 4645 */ GIR_Done,
1661 /* 4646 */ // Label 193: @4646
1662 /* 4646 */ GIM_Reject,
1663 /* 4647 */ // Label 184: @4647
1664 /* 4647 */ GIM_Reject,
1665 /* 4648 */ // Label 178: @4648
1666 /* 4648 */ GIM_Try, /*On fail goto*//*Label 194*/ GIMT_Encode4(5530),
1667 /* 4653 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
1668 /* 4656 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
1669 /* 4659 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1670 /* 4663 */ GIM_Try, /*On fail goto*//*Label 195*/ GIMT_Encode4(4768), // Rule ID 1355 //
1671 /* 4668 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1672 /* 4672 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1673 /* 4676 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1674 /* 4680 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1675 /* 4684 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1676 /* 4688 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1677 /* 4692 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
1678 /* 4696 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
1679 /* 4700 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1680 /* 4705 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1681 /* 4709 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1682 /* 4715 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1683 /* 4717 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1684 /* 4722 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1685 /* 4726 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1686 /* 4730 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8s16,
1687 /* 4734 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1688 /* 4739 */ // MIs[4] c
1689 /* 4739 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1690 /* 4744 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1691 /* 4746 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1692 /* 4746 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1693 /* 4749 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1694 /* 4751 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1695 /* 4755 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1696 /* 4759 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1697 /* 4763 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1698 /* 4766 */ GIR_RootConstrainSelectedInstOperands,
1699 /* 4767 */ // GIR_Coverage, 1355,
1700 /* 4767 */ GIR_EraseRootFromParent_Done,
1701 /* 4768 */ // Label 195: @4768
1702 /* 4768 */ GIM_Try, /*On fail goto*//*Label 196*/ GIMT_Encode4(4873), // Rule ID 1354 //
1703 /* 4773 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1704 /* 4777 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1705 /* 4781 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1706 /* 4785 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1707 /* 4789 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1708 /* 4793 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1709 /* 4797 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
1710 /* 4801 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
1711 /* 4805 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1712 /* 4810 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1713 /* 4814 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1714 /* 4820 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1715 /* 4822 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1716 /* 4827 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1717 /* 4831 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1718 /* 4835 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8s16,
1719 /* 4839 */ // MIs[4] c
1720 /* 4839 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1721 /* 4844 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1722 /* 4849 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1723 /* 4851 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1724 /* 4851 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1725 /* 4854 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1726 /* 4856 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1727 /* 4860 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1728 /* 4864 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1729 /* 4868 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1730 /* 4871 */ GIR_RootConstrainSelectedInstOperands,
1731 /* 4872 */ // GIR_Coverage, 1354,
1732 /* 4872 */ GIR_EraseRootFromParent_Done,
1733 /* 4873 */ // Label 196: @4873
1734 /* 4873 */ GIM_Try, /*On fail goto*//*Label 197*/ GIMT_Encode4(4978), // Rule ID 1357 //
1735 /* 4878 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1736 /* 4882 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1737 /* 4886 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1738 /* 4890 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1739 /* 4894 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1740 /* 4899 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1741 /* 4903 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1742 /* 4907 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
1743 /* 4911 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
1744 /* 4915 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1745 /* 4920 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1746 /* 4924 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1747 /* 4930 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1748 /* 4932 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1749 /* 4936 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1750 /* 4940 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8s16,
1751 /* 4944 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1752 /* 4949 */ // MIs[4] c
1753 /* 4949 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1754 /* 4954 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1755 /* 4956 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1756 /* 4956 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1757 /* 4959 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1758 /* 4961 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1759 /* 4965 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1760 /* 4969 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1761 /* 4973 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1762 /* 4976 */ GIR_RootConstrainSelectedInstOperands,
1763 /* 4977 */ // GIR_Coverage, 1357,
1764 /* 4977 */ GIR_EraseRootFromParent_Done,
1765 /* 4978 */ // Label 197: @4978
1766 /* 4978 */ GIM_Try, /*On fail goto*//*Label 198*/ GIMT_Encode4(5083), // Rule ID 1356 //
1767 /* 4983 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1768 /* 4987 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1769 /* 4991 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1770 /* 4995 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1771 /* 4999 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1772 /* 5004 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1773 /* 5008 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1774 /* 5012 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
1775 /* 5016 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
1776 /* 5020 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1777 /* 5025 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1778 /* 5029 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1779 /* 5035 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1780 /* 5037 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1781 /* 5041 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1782 /* 5045 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8s16,
1783 /* 5049 */ // MIs[4] c
1784 /* 5049 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1785 /* 5054 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1786 /* 5059 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1787 /* 5061 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1788 /* 5061 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1789 /* 5064 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1790 /* 5066 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1791 /* 5070 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1792 /* 5074 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1793 /* 5078 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1794 /* 5081 */ GIR_RootConstrainSelectedInstOperands,
1795 /* 5082 */ // GIR_Coverage, 1356,
1796 /* 5082 */ GIR_EraseRootFromParent_Done,
1797 /* 5083 */ // Label 198: @5083
1798 /* 5083 */ GIM_Try, /*On fail goto*//*Label 199*/ GIMT_Encode4(5188), // Rule ID 1075 //
1799 /* 5088 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1800 /* 5092 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1801 /* 5096 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1802 /* 5100 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1803 /* 5104 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1804 /* 5109 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1805 /* 5114 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1806 /* 5118 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1807 /* 5122 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
1808 /* 5126 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
1809 /* 5130 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1810 /* 5134 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1811 /* 5138 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8s16,
1812 /* 5142 */ // MIs[3] c
1813 /* 5142 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1814 /* 5147 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1815 /* 5151 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1816 /* 5157 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1817 /* 5159 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1818 /* 5164 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1819 /* 5166 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1), (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1820 /* 5166 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1821 /* 5169 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1822 /* 5171 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1823 /* 5175 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1824 /* 5179 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1825 /* 5183 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1826 /* 5186 */ GIR_RootConstrainSelectedInstOperands,
1827 /* 5187 */ // GIR_Coverage, 1075,
1828 /* 5187 */ GIR_EraseRootFromParent_Done,
1829 /* 5188 */ // Label 199: @5188
1830 /* 5188 */ GIM_Try, /*On fail goto*//*Label 200*/ GIMT_Encode4(5293), // Rule ID 1352 //
1831 /* 5193 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1832 /* 5197 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1833 /* 5201 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1834 /* 5205 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1835 /* 5209 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1836 /* 5214 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1837 /* 5219 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1838 /* 5223 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1839 /* 5227 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
1840 /* 5231 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
1841 /* 5235 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1842 /* 5239 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1843 /* 5243 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8s16,
1844 /* 5247 */ // MIs[3] c
1845 /* 5247 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1846 /* 5252 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1847 /* 5256 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1848 /* 5262 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1849 /* 5264 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1850 /* 5269 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1851 /* 5271 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c), (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1852 /* 5271 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1853 /* 5274 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1854 /* 5276 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1855 /* 5280 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1856 /* 5284 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1857 /* 5288 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1858 /* 5291 */ GIR_RootConstrainSelectedInstOperands,
1859 /* 5292 */ // GIR_Coverage, 1352,
1860 /* 5292 */ GIR_EraseRootFromParent_Done,
1861 /* 5293 */ // Label 200: @5293
1862 /* 5293 */ GIM_Try, /*On fail goto*//*Label 201*/ GIMT_Encode4(5398), // Rule ID 1351 //
1863 /* 5298 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1864 /* 5302 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1865 /* 5306 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1866 /* 5310 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1867 /* 5314 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1868 /* 5319 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1869 /* 5324 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1870 /* 5328 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1871 /* 5332 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
1872 /* 5336 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
1873 /* 5340 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1874 /* 5345 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1875 /* 5349 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1876 /* 5353 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8s16,
1877 /* 5357 */ // MIs[3] c
1878 /* 5357 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1879 /* 5362 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1880 /* 5366 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1881 /* 5372 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1882 /* 5374 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1883 /* 5376 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1884 /* 5376 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1885 /* 5379 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1886 /* 5381 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1887 /* 5385 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1888 /* 5389 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1889 /* 5393 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1890 /* 5396 */ GIR_RootConstrainSelectedInstOperands,
1891 /* 5397 */ // GIR_Coverage, 1351,
1892 /* 5397 */ GIR_EraseRootFromParent_Done,
1893 /* 5398 */ // Label 201: @5398
1894 /* 5398 */ GIM_Try, /*On fail goto*//*Label 202*/ GIMT_Encode4(5503), // Rule ID 1353 //
1895 /* 5403 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1896 /* 5407 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1897 /* 5411 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1898 /* 5415 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1899 /* 5419 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1900 /* 5424 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1901 /* 5429 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1902 /* 5433 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1903 /* 5437 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
1904 /* 5441 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
1905 /* 5445 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1906 /* 5450 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1907 /* 5454 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1908 /* 5458 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8s16,
1909 /* 5462 */ // MIs[3] c
1910 /* 5462 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1911 /* 5467 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1912 /* 5471 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1913 /* 5477 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1914 /* 5479 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1915 /* 5481 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1916 /* 5481 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1917 /* 5484 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1918 /* 5486 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1919 /* 5490 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1920 /* 5494 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1921 /* 5498 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1922 /* 5501 */ GIR_RootConstrainSelectedInstOperands,
1923 /* 5502 */ // GIR_Coverage, 1353,
1924 /* 5502 */ GIR_EraseRootFromParent_Done,
1925 /* 5503 */ // Label 202: @5503
1926 /* 5503 */ GIM_Try, /*On fail goto*//*Label 203*/ GIMT_Encode4(5529), // Rule ID 1057 //
1927 /* 5508 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1928 /* 5512 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1929 /* 5516 */ // (or:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (OR:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1930 /* 5516 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
1931 /* 5521 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1932 /* 5527 */ GIR_RootConstrainSelectedInstOperands,
1933 /* 5528 */ // GIR_Coverage, 1057,
1934 /* 5528 */ GIR_Done,
1935 /* 5529 */ // Label 203: @5529
1936 /* 5529 */ GIM_Reject,
1937 /* 5530 */ // Label 194: @5530
1938 /* 5530 */ GIM_Reject,
1939 /* 5531 */ // Label 179: @5531
1940 /* 5531 */ GIM_Try, /*On fail goto*//*Label 204*/ GIMT_Encode4(6413),
1941 /* 5536 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
1942 /* 5539 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
1943 /* 5542 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1944 /* 5546 */ GIM_Try, /*On fail goto*//*Label 205*/ GIMT_Encode4(5651), // Rule ID 1362 //
1945 /* 5551 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1946 /* 5555 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1947 /* 5559 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1948 /* 5563 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1949 /* 5567 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1950 /* 5571 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1951 /* 5575 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
1952 /* 5579 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
1953 /* 5583 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1954 /* 5588 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1955 /* 5592 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1956 /* 5598 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1957 /* 5600 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1958 /* 5605 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1959 /* 5609 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1960 /* 5613 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4s32,
1961 /* 5617 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1962 /* 5622 */ // MIs[4] c
1963 /* 5622 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1964 /* 5627 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1965 /* 5629 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
1966 /* 5629 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1967 /* 5632 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1968 /* 5634 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1969 /* 5638 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1970 /* 5642 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1971 /* 5646 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1972 /* 5649 */ GIR_RootConstrainSelectedInstOperands,
1973 /* 5650 */ // GIR_Coverage, 1362,
1974 /* 5650 */ GIR_EraseRootFromParent_Done,
1975 /* 5651 */ // Label 205: @5651
1976 /* 5651 */ GIM_Try, /*On fail goto*//*Label 206*/ GIMT_Encode4(5756), // Rule ID 1361 //
1977 /* 5656 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1978 /* 5660 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1979 /* 5664 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1980 /* 5668 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1981 /* 5672 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1982 /* 5676 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1983 /* 5680 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
1984 /* 5684 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
1985 /* 5688 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1986 /* 5693 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1987 /* 5697 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1988 /* 5703 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1989 /* 5705 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1990 /* 5710 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1991 /* 5714 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1992 /* 5718 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4s32,
1993 /* 5722 */ // MIs[4] c
1994 /* 5722 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1995 /* 5727 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1996 /* 5732 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1997 /* 5734 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
1998 /* 5734 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1999 /* 5737 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2000 /* 5739 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2001 /* 5743 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
2002 /* 5747 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2003 /* 5751 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2004 /* 5754 */ GIR_RootConstrainSelectedInstOperands,
2005 /* 5755 */ // GIR_Coverage, 1361,
2006 /* 5755 */ GIR_EraseRootFromParent_Done,
2007 /* 5756 */ // Label 206: @5756
2008 /* 5756 */ GIM_Try, /*On fail goto*//*Label 207*/ GIMT_Encode4(5861), // Rule ID 1364 //
2009 /* 5761 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2010 /* 5765 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2011 /* 5769 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
2012 /* 5773 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
2013 /* 5777 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2014 /* 5782 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2015 /* 5786 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2016 /* 5790 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
2017 /* 5794 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
2018 /* 5798 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2019 /* 5803 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2020 /* 5807 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2021 /* 5813 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2022 /* 5815 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2023 /* 5819 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2024 /* 5823 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4s32,
2025 /* 5827 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2026 /* 5832 */ // MIs[4] c
2027 /* 5832 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2028 /* 5837 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2029 /* 5839 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2030 /* 5839 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2031 /* 5842 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2032 /* 5844 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2033 /* 5848 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2034 /* 5852 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2035 /* 5856 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2036 /* 5859 */ GIR_RootConstrainSelectedInstOperands,
2037 /* 5860 */ // GIR_Coverage, 1364,
2038 /* 5860 */ GIR_EraseRootFromParent_Done,
2039 /* 5861 */ // Label 207: @5861
2040 /* 5861 */ GIM_Try, /*On fail goto*//*Label 208*/ GIMT_Encode4(5966), // Rule ID 1363 //
2041 /* 5866 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2042 /* 5870 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2043 /* 5874 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
2044 /* 5878 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
2045 /* 5882 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2046 /* 5887 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2047 /* 5891 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2048 /* 5895 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
2049 /* 5899 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
2050 /* 5903 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2051 /* 5908 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2052 /* 5912 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2053 /* 5918 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2054 /* 5920 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2055 /* 5924 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2056 /* 5928 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4s32,
2057 /* 5932 */ // MIs[4] c
2058 /* 5932 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2059 /* 5937 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2060 /* 5942 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2061 /* 5944 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2062 /* 5944 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2063 /* 5947 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2064 /* 5949 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2065 /* 5953 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2066 /* 5957 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2067 /* 5961 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2068 /* 5964 */ GIR_RootConstrainSelectedInstOperands,
2069 /* 5965 */ // GIR_Coverage, 1363,
2070 /* 5965 */ GIR_EraseRootFromParent_Done,
2071 /* 5966 */ // Label 208: @5966
2072 /* 5966 */ GIM_Try, /*On fail goto*//*Label 209*/ GIMT_Encode4(6071), // Rule ID 1076 //
2073 /* 5971 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2074 /* 5975 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2075 /* 5979 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
2076 /* 5983 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
2077 /* 5987 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2078 /* 5992 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2079 /* 5997 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2080 /* 6001 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2081 /* 6005 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
2082 /* 6009 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
2083 /* 6013 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2084 /* 6017 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2085 /* 6021 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4s32,
2086 /* 6025 */ // MIs[3] c
2087 /* 6025 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2088 /* 6030 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2089 /* 6034 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2090 /* 6040 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2091 /* 6042 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2092 /* 6047 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2093 /* 6049 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1), (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2094 /* 6049 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2095 /* 6052 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2096 /* 6054 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2097 /* 6058 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2098 /* 6062 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2099 /* 6066 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2100 /* 6069 */ GIR_RootConstrainSelectedInstOperands,
2101 /* 6070 */ // GIR_Coverage, 1076,
2102 /* 6070 */ GIR_EraseRootFromParent_Done,
2103 /* 6071 */ // Label 209: @6071
2104 /* 6071 */ GIM_Try, /*On fail goto*//*Label 210*/ GIMT_Encode4(6176), // Rule ID 1359 //
2105 /* 6076 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2106 /* 6080 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2107 /* 6084 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
2108 /* 6088 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
2109 /* 6092 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2110 /* 6097 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2111 /* 6102 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2112 /* 6106 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2113 /* 6110 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
2114 /* 6114 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
2115 /* 6118 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2116 /* 6122 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2117 /* 6126 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4s32,
2118 /* 6130 */ // MIs[3] c
2119 /* 6130 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2120 /* 6135 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2121 /* 6139 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2122 /* 6145 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2123 /* 6147 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2124 /* 6152 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2125 /* 6154 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c), (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2126 /* 6154 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2127 /* 6157 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2128 /* 6159 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2129 /* 6163 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2130 /* 6167 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2131 /* 6171 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2132 /* 6174 */ GIR_RootConstrainSelectedInstOperands,
2133 /* 6175 */ // GIR_Coverage, 1359,
2134 /* 6175 */ GIR_EraseRootFromParent_Done,
2135 /* 6176 */ // Label 210: @6176
2136 /* 6176 */ GIM_Try, /*On fail goto*//*Label 211*/ GIMT_Encode4(6281), // Rule ID 1358 //
2137 /* 6181 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2138 /* 6185 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2139 /* 6189 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
2140 /* 6193 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
2141 /* 6197 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2142 /* 6202 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2143 /* 6207 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2144 /* 6211 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2145 /* 6215 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
2146 /* 6219 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
2147 /* 6223 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2148 /* 6228 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2149 /* 6232 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2150 /* 6236 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4s32,
2151 /* 6240 */ // MIs[3] c
2152 /* 6240 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2153 /* 6245 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2154 /* 6249 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2155 /* 6255 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2156 /* 6257 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2157 /* 6259 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2158 /* 6259 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2159 /* 6262 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2160 /* 6264 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2161 /* 6268 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2162 /* 6272 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2163 /* 6276 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2164 /* 6279 */ GIR_RootConstrainSelectedInstOperands,
2165 /* 6280 */ // GIR_Coverage, 1358,
2166 /* 6280 */ GIR_EraseRootFromParent_Done,
2167 /* 6281 */ // Label 211: @6281
2168 /* 6281 */ GIM_Try, /*On fail goto*//*Label 212*/ GIMT_Encode4(6386), // Rule ID 1360 //
2169 /* 6286 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2170 /* 6290 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2171 /* 6294 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
2172 /* 6298 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
2173 /* 6302 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2174 /* 6307 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2175 /* 6312 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2176 /* 6316 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2177 /* 6320 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
2178 /* 6324 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
2179 /* 6328 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2180 /* 6333 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2181 /* 6337 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2182 /* 6341 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4s32,
2183 /* 6345 */ // MIs[3] c
2184 /* 6345 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2185 /* 6350 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2186 /* 6354 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2187 /* 6360 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2188 /* 6362 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2189 /* 6364 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2190 /* 6364 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2191 /* 6367 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2192 /* 6369 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2193 /* 6373 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2194 /* 6377 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2195 /* 6381 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2196 /* 6384 */ GIR_RootConstrainSelectedInstOperands,
2197 /* 6385 */ // GIR_Coverage, 1360,
2198 /* 6385 */ GIR_EraseRootFromParent_Done,
2199 /* 6386 */ // Label 212: @6386
2200 /* 6386 */ GIM_Try, /*On fail goto*//*Label 213*/ GIMT_Encode4(6412), // Rule ID 1058 //
2201 /* 6391 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2202 /* 6395 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2203 /* 6399 */ // (or:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (OR:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
2204 /* 6399 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
2205 /* 6404 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2206 /* 6410 */ GIR_RootConstrainSelectedInstOperands,
2207 /* 6411 */ // GIR_Coverage, 1058,
2208 /* 6411 */ GIR_Done,
2209 /* 6412 */ // Label 213: @6412
2210 /* 6412 */ GIM_Reject,
2211 /* 6413 */ // Label 204: @6413
2212 /* 6413 */ GIM_Reject,
2213 /* 6414 */ // Label 180: @6414
2214 /* 6414 */ GIM_Try, /*On fail goto*//*Label 214*/ GIMT_Encode4(7296),
2215 /* 6419 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
2216 /* 6422 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
2217 /* 6425 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2218 /* 6429 */ GIM_Try, /*On fail goto*//*Label 215*/ GIMT_Encode4(6534), // Rule ID 1369 //
2219 /* 6434 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2220 /* 6438 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2221 /* 6442 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2222 /* 6446 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2223 /* 6450 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2224 /* 6454 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2225 /* 6458 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2226 /* 6462 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2227 /* 6466 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2228 /* 6471 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2229 /* 6475 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2230 /* 6481 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2231 /* 6483 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2232 /* 6488 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2233 /* 6492 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2234 /* 6496 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2s64,
2235 /* 6500 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2236 /* 6505 */ // MIs[4] c
2237 /* 6505 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2238 /* 6510 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2239 /* 6512 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2240 /* 6512 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2241 /* 6515 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2242 /* 6517 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2243 /* 6521 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
2244 /* 6525 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2245 /* 6529 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2246 /* 6532 */ GIR_RootConstrainSelectedInstOperands,
2247 /* 6533 */ // GIR_Coverage, 1369,
2248 /* 6533 */ GIR_EraseRootFromParent_Done,
2249 /* 6534 */ // Label 215: @6534
2250 /* 6534 */ GIM_Try, /*On fail goto*//*Label 216*/ GIMT_Encode4(6639), // Rule ID 1368 //
2251 /* 6539 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2252 /* 6543 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2253 /* 6547 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2254 /* 6551 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2255 /* 6555 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2256 /* 6559 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2257 /* 6563 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2258 /* 6567 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2259 /* 6571 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2260 /* 6576 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2261 /* 6580 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2262 /* 6586 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2263 /* 6588 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2264 /* 6593 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2265 /* 6597 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2266 /* 6601 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2s64,
2267 /* 6605 */ // MIs[4] c
2268 /* 6605 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2269 /* 6610 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2270 /* 6615 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2271 /* 6617 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2272 /* 6617 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2273 /* 6620 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2274 /* 6622 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2275 /* 6626 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
2276 /* 6630 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2277 /* 6634 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2278 /* 6637 */ GIR_RootConstrainSelectedInstOperands,
2279 /* 6638 */ // GIR_Coverage, 1368,
2280 /* 6638 */ GIR_EraseRootFromParent_Done,
2281 /* 6639 */ // Label 216: @6639
2282 /* 6639 */ GIM_Try, /*On fail goto*//*Label 217*/ GIMT_Encode4(6744), // Rule ID 1371 //
2283 /* 6644 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2284 /* 6648 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2285 /* 6652 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2286 /* 6656 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2287 /* 6660 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2288 /* 6665 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2289 /* 6669 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2290 /* 6673 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2291 /* 6677 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2292 /* 6681 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2293 /* 6686 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2294 /* 6690 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2295 /* 6696 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2296 /* 6698 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2297 /* 6702 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2298 /* 6706 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2s64,
2299 /* 6710 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2300 /* 6715 */ // MIs[4] c
2301 /* 6715 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2302 /* 6720 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2303 /* 6722 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2304 /* 6722 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2305 /* 6725 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2306 /* 6727 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2307 /* 6731 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2308 /* 6735 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2309 /* 6739 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2310 /* 6742 */ GIR_RootConstrainSelectedInstOperands,
2311 /* 6743 */ // GIR_Coverage, 1371,
2312 /* 6743 */ GIR_EraseRootFromParent_Done,
2313 /* 6744 */ // Label 217: @6744
2314 /* 6744 */ GIM_Try, /*On fail goto*//*Label 218*/ GIMT_Encode4(6849), // Rule ID 1370 //
2315 /* 6749 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2316 /* 6753 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2317 /* 6757 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2318 /* 6761 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2319 /* 6765 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2320 /* 6770 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2321 /* 6774 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2322 /* 6778 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2323 /* 6782 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2324 /* 6786 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2325 /* 6791 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2326 /* 6795 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2327 /* 6801 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2328 /* 6803 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2329 /* 6807 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2330 /* 6811 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2s64,
2331 /* 6815 */ // MIs[4] c
2332 /* 6815 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2333 /* 6820 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2334 /* 6825 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2335 /* 6827 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2336 /* 6827 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2337 /* 6830 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2338 /* 6832 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2339 /* 6836 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2340 /* 6840 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2341 /* 6844 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2342 /* 6847 */ GIR_RootConstrainSelectedInstOperands,
2343 /* 6848 */ // GIR_Coverage, 1370,
2344 /* 6848 */ GIR_EraseRootFromParent_Done,
2345 /* 6849 */ // Label 218: @6849
2346 /* 6849 */ GIM_Try, /*On fail goto*//*Label 219*/ GIMT_Encode4(6954), // Rule ID 1077 //
2347 /* 6854 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2348 /* 6858 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2349 /* 6862 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2350 /* 6866 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2351 /* 6870 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2352 /* 6875 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2353 /* 6880 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2354 /* 6884 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2355 /* 6888 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2356 /* 6892 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2357 /* 6896 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2358 /* 6900 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2359 /* 6904 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2s64,
2360 /* 6908 */ // MIs[3] c
2361 /* 6908 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2362 /* 6913 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2363 /* 6917 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2364 /* 6923 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2365 /* 6925 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2366 /* 6930 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2367 /* 6932 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1), (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2368 /* 6932 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2369 /* 6935 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2370 /* 6937 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2371 /* 6941 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2372 /* 6945 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2373 /* 6949 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2374 /* 6952 */ GIR_RootConstrainSelectedInstOperands,
2375 /* 6953 */ // GIR_Coverage, 1077,
2376 /* 6953 */ GIR_EraseRootFromParent_Done,
2377 /* 6954 */ // Label 219: @6954
2378 /* 6954 */ GIM_Try, /*On fail goto*//*Label 220*/ GIMT_Encode4(7059), // Rule ID 1366 //
2379 /* 6959 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2380 /* 6963 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2381 /* 6967 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2382 /* 6971 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2383 /* 6975 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2384 /* 6980 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2385 /* 6985 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2386 /* 6989 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2387 /* 6993 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2388 /* 6997 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2389 /* 7001 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2390 /* 7005 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2391 /* 7009 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2s64,
2392 /* 7013 */ // MIs[3] c
2393 /* 7013 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2394 /* 7018 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2395 /* 7022 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2396 /* 7028 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2397 /* 7030 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2398 /* 7035 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2399 /* 7037 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c), (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2400 /* 7037 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2401 /* 7040 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2402 /* 7042 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2403 /* 7046 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2404 /* 7050 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2405 /* 7054 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2406 /* 7057 */ GIR_RootConstrainSelectedInstOperands,
2407 /* 7058 */ // GIR_Coverage, 1366,
2408 /* 7058 */ GIR_EraseRootFromParent_Done,
2409 /* 7059 */ // Label 220: @7059
2410 /* 7059 */ GIM_Try, /*On fail goto*//*Label 221*/ GIMT_Encode4(7164), // Rule ID 1365 //
2411 /* 7064 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2412 /* 7068 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2413 /* 7072 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2414 /* 7076 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2415 /* 7080 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2416 /* 7085 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2417 /* 7090 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2418 /* 7094 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2419 /* 7098 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2420 /* 7102 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2421 /* 7106 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2422 /* 7111 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2423 /* 7115 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2424 /* 7119 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2s64,
2425 /* 7123 */ // MIs[3] c
2426 /* 7123 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2427 /* 7128 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2428 /* 7132 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2429 /* 7138 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2430 /* 7140 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2431 /* 7142 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2432 /* 7142 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2433 /* 7145 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2434 /* 7147 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2435 /* 7151 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2436 /* 7155 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2437 /* 7159 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2438 /* 7162 */ GIR_RootConstrainSelectedInstOperands,
2439 /* 7163 */ // GIR_Coverage, 1365,
2440 /* 7163 */ GIR_EraseRootFromParent_Done,
2441 /* 7164 */ // Label 221: @7164
2442 /* 7164 */ GIM_Try, /*On fail goto*//*Label 222*/ GIMT_Encode4(7269), // Rule ID 1367 //
2443 /* 7169 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2444 /* 7173 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2445 /* 7177 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
2446 /* 7181 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
2447 /* 7185 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2448 /* 7190 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2449 /* 7195 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2450 /* 7199 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2451 /* 7203 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
2452 /* 7207 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
2453 /* 7211 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2454 /* 7216 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2455 /* 7220 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2456 /* 7224 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2s64,
2457 /* 7228 */ // MIs[3] c
2458 /* 7228 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2459 /* 7233 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2460 /* 7237 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2461 /* 7243 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2462 /* 7245 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2463 /* 7247 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2464 /* 7247 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2465 /* 7250 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2466 /* 7252 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2467 /* 7256 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2468 /* 7260 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2469 /* 7264 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2470 /* 7267 */ GIR_RootConstrainSelectedInstOperands,
2471 /* 7268 */ // GIR_Coverage, 1367,
2472 /* 7268 */ GIR_EraseRootFromParent_Done,
2473 /* 7269 */ // Label 222: @7269
2474 /* 7269 */ GIM_Try, /*On fail goto*//*Label 223*/ GIMT_Encode4(7295), // Rule ID 1059 //
2475 /* 7274 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2476 /* 7278 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2477 /* 7282 */ // (or:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (OR:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
2478 /* 7282 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
2479 /* 7287 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2480 /* 7293 */ GIR_RootConstrainSelectedInstOperands,
2481 /* 7294 */ // GIR_Coverage, 1059,
2482 /* 7294 */ GIR_Done,
2483 /* 7295 */ // Label 223: @7295
2484 /* 7295 */ GIM_Reject,
2485 /* 7296 */ // Label 214: @7296
2486 /* 7296 */ GIM_Reject,
2487 /* 7297 */ // Label 181: @7297
2488 /* 7297 */ GIM_Reject,
2489 /* 7298 */ // Label 9: @7298
2490 /* 7298 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 230*/ GIMT_Encode4(13955),
2491 /* 7309 */ /*GILLT_s32*//*Label 224*/ GIMT_Encode4(7333),
2492 /* 7313 */ /*GILLT_s64*//*Label 225*/ GIMT_Encode4(7370),
2493 /* 7317 */ /*GILLT_v16s8*//*Label 226*/ GIMT_Encode4(7407),
2494 /* 7321 */ /*GILLT_v8s16*//*Label 227*/ GIMT_Encode4(9044),
2495 /* 7325 */ /*GILLT_v4s32*//*Label 228*/ GIMT_Encode4(10681),
2496 /* 7329 */ /*GILLT_v2s64*//*Label 229*/ GIMT_Encode4(12318),
2497 /* 7333 */ // Label 224: @7333
2498 /* 7333 */ GIM_Try, /*On fail goto*//*Label 231*/ GIMT_Encode4(7369), // Rule ID 82 //
2499 /* 7338 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
2500 /* 7341 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
2501 /* 7344 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
2502 /* 7348 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
2503 /* 7352 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
2504 /* 7356 */ // (xor:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (XOR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
2505 /* 7356 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR_I32),
2506 /* 7361 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2507 /* 7367 */ GIR_RootConstrainSelectedInstOperands,
2508 /* 7368 */ // GIR_Coverage, 82,
2509 /* 7368 */ GIR_Done,
2510 /* 7369 */ // Label 231: @7369
2511 /* 7369 */ GIM_Reject,
2512 /* 7370 */ // Label 225: @7370
2513 /* 7370 */ GIM_Try, /*On fail goto*//*Label 232*/ GIMT_Encode4(7406), // Rule ID 83 //
2514 /* 7375 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
2515 /* 7378 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
2516 /* 7381 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
2517 /* 7385 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
2518 /* 7389 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
2519 /* 7393 */ // (xor:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (XOR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
2520 /* 7393 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR_I64),
2521 /* 7398 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2522 /* 7404 */ GIR_RootConstrainSelectedInstOperands,
2523 /* 7405 */ // GIR_Coverage, 83,
2524 /* 7405 */ GIR_Done,
2525 /* 7406 */ // Label 232: @7406
2526 /* 7406 */ GIM_Reject,
2527 /* 7407 */ // Label 226: @7407
2528 /* 7407 */ GIM_Try, /*On fail goto*//*Label 233*/ GIMT_Encode4(9043),
2529 /* 7412 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
2530 /* 7415 */ GIM_Try, /*On fail goto*//*Label 234*/ GIMT_Encode4(7528), // Rule ID 1401 //
2531 /* 7420 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2532 /* 7424 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2533 /* 7428 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2534 /* 7432 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2535 /* 7436 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2536 /* 7440 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2537 /* 7444 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2538 /* 7448 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2539 /* 7452 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2540 /* 7456 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2541 /* 7461 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2542 /* 7465 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2543 /* 7471 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2544 /* 7473 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2545 /* 7477 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2546 /* 7481 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16s8,
2547 /* 7485 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16s8,
2548 /* 7489 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2549 /* 7494 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2550 /* 7499 */ // MIs[0] v2
2551 /* 7499 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
2552 /* 7504 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2553 /* 7506 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2554 /* 7506 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2555 /* 7509 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2556 /* 7511 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
2557 /* 7515 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2558 /* 7519 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2559 /* 7523 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2560 /* 7526 */ GIR_RootConstrainSelectedInstOperands,
2561 /* 7527 */ // GIR_Coverage, 1401,
2562 /* 7527 */ GIR_EraseRootFromParent_Done,
2563 /* 7528 */ // Label 234: @7528
2564 /* 7528 */ GIM_Try, /*On fail goto*//*Label 235*/ GIMT_Encode4(7641), // Rule ID 1402 //
2565 /* 7533 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2566 /* 7537 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2567 /* 7541 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2568 /* 7545 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2569 /* 7549 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2570 /* 7553 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2571 /* 7557 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2572 /* 7561 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2573 /* 7565 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2574 /* 7569 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2575 /* 7574 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2576 /* 7578 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2577 /* 7584 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2578 /* 7586 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2579 /* 7590 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2580 /* 7594 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16s8,
2581 /* 7598 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16s8,
2582 /* 7602 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2583 /* 7607 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2584 /* 7612 */ // MIs[0] v2
2585 /* 7612 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
2586 /* 7617 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2587 /* 7619 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2588 /* 7619 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2589 /* 7622 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2590 /* 7624 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
2591 /* 7628 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2592 /* 7632 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2593 /* 7636 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2594 /* 7639 */ GIR_RootConstrainSelectedInstOperands,
2595 /* 7640 */ // GIR_Coverage, 1402,
2596 /* 7640 */ GIR_EraseRootFromParent_Done,
2597 /* 7641 */ // Label 235: @7641
2598 /* 7641 */ GIM_Try, /*On fail goto*//*Label 236*/ GIMT_Encode4(7754), // Rule ID 1082 //
2599 /* 7646 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2600 /* 7650 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2601 /* 7654 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2602 /* 7658 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2603 /* 7662 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2604 /* 7666 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2605 /* 7670 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2606 /* 7674 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2607 /* 7678 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2608 /* 7682 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2609 /* 7687 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2610 /* 7692 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2611 /* 7696 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2612 /* 7700 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16s8,
2613 /* 7704 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16s8,
2614 /* 7708 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2615 /* 7713 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2616 /* 7717 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2617 /* 7723 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2618 /* 7725 */ // MIs[0] v2
2619 /* 7725 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
2620 /* 7730 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2621 /* 7732 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2622 /* 7732 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2623 /* 7735 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2624 /* 7737 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2625 /* 7741 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2626 /* 7745 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2627 /* 7749 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2628 /* 7752 */ GIR_RootConstrainSelectedInstOperands,
2629 /* 7753 */ // GIR_Coverage, 1082,
2630 /* 7753 */ GIR_EraseRootFromParent_Done,
2631 /* 7754 */ // Label 236: @7754
2632 /* 7754 */ GIM_Try, /*On fail goto*//*Label 237*/ GIMT_Encode4(7867), // Rule ID 1400 //
2633 /* 7759 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2634 /* 7763 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2635 /* 7767 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2636 /* 7771 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2637 /* 7775 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2638 /* 7779 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2639 /* 7783 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2640 /* 7787 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2641 /* 7791 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2642 /* 7795 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2643 /* 7800 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2644 /* 7805 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2645 /* 7809 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2646 /* 7813 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16s8,
2647 /* 7817 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16s8,
2648 /* 7821 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2649 /* 7826 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2650 /* 7830 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2651 /* 7836 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2652 /* 7838 */ // MIs[0] v2
2653 /* 7838 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2654 /* 7843 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2655 /* 7845 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2656 /* 7845 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2657 /* 7848 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2658 /* 7850 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2659 /* 7854 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2660 /* 7858 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2661 /* 7862 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2662 /* 7865 */ GIR_RootConstrainSelectedInstOperands,
2663 /* 7866 */ // GIR_Coverage, 1400,
2664 /* 7866 */ GIR_EraseRootFromParent_Done,
2665 /* 7867 */ // Label 237: @7867
2666 /* 7867 */ GIM_Try, /*On fail goto*//*Label 238*/ GIMT_Encode4(7976), // Rule ID 1405 //
2667 /* 7872 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
2668 /* 7875 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2669 /* 7879 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2670 /* 7883 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2671 /* 7887 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2672 /* 7891 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2673 /* 7895 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2674 /* 7899 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2675 /* 7903 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2676 /* 7907 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2677 /* 7911 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2678 /* 7915 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2679 /* 7920 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2680 /* 7924 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2681 /* 7930 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2682 /* 7932 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2683 /* 7936 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2684 /* 7940 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16s8,
2685 /* 7944 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2686 /* 7949 */ // MIs[4] v2
2687 /* 7949 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
2688 /* 7954 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2689 /* 7956 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2690 /* 7956 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2691 /* 7959 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2692 /* 7961 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2693 /* 7963 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2694 /* 7967 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2695 /* 7971 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2696 /* 7974 */ GIR_RootConstrainSelectedInstOperands,
2697 /* 7975 */ // GIR_Coverage, 1405,
2698 /* 7975 */ GIR_EraseRootFromParent_Done,
2699 /* 7976 */ // Label 238: @7976
2700 /* 7976 */ GIM_Try, /*On fail goto*//*Label 239*/ GIMT_Encode4(8085), // Rule ID 1406 //
2701 /* 7981 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
2702 /* 7984 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2703 /* 7988 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2704 /* 7992 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2705 /* 7996 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2706 /* 8000 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2707 /* 8004 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2708 /* 8008 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2709 /* 8012 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2710 /* 8016 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2711 /* 8020 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2712 /* 8024 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2713 /* 8029 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2714 /* 8033 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2715 /* 8039 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2716 /* 8041 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2717 /* 8045 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2718 /* 8049 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16s8,
2719 /* 8053 */ // MIs[4] v2
2720 /* 8053 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
2721 /* 8058 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2722 /* 8063 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2723 /* 8065 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2724 /* 8065 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2725 /* 8068 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2726 /* 8070 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2727 /* 8072 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2728 /* 8076 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2729 /* 8080 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2730 /* 8083 */ GIR_RootConstrainSelectedInstOperands,
2731 /* 8084 */ // GIR_Coverage, 1406,
2732 /* 8084 */ GIR_EraseRootFromParent_Done,
2733 /* 8085 */ // Label 239: @8085
2734 /* 8085 */ GIM_Try, /*On fail goto*//*Label 240*/ GIMT_Encode4(8194), // Rule ID 1403 //
2735 /* 8090 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
2736 /* 8093 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2737 /* 8097 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2738 /* 8101 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2739 /* 8105 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2740 /* 8109 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2741 /* 8113 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2742 /* 8117 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2743 /* 8121 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2744 /* 8125 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2745 /* 8129 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2746 /* 8134 */ // MIs[2] v2
2747 /* 8134 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
2748 /* 8139 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2749 /* 8143 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2750 /* 8147 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16s8,
2751 /* 8151 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16s8,
2752 /* 8155 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2753 /* 8160 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2754 /* 8164 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2755 /* 8170 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2756 /* 8172 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2757 /* 8174 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2758 /* 8174 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2759 /* 8177 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2760 /* 8179 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2761 /* 8181 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2762 /* 8185 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2763 /* 8189 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2764 /* 8192 */ GIR_RootConstrainSelectedInstOperands,
2765 /* 8193 */ // GIR_Coverage, 1403,
2766 /* 8193 */ GIR_EraseRootFromParent_Done,
2767 /* 8194 */ // Label 240: @8194
2768 /* 8194 */ GIM_Try, /*On fail goto*//*Label 241*/ GIMT_Encode4(8303), // Rule ID 1404 //
2769 /* 8199 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
2770 /* 8202 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2771 /* 8206 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2772 /* 8210 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2773 /* 8214 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2774 /* 8218 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2775 /* 8222 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2776 /* 8226 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2777 /* 8230 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2778 /* 8234 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2779 /* 8238 */ // MIs[2] v2
2780 /* 8238 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
2781 /* 8243 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2782 /* 8248 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2783 /* 8252 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2784 /* 8256 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16s8,
2785 /* 8260 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16s8,
2786 /* 8264 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2787 /* 8269 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2788 /* 8273 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2789 /* 8279 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2790 /* 8281 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2791 /* 8283 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2792 /* 8283 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2793 /* 8286 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2794 /* 8288 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2795 /* 8290 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2796 /* 8294 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2797 /* 8298 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2798 /* 8301 */ GIR_RootConstrainSelectedInstOperands,
2799 /* 8302 */ // GIR_Coverage, 1404,
2800 /* 8302 */ GIR_EraseRootFromParent_Done,
2801 /* 8303 */ // Label 241: @8303
2802 /* 8303 */ GIM_Try, /*On fail goto*//*Label 242*/ GIMT_Encode4(8388), // Rule ID 1078 //
2803 /* 8308 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2804 /* 8312 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2805 /* 8316 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2806 /* 8320 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2807 /* 8324 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2808 /* 8328 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2809 /* 8332 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2810 /* 8336 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2811 /* 8340 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2812 /* 8344 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2813 /* 8349 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2814 /* 8354 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2815 /* 8359 */ // MIs[0] v2
2816 /* 8359 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
2817 /* 8364 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2818 /* 8366 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), V128:{ *:[v16i8] }:$c), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2819 /* 8366 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2820 /* 8369 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2821 /* 8371 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2822 /* 8375 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2823 /* 8379 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2824 /* 8383 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2825 /* 8386 */ GIR_RootConstrainSelectedInstOperands,
2826 /* 8387 */ // GIR_Coverage, 1078,
2827 /* 8387 */ GIR_EraseRootFromParent_Done,
2828 /* 8388 */ // Label 242: @8388
2829 /* 8388 */ GIM_Try, /*On fail goto*//*Label 243*/ GIMT_Encode4(8473), // Rule ID 1372 //
2830 /* 8393 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2831 /* 8397 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2832 /* 8401 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2833 /* 8405 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2834 /* 8409 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2835 /* 8413 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2836 /* 8417 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2837 /* 8421 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2838 /* 8425 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2839 /* 8429 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2840 /* 8434 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2841 /* 8439 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2842 /* 8444 */ // MIs[0] v2
2843 /* 8444 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2844 /* 8449 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2845 /* 8451 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), V128:{ *:[v16i8] }:$c), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2846 /* 8451 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2847 /* 8454 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2848 /* 8456 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2849 /* 8460 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2850 /* 8464 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2851 /* 8468 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2852 /* 8471 */ GIR_RootConstrainSelectedInstOperands,
2853 /* 8472 */ // GIR_Coverage, 1372,
2854 /* 8472 */ GIR_EraseRootFromParent_Done,
2855 /* 8473 */ // Label 243: @8473
2856 /* 8473 */ GIM_Try, /*On fail goto*//*Label 244*/ GIMT_Encode4(8558), // Rule ID 1373 //
2857 /* 8478 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2858 /* 8482 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2859 /* 8486 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2860 /* 8490 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2861 /* 8494 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2862 /* 8498 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2863 /* 8503 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2864 /* 8507 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2865 /* 8511 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2866 /* 8515 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2867 /* 8519 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2868 /* 8524 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2869 /* 8529 */ // MIs[0] v2
2870 /* 8529 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
2871 /* 8534 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2872 /* 8536 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2873 /* 8536 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2874 /* 8539 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2875 /* 8541 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2876 /* 8545 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2877 /* 8549 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2878 /* 8553 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2879 /* 8556 */ GIR_RootConstrainSelectedInstOperands,
2880 /* 8557 */ // GIR_Coverage, 1373,
2881 /* 8557 */ GIR_EraseRootFromParent_Done,
2882 /* 8558 */ // Label 244: @8558
2883 /* 8558 */ GIM_Try, /*On fail goto*//*Label 245*/ GIMT_Encode4(8643), // Rule ID 1374 //
2884 /* 8563 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2885 /* 8567 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2886 /* 8571 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2887 /* 8575 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2888 /* 8579 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2889 /* 8583 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2890 /* 8588 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2891 /* 8592 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2892 /* 8596 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2893 /* 8600 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2894 /* 8604 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2895 /* 8609 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2896 /* 8614 */ // MIs[0] v2
2897 /* 8614 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2898 /* 8619 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2899 /* 8621 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2900 /* 8621 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2901 /* 8624 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2902 /* 8626 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2903 /* 8630 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2904 /* 8634 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2905 /* 8638 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2906 /* 8641 */ GIR_RootConstrainSelectedInstOperands,
2907 /* 8642 */ // GIR_Coverage, 1374,
2908 /* 8642 */ GIR_EraseRootFromParent_Done,
2909 /* 8643 */ // Label 245: @8643
2910 /* 8643 */ GIM_Try, /*On fail goto*//*Label 246*/ GIMT_Encode4(8724), // Rule ID 1375 //
2911 /* 8648 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
2912 /* 8651 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2913 /* 8655 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2914 /* 8659 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2915 /* 8663 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2916 /* 8667 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2917 /* 8671 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2918 /* 8675 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2919 /* 8679 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2920 /* 8683 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2921 /* 8687 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2922 /* 8692 */ // MIs[2] v2
2923 /* 8692 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
2924 /* 8697 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2925 /* 8702 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2926 /* 8704 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2927 /* 8704 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2928 /* 8707 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2929 /* 8709 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2930 /* 8713 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2931 /* 8715 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2932 /* 8719 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2933 /* 8722 */ GIR_RootConstrainSelectedInstOperands,
2934 /* 8723 */ // GIR_Coverage, 1375,
2935 /* 8723 */ GIR_EraseRootFromParent_Done,
2936 /* 8724 */ // Label 246: @8724
2937 /* 8724 */ GIM_Try, /*On fail goto*//*Label 247*/ GIMT_Encode4(8805), // Rule ID 1376 //
2938 /* 8729 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
2939 /* 8732 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2940 /* 8736 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2941 /* 8740 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2942 /* 8744 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2943 /* 8748 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2944 /* 8752 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2945 /* 8756 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2946 /* 8760 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2947 /* 8764 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
2948 /* 8768 */ // MIs[2] v2
2949 /* 8768 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
2950 /* 8773 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2951 /* 8778 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2952 /* 8783 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2953 /* 8785 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2954 /* 8785 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2955 /* 8788 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2956 /* 8790 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2957 /* 8794 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2958 /* 8796 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2959 /* 8800 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2960 /* 8803 */ GIR_RootConstrainSelectedInstOperands,
2961 /* 8804 */ // GIR_Coverage, 1376,
2962 /* 8804 */ GIR_EraseRootFromParent_Done,
2963 /* 8805 */ // Label 247: @8805
2964 /* 8805 */ GIM_Try, /*On fail goto*//*Label 248*/ GIMT_Encode4(8886), // Rule ID 1377 //
2965 /* 8810 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
2966 /* 8813 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2967 /* 8817 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2968 /* 8821 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2969 /* 8825 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2970 /* 8829 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2971 /* 8833 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2972 /* 8837 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2973 /* 8842 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2974 /* 8846 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2975 /* 8850 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16s8,
2976 /* 8854 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2977 /* 8859 */ // MIs[2] v2
2978 /* 8859 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
2979 /* 8864 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2980 /* 8866 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2981 /* 8866 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2982 /* 8869 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2983 /* 8871 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2984 /* 8875 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2985 /* 8877 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2986 /* 8881 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2987 /* 8884 */ GIR_RootConstrainSelectedInstOperands,
2988 /* 8885 */ // GIR_Coverage, 1377,
2989 /* 8885 */ GIR_EraseRootFromParent_Done,
2990 /* 8886 */ // Label 248: @8886
2991 /* 8886 */ GIM_Try, /*On fail goto*//*Label 249*/ GIMT_Encode4(8967), // Rule ID 1378 //
2992 /* 8891 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
2993 /* 8894 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2994 /* 8898 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2995 /* 8902 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2996 /* 8906 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2997 /* 8910 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
2998 /* 8914 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
2999 /* 8918 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3000 /* 8923 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3001 /* 8927 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3002 /* 8931 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16s8,
3003 /* 8935 */ // MIs[2] v2
3004 /* 8935 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3005 /* 8940 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3006 /* 8945 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3007 /* 8947 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
3008 /* 8947 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3009 /* 8950 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3010 /* 8952 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3011 /* 8956 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3012 /* 8958 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3013 /* 8962 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3014 /* 8965 */ GIR_RootConstrainSelectedInstOperands,
3015 /* 8966 */ // GIR_Coverage, 1378,
3016 /* 8966 */ GIR_EraseRootFromParent_Done,
3017 /* 8967 */ // Label 249: @8967
3018 /* 8967 */ GIM_Try, /*On fail goto*//*Label 250*/ GIMT_Encode4(9009), // Rule ID 1049 //
3019 /* 8972 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
3020 /* 8975 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3021 /* 8979 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3022 /* 8983 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3023 /* 8987 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3024 /* 8993 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
3025 /* 8995 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
3026 /* 8997 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v, immAllOnesV:{ *:[v16i8] }) => (NOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v)
3027 /* 8997 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
3028 /* 9000 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3029 /* 9002 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
3030 /* 9004 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3031 /* 9007 */ GIR_RootConstrainSelectedInstOperands,
3032 /* 9008 */ // GIR_Coverage, 1049,
3033 /* 9008 */ GIR_EraseRootFromParent_Done,
3034 /* 9009 */ // Label 250: @9009
3035 /* 9009 */ GIM_Try, /*On fail goto*//*Label 251*/ GIMT_Encode4(9042), // Rule ID 1060 //
3036 /* 9014 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
3037 /* 9017 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3038 /* 9021 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3039 /* 9025 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3040 /* 9029 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (XOR:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
3041 /* 9029 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
3042 /* 9034 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
3043 /* 9040 */ GIR_RootConstrainSelectedInstOperands,
3044 /* 9041 */ // GIR_Coverage, 1060,
3045 /* 9041 */ GIR_Done,
3046 /* 9042 */ // Label 251: @9042
3047 /* 9042 */ GIM_Reject,
3048 /* 9043 */ // Label 233: @9043
3049 /* 9043 */ GIM_Reject,
3050 /* 9044 */ // Label 227: @9044
3051 /* 9044 */ GIM_Try, /*On fail goto*//*Label 252*/ GIMT_Encode4(10680),
3052 /* 9049 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
3053 /* 9052 */ GIM_Try, /*On fail goto*//*Label 253*/ GIMT_Encode4(9165), // Rule ID 1408 //
3054 /* 9057 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3055 /* 9061 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3056 /* 9065 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3057 /* 9069 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3058 /* 9073 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3059 /* 9077 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3060 /* 9081 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3061 /* 9085 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3062 /* 9089 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3063 /* 9093 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3064 /* 9098 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3065 /* 9102 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3066 /* 9108 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3067 /* 9110 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3068 /* 9114 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3069 /* 9118 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8s16,
3070 /* 9122 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8s16,
3071 /* 9126 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3072 /* 9131 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3073 /* 9136 */ // MIs[0] v2
3074 /* 9136 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
3075 /* 9141 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3076 /* 9143 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3077 /* 9143 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3078 /* 9146 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3079 /* 9148 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
3080 /* 9152 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3081 /* 9156 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3082 /* 9160 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3083 /* 9163 */ GIR_RootConstrainSelectedInstOperands,
3084 /* 9164 */ // GIR_Coverage, 1408,
3085 /* 9164 */ GIR_EraseRootFromParent_Done,
3086 /* 9165 */ // Label 253: @9165
3087 /* 9165 */ GIM_Try, /*On fail goto*//*Label 254*/ GIMT_Encode4(9278), // Rule ID 1409 //
3088 /* 9170 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3089 /* 9174 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3090 /* 9178 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3091 /* 9182 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3092 /* 9186 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3093 /* 9190 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3094 /* 9194 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3095 /* 9198 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3096 /* 9202 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3097 /* 9206 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3098 /* 9211 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3099 /* 9215 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3100 /* 9221 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3101 /* 9223 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3102 /* 9227 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3103 /* 9231 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8s16,
3104 /* 9235 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8s16,
3105 /* 9239 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3106 /* 9244 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3107 /* 9249 */ // MIs[0] v2
3108 /* 9249 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
3109 /* 9254 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3110 /* 9256 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3111 /* 9256 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3112 /* 9259 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3113 /* 9261 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
3114 /* 9265 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3115 /* 9269 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3116 /* 9273 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3117 /* 9276 */ GIR_RootConstrainSelectedInstOperands,
3118 /* 9277 */ // GIR_Coverage, 1409,
3119 /* 9277 */ GIR_EraseRootFromParent_Done,
3120 /* 9278 */ // Label 254: @9278
3121 /* 9278 */ GIM_Try, /*On fail goto*//*Label 255*/ GIMT_Encode4(9391), // Rule ID 1083 //
3122 /* 9283 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3123 /* 9287 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3124 /* 9291 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3125 /* 9295 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3126 /* 9299 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3127 /* 9303 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3128 /* 9307 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3129 /* 9311 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3130 /* 9315 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3131 /* 9319 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3132 /* 9324 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3133 /* 9329 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3134 /* 9333 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3135 /* 9337 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
3136 /* 9341 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8s16,
3137 /* 9345 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3138 /* 9350 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3139 /* 9354 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3140 /* 9360 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3141 /* 9362 */ // MIs[0] v2
3142 /* 9362 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3143 /* 9367 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3144 /* 9369 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3145 /* 9369 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3146 /* 9372 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3147 /* 9374 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3148 /* 9378 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3149 /* 9382 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3150 /* 9386 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3151 /* 9389 */ GIR_RootConstrainSelectedInstOperands,
3152 /* 9390 */ // GIR_Coverage, 1083,
3153 /* 9390 */ GIR_EraseRootFromParent_Done,
3154 /* 9391 */ // Label 255: @9391
3155 /* 9391 */ GIM_Try, /*On fail goto*//*Label 256*/ GIMT_Encode4(9504), // Rule ID 1407 //
3156 /* 9396 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3157 /* 9400 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3158 /* 9404 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3159 /* 9408 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3160 /* 9412 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3161 /* 9416 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3162 /* 9420 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3163 /* 9424 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3164 /* 9428 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3165 /* 9432 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3166 /* 9437 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3167 /* 9442 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3168 /* 9446 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3169 /* 9450 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
3170 /* 9454 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8s16,
3171 /* 9458 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3172 /* 9463 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3173 /* 9467 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3174 /* 9473 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3175 /* 9475 */ // MIs[0] v2
3176 /* 9475 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3177 /* 9480 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3178 /* 9482 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3179 /* 9482 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3180 /* 9485 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3181 /* 9487 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3182 /* 9491 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3183 /* 9495 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3184 /* 9499 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3185 /* 9502 */ GIR_RootConstrainSelectedInstOperands,
3186 /* 9503 */ // GIR_Coverage, 1407,
3187 /* 9503 */ GIR_EraseRootFromParent_Done,
3188 /* 9504 */ // Label 256: @9504
3189 /* 9504 */ GIM_Try, /*On fail goto*//*Label 257*/ GIMT_Encode4(9613), // Rule ID 1412 //
3190 /* 9509 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
3191 /* 9512 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3192 /* 9516 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3193 /* 9520 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3194 /* 9524 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3195 /* 9528 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3196 /* 9532 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3197 /* 9536 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3198 /* 9540 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3199 /* 9544 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3200 /* 9548 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3201 /* 9552 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3202 /* 9557 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3203 /* 9561 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3204 /* 9567 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3205 /* 9569 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3206 /* 9573 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3207 /* 9577 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8s16,
3208 /* 9581 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3209 /* 9586 */ // MIs[4] v2
3210 /* 9586 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3211 /* 9591 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3212 /* 9593 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3213 /* 9593 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3214 /* 9596 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3215 /* 9598 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3216 /* 9600 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3217 /* 9604 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3218 /* 9608 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3219 /* 9611 */ GIR_RootConstrainSelectedInstOperands,
3220 /* 9612 */ // GIR_Coverage, 1412,
3221 /* 9612 */ GIR_EraseRootFromParent_Done,
3222 /* 9613 */ // Label 257: @9613
3223 /* 9613 */ GIM_Try, /*On fail goto*//*Label 258*/ GIMT_Encode4(9722), // Rule ID 1413 //
3224 /* 9618 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
3225 /* 9621 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3226 /* 9625 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3227 /* 9629 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3228 /* 9633 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3229 /* 9637 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3230 /* 9641 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3231 /* 9645 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3232 /* 9649 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3233 /* 9653 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3234 /* 9657 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3235 /* 9661 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3236 /* 9666 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3237 /* 9670 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3238 /* 9676 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3239 /* 9678 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3240 /* 9682 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3241 /* 9686 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8s16,
3242 /* 9690 */ // MIs[4] v2
3243 /* 9690 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3244 /* 9695 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3245 /* 9700 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3246 /* 9702 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3247 /* 9702 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3248 /* 9705 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3249 /* 9707 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3250 /* 9709 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3251 /* 9713 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3252 /* 9717 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3253 /* 9720 */ GIR_RootConstrainSelectedInstOperands,
3254 /* 9721 */ // GIR_Coverage, 1413,
3255 /* 9721 */ GIR_EraseRootFromParent_Done,
3256 /* 9722 */ // Label 258: @9722
3257 /* 9722 */ GIM_Try, /*On fail goto*//*Label 259*/ GIMT_Encode4(9831), // Rule ID 1410 //
3258 /* 9727 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
3259 /* 9730 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3260 /* 9734 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3261 /* 9738 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3262 /* 9742 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3263 /* 9746 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3264 /* 9750 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3265 /* 9754 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3266 /* 9758 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3267 /* 9762 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3268 /* 9766 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3269 /* 9771 */ // MIs[2] v2
3270 /* 9771 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3271 /* 9776 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3272 /* 9780 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3273 /* 9784 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
3274 /* 9788 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8s16,
3275 /* 9792 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3276 /* 9797 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3277 /* 9801 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3278 /* 9807 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3279 /* 9809 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3280 /* 9811 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3281 /* 9811 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3282 /* 9814 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3283 /* 9816 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3284 /* 9818 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3285 /* 9822 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3286 /* 9826 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3287 /* 9829 */ GIR_RootConstrainSelectedInstOperands,
3288 /* 9830 */ // GIR_Coverage, 1410,
3289 /* 9830 */ GIR_EraseRootFromParent_Done,
3290 /* 9831 */ // Label 259: @9831
3291 /* 9831 */ GIM_Try, /*On fail goto*//*Label 260*/ GIMT_Encode4(9940), // Rule ID 1411 //
3292 /* 9836 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
3293 /* 9839 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3294 /* 9843 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3295 /* 9847 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3296 /* 9851 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3297 /* 9855 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3298 /* 9859 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3299 /* 9863 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3300 /* 9867 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3301 /* 9871 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3302 /* 9875 */ // MIs[2] v2
3303 /* 9875 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3304 /* 9880 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3305 /* 9885 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3306 /* 9889 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3307 /* 9893 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
3308 /* 9897 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8s16,
3309 /* 9901 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3310 /* 9906 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3311 /* 9910 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3312 /* 9916 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3313 /* 9918 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3314 /* 9920 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3315 /* 9920 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3316 /* 9923 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3317 /* 9925 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3318 /* 9927 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3319 /* 9931 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3320 /* 9935 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3321 /* 9938 */ GIR_RootConstrainSelectedInstOperands,
3322 /* 9939 */ // GIR_Coverage, 1411,
3323 /* 9939 */ GIR_EraseRootFromParent_Done,
3324 /* 9940 */ // Label 260: @9940
3325 /* 9940 */ GIM_Try, /*On fail goto*//*Label 261*/ GIMT_Encode4(10025), // Rule ID 1079 //
3326 /* 9945 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3327 /* 9949 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3328 /* 9953 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3329 /* 9957 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3330 /* 9961 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3331 /* 9965 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3332 /* 9969 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3333 /* 9973 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3334 /* 9977 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3335 /* 9981 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3336 /* 9986 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3337 /* 9991 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3338 /* 9996 */ // MIs[0] v2
3339 /* 9996 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3340 /* 10001 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3341 /* 10003 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), V128:{ *:[v8i16] }:$c), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3342 /* 10003 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3343 /* 10006 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3344 /* 10008 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3345 /* 10012 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3346 /* 10016 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3347 /* 10020 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3348 /* 10023 */ GIR_RootConstrainSelectedInstOperands,
3349 /* 10024 */ // GIR_Coverage, 1079,
3350 /* 10024 */ GIR_EraseRootFromParent_Done,
3351 /* 10025 */ // Label 261: @10025
3352 /* 10025 */ GIM_Try, /*On fail goto*//*Label 262*/ GIMT_Encode4(10110), // Rule ID 1379 //
3353 /* 10030 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3354 /* 10034 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3355 /* 10038 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3356 /* 10042 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3357 /* 10046 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3358 /* 10050 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3359 /* 10054 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3360 /* 10058 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3361 /* 10062 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3362 /* 10066 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3363 /* 10071 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3364 /* 10076 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3365 /* 10081 */ // MIs[0] v2
3366 /* 10081 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3367 /* 10086 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3368 /* 10088 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), V128:{ *:[v8i16] }:$c), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3369 /* 10088 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3370 /* 10091 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3371 /* 10093 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3372 /* 10097 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3373 /* 10101 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3374 /* 10105 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3375 /* 10108 */ GIR_RootConstrainSelectedInstOperands,
3376 /* 10109 */ // GIR_Coverage, 1379,
3377 /* 10109 */ GIR_EraseRootFromParent_Done,
3378 /* 10110 */ // Label 262: @10110
3379 /* 10110 */ GIM_Try, /*On fail goto*//*Label 263*/ GIMT_Encode4(10195), // Rule ID 1380 //
3380 /* 10115 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3381 /* 10119 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3382 /* 10123 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3383 /* 10127 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3384 /* 10131 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3385 /* 10135 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3386 /* 10140 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3387 /* 10144 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3388 /* 10148 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3389 /* 10152 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3390 /* 10156 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3391 /* 10161 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3392 /* 10166 */ // MIs[0] v2
3393 /* 10166 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3394 /* 10171 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3395 /* 10173 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3396 /* 10173 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3397 /* 10176 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3398 /* 10178 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3399 /* 10182 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3400 /* 10186 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3401 /* 10190 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3402 /* 10193 */ GIR_RootConstrainSelectedInstOperands,
3403 /* 10194 */ // GIR_Coverage, 1380,
3404 /* 10194 */ GIR_EraseRootFromParent_Done,
3405 /* 10195 */ // Label 263: @10195
3406 /* 10195 */ GIM_Try, /*On fail goto*//*Label 264*/ GIMT_Encode4(10280), // Rule ID 1381 //
3407 /* 10200 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3408 /* 10204 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3409 /* 10208 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3410 /* 10212 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3411 /* 10216 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3412 /* 10220 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3413 /* 10225 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3414 /* 10229 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3415 /* 10233 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3416 /* 10237 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3417 /* 10241 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3418 /* 10246 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3419 /* 10251 */ // MIs[0] v2
3420 /* 10251 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3421 /* 10256 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3422 /* 10258 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3423 /* 10258 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3424 /* 10261 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3425 /* 10263 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3426 /* 10267 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3427 /* 10271 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3428 /* 10275 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3429 /* 10278 */ GIR_RootConstrainSelectedInstOperands,
3430 /* 10279 */ // GIR_Coverage, 1381,
3431 /* 10279 */ GIR_EraseRootFromParent_Done,
3432 /* 10280 */ // Label 264: @10280
3433 /* 10280 */ GIM_Try, /*On fail goto*//*Label 265*/ GIMT_Encode4(10361), // Rule ID 1382 //
3434 /* 10285 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
3435 /* 10288 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3436 /* 10292 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3437 /* 10296 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3438 /* 10300 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3439 /* 10304 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3440 /* 10308 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3441 /* 10312 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3442 /* 10316 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3443 /* 10320 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3444 /* 10324 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3445 /* 10329 */ // MIs[2] v2
3446 /* 10329 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3447 /* 10334 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3448 /* 10339 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3449 /* 10341 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3450 /* 10341 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3451 /* 10344 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3452 /* 10346 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3453 /* 10350 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3454 /* 10352 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3455 /* 10356 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3456 /* 10359 */ GIR_RootConstrainSelectedInstOperands,
3457 /* 10360 */ // GIR_Coverage, 1382,
3458 /* 10360 */ GIR_EraseRootFromParent_Done,
3459 /* 10361 */ // Label 265: @10361
3460 /* 10361 */ GIM_Try, /*On fail goto*//*Label 266*/ GIMT_Encode4(10442), // Rule ID 1383 //
3461 /* 10366 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
3462 /* 10369 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3463 /* 10373 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3464 /* 10377 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3465 /* 10381 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3466 /* 10385 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3467 /* 10389 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3468 /* 10393 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3469 /* 10397 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3470 /* 10401 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3471 /* 10405 */ // MIs[2] v2
3472 /* 10405 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3473 /* 10410 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3474 /* 10415 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3475 /* 10420 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3476 /* 10422 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3477 /* 10422 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3478 /* 10425 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3479 /* 10427 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3480 /* 10431 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3481 /* 10433 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3482 /* 10437 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3483 /* 10440 */ GIR_RootConstrainSelectedInstOperands,
3484 /* 10441 */ // GIR_Coverage, 1383,
3485 /* 10441 */ GIR_EraseRootFromParent_Done,
3486 /* 10442 */ // Label 266: @10442
3487 /* 10442 */ GIM_Try, /*On fail goto*//*Label 267*/ GIMT_Encode4(10523), // Rule ID 1384 //
3488 /* 10447 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
3489 /* 10450 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3490 /* 10454 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3491 /* 10458 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3492 /* 10462 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3493 /* 10466 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3494 /* 10470 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3495 /* 10474 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3496 /* 10479 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3497 /* 10483 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3498 /* 10487 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
3499 /* 10491 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3500 /* 10496 */ // MIs[2] v2
3501 /* 10496 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3502 /* 10501 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3503 /* 10503 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3504 /* 10503 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3505 /* 10506 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3506 /* 10508 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3507 /* 10512 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3508 /* 10514 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3509 /* 10518 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3510 /* 10521 */ GIR_RootConstrainSelectedInstOperands,
3511 /* 10522 */ // GIR_Coverage, 1384,
3512 /* 10522 */ GIR_EraseRootFromParent_Done,
3513 /* 10523 */ // Label 267: @10523
3514 /* 10523 */ GIM_Try, /*On fail goto*//*Label 268*/ GIMT_Encode4(10604), // Rule ID 1385 //
3515 /* 10528 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
3516 /* 10531 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3517 /* 10535 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3518 /* 10539 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3519 /* 10543 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3520 /* 10547 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
3521 /* 10551 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
3522 /* 10555 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3523 /* 10560 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3524 /* 10564 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3525 /* 10568 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s16,
3526 /* 10572 */ // MIs[2] v2
3527 /* 10572 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3528 /* 10577 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3529 /* 10582 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3530 /* 10584 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3531 /* 10584 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3532 /* 10587 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3533 /* 10589 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3534 /* 10593 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3535 /* 10595 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3536 /* 10599 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3537 /* 10602 */ GIR_RootConstrainSelectedInstOperands,
3538 /* 10603 */ // GIR_Coverage, 1385,
3539 /* 10603 */ GIR_EraseRootFromParent_Done,
3540 /* 10604 */ // Label 268: @10604
3541 /* 10604 */ GIM_Try, /*On fail goto*//*Label 269*/ GIMT_Encode4(10646), // Rule ID 1050 //
3542 /* 10609 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
3543 /* 10612 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3544 /* 10616 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3545 /* 10620 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3546 /* 10624 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3547 /* 10630 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
3548 /* 10632 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
3549 /* 10634 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v, immAllOnesV:{ *:[v8i16] }) => (NOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v)
3550 /* 10634 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
3551 /* 10637 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3552 /* 10639 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
3553 /* 10641 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3554 /* 10644 */ GIR_RootConstrainSelectedInstOperands,
3555 /* 10645 */ // GIR_Coverage, 1050,
3556 /* 10645 */ GIR_EraseRootFromParent_Done,
3557 /* 10646 */ // Label 269: @10646
3558 /* 10646 */ GIM_Try, /*On fail goto*//*Label 270*/ GIMT_Encode4(10679), // Rule ID 1061 //
3559 /* 10651 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
3560 /* 10654 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3561 /* 10658 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3562 /* 10662 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3563 /* 10666 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (XOR:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
3564 /* 10666 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
3565 /* 10671 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
3566 /* 10677 */ GIR_RootConstrainSelectedInstOperands,
3567 /* 10678 */ // GIR_Coverage, 1061,
3568 /* 10678 */ GIR_Done,
3569 /* 10679 */ // Label 270: @10679
3570 /* 10679 */ GIM_Reject,
3571 /* 10680 */ // Label 252: @10680
3572 /* 10680 */ GIM_Reject,
3573 /* 10681 */ // Label 228: @10681
3574 /* 10681 */ GIM_Try, /*On fail goto*//*Label 271*/ GIMT_Encode4(12317),
3575 /* 10686 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
3576 /* 10689 */ GIM_Try, /*On fail goto*//*Label 272*/ GIMT_Encode4(10802), // Rule ID 1415 //
3577 /* 10694 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3578 /* 10698 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3579 /* 10702 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3580 /* 10706 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3581 /* 10710 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3582 /* 10714 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3583 /* 10718 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3584 /* 10722 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3585 /* 10726 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3586 /* 10730 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3587 /* 10735 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3588 /* 10739 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3589 /* 10745 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3590 /* 10747 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3591 /* 10751 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3592 /* 10755 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4s32,
3593 /* 10759 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4s32,
3594 /* 10763 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3595 /* 10768 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3596 /* 10773 */ // MIs[0] v2
3597 /* 10773 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
3598 /* 10778 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3599 /* 10780 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3600 /* 10780 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3601 /* 10783 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3602 /* 10785 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
3603 /* 10789 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3604 /* 10793 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3605 /* 10797 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3606 /* 10800 */ GIR_RootConstrainSelectedInstOperands,
3607 /* 10801 */ // GIR_Coverage, 1415,
3608 /* 10801 */ GIR_EraseRootFromParent_Done,
3609 /* 10802 */ // Label 272: @10802
3610 /* 10802 */ GIM_Try, /*On fail goto*//*Label 273*/ GIMT_Encode4(10915), // Rule ID 1416 //
3611 /* 10807 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3612 /* 10811 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3613 /* 10815 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3614 /* 10819 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3615 /* 10823 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3616 /* 10827 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3617 /* 10831 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3618 /* 10835 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3619 /* 10839 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3620 /* 10843 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3621 /* 10848 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3622 /* 10852 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3623 /* 10858 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3624 /* 10860 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3625 /* 10864 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3626 /* 10868 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4s32,
3627 /* 10872 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4s32,
3628 /* 10876 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3629 /* 10881 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3630 /* 10886 */ // MIs[0] v2
3631 /* 10886 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
3632 /* 10891 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3633 /* 10893 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3634 /* 10893 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3635 /* 10896 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3636 /* 10898 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
3637 /* 10902 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3638 /* 10906 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3639 /* 10910 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3640 /* 10913 */ GIR_RootConstrainSelectedInstOperands,
3641 /* 10914 */ // GIR_Coverage, 1416,
3642 /* 10914 */ GIR_EraseRootFromParent_Done,
3643 /* 10915 */ // Label 273: @10915
3644 /* 10915 */ GIM_Try, /*On fail goto*//*Label 274*/ GIMT_Encode4(11028), // Rule ID 1084 //
3645 /* 10920 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3646 /* 10924 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3647 /* 10928 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3648 /* 10932 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3649 /* 10936 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3650 /* 10940 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3651 /* 10944 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3652 /* 10948 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3653 /* 10952 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3654 /* 10956 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3655 /* 10961 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3656 /* 10966 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3657 /* 10970 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3658 /* 10974 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
3659 /* 10978 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4s32,
3660 /* 10982 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3661 /* 10987 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3662 /* 10991 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3663 /* 10997 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3664 /* 10999 */ // MIs[0] v2
3665 /* 10999 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3666 /* 11004 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3667 /* 11006 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3668 /* 11006 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3669 /* 11009 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3670 /* 11011 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3671 /* 11015 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3672 /* 11019 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3673 /* 11023 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3674 /* 11026 */ GIR_RootConstrainSelectedInstOperands,
3675 /* 11027 */ // GIR_Coverage, 1084,
3676 /* 11027 */ GIR_EraseRootFromParent_Done,
3677 /* 11028 */ // Label 274: @11028
3678 /* 11028 */ GIM_Try, /*On fail goto*//*Label 275*/ GIMT_Encode4(11141), // Rule ID 1414 //
3679 /* 11033 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3680 /* 11037 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3681 /* 11041 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3682 /* 11045 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3683 /* 11049 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3684 /* 11053 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3685 /* 11057 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3686 /* 11061 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3687 /* 11065 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3688 /* 11069 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3689 /* 11074 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3690 /* 11079 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3691 /* 11083 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3692 /* 11087 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
3693 /* 11091 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4s32,
3694 /* 11095 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3695 /* 11100 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3696 /* 11104 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3697 /* 11110 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3698 /* 11112 */ // MIs[0] v2
3699 /* 11112 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3700 /* 11117 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3701 /* 11119 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3702 /* 11119 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3703 /* 11122 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3704 /* 11124 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3705 /* 11128 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3706 /* 11132 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3707 /* 11136 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3708 /* 11139 */ GIR_RootConstrainSelectedInstOperands,
3709 /* 11140 */ // GIR_Coverage, 1414,
3710 /* 11140 */ GIR_EraseRootFromParent_Done,
3711 /* 11141 */ // Label 275: @11141
3712 /* 11141 */ GIM_Try, /*On fail goto*//*Label 276*/ GIMT_Encode4(11250), // Rule ID 1419 //
3713 /* 11146 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
3714 /* 11149 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3715 /* 11153 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3716 /* 11157 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3717 /* 11161 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3718 /* 11165 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3719 /* 11169 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3720 /* 11173 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3721 /* 11177 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3722 /* 11181 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3723 /* 11185 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3724 /* 11189 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3725 /* 11194 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3726 /* 11198 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3727 /* 11204 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3728 /* 11206 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3729 /* 11210 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3730 /* 11214 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4s32,
3731 /* 11218 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3732 /* 11223 */ // MIs[4] v2
3733 /* 11223 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3734 /* 11228 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3735 /* 11230 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3736 /* 11230 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3737 /* 11233 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3738 /* 11235 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3739 /* 11237 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3740 /* 11241 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3741 /* 11245 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3742 /* 11248 */ GIR_RootConstrainSelectedInstOperands,
3743 /* 11249 */ // GIR_Coverage, 1419,
3744 /* 11249 */ GIR_EraseRootFromParent_Done,
3745 /* 11250 */ // Label 276: @11250
3746 /* 11250 */ GIM_Try, /*On fail goto*//*Label 277*/ GIMT_Encode4(11359), // Rule ID 1420 //
3747 /* 11255 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
3748 /* 11258 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3749 /* 11262 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3750 /* 11266 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3751 /* 11270 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3752 /* 11274 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3753 /* 11278 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3754 /* 11282 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3755 /* 11286 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3756 /* 11290 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3757 /* 11294 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3758 /* 11298 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3759 /* 11303 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3760 /* 11307 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3761 /* 11313 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3762 /* 11315 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3763 /* 11319 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3764 /* 11323 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4s32,
3765 /* 11327 */ // MIs[4] v2
3766 /* 11327 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3767 /* 11332 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3768 /* 11337 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3769 /* 11339 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3770 /* 11339 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3771 /* 11342 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3772 /* 11344 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3773 /* 11346 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3774 /* 11350 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3775 /* 11354 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3776 /* 11357 */ GIR_RootConstrainSelectedInstOperands,
3777 /* 11358 */ // GIR_Coverage, 1420,
3778 /* 11358 */ GIR_EraseRootFromParent_Done,
3779 /* 11359 */ // Label 277: @11359
3780 /* 11359 */ GIM_Try, /*On fail goto*//*Label 278*/ GIMT_Encode4(11468), // Rule ID 1417 //
3781 /* 11364 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
3782 /* 11367 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3783 /* 11371 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3784 /* 11375 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3785 /* 11379 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3786 /* 11383 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3787 /* 11387 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3788 /* 11391 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3789 /* 11395 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3790 /* 11399 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3791 /* 11403 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3792 /* 11408 */ // MIs[2] v2
3793 /* 11408 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3794 /* 11413 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3795 /* 11417 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3796 /* 11421 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
3797 /* 11425 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4s32,
3798 /* 11429 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3799 /* 11434 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3800 /* 11438 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3801 /* 11444 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3802 /* 11446 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3803 /* 11448 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3804 /* 11448 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3805 /* 11451 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3806 /* 11453 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3807 /* 11455 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3808 /* 11459 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3809 /* 11463 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3810 /* 11466 */ GIR_RootConstrainSelectedInstOperands,
3811 /* 11467 */ // GIR_Coverage, 1417,
3812 /* 11467 */ GIR_EraseRootFromParent_Done,
3813 /* 11468 */ // Label 278: @11468
3814 /* 11468 */ GIM_Try, /*On fail goto*//*Label 279*/ GIMT_Encode4(11577), // Rule ID 1418 //
3815 /* 11473 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
3816 /* 11476 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3817 /* 11480 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3818 /* 11484 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3819 /* 11488 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3820 /* 11492 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3821 /* 11496 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3822 /* 11500 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3823 /* 11504 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3824 /* 11508 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3825 /* 11512 */ // MIs[2] v2
3826 /* 11512 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3827 /* 11517 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3828 /* 11522 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3829 /* 11526 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3830 /* 11530 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
3831 /* 11534 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4s32,
3832 /* 11538 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3833 /* 11543 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3834 /* 11547 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3835 /* 11553 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3836 /* 11555 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3837 /* 11557 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3838 /* 11557 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3839 /* 11560 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3840 /* 11562 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3841 /* 11564 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3842 /* 11568 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3843 /* 11572 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3844 /* 11575 */ GIR_RootConstrainSelectedInstOperands,
3845 /* 11576 */ // GIR_Coverage, 1418,
3846 /* 11576 */ GIR_EraseRootFromParent_Done,
3847 /* 11577 */ // Label 279: @11577
3848 /* 11577 */ GIM_Try, /*On fail goto*//*Label 280*/ GIMT_Encode4(11662), // Rule ID 1080 //
3849 /* 11582 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3850 /* 11586 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3851 /* 11590 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3852 /* 11594 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3853 /* 11598 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3854 /* 11602 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3855 /* 11606 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3856 /* 11610 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3857 /* 11614 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3858 /* 11618 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3859 /* 11623 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3860 /* 11628 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3861 /* 11633 */ // MIs[0] v2
3862 /* 11633 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3863 /* 11638 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3864 /* 11640 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), V128:{ *:[v4i32] }:$c), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3865 /* 11640 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3866 /* 11643 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3867 /* 11645 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3868 /* 11649 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3869 /* 11653 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3870 /* 11657 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3871 /* 11660 */ GIR_RootConstrainSelectedInstOperands,
3872 /* 11661 */ // GIR_Coverage, 1080,
3873 /* 11661 */ GIR_EraseRootFromParent_Done,
3874 /* 11662 */ // Label 280: @11662
3875 /* 11662 */ GIM_Try, /*On fail goto*//*Label 281*/ GIMT_Encode4(11747), // Rule ID 1386 //
3876 /* 11667 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3877 /* 11671 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3878 /* 11675 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3879 /* 11679 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3880 /* 11683 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3881 /* 11687 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3882 /* 11691 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3883 /* 11695 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3884 /* 11699 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3885 /* 11703 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3886 /* 11708 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3887 /* 11713 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3888 /* 11718 */ // MIs[0] v2
3889 /* 11718 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3890 /* 11723 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3891 /* 11725 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), V128:{ *:[v4i32] }:$c), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3892 /* 11725 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3893 /* 11728 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3894 /* 11730 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3895 /* 11734 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3896 /* 11738 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3897 /* 11742 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3898 /* 11745 */ GIR_RootConstrainSelectedInstOperands,
3899 /* 11746 */ // GIR_Coverage, 1386,
3900 /* 11746 */ GIR_EraseRootFromParent_Done,
3901 /* 11747 */ // Label 281: @11747
3902 /* 11747 */ GIM_Try, /*On fail goto*//*Label 282*/ GIMT_Encode4(11832), // Rule ID 1387 //
3903 /* 11752 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3904 /* 11756 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3905 /* 11760 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3906 /* 11764 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3907 /* 11768 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3908 /* 11772 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3909 /* 11777 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3910 /* 11781 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3911 /* 11785 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3912 /* 11789 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3913 /* 11793 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3914 /* 11798 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3915 /* 11803 */ // MIs[0] v2
3916 /* 11803 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3917 /* 11808 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3918 /* 11810 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3919 /* 11810 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3920 /* 11813 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3921 /* 11815 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3922 /* 11819 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3923 /* 11823 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3924 /* 11827 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3925 /* 11830 */ GIR_RootConstrainSelectedInstOperands,
3926 /* 11831 */ // GIR_Coverage, 1387,
3927 /* 11831 */ GIR_EraseRootFromParent_Done,
3928 /* 11832 */ // Label 282: @11832
3929 /* 11832 */ GIM_Try, /*On fail goto*//*Label 283*/ GIMT_Encode4(11917), // Rule ID 1388 //
3930 /* 11837 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3931 /* 11841 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3932 /* 11845 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3933 /* 11849 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3934 /* 11853 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3935 /* 11857 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3936 /* 11862 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3937 /* 11866 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3938 /* 11870 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3939 /* 11874 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3940 /* 11878 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3941 /* 11883 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3942 /* 11888 */ // MIs[0] v2
3943 /* 11888 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3944 /* 11893 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3945 /* 11895 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3946 /* 11895 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3947 /* 11898 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3948 /* 11900 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3949 /* 11904 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3950 /* 11908 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3951 /* 11912 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3952 /* 11915 */ GIR_RootConstrainSelectedInstOperands,
3953 /* 11916 */ // GIR_Coverage, 1388,
3954 /* 11916 */ GIR_EraseRootFromParent_Done,
3955 /* 11917 */ // Label 283: @11917
3956 /* 11917 */ GIM_Try, /*On fail goto*//*Label 284*/ GIMT_Encode4(11998), // Rule ID 1389 //
3957 /* 11922 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
3958 /* 11925 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3959 /* 11929 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3960 /* 11933 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3961 /* 11937 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3962 /* 11941 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3963 /* 11945 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3964 /* 11949 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3965 /* 11953 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3966 /* 11957 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
3967 /* 11961 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3968 /* 11966 */ // MIs[2] v2
3969 /* 11966 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3970 /* 11971 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3971 /* 11976 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3972 /* 11978 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3973 /* 11978 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3974 /* 11981 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3975 /* 11983 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3976 /* 11987 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3977 /* 11989 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3978 /* 11993 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3979 /* 11996 */ GIR_RootConstrainSelectedInstOperands,
3980 /* 11997 */ // GIR_Coverage, 1389,
3981 /* 11997 */ GIR_EraseRootFromParent_Done,
3982 /* 11998 */ // Label 284: @11998
3983 /* 11998 */ GIM_Try, /*On fail goto*//*Label 285*/ GIMT_Encode4(12079), // Rule ID 1390 //
3984 /* 12003 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
3985 /* 12006 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3986 /* 12010 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3987 /* 12014 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3988 /* 12018 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3989 /* 12022 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
3990 /* 12026 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
3991 /* 12030 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3992 /* 12034 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3993 /* 12038 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
3994 /* 12042 */ // MIs[2] v2
3995 /* 12042 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3996 /* 12047 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3997 /* 12052 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3998 /* 12057 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3999 /* 12059 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
4000 /* 12059 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4001 /* 12062 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4002 /* 12064 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4003 /* 12068 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4004 /* 12070 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4005 /* 12074 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4006 /* 12077 */ GIR_RootConstrainSelectedInstOperands,
4007 /* 12078 */ // GIR_Coverage, 1390,
4008 /* 12078 */ GIR_EraseRootFromParent_Done,
4009 /* 12079 */ // Label 285: @12079
4010 /* 12079 */ GIM_Try, /*On fail goto*//*Label 286*/ GIMT_Encode4(12160), // Rule ID 1391 //
4011 /* 12084 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
4012 /* 12087 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4013 /* 12091 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4014 /* 12095 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4015 /* 12099 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4016 /* 12103 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
4017 /* 12107 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
4018 /* 12111 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4019 /* 12116 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4020 /* 12120 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4021 /* 12124 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
4022 /* 12128 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4023 /* 12133 */ // MIs[2] v2
4024 /* 12133 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4025 /* 12138 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4026 /* 12140 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
4027 /* 12140 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4028 /* 12143 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4029 /* 12145 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4030 /* 12149 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4031 /* 12151 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4032 /* 12155 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4033 /* 12158 */ GIR_RootConstrainSelectedInstOperands,
4034 /* 12159 */ // GIR_Coverage, 1391,
4035 /* 12159 */ GIR_EraseRootFromParent_Done,
4036 /* 12160 */ // Label 286: @12160
4037 /* 12160 */ GIM_Try, /*On fail goto*//*Label 287*/ GIMT_Encode4(12241), // Rule ID 1392 //
4038 /* 12165 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
4039 /* 12168 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4040 /* 12172 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4041 /* 12176 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4042 /* 12180 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4043 /* 12184 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
4044 /* 12188 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
4045 /* 12192 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4046 /* 12197 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4047 /* 12201 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4048 /* 12205 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s32,
4049 /* 12209 */ // MIs[2] v2
4050 /* 12209 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4051 /* 12214 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4052 /* 12219 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4053 /* 12221 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
4054 /* 12221 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4055 /* 12224 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4056 /* 12226 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4057 /* 12230 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4058 /* 12232 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4059 /* 12236 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4060 /* 12239 */ GIR_RootConstrainSelectedInstOperands,
4061 /* 12240 */ // GIR_Coverage, 1392,
4062 /* 12240 */ GIR_EraseRootFromParent_Done,
4063 /* 12241 */ // Label 287: @12241
4064 /* 12241 */ GIM_Try, /*On fail goto*//*Label 288*/ GIMT_Encode4(12283), // Rule ID 1051 //
4065 /* 12246 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
4066 /* 12249 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4067 /* 12253 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4068 /* 12257 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4069 /* 12261 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4070 /* 12267 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
4071 /* 12269 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
4072 /* 12271 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v, immAllOnesV:{ *:[v4i32] }) => (NOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v)
4073 /* 12271 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
4074 /* 12274 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4075 /* 12276 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
4076 /* 12278 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4077 /* 12281 */ GIR_RootConstrainSelectedInstOperands,
4078 /* 12282 */ // GIR_Coverage, 1051,
4079 /* 12282 */ GIR_EraseRootFromParent_Done,
4080 /* 12283 */ // Label 288: @12283
4081 /* 12283 */ GIM_Try, /*On fail goto*//*Label 289*/ GIMT_Encode4(12316), // Rule ID 1062 //
4082 /* 12288 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
4083 /* 12291 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4084 /* 12295 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4085 /* 12299 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4086 /* 12303 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (XOR:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
4087 /* 12303 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
4088 /* 12308 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4089 /* 12314 */ GIR_RootConstrainSelectedInstOperands,
4090 /* 12315 */ // GIR_Coverage, 1062,
4091 /* 12315 */ GIR_Done,
4092 /* 12316 */ // Label 289: @12316
4093 /* 12316 */ GIM_Reject,
4094 /* 12317 */ // Label 271: @12317
4095 /* 12317 */ GIM_Reject,
4096 /* 12318 */ // Label 229: @12318
4097 /* 12318 */ GIM_Try, /*On fail goto*//*Label 290*/ GIMT_Encode4(13954),
4098 /* 12323 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
4099 /* 12326 */ GIM_Try, /*On fail goto*//*Label 291*/ GIMT_Encode4(12439), // Rule ID 1422 //
4100 /* 12331 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4101 /* 12335 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4102 /* 12339 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4103 /* 12343 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
4104 /* 12347 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
4105 /* 12351 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4106 /* 12355 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4107 /* 12359 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
4108 /* 12363 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
4109 /* 12367 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4110 /* 12372 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4111 /* 12376 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4112 /* 12382 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4113 /* 12384 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4114 /* 12388 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4115 /* 12392 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2s64,
4116 /* 12396 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2s64,
4117 /* 12400 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4118 /* 12405 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4119 /* 12410 */ // MIs[0] v2
4120 /* 12410 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
4121 /* 12415 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4122 /* 12417 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4123 /* 12417 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4124 /* 12420 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4125 /* 12422 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
4126 /* 12426 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
4127 /* 12430 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4128 /* 12434 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4129 /* 12437 */ GIR_RootConstrainSelectedInstOperands,
4130 /* 12438 */ // GIR_Coverage, 1422,
4131 /* 12438 */ GIR_EraseRootFromParent_Done,
4132 /* 12439 */ // Label 291: @12439
4133 /* 12439 */ GIM_Try, /*On fail goto*//*Label 292*/ GIMT_Encode4(12552), // Rule ID 1423 //
4134 /* 12444 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4135 /* 12448 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4136 /* 12452 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4137 /* 12456 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
4138 /* 12460 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
4139 /* 12464 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4140 /* 12468 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4141 /* 12472 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
4142 /* 12476 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
4143 /* 12480 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4144 /* 12485 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4145 /* 12489 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4146 /* 12495 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4147 /* 12497 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4148 /* 12501 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4149 /* 12505 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2s64,
4150 /* 12509 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2s64,
4151 /* 12513 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4152 /* 12518 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4153 /* 12523 */ // MIs[0] v2
4154 /* 12523 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
4155 /* 12528 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4156 /* 12530 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4157 /* 12530 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4158 /* 12533 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4159 /* 12535 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
4160 /* 12539 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
4161 /* 12543 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4162 /* 12547 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4163 /* 12550 */ GIR_RootConstrainSelectedInstOperands,
4164 /* 12551 */ // GIR_Coverage, 1423,
4165 /* 12551 */ GIR_EraseRootFromParent_Done,
4166 /* 12552 */ // Label 292: @12552
4167 /* 12552 */ GIM_Try, /*On fail goto*//*Label 293*/ GIMT_Encode4(12665), // Rule ID 1085 //
4168 /* 12557 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4169 /* 12561 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4170 /* 12565 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4171 /* 12569 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
4172 /* 12573 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
4173 /* 12577 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4174 /* 12581 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4175 /* 12585 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
4176 /* 12589 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
4177 /* 12593 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4178 /* 12598 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4179 /* 12603 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4180 /* 12607 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4181 /* 12611 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
4182 /* 12615 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2s64,
4183 /* 12619 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4184 /* 12624 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4185 /* 12628 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4186 /* 12634 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4187 /* 12636 */ // MIs[0] v2
4188 /* 12636 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
4189 /* 12641 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4190 /* 12643 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4191 /* 12643 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4192 /* 12646 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4193 /* 12648 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
4194 /* 12652 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4195 /* 12656 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4196 /* 12660 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4197 /* 12663 */ GIR_RootConstrainSelectedInstOperands,
4198 /* 12664 */ // GIR_Coverage, 1085,
4199 /* 12664 */ GIR_EraseRootFromParent_Done,
4200 /* 12665 */ // Label 293: @12665
4201 /* 12665 */ GIM_Try, /*On fail goto*//*Label 294*/ GIMT_Encode4(12778), // Rule ID 1421 //
4202 /* 12670 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4203 /* 12674 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4204 /* 12678 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4205 /* 12682 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
4206 /* 12686 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
4207 /* 12690 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4208 /* 12694 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4209 /* 12698 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
4210 /* 12702 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
4211 /* 12706 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4212 /* 12711 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4213 /* 12716 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4214 /* 12720 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4215 /* 12724 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
4216 /* 12728 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2s64,
4217 /* 12732 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4218 /* 12737 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4219 /* 12741 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4220 /* 12747 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4221 /* 12749 */ // MIs[0] v2
4222 /* 12749 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4223 /* 12754 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4224 /* 12756 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4225 /* 12756 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4226 /* 12759 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4227 /* 12761 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4228 /* 12765 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4229 /* 12769 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4230 /* 12773 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4231 /* 12776 */ GIR_RootConstrainSelectedInstOperands,
4232 /* 12777 */ // GIR_Coverage, 1421,
4233 /* 12777 */ GIR_EraseRootFromParent_Done,
4234 /* 12778 */ // Label 294: @12778
4235 /* 12778 */ GIM_Try, /*On fail goto*//*Label 295*/ GIMT_Encode4(12887), // Rule ID 1426 //
4236 /* 12783 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
4237 /* 12786 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4238 /* 12790 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4239 /* 12794 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4240 /* 12798 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4241 /* 12802 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
4242 /* 12806 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
4243 /* 12810 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4244 /* 12814 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4245 /* 12818 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
4246 /* 12822 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
4247 /* 12826 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4248 /* 12831 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4249 /* 12835 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4250 /* 12841 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4251 /* 12843 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4252 /* 12847 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4253 /* 12851 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2s64,
4254 /* 12855 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4255 /* 12860 */ // MIs[4] v2
4256 /* 12860 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4257 /* 12865 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4258 /* 12867 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4259 /* 12867 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4260 /* 12870 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4261 /* 12872 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4262 /* 12874 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
4263 /* 12878 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4264 /* 12882 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4265 /* 12885 */ GIR_RootConstrainSelectedInstOperands,
4266 /* 12886 */ // GIR_Coverage, 1426,
4267 /* 12886 */ GIR_EraseRootFromParent_Done,
4268 /* 12887 */ // Label 295: @12887
4269 /* 12887 */ GIM_Try, /*On fail goto*//*Label 296*/ GIMT_Encode4(12996), // Rule ID 1427 //
4270 /* 12892 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
4271 /* 12895 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4272 /* 12899 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4273 /* 12903 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4274 /* 12907 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4275 /* 12911 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
4276 /* 12915 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
4277 /* 12919 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4278 /* 12923 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4279 /* 12927 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
4280 /* 12931 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
4281 /* 12935 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4282 /* 12940 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4283 /* 12944 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4284 /* 12950 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4285 /* 12952 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4286 /* 12956 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4287 /* 12960 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2s64,
4288 /* 12964 */ // MIs[4] v2
4289 /* 12964 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4290 /* 12969 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4291 /* 12974 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4292 /* 12976 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4293 /* 12976 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4294 /* 12979 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4295 /* 12981 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4296 /* 12983 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
4297 /* 12987 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4298 /* 12991 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4299 /* 12994 */ GIR_RootConstrainSelectedInstOperands,
4300 /* 12995 */ // GIR_Coverage, 1427,
4301 /* 12995 */ GIR_EraseRootFromParent_Done,
4302 /* 12996 */ // Label 296: @12996
4303 /* 12996 */ GIM_Try, /*On fail goto*//*Label 297*/ GIMT_Encode4(13105), // Rule ID 1424 //
4304 /* 13001 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
4305 /* 13004 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4306 /* 13008 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4307 /* 13012 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4308 /* 13016 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4309 /* 13020 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
4310 /* 13024 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
4311 /* 13028 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4312 /* 13032 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4313 /* 13036 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
4314 /* 13040 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4315 /* 13045 */ // MIs[2] v2
4316 /* 13045 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4317 /* 13050 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4318 /* 13054 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4319 /* 13058 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
4320 /* 13062 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2s64,
4321 /* 13066 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4322 /* 13071 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4323 /* 13075 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4324 /* 13081 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4325 /* 13083 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4326 /* 13085 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4327 /* 13085 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4328 /* 13088 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4329 /* 13090 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4330 /* 13092 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4331 /* 13096 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4332 /* 13100 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4333 /* 13103 */ GIR_RootConstrainSelectedInstOperands,
4334 /* 13104 */ // GIR_Coverage, 1424,
4335 /* 13104 */ GIR_EraseRootFromParent_Done,
4336 /* 13105 */ // Label 297: @13105
4337 /* 13105 */ GIM_Try, /*On fail goto*//*Label 298*/ GIMT_Encode4(13214), // Rule ID 1425 //
4338 /* 13110 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
4339 /* 13113 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4340 /* 13117 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4341 /* 13121 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4342 /* 13125 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4343 /* 13129 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
4344 /* 13133 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
4345 /* 13137 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4346 /* 13141 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4347 /* 13145 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
4348 /* 13149 */ // MIs[2] v2
4349 /* 13149 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4350 /* 13154 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4351 /* 13159 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4352 /* 13163 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4353 /* 13167 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
4354 /* 13171 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2s64,
4355 /* 13175 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4356 /* 13180 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4357 /* 13184 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4358 /* 13190 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4359 /* 13192 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4360 /* 13194 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4361 /* 13194 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4362 /* 13197 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4363 /* 13199 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4364 /* 13201 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4365 /* 13205 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4366 /* 13209 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4367 /* 13212 */ GIR_RootConstrainSelectedInstOperands,
4368 /* 13213 */ // GIR_Coverage, 1425,
4369 /* 13213 */ GIR_EraseRootFromParent_Done,
4370 /* 13214 */ // Label 298: @13214
4371 /* 13214 */ GIM_Try, /*On fail goto*//*Label 299*/ GIMT_Encode4(13299), // Rule ID 1081 //
4372 /* 13219 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4373 /* 13223 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4374 /* 13227 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4375 /* 13231 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
4376 /* 13235 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
4377 /* 13239 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4378 /* 13243 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4379 /* 13247 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
4380 /* 13251 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
4381 /* 13255 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4382 /* 13260 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4383 /* 13265 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4384 /* 13270 */ // MIs[0] v2
4385 /* 13270 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
4386 /* 13275 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4387 /* 13277 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), V128:{ *:[v2i64] }:$c), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4388 /* 13277 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4389 /* 13280 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4390 /* 13282 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4391 /* 13286 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
4392 /* 13290 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4393 /* 13294 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4394 /* 13297 */ GIR_RootConstrainSelectedInstOperands,
4395 /* 13298 */ // GIR_Coverage, 1081,
4396 /* 13298 */ GIR_EraseRootFromParent_Done,
4397 /* 13299 */ // Label 299: @13299
4398 /* 13299 */ GIM_Try, /*On fail goto*//*Label 300*/ GIMT_Encode4(13384), // Rule ID 1393 //
4399 /* 13304 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4400 /* 13308 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4401 /* 13312 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4402 /* 13316 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
4403 /* 13320 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
4404 /* 13324 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4405 /* 13328 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4406 /* 13332 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
4407 /* 13336 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
4408 /* 13340 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4409 /* 13345 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4410 /* 13350 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4411 /* 13355 */ // MIs[0] v2
4412 /* 13355 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4413 /* 13360 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4414 /* 13362 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), V128:{ *:[v2i64] }:$c), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4415 /* 13362 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4416 /* 13365 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4417 /* 13367 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4418 /* 13371 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4419 /* 13375 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4420 /* 13379 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4421 /* 13382 */ GIR_RootConstrainSelectedInstOperands,
4422 /* 13383 */ // GIR_Coverage, 1393,
4423 /* 13383 */ GIR_EraseRootFromParent_Done,
4424 /* 13384 */ // Label 300: @13384
4425 /* 13384 */ GIM_Try, /*On fail goto*//*Label 301*/ GIMT_Encode4(13469), // Rule ID 1394 //
4426 /* 13389 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4427 /* 13393 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4428 /* 13397 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4429 /* 13401 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
4430 /* 13405 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
4431 /* 13409 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4432 /* 13414 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4433 /* 13418 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4434 /* 13422 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
4435 /* 13426 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
4436 /* 13430 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4437 /* 13435 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4438 /* 13440 */ // MIs[0] v2
4439 /* 13440 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
4440 /* 13445 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4441 /* 13447 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4442 /* 13447 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4443 /* 13450 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4444 /* 13452 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4445 /* 13456 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
4446 /* 13460 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4447 /* 13464 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4448 /* 13467 */ GIR_RootConstrainSelectedInstOperands,
4449 /* 13468 */ // GIR_Coverage, 1394,
4450 /* 13468 */ GIR_EraseRootFromParent_Done,
4451 /* 13469 */ // Label 301: @13469
4452 /* 13469 */ GIM_Try, /*On fail goto*//*Label 302*/ GIMT_Encode4(13554), // Rule ID 1395 //
4453 /* 13474 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4454 /* 13478 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4455 /* 13482 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4456 /* 13486 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
4457 /* 13490 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
4458 /* 13494 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4459 /* 13499 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4460 /* 13503 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4461 /* 13507 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
4462 /* 13511 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
4463 /* 13515 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4464 /* 13520 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4465 /* 13525 */ // MIs[0] v2
4466 /* 13525 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4467 /* 13530 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4468 /* 13532 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4469 /* 13532 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4470 /* 13535 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4471 /* 13537 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4472 /* 13541 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4473 /* 13545 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4474 /* 13549 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4475 /* 13552 */ GIR_RootConstrainSelectedInstOperands,
4476 /* 13553 */ // GIR_Coverage, 1395,
4477 /* 13553 */ GIR_EraseRootFromParent_Done,
4478 /* 13554 */ // Label 302: @13554
4479 /* 13554 */ GIM_Try, /*On fail goto*//*Label 303*/ GIMT_Encode4(13635), // Rule ID 1396 //
4480 /* 13559 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
4481 /* 13562 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4482 /* 13566 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4483 /* 13570 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4484 /* 13574 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4485 /* 13578 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
4486 /* 13582 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
4487 /* 13586 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4488 /* 13590 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4489 /* 13594 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
4490 /* 13598 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4491 /* 13603 */ // MIs[2] v2
4492 /* 13603 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4493 /* 13608 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4494 /* 13613 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4495 /* 13615 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4496 /* 13615 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4497 /* 13618 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4498 /* 13620 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4499 /* 13624 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4500 /* 13626 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4501 /* 13630 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4502 /* 13633 */ GIR_RootConstrainSelectedInstOperands,
4503 /* 13634 */ // GIR_Coverage, 1396,
4504 /* 13634 */ GIR_EraseRootFromParent_Done,
4505 /* 13635 */ // Label 303: @13635
4506 /* 13635 */ GIM_Try, /*On fail goto*//*Label 304*/ GIMT_Encode4(13716), // Rule ID 1397 //
4507 /* 13640 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
4508 /* 13643 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4509 /* 13647 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4510 /* 13651 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4511 /* 13655 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4512 /* 13659 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
4513 /* 13663 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
4514 /* 13667 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4515 /* 13671 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4516 /* 13675 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
4517 /* 13679 */ // MIs[2] v2
4518 /* 13679 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4519 /* 13684 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4520 /* 13689 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4521 /* 13694 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4522 /* 13696 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4523 /* 13696 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4524 /* 13699 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4525 /* 13701 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4526 /* 13705 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4527 /* 13707 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4528 /* 13711 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4529 /* 13714 */ GIR_RootConstrainSelectedInstOperands,
4530 /* 13715 */ // GIR_Coverage, 1397,
4531 /* 13715 */ GIR_EraseRootFromParent_Done,
4532 /* 13716 */ // Label 304: @13716
4533 /* 13716 */ GIM_Try, /*On fail goto*//*Label 305*/ GIMT_Encode4(13797), // Rule ID 1398 //
4534 /* 13721 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
4535 /* 13724 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4536 /* 13728 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4537 /* 13732 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4538 /* 13736 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4539 /* 13740 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
4540 /* 13744 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
4541 /* 13748 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4542 /* 13753 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4543 /* 13757 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4544 /* 13761 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
4545 /* 13765 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4546 /* 13770 */ // MIs[2] v2
4547 /* 13770 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4548 /* 13775 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4549 /* 13777 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4550 /* 13777 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4551 /* 13780 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4552 /* 13782 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4553 /* 13786 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4554 /* 13788 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4555 /* 13792 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4556 /* 13795 */ GIR_RootConstrainSelectedInstOperands,
4557 /* 13796 */ // GIR_Coverage, 1398,
4558 /* 13796 */ GIR_EraseRootFromParent_Done,
4559 /* 13797 */ // Label 305: @13797
4560 /* 13797 */ GIM_Try, /*On fail goto*//*Label 306*/ GIMT_Encode4(13878), // Rule ID 1399 //
4561 /* 13802 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
4562 /* 13805 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4563 /* 13809 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4564 /* 13813 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4565 /* 13817 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4566 /* 13821 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
4567 /* 13825 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
4568 /* 13829 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4569 /* 13834 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4570 /* 13838 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4571 /* 13842 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s64,
4572 /* 13846 */ // MIs[2] v2
4573 /* 13846 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4574 /* 13851 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4575 /* 13856 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4576 /* 13858 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4577 /* 13858 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4578 /* 13861 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4579 /* 13863 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4580 /* 13867 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4581 /* 13869 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4582 /* 13873 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4583 /* 13876 */ GIR_RootConstrainSelectedInstOperands,
4584 /* 13877 */ // GIR_Coverage, 1399,
4585 /* 13877 */ GIR_EraseRootFromParent_Done,
4586 /* 13878 */ // Label 306: @13878
4587 /* 13878 */ GIM_Try, /*On fail goto*//*Label 307*/ GIMT_Encode4(13920), // Rule ID 1052 //
4588 /* 13883 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
4589 /* 13886 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4590 /* 13890 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4591 /* 13894 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4592 /* 13898 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4593 /* 13904 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
4594 /* 13906 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
4595 /* 13908 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v, immAllOnesV:{ *:[v2i64] }) => (NOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v)
4596 /* 13908 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
4597 /* 13911 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4598 /* 13913 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
4599 /* 13915 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4600 /* 13918 */ GIR_RootConstrainSelectedInstOperands,
4601 /* 13919 */ // GIR_Coverage, 1052,
4602 /* 13919 */ GIR_EraseRootFromParent_Done,
4603 /* 13920 */ // Label 307: @13920
4604 /* 13920 */ GIM_Try, /*On fail goto*//*Label 308*/ GIMT_Encode4(13953), // Rule ID 1063 //
4605 /* 13925 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
4606 /* 13928 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4607 /* 13932 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4608 /* 13936 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4609 /* 13940 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (XOR:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
4610 /* 13940 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
4611 /* 13945 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4612 /* 13951 */ GIR_RootConstrainSelectedInstOperands,
4613 /* 13952 */ // GIR_Coverage, 1063,
4614 /* 13952 */ GIR_Done,
4615 /* 13953 */ // Label 308: @13953
4616 /* 13953 */ GIM_Reject,
4617 /* 13954 */ // Label 290: @13954
4618 /* 13954 */ GIM_Reject,
4619 /* 13955 */ // Label 230: @13955
4620 /* 13955 */ GIM_Reject,
4621 /* 13956 */ // Label 10: @13956
4622 /* 13956 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 311*/ GIMT_Encode4(14049),
4623 /* 13967 */ /*GILLT_v16s8*//*Label 309*/ GIMT_Encode4(13975),
4624 /* 13971 */ /*GILLT_v8s16*//*Label 310*/ GIMT_Encode4(14012),
4625 /* 13975 */ // Label 309: @13975
4626 /* 13975 */ GIM_Try, /*On fail goto*//*Label 312*/ GIMT_Encode4(14011), // Rule ID 1174 //
4627 /* 13980 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
4628 /* 13983 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
4629 /* 13986 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4630 /* 13990 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4631 /* 13994 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4632 /* 13998 */ // (avgceilu:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (AVGR_U_I8x16:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
4633 /* 13998 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I8x16),
4634 /* 14003 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4635 /* 14009 */ GIR_RootConstrainSelectedInstOperands,
4636 /* 14010 */ // GIR_Coverage, 1174,
4637 /* 14010 */ GIR_Done,
4638 /* 14011 */ // Label 312: @14011
4639 /* 14011 */ GIM_Reject,
4640 /* 14012 */ // Label 310: @14012
4641 /* 14012 */ GIM_Try, /*On fail goto*//*Label 313*/ GIMT_Encode4(14048), // Rule ID 1176 //
4642 /* 14017 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
4643 /* 14020 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
4644 /* 14023 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4645 /* 14027 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4646 /* 14031 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4647 /* 14035 */ // (avgceilu:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (AVGR_U_I16x8:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
4648 /* 14035 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I16x8),
4649 /* 14040 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4650 /* 14046 */ GIR_RootConstrainSelectedInstOperands,
4651 /* 14047 */ // GIR_Coverage, 1176,
4652 /* 14047 */ GIR_Done,
4653 /* 14048 */ // Label 313: @14048
4654 /* 14048 */ GIM_Reject,
4655 /* 14049 */ // Label 311: @14049
4656 /* 14049 */ GIM_Reject,
4657 /* 14050 */ // Label 11: @14050
4658 /* 14050 */ GIM_Try, /*On fail goto*//*Label 314*/ GIMT_Encode4(14156),
4659 /* 14055 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
4660 /* 14058 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
4661 /* 14061 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
4662 /* 14064 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
4663 /* 14067 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4664 /* 14071 */ GIM_Try, /*On fail goto*//*Label 315*/ GIMT_Encode4(14113), // Rule ID 178 //
4665 /* 14076 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
4666 /* 14079 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4667 /* 14083 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4668 /* 14087 */ // MIs[1] Operand 1
4669 /* 14087 */ // No operand predicates
4670 /* 14087 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4671 /* 14091 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4672 /* 14095 */ // MIs[2] Operand 1
4673 /* 14095 */ // No operand predicates
4674 /* 14095 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4675 /* 14097 */ // (build_vector:{ *:[v2f64] } (fpimm:{ *:[f64] }):$i0, (fpimm:{ *:[f64] }):$i1) => (CONST_V128_F64x2:{ *:[v2f64] } (fpimm:{ *:[f64] }):$i0, (fpimm:{ *:[f64] }):$i1)
4676 /* 14097 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F64x2),
4677 /* 14100 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4678 /* 14102 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4679 /* 14105 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4680 /* 14108 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4681 /* 14111 */ GIR_RootConstrainSelectedInstOperands,
4682 /* 14112 */ // GIR_Coverage, 178,
4683 /* 14112 */ GIR_EraseRootFromParent_Done,
4684 /* 14113 */ // Label 315: @14113
4685 /* 14113 */ GIM_Try, /*On fail goto*//*Label 316*/ GIMT_Encode4(14155), // Rule ID 176 //
4686 /* 14118 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
4687 /* 14121 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4688 /* 14125 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4689 /* 14129 */ // MIs[1] Operand 1
4690 /* 14129 */ // No operand predicates
4691 /* 14129 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4692 /* 14133 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4693 /* 14137 */ // MIs[2] Operand 1
4694 /* 14137 */ // No operand predicates
4695 /* 14137 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4696 /* 14139 */ // (build_vector:{ *:[v2i64] } (imm:{ *:[i64] }):$i0, (imm:{ *:[i64] }):$i1) => (CONST_V128_I64x2:{ *:[v2i64] } (imm:{ *:[i64] }):$i0, (imm:{ *:[i64] }):$i1)
4697 /* 14139 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I64x2),
4698 /* 14142 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4699 /* 14144 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4700 /* 14147 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4701 /* 14150 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4702 /* 14153 */ GIR_RootConstrainSelectedInstOperands,
4703 /* 14154 */ // GIR_Coverage, 176,
4704 /* 14154 */ GIR_EraseRootFromParent_Done,
4705 /* 14155 */ // Label 316: @14155
4706 /* 14155 */ GIM_Reject,
4707 /* 14156 */ // Label 314: @14156
4708 /* 14156 */ GIM_Try, /*On fail goto*//*Label 317*/ GIMT_Encode4(14312),
4709 /* 14161 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
4710 /* 14164 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
4711 /* 14167 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
4712 /* 14170 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
4713 /* 14173 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
4714 /* 14176 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
4715 /* 14179 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4716 /* 14183 */ GIM_Try, /*On fail goto*//*Label 318*/ GIMT_Encode4(14247), // Rule ID 177 //
4717 /* 14188 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
4718 /* 14191 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4719 /* 14195 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4720 /* 14199 */ // MIs[1] Operand 1
4721 /* 14199 */ // No operand predicates
4722 /* 14199 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4723 /* 14203 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4724 /* 14207 */ // MIs[2] Operand 1
4725 /* 14207 */ // No operand predicates
4726 /* 14207 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
4727 /* 14211 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4728 /* 14215 */ // MIs[3] Operand 1
4729 /* 14215 */ // No operand predicates
4730 /* 14215 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
4731 /* 14219 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4732 /* 14223 */ // MIs[4] Operand 1
4733 /* 14223 */ // No operand predicates
4734 /* 14223 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4735 /* 14225 */ // (build_vector:{ *:[v4f32] } (fpimm:{ *:[f32] }):$i0, (fpimm:{ *:[f32] }):$i1, (fpimm:{ *:[f32] }):$i2, (fpimm:{ *:[f32] }):$i3) => (CONST_V128_F32x4:{ *:[v4f32] } (fpimm:{ *:[f32] }):$i0, (fpimm:{ *:[f32] }):$i1, (fpimm:{ *:[f32] }):$i2, (fpimm:{ *:[f32] }):$i3)
4736 /* 14225 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F32x4),
4737 /* 14228 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4738 /* 14230 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4739 /* 14233 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4740 /* 14236 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
4741 /* 14239 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
4742 /* 14242 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4743 /* 14245 */ GIR_RootConstrainSelectedInstOperands,
4744 /* 14246 */ // GIR_Coverage, 177,
4745 /* 14246 */ GIR_EraseRootFromParent_Done,
4746 /* 14247 */ // Label 318: @14247
4747 /* 14247 */ GIM_Try, /*On fail goto*//*Label 319*/ GIMT_Encode4(14311), // Rule ID 175 //
4748 /* 14252 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
4749 /* 14255 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4750 /* 14259 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4751 /* 14263 */ // MIs[1] Operand 1
4752 /* 14263 */ // No operand predicates
4753 /* 14263 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4754 /* 14267 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4755 /* 14271 */ // MIs[2] Operand 1
4756 /* 14271 */ // No operand predicates
4757 /* 14271 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
4758 /* 14275 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4759 /* 14279 */ // MIs[3] Operand 1
4760 /* 14279 */ // No operand predicates
4761 /* 14279 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
4762 /* 14283 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4763 /* 14287 */ // MIs[4] Operand 1
4764 /* 14287 */ // No operand predicates
4765 /* 14287 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4766 /* 14289 */ // (build_vector:{ *:[v4i32] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3) => (CONST_V128_I32x4:{ *:[v4i32] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3)
4767 /* 14289 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I32x4),
4768 /* 14292 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4769 /* 14294 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4770 /* 14297 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4771 /* 14300 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
4772 /* 14303 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
4773 /* 14306 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4774 /* 14309 */ GIR_RootConstrainSelectedInstOperands,
4775 /* 14310 */ // GIR_Coverage, 175,
4776 /* 14310 */ GIR_EraseRootFromParent_Done,
4777 /* 14311 */ // Label 319: @14311
4778 /* 14311 */ GIM_Reject,
4779 /* 14312 */ // Label 317: @14312
4780 /* 14312 */ GIM_Try, /*On fail goto*//*Label 320*/ GIMT_Encode4(14486), // Rule ID 174 //
4781 /* 14317 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
4782 /* 14320 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/9,
4783 /* 14323 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
4784 /* 14326 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
4785 /* 14329 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
4786 /* 14332 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
4787 /* 14335 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
4788 /* 14338 */ GIM_RootCheckType, /*Op*/5, /*Type*/GILLT_s32,
4789 /* 14341 */ GIM_RootCheckType, /*Op*/6, /*Type*/GILLT_s32,
4790 /* 14344 */ GIM_RootCheckType, /*Op*/7, /*Type*/GILLT_s32,
4791 /* 14347 */ GIM_RootCheckType, /*Op*/8, /*Type*/GILLT_s32,
4792 /* 14350 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4793 /* 14354 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4794 /* 14358 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4795 /* 14362 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4796 /* 14366 */ // MIs[1] Operand 1
4797 /* 14366 */ // No operand predicates
4798 /* 14366 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4799 /* 14370 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4800 /* 14374 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4801 /* 14378 */ // MIs[2] Operand 1
4802 /* 14378 */ // No operand predicates
4803 /* 14378 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
4804 /* 14382 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4805 /* 14386 */ GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4806 /* 14390 */ // MIs[3] Operand 1
4807 /* 14390 */ // No operand predicates
4808 /* 14390 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
4809 /* 14394 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4810 /* 14398 */ GIM_CheckI64ImmPredicate, /*MI*/4, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4811 /* 14402 */ // MIs[4] Operand 1
4812 /* 14402 */ // No operand predicates
4813 /* 14402 */ GIM_RecordInsn, /*DefineMI*/5, /*MI*/0, /*OpIdx*/5, // MIs[5]
4814 /* 14406 */ GIM_CheckOpcode, /*MI*/5, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4815 /* 14410 */ GIM_CheckI64ImmPredicate, /*MI*/5, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4816 /* 14414 */ // MIs[5] Operand 1
4817 /* 14414 */ // No operand predicates
4818 /* 14414 */ GIM_RecordInsn, /*DefineMI*/6, /*MI*/0, /*OpIdx*/6, // MIs[6]
4819 /* 14418 */ GIM_CheckOpcode, /*MI*/6, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4820 /* 14422 */ GIM_CheckI64ImmPredicate, /*MI*/6, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4821 /* 14426 */ // MIs[6] Operand 1
4822 /* 14426 */ // No operand predicates
4823 /* 14426 */ GIM_RecordInsn, /*DefineMI*/7, /*MI*/0, /*OpIdx*/7, // MIs[7]
4824 /* 14430 */ GIM_CheckOpcode, /*MI*/7, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4825 /* 14434 */ GIM_CheckI64ImmPredicate, /*MI*/7, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4826 /* 14438 */ // MIs[7] Operand 1
4827 /* 14438 */ // No operand predicates
4828 /* 14438 */ GIM_RecordInsn, /*DefineMI*/8, /*MI*/0, /*OpIdx*/8, // MIs[8]
4829 /* 14442 */ GIM_CheckOpcode, /*MI*/8, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4830 /* 14446 */ GIM_CheckI64ImmPredicate, /*MI*/8, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4831 /* 14450 */ // MIs[8] Operand 1
4832 /* 14450 */ // No operand predicates
4833 /* 14450 */ GIM_CheckIsSafeToFold, /*NumInsns*/8,
4834 /* 14452 */ // (build_vector:{ *:[v8i16] } (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i0, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i1, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i2, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i3, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i4, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i5, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i6, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i7) => (CONST_V128_I16x8:{ *:[v8i16] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3, (imm:{ *:[i32] }):$i4, (imm:{ *:[i32] }):$i5, (imm:{ *:[i32] }):$i6, (imm:{ *:[i32] }):$i7)
4835 /* 14452 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I16x8),
4836 /* 14455 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4837 /* 14457 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4838 /* 14460 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4839 /* 14463 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
4840 /* 14466 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
4841 /* 14469 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/5, // i4
4842 /* 14472 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/6, // i5
4843 /* 14475 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/7, // i6
4844 /* 14478 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/8, // i7
4845 /* 14481 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4846 /* 14484 */ GIR_RootConstrainSelectedInstOperands,
4847 /* 14485 */ // GIR_Coverage, 174,
4848 /* 14485 */ GIR_EraseRootFromParent_Done,
4849 /* 14486 */ // Label 320: @14486
4850 /* 14486 */ GIM_Try, /*On fail goto*//*Label 321*/ GIMT_Encode4(14804), // Rule ID 173 //
4851 /* 14491 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
4852 /* 14494 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/17,
4853 /* 14497 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
4854 /* 14500 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
4855 /* 14503 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
4856 /* 14506 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
4857 /* 14509 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
4858 /* 14512 */ GIM_RootCheckType, /*Op*/5, /*Type*/GILLT_s32,
4859 /* 14515 */ GIM_RootCheckType, /*Op*/6, /*Type*/GILLT_s32,
4860 /* 14518 */ GIM_RootCheckType, /*Op*/7, /*Type*/GILLT_s32,
4861 /* 14521 */ GIM_RootCheckType, /*Op*/8, /*Type*/GILLT_s32,
4862 /* 14524 */ GIM_RootCheckType, /*Op*/9, /*Type*/GILLT_s32,
4863 /* 14527 */ GIM_RootCheckType, /*Op*/10, /*Type*/GILLT_s32,
4864 /* 14530 */ GIM_RootCheckType, /*Op*/11, /*Type*/GILLT_s32,
4865 /* 14533 */ GIM_RootCheckType, /*Op*/12, /*Type*/GILLT_s32,
4866 /* 14536 */ GIM_RootCheckType, /*Op*/13, /*Type*/GILLT_s32,
4867 /* 14539 */ GIM_RootCheckType, /*Op*/14, /*Type*/GILLT_s32,
4868 /* 14542 */ GIM_RootCheckType, /*Op*/15, /*Type*/GILLT_s32,
4869 /* 14545 */ GIM_RootCheckType, /*Op*/16, /*Type*/GILLT_s32,
4870 /* 14548 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4871 /* 14552 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4872 /* 14556 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4873 /* 14560 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4874 /* 14564 */ // MIs[1] Operand 1
4875 /* 14564 */ // No operand predicates
4876 /* 14564 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4877 /* 14568 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4878 /* 14572 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4879 /* 14576 */ // MIs[2] Operand 1
4880 /* 14576 */ // No operand predicates
4881 /* 14576 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
4882 /* 14580 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4883 /* 14584 */ GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4884 /* 14588 */ // MIs[3] Operand 1
4885 /* 14588 */ // No operand predicates
4886 /* 14588 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
4887 /* 14592 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4888 /* 14596 */ GIM_CheckI64ImmPredicate, /*MI*/4, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4889 /* 14600 */ // MIs[4] Operand 1
4890 /* 14600 */ // No operand predicates
4891 /* 14600 */ GIM_RecordInsn, /*DefineMI*/5, /*MI*/0, /*OpIdx*/5, // MIs[5]
4892 /* 14604 */ GIM_CheckOpcode, /*MI*/5, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4893 /* 14608 */ GIM_CheckI64ImmPredicate, /*MI*/5, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4894 /* 14612 */ // MIs[5] Operand 1
4895 /* 14612 */ // No operand predicates
4896 /* 14612 */ GIM_RecordInsn, /*DefineMI*/6, /*MI*/0, /*OpIdx*/6, // MIs[6]
4897 /* 14616 */ GIM_CheckOpcode, /*MI*/6, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4898 /* 14620 */ GIM_CheckI64ImmPredicate, /*MI*/6, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4899 /* 14624 */ // MIs[6] Operand 1
4900 /* 14624 */ // No operand predicates
4901 /* 14624 */ GIM_RecordInsn, /*DefineMI*/7, /*MI*/0, /*OpIdx*/7, // MIs[7]
4902 /* 14628 */ GIM_CheckOpcode, /*MI*/7, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4903 /* 14632 */ GIM_CheckI64ImmPredicate, /*MI*/7, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4904 /* 14636 */ // MIs[7] Operand 1
4905 /* 14636 */ // No operand predicates
4906 /* 14636 */ GIM_RecordInsn, /*DefineMI*/8, /*MI*/0, /*OpIdx*/8, // MIs[8]
4907 /* 14640 */ GIM_CheckOpcode, /*MI*/8, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4908 /* 14644 */ GIM_CheckI64ImmPredicate, /*MI*/8, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4909 /* 14648 */ // MIs[8] Operand 1
4910 /* 14648 */ // No operand predicates
4911 /* 14648 */ GIM_RecordInsn, /*DefineMI*/9, /*MI*/0, /*OpIdx*/9, // MIs[9]
4912 /* 14652 */ GIM_CheckOpcode, /*MI*/9, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4913 /* 14656 */ GIM_CheckI64ImmPredicate, /*MI*/9, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4914 /* 14660 */ // MIs[9] Operand 1
4915 /* 14660 */ // No operand predicates
4916 /* 14660 */ GIM_RecordInsn, /*DefineMI*/10, /*MI*/0, /*OpIdx*/10, // MIs[10]
4917 /* 14664 */ GIM_CheckOpcode, /*MI*/10, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4918 /* 14668 */ GIM_CheckI64ImmPredicate, /*MI*/10, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4919 /* 14672 */ // MIs[10] Operand 1
4920 /* 14672 */ // No operand predicates
4921 /* 14672 */ GIM_RecordInsn, /*DefineMI*/11, /*MI*/0, /*OpIdx*/11, // MIs[11]
4922 /* 14676 */ GIM_CheckOpcode, /*MI*/11, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4923 /* 14680 */ GIM_CheckI64ImmPredicate, /*MI*/11, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4924 /* 14684 */ // MIs[11] Operand 1
4925 /* 14684 */ // No operand predicates
4926 /* 14684 */ GIM_RecordInsn, /*DefineMI*/12, /*MI*/0, /*OpIdx*/12, // MIs[12]
4927 /* 14688 */ GIM_CheckOpcode, /*MI*/12, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4928 /* 14692 */ GIM_CheckI64ImmPredicate, /*MI*/12, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4929 /* 14696 */ // MIs[12] Operand 1
4930 /* 14696 */ // No operand predicates
4931 /* 14696 */ GIM_RecordInsn, /*DefineMI*/13, /*MI*/0, /*OpIdx*/13, // MIs[13]
4932 /* 14700 */ GIM_CheckOpcode, /*MI*/13, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4933 /* 14704 */ GIM_CheckI64ImmPredicate, /*MI*/13, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4934 /* 14708 */ // MIs[13] Operand 1
4935 /* 14708 */ // No operand predicates
4936 /* 14708 */ GIM_RecordInsn, /*DefineMI*/14, /*MI*/0, /*OpIdx*/14, // MIs[14]
4937 /* 14712 */ GIM_CheckOpcode, /*MI*/14, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4938 /* 14716 */ GIM_CheckI64ImmPredicate, /*MI*/14, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4939 /* 14720 */ // MIs[14] Operand 1
4940 /* 14720 */ // No operand predicates
4941 /* 14720 */ GIM_RecordInsn, /*DefineMI*/15, /*MI*/0, /*OpIdx*/15, // MIs[15]
4942 /* 14724 */ GIM_CheckOpcode, /*MI*/15, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4943 /* 14728 */ GIM_CheckI64ImmPredicate, /*MI*/15, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4944 /* 14732 */ // MIs[15] Operand 1
4945 /* 14732 */ // No operand predicates
4946 /* 14732 */ GIM_RecordInsn, /*DefineMI*/16, /*MI*/0, /*OpIdx*/16, // MIs[16]
4947 /* 14736 */ GIM_CheckOpcode, /*MI*/16, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4948 /* 14740 */ GIM_CheckI64ImmPredicate, /*MI*/16, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4949 /* 14744 */ // MIs[16] Operand 1
4950 /* 14744 */ // No operand predicates
4951 /* 14744 */ GIM_CheckIsSafeToFold, /*NumInsns*/16,
4952 /* 14746 */ // (build_vector:{ *:[v16i8] } (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i0, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i1, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i2, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i3, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i4, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i5, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i6, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i7, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i8, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i9, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iA, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iB, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iC, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iD, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iE, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iF) => (CONST_V128_I8x16:{ *:[v16i8] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3, (imm:{ *:[i32] }):$i4, (imm:{ *:[i32] }):$i5, (imm:{ *:[i32] }):$i6, (imm:{ *:[i32] }):$i7, (imm:{ *:[i32] }):$i8, (imm:{ *:[i32] }):$i9, (imm:{ *:[i32] }):$iA, (imm:{ *:[i32] }):$iB, (imm:{ *:[i32] }):$iC, (imm:{ *:[i32] }):$iD, (imm:{ *:[i32] }):$iE, (imm:{ *:[i32] }):$iF)
4953 /* 14746 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I8x16),
4954 /* 14749 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4955 /* 14751 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4956 /* 14754 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4957 /* 14757 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
4958 /* 14760 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
4959 /* 14763 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/5, // i4
4960 /* 14766 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/6, // i5
4961 /* 14769 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/7, // i6
4962 /* 14772 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/8, // i7
4963 /* 14775 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/9, // i8
4964 /* 14778 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/10, // i9
4965 /* 14781 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/11, // iA
4966 /* 14784 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/12, // iB
4967 /* 14787 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/13, // iC
4968 /* 14790 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/14, // iD
4969 /* 14793 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/15, // iE
4970 /* 14796 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/16, // iF
4971 /* 14799 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4972 /* 14802 */ GIR_RootConstrainSelectedInstOperands,
4973 /* 14803 */ // GIR_Coverage, 173,
4974 /* 14803 */ GIR_EraseRootFromParent_Done,
4975 /* 14804 */ // Label 321: @14804
4976 /* 14804 */ GIM_Reject,
4977 /* 14805 */ // Label 12: @14805
4978 /* 14805 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 328*/ GIMT_Encode4(16186),
4979 /* 14816 */ /*GILLT_s32*//*Label 322*/ GIMT_Encode4(14840),
4980 /* 14820 */ /*GILLT_s64*//*Label 323*/ GIMT_Encode4(14902),
4981 /* 14824 */ /*GILLT_v16s8*//*Label 324*/ GIMT_Encode4(14964),
4982 /* 14828 */ /*GILLT_v8s16*//*Label 325*/ GIMT_Encode4(15139),
4983 /* 14832 */ /*GILLT_v4s32*//*Label 326*/ GIMT_Encode4(15488),
4984 /* 14836 */ /*GILLT_v2s64*//*Label 327*/ GIMT_Encode4(15837),
4985 /* 14840 */ // Label 322: @14840
4986 /* 14840 */ GIM_Try, /*On fail goto*//*Label 329*/ GIMT_Encode4(14901),
4987 /* 14845 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
4988 /* 14848 */ GIM_Try, /*On fail goto*//*Label 330*/ GIMT_Encode4(14874), // Rule ID 60 //
4989 /* 14853 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
4990 /* 14857 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
4991 /* 14861 */ // (bitconvert:{ *:[i32] } F32:{ *:[f32] }:$src) => (I32_REINTERPRET_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
4992 /* 14861 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_REINTERPRET_F32),
4993 /* 14866 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4994 /* 14872 */ GIR_RootConstrainSelectedInstOperands,
4995 /* 14873 */ // GIR_Coverage, 60,
4996 /* 14873 */ GIR_Done,
4997 /* 14874 */ // Label 330: @14874
4998 /* 14874 */ GIM_Try, /*On fail goto*//*Label 331*/ GIMT_Encode4(14900), // Rule ID 61 //
4999 /* 14879 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5000 /* 14883 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5001 /* 14887 */ // (bitconvert:{ *:[f32] } I32:{ *:[i32] }:$src) => (F32_REINTERPRET_I32:{ *:[f32] } I32:{ *:[i32] }:$src)
5002 /* 14887 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_REINTERPRET_I32),
5003 /* 14892 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5004 /* 14898 */ GIR_RootConstrainSelectedInstOperands,
5005 /* 14899 */ // GIR_Coverage, 61,
5006 /* 14899 */ GIR_Done,
5007 /* 14900 */ // Label 331: @14900
5008 /* 14900 */ GIM_Reject,
5009 /* 14901 */ // Label 329: @14901
5010 /* 14901 */ GIM_Reject,
5011 /* 14902 */ // Label 323: @14902
5012 /* 14902 */ GIM_Try, /*On fail goto*//*Label 332*/ GIMT_Encode4(14963),
5013 /* 14907 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
5014 /* 14910 */ GIM_Try, /*On fail goto*//*Label 333*/ GIMT_Encode4(14936), // Rule ID 62 //
5015 /* 14915 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
5016 /* 14919 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5017 /* 14923 */ // (bitconvert:{ *:[i64] } F64:{ *:[f64] }:$src) => (I64_REINTERPRET_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
5018 /* 14923 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_REINTERPRET_F64),
5019 /* 14928 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5020 /* 14934 */ GIR_RootConstrainSelectedInstOperands,
5021 /* 14935 */ // GIR_Coverage, 62,
5022 /* 14935 */ GIR_Done,
5023 /* 14936 */ // Label 333: @14936
5024 /* 14936 */ GIM_Try, /*On fail goto*//*Label 334*/ GIMT_Encode4(14962), // Rule ID 63 //
5025 /* 14941 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5026 /* 14945 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
5027 /* 14949 */ // (bitconvert:{ *:[f64] } I64:{ *:[i64] }:$src) => (F64_REINTERPRET_I64:{ *:[f64] } I64:{ *:[i64] }:$src)
5028 /* 14949 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_REINTERPRET_I64),
5029 /* 14954 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5030 /* 14960 */ GIR_RootConstrainSelectedInstOperands,
5031 /* 14961 */ // GIR_Coverage, 63,
5032 /* 14961 */ GIR_Done,
5033 /* 14962 */ // Label 334: @14962
5034 /* 14962 */ GIM_Reject,
5035 /* 14963 */ // Label 332: @14963
5036 /* 14963 */ GIM_Reject,
5037 /* 14964 */ // Label 324: @14964
5038 /* 14964 */ GIM_Try, /*On fail goto*//*Label 335*/ GIMT_Encode4(14993), // Rule ID 1209 //
5039 /* 14969 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5040 /* 14972 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5041 /* 14976 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5042 /* 14980 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v16i8] }:$v
5043 /* 14980 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5044 /* 14983 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5045 /* 14985 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5046 /* 14987 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5047 /* 14992 */ // GIR_Coverage, 1209,
5048 /* 14992 */ GIR_EraseRootFromParent_Done,
5049 /* 14993 */ // Label 335: @14993
5050 /* 14993 */ GIM_Try, /*On fail goto*//*Label 336*/ GIMT_Encode4(15022), // Rule ID 1210 //
5051 /* 14998 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5052 /* 15001 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5053 /* 15005 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5054 /* 15009 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v16i8] }:$v
5055 /* 15009 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5056 /* 15012 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5057 /* 15014 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5058 /* 15016 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5059 /* 15021 */ // GIR_Coverage, 1210,
5060 /* 15021 */ GIR_EraseRootFromParent_Done,
5061 /* 15022 */ // Label 336: @15022
5062 /* 15022 */ GIM_Try, /*On fail goto*//*Label 337*/ GIMT_Encode4(15051), // Rule ID 1211 //
5063 /* 15027 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5064 /* 15030 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5065 /* 15034 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5066 /* 15038 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v16i8] }:$v
5067 /* 15038 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5068 /* 15041 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5069 /* 15043 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5070 /* 15045 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5071 /* 15050 */ // GIR_Coverage, 1211,
5072 /* 15050 */ GIR_EraseRootFromParent_Done,
5073 /* 15051 */ // Label 337: @15051
5074 /* 15051 */ GIM_Try, /*On fail goto*//*Label 338*/ GIMT_Encode4(15080), // Rule ID 1212 //
5075 /* 15056 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5076 /* 15059 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5077 /* 15063 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5078 /* 15067 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v16i8] }:$v
5079 /* 15067 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5080 /* 15070 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5081 /* 15072 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5082 /* 15074 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5083 /* 15079 */ // GIR_Coverage, 1212,
5084 /* 15079 */ GIR_EraseRootFromParent_Done,
5085 /* 15080 */ // Label 338: @15080
5086 /* 15080 */ GIM_Try, /*On fail goto*//*Label 339*/ GIMT_Encode4(15109), // Rule ID 1213 //
5087 /* 15085 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5088 /* 15088 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5089 /* 15092 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5090 /* 15096 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v16i8] }:$v
5091 /* 15096 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5092 /* 15099 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5093 /* 15101 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5094 /* 15103 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5095 /* 15108 */ // GIR_Coverage, 1213,
5096 /* 15108 */ GIR_EraseRootFromParent_Done,
5097 /* 15109 */ // Label 339: @15109
5098 /* 15109 */ GIM_Try, /*On fail goto*//*Label 340*/ GIMT_Encode4(15138), // Rule ID 1214 //
5099 /* 15114 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5100 /* 15117 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5101 /* 15121 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5102 /* 15125 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v16i8] }:$v
5103 /* 15125 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5104 /* 15128 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5105 /* 15130 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5106 /* 15132 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5107 /* 15137 */ // GIR_Coverage, 1214,
5108 /* 15137 */ GIR_EraseRootFromParent_Done,
5109 /* 15138 */ // Label 340: @15138
5110 /* 15138 */ GIM_Reject,
5111 /* 15139 */ // Label 325: @15139
5112 /* 15139 */ GIM_Try, /*On fail goto*//*Label 341*/ GIMT_Encode4(15168), // Rule ID 1215 //
5113 /* 15144 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
5114 /* 15147 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5115 /* 15151 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5116 /* 15155 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v8i16] }:$v
5117 /* 15155 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5118 /* 15158 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5119 /* 15160 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5120 /* 15162 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5121 /* 15167 */ // GIR_Coverage, 1215,
5122 /* 15167 */ GIR_EraseRootFromParent_Done,
5123 /* 15168 */ // Label 341: @15168
5124 /* 15168 */ GIM_Try, /*On fail goto*//*Label 342*/ GIMT_Encode4(15197), // Rule ID 1216 //
5125 /* 15173 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5126 /* 15176 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5127 /* 15180 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5128 /* 15184 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v8i16] }:$v
5129 /* 15184 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5130 /* 15187 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5131 /* 15189 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5132 /* 15191 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5133 /* 15196 */ // GIR_Coverage, 1216,
5134 /* 15196 */ GIR_EraseRootFromParent_Done,
5135 /* 15197 */ // Label 342: @15197
5136 /* 15197 */ GIM_Try, /*On fail goto*//*Label 343*/ GIMT_Encode4(15226), // Rule ID 1217 //
5137 /* 15202 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5138 /* 15205 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5139 /* 15209 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5140 /* 15213 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v8i16] }:$v
5141 /* 15213 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5142 /* 15216 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5143 /* 15218 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5144 /* 15220 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5145 /* 15225 */ // GIR_Coverage, 1217,
5146 /* 15225 */ GIR_EraseRootFromParent_Done,
5147 /* 15226 */ // Label 343: @15226
5148 /* 15226 */ GIM_Try, /*On fail goto*//*Label 344*/ GIMT_Encode4(15255), // Rule ID 1218 //
5149 /* 15231 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5150 /* 15234 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5151 /* 15238 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5152 /* 15242 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v8i16] }:$v
5153 /* 15242 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5154 /* 15245 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5155 /* 15247 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5156 /* 15249 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5157 /* 15254 */ // GIR_Coverage, 1218,
5158 /* 15254 */ GIR_EraseRootFromParent_Done,
5159 /* 15255 */ // Label 344: @15255
5160 /* 15255 */ GIM_Try, /*On fail goto*//*Label 345*/ GIMT_Encode4(15284), // Rule ID 1219 //
5161 /* 15260 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5162 /* 15263 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5163 /* 15267 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5164 /* 15271 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v8i16] }:$v
5165 /* 15271 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5166 /* 15274 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5167 /* 15276 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5168 /* 15278 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5169 /* 15283 */ // GIR_Coverage, 1219,
5170 /* 15283 */ GIR_EraseRootFromParent_Done,
5171 /* 15284 */ // Label 345: @15284
5172 /* 15284 */ GIM_Try, /*On fail goto*//*Label 346*/ GIMT_Encode4(15313), // Rule ID 1220 //
5173 /* 15289 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5174 /* 15292 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5175 /* 15296 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5176 /* 15300 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v8i16] }:$v
5177 /* 15300 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5178 /* 15303 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5179 /* 15305 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5180 /* 15307 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5181 /* 15312 */ // GIR_Coverage, 1220,
5182 /* 15312 */ GIR_EraseRootFromParent_Done,
5183 /* 15313 */ // Label 346: @15313
5184 /* 15313 */ GIM_Try, /*On fail goto*//*Label 347*/ GIMT_Encode4(15342), // Rule ID 1245 //
5185 /* 15318 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
5186 /* 15321 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5187 /* 15325 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5188 /* 15329 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v8f16] }:$v
5189 /* 15329 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5190 /* 15332 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5191 /* 15334 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5192 /* 15336 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5193 /* 15341 */ // GIR_Coverage, 1245,
5194 /* 15341 */ GIR_EraseRootFromParent_Done,
5195 /* 15342 */ // Label 347: @15342
5196 /* 15342 */ GIM_Try, /*On fail goto*//*Label 348*/ GIMT_Encode4(15371), // Rule ID 1246 //
5197 /* 15347 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5198 /* 15350 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5199 /* 15354 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5200 /* 15358 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v8f16] }:$v
5201 /* 15358 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5202 /* 15361 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5203 /* 15363 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5204 /* 15365 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5205 /* 15370 */ // GIR_Coverage, 1246,
5206 /* 15370 */ GIR_EraseRootFromParent_Done,
5207 /* 15371 */ // Label 348: @15371
5208 /* 15371 */ GIM_Try, /*On fail goto*//*Label 349*/ GIMT_Encode4(15400), // Rule ID 1247 //
5209 /* 15376 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5210 /* 15379 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5211 /* 15383 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5212 /* 15387 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v8f16] }:$v
5213 /* 15387 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5214 /* 15390 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5215 /* 15392 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5216 /* 15394 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5217 /* 15399 */ // GIR_Coverage, 1247,
5218 /* 15399 */ GIR_EraseRootFromParent_Done,
5219 /* 15400 */ // Label 349: @15400
5220 /* 15400 */ GIM_Try, /*On fail goto*//*Label 350*/ GIMT_Encode4(15429), // Rule ID 1248 //
5221 /* 15405 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5222 /* 15408 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5223 /* 15412 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5224 /* 15416 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v8f16] }:$v
5225 /* 15416 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5226 /* 15419 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5227 /* 15421 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5228 /* 15423 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5229 /* 15428 */ // GIR_Coverage, 1248,
5230 /* 15428 */ GIR_EraseRootFromParent_Done,
5231 /* 15429 */ // Label 350: @15429
5232 /* 15429 */ GIM_Try, /*On fail goto*//*Label 351*/ GIMT_Encode4(15458), // Rule ID 1249 //
5233 /* 15434 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5234 /* 15437 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5235 /* 15441 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5236 /* 15445 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v8f16] }:$v
5237 /* 15445 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5238 /* 15448 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5239 /* 15450 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5240 /* 15452 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5241 /* 15457 */ // GIR_Coverage, 1249,
5242 /* 15457 */ GIR_EraseRootFromParent_Done,
5243 /* 15458 */ // Label 351: @15458
5244 /* 15458 */ GIM_Try, /*On fail goto*//*Label 352*/ GIMT_Encode4(15487), // Rule ID 1250 //
5245 /* 15463 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5246 /* 15466 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5247 /* 15470 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5248 /* 15474 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v8f16] }:$v
5249 /* 15474 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5250 /* 15477 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5251 /* 15479 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5252 /* 15481 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5253 /* 15486 */ // GIR_Coverage, 1250,
5254 /* 15486 */ GIR_EraseRootFromParent_Done,
5255 /* 15487 */ // Label 352: @15487
5256 /* 15487 */ GIM_Reject,
5257 /* 15488 */ // Label 326: @15488
5258 /* 15488 */ GIM_Try, /*On fail goto*//*Label 353*/ GIMT_Encode4(15517), // Rule ID 1221 //
5259 /* 15493 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
5260 /* 15496 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5261 /* 15500 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5262 /* 15504 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v4i32] }:$v
5263 /* 15504 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5264 /* 15507 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5265 /* 15509 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5266 /* 15511 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5267 /* 15516 */ // GIR_Coverage, 1221,
5268 /* 15516 */ GIR_EraseRootFromParent_Done,
5269 /* 15517 */ // Label 353: @15517
5270 /* 15517 */ GIM_Try, /*On fail goto*//*Label 354*/ GIMT_Encode4(15546), // Rule ID 1222 //
5271 /* 15522 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5272 /* 15525 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5273 /* 15529 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5274 /* 15533 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v4i32] }:$v
5275 /* 15533 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5276 /* 15536 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5277 /* 15538 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5278 /* 15540 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5279 /* 15545 */ // GIR_Coverage, 1222,
5280 /* 15545 */ GIR_EraseRootFromParent_Done,
5281 /* 15546 */ // Label 354: @15546
5282 /* 15546 */ GIM_Try, /*On fail goto*//*Label 355*/ GIMT_Encode4(15575), // Rule ID 1223 //
5283 /* 15551 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5284 /* 15554 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5285 /* 15558 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5286 /* 15562 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v4i32] }:$v
5287 /* 15562 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5288 /* 15565 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5289 /* 15567 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5290 /* 15569 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5291 /* 15574 */ // GIR_Coverage, 1223,
5292 /* 15574 */ GIR_EraseRootFromParent_Done,
5293 /* 15575 */ // Label 355: @15575
5294 /* 15575 */ GIM_Try, /*On fail goto*//*Label 356*/ GIMT_Encode4(15604), // Rule ID 1224 //
5295 /* 15580 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5296 /* 15583 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5297 /* 15587 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5298 /* 15591 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v4i32] }:$v
5299 /* 15591 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5300 /* 15594 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5301 /* 15596 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5302 /* 15598 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5303 /* 15603 */ // GIR_Coverage, 1224,
5304 /* 15603 */ GIR_EraseRootFromParent_Done,
5305 /* 15604 */ // Label 356: @15604
5306 /* 15604 */ GIM_Try, /*On fail goto*//*Label 357*/ GIMT_Encode4(15633), // Rule ID 1225 //
5307 /* 15609 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5308 /* 15612 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5309 /* 15616 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5310 /* 15620 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v4i32] }:$v
5311 /* 15620 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5312 /* 15623 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5313 /* 15625 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5314 /* 15627 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5315 /* 15632 */ // GIR_Coverage, 1225,
5316 /* 15632 */ GIR_EraseRootFromParent_Done,
5317 /* 15633 */ // Label 357: @15633
5318 /* 15633 */ GIM_Try, /*On fail goto*//*Label 358*/ GIMT_Encode4(15662), // Rule ID 1226 //
5319 /* 15638 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5320 /* 15641 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5321 /* 15645 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5322 /* 15649 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v4i32] }:$v
5323 /* 15649 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5324 /* 15652 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5325 /* 15654 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5326 /* 15656 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5327 /* 15661 */ // GIR_Coverage, 1226,
5328 /* 15661 */ GIR_EraseRootFromParent_Done,
5329 /* 15662 */ // Label 358: @15662
5330 /* 15662 */ GIM_Try, /*On fail goto*//*Label 359*/ GIMT_Encode4(15691), // Rule ID 1233 //
5331 /* 15667 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
5332 /* 15670 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5333 /* 15674 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5334 /* 15678 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v4f32] }:$v
5335 /* 15678 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5336 /* 15681 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5337 /* 15683 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5338 /* 15685 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5339 /* 15690 */ // GIR_Coverage, 1233,
5340 /* 15690 */ GIR_EraseRootFromParent_Done,
5341 /* 15691 */ // Label 359: @15691
5342 /* 15691 */ GIM_Try, /*On fail goto*//*Label 360*/ GIMT_Encode4(15720), // Rule ID 1234 //
5343 /* 15696 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5344 /* 15699 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5345 /* 15703 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5346 /* 15707 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v4f32] }:$v
5347 /* 15707 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5348 /* 15710 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5349 /* 15712 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5350 /* 15714 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5351 /* 15719 */ // GIR_Coverage, 1234,
5352 /* 15719 */ GIR_EraseRootFromParent_Done,
5353 /* 15720 */ // Label 360: @15720
5354 /* 15720 */ GIM_Try, /*On fail goto*//*Label 361*/ GIMT_Encode4(15749), // Rule ID 1235 //
5355 /* 15725 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5356 /* 15728 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5357 /* 15732 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5358 /* 15736 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v4f32] }:$v
5359 /* 15736 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5360 /* 15739 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5361 /* 15741 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5362 /* 15743 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5363 /* 15748 */ // GIR_Coverage, 1235,
5364 /* 15748 */ GIR_EraseRootFromParent_Done,
5365 /* 15749 */ // Label 361: @15749
5366 /* 15749 */ GIM_Try, /*On fail goto*//*Label 362*/ GIMT_Encode4(15778), // Rule ID 1236 //
5367 /* 15754 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5368 /* 15757 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5369 /* 15761 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5370 /* 15765 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v4f32] }:$v
5371 /* 15765 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5372 /* 15768 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5373 /* 15770 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5374 /* 15772 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5375 /* 15777 */ // GIR_Coverage, 1236,
5376 /* 15777 */ GIR_EraseRootFromParent_Done,
5377 /* 15778 */ // Label 362: @15778
5378 /* 15778 */ GIM_Try, /*On fail goto*//*Label 363*/ GIMT_Encode4(15807), // Rule ID 1237 //
5379 /* 15783 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5380 /* 15786 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5381 /* 15790 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5382 /* 15794 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v4f32] }:$v
5383 /* 15794 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5384 /* 15797 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5385 /* 15799 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5386 /* 15801 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5387 /* 15806 */ // GIR_Coverage, 1237,
5388 /* 15806 */ GIR_EraseRootFromParent_Done,
5389 /* 15807 */ // Label 363: @15807
5390 /* 15807 */ GIM_Try, /*On fail goto*//*Label 364*/ GIMT_Encode4(15836), // Rule ID 1238 //
5391 /* 15812 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5392 /* 15815 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5393 /* 15819 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5394 /* 15823 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v4f32] }:$v
5395 /* 15823 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5396 /* 15826 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5397 /* 15828 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5398 /* 15830 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5399 /* 15835 */ // GIR_Coverage, 1238,
5400 /* 15835 */ GIR_EraseRootFromParent_Done,
5401 /* 15836 */ // Label 364: @15836
5402 /* 15836 */ GIM_Reject,
5403 /* 15837 */ // Label 327: @15837
5404 /* 15837 */ GIM_Try, /*On fail goto*//*Label 365*/ GIMT_Encode4(15866), // Rule ID 1227 //
5405 /* 15842 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
5406 /* 15845 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5407 /* 15849 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5408 /* 15853 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v2i64] }:$v
5409 /* 15853 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5410 /* 15856 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5411 /* 15858 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5412 /* 15860 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5413 /* 15865 */ // GIR_Coverage, 1227,
5414 /* 15865 */ GIR_EraseRootFromParent_Done,
5415 /* 15866 */ // Label 365: @15866
5416 /* 15866 */ GIM_Try, /*On fail goto*//*Label 366*/ GIMT_Encode4(15895), // Rule ID 1228 //
5417 /* 15871 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5418 /* 15874 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5419 /* 15878 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5420 /* 15882 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v2i64] }:$v
5421 /* 15882 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5422 /* 15885 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5423 /* 15887 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5424 /* 15889 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5425 /* 15894 */ // GIR_Coverage, 1228,
5426 /* 15894 */ GIR_EraseRootFromParent_Done,
5427 /* 15895 */ // Label 366: @15895
5428 /* 15895 */ GIM_Try, /*On fail goto*//*Label 367*/ GIMT_Encode4(15924), // Rule ID 1229 //
5429 /* 15900 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5430 /* 15903 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5431 /* 15907 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5432 /* 15911 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v2i64] }:$v
5433 /* 15911 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5434 /* 15914 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5435 /* 15916 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5436 /* 15918 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5437 /* 15923 */ // GIR_Coverage, 1229,
5438 /* 15923 */ GIR_EraseRootFromParent_Done,
5439 /* 15924 */ // Label 367: @15924
5440 /* 15924 */ GIM_Try, /*On fail goto*//*Label 368*/ GIMT_Encode4(15953), // Rule ID 1230 //
5441 /* 15929 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5442 /* 15932 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5443 /* 15936 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5444 /* 15940 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v2i64] }:$v
5445 /* 15940 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5446 /* 15943 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5447 /* 15945 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5448 /* 15947 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5449 /* 15952 */ // GIR_Coverage, 1230,
5450 /* 15952 */ GIR_EraseRootFromParent_Done,
5451 /* 15953 */ // Label 368: @15953
5452 /* 15953 */ GIM_Try, /*On fail goto*//*Label 369*/ GIMT_Encode4(15982), // Rule ID 1231 //
5453 /* 15958 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5454 /* 15961 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5455 /* 15965 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5456 /* 15969 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v2i64] }:$v
5457 /* 15969 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5458 /* 15972 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5459 /* 15974 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5460 /* 15976 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5461 /* 15981 */ // GIR_Coverage, 1231,
5462 /* 15981 */ GIR_EraseRootFromParent_Done,
5463 /* 15982 */ // Label 369: @15982
5464 /* 15982 */ GIM_Try, /*On fail goto*//*Label 370*/ GIMT_Encode4(16011), // Rule ID 1232 //
5465 /* 15987 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5466 /* 15990 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5467 /* 15994 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5468 /* 15998 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v2i64] }:$v
5469 /* 15998 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5470 /* 16001 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5471 /* 16003 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5472 /* 16005 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5473 /* 16010 */ // GIR_Coverage, 1232,
5474 /* 16010 */ GIR_EraseRootFromParent_Done,
5475 /* 16011 */ // Label 370: @16011
5476 /* 16011 */ GIM_Try, /*On fail goto*//*Label 371*/ GIMT_Encode4(16040), // Rule ID 1239 //
5477 /* 16016 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
5478 /* 16019 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5479 /* 16023 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5480 /* 16027 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v2f64] }:$v
5481 /* 16027 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5482 /* 16030 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5483 /* 16032 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5484 /* 16034 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5485 /* 16039 */ // GIR_Coverage, 1239,
5486 /* 16039 */ GIR_EraseRootFromParent_Done,
5487 /* 16040 */ // Label 371: @16040
5488 /* 16040 */ GIM_Try, /*On fail goto*//*Label 372*/ GIMT_Encode4(16069), // Rule ID 1240 //
5489 /* 16045 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5490 /* 16048 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5491 /* 16052 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5492 /* 16056 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v2f64] }:$v
5493 /* 16056 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5494 /* 16059 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5495 /* 16061 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5496 /* 16063 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5497 /* 16068 */ // GIR_Coverage, 1240,
5498 /* 16068 */ GIR_EraseRootFromParent_Done,
5499 /* 16069 */ // Label 372: @16069
5500 /* 16069 */ GIM_Try, /*On fail goto*//*Label 373*/ GIMT_Encode4(16098), // Rule ID 1241 //
5501 /* 16074 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5502 /* 16077 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5503 /* 16081 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5504 /* 16085 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v2f64] }:$v
5505 /* 16085 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5506 /* 16088 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5507 /* 16090 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5508 /* 16092 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5509 /* 16097 */ // GIR_Coverage, 1241,
5510 /* 16097 */ GIR_EraseRootFromParent_Done,
5511 /* 16098 */ // Label 373: @16098
5512 /* 16098 */ GIM_Try, /*On fail goto*//*Label 374*/ GIMT_Encode4(16127), // Rule ID 1242 //
5513 /* 16103 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5514 /* 16106 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5515 /* 16110 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5516 /* 16114 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v2f64] }:$v
5517 /* 16114 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5518 /* 16117 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5519 /* 16119 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5520 /* 16121 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5521 /* 16126 */ // GIR_Coverage, 1242,
5522 /* 16126 */ GIR_EraseRootFromParent_Done,
5523 /* 16127 */ // Label 374: @16127
5524 /* 16127 */ GIM_Try, /*On fail goto*//*Label 375*/ GIMT_Encode4(16156), // Rule ID 1243 //
5525 /* 16132 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5526 /* 16135 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5527 /* 16139 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5528 /* 16143 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v2f64] }:$v
5529 /* 16143 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5530 /* 16146 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5531 /* 16148 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5532 /* 16150 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5533 /* 16155 */ // GIR_Coverage, 1243,
5534 /* 16155 */ GIR_EraseRootFromParent_Done,
5535 /* 16156 */ // Label 375: @16156
5536 /* 16156 */ GIM_Try, /*On fail goto*//*Label 376*/ GIMT_Encode4(16185), // Rule ID 1244 //
5537 /* 16161 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5538 /* 16164 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5539 /* 16168 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5540 /* 16172 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v2f64] }:$v
5541 /* 16172 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5542 /* 16175 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5543 /* 16177 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5544 /* 16179 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5545 /* 16184 */ // GIR_Coverage, 1244,
5546 /* 16184 */ GIR_EraseRootFromParent_Done,
5547 /* 16185 */ // Label 376: @16185
5548 /* 16185 */ GIM_Reject,
5549 /* 16186 */ // Label 328: @16186
5550 /* 16186 */ GIM_Reject,
5551 /* 16187 */ // Label 13: @16187
5552 /* 16187 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 382*/ GIMT_Encode4(16381),
5553 /* 16198 */ /*GILLT_s32*//*Label 377*/ GIMT_Encode4(16222),
5554 /* 16202 */ /*GILLT_s64*//*Label 378*/ GIMT_Encode4(16252), GIMT_Encode4(0),
5555 /* 16210 */ /*GILLT_v8s16*//*Label 379*/ GIMT_Encode4(16282),
5556 /* 16214 */ /*GILLT_v4s32*//*Label 380*/ GIMT_Encode4(16315),
5557 /* 16218 */ /*GILLT_v2s64*//*Label 381*/ GIMT_Encode4(16348),
5558 /* 16222 */ // Label 377: @16222
5559 /* 16222 */ GIM_Try, /*On fail goto*//*Label 383*/ GIMT_Encode4(16251), // Rule ID 148 //
5560 /* 16227 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
5561 /* 16230 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5562 /* 16234 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5563 /* 16238 */ // (ftrunc:{ *:[f32] } F32:{ *:[f32] }:$src) => (TRUNC_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
5564 /* 16238 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F32),
5565 /* 16243 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5566 /* 16249 */ GIR_RootConstrainSelectedInstOperands,
5567 /* 16250 */ // GIR_Coverage, 148,
5568 /* 16250 */ GIR_Done,
5569 /* 16251 */ // Label 383: @16251
5570 /* 16251 */ GIM_Reject,
5571 /* 16252 */ // Label 378: @16252
5572 /* 16252 */ GIM_Try, /*On fail goto*//*Label 384*/ GIMT_Encode4(16281), // Rule ID 149 //
5573 /* 16257 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
5574 /* 16260 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5575 /* 16264 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5576 /* 16268 */ // (ftrunc:{ *:[f64] } F64:{ *:[f64] }:$src) => (TRUNC_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
5577 /* 16268 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F64),
5578 /* 16273 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5579 /* 16279 */ GIR_RootConstrainSelectedInstOperands,
5580 /* 16280 */ // GIR_Coverage, 149,
5581 /* 16280 */ GIR_Done,
5582 /* 16281 */ // Label 384: @16281
5583 /* 16281 */ GIM_Reject,
5584 /* 16282 */ // Label 379: @16282
5585 /* 16282 */ GIM_Try, /*On fail goto*//*Label 385*/ GIMT_Encode4(16314), // Rule ID 343 //
5586 /* 16287 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
5587 /* 16290 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5588 /* 16293 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5589 /* 16297 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5590 /* 16301 */ // (ftrunc:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (TRUNC_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
5591 /* 16301 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F16x8),
5592 /* 16306 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5593 /* 16312 */ GIR_RootConstrainSelectedInstOperands,
5594 /* 16313 */ // GIR_Coverage, 343,
5595 /* 16313 */ GIR_Done,
5596 /* 16314 */ // Label 385: @16314
5597 /* 16314 */ GIM_Reject,
5598 /* 16315 */ // Label 380: @16315
5599 /* 16315 */ GIM_Try, /*On fail goto*//*Label 386*/ GIMT_Encode4(16347), // Rule ID 335 //
5600 /* 16320 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5601 /* 16323 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5602 /* 16326 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5603 /* 16330 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5604 /* 16334 */ // (ftrunc:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (TRUNC_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
5605 /* 16334 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F32x4),
5606 /* 16339 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5607 /* 16345 */ GIR_RootConstrainSelectedInstOperands,
5608 /* 16346 */ // GIR_Coverage, 335,
5609 /* 16346 */ GIR_Done,
5610 /* 16347 */ // Label 386: @16347
5611 /* 16347 */ GIM_Reject,
5612 /* 16348 */ // Label 381: @16348
5613 /* 16348 */ GIM_Try, /*On fail goto*//*Label 387*/ GIMT_Encode4(16380), // Rule ID 339 //
5614 /* 16353 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5615 /* 16356 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5616 /* 16359 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5617 /* 16363 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5618 /* 16367 */ // (ftrunc:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (TRUNC_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
5619 /* 16367 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F64x2),
5620 /* 16372 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5621 /* 16378 */ GIR_RootConstrainSelectedInstOperands,
5622 /* 16379 */ // GIR_Coverage, 339,
5623 /* 16379 */ GIR_Done,
5624 /* 16380 */ // Label 387: @16380
5625 /* 16380 */ GIM_Reject,
5626 /* 16381 */ // Label 382: @16381
5627 /* 16381 */ GIM_Reject,
5628 /* 16382 */ // Label 14: @16382
5629 /* 16382 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 393*/ GIMT_Encode4(16559),
5630 /* 16393 */ /*GILLT_s32*//*Label 388*/ GIMT_Encode4(16417),
5631 /* 16397 */ /*GILLT_s64*//*Label 389*/ GIMT_Encode4(16443), GIMT_Encode4(0),
5632 /* 16405 */ /*GILLT_v8s16*//*Label 390*/ GIMT_Encode4(16469),
5633 /* 16409 */ /*GILLT_v4s32*//*Label 391*/ GIMT_Encode4(16499),
5634 /* 16413 */ /*GILLT_v2s64*//*Label 392*/ GIMT_Encode4(16529),
5635 /* 16417 */ // Label 388: @16417
5636 /* 16417 */ GIM_Try, /*On fail goto*//*Label 394*/ GIMT_Encode4(16442), // Rule ID 675 //
5637 /* 16422 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
5638 /* 16425 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5639 /* 16429 */ // (froundeven:{ *:[f32] } f32:{ *:[f32] }:$src) => (NEAREST_F32:{ *:[f32] } f32:{ *:[f32] }:$src)
5640 /* 16429 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32),
5641 /* 16434 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5642 /* 16440 */ GIR_RootConstrainSelectedInstOperands,
5643 /* 16441 */ // GIR_Coverage, 675,
5644 /* 16441 */ GIR_Done,
5645 /* 16442 */ // Label 394: @16442
5646 /* 16442 */ GIM_Reject,
5647 /* 16443 */ // Label 389: @16443
5648 /* 16443 */ GIM_Try, /*On fail goto*//*Label 395*/ GIMT_Encode4(16468), // Rule ID 676 //
5649 /* 16448 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
5650 /* 16451 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5651 /* 16455 */ // (froundeven:{ *:[f64] } f64:{ *:[f64] }:$src) => (NEAREST_F64:{ *:[f64] } f64:{ *:[f64] }:$src)
5652 /* 16455 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64),
5653 /* 16460 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5654 /* 16466 */ GIR_RootConstrainSelectedInstOperands,
5655 /* 16467 */ // GIR_Coverage, 676,
5656 /* 16467 */ GIR_Done,
5657 /* 16468 */ // Label 395: @16468
5658 /* 16468 */ GIM_Reject,
5659 /* 16469 */ // Label 390: @16469
5660 /* 16469 */ GIM_Try, /*On fail goto*//*Label 396*/ GIMT_Encode4(16498), // Rule ID 1184 //
5661 /* 16474 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
5662 /* 16477 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5663 /* 16481 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5664 /* 16485 */ // (froundeven:{ *:[v8f16] } V128:{ *:[v8f16] }:$src) => (NEAREST_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$src)
5665 /* 16485 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F16x8),
5666 /* 16490 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5667 /* 16496 */ GIR_RootConstrainSelectedInstOperands,
5668 /* 16497 */ // GIR_Coverage, 1184,
5669 /* 16497 */ GIR_Done,
5670 /* 16498 */ // Label 396: @16498
5671 /* 16498 */ GIM_Reject,
5672 /* 16499 */ // Label 391: @16499
5673 /* 16499 */ GIM_Try, /*On fail goto*//*Label 397*/ GIMT_Encode4(16528), // Rule ID 1182 //
5674 /* 16504 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
5675 /* 16507 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5676 /* 16511 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5677 /* 16515 */ // (froundeven:{ *:[v4f32] } V128:{ *:[v4f32] }:$src) => (NEAREST_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$src)
5678 /* 16515 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32x4),
5679 /* 16520 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5680 /* 16526 */ GIR_RootConstrainSelectedInstOperands,
5681 /* 16527 */ // GIR_Coverage, 1182,
5682 /* 16527 */ GIR_Done,
5683 /* 16528 */ // Label 397: @16528
5684 /* 16528 */ GIM_Reject,
5685 /* 16529 */ // Label 392: @16529
5686 /* 16529 */ GIM_Try, /*On fail goto*//*Label 398*/ GIMT_Encode4(16558), // Rule ID 1183 //
5687 /* 16534 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
5688 /* 16537 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5689 /* 16541 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5690 /* 16545 */ // (froundeven:{ *:[v2f64] } V128:{ *:[v2f64] }:$src) => (NEAREST_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$src)
5691 /* 16545 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64x2),
5692 /* 16550 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5693 /* 16556 */ GIR_RootConstrainSelectedInstOperands,
5694 /* 16557 */ // GIR_Coverage, 1183,
5695 /* 16557 */ GIR_Done,
5696 /* 16558 */ // Label 398: @16558
5697 /* 16558 */ GIM_Reject,
5698 /* 16559 */ // Label 393: @16559
5699 /* 16559 */ GIM_Reject,
5700 /* 16560 */ // Label 15: @16560
5701 /* 16560 */ GIM_Try, /*On fail goto*//*Label 399*/ GIMT_Encode4(16700),
5702 /* 16565 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
5703 /* 16568 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
5704 /* 16571 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
5705 /* 16575 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5706 /* 16579 */ GIM_Try, /*On fail goto*//*Label 400*/ GIMT_Encode4(16639), // Rule ID 1263 //
5707 /* 16584 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAddr32),
5708 /* 16587 */ // MIs[0] addr
5709 /* 16587 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
5710 /* 16591 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5711 /* 16595 */ // (ld:{ *:[v2f64] } I32:{ *:[i32] }:$addr)<<P:Predicate_unindexedload>><<P:Predicate_extload>> => (promote_low_F64x2:{ *:[v2f64] } (LOAD_ZERO_64_A32:{ *:[v16i8] } 0:{ *:[i32] }, 0:{ *:[i32] }, I32:{ *:[i32] }:$addr))
5712 /* 16595 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s8,
5713 /* 16598 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_ZERO_64_A32),
5714 /* 16602 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
5715 /* 16607 */ GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
5716 /* 16610 */ GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
5717 /* 16613 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // addr
5718 /* 16617 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5719 /* 16620 */ GIR_MergeMemOperands, /*InsnID*/1, /*NumInsns*/1, /*MergeInsnID's*/0,
5720 /* 16624 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
5721 /* 16626 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::promote_low_F64x2),
5722 /* 16629 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5723 /* 16631 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
5724 /* 16634 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5725 /* 16637 */ GIR_RootConstrainSelectedInstOperands,
5726 /* 16638 */ // GIR_Coverage, 1263,
5727 /* 16638 */ GIR_EraseRootFromParent_Done,
5728 /* 16639 */ // Label 400: @16639
5729 /* 16639 */ GIM_Try, /*On fail goto*//*Label 401*/ GIMT_Encode4(16699), // Rule ID 1264 //
5730 /* 16644 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasAddr64),
5731 /* 16647 */ // MIs[0] addr
5732 /* 16647 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
5733 /* 16651 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
5734 /* 16655 */ // (ld:{ *:[v2f64] } I64:{ *:[i64] }:$addr)<<P:Predicate_unindexedload>><<P:Predicate_extload>> => (promote_low_F64x2:{ *:[v2f64] } (LOAD_ZERO_64_A64:{ *:[v16i8] } 0:{ *:[i32] }, 0:{ *:[i64] }, I64:{ *:[i64] }:$addr))
5735 /* 16655 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s8,
5736 /* 16658 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_ZERO_64_A64),
5737 /* 16662 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
5738 /* 16667 */ GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
5739 /* 16670 */ GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
5740 /* 16673 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // addr
5741 /* 16677 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5742 /* 16680 */ GIR_MergeMemOperands, /*InsnID*/1, /*NumInsns*/1, /*MergeInsnID's*/0,
5743 /* 16684 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
5744 /* 16686 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::promote_low_F64x2),
5745 /* 16689 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5746 /* 16691 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
5747 /* 16694 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5748 /* 16697 */ GIR_RootConstrainSelectedInstOperands,
5749 /* 16698 */ // GIR_Coverage, 1264,
5750 /* 16698 */ GIR_EraseRootFromParent_Done,
5751 /* 16699 */ // Label 401: @16699
5752 /* 16699 */ GIM_Reject,
5753 /* 16700 */ // Label 399: @16700
5754 /* 16700 */ GIM_Reject,
5755 /* 16701 */ // Label 16: @16701
5756 /* 16701 */ GIM_Try, /*On fail goto*//*Label 402*/ GIMT_Encode4(16728), // Rule ID 17 //
5757 /* 16706 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5758 /* 16709 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5759 /* 16713 */ // MIs[0] dst
5760 /* 16713 */ GIM_CheckIsMBB, /*MI*/0, /*Op*/1,
5761 /* 16716 */ // (brcond I32:{ *:[i32] }:$cond, (bb:{ *:[Other] }):$dst) => (BR_IF (bb:{ *:[Other] }):$dst, I32:{ *:[i32] }:$cond)
5762 /* 16716 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BR_IF),
5763 /* 16719 */ GIR_RootToRootCopy, /*OpIdx*/1, // dst
5764 /* 16721 */ GIR_RootToRootCopy, /*OpIdx*/0, // cond
5765 /* 16723 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5766 /* 16726 */ GIR_RootConstrainSelectedInstOperands,
5767 /* 16727 */ // GIR_Coverage, 17,
5768 /* 16727 */ GIR_EraseRootFromParent_Done,
5769 /* 16728 */ // Label 402: @16728
5770 /* 16728 */ GIM_Reject,
5771 /* 16729 */ // Label 17: @16729
5772 /* 16729 */ GIM_Try, /*On fail goto*//*Label 403*/ GIMT_Encode4(17821),
5773 /* 16734 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
5774 /* 16737 */ GIM_Try, /*On fail goto*//*Label 404*/ GIMT_Encode4(16776), // Rule ID 186 //
5775 /* 16742 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
5776 /* 16745 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_splat_f16x8),
5777 /* 16750 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
5778 /* 16753 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5779 /* 16756 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5780 /* 16760 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5781 /* 16764 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14528:{ *:[iPTR] }, F32:{ *:[f32] }:$x) => (SPLAT_F16x8:{ *:[v8f16] } F32:{ *:[f32] }:$x)
5782 /* 16764 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_F16x8),
5783 /* 16767 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5784 /* 16769 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
5785 /* 16771 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5786 /* 16774 */ GIR_RootConstrainSelectedInstOperands,
5787 /* 16775 */ // GIR_Coverage, 186,
5788 /* 16775 */ GIR_EraseRootFromParent_Done,
5789 /* 16776 */ // Label 404: @16776
5790 /* 16776 */ GIM_Try, /*On fail goto*//*Label 405*/ GIMT_Encode4(16815), // Rule ID 258 //
5791 /* 16781 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5792 /* 16784 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
5793 /* 16789 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5794 /* 16792 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
5795 /* 16795 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5796 /* 16799 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5797 /* 16803 */ // (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v16i8] }:$vec) => (ALLTRUE_I8x16:{ *:[i32] } V128:{ *:[v16i8] }:$vec)
5798 /* 16803 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
5799 /* 16806 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5800 /* 16808 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5801 /* 16810 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5802 /* 16813 */ GIR_RootConstrainSelectedInstOperands,
5803 /* 16814 */ // GIR_Coverage, 258,
5804 /* 16814 */ GIR_EraseRootFromParent_Done,
5805 /* 16815 */ // Label 405: @16815
5806 /* 16815 */ GIM_Try, /*On fail goto*//*Label 406*/ GIMT_Encode4(16854), // Rule ID 259 //
5807 /* 16820 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5808 /* 16823 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
5809 /* 16828 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5810 /* 16831 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
5811 /* 16834 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5812 /* 16838 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5813 /* 16842 */ // (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v8i16] }:$vec) => (ALLTRUE_I16x8:{ *:[i32] } V128:{ *:[v8i16] }:$vec)
5814 /* 16842 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
5815 /* 16845 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5816 /* 16847 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5817 /* 16849 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5818 /* 16852 */ GIR_RootConstrainSelectedInstOperands,
5819 /* 16853 */ // GIR_Coverage, 259,
5820 /* 16853 */ GIR_EraseRootFromParent_Done,
5821 /* 16854 */ // Label 406: @16854
5822 /* 16854 */ GIM_Try, /*On fail goto*//*Label 407*/ GIMT_Encode4(16893), // Rule ID 260 //
5823 /* 16859 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5824 /* 16862 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
5825 /* 16867 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5826 /* 16870 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
5827 /* 16873 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5828 /* 16877 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5829 /* 16881 */ // (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v4i32] }:$vec) => (ALLTRUE_I32x4:{ *:[i32] } V128:{ *:[v4i32] }:$vec)
5830 /* 16881 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
5831 /* 16884 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5832 /* 16886 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5833 /* 16888 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5834 /* 16891 */ GIR_RootConstrainSelectedInstOperands,
5835 /* 16892 */ // GIR_Coverage, 260,
5836 /* 16892 */ GIR_EraseRootFromParent_Done,
5837 /* 16893 */ // Label 407: @16893
5838 /* 16893 */ GIM_Try, /*On fail goto*//*Label 408*/ GIMT_Encode4(16932), // Rule ID 261 //
5839 /* 16898 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5840 /* 16901 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
5841 /* 16906 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5842 /* 16909 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
5843 /* 16912 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5844 /* 16916 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5845 /* 16920 */ // (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v2i64] }:$vec) => (ALLTRUE_I64x2:{ *:[i32] } V128:{ *:[v2i64] }:$vec)
5846 /* 16920 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
5847 /* 16923 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5848 /* 16925 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5849 /* 16927 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5850 /* 16930 */ GIR_RootConstrainSelectedInstOperands,
5851 /* 16931 */ // GIR_Coverage, 261,
5852 /* 16931 */ GIR_EraseRootFromParent_Done,
5853 /* 16932 */ // Label 408: @16932
5854 /* 16932 */ GIM_Try, /*On fail goto*//*Label 409*/ GIMT_Encode4(16971), // Rule ID 262 //
5855 /* 16937 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5856 /* 16940 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitmask),
5857 /* 16945 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5858 /* 16948 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
5859 /* 16951 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5860 /* 16955 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5861 /* 16959 */ // (intrinsic_wo_chain:{ *:[i32] } 14482:{ *:[iPTR] }, V128:{ *:[v16i8] }:$vec) => (BITMASK_I8x16:{ *:[i32] } V128:{ *:[v16i8] }:$vec)
5862 /* 16959 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I8x16),
5863 /* 16962 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5864 /* 16964 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5865 /* 16966 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5866 /* 16969 */ GIR_RootConstrainSelectedInstOperands,
5867 /* 16970 */ // GIR_Coverage, 262,
5868 /* 16970 */ GIR_EraseRootFromParent_Done,
5869 /* 16971 */ // Label 409: @16971
5870 /* 16971 */ GIM_Try, /*On fail goto*//*Label 410*/ GIMT_Encode4(17010), // Rule ID 263 //
5871 /* 16976 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5872 /* 16979 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitmask),
5873 /* 16984 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5874 /* 16987 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
5875 /* 16990 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5876 /* 16994 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5877 /* 16998 */ // (intrinsic_wo_chain:{ *:[i32] } 14482:{ *:[iPTR] }, V128:{ *:[v8i16] }:$vec) => (BITMASK_I16x8:{ *:[i32] } V128:{ *:[v8i16] }:$vec)
5878 /* 16998 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I16x8),
5879 /* 17001 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5880 /* 17003 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5881 /* 17005 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5882 /* 17008 */ GIR_RootConstrainSelectedInstOperands,
5883 /* 17009 */ // GIR_Coverage, 263,
5884 /* 17009 */ GIR_EraseRootFromParent_Done,
5885 /* 17010 */ // Label 410: @17010
5886 /* 17010 */ GIM_Try, /*On fail goto*//*Label 411*/ GIMT_Encode4(17049), // Rule ID 264 //
5887 /* 17015 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5888 /* 17018 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitmask),
5889 /* 17023 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5890 /* 17026 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
5891 /* 17029 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5892 /* 17033 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5893 /* 17037 */ // (intrinsic_wo_chain:{ *:[i32] } 14482:{ *:[iPTR] }, V128:{ *:[v4i32] }:$vec) => (BITMASK_I32x4:{ *:[i32] } V128:{ *:[v4i32] }:$vec)
5894 /* 17037 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I32x4),
5895 /* 17040 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5896 /* 17042 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5897 /* 17044 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5898 /* 17047 */ GIR_RootConstrainSelectedInstOperands,
5899 /* 17048 */ // GIR_Coverage, 264,
5900 /* 17048 */ GIR_EraseRootFromParent_Done,
5901 /* 17049 */ // Label 411: @17049
5902 /* 17049 */ GIM_Try, /*On fail goto*//*Label 412*/ GIMT_Encode4(17088), // Rule ID 265 //
5903 /* 17054 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
5904 /* 17057 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitmask),
5905 /* 17062 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5906 /* 17065 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
5907 /* 17068 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5908 /* 17072 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5909 /* 17076 */ // (intrinsic_wo_chain:{ *:[i32] } 14482:{ *:[iPTR] }, V128:{ *:[v2i64] }:$vec) => (BITMASK_I64x2:{ *:[i32] } V128:{ *:[v2i64] }:$vec)
5910 /* 17076 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I64x2),
5911 /* 17079 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5912 /* 17081 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5913 /* 17083 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5914 /* 17086 */ GIR_RootConstrainSelectedInstOperands,
5915 /* 17087 */ // GIR_Coverage, 265,
5916 /* 17087 */ GIR_EraseRootFromParent_Done,
5917 /* 17088 */ // Label 412: @17088
5918 /* 17088 */ GIM_Try, /*On fail goto*//*Label 413*/ GIMT_Encode4(17127), // Rule ID 447 //
5919 /* 17093 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
5920 /* 17096 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_signed),
5921 /* 17101 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
5922 /* 17104 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
5923 /* 17107 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5924 /* 17111 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5925 /* 17115 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14521:{ *:[iPTR] }, V128:{ *:[v4f32] }:$vec) => (int_wasm_relaxed_trunc_signed_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
5926 /* 17115 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_signed_I32x4),
5927 /* 17118 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5928 /* 17120 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5929 /* 17122 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5930 /* 17125 */ GIR_RootConstrainSelectedInstOperands,
5931 /* 17126 */ // GIR_Coverage, 447,
5932 /* 17126 */ GIR_EraseRootFromParent_Done,
5933 /* 17127 */ // Label 413: @17127
5934 /* 17127 */ GIM_Try, /*On fail goto*//*Label 414*/ GIMT_Encode4(17166), // Rule ID 448 //
5935 /* 17132 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
5936 /* 17135 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_unsigned),
5937 /* 17140 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
5938 /* 17143 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
5939 /* 17146 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5940 /* 17150 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5941 /* 17154 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14523:{ *:[iPTR] }, V128:{ *:[v4f32] }:$vec) => (int_wasm_relaxed_trunc_unsigned_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
5942 /* 17154 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_unsigned_I32x4),
5943 /* 17157 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5944 /* 17159 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5945 /* 17161 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5946 /* 17164 */ GIR_RootConstrainSelectedInstOperands,
5947 /* 17165 */ // GIR_Coverage, 448,
5948 /* 17165 */ GIR_EraseRootFromParent_Done,
5949 /* 17166 */ // Label 414: @17166
5950 /* 17166 */ GIM_Try, /*On fail goto*//*Label 415*/ GIMT_Encode4(17205), // Rule ID 449 //
5951 /* 17171 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
5952 /* 17174 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_signed_zero),
5953 /* 17179 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
5954 /* 17182 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
5955 /* 17185 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5956 /* 17189 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5957 /* 17193 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14522:{ *:[iPTR] }, V128:{ *:[v2f64] }:$vec) => (int_wasm_relaxed_trunc_signed_zero_I32x4:{ *:[v4i32] } V128:{ *:[v2f64] }:$vec)
5958 /* 17193 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_signed_zero_I32x4),
5959 /* 17196 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5960 /* 17198 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5961 /* 17200 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5962 /* 17203 */ GIR_RootConstrainSelectedInstOperands,
5963 /* 17204 */ // GIR_Coverage, 449,
5964 /* 17204 */ GIR_EraseRootFromParent_Done,
5965 /* 17205 */ // Label 415: @17205
5966 /* 17205 */ GIM_Try, /*On fail goto*//*Label 416*/ GIMT_Encode4(17244), // Rule ID 450 //
5967 /* 17210 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
5968 /* 17213 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_unsigned_zero),
5969 /* 17218 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
5970 /* 17221 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
5971 /* 17224 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5972 /* 17228 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5973 /* 17232 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14524:{ *:[iPTR] }, V128:{ *:[v2f64] }:$vec) => (int_wasm_relaxed_trunc_unsigned_zero_I32x4:{ *:[v4i32] } V128:{ *:[v2f64] }:$vec)
5974 /* 17232 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_unsigned_zero_I32x4),
5975 /* 17235 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5976 /* 17237 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
5977 /* 17239 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5978 /* 17242 */ GIR_RootConstrainSelectedInstOperands,
5979 /* 17243 */ // GIR_Coverage, 450,
5980 /* 17243 */ GIR_EraseRootFromParent_Done,
5981 /* 17244 */ // Label 416: @17244
5982 /* 17244 */ GIM_Try, /*On fail goto*//*Label 417*/ GIMT_Encode4(17280), // Rule ID 642 //
5983 /* 17249 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
5984 /* 17254 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
5985 /* 17257 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5986 /* 17260 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5987 /* 17264 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5988 /* 17268 */ // (intrinsic_wo_chain:{ *:[i32] } 14551:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I32_TRUNC_S_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
5989 /* 17268 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_F32),
5990 /* 17271 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5991 /* 17273 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
5992 /* 17275 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5993 /* 17278 */ GIR_RootConstrainSelectedInstOperands,
5994 /* 17279 */ // GIR_Coverage, 642,
5995 /* 17279 */ GIR_EraseRootFromParent_Done,
5996 /* 17280 */ // Label 417: @17280
5997 /* 17280 */ GIM_Try, /*On fail goto*//*Label 418*/ GIMT_Encode4(17316), // Rule ID 643 //
5998 /* 17285 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
5999 /* 17290 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
6000 /* 17293 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
6001 /* 17296 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6002 /* 17300 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6003 /* 17304 */ // (intrinsic_wo_chain:{ *:[i32] } 14552:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I32_TRUNC_U_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
6004 /* 17304 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_F32),
6005 /* 17307 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6006 /* 17309 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6007 /* 17311 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6008 /* 17314 */ GIR_RootConstrainSelectedInstOperands,
6009 /* 17315 */ // GIR_Coverage, 643,
6010 /* 17315 */ GIR_EraseRootFromParent_Done,
6011 /* 17316 */ // Label 418: @17316
6012 /* 17316 */ GIM_Try, /*On fail goto*//*Label 419*/ GIMT_Encode4(17352), // Rule ID 644 //
6013 /* 17321 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
6014 /* 17326 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
6015 /* 17329 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6016 /* 17332 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6017 /* 17336 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
6018 /* 17340 */ // (intrinsic_wo_chain:{ *:[i32] } 14551:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I32_TRUNC_S_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
6019 /* 17340 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_F64),
6020 /* 17343 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6021 /* 17345 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6022 /* 17347 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6023 /* 17350 */ GIR_RootConstrainSelectedInstOperands,
6024 /* 17351 */ // GIR_Coverage, 644,
6025 /* 17351 */ GIR_EraseRootFromParent_Done,
6026 /* 17352 */ // Label 419: @17352
6027 /* 17352 */ GIM_Try, /*On fail goto*//*Label 420*/ GIMT_Encode4(17388), // Rule ID 645 //
6028 /* 17357 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
6029 /* 17362 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
6030 /* 17365 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6031 /* 17368 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6032 /* 17372 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
6033 /* 17376 */ // (intrinsic_wo_chain:{ *:[i32] } 14552:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I32_TRUNC_U_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
6034 /* 17376 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_F64),
6035 /* 17379 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6036 /* 17381 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6037 /* 17383 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6038 /* 17386 */ GIR_RootConstrainSelectedInstOperands,
6039 /* 17387 */ // GIR_Coverage, 645,
6040 /* 17387 */ GIR_EraseRootFromParent_Done,
6041 /* 17388 */ // Label 420: @17388
6042 /* 17388 */ GIM_Try, /*On fail goto*//*Label 421*/ GIMT_Encode4(17424), // Rule ID 646 //
6043 /* 17393 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
6044 /* 17398 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
6045 /* 17401 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
6046 /* 17404 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6047 /* 17408 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6048 /* 17412 */ // (intrinsic_wo_chain:{ *:[i64] } 14551:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I64_TRUNC_S_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
6049 /* 17412 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_F32),
6050 /* 17415 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6051 /* 17417 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6052 /* 17419 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6053 /* 17422 */ GIR_RootConstrainSelectedInstOperands,
6054 /* 17423 */ // GIR_Coverage, 646,
6055 /* 17423 */ GIR_EraseRootFromParent_Done,
6056 /* 17424 */ // Label 421: @17424
6057 /* 17424 */ GIM_Try, /*On fail goto*//*Label 422*/ GIMT_Encode4(17460), // Rule ID 647 //
6058 /* 17429 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
6059 /* 17434 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
6060 /* 17437 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
6061 /* 17440 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6062 /* 17444 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6063 /* 17448 */ // (intrinsic_wo_chain:{ *:[i64] } 14552:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I64_TRUNC_U_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
6064 /* 17448 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_F32),
6065 /* 17451 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6066 /* 17453 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6067 /* 17455 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6068 /* 17458 */ GIR_RootConstrainSelectedInstOperands,
6069 /* 17459 */ // GIR_Coverage, 647,
6070 /* 17459 */ GIR_EraseRootFromParent_Done,
6071 /* 17460 */ // Label 422: @17460
6072 /* 17460 */ GIM_Try, /*On fail goto*//*Label 423*/ GIMT_Encode4(17496), // Rule ID 648 //
6073 /* 17465 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
6074 /* 17470 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
6075 /* 17473 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6076 /* 17476 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6077 /* 17480 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
6078 /* 17484 */ // (intrinsic_wo_chain:{ *:[i64] } 14551:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I64_TRUNC_S_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
6079 /* 17484 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_F64),
6080 /* 17487 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6081 /* 17489 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6082 /* 17491 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6083 /* 17494 */ GIR_RootConstrainSelectedInstOperands,
6084 /* 17495 */ // GIR_Coverage, 648,
6085 /* 17495 */ GIR_EraseRootFromParent_Done,
6086 /* 17496 */ // Label 423: @17496
6087 /* 17496 */ GIM_Try, /*On fail goto*//*Label 424*/ GIMT_Encode4(17532), // Rule ID 649 //
6088 /* 17501 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
6089 /* 17506 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
6090 /* 17509 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
6091 /* 17512 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6092 /* 17516 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
6093 /* 17520 */ // (intrinsic_wo_chain:{ *:[i64] } 14552:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I64_TRUNC_U_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
6094 /* 17520 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_F64),
6095 /* 17523 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6096 /* 17525 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6097 /* 17527 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6098 /* 17530 */ GIR_RootConstrainSelectedInstOperands,
6099 /* 17531 */ // GIR_Coverage, 649,
6100 /* 17531 */ GIR_EraseRootFromParent_Done,
6101 /* 17532 */ // Label 424: @17532
6102 /* 17532 */ GIM_Try, /*On fail goto*//*Label 425*/ GIMT_Encode4(17568), // Rule ID 1114 //
6103 /* 17537 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
6104 /* 17542 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
6105 /* 17545 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6106 /* 17548 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6107 /* 17552 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6108 /* 17556 */ // (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v16i8] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v16i8] }:$vec)
6109 /* 17556 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
6110 /* 17559 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6111 /* 17561 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6112 /* 17563 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6113 /* 17566 */ GIR_RootConstrainSelectedInstOperands,
6114 /* 17567 */ // GIR_Coverage, 1114,
6115 /* 17567 */ GIR_EraseRootFromParent_Done,
6116 /* 17568 */ // Label 425: @17568
6117 /* 17568 */ GIM_Try, /*On fail goto*//*Label 426*/ GIMT_Encode4(17604), // Rule ID 1115 //
6118 /* 17573 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
6119 /* 17578 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
6120 /* 17581 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6121 /* 17584 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6122 /* 17588 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6123 /* 17592 */ // (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v8i16] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v8i16] }:$vec)
6124 /* 17592 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
6125 /* 17595 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6126 /* 17597 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6127 /* 17599 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6128 /* 17602 */ GIR_RootConstrainSelectedInstOperands,
6129 /* 17603 */ // GIR_Coverage, 1115,
6130 /* 17603 */ GIR_EraseRootFromParent_Done,
6131 /* 17604 */ // Label 426: @17604
6132 /* 17604 */ GIM_Try, /*On fail goto*//*Label 427*/ GIMT_Encode4(17640), // Rule ID 1116 //
6133 /* 17609 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
6134 /* 17614 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
6135 /* 17617 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6136 /* 17620 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6137 /* 17624 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6138 /* 17628 */ // (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v4i32] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v4i32] }:$vec)
6139 /* 17628 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
6140 /* 17631 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6141 /* 17633 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6142 /* 17635 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6143 /* 17638 */ GIR_RootConstrainSelectedInstOperands,
6144 /* 17639 */ // GIR_Coverage, 1116,
6145 /* 17639 */ GIR_EraseRootFromParent_Done,
6146 /* 17640 */ // Label 427: @17640
6147 /* 17640 */ GIM_Try, /*On fail goto*//*Label 428*/ GIMT_Encode4(17676), // Rule ID 1117 //
6148 /* 17645 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
6149 /* 17650 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
6150 /* 17653 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6151 /* 17656 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6152 /* 17660 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6153 /* 17664 */ // (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v2i64] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v2i64] }:$vec)
6154 /* 17664 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
6155 /* 17667 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6156 /* 17669 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6157 /* 17671 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6158 /* 17674 */ GIR_RootConstrainSelectedInstOperands,
6159 /* 17675 */ // GIR_Coverage, 1117,
6160 /* 17675 */ GIR_EraseRootFromParent_Done,
6161 /* 17676 */ // Label 428: @17676
6162 /* 17676 */ GIM_Try, /*On fail goto*//*Label 429*/ GIMT_Encode4(17712), // Rule ID 1251 //
6163 /* 17681 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_unsigned),
6164 /* 17686 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6165 /* 17689 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6166 /* 17692 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6167 /* 17696 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6168 /* 17700 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14487:{ *:[iPTR] }, V128:{ *:[v8i16] }:$in) => (extadd_pairwise_u_I32x4:{ *:[v4i32] } V128:{ *:[v8i16] }:$in)
6169 /* 17700 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_u_I32x4),
6170 /* 17703 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6171 /* 17705 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
6172 /* 17707 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6173 /* 17710 */ GIR_RootConstrainSelectedInstOperands,
6174 /* 17711 */ // GIR_Coverage, 1251,
6175 /* 17711 */ GIR_EraseRootFromParent_Done,
6176 /* 17712 */ // Label 429: @17712
6177 /* 17712 */ GIM_Try, /*On fail goto*//*Label 430*/ GIMT_Encode4(17748), // Rule ID 1252 //
6178 /* 17717 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_unsigned),
6179 /* 17722 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6180 /* 17725 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6181 /* 17728 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6182 /* 17732 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6183 /* 17736 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14487:{ *:[iPTR] }, V128:{ *:[v16i8] }:$in) => (extadd_pairwise_u_I16x8:{ *:[v8i16] } V128:{ *:[v16i8] }:$in)
6184 /* 17736 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_u_I16x8),
6185 /* 17739 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6186 /* 17741 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
6187 /* 17743 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6188 /* 17746 */ GIR_RootConstrainSelectedInstOperands,
6189 /* 17747 */ // GIR_Coverage, 1252,
6190 /* 17747 */ GIR_EraseRootFromParent_Done,
6191 /* 17748 */ // Label 430: @17748
6192 /* 17748 */ GIM_Try, /*On fail goto*//*Label 431*/ GIMT_Encode4(17784), // Rule ID 1253 //
6193 /* 17753 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_signed),
6194 /* 17758 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6195 /* 17761 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6196 /* 17764 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6197 /* 17768 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6198 /* 17772 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14486:{ *:[iPTR] }, V128:{ *:[v8i16] }:$in) => (extadd_pairwise_s_I32x4:{ *:[v4i32] } V128:{ *:[v8i16] }:$in)
6199 /* 17772 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_s_I32x4),
6200 /* 17775 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6201 /* 17777 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
6202 /* 17779 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6203 /* 17782 */ GIR_RootConstrainSelectedInstOperands,
6204 /* 17783 */ // GIR_Coverage, 1253,
6205 /* 17783 */ GIR_EraseRootFromParent_Done,
6206 /* 17784 */ // Label 431: @17784
6207 /* 17784 */ GIM_Try, /*On fail goto*//*Label 432*/ GIMT_Encode4(17820), // Rule ID 1254 //
6208 /* 17789 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_signed),
6209 /* 17794 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6210 /* 17797 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6211 /* 17800 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6212 /* 17804 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6213 /* 17808 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14486:{ *:[iPTR] }, V128:{ *:[v16i8] }:$in) => (extadd_pairwise_s_I16x8:{ *:[v8i16] } V128:{ *:[v16i8] }:$in)
6214 /* 17808 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_s_I16x8),
6215 /* 17811 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6216 /* 17813 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
6217 /* 17815 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6218 /* 17818 */ GIR_RootConstrainSelectedInstOperands,
6219 /* 17819 */ // GIR_Coverage, 1254,
6220 /* 17819 */ GIR_EraseRootFromParent_Done,
6221 /* 17820 */ // Label 432: @17820
6222 /* 17820 */ GIM_Reject,
6223 /* 17821 */ // Label 403: @17821
6224 /* 17821 */ GIM_Try, /*On fail goto*//*Label 433*/ GIMT_Encode4(18924),
6225 /* 17826 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
6226 /* 17829 */ GIM_Try, /*On fail goto*//*Label 434*/ GIMT_Encode4(17888), // Rule ID 187 //
6227 /* 17834 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
6228 /* 17837 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extract_lane_f16x8),
6229 /* 17842 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
6230 /* 17845 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6231 /* 17848 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
6232 /* 17851 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6233 /* 17855 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6234 /* 17859 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
6235 /* 17863 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
6236 /* 17867 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
6237 /* 17871 */ // MIs[1] Operand 1
6238 /* 17871 */ // No operand predicates
6239 /* 17871 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
6240 /* 17873 */ // (intrinsic_wo_chain:{ *:[f32] } 14488:{ *:[iPTR] }, V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx) => (EXTRACT_LANE_F16x8:{ *:[f32] } V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] }):$idx)
6241 /* 17873 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EXTRACT_LANE_F16x8),
6242 /* 17876 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6243 /* 17878 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6244 /* 17880 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
6245 /* 17883 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6246 /* 17886 */ GIR_RootConstrainSelectedInstOperands,
6247 /* 17887 */ // GIR_Coverage, 187,
6248 /* 17887 */ GIR_EraseRootFromParent_Done,
6249 /* 17888 */ // Label 434: @17888
6250 /* 17888 */ GIM_Try, /*On fail goto*//*Label 435*/ GIMT_Encode4(17936), // Rule ID 309 //
6251 /* 17893 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
6252 /* 17896 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_avgr_unsigned),
6253 /* 17901 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
6254 /* 17904 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6255 /* 17907 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
6256 /* 17910 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6257 /* 17914 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6258 /* 17918 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6259 /* 17922 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14481:{ *:[iPTR] }, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (AVGR_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
6260 /* 17922 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I8x16),
6261 /* 17925 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6262 /* 17927 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6263 /* 17929 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6264 /* 17931 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6265 /* 17934 */ GIR_RootConstrainSelectedInstOperands,
6266 /* 17935 */ // GIR_Coverage, 309,
6267 /* 17935 */ GIR_EraseRootFromParent_Done,
6268 /* 17936 */ // Label 435: @17936
6269 /* 17936 */ GIM_Try, /*On fail goto*//*Label 436*/ GIMT_Encode4(17984), // Rule ID 310 //
6270 /* 17941 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
6271 /* 17944 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_avgr_unsigned),
6272 /* 17949 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6273 /* 17952 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6274 /* 17955 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6275 /* 17958 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6276 /* 17962 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6277 /* 17966 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6278 /* 17970 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14481:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (AVGR_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
6279 /* 17970 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I16x8),
6280 /* 17973 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6281 /* 17975 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6282 /* 17977 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6283 /* 17979 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6284 /* 17982 */ GIR_RootConstrainSelectedInstOperands,
6285 /* 17983 */ // GIR_Coverage, 310,
6286 /* 17983 */ GIR_EraseRootFromParent_Done,
6287 /* 17984 */ // Label 436: @17984
6288 /* 17984 */ GIM_Try, /*On fail goto*//*Label 437*/ GIMT_Encode4(18032), // Rule ID 311 //
6289 /* 17989 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
6290 /* 17992 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_dot),
6291 /* 17997 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6292 /* 18000 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6293 /* 18003 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6294 /* 18006 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6295 /* 18010 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6296 /* 18014 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6297 /* 18018 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14485:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (DOT:{ *:[v4i32] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
6298 /* 18018 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::DOT),
6299 /* 18021 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6300 /* 18023 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6301 /* 18025 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6302 /* 18027 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6303 /* 18030 */ GIR_RootConstrainSelectedInstOperands,
6304 /* 18031 */ // GIR_Coverage, 311,
6305 /* 18031 */ GIR_EraseRootFromParent_Done,
6306 /* 18032 */ // Label 437: @18032
6307 /* 18032 */ GIM_Try, /*On fail goto*//*Label 438*/ GIMT_Encode4(18080), // Rule ID 435 //
6308 /* 18037 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
6309 /* 18040 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_signed),
6310 /* 18045 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
6311 /* 18048 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6312 /* 18051 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6313 /* 18054 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6314 /* 18058 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6315 /* 18062 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6316 /* 18066 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14499:{ *:[iPTR] }, V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high) => (NARROW_S_I8x16:{ *:[v16i8] } V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high)
6317 /* 18066 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_S_I8x16),
6318 /* 18069 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6319 /* 18071 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
6320 /* 18073 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
6321 /* 18075 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6322 /* 18078 */ GIR_RootConstrainSelectedInstOperands,
6323 /* 18079 */ // GIR_Coverage, 435,
6324 /* 18079 */ GIR_EraseRootFromParent_Done,
6325 /* 18080 */ // Label 438: @18080
6326 /* 18080 */ GIM_Try, /*On fail goto*//*Label 439*/ GIMT_Encode4(18128), // Rule ID 436 //
6327 /* 18085 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
6328 /* 18088 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_unsigned),
6329 /* 18093 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
6330 /* 18096 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6331 /* 18099 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6332 /* 18102 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6333 /* 18106 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6334 /* 18110 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6335 /* 18114 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14500:{ *:[iPTR] }, V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high) => (NARROW_U_I8x16:{ *:[v16i8] } V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high)
6336 /* 18114 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_U_I8x16),
6337 /* 18117 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6338 /* 18119 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
6339 /* 18121 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
6340 /* 18123 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6341 /* 18126 */ GIR_RootConstrainSelectedInstOperands,
6342 /* 18127 */ // GIR_Coverage, 436,
6343 /* 18127 */ GIR_EraseRootFromParent_Done,
6344 /* 18128 */ // Label 439: @18128
6345 /* 18128 */ GIM_Try, /*On fail goto*//*Label 440*/ GIMT_Encode4(18176), // Rule ID 437 //
6346 /* 18133 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
6347 /* 18136 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_signed),
6348 /* 18141 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6349 /* 18144 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6350 /* 18147 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6351 /* 18150 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6352 /* 18154 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6353 /* 18158 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6354 /* 18162 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14499:{ *:[iPTR] }, V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high) => (NARROW_S_I16x8:{ *:[v8i16] } V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high)
6355 /* 18162 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_S_I16x8),
6356 /* 18165 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6357 /* 18167 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
6358 /* 18169 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
6359 /* 18171 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6360 /* 18174 */ GIR_RootConstrainSelectedInstOperands,
6361 /* 18175 */ // GIR_Coverage, 437,
6362 /* 18175 */ GIR_EraseRootFromParent_Done,
6363 /* 18176 */ // Label 440: @18176
6364 /* 18176 */ GIM_Try, /*On fail goto*//*Label 441*/ GIMT_Encode4(18224), // Rule ID 438 //
6365 /* 18181 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
6366 /* 18184 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_unsigned),
6367 /* 18189 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6368 /* 18192 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6369 /* 18195 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6370 /* 18198 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6371 /* 18202 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6372 /* 18206 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6373 /* 18210 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14500:{ *:[iPTR] }, V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high) => (NARROW_U_I16x8:{ *:[v8i16] } V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high)
6374 /* 18210 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_U_I16x8),
6375 /* 18213 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6376 /* 18215 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
6377 /* 18217 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
6378 /* 18219 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6379 /* 18222 */ GIR_RootConstrainSelectedInstOperands,
6380 /* 18223 */ // GIR_Coverage, 438,
6381 /* 18223 */ GIR_EraseRootFromParent_Done,
6382 /* 18224 */ // Label 441: @18224
6383 /* 18224 */ GIM_Try, /*On fail goto*//*Label 442*/ GIMT_Encode4(18272), // Rule ID 445 //
6384 /* 18229 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
6385 /* 18232 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_q15mulr_sat_signed),
6386 /* 18237 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6387 /* 18240 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6388 /* 18243 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6389 /* 18246 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6390 /* 18250 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6391 /* 18254 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6392 /* 18258 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14503:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (Q15MULR_SAT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
6393 /* 18258 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::Q15MULR_SAT_S_I16x8),
6394 /* 18261 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6395 /* 18263 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6396 /* 18265 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6397 /* 18267 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6398 /* 18270 */ GIR_RootConstrainSelectedInstOperands,
6399 /* 18271 */ // GIR_Coverage, 445,
6400 /* 18271 */ GIR_EraseRootFromParent_Done,
6401 /* 18272 */ // Label 442: @18272
6402 /* 18272 */ GIM_Try, /*On fail goto*//*Label 443*/ GIMT_Encode4(18320), // Rule ID 446 //
6403 /* 18277 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6404 /* 18280 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_swizzle),
6405 /* 18285 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
6406 /* 18288 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6407 /* 18291 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
6408 /* 18294 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6409 /* 18298 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6410 /* 18302 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6411 /* 18306 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14520:{ *:[iPTR] }, V128:{ *:[v16i8] }:$src, V128:{ *:[v16i8] }:$mask) => (RELAXED_SWIZZLE:{ *:[v16i8] } V128:{ *:[v16i8] }:$src, V128:{ *:[v16i8] }:$mask)
6412 /* 18306 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_SWIZZLE),
6413 /* 18309 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6414 /* 18311 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6415 /* 18313 */ GIR_RootToRootCopy, /*OpIdx*/3, // mask
6416 /* 18315 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6417 /* 18318 */ GIR_RootConstrainSelectedInstOperands,
6418 /* 18319 */ // GIR_Coverage, 446,
6419 /* 18319 */ GIR_EraseRootFromParent_Done,
6420 /* 18320 */ // Label 443: @18320
6421 /* 18320 */ GIM_Try, /*On fail goto*//*Label 444*/ GIMT_Encode4(18368), // Rule ID 461 //
6422 /* 18325 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6423 /* 18328 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_min),
6424 /* 18333 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6425 /* 18336 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6426 /* 18339 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6427 /* 18342 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6428 /* 18346 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6429 /* 18350 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6430 /* 18354 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14517:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SIMD_RELAXED_FMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
6431 /* 18354 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F32x4),
6432 /* 18357 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6433 /* 18359 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6434 /* 18361 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6435 /* 18363 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6436 /* 18366 */ GIR_RootConstrainSelectedInstOperands,
6437 /* 18367 */ // GIR_Coverage, 461,
6438 /* 18367 */ GIR_EraseRootFromParent_Done,
6439 /* 18368 */ // Label 444: @18368
6440 /* 18368 */ GIM_Try, /*On fail goto*//*Label 445*/ GIMT_Encode4(18416), // Rule ID 462 //
6441 /* 18373 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6442 /* 18376 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_max),
6443 /* 18381 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6444 /* 18384 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6445 /* 18387 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6446 /* 18390 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6447 /* 18394 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6448 /* 18398 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6449 /* 18402 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14516:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SIMD_RELAXED_FMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
6450 /* 18402 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F32x4),
6451 /* 18405 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6452 /* 18407 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6453 /* 18409 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6454 /* 18411 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6455 /* 18414 */ GIR_RootConstrainSelectedInstOperands,
6456 /* 18415 */ // GIR_Coverage, 462,
6457 /* 18415 */ GIR_EraseRootFromParent_Done,
6458 /* 18416 */ // Label 445: @18416
6459 /* 18416 */ GIM_Try, /*On fail goto*//*Label 446*/ GIMT_Encode4(18464), // Rule ID 463 //
6460 /* 18421 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6461 /* 18424 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_min),
6462 /* 18429 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
6463 /* 18432 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6464 /* 18435 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
6465 /* 18438 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6466 /* 18442 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6467 /* 18446 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6468 /* 18450 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14517:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SIMD_RELAXED_FMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
6469 /* 18450 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F64x2),
6470 /* 18453 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6471 /* 18455 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6472 /* 18457 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6473 /* 18459 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6474 /* 18462 */ GIR_RootConstrainSelectedInstOperands,
6475 /* 18463 */ // GIR_Coverage, 463,
6476 /* 18463 */ GIR_EraseRootFromParent_Done,
6477 /* 18464 */ // Label 446: @18464
6478 /* 18464 */ GIM_Try, /*On fail goto*//*Label 447*/ GIMT_Encode4(18512), // Rule ID 464 //
6479 /* 18469 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6480 /* 18472 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_max),
6481 /* 18477 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
6482 /* 18480 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6483 /* 18483 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
6484 /* 18486 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6485 /* 18490 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6486 /* 18494 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6487 /* 18498 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14516:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SIMD_RELAXED_FMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
6488 /* 18498 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F64x2),
6489 /* 18501 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6490 /* 18503 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6491 /* 18505 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6492 /* 18507 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6493 /* 18510 */ GIR_RootConstrainSelectedInstOperands,
6494 /* 18511 */ // GIR_Coverage, 464,
6495 /* 18511 */ GIR_EraseRootFromParent_Done,
6496 /* 18512 */ // Label 447: @18512
6497 /* 18512 */ GIM_Try, /*On fail goto*//*Label 448*/ GIMT_Encode4(18560), // Rule ID 465 //
6498 /* 18517 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6499 /* 18520 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_q15mulr_signed),
6500 /* 18525 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6501 /* 18528 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6502 /* 18531 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6503 /* 18534 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6504 /* 18538 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6505 /* 18542 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6506 /* 18546 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14519:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (RELAXED_Q15MULR_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
6507 /* 18546 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_Q15MULR_S_I16x8),
6508 /* 18549 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6509 /* 18551 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6510 /* 18553 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6511 /* 18555 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6512 /* 18558 */ GIR_RootConstrainSelectedInstOperands,
6513 /* 18559 */ // GIR_Coverage, 465,
6514 /* 18559 */ GIR_EraseRootFromParent_Done,
6515 /* 18560 */ // Label 448: @18560
6516 /* 18560 */ GIM_Try, /*On fail goto*//*Label 449*/ GIMT_Encode4(18608), // Rule ID 466 //
6517 /* 18565 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6518 /* 18568 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_signed),
6519 /* 18573 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6520 /* 18576 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6521 /* 18579 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
6522 /* 18582 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6523 /* 18586 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6524 /* 18590 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6525 /* 18594 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14513:{ *:[iPTR] }, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (RELAXED_DOT:{ *:[v8i16] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
6526 /* 18594 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT),
6527 /* 18597 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6528 /* 18599 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6529 /* 18601 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6530 /* 18603 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6531 /* 18606 */ GIR_RootConstrainSelectedInstOperands,
6532 /* 18607 */ // GIR_Coverage, 466,
6533 /* 18607 */ GIR_EraseRootFromParent_Done,
6534 /* 18608 */ // Label 449: @18608
6535 /* 18608 */ GIM_Try, /*On fail goto*//*Label 450*/ GIMT_Encode4(18653), // Rule ID 1013 //
6536 /* 18613 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_swizzle),
6537 /* 18618 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
6538 /* 18621 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6539 /* 18624 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
6540 /* 18627 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6541 /* 18631 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6542 /* 18635 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6543 /* 18639 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14530:{ *:[iPTR] }, V128:{ *:[v16i8] }:$src, V128:{ *:[v16i8] }:$mask) => (SWIZZLE:{ *:[v16i8] } ?:{ *:[v16i8] }:$src, ?:{ *:[v16i8] }:$mask)
6544 /* 18639 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SWIZZLE),
6545 /* 18642 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6546 /* 18644 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
6547 /* 18646 */ GIR_RootToRootCopy, /*OpIdx*/3, // mask
6548 /* 18648 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6549 /* 18651 */ GIR_RootConstrainSelectedInstOperands,
6550 /* 18652 */ // GIR_Coverage, 1013,
6551 /* 18652 */ GIR_EraseRootFromParent_Done,
6552 /* 18653 */ // Label 450: @18653
6553 /* 18653 */ GIM_Try, /*On fail goto*//*Label 451*/ GIMT_Encode4(18698), // Rule ID 1191 //
6554 /* 18658 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmin),
6555 /* 18663 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6556 /* 18666 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6557 /* 18669 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6558 /* 18672 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6559 /* 18676 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6560 /* 18680 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6561 /* 18684 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14502:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (PMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
6562 /* 18684 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
6563 /* 18687 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6564 /* 18689 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6565 /* 18691 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6566 /* 18693 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6567 /* 18696 */ GIR_RootConstrainSelectedInstOperands,
6568 /* 18697 */ // GIR_Coverage, 1191,
6569 /* 18697 */ GIR_EraseRootFromParent_Done,
6570 /* 18698 */ // Label 451: @18698
6571 /* 18698 */ GIM_Try, /*On fail goto*//*Label 452*/ GIMT_Encode4(18743), // Rule ID 1192 //
6572 /* 18703 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmax),
6573 /* 18708 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6574 /* 18711 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6575 /* 18714 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6576 /* 18717 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6577 /* 18721 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6578 /* 18725 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6579 /* 18729 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14501:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (PMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
6580 /* 18729 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
6581 /* 18732 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6582 /* 18734 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6583 /* 18736 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6584 /* 18738 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6585 /* 18741 */ GIR_RootConstrainSelectedInstOperands,
6586 /* 18742 */ // GIR_Coverage, 1192,
6587 /* 18742 */ GIR_EraseRootFromParent_Done,
6588 /* 18743 */ // Label 452: @18743
6589 /* 18743 */ GIM_Try, /*On fail goto*//*Label 453*/ GIMT_Encode4(18788), // Rule ID 1193 //
6590 /* 18748 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmin),
6591 /* 18753 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
6592 /* 18756 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6593 /* 18759 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
6594 /* 18762 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6595 /* 18766 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6596 /* 18770 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6597 /* 18774 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14502:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (PMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
6598 /* 18774 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
6599 /* 18777 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6600 /* 18779 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6601 /* 18781 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6602 /* 18783 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6603 /* 18786 */ GIR_RootConstrainSelectedInstOperands,
6604 /* 18787 */ // GIR_Coverage, 1193,
6605 /* 18787 */ GIR_EraseRootFromParent_Done,
6606 /* 18788 */ // Label 453: @18788
6607 /* 18788 */ GIM_Try, /*On fail goto*//*Label 454*/ GIMT_Encode4(18833), // Rule ID 1194 //
6608 /* 18793 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmax),
6609 /* 18798 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
6610 /* 18801 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6611 /* 18804 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
6612 /* 18807 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6613 /* 18811 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6614 /* 18815 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6615 /* 18819 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14501:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (PMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
6616 /* 18819 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
6617 /* 18822 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6618 /* 18824 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6619 /* 18826 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6620 /* 18828 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6621 /* 18831 */ GIR_RootConstrainSelectedInstOperands,
6622 /* 18832 */ // GIR_Coverage, 1194,
6623 /* 18832 */ GIR_EraseRootFromParent_Done,
6624 /* 18833 */ // Label 454: @18833
6625 /* 18833 */ GIM_Try, /*On fail goto*//*Label 455*/ GIMT_Encode4(18878), // Rule ID 1195 //
6626 /* 18838 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmin),
6627 /* 18843 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6628 /* 18846 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6629 /* 18849 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6630 /* 18852 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6631 /* 18856 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6632 /* 18860 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6633 /* 18864 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14502:{ *:[iPTR] }, V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (PMIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
6634 /* 18864 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
6635 /* 18867 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6636 /* 18869 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6637 /* 18871 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6638 /* 18873 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6639 /* 18876 */ GIR_RootConstrainSelectedInstOperands,
6640 /* 18877 */ // GIR_Coverage, 1195,
6641 /* 18877 */ GIR_EraseRootFromParent_Done,
6642 /* 18878 */ // Label 455: @18878
6643 /* 18878 */ GIM_Try, /*On fail goto*//*Label 456*/ GIMT_Encode4(18923), // Rule ID 1196 //
6644 /* 18883 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmax),
6645 /* 18888 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6646 /* 18891 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6647 /* 18894 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6648 /* 18897 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6649 /* 18901 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6650 /* 18905 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6651 /* 18909 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14501:{ *:[iPTR] }, V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (PMAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
6652 /* 18909 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
6653 /* 18912 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6654 /* 18914 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6655 /* 18916 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6656 /* 18918 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6657 /* 18921 */ GIR_RootConstrainSelectedInstOperands,
6658 /* 18922 */ // GIR_Coverage, 1196,
6659 /* 18922 */ GIR_EraseRootFromParent_Done,
6660 /* 18923 */ // Label 456: @18923
6661 /* 18923 */ GIM_Reject,
6662 /* 18924 */ // Label 433: @18924
6663 /* 18924 */ GIM_Try, /*On fail goto*//*Label 457*/ GIMT_Encode4(20003),
6664 /* 18929 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
6665 /* 18932 */ GIM_Try, /*On fail goto*//*Label 458*/ GIMT_Encode4(19000), // Rule ID 194 //
6666 /* 18937 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16),
6667 /* 18940 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_replace_lane_f16x8),
6668 /* 18945 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6669 /* 18948 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6670 /* 18951 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
6671 /* 18954 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
6672 /* 18957 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6673 /* 18961 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6674 /* 18965 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
6675 /* 18969 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
6676 /* 18973 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
6677 /* 18977 */ // MIs[1] Operand 1
6678 /* 18977 */ // No operand predicates
6679 /* 18977 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6680 /* 18981 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
6681 /* 18983 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14525:{ *:[iPTR] }, V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx, F32:{ *:[f32] }:$x) => (REPLACE_LANE_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] }):$idx, F32:{ *:[f32] }:$x)
6682 /* 18983 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_F16x8),
6683 /* 18986 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6684 /* 18988 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
6685 /* 18990 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
6686 /* 18993 */ GIR_RootToRootCopy, /*OpIdx*/4, // x
6687 /* 18995 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6688 /* 18998 */ GIR_RootConstrainSelectedInstOperands,
6689 /* 18999 */ // GIR_Coverage, 194,
6690 /* 18999 */ GIR_EraseRootFromParent_Done,
6691 /* 19000 */ // Label 458: @19000
6692 /* 19000 */ GIM_Try, /*On fail goto*//*Label 459*/ GIMT_Encode4(19057), // Rule ID 451 //
6693 /* 19005 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128),
6694 /* 19008 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_madd),
6695 /* 19013 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6696 /* 19016 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6697 /* 19019 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6698 /* 19022 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
6699 /* 19025 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6700 /* 19029 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6701 /* 19033 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6702 /* 19037 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6703 /* 19041 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14515:{ *:[iPTR] }, V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c) => (MADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c)
6704 /* 19041 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F32x4),
6705 /* 19044 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6706 /* 19046 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6707 /* 19048 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6708 /* 19050 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6709 /* 19052 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6710 /* 19055 */ GIR_RootConstrainSelectedInstOperands,
6711 /* 19056 */ // GIR_Coverage, 451,
6712 /* 19056 */ GIR_EraseRootFromParent_Done,
6713 /* 19057 */ // Label 459: @19057
6714 /* 19057 */ GIM_Try, /*On fail goto*//*Label 460*/ GIMT_Encode4(19114), // Rule ID 452 //
6715 /* 19062 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128),
6716 /* 19065 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_nmadd),
6717 /* 19070 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6718 /* 19073 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6719 /* 19076 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6720 /* 19079 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
6721 /* 19082 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6722 /* 19086 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6723 /* 19090 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6724 /* 19094 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6725 /* 19098 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14518:{ *:[iPTR] }, V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c) => (NMADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c)
6726 /* 19098 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F32x4),
6727 /* 19101 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6728 /* 19103 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6729 /* 19105 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6730 /* 19107 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6731 /* 19109 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6732 /* 19112 */ GIR_RootConstrainSelectedInstOperands,
6733 /* 19113 */ // GIR_Coverage, 452,
6734 /* 19113 */ GIR_EraseRootFromParent_Done,
6735 /* 19114 */ // Label 460: @19114
6736 /* 19114 */ GIM_Try, /*On fail goto*//*Label 461*/ GIMT_Encode4(19171), // Rule ID 453 //
6737 /* 19119 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128),
6738 /* 19122 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_madd),
6739 /* 19127 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
6740 /* 19130 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6741 /* 19133 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
6742 /* 19136 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64,
6743 /* 19139 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6744 /* 19143 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6745 /* 19147 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6746 /* 19151 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6747 /* 19155 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14515:{ *:[iPTR] }, V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c) => (MADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c)
6748 /* 19155 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F64x2),
6749 /* 19158 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6750 /* 19160 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6751 /* 19162 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6752 /* 19164 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6753 /* 19166 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6754 /* 19169 */ GIR_RootConstrainSelectedInstOperands,
6755 /* 19170 */ // GIR_Coverage, 453,
6756 /* 19170 */ GIR_EraseRootFromParent_Done,
6757 /* 19171 */ // Label 461: @19171
6758 /* 19171 */ GIM_Try, /*On fail goto*//*Label 462*/ GIMT_Encode4(19228), // Rule ID 454 //
6759 /* 19176 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128),
6760 /* 19179 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_nmadd),
6761 /* 19184 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
6762 /* 19187 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6763 /* 19190 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
6764 /* 19193 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64,
6765 /* 19196 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6766 /* 19200 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6767 /* 19204 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6768 /* 19208 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6769 /* 19212 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14518:{ *:[iPTR] }, V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c) => (NMADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c)
6770 /* 19212 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F64x2),
6771 /* 19215 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6772 /* 19217 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6773 /* 19219 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6774 /* 19221 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6775 /* 19223 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6776 /* 19226 */ GIR_RootConstrainSelectedInstOperands,
6777 /* 19227 */ // GIR_Coverage, 454,
6778 /* 19227 */ GIR_EraseRootFromParent_Done,
6779 /* 19228 */ // Label 462: @19228
6780 /* 19228 */ GIM_Try, /*On fail goto*//*Label 463*/ GIMT_Encode4(19285), // Rule ID 457 //
6781 /* 19233 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6782 /* 19236 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_laneselect),
6783 /* 19241 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
6784 /* 19244 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6785 /* 19247 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
6786 /* 19250 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v16s8,
6787 /* 19253 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6788 /* 19257 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6789 /* 19261 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6790 /* 19265 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6791 /* 19269 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14514:{ *:[iPTR] }, V128:{ *:[v16i8] }:$a, V128:{ *:[v16i8] }:$b, V128:{ *:[v16i8] }:$c) => (LANESELECT_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$a, V128:{ *:[v16i8] }:$b, V128:{ *:[v16i8] }:$c)
6792 /* 19269 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I8x16),
6793 /* 19272 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6794 /* 19274 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6795 /* 19276 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6796 /* 19278 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6797 /* 19280 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6798 /* 19283 */ GIR_RootConstrainSelectedInstOperands,
6799 /* 19284 */ // GIR_Coverage, 457,
6800 /* 19284 */ GIR_EraseRootFromParent_Done,
6801 /* 19285 */ // Label 463: @19285
6802 /* 19285 */ GIM_Try, /*On fail goto*//*Label 464*/ GIMT_Encode4(19342), // Rule ID 458 //
6803 /* 19290 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6804 /* 19293 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_laneselect),
6805 /* 19298 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6806 /* 19301 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6807 /* 19304 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6808 /* 19307 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s16,
6809 /* 19310 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6810 /* 19314 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6811 /* 19318 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6812 /* 19322 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6813 /* 19326 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14514:{ *:[iPTR] }, V128:{ *:[v8i16] }:$a, V128:{ *:[v8i16] }:$b, V128:{ *:[v8i16] }:$c) => (LANESELECT_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$a, V128:{ *:[v8i16] }:$b, V128:{ *:[v8i16] }:$c)
6814 /* 19326 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I16x8),
6815 /* 19329 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6816 /* 19331 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6817 /* 19333 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6818 /* 19335 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6819 /* 19337 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6820 /* 19340 */ GIR_RootConstrainSelectedInstOperands,
6821 /* 19341 */ // GIR_Coverage, 458,
6822 /* 19341 */ GIR_EraseRootFromParent_Done,
6823 /* 19342 */ // Label 464: @19342
6824 /* 19342 */ GIM_Try, /*On fail goto*//*Label 465*/ GIMT_Encode4(19399), // Rule ID 459 //
6825 /* 19347 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6826 /* 19350 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_laneselect),
6827 /* 19355 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6828 /* 19358 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6829 /* 19361 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6830 /* 19364 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
6831 /* 19367 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6832 /* 19371 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6833 /* 19375 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6834 /* 19379 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6835 /* 19383 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14514:{ *:[iPTR] }, V128:{ *:[v4i32] }:$a, V128:{ *:[v4i32] }:$b, V128:{ *:[v4i32] }:$c) => (LANESELECT_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$a, V128:{ *:[v4i32] }:$b, V128:{ *:[v4i32] }:$c)
6836 /* 19383 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I32x4),
6837 /* 19386 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6838 /* 19388 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6839 /* 19390 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6840 /* 19392 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6841 /* 19394 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6842 /* 19397 */ GIR_RootConstrainSelectedInstOperands,
6843 /* 19398 */ // GIR_Coverage, 459,
6844 /* 19398 */ GIR_EraseRootFromParent_Done,
6845 /* 19399 */ // Label 465: @19399
6846 /* 19399 */ GIM_Try, /*On fail goto*//*Label 466*/ GIMT_Encode4(19456), // Rule ID 460 //
6847 /* 19404 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6848 /* 19407 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_laneselect),
6849 /* 19412 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
6850 /* 19415 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6851 /* 19418 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
6852 /* 19421 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64,
6853 /* 19424 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6854 /* 19428 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6855 /* 19432 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6856 /* 19436 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6857 /* 19440 */ // (intrinsic_wo_chain:{ *:[v2i64] } 14514:{ *:[iPTR] }, V128:{ *:[v2i64] }:$a, V128:{ *:[v2i64] }:$b, V128:{ *:[v2i64] }:$c) => (LANESELECT_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$a, V128:{ *:[v2i64] }:$b, V128:{ *:[v2i64] }:$c)
6858 /* 19440 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I64x2),
6859 /* 19443 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6860 /* 19445 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
6861 /* 19447 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
6862 /* 19449 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6863 /* 19451 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6864 /* 19454 */ GIR_RootConstrainSelectedInstOperands,
6865 /* 19455 */ // GIR_Coverage, 460,
6866 /* 19455 */ GIR_EraseRootFromParent_Done,
6867 /* 19456 */ // Label 466: @19456
6868 /* 19456 */ GIM_Try, /*On fail goto*//*Label 467*/ GIMT_Encode4(19513), // Rule ID 467 //
6869 /* 19461 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6870 /* 19464 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_add_signed),
6871 /* 19469 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6872 /* 19472 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6873 /* 19475 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
6874 /* 19478 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
6875 /* 19481 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6876 /* 19485 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6877 /* 19489 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6878 /* 19493 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6879 /* 19497 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14512:{ *:[iPTR] }, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc) => (RELAXED_DOT_ADD:{ *:[v4i32] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc)
6880 /* 19497 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_ADD),
6881 /* 19500 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6882 /* 19502 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6883 /* 19504 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6884 /* 19506 */ GIR_RootToRootCopy, /*OpIdx*/4, // acc
6885 /* 19508 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6886 /* 19511 */ GIR_RootConstrainSelectedInstOperands,
6887 /* 19512 */ // GIR_Coverage, 467,
6888 /* 19512 */ GIR_EraseRootFromParent_Done,
6889 /* 19513 */ // Label 467: @19513
6890 /* 19513 */ GIM_Try, /*On fail goto*//*Label 468*/ GIMT_Encode4(19570), // Rule ID 468 //
6891 /* 19518 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
6892 /* 19521 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_bf16x8_add_f32),
6893 /* 19526 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6894 /* 19529 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6895 /* 19532 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6896 /* 19535 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
6897 /* 19538 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6898 /* 19542 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6899 /* 19546 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6900 /* 19550 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6901 /* 19554 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14511:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, V128:{ *:[v4f32] }:$acc) => (RELAXED_DOT_BFLOAT:{ *:[v4f32] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, V128:{ *:[v4f32] }:$acc)
6902 /* 19554 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_BFLOAT),
6903 /* 19557 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6904 /* 19559 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
6905 /* 19561 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
6906 /* 19563 */ GIR_RootToRootCopy, /*OpIdx*/4, // acc
6907 /* 19565 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6908 /* 19568 */ GIR_RootConstrainSelectedInstOperands,
6909 /* 19569 */ // GIR_Coverage, 468,
6910 /* 19569 */ GIR_EraseRootFromParent_Done,
6911 /* 19570 */ // Label 468: @19570
6912 /* 19570 */ GIM_Try, /*On fail goto*//*Label 469*/ GIMT_Encode4(19624), // Rule ID 1068 //
6913 /* 19575 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitselect),
6914 /* 19580 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
6915 /* 19583 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
6916 /* 19586 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
6917 /* 19589 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v16s8,
6918 /* 19592 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6919 /* 19596 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6920 /* 19600 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6921 /* 19604 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6922 /* 19608 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14483:{ *:[iPTR] }, V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$c) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
6923 /* 19608 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
6924 /* 19611 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6925 /* 19613 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
6926 /* 19615 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
6927 /* 19617 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6928 /* 19619 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6929 /* 19622 */ GIR_RootConstrainSelectedInstOperands,
6930 /* 19623 */ // GIR_Coverage, 1068,
6931 /* 19623 */ GIR_EraseRootFromParent_Done,
6932 /* 19624 */ // Label 469: @19624
6933 /* 19624 */ GIM_Try, /*On fail goto*//*Label 470*/ GIMT_Encode4(19678), // Rule ID 1069 //
6934 /* 19629 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitselect),
6935 /* 19634 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
6936 /* 19637 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
6937 /* 19640 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
6938 /* 19643 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s16,
6939 /* 19646 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6940 /* 19650 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6941 /* 19654 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6942 /* 19658 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6943 /* 19662 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14483:{ *:[iPTR] }, V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$c) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
6944 /* 19662 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
6945 /* 19665 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6946 /* 19667 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
6947 /* 19669 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
6948 /* 19671 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6949 /* 19673 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6950 /* 19676 */ GIR_RootConstrainSelectedInstOperands,
6951 /* 19677 */ // GIR_Coverage, 1069,
6952 /* 19677 */ GIR_EraseRootFromParent_Done,
6953 /* 19678 */ // Label 470: @19678
6954 /* 19678 */ GIM_Try, /*On fail goto*//*Label 471*/ GIMT_Encode4(19732), // Rule ID 1070 //
6955 /* 19683 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitselect),
6956 /* 19688 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6957 /* 19691 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
6958 /* 19694 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
6959 /* 19697 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
6960 /* 19700 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6961 /* 19704 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6962 /* 19708 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6963 /* 19712 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6964 /* 19716 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14483:{ *:[iPTR] }, V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$c) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
6965 /* 19716 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
6966 /* 19719 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6967 /* 19721 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
6968 /* 19723 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
6969 /* 19725 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6970 /* 19727 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6971 /* 19730 */ GIR_RootConstrainSelectedInstOperands,
6972 /* 19731 */ // GIR_Coverage, 1070,
6973 /* 19731 */ GIR_EraseRootFromParent_Done,
6974 /* 19732 */ // Label 471: @19732
6975 /* 19732 */ GIM_Try, /*On fail goto*//*Label 472*/ GIMT_Encode4(19786), // Rule ID 1071 //
6976 /* 19737 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitselect),
6977 /* 19742 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
6978 /* 19745 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
6979 /* 19748 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
6980 /* 19751 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64,
6981 /* 19754 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6982 /* 19758 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6983 /* 19762 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6984 /* 19766 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6985 /* 19770 */ // (intrinsic_wo_chain:{ *:[v2i64] } 14483:{ *:[iPTR] }, V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$c) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
6986 /* 19770 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
6987 /* 19773 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6988 /* 19775 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
6989 /* 19777 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
6990 /* 19779 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
6991 /* 19781 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6992 /* 19784 */ GIR_RootConstrainSelectedInstOperands,
6993 /* 19785 */ // GIR_Coverage, 1071,
6994 /* 19785 */ GIR_EraseRootFromParent_Done,
6995 /* 19786 */ // Label 472: @19786
6996 /* 19786 */ GIM_Try, /*On fail goto*//*Label 473*/ GIMT_Encode4(19840), // Rule ID 1072 //
6997 /* 19791 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitselect),
6998 /* 19796 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
6999 /* 19799 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
7000 /* 19802 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
7001 /* 19805 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4s32,
7002 /* 19808 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7003 /* 19812 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7004 /* 19816 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7005 /* 19820 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7006 /* 19824 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14483:{ *:[iPTR] }, V128:{ *:[v4f32] }:$v1, V128:{ *:[v4f32] }:$v2, V128:{ *:[v4f32] }:$c) => (BITSELECT:{ *:[v4f32] } ?:{ *:[v4f32] }:$v1, ?:{ *:[v4f32] }:$v2, ?:{ *:[v4f32] }:$c)
7007 /* 19824 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
7008 /* 19827 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7009 /* 19829 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
7010 /* 19831 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
7011 /* 19833 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
7012 /* 19835 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7013 /* 19838 */ GIR_RootConstrainSelectedInstOperands,
7014 /* 19839 */ // GIR_Coverage, 1072,
7015 /* 19839 */ GIR_EraseRootFromParent_Done,
7016 /* 19840 */ // Label 473: @19840
7017 /* 19840 */ GIM_Try, /*On fail goto*//*Label 474*/ GIMT_Encode4(19894), // Rule ID 1073 //
7018 /* 19845 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitselect),
7019 /* 19850 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
7020 /* 19853 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
7021 /* 19856 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
7022 /* 19859 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2s64,
7023 /* 19862 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7024 /* 19866 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7025 /* 19870 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7026 /* 19874 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7027 /* 19878 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14483:{ *:[iPTR] }, V128:{ *:[v2f64] }:$v1, V128:{ *:[v2f64] }:$v2, V128:{ *:[v2f64] }:$c) => (BITSELECT:{ *:[v2f64] } ?:{ *:[v2f64] }:$v1, ?:{ *:[v2f64] }:$v2, ?:{ *:[v2f64] }:$c)
7028 /* 19878 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
7029 /* 19881 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7030 /* 19883 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
7031 /* 19885 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
7032 /* 19887 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
7033 /* 19889 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7034 /* 19892 */ GIR_RootConstrainSelectedInstOperands,
7035 /* 19893 */ // GIR_Coverage, 1073,
7036 /* 19893 */ GIR_EraseRootFromParent_Done,
7037 /* 19894 */ // Label 474: @19894
7038 /* 19894 */ GIM_Try, /*On fail goto*//*Label 475*/ GIMT_Encode4(19948), // Rule ID 1281 //
7039 /* 19899 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_madd),
7040 /* 19904 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
7041 /* 19907 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
7042 /* 19910 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
7043 /* 19913 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s16,
7044 /* 19916 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7045 /* 19920 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7046 /* 19924 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7047 /* 19928 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7048 /* 19932 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14515:{ *:[iPTR] }, V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (MADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
7049 /* 19932 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F16x8),
7050 /* 19935 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7051 /* 19937 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
7052 /* 19939 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
7053 /* 19941 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
7054 /* 19943 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7055 /* 19946 */ GIR_RootConstrainSelectedInstOperands,
7056 /* 19947 */ // GIR_Coverage, 1281,
7057 /* 19947 */ GIR_EraseRootFromParent_Done,
7058 /* 19948 */ // Label 475: @19948
7059 /* 19948 */ GIM_Try, /*On fail goto*//*Label 476*/ GIMT_Encode4(20002), // Rule ID 1282 //
7060 /* 19953 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_nmadd),
7061 /* 19958 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
7062 /* 19961 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
7063 /* 19964 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
7064 /* 19967 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8s16,
7065 /* 19970 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7066 /* 19974 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7067 /* 19978 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7068 /* 19982 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7069 /* 19986 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14518:{ *:[iPTR] }, V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (NMADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
7070 /* 19986 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F16x8),
7071 /* 19989 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7072 /* 19991 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
7073 /* 19993 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
7074 /* 19995 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
7075 /* 19997 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7076 /* 20000 */ GIR_RootConstrainSelectedInstOperands,
7077 /* 20001 */ // GIR_Coverage, 1282,
7078 /* 20001 */ GIR_EraseRootFromParent_Done,
7079 /* 20002 */ // Label 476: @20002
7080 /* 20002 */ GIM_Reject,
7081 /* 20003 */ // Label 457: @20003
7082 /* 20003 */ GIM_Reject,
7083 /* 20004 */ // Label 18: @20004
7084 /* 20004 */ GIM_Try, /*On fail goto*//*Label 477*/ GIMT_Encode4(20104),
7085 /* 20009 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
7086 /* 20012 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_memory_size),
7087 /* 20017 */ GIM_Try, /*On fail goto*//*Label 478*/ GIMT_Encode4(20060), // Rule ID 11 //
7088 /* 20022 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
7089 /* 20025 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7090 /* 20028 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7091 /* 20032 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7092 /* 20036 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7093 /* 20040 */ // MIs[1] Operand 1
7094 /* 20040 */ // No operand predicates
7095 /* 20040 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7096 /* 20042 */ // (intrinsic_w_chain:{ *:[i32] } 14498:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags) => (anonymous_13975MEMORY_SIZE_A32:{ *:[i32] } (imm:{ *:[i32] }):$flags)
7097 /* 20042 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_13975MEMORY_SIZE_A32),
7098 /* 20045 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7099 /* 20047 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
7100 /* 20050 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7101 /* 20053 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7102 /* 20058 */ GIR_RootConstrainSelectedInstOperands,
7103 /* 20059 */ // GIR_Coverage, 11,
7104 /* 20059 */ GIR_EraseRootFromParent_Done,
7105 /* 20060 */ // Label 478: @20060
7106 /* 20060 */ GIM_Try, /*On fail goto*//*Label 479*/ GIMT_Encode4(20103), // Rule ID 13 //
7107 /* 20065 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
7108 /* 20068 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7109 /* 20071 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7110 /* 20075 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7111 /* 20079 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7112 /* 20083 */ // MIs[1] Operand 1
7113 /* 20083 */ // No operand predicates
7114 /* 20083 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7115 /* 20085 */ // (intrinsic_w_chain:{ *:[i64] } 14498:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags) => (anonymous_13976MEMORY_SIZE_A64:{ *:[i64] } (imm:{ *:[i32] }):$flags)
7116 /* 20085 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_13976MEMORY_SIZE_A64),
7117 /* 20088 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7118 /* 20090 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
7119 /* 20093 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7120 /* 20096 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7121 /* 20101 */ GIR_RootConstrainSelectedInstOperands,
7122 /* 20102 */ // GIR_Coverage, 13,
7123 /* 20102 */ GIR_EraseRootFromParent_Done,
7124 /* 20103 */ // Label 479: @20103
7125 /* 20103 */ GIM_Reject,
7126 /* 20104 */ // Label 477: @20104
7127 /* 20104 */ GIM_Try, /*On fail goto*//*Label 480*/ GIMT_Encode4(20222),
7128 /* 20109 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
7129 /* 20112 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_memory_grow),
7130 /* 20117 */ GIM_Try, /*On fail goto*//*Label 481*/ GIMT_Encode4(20169), // Rule ID 12 //
7131 /* 20122 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
7132 /* 20125 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7133 /* 20128 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
7134 /* 20131 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7135 /* 20135 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7136 /* 20139 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7137 /* 20143 */ // MIs[1] Operand 1
7138 /* 20143 */ // No operand predicates
7139 /* 20143 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7140 /* 20147 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7141 /* 20149 */ // (intrinsic_w_chain:{ *:[i32] } 14497:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags, I32:{ *:[i32] }:$delta) => (anonymous_13975MEMORY_GROW_A32:{ *:[i32] } (imm:{ *:[i32] }):$flags, I32:{ *:[i32] }:$delta)
7142 /* 20149 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_13975MEMORY_GROW_A32),
7143 /* 20152 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7144 /* 20154 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
7145 /* 20157 */ GIR_RootToRootCopy, /*OpIdx*/3, // delta
7146 /* 20159 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7147 /* 20162 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7148 /* 20167 */ GIR_RootConstrainSelectedInstOperands,
7149 /* 20168 */ // GIR_Coverage, 12,
7150 /* 20168 */ GIR_EraseRootFromParent_Done,
7151 /* 20169 */ // Label 481: @20169
7152 /* 20169 */ GIM_Try, /*On fail goto*//*Label 482*/ GIMT_Encode4(20221), // Rule ID 14 //
7153 /* 20174 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
7154 /* 20177 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7155 /* 20180 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
7156 /* 20183 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7157 /* 20187 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7158 /* 20191 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
7159 /* 20195 */ // MIs[1] Operand 1
7160 /* 20195 */ // No operand predicates
7161 /* 20195 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7162 /* 20199 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7163 /* 20201 */ // (intrinsic_w_chain:{ *:[i64] } 14497:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags, I64:{ *:[i64] }:$delta) => (anonymous_13976MEMORY_GROW_A64:{ *:[i64] } (imm:{ *:[i32] }):$flags, I64:{ *:[i64] }:$delta)
7164 /* 20201 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_13976MEMORY_GROW_A64),
7165 /* 20204 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7166 /* 20206 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
7167 /* 20209 */ GIR_RootToRootCopy, /*OpIdx*/3, // delta
7168 /* 20211 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7169 /* 20214 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7170 /* 20219 */ GIR_RootConstrainSelectedInstOperands,
7171 /* 20220 */ // GIR_Coverage, 14,
7172 /* 20220 */ GIR_EraseRootFromParent_Done,
7173 /* 20221 */ // Label 482: @20221
7174 /* 20221 */ GIM_Reject,
7175 /* 20222 */ // Label 480: @20222
7176 /* 20222 */ GIM_Reject,
7177 /* 20223 */ // Label 19: @20223
7178 /* 20223 */ GIM_Try, /*On fail goto*//*Label 483*/ GIMT_Encode4(20255), // Rule ID 633 //
7179 /* 20228 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
7180 /* 20231 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7181 /* 20234 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7182 /* 20238 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7183 /* 20242 */ // (anyext:{ *:[i64] } I32:{ *:[i32] }:$src) => (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$src)
7184 /* 20242 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
7185 /* 20247 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7186 /* 20253 */ GIR_RootConstrainSelectedInstOperands,
7187 /* 20254 */ // GIR_Coverage, 633,
7188 /* 20254 */ GIR_Done,
7189 /* 20255 */ // Label 483: @20255
7190 /* 20255 */ GIM_Reject,
7191 /* 20256 */ // Label 20: @20256
7192 /* 20256 */ GIM_Try, /*On fail goto*//*Label 484*/ GIMT_Encode4(20288), // Rule ID 26 //
7193 /* 20261 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
7194 /* 20264 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
7195 /* 20267 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7196 /* 20271 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7197 /* 20275 */ // (trunc:{ *:[i32] } I64:{ *:[i64] }:$src) => (I32_WRAP_I64:{ *:[i32] } I64:{ *:[i64] }:$src)
7198 /* 20275 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_WRAP_I64),
7199 /* 20280 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7200 /* 20286 */ GIR_RootConstrainSelectedInstOperands,
7201 /* 20287 */ // GIR_Coverage, 26,
7202 /* 20287 */ GIR_Done,
7203 /* 20288 */ // Label 484: @20288
7204 /* 20288 */ GIM_Reject,
7205 /* 20289 */ // Label 21: @20289
7206 /* 20289 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 487*/ GIMT_Encode4(20354),
7207 /* 20300 */ /*GILLT_s32*//*Label 485*/ GIMT_Encode4(20308),
7208 /* 20304 */ /*GILLT_s64*//*Label 486*/ GIMT_Encode4(20331),
7209 /* 20308 */ // Label 485: @20308
7210 /* 20308 */ GIM_Try, /*On fail goto*//*Label 488*/ GIMT_Encode4(20330), // Rule ID 7 //
7211 /* 20313 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7212 /* 20317 */ // MIs[0] Operand 1
7213 /* 20317 */ // No operand predicates
7214 /* 20317 */ // (imm:{ *:[i32] }):$imm => (CONST_I32:{ *:[i32] } (imm:{ *:[i32] }):$imm)
7215 /* 20317 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_I32),
7216 /* 20320 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
7217 /* 20322 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
7218 /* 20325 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7219 /* 20328 */ GIR_RootConstrainSelectedInstOperands,
7220 /* 20329 */ // GIR_Coverage, 7,
7221 /* 20329 */ GIR_EraseRootFromParent_Done,
7222 /* 20330 */ // Label 488: @20330
7223 /* 20330 */ GIM_Reject,
7224 /* 20331 */ // Label 486: @20331
7225 /* 20331 */ GIM_Try, /*On fail goto*//*Label 489*/ GIMT_Encode4(20353), // Rule ID 8 //
7226 /* 20336 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7227 /* 20340 */ // MIs[0] Operand 1
7228 /* 20340 */ // No operand predicates
7229 /* 20340 */ // (imm:{ *:[i64] }):$imm => (CONST_I64:{ *:[i64] } (imm:{ *:[i64] }):$imm)
7230 /* 20340 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_I64),
7231 /* 20343 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
7232 /* 20345 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
7233 /* 20348 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7234 /* 20351 */ GIR_RootConstrainSelectedInstOperands,
7235 /* 20352 */ // GIR_Coverage, 8,
7236 /* 20352 */ GIR_EraseRootFromParent_Done,
7237 /* 20353 */ // Label 489: @20353
7238 /* 20353 */ GIM_Reject,
7239 /* 20354 */ // Label 487: @20354
7240 /* 20354 */ GIM_Reject,
7241 /* 20355 */ // Label 22: @20355
7242 /* 20355 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 492*/ GIMT_Encode4(20420),
7243 /* 20366 */ /*GILLT_s32*//*Label 490*/ GIMT_Encode4(20374),
7244 /* 20370 */ /*GILLT_s64*//*Label 491*/ GIMT_Encode4(20397),
7245 /* 20374 */ // Label 490: @20374
7246 /* 20374 */ GIM_Try, /*On fail goto*//*Label 493*/ GIMT_Encode4(20396), // Rule ID 9 //
7247 /* 20379 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
7248 /* 20383 */ // MIs[0] Operand 1
7249 /* 20383 */ // No operand predicates
7250 /* 20383 */ // (fpimm:{ *:[f32] }):$imm => (CONST_F32:{ *:[f32] } (fpimm:{ *:[f32] }):$imm)
7251 /* 20383 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_F32),
7252 /* 20386 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
7253 /* 20388 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
7254 /* 20391 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7255 /* 20394 */ GIR_RootConstrainSelectedInstOperands,
7256 /* 20395 */ // GIR_Coverage, 9,
7257 /* 20395 */ GIR_EraseRootFromParent_Done,
7258 /* 20396 */ // Label 493: @20396
7259 /* 20396 */ GIM_Reject,
7260 /* 20397 */ // Label 491: @20397
7261 /* 20397 */ GIM_Try, /*On fail goto*//*Label 494*/ GIMT_Encode4(20419), // Rule ID 10 //
7262 /* 20402 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
7263 /* 20406 */ // MIs[0] Operand 1
7264 /* 20406 */ // No operand predicates
7265 /* 20406 */ // (fpimm:{ *:[f64] }):$imm => (CONST_F64:{ *:[f64] } (fpimm:{ *:[f64] }):$imm)
7266 /* 20406 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_F64),
7267 /* 20409 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
7268 /* 20411 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
7269 /* 20414 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7270 /* 20417 */ GIR_RootConstrainSelectedInstOperands,
7271 /* 20418 */ // GIR_Coverage, 10,
7272 /* 20418 */ GIR_EraseRootFromParent_Done,
7273 /* 20419 */ // Label 494: @20419
7274 /* 20419 */ GIM_Reject,
7275 /* 20420 */ // Label 492: @20420
7276 /* 20420 */ GIM_Reject,
7277 /* 20421 */ // Label 23: @20421
7278 /* 20421 */ GIM_Try, /*On fail goto*//*Label 495*/ GIMT_Encode4(20453), // Rule ID 27 //
7279 /* 20426 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
7280 /* 20429 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7281 /* 20432 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7282 /* 20436 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7283 /* 20440 */ // (sext:{ *:[i64] } I32:{ *:[i32] }:$src) => (I64_EXTEND_S_I32:{ *:[i64] } I32:{ *:[i32] }:$src)
7284 /* 20440 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_S_I32),
7285 /* 20445 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7286 /* 20451 */ GIR_RootConstrainSelectedInstOperands,
7287 /* 20452 */ // GIR_Coverage, 27,
7288 /* 20452 */ GIR_Done,
7289 /* 20453 */ // Label 495: @20453
7290 /* 20453 */ GIM_Reject,
7291 /* 20454 */ // Label 24: @20454
7292 /* 20454 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 498*/ GIMT_Encode4(20664),
7293 /* 20465 */ /*GILLT_s32*//*Label 496*/ GIMT_Encode4(20473),
7294 /* 20469 */ /*GILLT_s64*//*Label 497*/ GIMT_Encode4(20553),
7295 /* 20473 */ // Label 496: @20473
7296 /* 20473 */ GIM_Try, /*On fail goto*//*Label 499*/ GIMT_Encode4(20552),
7297 /* 20478 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7298 /* 20481 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7299 /* 20485 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7300 /* 20489 */ GIM_Try, /*On fail goto*//*Label 500*/ GIMT_Encode4(20520), // Rule ID 29 //
7301 /* 20494 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSignExt),
7302 /* 20497 */ // MIs[0] Operand 2
7303 /* 20497 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(8),
7304 /* 20508 */ // (sext_inreg:{ *:[i32] } I32:{ *:[i32] }:$src, i8:{ *:[Other] }) => (I32_EXTEND8_S_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
7305 /* 20508 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_EXTEND8_S_I32),
7306 /* 20511 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7307 /* 20513 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
7308 /* 20515 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7309 /* 20518 */ GIR_RootConstrainSelectedInstOperands,
7310 /* 20519 */ // GIR_Coverage, 29,
7311 /* 20519 */ GIR_EraseRootFromParent_Done,
7312 /* 20520 */ // Label 500: @20520
7313 /* 20520 */ GIM_Try, /*On fail goto*//*Label 501*/ GIMT_Encode4(20551), // Rule ID 30 //
7314 /* 20525 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSignExt),
7315 /* 20528 */ // MIs[0] Operand 2
7316 /* 20528 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(16),
7317 /* 20539 */ // (sext_inreg:{ *:[i32] } I32:{ *:[i32] }:$src, i16:{ *:[Other] }) => (I32_EXTEND16_S_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
7318 /* 20539 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_EXTEND16_S_I32),
7319 /* 20542 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7320 /* 20544 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
7321 /* 20546 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7322 /* 20549 */ GIR_RootConstrainSelectedInstOperands,
7323 /* 20550 */ // GIR_Coverage, 30,
7324 /* 20550 */ GIR_EraseRootFromParent_Done,
7325 /* 20551 */ // Label 501: @20551
7326 /* 20551 */ GIM_Reject,
7327 /* 20552 */ // Label 499: @20552
7328 /* 20552 */ GIM_Reject,
7329 /* 20553 */ // Label 497: @20553
7330 /* 20553 */ GIM_Try, /*On fail goto*//*Label 502*/ GIMT_Encode4(20663),
7331 /* 20558 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
7332 /* 20561 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7333 /* 20565 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7334 /* 20569 */ GIM_Try, /*On fail goto*//*Label 503*/ GIMT_Encode4(20600), // Rule ID 31 //
7335 /* 20574 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSignExt),
7336 /* 20577 */ // MIs[0] Operand 2
7337 /* 20577 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(8),
7338 /* 20588 */ // (sext_inreg:{ *:[i64] } I64:{ *:[i64] }:$src, i8:{ *:[Other] }) => (I64_EXTEND8_S_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
7339 /* 20588 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND8_S_I64),
7340 /* 20591 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7341 /* 20593 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
7342 /* 20595 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7343 /* 20598 */ GIR_RootConstrainSelectedInstOperands,
7344 /* 20599 */ // GIR_Coverage, 31,
7345 /* 20599 */ GIR_EraseRootFromParent_Done,
7346 /* 20600 */ // Label 503: @20600
7347 /* 20600 */ GIM_Try, /*On fail goto*//*Label 504*/ GIMT_Encode4(20631), // Rule ID 32 //
7348 /* 20605 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSignExt),
7349 /* 20608 */ // MIs[0] Operand 2
7350 /* 20608 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(16),
7351 /* 20619 */ // (sext_inreg:{ *:[i64] } I64:{ *:[i64] }:$src, i16:{ *:[Other] }) => (I64_EXTEND16_S_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
7352 /* 20619 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND16_S_I64),
7353 /* 20622 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7354 /* 20624 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
7355 /* 20626 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7356 /* 20629 */ GIR_RootConstrainSelectedInstOperands,
7357 /* 20630 */ // GIR_Coverage, 32,
7358 /* 20630 */ GIR_EraseRootFromParent_Done,
7359 /* 20631 */ // Label 504: @20631
7360 /* 20631 */ GIM_Try, /*On fail goto*//*Label 505*/ GIMT_Encode4(20662), // Rule ID 33 //
7361 /* 20636 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSignExt),
7362 /* 20639 */ // MIs[0] Operand 2
7363 /* 20639 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(32),
7364 /* 20650 */ // (sext_inreg:{ *:[i64] } I64:{ *:[i64] }:$src, i32:{ *:[Other] }) => (I64_EXTEND32_S_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
7365 /* 20650 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND32_S_I64),
7366 /* 20653 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7367 /* 20655 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
7368 /* 20657 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7369 /* 20660 */ GIR_RootConstrainSelectedInstOperands,
7370 /* 20661 */ // GIR_Coverage, 33,
7371 /* 20661 */ GIR_EraseRootFromParent_Done,
7372 /* 20662 */ // Label 505: @20662
7373 /* 20662 */ GIM_Reject,
7374 /* 20663 */ // Label 502: @20663
7375 /* 20663 */ GIM_Reject,
7376 /* 20664 */ // Label 498: @20664
7377 /* 20664 */ GIM_Reject,
7378 /* 20665 */ // Label 25: @20665
7379 /* 20665 */ GIM_Try, /*On fail goto*//*Label 506*/ GIMT_Encode4(20697), // Rule ID 28 //
7380 /* 20670 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
7381 /* 20673 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7382 /* 20676 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7383 /* 20680 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7384 /* 20684 */ // (zext:{ *:[i64] } I32:{ *:[i32] }:$src) => (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$src)
7385 /* 20684 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
7386 /* 20689 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7387 /* 20695 */ GIR_RootConstrainSelectedInstOperands,
7388 /* 20696 */ // GIR_Coverage, 28,
7389 /* 20696 */ GIR_Done,
7390 /* 20697 */ // Label 506: @20697
7391 /* 20697 */ GIM_Reject,
7392 /* 20698 */ // Label 26: @20698
7393 /* 20698 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 509*/ GIMT_Encode4(20979),
7394 /* 20709 */ /*GILLT_s32*//*Label 507*/ GIMT_Encode4(20717),
7395 /* 20713 */ /*GILLT_s64*//*Label 508*/ GIMT_Encode4(20808),
7396 /* 20717 */ // Label 507: @20717
7397 /* 20717 */ GIM_Try, /*On fail goto*//*Label 510*/ GIMT_Encode4(20807),
7398 /* 20722 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7399 /* 20725 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7400 /* 20728 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7401 /* 20732 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7402 /* 20736 */ GIM_Try, /*On fail goto*//*Label 511*/ GIMT_Encode4(20784), // Rule ID 650 //
7403 /* 20741 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7404 /* 20745 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7405 /* 20749 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7406 /* 20753 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
7407 /* 20757 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7408 /* 20762 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
7409 /* 20766 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7410 /* 20768 */ // (shl:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (SHL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7411 /* 20768 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I32),
7412 /* 20771 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7413 /* 20773 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7414 /* 20775 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7415 /* 20779 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7416 /* 20782 */ GIR_RootConstrainSelectedInstOperands,
7417 /* 20783 */ // GIR_Coverage, 650,
7418 /* 20783 */ GIR_EraseRootFromParent_Done,
7419 /* 20784 */ // Label 511: @20784
7420 /* 20784 */ GIM_Try, /*On fail goto*//*Label 512*/ GIMT_Encode4(20806), // Rule ID 84 //
7421 /* 20789 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7422 /* 20793 */ // (shl:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SHL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7423 /* 20793 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I32),
7424 /* 20798 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7425 /* 20804 */ GIR_RootConstrainSelectedInstOperands,
7426 /* 20805 */ // GIR_Coverage, 84,
7427 /* 20805 */ GIR_Done,
7428 /* 20806 */ // Label 512: @20806
7429 /* 20806 */ GIM_Reject,
7430 /* 20807 */ // Label 510: @20807
7431 /* 20807 */ GIM_Reject,
7432 /* 20808 */ // Label 508: @20808
7433 /* 20808 */ GIM_Try, /*On fail goto*//*Label 513*/ GIMT_Encode4(20978),
7434 /* 20813 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
7435 /* 20816 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7436 /* 20819 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7437 /* 20823 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7438 /* 20827 */ GIM_Try, /*On fail goto*//*Label 514*/ GIMT_Encode4(20907), // Rule ID 660 //
7439 /* 20832 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7440 /* 20836 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ZEXT),
7441 /* 20840 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7442 /* 20844 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
7443 /* 20848 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
7444 /* 20852 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
7445 /* 20856 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
7446 /* 20860 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7447 /* 20865 */ GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 63,
7448 /* 20869 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
7449 /* 20871 */ // (shl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (zext:{ *:[i64] } (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 63:{ *:[i32] }))) => (SHL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$rhs))
7450 /* 20871 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
7451 /* 20874 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
7452 /* 20878 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
7453 /* 20883 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/2, /*OpIdx*/1, // rhs
7454 /* 20887 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7455 /* 20890 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7456 /* 20892 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I64),
7457 /* 20895 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7458 /* 20897 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7459 /* 20899 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7460 /* 20902 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7461 /* 20905 */ GIR_RootConstrainSelectedInstOperands,
7462 /* 20906 */ // GIR_Coverage, 660,
7463 /* 20906 */ GIR_EraseRootFromParent_Done,
7464 /* 20907 */ // Label 514: @20907
7465 /* 20907 */ GIM_Try, /*On fail goto*//*Label 515*/ GIMT_Encode4(20955), // Rule ID 653 //
7466 /* 20912 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7467 /* 20916 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7468 /* 20920 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
7469 /* 20924 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
7470 /* 20928 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7471 /* 20933 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
7472 /* 20937 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7473 /* 20939 */ // (shl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (SHL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7474 /* 20939 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I64),
7475 /* 20942 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7476 /* 20944 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7477 /* 20946 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7478 /* 20950 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7479 /* 20953 */ GIR_RootConstrainSelectedInstOperands,
7480 /* 20954 */ // GIR_Coverage, 653,
7481 /* 20954 */ GIR_EraseRootFromParent_Done,
7482 /* 20955 */ // Label 515: @20955
7483 /* 20955 */ GIM_Try, /*On fail goto*//*Label 516*/ GIMT_Encode4(20977), // Rule ID 85 //
7484 /* 20960 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7485 /* 20964 */ // (shl:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SHL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7486 /* 20964 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I64),
7487 /* 20969 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7488 /* 20975 */ GIR_RootConstrainSelectedInstOperands,
7489 /* 20976 */ // GIR_Coverage, 85,
7490 /* 20976 */ GIR_Done,
7491 /* 20977 */ // Label 516: @20977
7492 /* 20977 */ GIM_Reject,
7493 /* 20978 */ // Label 513: @20978
7494 /* 20978 */ GIM_Reject,
7495 /* 20979 */ // Label 509: @20979
7496 /* 20979 */ GIM_Reject,
7497 /* 20980 */ // Label 27: @20980
7498 /* 20980 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 519*/ GIMT_Encode4(21261),
7499 /* 20991 */ /*GILLT_s32*//*Label 517*/ GIMT_Encode4(20999),
7500 /* 20995 */ /*GILLT_s64*//*Label 518*/ GIMT_Encode4(21090),
7501 /* 20999 */ // Label 517: @20999
7502 /* 20999 */ GIM_Try, /*On fail goto*//*Label 520*/ GIMT_Encode4(21089),
7503 /* 21004 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7504 /* 21007 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7505 /* 21010 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7506 /* 21014 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7507 /* 21018 */ GIM_Try, /*On fail goto*//*Label 521*/ GIMT_Encode4(21066), // Rule ID 652 //
7508 /* 21023 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7509 /* 21027 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7510 /* 21031 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7511 /* 21035 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
7512 /* 21039 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7513 /* 21044 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
7514 /* 21048 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7515 /* 21050 */ // (srl:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (SHR_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7516 /* 21050 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I32),
7517 /* 21053 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7518 /* 21055 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7519 /* 21057 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7520 /* 21061 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7521 /* 21064 */ GIR_RootConstrainSelectedInstOperands,
7522 /* 21065 */ // GIR_Coverage, 652,
7523 /* 21065 */ GIR_EraseRootFromParent_Done,
7524 /* 21066 */ // Label 521: @21066
7525 /* 21066 */ GIM_Try, /*On fail goto*//*Label 522*/ GIMT_Encode4(21088), // Rule ID 88 //
7526 /* 21071 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7527 /* 21075 */ // (srl:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SHR_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7528 /* 21075 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I32),
7529 /* 21080 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7530 /* 21086 */ GIR_RootConstrainSelectedInstOperands,
7531 /* 21087 */ // GIR_Coverage, 88,
7532 /* 21087 */ GIR_Done,
7533 /* 21088 */ // Label 522: @21088
7534 /* 21088 */ GIM_Reject,
7535 /* 21089 */ // Label 520: @21089
7536 /* 21089 */ GIM_Reject,
7537 /* 21090 */ // Label 518: @21090
7538 /* 21090 */ GIM_Try, /*On fail goto*//*Label 523*/ GIMT_Encode4(21260),
7539 /* 21095 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
7540 /* 21098 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7541 /* 21101 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7542 /* 21105 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7543 /* 21109 */ GIM_Try, /*On fail goto*//*Label 524*/ GIMT_Encode4(21189), // Rule ID 662 //
7544 /* 21114 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7545 /* 21118 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ZEXT),
7546 /* 21122 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7547 /* 21126 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
7548 /* 21130 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
7549 /* 21134 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
7550 /* 21138 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
7551 /* 21142 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7552 /* 21147 */ GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 63,
7553 /* 21151 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
7554 /* 21153 */ // (srl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (zext:{ *:[i64] } (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 63:{ *:[i32] }))) => (SHR_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$rhs))
7555 /* 21153 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
7556 /* 21156 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
7557 /* 21160 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
7558 /* 21165 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/2, /*OpIdx*/1, // rhs
7559 /* 21169 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7560 /* 21172 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7561 /* 21174 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I64),
7562 /* 21177 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7563 /* 21179 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7564 /* 21181 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7565 /* 21184 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7566 /* 21187 */ GIR_RootConstrainSelectedInstOperands,
7567 /* 21188 */ // GIR_Coverage, 662,
7568 /* 21188 */ GIR_EraseRootFromParent_Done,
7569 /* 21189 */ // Label 524: @21189
7570 /* 21189 */ GIM_Try, /*On fail goto*//*Label 525*/ GIMT_Encode4(21237), // Rule ID 655 //
7571 /* 21194 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7572 /* 21198 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7573 /* 21202 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
7574 /* 21206 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
7575 /* 21210 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7576 /* 21215 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
7577 /* 21219 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7578 /* 21221 */ // (srl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (SHR_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7579 /* 21221 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I64),
7580 /* 21224 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7581 /* 21226 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7582 /* 21228 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7583 /* 21232 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7584 /* 21235 */ GIR_RootConstrainSelectedInstOperands,
7585 /* 21236 */ // GIR_Coverage, 655,
7586 /* 21236 */ GIR_EraseRootFromParent_Done,
7587 /* 21237 */ // Label 525: @21237
7588 /* 21237 */ GIM_Try, /*On fail goto*//*Label 526*/ GIMT_Encode4(21259), // Rule ID 89 //
7589 /* 21242 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7590 /* 21246 */ // (srl:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SHR_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7591 /* 21246 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I64),
7592 /* 21251 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7593 /* 21257 */ GIR_RootConstrainSelectedInstOperands,
7594 /* 21258 */ // GIR_Coverage, 89,
7595 /* 21258 */ GIR_Done,
7596 /* 21259 */ // Label 526: @21259
7597 /* 21259 */ GIM_Reject,
7598 /* 21260 */ // Label 523: @21260
7599 /* 21260 */ GIM_Reject,
7600 /* 21261 */ // Label 519: @21261
7601 /* 21261 */ GIM_Reject,
7602 /* 21262 */ // Label 28: @21262
7603 /* 21262 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 529*/ GIMT_Encode4(21543),
7604 /* 21273 */ /*GILLT_s32*//*Label 527*/ GIMT_Encode4(21281),
7605 /* 21277 */ /*GILLT_s64*//*Label 528*/ GIMT_Encode4(21372),
7606 /* 21281 */ // Label 527: @21281
7607 /* 21281 */ GIM_Try, /*On fail goto*//*Label 530*/ GIMT_Encode4(21371),
7608 /* 21286 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7609 /* 21289 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7610 /* 21292 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7611 /* 21296 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7612 /* 21300 */ GIM_Try, /*On fail goto*//*Label 531*/ GIMT_Encode4(21348), // Rule ID 651 //
7613 /* 21305 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7614 /* 21309 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7615 /* 21313 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7616 /* 21317 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
7617 /* 21321 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7618 /* 21326 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
7619 /* 21330 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7620 /* 21332 */ // (sra:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (SHR_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7621 /* 21332 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I32),
7622 /* 21335 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7623 /* 21337 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7624 /* 21339 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7625 /* 21343 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7626 /* 21346 */ GIR_RootConstrainSelectedInstOperands,
7627 /* 21347 */ // GIR_Coverage, 651,
7628 /* 21347 */ GIR_EraseRootFromParent_Done,
7629 /* 21348 */ // Label 531: @21348
7630 /* 21348 */ GIM_Try, /*On fail goto*//*Label 532*/ GIMT_Encode4(21370), // Rule ID 86 //
7631 /* 21353 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7632 /* 21357 */ // (sra:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SHR_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7633 /* 21357 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I32),
7634 /* 21362 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7635 /* 21368 */ GIR_RootConstrainSelectedInstOperands,
7636 /* 21369 */ // GIR_Coverage, 86,
7637 /* 21369 */ GIR_Done,
7638 /* 21370 */ // Label 532: @21370
7639 /* 21370 */ GIM_Reject,
7640 /* 21371 */ // Label 530: @21371
7641 /* 21371 */ GIM_Reject,
7642 /* 21372 */ // Label 528: @21372
7643 /* 21372 */ GIM_Try, /*On fail goto*//*Label 533*/ GIMT_Encode4(21542),
7644 /* 21377 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
7645 /* 21380 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7646 /* 21383 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7647 /* 21387 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7648 /* 21391 */ GIM_Try, /*On fail goto*//*Label 534*/ GIMT_Encode4(21471), // Rule ID 661 //
7649 /* 21396 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7650 /* 21400 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ZEXT),
7651 /* 21404 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7652 /* 21408 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
7653 /* 21412 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
7654 /* 21416 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
7655 /* 21420 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
7656 /* 21424 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7657 /* 21429 */ GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 63,
7658 /* 21433 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
7659 /* 21435 */ // (sra:{ *:[i64] } I64:{ *:[i64] }:$lhs, (zext:{ *:[i64] } (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 63:{ *:[i32] }))) => (SHR_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$rhs))
7660 /* 21435 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
7661 /* 21438 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
7662 /* 21442 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
7663 /* 21447 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/2, /*OpIdx*/1, // rhs
7664 /* 21451 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7665 /* 21454 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7666 /* 21456 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I64),
7667 /* 21459 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7668 /* 21461 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7669 /* 21463 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7670 /* 21466 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7671 /* 21469 */ GIR_RootConstrainSelectedInstOperands,
7672 /* 21470 */ // GIR_Coverage, 661,
7673 /* 21470 */ GIR_EraseRootFromParent_Done,
7674 /* 21471 */ // Label 534: @21471
7675 /* 21471 */ GIM_Try, /*On fail goto*//*Label 535*/ GIMT_Encode4(21519), // Rule ID 654 //
7676 /* 21476 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7677 /* 21480 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7678 /* 21484 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
7679 /* 21488 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
7680 /* 21492 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7681 /* 21497 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
7682 /* 21501 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7683 /* 21503 */ // (sra:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (SHR_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7684 /* 21503 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I64),
7685 /* 21506 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7686 /* 21508 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7687 /* 21510 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7688 /* 21514 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7689 /* 21517 */ GIR_RootConstrainSelectedInstOperands,
7690 /* 21518 */ // GIR_Coverage, 654,
7691 /* 21518 */ GIR_EraseRootFromParent_Done,
7692 /* 21519 */ // Label 535: @21519
7693 /* 21519 */ GIM_Try, /*On fail goto*//*Label 536*/ GIMT_Encode4(21541), // Rule ID 87 //
7694 /* 21524 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7695 /* 21528 */ // (sra:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SHR_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7696 /* 21528 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I64),
7697 /* 21533 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7698 /* 21539 */ GIR_RootConstrainSelectedInstOperands,
7699 /* 21540 */ // GIR_Coverage, 87,
7700 /* 21540 */ GIR_Done,
7701 /* 21541 */ // Label 536: @21541
7702 /* 21541 */ GIM_Reject,
7703 /* 21542 */ // Label 533: @21542
7704 /* 21542 */ GIM_Reject,
7705 /* 21543 */ // Label 529: @21543
7706 /* 21543 */ GIM_Reject,
7707 /* 21544 */ // Label 29: @21544
7708 /* 21544 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 539*/ GIMT_Encode4(21745),
7709 /* 21555 */ /*GILLT_s32*//*Label 537*/ GIMT_Encode4(21563),
7710 /* 21559 */ /*GILLT_s64*//*Label 538*/ GIMT_Encode4(21654),
7711 /* 21563 */ // Label 537: @21563
7712 /* 21563 */ GIM_Try, /*On fail goto*//*Label 540*/ GIMT_Encode4(21653),
7713 /* 21568 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7714 /* 21571 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7715 /* 21574 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7716 /* 21578 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7717 /* 21582 */ GIM_Try, /*On fail goto*//*Label 541*/ GIMT_Encode4(21630), // Rule ID 657 //
7718 /* 21587 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7719 /* 21591 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7720 /* 21595 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7721 /* 21599 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
7722 /* 21603 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7723 /* 21608 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
7724 /* 21612 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7725 /* 21614 */ // (rotr:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (ROTR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7726 /* 21614 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I32),
7727 /* 21617 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7728 /* 21619 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7729 /* 21621 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7730 /* 21625 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7731 /* 21628 */ GIR_RootConstrainSelectedInstOperands,
7732 /* 21629 */ // GIR_Coverage, 657,
7733 /* 21629 */ GIR_EraseRootFromParent_Done,
7734 /* 21630 */ // Label 541: @21630
7735 /* 21630 */ GIM_Try, /*On fail goto*//*Label 542*/ GIMT_Encode4(21652), // Rule ID 92 //
7736 /* 21635 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7737 /* 21639 */ // (rotr:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (ROTR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7738 /* 21639 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I32),
7739 /* 21644 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7740 /* 21650 */ GIR_RootConstrainSelectedInstOperands,
7741 /* 21651 */ // GIR_Coverage, 92,
7742 /* 21651 */ GIR_Done,
7743 /* 21652 */ // Label 542: @21652
7744 /* 21652 */ GIM_Reject,
7745 /* 21653 */ // Label 540: @21653
7746 /* 21653 */ GIM_Reject,
7747 /* 21654 */ // Label 538: @21654
7748 /* 21654 */ GIM_Try, /*On fail goto*//*Label 543*/ GIMT_Encode4(21744),
7749 /* 21659 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
7750 /* 21662 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7751 /* 21665 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7752 /* 21669 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7753 /* 21673 */ GIM_Try, /*On fail goto*//*Label 544*/ GIMT_Encode4(21721), // Rule ID 659 //
7754 /* 21678 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7755 /* 21682 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7756 /* 21686 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
7757 /* 21690 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
7758 /* 21694 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7759 /* 21699 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
7760 /* 21703 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7761 /* 21705 */ // (rotr:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (ROTR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7762 /* 21705 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I64),
7763 /* 21708 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7764 /* 21710 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7765 /* 21712 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7766 /* 21716 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7767 /* 21719 */ GIR_RootConstrainSelectedInstOperands,
7768 /* 21720 */ // GIR_Coverage, 659,
7769 /* 21720 */ GIR_EraseRootFromParent_Done,
7770 /* 21721 */ // Label 544: @21721
7771 /* 21721 */ GIM_Try, /*On fail goto*//*Label 545*/ GIMT_Encode4(21743), // Rule ID 93 //
7772 /* 21726 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7773 /* 21730 */ // (rotr:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (ROTR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7774 /* 21730 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I64),
7775 /* 21735 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7776 /* 21741 */ GIR_RootConstrainSelectedInstOperands,
7777 /* 21742 */ // GIR_Coverage, 93,
7778 /* 21742 */ GIR_Done,
7779 /* 21743 */ // Label 545: @21743
7780 /* 21743 */ GIM_Reject,
7781 /* 21744 */ // Label 543: @21744
7782 /* 21744 */ GIM_Reject,
7783 /* 21745 */ // Label 539: @21745
7784 /* 21745 */ GIM_Reject,
7785 /* 21746 */ // Label 30: @21746
7786 /* 21746 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 548*/ GIMT_Encode4(21947),
7787 /* 21757 */ /*GILLT_s32*//*Label 546*/ GIMT_Encode4(21765),
7788 /* 21761 */ /*GILLT_s64*//*Label 547*/ GIMT_Encode4(21856),
7789 /* 21765 */ // Label 546: @21765
7790 /* 21765 */ GIM_Try, /*On fail goto*//*Label 549*/ GIMT_Encode4(21855),
7791 /* 21770 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
7792 /* 21773 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7793 /* 21776 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7794 /* 21780 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7795 /* 21784 */ GIM_Try, /*On fail goto*//*Label 550*/ GIMT_Encode4(21832), // Rule ID 656 //
7796 /* 21789 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7797 /* 21793 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7798 /* 21797 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
7799 /* 21801 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
7800 /* 21805 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7801 /* 21810 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
7802 /* 21814 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7803 /* 21816 */ // (rotl:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (ROTL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7804 /* 21816 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I32),
7805 /* 21819 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7806 /* 21821 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7807 /* 21823 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7808 /* 21827 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7809 /* 21830 */ GIR_RootConstrainSelectedInstOperands,
7810 /* 21831 */ // GIR_Coverage, 656,
7811 /* 21831 */ GIR_EraseRootFromParent_Done,
7812 /* 21832 */ // Label 550: @21832
7813 /* 21832 */ GIM_Try, /*On fail goto*//*Label 551*/ GIMT_Encode4(21854), // Rule ID 90 //
7814 /* 21837 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7815 /* 21841 */ // (rotl:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (ROTL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
7816 /* 21841 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I32),
7817 /* 21846 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7818 /* 21852 */ GIR_RootConstrainSelectedInstOperands,
7819 /* 21853 */ // GIR_Coverage, 90,
7820 /* 21853 */ GIR_Done,
7821 /* 21854 */ // Label 551: @21854
7822 /* 21854 */ GIM_Reject,
7823 /* 21855 */ // Label 549: @21855
7824 /* 21855 */ GIM_Reject,
7825 /* 21856 */ // Label 547: @21856
7826 /* 21856 */ GIM_Try, /*On fail goto*//*Label 552*/ GIMT_Encode4(21946),
7827 /* 21861 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
7828 /* 21864 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
7829 /* 21867 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7830 /* 21871 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7831 /* 21875 */ GIM_Try, /*On fail goto*//*Label 553*/ GIMT_Encode4(21923), // Rule ID 658 //
7832 /* 21880 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7833 /* 21884 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
7834 /* 21888 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
7835 /* 21892 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
7836 /* 21896 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7837 /* 21901 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
7838 /* 21905 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7839 /* 21907 */ // (rotl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (ROTL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7840 /* 21907 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I64),
7841 /* 21910 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7842 /* 21912 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
7843 /* 21914 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
7844 /* 21918 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7845 /* 21921 */ GIR_RootConstrainSelectedInstOperands,
7846 /* 21922 */ // GIR_Coverage, 658,
7847 /* 21922 */ GIR_EraseRootFromParent_Done,
7848 /* 21923 */ // Label 553: @21923
7849 /* 21923 */ GIM_Try, /*On fail goto*//*Label 554*/ GIMT_Encode4(21945), // Rule ID 91 //
7850 /* 21928 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7851 /* 21932 */ // (rotl:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (ROTL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
7852 /* 21932 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I64),
7853 /* 21937 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
7854 /* 21943 */ GIR_RootConstrainSelectedInstOperands,
7855 /* 21944 */ // GIR_Coverage, 91,
7856 /* 21944 */ GIR_Done,
7857 /* 21945 */ // Label 554: @21945
7858 /* 21945 */ GIM_Reject,
7859 /* 21946 */ // Label 552: @21946
7860 /* 21946 */ GIM_Reject,
7861 /* 21947 */ // Label 548: @21947
7862 /* 21947 */ GIM_Reject,
7863 /* 21948 */ // Label 31: @21948
7864 /* 21948 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 560*/ GIMT_Encode4(26632),
7865 /* 21959 */ /*GILLT_s32*//*Label 555*/ GIMT_Encode4(21983), GIMT_Encode4(0),
7866 /* 21967 */ /*GILLT_v16s8*//*Label 556*/ GIMT_Encode4(25304),
7867 /* 21971 */ /*GILLT_v8s16*//*Label 557*/ GIMT_Encode4(25671),
7868 /* 21975 */ /*GILLT_v4s32*//*Label 558*/ GIMT_Encode4(26038),
7869 /* 21979 */ /*GILLT_v2s64*//*Label 559*/ GIMT_Encode4(26405),
7870 /* 21983 */ // Label 555: @21983
7871 /* 21983 */ GIM_Try, /*On fail goto*//*Label 561*/ GIMT_Encode4(22048), // Rule ID 1119 //
7872 /* 21988 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7873 /* 21991 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
7874 /* 21994 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7875 /* 21998 */ // MIs[0] Operand 1
7876 /* 21998 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
7877 /* 22003 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7878 /* 22007 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
7879 /* 22011 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7880 /* 22014 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
7881 /* 22019 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
7882 /* 22023 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7883 /* 22028 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
7884 /* 22032 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7885 /* 22034 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x)
7886 /* 22034 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7887 /* 22037 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7888 /* 22039 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
7889 /* 22043 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7890 /* 22046 */ GIR_RootConstrainSelectedInstOperands,
7891 /* 22047 */ // GIR_Coverage, 1119,
7892 /* 22047 */ GIR_EraseRootFromParent_Done,
7893 /* 22048 */ // Label 561: @22048
7894 /* 22048 */ GIM_Try, /*On fail goto*//*Label 562*/ GIMT_Encode4(22133), // Rule ID 1120 //
7895 /* 22053 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7896 /* 22056 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
7897 /* 22059 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7898 /* 22063 */ // MIs[0] Operand 1
7899 /* 22063 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
7900 /* 22068 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7901 /* 22072 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
7902 /* 22076 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7903 /* 22079 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
7904 /* 22084 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
7905 /* 22088 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7906 /* 22093 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
7907 /* 22097 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7908 /* 22099 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x))
7909 /* 22099 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
7910 /* 22102 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7911 /* 22106 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
7912 /* 22111 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
7913 /* 22115 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7914 /* 22118 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7915 /* 22120 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
7916 /* 22123 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7917 /* 22125 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7918 /* 22128 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7919 /* 22131 */ GIR_RootConstrainSelectedInstOperands,
7920 /* 22132 */ // GIR_Coverage, 1120,
7921 /* 22132 */ GIR_EraseRootFromParent_Done,
7922 /* 22133 */ // Label 562: @22133
7923 /* 22133 */ GIM_Try, /*On fail goto*//*Label 563*/ GIMT_Encode4(22198), // Rule ID 1121 //
7924 /* 22138 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7925 /* 22141 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
7926 /* 22144 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7927 /* 22148 */ // MIs[0] Operand 1
7928 /* 22148 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
7929 /* 22153 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7930 /* 22157 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
7931 /* 22161 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7932 /* 22164 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
7933 /* 22169 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
7934 /* 22173 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7935 /* 22178 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
7936 /* 22182 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7937 /* 22184 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x)
7938 /* 22184 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7939 /* 22187 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7940 /* 22189 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
7941 /* 22193 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7942 /* 22196 */ GIR_RootConstrainSelectedInstOperands,
7943 /* 22197 */ // GIR_Coverage, 1121,
7944 /* 22197 */ GIR_EraseRootFromParent_Done,
7945 /* 22198 */ // Label 563: @22198
7946 /* 22198 */ GIM_Try, /*On fail goto*//*Label 564*/ GIMT_Encode4(22283), // Rule ID 1122 //
7947 /* 22203 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7948 /* 22206 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
7949 /* 22209 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7950 /* 22213 */ // MIs[0] Operand 1
7951 /* 22213 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
7952 /* 22218 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7953 /* 22222 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
7954 /* 22226 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7955 /* 22229 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
7956 /* 22234 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
7957 /* 22238 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7958 /* 22243 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
7959 /* 22247 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7960 /* 22249 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x))
7961 /* 22249 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
7962 /* 22252 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7963 /* 22256 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
7964 /* 22261 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
7965 /* 22265 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7966 /* 22268 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
7967 /* 22270 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
7968 /* 22273 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7969 /* 22275 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
7970 /* 22278 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7971 /* 22281 */ GIR_RootConstrainSelectedInstOperands,
7972 /* 22282 */ // GIR_Coverage, 1122,
7973 /* 22282 */ GIR_EraseRootFromParent_Done,
7974 /* 22283 */ // Label 564: @22283
7975 /* 22283 */ GIM_Try, /*On fail goto*//*Label 565*/ GIMT_Encode4(22348), // Rule ID 1124 //
7976 /* 22288 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
7977 /* 22291 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
7978 /* 22294 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7979 /* 22298 */ // MIs[0] Operand 1
7980 /* 22298 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
7981 /* 22303 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7982 /* 22307 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
7983 /* 22311 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7984 /* 22314 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
7985 /* 22319 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
7986 /* 22323 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7987 /* 22328 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
7988 /* 22332 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7989 /* 22334 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x)
7990 /* 22334 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7991 /* 22337 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7992 /* 22339 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
7993 /* 22343 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7994 /* 22346 */ GIR_RootConstrainSelectedInstOperands,
7995 /* 22347 */ // GIR_Coverage, 1124,
7996 /* 22347 */ GIR_EraseRootFromParent_Done,
7997 /* 22348 */ // Label 565: @22348
7998 /* 22348 */ GIM_Try, /*On fail goto*//*Label 566*/ GIMT_Encode4(22433), // Rule ID 1125 //
7999 /* 22353 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8000 /* 22356 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8001 /* 22359 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8002 /* 22363 */ // MIs[0] Operand 1
8003 /* 22363 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8004 /* 22368 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8005 /* 22372 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8006 /* 22376 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8007 /* 22379 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8008 /* 22384 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
8009 /* 22388 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8010 /* 22393 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8011 /* 22397 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8012 /* 22399 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x))
8013 /* 22399 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
8014 /* 22402 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8015 /* 22406 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8016 /* 22411 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8017 /* 22415 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8018 /* 22418 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8019 /* 22420 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8020 /* 22423 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8021 /* 22425 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8022 /* 22428 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8023 /* 22431 */ GIR_RootConstrainSelectedInstOperands,
8024 /* 22432 */ // GIR_Coverage, 1125,
8025 /* 22432 */ GIR_EraseRootFromParent_Done,
8026 /* 22433 */ // Label 566: @22433
8027 /* 22433 */ GIM_Try, /*On fail goto*//*Label 567*/ GIMT_Encode4(22498), // Rule ID 1126 //
8028 /* 22438 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8029 /* 22441 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8030 /* 22444 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8031 /* 22448 */ // MIs[0] Operand 1
8032 /* 22448 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8033 /* 22453 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8034 /* 22457 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8035 /* 22461 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8036 /* 22464 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8037 /* 22469 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
8038 /* 22473 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8039 /* 22478 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8040 /* 22482 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8041 /* 22484 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x)
8042 /* 22484 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8043 /* 22487 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8044 /* 22489 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8045 /* 22493 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8046 /* 22496 */ GIR_RootConstrainSelectedInstOperands,
8047 /* 22497 */ // GIR_Coverage, 1126,
8048 /* 22497 */ GIR_EraseRootFromParent_Done,
8049 /* 22498 */ // Label 567: @22498
8050 /* 22498 */ GIM_Try, /*On fail goto*//*Label 568*/ GIMT_Encode4(22583), // Rule ID 1127 //
8051 /* 22503 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8052 /* 22506 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8053 /* 22509 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8054 /* 22513 */ // MIs[0] Operand 1
8055 /* 22513 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8056 /* 22518 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8057 /* 22522 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8058 /* 22526 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8059 /* 22529 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8060 /* 22534 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
8061 /* 22538 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8062 /* 22543 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8063 /* 22547 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8064 /* 22549 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x))
8065 /* 22549 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
8066 /* 22552 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8067 /* 22556 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8068 /* 22561 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8069 /* 22565 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8070 /* 22568 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8071 /* 22570 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8072 /* 22573 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8073 /* 22575 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8074 /* 22578 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8075 /* 22581 */ GIR_RootConstrainSelectedInstOperands,
8076 /* 22582 */ // GIR_Coverage, 1127,
8077 /* 22582 */ GIR_EraseRootFromParent_Done,
8078 /* 22583 */ // Label 568: @22583
8079 /* 22583 */ GIM_Try, /*On fail goto*//*Label 569*/ GIMT_Encode4(22648), // Rule ID 1129 //
8080 /* 22588 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8081 /* 22591 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8082 /* 22594 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8083 /* 22598 */ // MIs[0] Operand 1
8084 /* 22598 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8085 /* 22603 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8086 /* 22607 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8087 /* 22611 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8088 /* 22614 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8089 /* 22619 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
8090 /* 22623 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8091 /* 22628 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8092 /* 22632 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8093 /* 22634 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x)
8094 /* 22634 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8095 /* 22637 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8096 /* 22639 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8097 /* 22643 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8098 /* 22646 */ GIR_RootConstrainSelectedInstOperands,
8099 /* 22647 */ // GIR_Coverage, 1129,
8100 /* 22647 */ GIR_EraseRootFromParent_Done,
8101 /* 22648 */ // Label 569: @22648
8102 /* 22648 */ GIM_Try, /*On fail goto*//*Label 570*/ GIMT_Encode4(22733), // Rule ID 1130 //
8103 /* 22653 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8104 /* 22656 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8105 /* 22659 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8106 /* 22663 */ // MIs[0] Operand 1
8107 /* 22663 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8108 /* 22668 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8109 /* 22672 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8110 /* 22676 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8111 /* 22679 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8112 /* 22684 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
8113 /* 22688 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8114 /* 22693 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8115 /* 22697 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8116 /* 22699 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x))
8117 /* 22699 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
8118 /* 22702 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8119 /* 22706 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8120 /* 22711 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8121 /* 22715 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8122 /* 22718 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8123 /* 22720 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8124 /* 22723 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8125 /* 22725 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8126 /* 22728 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8127 /* 22731 */ GIR_RootConstrainSelectedInstOperands,
8128 /* 22732 */ // GIR_Coverage, 1130,
8129 /* 22732 */ GIR_EraseRootFromParent_Done,
8130 /* 22733 */ // Label 570: @22733
8131 /* 22733 */ GIM_Try, /*On fail goto*//*Label 571*/ GIMT_Encode4(22798), // Rule ID 1131 //
8132 /* 22738 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8133 /* 22741 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8134 /* 22744 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8135 /* 22748 */ // MIs[0] Operand 1
8136 /* 22748 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8137 /* 22753 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8138 /* 22757 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8139 /* 22761 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8140 /* 22764 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8141 /* 22769 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
8142 /* 22773 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8143 /* 22778 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8144 /* 22782 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8145 /* 22784 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x)
8146 /* 22784 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8147 /* 22787 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8148 /* 22789 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8149 /* 22793 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8150 /* 22796 */ GIR_RootConstrainSelectedInstOperands,
8151 /* 22797 */ // GIR_Coverage, 1131,
8152 /* 22797 */ GIR_EraseRootFromParent_Done,
8153 /* 22798 */ // Label 571: @22798
8154 /* 22798 */ GIM_Try, /*On fail goto*//*Label 572*/ GIMT_Encode4(22883), // Rule ID 1132 //
8155 /* 22803 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8156 /* 22806 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8157 /* 22809 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8158 /* 22813 */ // MIs[0] Operand 1
8159 /* 22813 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8160 /* 22818 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8161 /* 22822 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8162 /* 22826 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8163 /* 22829 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8164 /* 22834 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
8165 /* 22838 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8166 /* 22843 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8167 /* 22847 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8168 /* 22849 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x))
8169 /* 22849 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
8170 /* 22852 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8171 /* 22856 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8172 /* 22861 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8173 /* 22865 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8174 /* 22868 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8175 /* 22870 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8176 /* 22873 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8177 /* 22875 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8178 /* 22878 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8179 /* 22881 */ GIR_RootConstrainSelectedInstOperands,
8180 /* 22882 */ // GIR_Coverage, 1132,
8181 /* 22882 */ GIR_EraseRootFromParent_Done,
8182 /* 22883 */ // Label 572: @22883
8183 /* 22883 */ GIM_Try, /*On fail goto*//*Label 573*/ GIMT_Encode4(22948), // Rule ID 1134 //
8184 /* 22888 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8185 /* 22891 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8186 /* 22894 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8187 /* 22898 */ // MIs[0] Operand 1
8188 /* 22898 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8189 /* 22903 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8190 /* 22907 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8191 /* 22911 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8192 /* 22914 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8193 /* 22919 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
8194 /* 22923 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8195 /* 22928 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8196 /* 22932 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8197 /* 22934 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x)
8198 /* 22934 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8199 /* 22937 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8200 /* 22939 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8201 /* 22943 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8202 /* 22946 */ GIR_RootConstrainSelectedInstOperands,
8203 /* 22947 */ // GIR_Coverage, 1134,
8204 /* 22947 */ GIR_EraseRootFromParent_Done,
8205 /* 22948 */ // Label 573: @22948
8206 /* 22948 */ GIM_Try, /*On fail goto*//*Label 574*/ GIMT_Encode4(23033), // Rule ID 1135 //
8207 /* 22953 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8208 /* 22956 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8209 /* 22959 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8210 /* 22963 */ // MIs[0] Operand 1
8211 /* 22963 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8212 /* 22968 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8213 /* 22972 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8214 /* 22976 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8215 /* 22979 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8216 /* 22984 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
8217 /* 22988 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8218 /* 22993 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8219 /* 22997 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8220 /* 22999 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x))
8221 /* 22999 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
8222 /* 23002 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8223 /* 23006 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8224 /* 23011 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8225 /* 23015 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8226 /* 23018 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8227 /* 23020 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8228 /* 23023 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8229 /* 23025 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8230 /* 23028 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8231 /* 23031 */ GIR_RootConstrainSelectedInstOperands,
8232 /* 23032 */ // GIR_Coverage, 1135,
8233 /* 23032 */ GIR_EraseRootFromParent_Done,
8234 /* 23033 */ // Label 574: @23033
8235 /* 23033 */ GIM_Try, /*On fail goto*//*Label 575*/ GIMT_Encode4(23098), // Rule ID 1136 //
8236 /* 23038 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8237 /* 23041 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8238 /* 23044 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8239 /* 23048 */ // MIs[0] Operand 1
8240 /* 23048 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8241 /* 23053 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8242 /* 23057 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8243 /* 23061 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8244 /* 23064 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8245 /* 23069 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
8246 /* 23073 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8247 /* 23078 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8248 /* 23082 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8249 /* 23084 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x)
8250 /* 23084 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8251 /* 23087 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8252 /* 23089 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8253 /* 23093 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8254 /* 23096 */ GIR_RootConstrainSelectedInstOperands,
8255 /* 23097 */ // GIR_Coverage, 1136,
8256 /* 23097 */ GIR_EraseRootFromParent_Done,
8257 /* 23098 */ // Label 575: @23098
8258 /* 23098 */ GIM_Try, /*On fail goto*//*Label 576*/ GIMT_Encode4(23183), // Rule ID 1137 //
8259 /* 23103 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8260 /* 23106 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8261 /* 23109 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8262 /* 23113 */ // MIs[0] Operand 1
8263 /* 23113 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8264 /* 23118 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8265 /* 23122 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8266 /* 23126 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8267 /* 23129 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8268 /* 23134 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
8269 /* 23138 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8270 /* 23143 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8271 /* 23147 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8272 /* 23149 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14480:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x))
8273 /* 23149 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
8274 /* 23152 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8275 /* 23156 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8276 /* 23161 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8277 /* 23165 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8278 /* 23168 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8279 /* 23170 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8280 /* 23173 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8281 /* 23175 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8282 /* 23178 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8283 /* 23181 */ GIR_RootConstrainSelectedInstOperands,
8284 /* 23182 */ // GIR_Coverage, 1137,
8285 /* 23182 */ GIR_EraseRootFromParent_Done,
8286 /* 23183 */ // Label 576: @23183
8287 /* 23183 */ GIM_Try, /*On fail goto*//*Label 577*/ GIMT_Encode4(23248), // Rule ID 1139 //
8288 /* 23188 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8289 /* 23191 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8290 /* 23194 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8291 /* 23198 */ // MIs[0] Operand 1
8292 /* 23198 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8293 /* 23203 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8294 /* 23207 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8295 /* 23211 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8296 /* 23214 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8297 /* 23219 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
8298 /* 23223 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8299 /* 23228 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8300 /* 23232 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8301 /* 23234 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x)
8302 /* 23234 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
8303 /* 23237 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8304 /* 23239 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8305 /* 23243 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8306 /* 23246 */ GIR_RootConstrainSelectedInstOperands,
8307 /* 23247 */ // GIR_Coverage, 1139,
8308 /* 23247 */ GIR_EraseRootFromParent_Done,
8309 /* 23248 */ // Label 577: @23248
8310 /* 23248 */ GIM_Try, /*On fail goto*//*Label 578*/ GIMT_Encode4(23333), // Rule ID 1140 //
8311 /* 23253 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8312 /* 23256 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8313 /* 23259 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8314 /* 23263 */ // MIs[0] Operand 1
8315 /* 23263 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8316 /* 23268 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8317 /* 23272 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8318 /* 23276 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8319 /* 23279 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8320 /* 23284 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
8321 /* 23288 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8322 /* 23293 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8323 /* 23297 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8324 /* 23299 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x))
8325 /* 23299 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
8326 /* 23302 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
8327 /* 23306 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8328 /* 23311 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8329 /* 23315 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8330 /* 23318 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8331 /* 23320 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8332 /* 23323 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8333 /* 23325 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8334 /* 23328 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8335 /* 23331 */ GIR_RootConstrainSelectedInstOperands,
8336 /* 23332 */ // GIR_Coverage, 1140,
8337 /* 23332 */ GIR_EraseRootFromParent_Done,
8338 /* 23333 */ // Label 578: @23333
8339 /* 23333 */ GIM_Try, /*On fail goto*//*Label 579*/ GIMT_Encode4(23398), // Rule ID 1141 //
8340 /* 23338 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8341 /* 23341 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8342 /* 23344 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8343 /* 23348 */ // MIs[0] Operand 1
8344 /* 23348 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8345 /* 23353 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8346 /* 23357 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8347 /* 23361 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8348 /* 23364 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8349 /* 23369 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
8350 /* 23373 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8351 /* 23378 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8352 /* 23382 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8353 /* 23384 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x)
8354 /* 23384 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
8355 /* 23387 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8356 /* 23389 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8357 /* 23393 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8358 /* 23396 */ GIR_RootConstrainSelectedInstOperands,
8359 /* 23397 */ // GIR_Coverage, 1141,
8360 /* 23397 */ GIR_EraseRootFromParent_Done,
8361 /* 23398 */ // Label 579: @23398
8362 /* 23398 */ GIM_Try, /*On fail goto*//*Label 580*/ GIMT_Encode4(23483), // Rule ID 1142 //
8363 /* 23403 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8364 /* 23406 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8365 /* 23409 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8366 /* 23413 */ // MIs[0] Operand 1
8367 /* 23413 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8368 /* 23418 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8369 /* 23422 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8370 /* 23426 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8371 /* 23429 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8372 /* 23434 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
8373 /* 23438 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8374 /* 23443 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8375 /* 23447 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8376 /* 23449 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x))
8377 /* 23449 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
8378 /* 23452 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
8379 /* 23456 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8380 /* 23461 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8381 /* 23465 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8382 /* 23468 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8383 /* 23470 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8384 /* 23473 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8385 /* 23475 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8386 /* 23478 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8387 /* 23481 */ GIR_RootConstrainSelectedInstOperands,
8388 /* 23482 */ // GIR_Coverage, 1142,
8389 /* 23482 */ GIR_EraseRootFromParent_Done,
8390 /* 23483 */ // Label 580: @23483
8391 /* 23483 */ GIM_Try, /*On fail goto*//*Label 581*/ GIMT_Encode4(23548), // Rule ID 1144 //
8392 /* 23488 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8393 /* 23491 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8394 /* 23494 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8395 /* 23498 */ // MIs[0] Operand 1
8396 /* 23498 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8397 /* 23503 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8398 /* 23507 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8399 /* 23511 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8400 /* 23514 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8401 /* 23519 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
8402 /* 23523 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8403 /* 23528 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8404 /* 23532 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8405 /* 23534 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x)
8406 /* 23534 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
8407 /* 23537 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8408 /* 23539 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8409 /* 23543 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8410 /* 23546 */ GIR_RootConstrainSelectedInstOperands,
8411 /* 23547 */ // GIR_Coverage, 1144,
8412 /* 23547 */ GIR_EraseRootFromParent_Done,
8413 /* 23548 */ // Label 581: @23548
8414 /* 23548 */ GIM_Try, /*On fail goto*//*Label 582*/ GIMT_Encode4(23633), // Rule ID 1145 //
8415 /* 23553 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8416 /* 23556 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8417 /* 23559 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8418 /* 23563 */ // MIs[0] Operand 1
8419 /* 23563 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8420 /* 23568 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8421 /* 23572 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8422 /* 23576 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8423 /* 23579 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8424 /* 23584 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
8425 /* 23588 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8426 /* 23593 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8427 /* 23597 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8428 /* 23599 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x))
8429 /* 23599 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
8430 /* 23602 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
8431 /* 23606 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8432 /* 23611 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8433 /* 23615 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8434 /* 23618 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8435 /* 23620 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8436 /* 23623 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8437 /* 23625 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8438 /* 23628 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8439 /* 23631 */ GIR_RootConstrainSelectedInstOperands,
8440 /* 23632 */ // GIR_Coverage, 1145,
8441 /* 23632 */ GIR_EraseRootFromParent_Done,
8442 /* 23633 */ // Label 582: @23633
8443 /* 23633 */ GIM_Try, /*On fail goto*//*Label 583*/ GIMT_Encode4(23698), // Rule ID 1146 //
8444 /* 23638 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8445 /* 23641 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8446 /* 23644 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8447 /* 23648 */ // MIs[0] Operand 1
8448 /* 23648 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8449 /* 23653 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8450 /* 23657 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8451 /* 23661 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8452 /* 23664 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8453 /* 23669 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
8454 /* 23673 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8455 /* 23678 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8456 /* 23682 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8457 /* 23684 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x)
8458 /* 23684 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
8459 /* 23687 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8460 /* 23689 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8461 /* 23693 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8462 /* 23696 */ GIR_RootConstrainSelectedInstOperands,
8463 /* 23697 */ // GIR_Coverage, 1146,
8464 /* 23697 */ GIR_EraseRootFromParent_Done,
8465 /* 23698 */ // Label 583: @23698
8466 /* 23698 */ GIM_Try, /*On fail goto*//*Label 584*/ GIMT_Encode4(23783), // Rule ID 1147 //
8467 /* 23703 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8468 /* 23706 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8469 /* 23709 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8470 /* 23713 */ // MIs[0] Operand 1
8471 /* 23713 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8472 /* 23718 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8473 /* 23722 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8474 /* 23726 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8475 /* 23729 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8476 /* 23734 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
8477 /* 23738 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8478 /* 23743 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8479 /* 23747 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8480 /* 23749 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x))
8481 /* 23749 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
8482 /* 23752 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
8483 /* 23756 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8484 /* 23761 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8485 /* 23765 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8486 /* 23768 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8487 /* 23770 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8488 /* 23773 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8489 /* 23775 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8490 /* 23778 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8491 /* 23781 */ GIR_RootConstrainSelectedInstOperands,
8492 /* 23782 */ // GIR_Coverage, 1147,
8493 /* 23782 */ GIR_EraseRootFromParent_Done,
8494 /* 23783 */ // Label 584: @23783
8495 /* 23783 */ GIM_Try, /*On fail goto*//*Label 585*/ GIMT_Encode4(23848), // Rule ID 1149 //
8496 /* 23788 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8497 /* 23791 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8498 /* 23794 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8499 /* 23798 */ // MIs[0] Operand 1
8500 /* 23798 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8501 /* 23803 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8502 /* 23807 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8503 /* 23811 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8504 /* 23814 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8505 /* 23819 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
8506 /* 23823 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8507 /* 23828 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8508 /* 23832 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8509 /* 23834 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x)
8510 /* 23834 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
8511 /* 23837 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8512 /* 23839 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8513 /* 23843 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8514 /* 23846 */ GIR_RootConstrainSelectedInstOperands,
8515 /* 23847 */ // GIR_Coverage, 1149,
8516 /* 23847 */ GIR_EraseRootFromParent_Done,
8517 /* 23848 */ // Label 585: @23848
8518 /* 23848 */ GIM_Try, /*On fail goto*//*Label 586*/ GIMT_Encode4(23933), // Rule ID 1150 //
8519 /* 23853 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8520 /* 23856 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8521 /* 23859 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8522 /* 23863 */ // MIs[0] Operand 1
8523 /* 23863 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8524 /* 23868 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8525 /* 23872 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8526 /* 23876 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8527 /* 23879 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8528 /* 23884 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
8529 /* 23888 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8530 /* 23893 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8531 /* 23897 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8532 /* 23899 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x))
8533 /* 23899 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
8534 /* 23902 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
8535 /* 23906 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8536 /* 23911 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8537 /* 23915 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8538 /* 23918 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8539 /* 23920 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8540 /* 23923 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8541 /* 23925 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8542 /* 23928 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8543 /* 23931 */ GIR_RootConstrainSelectedInstOperands,
8544 /* 23932 */ // GIR_Coverage, 1150,
8545 /* 23932 */ GIR_EraseRootFromParent_Done,
8546 /* 23933 */ // Label 586: @23933
8547 /* 23933 */ GIM_Try, /*On fail goto*//*Label 587*/ GIMT_Encode4(23998), // Rule ID 1151 //
8548 /* 23938 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8549 /* 23941 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8550 /* 23944 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8551 /* 23948 */ // MIs[0] Operand 1
8552 /* 23948 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8553 /* 23953 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8554 /* 23957 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8555 /* 23961 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8556 /* 23964 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8557 /* 23969 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
8558 /* 23973 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8559 /* 23978 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8560 /* 23982 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8561 /* 23984 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x)
8562 /* 23984 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
8563 /* 23987 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8564 /* 23989 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8565 /* 23993 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8566 /* 23996 */ GIR_RootConstrainSelectedInstOperands,
8567 /* 23997 */ // GIR_Coverage, 1151,
8568 /* 23997 */ GIR_EraseRootFromParent_Done,
8569 /* 23998 */ // Label 587: @23998
8570 /* 23998 */ GIM_Try, /*On fail goto*//*Label 588*/ GIMT_Encode4(24083), // Rule ID 1152 //
8571 /* 24003 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8572 /* 24006 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8573 /* 24009 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8574 /* 24013 */ // MIs[0] Operand 1
8575 /* 24013 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8576 /* 24018 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8577 /* 24022 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8578 /* 24026 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8579 /* 24029 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8580 /* 24034 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
8581 /* 24038 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8582 /* 24043 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8583 /* 24047 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8584 /* 24049 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x))
8585 /* 24049 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
8586 /* 24052 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
8587 /* 24056 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8588 /* 24061 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8589 /* 24065 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8590 /* 24068 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8591 /* 24070 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8592 /* 24073 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8593 /* 24075 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8594 /* 24078 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8595 /* 24081 */ GIR_RootConstrainSelectedInstOperands,
8596 /* 24082 */ // GIR_Coverage, 1152,
8597 /* 24082 */ GIR_EraseRootFromParent_Done,
8598 /* 24083 */ // Label 588: @24083
8599 /* 24083 */ GIM_Try, /*On fail goto*//*Label 589*/ GIMT_Encode4(24148), // Rule ID 1154 //
8600 /* 24088 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8601 /* 24091 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8602 /* 24094 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8603 /* 24098 */ // MIs[0] Operand 1
8604 /* 24098 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8605 /* 24103 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8606 /* 24107 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8607 /* 24111 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8608 /* 24114 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8609 /* 24119 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
8610 /* 24123 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8611 /* 24128 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8612 /* 24132 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8613 /* 24134 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x)
8614 /* 24134 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
8615 /* 24137 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8616 /* 24139 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8617 /* 24143 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8618 /* 24146 */ GIR_RootConstrainSelectedInstOperands,
8619 /* 24147 */ // GIR_Coverage, 1154,
8620 /* 24147 */ GIR_EraseRootFromParent_Done,
8621 /* 24148 */ // Label 589: @24148
8622 /* 24148 */ GIM_Try, /*On fail goto*//*Label 590*/ GIMT_Encode4(24233), // Rule ID 1155 //
8623 /* 24153 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8624 /* 24156 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8625 /* 24159 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8626 /* 24163 */ // MIs[0] Operand 1
8627 /* 24163 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8628 /* 24168 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8629 /* 24172 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8630 /* 24176 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8631 /* 24179 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8632 /* 24184 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
8633 /* 24188 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8634 /* 24193 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8635 /* 24197 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8636 /* 24199 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x))
8637 /* 24199 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
8638 /* 24202 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
8639 /* 24206 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8640 /* 24211 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8641 /* 24215 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8642 /* 24218 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8643 /* 24220 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8644 /* 24223 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8645 /* 24225 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8646 /* 24228 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8647 /* 24231 */ GIR_RootConstrainSelectedInstOperands,
8648 /* 24232 */ // GIR_Coverage, 1155,
8649 /* 24232 */ GIR_EraseRootFromParent_Done,
8650 /* 24233 */ // Label 590: @24233
8651 /* 24233 */ GIM_Try, /*On fail goto*//*Label 591*/ GIMT_Encode4(24298), // Rule ID 1156 //
8652 /* 24238 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8653 /* 24241 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8654 /* 24244 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8655 /* 24248 */ // MIs[0] Operand 1
8656 /* 24248 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8657 /* 24253 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8658 /* 24257 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8659 /* 24261 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8660 /* 24264 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8661 /* 24269 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
8662 /* 24273 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8663 /* 24278 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
8664 /* 24282 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8665 /* 24284 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x)
8666 /* 24284 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
8667 /* 24287 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8668 /* 24289 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
8669 /* 24293 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8670 /* 24296 */ GIR_RootConstrainSelectedInstOperands,
8671 /* 24297 */ // GIR_Coverage, 1156,
8672 /* 24297 */ GIR_EraseRootFromParent_Done,
8673 /* 24298 */ // Label 591: @24298
8674 /* 24298 */ GIM_Try, /*On fail goto*//*Label 592*/ GIMT_Encode4(24383), // Rule ID 1157 //
8675 /* 24303 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8676 /* 24306 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8677 /* 24309 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8678 /* 24313 */ // MIs[0] Operand 1
8679 /* 24313 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8680 /* 24318 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
8681 /* 24322 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
8682 /* 24326 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
8683 /* 24329 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
8684 /* 24334 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
8685 /* 24338 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8686 /* 24343 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8687 /* 24347 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8688 /* 24349 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14479:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x))
8689 /* 24349 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
8690 /* 24352 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
8691 /* 24356 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
8692 /* 24361 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
8693 /* 24365 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8694 /* 24368 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
8695 /* 24370 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8696 /* 24373 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8697 /* 24375 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
8698 /* 24378 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8699 /* 24381 */ GIR_RootConstrainSelectedInstOperands,
8700 /* 24382 */ // GIR_Coverage, 1157,
8701 /* 24382 */ GIR_EraseRootFromParent_Done,
8702 /* 24383 */ // Label 592: @24383
8703 /* 24383 */ GIM_Try, /*On fail goto*//*Label 593*/ GIMT_Encode4(24423), // Rule ID 120 //
8704 /* 24388 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8705 /* 24391 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8706 /* 24394 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8707 /* 24398 */ // MIs[0] Operand 1
8708 /* 24398 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8709 /* 24403 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8710 /* 24407 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8711 /* 24411 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$src, 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
8712 /* 24411 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
8713 /* 24414 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8714 /* 24416 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8715 /* 24418 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8716 /* 24421 */ GIR_RootConstrainSelectedInstOperands,
8717 /* 24422 */ // GIR_Coverage, 120,
8718 /* 24422 */ GIR_EraseRootFromParent_Done,
8719 /* 24423 */ // Label 593: @24423
8720 /* 24423 */ GIM_Try, /*On fail goto*//*Label 594*/ GIMT_Encode4(24463), // Rule ID 121 //
8721 /* 24428 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8722 /* 24431 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8723 /* 24434 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8724 /* 24438 */ // MIs[0] Operand 1
8725 /* 24438 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8726 /* 24443 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8727 /* 24447 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
8728 /* 24451 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$src, 0:{ *:[i64] }, SETEQ:{ *:[Other] }) => (EQZ_I64:{ *:[i32] } I64:{ *:[i64] }:$src)
8729 /* 24451 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I64),
8730 /* 24454 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8731 /* 24456 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8732 /* 24458 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8733 /* 24461 */ GIR_RootConstrainSelectedInstOperands,
8734 /* 24462 */ // GIR_Coverage, 121,
8735 /* 24462 */ GIR_EraseRootFromParent_Done,
8736 /* 24463 */ // Label 594: @24463
8737 /* 24463 */ GIM_Try, /*On fail goto*//*Label 595*/ GIMT_Encode4(24505), // Rule ID 94 //
8738 /* 24468 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8739 /* 24471 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8740 /* 24474 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8741 /* 24478 */ // MIs[0] Operand 1
8742 /* 24478 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8743 /* 24483 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8744 /* 24487 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8745 /* 24491 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8746 /* 24491 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I32),
8747 /* 24494 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8748 /* 24496 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8749 /* 24498 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8750 /* 24500 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8751 /* 24503 */ GIR_RootConstrainSelectedInstOperands,
8752 /* 24504 */ // GIR_Coverage, 94,
8753 /* 24504 */ GIR_EraseRootFromParent_Done,
8754 /* 24505 */ // Label 595: @24505
8755 /* 24505 */ GIM_Try, /*On fail goto*//*Label 596*/ GIMT_Encode4(24547), // Rule ID 95 //
8756 /* 24510 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8757 /* 24513 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8758 /* 24516 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8759 /* 24520 */ // MIs[0] Operand 1
8760 /* 24520 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
8761 /* 24525 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8762 /* 24529 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8763 /* 24533 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8764 /* 24533 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I64),
8765 /* 24536 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8766 /* 24538 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8767 /* 24540 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8768 /* 24542 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8769 /* 24545 */ GIR_RootConstrainSelectedInstOperands,
8770 /* 24546 */ // GIR_Coverage, 95,
8771 /* 24546 */ GIR_EraseRootFromParent_Done,
8772 /* 24547 */ // Label 596: @24547
8773 /* 24547 */ GIM_Try, /*On fail goto*//*Label 597*/ GIMT_Encode4(24589), // Rule ID 96 //
8774 /* 24552 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8775 /* 24555 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8776 /* 24558 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8777 /* 24562 */ // MIs[0] Operand 1
8778 /* 24562 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8779 /* 24567 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8780 /* 24571 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8781 /* 24575 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETNE:{ *:[Other] }) => (NE_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8782 /* 24575 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I32),
8783 /* 24578 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8784 /* 24580 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8785 /* 24582 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8786 /* 24584 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8787 /* 24587 */ GIR_RootConstrainSelectedInstOperands,
8788 /* 24588 */ // GIR_Coverage, 96,
8789 /* 24588 */ GIR_EraseRootFromParent_Done,
8790 /* 24589 */ // Label 597: @24589
8791 /* 24589 */ GIM_Try, /*On fail goto*//*Label 598*/ GIMT_Encode4(24631), // Rule ID 97 //
8792 /* 24594 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8793 /* 24597 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8794 /* 24600 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8795 /* 24604 */ // MIs[0] Operand 1
8796 /* 24604 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
8797 /* 24609 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8798 /* 24613 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8799 /* 24617 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETNE:{ *:[Other] }) => (NE_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8800 /* 24617 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I64),
8801 /* 24620 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8802 /* 24622 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8803 /* 24624 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8804 /* 24626 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8805 /* 24629 */ GIR_RootConstrainSelectedInstOperands,
8806 /* 24630 */ // GIR_Coverage, 97,
8807 /* 24630 */ GIR_EraseRootFromParent_Done,
8808 /* 24631 */ // Label 598: @24631
8809 /* 24631 */ GIM_Try, /*On fail goto*//*Label 599*/ GIMT_Encode4(24673), // Rule ID 98 //
8810 /* 24636 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8811 /* 24639 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8812 /* 24642 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8813 /* 24646 */ // MIs[0] Operand 1
8814 /* 24646 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
8815 /* 24651 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8816 /* 24655 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8817 /* 24659 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8818 /* 24659 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I32),
8819 /* 24662 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8820 /* 24664 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8821 /* 24666 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8822 /* 24668 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8823 /* 24671 */ GIR_RootConstrainSelectedInstOperands,
8824 /* 24672 */ // GIR_Coverage, 98,
8825 /* 24672 */ GIR_EraseRootFromParent_Done,
8826 /* 24673 */ // Label 599: @24673
8827 /* 24673 */ GIM_Try, /*On fail goto*//*Label 600*/ GIMT_Encode4(24715), // Rule ID 99 //
8828 /* 24678 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8829 /* 24681 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8830 /* 24684 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8831 /* 24688 */ // MIs[0] Operand 1
8832 /* 24688 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
8833 /* 24693 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8834 /* 24697 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8835 /* 24701 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8836 /* 24701 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I64),
8837 /* 24704 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8838 /* 24706 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8839 /* 24708 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8840 /* 24710 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8841 /* 24713 */ GIR_RootConstrainSelectedInstOperands,
8842 /* 24714 */ // GIR_Coverage, 99,
8843 /* 24714 */ GIR_EraseRootFromParent_Done,
8844 /* 24715 */ // Label 600: @24715
8845 /* 24715 */ GIM_Try, /*On fail goto*//*Label 601*/ GIMT_Encode4(24757), // Rule ID 100 //
8846 /* 24720 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8847 /* 24723 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8848 /* 24726 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8849 /* 24730 */ // MIs[0] Operand 1
8850 /* 24730 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
8851 /* 24735 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8852 /* 24739 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8853 /* 24743 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8854 /* 24743 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I32),
8855 /* 24746 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8856 /* 24748 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8857 /* 24750 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8858 /* 24752 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8859 /* 24755 */ GIR_RootConstrainSelectedInstOperands,
8860 /* 24756 */ // GIR_Coverage, 100,
8861 /* 24756 */ GIR_EraseRootFromParent_Done,
8862 /* 24757 */ // Label 601: @24757
8863 /* 24757 */ GIM_Try, /*On fail goto*//*Label 602*/ GIMT_Encode4(24799), // Rule ID 101 //
8864 /* 24762 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8865 /* 24765 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8866 /* 24768 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8867 /* 24772 */ // MIs[0] Operand 1
8868 /* 24772 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
8869 /* 24777 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8870 /* 24781 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8871 /* 24785 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8872 /* 24785 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I64),
8873 /* 24788 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8874 /* 24790 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8875 /* 24792 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8876 /* 24794 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8877 /* 24797 */ GIR_RootConstrainSelectedInstOperands,
8878 /* 24798 */ // GIR_Coverage, 101,
8879 /* 24798 */ GIR_EraseRootFromParent_Done,
8880 /* 24799 */ // Label 602: @24799
8881 /* 24799 */ GIM_Try, /*On fail goto*//*Label 603*/ GIMT_Encode4(24841), // Rule ID 102 //
8882 /* 24804 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8883 /* 24807 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8884 /* 24810 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8885 /* 24814 */ // MIs[0] Operand 1
8886 /* 24814 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
8887 /* 24819 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8888 /* 24823 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8889 /* 24827 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8890 /* 24827 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I32),
8891 /* 24830 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8892 /* 24832 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8893 /* 24834 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8894 /* 24836 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8895 /* 24839 */ GIR_RootConstrainSelectedInstOperands,
8896 /* 24840 */ // GIR_Coverage, 102,
8897 /* 24840 */ GIR_EraseRootFromParent_Done,
8898 /* 24841 */ // Label 603: @24841
8899 /* 24841 */ GIM_Try, /*On fail goto*//*Label 604*/ GIMT_Encode4(24883), // Rule ID 103 //
8900 /* 24846 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8901 /* 24849 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8902 /* 24852 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8903 /* 24856 */ // MIs[0] Operand 1
8904 /* 24856 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
8905 /* 24861 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8906 /* 24865 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8907 /* 24869 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8908 /* 24869 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I64),
8909 /* 24872 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8910 /* 24874 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8911 /* 24876 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8912 /* 24878 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8913 /* 24881 */ GIR_RootConstrainSelectedInstOperands,
8914 /* 24882 */ // GIR_Coverage, 103,
8915 /* 24882 */ GIR_EraseRootFromParent_Done,
8916 /* 24883 */ // Label 604: @24883
8917 /* 24883 */ GIM_Try, /*On fail goto*//*Label 605*/ GIMT_Encode4(24925), // Rule ID 104 //
8918 /* 24888 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8919 /* 24891 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8920 /* 24894 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8921 /* 24898 */ // MIs[0] Operand 1
8922 /* 24898 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
8923 /* 24903 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8924 /* 24907 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8925 /* 24911 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8926 /* 24911 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I32),
8927 /* 24914 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8928 /* 24916 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8929 /* 24918 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8930 /* 24920 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8931 /* 24923 */ GIR_RootConstrainSelectedInstOperands,
8932 /* 24924 */ // GIR_Coverage, 104,
8933 /* 24924 */ GIR_EraseRootFromParent_Done,
8934 /* 24925 */ // Label 605: @24925
8935 /* 24925 */ GIM_Try, /*On fail goto*//*Label 606*/ GIMT_Encode4(24967), // Rule ID 105 //
8936 /* 24930 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8937 /* 24933 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8938 /* 24936 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8939 /* 24940 */ // MIs[0] Operand 1
8940 /* 24940 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
8941 /* 24945 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8942 /* 24949 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8943 /* 24953 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8944 /* 24953 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I64),
8945 /* 24956 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8946 /* 24958 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8947 /* 24960 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8948 /* 24962 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8949 /* 24965 */ GIR_RootConstrainSelectedInstOperands,
8950 /* 24966 */ // GIR_Coverage, 105,
8951 /* 24966 */ GIR_EraseRootFromParent_Done,
8952 /* 24967 */ // Label 606: @24967
8953 /* 24967 */ GIM_Try, /*On fail goto*//*Label 607*/ GIMT_Encode4(25009), // Rule ID 106 //
8954 /* 24972 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8955 /* 24975 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8956 /* 24978 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8957 /* 24982 */ // MIs[0] Operand 1
8958 /* 24982 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
8959 /* 24987 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8960 /* 24991 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8961 /* 24995 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8962 /* 24995 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I32),
8963 /* 24998 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8964 /* 25000 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8965 /* 25002 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8966 /* 25004 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8967 /* 25007 */ GIR_RootConstrainSelectedInstOperands,
8968 /* 25008 */ // GIR_Coverage, 106,
8969 /* 25008 */ GIR_EraseRootFromParent_Done,
8970 /* 25009 */ // Label 607: @25009
8971 /* 25009 */ GIM_Try, /*On fail goto*//*Label 608*/ GIMT_Encode4(25051), // Rule ID 107 //
8972 /* 25014 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
8973 /* 25017 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
8974 /* 25020 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8975 /* 25024 */ // MIs[0] Operand 1
8976 /* 25024 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
8977 /* 25029 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8978 /* 25033 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8979 /* 25037 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
8980 /* 25037 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I64),
8981 /* 25040 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8982 /* 25042 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8983 /* 25044 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8984 /* 25046 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8985 /* 25049 */ GIR_RootConstrainSelectedInstOperands,
8986 /* 25050 */ // GIR_Coverage, 107,
8987 /* 25050 */ GIR_EraseRootFromParent_Done,
8988 /* 25051 */ // Label 608: @25051
8989 /* 25051 */ GIM_Try, /*On fail goto*//*Label 609*/ GIMT_Encode4(25093), // Rule ID 108 //
8990 /* 25056 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
8991 /* 25059 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
8992 /* 25062 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8993 /* 25066 */ // MIs[0] Operand 1
8994 /* 25066 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
8995 /* 25071 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8996 /* 25075 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8997 /* 25079 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
8998 /* 25079 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I32),
8999 /* 25082 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9000 /* 25084 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9001 /* 25086 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9002 /* 25088 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9003 /* 25091 */ GIR_RootConstrainSelectedInstOperands,
9004 /* 25092 */ // GIR_Coverage, 108,
9005 /* 25092 */ GIR_EraseRootFromParent_Done,
9006 /* 25093 */ // Label 609: @25093
9007 /* 25093 */ GIM_Try, /*On fail goto*//*Label 610*/ GIMT_Encode4(25135), // Rule ID 109 //
9008 /* 25098 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
9009 /* 25101 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
9010 /* 25104 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9011 /* 25108 */ // MIs[0] Operand 1
9012 /* 25108 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
9013 /* 25113 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9014 /* 25117 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9015 /* 25121 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
9016 /* 25121 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I64),
9017 /* 25124 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9018 /* 25126 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9019 /* 25128 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9020 /* 25130 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9021 /* 25133 */ GIR_RootConstrainSelectedInstOperands,
9022 /* 25134 */ // GIR_Coverage, 109,
9023 /* 25134 */ GIR_EraseRootFromParent_Done,
9024 /* 25135 */ // Label 610: @25135
9025 /* 25135 */ GIM_Try, /*On fail goto*//*Label 611*/ GIMT_Encode4(25177), // Rule ID 110 //
9026 /* 25140 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
9027 /* 25143 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
9028 /* 25146 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9029 /* 25150 */ // MIs[0] Operand 1
9030 /* 25150 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
9031 /* 25155 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9032 /* 25159 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9033 /* 25163 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
9034 /* 25163 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I32),
9035 /* 25166 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9036 /* 25168 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9037 /* 25170 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9038 /* 25172 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9039 /* 25175 */ GIR_RootConstrainSelectedInstOperands,
9040 /* 25176 */ // GIR_Coverage, 110,
9041 /* 25176 */ GIR_EraseRootFromParent_Done,
9042 /* 25177 */ // Label 611: @25177
9043 /* 25177 */ GIM_Try, /*On fail goto*//*Label 612*/ GIMT_Encode4(25219), // Rule ID 111 //
9044 /* 25182 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
9045 /* 25185 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
9046 /* 25188 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9047 /* 25192 */ // MIs[0] Operand 1
9048 /* 25192 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
9049 /* 25197 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9050 /* 25201 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9051 /* 25205 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
9052 /* 25205 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I64),
9053 /* 25208 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9054 /* 25210 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9055 /* 25212 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9056 /* 25214 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9057 /* 25217 */ GIR_RootConstrainSelectedInstOperands,
9058 /* 25218 */ // GIR_Coverage, 111,
9059 /* 25218 */ GIR_EraseRootFromParent_Done,
9060 /* 25219 */ // Label 612: @25219
9061 /* 25219 */ GIM_Try, /*On fail goto*//*Label 613*/ GIMT_Encode4(25261), // Rule ID 112 //
9062 /* 25224 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
9063 /* 25227 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
9064 /* 25230 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9065 /* 25234 */ // MIs[0] Operand 1
9066 /* 25234 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
9067 /* 25239 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9068 /* 25243 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9069 /* 25247 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
9070 /* 25247 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I32),
9071 /* 25250 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9072 /* 25252 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9073 /* 25254 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9074 /* 25256 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9075 /* 25259 */ GIR_RootConstrainSelectedInstOperands,
9076 /* 25260 */ // GIR_Coverage, 112,
9077 /* 25260 */ GIR_EraseRootFromParent_Done,
9078 /* 25261 */ // Label 613: @25261
9079 /* 25261 */ GIM_Try, /*On fail goto*//*Label 614*/ GIMT_Encode4(25303), // Rule ID 113 //
9080 /* 25266 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
9081 /* 25269 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
9082 /* 25272 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9083 /* 25276 */ // MIs[0] Operand 1
9084 /* 25276 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
9085 /* 25281 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9086 /* 25285 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9087 /* 25289 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
9088 /* 25289 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I64),
9089 /* 25292 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9090 /* 25294 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9091 /* 25296 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9092 /* 25298 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9093 /* 25301 */ GIR_RootConstrainSelectedInstOperands,
9094 /* 25302 */ // GIR_Coverage, 113,
9095 /* 25302 */ GIR_EraseRootFromParent_Done,
9096 /* 25303 */ // Label 614: @25303
9097 /* 25303 */ GIM_Reject,
9098 /* 25304 */ // Label 556: @25304
9099 /* 25304 */ GIM_Try, /*On fail goto*//*Label 615*/ GIMT_Encode4(25670),
9100 /* 25309 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
9101 /* 25312 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
9102 /* 25315 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9103 /* 25319 */ GIM_Try, /*On fail goto*//*Label 616*/ GIMT_Encode4(25354), // Rule ID 195 //
9104 /* 25324 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9105 /* 25327 */ // MIs[0] Operand 1
9106 /* 25327 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
9107 /* 25332 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9108 /* 25336 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9109 /* 25340 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9110 /* 25340 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I8x16),
9111 /* 25343 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9112 /* 25345 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9113 /* 25347 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9114 /* 25349 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9115 /* 25352 */ GIR_RootConstrainSelectedInstOperands,
9116 /* 25353 */ // GIR_Coverage, 195,
9117 /* 25353 */ GIR_EraseRootFromParent_Done,
9118 /* 25354 */ // Label 616: @25354
9119 /* 25354 */ GIM_Try, /*On fail goto*//*Label 617*/ GIMT_Encode4(25389), // Rule ID 202 //
9120 /* 25359 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9121 /* 25362 */ // MIs[0] Operand 1
9122 /* 25362 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
9123 /* 25367 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9124 /* 25371 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9125 /* 25375 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETNE:{ *:[Other] }) => (NE_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9126 /* 25375 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I8x16),
9127 /* 25378 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9128 /* 25380 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9129 /* 25382 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9130 /* 25384 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9131 /* 25387 */ GIR_RootConstrainSelectedInstOperands,
9132 /* 25388 */ // GIR_Coverage, 202,
9133 /* 25388 */ GIR_EraseRootFromParent_Done,
9134 /* 25389 */ // Label 617: @25389
9135 /* 25389 */ GIM_Try, /*On fail goto*//*Label 618*/ GIMT_Encode4(25424), // Rule ID 209 //
9136 /* 25394 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9137 /* 25397 */ // MIs[0] Operand 1
9138 /* 25397 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
9139 /* 25402 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9140 /* 25406 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9141 /* 25410 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9142 /* 25410 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I8x16),
9143 /* 25413 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9144 /* 25415 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9145 /* 25417 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9146 /* 25419 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9147 /* 25422 */ GIR_RootConstrainSelectedInstOperands,
9148 /* 25423 */ // GIR_Coverage, 209,
9149 /* 25423 */ GIR_EraseRootFromParent_Done,
9150 /* 25424 */ // Label 618: @25424
9151 /* 25424 */ GIM_Try, /*On fail goto*//*Label 619*/ GIMT_Encode4(25459), // Rule ID 213 //
9152 /* 25429 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9153 /* 25432 */ // MIs[0] Operand 1
9154 /* 25432 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
9155 /* 25437 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9156 /* 25441 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9157 /* 25445 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9158 /* 25445 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I8x16),
9159 /* 25448 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9160 /* 25450 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9161 /* 25452 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9162 /* 25454 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9163 /* 25457 */ GIR_RootConstrainSelectedInstOperands,
9164 /* 25458 */ // GIR_Coverage, 213,
9165 /* 25458 */ GIR_EraseRootFromParent_Done,
9166 /* 25459 */ // Label 619: @25459
9167 /* 25459 */ GIM_Try, /*On fail goto*//*Label 620*/ GIMT_Encode4(25494), // Rule ID 219 //
9168 /* 25464 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9169 /* 25467 */ // MIs[0] Operand 1
9170 /* 25467 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
9171 /* 25472 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9172 /* 25476 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9173 /* 25480 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9174 /* 25480 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I8x16),
9175 /* 25483 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9176 /* 25485 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9177 /* 25487 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9178 /* 25489 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9179 /* 25492 */ GIR_RootConstrainSelectedInstOperands,
9180 /* 25493 */ // GIR_Coverage, 219,
9181 /* 25493 */ GIR_EraseRootFromParent_Done,
9182 /* 25494 */ // Label 620: @25494
9183 /* 25494 */ GIM_Try, /*On fail goto*//*Label 621*/ GIMT_Encode4(25529), // Rule ID 223 //
9184 /* 25499 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9185 /* 25502 */ // MIs[0] Operand 1
9186 /* 25502 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
9187 /* 25507 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9188 /* 25511 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9189 /* 25515 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9190 /* 25515 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I8x16),
9191 /* 25518 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9192 /* 25520 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9193 /* 25522 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9194 /* 25524 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9195 /* 25527 */ GIR_RootConstrainSelectedInstOperands,
9196 /* 25528 */ // GIR_Coverage, 223,
9197 /* 25528 */ GIR_EraseRootFromParent_Done,
9198 /* 25529 */ // Label 621: @25529
9199 /* 25529 */ GIM_Try, /*On fail goto*//*Label 622*/ GIMT_Encode4(25564), // Rule ID 229 //
9200 /* 25534 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9201 /* 25537 */ // MIs[0] Operand 1
9202 /* 25537 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
9203 /* 25542 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9204 /* 25546 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9205 /* 25550 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9206 /* 25550 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I8x16),
9207 /* 25553 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9208 /* 25555 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9209 /* 25557 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9210 /* 25559 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9211 /* 25562 */ GIR_RootConstrainSelectedInstOperands,
9212 /* 25563 */ // GIR_Coverage, 229,
9213 /* 25563 */ GIR_EraseRootFromParent_Done,
9214 /* 25564 */ // Label 622: @25564
9215 /* 25564 */ GIM_Try, /*On fail goto*//*Label 623*/ GIMT_Encode4(25599), // Rule ID 233 //
9216 /* 25569 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9217 /* 25572 */ // MIs[0] Operand 1
9218 /* 25572 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
9219 /* 25577 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9220 /* 25581 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9221 /* 25585 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9222 /* 25585 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I8x16),
9223 /* 25588 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9224 /* 25590 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9225 /* 25592 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9226 /* 25594 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9227 /* 25597 */ GIR_RootConstrainSelectedInstOperands,
9228 /* 25598 */ // GIR_Coverage, 233,
9229 /* 25598 */ GIR_EraseRootFromParent_Done,
9230 /* 25599 */ // Label 623: @25599
9231 /* 25599 */ GIM_Try, /*On fail goto*//*Label 624*/ GIMT_Encode4(25634), // Rule ID 239 //
9232 /* 25604 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9233 /* 25607 */ // MIs[0] Operand 1
9234 /* 25607 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
9235 /* 25612 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9236 /* 25616 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9237 /* 25620 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9238 /* 25620 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I8x16),
9239 /* 25623 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9240 /* 25625 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9241 /* 25627 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9242 /* 25629 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9243 /* 25632 */ GIR_RootConstrainSelectedInstOperands,
9244 /* 25633 */ // GIR_Coverage, 239,
9245 /* 25633 */ GIR_EraseRootFromParent_Done,
9246 /* 25634 */ // Label 624: @25634
9247 /* 25634 */ GIM_Try, /*On fail goto*//*Label 625*/ GIMT_Encode4(25669), // Rule ID 243 //
9248 /* 25639 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9249 /* 25642 */ // MIs[0] Operand 1
9250 /* 25642 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
9251 /* 25647 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9252 /* 25651 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9253 /* 25655 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
9254 /* 25655 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I8x16),
9255 /* 25658 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9256 /* 25660 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9257 /* 25662 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9258 /* 25664 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9259 /* 25667 */ GIR_RootConstrainSelectedInstOperands,
9260 /* 25668 */ // GIR_Coverage, 243,
9261 /* 25668 */ GIR_EraseRootFromParent_Done,
9262 /* 25669 */ // Label 625: @25669
9263 /* 25669 */ GIM_Reject,
9264 /* 25670 */ // Label 615: @25670
9265 /* 25670 */ GIM_Reject,
9266 /* 25671 */ // Label 557: @25671
9267 /* 25671 */ GIM_Try, /*On fail goto*//*Label 626*/ GIMT_Encode4(26037),
9268 /* 25676 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
9269 /* 25679 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
9270 /* 25682 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9271 /* 25686 */ GIM_Try, /*On fail goto*//*Label 627*/ GIMT_Encode4(25721), // Rule ID 196 //
9272 /* 25691 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9273 /* 25694 */ // MIs[0] Operand 1
9274 /* 25694 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
9275 /* 25699 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9276 /* 25703 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9277 /* 25707 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9278 /* 25707 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I16x8),
9279 /* 25710 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9280 /* 25712 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9281 /* 25714 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9282 /* 25716 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9283 /* 25719 */ GIR_RootConstrainSelectedInstOperands,
9284 /* 25720 */ // GIR_Coverage, 196,
9285 /* 25720 */ GIR_EraseRootFromParent_Done,
9286 /* 25721 */ // Label 627: @25721
9287 /* 25721 */ GIM_Try, /*On fail goto*//*Label 628*/ GIMT_Encode4(25756), // Rule ID 203 //
9288 /* 25726 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9289 /* 25729 */ // MIs[0] Operand 1
9290 /* 25729 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
9291 /* 25734 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9292 /* 25738 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9293 /* 25742 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETNE:{ *:[Other] }) => (NE_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9294 /* 25742 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I16x8),
9295 /* 25745 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9296 /* 25747 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9297 /* 25749 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9298 /* 25751 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9299 /* 25754 */ GIR_RootConstrainSelectedInstOperands,
9300 /* 25755 */ // GIR_Coverage, 203,
9301 /* 25755 */ GIR_EraseRootFromParent_Done,
9302 /* 25756 */ // Label 628: @25756
9303 /* 25756 */ GIM_Try, /*On fail goto*//*Label 629*/ GIMT_Encode4(25791), // Rule ID 210 //
9304 /* 25761 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9305 /* 25764 */ // MIs[0] Operand 1
9306 /* 25764 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
9307 /* 25769 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9308 /* 25773 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9309 /* 25777 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9310 /* 25777 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I16x8),
9311 /* 25780 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9312 /* 25782 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9313 /* 25784 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9314 /* 25786 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9315 /* 25789 */ GIR_RootConstrainSelectedInstOperands,
9316 /* 25790 */ // GIR_Coverage, 210,
9317 /* 25790 */ GIR_EraseRootFromParent_Done,
9318 /* 25791 */ // Label 629: @25791
9319 /* 25791 */ GIM_Try, /*On fail goto*//*Label 630*/ GIMT_Encode4(25826), // Rule ID 214 //
9320 /* 25796 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9321 /* 25799 */ // MIs[0] Operand 1
9322 /* 25799 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
9323 /* 25804 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9324 /* 25808 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9325 /* 25812 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9326 /* 25812 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I16x8),
9327 /* 25815 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9328 /* 25817 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9329 /* 25819 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9330 /* 25821 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9331 /* 25824 */ GIR_RootConstrainSelectedInstOperands,
9332 /* 25825 */ // GIR_Coverage, 214,
9333 /* 25825 */ GIR_EraseRootFromParent_Done,
9334 /* 25826 */ // Label 630: @25826
9335 /* 25826 */ GIM_Try, /*On fail goto*//*Label 631*/ GIMT_Encode4(25861), // Rule ID 220 //
9336 /* 25831 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9337 /* 25834 */ // MIs[0] Operand 1
9338 /* 25834 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
9339 /* 25839 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9340 /* 25843 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9341 /* 25847 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9342 /* 25847 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I16x8),
9343 /* 25850 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9344 /* 25852 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9345 /* 25854 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9346 /* 25856 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9347 /* 25859 */ GIR_RootConstrainSelectedInstOperands,
9348 /* 25860 */ // GIR_Coverage, 220,
9349 /* 25860 */ GIR_EraseRootFromParent_Done,
9350 /* 25861 */ // Label 631: @25861
9351 /* 25861 */ GIM_Try, /*On fail goto*//*Label 632*/ GIMT_Encode4(25896), // Rule ID 224 //
9352 /* 25866 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9353 /* 25869 */ // MIs[0] Operand 1
9354 /* 25869 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
9355 /* 25874 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9356 /* 25878 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9357 /* 25882 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9358 /* 25882 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I16x8),
9359 /* 25885 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9360 /* 25887 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9361 /* 25889 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9362 /* 25891 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9363 /* 25894 */ GIR_RootConstrainSelectedInstOperands,
9364 /* 25895 */ // GIR_Coverage, 224,
9365 /* 25895 */ GIR_EraseRootFromParent_Done,
9366 /* 25896 */ // Label 632: @25896
9367 /* 25896 */ GIM_Try, /*On fail goto*//*Label 633*/ GIMT_Encode4(25931), // Rule ID 230 //
9368 /* 25901 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9369 /* 25904 */ // MIs[0] Operand 1
9370 /* 25904 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
9371 /* 25909 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9372 /* 25913 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9373 /* 25917 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9374 /* 25917 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I16x8),
9375 /* 25920 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9376 /* 25922 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9377 /* 25924 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9378 /* 25926 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9379 /* 25929 */ GIR_RootConstrainSelectedInstOperands,
9380 /* 25930 */ // GIR_Coverage, 230,
9381 /* 25930 */ GIR_EraseRootFromParent_Done,
9382 /* 25931 */ // Label 633: @25931
9383 /* 25931 */ GIM_Try, /*On fail goto*//*Label 634*/ GIMT_Encode4(25966), // Rule ID 234 //
9384 /* 25936 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9385 /* 25939 */ // MIs[0] Operand 1
9386 /* 25939 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
9387 /* 25944 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9388 /* 25948 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9389 /* 25952 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9390 /* 25952 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I16x8),
9391 /* 25955 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9392 /* 25957 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9393 /* 25959 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9394 /* 25961 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9395 /* 25964 */ GIR_RootConstrainSelectedInstOperands,
9396 /* 25965 */ // GIR_Coverage, 234,
9397 /* 25965 */ GIR_EraseRootFromParent_Done,
9398 /* 25966 */ // Label 634: @25966
9399 /* 25966 */ GIM_Try, /*On fail goto*//*Label 635*/ GIMT_Encode4(26001), // Rule ID 240 //
9400 /* 25971 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9401 /* 25974 */ // MIs[0] Operand 1
9402 /* 25974 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
9403 /* 25979 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9404 /* 25983 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9405 /* 25987 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9406 /* 25987 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I16x8),
9407 /* 25990 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9408 /* 25992 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9409 /* 25994 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9410 /* 25996 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9411 /* 25999 */ GIR_RootConstrainSelectedInstOperands,
9412 /* 26000 */ // GIR_Coverage, 240,
9413 /* 26000 */ GIR_EraseRootFromParent_Done,
9414 /* 26001 */ // Label 635: @26001
9415 /* 26001 */ GIM_Try, /*On fail goto*//*Label 636*/ GIMT_Encode4(26036), // Rule ID 244 //
9416 /* 26006 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9417 /* 26009 */ // MIs[0] Operand 1
9418 /* 26009 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
9419 /* 26014 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9420 /* 26018 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9421 /* 26022 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
9422 /* 26022 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I16x8),
9423 /* 26025 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9424 /* 26027 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9425 /* 26029 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9426 /* 26031 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9427 /* 26034 */ GIR_RootConstrainSelectedInstOperands,
9428 /* 26035 */ // GIR_Coverage, 244,
9429 /* 26035 */ GIR_EraseRootFromParent_Done,
9430 /* 26036 */ // Label 636: @26036
9431 /* 26036 */ GIM_Reject,
9432 /* 26037 */ // Label 626: @26037
9433 /* 26037 */ GIM_Reject,
9434 /* 26038 */ // Label 558: @26038
9435 /* 26038 */ GIM_Try, /*On fail goto*//*Label 637*/ GIMT_Encode4(26404),
9436 /* 26043 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
9437 /* 26046 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
9438 /* 26049 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9439 /* 26053 */ GIM_Try, /*On fail goto*//*Label 638*/ GIMT_Encode4(26088), // Rule ID 197 //
9440 /* 26058 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9441 /* 26061 */ // MIs[0] Operand 1
9442 /* 26061 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
9443 /* 26066 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9444 /* 26070 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9445 /* 26074 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9446 /* 26074 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I32x4),
9447 /* 26077 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9448 /* 26079 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9449 /* 26081 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9450 /* 26083 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9451 /* 26086 */ GIR_RootConstrainSelectedInstOperands,
9452 /* 26087 */ // GIR_Coverage, 197,
9453 /* 26087 */ GIR_EraseRootFromParent_Done,
9454 /* 26088 */ // Label 638: @26088
9455 /* 26088 */ GIM_Try, /*On fail goto*//*Label 639*/ GIMT_Encode4(26123), // Rule ID 204 //
9456 /* 26093 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9457 /* 26096 */ // MIs[0] Operand 1
9458 /* 26096 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
9459 /* 26101 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9460 /* 26105 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9461 /* 26109 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETNE:{ *:[Other] }) => (NE_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9462 /* 26109 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I32x4),
9463 /* 26112 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9464 /* 26114 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9465 /* 26116 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9466 /* 26118 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9467 /* 26121 */ GIR_RootConstrainSelectedInstOperands,
9468 /* 26122 */ // GIR_Coverage, 204,
9469 /* 26122 */ GIR_EraseRootFromParent_Done,
9470 /* 26123 */ // Label 639: @26123
9471 /* 26123 */ GIM_Try, /*On fail goto*//*Label 640*/ GIMT_Encode4(26158), // Rule ID 211 //
9472 /* 26128 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9473 /* 26131 */ // MIs[0] Operand 1
9474 /* 26131 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
9475 /* 26136 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9476 /* 26140 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9477 /* 26144 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9478 /* 26144 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I32x4),
9479 /* 26147 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9480 /* 26149 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9481 /* 26151 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9482 /* 26153 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9483 /* 26156 */ GIR_RootConstrainSelectedInstOperands,
9484 /* 26157 */ // GIR_Coverage, 211,
9485 /* 26157 */ GIR_EraseRootFromParent_Done,
9486 /* 26158 */ // Label 640: @26158
9487 /* 26158 */ GIM_Try, /*On fail goto*//*Label 641*/ GIMT_Encode4(26193), // Rule ID 215 //
9488 /* 26163 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9489 /* 26166 */ // MIs[0] Operand 1
9490 /* 26166 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
9491 /* 26171 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9492 /* 26175 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9493 /* 26179 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9494 /* 26179 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I32x4),
9495 /* 26182 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9496 /* 26184 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9497 /* 26186 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9498 /* 26188 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9499 /* 26191 */ GIR_RootConstrainSelectedInstOperands,
9500 /* 26192 */ // GIR_Coverage, 215,
9501 /* 26192 */ GIR_EraseRootFromParent_Done,
9502 /* 26193 */ // Label 641: @26193
9503 /* 26193 */ GIM_Try, /*On fail goto*//*Label 642*/ GIMT_Encode4(26228), // Rule ID 221 //
9504 /* 26198 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9505 /* 26201 */ // MIs[0] Operand 1
9506 /* 26201 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
9507 /* 26206 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9508 /* 26210 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9509 /* 26214 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9510 /* 26214 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I32x4),
9511 /* 26217 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9512 /* 26219 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9513 /* 26221 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9514 /* 26223 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9515 /* 26226 */ GIR_RootConstrainSelectedInstOperands,
9516 /* 26227 */ // GIR_Coverage, 221,
9517 /* 26227 */ GIR_EraseRootFromParent_Done,
9518 /* 26228 */ // Label 642: @26228
9519 /* 26228 */ GIM_Try, /*On fail goto*//*Label 643*/ GIMT_Encode4(26263), // Rule ID 225 //
9520 /* 26233 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9521 /* 26236 */ // MIs[0] Operand 1
9522 /* 26236 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
9523 /* 26241 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9524 /* 26245 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9525 /* 26249 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9526 /* 26249 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I32x4),
9527 /* 26252 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9528 /* 26254 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9529 /* 26256 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9530 /* 26258 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9531 /* 26261 */ GIR_RootConstrainSelectedInstOperands,
9532 /* 26262 */ // GIR_Coverage, 225,
9533 /* 26262 */ GIR_EraseRootFromParent_Done,
9534 /* 26263 */ // Label 643: @26263
9535 /* 26263 */ GIM_Try, /*On fail goto*//*Label 644*/ GIMT_Encode4(26298), // Rule ID 231 //
9536 /* 26268 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9537 /* 26271 */ // MIs[0] Operand 1
9538 /* 26271 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
9539 /* 26276 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9540 /* 26280 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9541 /* 26284 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9542 /* 26284 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I32x4),
9543 /* 26287 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9544 /* 26289 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9545 /* 26291 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9546 /* 26293 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9547 /* 26296 */ GIR_RootConstrainSelectedInstOperands,
9548 /* 26297 */ // GIR_Coverage, 231,
9549 /* 26297 */ GIR_EraseRootFromParent_Done,
9550 /* 26298 */ // Label 644: @26298
9551 /* 26298 */ GIM_Try, /*On fail goto*//*Label 645*/ GIMT_Encode4(26333), // Rule ID 235 //
9552 /* 26303 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9553 /* 26306 */ // MIs[0] Operand 1
9554 /* 26306 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
9555 /* 26311 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9556 /* 26315 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9557 /* 26319 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9558 /* 26319 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I32x4),
9559 /* 26322 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9560 /* 26324 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9561 /* 26326 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9562 /* 26328 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9563 /* 26331 */ GIR_RootConstrainSelectedInstOperands,
9564 /* 26332 */ // GIR_Coverage, 235,
9565 /* 26332 */ GIR_EraseRootFromParent_Done,
9566 /* 26333 */ // Label 645: @26333
9567 /* 26333 */ GIM_Try, /*On fail goto*//*Label 646*/ GIMT_Encode4(26368), // Rule ID 241 //
9568 /* 26338 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9569 /* 26341 */ // MIs[0] Operand 1
9570 /* 26341 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
9571 /* 26346 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9572 /* 26350 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9573 /* 26354 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9574 /* 26354 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I32x4),
9575 /* 26357 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9576 /* 26359 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9577 /* 26361 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9578 /* 26363 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9579 /* 26366 */ GIR_RootConstrainSelectedInstOperands,
9580 /* 26367 */ // GIR_Coverage, 241,
9581 /* 26367 */ GIR_EraseRootFromParent_Done,
9582 /* 26368 */ // Label 646: @26368
9583 /* 26368 */ GIM_Try, /*On fail goto*//*Label 647*/ GIMT_Encode4(26403), // Rule ID 245 //
9584 /* 26373 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9585 /* 26376 */ // MIs[0] Operand 1
9586 /* 26376 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
9587 /* 26381 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9588 /* 26385 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9589 /* 26389 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
9590 /* 26389 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I32x4),
9591 /* 26392 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9592 /* 26394 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9593 /* 26396 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9594 /* 26398 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9595 /* 26401 */ GIR_RootConstrainSelectedInstOperands,
9596 /* 26402 */ // GIR_Coverage, 245,
9597 /* 26402 */ GIR_EraseRootFromParent_Done,
9598 /* 26403 */ // Label 647: @26403
9599 /* 26403 */ GIM_Reject,
9600 /* 26404 */ // Label 637: @26404
9601 /* 26404 */ GIM_Reject,
9602 /* 26405 */ // Label 559: @26405
9603 /* 26405 */ GIM_Try, /*On fail goto*//*Label 648*/ GIMT_Encode4(26631),
9604 /* 26410 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
9605 /* 26413 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
9606 /* 26416 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9607 /* 26420 */ GIM_Try, /*On fail goto*//*Label 649*/ GIMT_Encode4(26455), // Rule ID 198 //
9608 /* 26425 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9609 /* 26428 */ // MIs[0] Operand 1
9610 /* 26428 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
9611 /* 26433 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9612 /* 26437 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9613 /* 26441 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
9614 /* 26441 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I64x2),
9615 /* 26444 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9616 /* 26446 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9617 /* 26448 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9618 /* 26450 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9619 /* 26453 */ GIR_RootConstrainSelectedInstOperands,
9620 /* 26454 */ // GIR_Coverage, 198,
9621 /* 26454 */ GIR_EraseRootFromParent_Done,
9622 /* 26455 */ // Label 649: @26455
9623 /* 26455 */ GIM_Try, /*On fail goto*//*Label 650*/ GIMT_Encode4(26490), // Rule ID 205 //
9624 /* 26460 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9625 /* 26463 */ // MIs[0] Operand 1
9626 /* 26463 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
9627 /* 26468 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9628 /* 26472 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9629 /* 26476 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETNE:{ *:[Other] }) => (NE_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
9630 /* 26476 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I64x2),
9631 /* 26479 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9632 /* 26481 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9633 /* 26483 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9634 /* 26485 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9635 /* 26488 */ GIR_RootConstrainSelectedInstOperands,
9636 /* 26489 */ // GIR_Coverage, 205,
9637 /* 26489 */ GIR_EraseRootFromParent_Done,
9638 /* 26490 */ // Label 650: @26490
9639 /* 26490 */ GIM_Try, /*On fail goto*//*Label 651*/ GIMT_Encode4(26525), // Rule ID 212 //
9640 /* 26495 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9641 /* 26498 */ // MIs[0] Operand 1
9642 /* 26498 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
9643 /* 26503 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9644 /* 26507 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9645 /* 26511 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
9646 /* 26511 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I64x2),
9647 /* 26514 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9648 /* 26516 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9649 /* 26518 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9650 /* 26520 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9651 /* 26523 */ GIR_RootConstrainSelectedInstOperands,
9652 /* 26524 */ // GIR_Coverage, 212,
9653 /* 26524 */ GIR_EraseRootFromParent_Done,
9654 /* 26525 */ // Label 651: @26525
9655 /* 26525 */ GIM_Try, /*On fail goto*//*Label 652*/ GIMT_Encode4(26560), // Rule ID 222 //
9656 /* 26530 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9657 /* 26533 */ // MIs[0] Operand 1
9658 /* 26533 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
9659 /* 26538 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9660 /* 26542 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9661 /* 26546 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
9662 /* 26546 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I64x2),
9663 /* 26549 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9664 /* 26551 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9665 /* 26553 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9666 /* 26555 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9667 /* 26558 */ GIR_RootConstrainSelectedInstOperands,
9668 /* 26559 */ // GIR_Coverage, 222,
9669 /* 26559 */ GIR_EraseRootFromParent_Done,
9670 /* 26560 */ // Label 652: @26560
9671 /* 26560 */ GIM_Try, /*On fail goto*//*Label 653*/ GIMT_Encode4(26595), // Rule ID 232 //
9672 /* 26565 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9673 /* 26568 */ // MIs[0] Operand 1
9674 /* 26568 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
9675 /* 26573 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9676 /* 26577 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9677 /* 26581 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
9678 /* 26581 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I64x2),
9679 /* 26584 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9680 /* 26586 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9681 /* 26588 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9682 /* 26590 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9683 /* 26593 */ GIR_RootConstrainSelectedInstOperands,
9684 /* 26594 */ // GIR_Coverage, 232,
9685 /* 26594 */ GIR_EraseRootFromParent_Done,
9686 /* 26595 */ // Label 653: @26595
9687 /* 26595 */ GIM_Try, /*On fail goto*//*Label 654*/ GIMT_Encode4(26630), // Rule ID 242 //
9688 /* 26600 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
9689 /* 26603 */ // MIs[0] Operand 1
9690 /* 26603 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
9691 /* 26608 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9692 /* 26612 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9693 /* 26616 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
9694 /* 26616 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I64x2),
9695 /* 26619 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9696 /* 26621 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9697 /* 26623 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9698 /* 26625 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9699 /* 26628 */ GIR_RootConstrainSelectedInstOperands,
9700 /* 26629 */ // GIR_Coverage, 242,
9701 /* 26629 */ GIR_EraseRootFromParent_Done,
9702 /* 26630 */ // Label 654: @26630
9703 /* 26630 */ GIM_Reject,
9704 /* 26631 */ // Label 648: @26631
9705 /* 26631 */ GIM_Reject,
9706 /* 26632 */ // Label 560: @26632
9707 /* 26632 */ GIM_Reject,
9708 /* 26633 */ // Label 32: @26633
9709 /* 26633 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 659*/ GIMT_Encode4(27854),
9710 /* 26644 */ /*GILLT_s32*//*Label 655*/ GIMT_Encode4(26668), GIMT_Encode4(0), GIMT_Encode4(0),
9711 /* 26656 */ /*GILLT_v8s16*//*Label 656*/ GIMT_Encode4(27173),
9712 /* 26660 */ /*GILLT_v4s32*//*Label 657*/ GIMT_Encode4(27400),
9713 /* 26664 */ /*GILLT_v2s64*//*Label 658*/ GIMT_Encode4(27627),
9714 /* 26668 */ // Label 655: @26668
9715 /* 26668 */ GIM_Try, /*On fail goto*//*Label 660*/ GIMT_Encode4(26710), // Rule ID 152 //
9716 /* 26673 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
9717 /* 26676 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
9718 /* 26679 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9719 /* 26683 */ // MIs[0] Operand 1
9720 /* 26683 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
9721 /* 26688 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9722 /* 26692 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9723 /* 26696 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9724 /* 26696 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F32),
9725 /* 26699 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9726 /* 26701 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9727 /* 26703 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9728 /* 26705 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9729 /* 26708 */ GIR_RootConstrainSelectedInstOperands,
9730 /* 26709 */ // GIR_Coverage, 152,
9731 /* 26709 */ GIR_EraseRootFromParent_Done,
9732 /* 26710 */ // Label 660: @26710
9733 /* 26710 */ GIM_Try, /*On fail goto*//*Label 661*/ GIMT_Encode4(26752), // Rule ID 153 //
9734 /* 26715 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
9735 /* 26718 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
9736 /* 26721 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9737 /* 26725 */ // MIs[0] Operand 1
9738 /* 26725 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
9739 /* 26730 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9740 /* 26734 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9741 /* 26738 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9742 /* 26738 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F64),
9743 /* 26741 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9744 /* 26743 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9745 /* 26745 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9746 /* 26747 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9747 /* 26750 */ GIR_RootConstrainSelectedInstOperands,
9748 /* 26751 */ // GIR_Coverage, 153,
9749 /* 26751 */ GIR_EraseRootFromParent_Done,
9750 /* 26752 */ // Label 661: @26752
9751 /* 26752 */ GIM_Try, /*On fail goto*//*Label 662*/ GIMT_Encode4(26794), // Rule ID 154 //
9752 /* 26757 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
9753 /* 26760 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
9754 /* 26763 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9755 /* 26767 */ // MIs[0] Operand 1
9756 /* 26767 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
9757 /* 26772 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9758 /* 26776 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9759 /* 26780 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9760 /* 26780 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F32),
9761 /* 26783 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9762 /* 26785 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9763 /* 26787 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9764 /* 26789 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9765 /* 26792 */ GIR_RootConstrainSelectedInstOperands,
9766 /* 26793 */ // GIR_Coverage, 154,
9767 /* 26793 */ GIR_EraseRootFromParent_Done,
9768 /* 26794 */ // Label 662: @26794
9769 /* 26794 */ GIM_Try, /*On fail goto*//*Label 663*/ GIMT_Encode4(26836), // Rule ID 155 //
9770 /* 26799 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
9771 /* 26802 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
9772 /* 26805 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9773 /* 26809 */ // MIs[0] Operand 1
9774 /* 26809 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
9775 /* 26814 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9776 /* 26818 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9777 /* 26822 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9778 /* 26822 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F64),
9779 /* 26825 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9780 /* 26827 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9781 /* 26829 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9782 /* 26831 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9783 /* 26834 */ GIR_RootConstrainSelectedInstOperands,
9784 /* 26835 */ // GIR_Coverage, 155,
9785 /* 26835 */ GIR_EraseRootFromParent_Done,
9786 /* 26836 */ // Label 663: @26836
9787 /* 26836 */ GIM_Try, /*On fail goto*//*Label 664*/ GIMT_Encode4(26878), // Rule ID 156 //
9788 /* 26841 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
9789 /* 26844 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
9790 /* 26847 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9791 /* 26851 */ // MIs[0] Operand 1
9792 /* 26851 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
9793 /* 26856 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9794 /* 26860 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9795 /* 26864 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9796 /* 26864 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F32),
9797 /* 26867 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9798 /* 26869 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9799 /* 26871 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9800 /* 26873 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9801 /* 26876 */ GIR_RootConstrainSelectedInstOperands,
9802 /* 26877 */ // GIR_Coverage, 156,
9803 /* 26877 */ GIR_EraseRootFromParent_Done,
9804 /* 26878 */ // Label 664: @26878
9805 /* 26878 */ GIM_Try, /*On fail goto*//*Label 665*/ GIMT_Encode4(26920), // Rule ID 157 //
9806 /* 26883 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
9807 /* 26886 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
9808 /* 26889 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9809 /* 26893 */ // MIs[0] Operand 1
9810 /* 26893 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
9811 /* 26898 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9812 /* 26902 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9813 /* 26906 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9814 /* 26906 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F64),
9815 /* 26909 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9816 /* 26911 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9817 /* 26913 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9818 /* 26915 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9819 /* 26918 */ GIR_RootConstrainSelectedInstOperands,
9820 /* 26919 */ // GIR_Coverage, 157,
9821 /* 26919 */ GIR_EraseRootFromParent_Done,
9822 /* 26920 */ // Label 665: @26920
9823 /* 26920 */ GIM_Try, /*On fail goto*//*Label 666*/ GIMT_Encode4(26962), // Rule ID 158 //
9824 /* 26925 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
9825 /* 26928 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
9826 /* 26931 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9827 /* 26935 */ // MIs[0] Operand 1
9828 /* 26935 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
9829 /* 26940 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9830 /* 26944 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9831 /* 26948 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9832 /* 26948 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F32),
9833 /* 26951 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9834 /* 26953 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9835 /* 26955 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9836 /* 26957 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9837 /* 26960 */ GIR_RootConstrainSelectedInstOperands,
9838 /* 26961 */ // GIR_Coverage, 158,
9839 /* 26961 */ GIR_EraseRootFromParent_Done,
9840 /* 26962 */ // Label 666: @26962
9841 /* 26962 */ GIM_Try, /*On fail goto*//*Label 667*/ GIMT_Encode4(27004), // Rule ID 159 //
9842 /* 26967 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
9843 /* 26970 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
9844 /* 26973 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9845 /* 26977 */ // MIs[0] Operand 1
9846 /* 26977 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
9847 /* 26982 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9848 /* 26986 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9849 /* 26990 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9850 /* 26990 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F64),
9851 /* 26993 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9852 /* 26995 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9853 /* 26997 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9854 /* 26999 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9855 /* 27002 */ GIR_RootConstrainSelectedInstOperands,
9856 /* 27003 */ // GIR_Coverage, 159,
9857 /* 27003 */ GIR_EraseRootFromParent_Done,
9858 /* 27004 */ // Label 667: @27004
9859 /* 27004 */ GIM_Try, /*On fail goto*//*Label 668*/ GIMT_Encode4(27046), // Rule ID 160 //
9860 /* 27009 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
9861 /* 27012 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
9862 /* 27015 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9863 /* 27019 */ // MIs[0] Operand 1
9864 /* 27019 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
9865 /* 27024 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9866 /* 27028 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9867 /* 27032 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9868 /* 27032 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F32),
9869 /* 27035 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9870 /* 27037 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9871 /* 27039 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9872 /* 27041 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9873 /* 27044 */ GIR_RootConstrainSelectedInstOperands,
9874 /* 27045 */ // GIR_Coverage, 160,
9875 /* 27045 */ GIR_EraseRootFromParent_Done,
9876 /* 27046 */ // Label 668: @27046
9877 /* 27046 */ GIM_Try, /*On fail goto*//*Label 669*/ GIMT_Encode4(27088), // Rule ID 161 //
9878 /* 27051 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
9879 /* 27054 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
9880 /* 27057 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9881 /* 27061 */ // MIs[0] Operand 1
9882 /* 27061 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
9883 /* 27066 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9884 /* 27070 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9885 /* 27074 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9886 /* 27074 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F64),
9887 /* 27077 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9888 /* 27079 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9889 /* 27081 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9890 /* 27083 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9891 /* 27086 */ GIR_RootConstrainSelectedInstOperands,
9892 /* 27087 */ // GIR_Coverage, 161,
9893 /* 27087 */ GIR_EraseRootFromParent_Done,
9894 /* 27088 */ // Label 669: @27088
9895 /* 27088 */ GIM_Try, /*On fail goto*//*Label 670*/ GIMT_Encode4(27130), // Rule ID 162 //
9896 /* 27093 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
9897 /* 27096 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
9898 /* 27099 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9899 /* 27103 */ // MIs[0] Operand 1
9900 /* 27103 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
9901 /* 27108 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9902 /* 27112 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9903 /* 27116 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
9904 /* 27116 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F32),
9905 /* 27119 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9906 /* 27121 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9907 /* 27123 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9908 /* 27125 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9909 /* 27128 */ GIR_RootConstrainSelectedInstOperands,
9910 /* 27129 */ // GIR_Coverage, 162,
9911 /* 27129 */ GIR_EraseRootFromParent_Done,
9912 /* 27130 */ // Label 670: @27130
9913 /* 27130 */ GIM_Try, /*On fail goto*//*Label 671*/ GIMT_Encode4(27172), // Rule ID 163 //
9914 /* 27135 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
9915 /* 27138 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
9916 /* 27141 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9917 /* 27145 */ // MIs[0] Operand 1
9918 /* 27145 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
9919 /* 27150 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9920 /* 27154 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9921 /* 27158 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
9922 /* 27158 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F64),
9923 /* 27161 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9924 /* 27163 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9925 /* 27165 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9926 /* 27167 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9927 /* 27170 */ GIR_RootConstrainSelectedInstOperands,
9928 /* 27171 */ // GIR_Coverage, 163,
9929 /* 27171 */ GIR_EraseRootFromParent_Done,
9930 /* 27172 */ // Label 671: @27172
9931 /* 27172 */ GIM_Reject,
9932 /* 27173 */ // Label 656: @27173
9933 /* 27173 */ GIM_Try, /*On fail goto*//*Label 672*/ GIMT_Encode4(27399),
9934 /* 27178 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
9935 /* 27181 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
9936 /* 27184 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9937 /* 27188 */ GIM_Try, /*On fail goto*//*Label 673*/ GIMT_Encode4(27223), // Rule ID 201 //
9938 /* 27193 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
9939 /* 27196 */ // MIs[0] Operand 1
9940 /* 27196 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
9941 /* 27201 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9942 /* 27205 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9943 /* 27209 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
9944 /* 27209 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F16x8),
9945 /* 27212 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9946 /* 27214 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9947 /* 27216 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9948 /* 27218 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9949 /* 27221 */ GIR_RootConstrainSelectedInstOperands,
9950 /* 27222 */ // GIR_Coverage, 201,
9951 /* 27222 */ GIR_EraseRootFromParent_Done,
9952 /* 27223 */ // Label 673: @27223
9953 /* 27223 */ GIM_Try, /*On fail goto*//*Label 674*/ GIMT_Encode4(27258), // Rule ID 208 //
9954 /* 27228 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
9955 /* 27231 */ // MIs[0] Operand 1
9956 /* 27231 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
9957 /* 27236 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9958 /* 27240 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9959 /* 27244 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
9960 /* 27244 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F16x8),
9961 /* 27247 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9962 /* 27249 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9963 /* 27251 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9964 /* 27253 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9965 /* 27256 */ GIR_RootConstrainSelectedInstOperands,
9966 /* 27257 */ // GIR_Coverage, 208,
9967 /* 27257 */ GIR_EraseRootFromParent_Done,
9968 /* 27258 */ // Label 674: @27258
9969 /* 27258 */ GIM_Try, /*On fail goto*//*Label 675*/ GIMT_Encode4(27293), // Rule ID 218 //
9970 /* 27263 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
9971 /* 27266 */ // MIs[0] Operand 1
9972 /* 27266 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
9973 /* 27271 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9974 /* 27275 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9975 /* 27279 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
9976 /* 27279 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F16x8),
9977 /* 27282 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9978 /* 27284 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9979 /* 27286 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9980 /* 27288 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9981 /* 27291 */ GIR_RootConstrainSelectedInstOperands,
9982 /* 27292 */ // GIR_Coverage, 218,
9983 /* 27292 */ GIR_EraseRootFromParent_Done,
9984 /* 27293 */ // Label 675: @27293
9985 /* 27293 */ GIM_Try, /*On fail goto*//*Label 676*/ GIMT_Encode4(27328), // Rule ID 228 //
9986 /* 27298 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
9987 /* 27301 */ // MIs[0] Operand 1
9988 /* 27301 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
9989 /* 27306 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9990 /* 27310 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9991 /* 27314 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
9992 /* 27314 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F16x8),
9993 /* 27317 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9994 /* 27319 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9995 /* 27321 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9996 /* 27323 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9997 /* 27326 */ GIR_RootConstrainSelectedInstOperands,
9998 /* 27327 */ // GIR_Coverage, 228,
9999 /* 27327 */ GIR_EraseRootFromParent_Done,
10000 /* 27328 */ // Label 676: @27328
10001 /* 27328 */ GIM_Try, /*On fail goto*//*Label 677*/ GIMT_Encode4(27363), // Rule ID 238 //
10002 /* 27333 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
10003 /* 27336 */ // MIs[0] Operand 1
10004 /* 27336 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
10005 /* 27341 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10006 /* 27345 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10007 /* 27349 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
10008 /* 27349 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F16x8),
10009 /* 27352 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10010 /* 27354 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10011 /* 27356 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10012 /* 27358 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10013 /* 27361 */ GIR_RootConstrainSelectedInstOperands,
10014 /* 27362 */ // GIR_Coverage, 238,
10015 /* 27362 */ GIR_EraseRootFromParent_Done,
10016 /* 27363 */ // Label 677: @27363
10017 /* 27363 */ GIM_Try, /*On fail goto*//*Label 678*/ GIMT_Encode4(27398), // Rule ID 248 //
10018 /* 27368 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
10019 /* 27371 */ // MIs[0] Operand 1
10020 /* 27371 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
10021 /* 27376 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10022 /* 27380 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10023 /* 27384 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
10024 /* 27384 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F16x8),
10025 /* 27387 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10026 /* 27389 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10027 /* 27391 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10028 /* 27393 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10029 /* 27396 */ GIR_RootConstrainSelectedInstOperands,
10030 /* 27397 */ // GIR_Coverage, 248,
10031 /* 27397 */ GIR_EraseRootFromParent_Done,
10032 /* 27398 */ // Label 678: @27398
10033 /* 27398 */ GIM_Reject,
10034 /* 27399 */ // Label 672: @27399
10035 /* 27399 */ GIM_Reject,
10036 /* 27400 */ // Label 657: @27400
10037 /* 27400 */ GIM_Try, /*On fail goto*//*Label 679*/ GIMT_Encode4(27626),
10038 /* 27405 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
10039 /* 27408 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
10040 /* 27411 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10041 /* 27415 */ GIM_Try, /*On fail goto*//*Label 680*/ GIMT_Encode4(27450), // Rule ID 199 //
10042 /* 27420 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10043 /* 27423 */ // MIs[0] Operand 1
10044 /* 27423 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
10045 /* 27428 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10046 /* 27432 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10047 /* 27436 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
10048 /* 27436 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F32x4),
10049 /* 27439 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10050 /* 27441 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10051 /* 27443 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10052 /* 27445 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10053 /* 27448 */ GIR_RootConstrainSelectedInstOperands,
10054 /* 27449 */ // GIR_Coverage, 199,
10055 /* 27449 */ GIR_EraseRootFromParent_Done,
10056 /* 27450 */ // Label 680: @27450
10057 /* 27450 */ GIM_Try, /*On fail goto*//*Label 681*/ GIMT_Encode4(27485), // Rule ID 206 //
10058 /* 27455 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10059 /* 27458 */ // MIs[0] Operand 1
10060 /* 27458 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
10061 /* 27463 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10062 /* 27467 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10063 /* 27471 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
10064 /* 27471 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F32x4),
10065 /* 27474 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10066 /* 27476 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10067 /* 27478 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10068 /* 27480 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10069 /* 27483 */ GIR_RootConstrainSelectedInstOperands,
10070 /* 27484 */ // GIR_Coverage, 206,
10071 /* 27484 */ GIR_EraseRootFromParent_Done,
10072 /* 27485 */ // Label 681: @27485
10073 /* 27485 */ GIM_Try, /*On fail goto*//*Label 682*/ GIMT_Encode4(27520), // Rule ID 216 //
10074 /* 27490 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10075 /* 27493 */ // MIs[0] Operand 1
10076 /* 27493 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10077 /* 27498 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10078 /* 27502 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10079 /* 27506 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
10080 /* 27506 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F32x4),
10081 /* 27509 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10082 /* 27511 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10083 /* 27513 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10084 /* 27515 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10085 /* 27518 */ GIR_RootConstrainSelectedInstOperands,
10086 /* 27519 */ // GIR_Coverage, 216,
10087 /* 27519 */ GIR_EraseRootFromParent_Done,
10088 /* 27520 */ // Label 682: @27520
10089 /* 27520 */ GIM_Try, /*On fail goto*//*Label 683*/ GIMT_Encode4(27555), // Rule ID 226 //
10090 /* 27525 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10091 /* 27528 */ // MIs[0] Operand 1
10092 /* 27528 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
10093 /* 27533 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10094 /* 27537 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10095 /* 27541 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
10096 /* 27541 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F32x4),
10097 /* 27544 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10098 /* 27546 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10099 /* 27548 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10100 /* 27550 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10101 /* 27553 */ GIR_RootConstrainSelectedInstOperands,
10102 /* 27554 */ // GIR_Coverage, 226,
10103 /* 27554 */ GIR_EraseRootFromParent_Done,
10104 /* 27555 */ // Label 683: @27555
10105 /* 27555 */ GIM_Try, /*On fail goto*//*Label 684*/ GIMT_Encode4(27590), // Rule ID 236 //
10106 /* 27560 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10107 /* 27563 */ // MIs[0] Operand 1
10108 /* 27563 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
10109 /* 27568 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10110 /* 27572 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10111 /* 27576 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
10112 /* 27576 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F32x4),
10113 /* 27579 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10114 /* 27581 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10115 /* 27583 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10116 /* 27585 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10117 /* 27588 */ GIR_RootConstrainSelectedInstOperands,
10118 /* 27589 */ // GIR_Coverage, 236,
10119 /* 27589 */ GIR_EraseRootFromParent_Done,
10120 /* 27590 */ // Label 684: @27590
10121 /* 27590 */ GIM_Try, /*On fail goto*//*Label 685*/ GIMT_Encode4(27625), // Rule ID 246 //
10122 /* 27595 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10123 /* 27598 */ // MIs[0] Operand 1
10124 /* 27598 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
10125 /* 27603 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10126 /* 27607 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10127 /* 27611 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
10128 /* 27611 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F32x4),
10129 /* 27614 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10130 /* 27616 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10131 /* 27618 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10132 /* 27620 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10133 /* 27623 */ GIR_RootConstrainSelectedInstOperands,
10134 /* 27624 */ // GIR_Coverage, 246,
10135 /* 27624 */ GIR_EraseRootFromParent_Done,
10136 /* 27625 */ // Label 685: @27625
10137 /* 27625 */ GIM_Reject,
10138 /* 27626 */ // Label 679: @27626
10139 /* 27626 */ GIM_Reject,
10140 /* 27627 */ // Label 658: @27627
10141 /* 27627 */ GIM_Try, /*On fail goto*//*Label 686*/ GIMT_Encode4(27853),
10142 /* 27632 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
10143 /* 27635 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
10144 /* 27638 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10145 /* 27642 */ GIM_Try, /*On fail goto*//*Label 687*/ GIMT_Encode4(27677), // Rule ID 200 //
10146 /* 27647 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10147 /* 27650 */ // MIs[0] Operand 1
10148 /* 27650 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
10149 /* 27655 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10150 /* 27659 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10151 /* 27663 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10152 /* 27663 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F64x2),
10153 /* 27666 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10154 /* 27668 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10155 /* 27670 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10156 /* 27672 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10157 /* 27675 */ GIR_RootConstrainSelectedInstOperands,
10158 /* 27676 */ // GIR_Coverage, 200,
10159 /* 27676 */ GIR_EraseRootFromParent_Done,
10160 /* 27677 */ // Label 687: @27677
10161 /* 27677 */ GIM_Try, /*On fail goto*//*Label 688*/ GIMT_Encode4(27712), // Rule ID 207 //
10162 /* 27682 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10163 /* 27685 */ // MIs[0] Operand 1
10164 /* 27685 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
10165 /* 27690 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10166 /* 27694 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10167 /* 27698 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10168 /* 27698 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F64x2),
10169 /* 27701 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10170 /* 27703 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10171 /* 27705 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10172 /* 27707 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10173 /* 27710 */ GIR_RootConstrainSelectedInstOperands,
10174 /* 27711 */ // GIR_Coverage, 207,
10175 /* 27711 */ GIR_EraseRootFromParent_Done,
10176 /* 27712 */ // Label 688: @27712
10177 /* 27712 */ GIM_Try, /*On fail goto*//*Label 689*/ GIMT_Encode4(27747), // Rule ID 217 //
10178 /* 27717 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10179 /* 27720 */ // MIs[0] Operand 1
10180 /* 27720 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10181 /* 27725 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10182 /* 27729 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10183 /* 27733 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10184 /* 27733 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F64x2),
10185 /* 27736 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10186 /* 27738 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10187 /* 27740 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10188 /* 27742 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10189 /* 27745 */ GIR_RootConstrainSelectedInstOperands,
10190 /* 27746 */ // GIR_Coverage, 217,
10191 /* 27746 */ GIR_EraseRootFromParent_Done,
10192 /* 27747 */ // Label 689: @27747
10193 /* 27747 */ GIM_Try, /*On fail goto*//*Label 690*/ GIMT_Encode4(27782), // Rule ID 227 //
10194 /* 27752 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10195 /* 27755 */ // MIs[0] Operand 1
10196 /* 27755 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
10197 /* 27760 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10198 /* 27764 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10199 /* 27768 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10200 /* 27768 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F64x2),
10201 /* 27771 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10202 /* 27773 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10203 /* 27775 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10204 /* 27777 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10205 /* 27780 */ GIR_RootConstrainSelectedInstOperands,
10206 /* 27781 */ // GIR_Coverage, 227,
10207 /* 27781 */ GIR_EraseRootFromParent_Done,
10208 /* 27782 */ // Label 690: @27782
10209 /* 27782 */ GIM_Try, /*On fail goto*//*Label 691*/ GIMT_Encode4(27817), // Rule ID 237 //
10210 /* 27787 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10211 /* 27790 */ // MIs[0] Operand 1
10212 /* 27790 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
10213 /* 27795 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10214 /* 27799 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10215 /* 27803 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10216 /* 27803 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F64x2),
10217 /* 27806 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10218 /* 27808 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10219 /* 27810 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10220 /* 27812 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10221 /* 27815 */ GIR_RootConstrainSelectedInstOperands,
10222 /* 27816 */ // GIR_Coverage, 237,
10223 /* 27816 */ GIR_EraseRootFromParent_Done,
10224 /* 27817 */ // Label 691: @27817
10225 /* 27817 */ GIM_Try, /*On fail goto*//*Label 692*/ GIMT_Encode4(27852), // Rule ID 247 //
10226 /* 27822 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
10227 /* 27825 */ // MIs[0] Operand 1
10228 /* 27825 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
10229 /* 27830 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10230 /* 27834 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10231 /* 27838 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
10232 /* 27838 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F64x2),
10233 /* 27841 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10234 /* 27843 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10235 /* 27845 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10236 /* 27847 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10237 /* 27850 */ GIR_RootConstrainSelectedInstOperands,
10238 /* 27851 */ // GIR_Coverage, 247,
10239 /* 27851 */ GIR_EraseRootFromParent_Done,
10240 /* 27852 */ // Label 692: @27852
10241 /* 27852 */ GIM_Reject,
10242 /* 27853 */ // Label 686: @27853
10243 /* 27853 */ GIM_Reject,
10244 /* 27854 */ // Label 659: @27854
10245 /* 27854 */ GIM_Reject,
10246 /* 27855 */ // Label 33: @27855
10247 /* 27855 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 699*/ GIMT_Encode4(33220),
10248 /* 27866 */ /*GILLT_s32*//*Label 693*/ GIMT_Encode4(27890),
10249 /* 27870 */ /*GILLT_s64*//*Label 694*/ GIMT_Encode4(28248),
10250 /* 27874 */ /*GILLT_v16s8*//*Label 695*/ GIMT_Encode4(28606),
10251 /* 27878 */ /*GILLT_v8s16*//*Label 696*/ GIMT_Encode4(28936),
10252 /* 27882 */ /*GILLT_v4s32*//*Label 697*/ GIMT_Encode4(30068),
10253 /* 27886 */ /*GILLT_v2s64*//*Label 698*/ GIMT_Encode4(31644),
10254 /* 27890 */ // Label 693: @27890
10255 /* 27890 */ GIM_Try, /*On fail goto*//*Label 700*/ GIMT_Encode4(28247),
10256 /* 27895 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10257 /* 27898 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
10258 /* 27901 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
10259 /* 27904 */ GIM_Try, /*On fail goto*//*Label 701*/ GIMT_Encode4(27971), // Rule ID 663 //
10260 /* 27909 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10261 /* 27913 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10262 /* 27917 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10263 /* 27921 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10264 /* 27925 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10265 /* 27929 */ // MIs[1] Operand 1
10266 /* 27929 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10267 /* 27934 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10268 /* 27939 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10269 /* 27943 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10270 /* 27947 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10271 /* 27951 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10272 /* 27953 */ // (select:{ *:[i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$cond)
10273 /* 27953 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
10274 /* 27956 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10275 /* 27958 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10276 /* 27960 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10277 /* 27962 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10278 /* 27966 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10279 /* 27969 */ GIR_RootConstrainSelectedInstOperands,
10280 /* 27970 */ // GIR_Coverage, 663,
10281 /* 27970 */ GIR_EraseRootFromParent_Done,
10282 /* 27971 */ // Label 701: @27971
10283 /* 27971 */ GIM_Try, /*On fail goto*//*Label 702*/ GIMT_Encode4(28038), // Rule ID 665 //
10284 /* 27976 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10285 /* 27980 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10286 /* 27984 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10287 /* 27988 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10288 /* 27992 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10289 /* 27996 */ // MIs[1] Operand 1
10290 /* 27996 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10291 /* 28001 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10292 /* 28006 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10293 /* 28010 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10294 /* 28014 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10295 /* 28018 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10296 /* 28020 */ // (select:{ *:[i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$cond)
10297 /* 28020 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
10298 /* 28023 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10299 /* 28025 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10300 /* 28027 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10301 /* 28029 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10302 /* 28033 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10303 /* 28036 */ GIR_RootConstrainSelectedInstOperands,
10304 /* 28037 */ // GIR_Coverage, 665,
10305 /* 28037 */ GIR_EraseRootFromParent_Done,
10306 /* 28038 */ // Label 702: @28038
10307 /* 28038 */ GIM_Try, /*On fail goto*//*Label 703*/ GIMT_Encode4(28105), // Rule ID 689 //
10308 /* 28043 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
10309 /* 28047 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10310 /* 28051 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10311 /* 28055 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10312 /* 28059 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10313 /* 28063 */ // MIs[1] Operand 1
10314 /* 28063 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10315 /* 28068 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10316 /* 28073 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10317 /* 28077 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
10318 /* 28081 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
10319 /* 28085 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10320 /* 28087 */ // (select:{ *:[f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SELECT_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, I32:{ *:[i32] }:$cond)
10321 /* 28087 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F32),
10322 /* 28090 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10323 /* 28092 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10324 /* 28094 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10325 /* 28096 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10326 /* 28100 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10327 /* 28103 */ GIR_RootConstrainSelectedInstOperands,
10328 /* 28104 */ // GIR_Coverage, 689,
10329 /* 28104 */ GIR_EraseRootFromParent_Done,
10330 /* 28105 */ // Label 703: @28105
10331 /* 28105 */ GIM_Try, /*On fail goto*//*Label 704*/ GIMT_Encode4(28172), // Rule ID 691 //
10332 /* 28110 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
10333 /* 28114 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10334 /* 28118 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10335 /* 28122 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10336 /* 28126 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10337 /* 28130 */ // MIs[1] Operand 1
10338 /* 28130 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10339 /* 28135 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10340 /* 28140 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10341 /* 28144 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
10342 /* 28148 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
10343 /* 28152 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10344 /* 28154 */ // (select:{ *:[f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SELECT_F32:{ *:[f32] } F32:{ *:[f32] }:$rhs, F32:{ *:[f32] }:$lhs, I32:{ *:[i32] }:$cond)
10345 /* 28154 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F32),
10346 /* 28157 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10347 /* 28159 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10348 /* 28161 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10349 /* 28163 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10350 /* 28167 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10351 /* 28170 */ GIR_RootConstrainSelectedInstOperands,
10352 /* 28171 */ // GIR_Coverage, 691,
10353 /* 28171 */ GIR_EraseRootFromParent_Done,
10354 /* 28172 */ // Label 704: @28172
10355 /* 28172 */ GIM_Try, /*On fail goto*//*Label 705*/ GIMT_Encode4(28209), // Rule ID 122 //
10356 /* 28177 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10357 /* 28181 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10358 /* 28185 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10359 /* 28189 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10360 /* 28193 */ // (select:{ *:[i32] } I32:{ *:[i32] }:$cond, I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$cond)
10361 /* 28193 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
10362 /* 28196 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10363 /* 28198 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10364 /* 28200 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10365 /* 28202 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
10366 /* 28204 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10367 /* 28207 */ GIR_RootConstrainSelectedInstOperands,
10368 /* 28208 */ // GIR_Coverage, 122,
10369 /* 28208 */ GIR_EraseRootFromParent_Done,
10370 /* 28209 */ // Label 705: @28209
10371 /* 28209 */ GIM_Try, /*On fail goto*//*Label 706*/ GIMT_Encode4(28246), // Rule ID 164 //
10372 /* 28214 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
10373 /* 28218 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10374 /* 28222 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
10375 /* 28226 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
10376 /* 28230 */ // (select:{ *:[f32] } I32:{ *:[i32] }:$cond, F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SELECT_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, I32:{ *:[i32] }:$cond)
10377 /* 28230 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F32),
10378 /* 28233 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10379 /* 28235 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10380 /* 28237 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10381 /* 28239 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
10382 /* 28241 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10383 /* 28244 */ GIR_RootConstrainSelectedInstOperands,
10384 /* 28245 */ // GIR_Coverage, 164,
10385 /* 28245 */ GIR_EraseRootFromParent_Done,
10386 /* 28246 */ // Label 706: @28246
10387 /* 28246 */ GIM_Reject,
10388 /* 28247 */ // Label 700: @28247
10389 /* 28247 */ GIM_Reject,
10390 /* 28248 */ // Label 694: @28248
10391 /* 28248 */ GIM_Try, /*On fail goto*//*Label 707*/ GIMT_Encode4(28605),
10392 /* 28253 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10393 /* 28256 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
10394 /* 28259 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s64,
10395 /* 28262 */ GIM_Try, /*On fail goto*//*Label 708*/ GIMT_Encode4(28329), // Rule ID 664 //
10396 /* 28267 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10397 /* 28271 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10398 /* 28275 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10399 /* 28279 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10400 /* 28283 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10401 /* 28287 */ // MIs[1] Operand 1
10402 /* 28287 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10403 /* 28292 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10404 /* 28297 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10405 /* 28301 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10406 /* 28305 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10407 /* 28309 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10408 /* 28311 */ // (select:{ *:[i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, I32:{ *:[i32] }:$cond)
10409 /* 28311 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
10410 /* 28314 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10411 /* 28316 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10412 /* 28318 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10413 /* 28320 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10414 /* 28324 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10415 /* 28327 */ GIR_RootConstrainSelectedInstOperands,
10416 /* 28328 */ // GIR_Coverage, 664,
10417 /* 28328 */ GIR_EraseRootFromParent_Done,
10418 /* 28329 */ // Label 708: @28329
10419 /* 28329 */ GIM_Try, /*On fail goto*//*Label 709*/ GIMT_Encode4(28396), // Rule ID 666 //
10420 /* 28334 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10421 /* 28338 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10422 /* 28342 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10423 /* 28346 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10424 /* 28350 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10425 /* 28354 */ // MIs[1] Operand 1
10426 /* 28354 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10427 /* 28359 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10428 /* 28364 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10429 /* 28368 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10430 /* 28372 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10431 /* 28376 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10432 /* 28378 */ // (select:{ *:[i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$rhs, I64:{ *:[i64] }:$lhs, I32:{ *:[i32] }:$cond)
10433 /* 28378 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
10434 /* 28381 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10435 /* 28383 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10436 /* 28385 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10437 /* 28387 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10438 /* 28391 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10439 /* 28394 */ GIR_RootConstrainSelectedInstOperands,
10440 /* 28395 */ // GIR_Coverage, 666,
10441 /* 28395 */ GIR_EraseRootFromParent_Done,
10442 /* 28396 */ // Label 709: @28396
10443 /* 28396 */ GIM_Try, /*On fail goto*//*Label 710*/ GIMT_Encode4(28463), // Rule ID 690 //
10444 /* 28401 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10445 /* 28405 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10446 /* 28409 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10447 /* 28413 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10448 /* 28417 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10449 /* 28421 */ // MIs[1] Operand 1
10450 /* 28421 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10451 /* 28426 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10452 /* 28431 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10453 /* 28435 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10454 /* 28439 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10455 /* 28443 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10456 /* 28445 */ // (select:{ *:[f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SELECT_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, I32:{ *:[i32] }:$cond)
10457 /* 28445 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F64),
10458 /* 28448 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10459 /* 28450 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10460 /* 28452 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10461 /* 28454 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10462 /* 28458 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10463 /* 28461 */ GIR_RootConstrainSelectedInstOperands,
10464 /* 28462 */ // GIR_Coverage, 690,
10465 /* 28462 */ GIR_EraseRootFromParent_Done,
10466 /* 28463 */ // Label 710: @28463
10467 /* 28463 */ GIM_Try, /*On fail goto*//*Label 711*/ GIMT_Encode4(28530), // Rule ID 692 //
10468 /* 28468 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10469 /* 28472 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10470 /* 28476 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10471 /* 28480 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10472 /* 28484 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10473 /* 28488 */ // MIs[1] Operand 1
10474 /* 28488 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10475 /* 28493 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10476 /* 28498 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10477 /* 28502 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10478 /* 28506 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10479 /* 28510 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10480 /* 28512 */ // (select:{ *:[f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SELECT_F64:{ *:[f64] } F64:{ *:[f64] }:$rhs, F64:{ *:[f64] }:$lhs, I32:{ *:[i32] }:$cond)
10481 /* 28512 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F64),
10482 /* 28515 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10483 /* 28517 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10484 /* 28519 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10485 /* 28521 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10486 /* 28525 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10487 /* 28528 */ GIR_RootConstrainSelectedInstOperands,
10488 /* 28529 */ // GIR_Coverage, 692,
10489 /* 28529 */ GIR_EraseRootFromParent_Done,
10490 /* 28530 */ // Label 711: @28530
10491 /* 28530 */ GIM_Try, /*On fail goto*//*Label 712*/ GIMT_Encode4(28567), // Rule ID 123 //
10492 /* 28535 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10493 /* 28539 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10494 /* 28543 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10495 /* 28547 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10496 /* 28551 */ // (select:{ *:[i64] } I32:{ *:[i32] }:$cond, I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, I32:{ *:[i32] }:$cond)
10497 /* 28551 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
10498 /* 28554 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10499 /* 28556 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10500 /* 28558 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10501 /* 28560 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
10502 /* 28562 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10503 /* 28565 */ GIR_RootConstrainSelectedInstOperands,
10504 /* 28566 */ // GIR_Coverage, 123,
10505 /* 28566 */ GIR_EraseRootFromParent_Done,
10506 /* 28567 */ // Label 712: @28567
10507 /* 28567 */ GIM_Try, /*On fail goto*//*Label 713*/ GIMT_Encode4(28604), // Rule ID 165 //
10508 /* 28572 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10509 /* 28576 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10510 /* 28580 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10511 /* 28584 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
10512 /* 28588 */ // (select:{ *:[f64] } I32:{ *:[i32] }:$cond, F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SELECT_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, I32:{ *:[i32] }:$cond)
10513 /* 28588 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F64),
10514 /* 28591 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10515 /* 28593 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10516 /* 28595 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10517 /* 28597 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
10518 /* 28599 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10519 /* 28602 */ GIR_RootConstrainSelectedInstOperands,
10520 /* 28603 */ // GIR_Coverage, 165,
10521 /* 28603 */ GIR_EraseRootFromParent_Done,
10522 /* 28604 */ // Label 713: @28604
10523 /* 28604 */ GIM_Reject,
10524 /* 28605 */ // Label 707: @28605
10525 /* 28605 */ GIM_Reject,
10526 /* 28606 */ // Label 695: @28606
10527 /* 28606 */ GIM_Try, /*On fail goto*//*Label 714*/ GIMT_Encode4(28691), // Rule ID 1086 //
10528 /* 28611 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
10529 /* 28614 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
10530 /* 28617 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
10531 /* 28620 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10532 /* 28624 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10533 /* 28628 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10534 /* 28632 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
10535 /* 28636 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
10536 /* 28640 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
10537 /* 28644 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10538 /* 28649 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10539 /* 28653 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
10540 /* 28659 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
10541 /* 28661 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
10542 /* 28665 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
10543 /* 28671 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
10544 /* 28673 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10545 /* 28675 */ // (vselect:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$x, immAllOnesV:{ *:[v16i8] }), immAllZerosV:{ *:[v16i8] }) => (ANDNOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$c, ?:{ *:[v16i8] }:$x)
10546 /* 28675 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
10547 /* 28678 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10548 /* 28680 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
10549 /* 28682 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // x
10550 /* 28686 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10551 /* 28689 */ GIR_RootConstrainSelectedInstOperands,
10552 /* 28690 */ // GIR_Coverage, 1086,
10553 /* 28690 */ GIR_EraseRootFromParent_Done,
10554 /* 28691 */ // Label 714: @28691
10555 /* 28691 */ GIM_Try, /*On fail goto*//*Label 715*/ GIMT_Encode4(28767), // Rule ID 1097 //
10556 /* 28696 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10557 /* 28699 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
10558 /* 28702 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
10559 /* 28705 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10560 /* 28709 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10561 /* 28713 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10562 /* 28717 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10563 /* 28721 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10564 /* 28725 */ // MIs[1] Operand 1
10565 /* 28725 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10566 /* 28730 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10567 /* 28735 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10568 /* 28739 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10569 /* 28743 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10570 /* 28747 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10571 /* 28749 */ // (select:{ *:[v16i8] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SELECT_V128:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs, ?:{ *:[i32] }:$cond)
10572 /* 28749 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10573 /* 28752 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10574 /* 28754 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10575 /* 28756 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10576 /* 28758 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10577 /* 28762 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10578 /* 28765 */ GIR_RootConstrainSelectedInstOperands,
10579 /* 28766 */ // GIR_Coverage, 1097,
10580 /* 28766 */ GIR_EraseRootFromParent_Done,
10581 /* 28767 */ // Label 715: @28767
10582 /* 28767 */ GIM_Try, /*On fail goto*//*Label 716*/ GIMT_Encode4(28843), // Rule ID 1098 //
10583 /* 28772 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10584 /* 28775 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
10585 /* 28778 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
10586 /* 28781 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10587 /* 28785 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10588 /* 28789 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10589 /* 28793 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10590 /* 28797 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10591 /* 28801 */ // MIs[1] Operand 1
10592 /* 28801 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10593 /* 28806 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10594 /* 28811 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10595 /* 28815 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10596 /* 28819 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10597 /* 28823 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10598 /* 28825 */ // (select:{ *:[v16i8] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SELECT_V128:{ *:[v16i8] } ?:{ *:[v16i8] }:$rhs, ?:{ *:[v16i8] }:$lhs, ?:{ *:[i32] }:$cond)
10599 /* 28825 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10600 /* 28828 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10601 /* 28830 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10602 /* 28832 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10603 /* 28834 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10604 /* 28838 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10605 /* 28841 */ GIR_RootConstrainSelectedInstOperands,
10606 /* 28842 */ // GIR_Coverage, 1098,
10607 /* 28842 */ GIR_EraseRootFromParent_Done,
10608 /* 28843 */ // Label 716: @28843
10609 /* 28843 */ GIM_Try, /*On fail goto*//*Label 717*/ GIMT_Encode4(28889), // Rule ID 1090 //
10610 /* 28848 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
10611 /* 28851 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
10612 /* 28854 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
10613 /* 28857 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10614 /* 28861 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10615 /* 28865 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10616 /* 28869 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10617 /* 28873 */ // (vselect:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
10618 /* 28873 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
10619 /* 28876 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10620 /* 28878 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
10621 /* 28880 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
10622 /* 28882 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
10623 /* 28884 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10624 /* 28887 */ GIR_RootConstrainSelectedInstOperands,
10625 /* 28888 */ // GIR_Coverage, 1090,
10626 /* 28888 */ GIR_EraseRootFromParent_Done,
10627 /* 28889 */ // Label 717: @28889
10628 /* 28889 */ GIM_Try, /*On fail goto*//*Label 718*/ GIMT_Encode4(28935), // Rule ID 1096 //
10629 /* 28894 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10630 /* 28897 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
10631 /* 28900 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16s8,
10632 /* 28903 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10633 /* 28907 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10634 /* 28911 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10635 /* 28915 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10636 /* 28919 */ // (select:{ *:[v16i8] } I32:{ *:[i32] }:$cond, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SELECT_V128:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs, ?:{ *:[i32] }:$cond)
10637 /* 28919 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10638 /* 28922 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10639 /* 28924 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10640 /* 28926 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10641 /* 28928 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
10642 /* 28930 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10643 /* 28933 */ GIR_RootConstrainSelectedInstOperands,
10644 /* 28934 */ // GIR_Coverage, 1096,
10645 /* 28934 */ GIR_EraseRootFromParent_Done,
10646 /* 28935 */ // Label 718: @28935
10647 /* 28935 */ GIM_Reject,
10648 /* 28936 */ // Label 696: @28936
10649 /* 28936 */ GIM_Try, /*On fail goto*//*Label 719*/ GIMT_Encode4(29021), // Rule ID 1087 //
10650 /* 28941 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
10651 /* 28944 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
10652 /* 28947 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
10653 /* 28950 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10654 /* 28954 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10655 /* 28958 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10656 /* 28962 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
10657 /* 28966 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
10658 /* 28970 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
10659 /* 28974 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10660 /* 28979 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10661 /* 28983 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
10662 /* 28989 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
10663 /* 28991 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
10664 /* 28995 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
10665 /* 29001 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
10666 /* 29003 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10667 /* 29005 */ // (vselect:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$x, immAllOnesV:{ *:[v8i16] }), immAllZerosV:{ *:[v8i16] }) => (ANDNOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$c, ?:{ *:[v8i16] }:$x)
10668 /* 29005 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
10669 /* 29008 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10670 /* 29010 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
10671 /* 29012 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // x
10672 /* 29016 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10673 /* 29019 */ GIR_RootConstrainSelectedInstOperands,
10674 /* 29020 */ // GIR_Coverage, 1087,
10675 /* 29020 */ GIR_EraseRootFromParent_Done,
10676 /* 29021 */ // Label 719: @29021
10677 /* 29021 */ GIM_Try, /*On fail goto*//*Label 720*/ GIMT_Encode4(29118), // Rule ID 1189 //
10678 /* 29026 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
10679 /* 29029 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10680 /* 29033 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10681 /* 29037 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10682 /* 29041 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
10683 /* 29045 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
10684 /* 29049 */ // MIs[1] Operand 1
10685 /* 29049 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10686 /* 29054 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10687 /* 29058 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
10688 /* 29062 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
10689 /* 29066 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10690 /* 29071 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
10691 /* 29075 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
10692 /* 29079 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
10693 /* 29083 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10694 /* 29088 */ // MIs[0] rhs
10695 /* 29088 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
10696 /* 29093 */ // MIs[0] lhs
10697 /* 29093 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
10698 /* 29098 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10699 /* 29100 */ // (vselect:{ *:[v8i16] } (setcc:{ *:[v8i16] } (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$rhs), (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v8i16] }:$rhs, V128:{ *:[v8i16] }:$lhs) => (PMIN_F16x8:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
10700 /* 29100 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
10701 /* 29103 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10702 /* 29105 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
10703 /* 29109 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
10704 /* 29113 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10705 /* 29116 */ GIR_RootConstrainSelectedInstOperands,
10706 /* 29117 */ // GIR_Coverage, 1189,
10707 /* 29117 */ GIR_EraseRootFromParent_Done,
10708 /* 29118 */ // Label 720: @29118
10709 /* 29118 */ GIM_Try, /*On fail goto*//*Label 721*/ GIMT_Encode4(29215), // Rule ID 1190 //
10710 /* 29123 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
10711 /* 29126 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10712 /* 29130 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10713 /* 29134 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10714 /* 29138 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
10715 /* 29142 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
10716 /* 29146 */ // MIs[1] Operand 1
10717 /* 29146 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10718 /* 29151 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10719 /* 29155 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
10720 /* 29159 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
10721 /* 29163 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10722 /* 29168 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
10723 /* 29172 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
10724 /* 29176 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
10725 /* 29180 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10726 /* 29185 */ // MIs[0] rhs
10727 /* 29185 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
10728 /* 29190 */ // MIs[0] lhs
10729 /* 29190 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
10730 /* 29195 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
10731 /* 29197 */ // (vselect:{ *:[v8i16] } (setcc:{ *:[v8i16] } (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$lhs), (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v8i16] }:$rhs, V128:{ *:[v8i16] }:$lhs) => (PMAX_F16x8:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
10732 /* 29197 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
10733 /* 29200 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10734 /* 29202 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
10735 /* 29206 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
10736 /* 29210 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10737 /* 29213 */ GIR_RootConstrainSelectedInstOperands,
10738 /* 29214 */ // GIR_Coverage, 1190,
10739 /* 29214 */ GIR_EraseRootFromParent_Done,
10740 /* 29215 */ // Label 721: @29215
10741 /* 29215 */ GIM_Try, /*On fail goto*//*Label 722*/ GIMT_Encode4(29291), // Rule ID 1100 //
10742 /* 29220 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10743 /* 29223 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
10744 /* 29226 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
10745 /* 29229 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10746 /* 29233 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10747 /* 29237 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10748 /* 29241 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10749 /* 29245 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10750 /* 29249 */ // MIs[1] Operand 1
10751 /* 29249 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10752 /* 29254 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10753 /* 29259 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10754 /* 29263 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10755 /* 29267 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10756 /* 29271 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10757 /* 29273 */ // (select:{ *:[v8i16] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SELECT_V128:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs, ?:{ *:[i32] }:$cond)
10758 /* 29273 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10759 /* 29276 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10760 /* 29278 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10761 /* 29280 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10762 /* 29282 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10763 /* 29286 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10764 /* 29289 */ GIR_RootConstrainSelectedInstOperands,
10765 /* 29290 */ // GIR_Coverage, 1100,
10766 /* 29290 */ GIR_EraseRootFromParent_Done,
10767 /* 29291 */ // Label 722: @29291
10768 /* 29291 */ GIM_Try, /*On fail goto*//*Label 723*/ GIMT_Encode4(29367), // Rule ID 1101 //
10769 /* 29296 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
10770 /* 29299 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
10771 /* 29302 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
10772 /* 29305 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10773 /* 29309 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10774 /* 29313 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
10775 /* 29317 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
10776 /* 29321 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
10777 /* 29325 */ // MIs[1] Operand 1
10778 /* 29325 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10779 /* 29330 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10780 /* 29335 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
10781 /* 29339 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10782 /* 29343 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10783 /* 29347 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10784 /* 29349 */ // (select:{ *:[v8i16] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SELECT_V128:{ *:[v8i16] } ?:{ *:[v8i16] }:$rhs, ?:{ *:[v8i16] }:$lhs, ?:{ *:[i32] }:$cond)
10785 /* 29349 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
10786 /* 29352 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10787 /* 29354 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10788 /* 29356 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10789 /* 29358 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
10790 /* 29362 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10791 /* 29365 */ GIR_RootConstrainSelectedInstOperands,
10792 /* 29366 */ // GIR_Coverage, 1101,
10793 /* 29366 */ GIR_EraseRootFromParent_Done,
10794 /* 29367 */ // Label 723: @29367
10795 /* 29367 */ GIM_Try, /*On fail goto*//*Label 724*/ GIMT_Encode4(29443), // Rule ID 379 //
10796 /* 29372 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
10797 /* 29375 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
10798 /* 29378 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10799 /* 29382 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10800 /* 29386 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10801 /* 29390 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
10802 /* 29394 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
10803 /* 29398 */ // MIs[1] Operand 1
10804 /* 29398 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10805 /* 29403 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10806 /* 29408 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10807 /* 29413 */ // MIs[0] rhs
10808 /* 29413 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
10809 /* 29418 */ // MIs[0] lhs
10810 /* 29418 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
10811 /* 29423 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10812 /* 29425 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs, SETOLT:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
10813 /* 29425 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
10814 /* 29428 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10815 /* 29430 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
10816 /* 29434 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
10817 /* 29438 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10818 /* 29441 */ GIR_RootConstrainSelectedInstOperands,
10819 /* 29442 */ // GIR_Coverage, 379,
10820 /* 29442 */ GIR_EraseRootFromParent_Done,
10821 /* 29443 */ // Label 724: @29443
10822 /* 29443 */ GIM_Try, /*On fail goto*//*Label 725*/ GIMT_Encode4(29519), // Rule ID 380 //
10823 /* 29448 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
10824 /* 29451 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
10825 /* 29454 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10826 /* 29458 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10827 /* 29462 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10828 /* 29466 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
10829 /* 29470 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
10830 /* 29474 */ // MIs[1] Operand 1
10831 /* 29474 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
10832 /* 29479 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10833 /* 29484 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10834 /* 29489 */ // MIs[0] rhs
10835 /* 29489 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
10836 /* 29494 */ // MIs[0] lhs
10837 /* 29494 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
10838 /* 29499 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10839 /* 29501 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs, SETOLE:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
10840 /* 29501 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
10841 /* 29504 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10842 /* 29506 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
10843 /* 29510 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
10844 /* 29514 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10845 /* 29517 */ GIR_RootConstrainSelectedInstOperands,
10846 /* 29518 */ // GIR_Coverage, 380,
10847 /* 29518 */ GIR_EraseRootFromParent_Done,
10848 /* 29519 */ // Label 725: @29519
10849 /* 29519 */ GIM_Try, /*On fail goto*//*Label 726*/ GIMT_Encode4(29595), // Rule ID 381 //
10850 /* 29524 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
10851 /* 29527 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
10852 /* 29530 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10853 /* 29534 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10854 /* 29538 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10855 /* 29542 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
10856 /* 29546 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
10857 /* 29550 */ // MIs[1] Operand 1
10858 /* 29550 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
10859 /* 29555 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10860 /* 29560 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10861 /* 29565 */ // MIs[0] rhs
10862 /* 29565 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
10863 /* 29570 */ // MIs[0] lhs
10864 /* 29570 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
10865 /* 29575 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10866 /* 29577 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOGT:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
10867 /* 29577 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
10868 /* 29580 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10869 /* 29582 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
10870 /* 29586 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
10871 /* 29590 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10872 /* 29593 */ GIR_RootConstrainSelectedInstOperands,
10873 /* 29594 */ // GIR_Coverage, 381,
10874 /* 29594 */ GIR_EraseRootFromParent_Done,
10875 /* 29595 */ // Label 726: @29595
10876 /* 29595 */ GIM_Try, /*On fail goto*//*Label 727*/ GIMT_Encode4(29671), // Rule ID 382 //
10877 /* 29600 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
10878 /* 29603 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
10879 /* 29606 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10880 /* 29610 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10881 /* 29614 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10882 /* 29618 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
10883 /* 29622 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
10884 /* 29626 */ // MIs[1] Operand 1
10885 /* 29626 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
10886 /* 29631 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10887 /* 29636 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10888 /* 29641 */ // MIs[0] rhs
10889 /* 29641 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
10890 /* 29646 */ // MIs[0] lhs
10891 /* 29646 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
10892 /* 29651 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10893 /* 29653 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOGE:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
10894 /* 29653 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
10895 /* 29656 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10896 /* 29658 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
10897 /* 29662 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
10898 /* 29666 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10899 /* 29669 */ GIR_RootConstrainSelectedInstOperands,
10900 /* 29670 */ // GIR_Coverage, 382,
10901 /* 29670 */ GIR_EraseRootFromParent_Done,
10902 /* 29671 */ // Label 727: @29671
10903 /* 29671 */ GIM_Try, /*On fail goto*//*Label 728*/ GIMT_Encode4(29747), // Rule ID 403 //
10904 /* 29676 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
10905 /* 29679 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
10906 /* 29682 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10907 /* 29686 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10908 /* 29690 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10909 /* 29694 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
10910 /* 29698 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
10911 /* 29702 */ // MIs[1] Operand 1
10912 /* 29702 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
10913 /* 29707 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10914 /* 29712 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10915 /* 29717 */ // MIs[0] rhs
10916 /* 29717 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
10917 /* 29722 */ // MIs[0] lhs
10918 /* 29722 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
10919 /* 29727 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10920 /* 29729 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs, SETOGT:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
10921 /* 29729 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
10922 /* 29732 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10923 /* 29734 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
10924 /* 29738 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
10925 /* 29742 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10926 /* 29745 */ GIR_RootConstrainSelectedInstOperands,
10927 /* 29746 */ // GIR_Coverage, 403,
10928 /* 29746 */ GIR_EraseRootFromParent_Done,
10929 /* 29747 */ // Label 728: @29747
10930 /* 29747 */ GIM_Try, /*On fail goto*//*Label 729*/ GIMT_Encode4(29823), // Rule ID 404 //
10931 /* 29752 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
10932 /* 29755 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
10933 /* 29758 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10934 /* 29762 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10935 /* 29766 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10936 /* 29770 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
10937 /* 29774 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
10938 /* 29778 */ // MIs[1] Operand 1
10939 /* 29778 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
10940 /* 29783 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10941 /* 29788 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10942 /* 29793 */ // MIs[0] rhs
10943 /* 29793 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
10944 /* 29798 */ // MIs[0] lhs
10945 /* 29798 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
10946 /* 29803 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10947 /* 29805 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs, SETOGE:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
10948 /* 29805 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
10949 /* 29808 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10950 /* 29810 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
10951 /* 29814 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
10952 /* 29818 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10953 /* 29821 */ GIR_RootConstrainSelectedInstOperands,
10954 /* 29822 */ // GIR_Coverage, 404,
10955 /* 29822 */ GIR_EraseRootFromParent_Done,
10956 /* 29823 */ // Label 729: @29823
10957 /* 29823 */ GIM_Try, /*On fail goto*//*Label 730*/ GIMT_Encode4(29899), // Rule ID 405 //
10958 /* 29828 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
10959 /* 29831 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
10960 /* 29834 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10961 /* 29838 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10962 /* 29842 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10963 /* 29846 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
10964 /* 29850 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
10965 /* 29854 */ // MIs[1] Operand 1
10966 /* 29854 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
10967 /* 29859 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10968 /* 29864 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10969 /* 29869 */ // MIs[0] rhs
10970 /* 29869 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
10971 /* 29874 */ // MIs[0] lhs
10972 /* 29874 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
10973 /* 29879 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10974 /* 29881 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOLT:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
10975 /* 29881 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
10976 /* 29884 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10977 /* 29886 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
10978 /* 29890 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
10979 /* 29894 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10980 /* 29897 */ GIR_RootConstrainSelectedInstOperands,
10981 /* 29898 */ // GIR_Coverage, 405,
10982 /* 29898 */ GIR_EraseRootFromParent_Done,
10983 /* 29899 */ // Label 730: @29899
10984 /* 29899 */ GIM_Try, /*On fail goto*//*Label 731*/ GIMT_Encode4(29975), // Rule ID 406 //
10985 /* 29904 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
10986 /* 29907 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
10987 /* 29910 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10988 /* 29914 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10989 /* 29918 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
10990 /* 29922 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
10991 /* 29926 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
10992 /* 29930 */ // MIs[1] Operand 1
10993 /* 29930 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
10994 /* 29935 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10995 /* 29940 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10996 /* 29945 */ // MIs[0] rhs
10997 /* 29945 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
10998 /* 29950 */ // MIs[0] lhs
10999 /* 29950 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11000 /* 29955 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11001 /* 29957 */ // (vselect:{ *:[v8f16] } (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOLE:{ *:[Other] }), V128:{ *:[v8f16] }:$rhs, V128:{ *:[v8f16] }:$lhs) => (PMAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
11002 /* 29957 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
11003 /* 29960 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11004 /* 29962 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11005 /* 29966 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11006 /* 29970 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11007 /* 29973 */ GIR_RootConstrainSelectedInstOperands,
11008 /* 29974 */ // GIR_Coverage, 406,
11009 /* 29974 */ GIR_EraseRootFromParent_Done,
11010 /* 29975 */ // Label 731: @29975
11011 /* 29975 */ GIM_Try, /*On fail goto*//*Label 732*/ GIMT_Encode4(30021), // Rule ID 1091 //
11012 /* 29980 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
11013 /* 29983 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11014 /* 29986 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
11015 /* 29989 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11016 /* 29993 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11017 /* 29997 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11018 /* 30001 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11019 /* 30005 */ // (vselect:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
11020 /* 30005 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
11021 /* 30008 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11022 /* 30010 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
11023 /* 30012 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
11024 /* 30014 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
11025 /* 30016 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11026 /* 30019 */ GIR_RootConstrainSelectedInstOperands,
11027 /* 30020 */ // GIR_Coverage, 1091,
11028 /* 30020 */ GIR_EraseRootFromParent_Done,
11029 /* 30021 */ // Label 732: @30021
11030 /* 30021 */ GIM_Try, /*On fail goto*//*Label 733*/ GIMT_Encode4(30067), // Rule ID 1099 //
11031 /* 30026 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11032 /* 30029 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
11033 /* 30032 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
11034 /* 30035 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11035 /* 30039 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11036 /* 30043 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11037 /* 30047 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11038 /* 30051 */ // (select:{ *:[v8i16] } I32:{ *:[i32] }:$cond, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SELECT_V128:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs, ?:{ *:[i32] }:$cond)
11039 /* 30051 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11040 /* 30054 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11041 /* 30056 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11042 /* 30058 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11043 /* 30060 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
11044 /* 30062 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11045 /* 30065 */ GIR_RootConstrainSelectedInstOperands,
11046 /* 30066 */ // GIR_Coverage, 1099,
11047 /* 30066 */ GIR_EraseRootFromParent_Done,
11048 /* 30067 */ // Label 733: @30067
11049 /* 30067 */ GIM_Reject,
11050 /* 30068 */ // Label 697: @30068
11051 /* 30068 */ GIM_Try, /*On fail goto*//*Label 734*/ GIMT_Encode4(30153), // Rule ID 1088 //
11052 /* 30073 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11053 /* 30076 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11054 /* 30079 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11055 /* 30082 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11056 /* 30086 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11057 /* 30090 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
11058 /* 30094 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
11059 /* 30098 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
11060 /* 30102 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
11061 /* 30106 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11062 /* 30111 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
11063 /* 30115 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
11064 /* 30121 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
11065 /* 30123 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
11066 /* 30127 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
11067 /* 30133 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
11068 /* 30135 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
11069 /* 30137 */ // (vselect:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$x, immAllOnesV:{ *:[v4i32] }), immAllZerosV:{ *:[v4i32] }) => (ANDNOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$c, ?:{ *:[v4i32] }:$x)
11070 /* 30137 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
11071 /* 30140 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11072 /* 30142 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
11073 /* 30144 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // x
11074 /* 30148 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11075 /* 30151 */ GIR_RootConstrainSelectedInstOperands,
11076 /* 30152 */ // GIR_Coverage, 1088,
11077 /* 30152 */ GIR_EraseRootFromParent_Done,
11078 /* 30153 */ // Label 734: @30153
11079 /* 30153 */ GIM_Try, /*On fail goto*//*Label 735*/ GIMT_Encode4(30253), // Rule ID 1301 //
11080 /* 30158 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
11081 /* 30161 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11082 /* 30164 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11083 /* 30168 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11084 /* 30172 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11085 /* 30176 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
11086 /* 30180 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
11087 /* 30184 */ // MIs[1] Operand 1
11088 /* 30184 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11089 /* 30189 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
11090 /* 30193 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
11091 /* 30197 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
11092 /* 30201 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11093 /* 30206 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
11094 /* 30210 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
11095 /* 30214 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
11096 /* 30218 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11097 /* 30223 */ // MIs[0] rhs
11098 /* 30223 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
11099 /* 30228 */ // MIs[0] lhs
11100 /* 30228 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
11101 /* 30233 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
11102 /* 30235 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (SIMD_RELAXED_FMIN_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
11103 /* 30235 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F32x4),
11104 /* 30238 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11105 /* 30240 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
11106 /* 30244 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
11107 /* 30248 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11108 /* 30251 */ GIR_RootConstrainSelectedInstOperands,
11109 /* 30252 */ // GIR_Coverage, 1301,
11110 /* 30252 */ GIR_EraseRootFromParent_Done,
11111 /* 30253 */ // Label 735: @30253
11112 /* 30253 */ GIM_Try, /*On fail goto*//*Label 736*/ GIMT_Encode4(30353), // Rule ID 1302 //
11113 /* 30258 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
11114 /* 30261 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11115 /* 30264 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11116 /* 30268 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11117 /* 30272 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11118 /* 30276 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
11119 /* 30280 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
11120 /* 30284 */ // MIs[1] Operand 1
11121 /* 30284 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11122 /* 30289 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
11123 /* 30293 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
11124 /* 30297 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
11125 /* 30301 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11126 /* 30306 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
11127 /* 30310 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
11128 /* 30314 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
11129 /* 30318 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11130 /* 30323 */ // MIs[0] rhs
11131 /* 30323 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
11132 /* 30328 */ // MIs[0] lhs
11133 /* 30328 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
11134 /* 30333 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
11135 /* 30335 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (SIMD_RELAXED_FMAX_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
11136 /* 30335 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F32x4),
11137 /* 30338 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11138 /* 30340 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
11139 /* 30344 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
11140 /* 30348 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11141 /* 30351 */ GIR_RootConstrainSelectedInstOperands,
11142 /* 30352 */ // GIR_Coverage, 1302,
11143 /* 30352 */ GIR_EraseRootFromParent_Done,
11144 /* 30353 */ // Label 736: @30353
11145 /* 30353 */ GIM_Try, /*On fail goto*//*Label 737*/ GIMT_Encode4(30450), // Rule ID 1185 //
11146 /* 30358 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11147 /* 30361 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11148 /* 30365 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11149 /* 30369 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11150 /* 30373 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
11151 /* 30377 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
11152 /* 30381 */ // MIs[1] Operand 1
11153 /* 30381 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11154 /* 30386 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
11155 /* 30390 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
11156 /* 30394 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
11157 /* 30398 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11158 /* 30403 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
11159 /* 30407 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
11160 /* 30411 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
11161 /* 30415 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11162 /* 30420 */ // MIs[0] rhs
11163 /* 30420 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
11164 /* 30425 */ // MIs[0] lhs
11165 /* 30425 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
11166 /* 30430 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
11167 /* 30432 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (PMIN_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
11168 /* 30432 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
11169 /* 30435 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11170 /* 30437 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
11171 /* 30441 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
11172 /* 30445 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11173 /* 30448 */ GIR_RootConstrainSelectedInstOperands,
11174 /* 30449 */ // GIR_Coverage, 1185,
11175 /* 30449 */ GIR_EraseRootFromParent_Done,
11176 /* 30450 */ // Label 737: @30450
11177 /* 30450 */ GIM_Try, /*On fail goto*//*Label 738*/ GIMT_Encode4(30547), // Rule ID 1186 //
11178 /* 30455 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11179 /* 30458 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11180 /* 30462 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11181 /* 30466 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11182 /* 30470 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
11183 /* 30474 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
11184 /* 30478 */ // MIs[1] Operand 1
11185 /* 30478 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11186 /* 30483 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
11187 /* 30487 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
11188 /* 30491 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
11189 /* 30495 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11190 /* 30500 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
11191 /* 30504 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
11192 /* 30508 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
11193 /* 30512 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11194 /* 30517 */ // MIs[0] rhs
11195 /* 30517 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
11196 /* 30522 */ // MIs[0] lhs
11197 /* 30522 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
11198 /* 30527 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
11199 /* 30529 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (PMAX_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
11200 /* 30529 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
11201 /* 30532 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11202 /* 30534 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
11203 /* 30538 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
11204 /* 30542 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11205 /* 30545 */ GIR_RootConstrainSelectedInstOperands,
11206 /* 30546 */ // GIR_Coverage, 1186,
11207 /* 30546 */ GIR_EraseRootFromParent_Done,
11208 /* 30547 */ // Label 738: @30547
11209 /* 30547 */ GIM_Try, /*On fail goto*//*Label 739*/ GIMT_Encode4(30623), // Rule ID 1103 //
11210 /* 30552 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11211 /* 30555 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11212 /* 30558 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11213 /* 30561 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11214 /* 30565 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11215 /* 30569 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
11216 /* 30573 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
11217 /* 30577 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
11218 /* 30581 */ // MIs[1] Operand 1
11219 /* 30581 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11220 /* 30586 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11221 /* 30591 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
11222 /* 30595 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11223 /* 30599 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11224 /* 30603 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11225 /* 30605 */ // (select:{ *:[v4i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SELECT_V128:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs, ?:{ *:[i32] }:$cond)
11226 /* 30605 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11227 /* 30608 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11228 /* 30610 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11229 /* 30612 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11230 /* 30614 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
11231 /* 30618 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11232 /* 30621 */ GIR_RootConstrainSelectedInstOperands,
11233 /* 30622 */ // GIR_Coverage, 1103,
11234 /* 30622 */ GIR_EraseRootFromParent_Done,
11235 /* 30623 */ // Label 739: @30623
11236 /* 30623 */ GIM_Try, /*On fail goto*//*Label 740*/ GIMT_Encode4(30699), // Rule ID 1104 //
11237 /* 30628 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11238 /* 30631 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11239 /* 30634 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11240 /* 30637 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11241 /* 30641 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11242 /* 30645 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
11243 /* 30649 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
11244 /* 30653 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
11245 /* 30657 */ // MIs[1] Operand 1
11246 /* 30657 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11247 /* 30662 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11248 /* 30667 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
11249 /* 30671 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11250 /* 30675 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11251 /* 30679 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11252 /* 30681 */ // (select:{ *:[v4i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SELECT_V128:{ *:[v4i32] } ?:{ *:[v4i32] }:$rhs, ?:{ *:[v4i32] }:$lhs, ?:{ *:[i32] }:$cond)
11253 /* 30681 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11254 /* 30684 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11255 /* 30686 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11256 /* 30688 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11257 /* 30690 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
11258 /* 30694 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11259 /* 30697 */ GIR_RootConstrainSelectedInstOperands,
11260 /* 30698 */ // GIR_Coverage, 1104,
11261 /* 30698 */ GIR_EraseRootFromParent_Done,
11262 /* 30699 */ // Label 740: @30699
11263 /* 30699 */ GIM_Try, /*On fail goto*//*Label 741*/ GIMT_Encode4(30775), // Rule ID 1109 //
11264 /* 30704 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11265 /* 30707 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11266 /* 30710 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11267 /* 30713 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11268 /* 30717 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11269 /* 30721 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
11270 /* 30725 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
11271 /* 30729 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
11272 /* 30733 */ // MIs[1] Operand 1
11273 /* 30733 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11274 /* 30738 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11275 /* 30743 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
11276 /* 30747 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11277 /* 30751 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11278 /* 30755 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11279 /* 30757 */ // (select:{ *:[v4f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SELECT_V128:{ *:[v4f32] } ?:{ *:[v4f32] }:$lhs, ?:{ *:[v4f32] }:$rhs, ?:{ *:[i32] }:$cond)
11280 /* 30757 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11281 /* 30760 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11282 /* 30762 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11283 /* 30764 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11284 /* 30766 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
11285 /* 30770 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11286 /* 30773 */ GIR_RootConstrainSelectedInstOperands,
11287 /* 30774 */ // GIR_Coverage, 1109,
11288 /* 30774 */ GIR_EraseRootFromParent_Done,
11289 /* 30775 */ // Label 741: @30775
11290 /* 30775 */ GIM_Try, /*On fail goto*//*Label 742*/ GIMT_Encode4(30851), // Rule ID 1110 //
11291 /* 30780 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11292 /* 30783 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11293 /* 30786 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11294 /* 30789 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11295 /* 30793 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11296 /* 30797 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
11297 /* 30801 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
11298 /* 30805 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
11299 /* 30809 */ // MIs[1] Operand 1
11300 /* 30809 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11301 /* 30814 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11302 /* 30819 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
11303 /* 30823 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11304 /* 30827 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11305 /* 30831 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11306 /* 30833 */ // (select:{ *:[v4f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SELECT_V128:{ *:[v4f32] } ?:{ *:[v4f32] }:$rhs, ?:{ *:[v4f32] }:$lhs, ?:{ *:[i32] }:$cond)
11307 /* 30833 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11308 /* 30836 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11309 /* 30838 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11310 /* 30840 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11311 /* 30842 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
11312 /* 30846 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11313 /* 30849 */ GIR_RootConstrainSelectedInstOperands,
11314 /* 30850 */ // GIR_Coverage, 1110,
11315 /* 30850 */ GIR_EraseRootFromParent_Done,
11316 /* 30851 */ // Label 742: @30851
11317 /* 30851 */ GIM_Try, /*On fail goto*//*Label 743*/ GIMT_Encode4(30927), // Rule ID 363 //
11318 /* 30856 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11319 /* 30859 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11320 /* 30862 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11321 /* 30866 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11322 /* 30870 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11323 /* 30874 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
11324 /* 30878 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
11325 /* 30882 */ // MIs[1] Operand 1
11326 /* 30882 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11327 /* 30887 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11328 /* 30892 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11329 /* 30897 */ // MIs[0] rhs
11330 /* 30897 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11331 /* 30902 */ // MIs[0] lhs
11332 /* 30902 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11333 /* 30907 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11334 /* 30909 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs, SETOLT:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11335 /* 30909 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
11336 /* 30912 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11337 /* 30914 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11338 /* 30918 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11339 /* 30922 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11340 /* 30925 */ GIR_RootConstrainSelectedInstOperands,
11341 /* 30926 */ // GIR_Coverage, 363,
11342 /* 30926 */ GIR_EraseRootFromParent_Done,
11343 /* 30927 */ // Label 743: @30927
11344 /* 30927 */ GIM_Try, /*On fail goto*//*Label 744*/ GIMT_Encode4(31003), // Rule ID 364 //
11345 /* 30932 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11346 /* 30935 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11347 /* 30938 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11348 /* 30942 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11349 /* 30946 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11350 /* 30950 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
11351 /* 30954 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
11352 /* 30958 */ // MIs[1] Operand 1
11353 /* 30958 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
11354 /* 30963 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11355 /* 30968 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11356 /* 30973 */ // MIs[0] rhs
11357 /* 30973 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11358 /* 30978 */ // MIs[0] lhs
11359 /* 30978 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11360 /* 30983 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11361 /* 30985 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs, SETOLE:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11362 /* 30985 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
11363 /* 30988 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11364 /* 30990 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11365 /* 30994 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11366 /* 30998 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11367 /* 31001 */ GIR_RootConstrainSelectedInstOperands,
11368 /* 31002 */ // GIR_Coverage, 364,
11369 /* 31002 */ GIR_EraseRootFromParent_Done,
11370 /* 31003 */ // Label 744: @31003
11371 /* 31003 */ GIM_Try, /*On fail goto*//*Label 745*/ GIMT_Encode4(31079), // Rule ID 365 //
11372 /* 31008 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11373 /* 31011 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11374 /* 31014 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11375 /* 31018 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11376 /* 31022 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11377 /* 31026 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
11378 /* 31030 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
11379 /* 31034 */ // MIs[1] Operand 1
11380 /* 31034 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
11381 /* 31039 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11382 /* 31044 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11383 /* 31049 */ // MIs[0] rhs
11384 /* 31049 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11385 /* 31054 */ // MIs[0] lhs
11386 /* 31054 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11387 /* 31059 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11388 /* 31061 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOGT:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11389 /* 31061 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
11390 /* 31064 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11391 /* 31066 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11392 /* 31070 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11393 /* 31074 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11394 /* 31077 */ GIR_RootConstrainSelectedInstOperands,
11395 /* 31078 */ // GIR_Coverage, 365,
11396 /* 31078 */ GIR_EraseRootFromParent_Done,
11397 /* 31079 */ // Label 745: @31079
11398 /* 31079 */ GIM_Try, /*On fail goto*//*Label 746*/ GIMT_Encode4(31155), // Rule ID 366 //
11399 /* 31084 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11400 /* 31087 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11401 /* 31090 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11402 /* 31094 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11403 /* 31098 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11404 /* 31102 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
11405 /* 31106 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
11406 /* 31110 */ // MIs[1] Operand 1
11407 /* 31110 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
11408 /* 31115 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11409 /* 31120 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11410 /* 31125 */ // MIs[0] rhs
11411 /* 31125 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11412 /* 31130 */ // MIs[0] lhs
11413 /* 31130 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11414 /* 31135 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11415 /* 31137 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOGE:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11416 /* 31137 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
11417 /* 31140 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11418 /* 31142 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11419 /* 31146 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11420 /* 31150 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11421 /* 31153 */ GIR_RootConstrainSelectedInstOperands,
11422 /* 31154 */ // GIR_Coverage, 366,
11423 /* 31154 */ GIR_EraseRootFromParent_Done,
11424 /* 31155 */ // Label 746: @31155
11425 /* 31155 */ GIM_Try, /*On fail goto*//*Label 747*/ GIMT_Encode4(31231), // Rule ID 387 //
11426 /* 31160 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11427 /* 31163 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11428 /* 31166 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11429 /* 31170 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11430 /* 31174 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11431 /* 31178 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
11432 /* 31182 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
11433 /* 31186 */ // MIs[1] Operand 1
11434 /* 31186 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
11435 /* 31191 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11436 /* 31196 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11437 /* 31201 */ // MIs[0] rhs
11438 /* 31201 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11439 /* 31206 */ // MIs[0] lhs
11440 /* 31206 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11441 /* 31211 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11442 /* 31213 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs, SETOGT:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11443 /* 31213 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
11444 /* 31216 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11445 /* 31218 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11446 /* 31222 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11447 /* 31226 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11448 /* 31229 */ GIR_RootConstrainSelectedInstOperands,
11449 /* 31230 */ // GIR_Coverage, 387,
11450 /* 31230 */ GIR_EraseRootFromParent_Done,
11451 /* 31231 */ // Label 747: @31231
11452 /* 31231 */ GIM_Try, /*On fail goto*//*Label 748*/ GIMT_Encode4(31307), // Rule ID 388 //
11453 /* 31236 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11454 /* 31239 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11455 /* 31242 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11456 /* 31246 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11457 /* 31250 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11458 /* 31254 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
11459 /* 31258 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
11460 /* 31262 */ // MIs[1] Operand 1
11461 /* 31262 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
11462 /* 31267 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11463 /* 31272 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11464 /* 31277 */ // MIs[0] rhs
11465 /* 31277 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11466 /* 31282 */ // MIs[0] lhs
11467 /* 31282 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11468 /* 31287 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11469 /* 31289 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs, SETOGE:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11470 /* 31289 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
11471 /* 31292 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11472 /* 31294 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11473 /* 31298 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11474 /* 31302 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11475 /* 31305 */ GIR_RootConstrainSelectedInstOperands,
11476 /* 31306 */ // GIR_Coverage, 388,
11477 /* 31306 */ GIR_EraseRootFromParent_Done,
11478 /* 31307 */ // Label 748: @31307
11479 /* 31307 */ GIM_Try, /*On fail goto*//*Label 749*/ GIMT_Encode4(31383), // Rule ID 389 //
11480 /* 31312 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11481 /* 31315 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11482 /* 31318 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11483 /* 31322 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11484 /* 31326 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11485 /* 31330 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
11486 /* 31334 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
11487 /* 31338 */ // MIs[1] Operand 1
11488 /* 31338 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11489 /* 31343 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11490 /* 31348 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11491 /* 31353 */ // MIs[0] rhs
11492 /* 31353 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11493 /* 31358 */ // MIs[0] lhs
11494 /* 31358 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11495 /* 31363 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11496 /* 31365 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOLT:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11497 /* 31365 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
11498 /* 31368 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11499 /* 31370 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11500 /* 31374 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11501 /* 31378 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11502 /* 31381 */ GIR_RootConstrainSelectedInstOperands,
11503 /* 31382 */ // GIR_Coverage, 389,
11504 /* 31382 */ GIR_EraseRootFromParent_Done,
11505 /* 31383 */ // Label 749: @31383
11506 /* 31383 */ GIM_Try, /*On fail goto*//*Label 750*/ GIMT_Encode4(31459), // Rule ID 390 //
11507 /* 31388 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11508 /* 31391 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11509 /* 31394 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11510 /* 31398 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11511 /* 31402 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11512 /* 31406 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
11513 /* 31410 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
11514 /* 31414 */ // MIs[1] Operand 1
11515 /* 31414 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
11516 /* 31419 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11517 /* 31424 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11518 /* 31429 */ // MIs[0] rhs
11519 /* 31429 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11520 /* 31434 */ // MIs[0] lhs
11521 /* 31434 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11522 /* 31439 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11523 /* 31441 */ // (vselect:{ *:[v4f32] } (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOLE:{ *:[Other] }), V128:{ *:[v4f32] }:$rhs, V128:{ *:[v4f32] }:$lhs) => (PMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
11524 /* 31441 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
11525 /* 31444 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11526 /* 31446 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11527 /* 31450 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11528 /* 31454 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11529 /* 31457 */ GIR_RootConstrainSelectedInstOperands,
11530 /* 31458 */ // GIR_Coverage, 390,
11531 /* 31458 */ GIR_EraseRootFromParent_Done,
11532 /* 31459 */ // Label 750: @31459
11533 /* 31459 */ GIM_Try, /*On fail goto*//*Label 751*/ GIMT_Encode4(31505), // Rule ID 1092 //
11534 /* 31464 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11535 /* 31467 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11536 /* 31470 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11537 /* 31473 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11538 /* 31477 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11539 /* 31481 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11540 /* 31485 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11541 /* 31489 */ // (vselect:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
11542 /* 31489 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
11543 /* 31492 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11544 /* 31494 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
11545 /* 31496 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
11546 /* 31498 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
11547 /* 31500 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11548 /* 31503 */ GIR_RootConstrainSelectedInstOperands,
11549 /* 31504 */ // GIR_Coverage, 1092,
11550 /* 31504 */ GIR_EraseRootFromParent_Done,
11551 /* 31505 */ // Label 751: @31505
11552 /* 31505 */ GIM_Try, /*On fail goto*//*Label 752*/ GIMT_Encode4(31551), // Rule ID 1094 //
11553 /* 31510 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
11554 /* 31513 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11555 /* 31516 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11556 /* 31519 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11557 /* 31523 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11558 /* 31527 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11559 /* 31531 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11560 /* 31535 */ // (vselect:{ *:[v4f32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4f32] }:$v1, V128:{ *:[v4f32] }:$v2) => (BITSELECT:{ *:[v4f32] } ?:{ *:[v4f32] }:$v1, ?:{ *:[v4f32] }:$v2, ?:{ *:[v4i32] }:$c)
11561 /* 31535 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
11562 /* 31538 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11563 /* 31540 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
11564 /* 31542 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
11565 /* 31544 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
11566 /* 31546 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11567 /* 31549 */ GIR_RootConstrainSelectedInstOperands,
11568 /* 31550 */ // GIR_Coverage, 1094,
11569 /* 31550 */ GIR_EraseRootFromParent_Done,
11570 /* 31551 */ // Label 752: @31551
11571 /* 31551 */ GIM_Try, /*On fail goto*//*Label 753*/ GIMT_Encode4(31597), // Rule ID 1102 //
11572 /* 31556 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11573 /* 31559 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11574 /* 31562 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11575 /* 31565 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11576 /* 31569 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11577 /* 31573 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11578 /* 31577 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11579 /* 31581 */ // (select:{ *:[v4i32] } I32:{ *:[i32] }:$cond, V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SELECT_V128:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs, ?:{ *:[i32] }:$cond)
11580 /* 31581 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11581 /* 31584 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11582 /* 31586 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11583 /* 31588 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11584 /* 31590 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
11585 /* 31592 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11586 /* 31595 */ GIR_RootConstrainSelectedInstOperands,
11587 /* 31596 */ // GIR_Coverage, 1102,
11588 /* 31596 */ GIR_EraseRootFromParent_Done,
11589 /* 31597 */ // Label 753: @31597
11590 /* 31597 */ GIM_Try, /*On fail goto*//*Label 754*/ GIMT_Encode4(31643), // Rule ID 1108 //
11591 /* 31602 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11592 /* 31605 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
11593 /* 31608 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4s32,
11594 /* 31611 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11595 /* 31615 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11596 /* 31619 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11597 /* 31623 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11598 /* 31627 */ // (select:{ *:[v4f32] } I32:{ *:[i32] }:$cond, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SELECT_V128:{ *:[v4f32] } ?:{ *:[v4f32] }:$lhs, ?:{ *:[v4f32] }:$rhs, ?:{ *:[i32] }:$cond)
11599 /* 31627 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11600 /* 31630 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11601 /* 31632 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11602 /* 31634 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11603 /* 31636 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
11604 /* 31638 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11605 /* 31641 */ GIR_RootConstrainSelectedInstOperands,
11606 /* 31642 */ // GIR_Coverage, 1108,
11607 /* 31642 */ GIR_EraseRootFromParent_Done,
11608 /* 31643 */ // Label 754: @31643
11609 /* 31643 */ GIM_Reject,
11610 /* 31644 */ // Label 698: @31644
11611 /* 31644 */ GIM_Try, /*On fail goto*//*Label 755*/ GIMT_Encode4(31729), // Rule ID 1089 //
11612 /* 31649 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
11613 /* 31652 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11614 /* 31655 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
11615 /* 31658 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11616 /* 31662 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11617 /* 31666 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
11618 /* 31670 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
11619 /* 31674 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
11620 /* 31678 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
11621 /* 31682 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11622 /* 31687 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
11623 /* 31691 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
11624 /* 31697 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
11625 /* 31699 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
11626 /* 31703 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
11627 /* 31709 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
11628 /* 31711 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
11629 /* 31713 */ // (vselect:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$x, immAllOnesV:{ *:[v2i64] }), immAllZerosV:{ *:[v2i64] }) => (ANDNOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$c, ?:{ *:[v2i64] }:$x)
11630 /* 31713 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
11631 /* 31716 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11632 /* 31718 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
11633 /* 31720 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // x
11634 /* 31724 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11635 /* 31727 */ GIR_RootConstrainSelectedInstOperands,
11636 /* 31728 */ // GIR_Coverage, 1089,
11637 /* 31728 */ GIR_EraseRootFromParent_Done,
11638 /* 31729 */ // Label 755: @31729
11639 /* 31729 */ GIM_Try, /*On fail goto*//*Label 756*/ GIMT_Encode4(31829), // Rule ID 1321 //
11640 /* 31734 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
11641 /* 31737 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
11642 /* 31740 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11643 /* 31744 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11644 /* 31748 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11645 /* 31752 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
11646 /* 31756 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
11647 /* 31760 */ // MIs[1] Operand 1
11648 /* 31760 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11649 /* 31765 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
11650 /* 31769 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
11651 /* 31773 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
11652 /* 31777 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11653 /* 31782 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
11654 /* 31786 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
11655 /* 31790 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
11656 /* 31794 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11657 /* 31799 */ // MIs[0] rhs
11658 /* 31799 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
11659 /* 31804 */ // MIs[0] lhs
11660 /* 31804 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
11661 /* 31809 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
11662 /* 31811 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (SIMD_RELAXED_FMIN_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
11663 /* 31811 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F64x2),
11664 /* 31814 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11665 /* 31816 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
11666 /* 31820 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
11667 /* 31824 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11668 /* 31827 */ GIR_RootConstrainSelectedInstOperands,
11669 /* 31828 */ // GIR_Coverage, 1321,
11670 /* 31828 */ GIR_EraseRootFromParent_Done,
11671 /* 31829 */ // Label 756: @31829
11672 /* 31829 */ GIM_Try, /*On fail goto*//*Label 757*/ GIMT_Encode4(31929), // Rule ID 1322 //
11673 /* 31834 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasRelaxedSIMD),
11674 /* 31837 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
11675 /* 31840 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11676 /* 31844 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11677 /* 31848 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11678 /* 31852 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
11679 /* 31856 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
11680 /* 31860 */ // MIs[1] Operand 1
11681 /* 31860 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11682 /* 31865 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
11683 /* 31869 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
11684 /* 31873 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
11685 /* 31877 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11686 /* 31882 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
11687 /* 31886 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
11688 /* 31890 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
11689 /* 31894 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11690 /* 31899 */ // MIs[0] rhs
11691 /* 31899 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
11692 /* 31904 */ // MIs[0] lhs
11693 /* 31904 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
11694 /* 31909 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
11695 /* 31911 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (SIMD_RELAXED_FMAX_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
11696 /* 31911 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F64x2),
11697 /* 31914 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11698 /* 31916 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
11699 /* 31920 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
11700 /* 31924 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11701 /* 31927 */ GIR_RootConstrainSelectedInstOperands,
11702 /* 31928 */ // GIR_Coverage, 1322,
11703 /* 31928 */ GIR_EraseRootFromParent_Done,
11704 /* 31929 */ // Label 757: @31929
11705 /* 31929 */ GIM_Try, /*On fail goto*//*Label 758*/ GIMT_Encode4(32026), // Rule ID 1187 //
11706 /* 31934 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
11707 /* 31937 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11708 /* 31941 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11709 /* 31945 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11710 /* 31949 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
11711 /* 31953 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
11712 /* 31957 */ // MIs[1] Operand 1
11713 /* 31957 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11714 /* 31962 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
11715 /* 31966 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
11716 /* 31970 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
11717 /* 31974 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11718 /* 31979 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
11719 /* 31983 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
11720 /* 31987 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
11721 /* 31991 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11722 /* 31996 */ // MIs[0] rhs
11723 /* 31996 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
11724 /* 32001 */ // MIs[0] lhs
11725 /* 32001 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
11726 /* 32006 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
11727 /* 32008 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (PMIN_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
11728 /* 32008 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
11729 /* 32011 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11730 /* 32013 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
11731 /* 32017 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
11732 /* 32021 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11733 /* 32024 */ GIR_RootConstrainSelectedInstOperands,
11734 /* 32025 */ // GIR_Coverage, 1187,
11735 /* 32025 */ GIR_EraseRootFromParent_Done,
11736 /* 32026 */ // Label 758: @32026
11737 /* 32026 */ GIM_Try, /*On fail goto*//*Label 759*/ GIMT_Encode4(32123), // Rule ID 1188 //
11738 /* 32031 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
11739 /* 32034 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11740 /* 32038 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11741 /* 32042 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11742 /* 32046 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
11743 /* 32050 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
11744 /* 32054 */ // MIs[1] Operand 1
11745 /* 32054 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11746 /* 32059 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
11747 /* 32063 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
11748 /* 32067 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
11749 /* 32071 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11750 /* 32076 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
11751 /* 32080 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
11752 /* 32084 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
11753 /* 32088 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11754 /* 32093 */ // MIs[0] rhs
11755 /* 32093 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
11756 /* 32098 */ // MIs[0] lhs
11757 /* 32098 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
11758 /* 32103 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
11759 /* 32105 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (PMAX_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
11760 /* 32105 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
11761 /* 32108 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11762 /* 32110 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
11763 /* 32114 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
11764 /* 32118 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11765 /* 32121 */ GIR_RootConstrainSelectedInstOperands,
11766 /* 32122 */ // GIR_Coverage, 1188,
11767 /* 32122 */ GIR_EraseRootFromParent_Done,
11768 /* 32123 */ // Label 759: @32123
11769 /* 32123 */ GIM_Try, /*On fail goto*//*Label 760*/ GIMT_Encode4(32199), // Rule ID 1106 //
11770 /* 32128 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11771 /* 32131 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11772 /* 32134 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
11773 /* 32137 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11774 /* 32141 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11775 /* 32145 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
11776 /* 32149 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
11777 /* 32153 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
11778 /* 32157 */ // MIs[1] Operand 1
11779 /* 32157 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11780 /* 32162 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11781 /* 32167 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
11782 /* 32171 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11783 /* 32175 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11784 /* 32179 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11785 /* 32181 */ // (select:{ *:[v2i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SELECT_V128:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs, ?:{ *:[i32] }:$cond)
11786 /* 32181 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11787 /* 32184 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11788 /* 32186 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11789 /* 32188 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11790 /* 32190 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
11791 /* 32194 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11792 /* 32197 */ GIR_RootConstrainSelectedInstOperands,
11793 /* 32198 */ // GIR_Coverage, 1106,
11794 /* 32198 */ GIR_EraseRootFromParent_Done,
11795 /* 32199 */ // Label 760: @32199
11796 /* 32199 */ GIM_Try, /*On fail goto*//*Label 761*/ GIMT_Encode4(32275), // Rule ID 1107 //
11797 /* 32204 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11798 /* 32207 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11799 /* 32210 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
11800 /* 32213 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11801 /* 32217 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11802 /* 32221 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
11803 /* 32225 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
11804 /* 32229 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
11805 /* 32233 */ // MIs[1] Operand 1
11806 /* 32233 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11807 /* 32238 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11808 /* 32243 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
11809 /* 32247 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11810 /* 32251 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11811 /* 32255 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11812 /* 32257 */ // (select:{ *:[v2i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SELECT_V128:{ *:[v2i64] } ?:{ *:[v2i64] }:$rhs, ?:{ *:[v2i64] }:$lhs, ?:{ *:[i32] }:$cond)
11813 /* 32257 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11814 /* 32260 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11815 /* 32262 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11816 /* 32264 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11817 /* 32266 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
11818 /* 32270 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11819 /* 32273 */ GIR_RootConstrainSelectedInstOperands,
11820 /* 32274 */ // GIR_Coverage, 1107,
11821 /* 32274 */ GIR_EraseRootFromParent_Done,
11822 /* 32275 */ // Label 761: @32275
11823 /* 32275 */ GIM_Try, /*On fail goto*//*Label 762*/ GIMT_Encode4(32351), // Rule ID 1112 //
11824 /* 32280 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11825 /* 32283 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11826 /* 32286 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
11827 /* 32289 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11828 /* 32293 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11829 /* 32297 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
11830 /* 32301 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
11831 /* 32305 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
11832 /* 32309 */ // MIs[1] Operand 1
11833 /* 32309 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11834 /* 32314 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11835 /* 32319 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
11836 /* 32323 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11837 /* 32327 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11838 /* 32331 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11839 /* 32333 */ // (select:{ *:[v2f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SELECT_V128:{ *:[v2f64] } ?:{ *:[v2f64] }:$lhs, ?:{ *:[v2f64] }:$rhs, ?:{ *:[i32] }:$cond)
11840 /* 32333 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11841 /* 32336 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11842 /* 32338 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11843 /* 32340 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11844 /* 32342 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
11845 /* 32346 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11846 /* 32349 */ GIR_RootConstrainSelectedInstOperands,
11847 /* 32350 */ // GIR_Coverage, 1112,
11848 /* 32350 */ GIR_EraseRootFromParent_Done,
11849 /* 32351 */ // Label 762: @32351
11850 /* 32351 */ GIM_Try, /*On fail goto*//*Label 763*/ GIMT_Encode4(32427), // Rule ID 1113 //
11851 /* 32356 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
11852 /* 32359 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
11853 /* 32362 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
11854 /* 32365 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11855 /* 32369 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11856 /* 32373 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
11857 /* 32377 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
11858 /* 32381 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
11859 /* 32385 */ // MIs[1] Operand 1
11860 /* 32385 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11861 /* 32390 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11862 /* 32395 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
11863 /* 32399 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11864 /* 32403 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11865 /* 32407 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11866 /* 32409 */ // (select:{ *:[v2f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SELECT_V128:{ *:[v2f64] } ?:{ *:[v2f64] }:$rhs, ?:{ *:[v2f64] }:$lhs, ?:{ *:[i32] }:$cond)
11867 /* 32409 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
11868 /* 32412 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11869 /* 32414 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11870 /* 32416 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11871 /* 32418 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
11872 /* 32422 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11873 /* 32425 */ GIR_RootConstrainSelectedInstOperands,
11874 /* 32426 */ // GIR_Coverage, 1113,
11875 /* 32426 */ GIR_EraseRootFromParent_Done,
11876 /* 32427 */ // Label 763: @32427
11877 /* 32427 */ GIM_Try, /*On fail goto*//*Label 764*/ GIMT_Encode4(32503), // Rule ID 371 //
11878 /* 32432 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11879 /* 32435 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
11880 /* 32438 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11881 /* 32442 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11882 /* 32446 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11883 /* 32450 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
11884 /* 32454 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
11885 /* 32458 */ // MIs[1] Operand 1
11886 /* 32458 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11887 /* 32463 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11888 /* 32468 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11889 /* 32473 */ // MIs[0] rhs
11890 /* 32473 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11891 /* 32478 */ // MIs[0] lhs
11892 /* 32478 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11893 /* 32483 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11894 /* 32485 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs, SETOLT:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
11895 /* 32485 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
11896 /* 32488 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11897 /* 32490 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11898 /* 32494 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11899 /* 32498 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11900 /* 32501 */ GIR_RootConstrainSelectedInstOperands,
11901 /* 32502 */ // GIR_Coverage, 371,
11902 /* 32502 */ GIR_EraseRootFromParent_Done,
11903 /* 32503 */ // Label 764: @32503
11904 /* 32503 */ GIM_Try, /*On fail goto*//*Label 765*/ GIMT_Encode4(32579), // Rule ID 372 //
11905 /* 32508 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11906 /* 32511 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
11907 /* 32514 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11908 /* 32518 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11909 /* 32522 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11910 /* 32526 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
11911 /* 32530 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
11912 /* 32534 */ // MIs[1] Operand 1
11913 /* 32534 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
11914 /* 32539 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11915 /* 32544 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11916 /* 32549 */ // MIs[0] rhs
11917 /* 32549 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11918 /* 32554 */ // MIs[0] lhs
11919 /* 32554 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
11920 /* 32559 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11921 /* 32561 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs, SETOLE:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
11922 /* 32561 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
11923 /* 32564 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11924 /* 32566 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
11925 /* 32570 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
11926 /* 32574 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11927 /* 32577 */ GIR_RootConstrainSelectedInstOperands,
11928 /* 32578 */ // GIR_Coverage, 372,
11929 /* 32578 */ GIR_EraseRootFromParent_Done,
11930 /* 32579 */ // Label 765: @32579
11931 /* 32579 */ GIM_Try, /*On fail goto*//*Label 766*/ GIMT_Encode4(32655), // Rule ID 373 //
11932 /* 32584 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11933 /* 32587 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
11934 /* 32590 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11935 /* 32594 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11936 /* 32598 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11937 /* 32602 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
11938 /* 32606 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
11939 /* 32610 */ // MIs[1] Operand 1
11940 /* 32610 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
11941 /* 32615 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11942 /* 32620 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11943 /* 32625 */ // MIs[0] rhs
11944 /* 32625 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11945 /* 32630 */ // MIs[0] lhs
11946 /* 32630 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11947 /* 32635 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11948 /* 32637 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOGT:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
11949 /* 32637 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
11950 /* 32640 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11951 /* 32642 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11952 /* 32646 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11953 /* 32650 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11954 /* 32653 */ GIR_RootConstrainSelectedInstOperands,
11955 /* 32654 */ // GIR_Coverage, 373,
11956 /* 32654 */ GIR_EraseRootFromParent_Done,
11957 /* 32655 */ // Label 766: @32655
11958 /* 32655 */ GIM_Try, /*On fail goto*//*Label 767*/ GIMT_Encode4(32731), // Rule ID 374 //
11959 /* 32660 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11960 /* 32663 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
11961 /* 32666 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11962 /* 32670 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11963 /* 32674 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11964 /* 32678 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
11965 /* 32682 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
11966 /* 32686 */ // MIs[1] Operand 1
11967 /* 32686 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
11968 /* 32691 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11969 /* 32696 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11970 /* 32701 */ // MIs[0] rhs
11971 /* 32701 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
11972 /* 32706 */ // MIs[0] lhs
11973 /* 32706 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
11974 /* 32711 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11975 /* 32713 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOGE:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
11976 /* 32713 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
11977 /* 32716 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11978 /* 32718 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
11979 /* 32722 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
11980 /* 32726 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11981 /* 32729 */ GIR_RootConstrainSelectedInstOperands,
11982 /* 32730 */ // GIR_Coverage, 374,
11983 /* 32730 */ GIR_EraseRootFromParent_Done,
11984 /* 32731 */ // Label 767: @32731
11985 /* 32731 */ GIM_Try, /*On fail goto*//*Label 768*/ GIMT_Encode4(32807), // Rule ID 395 //
11986 /* 32736 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
11987 /* 32739 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
11988 /* 32742 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11989 /* 32746 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
11990 /* 32750 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
11991 /* 32754 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
11992 /* 32758 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
11993 /* 32762 */ // MIs[1] Operand 1
11994 /* 32762 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
11995 /* 32767 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11996 /* 32772 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11997 /* 32777 */ // MIs[0] rhs
11998 /* 32777 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
11999 /* 32782 */ // MIs[0] lhs
12000 /* 32782 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
12001 /* 32787 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12002 /* 32789 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs, SETOGT:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12003 /* 32789 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
12004 /* 32792 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12005 /* 32794 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
12006 /* 32798 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
12007 /* 32802 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12008 /* 32805 */ GIR_RootConstrainSelectedInstOperands,
12009 /* 32806 */ // GIR_Coverage, 395,
12010 /* 32806 */ GIR_EraseRootFromParent_Done,
12011 /* 32807 */ // Label 768: @32807
12012 /* 32807 */ GIM_Try, /*On fail goto*//*Label 769*/ GIMT_Encode4(32883), // Rule ID 396 //
12013 /* 32812 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12014 /* 32815 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
12015 /* 32818 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12016 /* 32822 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12017 /* 32826 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
12018 /* 32830 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
12019 /* 32834 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
12020 /* 32838 */ // MIs[1] Operand 1
12021 /* 32838 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
12022 /* 32843 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12023 /* 32848 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12024 /* 32853 */ // MIs[0] rhs
12025 /* 32853 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
12026 /* 32858 */ // MIs[0] lhs
12027 /* 32858 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/3,
12028 /* 32863 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12029 /* 32865 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs, SETOGE:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12030 /* 32865 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
12031 /* 32868 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12032 /* 32870 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // lhs
12033 /* 32874 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // rhs
12034 /* 32878 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12035 /* 32881 */ GIR_RootConstrainSelectedInstOperands,
12036 /* 32882 */ // GIR_Coverage, 396,
12037 /* 32882 */ GIR_EraseRootFromParent_Done,
12038 /* 32883 */ // Label 769: @32883
12039 /* 32883 */ GIM_Try, /*On fail goto*//*Label 770*/ GIMT_Encode4(32959), // Rule ID 397 //
12040 /* 32888 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12041 /* 32891 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
12042 /* 32894 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12043 /* 32898 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12044 /* 32902 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
12045 /* 32906 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
12046 /* 32910 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
12047 /* 32914 */ // MIs[1] Operand 1
12048 /* 32914 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
12049 /* 32919 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12050 /* 32924 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12051 /* 32929 */ // MIs[0] rhs
12052 /* 32929 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
12053 /* 32934 */ // MIs[0] lhs
12054 /* 32934 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
12055 /* 32939 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12056 /* 32941 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOLT:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12057 /* 32941 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
12058 /* 32944 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12059 /* 32946 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
12060 /* 32950 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
12061 /* 32954 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12062 /* 32957 */ GIR_RootConstrainSelectedInstOperands,
12063 /* 32958 */ // GIR_Coverage, 397,
12064 /* 32958 */ GIR_EraseRootFromParent_Done,
12065 /* 32959 */ // Label 770: @32959
12066 /* 32959 */ GIM_Try, /*On fail goto*//*Label 771*/ GIMT_Encode4(33035), // Rule ID 398 //
12067 /* 32964 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12068 /* 32967 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
12069 /* 32970 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12070 /* 32974 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12071 /* 32978 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
12072 /* 32982 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s64,
12073 /* 32986 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s64,
12074 /* 32990 */ // MIs[1] Operand 1
12075 /* 32990 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
12076 /* 32995 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12077 /* 33000 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12078 /* 33005 */ // MIs[0] rhs
12079 /* 33005 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/3,
12080 /* 33010 */ // MIs[0] lhs
12081 /* 33010 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/1, /*OtherOpIdx*/2,
12082 /* 33015 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12083 /* 33017 */ // (vselect:{ *:[v2f64] } (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOLE:{ *:[Other] }), V128:{ *:[v2f64] }:$rhs, V128:{ *:[v2f64] }:$lhs) => (PMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12084 /* 33017 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
12085 /* 33020 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12086 /* 33022 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // lhs
12087 /* 33026 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // rhs
12088 /* 33030 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12089 /* 33033 */ GIR_RootConstrainSelectedInstOperands,
12090 /* 33034 */ // GIR_Coverage, 398,
12091 /* 33034 */ GIR_EraseRootFromParent_Done,
12092 /* 33035 */ // Label 771: @33035
12093 /* 33035 */ GIM_Try, /*On fail goto*//*Label 772*/ GIMT_Encode4(33081), // Rule ID 1093 //
12094 /* 33040 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
12095 /* 33043 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12096 /* 33046 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12097 /* 33049 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12098 /* 33053 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12099 /* 33057 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12100 /* 33061 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12101 /* 33065 */ // (vselect:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
12102 /* 33065 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
12103 /* 33068 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12104 /* 33070 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
12105 /* 33072 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
12106 /* 33074 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
12107 /* 33076 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12108 /* 33079 */ GIR_RootConstrainSelectedInstOperands,
12109 /* 33080 */ // GIR_Coverage, 1093,
12110 /* 33080 */ GIR_EraseRootFromParent_Done,
12111 /* 33081 */ // Label 772: @33081
12112 /* 33081 */ GIM_Try, /*On fail goto*//*Label 773*/ GIMT_Encode4(33127), // Rule ID 1095 //
12113 /* 33086 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
12114 /* 33089 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12115 /* 33092 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12116 /* 33095 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12117 /* 33099 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12118 /* 33103 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12119 /* 33107 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12120 /* 33111 */ // (vselect:{ *:[v2f64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2f64] }:$v1, V128:{ *:[v2f64] }:$v2) => (BITSELECT:{ *:[v2f64] } ?:{ *:[v2f64] }:$v1, ?:{ *:[v2f64] }:$v2, ?:{ *:[v2i64] }:$c)
12121 /* 33111 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
12122 /* 33114 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12123 /* 33116 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
12124 /* 33118 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
12125 /* 33120 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
12126 /* 33122 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12127 /* 33125 */ GIR_RootConstrainSelectedInstOperands,
12128 /* 33126 */ // GIR_Coverage, 1095,
12129 /* 33126 */ GIR_EraseRootFromParent_Done,
12130 /* 33127 */ // Label 773: @33127
12131 /* 33127 */ GIM_Try, /*On fail goto*//*Label 774*/ GIMT_Encode4(33173), // Rule ID 1105 //
12132 /* 33132 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12133 /* 33135 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12134 /* 33138 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12135 /* 33141 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12136 /* 33145 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12137 /* 33149 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12138 /* 33153 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12139 /* 33157 */ // (select:{ *:[v2i64] } I32:{ *:[i32] }:$cond, V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SELECT_V128:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs, ?:{ *:[i32] }:$cond)
12140 /* 33157 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
12141 /* 33160 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12142 /* 33162 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12143 /* 33164 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12144 /* 33166 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
12145 /* 33168 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12146 /* 33171 */ GIR_RootConstrainSelectedInstOperands,
12147 /* 33172 */ // GIR_Coverage, 1105,
12148 /* 33172 */ GIR_EraseRootFromParent_Done,
12149 /* 33173 */ // Label 774: @33173
12150 /* 33173 */ GIM_Try, /*On fail goto*//*Label 775*/ GIMT_Encode4(33219), // Rule ID 1111 //
12151 /* 33178 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12152 /* 33181 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12153 /* 33184 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2s64,
12154 /* 33187 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12155 /* 33191 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12156 /* 33195 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12157 /* 33199 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12158 /* 33203 */ // (select:{ *:[v2f64] } I32:{ *:[i32] }:$cond, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SELECT_V128:{ *:[v2f64] } ?:{ *:[v2f64] }:$lhs, ?:{ *:[v2f64] }:$rhs, ?:{ *:[i32] }:$cond)
12159 /* 33203 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
12160 /* 33206 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12161 /* 33208 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12162 /* 33210 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12163 /* 33212 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
12164 /* 33214 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12165 /* 33217 */ GIR_RootConstrainSelectedInstOperands,
12166 /* 33218 */ // GIR_Coverage, 1111,
12167 /* 33218 */ GIR_EraseRootFromParent_Done,
12168 /* 33219 */ // Label 775: @33219
12169 /* 33219 */ GIM_Reject,
12170 /* 33220 */ // Label 699: @33220
12171 /* 33220 */ GIM_Reject,
12172 /* 33221 */ // Label 34: @33221
12173 /* 33221 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 778*/ GIMT_Encode4(33320),
12174 /* 33232 */ /*GILLT_v16s8*//*Label 776*/ GIMT_Encode4(33240),
12175 /* 33236 */ /*GILLT_v8s16*//*Label 777*/ GIMT_Encode4(33280),
12176 /* 33240 */ // Label 776: @33240
12177 /* 33240 */ GIM_Try, /*On fail goto*//*Label 779*/ GIMT_Encode4(33279), // Rule ID 284 //
12178 /* 33245 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12179 /* 33248 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
12180 /* 33251 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
12181 /* 33254 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12182 /* 33258 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12183 /* 33262 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12184 /* 33266 */ // (uaddsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (ADD_SAT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
12185 /* 33266 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_U_I8x16),
12186 /* 33271 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12187 /* 33277 */ GIR_RootConstrainSelectedInstOperands,
12188 /* 33278 */ // GIR_Coverage, 284,
12189 /* 33278 */ GIR_Done,
12190 /* 33279 */ // Label 779: @33279
12191 /* 33279 */ GIM_Reject,
12192 /* 33280 */ // Label 777: @33280
12193 /* 33280 */ GIM_Try, /*On fail goto*//*Label 780*/ GIMT_Encode4(33319), // Rule ID 285 //
12194 /* 33285 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12195 /* 33288 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12196 /* 33291 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12197 /* 33294 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12198 /* 33298 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12199 /* 33302 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12200 /* 33306 */ // (uaddsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (ADD_SAT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
12201 /* 33306 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_U_I16x8),
12202 /* 33311 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12203 /* 33317 */ GIR_RootConstrainSelectedInstOperands,
12204 /* 33318 */ // GIR_Coverage, 285,
12205 /* 33318 */ GIR_Done,
12206 /* 33319 */ // Label 780: @33319
12207 /* 33319 */ GIM_Reject,
12208 /* 33320 */ // Label 778: @33320
12209 /* 33320 */ GIM_Reject,
12210 /* 33321 */ // Label 35: @33321
12211 /* 33321 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 783*/ GIMT_Encode4(33420),
12212 /* 33332 */ /*GILLT_v16s8*//*Label 781*/ GIMT_Encode4(33340),
12213 /* 33336 */ /*GILLT_v8s16*//*Label 782*/ GIMT_Encode4(33380),
12214 /* 33340 */ // Label 781: @33340
12215 /* 33340 */ GIM_Try, /*On fail goto*//*Label 784*/ GIMT_Encode4(33379), // Rule ID 282 //
12216 /* 33345 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12217 /* 33348 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
12218 /* 33351 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
12219 /* 33354 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12220 /* 33358 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12221 /* 33362 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12222 /* 33366 */ // (saddsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (ADD_SAT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
12223 /* 33366 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_S_I8x16),
12224 /* 33371 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12225 /* 33377 */ GIR_RootConstrainSelectedInstOperands,
12226 /* 33378 */ // GIR_Coverage, 282,
12227 /* 33378 */ GIR_Done,
12228 /* 33379 */ // Label 784: @33379
12229 /* 33379 */ GIM_Reject,
12230 /* 33380 */ // Label 782: @33380
12231 /* 33380 */ GIM_Try, /*On fail goto*//*Label 785*/ GIMT_Encode4(33419), // Rule ID 283 //
12232 /* 33385 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12233 /* 33388 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12234 /* 33391 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12235 /* 33394 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12236 /* 33398 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12237 /* 33402 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12238 /* 33406 */ // (saddsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (ADD_SAT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
12239 /* 33406 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_S_I16x8),
12240 /* 33411 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12241 /* 33417 */ GIR_RootConstrainSelectedInstOperands,
12242 /* 33418 */ // GIR_Coverage, 283,
12243 /* 33418 */ GIR_Done,
12244 /* 33419 */ // Label 785: @33419
12245 /* 33419 */ GIM_Reject,
12246 /* 33420 */ // Label 783: @33420
12247 /* 33420 */ GIM_Reject,
12248 /* 33421 */ // Label 36: @33421
12249 /* 33421 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 788*/ GIMT_Encode4(33520),
12250 /* 33432 */ /*GILLT_v16s8*//*Label 786*/ GIMT_Encode4(33440),
12251 /* 33436 */ /*GILLT_v8s16*//*Label 787*/ GIMT_Encode4(33480),
12252 /* 33440 */ // Label 786: @33440
12253 /* 33440 */ GIM_Try, /*On fail goto*//*Label 789*/ GIMT_Encode4(33479), // Rule ID 292 //
12254 /* 33445 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12255 /* 33448 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
12256 /* 33451 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
12257 /* 33454 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12258 /* 33458 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12259 /* 33462 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12260 /* 33466 */ // (usubsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SUB_SAT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
12261 /* 33466 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_U_I8x16),
12262 /* 33471 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12263 /* 33477 */ GIR_RootConstrainSelectedInstOperands,
12264 /* 33478 */ // GIR_Coverage, 292,
12265 /* 33478 */ GIR_Done,
12266 /* 33479 */ // Label 789: @33479
12267 /* 33479 */ GIM_Reject,
12268 /* 33480 */ // Label 787: @33480
12269 /* 33480 */ GIM_Try, /*On fail goto*//*Label 790*/ GIMT_Encode4(33519), // Rule ID 293 //
12270 /* 33485 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12271 /* 33488 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12272 /* 33491 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12273 /* 33494 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12274 /* 33498 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12275 /* 33502 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12276 /* 33506 */ // (usubsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SUB_SAT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
12277 /* 33506 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_U_I16x8),
12278 /* 33511 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12279 /* 33517 */ GIR_RootConstrainSelectedInstOperands,
12280 /* 33518 */ // GIR_Coverage, 293,
12281 /* 33518 */ GIR_Done,
12282 /* 33519 */ // Label 790: @33519
12283 /* 33519 */ GIM_Reject,
12284 /* 33520 */ // Label 788: @33520
12285 /* 33520 */ GIM_Reject,
12286 /* 33521 */ // Label 37: @33521
12287 /* 33521 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 793*/ GIMT_Encode4(33620),
12288 /* 33532 */ /*GILLT_v16s8*//*Label 791*/ GIMT_Encode4(33540),
12289 /* 33536 */ /*GILLT_v8s16*//*Label 792*/ GIMT_Encode4(33580),
12290 /* 33540 */ // Label 791: @33540
12291 /* 33540 */ GIM_Try, /*On fail goto*//*Label 794*/ GIMT_Encode4(33579), // Rule ID 290 //
12292 /* 33545 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12293 /* 33548 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
12294 /* 33551 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
12295 /* 33554 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12296 /* 33558 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12297 /* 33562 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12298 /* 33566 */ // (ssubsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SUB_SAT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
12299 /* 33566 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_S_I8x16),
12300 /* 33571 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12301 /* 33577 */ GIR_RootConstrainSelectedInstOperands,
12302 /* 33578 */ // GIR_Coverage, 290,
12303 /* 33578 */ GIR_Done,
12304 /* 33579 */ // Label 794: @33579
12305 /* 33579 */ GIM_Reject,
12306 /* 33580 */ // Label 792: @33580
12307 /* 33580 */ GIM_Try, /*On fail goto*//*Label 795*/ GIMT_Encode4(33619), // Rule ID 291 //
12308 /* 33585 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12309 /* 33588 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12310 /* 33591 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12311 /* 33594 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12312 /* 33598 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12313 /* 33602 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12314 /* 33606 */ // (ssubsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SUB_SAT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
12315 /* 33606 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_S_I16x8),
12316 /* 33611 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12317 /* 33617 */ GIR_RootConstrainSelectedInstOperands,
12318 /* 33618 */ // GIR_Coverage, 291,
12319 /* 33618 */ GIR_Done,
12320 /* 33619 */ // Label 795: @33619
12321 /* 33619 */ GIM_Reject,
12322 /* 33620 */ // Label 793: @33620
12323 /* 33620 */ GIM_Reject,
12324 /* 33621 */ // Label 38: @33621
12325 /* 33621 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 801*/ GIMT_Encode4(33850),
12326 /* 33632 */ /*GILLT_s32*//*Label 796*/ GIMT_Encode4(33656),
12327 /* 33636 */ /*GILLT_s64*//*Label 797*/ GIMT_Encode4(33693), GIMT_Encode4(0),
12328 /* 33644 */ /*GILLT_v8s16*//*Label 798*/ GIMT_Encode4(33730),
12329 /* 33648 */ /*GILLT_v4s32*//*Label 799*/ GIMT_Encode4(33770),
12330 /* 33652 */ /*GILLT_v2s64*//*Label 800*/ GIMT_Encode4(33810),
12331 /* 33656 */ // Label 796: @33656
12332 /* 33656 */ GIM_Try, /*On fail goto*//*Label 802*/ GIMT_Encode4(33692), // Rule ID 124 //
12333 /* 33661 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12334 /* 33664 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
12335 /* 33667 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12336 /* 33671 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12337 /* 33675 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12338 /* 33679 */ // (fadd:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (ADD_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12339 /* 33679 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F32),
12340 /* 33684 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12341 /* 33690 */ GIR_RootConstrainSelectedInstOperands,
12342 /* 33691 */ // GIR_Coverage, 124,
12343 /* 33691 */ GIR_Done,
12344 /* 33692 */ // Label 802: @33692
12345 /* 33692 */ GIM_Reject,
12346 /* 33693 */ // Label 797: @33693
12347 /* 33693 */ GIM_Try, /*On fail goto*//*Label 803*/ GIMT_Encode4(33729), // Rule ID 125 //
12348 /* 33698 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12349 /* 33701 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
12350 /* 33704 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12351 /* 33708 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12352 /* 33712 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12353 /* 33716 */ // (fadd:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (ADD_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12354 /* 33716 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F64),
12355 /* 33721 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12356 /* 33727 */ GIR_RootConstrainSelectedInstOperands,
12357 /* 33728 */ // GIR_Coverage, 125,
12358 /* 33728 */ GIR_Done,
12359 /* 33729 */ // Label 803: @33729
12360 /* 33729 */ GIM_Reject,
12361 /* 33730 */ // Label 798: @33730
12362 /* 33730 */ GIM_Try, /*On fail goto*//*Label 804*/ GIMT_Encode4(33769), // Rule ID 347 //
12363 /* 33735 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12364 /* 33738 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12365 /* 33741 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12366 /* 33744 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12367 /* 33748 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12368 /* 33752 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12369 /* 33756 */ // (fadd:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (ADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12370 /* 33756 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F16x8),
12371 /* 33761 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12372 /* 33767 */ GIR_RootConstrainSelectedInstOperands,
12373 /* 33768 */ // GIR_Coverage, 347,
12374 /* 33768 */ GIR_Done,
12375 /* 33769 */ // Label 804: @33769
12376 /* 33769 */ GIM_Reject,
12377 /* 33770 */ // Label 799: @33770
12378 /* 33770 */ GIM_Try, /*On fail goto*//*Label 805*/ GIMT_Encode4(33809), // Rule ID 345 //
12379 /* 33775 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12380 /* 33778 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
12381 /* 33781 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
12382 /* 33784 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12383 /* 33788 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12384 /* 33792 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12385 /* 33796 */ // (fadd:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (ADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12386 /* 33796 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F32x4),
12387 /* 33801 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12388 /* 33807 */ GIR_RootConstrainSelectedInstOperands,
12389 /* 33808 */ // GIR_Coverage, 345,
12390 /* 33808 */ GIR_Done,
12391 /* 33809 */ // Label 805: @33809
12392 /* 33809 */ GIM_Reject,
12393 /* 33810 */ // Label 800: @33810
12394 /* 33810 */ GIM_Try, /*On fail goto*//*Label 806*/ GIMT_Encode4(33849), // Rule ID 346 //
12395 /* 33815 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12396 /* 33818 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
12397 /* 33821 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12398 /* 33824 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12399 /* 33828 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12400 /* 33832 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12401 /* 33836 */ // (fadd:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (ADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12402 /* 33836 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F64x2),
12403 /* 33841 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12404 /* 33847 */ GIR_RootConstrainSelectedInstOperands,
12405 /* 33848 */ // GIR_Coverage, 346,
12406 /* 33848 */ GIR_Done,
12407 /* 33849 */ // Label 806: @33849
12408 /* 33849 */ GIM_Reject,
12409 /* 33850 */ // Label 801: @33850
12410 /* 33850 */ GIM_Reject,
12411 /* 33851 */ // Label 39: @33851
12412 /* 33851 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 812*/ GIMT_Encode4(34080),
12413 /* 33862 */ /*GILLT_s32*//*Label 807*/ GIMT_Encode4(33886),
12414 /* 33866 */ /*GILLT_s64*//*Label 808*/ GIMT_Encode4(33923), GIMT_Encode4(0),
12415 /* 33874 */ /*GILLT_v8s16*//*Label 809*/ GIMT_Encode4(33960),
12416 /* 33878 */ /*GILLT_v4s32*//*Label 810*/ GIMT_Encode4(34000),
12417 /* 33882 */ /*GILLT_v2s64*//*Label 811*/ GIMT_Encode4(34040),
12418 /* 33886 */ // Label 807: @33886
12419 /* 33886 */ GIM_Try, /*On fail goto*//*Label 813*/ GIMT_Encode4(33922), // Rule ID 126 //
12420 /* 33891 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12421 /* 33894 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
12422 /* 33897 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12423 /* 33901 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12424 /* 33905 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12425 /* 33909 */ // (fsub:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SUB_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12426 /* 33909 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F32),
12427 /* 33914 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12428 /* 33920 */ GIR_RootConstrainSelectedInstOperands,
12429 /* 33921 */ // GIR_Coverage, 126,
12430 /* 33921 */ GIR_Done,
12431 /* 33922 */ // Label 813: @33922
12432 /* 33922 */ GIM_Reject,
12433 /* 33923 */ // Label 808: @33923
12434 /* 33923 */ GIM_Try, /*On fail goto*//*Label 814*/ GIMT_Encode4(33959), // Rule ID 127 //
12435 /* 33928 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12436 /* 33931 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
12437 /* 33934 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12438 /* 33938 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12439 /* 33942 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12440 /* 33946 */ // (fsub:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SUB_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12441 /* 33946 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F64),
12442 /* 33951 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12443 /* 33957 */ GIR_RootConstrainSelectedInstOperands,
12444 /* 33958 */ // GIR_Coverage, 127,
12445 /* 33958 */ GIR_Done,
12446 /* 33959 */ // Label 814: @33959
12447 /* 33959 */ GIM_Reject,
12448 /* 33960 */ // Label 809: @33960
12449 /* 33960 */ GIM_Try, /*On fail goto*//*Label 815*/ GIMT_Encode4(33999), // Rule ID 350 //
12450 /* 33965 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12451 /* 33968 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12452 /* 33971 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12453 /* 33974 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12454 /* 33978 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12455 /* 33982 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12456 /* 33986 */ // (fsub:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (SUB_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12457 /* 33986 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F16x8),
12458 /* 33991 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12459 /* 33997 */ GIR_RootConstrainSelectedInstOperands,
12460 /* 33998 */ // GIR_Coverage, 350,
12461 /* 33998 */ GIR_Done,
12462 /* 33999 */ // Label 815: @33999
12463 /* 33999 */ GIM_Reject,
12464 /* 34000 */ // Label 810: @34000
12465 /* 34000 */ GIM_Try, /*On fail goto*//*Label 816*/ GIMT_Encode4(34039), // Rule ID 348 //
12466 /* 34005 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12467 /* 34008 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
12468 /* 34011 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
12469 /* 34014 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12470 /* 34018 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12471 /* 34022 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12472 /* 34026 */ // (fsub:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SUB_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12473 /* 34026 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F32x4),
12474 /* 34031 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12475 /* 34037 */ GIR_RootConstrainSelectedInstOperands,
12476 /* 34038 */ // GIR_Coverage, 348,
12477 /* 34038 */ GIR_Done,
12478 /* 34039 */ // Label 816: @34039
12479 /* 34039 */ GIM_Reject,
12480 /* 34040 */ // Label 811: @34040
12481 /* 34040 */ GIM_Try, /*On fail goto*//*Label 817*/ GIMT_Encode4(34079), // Rule ID 349 //
12482 /* 34045 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12483 /* 34048 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
12484 /* 34051 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12485 /* 34054 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12486 /* 34058 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12487 /* 34062 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12488 /* 34066 */ // (fsub:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SUB_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12489 /* 34066 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F64x2),
12490 /* 34071 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12491 /* 34077 */ GIR_RootConstrainSelectedInstOperands,
12492 /* 34078 */ // GIR_Coverage, 349,
12493 /* 34078 */ GIR_Done,
12494 /* 34079 */ // Label 817: @34079
12495 /* 34079 */ GIM_Reject,
12496 /* 34080 */ // Label 812: @34080
12497 /* 34080 */ GIM_Reject,
12498 /* 34081 */ // Label 40: @34081
12499 /* 34081 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 823*/ GIMT_Encode4(34310),
12500 /* 34092 */ /*GILLT_s32*//*Label 818*/ GIMT_Encode4(34116),
12501 /* 34096 */ /*GILLT_s64*//*Label 819*/ GIMT_Encode4(34153), GIMT_Encode4(0),
12502 /* 34104 */ /*GILLT_v8s16*//*Label 820*/ GIMT_Encode4(34190),
12503 /* 34108 */ /*GILLT_v4s32*//*Label 821*/ GIMT_Encode4(34230),
12504 /* 34112 */ /*GILLT_v2s64*//*Label 822*/ GIMT_Encode4(34270),
12505 /* 34116 */ // Label 818: @34116
12506 /* 34116 */ GIM_Try, /*On fail goto*//*Label 824*/ GIMT_Encode4(34152), // Rule ID 128 //
12507 /* 34121 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12508 /* 34124 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
12509 /* 34127 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12510 /* 34131 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12511 /* 34135 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12512 /* 34139 */ // (fmul:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (MUL_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12513 /* 34139 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F32),
12514 /* 34144 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12515 /* 34150 */ GIR_RootConstrainSelectedInstOperands,
12516 /* 34151 */ // GIR_Coverage, 128,
12517 /* 34151 */ GIR_Done,
12518 /* 34152 */ // Label 824: @34152
12519 /* 34152 */ GIM_Reject,
12520 /* 34153 */ // Label 819: @34153
12521 /* 34153 */ GIM_Try, /*On fail goto*//*Label 825*/ GIMT_Encode4(34189), // Rule ID 129 //
12522 /* 34158 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12523 /* 34161 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
12524 /* 34164 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12525 /* 34168 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12526 /* 34172 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12527 /* 34176 */ // (fmul:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (MUL_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12528 /* 34176 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F64),
12529 /* 34181 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12530 /* 34187 */ GIR_RootConstrainSelectedInstOperands,
12531 /* 34188 */ // GIR_Coverage, 129,
12532 /* 34188 */ GIR_Done,
12533 /* 34189 */ // Label 825: @34189
12534 /* 34189 */ GIM_Reject,
12535 /* 34190 */ // Label 820: @34190
12536 /* 34190 */ GIM_Try, /*On fail goto*//*Label 826*/ GIMT_Encode4(34229), // Rule ID 353 //
12537 /* 34195 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12538 /* 34198 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12539 /* 34201 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12540 /* 34204 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12541 /* 34208 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12542 /* 34212 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12543 /* 34216 */ // (fmul:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (MUL_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12544 /* 34216 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F16x8),
12545 /* 34221 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12546 /* 34227 */ GIR_RootConstrainSelectedInstOperands,
12547 /* 34228 */ // GIR_Coverage, 353,
12548 /* 34228 */ GIR_Done,
12549 /* 34229 */ // Label 826: @34229
12550 /* 34229 */ GIM_Reject,
12551 /* 34230 */ // Label 821: @34230
12552 /* 34230 */ GIM_Try, /*On fail goto*//*Label 827*/ GIMT_Encode4(34269), // Rule ID 351 //
12553 /* 34235 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12554 /* 34238 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
12555 /* 34241 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
12556 /* 34244 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12557 /* 34248 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12558 /* 34252 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12559 /* 34256 */ // (fmul:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (MUL_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12560 /* 34256 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F32x4),
12561 /* 34261 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12562 /* 34267 */ GIR_RootConstrainSelectedInstOperands,
12563 /* 34268 */ // GIR_Coverage, 351,
12564 /* 34268 */ GIR_Done,
12565 /* 34269 */ // Label 827: @34269
12566 /* 34269 */ GIM_Reject,
12567 /* 34270 */ // Label 822: @34270
12568 /* 34270 */ GIM_Try, /*On fail goto*//*Label 828*/ GIMT_Encode4(34309), // Rule ID 352 //
12569 /* 34275 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12570 /* 34278 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
12571 /* 34281 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12572 /* 34284 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12573 /* 34288 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12574 /* 34292 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12575 /* 34296 */ // (fmul:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (MUL_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12576 /* 34296 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F64x2),
12577 /* 34301 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12578 /* 34307 */ GIR_RootConstrainSelectedInstOperands,
12579 /* 34308 */ // GIR_Coverage, 352,
12580 /* 34308 */ GIR_Done,
12581 /* 34309 */ // Label 828: @34309
12582 /* 34309 */ GIM_Reject,
12583 /* 34310 */ // Label 823: @34310
12584 /* 34310 */ GIM_Reject,
12585 /* 34311 */ // Label 41: @34311
12586 /* 34311 */ GIM_Try, /*On fail goto*//*Label 829*/ GIMT_Encode4(34474),
12587 /* 34316 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
12588 /* 34319 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12589 /* 34322 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12590 /* 34325 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8s16,
12591 /* 34328 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12592 /* 34332 */ GIM_Try, /*On fail goto*//*Label 830*/ GIMT_Encode4(34385), // Rule ID 456 //
12593 /* 34337 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12594 /* 34340 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12595 /* 34344 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FNEG),
12596 /* 34348 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
12597 /* 34352 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12598 /* 34357 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12599 /* 34361 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12600 /* 34365 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12601 /* 34367 */ // (fma:{ *:[v8f16] } (fneg:{ *:[v8f16] } V128:{ *:[v8f16] }:$a), V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (NMADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
12602 /* 34367 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F16x8),
12603 /* 34370 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12604 /* 34372 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // a
12605 /* 34376 */ GIR_RootToRootCopy, /*OpIdx*/2, // b
12606 /* 34378 */ GIR_RootToRootCopy, /*OpIdx*/3, // c
12607 /* 34380 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12608 /* 34383 */ GIR_RootConstrainSelectedInstOperands,
12609 /* 34384 */ // GIR_Coverage, 456,
12610 /* 34384 */ GIR_EraseRootFromParent_Done,
12611 /* 34385 */ // Label 830: @34385
12612 /* 34385 */ GIM_Try, /*On fail goto*//*Label 831*/ GIMT_Encode4(34473),
12613 /* 34390 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12614 /* 34394 */ GIM_Try, /*On fail goto*//*Label 832*/ GIMT_Encode4(34443), // Rule ID 1339 //
12615 /* 34399 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12616 /* 34402 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
12617 /* 34406 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FNEG),
12618 /* 34410 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
12619 /* 34414 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12620 /* 34419 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12621 /* 34423 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12622 /* 34425 */ // (fma:{ *:[v8f16] } V128:{ *:[v8f16] }:$b, (fneg:{ *:[v8f16] } V128:{ *:[v8f16] }:$a), V128:{ *:[v8f16] }:$c) => (NMADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
12623 /* 34425 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F16x8),
12624 /* 34428 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12625 /* 34430 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // a
12626 /* 34434 */ GIR_RootToRootCopy, /*OpIdx*/1, // b
12627 /* 34436 */ GIR_RootToRootCopy, /*OpIdx*/3, // c
12628 /* 34438 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12629 /* 34441 */ GIR_RootConstrainSelectedInstOperands,
12630 /* 34442 */ // GIR_Coverage, 1339,
12631 /* 34442 */ GIR_EraseRootFromParent_Done,
12632 /* 34443 */ // Label 832: @34443
12633 /* 34443 */ GIM_Try, /*On fail goto*//*Label 833*/ GIMT_Encode4(34472), // Rule ID 455 //
12634 /* 34448 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12635 /* 34451 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12636 /* 34455 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12637 /* 34459 */ // (fma:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (MADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
12638 /* 34459 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F16x8),
12639 /* 34464 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12640 /* 34470 */ GIR_RootConstrainSelectedInstOperands,
12641 /* 34471 */ // GIR_Coverage, 455,
12642 /* 34471 */ GIR_Done,
12643 /* 34472 */ // Label 833: @34472
12644 /* 34472 */ GIM_Reject,
12645 /* 34473 */ // Label 831: @34473
12646 /* 34473 */ GIM_Reject,
12647 /* 34474 */ // Label 829: @34474
12648 /* 34474 */ GIM_Reject,
12649 /* 34475 */ // Label 42: @34475
12650 /* 34475 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 839*/ GIMT_Encode4(34704),
12651 /* 34486 */ /*GILLT_s32*//*Label 834*/ GIMT_Encode4(34510),
12652 /* 34490 */ /*GILLT_s64*//*Label 835*/ GIMT_Encode4(34547), GIMT_Encode4(0),
12653 /* 34498 */ /*GILLT_v8s16*//*Label 836*/ GIMT_Encode4(34584),
12654 /* 34502 */ /*GILLT_v4s32*//*Label 837*/ GIMT_Encode4(34624),
12655 /* 34506 */ /*GILLT_v2s64*//*Label 838*/ GIMT_Encode4(34664),
12656 /* 34510 */ // Label 834: @34510
12657 /* 34510 */ GIM_Try, /*On fail goto*//*Label 840*/ GIMT_Encode4(34546), // Rule ID 130 //
12658 /* 34515 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12659 /* 34518 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
12660 /* 34521 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12661 /* 34525 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12662 /* 34529 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12663 /* 34533 */ // (fdiv:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (DIV_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12664 /* 34533 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F32),
12665 /* 34538 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12666 /* 34544 */ GIR_RootConstrainSelectedInstOperands,
12667 /* 34545 */ // GIR_Coverage, 130,
12668 /* 34545 */ GIR_Done,
12669 /* 34546 */ // Label 840: @34546
12670 /* 34546 */ GIM_Reject,
12671 /* 34547 */ // Label 835: @34547
12672 /* 34547 */ GIM_Try, /*On fail goto*//*Label 841*/ GIMT_Encode4(34583), // Rule ID 131 //
12673 /* 34552 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12674 /* 34555 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
12675 /* 34558 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12676 /* 34562 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12677 /* 34566 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12678 /* 34570 */ // (fdiv:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (DIV_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12679 /* 34570 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F64),
12680 /* 34575 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12681 /* 34581 */ GIR_RootConstrainSelectedInstOperands,
12682 /* 34582 */ // GIR_Coverage, 131,
12683 /* 34582 */ GIR_Done,
12684 /* 34583 */ // Label 841: @34583
12685 /* 34583 */ GIM_Reject,
12686 /* 34584 */ // Label 836: @34584
12687 /* 34584 */ GIM_Try, /*On fail goto*//*Label 842*/ GIMT_Encode4(34623), // Rule ID 356 //
12688 /* 34589 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12689 /* 34592 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12690 /* 34595 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
12691 /* 34598 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12692 /* 34602 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12693 /* 34606 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12694 /* 34610 */ // (fdiv:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (DIV_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12695 /* 34610 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F16x8),
12696 /* 34615 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12697 /* 34621 */ GIR_RootConstrainSelectedInstOperands,
12698 /* 34622 */ // GIR_Coverage, 356,
12699 /* 34622 */ GIR_Done,
12700 /* 34623 */ // Label 842: @34623
12701 /* 34623 */ GIM_Reject,
12702 /* 34624 */ // Label 837: @34624
12703 /* 34624 */ GIM_Try, /*On fail goto*//*Label 843*/ GIMT_Encode4(34663), // Rule ID 354 //
12704 /* 34629 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12705 /* 34632 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
12706 /* 34635 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
12707 /* 34638 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12708 /* 34642 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12709 /* 34646 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12710 /* 34650 */ // (fdiv:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (DIV_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12711 /* 34650 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F32x4),
12712 /* 34655 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12713 /* 34661 */ GIR_RootConstrainSelectedInstOperands,
12714 /* 34662 */ // GIR_Coverage, 354,
12715 /* 34662 */ GIR_Done,
12716 /* 34663 */ // Label 843: @34663
12717 /* 34663 */ GIM_Reject,
12718 /* 34664 */ // Label 838: @34664
12719 /* 34664 */ GIM_Try, /*On fail goto*//*Label 844*/ GIMT_Encode4(34703), // Rule ID 355 //
12720 /* 34669 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12721 /* 34672 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
12722 /* 34675 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
12723 /* 34678 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12724 /* 34682 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12725 /* 34686 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12726 /* 34690 */ // (fdiv:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (DIV_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12727 /* 34690 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F64x2),
12728 /* 34695 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12729 /* 34701 */ GIR_RootConstrainSelectedInstOperands,
12730 /* 34702 */ // GIR_Coverage, 355,
12731 /* 34702 */ GIR_Done,
12732 /* 34703 */ // Label 844: @34703
12733 /* 34703 */ GIM_Reject,
12734 /* 34704 */ // Label 839: @34704
12735 /* 34704 */ GIM_Reject,
12736 /* 34705 */ // Label 43: @34705
12737 /* 34705 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 850*/ GIMT_Encode4(34899),
12738 /* 34716 */ /*GILLT_s32*//*Label 845*/ GIMT_Encode4(34740),
12739 /* 34720 */ /*GILLT_s64*//*Label 846*/ GIMT_Encode4(34770), GIMT_Encode4(0),
12740 /* 34728 */ /*GILLT_v8s16*//*Label 847*/ GIMT_Encode4(34800),
12741 /* 34732 */ /*GILLT_v4s32*//*Label 848*/ GIMT_Encode4(34833),
12742 /* 34736 */ /*GILLT_v2s64*//*Label 849*/ GIMT_Encode4(34866),
12743 /* 34740 */ // Label 845: @34740
12744 /* 34740 */ GIM_Try, /*On fail goto*//*Label 851*/ GIMT_Encode4(34769), // Rule ID 136 //
12745 /* 34745 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12746 /* 34748 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12747 /* 34752 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12748 /* 34756 */ // (fneg:{ *:[f32] } F32:{ *:[f32] }:$src) => (NEG_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
12749 /* 34756 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F32),
12750 /* 34761 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12751 /* 34767 */ GIR_RootConstrainSelectedInstOperands,
12752 /* 34768 */ // GIR_Coverage, 136,
12753 /* 34768 */ GIR_Done,
12754 /* 34769 */ // Label 851: @34769
12755 /* 34769 */ GIM_Reject,
12756 /* 34770 */ // Label 846: @34770
12757 /* 34770 */ GIM_Try, /*On fail goto*//*Label 852*/ GIMT_Encode4(34799), // Rule ID 137 //
12758 /* 34775 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12759 /* 34778 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12760 /* 34782 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12761 /* 34786 */ // (fneg:{ *:[f64] } F64:{ *:[f64] }:$src) => (NEG_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
12762 /* 34786 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F64),
12763 /* 34791 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12764 /* 34797 */ GIR_RootConstrainSelectedInstOperands,
12765 /* 34798 */ // GIR_Coverage, 137,
12766 /* 34798 */ GIR_Done,
12767 /* 34799 */ // Label 852: @34799
12768 /* 34799 */ GIM_Reject,
12769 /* 34800 */ // Label 847: @34800
12770 /* 34800 */ GIM_Try, /*On fail goto*//*Label 853*/ GIMT_Encode4(34832), // Rule ID 329 //
12771 /* 34805 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12772 /* 34808 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12773 /* 34811 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12774 /* 34815 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12775 /* 34819 */ // (fneg:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (NEG_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
12776 /* 34819 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F16x8),
12777 /* 34824 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12778 /* 34830 */ GIR_RootConstrainSelectedInstOperands,
12779 /* 34831 */ // GIR_Coverage, 329,
12780 /* 34831 */ GIR_Done,
12781 /* 34832 */ // Label 853: @34832
12782 /* 34832 */ GIM_Reject,
12783 /* 34833 */ // Label 848: @34833
12784 /* 34833 */ GIM_Try, /*On fail goto*//*Label 854*/ GIMT_Encode4(34865), // Rule ID 327 //
12785 /* 34838 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12786 /* 34841 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
12787 /* 34844 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12788 /* 34848 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12789 /* 34852 */ // (fneg:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (NEG_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
12790 /* 34852 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F32x4),
12791 /* 34857 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12792 /* 34863 */ GIR_RootConstrainSelectedInstOperands,
12793 /* 34864 */ // GIR_Coverage, 327,
12794 /* 34864 */ GIR_Done,
12795 /* 34865 */ // Label 854: @34865
12796 /* 34865 */ GIM_Reject,
12797 /* 34866 */ // Label 849: @34866
12798 /* 34866 */ GIM_Try, /*On fail goto*//*Label 855*/ GIMT_Encode4(34898), // Rule ID 328 //
12799 /* 34871 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12800 /* 34874 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
12801 /* 34877 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12802 /* 34881 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12803 /* 34885 */ // (fneg:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (NEG_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
12804 /* 34885 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F64x2),
12805 /* 34890 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12806 /* 34896 */ GIR_RootConstrainSelectedInstOperands,
12807 /* 34897 */ // GIR_Coverage, 328,
12808 /* 34897 */ GIR_Done,
12809 /* 34898 */ // Label 855: @34898
12810 /* 34898 */ GIM_Reject,
12811 /* 34899 */ // Label 850: @34899
12812 /* 34899 */ GIM_Reject,
12813 /* 34900 */ // Label 44: @34900
12814 /* 34900 */ GIM_Try, /*On fail goto*//*Label 856*/ GIMT_Encode4(34932), // Rule ID 58 //
12815 /* 34905 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s64,
12816 /* 34908 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12817 /* 34911 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12818 /* 34915 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12819 /* 34919 */ // (fpextend:{ *:[f64] } F32:{ *:[f32] }:$src) => (F64_PROMOTE_F32:{ *:[f64] } F32:{ *:[f32] }:$src)
12820 /* 34919 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_PROMOTE_F32),
12821 /* 34924 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12822 /* 34930 */ GIR_RootConstrainSelectedInstOperands,
12823 /* 34931 */ // GIR_Coverage, 58,
12824 /* 34931 */ GIR_Done,
12825 /* 34932 */ // Label 856: @34932
12826 /* 34932 */ GIM_Reject,
12827 /* 34933 */ // Label 45: @34933
12828 /* 34933 */ GIM_Try, /*On fail goto*//*Label 857*/ GIMT_Encode4(34965), // Rule ID 59 //
12829 /* 34938 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
12830 /* 34941 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12831 /* 34944 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12832 /* 34948 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12833 /* 34952 */ // (fpround:{ *:[f32] } F64:{ *:[f64] }:$src) => (F32_DEMOTE_F64:{ *:[f32] } F64:{ *:[f64] }:$src)
12834 /* 34952 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_DEMOTE_F64),
12835 /* 34957 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12836 /* 34963 */ GIR_RootConstrainSelectedInstOperands,
12837 /* 34964 */ // GIR_Coverage, 59,
12838 /* 34964 */ GIR_Done,
12839 /* 34965 */ // Label 857: @34965
12840 /* 34965 */ GIM_Reject,
12841 /* 34966 */ // Label 46: @34966
12842 /* 34966 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 862*/ GIMT_Encode4(35321),
12843 /* 34977 */ /*GILLT_s32*//*Label 858*/ GIMT_Encode4(34997),
12844 /* 34981 */ /*GILLT_s64*//*Label 859*/ GIMT_Encode4(35126), GIMT_Encode4(0),
12845 /* 34989 */ /*GILLT_v8s16*//*Label 860*/ GIMT_Encode4(35255),
12846 /* 34993 */ /*GILLT_v4s32*//*Label 861*/ GIMT_Encode4(35288),
12847 /* 34997 */ // Label 858: @34997
12848 /* 34997 */ GIM_Try, /*On fail goto*//*Label 863*/ GIMT_Encode4(35029), // Rule ID 34 //
12849 /* 35002 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNontrappingFPToInt),
12850 /* 35005 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12851 /* 35008 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12852 /* 35012 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12853 /* 35016 */ // (fp_to_sint:{ *:[i32] } F32:{ *:[f32] }:$src) => (I32_TRUNC_S_SAT_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
12854 /* 35016 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_SAT_F32),
12855 /* 35021 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12856 /* 35027 */ GIR_RootConstrainSelectedInstOperands,
12857 /* 35028 */ // GIR_Coverage, 34,
12858 /* 35028 */ GIR_Done,
12859 /* 35029 */ // Label 863: @35029
12860 /* 35029 */ GIM_Try, /*On fail goto*//*Label 864*/ GIMT_Encode4(35061), // Rule ID 38 //
12861 /* 35034 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNontrappingFPToInt),
12862 /* 35037 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12863 /* 35040 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12864 /* 35044 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12865 /* 35048 */ // (fp_to_sint:{ *:[i32] } F64:{ *:[f64] }:$src) => (I32_TRUNC_S_SAT_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
12866 /* 35048 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_SAT_F64),
12867 /* 35053 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12868 /* 35059 */ GIR_RootConstrainSelectedInstOperands,
12869 /* 35060 */ // GIR_Coverage, 38,
12870 /* 35060 */ GIR_Done,
12871 /* 35061 */ // Label 864: @35061
12872 /* 35061 */ GIM_Try, /*On fail goto*//*Label 865*/ GIMT_Encode4(35093), // Rule ID 42 //
12873 /* 35066 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt),
12874 /* 35069 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12875 /* 35072 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12876 /* 35076 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12877 /* 35080 */ // (fp_to_sint:{ *:[i32] } F32:{ *:[f32] }:$src) => (FP_TO_SINT_I32_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
12878 /* 35080 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I32_F32),
12879 /* 35085 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12880 /* 35091 */ GIR_RootConstrainSelectedInstOperands,
12881 /* 35092 */ // GIR_Coverage, 42,
12882 /* 35092 */ GIR_Done,
12883 /* 35093 */ // Label 865: @35093
12884 /* 35093 */ GIM_Try, /*On fail goto*//*Label 866*/ GIMT_Encode4(35125), // Rule ID 46 //
12885 /* 35098 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt),
12886 /* 35101 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12887 /* 35104 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12888 /* 35108 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12889 /* 35112 */ // (fp_to_sint:{ *:[i32] } F64:{ *:[f64] }:$src) => (FP_TO_SINT_I32_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
12890 /* 35112 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I32_F64),
12891 /* 35117 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12892 /* 35123 */ GIR_RootConstrainSelectedInstOperands,
12893 /* 35124 */ // GIR_Coverage, 46,
12894 /* 35124 */ GIR_Done,
12895 /* 35125 */ // Label 866: @35125
12896 /* 35125 */ GIM_Reject,
12897 /* 35126 */ // Label 859: @35126
12898 /* 35126 */ GIM_Try, /*On fail goto*//*Label 867*/ GIMT_Encode4(35158), // Rule ID 36 //
12899 /* 35131 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNontrappingFPToInt),
12900 /* 35134 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12901 /* 35137 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12902 /* 35141 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12903 /* 35145 */ // (fp_to_sint:{ *:[i64] } F32:{ *:[f32] }:$src) => (I64_TRUNC_S_SAT_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
12904 /* 35145 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_SAT_F32),
12905 /* 35150 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12906 /* 35156 */ GIR_RootConstrainSelectedInstOperands,
12907 /* 35157 */ // GIR_Coverage, 36,
12908 /* 35157 */ GIR_Done,
12909 /* 35158 */ // Label 867: @35158
12910 /* 35158 */ GIM_Try, /*On fail goto*//*Label 868*/ GIMT_Encode4(35190), // Rule ID 40 //
12911 /* 35163 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNontrappingFPToInt),
12912 /* 35166 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12913 /* 35169 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12914 /* 35173 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12915 /* 35177 */ // (fp_to_sint:{ *:[i64] } F64:{ *:[f64] }:$src) => (I64_TRUNC_S_SAT_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
12916 /* 35177 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_SAT_F64),
12917 /* 35182 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12918 /* 35188 */ GIR_RootConstrainSelectedInstOperands,
12919 /* 35189 */ // GIR_Coverage, 40,
12920 /* 35189 */ GIR_Done,
12921 /* 35190 */ // Label 868: @35190
12922 /* 35190 */ GIM_Try, /*On fail goto*//*Label 869*/ GIMT_Encode4(35222), // Rule ID 44 //
12923 /* 35195 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt),
12924 /* 35198 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12925 /* 35201 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12926 /* 35205 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12927 /* 35209 */ // (fp_to_sint:{ *:[i64] } F32:{ *:[f32] }:$src) => (FP_TO_SINT_I64_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
12928 /* 35209 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I64_F32),
12929 /* 35214 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12930 /* 35220 */ GIR_RootConstrainSelectedInstOperands,
12931 /* 35221 */ // GIR_Coverage, 44,
12932 /* 35221 */ GIR_Done,
12933 /* 35222 */ // Label 869: @35222
12934 /* 35222 */ GIM_Try, /*On fail goto*//*Label 870*/ GIMT_Encode4(35254), // Rule ID 48 //
12935 /* 35227 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt),
12936 /* 35230 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12937 /* 35233 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12938 /* 35237 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12939 /* 35241 */ // (fp_to_sint:{ *:[i64] } F64:{ *:[f64] }:$src) => (FP_TO_SINT_I64_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
12940 /* 35241 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I64_F64),
12941 /* 35246 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12942 /* 35252 */ GIR_RootConstrainSelectedInstOperands,
12943 /* 35253 */ // GIR_Coverage, 48,
12944 /* 35253 */ GIR_Done,
12945 /* 35254 */ // Label 870: @35254
12946 /* 35254 */ GIM_Reject,
12947 /* 35255 */ // Label 860: @35255
12948 /* 35255 */ GIM_Try, /*On fail goto*//*Label 871*/ GIMT_Encode4(35287), // Rule ID 413 //
12949 /* 35260 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
12950 /* 35263 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
12951 /* 35266 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12952 /* 35270 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12953 /* 35274 */ // (fp_to_sint:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec) => (fp_to_sint_I16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec)
12954 /* 35274 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_sint_I16x8),
12955 /* 35279 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12956 /* 35285 */ GIR_RootConstrainSelectedInstOperands,
12957 /* 35286 */ // GIR_Coverage, 413,
12958 /* 35286 */ GIR_Done,
12959 /* 35287 */ // Label 871: @35287
12960 /* 35287 */ GIM_Reject,
12961 /* 35288 */ // Label 861: @35288
12962 /* 35288 */ GIM_Try, /*On fail goto*//*Label 872*/ GIMT_Encode4(35320), // Rule ID 411 //
12963 /* 35293 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
12964 /* 35296 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
12965 /* 35299 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12966 /* 35303 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12967 /* 35307 */ // (fp_to_sint:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec) => (fp_to_sint_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
12968 /* 35307 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_sint_I32x4),
12969 /* 35312 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12970 /* 35318 */ GIR_RootConstrainSelectedInstOperands,
12971 /* 35319 */ // GIR_Coverage, 411,
12972 /* 35319 */ GIR_Done,
12973 /* 35320 */ // Label 872: @35320
12974 /* 35320 */ GIM_Reject,
12975 /* 35321 */ // Label 862: @35321
12976 /* 35321 */ GIM_Reject,
12977 /* 35322 */ // Label 47: @35322
12978 /* 35322 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 877*/ GIMT_Encode4(35677),
12979 /* 35333 */ /*GILLT_s32*//*Label 873*/ GIMT_Encode4(35353),
12980 /* 35337 */ /*GILLT_s64*//*Label 874*/ GIMT_Encode4(35482), GIMT_Encode4(0),
12981 /* 35345 */ /*GILLT_v8s16*//*Label 875*/ GIMT_Encode4(35611),
12982 /* 35349 */ /*GILLT_v4s32*//*Label 876*/ GIMT_Encode4(35644),
12983 /* 35353 */ // Label 873: @35353
12984 /* 35353 */ GIM_Try, /*On fail goto*//*Label 878*/ GIMT_Encode4(35385), // Rule ID 35 //
12985 /* 35358 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNontrappingFPToInt),
12986 /* 35361 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
12987 /* 35364 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12988 /* 35368 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12989 /* 35372 */ // (fp_to_uint:{ *:[i32] } F32:{ *:[f32] }:$src) => (I32_TRUNC_U_SAT_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
12990 /* 35372 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_SAT_F32),
12991 /* 35377 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
12992 /* 35383 */ GIR_RootConstrainSelectedInstOperands,
12993 /* 35384 */ // GIR_Coverage, 35,
12994 /* 35384 */ GIR_Done,
12995 /* 35385 */ // Label 878: @35385
12996 /* 35385 */ GIM_Try, /*On fail goto*//*Label 879*/ GIMT_Encode4(35417), // Rule ID 39 //
12997 /* 35390 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNontrappingFPToInt),
12998 /* 35393 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
12999 /* 35396 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13000 /* 35400 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13001 /* 35404 */ // (fp_to_uint:{ *:[i32] } F64:{ *:[f64] }:$src) => (I32_TRUNC_U_SAT_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
13002 /* 35404 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_SAT_F64),
13003 /* 35409 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13004 /* 35415 */ GIR_RootConstrainSelectedInstOperands,
13005 /* 35416 */ // GIR_Coverage, 39,
13006 /* 35416 */ GIR_Done,
13007 /* 35417 */ // Label 879: @35417
13008 /* 35417 */ GIM_Try, /*On fail goto*//*Label 880*/ GIMT_Encode4(35449), // Rule ID 43 //
13009 /* 35422 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt),
13010 /* 35425 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13011 /* 35428 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13012 /* 35432 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13013 /* 35436 */ // (fp_to_uint:{ *:[i32] } F32:{ *:[f32] }:$src) => (FP_TO_UINT_I32_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
13014 /* 35436 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I32_F32),
13015 /* 35441 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13016 /* 35447 */ GIR_RootConstrainSelectedInstOperands,
13017 /* 35448 */ // GIR_Coverage, 43,
13018 /* 35448 */ GIR_Done,
13019 /* 35449 */ // Label 880: @35449
13020 /* 35449 */ GIM_Try, /*On fail goto*//*Label 881*/ GIMT_Encode4(35481), // Rule ID 47 //
13021 /* 35454 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt),
13022 /* 35457 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13023 /* 35460 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13024 /* 35464 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13025 /* 35468 */ // (fp_to_uint:{ *:[i32] } F64:{ *:[f64] }:$src) => (FP_TO_UINT_I32_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
13026 /* 35468 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I32_F64),
13027 /* 35473 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13028 /* 35479 */ GIR_RootConstrainSelectedInstOperands,
13029 /* 35480 */ // GIR_Coverage, 47,
13030 /* 35480 */ GIR_Done,
13031 /* 35481 */ // Label 881: @35481
13032 /* 35481 */ GIM_Reject,
13033 /* 35482 */ // Label 874: @35482
13034 /* 35482 */ GIM_Try, /*On fail goto*//*Label 882*/ GIMT_Encode4(35514), // Rule ID 37 //
13035 /* 35487 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNontrappingFPToInt),
13036 /* 35490 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13037 /* 35493 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13038 /* 35497 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13039 /* 35501 */ // (fp_to_uint:{ *:[i64] } F32:{ *:[f32] }:$src) => (I64_TRUNC_U_SAT_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
13040 /* 35501 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_SAT_F32),
13041 /* 35506 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13042 /* 35512 */ GIR_RootConstrainSelectedInstOperands,
13043 /* 35513 */ // GIR_Coverage, 37,
13044 /* 35513 */ GIR_Done,
13045 /* 35514 */ // Label 882: @35514
13046 /* 35514 */ GIM_Try, /*On fail goto*//*Label 883*/ GIMT_Encode4(35546), // Rule ID 41 //
13047 /* 35519 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasNontrappingFPToInt),
13048 /* 35522 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13049 /* 35525 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13050 /* 35529 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13051 /* 35533 */ // (fp_to_uint:{ *:[i64] } F64:{ *:[f64] }:$src) => (I64_TRUNC_U_SAT_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
13052 /* 35533 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_SAT_F64),
13053 /* 35538 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13054 /* 35544 */ GIR_RootConstrainSelectedInstOperands,
13055 /* 35545 */ // GIR_Coverage, 41,
13056 /* 35545 */ GIR_Done,
13057 /* 35546 */ // Label 883: @35546
13058 /* 35546 */ GIM_Try, /*On fail goto*//*Label 884*/ GIMT_Encode4(35578), // Rule ID 45 //
13059 /* 35551 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt),
13060 /* 35554 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13061 /* 35557 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13062 /* 35561 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13063 /* 35565 */ // (fp_to_uint:{ *:[i64] } F32:{ *:[f32] }:$src) => (FP_TO_UINT_I64_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
13064 /* 35565 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I64_F32),
13065 /* 35570 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13066 /* 35576 */ GIR_RootConstrainSelectedInstOperands,
13067 /* 35577 */ // GIR_Coverage, 45,
13068 /* 35577 */ GIR_Done,
13069 /* 35578 */ // Label 884: @35578
13070 /* 35578 */ GIM_Try, /*On fail goto*//*Label 885*/ GIMT_Encode4(35610), // Rule ID 49 //
13071 /* 35583 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt),
13072 /* 35586 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13073 /* 35589 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13074 /* 35593 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13075 /* 35597 */ // (fp_to_uint:{ *:[i64] } F64:{ *:[f64] }:$src) => (FP_TO_UINT_I64_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
13076 /* 35597 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I64_F64),
13077 /* 35602 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13078 /* 35608 */ GIR_RootConstrainSelectedInstOperands,
13079 /* 35609 */ // GIR_Coverage, 49,
13080 /* 35609 */ GIR_Done,
13081 /* 35610 */ // Label 885: @35610
13082 /* 35610 */ GIM_Reject,
13083 /* 35611 */ // Label 875: @35611
13084 /* 35611 */ GIM_Try, /*On fail goto*//*Label 886*/ GIMT_Encode4(35643), // Rule ID 414 //
13085 /* 35616 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
13086 /* 35619 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13087 /* 35622 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13088 /* 35626 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13089 /* 35630 */ // (fp_to_uint:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec) => (fp_to_uint_I16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec)
13090 /* 35630 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_uint_I16x8),
13091 /* 35635 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13092 /* 35641 */ GIR_RootConstrainSelectedInstOperands,
13093 /* 35642 */ // GIR_Coverage, 414,
13094 /* 35642 */ GIR_Done,
13095 /* 35643 */ // Label 886: @35643
13096 /* 35643 */ GIM_Reject,
13097 /* 35644 */ // Label 876: @35644
13098 /* 35644 */ GIM_Try, /*On fail goto*//*Label 887*/ GIMT_Encode4(35676), // Rule ID 412 //
13099 /* 35649 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13100 /* 35652 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13101 /* 35655 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13102 /* 35659 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13103 /* 35663 */ // (fp_to_uint:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec) => (fp_to_uint_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
13104 /* 35663 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_uint_I32x4),
13105 /* 35668 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13106 /* 35674 */ GIR_RootConstrainSelectedInstOperands,
13107 /* 35675 */ // GIR_Coverage, 412,
13108 /* 35675 */ GIR_Done,
13109 /* 35676 */ // Label 887: @35676
13110 /* 35676 */ GIM_Reject,
13111 /* 35677 */ // Label 877: @35677
13112 /* 35677 */ GIM_Reject,
13113 /* 35678 */ // Label 48: @35678
13114 /* 35678 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 892*/ GIMT_Encode4(35893),
13115 /* 35689 */ /*GILLT_s32*//*Label 888*/ GIMT_Encode4(35709),
13116 /* 35693 */ /*GILLT_s64*//*Label 889*/ GIMT_Encode4(35768), GIMT_Encode4(0),
13117 /* 35701 */ /*GILLT_v8s16*//*Label 890*/ GIMT_Encode4(35827),
13118 /* 35705 */ /*GILLT_v4s32*//*Label 891*/ GIMT_Encode4(35860),
13119 /* 35709 */ // Label 888: @35709
13120 /* 35709 */ GIM_Try, /*On fail goto*//*Label 893*/ GIMT_Encode4(35738), // Rule ID 50 //
13121 /* 35714 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13122 /* 35717 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13123 /* 35721 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13124 /* 35725 */ // (sint_to_fp:{ *:[f32] } I32:{ *:[i32] }:$src) => (F32_CONVERT_S_I32:{ *:[f32] } I32:{ *:[i32] }:$src)
13125 /* 35725 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_S_I32),
13126 /* 35730 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13127 /* 35736 */ GIR_RootConstrainSelectedInstOperands,
13128 /* 35737 */ // GIR_Coverage, 50,
13129 /* 35737 */ GIR_Done,
13130 /* 35738 */ // Label 893: @35738
13131 /* 35738 */ GIM_Try, /*On fail goto*//*Label 894*/ GIMT_Encode4(35767), // Rule ID 54 //
13132 /* 35743 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13133 /* 35746 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13134 /* 35750 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13135 /* 35754 */ // (sint_to_fp:{ *:[f32] } I64:{ *:[i64] }:$src) => (F32_CONVERT_S_I64:{ *:[f32] } I64:{ *:[i64] }:$src)
13136 /* 35754 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_S_I64),
13137 /* 35759 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13138 /* 35765 */ GIR_RootConstrainSelectedInstOperands,
13139 /* 35766 */ // GIR_Coverage, 54,
13140 /* 35766 */ GIR_Done,
13141 /* 35767 */ // Label 894: @35767
13142 /* 35767 */ GIM_Reject,
13143 /* 35768 */ // Label 889: @35768
13144 /* 35768 */ GIM_Try, /*On fail goto*//*Label 895*/ GIMT_Encode4(35797), // Rule ID 52 //
13145 /* 35773 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13146 /* 35776 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13147 /* 35780 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13148 /* 35784 */ // (sint_to_fp:{ *:[f64] } I32:{ *:[i32] }:$src) => (F64_CONVERT_S_I32:{ *:[f64] } I32:{ *:[i32] }:$src)
13149 /* 35784 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_S_I32),
13150 /* 35789 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13151 /* 35795 */ GIR_RootConstrainSelectedInstOperands,
13152 /* 35796 */ // GIR_Coverage, 52,
13153 /* 35796 */ GIR_Done,
13154 /* 35797 */ // Label 895: @35797
13155 /* 35797 */ GIM_Try, /*On fail goto*//*Label 896*/ GIMT_Encode4(35826), // Rule ID 56 //
13156 /* 35802 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13157 /* 35805 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13158 /* 35809 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13159 /* 35813 */ // (sint_to_fp:{ *:[f64] } I64:{ *:[i64] }:$src) => (F64_CONVERT_S_I64:{ *:[f64] } I64:{ *:[i64] }:$src)
13160 /* 35813 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_S_I64),
13161 /* 35818 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13162 /* 35824 */ GIR_RootConstrainSelectedInstOperands,
13163 /* 35825 */ // GIR_Coverage, 56,
13164 /* 35825 */ GIR_Done,
13165 /* 35826 */ // Label 896: @35826
13166 /* 35826 */ GIM_Reject,
13167 /* 35827 */ // Label 890: @35827
13168 /* 35827 */ GIM_Try, /*On fail goto*//*Label 897*/ GIMT_Encode4(35859), // Rule ID 421 //
13169 /* 35832 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
13170 /* 35835 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13171 /* 35838 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13172 /* 35842 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13173 /* 35846 */ // (sint_to_fp:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec) => (sint_to_fp_F16x8:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec)
13174 /* 35846 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::sint_to_fp_F16x8),
13175 /* 35851 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13176 /* 35857 */ GIR_RootConstrainSelectedInstOperands,
13177 /* 35858 */ // GIR_Coverage, 421,
13178 /* 35858 */ GIR_Done,
13179 /* 35859 */ // Label 897: @35859
13180 /* 35859 */ GIM_Reject,
13181 /* 35860 */ // Label 891: @35860
13182 /* 35860 */ GIM_Try, /*On fail goto*//*Label 898*/ GIMT_Encode4(35892), // Rule ID 417 //
13183 /* 35865 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13184 /* 35868 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13185 /* 35871 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13186 /* 35875 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13187 /* 35879 */ // (sint_to_fp:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec) => (sint_to_fp_F32x4:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec)
13188 /* 35879 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::sint_to_fp_F32x4),
13189 /* 35884 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13190 /* 35890 */ GIR_RootConstrainSelectedInstOperands,
13191 /* 35891 */ // GIR_Coverage, 417,
13192 /* 35891 */ GIR_Done,
13193 /* 35892 */ // Label 898: @35892
13194 /* 35892 */ GIM_Reject,
13195 /* 35893 */ // Label 892: @35893
13196 /* 35893 */ GIM_Reject,
13197 /* 35894 */ // Label 49: @35894
13198 /* 35894 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(5), /*)*//*default:*//*Label 903*/ GIMT_Encode4(36109),
13199 /* 35905 */ /*GILLT_s32*//*Label 899*/ GIMT_Encode4(35925),
13200 /* 35909 */ /*GILLT_s64*//*Label 900*/ GIMT_Encode4(35984), GIMT_Encode4(0),
13201 /* 35917 */ /*GILLT_v8s16*//*Label 901*/ GIMT_Encode4(36043),
13202 /* 35921 */ /*GILLT_v4s32*//*Label 902*/ GIMT_Encode4(36076),
13203 /* 35925 */ // Label 899: @35925
13204 /* 35925 */ GIM_Try, /*On fail goto*//*Label 904*/ GIMT_Encode4(35954), // Rule ID 51 //
13205 /* 35930 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13206 /* 35933 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13207 /* 35937 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13208 /* 35941 */ // (uint_to_fp:{ *:[f32] } I32:{ *:[i32] }:$src) => (F32_CONVERT_U_I32:{ *:[f32] } I32:{ *:[i32] }:$src)
13209 /* 35941 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_U_I32),
13210 /* 35946 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13211 /* 35952 */ GIR_RootConstrainSelectedInstOperands,
13212 /* 35953 */ // GIR_Coverage, 51,
13213 /* 35953 */ GIR_Done,
13214 /* 35954 */ // Label 904: @35954
13215 /* 35954 */ GIM_Try, /*On fail goto*//*Label 905*/ GIMT_Encode4(35983), // Rule ID 55 //
13216 /* 35959 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13217 /* 35962 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13218 /* 35966 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13219 /* 35970 */ // (uint_to_fp:{ *:[f32] } I64:{ *:[i64] }:$src) => (F32_CONVERT_U_I64:{ *:[f32] } I64:{ *:[i64] }:$src)
13220 /* 35970 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_U_I64),
13221 /* 35975 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13222 /* 35981 */ GIR_RootConstrainSelectedInstOperands,
13223 /* 35982 */ // GIR_Coverage, 55,
13224 /* 35982 */ GIR_Done,
13225 /* 35983 */ // Label 905: @35983
13226 /* 35983 */ GIM_Reject,
13227 /* 35984 */ // Label 900: @35984
13228 /* 35984 */ GIM_Try, /*On fail goto*//*Label 906*/ GIMT_Encode4(36013), // Rule ID 53 //
13229 /* 35989 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13230 /* 35992 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13231 /* 35996 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13232 /* 36000 */ // (uint_to_fp:{ *:[f64] } I32:{ *:[i32] }:$src) => (F64_CONVERT_U_I32:{ *:[f64] } I32:{ *:[i32] }:$src)
13233 /* 36000 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_U_I32),
13234 /* 36005 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13235 /* 36011 */ GIR_RootConstrainSelectedInstOperands,
13236 /* 36012 */ // GIR_Coverage, 53,
13237 /* 36012 */ GIR_Done,
13238 /* 36013 */ // Label 906: @36013
13239 /* 36013 */ GIM_Try, /*On fail goto*//*Label 907*/ GIMT_Encode4(36042), // Rule ID 57 //
13240 /* 36018 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13241 /* 36021 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13242 /* 36025 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13243 /* 36029 */ // (uint_to_fp:{ *:[f64] } I64:{ *:[i64] }:$src) => (F64_CONVERT_U_I64:{ *:[f64] } I64:{ *:[i64] }:$src)
13244 /* 36029 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_U_I64),
13245 /* 36034 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13246 /* 36040 */ GIR_RootConstrainSelectedInstOperands,
13247 /* 36041 */ // GIR_Coverage, 57,
13248 /* 36041 */ GIR_Done,
13249 /* 36042 */ // Label 907: @36042
13250 /* 36042 */ GIM_Reject,
13251 /* 36043 */ // Label 901: @36043
13252 /* 36043 */ GIM_Try, /*On fail goto*//*Label 908*/ GIMT_Encode4(36075), // Rule ID 422 //
13253 /* 36048 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
13254 /* 36051 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13255 /* 36054 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13256 /* 36058 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13257 /* 36062 */ // (uint_to_fp:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec) => (uint_to_fp_F16x8:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec)
13258 /* 36062 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::uint_to_fp_F16x8),
13259 /* 36067 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13260 /* 36073 */ GIR_RootConstrainSelectedInstOperands,
13261 /* 36074 */ // GIR_Coverage, 422,
13262 /* 36074 */ GIR_Done,
13263 /* 36075 */ // Label 908: @36075
13264 /* 36075 */ GIM_Reject,
13265 /* 36076 */ // Label 902: @36076
13266 /* 36076 */ GIM_Try, /*On fail goto*//*Label 909*/ GIMT_Encode4(36108), // Rule ID 418 //
13267 /* 36081 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13268 /* 36084 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13269 /* 36087 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13270 /* 36091 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13271 /* 36095 */ // (uint_to_fp:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec) => (uint_to_fp_F32x4:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec)
13272 /* 36095 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::uint_to_fp_F32x4),
13273 /* 36100 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13274 /* 36106 */ GIR_RootConstrainSelectedInstOperands,
13275 /* 36107 */ // GIR_Coverage, 418,
13276 /* 36107 */ GIR_Done,
13277 /* 36108 */ // Label 909: @36108
13278 /* 36108 */ GIM_Reject,
13279 /* 36109 */ // Label 903: @36109
13280 /* 36109 */ GIM_Reject,
13281 /* 36110 */ // Label 50: @36110
13282 /* 36110 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 915*/ GIMT_Encode4(36304),
13283 /* 36121 */ /*GILLT_s32*//*Label 910*/ GIMT_Encode4(36145),
13284 /* 36125 */ /*GILLT_s64*//*Label 911*/ GIMT_Encode4(36175), GIMT_Encode4(0),
13285 /* 36133 */ /*GILLT_v8s16*//*Label 912*/ GIMT_Encode4(36205),
13286 /* 36137 */ /*GILLT_v4s32*//*Label 913*/ GIMT_Encode4(36238),
13287 /* 36141 */ /*GILLT_v2s64*//*Label 914*/ GIMT_Encode4(36271),
13288 /* 36145 */ // Label 910: @36145
13289 /* 36145 */ GIM_Try, /*On fail goto*//*Label 916*/ GIMT_Encode4(36174), // Rule ID 134 //
13290 /* 36150 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13291 /* 36153 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13292 /* 36157 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13293 /* 36161 */ // (fabs:{ *:[f32] } F32:{ *:[f32] }:$src) => (ABS_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
13294 /* 36161 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F32),
13295 /* 36166 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13296 /* 36172 */ GIR_RootConstrainSelectedInstOperands,
13297 /* 36173 */ // GIR_Coverage, 134,
13298 /* 36173 */ GIR_Done,
13299 /* 36174 */ // Label 916: @36174
13300 /* 36174 */ GIM_Reject,
13301 /* 36175 */ // Label 911: @36175
13302 /* 36175 */ GIM_Try, /*On fail goto*//*Label 917*/ GIMT_Encode4(36204), // Rule ID 135 //
13303 /* 36180 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13304 /* 36183 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13305 /* 36187 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13306 /* 36191 */ // (fabs:{ *:[f64] } F64:{ *:[f64] }:$src) => (ABS_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
13307 /* 36191 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F64),
13308 /* 36196 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13309 /* 36202 */ GIR_RootConstrainSelectedInstOperands,
13310 /* 36203 */ // GIR_Coverage, 135,
13311 /* 36203 */ GIR_Done,
13312 /* 36204 */ // Label 917: @36204
13313 /* 36204 */ GIM_Reject,
13314 /* 36205 */ // Label 912: @36205
13315 /* 36205 */ GIM_Try, /*On fail goto*//*Label 918*/ GIMT_Encode4(36237), // Rule ID 326 //
13316 /* 36210 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
13317 /* 36213 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13318 /* 36216 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13319 /* 36220 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13320 /* 36224 */ // (fabs:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (ABS_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
13321 /* 36224 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F16x8),
13322 /* 36229 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13323 /* 36235 */ GIR_RootConstrainSelectedInstOperands,
13324 /* 36236 */ // GIR_Coverage, 326,
13325 /* 36236 */ GIR_Done,
13326 /* 36237 */ // Label 918: @36237
13327 /* 36237 */ GIM_Reject,
13328 /* 36238 */ // Label 913: @36238
13329 /* 36238 */ GIM_Try, /*On fail goto*//*Label 919*/ GIMT_Encode4(36270), // Rule ID 324 //
13330 /* 36243 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13331 /* 36246 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13332 /* 36249 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13333 /* 36253 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13334 /* 36257 */ // (fabs:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (ABS_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
13335 /* 36257 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F32x4),
13336 /* 36262 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13337 /* 36268 */ GIR_RootConstrainSelectedInstOperands,
13338 /* 36269 */ // GIR_Coverage, 324,
13339 /* 36269 */ GIR_Done,
13340 /* 36270 */ // Label 919: @36270
13341 /* 36270 */ GIM_Reject,
13342 /* 36271 */ // Label 914: @36271
13343 /* 36271 */ GIM_Try, /*On fail goto*//*Label 920*/ GIMT_Encode4(36303), // Rule ID 325 //
13344 /* 36276 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13345 /* 36279 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
13346 /* 36282 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13347 /* 36286 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13348 /* 36290 */ // (fabs:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (ABS_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
13349 /* 36290 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F64x2),
13350 /* 36295 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13351 /* 36301 */ GIR_RootConstrainSelectedInstOperands,
13352 /* 36302 */ // GIR_Coverage, 325,
13353 /* 36302 */ GIR_Done,
13354 /* 36303 */ // Label 920: @36303
13355 /* 36303 */ GIM_Reject,
13356 /* 36304 */ // Label 915: @36304
13357 /* 36304 */ GIM_Reject,
13358 /* 36305 */ // Label 51: @36305
13359 /* 36305 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 923*/ GIMT_Encode4(36522),
13360 /* 36316 */ /*GILLT_s32*//*Label 921*/ GIMT_Encode4(36324),
13361 /* 36320 */ /*GILLT_s64*//*Label 922*/ GIMT_Encode4(36423),
13362 /* 36324 */ // Label 921: @36324
13363 /* 36324 */ GIM_Try, /*On fail goto*//*Label 924*/ GIMT_Encode4(36422),
13364 /* 36329 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13365 /* 36332 */ GIM_Try, /*On fail goto*//*Label 925*/ GIMT_Encode4(36365), // Rule ID 138 //
13366 /* 36337 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
13367 /* 36340 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13368 /* 36344 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13369 /* 36348 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13370 /* 36352 */ // (fcopysign:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (COPYSIGN_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
13371 /* 36352 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F32),
13372 /* 36357 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13373 /* 36363 */ GIR_RootConstrainSelectedInstOperands,
13374 /* 36364 */ // GIR_Coverage, 138,
13375 /* 36364 */ GIR_Done,
13376 /* 36365 */ // Label 925: @36365
13377 /* 36365 */ GIM_Try, /*On fail goto*//*Label 926*/ GIMT_Encode4(36421), // Rule ID 672 //
13378 /* 36370 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
13379 /* 36373 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13380 /* 36377 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13381 /* 36381 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13382 /* 36385 */ // (fcopysign:{ *:[f32] } F32:{ *:[f32] }:$lhs, F64:{ *:[f64] }:$rhs) => (COPYSIGN_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, (F32_DEMOTE_F64:{ *:[f32] } F64:{ *:[f64] }:$rhs))
13383 /* 36385 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
13384 /* 36388 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::F32_DEMOTE_F64),
13385 /* 36392 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
13386 /* 36397 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // rhs
13387 /* 36401 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13388 /* 36404 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
13389 /* 36406 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F32),
13390 /* 36409 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13391 /* 36411 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
13392 /* 36413 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
13393 /* 36416 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13394 /* 36419 */ GIR_RootConstrainSelectedInstOperands,
13395 /* 36420 */ // GIR_Coverage, 672,
13396 /* 36420 */ GIR_EraseRootFromParent_Done,
13397 /* 36421 */ // Label 926: @36421
13398 /* 36421 */ GIM_Reject,
13399 /* 36422 */ // Label 924: @36422
13400 /* 36422 */ GIM_Reject,
13401 /* 36423 */ // Label 922: @36423
13402 /* 36423 */ GIM_Try, /*On fail goto*//*Label 927*/ GIMT_Encode4(36521),
13403 /* 36428 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13404 /* 36431 */ GIM_Try, /*On fail goto*//*Label 928*/ GIMT_Encode4(36464), // Rule ID 139 //
13405 /* 36436 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
13406 /* 36439 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13407 /* 36443 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13408 /* 36447 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13409 /* 36451 */ // (fcopysign:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (COPYSIGN_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
13410 /* 36451 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F64),
13411 /* 36456 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13412 /* 36462 */ GIR_RootConstrainSelectedInstOperands,
13413 /* 36463 */ // GIR_Coverage, 139,
13414 /* 36463 */ GIR_Done,
13415 /* 36464 */ // Label 928: @36464
13416 /* 36464 */ GIM_Try, /*On fail goto*//*Label 929*/ GIMT_Encode4(36520), // Rule ID 671 //
13417 /* 36469 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
13418 /* 36472 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13419 /* 36476 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13420 /* 36480 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13421 /* 36484 */ // (fcopysign:{ *:[f64] } F64:{ *:[f64] }:$lhs, F32:{ *:[f32] }:$rhs) => (COPYSIGN_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, (F64_PROMOTE_F32:{ *:[f64] } F32:{ *:[f32] }:$rhs))
13422 /* 36484 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
13423 /* 36487 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::F64_PROMOTE_F32),
13424 /* 36491 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
13425 /* 36496 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // rhs
13426 /* 36500 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13427 /* 36503 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
13428 /* 36505 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F64),
13429 /* 36508 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13430 /* 36510 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
13431 /* 36512 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
13432 /* 36515 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13433 /* 36518 */ GIR_RootConstrainSelectedInstOperands,
13434 /* 36519 */ // GIR_Coverage, 671,
13435 /* 36519 */ GIR_EraseRootFromParent_Done,
13436 /* 36520 */ // Label 929: @36520
13437 /* 36520 */ GIM_Reject,
13438 /* 36521 */ // Label 927: @36521
13439 /* 36521 */ GIM_Reject,
13440 /* 36522 */ // Label 923: @36522
13441 /* 36522 */ GIM_Reject,
13442 /* 36523 */ // Label 52: @36523
13443 /* 36523 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 935*/ GIMT_Encode4(36752),
13444 /* 36534 */ /*GILLT_s32*//*Label 930*/ GIMT_Encode4(36558),
13445 /* 36538 */ /*GILLT_s64*//*Label 931*/ GIMT_Encode4(36595), GIMT_Encode4(0),
13446 /* 36546 */ /*GILLT_v8s16*//*Label 932*/ GIMT_Encode4(36632),
13447 /* 36550 */ /*GILLT_v4s32*//*Label 933*/ GIMT_Encode4(36672),
13448 /* 36554 */ /*GILLT_v2s64*//*Label 934*/ GIMT_Encode4(36712),
13449 /* 36558 */ // Label 930: @36558
13450 /* 36558 */ GIM_Try, /*On fail goto*//*Label 936*/ GIMT_Encode4(36594), // Rule ID 140 //
13451 /* 36563 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13452 /* 36566 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
13453 /* 36569 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13454 /* 36573 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13455 /* 36577 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13456 /* 36581 */ // (fminimum:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (MIN_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
13457 /* 36581 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F32),
13458 /* 36586 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13459 /* 36592 */ GIR_RootConstrainSelectedInstOperands,
13460 /* 36593 */ // GIR_Coverage, 140,
13461 /* 36593 */ GIR_Done,
13462 /* 36594 */ // Label 936: @36594
13463 /* 36594 */ GIM_Reject,
13464 /* 36595 */ // Label 931: @36595
13465 /* 36595 */ GIM_Try, /*On fail goto*//*Label 937*/ GIMT_Encode4(36631), // Rule ID 141 //
13466 /* 36600 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13467 /* 36603 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
13468 /* 36606 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13469 /* 36610 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13470 /* 36614 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13471 /* 36618 */ // (fminimum:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (MIN_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
13472 /* 36618 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F64),
13473 /* 36623 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13474 /* 36629 */ GIR_RootConstrainSelectedInstOperands,
13475 /* 36630 */ // GIR_Coverage, 141,
13476 /* 36630 */ GIR_Done,
13477 /* 36631 */ // Label 937: @36631
13478 /* 36631 */ GIM_Reject,
13479 /* 36632 */ // Label 932: @36632
13480 /* 36632 */ GIM_Try, /*On fail goto*//*Label 938*/ GIMT_Encode4(36671), // Rule ID 359 //
13481 /* 36637 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
13482 /* 36640 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13483 /* 36643 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
13484 /* 36646 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13485 /* 36650 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13486 /* 36654 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13487 /* 36658 */ // (fminimum:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (MIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
13488 /* 36658 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F16x8),
13489 /* 36663 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13490 /* 36669 */ GIR_RootConstrainSelectedInstOperands,
13491 /* 36670 */ // GIR_Coverage, 359,
13492 /* 36670 */ GIR_Done,
13493 /* 36671 */ // Label 938: @36671
13494 /* 36671 */ GIM_Reject,
13495 /* 36672 */ // Label 933: @36672
13496 /* 36672 */ GIM_Try, /*On fail goto*//*Label 939*/ GIMT_Encode4(36711), // Rule ID 357 //
13497 /* 36677 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13498 /* 36680 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13499 /* 36683 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13500 /* 36686 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13501 /* 36690 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13502 /* 36694 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13503 /* 36698 */ // (fminimum:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (MIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
13504 /* 36698 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F32x4),
13505 /* 36703 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13506 /* 36709 */ GIR_RootConstrainSelectedInstOperands,
13507 /* 36710 */ // GIR_Coverage, 357,
13508 /* 36710 */ GIR_Done,
13509 /* 36711 */ // Label 939: @36711
13510 /* 36711 */ GIM_Reject,
13511 /* 36712 */ // Label 934: @36712
13512 /* 36712 */ GIM_Try, /*On fail goto*//*Label 940*/ GIMT_Encode4(36751), // Rule ID 358 //
13513 /* 36717 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13514 /* 36720 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
13515 /* 36723 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
13516 /* 36726 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13517 /* 36730 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13518 /* 36734 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13519 /* 36738 */ // (fminimum:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (MIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
13520 /* 36738 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F64x2),
13521 /* 36743 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13522 /* 36749 */ GIR_RootConstrainSelectedInstOperands,
13523 /* 36750 */ // GIR_Coverage, 358,
13524 /* 36750 */ GIR_Done,
13525 /* 36751 */ // Label 940: @36751
13526 /* 36751 */ GIM_Reject,
13527 /* 36752 */ // Label 935: @36752
13528 /* 36752 */ GIM_Reject,
13529 /* 36753 */ // Label 53: @36753
13530 /* 36753 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 946*/ GIMT_Encode4(36982),
13531 /* 36764 */ /*GILLT_s32*//*Label 941*/ GIMT_Encode4(36788),
13532 /* 36768 */ /*GILLT_s64*//*Label 942*/ GIMT_Encode4(36825), GIMT_Encode4(0),
13533 /* 36776 */ /*GILLT_v8s16*//*Label 943*/ GIMT_Encode4(36862),
13534 /* 36780 */ /*GILLT_v4s32*//*Label 944*/ GIMT_Encode4(36902),
13535 /* 36784 */ /*GILLT_v2s64*//*Label 945*/ GIMT_Encode4(36942),
13536 /* 36788 */ // Label 941: @36788
13537 /* 36788 */ GIM_Try, /*On fail goto*//*Label 947*/ GIMT_Encode4(36824), // Rule ID 142 //
13538 /* 36793 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
13539 /* 36796 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
13540 /* 36799 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13541 /* 36803 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13542 /* 36807 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13543 /* 36811 */ // (fmaximum:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (MAX_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
13544 /* 36811 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F32),
13545 /* 36816 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13546 /* 36822 */ GIR_RootConstrainSelectedInstOperands,
13547 /* 36823 */ // GIR_Coverage, 142,
13548 /* 36823 */ GIR_Done,
13549 /* 36824 */ // Label 947: @36824
13550 /* 36824 */ GIM_Reject,
13551 /* 36825 */ // Label 942: @36825
13552 /* 36825 */ GIM_Try, /*On fail goto*//*Label 948*/ GIMT_Encode4(36861), // Rule ID 143 //
13553 /* 36830 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
13554 /* 36833 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
13555 /* 36836 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13556 /* 36840 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13557 /* 36844 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13558 /* 36848 */ // (fmaximum:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (MAX_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
13559 /* 36848 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F64),
13560 /* 36853 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13561 /* 36859 */ GIR_RootConstrainSelectedInstOperands,
13562 /* 36860 */ // GIR_Coverage, 143,
13563 /* 36860 */ GIR_Done,
13564 /* 36861 */ // Label 948: @36861
13565 /* 36861 */ GIM_Reject,
13566 /* 36862 */ // Label 943: @36862
13567 /* 36862 */ GIM_Try, /*On fail goto*//*Label 949*/ GIMT_Encode4(36901), // Rule ID 362 //
13568 /* 36867 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
13569 /* 36870 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13570 /* 36873 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
13571 /* 36876 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13572 /* 36880 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13573 /* 36884 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13574 /* 36888 */ // (fmaximum:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (MAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
13575 /* 36888 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F16x8),
13576 /* 36893 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13577 /* 36899 */ GIR_RootConstrainSelectedInstOperands,
13578 /* 36900 */ // GIR_Coverage, 362,
13579 /* 36900 */ GIR_Done,
13580 /* 36901 */ // Label 949: @36901
13581 /* 36901 */ GIM_Reject,
13582 /* 36902 */ // Label 944: @36902
13583 /* 36902 */ GIM_Try, /*On fail goto*//*Label 950*/ GIMT_Encode4(36941), // Rule ID 360 //
13584 /* 36907 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13585 /* 36910 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13586 /* 36913 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13587 /* 36916 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13588 /* 36920 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13589 /* 36924 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13590 /* 36928 */ // (fmaximum:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (MAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
13591 /* 36928 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F32x4),
13592 /* 36933 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13593 /* 36939 */ GIR_RootConstrainSelectedInstOperands,
13594 /* 36940 */ // GIR_Coverage, 360,
13595 /* 36940 */ GIR_Done,
13596 /* 36941 */ // Label 950: @36941
13597 /* 36941 */ GIM_Reject,
13598 /* 36942 */ // Label 945: @36942
13599 /* 36942 */ GIM_Try, /*On fail goto*//*Label 951*/ GIMT_Encode4(36981), // Rule ID 361 //
13600 /* 36947 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13601 /* 36950 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
13602 /* 36953 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2s64,
13603 /* 36956 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13604 /* 36960 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13605 /* 36964 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13606 /* 36968 */ // (fmaximum:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (MAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
13607 /* 36968 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F64x2),
13608 /* 36973 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13609 /* 36979 */ GIR_RootConstrainSelectedInstOperands,
13610 /* 36980 */ // GIR_Coverage, 361,
13611 /* 36980 */ GIR_Done,
13612 /* 36981 */ // Label 951: @36981
13613 /* 36981 */ GIM_Reject,
13614 /* 36982 */ // Label 946: @36982
13615 /* 36982 */ GIM_Reject,
13616 /* 36983 */ // Label 54: @36983
13617 /* 36983 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(5), /*)*//*default:*//*Label 955*/ GIMT_Encode4(37126),
13618 /* 36994 */ /*GILLT_v16s8*//*Label 952*/ GIMT_Encode4(37006),
13619 /* 36998 */ /*GILLT_v8s16*//*Label 953*/ GIMT_Encode4(37046),
13620 /* 37002 */ /*GILLT_v4s32*//*Label 954*/ GIMT_Encode4(37086),
13621 /* 37006 */ // Label 952: @37006
13622 /* 37006 */ GIM_Try, /*On fail goto*//*Label 956*/ GIMT_Encode4(37045), // Rule ID 297 //
13623 /* 37011 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13624 /* 37014 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
13625 /* 37017 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
13626 /* 37020 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13627 /* 37024 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13628 /* 37028 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13629 /* 37032 */ // (smin:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MIN_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
13630 /* 37032 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_S_I8x16),
13631 /* 37037 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13632 /* 37043 */ GIR_RootConstrainSelectedInstOperands,
13633 /* 37044 */ // GIR_Coverage, 297,
13634 /* 37044 */ GIR_Done,
13635 /* 37045 */ // Label 956: @37045
13636 /* 37045 */ GIM_Reject,
13637 /* 37046 */ // Label 953: @37046
13638 /* 37046 */ GIM_Try, /*On fail goto*//*Label 957*/ GIMT_Encode4(37085), // Rule ID 298 //
13639 /* 37051 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13640 /* 37054 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13641 /* 37057 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
13642 /* 37060 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13643 /* 37064 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13644 /* 37068 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13645 /* 37072 */ // (smin:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MIN_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
13646 /* 37072 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_S_I16x8),
13647 /* 37077 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13648 /* 37083 */ GIR_RootConstrainSelectedInstOperands,
13649 /* 37084 */ // GIR_Coverage, 298,
13650 /* 37084 */ GIR_Done,
13651 /* 37085 */ // Label 957: @37085
13652 /* 37085 */ GIM_Reject,
13653 /* 37086 */ // Label 954: @37086
13654 /* 37086 */ GIM_Try, /*On fail goto*//*Label 958*/ GIMT_Encode4(37125), // Rule ID 299 //
13655 /* 37091 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13656 /* 37094 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13657 /* 37097 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13658 /* 37100 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13659 /* 37104 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13660 /* 37108 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13661 /* 37112 */ // (smin:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MIN_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
13662 /* 37112 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_S_I32x4),
13663 /* 37117 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13664 /* 37123 */ GIR_RootConstrainSelectedInstOperands,
13665 /* 37124 */ // GIR_Coverage, 299,
13666 /* 37124 */ GIR_Done,
13667 /* 37125 */ // Label 958: @37125
13668 /* 37125 */ GIM_Reject,
13669 /* 37126 */ // Label 955: @37126
13670 /* 37126 */ GIM_Reject,
13671 /* 37127 */ // Label 55: @37127
13672 /* 37127 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(5), /*)*//*default:*//*Label 962*/ GIMT_Encode4(37270),
13673 /* 37138 */ /*GILLT_v16s8*//*Label 959*/ GIMT_Encode4(37150),
13674 /* 37142 */ /*GILLT_v8s16*//*Label 960*/ GIMT_Encode4(37190),
13675 /* 37146 */ /*GILLT_v4s32*//*Label 961*/ GIMT_Encode4(37230),
13676 /* 37150 */ // Label 959: @37150
13677 /* 37150 */ GIM_Try, /*On fail goto*//*Label 963*/ GIMT_Encode4(37189), // Rule ID 303 //
13678 /* 37155 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13679 /* 37158 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
13680 /* 37161 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
13681 /* 37164 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13682 /* 37168 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13683 /* 37172 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13684 /* 37176 */ // (smax:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MAX_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
13685 /* 37176 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_S_I8x16),
13686 /* 37181 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13687 /* 37187 */ GIR_RootConstrainSelectedInstOperands,
13688 /* 37188 */ // GIR_Coverage, 303,
13689 /* 37188 */ GIR_Done,
13690 /* 37189 */ // Label 963: @37189
13691 /* 37189 */ GIM_Reject,
13692 /* 37190 */ // Label 960: @37190
13693 /* 37190 */ GIM_Try, /*On fail goto*//*Label 964*/ GIMT_Encode4(37229), // Rule ID 304 //
13694 /* 37195 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13695 /* 37198 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13696 /* 37201 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
13697 /* 37204 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13698 /* 37208 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13699 /* 37212 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13700 /* 37216 */ // (smax:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MAX_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
13701 /* 37216 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_S_I16x8),
13702 /* 37221 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13703 /* 37227 */ GIR_RootConstrainSelectedInstOperands,
13704 /* 37228 */ // GIR_Coverage, 304,
13705 /* 37228 */ GIR_Done,
13706 /* 37229 */ // Label 964: @37229
13707 /* 37229 */ GIM_Reject,
13708 /* 37230 */ // Label 961: @37230
13709 /* 37230 */ GIM_Try, /*On fail goto*//*Label 965*/ GIMT_Encode4(37269), // Rule ID 305 //
13710 /* 37235 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13711 /* 37238 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13712 /* 37241 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13713 /* 37244 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13714 /* 37248 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13715 /* 37252 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13716 /* 37256 */ // (smax:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MAX_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
13717 /* 37256 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_S_I32x4),
13718 /* 37261 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13719 /* 37267 */ GIR_RootConstrainSelectedInstOperands,
13720 /* 37268 */ // GIR_Coverage, 305,
13721 /* 37268 */ GIR_Done,
13722 /* 37269 */ // Label 965: @37269
13723 /* 37269 */ GIM_Reject,
13724 /* 37270 */ // Label 962: @37270
13725 /* 37270 */ GIM_Reject,
13726 /* 37271 */ // Label 56: @37271
13727 /* 37271 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(5), /*)*//*default:*//*Label 969*/ GIMT_Encode4(37414),
13728 /* 37282 */ /*GILLT_v16s8*//*Label 966*/ GIMT_Encode4(37294),
13729 /* 37286 */ /*GILLT_v8s16*//*Label 967*/ GIMT_Encode4(37334),
13730 /* 37290 */ /*GILLT_v4s32*//*Label 968*/ GIMT_Encode4(37374),
13731 /* 37294 */ // Label 966: @37294
13732 /* 37294 */ GIM_Try, /*On fail goto*//*Label 970*/ GIMT_Encode4(37333), // Rule ID 300 //
13733 /* 37299 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13734 /* 37302 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
13735 /* 37305 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
13736 /* 37308 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13737 /* 37312 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13738 /* 37316 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13739 /* 37320 */ // (umin:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MIN_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
13740 /* 37320 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_U_I8x16),
13741 /* 37325 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13742 /* 37331 */ GIR_RootConstrainSelectedInstOperands,
13743 /* 37332 */ // GIR_Coverage, 300,
13744 /* 37332 */ GIR_Done,
13745 /* 37333 */ // Label 970: @37333
13746 /* 37333 */ GIM_Reject,
13747 /* 37334 */ // Label 967: @37334
13748 /* 37334 */ GIM_Try, /*On fail goto*//*Label 971*/ GIMT_Encode4(37373), // Rule ID 301 //
13749 /* 37339 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13750 /* 37342 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13751 /* 37345 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
13752 /* 37348 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13753 /* 37352 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13754 /* 37356 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13755 /* 37360 */ // (umin:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MIN_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
13756 /* 37360 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_U_I16x8),
13757 /* 37365 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13758 /* 37371 */ GIR_RootConstrainSelectedInstOperands,
13759 /* 37372 */ // GIR_Coverage, 301,
13760 /* 37372 */ GIR_Done,
13761 /* 37373 */ // Label 971: @37373
13762 /* 37373 */ GIM_Reject,
13763 /* 37374 */ // Label 968: @37374
13764 /* 37374 */ GIM_Try, /*On fail goto*//*Label 972*/ GIMT_Encode4(37413), // Rule ID 302 //
13765 /* 37379 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13766 /* 37382 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13767 /* 37385 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13768 /* 37388 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13769 /* 37392 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13770 /* 37396 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13771 /* 37400 */ // (umin:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MIN_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
13772 /* 37400 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_U_I32x4),
13773 /* 37405 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13774 /* 37411 */ GIR_RootConstrainSelectedInstOperands,
13775 /* 37412 */ // GIR_Coverage, 302,
13776 /* 37412 */ GIR_Done,
13777 /* 37413 */ // Label 972: @37413
13778 /* 37413 */ GIM_Reject,
13779 /* 37414 */ // Label 969: @37414
13780 /* 37414 */ GIM_Reject,
13781 /* 37415 */ // Label 57: @37415
13782 /* 37415 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(5), /*)*//*default:*//*Label 976*/ GIMT_Encode4(37558),
13783 /* 37426 */ /*GILLT_v16s8*//*Label 973*/ GIMT_Encode4(37438),
13784 /* 37430 */ /*GILLT_v8s16*//*Label 974*/ GIMT_Encode4(37478),
13785 /* 37434 */ /*GILLT_v4s32*//*Label 975*/ GIMT_Encode4(37518),
13786 /* 37438 */ // Label 973: @37438
13787 /* 37438 */ GIM_Try, /*On fail goto*//*Label 977*/ GIMT_Encode4(37477), // Rule ID 306 //
13788 /* 37443 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13789 /* 37446 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
13790 /* 37449 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16s8,
13791 /* 37452 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13792 /* 37456 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13793 /* 37460 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13794 /* 37464 */ // (umax:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MAX_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
13795 /* 37464 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_U_I8x16),
13796 /* 37469 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13797 /* 37475 */ GIR_RootConstrainSelectedInstOperands,
13798 /* 37476 */ // GIR_Coverage, 306,
13799 /* 37476 */ GIR_Done,
13800 /* 37477 */ // Label 977: @37477
13801 /* 37477 */ GIM_Reject,
13802 /* 37478 */ // Label 974: @37478
13803 /* 37478 */ GIM_Try, /*On fail goto*//*Label 978*/ GIMT_Encode4(37517), // Rule ID 307 //
13804 /* 37483 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13805 /* 37486 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13806 /* 37489 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8s16,
13807 /* 37492 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13808 /* 37496 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13809 /* 37500 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13810 /* 37504 */ // (umax:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MAX_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
13811 /* 37504 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_U_I16x8),
13812 /* 37509 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13813 /* 37515 */ GIR_RootConstrainSelectedInstOperands,
13814 /* 37516 */ // GIR_Coverage, 307,
13815 /* 37516 */ GIR_Done,
13816 /* 37517 */ // Label 978: @37517
13817 /* 37517 */ GIM_Reject,
13818 /* 37518 */ // Label 975: @37518
13819 /* 37518 */ GIM_Try, /*On fail goto*//*Label 979*/ GIMT_Encode4(37557), // Rule ID 308 //
13820 /* 37523 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13821 /* 37526 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13822 /* 37529 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4s32,
13823 /* 37532 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13824 /* 37536 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13825 /* 37540 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13826 /* 37544 */ // (umax:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MAX_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
13827 /* 37544 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_U_I32x4),
13828 /* 37549 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13829 /* 37555 */ GIR_RootConstrainSelectedInstOperands,
13830 /* 37556 */ // GIR_Coverage, 308,
13831 /* 37556 */ GIR_Done,
13832 /* 37557 */ // Label 979: @37557
13833 /* 37557 */ GIM_Reject,
13834 /* 37558 */ // Label 976: @37558
13835 /* 37558 */ GIM_Reject,
13836 /* 37559 */ // Label 58: @37559
13837 /* 37559 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(6), /*)*//*default:*//*Label 984*/ GIMT_Encode4(37718),
13838 /* 37570 */ /*GILLT_v16s8*//*Label 980*/ GIMT_Encode4(37586),
13839 /* 37574 */ /*GILLT_v8s16*//*Label 981*/ GIMT_Encode4(37619),
13840 /* 37578 */ /*GILLT_v4s32*//*Label 982*/ GIMT_Encode4(37652),
13841 /* 37582 */ /*GILLT_v2s64*//*Label 983*/ GIMT_Encode4(37685),
13842 /* 37586 */ // Label 980: @37586
13843 /* 37586 */ GIM_Try, /*On fail goto*//*Label 985*/ GIMT_Encode4(37618), // Rule ID 249 //
13844 /* 37591 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13845 /* 37594 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
13846 /* 37597 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13847 /* 37601 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13848 /* 37605 */ // (abs:{ *:[v16i8] } V128:{ *:[v16i8] }:$v) => (ABS_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$v)
13849 /* 37605 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I8x16),
13850 /* 37610 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13851 /* 37616 */ GIR_RootConstrainSelectedInstOperands,
13852 /* 37617 */ // GIR_Coverage, 249,
13853 /* 37617 */ GIR_Done,
13854 /* 37618 */ // Label 985: @37618
13855 /* 37618 */ GIM_Reject,
13856 /* 37619 */ // Label 981: @37619
13857 /* 37619 */ GIM_Try, /*On fail goto*//*Label 986*/ GIMT_Encode4(37651), // Rule ID 250 //
13858 /* 37624 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13859 /* 37627 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13860 /* 37630 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13861 /* 37634 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13862 /* 37638 */ // (abs:{ *:[v8i16] } V128:{ *:[v8i16] }:$v) => (ABS_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$v)
13863 /* 37638 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I16x8),
13864 /* 37643 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13865 /* 37649 */ GIR_RootConstrainSelectedInstOperands,
13866 /* 37650 */ // GIR_Coverage, 250,
13867 /* 37650 */ GIR_Done,
13868 /* 37651 */ // Label 986: @37651
13869 /* 37651 */ GIM_Reject,
13870 /* 37652 */ // Label 982: @37652
13871 /* 37652 */ GIM_Try, /*On fail goto*//*Label 987*/ GIMT_Encode4(37684), // Rule ID 251 //
13872 /* 37657 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13873 /* 37660 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13874 /* 37663 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13875 /* 37667 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13876 /* 37671 */ // (abs:{ *:[v4i32] } V128:{ *:[v4i32] }:$v) => (ABS_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$v)
13877 /* 37671 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I32x4),
13878 /* 37676 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13879 /* 37682 */ GIR_RootConstrainSelectedInstOperands,
13880 /* 37683 */ // GIR_Coverage, 251,
13881 /* 37683 */ GIR_Done,
13882 /* 37684 */ // Label 987: @37684
13883 /* 37684 */ GIM_Reject,
13884 /* 37685 */ // Label 983: @37685
13885 /* 37685 */ GIM_Try, /*On fail goto*//*Label 988*/ GIMT_Encode4(37717), // Rule ID 252 //
13886 /* 37690 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13887 /* 37693 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
13888 /* 37696 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13889 /* 37700 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13890 /* 37704 */ // (abs:{ *:[v2i64] } V128:{ *:[v2i64] }:$v) => (ABS_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$v)
13891 /* 37704 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I64x2),
13892 /* 37709 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13893 /* 37715 */ GIR_RootConstrainSelectedInstOperands,
13894 /* 37716 */ // GIR_Coverage, 252,
13895 /* 37716 */ GIR_Done,
13896 /* 37717 */ // Label 988: @37717
13897 /* 37717 */ GIM_Reject,
13898 /* 37718 */ // Label 984: @37718
13899 /* 37718 */ GIM_Reject,
13900 /* 37719 */ // Label 59: @37719
13901 /* 37719 */ GIM_Try, /*On fail goto*//*Label 989*/ GIMT_Encode4(37740), // Rule ID 18 //
13902 /* 37724 */ // MIs[0] dst
13903 /* 37724 */ GIM_CheckIsMBB, /*MI*/0, /*Op*/0,
13904 /* 37727 */ // (br (bb:{ *:[Other] }):$dst) => (BR (bb:{ *:[Other] }):$dst)
13905 /* 37727 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::BR),
13906 /* 37732 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13907 /* 37738 */ GIR_RootConstrainSelectedInstOperands,
13908 /* 37739 */ // GIR_Coverage, 18,
13909 /* 37739 */ GIR_Done,
13910 /* 37740 */ // Label 989: @37740
13911 /* 37740 */ GIM_Reject,
13912 /* 37741 */ // Label 60: @37741
13913 /* 37741 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(6), /*)*//*default:*//*Label 994*/ GIMT_Encode4(38110),
13914 /* 37752 */ /*GILLT_v16s8*//*Label 990*/ GIMT_Encode4(37768),
13915 /* 37756 */ /*GILLT_v8s16*//*Label 991*/ GIMT_Encode4(37829),
13916 /* 37760 */ /*GILLT_v4s32*//*Label 992*/ GIMT_Encode4(37890),
13917 /* 37764 */ /*GILLT_v2s64*//*Label 993*/ GIMT_Encode4(38000),
13918 /* 37768 */ // Label 990: @37768
13919 /* 37768 */ GIM_Try, /*On fail goto*//*Label 995*/ GIMT_Encode4(37828), // Rule ID 188 //
13920 /* 37773 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13921 /* 37776 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
13922 /* 37779 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
13923 /* 37782 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
13924 /* 37785 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13925 /* 37789 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13926 /* 37793 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13927 /* 37797 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
13928 /* 37801 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13929 /* 37805 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx16),
13930 /* 37809 */ // MIs[1] Operand 1
13931 /* 37809 */ // No operand predicates
13932 /* 37809 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13933 /* 37811 */ // (vector_insert:{ *:[v16i8] } V128:{ *:[v16i8] }:$vec, I32:{ *:[i32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx16>>:$idx) => (REPLACE_LANE_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$vec, (imm:{ *:[i32] }):$idx, I32:{ *:[i32] }:$x)
13934 /* 37811 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I8x16),
13935 /* 37814 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13936 /* 37816 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
13937 /* 37818 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
13938 /* 37821 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
13939 /* 37823 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13940 /* 37826 */ GIR_RootConstrainSelectedInstOperands,
13941 /* 37827 */ // GIR_Coverage, 188,
13942 /* 37827 */ GIR_EraseRootFromParent_Done,
13943 /* 37828 */ // Label 995: @37828
13944 /* 37828 */ GIM_Reject,
13945 /* 37829 */ // Label 991: @37829
13946 /* 37829 */ GIM_Try, /*On fail goto*//*Label 996*/ GIMT_Encode4(37889), // Rule ID 189 //
13947 /* 37834 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13948 /* 37837 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
13949 /* 37840 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
13950 /* 37843 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
13951 /* 37846 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13952 /* 37850 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13953 /* 37854 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13954 /* 37858 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
13955 /* 37862 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13956 /* 37866 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
13957 /* 37870 */ // MIs[1] Operand 1
13958 /* 37870 */ // No operand predicates
13959 /* 37870 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13960 /* 37872 */ // (vector_insert:{ *:[v8i16] } V128:{ *:[v8i16] }:$vec, I32:{ *:[i32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx) => (REPLACE_LANE_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$vec, (imm:{ *:[i32] }):$idx, I32:{ *:[i32] }:$x)
13961 /* 37872 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I16x8),
13962 /* 37875 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13963 /* 37877 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
13964 /* 37879 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
13965 /* 37882 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
13966 /* 37884 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13967 /* 37887 */ GIR_RootConstrainSelectedInstOperands,
13968 /* 37888 */ // GIR_Coverage, 189,
13969 /* 37888 */ GIR_EraseRootFromParent_Done,
13970 /* 37889 */ // Label 996: @37889
13971 /* 37889 */ GIM_Reject,
13972 /* 37890 */ // Label 992: @37890
13973 /* 37890 */ GIM_Try, /*On fail goto*//*Label 997*/ GIMT_Encode4(37999),
13974 /* 37895 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
13975 /* 37898 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
13976 /* 37901 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
13977 /* 37904 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13978 /* 37908 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13979 /* 37912 */ GIM_Try, /*On fail goto*//*Label 998*/ GIMT_Encode4(37955), // Rule ID 190 //
13980 /* 37917 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
13981 /* 37920 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13982 /* 37924 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
13983 /* 37928 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
13984 /* 37932 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
13985 /* 37936 */ // MIs[1] Operand 1
13986 /* 37936 */ // No operand predicates
13987 /* 37936 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13988 /* 37938 */ // (vector_insert:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, I32:{ *:[i32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (REPLACE_LANE_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, (imm:{ *:[i32] }):$idx, I32:{ *:[i32] }:$x)
13989 /* 37938 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I32x4),
13990 /* 37941 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13991 /* 37943 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
13992 /* 37945 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
13993 /* 37948 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
13994 /* 37950 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13995 /* 37953 */ GIR_RootConstrainSelectedInstOperands,
13996 /* 37954 */ // GIR_Coverage, 190,
13997 /* 37954 */ GIR_EraseRootFromParent_Done,
13998 /* 37955 */ // Label 998: @37955
13999 /* 37955 */ GIM_Try, /*On fail goto*//*Label 999*/ GIMT_Encode4(37998), // Rule ID 192 //
14000 /* 37960 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14001 /* 37963 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14002 /* 37967 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
14003 /* 37971 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
14004 /* 37975 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
14005 /* 37979 */ // MIs[1] Operand 1
14006 /* 37979 */ // No operand predicates
14007 /* 37979 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14008 /* 37981 */ // (vector_insert:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, F32:{ *:[f32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (REPLACE_LANE_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, (imm:{ *:[i32] }):$idx, F32:{ *:[f32] }:$x)
14009 /* 37981 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_F32x4),
14010 /* 37984 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14011 /* 37986 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
14012 /* 37988 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
14013 /* 37991 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
14014 /* 37993 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14015 /* 37996 */ GIR_RootConstrainSelectedInstOperands,
14016 /* 37997 */ // GIR_Coverage, 192,
14017 /* 37997 */ GIR_EraseRootFromParent_Done,
14018 /* 37998 */ // Label 999: @37998
14019 /* 37998 */ GIM_Reject,
14020 /* 37999 */ // Label 997: @37999
14021 /* 37999 */ GIM_Reject,
14022 /* 38000 */ // Label 993: @38000
14023 /* 38000 */ GIM_Try, /*On fail goto*//*Label 1000*/ GIMT_Encode4(38109),
14024 /* 38005 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
14025 /* 38008 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
14026 /* 38011 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
14027 /* 38014 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14028 /* 38018 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14029 /* 38022 */ GIM_Try, /*On fail goto*//*Label 1001*/ GIMT_Encode4(38065), // Rule ID 191 //
14030 /* 38027 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14031 /* 38030 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14032 /* 38034 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
14033 /* 38038 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
14034 /* 38042 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
14035 /* 38046 */ // MIs[1] Operand 1
14036 /* 38046 */ // No operand predicates
14037 /* 38046 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14038 /* 38048 */ // (vector_insert:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, I64:{ *:[i64] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (REPLACE_LANE_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, (imm:{ *:[i32] }):$idx, I64:{ *:[i64] }:$x)
14039 /* 38048 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I64x2),
14040 /* 38051 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14041 /* 38053 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
14042 /* 38055 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
14043 /* 38058 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
14044 /* 38060 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14045 /* 38063 */ GIR_RootConstrainSelectedInstOperands,
14046 /* 38064 */ // GIR_Coverage, 191,
14047 /* 38064 */ GIR_EraseRootFromParent_Done,
14048 /* 38065 */ // Label 1001: @38065
14049 /* 38065 */ GIM_Try, /*On fail goto*//*Label 1002*/ GIMT_Encode4(38108), // Rule ID 193 //
14050 /* 38070 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14051 /* 38073 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14052 /* 38077 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
14053 /* 38081 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
14054 /* 38085 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
14055 /* 38089 */ // MIs[1] Operand 1
14056 /* 38089 */ // No operand predicates
14057 /* 38089 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14058 /* 38091 */ // (vector_insert:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, F64:{ *:[f64] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (REPLACE_LANE_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, (imm:{ *:[i32] }):$idx, F64:{ *:[f64] }:$x)
14059 /* 38091 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_F64x2),
14060 /* 38094 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14061 /* 38096 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
14062 /* 38098 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
14063 /* 38101 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
14064 /* 38103 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14065 /* 38106 */ GIR_RootConstrainSelectedInstOperands,
14066 /* 38107 */ // GIR_Coverage, 193,
14067 /* 38107 */ GIR_EraseRootFromParent_Done,
14068 /* 38108 */ // Label 1002: @38108
14069 /* 38108 */ GIM_Reject,
14070 /* 38109 */ // Label 1000: @38109
14071 /* 38109 */ GIM_Reject,
14072 /* 38110 */ // Label 994: @38110
14073 /* 38110 */ GIM_Reject,
14074 /* 38111 */ // Label 61: @38111
14075 /* 38111 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(6), /*)*//*default:*//*Label 1007*/ GIMT_Encode4(38602),
14076 /* 38122 */ /*GILLT_v16s8*//*Label 1003*/ GIMT_Encode4(38138),
14077 /* 38126 */ /*GILLT_v8s16*//*Label 1004*/ GIMT_Encode4(38250),
14078 /* 38130 */ /*GILLT_v4s32*//*Label 1005*/ GIMT_Encode4(38338),
14079 /* 38134 */ /*GILLT_v2s64*//*Label 1006*/ GIMT_Encode4(38476),
14080 /* 38138 */ // Label 1003: @38138
14081 /* 38138 */ GIM_Try, /*On fail goto*//*Label 1008*/ GIMT_Encode4(38249),
14082 /* 38143 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14083 /* 38146 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14084 /* 38150 */ GIM_Try, /*On fail goto*//*Label 1009*/ GIMT_Encode4(38223), // Rule ID 993 //
14085 /* 38155 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14086 /* 38159 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
14087 /* 38163 */ // MIs[1] Operand 1
14088 /* 38163 */ // No operand predicates
14089 /* 38163 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14090 /* 38165 */ // (splat_vector:{ *:[v16i8] } (imm:{ *:[i32] }):$x) => (CONST_V128_I8x16:{ *:[v16i8] } (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x)
14091 /* 38165 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I8x16),
14092 /* 38168 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14093 /* 38170 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14094 /* 38173 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14095 /* 38176 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14096 /* 38179 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14097 /* 38182 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14098 /* 38185 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14099 /* 38188 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14100 /* 38191 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14101 /* 38194 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14102 /* 38197 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14103 /* 38200 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14104 /* 38203 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14105 /* 38206 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14106 /* 38209 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14107 /* 38212 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14108 /* 38215 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14109 /* 38218 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14110 /* 38221 */ GIR_RootConstrainSelectedInstOperands,
14111 /* 38222 */ // GIR_Coverage, 993,
14112 /* 38222 */ GIR_EraseRootFromParent_Done,
14113 /* 38223 */ // Label 1009: @38223
14114 /* 38223 */ GIM_Try, /*On fail goto*//*Label 1010*/ GIMT_Encode4(38248), // Rule ID 180 //
14115 /* 38228 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14116 /* 38231 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14117 /* 38235 */ // (splat_vector:{ *:[v16i8] } I32:{ *:[i32] }:$x) => (SPLAT_I8x16:{ *:[v16i8] } I32:{ *:[i32] }:$x)
14118 /* 38235 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I8x16),
14119 /* 38240 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14120 /* 38246 */ GIR_RootConstrainSelectedInstOperands,
14121 /* 38247 */ // GIR_Coverage, 180,
14122 /* 38247 */ GIR_Done,
14123 /* 38248 */ // Label 1010: @38248
14124 /* 38248 */ GIM_Reject,
14125 /* 38249 */ // Label 1008: @38249
14126 /* 38249 */ GIM_Reject,
14127 /* 38250 */ // Label 1004: @38250
14128 /* 38250 */ GIM_Try, /*On fail goto*//*Label 1011*/ GIMT_Encode4(38337),
14129 /* 38255 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14130 /* 38258 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14131 /* 38262 */ GIM_Try, /*On fail goto*//*Label 1012*/ GIMT_Encode4(38311), // Rule ID 994 //
14132 /* 38267 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14133 /* 38271 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
14134 /* 38275 */ // MIs[1] Operand 1
14135 /* 38275 */ // No operand predicates
14136 /* 38275 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14137 /* 38277 */ // (splat_vector:{ *:[v8i16] } (imm:{ *:[i32] }):$x) => (CONST_V128_I16x8:{ *:[v8i16] } (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x)
14138 /* 38277 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I16x8),
14139 /* 38280 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14140 /* 38282 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14141 /* 38285 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14142 /* 38288 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14143 /* 38291 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14144 /* 38294 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14145 /* 38297 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14146 /* 38300 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14147 /* 38303 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14148 /* 38306 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14149 /* 38309 */ GIR_RootConstrainSelectedInstOperands,
14150 /* 38310 */ // GIR_Coverage, 994,
14151 /* 38310 */ GIR_EraseRootFromParent_Done,
14152 /* 38311 */ // Label 1012: @38311
14153 /* 38311 */ GIM_Try, /*On fail goto*//*Label 1013*/ GIMT_Encode4(38336), // Rule ID 181 //
14154 /* 38316 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14155 /* 38319 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14156 /* 38323 */ // (splat_vector:{ *:[v8i16] } I32:{ *:[i32] }:$x) => (SPLAT_I16x8:{ *:[v8i16] } I32:{ *:[i32] }:$x)
14157 /* 38323 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I16x8),
14158 /* 38328 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14159 /* 38334 */ GIR_RootConstrainSelectedInstOperands,
14160 /* 38335 */ // GIR_Coverage, 181,
14161 /* 38335 */ GIR_Done,
14162 /* 38336 */ // Label 1013: @38336
14163 /* 38336 */ GIM_Reject,
14164 /* 38337 */ // Label 1011: @38337
14165 /* 38337 */ GIM_Reject,
14166 /* 38338 */ // Label 1005: @38338
14167 /* 38338 */ GIM_Try, /*On fail goto*//*Label 1014*/ GIMT_Encode4(38475),
14168 /* 38343 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14169 /* 38346 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14170 /* 38350 */ GIM_Try, /*On fail goto*//*Label 1015*/ GIMT_Encode4(38387), // Rule ID 997 //
14171 /* 38355 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14172 /* 38359 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
14173 /* 38363 */ // MIs[1] Operand 1
14174 /* 38363 */ // No operand predicates
14175 /* 38363 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14176 /* 38365 */ // (splat_vector:{ *:[v4f32] } (fpimm:{ *:[f32] }):$x) => (CONST_V128_F32x4:{ *:[v4f32] } (fpimm:{ *:[f32] }):$x, (fpimm:{ *:[f32] }):$x, (fpimm:{ *:[f32] }):$x, (fpimm:{ *:[f32] }):$x)
14177 /* 38365 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F32x4),
14178 /* 38368 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14179 /* 38370 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14180 /* 38373 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14181 /* 38376 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14182 /* 38379 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14183 /* 38382 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14184 /* 38385 */ GIR_RootConstrainSelectedInstOperands,
14185 /* 38386 */ // GIR_Coverage, 997,
14186 /* 38386 */ GIR_EraseRootFromParent_Done,
14187 /* 38387 */ // Label 1015: @38387
14188 /* 38387 */ GIM_Try, /*On fail goto*//*Label 1016*/ GIMT_Encode4(38424), // Rule ID 995 //
14189 /* 38392 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14190 /* 38396 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
14191 /* 38400 */ // MIs[1] Operand 1
14192 /* 38400 */ // No operand predicates
14193 /* 38400 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14194 /* 38402 */ // (splat_vector:{ *:[v4i32] } (imm:{ *:[i32] }):$x) => (CONST_V128_I32x4:{ *:[v4i32] } (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x)
14195 /* 38402 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I32x4),
14196 /* 38405 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14197 /* 38407 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14198 /* 38410 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14199 /* 38413 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14200 /* 38416 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14201 /* 38419 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14202 /* 38422 */ GIR_RootConstrainSelectedInstOperands,
14203 /* 38423 */ // GIR_Coverage, 995,
14204 /* 38423 */ GIR_EraseRootFromParent_Done,
14205 /* 38424 */ // Label 1016: @38424
14206 /* 38424 */ GIM_Try, /*On fail goto*//*Label 1017*/ GIMT_Encode4(38449), // Rule ID 182 //
14207 /* 38429 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14208 /* 38432 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14209 /* 38436 */ // (splat_vector:{ *:[v4i32] } I32:{ *:[i32] }:$x) => (SPLAT_I32x4:{ *:[v4i32] } I32:{ *:[i32] }:$x)
14210 /* 38436 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I32x4),
14211 /* 38441 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14212 /* 38447 */ GIR_RootConstrainSelectedInstOperands,
14213 /* 38448 */ // GIR_Coverage, 182,
14214 /* 38448 */ GIR_Done,
14215 /* 38449 */ // Label 1017: @38449
14216 /* 38449 */ GIM_Try, /*On fail goto*//*Label 1018*/ GIMT_Encode4(38474), // Rule ID 184 //
14217 /* 38454 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14218 /* 38457 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14219 /* 38461 */ // (splat_vector:{ *:[v4f32] } F32:{ *:[f32] }:$x) => (SPLAT_F32x4:{ *:[v4f32] } F32:{ *:[f32] }:$x)
14220 /* 38461 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_F32x4),
14221 /* 38466 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14222 /* 38472 */ GIR_RootConstrainSelectedInstOperands,
14223 /* 38473 */ // GIR_Coverage, 184,
14224 /* 38473 */ GIR_Done,
14225 /* 38474 */ // Label 1018: @38474
14226 /* 38474 */ GIM_Reject,
14227 /* 38475 */ // Label 1014: @38475
14228 /* 38475 */ GIM_Reject,
14229 /* 38476 */ // Label 1006: @38476
14230 /* 38476 */ GIM_Try, /*On fail goto*//*Label 1019*/ GIMT_Encode4(38601),
14231 /* 38481 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
14232 /* 38484 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14233 /* 38488 */ GIM_Try, /*On fail goto*//*Label 1020*/ GIMT_Encode4(38519), // Rule ID 998 //
14234 /* 38493 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14235 /* 38497 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
14236 /* 38501 */ // MIs[1] Operand 1
14237 /* 38501 */ // No operand predicates
14238 /* 38501 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14239 /* 38503 */ // (splat_vector:{ *:[v2f64] } (fpimm:{ *:[f64] }):$x) => (CONST_V128_F64x2:{ *:[v2f64] } (fpimm:{ *:[f64] }):$x, (fpimm:{ *:[f64] }):$x)
14240 /* 38503 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F64x2),
14241 /* 38506 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14242 /* 38508 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14243 /* 38511 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14244 /* 38514 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14245 /* 38517 */ GIR_RootConstrainSelectedInstOperands,
14246 /* 38518 */ // GIR_Coverage, 998,
14247 /* 38518 */ GIR_EraseRootFromParent_Done,
14248 /* 38519 */ // Label 1020: @38519
14249 /* 38519 */ GIM_Try, /*On fail goto*//*Label 1021*/ GIMT_Encode4(38550), // Rule ID 996 //
14250 /* 38524 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14251 /* 38528 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
14252 /* 38532 */ // MIs[1] Operand 1
14253 /* 38532 */ // No operand predicates
14254 /* 38532 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14255 /* 38534 */ // (splat_vector:{ *:[v2i64] } (imm:{ *:[i64] }):$x) => (CONST_V128_I64x2:{ *:[v2i64] } (imm:{ *:[i64] }):$x, (imm:{ *:[i64] }):$x)
14256 /* 38534 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I64x2),
14257 /* 38537 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14258 /* 38539 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14259 /* 38542 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
14260 /* 38545 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14261 /* 38548 */ GIR_RootConstrainSelectedInstOperands,
14262 /* 38549 */ // GIR_Coverage, 996,
14263 /* 38549 */ GIR_EraseRootFromParent_Done,
14264 /* 38550 */ // Label 1021: @38550
14265 /* 38550 */ GIM_Try, /*On fail goto*//*Label 1022*/ GIMT_Encode4(38575), // Rule ID 183 //
14266 /* 38555 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14267 /* 38558 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14268 /* 38562 */ // (splat_vector:{ *:[v2i64] } I64:{ *:[i64] }:$x) => (SPLAT_I64x2:{ *:[v2i64] } I64:{ *:[i64] }:$x)
14269 /* 38562 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I64x2),
14270 /* 38567 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14271 /* 38573 */ GIR_RootConstrainSelectedInstOperands,
14272 /* 38574 */ // GIR_Coverage, 183,
14273 /* 38574 */ GIR_Done,
14274 /* 38575 */ // Label 1022: @38575
14275 /* 38575 */ GIM_Try, /*On fail goto*//*Label 1023*/ GIMT_Encode4(38600), // Rule ID 185 //
14276 /* 38580 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14277 /* 38583 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14278 /* 38587 */ // (splat_vector:{ *:[v2f64] } F64:{ *:[f64] }:$x) => (SPLAT_F64x2:{ *:[v2f64] } F64:{ *:[f64] }:$x)
14279 /* 38587 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_F64x2),
14280 /* 38592 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14281 /* 38598 */ GIR_RootConstrainSelectedInstOperands,
14282 /* 38599 */ // GIR_Coverage, 185,
14283 /* 38599 */ GIR_Done,
14284 /* 38600 */ // Label 1023: @38600
14285 /* 38600 */ GIM_Reject,
14286 /* 38601 */ // Label 1019: @38601
14287 /* 38601 */ GIM_Reject,
14288 /* 38602 */ // Label 1007: @38602
14289 /* 38602 */ GIM_Reject,
14290 /* 38603 */ // Label 62: @38603
14291 /* 38603 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 1026*/ GIMT_Encode4(38682),
14292 /* 38614 */ /*GILLT_s32*//*Label 1024*/ GIMT_Encode4(38622),
14293 /* 38618 */ /*GILLT_s64*//*Label 1025*/ GIMT_Encode4(38652),
14294 /* 38622 */ // Label 1024: @38622
14295 /* 38622 */ GIM_Try, /*On fail goto*//*Label 1027*/ GIMT_Encode4(38651), // Rule ID 116 //
14296 /* 38627 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14297 /* 38630 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14298 /* 38634 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14299 /* 38638 */ // (cttz:{ *:[i32] } I32:{ *:[i32] }:$src) => (CTZ_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
14300 /* 38638 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CTZ_I32),
14301 /* 38643 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14302 /* 38649 */ GIR_RootConstrainSelectedInstOperands,
14303 /* 38650 */ // GIR_Coverage, 116,
14304 /* 38650 */ GIR_Done,
14305 /* 38651 */ // Label 1027: @38651
14306 /* 38651 */ GIM_Reject,
14307 /* 38652 */ // Label 1025: @38652
14308 /* 38652 */ GIM_Try, /*On fail goto*//*Label 1028*/ GIMT_Encode4(38681), // Rule ID 117 //
14309 /* 38657 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
14310 /* 38660 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14311 /* 38664 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14312 /* 38668 */ // (cttz:{ *:[i64] } I64:{ *:[i64] }:$src) => (CTZ_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
14313 /* 38668 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CTZ_I64),
14314 /* 38673 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14315 /* 38679 */ GIR_RootConstrainSelectedInstOperands,
14316 /* 38680 */ // GIR_Coverage, 117,
14317 /* 38680 */ GIR_Done,
14318 /* 38681 */ // Label 1028: @38681
14319 /* 38681 */ GIM_Reject,
14320 /* 38682 */ // Label 1026: @38682
14321 /* 38682 */ GIM_Reject,
14322 /* 38683 */ // Label 63: @38683
14323 /* 38683 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 1031*/ GIMT_Encode4(38762),
14324 /* 38694 */ /*GILLT_s32*//*Label 1029*/ GIMT_Encode4(38702),
14325 /* 38698 */ /*GILLT_s64*//*Label 1030*/ GIMT_Encode4(38732),
14326 /* 38702 */ // Label 1029: @38702
14327 /* 38702 */ GIM_Try, /*On fail goto*//*Label 1032*/ GIMT_Encode4(38731), // Rule ID 114 //
14328 /* 38707 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14329 /* 38710 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14330 /* 38714 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14331 /* 38718 */ // (ctlz:{ *:[i32] } I32:{ *:[i32] }:$src) => (CLZ_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
14332 /* 38718 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CLZ_I32),
14333 /* 38723 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14334 /* 38729 */ GIR_RootConstrainSelectedInstOperands,
14335 /* 38730 */ // GIR_Coverage, 114,
14336 /* 38730 */ GIR_Done,
14337 /* 38731 */ // Label 1032: @38731
14338 /* 38731 */ GIM_Reject,
14339 /* 38732 */ // Label 1030: @38732
14340 /* 38732 */ GIM_Try, /*On fail goto*//*Label 1033*/ GIMT_Encode4(38761), // Rule ID 115 //
14341 /* 38737 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
14342 /* 38740 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14343 /* 38744 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14344 /* 38748 */ // (ctlz:{ *:[i64] } I64:{ *:[i64] }:$src) => (CLZ_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
14345 /* 38748 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CLZ_I64),
14346 /* 38753 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14347 /* 38759 */ GIR_RootConstrainSelectedInstOperands,
14348 /* 38760 */ // GIR_Coverage, 115,
14349 /* 38760 */ GIR_Done,
14350 /* 38761 */ // Label 1033: @38761
14351 /* 38761 */ GIM_Reject,
14352 /* 38762 */ // Label 1031: @38762
14353 /* 38762 */ GIM_Reject,
14354 /* 38763 */ // Label 64: @38763
14355 /* 38763 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(3), /*)*//*default:*//*Label 1037*/ GIMT_Encode4(38879),
14356 /* 38774 */ /*GILLT_s32*//*Label 1034*/ GIMT_Encode4(38786),
14357 /* 38778 */ /*GILLT_s64*//*Label 1035*/ GIMT_Encode4(38816),
14358 /* 38782 */ /*GILLT_v16s8*//*Label 1036*/ GIMT_Encode4(38846),
14359 /* 38786 */ // Label 1034: @38786
14360 /* 38786 */ GIM_Try, /*On fail goto*//*Label 1038*/ GIMT_Encode4(38815), // Rule ID 118 //
14361 /* 38791 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14362 /* 38794 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14363 /* 38798 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14364 /* 38802 */ // (ctpop:{ *:[i32] } I32:{ *:[i32] }:$src) => (POPCNT_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
14365 /* 38802 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::POPCNT_I32),
14366 /* 38807 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14367 /* 38813 */ GIR_RootConstrainSelectedInstOperands,
14368 /* 38814 */ // GIR_Coverage, 118,
14369 /* 38814 */ GIR_Done,
14370 /* 38815 */ // Label 1038: @38815
14371 /* 38815 */ GIM_Reject,
14372 /* 38816 */ // Label 1035: @38816
14373 /* 38816 */ GIM_Try, /*On fail goto*//*Label 1039*/ GIMT_Encode4(38845), // Rule ID 119 //
14374 /* 38821 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
14375 /* 38824 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14376 /* 38828 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14377 /* 38832 */ // (ctpop:{ *:[i64] } I64:{ *:[i64] }:$src) => (POPCNT_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
14378 /* 38832 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::POPCNT_I64),
14379 /* 38837 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14380 /* 38843 */ GIR_RootConstrainSelectedInstOperands,
14381 /* 38844 */ // GIR_Coverage, 119,
14382 /* 38844 */ GIR_Done,
14383 /* 38845 */ // Label 1039: @38845
14384 /* 38845 */ GIM_Reject,
14385 /* 38846 */ // Label 1036: @38846
14386 /* 38846 */ GIM_Try, /*On fail goto*//*Label 1040*/ GIMT_Encode4(38878), // Rule ID 257 //
14387 /* 38851 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14388 /* 38854 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
14389 /* 38857 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14390 /* 38861 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14391 /* 38865 */ // (ctpop:{ *:[v16i8] } V128:{ *:[v16i8] }:$v) => (POPCNT_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$v)
14392 /* 38865 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::POPCNT_I8x16),
14393 /* 38870 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14394 /* 38876 */ GIR_RootConstrainSelectedInstOperands,
14395 /* 38877 */ // GIR_Coverage, 257,
14396 /* 38877 */ GIR_Done,
14397 /* 38878 */ // Label 1040: @38878
14398 /* 38878 */ GIM_Reject,
14399 /* 38879 */ // Label 1037: @38879
14400 /* 38879 */ GIM_Reject,
14401 /* 38880 */ // Label 65: @38880
14402 /* 38880 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 1046*/ GIMT_Encode4(39074),
14403 /* 38891 */ /*GILLT_s32*//*Label 1041*/ GIMT_Encode4(38915),
14404 /* 38895 */ /*GILLT_s64*//*Label 1042*/ GIMT_Encode4(38945), GIMT_Encode4(0),
14405 /* 38903 */ /*GILLT_v8s16*//*Label 1043*/ GIMT_Encode4(38975),
14406 /* 38907 */ /*GILLT_v4s32*//*Label 1044*/ GIMT_Encode4(39008),
14407 /* 38911 */ /*GILLT_v2s64*//*Label 1045*/ GIMT_Encode4(39041),
14408 /* 38915 */ // Label 1041: @38915
14409 /* 38915 */ GIM_Try, /*On fail goto*//*Label 1047*/ GIMT_Encode4(38944), // Rule ID 144 //
14410 /* 38920 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14411 /* 38923 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14412 /* 38927 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14413 /* 38931 */ // (fceil:{ *:[f32] } F32:{ *:[f32] }:$src) => (CEIL_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
14414 /* 38931 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F32),
14415 /* 38936 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14416 /* 38942 */ GIR_RootConstrainSelectedInstOperands,
14417 /* 38943 */ // GIR_Coverage, 144,
14418 /* 38943 */ GIR_Done,
14419 /* 38944 */ // Label 1047: @38944
14420 /* 38944 */ GIM_Reject,
14421 /* 38945 */ // Label 1042: @38945
14422 /* 38945 */ GIM_Try, /*On fail goto*//*Label 1048*/ GIMT_Encode4(38974), // Rule ID 145 //
14423 /* 38950 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
14424 /* 38953 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14425 /* 38957 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14426 /* 38961 */ // (fceil:{ *:[f64] } F64:{ *:[f64] }:$src) => (CEIL_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
14427 /* 38961 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F64),
14428 /* 38966 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14429 /* 38972 */ GIR_RootConstrainSelectedInstOperands,
14430 /* 38973 */ // GIR_Coverage, 145,
14431 /* 38973 */ GIR_Done,
14432 /* 38974 */ // Label 1048: @38974
14433 /* 38974 */ GIM_Reject,
14434 /* 38975 */ // Label 1043: @38975
14435 /* 38975 */ GIM_Try, /*On fail goto*//*Label 1049*/ GIMT_Encode4(39007), // Rule ID 341 //
14436 /* 38980 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
14437 /* 38983 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
14438 /* 38986 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14439 /* 38990 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14440 /* 38994 */ // (fceil:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (CEIL_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
14441 /* 38994 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F16x8),
14442 /* 38999 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14443 /* 39005 */ GIR_RootConstrainSelectedInstOperands,
14444 /* 39006 */ // GIR_Coverage, 341,
14445 /* 39006 */ GIR_Done,
14446 /* 39007 */ // Label 1049: @39007
14447 /* 39007 */ GIM_Reject,
14448 /* 39008 */ // Label 1044: @39008
14449 /* 39008 */ GIM_Try, /*On fail goto*//*Label 1050*/ GIMT_Encode4(39040), // Rule ID 333 //
14450 /* 39013 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14451 /* 39016 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
14452 /* 39019 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14453 /* 39023 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14454 /* 39027 */ // (fceil:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (CEIL_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
14455 /* 39027 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F32x4),
14456 /* 39032 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14457 /* 39038 */ GIR_RootConstrainSelectedInstOperands,
14458 /* 39039 */ // GIR_Coverage, 333,
14459 /* 39039 */ GIR_Done,
14460 /* 39040 */ // Label 1050: @39040
14461 /* 39040 */ GIM_Reject,
14462 /* 39041 */ // Label 1045: @39041
14463 /* 39041 */ GIM_Try, /*On fail goto*//*Label 1051*/ GIMT_Encode4(39073), // Rule ID 337 //
14464 /* 39046 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14465 /* 39049 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
14466 /* 39052 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14467 /* 39056 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14468 /* 39060 */ // (fceil:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (CEIL_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
14469 /* 39060 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F64x2),
14470 /* 39065 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14471 /* 39071 */ GIR_RootConstrainSelectedInstOperands,
14472 /* 39072 */ // GIR_Coverage, 337,
14473 /* 39072 */ GIR_Done,
14474 /* 39073 */ // Label 1051: @39073
14475 /* 39073 */ GIM_Reject,
14476 /* 39074 */ // Label 1046: @39074
14477 /* 39074 */ GIM_Reject,
14478 /* 39075 */ // Label 66: @39075
14479 /* 39075 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 1057*/ GIMT_Encode4(39269),
14480 /* 39086 */ /*GILLT_s32*//*Label 1052*/ GIMT_Encode4(39110),
14481 /* 39090 */ /*GILLT_s64*//*Label 1053*/ GIMT_Encode4(39140), GIMT_Encode4(0),
14482 /* 39098 */ /*GILLT_v8s16*//*Label 1054*/ GIMT_Encode4(39170),
14483 /* 39102 */ /*GILLT_v4s32*//*Label 1055*/ GIMT_Encode4(39203),
14484 /* 39106 */ /*GILLT_v2s64*//*Label 1056*/ GIMT_Encode4(39236),
14485 /* 39110 */ // Label 1052: @39110
14486 /* 39110 */ GIM_Try, /*On fail goto*//*Label 1058*/ GIMT_Encode4(39139), // Rule ID 132 //
14487 /* 39115 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14488 /* 39118 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14489 /* 39122 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14490 /* 39126 */ // (fsqrt:{ *:[f32] } F32:{ *:[f32] }:$src) => (SQRT_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
14491 /* 39126 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F32),
14492 /* 39131 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14493 /* 39137 */ GIR_RootConstrainSelectedInstOperands,
14494 /* 39138 */ // GIR_Coverage, 132,
14495 /* 39138 */ GIR_Done,
14496 /* 39139 */ // Label 1058: @39139
14497 /* 39139 */ GIM_Reject,
14498 /* 39140 */ // Label 1053: @39140
14499 /* 39140 */ GIM_Try, /*On fail goto*//*Label 1059*/ GIMT_Encode4(39169), // Rule ID 133 //
14500 /* 39145 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
14501 /* 39148 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14502 /* 39152 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14503 /* 39156 */ // (fsqrt:{ *:[f64] } F64:{ *:[f64] }:$src) => (SQRT_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
14504 /* 39156 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F64),
14505 /* 39161 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14506 /* 39167 */ GIR_RootConstrainSelectedInstOperands,
14507 /* 39168 */ // GIR_Coverage, 133,
14508 /* 39168 */ GIR_Done,
14509 /* 39169 */ // Label 1059: @39169
14510 /* 39169 */ GIM_Reject,
14511 /* 39170 */ // Label 1054: @39170
14512 /* 39170 */ GIM_Try, /*On fail goto*//*Label 1060*/ GIMT_Encode4(39202), // Rule ID 332 //
14513 /* 39175 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
14514 /* 39178 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
14515 /* 39181 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14516 /* 39185 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14517 /* 39189 */ // (fsqrt:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (SQRT_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
14518 /* 39189 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F16x8),
14519 /* 39194 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14520 /* 39200 */ GIR_RootConstrainSelectedInstOperands,
14521 /* 39201 */ // GIR_Coverage, 332,
14522 /* 39201 */ GIR_Done,
14523 /* 39202 */ // Label 1060: @39202
14524 /* 39202 */ GIM_Reject,
14525 /* 39203 */ // Label 1055: @39203
14526 /* 39203 */ GIM_Try, /*On fail goto*//*Label 1061*/ GIMT_Encode4(39235), // Rule ID 330 //
14527 /* 39208 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14528 /* 39211 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
14529 /* 39214 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14530 /* 39218 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14531 /* 39222 */ // (fsqrt:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (SQRT_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
14532 /* 39222 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F32x4),
14533 /* 39227 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14534 /* 39233 */ GIR_RootConstrainSelectedInstOperands,
14535 /* 39234 */ // GIR_Coverage, 330,
14536 /* 39234 */ GIR_Done,
14537 /* 39235 */ // Label 1061: @39235
14538 /* 39235 */ GIM_Reject,
14539 /* 39236 */ // Label 1056: @39236
14540 /* 39236 */ GIM_Try, /*On fail goto*//*Label 1062*/ GIMT_Encode4(39268), // Rule ID 331 //
14541 /* 39241 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14542 /* 39244 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
14543 /* 39247 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14544 /* 39251 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14545 /* 39255 */ // (fsqrt:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (SQRT_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
14546 /* 39255 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F64x2),
14547 /* 39260 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14548 /* 39266 */ GIR_RootConstrainSelectedInstOperands,
14549 /* 39267 */ // GIR_Coverage, 331,
14550 /* 39267 */ GIR_Done,
14551 /* 39268 */ // Label 1062: @39268
14552 /* 39268 */ GIM_Reject,
14553 /* 39269 */ // Label 1057: @39269
14554 /* 39269 */ GIM_Reject,
14555 /* 39270 */ // Label 67: @39270
14556 /* 39270 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 1068*/ GIMT_Encode4(39464),
14557 /* 39281 */ /*GILLT_s32*//*Label 1063*/ GIMT_Encode4(39305),
14558 /* 39285 */ /*GILLT_s64*//*Label 1064*/ GIMT_Encode4(39335), GIMT_Encode4(0),
14559 /* 39293 */ /*GILLT_v8s16*//*Label 1065*/ GIMT_Encode4(39365),
14560 /* 39297 */ /*GILLT_v4s32*//*Label 1066*/ GIMT_Encode4(39398),
14561 /* 39301 */ /*GILLT_v2s64*//*Label 1067*/ GIMT_Encode4(39431),
14562 /* 39305 */ // Label 1063: @39305
14563 /* 39305 */ GIM_Try, /*On fail goto*//*Label 1069*/ GIMT_Encode4(39334), // Rule ID 146 //
14564 /* 39310 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14565 /* 39313 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14566 /* 39317 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14567 /* 39321 */ // (ffloor:{ *:[f32] } F32:{ *:[f32] }:$src) => (FLOOR_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
14568 /* 39321 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F32),
14569 /* 39326 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14570 /* 39332 */ GIR_RootConstrainSelectedInstOperands,
14571 /* 39333 */ // GIR_Coverage, 146,
14572 /* 39333 */ GIR_Done,
14573 /* 39334 */ // Label 1069: @39334
14574 /* 39334 */ GIM_Reject,
14575 /* 39335 */ // Label 1064: @39335
14576 /* 39335 */ GIM_Try, /*On fail goto*//*Label 1070*/ GIMT_Encode4(39364), // Rule ID 147 //
14577 /* 39340 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
14578 /* 39343 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14579 /* 39347 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14580 /* 39351 */ // (ffloor:{ *:[f64] } F64:{ *:[f64] }:$src) => (FLOOR_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
14581 /* 39351 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F64),
14582 /* 39356 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14583 /* 39362 */ GIR_RootConstrainSelectedInstOperands,
14584 /* 39363 */ // GIR_Coverage, 147,
14585 /* 39363 */ GIR_Done,
14586 /* 39364 */ // Label 1070: @39364
14587 /* 39364 */ GIM_Reject,
14588 /* 39365 */ // Label 1065: @39365
14589 /* 39365 */ GIM_Try, /*On fail goto*//*Label 1071*/ GIMT_Encode4(39397), // Rule ID 342 //
14590 /* 39370 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
14591 /* 39373 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
14592 /* 39376 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14593 /* 39380 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14594 /* 39384 */ // (ffloor:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (FLOOR_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
14595 /* 39384 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F16x8),
14596 /* 39389 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14597 /* 39395 */ GIR_RootConstrainSelectedInstOperands,
14598 /* 39396 */ // GIR_Coverage, 342,
14599 /* 39396 */ GIR_Done,
14600 /* 39397 */ // Label 1071: @39397
14601 /* 39397 */ GIM_Reject,
14602 /* 39398 */ // Label 1066: @39398
14603 /* 39398 */ GIM_Try, /*On fail goto*//*Label 1072*/ GIMT_Encode4(39430), // Rule ID 334 //
14604 /* 39403 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14605 /* 39406 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
14606 /* 39409 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14607 /* 39413 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14608 /* 39417 */ // (ffloor:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (FLOOR_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
14609 /* 39417 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F32x4),
14610 /* 39422 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14611 /* 39428 */ GIR_RootConstrainSelectedInstOperands,
14612 /* 39429 */ // GIR_Coverage, 334,
14613 /* 39429 */ GIR_Done,
14614 /* 39430 */ // Label 1072: @39430
14615 /* 39430 */ GIM_Reject,
14616 /* 39431 */ // Label 1067: @39431
14617 /* 39431 */ GIM_Try, /*On fail goto*//*Label 1073*/ GIMT_Encode4(39463), // Rule ID 338 //
14618 /* 39436 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14619 /* 39439 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
14620 /* 39442 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14621 /* 39446 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14622 /* 39450 */ // (ffloor:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (FLOOR_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
14623 /* 39450 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F64x2),
14624 /* 39455 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14625 /* 39461 */ GIR_RootConstrainSelectedInstOperands,
14626 /* 39462 */ // GIR_Coverage, 338,
14627 /* 39462 */ GIR_Done,
14628 /* 39463 */ // Label 1073: @39463
14629 /* 39463 */ GIM_Reject,
14630 /* 39464 */ // Label 1068: @39464
14631 /* 39464 */ GIM_Reject,
14632 /* 39465 */ // Label 68: @39465
14633 /* 39465 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 1079*/ GIMT_Encode4(39642),
14634 /* 39476 */ /*GILLT_s32*//*Label 1074*/ GIMT_Encode4(39500),
14635 /* 39480 */ /*GILLT_s64*//*Label 1075*/ GIMT_Encode4(39526), GIMT_Encode4(0),
14636 /* 39488 */ /*GILLT_v8s16*//*Label 1076*/ GIMT_Encode4(39552),
14637 /* 39492 */ /*GILLT_v4s32*//*Label 1077*/ GIMT_Encode4(39582),
14638 /* 39496 */ /*GILLT_v2s64*//*Label 1078*/ GIMT_Encode4(39612),
14639 /* 39500 */ // Label 1074: @39500
14640 /* 39500 */ GIM_Try, /*On fail goto*//*Label 1080*/ GIMT_Encode4(39525), // Rule ID 673 //
14641 /* 39505 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14642 /* 39508 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14643 /* 39512 */ // (frint:{ *:[f32] } f32:{ *:[f32] }:$src) => (NEAREST_F32:{ *:[f32] } f32:{ *:[f32] }:$src)
14644 /* 39512 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32),
14645 /* 39517 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14646 /* 39523 */ GIR_RootConstrainSelectedInstOperands,
14647 /* 39524 */ // GIR_Coverage, 673,
14648 /* 39524 */ GIR_Done,
14649 /* 39525 */ // Label 1080: @39525
14650 /* 39525 */ GIM_Reject,
14651 /* 39526 */ // Label 1075: @39526
14652 /* 39526 */ GIM_Try, /*On fail goto*//*Label 1081*/ GIMT_Encode4(39551), // Rule ID 674 //
14653 /* 39531 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
14654 /* 39534 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14655 /* 39538 */ // (frint:{ *:[f64] } f64:{ *:[f64] }:$src) => (NEAREST_F64:{ *:[f64] } f64:{ *:[f64] }:$src)
14656 /* 39538 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64),
14657 /* 39543 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14658 /* 39549 */ GIR_RootConstrainSelectedInstOperands,
14659 /* 39550 */ // GIR_Coverage, 674,
14660 /* 39550 */ GIR_Done,
14661 /* 39551 */ // Label 1081: @39551
14662 /* 39551 */ GIM_Reject,
14663 /* 39552 */ // Label 1076: @39552
14664 /* 39552 */ GIM_Try, /*On fail goto*//*Label 1082*/ GIMT_Encode4(39581), // Rule ID 1181 //
14665 /* 39557 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
14666 /* 39560 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14667 /* 39564 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14668 /* 39568 */ // (frint:{ *:[v8f16] } V128:{ *:[v8f16] }:$src) => (NEAREST_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$src)
14669 /* 39568 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F16x8),
14670 /* 39573 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14671 /* 39579 */ GIR_RootConstrainSelectedInstOperands,
14672 /* 39580 */ // GIR_Coverage, 1181,
14673 /* 39580 */ GIR_Done,
14674 /* 39581 */ // Label 1082: @39581
14675 /* 39581 */ GIM_Reject,
14676 /* 39582 */ // Label 1077: @39582
14677 /* 39582 */ GIM_Try, /*On fail goto*//*Label 1083*/ GIMT_Encode4(39611), // Rule ID 1179 //
14678 /* 39587 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
14679 /* 39590 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14680 /* 39594 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14681 /* 39598 */ // (frint:{ *:[v4f32] } V128:{ *:[v4f32] }:$src) => (NEAREST_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$src)
14682 /* 39598 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32x4),
14683 /* 39603 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14684 /* 39609 */ GIR_RootConstrainSelectedInstOperands,
14685 /* 39610 */ // GIR_Coverage, 1179,
14686 /* 39610 */ GIR_Done,
14687 /* 39611 */ // Label 1083: @39611
14688 /* 39611 */ GIM_Reject,
14689 /* 39612 */ // Label 1078: @39612
14690 /* 39612 */ GIM_Try, /*On fail goto*//*Label 1084*/ GIMT_Encode4(39641), // Rule ID 1180 //
14691 /* 39617 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
14692 /* 39620 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14693 /* 39624 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14694 /* 39628 */ // (frint:{ *:[v2f64] } V128:{ *:[v2f64] }:$src) => (NEAREST_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$src)
14695 /* 39628 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64x2),
14696 /* 39633 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14697 /* 39639 */ GIR_RootConstrainSelectedInstOperands,
14698 /* 39640 */ // GIR_Coverage, 1180,
14699 /* 39640 */ GIR_Done,
14700 /* 39641 */ // Label 1084: @39641
14701 /* 39641 */ GIM_Reject,
14702 /* 39642 */ // Label 1079: @39642
14703 /* 39642 */ GIM_Reject,
14704 /* 39643 */ // Label 69: @39643
14705 /* 39643 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(6), /*)*//*default:*//*Label 1090*/ GIMT_Encode4(39837),
14706 /* 39654 */ /*GILLT_s32*//*Label 1085*/ GIMT_Encode4(39678),
14707 /* 39658 */ /*GILLT_s64*//*Label 1086*/ GIMT_Encode4(39708), GIMT_Encode4(0),
14708 /* 39666 */ /*GILLT_v8s16*//*Label 1087*/ GIMT_Encode4(39738),
14709 /* 39670 */ /*GILLT_v4s32*//*Label 1088*/ GIMT_Encode4(39771),
14710 /* 39674 */ /*GILLT_v2s64*//*Label 1089*/ GIMT_Encode4(39804),
14711 /* 39678 */ // Label 1085: @39678
14712 /* 39678 */ GIM_Try, /*On fail goto*//*Label 1091*/ GIMT_Encode4(39707), // Rule ID 150 //
14713 /* 39683 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
14714 /* 39686 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14715 /* 39690 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14716 /* 39694 */ // (fnearbyint:{ *:[f32] } F32:{ *:[f32] }:$src) => (NEAREST_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
14717 /* 39694 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32),
14718 /* 39699 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14719 /* 39705 */ GIR_RootConstrainSelectedInstOperands,
14720 /* 39706 */ // GIR_Coverage, 150,
14721 /* 39706 */ GIR_Done,
14722 /* 39707 */ // Label 1091: @39707
14723 /* 39707 */ GIM_Reject,
14724 /* 39708 */ // Label 1086: @39708
14725 /* 39708 */ GIM_Try, /*On fail goto*//*Label 1092*/ GIMT_Encode4(39737), // Rule ID 151 //
14726 /* 39713 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
14727 /* 39716 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14728 /* 39720 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14729 /* 39724 */ // (fnearbyint:{ *:[f64] } F64:{ *:[f64] }:$src) => (NEAREST_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
14730 /* 39724 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64),
14731 /* 39729 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14732 /* 39735 */ GIR_RootConstrainSelectedInstOperands,
14733 /* 39736 */ // GIR_Coverage, 151,
14734 /* 39736 */ GIR_Done,
14735 /* 39737 */ // Label 1092: @39737
14736 /* 39737 */ GIM_Reject,
14737 /* 39738 */ // Label 1087: @39738
14738 /* 39738 */ GIM_Try, /*On fail goto*//*Label 1093*/ GIMT_Encode4(39770), // Rule ID 344 //
14739 /* 39743 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasFP16_HasSIMD128),
14740 /* 39746 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
14741 /* 39749 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14742 /* 39753 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14743 /* 39757 */ // (fnearbyint:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (NEAREST_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
14744 /* 39757 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F16x8),
14745 /* 39762 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14746 /* 39768 */ GIR_RootConstrainSelectedInstOperands,
14747 /* 39769 */ // GIR_Coverage, 344,
14748 /* 39769 */ GIR_Done,
14749 /* 39770 */ // Label 1093: @39770
14750 /* 39770 */ GIM_Reject,
14751 /* 39771 */ // Label 1088: @39771
14752 /* 39771 */ GIM_Try, /*On fail goto*//*Label 1094*/ GIMT_Encode4(39803), // Rule ID 336 //
14753 /* 39776 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14754 /* 39779 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
14755 /* 39782 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14756 /* 39786 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14757 /* 39790 */ // (fnearbyint:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (NEAREST_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
14758 /* 39790 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32x4),
14759 /* 39795 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14760 /* 39801 */ GIR_RootConstrainSelectedInstOperands,
14761 /* 39802 */ // GIR_Coverage, 336,
14762 /* 39802 */ GIR_Done,
14763 /* 39803 */ // Label 1094: @39803
14764 /* 39803 */ GIM_Reject,
14765 /* 39804 */ // Label 1089: @39804
14766 /* 39804 */ GIM_Try, /*On fail goto*//*Label 1095*/ GIMT_Encode4(39836), // Rule ID 340 //
14767 /* 39809 */ GIM_CheckFeatures, GIMT_Encode2(GIFBS_HasSIMD128),
14768 /* 39812 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
14769 /* 39815 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14770 /* 39819 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14771 /* 39823 */ // (fnearbyint:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (NEAREST_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
14772 /* 39823 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64x2),
14773 /* 39828 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14774 /* 39834 */ GIR_RootConstrainSelectedInstOperands,
14775 /* 39835 */ // GIR_Coverage, 340,
14776 /* 39835 */ GIR_Done,
14777 /* 39836 */ // Label 1095: @39836
14778 /* 39836 */ GIM_Reject,
14779 /* 39837 */ // Label 1090: @39837
14780 /* 39837 */ GIM_Reject,
14781 /* 39838 */ // Label 70: @39838
14782 /* 39838 */ GIM_Try, /*On fail goto*//*Label 1096*/ GIMT_Encode4(39856), // Rule ID 22 //
14783 /* 39843 */ // (trap) => (UNREACHABLE)
14784 /* 39843 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::UNREACHABLE),
14785 /* 39848 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14786 /* 39854 */ GIR_RootConstrainSelectedInstOperands,
14787 /* 39855 */ // GIR_Coverage, 22,
14788 /* 39855 */ GIR_Done,
14789 /* 39856 */ // Label 1096: @39856
14790 /* 39856 */ GIM_Reject,
14791 /* 39857 */ // Label 71: @39857
14792 /* 39857 */ GIM_Try, /*On fail goto*//*Label 1097*/ GIMT_Encode4(39875), // Rule ID 23 //
14793 /* 39862 */ // (debugtrap) => (DEBUG_UNREACHABLE)
14794 /* 39862 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DEBUG_UNREACHABLE),
14795 /* 39867 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14796 /* 39873 */ GIR_RootConstrainSelectedInstOperands,
14797 /* 39874 */ // GIR_Coverage, 23,
14798 /* 39874 */ GIR_Done,
14799 /* 39875 */ // Label 1097: @39875
14800 /* 39875 */ GIM_Reject,
14801 /* 39876 */ // Label 72: @39876
14802 /* 39876 */ GIM_Reject,
14803 /* 39877 */ }; // Size: 39877 bytes
14804 return MatchTable0;
14805}
14806#undef GIMT_Encode2
14807#undef GIMT_Encode4
14808#undef GIMT_Encode8
14809
14810
14811#endif // GET_GLOBALISEL_IMPL
14812
14813#ifdef GET_GLOBALISEL_PREDICATES_DECL
14814
14815PredicateBitset AvailableModuleFeatures;
14816mutable PredicateBitset AvailableFunctionFeatures;
14817PredicateBitset getAvailableFeatures() const {
14818 return AvailableModuleFeatures | AvailableFunctionFeatures;
14819}
14820PredicateBitset
14821computeAvailableModuleFeatures(const WebAssemblySubtarget *Subtarget) const;
14822PredicateBitset
14823computeAvailableFunctionFeatures(const WebAssemblySubtarget *Subtarget,
14824 const MachineFunction *MF) const;
14825void setupGeneratedPerFunctionState(MachineFunction &MF) override;
14826
14827#endif // GET_GLOBALISEL_PREDICATES_DECL
14828
14829#ifdef GET_GLOBALISEL_PREDICATES_INIT
14830
14831AvailableModuleFeatures(computeAvailableModuleFeatures(&STI)),
14832AvailableFunctionFeatures()
14833
14834#endif // GET_GLOBALISEL_PREDICATES_INIT
14835
14836