1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Global Instruction Selector for the WebAssembly target *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_GLOBALISEL_PREDICATE_BITSET
10
11const unsigned MAX_SUBTARGET_PREDICATES = 16;
12using PredicateBitset = llvm::Bitset<MAX_SUBTARGET_PREDICATES>;
13
14#endif // GET_GLOBALISEL_PREDICATE_BITSET
15
16#ifdef GET_GLOBALISEL_TEMPORARIES_DECL
17
18 mutable MatcherState State;
19 typedef ComplexRendererFns(WebAssemblyInstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const;
20 typedef void(WebAssemblyInstructionSelector::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr &, int) const;
21 const ExecInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn> ExecInfo;
22 static WebAssemblyInstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[];
23 static WebAssemblyInstructionSelector::CustomRendererFn CustomRenderers[];
24 bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
25 bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override;
26 bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override;
27 const uint8_t *getMatchTable() const override;
28 bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI, const MatcherState &State) const override;
29 bool testMOPredicate_MO(unsigned PredicateID, const MachineOperand &MO, const MatcherState &State) const override;
30 bool testSimplePredicate(unsigned PredicateID) const override;
31 bool runCustomAction(unsigned FnID, const MatcherState &State, NewMIVector &OutMIs) const override;
32
33#endif // GET_GLOBALISEL_TEMPORARIES_DECL
34
35#ifdef GET_GLOBALISEL_TEMPORARIES_INIT
36
37, State(1),
38ExecInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers)
39
40#endif // GET_GLOBALISEL_TEMPORARIES_INIT
41
42#ifdef GET_GLOBALISEL_IMPL
43
44// LLT Objects.
45enum {
46 GILLT_s32,
47 GILLT_s64,
48 GILLT_i32,
49 GILLT_i64,
50 GILLT_f32,
51 GILLT_f64,
52 GILLT_p0s32,
53 GILLT_p0s64,
54 GILLT_v16s8,
55 GILLT_v8s16,
56 GILLT_v4s32,
57 GILLT_v2s64,
58 GILLT_v16i8,
59 GILLT_v8i16,
60 GILLT_v4i32,
61 GILLT_v2i64,
62 GILLT_v8f16,
63 GILLT_v4f32,
64 GILLT_v2f64,
65};
66const static size_t NumTypeObjects = 19;
67const static LLT TypeObjects[] = {
68 LLT::scalar(32),
69 LLT::scalar(64),
70 LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 32),
71 LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 64),
72 LLT(LLT::Kind::FLOAT, ElementCount::getFixed(0), 32, LLT::FpSemantics::S_IEEEsingle),
73 LLT(LLT::Kind::FLOAT, ElementCount::getFixed(0), 64, LLT::FpSemantics::S_IEEEdouble),
74 LLT::pointer(0, 32),
75 LLT::pointer(0, 64),
76 LLT::vector(ElementCount::getFixed(16), LLT::scalar(8)),
77 LLT::vector(ElementCount::getFixed(8), LLT::scalar(16)),
78 LLT::vector(ElementCount::getFixed(4), LLT::scalar(32)),
79 LLT::vector(ElementCount::getFixed(2), LLT::scalar(64)),
80 LLT::vector(ElementCount::getFixed(16), LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 8)),
81 LLT::vector(ElementCount::getFixed(8), LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 16)),
82 LLT::vector(ElementCount::getFixed(4), LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 32)),
83 LLT::vector(ElementCount::getFixed(2), LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 64)),
84 LLT::vector(ElementCount::getFixed(8), LLT(LLT::Kind::FLOAT, ElementCount::getFixed(0), 16, LLT::FpSemantics::S_IEEEhalf)),
85 LLT::vector(ElementCount::getFixed(4), LLT(LLT::Kind::FLOAT, ElementCount::getFixed(0), 32, LLT::FpSemantics::S_IEEEsingle)),
86 LLT::vector(ElementCount::getFixed(2), LLT(LLT::Kind::FLOAT, ElementCount::getFixed(0), 64, LLT::FpSemantics::S_IEEEdouble)),
87};
88
89// Bits for subtarget features that participate in instruction matching.
90enum SubtargetFeatureBits : uint8_t {
91 Feature_IsPICBit = 13,
92 Feature_IsNotPICBit = 12,
93 Feature_HasAddr32Bit = 9,
94 Feature_HasAddr64Bit = 11,
95 Feature_HasAtomicsBit = 10,
96 Feature_HasBulkMemoryOptBit = 8,
97 Feature_HasExceptionHandlingBit = 0,
98 Feature_HasFP16Bit = 5,
99 Feature_HasNontrappingFPToIntBit = 2,
100 Feature_NotHasNontrappingFPToIntBit = 3,
101 Feature_HasReferenceTypesBit = 7,
102 Feature_HasRelaxedSIMDBit = 6,
103 Feature_HasSignExtBit = 1,
104 Feature_HasSIMD128Bit = 4,
105 Feature_HwMode0Bit = 14,
106 Feature_HwMode1Bit = 15,
107};
108
109PredicateBitset WebAssemblyInstructionSelector::
110computeAvailableModuleFeatures(const WebAssemblySubtarget *Subtarget) const {
111 PredicateBitset Features{};
112 if (TM.isPositionIndependent())
113 Features.set(Feature_IsPICBit);
114 if (!TM.isPositionIndependent())
115 Features.set(Feature_IsNotPICBit);
116 if (!Subtarget->hasAddr64())
117 Features.set(Feature_HasAddr32Bit);
118 if (Subtarget->hasAddr64())
119 Features.set(Feature_HasAddr64Bit);
120 if (Subtarget->hasAtomics())
121 Features.set(Feature_HasAtomicsBit);
122 if (Subtarget->hasBulkMemoryOpt())
123 Features.set(Feature_HasBulkMemoryOptBit);
124 if (Subtarget->hasExceptionHandling())
125 Features.set(Feature_HasExceptionHandlingBit);
126 if (Subtarget->hasFP16())
127 Features.set(Feature_HasFP16Bit);
128 if (Subtarget->hasNontrappingFPToInt())
129 Features.set(Feature_HasNontrappingFPToIntBit);
130 if (!Subtarget->hasNontrappingFPToInt())
131 Features.set(Feature_NotHasNontrappingFPToIntBit);
132 if (Subtarget->hasReferenceTypes())
133 Features.set(Feature_HasReferenceTypesBit);
134 if (Subtarget->hasRelaxedSIMD())
135 Features.set(Feature_HasRelaxedSIMDBit);
136 if (Subtarget->hasSignExt())
137 Features.set(Feature_HasSignExtBit);
138 if (Subtarget->hasSIMD128())
139 Features.set(Feature_HasSIMD128Bit);
140 if (!((Subtarget->hasAddr64())))
141 Features.set(Feature_HwMode0Bit);
142 if ((Subtarget->hasAddr64()))
143 Features.set(Feature_HwMode1Bit);
144 return Features;
145}
146
147void WebAssemblyInstructionSelector::setupGeneratedPerFunctionState(MachineFunction &MF) {
148 AvailableFunctionFeatures = computeAvailableFunctionFeatures((const WebAssemblySubtarget *)&MF.getSubtarget(), &MF);
149}
150PredicateBitset WebAssemblyInstructionSelector::
151computeAvailableFunctionFeatures(const WebAssemblySubtarget *Subtarget, const MachineFunction *MF) const {
152 PredicateBitset Features{};
153 return Features;
154}
155
156// Feature bitsets.
157enum {
158 GIFBS_Invalid,
159 GIFBS_HasAddr32,
160 GIFBS_HasAddr32_HwMode0,
161 GIFBS_HasAddr64,
162 GIFBS_HasAddr64_HwMode1,
163 GIFBS_HasFP16,
164 GIFBS_HasNontrappingFPToInt,
165 GIFBS_HasRelaxedSIMD,
166 GIFBS_HasSIMD128,
167 GIFBS_HasSignExt,
168 GIFBS_NotHasNontrappingFPToInt,
169 GIFBS_HasAddr32_HasAtomics,
170 GIFBS_HasAddr64_HasAtomics,
171 GIFBS_HasFP16_HasSIMD128,
172 GIFBS_HasRelaxedSIMD_HasSIMD128,
173};
174constexpr static PredicateBitset FeatureBitsets[] {
175 {}, // GIFBS_Invalid
176 {Feature_HasAddr32Bit, },
177 {Feature_HasAddr32Bit, Feature_HwMode0Bit, },
178 {Feature_HasAddr64Bit, },
179 {Feature_HasAddr64Bit, Feature_HwMode1Bit, },
180 {Feature_HasFP16Bit, },
181 {Feature_HasNontrappingFPToIntBit, },
182 {Feature_HasRelaxedSIMDBit, },
183 {Feature_HasSIMD128Bit, },
184 {Feature_HasSignExtBit, },
185 {Feature_NotHasNontrappingFPToIntBit, },
186 {Feature_HasAddr32Bit, Feature_HasAtomicsBit, },
187 {Feature_HasAddr64Bit, Feature_HasAtomicsBit, },
188 {Feature_HasFP16Bit, Feature_HasSIMD128Bit, },
189 {Feature_HasRelaxedSIMDBit, Feature_HasSIMD128Bit, },
190};
191
192// ComplexPattern predicates.
193enum {
194 GICP_Invalid,
195 GICP_gi_AddrOps32,
196 GICP_gi_AddrOps64,
197};
198// See constructor for table contents
199
200WebAssemblyInstructionSelector::ComplexMatcherMemFn
201WebAssemblyInstructionSelector::ComplexPredicateFns[] = {
202 nullptr, // GICP_Invalid
203 &WebAssemblyInstructionSelector::selectAddrOperands32, // gi_AddrOps32
204 &WebAssemblyInstructionSelector::selectAddrOperands64, // gi_AddrOps64
205};
206
207// PatFrag predicates.
208enum {
209 GICXXPred_MI_Predicate_ffloor_nnan = GICXXPred_Invalid + 1,
210 GICXXPred_MI_Predicate_or_disjoint,
211};
212bool WebAssemblyInstructionSelector::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI, const MatcherState &State) const {
213 const MachineFunction &MF = *MI.getParent()->getParent();
214 const MachineRegisterInfo &MRI = MF.getRegInfo();
215 const auto &Operands = State.RecordedOperands;
216 (void)Operands;
217 (void)MRI;
218 switch (PredicateID) {
219 case GICXXPred_MI_Predicate_ffloor_nnan: {
220
221 return MI.getFlag(MachineInstr::FmNoNans);
222
223 }
224 case GICXXPred_MI_Predicate_or_disjoint: {
225
226 return MI.getFlag(MachineInstr::Disjoint);
227
228 }
229 }
230 llvm_unreachable("Unknown predicate");
231 return false;
232}
233// PatFrag predicates.
234bool WebAssemblyInstructionSelector::testMOPredicate_MO(unsigned PredicateID, const MachineOperand & MO, const MatcherState &State) const {
235 const auto &Operands = State.RecordedOperands;
236 Register Reg = MO.getReg();
237 (void)Operands;
238 (void)Reg;
239 llvm_unreachable("Unknown predicate");
240 return false;
241}
242// PatFrag predicates.
243enum {
244 GICXXPred_I64_Predicate_FPNoSaturation = GICXXPred_Invalid + 1,
245 GICXXPred_I64_Predicate_Float8E4M3FN,
246 GICXXPred_I64_Predicate_Float8E5M2,
247 GICXXPred_I64_Predicate_ImmI8,
248 GICXXPred_I64_Predicate_ImmI16,
249 GICXXPred_I64_Predicate_LaneIdx2,
250 GICXXPred_I64_Predicate_LaneIdx4,
251 GICXXPred_I64_Predicate_LaneIdx8,
252 GICXXPred_I64_Predicate_LaneIdx16,
253 GICXXPred_I64_Predicate_LaneIdx32,
254 GICXXPred_I64_Predicate_NearestTiesToEven,
255};
256bool WebAssemblyInstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
257 switch (PredicateID) {
258 case GICXXPred_I64_Predicate_FPNoSaturation: {
259 return Imm == 0;
260 }
261 case GICXXPred_I64_Predicate_Float8E4M3FN: {
262 return Imm == APFloatBase::S_Float8E4M3FN;
263 }
264 case GICXXPred_I64_Predicate_Float8E5M2: {
265 return Imm == APFloatBase::S_Float8E5M2;
266 }
267 case GICXXPred_I64_Predicate_ImmI8: {
268 return -(1 << (8 - 1)) <= Imm && Imm < (1 << 8);
269 }
270 case GICXXPred_I64_Predicate_ImmI16: {
271 return -(1 << (16 - 1)) <= Imm && Imm < (1 << 16);
272 }
273 case GICXXPred_I64_Predicate_LaneIdx2: {
274 return 0 <= Imm && Imm < 2;
275 }
276 case GICXXPred_I64_Predicate_LaneIdx4: {
277 return 0 <= Imm && Imm < 4;
278 }
279 case GICXXPred_I64_Predicate_LaneIdx8: {
280 return 0 <= Imm && Imm < 8;
281 }
282 case GICXXPred_I64_Predicate_LaneIdx16: {
283 return 0 <= Imm && Imm < 16;
284 }
285 case GICXXPred_I64_Predicate_LaneIdx32: {
286 return 0 <= Imm && Imm < 32;
287 }
288 case GICXXPred_I64_Predicate_NearestTiesToEven: {
289 return Imm == static_cast<int>(RoundingMode::NearestTiesToEven);
290 }
291 }
292 llvm_unreachable("Unknown predicate");
293 return false;
294}
295// PatFrag predicates.
296bool WebAssemblyInstructionSelector::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const {
297 llvm_unreachable("Unknown predicate");
298 return false;
299}
300// PatFrag predicates.
301bool WebAssemblyInstructionSelector::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const {
302 llvm_unreachable("Unknown predicate");
303 return false;
304}
305bool WebAssemblyInstructionSelector::testSimplePredicate(unsigned) const {
306 llvm_unreachable("WebAssemblyInstructionSelector does not support simple predicates!");
307 return false;
308}
309// Custom renderers.
310enum {
311 GICR_Invalid,
312 GICR_renderFrameIndex,
313};
314WebAssemblyInstructionSelector::CustomRendererFn
315WebAssemblyInstructionSelector::CustomRenderers[] = {
316 nullptr, // GICR_Invalid
317 &WebAssemblyInstructionSelector::renderFrameIndex,
318};
319
320bool WebAssemblyInstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const {
321 const PredicateBitset AvailableFeatures = getAvailableFeatures();
322 MachineIRBuilder B(I);
323 State.MIs.clear();
324 State.MIs.push_back(&I);
325
326 if (executeMatchTable(*this, State, ExecInfo, B, getMatchTable(), TII, MF->getRegInfo(), TRI, RBI, AvailableFeatures, &CoverageInfo)) {
327 return true;
328 }
329
330 return false;
331}
332
333bool WebAssemblyInstructionSelector::runCustomAction(unsigned, const MatcherState&, NewMIVector &) const {
334 llvm_unreachable("WebAssemblyInstructionSelector does not support custom C++ actions!");
335}
336#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
337#define GIMT_Encode2(Val) uint8_t(Val), uint8_t((Val) >> 8)
338#define GIMT_Encode4(Val) uint8_t(Val), uint8_t((Val) >> 8), uint8_t((Val) >> 16), uint8_t((Val) >> 24)
339#define GIMT_Encode8(Val) uint8_t(Val), uint8_t((Val) >> 8), uint8_t((Val) >> 16), uint8_t((Val) >> 24), uint8_t(uint64_t(Val) >> 32), uint8_t(uint64_t(Val) >> 40), uint8_t(uint64_t(Val) >> 48), uint8_t(uint64_t(Val) >> 56)
340#else
341#define GIMT_Encode2(Val) uint8_t((Val) >> 8), uint8_t(Val)
342#define GIMT_Encode4(Val) uint8_t((Val) >> 24), uint8_t((Val) >> 16), uint8_t((Val) >> 8), uint8_t(Val)
343#define GIMT_Encode8(Val) uint8_t(uint64_t(Val) >> 56), uint8_t(uint64_t(Val) >> 48), uint8_t(uint64_t(Val) >> 40), uint8_t(uint64_t(Val) >> 32), uint8_t((Val) >> 24), uint8_t((Val) >> 16), uint8_t((Val) >> 8), uint8_t(Val)
344#endif
345const uint8_t *WebAssemblyInstructionSelector::getMatchTable() const {
346 constexpr static uint8_t MatchTable0[] = {
347 /* 0 */ GIM_SwitchOpcode, /*MI*/0, /*[*/GIMT_Encode2(55), GIMT_Encode2(311), /*)*//*default:*//*Label 81*/ GIMT_Encode4(48543),
348 /* 10 */ /*TargetOpcode::G_ADD*//*Label 0*/ GIMT_Encode4(1034),
349 /* 14 */ /*TargetOpcode::G_SUB*//*Label 1*/ GIMT_Encode4(1490),
350 /* 18 */ /*TargetOpcode::G_MUL*//*Label 2*/ GIMT_Encode4(1960),
351 /* 22 */ /*TargetOpcode::G_SDIV*//*Label 3*/ GIMT_Encode4(2219),
352 /* 26 */ /*TargetOpcode::G_UDIV*//*Label 4*/ GIMT_Encode4(2313),
353 /* 30 */ /*TargetOpcode::G_SREM*//*Label 5*/ GIMT_Encode4(2407),
354 /* 34 */ /*TargetOpcode::G_UREM*//*Label 6*/ GIMT_Encode4(2501), GIMT_Encode4(0), GIMT_Encode4(0),
355 /* 46 */ /*TargetOpcode::G_AND*//*Label 7*/ GIMT_Encode4(2595),
356 /* 50 */ /*TargetOpcode::G_OR*//*Label 8*/ GIMT_Encode4(3781),
357 /* 54 */ /*TargetOpcode::G_XOR*//*Label 9*/ GIMT_Encode4(7455), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
358 /* 70 */ /*TargetOpcode::G_UAVGCEIL*//*Label 10*/ GIMT_Encode4(13793), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
359 /* 90 */ /*TargetOpcode::G_FRAME_INDEX*//*Label 11*/ GIMT_Encode4(13887), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
360 /* 122 */ /*TargetOpcode::G_BUILD_VECTOR*//*Label 12*/ GIMT_Encode4(13948), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
361 /* 142 */ /*TargetOpcode::G_BITCAST*//*Label 13*/ GIMT_Encode4(14697), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
362 /* 158 */ /*TargetOpcode::G_INTRINSIC_TRUNC*//*Label 14*/ GIMT_Encode4(16159), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
363 /* 174 */ /*TargetOpcode::G_INTRINSIC_ROUNDEVEN*//*Label 15*/ GIMT_Encode4(16387), GIMT_Encode4(0), GIMT_Encode4(0),
364 /* 186 */ /*TargetOpcode::G_LOAD*//*Label 16*/ GIMT_Encode4(16601),
365 /* 190 */ /*TargetOpcode::G_SEXTLOAD*//*Label 17*/ GIMT_Encode4(18508),
366 /* 194 */ /*TargetOpcode::G_ZEXTLOAD*//*Label 18*/ GIMT_Encode4(19083),
367 /* 198 */ /*TargetOpcode::G_FPEXTLOAD*//*Label 19*/ GIMT_Encode4(19658), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
368 /* 214 */ /*TargetOpcode::G_STORE*//*Label 20*/ GIMT_Encode4(19776),
369 /* 218 */ /*TargetOpcode::G_FPTRUNCSTORE*//*Label 21*/ GIMT_Encode4(21533), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
370 /* 334 */ /*TargetOpcode::G_BRCOND*//*Label 22*/ GIMT_Encode4(21651), GIMT_Encode4(0), GIMT_Encode4(0),
371 /* 346 */ /*TargetOpcode::G_INTRINSIC*//*Label 23*/ GIMT_Encode4(21679),
372 /* 350 */ /*TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS*//*Label 24*/ GIMT_Encode4(25304), GIMT_Encode4(0), GIMT_Encode4(0),
373 /* 362 */ /*TargetOpcode::G_ANYEXT*//*Label 25*/ GIMT_Encode4(26191),
374 /* 366 */ /*TargetOpcode::G_TRUNC*//*Label 26*/ GIMT_Encode4(26224), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
375 /* 382 */ /*TargetOpcode::G_CONSTANT*//*Label 27*/ GIMT_Encode4(26257),
376 /* 386 */ /*TargetOpcode::G_FCONSTANT*//*Label 28*/ GIMT_Encode4(26323), GIMT_Encode4(0), GIMT_Encode4(0),
377 /* 398 */ /*TargetOpcode::G_SEXT*//*Label 29*/ GIMT_Encode4(26389),
378 /* 402 */ /*TargetOpcode::G_SEXT_INREG*//*Label 30*/ GIMT_Encode4(26422),
379 /* 406 */ /*TargetOpcode::G_ZEXT*//*Label 31*/ GIMT_Encode4(26628),
380 /* 410 */ /*TargetOpcode::G_SHL*//*Label 32*/ GIMT_Encode4(26661),
381 /* 414 */ /*TargetOpcode::G_LSHR*//*Label 33*/ GIMT_Encode4(26943),
382 /* 418 */ /*TargetOpcode::G_ASHR*//*Label 34*/ GIMT_Encode4(27225), GIMT_Encode4(0), GIMT_Encode4(0),
383 /* 430 */ /*TargetOpcode::G_ROTR*//*Label 35*/ GIMT_Encode4(27507),
384 /* 434 */ /*TargetOpcode::G_ROTL*//*Label 36*/ GIMT_Encode4(27709),
385 /* 438 */ /*TargetOpcode::G_ICMP*//*Label 37*/ GIMT_Encode4(27911),
386 /* 442 */ /*TargetOpcode::G_FCMP*//*Label 38*/ GIMT_Encode4(32671), GIMT_Encode4(0), GIMT_Encode4(0),
387 /* 454 */ /*TargetOpcode::G_SELECT*//*Label 39*/ GIMT_Encode4(33834), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
388 /* 506 */ /*TargetOpcode::G_UADDSAT*//*Label 40*/ GIMT_Encode4(38168),
389 /* 510 */ /*TargetOpcode::G_SADDSAT*//*Label 41*/ GIMT_Encode4(38266),
390 /* 514 */ /*TargetOpcode::G_USUBSAT*//*Label 42*/ GIMT_Encode4(38364),
391 /* 518 */ /*TargetOpcode::G_SSUBSAT*//*Label 43*/ GIMT_Encode4(38462), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
392 /* 562 */ /*TargetOpcode::G_FADD*//*Label 44*/ GIMT_Encode4(38560),
393 /* 566 */ /*TargetOpcode::G_FSUB*//*Label 45*/ GIMT_Encode4(38823),
394 /* 570 */ /*TargetOpcode::G_FMUL*//*Label 46*/ GIMT_Encode4(39086),
395 /* 574 */ /*TargetOpcode::G_FMA*//*Label 47*/ GIMT_Encode4(39349), GIMT_Encode4(0),
396 /* 582 */ /*TargetOpcode::G_FDIV*//*Label 48*/ GIMT_Encode4(39510), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
397 /* 634 */ /*TargetOpcode::G_FNEG*//*Label 49*/ GIMT_Encode4(39773),
398 /* 638 */ /*TargetOpcode::G_FPEXT*//*Label 50*/ GIMT_Encode4(40001),
399 /* 642 */ /*TargetOpcode::G_FPTRUNC*//*Label 51*/ GIMT_Encode4(40034),
400 /* 646 */ /*TargetOpcode::G_FPTOSI*//*Label 52*/ GIMT_Encode4(40067),
401 /* 650 */ /*TargetOpcode::G_FPTOUI*//*Label 53*/ GIMT_Encode4(40455),
402 /* 654 */ /*TargetOpcode::G_SITOFP*//*Label 54*/ GIMT_Encode4(40843),
403 /* 658 */ /*TargetOpcode::G_UITOFP*//*Label 55*/ GIMT_Encode4(41123),
404 /* 662 */ /*TargetOpcode::G_FPTOSI_SAT*//*Label 56*/ GIMT_Encode4(41403),
405 /* 666 */ /*TargetOpcode::G_FPTOUI_SAT*//*Label 57*/ GIMT_Encode4(41675),
406 /* 670 */ /*TargetOpcode::G_FABS*//*Label 58*/ GIMT_Encode4(41947),
407 /* 674 */ /*TargetOpcode::G_FCOPYSIGN*//*Label 59*/ GIMT_Encode4(42175), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
408 /* 702 */ /*TargetOpcode::G_FMINIMUM*//*Label 60*/ GIMT_Encode4(42423),
409 /* 706 */ /*TargetOpcode::G_FMAXIMUM*//*Label 61*/ GIMT_Encode4(42686), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
410 /* 750 */ /*TargetOpcode::G_PTR_ADD*//*Label 62*/ GIMT_Encode4(42949), GIMT_Encode4(0),
411 /* 758 */ /*TargetOpcode::G_SMIN*//*Label 63*/ GIMT_Encode4(43035),
412 /* 762 */ /*TargetOpcode::G_SMAX*//*Label 64*/ GIMT_Encode4(43176),
413 /* 766 */ /*TargetOpcode::G_UMIN*//*Label 65*/ GIMT_Encode4(43317),
414 /* 770 */ /*TargetOpcode::G_UMAX*//*Label 66*/ GIMT_Encode4(43458),
415 /* 774 */ /*TargetOpcode::G_ABS*//*Label 67*/ GIMT_Encode4(43599), GIMT_Encode4(0), GIMT_Encode4(0),
416 /* 786 */ /*TargetOpcode::G_BR*//*Label 68*/ GIMT_Encode4(43755), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
417 /* 806 */ /*TargetOpcode::G_INSERT_VECTOR_ELT*//*Label 69*/ GIMT_Encode4(43777), GIMT_Encode4(0), GIMT_Encode4(0),
418 /* 818 */ /*TargetOpcode::G_SPLAT_VECTOR*//*Label 70*/ GIMT_Encode4(45801), GIMT_Encode4(0), GIMT_Encode4(0),
419 /* 830 */ /*TargetOpcode::G_CTTZ*//*Label 71*/ GIMT_Encode4(47071), GIMT_Encode4(0),
420 /* 838 */ /*TargetOpcode::G_CTLZ*//*Label 72*/ GIMT_Encode4(47151), GIMT_Encode4(0), GIMT_Encode4(0),
421 /* 850 */ /*TargetOpcode::G_CTPOP*//*Label 73*/ GIMT_Encode4(47231), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
422 /* 866 */ /*TargetOpcode::G_FCEIL*//*Label 74*/ GIMT_Encode4(47379), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
423 /* 914 */ /*TargetOpcode::G_FSQRT*//*Label 75*/ GIMT_Encode4(47607),
424 /* 918 */ /*TargetOpcode::G_FFLOOR*//*Label 76*/ GIMT_Encode4(47835),
425 /* 922 */ /*TargetOpcode::G_FRINT*//*Label 77*/ GIMT_Encode4(48063),
426 /* 926 */ /*TargetOpcode::G_FNEARBYINT*//*Label 78*/ GIMT_Encode4(48277), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
427 /* 1026 */ /*TargetOpcode::G_TRAP*//*Label 79*/ GIMT_Encode4(48505),
428 /* 1030 */ /*TargetOpcode::G_DEBUGTRAP*//*Label 80*/ GIMT_Encode4(48524),
429 /* 1034 */ // Label 0: @1034
430 /* 1034 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 88*/ GIMT_Encode4(1489),
431 /* 1045 */ /*GILLT_i32*//*Label 82*/ GIMT_Encode4(1101),
432 /* 1049 */ /*GILLT_i64*//*Label 83*/ GIMT_Encode4(1138), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
433 /* 1085 */ /*GILLT_v16i8*//*Label 84*/ GIMT_Encode4(1175),
434 /* 1089 */ /*GILLT_v8i16*//*Label 85*/ GIMT_Encode4(1214),
435 /* 1093 */ /*GILLT_v4i32*//*Label 86*/ GIMT_Encode4(1253),
436 /* 1097 */ /*GILLT_v2i64*//*Label 87*/ GIMT_Encode4(1450),
437 /* 1101 */ // Label 82: @1101
438 /* 1101 */ GIM_Try, /*On fail goto*//*Label 89*/ GIMT_Encode4(1137), // Rule ID 64 //
439 /* 1106 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
440 /* 1109 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
441 /* 1112 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
442 /* 1116 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
443 /* 1120 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
444 /* 1124 */ // (add:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (ADD_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
445 /* 1124 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I32),
446 /* 1129 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
447 /* 1135 */ GIR_RootConstrainSelectedInstOperands,
448 /* 1136 */ // GIR_Coverage, 64,
449 /* 1136 */ GIR_Done,
450 /* 1137 */ // Label 89: @1137
451 /* 1137 */ GIM_Reject,
452 /* 1138 */ // Label 83: @1138
453 /* 1138 */ GIM_Try, /*On fail goto*//*Label 90*/ GIMT_Encode4(1174), // Rule ID 65 //
454 /* 1143 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
455 /* 1146 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
456 /* 1149 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
457 /* 1153 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
458 /* 1157 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
459 /* 1161 */ // (add:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (ADD_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
460 /* 1161 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I64),
461 /* 1166 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
462 /* 1172 */ GIR_RootConstrainSelectedInstOperands,
463 /* 1173 */ // GIR_Coverage, 65,
464 /* 1173 */ GIR_Done,
465 /* 1174 */ // Label 90: @1174
466 /* 1174 */ GIM_Reject,
467 /* 1175 */ // Label 84: @1175
468 /* 1175 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 91*/ GIMT_Encode4(1213), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 278 //
469 /* 1182 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
470 /* 1185 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
471 /* 1188 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
472 /* 1192 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
473 /* 1196 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
474 /* 1200 */ // (add:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (ADD_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
475 /* 1200 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I8x16),
476 /* 1205 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
477 /* 1211 */ GIR_RootConstrainSelectedInstOperands,
478 /* 1212 */ // GIR_Coverage, 278,
479 /* 1212 */ GIR_Done,
480 /* 1213 */ // Label 91: @1213
481 /* 1213 */ GIM_Reject,
482 /* 1214 */ // Label 85: @1214
483 /* 1214 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 92*/ GIMT_Encode4(1252), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 279 //
484 /* 1221 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
485 /* 1224 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
486 /* 1227 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
487 /* 1231 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
488 /* 1235 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
489 /* 1239 */ // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (ADD_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
490 /* 1239 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I16x8),
491 /* 1244 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
492 /* 1250 */ GIR_RootConstrainSelectedInstOperands,
493 /* 1251 */ // GIR_Coverage, 279,
494 /* 1251 */ GIR_Done,
495 /* 1252 */ // Label 92: @1252
496 /* 1252 */ GIM_Reject,
497 /* 1253 */ // Label 86: @1253
498 /* 1253 */ GIM_Try, /*On fail goto*//*Label 93*/ GIMT_Encode4(1449),
499 /* 1258 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
500 /* 1261 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
501 /* 1264 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
502 /* 1268 */ GIM_Try, /*On fail goto*//*Label 94*/ GIMT_Encode4(1343), // Rule ID 1283 //
503 /* 1273 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
504 /* 1277 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
505 /* 1281 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
506 /* 1284 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_signed),
507 /* 1289 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
508 /* 1293 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
509 /* 1297 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
510 /* 1301 */ GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
511 /* 1304 */ GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_signed),
512 /* 1309 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
513 /* 1313 */ GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v16i8,
514 /* 1317 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
515 /* 1321 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
516 /* 1323 */ // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 14689:{ *:[iPTR] }, (intrinsic_wo_chain:{ *:[v8i16] } 14718:{ *:[iPTR] }, v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs)), V128:{ *:[v4i32] }:$acc) => (RELAXED_DOT_ADD:{ *:[v4i32] } v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc)
517 /* 1323 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_ADD),
518 /* 1326 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
519 /* 1328 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // lhs
520 /* 1332 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // rhs
521 /* 1336 */ GIR_RootToRootCopy, /*OpIdx*/2, // acc
522 /* 1338 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
523 /* 1341 */ GIR_RootConstrainSelectedInstOperands,
524 /* 1342 */ // GIR_Coverage, 1283,
525 /* 1342 */ GIR_EraseRootFromParent_Done,
526 /* 1343 */ // Label 94: @1343
527 /* 1343 */ GIM_Try, /*On fail goto*//*Label 95*/ GIMT_Encode4(1448),
528 /* 1348 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
529 /* 1352 */ GIM_Try, /*On fail goto*//*Label 96*/ GIMT_Encode4(1423), // Rule ID 1805 //
530 /* 1357 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
531 /* 1361 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
532 /* 1365 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
533 /* 1368 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_signed),
534 /* 1373 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
535 /* 1377 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
536 /* 1381 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
537 /* 1385 */ GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
538 /* 1388 */ GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_signed),
539 /* 1393 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
540 /* 1397 */ GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v16i8,
541 /* 1401 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
542 /* 1403 */ // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$acc, (intrinsic_wo_chain:{ *:[v4i32] } 14689:{ *:[iPTR] }, (intrinsic_wo_chain:{ *:[v8i16] } 14718:{ *:[iPTR] }, v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs))) => (RELAXED_DOT_ADD:{ *:[v4i32] } v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc)
543 /* 1403 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_ADD),
544 /* 1406 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
545 /* 1408 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // lhs
546 /* 1412 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // rhs
547 /* 1416 */ GIR_RootToRootCopy, /*OpIdx*/1, // acc
548 /* 1418 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
549 /* 1421 */ GIR_RootConstrainSelectedInstOperands,
550 /* 1422 */ // GIR_Coverage, 1805,
551 /* 1422 */ GIR_EraseRootFromParent_Done,
552 /* 1423 */ // Label 96: @1423
553 /* 1423 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 97*/ GIMT_Encode4(1447), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 280 //
554 /* 1430 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
555 /* 1434 */ // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (ADD_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
556 /* 1434 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I32x4),
557 /* 1439 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
558 /* 1445 */ GIR_RootConstrainSelectedInstOperands,
559 /* 1446 */ // GIR_Coverage, 280,
560 /* 1446 */ GIR_Done,
561 /* 1447 */ // Label 97: @1447
562 /* 1447 */ GIM_Reject,
563 /* 1448 */ // Label 95: @1448
564 /* 1448 */ GIM_Reject,
565 /* 1449 */ // Label 93: @1449
566 /* 1449 */ GIM_Reject,
567 /* 1450 */ // Label 87: @1450
568 /* 1450 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 98*/ GIMT_Encode4(1488), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 281 //
569 /* 1457 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
570 /* 1460 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
571 /* 1463 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
572 /* 1467 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
573 /* 1471 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
574 /* 1475 */ // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (ADD_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
575 /* 1475 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I64x2),
576 /* 1480 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
577 /* 1486 */ GIR_RootConstrainSelectedInstOperands,
578 /* 1487 */ // GIR_Coverage, 281,
579 /* 1487 */ GIR_Done,
580 /* 1488 */ // Label 98: @1488
581 /* 1488 */ GIM_Reject,
582 /* 1489 */ // Label 88: @1489
583 /* 1489 */ GIM_Reject,
584 /* 1490 */ // Label 1: @1490
585 /* 1490 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 105*/ GIMT_Encode4(1959),
586 /* 1501 */ /*GILLT_i32*//*Label 99*/ GIMT_Encode4(1557),
587 /* 1505 */ /*GILLT_i64*//*Label 100*/ GIMT_Encode4(1594), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
588 /* 1541 */ /*GILLT_v16i8*//*Label 101*/ GIMT_Encode4(1631),
589 /* 1545 */ /*GILLT_v8i16*//*Label 102*/ GIMT_Encode4(1713),
590 /* 1549 */ /*GILLT_v4i32*//*Label 103*/ GIMT_Encode4(1795),
591 /* 1553 */ /*GILLT_v2i64*//*Label 104*/ GIMT_Encode4(1877),
592 /* 1557 */ // Label 99: @1557
593 /* 1557 */ GIM_Try, /*On fail goto*//*Label 106*/ GIMT_Encode4(1593), // Rule ID 66 //
594 /* 1562 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
595 /* 1565 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
596 /* 1568 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
597 /* 1572 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
598 /* 1576 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
599 /* 1580 */ // (sub:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SUB_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
600 /* 1580 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I32),
601 /* 1585 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
602 /* 1591 */ GIR_RootConstrainSelectedInstOperands,
603 /* 1592 */ // GIR_Coverage, 66,
604 /* 1592 */ GIR_Done,
605 /* 1593 */ // Label 106: @1593
606 /* 1593 */ GIM_Reject,
607 /* 1594 */ // Label 100: @1594
608 /* 1594 */ GIM_Try, /*On fail goto*//*Label 107*/ GIMT_Encode4(1630), // Rule ID 67 //
609 /* 1599 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
610 /* 1602 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
611 /* 1605 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
612 /* 1609 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
613 /* 1613 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
614 /* 1617 */ // (sub:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SUB_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
615 /* 1617 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I64),
616 /* 1622 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
617 /* 1628 */ GIR_RootConstrainSelectedInstOperands,
618 /* 1629 */ // GIR_Coverage, 67,
619 /* 1629 */ GIR_Done,
620 /* 1630 */ // Label 107: @1630
621 /* 1630 */ GIM_Reject,
622 /* 1631 */ // Label 101: @1631
623 /* 1631 */ GIM_Try, /*On fail goto*//*Label 108*/ GIMT_Encode4(1712),
624 /* 1636 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
625 /* 1639 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
626 /* 1642 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
627 /* 1646 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 109*/ GIMT_Encode4(1683), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 253 //
628 /* 1653 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
629 /* 1657 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
630 /* 1663 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
631 /* 1665 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
632 /* 1669 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
633 /* 1671 */ // (sub:{ *:[v16i8] } immAllZerosV:{ *:[v16i8] }, V128:{ *:[v16i8] }:$v) => (NEG_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$v)
634 /* 1671 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I8x16),
635 /* 1674 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
636 /* 1676 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
637 /* 1678 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
638 /* 1681 */ GIR_RootConstrainSelectedInstOperands,
639 /* 1682 */ // GIR_Coverage, 253,
640 /* 1682 */ GIR_EraseRootFromParent_Done,
641 /* 1683 */ // Label 109: @1683
642 /* 1683 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 110*/ GIMT_Encode4(1711), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 286 //
643 /* 1690 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
644 /* 1694 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
645 /* 1698 */ // (sub:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SUB_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
646 /* 1698 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I8x16),
647 /* 1703 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
648 /* 1709 */ GIR_RootConstrainSelectedInstOperands,
649 /* 1710 */ // GIR_Coverage, 286,
650 /* 1710 */ GIR_Done,
651 /* 1711 */ // Label 110: @1711
652 /* 1711 */ GIM_Reject,
653 /* 1712 */ // Label 108: @1712
654 /* 1712 */ GIM_Reject,
655 /* 1713 */ // Label 102: @1713
656 /* 1713 */ GIM_Try, /*On fail goto*//*Label 111*/ GIMT_Encode4(1794),
657 /* 1718 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
658 /* 1721 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
659 /* 1724 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
660 /* 1728 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 112*/ GIMT_Encode4(1765), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 254 //
661 /* 1735 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
662 /* 1739 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
663 /* 1745 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
664 /* 1747 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
665 /* 1751 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
666 /* 1753 */ // (sub:{ *:[v8i16] } immAllZerosV:{ *:[v8i16] }, V128:{ *:[v8i16] }:$v) => (NEG_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$v)
667 /* 1753 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I16x8),
668 /* 1756 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
669 /* 1758 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
670 /* 1760 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
671 /* 1763 */ GIR_RootConstrainSelectedInstOperands,
672 /* 1764 */ // GIR_Coverage, 254,
673 /* 1764 */ GIR_EraseRootFromParent_Done,
674 /* 1765 */ // Label 112: @1765
675 /* 1765 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 113*/ GIMT_Encode4(1793), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 287 //
676 /* 1772 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
677 /* 1776 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
678 /* 1780 */ // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SUB_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
679 /* 1780 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I16x8),
680 /* 1785 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
681 /* 1791 */ GIR_RootConstrainSelectedInstOperands,
682 /* 1792 */ // GIR_Coverage, 287,
683 /* 1792 */ GIR_Done,
684 /* 1793 */ // Label 113: @1793
685 /* 1793 */ GIM_Reject,
686 /* 1794 */ // Label 111: @1794
687 /* 1794 */ GIM_Reject,
688 /* 1795 */ // Label 103: @1795
689 /* 1795 */ GIM_Try, /*On fail goto*//*Label 114*/ GIMT_Encode4(1876),
690 /* 1800 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
691 /* 1803 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
692 /* 1806 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
693 /* 1810 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 115*/ GIMT_Encode4(1847), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 255 //
694 /* 1817 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
695 /* 1821 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
696 /* 1827 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
697 /* 1829 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
698 /* 1833 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
699 /* 1835 */ // (sub:{ *:[v4i32] } immAllZerosV:{ *:[v4i32] }, V128:{ *:[v4i32] }:$v) => (NEG_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$v)
700 /* 1835 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I32x4),
701 /* 1838 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
702 /* 1840 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
703 /* 1842 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
704 /* 1845 */ GIR_RootConstrainSelectedInstOperands,
705 /* 1846 */ // GIR_Coverage, 255,
706 /* 1846 */ GIR_EraseRootFromParent_Done,
707 /* 1847 */ // Label 115: @1847
708 /* 1847 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 116*/ GIMT_Encode4(1875), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 288 //
709 /* 1854 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
710 /* 1858 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
711 /* 1862 */ // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SUB_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
712 /* 1862 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I32x4),
713 /* 1867 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
714 /* 1873 */ GIR_RootConstrainSelectedInstOperands,
715 /* 1874 */ // GIR_Coverage, 288,
716 /* 1874 */ GIR_Done,
717 /* 1875 */ // Label 116: @1875
718 /* 1875 */ GIM_Reject,
719 /* 1876 */ // Label 114: @1876
720 /* 1876 */ GIM_Reject,
721 /* 1877 */ // Label 104: @1877
722 /* 1877 */ GIM_Try, /*On fail goto*//*Label 117*/ GIMT_Encode4(1958),
723 /* 1882 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
724 /* 1885 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
725 /* 1888 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
726 /* 1892 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 118*/ GIMT_Encode4(1929), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 256 //
727 /* 1899 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
728 /* 1903 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
729 /* 1909 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
730 /* 1911 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
731 /* 1915 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
732 /* 1917 */ // (sub:{ *:[v2i64] } immAllZerosV:{ *:[v2i64] }, V128:{ *:[v2i64] }:$v) => (NEG_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$v)
733 /* 1917 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I64x2),
734 /* 1920 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
735 /* 1922 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
736 /* 1924 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
737 /* 1927 */ GIR_RootConstrainSelectedInstOperands,
738 /* 1928 */ // GIR_Coverage, 256,
739 /* 1928 */ GIR_EraseRootFromParent_Done,
740 /* 1929 */ // Label 118: @1929
741 /* 1929 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 119*/ GIMT_Encode4(1957), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 289 //
742 /* 1936 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
743 /* 1940 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
744 /* 1944 */ // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SUB_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
745 /* 1944 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I64x2),
746 /* 1949 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
747 /* 1955 */ GIR_RootConstrainSelectedInstOperands,
748 /* 1956 */ // GIR_Coverage, 289,
749 /* 1956 */ GIR_Done,
750 /* 1957 */ // Label 119: @1957
751 /* 1957 */ GIM_Reject,
752 /* 1958 */ // Label 117: @1958
753 /* 1958 */ GIM_Reject,
754 /* 1959 */ // Label 105: @1959
755 /* 1959 */ GIM_Reject,
756 /* 1960 */ // Label 2: @1960
757 /* 1960 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 125*/ GIMT_Encode4(2218),
758 /* 1971 */ /*GILLT_i32*//*Label 120*/ GIMT_Encode4(2027),
759 /* 1975 */ /*GILLT_i64*//*Label 121*/ GIMT_Encode4(2064), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
760 /* 2015 */ /*GILLT_v8i16*//*Label 122*/ GIMT_Encode4(2101),
761 /* 2019 */ /*GILLT_v4i32*//*Label 123*/ GIMT_Encode4(2140),
762 /* 2023 */ /*GILLT_v2i64*//*Label 124*/ GIMT_Encode4(2179),
763 /* 2027 */ // Label 120: @2027
764 /* 2027 */ GIM_Try, /*On fail goto*//*Label 126*/ GIMT_Encode4(2063), // Rule ID 68 //
765 /* 2032 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
766 /* 2035 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
767 /* 2038 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
768 /* 2042 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
769 /* 2046 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
770 /* 2050 */ // (mul:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (MUL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
771 /* 2050 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I32),
772 /* 2055 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
773 /* 2061 */ GIR_RootConstrainSelectedInstOperands,
774 /* 2062 */ // GIR_Coverage, 68,
775 /* 2062 */ GIR_Done,
776 /* 2063 */ // Label 126: @2063
777 /* 2063 */ GIM_Reject,
778 /* 2064 */ // Label 121: @2064
779 /* 2064 */ GIM_Try, /*On fail goto*//*Label 127*/ GIMT_Encode4(2100), // Rule ID 69 //
780 /* 2069 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
781 /* 2072 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
782 /* 2075 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
783 /* 2079 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
784 /* 2083 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
785 /* 2087 */ // (mul:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (MUL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
786 /* 2087 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I64),
787 /* 2092 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
788 /* 2098 */ GIR_RootConstrainSelectedInstOperands,
789 /* 2099 */ // GIR_Coverage, 69,
790 /* 2099 */ GIR_Done,
791 /* 2100 */ // Label 127: @2100
792 /* 2100 */ GIM_Reject,
793 /* 2101 */ // Label 122: @2101
794 /* 2101 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 128*/ GIMT_Encode4(2139), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 294 //
795 /* 2108 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
796 /* 2111 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
797 /* 2114 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
798 /* 2118 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
799 /* 2122 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
800 /* 2126 */ // (mul:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MUL_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
801 /* 2126 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I16x8),
802 /* 2131 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
803 /* 2137 */ GIR_RootConstrainSelectedInstOperands,
804 /* 2138 */ // GIR_Coverage, 294,
805 /* 2138 */ GIR_Done,
806 /* 2139 */ // Label 128: @2139
807 /* 2139 */ GIM_Reject,
808 /* 2140 */ // Label 123: @2140
809 /* 2140 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 129*/ GIMT_Encode4(2178), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 295 //
810 /* 2147 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
811 /* 2150 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
812 /* 2153 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
813 /* 2157 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
814 /* 2161 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
815 /* 2165 */ // (mul:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MUL_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
816 /* 2165 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I32x4),
817 /* 2170 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
818 /* 2176 */ GIR_RootConstrainSelectedInstOperands,
819 /* 2177 */ // GIR_Coverage, 295,
820 /* 2177 */ GIR_Done,
821 /* 2178 */ // Label 129: @2178
822 /* 2178 */ GIM_Reject,
823 /* 2179 */ // Label 124: @2179
824 /* 2179 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 130*/ GIMT_Encode4(2217), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 296 //
825 /* 2186 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
826 /* 2189 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
827 /* 2192 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
828 /* 2196 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
829 /* 2200 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
830 /* 2204 */ // (mul:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (MUL_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
831 /* 2204 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I64x2),
832 /* 2209 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
833 /* 2215 */ GIR_RootConstrainSelectedInstOperands,
834 /* 2216 */ // GIR_Coverage, 296,
835 /* 2216 */ GIR_Done,
836 /* 2217 */ // Label 130: @2217
837 /* 2217 */ GIM_Reject,
838 /* 2218 */ // Label 125: @2218
839 /* 2218 */ GIM_Reject,
840 /* 2219 */ // Label 3: @2219
841 /* 2219 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 133*/ GIMT_Encode4(2312),
842 /* 2230 */ /*GILLT_i32*//*Label 131*/ GIMT_Encode4(2238),
843 /* 2234 */ /*GILLT_i64*//*Label 132*/ GIMT_Encode4(2275),
844 /* 2238 */ // Label 131: @2238
845 /* 2238 */ GIM_Try, /*On fail goto*//*Label 134*/ GIMT_Encode4(2274), // Rule ID 70 //
846 /* 2243 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
847 /* 2246 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
848 /* 2249 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
849 /* 2253 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
850 /* 2257 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
851 /* 2261 */ // (sdiv:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (DIV_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
852 /* 2261 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_S_I32),
853 /* 2266 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
854 /* 2272 */ GIR_RootConstrainSelectedInstOperands,
855 /* 2273 */ // GIR_Coverage, 70,
856 /* 2273 */ GIR_Done,
857 /* 2274 */ // Label 134: @2274
858 /* 2274 */ GIM_Reject,
859 /* 2275 */ // Label 132: @2275
860 /* 2275 */ GIM_Try, /*On fail goto*//*Label 135*/ GIMT_Encode4(2311), // Rule ID 71 //
861 /* 2280 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
862 /* 2283 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
863 /* 2286 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
864 /* 2290 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
865 /* 2294 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
866 /* 2298 */ // (sdiv:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (DIV_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
867 /* 2298 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_S_I64),
868 /* 2303 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
869 /* 2309 */ GIR_RootConstrainSelectedInstOperands,
870 /* 2310 */ // GIR_Coverage, 71,
871 /* 2310 */ GIR_Done,
872 /* 2311 */ // Label 135: @2311
873 /* 2311 */ GIM_Reject,
874 /* 2312 */ // Label 133: @2312
875 /* 2312 */ GIM_Reject,
876 /* 2313 */ // Label 4: @2313
877 /* 2313 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 138*/ GIMT_Encode4(2406),
878 /* 2324 */ /*GILLT_i32*//*Label 136*/ GIMT_Encode4(2332),
879 /* 2328 */ /*GILLT_i64*//*Label 137*/ GIMT_Encode4(2369),
880 /* 2332 */ // Label 136: @2332
881 /* 2332 */ GIM_Try, /*On fail goto*//*Label 139*/ GIMT_Encode4(2368), // Rule ID 72 //
882 /* 2337 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
883 /* 2340 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
884 /* 2343 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
885 /* 2347 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
886 /* 2351 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
887 /* 2355 */ // (udiv:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (DIV_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
888 /* 2355 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_U_I32),
889 /* 2360 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
890 /* 2366 */ GIR_RootConstrainSelectedInstOperands,
891 /* 2367 */ // GIR_Coverage, 72,
892 /* 2367 */ GIR_Done,
893 /* 2368 */ // Label 139: @2368
894 /* 2368 */ GIM_Reject,
895 /* 2369 */ // Label 137: @2369
896 /* 2369 */ GIM_Try, /*On fail goto*//*Label 140*/ GIMT_Encode4(2405), // Rule ID 73 //
897 /* 2374 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
898 /* 2377 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
899 /* 2380 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
900 /* 2384 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
901 /* 2388 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
902 /* 2392 */ // (udiv:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (DIV_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
903 /* 2392 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_U_I64),
904 /* 2397 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
905 /* 2403 */ GIR_RootConstrainSelectedInstOperands,
906 /* 2404 */ // GIR_Coverage, 73,
907 /* 2404 */ GIR_Done,
908 /* 2405 */ // Label 140: @2405
909 /* 2405 */ GIM_Reject,
910 /* 2406 */ // Label 138: @2406
911 /* 2406 */ GIM_Reject,
912 /* 2407 */ // Label 5: @2407
913 /* 2407 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 143*/ GIMT_Encode4(2500),
914 /* 2418 */ /*GILLT_i32*//*Label 141*/ GIMT_Encode4(2426),
915 /* 2422 */ /*GILLT_i64*//*Label 142*/ GIMT_Encode4(2463),
916 /* 2426 */ // Label 141: @2426
917 /* 2426 */ GIM_Try, /*On fail goto*//*Label 144*/ GIMT_Encode4(2462), // Rule ID 74 //
918 /* 2431 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
919 /* 2434 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
920 /* 2437 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
921 /* 2441 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
922 /* 2445 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
923 /* 2449 */ // (srem:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (REM_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
924 /* 2449 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_S_I32),
925 /* 2454 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
926 /* 2460 */ GIR_RootConstrainSelectedInstOperands,
927 /* 2461 */ // GIR_Coverage, 74,
928 /* 2461 */ GIR_Done,
929 /* 2462 */ // Label 144: @2462
930 /* 2462 */ GIM_Reject,
931 /* 2463 */ // Label 142: @2463
932 /* 2463 */ GIM_Try, /*On fail goto*//*Label 145*/ GIMT_Encode4(2499), // Rule ID 75 //
933 /* 2468 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
934 /* 2471 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
935 /* 2474 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
936 /* 2478 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
937 /* 2482 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
938 /* 2486 */ // (srem:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (REM_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
939 /* 2486 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_S_I64),
940 /* 2491 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
941 /* 2497 */ GIR_RootConstrainSelectedInstOperands,
942 /* 2498 */ // GIR_Coverage, 75,
943 /* 2498 */ GIR_Done,
944 /* 2499 */ // Label 145: @2499
945 /* 2499 */ GIM_Reject,
946 /* 2500 */ // Label 143: @2500
947 /* 2500 */ GIM_Reject,
948 /* 2501 */ // Label 6: @2501
949 /* 2501 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 148*/ GIMT_Encode4(2594),
950 /* 2512 */ /*GILLT_i32*//*Label 146*/ GIMT_Encode4(2520),
951 /* 2516 */ /*GILLT_i64*//*Label 147*/ GIMT_Encode4(2557),
952 /* 2520 */ // Label 146: @2520
953 /* 2520 */ GIM_Try, /*On fail goto*//*Label 149*/ GIMT_Encode4(2556), // Rule ID 76 //
954 /* 2525 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
955 /* 2528 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
956 /* 2531 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
957 /* 2535 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
958 /* 2539 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
959 /* 2543 */ // (urem:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (REM_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
960 /* 2543 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_U_I32),
961 /* 2548 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
962 /* 2554 */ GIR_RootConstrainSelectedInstOperands,
963 /* 2555 */ // GIR_Coverage, 76,
964 /* 2555 */ GIR_Done,
965 /* 2556 */ // Label 149: @2556
966 /* 2556 */ GIM_Reject,
967 /* 2557 */ // Label 147: @2557
968 /* 2557 */ GIM_Try, /*On fail goto*//*Label 150*/ GIMT_Encode4(2593), // Rule ID 77 //
969 /* 2562 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
970 /* 2565 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
971 /* 2568 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
972 /* 2572 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
973 /* 2576 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
974 /* 2580 */ // (urem:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (REM_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
975 /* 2580 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_U_I64),
976 /* 2585 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
977 /* 2591 */ GIR_RootConstrainSelectedInstOperands,
978 /* 2592 */ // GIR_Coverage, 77,
979 /* 2592 */ GIR_Done,
980 /* 2593 */ // Label 150: @2593
981 /* 2593 */ GIM_Reject,
982 /* 2594 */ // Label 148: @2594
983 /* 2594 */ GIM_Reject,
984 /* 2595 */ // Label 7: @2595
985 /* 2595 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 157*/ GIMT_Encode4(3780),
986 /* 2606 */ /*GILLT_i32*//*Label 151*/ GIMT_Encode4(2662),
987 /* 2610 */ /*GILLT_i64*//*Label 152*/ GIMT_Encode4(3083), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
988 /* 2646 */ /*GILLT_v16i8*//*Label 153*/ GIMT_Encode4(3120),
989 /* 2650 */ /*GILLT_v8i16*//*Label 154*/ GIMT_Encode4(3285),
990 /* 2654 */ /*GILLT_v4i32*//*Label 155*/ GIMT_Encode4(3450),
991 /* 2658 */ /*GILLT_v2i64*//*Label 156*/ GIMT_Encode4(3615),
992 /* 2662 */ // Label 151: @2662
993 /* 2662 */ GIM_Try, /*On fail goto*//*Label 158*/ GIMT_Encode4(3082),
994 /* 2667 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
995 /* 2670 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
996 /* 2673 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
997 /* 2677 */ GIM_Try, /*On fail goto*//*Label 159*/ GIMT_Encode4(3055),
998 /* 2682 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
999 /* 2686 */ GIM_Try, /*On fail goto*//*Label 160*/ GIMT_Encode4(2732), // Rule ID 1103 //
1000 /* 2691 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1001 /* 2695 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1002 /* 2699 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1003 /* 2702 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
1004 /* 2707 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1005 /* 2711 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1006 /* 2716 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1007 /* 2718 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x)
1008 /* 2718 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
1009 /* 2721 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1010 /* 2723 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1011 /* 2727 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1012 /* 2730 */ GIR_RootConstrainSelectedInstOperands,
1013 /* 2731 */ // GIR_Coverage, 1103,
1014 /* 2731 */ GIR_EraseRootFromParent_Done,
1015 /* 2732 */ // Label 160: @2732
1016 /* 2732 */ GIM_Try, /*On fail goto*//*Label 161*/ GIMT_Encode4(2778), // Rule ID 1108 //
1017 /* 2737 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1018 /* 2741 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1019 /* 2745 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1020 /* 2748 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
1021 /* 2753 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1022 /* 2757 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1023 /* 2762 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1024 /* 2764 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x)
1025 /* 2764 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
1026 /* 2767 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1027 /* 2769 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1028 /* 2773 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1029 /* 2776 */ GIR_RootConstrainSelectedInstOperands,
1030 /* 2777 */ // GIR_Coverage, 1108,
1031 /* 2777 */ GIR_EraseRootFromParent_Done,
1032 /* 2778 */ // Label 161: @2778
1033 /* 2778 */ GIM_Try, /*On fail goto*//*Label 162*/ GIMT_Encode4(2824), // Rule ID 1113 //
1034 /* 2783 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1035 /* 2787 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1036 /* 2791 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1037 /* 2794 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
1038 /* 2799 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
1039 /* 2803 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1040 /* 2808 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1041 /* 2810 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x)
1042 /* 2810 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
1043 /* 2813 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1044 /* 2815 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1045 /* 2819 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1046 /* 2822 */ GIR_RootConstrainSelectedInstOperands,
1047 /* 2823 */ // GIR_Coverage, 1113,
1048 /* 2823 */ GIR_EraseRootFromParent_Done,
1049 /* 2824 */ // Label 162: @2824
1050 /* 2824 */ GIM_Try, /*On fail goto*//*Label 163*/ GIMT_Encode4(2870), // Rule ID 1118 //
1051 /* 2829 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1052 /* 2833 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1053 /* 2837 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1054 /* 2840 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
1055 /* 2845 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
1056 /* 2849 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1057 /* 2854 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1058 /* 2856 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x)
1059 /* 2856 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
1060 /* 2859 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1061 /* 2861 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1062 /* 2865 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1063 /* 2868 */ GIR_RootConstrainSelectedInstOperands,
1064 /* 2869 */ // GIR_Coverage, 1118,
1065 /* 2869 */ GIR_EraseRootFromParent_Done,
1066 /* 2870 */ // Label 163: @2870
1067 /* 2870 */ GIM_Try, /*On fail goto*//*Label 164*/ GIMT_Encode4(2916), // Rule ID 1123 //
1068 /* 2875 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1069 /* 2879 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1070 /* 2883 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1071 /* 2886 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1072 /* 2891 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1073 /* 2895 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1074 /* 2900 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1075 /* 2902 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x)
1076 /* 2902 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
1077 /* 2905 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1078 /* 2907 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1079 /* 2911 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1080 /* 2914 */ GIR_RootConstrainSelectedInstOperands,
1081 /* 2915 */ // GIR_Coverage, 1123,
1082 /* 2915 */ GIR_EraseRootFromParent_Done,
1083 /* 2916 */ // Label 164: @2916
1084 /* 2916 */ GIM_Try, /*On fail goto*//*Label 165*/ GIMT_Encode4(2962), // Rule ID 1128 //
1085 /* 2921 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1086 /* 2925 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1087 /* 2929 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1088 /* 2932 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1089 /* 2937 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1090 /* 2941 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1091 /* 2946 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1092 /* 2948 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x)
1093 /* 2948 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
1094 /* 2951 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1095 /* 2953 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1096 /* 2957 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1097 /* 2960 */ GIR_RootConstrainSelectedInstOperands,
1098 /* 2961 */ // GIR_Coverage, 1128,
1099 /* 2961 */ GIR_EraseRootFromParent_Done,
1100 /* 2962 */ // Label 165: @2962
1101 /* 2962 */ GIM_Try, /*On fail goto*//*Label 166*/ GIMT_Encode4(3008), // Rule ID 1133 //
1102 /* 2967 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1103 /* 2971 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1104 /* 2975 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1105 /* 2978 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1106 /* 2983 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
1107 /* 2987 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1108 /* 2992 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1109 /* 2994 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x)
1110 /* 2994 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
1111 /* 2997 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1112 /* 2999 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1113 /* 3003 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1114 /* 3006 */ GIR_RootConstrainSelectedInstOperands,
1115 /* 3007 */ // GIR_Coverage, 1133,
1116 /* 3007 */ GIR_EraseRootFromParent_Done,
1117 /* 3008 */ // Label 166: @3008
1118 /* 3008 */ GIM_Try, /*On fail goto*//*Label 167*/ GIMT_Encode4(3054), // Rule ID 1138 //
1119 /* 3013 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1120 /* 3017 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1121 /* 3021 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1122 /* 3024 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1123 /* 3029 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
1124 /* 3033 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1125 /* 3038 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1126 /* 3040 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x)
1127 /* 3040 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
1128 /* 3043 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1129 /* 3045 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1130 /* 3049 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1131 /* 3052 */ GIR_RootConstrainSelectedInstOperands,
1132 /* 3053 */ // GIR_Coverage, 1138,
1133 /* 3053 */ GIR_EraseRootFromParent_Done,
1134 /* 3054 */ // Label 167: @3054
1135 /* 3054 */ GIM_Reject,
1136 /* 3055 */ // Label 159: @3055
1137 /* 3055 */ GIM_Try, /*On fail goto*//*Label 168*/ GIMT_Encode4(3081), // Rule ID 78 //
1138 /* 3060 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1139 /* 3064 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1140 /* 3068 */ // (and:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (AND_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
1141 /* 3068 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND_I32),
1142 /* 3073 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1143 /* 3079 */ GIR_RootConstrainSelectedInstOperands,
1144 /* 3080 */ // GIR_Coverage, 78,
1145 /* 3080 */ GIR_Done,
1146 /* 3081 */ // Label 168: @3081
1147 /* 3081 */ GIM_Reject,
1148 /* 3082 */ // Label 158: @3082
1149 /* 3082 */ GIM_Reject,
1150 /* 3083 */ // Label 152: @3083
1151 /* 3083 */ GIM_Try, /*On fail goto*//*Label 169*/ GIMT_Encode4(3119), // Rule ID 79 //
1152 /* 3088 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
1153 /* 3091 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
1154 /* 3094 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1155 /* 3098 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1156 /* 3102 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1157 /* 3106 */ // (and:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (AND_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
1158 /* 3106 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND_I64),
1159 /* 3111 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1160 /* 3117 */ GIR_RootConstrainSelectedInstOperands,
1161 /* 3118 */ // GIR_Coverage, 79,
1162 /* 3118 */ GIR_Done,
1163 /* 3119 */ // Label 169: @3119
1164 /* 3119 */ GIM_Reject,
1165 /* 3120 */ // Label 153: @3120
1166 /* 3120 */ GIM_Try, /*On fail goto*//*Label 170*/ GIMT_Encode4(3284),
1167 /* 3125 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
1168 /* 3128 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
1169 /* 3131 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1170 /* 3135 */ GIM_Try, /*On fail goto*//*Label 171*/ GIMT_Encode4(3195), // Rule ID 1329 //
1171 /* 3140 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1172 /* 3144 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1173 /* 3148 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1174 /* 3152 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1175 /* 3156 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1176 /* 3161 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1177 /* 3165 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1178 /* 3171 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1179 /* 3173 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1180 /* 3177 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1181 /* 3179 */ // (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$rhs, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$lhs) => (ANDNOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1182 /* 3179 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1183 /* 3182 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1184 /* 3184 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1185 /* 3186 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1186 /* 3190 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1187 /* 3193 */ GIR_RootConstrainSelectedInstOperands,
1188 /* 3194 */ // GIR_Coverage, 1329,
1189 /* 3194 */ GIR_EraseRootFromParent_Done,
1190 /* 3195 */ // Label 171: @3195
1191 /* 3195 */ GIM_Try, /*On fail goto*//*Label 172*/ GIMT_Encode4(3283),
1192 /* 3200 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1193 /* 3204 */ GIM_Try, /*On fail goto*//*Label 173*/ GIMT_Encode4(3260), // Rule ID 1044 //
1194 /* 3209 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1195 /* 3213 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1196 /* 3217 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1197 /* 3221 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1198 /* 3225 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1199 /* 3230 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1200 /* 3234 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1201 /* 3240 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1202 /* 3242 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1203 /* 3244 */ // (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$rhs, immAllOnesV:{ *:[v16i8] })) => (ANDNOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1204 /* 3244 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1205 /* 3247 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1206 /* 3249 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1207 /* 3251 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1208 /* 3255 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1209 /* 3258 */ GIR_RootConstrainSelectedInstOperands,
1210 /* 3259 */ // GIR_Coverage, 1044,
1211 /* 3259 */ GIR_EraseRootFromParent_Done,
1212 /* 3260 */ // Label 173: @3260
1213 /* 3260 */ GIM_Try, /*On fail goto*//*Label 174*/ GIMT_Encode4(3282), // Rule ID 1028 //
1214 /* 3265 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1215 /* 3269 */ // (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (AND:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1216 /* 3269 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1217 /* 3274 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1218 /* 3280 */ GIR_RootConstrainSelectedInstOperands,
1219 /* 3281 */ // GIR_Coverage, 1028,
1220 /* 3281 */ GIR_Done,
1221 /* 3282 */ // Label 174: @3282
1222 /* 3282 */ GIM_Reject,
1223 /* 3283 */ // Label 172: @3283
1224 /* 3283 */ GIM_Reject,
1225 /* 3284 */ // Label 170: @3284
1226 /* 3284 */ GIM_Reject,
1227 /* 3285 */ // Label 154: @3285
1228 /* 3285 */ GIM_Try, /*On fail goto*//*Label 175*/ GIMT_Encode4(3449),
1229 /* 3290 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
1230 /* 3293 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
1231 /* 3296 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1232 /* 3300 */ GIM_Try, /*On fail goto*//*Label 176*/ GIMT_Encode4(3360), // Rule ID 1330 //
1233 /* 3305 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1234 /* 3309 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1235 /* 3313 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1236 /* 3317 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1237 /* 3321 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1238 /* 3326 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1239 /* 3330 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1240 /* 3336 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1241 /* 3338 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1242 /* 3342 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1243 /* 3344 */ // (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$rhs, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$lhs) => (ANDNOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1244 /* 3344 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1245 /* 3347 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1246 /* 3349 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1247 /* 3351 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1248 /* 3355 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1249 /* 3358 */ GIR_RootConstrainSelectedInstOperands,
1250 /* 3359 */ // GIR_Coverage, 1330,
1251 /* 3359 */ GIR_EraseRootFromParent_Done,
1252 /* 3360 */ // Label 176: @3360
1253 /* 3360 */ GIM_Try, /*On fail goto*//*Label 177*/ GIMT_Encode4(3448),
1254 /* 3365 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1255 /* 3369 */ GIM_Try, /*On fail goto*//*Label 178*/ GIMT_Encode4(3425), // Rule ID 1045 //
1256 /* 3374 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1257 /* 3378 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1258 /* 3382 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1259 /* 3386 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1260 /* 3390 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1261 /* 3395 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1262 /* 3399 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1263 /* 3405 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1264 /* 3407 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1265 /* 3409 */ // (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$rhs, immAllOnesV:{ *:[v8i16] })) => (ANDNOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1266 /* 3409 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1267 /* 3412 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1268 /* 3414 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1269 /* 3416 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1270 /* 3420 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1271 /* 3423 */ GIR_RootConstrainSelectedInstOperands,
1272 /* 3424 */ // GIR_Coverage, 1045,
1273 /* 3424 */ GIR_EraseRootFromParent_Done,
1274 /* 3425 */ // Label 178: @3425
1275 /* 3425 */ GIM_Try, /*On fail goto*//*Label 179*/ GIMT_Encode4(3447), // Rule ID 1033 //
1276 /* 3430 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1277 /* 3434 */ // (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (AND:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1278 /* 3434 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1279 /* 3439 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1280 /* 3445 */ GIR_RootConstrainSelectedInstOperands,
1281 /* 3446 */ // GIR_Coverage, 1033,
1282 /* 3446 */ GIR_Done,
1283 /* 3447 */ // Label 179: @3447
1284 /* 3447 */ GIM_Reject,
1285 /* 3448 */ // Label 177: @3448
1286 /* 3448 */ GIM_Reject,
1287 /* 3449 */ // Label 175: @3449
1288 /* 3449 */ GIM_Reject,
1289 /* 3450 */ // Label 155: @3450
1290 /* 3450 */ GIM_Try, /*On fail goto*//*Label 180*/ GIMT_Encode4(3614),
1291 /* 3455 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
1292 /* 3458 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
1293 /* 3461 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1294 /* 3465 */ GIM_Try, /*On fail goto*//*Label 181*/ GIMT_Encode4(3525), // Rule ID 1331 //
1295 /* 3470 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1296 /* 3474 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1297 /* 3478 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
1298 /* 3482 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
1299 /* 3486 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1300 /* 3491 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1301 /* 3495 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1302 /* 3501 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1303 /* 3503 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1304 /* 3507 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1305 /* 3509 */ // (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$rhs, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$lhs) => (ANDNOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
1306 /* 3509 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1307 /* 3512 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1308 /* 3514 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1309 /* 3516 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1310 /* 3520 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1311 /* 3523 */ GIR_RootConstrainSelectedInstOperands,
1312 /* 3524 */ // GIR_Coverage, 1331,
1313 /* 3524 */ GIR_EraseRootFromParent_Done,
1314 /* 3525 */ // Label 181: @3525
1315 /* 3525 */ GIM_Try, /*On fail goto*//*Label 182*/ GIMT_Encode4(3613),
1316 /* 3530 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1317 /* 3534 */ GIM_Try, /*On fail goto*//*Label 183*/ GIMT_Encode4(3590), // Rule ID 1046 //
1318 /* 3539 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1319 /* 3543 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1320 /* 3547 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
1321 /* 3551 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
1322 /* 3555 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1323 /* 3560 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1324 /* 3564 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1325 /* 3570 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1326 /* 3572 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1327 /* 3574 */ // (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$rhs, immAllOnesV:{ *:[v4i32] })) => (ANDNOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
1328 /* 3574 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1329 /* 3577 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1330 /* 3579 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1331 /* 3581 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1332 /* 3585 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1333 /* 3588 */ GIR_RootConstrainSelectedInstOperands,
1334 /* 3589 */ // GIR_Coverage, 1046,
1335 /* 3589 */ GIR_EraseRootFromParent_Done,
1336 /* 3590 */ // Label 183: @3590
1337 /* 3590 */ GIM_Try, /*On fail goto*//*Label 184*/ GIMT_Encode4(3612), // Rule ID 1034 //
1338 /* 3595 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1339 /* 3599 */ // (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (AND:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
1340 /* 3599 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1341 /* 3604 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1342 /* 3610 */ GIR_RootConstrainSelectedInstOperands,
1343 /* 3611 */ // GIR_Coverage, 1034,
1344 /* 3611 */ GIR_Done,
1345 /* 3612 */ // Label 184: @3612
1346 /* 3612 */ GIM_Reject,
1347 /* 3613 */ // Label 182: @3613
1348 /* 3613 */ GIM_Reject,
1349 /* 3614 */ // Label 180: @3614
1350 /* 3614 */ GIM_Reject,
1351 /* 3615 */ // Label 156: @3615
1352 /* 3615 */ GIM_Try, /*On fail goto*//*Label 185*/ GIMT_Encode4(3779),
1353 /* 3620 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
1354 /* 3623 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
1355 /* 3626 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1356 /* 3630 */ GIM_Try, /*On fail goto*//*Label 186*/ GIMT_Encode4(3690), // Rule ID 1332 //
1357 /* 3635 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1358 /* 3639 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1359 /* 3643 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
1360 /* 3647 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
1361 /* 3651 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1362 /* 3656 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1363 /* 3660 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1364 /* 3666 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1365 /* 3668 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1366 /* 3672 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1367 /* 3674 */ // (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$rhs, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$lhs) => (ANDNOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
1368 /* 3674 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1369 /* 3677 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1370 /* 3679 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1371 /* 3681 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1372 /* 3685 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1373 /* 3688 */ GIR_RootConstrainSelectedInstOperands,
1374 /* 3689 */ // GIR_Coverage, 1332,
1375 /* 3689 */ GIR_EraseRootFromParent_Done,
1376 /* 3690 */ // Label 186: @3690
1377 /* 3690 */ GIM_Try, /*On fail goto*//*Label 187*/ GIMT_Encode4(3778),
1378 /* 3695 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1379 /* 3699 */ GIM_Try, /*On fail goto*//*Label 188*/ GIMT_Encode4(3755), // Rule ID 1047 //
1380 /* 3704 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1381 /* 3708 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1382 /* 3712 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
1383 /* 3716 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
1384 /* 3720 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1385 /* 3725 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1386 /* 3729 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1387 /* 3735 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1388 /* 3737 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1389 /* 3739 */ // (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$rhs, immAllOnesV:{ *:[v2i64] })) => (ANDNOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
1390 /* 3739 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1391 /* 3742 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1392 /* 3744 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1393 /* 3746 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1394 /* 3750 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1395 /* 3753 */ GIR_RootConstrainSelectedInstOperands,
1396 /* 3754 */ // GIR_Coverage, 1047,
1397 /* 3754 */ GIR_EraseRootFromParent_Done,
1398 /* 3755 */ // Label 188: @3755
1399 /* 3755 */ GIM_Try, /*On fail goto*//*Label 189*/ GIMT_Encode4(3777), // Rule ID 1035 //
1400 /* 3760 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1401 /* 3764 */ // (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (AND:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
1402 /* 3764 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1403 /* 3769 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1404 /* 3775 */ GIR_RootConstrainSelectedInstOperands,
1405 /* 3776 */ // GIR_Coverage, 1035,
1406 /* 3776 */ GIR_Done,
1407 /* 3777 */ // Label 189: @3777
1408 /* 3777 */ GIM_Reject,
1409 /* 3778 */ // Label 187: @3778
1410 /* 3778 */ GIM_Reject,
1411 /* 3779 */ // Label 185: @3779
1412 /* 3779 */ GIM_Reject,
1413 /* 3780 */ // Label 157: @3780
1414 /* 3780 */ GIM_Reject,
1415 /* 3781 */ // Label 8: @3781
1416 /* 3781 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 196*/ GIMT_Encode4(7454),
1417 /* 3792 */ /*GILLT_i32*//*Label 190*/ GIMT_Encode4(3848),
1418 /* 3796 */ /*GILLT_i64*//*Label 191*/ GIMT_Encode4(3885), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
1419 /* 3832 */ /*GILLT_v16i8*//*Label 192*/ GIMT_Encode4(3922),
1420 /* 3836 */ /*GILLT_v8i16*//*Label 193*/ GIMT_Encode4(4805),
1421 /* 3840 */ /*GILLT_v4i32*//*Label 194*/ GIMT_Encode4(5688),
1422 /* 3844 */ /*GILLT_v2i64*//*Label 195*/ GIMT_Encode4(6571),
1423 /* 3848 */ // Label 190: @3848
1424 /* 3848 */ GIM_Try, /*On fail goto*//*Label 197*/ GIMT_Encode4(3884), // Rule ID 80 //
1425 /* 3853 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
1426 /* 3856 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
1427 /* 3859 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1428 /* 3863 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1429 /* 3867 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1430 /* 3871 */ // (or:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (OR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
1431 /* 3871 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR_I32),
1432 /* 3876 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1433 /* 3882 */ GIR_RootConstrainSelectedInstOperands,
1434 /* 3883 */ // GIR_Coverage, 80,
1435 /* 3883 */ GIR_Done,
1436 /* 3884 */ // Label 197: @3884
1437 /* 3884 */ GIM_Reject,
1438 /* 3885 */ // Label 191: @3885
1439 /* 3885 */ GIM_Try, /*On fail goto*//*Label 198*/ GIMT_Encode4(3921), // Rule ID 81 //
1440 /* 3890 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
1441 /* 3893 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
1442 /* 3896 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1443 /* 3900 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1444 /* 3904 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1445 /* 3908 */ // (or:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (OR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
1446 /* 3908 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR_I64),
1447 /* 3913 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1448 /* 3919 */ GIR_RootConstrainSelectedInstOperands,
1449 /* 3920 */ // GIR_Coverage, 81,
1450 /* 3920 */ GIR_Done,
1451 /* 3921 */ // Label 198: @3921
1452 /* 3921 */ GIM_Reject,
1453 /* 3922 */ // Label 192: @3922
1454 /* 3922 */ GIM_Try, /*On fail goto*//*Label 199*/ GIMT_Encode4(4804),
1455 /* 3927 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
1456 /* 3930 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
1457 /* 3933 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1458 /* 3937 */ GIM_Try, /*On fail goto*//*Label 200*/ GIMT_Encode4(4042), // Rule ID 1337 //
1459 /* 3942 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1460 /* 3946 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1461 /* 3950 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1462 /* 3954 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1463 /* 3958 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1464 /* 3962 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1465 /* 3966 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1466 /* 3970 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1467 /* 3974 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1468 /* 3979 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1469 /* 3983 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1470 /* 3989 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1471 /* 3991 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1472 /* 3996 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1473 /* 4000 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1474 /* 4004 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16i8,
1475 /* 4008 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1476 /* 4013 */ // MIs[4] c
1477 /* 4013 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1478 /* 4018 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1479 /* 4020 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1480 /* 4020 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1481 /* 4023 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1482 /* 4025 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1483 /* 4029 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1484 /* 4033 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1485 /* 4037 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1486 /* 4040 */ GIR_RootConstrainSelectedInstOperands,
1487 /* 4041 */ // GIR_Coverage, 1337,
1488 /* 4041 */ GIR_EraseRootFromParent_Done,
1489 /* 4042 */ // Label 200: @4042
1490 /* 4042 */ GIM_Try, /*On fail goto*//*Label 201*/ GIMT_Encode4(4147), // Rule ID 1336 //
1491 /* 4047 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1492 /* 4051 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1493 /* 4055 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1494 /* 4059 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1495 /* 4063 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1496 /* 4067 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1497 /* 4071 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1498 /* 4075 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1499 /* 4079 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1500 /* 4084 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1501 /* 4088 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1502 /* 4094 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1503 /* 4096 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1504 /* 4101 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1505 /* 4105 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1506 /* 4109 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16i8,
1507 /* 4113 */ // MIs[4] c
1508 /* 4113 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1509 /* 4118 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1510 /* 4123 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1511 /* 4125 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1512 /* 4125 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1513 /* 4128 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1514 /* 4130 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1515 /* 4134 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1516 /* 4138 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1517 /* 4142 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1518 /* 4145 */ GIR_RootConstrainSelectedInstOperands,
1519 /* 4146 */ // GIR_Coverage, 1336,
1520 /* 4146 */ GIR_EraseRootFromParent_Done,
1521 /* 4147 */ // Label 201: @4147
1522 /* 4147 */ GIM_Try, /*On fail goto*//*Label 202*/ GIMT_Encode4(4252), // Rule ID 1339 //
1523 /* 4152 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1524 /* 4156 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1525 /* 4160 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1526 /* 4164 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1527 /* 4168 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1528 /* 4173 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1529 /* 4177 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1530 /* 4181 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1531 /* 4185 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1532 /* 4189 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1533 /* 4194 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1534 /* 4198 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1535 /* 4204 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1536 /* 4206 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1537 /* 4210 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1538 /* 4214 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16i8,
1539 /* 4218 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1540 /* 4223 */ // MIs[4] c
1541 /* 4223 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1542 /* 4228 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1543 /* 4230 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1544 /* 4230 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1545 /* 4233 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1546 /* 4235 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1547 /* 4239 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1548 /* 4243 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1549 /* 4247 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1550 /* 4250 */ GIR_RootConstrainSelectedInstOperands,
1551 /* 4251 */ // GIR_Coverage, 1339,
1552 /* 4251 */ GIR_EraseRootFromParent_Done,
1553 /* 4252 */ // Label 202: @4252
1554 /* 4252 */ GIM_Try, /*On fail goto*//*Label 203*/ GIMT_Encode4(4357), // Rule ID 1338 //
1555 /* 4257 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1556 /* 4261 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1557 /* 4265 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1558 /* 4269 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1559 /* 4273 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1560 /* 4278 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1561 /* 4282 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1562 /* 4286 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1563 /* 4290 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1564 /* 4294 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1565 /* 4299 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1566 /* 4303 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1567 /* 4309 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1568 /* 4311 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1569 /* 4315 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1570 /* 4319 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16i8,
1571 /* 4323 */ // MIs[4] c
1572 /* 4323 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1573 /* 4328 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1574 /* 4333 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1575 /* 4335 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1576 /* 4335 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1577 /* 4338 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1578 /* 4340 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1579 /* 4344 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1580 /* 4348 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1581 /* 4352 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1582 /* 4355 */ GIR_RootConstrainSelectedInstOperands,
1583 /* 4356 */ // GIR_Coverage, 1338,
1584 /* 4356 */ GIR_EraseRootFromParent_Done,
1585 /* 4357 */ // Label 203: @4357
1586 /* 4357 */ GIM_Try, /*On fail goto*//*Label 204*/ GIMT_Encode4(4462), // Rule ID 1055 //
1587 /* 4362 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1588 /* 4366 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1589 /* 4370 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1590 /* 4374 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1591 /* 4378 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1592 /* 4383 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1593 /* 4388 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1594 /* 4392 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1595 /* 4396 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1596 /* 4400 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1597 /* 4404 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1598 /* 4408 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1599 /* 4412 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
1600 /* 4416 */ // MIs[3] c
1601 /* 4416 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1602 /* 4421 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1603 /* 4425 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1604 /* 4431 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1605 /* 4433 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1606 /* 4438 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1607 /* 4440 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1), (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1608 /* 4440 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1609 /* 4443 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1610 /* 4445 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1611 /* 4449 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1612 /* 4453 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1613 /* 4457 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1614 /* 4460 */ GIR_RootConstrainSelectedInstOperands,
1615 /* 4461 */ // GIR_Coverage, 1055,
1616 /* 4461 */ GIR_EraseRootFromParent_Done,
1617 /* 4462 */ // Label 204: @4462
1618 /* 4462 */ GIM_Try, /*On fail goto*//*Label 205*/ GIMT_Encode4(4567), // Rule ID 1334 //
1619 /* 4467 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1620 /* 4471 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1621 /* 4475 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1622 /* 4479 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1623 /* 4483 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1624 /* 4488 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1625 /* 4493 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1626 /* 4497 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1627 /* 4501 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1628 /* 4505 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1629 /* 4509 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1630 /* 4513 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1631 /* 4517 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
1632 /* 4521 */ // MIs[3] c
1633 /* 4521 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1634 /* 4526 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1635 /* 4530 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1636 /* 4536 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1637 /* 4538 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1638 /* 4543 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1639 /* 4545 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c), (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1640 /* 4545 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1641 /* 4548 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1642 /* 4550 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1643 /* 4554 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1644 /* 4558 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1645 /* 4562 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1646 /* 4565 */ GIR_RootConstrainSelectedInstOperands,
1647 /* 4566 */ // GIR_Coverage, 1334,
1648 /* 4566 */ GIR_EraseRootFromParent_Done,
1649 /* 4567 */ // Label 205: @4567
1650 /* 4567 */ GIM_Try, /*On fail goto*//*Label 206*/ GIMT_Encode4(4672), // Rule ID 1333 //
1651 /* 4572 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1652 /* 4576 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1653 /* 4580 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1654 /* 4584 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1655 /* 4588 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1656 /* 4593 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1657 /* 4598 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1658 /* 4602 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1659 /* 4606 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1660 /* 4610 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1661 /* 4614 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1662 /* 4619 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1663 /* 4623 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1664 /* 4627 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
1665 /* 4631 */ // MIs[3] c
1666 /* 4631 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1667 /* 4636 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1668 /* 4640 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1669 /* 4646 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1670 /* 4648 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1671 /* 4650 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1672 /* 4650 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1673 /* 4653 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1674 /* 4655 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1675 /* 4659 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1676 /* 4663 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1677 /* 4667 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1678 /* 4670 */ GIR_RootConstrainSelectedInstOperands,
1679 /* 4671 */ // GIR_Coverage, 1333,
1680 /* 4671 */ GIR_EraseRootFromParent_Done,
1681 /* 4672 */ // Label 206: @4672
1682 /* 4672 */ GIM_Try, /*On fail goto*//*Label 207*/ GIMT_Encode4(4777), // Rule ID 1335 //
1683 /* 4677 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1684 /* 4681 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1685 /* 4685 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1686 /* 4689 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1687 /* 4693 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1688 /* 4698 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1689 /* 4703 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1690 /* 4707 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1691 /* 4711 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1692 /* 4715 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1693 /* 4719 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1694 /* 4724 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1695 /* 4728 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1696 /* 4732 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
1697 /* 4736 */ // MIs[3] c
1698 /* 4736 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1699 /* 4741 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1700 /* 4745 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1701 /* 4751 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1702 /* 4753 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1703 /* 4755 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1704 /* 4755 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1705 /* 4758 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1706 /* 4760 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1707 /* 4764 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1708 /* 4768 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1709 /* 4772 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1710 /* 4775 */ GIR_RootConstrainSelectedInstOperands,
1711 /* 4776 */ // GIR_Coverage, 1335,
1712 /* 4776 */ GIR_EraseRootFromParent_Done,
1713 /* 4777 */ // Label 207: @4777
1714 /* 4777 */ GIM_Try, /*On fail goto*//*Label 208*/ GIMT_Encode4(4803), // Rule ID 1036 //
1715 /* 4782 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1716 /* 4786 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1717 /* 4790 */ // (or:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (OR:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1718 /* 4790 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
1719 /* 4795 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1720 /* 4801 */ GIR_RootConstrainSelectedInstOperands,
1721 /* 4802 */ // GIR_Coverage, 1036,
1722 /* 4802 */ GIR_Done,
1723 /* 4803 */ // Label 208: @4803
1724 /* 4803 */ GIM_Reject,
1725 /* 4804 */ // Label 199: @4804
1726 /* 4804 */ GIM_Reject,
1727 /* 4805 */ // Label 193: @4805
1728 /* 4805 */ GIM_Try, /*On fail goto*//*Label 209*/ GIMT_Encode4(5687),
1729 /* 4810 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
1730 /* 4813 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
1731 /* 4816 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1732 /* 4820 */ GIM_Try, /*On fail goto*//*Label 210*/ GIMT_Encode4(4925), // Rule ID 1344 //
1733 /* 4825 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1734 /* 4829 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1735 /* 4833 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1736 /* 4837 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1737 /* 4841 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1738 /* 4845 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1739 /* 4849 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1740 /* 4853 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1741 /* 4857 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1742 /* 4862 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1743 /* 4866 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1744 /* 4872 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1745 /* 4874 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1746 /* 4879 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1747 /* 4883 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1748 /* 4887 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8i16,
1749 /* 4891 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1750 /* 4896 */ // MIs[4] c
1751 /* 4896 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1752 /* 4901 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1753 /* 4903 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1754 /* 4903 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1755 /* 4906 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1756 /* 4908 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1757 /* 4912 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1758 /* 4916 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1759 /* 4920 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1760 /* 4923 */ GIR_RootConstrainSelectedInstOperands,
1761 /* 4924 */ // GIR_Coverage, 1344,
1762 /* 4924 */ GIR_EraseRootFromParent_Done,
1763 /* 4925 */ // Label 210: @4925
1764 /* 4925 */ GIM_Try, /*On fail goto*//*Label 211*/ GIMT_Encode4(5030), // Rule ID 1343 //
1765 /* 4930 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1766 /* 4934 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1767 /* 4938 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1768 /* 4942 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1769 /* 4946 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1770 /* 4950 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1771 /* 4954 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1772 /* 4958 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1773 /* 4962 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1774 /* 4967 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1775 /* 4971 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1776 /* 4977 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1777 /* 4979 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1778 /* 4984 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1779 /* 4988 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1780 /* 4992 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8i16,
1781 /* 4996 */ // MIs[4] c
1782 /* 4996 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1783 /* 5001 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1784 /* 5006 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1785 /* 5008 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1786 /* 5008 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1787 /* 5011 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1788 /* 5013 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1789 /* 5017 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1790 /* 5021 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1791 /* 5025 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1792 /* 5028 */ GIR_RootConstrainSelectedInstOperands,
1793 /* 5029 */ // GIR_Coverage, 1343,
1794 /* 5029 */ GIR_EraseRootFromParent_Done,
1795 /* 5030 */ // Label 211: @5030
1796 /* 5030 */ GIM_Try, /*On fail goto*//*Label 212*/ GIMT_Encode4(5135), // Rule ID 1346 //
1797 /* 5035 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1798 /* 5039 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1799 /* 5043 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1800 /* 5047 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1801 /* 5051 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1802 /* 5056 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1803 /* 5060 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1804 /* 5064 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1805 /* 5068 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1806 /* 5072 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1807 /* 5077 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1808 /* 5081 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1809 /* 5087 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1810 /* 5089 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1811 /* 5093 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1812 /* 5097 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8i16,
1813 /* 5101 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1814 /* 5106 */ // MIs[4] c
1815 /* 5106 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1816 /* 5111 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1817 /* 5113 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1818 /* 5113 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1819 /* 5116 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1820 /* 5118 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1821 /* 5122 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1822 /* 5126 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1823 /* 5130 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1824 /* 5133 */ GIR_RootConstrainSelectedInstOperands,
1825 /* 5134 */ // GIR_Coverage, 1346,
1826 /* 5134 */ GIR_EraseRootFromParent_Done,
1827 /* 5135 */ // Label 212: @5135
1828 /* 5135 */ GIM_Try, /*On fail goto*//*Label 213*/ GIMT_Encode4(5240), // Rule ID 1345 //
1829 /* 5140 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1830 /* 5144 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1831 /* 5148 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1832 /* 5152 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1833 /* 5156 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1834 /* 5161 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1835 /* 5165 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1836 /* 5169 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1837 /* 5173 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1838 /* 5177 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1839 /* 5182 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1840 /* 5186 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1841 /* 5192 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1842 /* 5194 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1843 /* 5198 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1844 /* 5202 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8i16,
1845 /* 5206 */ // MIs[4] c
1846 /* 5206 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1847 /* 5211 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1848 /* 5216 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1849 /* 5218 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1850 /* 5218 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1851 /* 5221 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1852 /* 5223 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1853 /* 5227 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1854 /* 5231 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1855 /* 5235 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1856 /* 5238 */ GIR_RootConstrainSelectedInstOperands,
1857 /* 5239 */ // GIR_Coverage, 1345,
1858 /* 5239 */ GIR_EraseRootFromParent_Done,
1859 /* 5240 */ // Label 213: @5240
1860 /* 5240 */ GIM_Try, /*On fail goto*//*Label 214*/ GIMT_Encode4(5345), // Rule ID 1056 //
1861 /* 5245 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1862 /* 5249 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1863 /* 5253 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1864 /* 5257 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1865 /* 5261 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1866 /* 5266 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1867 /* 5271 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1868 /* 5275 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1869 /* 5279 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1870 /* 5283 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1871 /* 5287 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1872 /* 5291 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1873 /* 5295 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
1874 /* 5299 */ // MIs[3] c
1875 /* 5299 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1876 /* 5304 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1877 /* 5308 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1878 /* 5314 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1879 /* 5316 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1880 /* 5321 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1881 /* 5323 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1), (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1882 /* 5323 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1883 /* 5326 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1884 /* 5328 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1885 /* 5332 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1886 /* 5336 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1887 /* 5340 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1888 /* 5343 */ GIR_RootConstrainSelectedInstOperands,
1889 /* 5344 */ // GIR_Coverage, 1056,
1890 /* 5344 */ GIR_EraseRootFromParent_Done,
1891 /* 5345 */ // Label 214: @5345
1892 /* 5345 */ GIM_Try, /*On fail goto*//*Label 215*/ GIMT_Encode4(5450), // Rule ID 1341 //
1893 /* 5350 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1894 /* 5354 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1895 /* 5358 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1896 /* 5362 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1897 /* 5366 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1898 /* 5371 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1899 /* 5376 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1900 /* 5380 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1901 /* 5384 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1902 /* 5388 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1903 /* 5392 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1904 /* 5396 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1905 /* 5400 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
1906 /* 5404 */ // MIs[3] c
1907 /* 5404 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1908 /* 5409 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1909 /* 5413 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1910 /* 5419 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1911 /* 5421 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1912 /* 5426 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1913 /* 5428 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c), (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1914 /* 5428 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1915 /* 5431 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1916 /* 5433 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1917 /* 5437 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1918 /* 5441 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1919 /* 5445 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1920 /* 5448 */ GIR_RootConstrainSelectedInstOperands,
1921 /* 5449 */ // GIR_Coverage, 1341,
1922 /* 5449 */ GIR_EraseRootFromParent_Done,
1923 /* 5450 */ // Label 215: @5450
1924 /* 5450 */ GIM_Try, /*On fail goto*//*Label 216*/ GIMT_Encode4(5555), // Rule ID 1340 //
1925 /* 5455 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1926 /* 5459 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1927 /* 5463 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1928 /* 5467 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1929 /* 5471 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1930 /* 5476 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1931 /* 5481 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1932 /* 5485 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1933 /* 5489 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1934 /* 5493 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1935 /* 5497 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1936 /* 5502 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1937 /* 5506 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1938 /* 5510 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
1939 /* 5514 */ // MIs[3] c
1940 /* 5514 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1941 /* 5519 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1942 /* 5523 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1943 /* 5529 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1944 /* 5531 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1945 /* 5533 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1946 /* 5533 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1947 /* 5536 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1948 /* 5538 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1949 /* 5542 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1950 /* 5546 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1951 /* 5550 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1952 /* 5553 */ GIR_RootConstrainSelectedInstOperands,
1953 /* 5554 */ // GIR_Coverage, 1340,
1954 /* 5554 */ GIR_EraseRootFromParent_Done,
1955 /* 5555 */ // Label 216: @5555
1956 /* 5555 */ GIM_Try, /*On fail goto*//*Label 217*/ GIMT_Encode4(5660), // Rule ID 1342 //
1957 /* 5560 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1958 /* 5564 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1959 /* 5568 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1960 /* 5572 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1961 /* 5576 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1962 /* 5581 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1963 /* 5586 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1964 /* 5590 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1965 /* 5594 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1966 /* 5598 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1967 /* 5602 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1968 /* 5607 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1969 /* 5611 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1970 /* 5615 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
1971 /* 5619 */ // MIs[3] c
1972 /* 5619 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1973 /* 5624 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1974 /* 5628 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1975 /* 5634 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1976 /* 5636 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1977 /* 5638 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1978 /* 5638 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1979 /* 5641 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1980 /* 5643 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1981 /* 5647 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1982 /* 5651 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1983 /* 5655 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1984 /* 5658 */ GIR_RootConstrainSelectedInstOperands,
1985 /* 5659 */ // GIR_Coverage, 1342,
1986 /* 5659 */ GIR_EraseRootFromParent_Done,
1987 /* 5660 */ // Label 217: @5660
1988 /* 5660 */ GIM_Try, /*On fail goto*//*Label 218*/ GIMT_Encode4(5686), // Rule ID 1037 //
1989 /* 5665 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1990 /* 5669 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1991 /* 5673 */ // (or:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (OR:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1992 /* 5673 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
1993 /* 5678 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1994 /* 5684 */ GIR_RootConstrainSelectedInstOperands,
1995 /* 5685 */ // GIR_Coverage, 1037,
1996 /* 5685 */ GIR_Done,
1997 /* 5686 */ // Label 218: @5686
1998 /* 5686 */ GIM_Reject,
1999 /* 5687 */ // Label 209: @5687
2000 /* 5687 */ GIM_Reject,
2001 /* 5688 */ // Label 194: @5688
2002 /* 5688 */ GIM_Try, /*On fail goto*//*Label 219*/ GIMT_Encode4(6570),
2003 /* 5693 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
2004 /* 5696 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
2005 /* 5699 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2006 /* 5703 */ GIM_Try, /*On fail goto*//*Label 220*/ GIMT_Encode4(5808), // Rule ID 1351 //
2007 /* 5708 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2008 /* 5712 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2009 /* 5716 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2010 /* 5720 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2011 /* 5724 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2012 /* 5728 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2013 /* 5732 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2014 /* 5736 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2015 /* 5740 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2016 /* 5745 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2017 /* 5749 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2018 /* 5755 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2019 /* 5757 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2020 /* 5762 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2021 /* 5766 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2022 /* 5770 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4i32,
2023 /* 5774 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2024 /* 5779 */ // MIs[4] c
2025 /* 5779 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2026 /* 5784 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2027 /* 5786 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2028 /* 5786 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2029 /* 5789 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2030 /* 5791 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2031 /* 5795 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
2032 /* 5799 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2033 /* 5803 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2034 /* 5806 */ GIR_RootConstrainSelectedInstOperands,
2035 /* 5807 */ // GIR_Coverage, 1351,
2036 /* 5807 */ GIR_EraseRootFromParent_Done,
2037 /* 5808 */ // Label 220: @5808
2038 /* 5808 */ GIM_Try, /*On fail goto*//*Label 221*/ GIMT_Encode4(5913), // Rule ID 1350 //
2039 /* 5813 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2040 /* 5817 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2041 /* 5821 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2042 /* 5825 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2043 /* 5829 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2044 /* 5833 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2045 /* 5837 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2046 /* 5841 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2047 /* 5845 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2048 /* 5850 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2049 /* 5854 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2050 /* 5860 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2051 /* 5862 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2052 /* 5867 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2053 /* 5871 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2054 /* 5875 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4i32,
2055 /* 5879 */ // MIs[4] c
2056 /* 5879 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2057 /* 5884 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2058 /* 5889 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2059 /* 5891 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2060 /* 5891 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2061 /* 5894 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2062 /* 5896 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2063 /* 5900 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
2064 /* 5904 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2065 /* 5908 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2066 /* 5911 */ GIR_RootConstrainSelectedInstOperands,
2067 /* 5912 */ // GIR_Coverage, 1350,
2068 /* 5912 */ GIR_EraseRootFromParent_Done,
2069 /* 5913 */ // Label 221: @5913
2070 /* 5913 */ GIM_Try, /*On fail goto*//*Label 222*/ GIMT_Encode4(6018), // Rule ID 1353 //
2071 /* 5918 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2072 /* 5922 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2073 /* 5926 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2074 /* 5930 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2075 /* 5934 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2076 /* 5939 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2077 /* 5943 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2078 /* 5947 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2079 /* 5951 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2080 /* 5955 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2081 /* 5960 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2082 /* 5964 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2083 /* 5970 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2084 /* 5972 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2085 /* 5976 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2086 /* 5980 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4i32,
2087 /* 5984 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2088 /* 5989 */ // MIs[4] c
2089 /* 5989 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2090 /* 5994 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2091 /* 5996 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2092 /* 5996 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2093 /* 5999 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2094 /* 6001 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2095 /* 6005 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2096 /* 6009 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2097 /* 6013 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2098 /* 6016 */ GIR_RootConstrainSelectedInstOperands,
2099 /* 6017 */ // GIR_Coverage, 1353,
2100 /* 6017 */ GIR_EraseRootFromParent_Done,
2101 /* 6018 */ // Label 222: @6018
2102 /* 6018 */ GIM_Try, /*On fail goto*//*Label 223*/ GIMT_Encode4(6123), // Rule ID 1352 //
2103 /* 6023 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2104 /* 6027 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2105 /* 6031 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2106 /* 6035 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2107 /* 6039 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2108 /* 6044 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2109 /* 6048 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2110 /* 6052 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2111 /* 6056 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2112 /* 6060 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2113 /* 6065 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2114 /* 6069 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2115 /* 6075 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2116 /* 6077 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2117 /* 6081 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2118 /* 6085 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4i32,
2119 /* 6089 */ // MIs[4] c
2120 /* 6089 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2121 /* 6094 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2122 /* 6099 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2123 /* 6101 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2124 /* 6101 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2125 /* 6104 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2126 /* 6106 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2127 /* 6110 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2128 /* 6114 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2129 /* 6118 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2130 /* 6121 */ GIR_RootConstrainSelectedInstOperands,
2131 /* 6122 */ // GIR_Coverage, 1352,
2132 /* 6122 */ GIR_EraseRootFromParent_Done,
2133 /* 6123 */ // Label 223: @6123
2134 /* 6123 */ GIM_Try, /*On fail goto*//*Label 224*/ GIMT_Encode4(6228), // Rule ID 1057 //
2135 /* 6128 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2136 /* 6132 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2137 /* 6136 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2138 /* 6140 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2139 /* 6144 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2140 /* 6149 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2141 /* 6154 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2142 /* 6158 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2143 /* 6162 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2144 /* 6166 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2145 /* 6170 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2146 /* 6174 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2147 /* 6178 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
2148 /* 6182 */ // MIs[3] c
2149 /* 6182 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2150 /* 6187 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2151 /* 6191 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2152 /* 6197 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2153 /* 6199 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2154 /* 6204 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2155 /* 6206 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1), (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2156 /* 6206 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2157 /* 6209 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2158 /* 6211 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2159 /* 6215 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2160 /* 6219 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2161 /* 6223 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2162 /* 6226 */ GIR_RootConstrainSelectedInstOperands,
2163 /* 6227 */ // GIR_Coverage, 1057,
2164 /* 6227 */ GIR_EraseRootFromParent_Done,
2165 /* 6228 */ // Label 224: @6228
2166 /* 6228 */ GIM_Try, /*On fail goto*//*Label 225*/ GIMT_Encode4(6333), // Rule ID 1348 //
2167 /* 6233 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2168 /* 6237 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2169 /* 6241 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2170 /* 6245 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2171 /* 6249 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2172 /* 6254 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2173 /* 6259 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2174 /* 6263 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2175 /* 6267 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2176 /* 6271 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2177 /* 6275 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2178 /* 6279 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2179 /* 6283 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
2180 /* 6287 */ // MIs[3] c
2181 /* 6287 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2182 /* 6292 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2183 /* 6296 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2184 /* 6302 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2185 /* 6304 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2186 /* 6309 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2187 /* 6311 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c), (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2188 /* 6311 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2189 /* 6314 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2190 /* 6316 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2191 /* 6320 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2192 /* 6324 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2193 /* 6328 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2194 /* 6331 */ GIR_RootConstrainSelectedInstOperands,
2195 /* 6332 */ // GIR_Coverage, 1348,
2196 /* 6332 */ GIR_EraseRootFromParent_Done,
2197 /* 6333 */ // Label 225: @6333
2198 /* 6333 */ GIM_Try, /*On fail goto*//*Label 226*/ GIMT_Encode4(6438), // Rule ID 1347 //
2199 /* 6338 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2200 /* 6342 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2201 /* 6346 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2202 /* 6350 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2203 /* 6354 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2204 /* 6359 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2205 /* 6364 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2206 /* 6368 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2207 /* 6372 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2208 /* 6376 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2209 /* 6380 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2210 /* 6385 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2211 /* 6389 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2212 /* 6393 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
2213 /* 6397 */ // MIs[3] c
2214 /* 6397 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2215 /* 6402 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2216 /* 6406 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2217 /* 6412 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2218 /* 6414 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2219 /* 6416 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2220 /* 6416 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2221 /* 6419 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2222 /* 6421 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2223 /* 6425 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2224 /* 6429 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2225 /* 6433 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2226 /* 6436 */ GIR_RootConstrainSelectedInstOperands,
2227 /* 6437 */ // GIR_Coverage, 1347,
2228 /* 6437 */ GIR_EraseRootFromParent_Done,
2229 /* 6438 */ // Label 226: @6438
2230 /* 6438 */ GIM_Try, /*On fail goto*//*Label 227*/ GIMT_Encode4(6543), // Rule ID 1349 //
2231 /* 6443 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2232 /* 6447 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2233 /* 6451 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2234 /* 6455 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2235 /* 6459 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2236 /* 6464 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2237 /* 6469 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2238 /* 6473 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2239 /* 6477 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2240 /* 6481 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2241 /* 6485 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2242 /* 6490 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2243 /* 6494 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2244 /* 6498 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
2245 /* 6502 */ // MIs[3] c
2246 /* 6502 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2247 /* 6507 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2248 /* 6511 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2249 /* 6517 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2250 /* 6519 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2251 /* 6521 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2252 /* 6521 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2253 /* 6524 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2254 /* 6526 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2255 /* 6530 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2256 /* 6534 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2257 /* 6538 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2258 /* 6541 */ GIR_RootConstrainSelectedInstOperands,
2259 /* 6542 */ // GIR_Coverage, 1349,
2260 /* 6542 */ GIR_EraseRootFromParent_Done,
2261 /* 6543 */ // Label 227: @6543
2262 /* 6543 */ GIM_Try, /*On fail goto*//*Label 228*/ GIMT_Encode4(6569), // Rule ID 1038 //
2263 /* 6548 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2264 /* 6552 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2265 /* 6556 */ // (or:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (OR:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
2266 /* 6556 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
2267 /* 6561 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2268 /* 6567 */ GIR_RootConstrainSelectedInstOperands,
2269 /* 6568 */ // GIR_Coverage, 1038,
2270 /* 6568 */ GIR_Done,
2271 /* 6569 */ // Label 228: @6569
2272 /* 6569 */ GIM_Reject,
2273 /* 6570 */ // Label 219: @6570
2274 /* 6570 */ GIM_Reject,
2275 /* 6571 */ // Label 195: @6571
2276 /* 6571 */ GIM_Try, /*On fail goto*//*Label 229*/ GIMT_Encode4(7453),
2277 /* 6576 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
2278 /* 6579 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
2279 /* 6582 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2280 /* 6586 */ GIM_Try, /*On fail goto*//*Label 230*/ GIMT_Encode4(6691), // Rule ID 1358 //
2281 /* 6591 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2282 /* 6595 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2283 /* 6599 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2284 /* 6603 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2285 /* 6607 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2286 /* 6611 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2287 /* 6615 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2288 /* 6619 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2289 /* 6623 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2290 /* 6628 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2291 /* 6632 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2292 /* 6638 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2293 /* 6640 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2294 /* 6645 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2295 /* 6649 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2296 /* 6653 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2i64,
2297 /* 6657 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2298 /* 6662 */ // MIs[4] c
2299 /* 6662 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2300 /* 6667 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2301 /* 6669 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2302 /* 6669 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2303 /* 6672 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2304 /* 6674 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2305 /* 6678 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
2306 /* 6682 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2307 /* 6686 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2308 /* 6689 */ GIR_RootConstrainSelectedInstOperands,
2309 /* 6690 */ // GIR_Coverage, 1358,
2310 /* 6690 */ GIR_EraseRootFromParent_Done,
2311 /* 6691 */ // Label 230: @6691
2312 /* 6691 */ GIM_Try, /*On fail goto*//*Label 231*/ GIMT_Encode4(6796), // Rule ID 1357 //
2313 /* 6696 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2314 /* 6700 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2315 /* 6704 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2316 /* 6708 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2317 /* 6712 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2318 /* 6716 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2319 /* 6720 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2320 /* 6724 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2321 /* 6728 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2322 /* 6733 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2323 /* 6737 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2324 /* 6743 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2325 /* 6745 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2326 /* 6750 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2327 /* 6754 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2328 /* 6758 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2i64,
2329 /* 6762 */ // MIs[4] c
2330 /* 6762 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2331 /* 6767 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2332 /* 6772 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2333 /* 6774 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2334 /* 6774 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2335 /* 6777 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2336 /* 6779 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2337 /* 6783 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
2338 /* 6787 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2339 /* 6791 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2340 /* 6794 */ GIR_RootConstrainSelectedInstOperands,
2341 /* 6795 */ // GIR_Coverage, 1357,
2342 /* 6795 */ GIR_EraseRootFromParent_Done,
2343 /* 6796 */ // Label 231: @6796
2344 /* 6796 */ GIM_Try, /*On fail goto*//*Label 232*/ GIMT_Encode4(6901), // Rule ID 1360 //
2345 /* 6801 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2346 /* 6805 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2347 /* 6809 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2348 /* 6813 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2349 /* 6817 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2350 /* 6822 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2351 /* 6826 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2352 /* 6830 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2353 /* 6834 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2354 /* 6838 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2355 /* 6843 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2356 /* 6847 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2357 /* 6853 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2358 /* 6855 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2359 /* 6859 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2360 /* 6863 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2i64,
2361 /* 6867 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2362 /* 6872 */ // MIs[4] c
2363 /* 6872 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2364 /* 6877 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2365 /* 6879 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2366 /* 6879 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2367 /* 6882 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2368 /* 6884 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2369 /* 6888 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2370 /* 6892 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2371 /* 6896 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2372 /* 6899 */ GIR_RootConstrainSelectedInstOperands,
2373 /* 6900 */ // GIR_Coverage, 1360,
2374 /* 6900 */ GIR_EraseRootFromParent_Done,
2375 /* 6901 */ // Label 232: @6901
2376 /* 6901 */ GIM_Try, /*On fail goto*//*Label 233*/ GIMT_Encode4(7006), // Rule ID 1359 //
2377 /* 6906 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2378 /* 6910 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2379 /* 6914 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2380 /* 6918 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2381 /* 6922 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2382 /* 6927 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2383 /* 6931 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2384 /* 6935 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2385 /* 6939 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2386 /* 6943 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2387 /* 6948 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2388 /* 6952 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2389 /* 6958 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2390 /* 6960 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2391 /* 6964 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2392 /* 6968 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2i64,
2393 /* 6972 */ // MIs[4] c
2394 /* 6972 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2395 /* 6977 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2396 /* 6982 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2397 /* 6984 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2398 /* 6984 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2399 /* 6987 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2400 /* 6989 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2401 /* 6993 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2402 /* 6997 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2403 /* 7001 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2404 /* 7004 */ GIR_RootConstrainSelectedInstOperands,
2405 /* 7005 */ // GIR_Coverage, 1359,
2406 /* 7005 */ GIR_EraseRootFromParent_Done,
2407 /* 7006 */ // Label 233: @7006
2408 /* 7006 */ GIM_Try, /*On fail goto*//*Label 234*/ GIMT_Encode4(7111), // Rule ID 1058 //
2409 /* 7011 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2410 /* 7015 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2411 /* 7019 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2412 /* 7023 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2413 /* 7027 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2414 /* 7032 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2415 /* 7037 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2416 /* 7041 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2417 /* 7045 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2418 /* 7049 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2419 /* 7053 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2420 /* 7057 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2421 /* 7061 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
2422 /* 7065 */ // MIs[3] c
2423 /* 7065 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2424 /* 7070 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2425 /* 7074 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2426 /* 7080 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2427 /* 7082 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2428 /* 7087 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2429 /* 7089 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1), (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2430 /* 7089 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2431 /* 7092 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2432 /* 7094 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2433 /* 7098 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2434 /* 7102 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2435 /* 7106 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2436 /* 7109 */ GIR_RootConstrainSelectedInstOperands,
2437 /* 7110 */ // GIR_Coverage, 1058,
2438 /* 7110 */ GIR_EraseRootFromParent_Done,
2439 /* 7111 */ // Label 234: @7111
2440 /* 7111 */ GIM_Try, /*On fail goto*//*Label 235*/ GIMT_Encode4(7216), // Rule ID 1355 //
2441 /* 7116 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2442 /* 7120 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2443 /* 7124 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2444 /* 7128 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2445 /* 7132 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2446 /* 7137 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2447 /* 7142 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2448 /* 7146 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2449 /* 7150 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2450 /* 7154 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2451 /* 7158 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2452 /* 7162 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2453 /* 7166 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
2454 /* 7170 */ // MIs[3] c
2455 /* 7170 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2456 /* 7175 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2457 /* 7179 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2458 /* 7185 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2459 /* 7187 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2460 /* 7192 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2461 /* 7194 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c), (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2462 /* 7194 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2463 /* 7197 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2464 /* 7199 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2465 /* 7203 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2466 /* 7207 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2467 /* 7211 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2468 /* 7214 */ GIR_RootConstrainSelectedInstOperands,
2469 /* 7215 */ // GIR_Coverage, 1355,
2470 /* 7215 */ GIR_EraseRootFromParent_Done,
2471 /* 7216 */ // Label 235: @7216
2472 /* 7216 */ GIM_Try, /*On fail goto*//*Label 236*/ GIMT_Encode4(7321), // Rule ID 1354 //
2473 /* 7221 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2474 /* 7225 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2475 /* 7229 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2476 /* 7233 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2477 /* 7237 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2478 /* 7242 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2479 /* 7247 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2480 /* 7251 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2481 /* 7255 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2482 /* 7259 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2483 /* 7263 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2484 /* 7268 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2485 /* 7272 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2486 /* 7276 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
2487 /* 7280 */ // MIs[3] c
2488 /* 7280 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2489 /* 7285 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2490 /* 7289 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2491 /* 7295 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2492 /* 7297 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2493 /* 7299 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2494 /* 7299 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2495 /* 7302 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2496 /* 7304 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2497 /* 7308 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2498 /* 7312 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2499 /* 7316 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2500 /* 7319 */ GIR_RootConstrainSelectedInstOperands,
2501 /* 7320 */ // GIR_Coverage, 1354,
2502 /* 7320 */ GIR_EraseRootFromParent_Done,
2503 /* 7321 */ // Label 236: @7321
2504 /* 7321 */ GIM_Try, /*On fail goto*//*Label 237*/ GIMT_Encode4(7426), // Rule ID 1356 //
2505 /* 7326 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2506 /* 7330 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2507 /* 7334 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2508 /* 7338 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2509 /* 7342 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2510 /* 7347 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2511 /* 7352 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2512 /* 7356 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2513 /* 7360 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2514 /* 7364 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2515 /* 7368 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2516 /* 7373 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2517 /* 7377 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2518 /* 7381 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
2519 /* 7385 */ // MIs[3] c
2520 /* 7385 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2521 /* 7390 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2522 /* 7394 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2523 /* 7400 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2524 /* 7402 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2525 /* 7404 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2526 /* 7404 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2527 /* 7407 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2528 /* 7409 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2529 /* 7413 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2530 /* 7417 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2531 /* 7421 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2532 /* 7424 */ GIR_RootConstrainSelectedInstOperands,
2533 /* 7425 */ // GIR_Coverage, 1356,
2534 /* 7425 */ GIR_EraseRootFromParent_Done,
2535 /* 7426 */ // Label 237: @7426
2536 /* 7426 */ GIM_Try, /*On fail goto*//*Label 238*/ GIMT_Encode4(7452), // Rule ID 1039 //
2537 /* 7431 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2538 /* 7435 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2539 /* 7439 */ // (or:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (OR:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
2540 /* 7439 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
2541 /* 7444 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2542 /* 7450 */ GIR_RootConstrainSelectedInstOperands,
2543 /* 7451 */ // GIR_Coverage, 1039,
2544 /* 7451 */ GIR_Done,
2545 /* 7452 */ // Label 238: @7452
2546 /* 7452 */ GIM_Reject,
2547 /* 7453 */ // Label 229: @7453
2548 /* 7453 */ GIM_Reject,
2549 /* 7454 */ // Label 196: @7454
2550 /* 7454 */ GIM_Reject,
2551 /* 7455 */ // Label 9: @7455
2552 /* 7455 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 245*/ GIMT_Encode4(13792),
2553 /* 7466 */ /*GILLT_i32*//*Label 239*/ GIMT_Encode4(7522),
2554 /* 7470 */ /*GILLT_i64*//*Label 240*/ GIMT_Encode4(7559), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
2555 /* 7506 */ /*GILLT_v16i8*//*Label 241*/ GIMT_Encode4(7596),
2556 /* 7510 */ /*GILLT_v8i16*//*Label 242*/ GIMT_Encode4(9145),
2557 /* 7514 */ /*GILLT_v4i32*//*Label 243*/ GIMT_Encode4(10694),
2558 /* 7518 */ /*GILLT_v2i64*//*Label 244*/ GIMT_Encode4(12243),
2559 /* 7522 */ // Label 239: @7522
2560 /* 7522 */ GIM_Try, /*On fail goto*//*Label 246*/ GIMT_Encode4(7558), // Rule ID 82 //
2561 /* 7527 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
2562 /* 7530 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
2563 /* 7533 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
2564 /* 7537 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
2565 /* 7541 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
2566 /* 7545 */ // (xor:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (XOR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
2567 /* 7545 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR_I32),
2568 /* 7550 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2569 /* 7556 */ GIR_RootConstrainSelectedInstOperands,
2570 /* 7557 */ // GIR_Coverage, 82,
2571 /* 7557 */ GIR_Done,
2572 /* 7558 */ // Label 246: @7558
2573 /* 7558 */ GIM_Reject,
2574 /* 7559 */ // Label 240: @7559
2575 /* 7559 */ GIM_Try, /*On fail goto*//*Label 247*/ GIMT_Encode4(7595), // Rule ID 83 //
2576 /* 7564 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
2577 /* 7567 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
2578 /* 7570 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
2579 /* 7574 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
2580 /* 7578 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
2581 /* 7582 */ // (xor:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (XOR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
2582 /* 7582 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR_I64),
2583 /* 7587 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2584 /* 7593 */ GIR_RootConstrainSelectedInstOperands,
2585 /* 7594 */ // GIR_Coverage, 83,
2586 /* 7594 */ GIR_Done,
2587 /* 7595 */ // Label 247: @7595
2588 /* 7595 */ GIM_Reject,
2589 /* 7596 */ // Label 241: @7596
2590 /* 7596 */ GIM_Try, /*On fail goto*//*Label 248*/ GIMT_Encode4(9144),
2591 /* 7601 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
2592 /* 7604 */ GIM_Try, /*On fail goto*//*Label 249*/ GIMT_Encode4(8050),
2593 /* 7609 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2594 /* 7613 */ GIM_Try, /*On fail goto*//*Label 250*/ GIMT_Encode4(7722), // Rule ID 1390 //
2595 /* 7618 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2596 /* 7622 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2597 /* 7626 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2598 /* 7630 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2599 /* 7634 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2600 /* 7638 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2601 /* 7642 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2602 /* 7646 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2603 /* 7650 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2604 /* 7655 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2605 /* 7659 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2606 /* 7665 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2607 /* 7667 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2608 /* 7671 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2609 /* 7675 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16i8,
2610 /* 7679 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16i8,
2611 /* 7683 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2612 /* 7688 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2613 /* 7693 */ // MIs[0] v2
2614 /* 7693 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
2615 /* 7698 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2616 /* 7700 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2617 /* 7700 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2618 /* 7703 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2619 /* 7705 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
2620 /* 7709 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2621 /* 7713 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2622 /* 7717 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2623 /* 7720 */ GIR_RootConstrainSelectedInstOperands,
2624 /* 7721 */ // GIR_Coverage, 1390,
2625 /* 7721 */ GIR_EraseRootFromParent_Done,
2626 /* 7722 */ // Label 250: @7722
2627 /* 7722 */ GIM_Try, /*On fail goto*//*Label 251*/ GIMT_Encode4(7831), // Rule ID 1391 //
2628 /* 7727 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2629 /* 7731 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2630 /* 7735 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2631 /* 7739 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2632 /* 7743 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2633 /* 7747 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2634 /* 7751 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2635 /* 7755 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2636 /* 7759 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2637 /* 7764 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2638 /* 7768 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2639 /* 7774 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2640 /* 7776 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2641 /* 7780 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2642 /* 7784 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16i8,
2643 /* 7788 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16i8,
2644 /* 7792 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2645 /* 7797 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2646 /* 7802 */ // MIs[0] v2
2647 /* 7802 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
2648 /* 7807 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2649 /* 7809 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2650 /* 7809 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2651 /* 7812 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2652 /* 7814 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
2653 /* 7818 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2654 /* 7822 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2655 /* 7826 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2656 /* 7829 */ GIR_RootConstrainSelectedInstOperands,
2657 /* 7830 */ // GIR_Coverage, 1391,
2658 /* 7830 */ GIR_EraseRootFromParent_Done,
2659 /* 7831 */ // Label 251: @7831
2660 /* 7831 */ GIM_Try, /*On fail goto*//*Label 252*/ GIMT_Encode4(7940), // Rule ID 1063 //
2661 /* 7836 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2662 /* 7840 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2663 /* 7844 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2664 /* 7848 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2665 /* 7852 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2666 /* 7856 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2667 /* 7860 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2668 /* 7864 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2669 /* 7868 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2670 /* 7873 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2671 /* 7878 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2672 /* 7882 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2673 /* 7886 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16i8,
2674 /* 7890 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
2675 /* 7894 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2676 /* 7899 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2677 /* 7903 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2678 /* 7909 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2679 /* 7911 */ // MIs[0] v2
2680 /* 7911 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
2681 /* 7916 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2682 /* 7918 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2683 /* 7918 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2684 /* 7921 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2685 /* 7923 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2686 /* 7927 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2687 /* 7931 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2688 /* 7935 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2689 /* 7938 */ GIR_RootConstrainSelectedInstOperands,
2690 /* 7939 */ // GIR_Coverage, 1063,
2691 /* 7939 */ GIR_EraseRootFromParent_Done,
2692 /* 7940 */ // Label 252: @7940
2693 /* 7940 */ GIM_Try, /*On fail goto*//*Label 253*/ GIMT_Encode4(8049), // Rule ID 1389 //
2694 /* 7945 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2695 /* 7949 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2696 /* 7953 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2697 /* 7957 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2698 /* 7961 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2699 /* 7965 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2700 /* 7969 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2701 /* 7973 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2702 /* 7977 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2703 /* 7982 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2704 /* 7987 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2705 /* 7991 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2706 /* 7995 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16i8,
2707 /* 7999 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
2708 /* 8003 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2709 /* 8008 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2710 /* 8012 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2711 /* 8018 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2712 /* 8020 */ // MIs[0] v2
2713 /* 8020 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2714 /* 8025 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2715 /* 8027 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2716 /* 8027 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2717 /* 8030 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2718 /* 8032 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2719 /* 8036 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2720 /* 8040 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2721 /* 8044 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2722 /* 8047 */ GIR_RootConstrainSelectedInstOperands,
2723 /* 8048 */ // GIR_Coverage, 1389,
2724 /* 8048 */ GIR_EraseRootFromParent_Done,
2725 /* 8049 */ // Label 253: @8049
2726 /* 8049 */ GIM_Reject,
2727 /* 8050 */ // Label 249: @8050
2728 /* 8050 */ GIM_Try, /*On fail goto*//*Label 254*/ GIMT_Encode4(8459),
2729 /* 8055 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
2730 /* 8058 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2731 /* 8062 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2732 /* 8066 */ GIM_Try, /*On fail goto*//*Label 255*/ GIMT_Encode4(8164), // Rule ID 1394 //
2733 /* 8071 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2734 /* 8075 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2735 /* 8079 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2736 /* 8083 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2737 /* 8087 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2738 /* 8091 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2739 /* 8095 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2740 /* 8099 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2741 /* 8103 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2742 /* 8108 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2743 /* 8112 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2744 /* 8118 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2745 /* 8120 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2746 /* 8124 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2747 /* 8128 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16i8,
2748 /* 8132 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2749 /* 8137 */ // MIs[4] v2
2750 /* 8137 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
2751 /* 8142 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2752 /* 8144 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2753 /* 8144 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2754 /* 8147 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2755 /* 8149 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2756 /* 8151 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2757 /* 8155 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2758 /* 8159 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2759 /* 8162 */ GIR_RootConstrainSelectedInstOperands,
2760 /* 8163 */ // GIR_Coverage, 1394,
2761 /* 8163 */ GIR_EraseRootFromParent_Done,
2762 /* 8164 */ // Label 255: @8164
2763 /* 8164 */ GIM_Try, /*On fail goto*//*Label 256*/ GIMT_Encode4(8262), // Rule ID 1395 //
2764 /* 8169 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2765 /* 8173 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2766 /* 8177 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2767 /* 8181 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2768 /* 8185 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2769 /* 8189 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2770 /* 8193 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2771 /* 8197 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2772 /* 8201 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2773 /* 8206 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2774 /* 8210 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2775 /* 8216 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2776 /* 8218 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2777 /* 8222 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2778 /* 8226 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16i8,
2779 /* 8230 */ // MIs[4] v2
2780 /* 8230 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
2781 /* 8235 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2782 /* 8240 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2783 /* 8242 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2784 /* 8242 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2785 /* 8245 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2786 /* 8247 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2787 /* 8249 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2788 /* 8253 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2789 /* 8257 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2790 /* 8260 */ GIR_RootConstrainSelectedInstOperands,
2791 /* 8261 */ // GIR_Coverage, 1395,
2792 /* 8261 */ GIR_EraseRootFromParent_Done,
2793 /* 8262 */ // Label 256: @8262
2794 /* 8262 */ GIM_Try, /*On fail goto*//*Label 257*/ GIMT_Encode4(8360), // Rule ID 1392 //
2795 /* 8267 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2796 /* 8271 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2797 /* 8275 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2798 /* 8279 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2799 /* 8283 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2800 /* 8287 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2801 /* 8291 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2802 /* 8295 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2803 /* 8300 */ // MIs[2] v2
2804 /* 8300 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
2805 /* 8305 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2806 /* 8309 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2807 /* 8313 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16i8,
2808 /* 8317 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
2809 /* 8321 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2810 /* 8326 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2811 /* 8330 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2812 /* 8336 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2813 /* 8338 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2814 /* 8340 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2815 /* 8340 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2816 /* 8343 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2817 /* 8345 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2818 /* 8347 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2819 /* 8351 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2820 /* 8355 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2821 /* 8358 */ GIR_RootConstrainSelectedInstOperands,
2822 /* 8359 */ // GIR_Coverage, 1392,
2823 /* 8359 */ GIR_EraseRootFromParent_Done,
2824 /* 8360 */ // Label 257: @8360
2825 /* 8360 */ GIM_Try, /*On fail goto*//*Label 258*/ GIMT_Encode4(8458), // Rule ID 1393 //
2826 /* 8365 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2827 /* 8369 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2828 /* 8373 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2829 /* 8377 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2830 /* 8381 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2831 /* 8385 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2832 /* 8389 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2833 /* 8393 */ // MIs[2] v2
2834 /* 8393 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
2835 /* 8398 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2836 /* 8403 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2837 /* 8407 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2838 /* 8411 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16i8,
2839 /* 8415 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
2840 /* 8419 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2841 /* 8424 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2842 /* 8428 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2843 /* 8434 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2844 /* 8436 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2845 /* 8438 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2846 /* 8438 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2847 /* 8441 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2848 /* 8443 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2849 /* 8445 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2850 /* 8449 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2851 /* 8453 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2852 /* 8456 */ GIR_RootConstrainSelectedInstOperands,
2853 /* 8457 */ // GIR_Coverage, 1393,
2854 /* 8457 */ GIR_EraseRootFromParent_Done,
2855 /* 8458 */ // Label 258: @8458
2856 /* 8458 */ GIM_Reject,
2857 /* 8459 */ // Label 254: @8459
2858 /* 8459 */ GIM_Try, /*On fail goto*//*Label 259*/ GIMT_Encode4(8793),
2859 /* 8464 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2860 /* 8468 */ GIM_Try, /*On fail goto*//*Label 260*/ GIMT_Encode4(8549), // Rule ID 1059 //
2861 /* 8473 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2862 /* 8477 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2863 /* 8481 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2864 /* 8485 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2865 /* 8489 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2866 /* 8493 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2867 /* 8497 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2868 /* 8501 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2869 /* 8505 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2870 /* 8510 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2871 /* 8515 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2872 /* 8520 */ // MIs[0] v2
2873 /* 8520 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
2874 /* 8525 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2875 /* 8527 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), V128:{ *:[v16i8] }:$c), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2876 /* 8527 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2877 /* 8530 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2878 /* 8532 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2879 /* 8536 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2880 /* 8540 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2881 /* 8544 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2882 /* 8547 */ GIR_RootConstrainSelectedInstOperands,
2883 /* 8548 */ // GIR_Coverage, 1059,
2884 /* 8548 */ GIR_EraseRootFromParent_Done,
2885 /* 8549 */ // Label 260: @8549
2886 /* 8549 */ GIM_Try, /*On fail goto*//*Label 261*/ GIMT_Encode4(8630), // Rule ID 1361 //
2887 /* 8554 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2888 /* 8558 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2889 /* 8562 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2890 /* 8566 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2891 /* 8570 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2892 /* 8574 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2893 /* 8578 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2894 /* 8582 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2895 /* 8586 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2896 /* 8591 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2897 /* 8596 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2898 /* 8601 */ // MIs[0] v2
2899 /* 8601 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2900 /* 8606 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2901 /* 8608 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), V128:{ *:[v16i8] }:$c), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2902 /* 8608 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2903 /* 8611 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2904 /* 8613 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2905 /* 8617 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2906 /* 8621 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2907 /* 8625 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2908 /* 8628 */ GIR_RootConstrainSelectedInstOperands,
2909 /* 8629 */ // GIR_Coverage, 1361,
2910 /* 8629 */ GIR_EraseRootFromParent_Done,
2911 /* 8630 */ // Label 261: @8630
2912 /* 8630 */ GIM_Try, /*On fail goto*//*Label 262*/ GIMT_Encode4(8711), // Rule ID 1362 //
2913 /* 8635 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2914 /* 8639 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2915 /* 8643 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2916 /* 8647 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2917 /* 8651 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2918 /* 8656 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2919 /* 8660 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2920 /* 8664 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2921 /* 8668 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2922 /* 8672 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2923 /* 8677 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2924 /* 8682 */ // MIs[0] v2
2925 /* 8682 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
2926 /* 8687 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2927 /* 8689 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2928 /* 8689 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2929 /* 8692 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2930 /* 8694 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2931 /* 8698 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2932 /* 8702 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2933 /* 8706 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2934 /* 8709 */ GIR_RootConstrainSelectedInstOperands,
2935 /* 8710 */ // GIR_Coverage, 1362,
2936 /* 8710 */ GIR_EraseRootFromParent_Done,
2937 /* 8711 */ // Label 262: @8711
2938 /* 8711 */ GIM_Try, /*On fail goto*//*Label 263*/ GIMT_Encode4(8792), // Rule ID 1363 //
2939 /* 8716 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2940 /* 8720 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2941 /* 8724 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2942 /* 8728 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2943 /* 8732 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2944 /* 8737 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2945 /* 8741 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2946 /* 8745 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2947 /* 8749 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2948 /* 8753 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2949 /* 8758 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2950 /* 8763 */ // MIs[0] v2
2951 /* 8763 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2952 /* 8768 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2953 /* 8770 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2954 /* 8770 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2955 /* 8773 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2956 /* 8775 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2957 /* 8779 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2958 /* 8783 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2959 /* 8787 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2960 /* 8790 */ GIR_RootConstrainSelectedInstOperands,
2961 /* 8791 */ // GIR_Coverage, 1363,
2962 /* 8791 */ GIR_EraseRootFromParent_Done,
2963 /* 8792 */ // Label 263: @8792
2964 /* 8792 */ GIM_Reject,
2965 /* 8793 */ // Label 259: @8793
2966 /* 8793 */ GIM_Try, /*On fail goto*//*Label 264*/ GIMT_Encode4(9143),
2967 /* 8798 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
2968 /* 8801 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2969 /* 8805 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2970 /* 8809 */ GIM_Try, /*On fail goto*//*Label 265*/ GIMT_Encode4(8879), // Rule ID 1364 //
2971 /* 8814 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2972 /* 8818 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2973 /* 8822 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2974 /* 8826 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2975 /* 8830 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2976 /* 8834 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2977 /* 8838 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2978 /* 8842 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2979 /* 8847 */ // MIs[2] v2
2980 /* 8847 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
2981 /* 8852 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2982 /* 8857 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
2983 /* 8859 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
2984 /* 8859 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2985 /* 8862 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2986 /* 8864 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2987 /* 8868 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2988 /* 8870 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2989 /* 8874 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2990 /* 8877 */ GIR_RootConstrainSelectedInstOperands,
2991 /* 8878 */ // GIR_Coverage, 1364,
2992 /* 8878 */ GIR_EraseRootFromParent_Done,
2993 /* 8879 */ // Label 265: @8879
2994 /* 8879 */ GIM_Try, /*On fail goto*//*Label 266*/ GIMT_Encode4(8949), // Rule ID 1365 //
2995 /* 8884 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2996 /* 8888 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2997 /* 8892 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2998 /* 8896 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2999 /* 8900 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3000 /* 8904 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3001 /* 8908 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
3002 /* 8912 */ // MIs[2] v2
3003 /* 8912 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3004 /* 8917 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3005 /* 8922 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3006 /* 8927 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3007 /* 8929 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
3008 /* 8929 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3009 /* 8932 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3010 /* 8934 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3011 /* 8938 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3012 /* 8940 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3013 /* 8944 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3014 /* 8947 */ GIR_RootConstrainSelectedInstOperands,
3015 /* 8948 */ // GIR_Coverage, 1365,
3016 /* 8948 */ GIR_EraseRootFromParent_Done,
3017 /* 8949 */ // Label 266: @8949
3018 /* 8949 */ GIM_Try, /*On fail goto*//*Label 267*/ GIMT_Encode4(9019), // Rule ID 1366 //
3019 /* 8954 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3020 /* 8958 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3021 /* 8962 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
3022 /* 8966 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
3023 /* 8970 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3024 /* 8975 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3025 /* 8979 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3026 /* 8983 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
3027 /* 8987 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3028 /* 8992 */ // MIs[2] v2
3029 /* 8992 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3030 /* 8997 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3031 /* 8999 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
3032 /* 8999 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3033 /* 9002 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3034 /* 9004 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3035 /* 9008 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3036 /* 9010 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3037 /* 9014 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3038 /* 9017 */ GIR_RootConstrainSelectedInstOperands,
3039 /* 9018 */ // GIR_Coverage, 1366,
3040 /* 9018 */ GIR_EraseRootFromParent_Done,
3041 /* 9019 */ // Label 267: @9019
3042 /* 9019 */ GIM_Try, /*On fail goto*//*Label 268*/ GIMT_Encode4(9089), // Rule ID 1367 //
3043 /* 9024 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3044 /* 9028 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3045 /* 9032 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
3046 /* 9036 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
3047 /* 9040 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3048 /* 9045 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3049 /* 9049 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3050 /* 9053 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
3051 /* 9057 */ // MIs[2] v2
3052 /* 9057 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3053 /* 9062 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3054 /* 9067 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3055 /* 9069 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
3056 /* 9069 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3057 /* 9072 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3058 /* 9074 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3059 /* 9078 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3060 /* 9080 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3061 /* 9084 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3062 /* 9087 */ GIR_RootConstrainSelectedInstOperands,
3063 /* 9088 */ // GIR_Coverage, 1367,
3064 /* 9088 */ GIR_EraseRootFromParent_Done,
3065 /* 9089 */ // Label 268: @9089
3066 /* 9089 */ GIM_Try, /*On fail goto*//*Label 269*/ GIMT_Encode4(9120), // Rule ID 1029 //
3067 /* 9094 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3068 /* 9098 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3069 /* 9104 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
3070 /* 9106 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
3071 /* 9108 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v, immAllOnesV:{ *:[v16i8] }) => (NOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v)
3072 /* 9108 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
3073 /* 9111 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3074 /* 9113 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
3075 /* 9115 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3076 /* 9118 */ GIR_RootConstrainSelectedInstOperands,
3077 /* 9119 */ // GIR_Coverage, 1029,
3078 /* 9119 */ GIR_EraseRootFromParent_Done,
3079 /* 9120 */ // Label 269: @9120
3080 /* 9120 */ GIM_Try, /*On fail goto*//*Label 270*/ GIMT_Encode4(9142), // Rule ID 1040 //
3081 /* 9125 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3082 /* 9129 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (XOR:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
3083 /* 9129 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
3084 /* 9134 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
3085 /* 9140 */ GIR_RootConstrainSelectedInstOperands,
3086 /* 9141 */ // GIR_Coverage, 1040,
3087 /* 9141 */ GIR_Done,
3088 /* 9142 */ // Label 270: @9142
3089 /* 9142 */ GIM_Reject,
3090 /* 9143 */ // Label 264: @9143
3091 /* 9143 */ GIM_Reject,
3092 /* 9144 */ // Label 248: @9144
3093 /* 9144 */ GIM_Reject,
3094 /* 9145 */ // Label 242: @9145
3095 /* 9145 */ GIM_Try, /*On fail goto*//*Label 271*/ GIMT_Encode4(10693),
3096 /* 9150 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
3097 /* 9153 */ GIM_Try, /*On fail goto*//*Label 272*/ GIMT_Encode4(9599),
3098 /* 9158 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3099 /* 9162 */ GIM_Try, /*On fail goto*//*Label 273*/ GIMT_Encode4(9271), // Rule ID 1397 //
3100 /* 9167 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3101 /* 9171 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3102 /* 9175 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3103 /* 9179 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3104 /* 9183 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3105 /* 9187 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3106 /* 9191 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3107 /* 9195 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3108 /* 9199 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3109 /* 9204 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3110 /* 9208 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3111 /* 9214 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3112 /* 9216 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3113 /* 9220 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3114 /* 9224 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8i16,
3115 /* 9228 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8i16,
3116 /* 9232 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3117 /* 9237 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3118 /* 9242 */ // MIs[0] v2
3119 /* 9242 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
3120 /* 9247 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3121 /* 9249 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3122 /* 9249 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3123 /* 9252 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3124 /* 9254 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
3125 /* 9258 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3126 /* 9262 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3127 /* 9266 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3128 /* 9269 */ GIR_RootConstrainSelectedInstOperands,
3129 /* 9270 */ // GIR_Coverage, 1397,
3130 /* 9270 */ GIR_EraseRootFromParent_Done,
3131 /* 9271 */ // Label 273: @9271
3132 /* 9271 */ GIM_Try, /*On fail goto*//*Label 274*/ GIMT_Encode4(9380), // Rule ID 1398 //
3133 /* 9276 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3134 /* 9280 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3135 /* 9284 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3136 /* 9288 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3137 /* 9292 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3138 /* 9296 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3139 /* 9300 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3140 /* 9304 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3141 /* 9308 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3142 /* 9313 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3143 /* 9317 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3144 /* 9323 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3145 /* 9325 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3146 /* 9329 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3147 /* 9333 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8i16,
3148 /* 9337 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8i16,
3149 /* 9341 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3150 /* 9346 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3151 /* 9351 */ // MIs[0] v2
3152 /* 9351 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
3153 /* 9356 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3154 /* 9358 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3155 /* 9358 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3156 /* 9361 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3157 /* 9363 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
3158 /* 9367 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3159 /* 9371 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3160 /* 9375 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3161 /* 9378 */ GIR_RootConstrainSelectedInstOperands,
3162 /* 9379 */ // GIR_Coverage, 1398,
3163 /* 9379 */ GIR_EraseRootFromParent_Done,
3164 /* 9380 */ // Label 274: @9380
3165 /* 9380 */ GIM_Try, /*On fail goto*//*Label 275*/ GIMT_Encode4(9489), // Rule ID 1064 //
3166 /* 9385 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3167 /* 9389 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3168 /* 9393 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3169 /* 9397 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3170 /* 9401 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3171 /* 9405 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3172 /* 9409 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3173 /* 9413 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3174 /* 9417 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3175 /* 9422 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3176 /* 9427 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3177 /* 9431 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3178 /* 9435 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8i16,
3179 /* 9439 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
3180 /* 9443 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3181 /* 9448 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3182 /* 9452 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3183 /* 9458 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3184 /* 9460 */ // MIs[0] v2
3185 /* 9460 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3186 /* 9465 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3187 /* 9467 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3188 /* 9467 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3189 /* 9470 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3190 /* 9472 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3191 /* 9476 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3192 /* 9480 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3193 /* 9484 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3194 /* 9487 */ GIR_RootConstrainSelectedInstOperands,
3195 /* 9488 */ // GIR_Coverage, 1064,
3196 /* 9488 */ GIR_EraseRootFromParent_Done,
3197 /* 9489 */ // Label 275: @9489
3198 /* 9489 */ GIM_Try, /*On fail goto*//*Label 276*/ GIMT_Encode4(9598), // Rule ID 1396 //
3199 /* 9494 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3200 /* 9498 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3201 /* 9502 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3202 /* 9506 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3203 /* 9510 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3204 /* 9514 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3205 /* 9518 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3206 /* 9522 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3207 /* 9526 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3208 /* 9531 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3209 /* 9536 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3210 /* 9540 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3211 /* 9544 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8i16,
3212 /* 9548 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
3213 /* 9552 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3214 /* 9557 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3215 /* 9561 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3216 /* 9567 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3217 /* 9569 */ // MIs[0] v2
3218 /* 9569 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3219 /* 9574 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3220 /* 9576 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3221 /* 9576 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3222 /* 9579 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3223 /* 9581 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3224 /* 9585 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3225 /* 9589 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3226 /* 9593 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3227 /* 9596 */ GIR_RootConstrainSelectedInstOperands,
3228 /* 9597 */ // GIR_Coverage, 1396,
3229 /* 9597 */ GIR_EraseRootFromParent_Done,
3230 /* 9598 */ // Label 276: @9598
3231 /* 9598 */ GIM_Reject,
3232 /* 9599 */ // Label 272: @9599
3233 /* 9599 */ GIM_Try, /*On fail goto*//*Label 277*/ GIMT_Encode4(10008),
3234 /* 9604 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
3235 /* 9607 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3236 /* 9611 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3237 /* 9615 */ GIM_Try, /*On fail goto*//*Label 278*/ GIMT_Encode4(9713), // Rule ID 1401 //
3238 /* 9620 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3239 /* 9624 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3240 /* 9628 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3241 /* 9632 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3242 /* 9636 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3243 /* 9640 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3244 /* 9644 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3245 /* 9648 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3246 /* 9652 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3247 /* 9657 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3248 /* 9661 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3249 /* 9667 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3250 /* 9669 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3251 /* 9673 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3252 /* 9677 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8i16,
3253 /* 9681 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3254 /* 9686 */ // MIs[4] v2
3255 /* 9686 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3256 /* 9691 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3257 /* 9693 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3258 /* 9693 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3259 /* 9696 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3260 /* 9698 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3261 /* 9700 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3262 /* 9704 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3263 /* 9708 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3264 /* 9711 */ GIR_RootConstrainSelectedInstOperands,
3265 /* 9712 */ // GIR_Coverage, 1401,
3266 /* 9712 */ GIR_EraseRootFromParent_Done,
3267 /* 9713 */ // Label 278: @9713
3268 /* 9713 */ GIM_Try, /*On fail goto*//*Label 279*/ GIMT_Encode4(9811), // Rule ID 1402 //
3269 /* 9718 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3270 /* 9722 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3271 /* 9726 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3272 /* 9730 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3273 /* 9734 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3274 /* 9738 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3275 /* 9742 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3276 /* 9746 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3277 /* 9750 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3278 /* 9755 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3279 /* 9759 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3280 /* 9765 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3281 /* 9767 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3282 /* 9771 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3283 /* 9775 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8i16,
3284 /* 9779 */ // MIs[4] v2
3285 /* 9779 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3286 /* 9784 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3287 /* 9789 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3288 /* 9791 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3289 /* 9791 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3290 /* 9794 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3291 /* 9796 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3292 /* 9798 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3293 /* 9802 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3294 /* 9806 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3295 /* 9809 */ GIR_RootConstrainSelectedInstOperands,
3296 /* 9810 */ // GIR_Coverage, 1402,
3297 /* 9810 */ GIR_EraseRootFromParent_Done,
3298 /* 9811 */ // Label 279: @9811
3299 /* 9811 */ GIM_Try, /*On fail goto*//*Label 280*/ GIMT_Encode4(9909), // Rule ID 1399 //
3300 /* 9816 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3301 /* 9820 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3302 /* 9824 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3303 /* 9828 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3304 /* 9832 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3305 /* 9836 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3306 /* 9840 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3307 /* 9844 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3308 /* 9849 */ // MIs[2] v2
3309 /* 9849 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3310 /* 9854 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3311 /* 9858 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3312 /* 9862 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8i16,
3313 /* 9866 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
3314 /* 9870 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3315 /* 9875 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3316 /* 9879 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3317 /* 9885 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3318 /* 9887 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3319 /* 9889 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3320 /* 9889 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3321 /* 9892 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3322 /* 9894 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3323 /* 9896 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3324 /* 9900 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3325 /* 9904 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3326 /* 9907 */ GIR_RootConstrainSelectedInstOperands,
3327 /* 9908 */ // GIR_Coverage, 1399,
3328 /* 9908 */ GIR_EraseRootFromParent_Done,
3329 /* 9909 */ // Label 280: @9909
3330 /* 9909 */ GIM_Try, /*On fail goto*//*Label 281*/ GIMT_Encode4(10007), // Rule ID 1400 //
3331 /* 9914 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3332 /* 9918 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3333 /* 9922 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3334 /* 9926 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3335 /* 9930 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3336 /* 9934 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3337 /* 9938 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3338 /* 9942 */ // MIs[2] v2
3339 /* 9942 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3340 /* 9947 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3341 /* 9952 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3342 /* 9956 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3343 /* 9960 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8i16,
3344 /* 9964 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
3345 /* 9968 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3346 /* 9973 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3347 /* 9977 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3348 /* 9983 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3349 /* 9985 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3350 /* 9987 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3351 /* 9987 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3352 /* 9990 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3353 /* 9992 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3354 /* 9994 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3355 /* 9998 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3356 /* 10002 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3357 /* 10005 */ GIR_RootConstrainSelectedInstOperands,
3358 /* 10006 */ // GIR_Coverage, 1400,
3359 /* 10006 */ GIR_EraseRootFromParent_Done,
3360 /* 10007 */ // Label 281: @10007
3361 /* 10007 */ GIM_Reject,
3362 /* 10008 */ // Label 277: @10008
3363 /* 10008 */ GIM_Try, /*On fail goto*//*Label 282*/ GIMT_Encode4(10342),
3364 /* 10013 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3365 /* 10017 */ GIM_Try, /*On fail goto*//*Label 283*/ GIMT_Encode4(10098), // Rule ID 1060 //
3366 /* 10022 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3367 /* 10026 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3368 /* 10030 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3369 /* 10034 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3370 /* 10038 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3371 /* 10042 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3372 /* 10046 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3373 /* 10050 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3374 /* 10054 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3375 /* 10059 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3376 /* 10064 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3377 /* 10069 */ // MIs[0] v2
3378 /* 10069 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3379 /* 10074 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3380 /* 10076 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), V128:{ *:[v8i16] }:$c), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3381 /* 10076 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3382 /* 10079 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3383 /* 10081 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3384 /* 10085 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3385 /* 10089 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3386 /* 10093 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3387 /* 10096 */ GIR_RootConstrainSelectedInstOperands,
3388 /* 10097 */ // GIR_Coverage, 1060,
3389 /* 10097 */ GIR_EraseRootFromParent_Done,
3390 /* 10098 */ // Label 283: @10098
3391 /* 10098 */ GIM_Try, /*On fail goto*//*Label 284*/ GIMT_Encode4(10179), // Rule ID 1368 //
3392 /* 10103 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3393 /* 10107 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3394 /* 10111 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3395 /* 10115 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3396 /* 10119 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3397 /* 10123 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3398 /* 10127 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3399 /* 10131 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3400 /* 10135 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3401 /* 10140 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3402 /* 10145 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3403 /* 10150 */ // MIs[0] v2
3404 /* 10150 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3405 /* 10155 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3406 /* 10157 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), V128:{ *:[v8i16] }:$c), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3407 /* 10157 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3408 /* 10160 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3409 /* 10162 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3410 /* 10166 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3411 /* 10170 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3412 /* 10174 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3413 /* 10177 */ GIR_RootConstrainSelectedInstOperands,
3414 /* 10178 */ // GIR_Coverage, 1368,
3415 /* 10178 */ GIR_EraseRootFromParent_Done,
3416 /* 10179 */ // Label 284: @10179
3417 /* 10179 */ GIM_Try, /*On fail goto*//*Label 285*/ GIMT_Encode4(10260), // Rule ID 1369 //
3418 /* 10184 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3419 /* 10188 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3420 /* 10192 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3421 /* 10196 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3422 /* 10200 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3423 /* 10205 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3424 /* 10209 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3425 /* 10213 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3426 /* 10217 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3427 /* 10221 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3428 /* 10226 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3429 /* 10231 */ // MIs[0] v2
3430 /* 10231 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3431 /* 10236 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3432 /* 10238 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3433 /* 10238 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3434 /* 10241 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3435 /* 10243 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3436 /* 10247 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3437 /* 10251 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3438 /* 10255 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3439 /* 10258 */ GIR_RootConstrainSelectedInstOperands,
3440 /* 10259 */ // GIR_Coverage, 1369,
3441 /* 10259 */ GIR_EraseRootFromParent_Done,
3442 /* 10260 */ // Label 285: @10260
3443 /* 10260 */ GIM_Try, /*On fail goto*//*Label 286*/ GIMT_Encode4(10341), // Rule ID 1370 //
3444 /* 10265 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3445 /* 10269 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3446 /* 10273 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3447 /* 10277 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3448 /* 10281 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3449 /* 10286 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3450 /* 10290 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3451 /* 10294 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3452 /* 10298 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3453 /* 10302 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3454 /* 10307 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3455 /* 10312 */ // MIs[0] v2
3456 /* 10312 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3457 /* 10317 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3458 /* 10319 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3459 /* 10319 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3460 /* 10322 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3461 /* 10324 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3462 /* 10328 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3463 /* 10332 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3464 /* 10336 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3465 /* 10339 */ GIR_RootConstrainSelectedInstOperands,
3466 /* 10340 */ // GIR_Coverage, 1370,
3467 /* 10340 */ GIR_EraseRootFromParent_Done,
3468 /* 10341 */ // Label 286: @10341
3469 /* 10341 */ GIM_Reject,
3470 /* 10342 */ // Label 282: @10342
3471 /* 10342 */ GIM_Try, /*On fail goto*//*Label 287*/ GIMT_Encode4(10692),
3472 /* 10347 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
3473 /* 10350 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3474 /* 10354 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3475 /* 10358 */ GIM_Try, /*On fail goto*//*Label 288*/ GIMT_Encode4(10428), // Rule ID 1371 //
3476 /* 10363 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3477 /* 10367 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3478 /* 10371 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3479 /* 10375 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3480 /* 10379 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3481 /* 10383 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3482 /* 10387 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3483 /* 10391 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3484 /* 10396 */ // MIs[2] v2
3485 /* 10396 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3486 /* 10401 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3487 /* 10406 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3488 /* 10408 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3489 /* 10408 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3490 /* 10411 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3491 /* 10413 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3492 /* 10417 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3493 /* 10419 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3494 /* 10423 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3495 /* 10426 */ GIR_RootConstrainSelectedInstOperands,
3496 /* 10427 */ // GIR_Coverage, 1371,
3497 /* 10427 */ GIR_EraseRootFromParent_Done,
3498 /* 10428 */ // Label 288: @10428
3499 /* 10428 */ GIM_Try, /*On fail goto*//*Label 289*/ GIMT_Encode4(10498), // Rule ID 1372 //
3500 /* 10433 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3501 /* 10437 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3502 /* 10441 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3503 /* 10445 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3504 /* 10449 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3505 /* 10453 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3506 /* 10457 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3507 /* 10461 */ // MIs[2] v2
3508 /* 10461 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3509 /* 10466 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3510 /* 10471 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3511 /* 10476 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3512 /* 10478 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3513 /* 10478 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3514 /* 10481 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3515 /* 10483 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3516 /* 10487 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3517 /* 10489 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3518 /* 10493 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3519 /* 10496 */ GIR_RootConstrainSelectedInstOperands,
3520 /* 10497 */ // GIR_Coverage, 1372,
3521 /* 10497 */ GIR_EraseRootFromParent_Done,
3522 /* 10498 */ // Label 289: @10498
3523 /* 10498 */ GIM_Try, /*On fail goto*//*Label 290*/ GIMT_Encode4(10568), // Rule ID 1373 //
3524 /* 10503 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3525 /* 10507 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3526 /* 10511 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3527 /* 10515 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3528 /* 10519 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3529 /* 10524 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3530 /* 10528 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3531 /* 10532 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3532 /* 10536 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3533 /* 10541 */ // MIs[2] v2
3534 /* 10541 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3535 /* 10546 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3536 /* 10548 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3537 /* 10548 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3538 /* 10551 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3539 /* 10553 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3540 /* 10557 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3541 /* 10559 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3542 /* 10563 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3543 /* 10566 */ GIR_RootConstrainSelectedInstOperands,
3544 /* 10567 */ // GIR_Coverage, 1373,
3545 /* 10567 */ GIR_EraseRootFromParent_Done,
3546 /* 10568 */ // Label 290: @10568
3547 /* 10568 */ GIM_Try, /*On fail goto*//*Label 291*/ GIMT_Encode4(10638), // Rule ID 1374 //
3548 /* 10573 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3549 /* 10577 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3550 /* 10581 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3551 /* 10585 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3552 /* 10589 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3553 /* 10594 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3554 /* 10598 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3555 /* 10602 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3556 /* 10606 */ // MIs[2] v2
3557 /* 10606 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3558 /* 10611 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3559 /* 10616 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3560 /* 10618 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3561 /* 10618 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3562 /* 10621 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3563 /* 10623 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3564 /* 10627 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3565 /* 10629 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3566 /* 10633 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3567 /* 10636 */ GIR_RootConstrainSelectedInstOperands,
3568 /* 10637 */ // GIR_Coverage, 1374,
3569 /* 10637 */ GIR_EraseRootFromParent_Done,
3570 /* 10638 */ // Label 291: @10638
3571 /* 10638 */ GIM_Try, /*On fail goto*//*Label 292*/ GIMT_Encode4(10669), // Rule ID 1030 //
3572 /* 10643 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3573 /* 10647 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3574 /* 10653 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
3575 /* 10655 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
3576 /* 10657 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v, immAllOnesV:{ *:[v8i16] }) => (NOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v)
3577 /* 10657 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
3578 /* 10660 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3579 /* 10662 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
3580 /* 10664 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3581 /* 10667 */ GIR_RootConstrainSelectedInstOperands,
3582 /* 10668 */ // GIR_Coverage, 1030,
3583 /* 10668 */ GIR_EraseRootFromParent_Done,
3584 /* 10669 */ // Label 292: @10669
3585 /* 10669 */ GIM_Try, /*On fail goto*//*Label 293*/ GIMT_Encode4(10691), // Rule ID 1041 //
3586 /* 10674 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3587 /* 10678 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (XOR:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
3588 /* 10678 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
3589 /* 10683 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
3590 /* 10689 */ GIR_RootConstrainSelectedInstOperands,
3591 /* 10690 */ // GIR_Coverage, 1041,
3592 /* 10690 */ GIR_Done,
3593 /* 10691 */ // Label 293: @10691
3594 /* 10691 */ GIM_Reject,
3595 /* 10692 */ // Label 287: @10692
3596 /* 10692 */ GIM_Reject,
3597 /* 10693 */ // Label 271: @10693
3598 /* 10693 */ GIM_Reject,
3599 /* 10694 */ // Label 243: @10694
3600 /* 10694 */ GIM_Try, /*On fail goto*//*Label 294*/ GIMT_Encode4(12242),
3601 /* 10699 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
3602 /* 10702 */ GIM_Try, /*On fail goto*//*Label 295*/ GIMT_Encode4(11148),
3603 /* 10707 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3604 /* 10711 */ GIM_Try, /*On fail goto*//*Label 296*/ GIMT_Encode4(10820), // Rule ID 1404 //
3605 /* 10716 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3606 /* 10720 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3607 /* 10724 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3608 /* 10728 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3609 /* 10732 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3610 /* 10736 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3611 /* 10740 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3612 /* 10744 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3613 /* 10748 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3614 /* 10753 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3615 /* 10757 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3616 /* 10763 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3617 /* 10765 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3618 /* 10769 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3619 /* 10773 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4i32,
3620 /* 10777 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4i32,
3621 /* 10781 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3622 /* 10786 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3623 /* 10791 */ // MIs[0] v2
3624 /* 10791 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
3625 /* 10796 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3626 /* 10798 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3627 /* 10798 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3628 /* 10801 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3629 /* 10803 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
3630 /* 10807 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3631 /* 10811 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3632 /* 10815 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3633 /* 10818 */ GIR_RootConstrainSelectedInstOperands,
3634 /* 10819 */ // GIR_Coverage, 1404,
3635 /* 10819 */ GIR_EraseRootFromParent_Done,
3636 /* 10820 */ // Label 296: @10820
3637 /* 10820 */ GIM_Try, /*On fail goto*//*Label 297*/ GIMT_Encode4(10929), // Rule ID 1405 //
3638 /* 10825 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3639 /* 10829 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3640 /* 10833 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3641 /* 10837 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3642 /* 10841 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3643 /* 10845 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3644 /* 10849 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3645 /* 10853 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3646 /* 10857 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3647 /* 10862 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3648 /* 10866 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3649 /* 10872 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3650 /* 10874 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3651 /* 10878 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3652 /* 10882 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4i32,
3653 /* 10886 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4i32,
3654 /* 10890 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3655 /* 10895 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3656 /* 10900 */ // MIs[0] v2
3657 /* 10900 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
3658 /* 10905 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3659 /* 10907 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3660 /* 10907 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3661 /* 10910 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3662 /* 10912 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
3663 /* 10916 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3664 /* 10920 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3665 /* 10924 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3666 /* 10927 */ GIR_RootConstrainSelectedInstOperands,
3667 /* 10928 */ // GIR_Coverage, 1405,
3668 /* 10928 */ GIR_EraseRootFromParent_Done,
3669 /* 10929 */ // Label 297: @10929
3670 /* 10929 */ GIM_Try, /*On fail goto*//*Label 298*/ GIMT_Encode4(11038), // Rule ID 1065 //
3671 /* 10934 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3672 /* 10938 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3673 /* 10942 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3674 /* 10946 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3675 /* 10950 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3676 /* 10954 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3677 /* 10958 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3678 /* 10962 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3679 /* 10966 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3680 /* 10971 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3681 /* 10976 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3682 /* 10980 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3683 /* 10984 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4i32,
3684 /* 10988 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
3685 /* 10992 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3686 /* 10997 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3687 /* 11001 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3688 /* 11007 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3689 /* 11009 */ // MIs[0] v2
3690 /* 11009 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3691 /* 11014 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3692 /* 11016 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3693 /* 11016 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3694 /* 11019 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3695 /* 11021 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3696 /* 11025 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3697 /* 11029 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3698 /* 11033 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3699 /* 11036 */ GIR_RootConstrainSelectedInstOperands,
3700 /* 11037 */ // GIR_Coverage, 1065,
3701 /* 11037 */ GIR_EraseRootFromParent_Done,
3702 /* 11038 */ // Label 298: @11038
3703 /* 11038 */ GIM_Try, /*On fail goto*//*Label 299*/ GIMT_Encode4(11147), // Rule ID 1403 //
3704 /* 11043 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3705 /* 11047 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3706 /* 11051 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3707 /* 11055 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3708 /* 11059 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3709 /* 11063 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3710 /* 11067 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3711 /* 11071 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3712 /* 11075 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3713 /* 11080 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3714 /* 11085 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3715 /* 11089 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3716 /* 11093 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4i32,
3717 /* 11097 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
3718 /* 11101 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3719 /* 11106 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3720 /* 11110 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3721 /* 11116 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3722 /* 11118 */ // MIs[0] v2
3723 /* 11118 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3724 /* 11123 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3725 /* 11125 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3726 /* 11125 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3727 /* 11128 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3728 /* 11130 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3729 /* 11134 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3730 /* 11138 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3731 /* 11142 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3732 /* 11145 */ GIR_RootConstrainSelectedInstOperands,
3733 /* 11146 */ // GIR_Coverage, 1403,
3734 /* 11146 */ GIR_EraseRootFromParent_Done,
3735 /* 11147 */ // Label 299: @11147
3736 /* 11147 */ GIM_Reject,
3737 /* 11148 */ // Label 295: @11148
3738 /* 11148 */ GIM_Try, /*On fail goto*//*Label 300*/ GIMT_Encode4(11557),
3739 /* 11153 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
3740 /* 11156 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3741 /* 11160 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3742 /* 11164 */ GIM_Try, /*On fail goto*//*Label 301*/ GIMT_Encode4(11262), // Rule ID 1408 //
3743 /* 11169 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3744 /* 11173 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3745 /* 11177 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3746 /* 11181 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3747 /* 11185 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3748 /* 11189 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3749 /* 11193 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3750 /* 11197 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3751 /* 11201 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3752 /* 11206 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3753 /* 11210 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3754 /* 11216 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3755 /* 11218 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3756 /* 11222 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3757 /* 11226 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4i32,
3758 /* 11230 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3759 /* 11235 */ // MIs[4] v2
3760 /* 11235 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3761 /* 11240 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3762 /* 11242 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3763 /* 11242 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3764 /* 11245 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3765 /* 11247 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3766 /* 11249 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3767 /* 11253 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3768 /* 11257 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3769 /* 11260 */ GIR_RootConstrainSelectedInstOperands,
3770 /* 11261 */ // GIR_Coverage, 1408,
3771 /* 11261 */ GIR_EraseRootFromParent_Done,
3772 /* 11262 */ // Label 301: @11262
3773 /* 11262 */ GIM_Try, /*On fail goto*//*Label 302*/ GIMT_Encode4(11360), // Rule ID 1409 //
3774 /* 11267 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3775 /* 11271 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3776 /* 11275 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3777 /* 11279 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3778 /* 11283 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3779 /* 11287 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3780 /* 11291 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3781 /* 11295 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3782 /* 11299 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3783 /* 11304 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3784 /* 11308 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3785 /* 11314 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3786 /* 11316 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3787 /* 11320 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3788 /* 11324 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4i32,
3789 /* 11328 */ // MIs[4] v2
3790 /* 11328 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3791 /* 11333 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3792 /* 11338 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3793 /* 11340 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3794 /* 11340 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3795 /* 11343 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3796 /* 11345 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3797 /* 11347 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3798 /* 11351 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3799 /* 11355 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3800 /* 11358 */ GIR_RootConstrainSelectedInstOperands,
3801 /* 11359 */ // GIR_Coverage, 1409,
3802 /* 11359 */ GIR_EraseRootFromParent_Done,
3803 /* 11360 */ // Label 302: @11360
3804 /* 11360 */ GIM_Try, /*On fail goto*//*Label 303*/ GIMT_Encode4(11458), // Rule ID 1406 //
3805 /* 11365 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3806 /* 11369 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3807 /* 11373 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3808 /* 11377 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3809 /* 11381 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3810 /* 11385 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3811 /* 11389 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3812 /* 11393 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3813 /* 11398 */ // MIs[2] v2
3814 /* 11398 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3815 /* 11403 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3816 /* 11407 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3817 /* 11411 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4i32,
3818 /* 11415 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
3819 /* 11419 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3820 /* 11424 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3821 /* 11428 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3822 /* 11434 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3823 /* 11436 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3824 /* 11438 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3825 /* 11438 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3826 /* 11441 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3827 /* 11443 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3828 /* 11445 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3829 /* 11449 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3830 /* 11453 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3831 /* 11456 */ GIR_RootConstrainSelectedInstOperands,
3832 /* 11457 */ // GIR_Coverage, 1406,
3833 /* 11457 */ GIR_EraseRootFromParent_Done,
3834 /* 11458 */ // Label 303: @11458
3835 /* 11458 */ GIM_Try, /*On fail goto*//*Label 304*/ GIMT_Encode4(11556), // Rule ID 1407 //
3836 /* 11463 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3837 /* 11467 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3838 /* 11471 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3839 /* 11475 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3840 /* 11479 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3841 /* 11483 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3842 /* 11487 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3843 /* 11491 */ // MIs[2] v2
3844 /* 11491 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3845 /* 11496 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3846 /* 11501 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3847 /* 11505 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3848 /* 11509 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4i32,
3849 /* 11513 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
3850 /* 11517 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3851 /* 11522 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3852 /* 11526 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3853 /* 11532 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3854 /* 11534 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3855 /* 11536 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3856 /* 11536 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3857 /* 11539 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3858 /* 11541 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3859 /* 11543 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3860 /* 11547 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3861 /* 11551 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3862 /* 11554 */ GIR_RootConstrainSelectedInstOperands,
3863 /* 11555 */ // GIR_Coverage, 1407,
3864 /* 11555 */ GIR_EraseRootFromParent_Done,
3865 /* 11556 */ // Label 304: @11556
3866 /* 11556 */ GIM_Reject,
3867 /* 11557 */ // Label 300: @11557
3868 /* 11557 */ GIM_Try, /*On fail goto*//*Label 305*/ GIMT_Encode4(11891),
3869 /* 11562 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3870 /* 11566 */ GIM_Try, /*On fail goto*//*Label 306*/ GIMT_Encode4(11647), // Rule ID 1061 //
3871 /* 11571 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3872 /* 11575 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3873 /* 11579 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3874 /* 11583 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3875 /* 11587 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3876 /* 11591 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3877 /* 11595 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3878 /* 11599 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3879 /* 11603 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3880 /* 11608 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3881 /* 11613 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3882 /* 11618 */ // MIs[0] v2
3883 /* 11618 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3884 /* 11623 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3885 /* 11625 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), V128:{ *:[v4i32] }:$c), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3886 /* 11625 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3887 /* 11628 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3888 /* 11630 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3889 /* 11634 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3890 /* 11638 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3891 /* 11642 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3892 /* 11645 */ GIR_RootConstrainSelectedInstOperands,
3893 /* 11646 */ // GIR_Coverage, 1061,
3894 /* 11646 */ GIR_EraseRootFromParent_Done,
3895 /* 11647 */ // Label 306: @11647
3896 /* 11647 */ GIM_Try, /*On fail goto*//*Label 307*/ GIMT_Encode4(11728), // Rule ID 1375 //
3897 /* 11652 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3898 /* 11656 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3899 /* 11660 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3900 /* 11664 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3901 /* 11668 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3902 /* 11672 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3903 /* 11676 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3904 /* 11680 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3905 /* 11684 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3906 /* 11689 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3907 /* 11694 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3908 /* 11699 */ // MIs[0] v2
3909 /* 11699 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3910 /* 11704 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3911 /* 11706 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), V128:{ *:[v4i32] }:$c), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3912 /* 11706 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3913 /* 11709 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3914 /* 11711 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3915 /* 11715 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3916 /* 11719 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3917 /* 11723 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3918 /* 11726 */ GIR_RootConstrainSelectedInstOperands,
3919 /* 11727 */ // GIR_Coverage, 1375,
3920 /* 11727 */ GIR_EraseRootFromParent_Done,
3921 /* 11728 */ // Label 307: @11728
3922 /* 11728 */ GIM_Try, /*On fail goto*//*Label 308*/ GIMT_Encode4(11809), // Rule ID 1376 //
3923 /* 11733 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3924 /* 11737 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3925 /* 11741 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3926 /* 11745 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3927 /* 11749 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3928 /* 11754 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3929 /* 11758 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3930 /* 11762 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3931 /* 11766 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3932 /* 11770 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3933 /* 11775 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3934 /* 11780 */ // MIs[0] v2
3935 /* 11780 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3936 /* 11785 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3937 /* 11787 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3938 /* 11787 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3939 /* 11790 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3940 /* 11792 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3941 /* 11796 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3942 /* 11800 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3943 /* 11804 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3944 /* 11807 */ GIR_RootConstrainSelectedInstOperands,
3945 /* 11808 */ // GIR_Coverage, 1376,
3946 /* 11808 */ GIR_EraseRootFromParent_Done,
3947 /* 11809 */ // Label 308: @11809
3948 /* 11809 */ GIM_Try, /*On fail goto*//*Label 309*/ GIMT_Encode4(11890), // Rule ID 1377 //
3949 /* 11814 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3950 /* 11818 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3951 /* 11822 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3952 /* 11826 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3953 /* 11830 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3954 /* 11835 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3955 /* 11839 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3956 /* 11843 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3957 /* 11847 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3958 /* 11851 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3959 /* 11856 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3960 /* 11861 */ // MIs[0] v2
3961 /* 11861 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3962 /* 11866 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3963 /* 11868 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3964 /* 11868 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3965 /* 11871 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3966 /* 11873 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3967 /* 11877 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3968 /* 11881 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3969 /* 11885 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3970 /* 11888 */ GIR_RootConstrainSelectedInstOperands,
3971 /* 11889 */ // GIR_Coverage, 1377,
3972 /* 11889 */ GIR_EraseRootFromParent_Done,
3973 /* 11890 */ // Label 309: @11890
3974 /* 11890 */ GIM_Reject,
3975 /* 11891 */ // Label 305: @11891
3976 /* 11891 */ GIM_Try, /*On fail goto*//*Label 310*/ GIMT_Encode4(12241),
3977 /* 11896 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
3978 /* 11899 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3979 /* 11903 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3980 /* 11907 */ GIM_Try, /*On fail goto*//*Label 311*/ GIMT_Encode4(11977), // Rule ID 1378 //
3981 /* 11912 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3982 /* 11916 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3983 /* 11920 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3984 /* 11924 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3985 /* 11928 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3986 /* 11932 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3987 /* 11936 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3988 /* 11940 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3989 /* 11945 */ // MIs[2] v2
3990 /* 11945 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3991 /* 11950 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3992 /* 11955 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3993 /* 11957 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
3994 /* 11957 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3995 /* 11960 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3996 /* 11962 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3997 /* 11966 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3998 /* 11968 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3999 /* 11972 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4000 /* 11975 */ GIR_RootConstrainSelectedInstOperands,
4001 /* 11976 */ // GIR_Coverage, 1378,
4002 /* 11976 */ GIR_EraseRootFromParent_Done,
4003 /* 11977 */ // Label 311: @11977
4004 /* 11977 */ GIM_Try, /*On fail goto*//*Label 312*/ GIMT_Encode4(12047), // Rule ID 1379 //
4005 /* 11982 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4006 /* 11986 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4007 /* 11990 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
4008 /* 11994 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
4009 /* 11998 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4010 /* 12002 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4011 /* 12006 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
4012 /* 12010 */ // MIs[2] v2
4013 /* 12010 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4014 /* 12015 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4015 /* 12020 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4016 /* 12025 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4017 /* 12027 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
4018 /* 12027 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4019 /* 12030 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4020 /* 12032 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4021 /* 12036 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4022 /* 12038 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4023 /* 12042 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4024 /* 12045 */ GIR_RootConstrainSelectedInstOperands,
4025 /* 12046 */ // GIR_Coverage, 1379,
4026 /* 12046 */ GIR_EraseRootFromParent_Done,
4027 /* 12047 */ // Label 312: @12047
4028 /* 12047 */ GIM_Try, /*On fail goto*//*Label 313*/ GIMT_Encode4(12117), // Rule ID 1380 //
4029 /* 12052 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4030 /* 12056 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4031 /* 12060 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
4032 /* 12064 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
4033 /* 12068 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4034 /* 12073 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4035 /* 12077 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4036 /* 12081 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
4037 /* 12085 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4038 /* 12090 */ // MIs[2] v2
4039 /* 12090 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4040 /* 12095 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4041 /* 12097 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
4042 /* 12097 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4043 /* 12100 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4044 /* 12102 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4045 /* 12106 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4046 /* 12108 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4047 /* 12112 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4048 /* 12115 */ GIR_RootConstrainSelectedInstOperands,
4049 /* 12116 */ // GIR_Coverage, 1380,
4050 /* 12116 */ GIR_EraseRootFromParent_Done,
4051 /* 12117 */ // Label 313: @12117
4052 /* 12117 */ GIM_Try, /*On fail goto*//*Label 314*/ GIMT_Encode4(12187), // Rule ID 1381 //
4053 /* 12122 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4054 /* 12126 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4055 /* 12130 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
4056 /* 12134 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
4057 /* 12138 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4058 /* 12143 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4059 /* 12147 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4060 /* 12151 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
4061 /* 12155 */ // MIs[2] v2
4062 /* 12155 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4063 /* 12160 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4064 /* 12165 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4065 /* 12167 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
4066 /* 12167 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4067 /* 12170 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4068 /* 12172 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4069 /* 12176 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4070 /* 12178 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4071 /* 12182 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4072 /* 12185 */ GIR_RootConstrainSelectedInstOperands,
4073 /* 12186 */ // GIR_Coverage, 1381,
4074 /* 12186 */ GIR_EraseRootFromParent_Done,
4075 /* 12187 */ // Label 314: @12187
4076 /* 12187 */ GIM_Try, /*On fail goto*//*Label 315*/ GIMT_Encode4(12218), // Rule ID 1031 //
4077 /* 12192 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4078 /* 12196 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4079 /* 12202 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
4080 /* 12204 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
4081 /* 12206 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v, immAllOnesV:{ *:[v4i32] }) => (NOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v)
4082 /* 12206 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
4083 /* 12209 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4084 /* 12211 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
4085 /* 12213 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4086 /* 12216 */ GIR_RootConstrainSelectedInstOperands,
4087 /* 12217 */ // GIR_Coverage, 1031,
4088 /* 12217 */ GIR_EraseRootFromParent_Done,
4089 /* 12218 */ // Label 315: @12218
4090 /* 12218 */ GIM_Try, /*On fail goto*//*Label 316*/ GIMT_Encode4(12240), // Rule ID 1042 //
4091 /* 12223 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4092 /* 12227 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (XOR:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
4093 /* 12227 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
4094 /* 12232 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4095 /* 12238 */ GIR_RootConstrainSelectedInstOperands,
4096 /* 12239 */ // GIR_Coverage, 1042,
4097 /* 12239 */ GIR_Done,
4098 /* 12240 */ // Label 316: @12240
4099 /* 12240 */ GIM_Reject,
4100 /* 12241 */ // Label 310: @12241
4101 /* 12241 */ GIM_Reject,
4102 /* 12242 */ // Label 294: @12242
4103 /* 12242 */ GIM_Reject,
4104 /* 12243 */ // Label 244: @12243
4105 /* 12243 */ GIM_Try, /*On fail goto*//*Label 317*/ GIMT_Encode4(13791),
4106 /* 12248 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
4107 /* 12251 */ GIM_Try, /*On fail goto*//*Label 318*/ GIMT_Encode4(12697),
4108 /* 12256 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4109 /* 12260 */ GIM_Try, /*On fail goto*//*Label 319*/ GIMT_Encode4(12369), // Rule ID 1411 //
4110 /* 12265 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4111 /* 12269 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4112 /* 12273 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4113 /* 12277 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4114 /* 12281 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4115 /* 12285 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4116 /* 12289 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4117 /* 12293 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4118 /* 12297 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4119 /* 12302 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4120 /* 12306 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4121 /* 12312 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4122 /* 12314 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4123 /* 12318 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4124 /* 12322 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2i64,
4125 /* 12326 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2i64,
4126 /* 12330 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4127 /* 12335 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4128 /* 12340 */ // MIs[0] v2
4129 /* 12340 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
4130 /* 12345 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4131 /* 12347 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4132 /* 12347 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4133 /* 12350 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4134 /* 12352 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
4135 /* 12356 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
4136 /* 12360 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4137 /* 12364 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4138 /* 12367 */ GIR_RootConstrainSelectedInstOperands,
4139 /* 12368 */ // GIR_Coverage, 1411,
4140 /* 12368 */ GIR_EraseRootFromParent_Done,
4141 /* 12369 */ // Label 319: @12369
4142 /* 12369 */ GIM_Try, /*On fail goto*//*Label 320*/ GIMT_Encode4(12478), // Rule ID 1412 //
4143 /* 12374 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4144 /* 12378 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4145 /* 12382 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4146 /* 12386 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4147 /* 12390 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4148 /* 12394 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4149 /* 12398 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4150 /* 12402 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4151 /* 12406 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4152 /* 12411 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4153 /* 12415 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4154 /* 12421 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4155 /* 12423 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4156 /* 12427 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4157 /* 12431 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2i64,
4158 /* 12435 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2i64,
4159 /* 12439 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4160 /* 12444 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4161 /* 12449 */ // MIs[0] v2
4162 /* 12449 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
4163 /* 12454 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4164 /* 12456 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4165 /* 12456 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4166 /* 12459 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4167 /* 12461 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
4168 /* 12465 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
4169 /* 12469 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4170 /* 12473 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4171 /* 12476 */ GIR_RootConstrainSelectedInstOperands,
4172 /* 12477 */ // GIR_Coverage, 1412,
4173 /* 12477 */ GIR_EraseRootFromParent_Done,
4174 /* 12478 */ // Label 320: @12478
4175 /* 12478 */ GIM_Try, /*On fail goto*//*Label 321*/ GIMT_Encode4(12587), // Rule ID 1066 //
4176 /* 12483 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4177 /* 12487 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4178 /* 12491 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4179 /* 12495 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4180 /* 12499 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4181 /* 12503 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4182 /* 12507 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4183 /* 12511 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4184 /* 12515 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4185 /* 12520 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4186 /* 12525 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4187 /* 12529 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4188 /* 12533 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2i64,
4189 /* 12537 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
4190 /* 12541 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4191 /* 12546 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4192 /* 12550 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4193 /* 12556 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4194 /* 12558 */ // MIs[0] v2
4195 /* 12558 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
4196 /* 12563 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4197 /* 12565 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4198 /* 12565 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4199 /* 12568 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4200 /* 12570 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
4201 /* 12574 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4202 /* 12578 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4203 /* 12582 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4204 /* 12585 */ GIR_RootConstrainSelectedInstOperands,
4205 /* 12586 */ // GIR_Coverage, 1066,
4206 /* 12586 */ GIR_EraseRootFromParent_Done,
4207 /* 12587 */ // Label 321: @12587
4208 /* 12587 */ GIM_Try, /*On fail goto*//*Label 322*/ GIMT_Encode4(12696), // Rule ID 1410 //
4209 /* 12592 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4210 /* 12596 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4211 /* 12600 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4212 /* 12604 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4213 /* 12608 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4214 /* 12612 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4215 /* 12616 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4216 /* 12620 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4217 /* 12624 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4218 /* 12629 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4219 /* 12634 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4220 /* 12638 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4221 /* 12642 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2i64,
4222 /* 12646 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
4223 /* 12650 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4224 /* 12655 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4225 /* 12659 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4226 /* 12665 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4227 /* 12667 */ // MIs[0] v2
4228 /* 12667 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4229 /* 12672 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4230 /* 12674 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4231 /* 12674 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4232 /* 12677 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4233 /* 12679 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4234 /* 12683 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4235 /* 12687 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4236 /* 12691 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4237 /* 12694 */ GIR_RootConstrainSelectedInstOperands,
4238 /* 12695 */ // GIR_Coverage, 1410,
4239 /* 12695 */ GIR_EraseRootFromParent_Done,
4240 /* 12696 */ // Label 322: @12696
4241 /* 12696 */ GIM_Reject,
4242 /* 12697 */ // Label 318: @12697
4243 /* 12697 */ GIM_Try, /*On fail goto*//*Label 323*/ GIMT_Encode4(13106),
4244 /* 12702 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
4245 /* 12705 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4246 /* 12709 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4247 /* 12713 */ GIM_Try, /*On fail goto*//*Label 324*/ GIMT_Encode4(12811), // Rule ID 1415 //
4248 /* 12718 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4249 /* 12722 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4250 /* 12726 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4251 /* 12730 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4252 /* 12734 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4253 /* 12738 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4254 /* 12742 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4255 /* 12746 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4256 /* 12750 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4257 /* 12755 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4258 /* 12759 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4259 /* 12765 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4260 /* 12767 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4261 /* 12771 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4262 /* 12775 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2i64,
4263 /* 12779 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4264 /* 12784 */ // MIs[4] v2
4265 /* 12784 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4266 /* 12789 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4267 /* 12791 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4268 /* 12791 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4269 /* 12794 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4270 /* 12796 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4271 /* 12798 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
4272 /* 12802 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4273 /* 12806 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4274 /* 12809 */ GIR_RootConstrainSelectedInstOperands,
4275 /* 12810 */ // GIR_Coverage, 1415,
4276 /* 12810 */ GIR_EraseRootFromParent_Done,
4277 /* 12811 */ // Label 324: @12811
4278 /* 12811 */ GIM_Try, /*On fail goto*//*Label 325*/ GIMT_Encode4(12909), // Rule ID 1416 //
4279 /* 12816 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4280 /* 12820 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4281 /* 12824 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4282 /* 12828 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4283 /* 12832 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4284 /* 12836 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4285 /* 12840 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4286 /* 12844 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4287 /* 12848 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4288 /* 12853 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4289 /* 12857 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4290 /* 12863 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4291 /* 12865 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4292 /* 12869 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4293 /* 12873 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2i64,
4294 /* 12877 */ // MIs[4] v2
4295 /* 12877 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4296 /* 12882 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4297 /* 12887 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4298 /* 12889 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4299 /* 12889 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4300 /* 12892 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4301 /* 12894 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4302 /* 12896 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
4303 /* 12900 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4304 /* 12904 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4305 /* 12907 */ GIR_RootConstrainSelectedInstOperands,
4306 /* 12908 */ // GIR_Coverage, 1416,
4307 /* 12908 */ GIR_EraseRootFromParent_Done,
4308 /* 12909 */ // Label 325: @12909
4309 /* 12909 */ GIM_Try, /*On fail goto*//*Label 326*/ GIMT_Encode4(13007), // Rule ID 1413 //
4310 /* 12914 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4311 /* 12918 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4312 /* 12922 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4313 /* 12926 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4314 /* 12930 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4315 /* 12934 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4316 /* 12938 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4317 /* 12942 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4318 /* 12947 */ // MIs[2] v2
4319 /* 12947 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4320 /* 12952 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4321 /* 12956 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4322 /* 12960 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2i64,
4323 /* 12964 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
4324 /* 12968 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4325 /* 12973 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4326 /* 12977 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4327 /* 12983 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4328 /* 12985 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4329 /* 12987 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4330 /* 12987 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4331 /* 12990 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4332 /* 12992 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4333 /* 12994 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4334 /* 12998 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4335 /* 13002 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4336 /* 13005 */ GIR_RootConstrainSelectedInstOperands,
4337 /* 13006 */ // GIR_Coverage, 1413,
4338 /* 13006 */ GIR_EraseRootFromParent_Done,
4339 /* 13007 */ // Label 326: @13007
4340 /* 13007 */ GIM_Try, /*On fail goto*//*Label 327*/ GIMT_Encode4(13105), // Rule ID 1414 //
4341 /* 13012 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4342 /* 13016 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4343 /* 13020 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4344 /* 13024 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4345 /* 13028 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4346 /* 13032 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4347 /* 13036 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4348 /* 13040 */ // MIs[2] v2
4349 /* 13040 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4350 /* 13045 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4351 /* 13050 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4352 /* 13054 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4353 /* 13058 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2i64,
4354 /* 13062 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
4355 /* 13066 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4356 /* 13071 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4357 /* 13075 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4358 /* 13081 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4359 /* 13083 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4360 /* 13085 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4361 /* 13085 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4362 /* 13088 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4363 /* 13090 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4364 /* 13092 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4365 /* 13096 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4366 /* 13100 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4367 /* 13103 */ GIR_RootConstrainSelectedInstOperands,
4368 /* 13104 */ // GIR_Coverage, 1414,
4369 /* 13104 */ GIR_EraseRootFromParent_Done,
4370 /* 13105 */ // Label 327: @13105
4371 /* 13105 */ GIM_Reject,
4372 /* 13106 */ // Label 323: @13106
4373 /* 13106 */ GIM_Try, /*On fail goto*//*Label 328*/ GIMT_Encode4(13440),
4374 /* 13111 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4375 /* 13115 */ GIM_Try, /*On fail goto*//*Label 329*/ GIMT_Encode4(13196), // Rule ID 1062 //
4376 /* 13120 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4377 /* 13124 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4378 /* 13128 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4379 /* 13132 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4380 /* 13136 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4381 /* 13140 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4382 /* 13144 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4383 /* 13148 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4384 /* 13152 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4385 /* 13157 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4386 /* 13162 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4387 /* 13167 */ // MIs[0] v2
4388 /* 13167 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
4389 /* 13172 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4390 /* 13174 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), V128:{ *:[v2i64] }:$c), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4391 /* 13174 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4392 /* 13177 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4393 /* 13179 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4394 /* 13183 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
4395 /* 13187 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4396 /* 13191 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4397 /* 13194 */ GIR_RootConstrainSelectedInstOperands,
4398 /* 13195 */ // GIR_Coverage, 1062,
4399 /* 13195 */ GIR_EraseRootFromParent_Done,
4400 /* 13196 */ // Label 329: @13196
4401 /* 13196 */ GIM_Try, /*On fail goto*//*Label 330*/ GIMT_Encode4(13277), // Rule ID 1382 //
4402 /* 13201 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4403 /* 13205 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4404 /* 13209 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4405 /* 13213 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4406 /* 13217 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4407 /* 13221 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4408 /* 13225 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4409 /* 13229 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4410 /* 13233 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4411 /* 13238 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4412 /* 13243 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4413 /* 13248 */ // MIs[0] v2
4414 /* 13248 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4415 /* 13253 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4416 /* 13255 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), V128:{ *:[v2i64] }:$c), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4417 /* 13255 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4418 /* 13258 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4419 /* 13260 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4420 /* 13264 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4421 /* 13268 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4422 /* 13272 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4423 /* 13275 */ GIR_RootConstrainSelectedInstOperands,
4424 /* 13276 */ // GIR_Coverage, 1382,
4425 /* 13276 */ GIR_EraseRootFromParent_Done,
4426 /* 13277 */ // Label 330: @13277
4427 /* 13277 */ GIM_Try, /*On fail goto*//*Label 331*/ GIMT_Encode4(13358), // Rule ID 1383 //
4428 /* 13282 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4429 /* 13286 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4430 /* 13290 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4431 /* 13294 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4432 /* 13298 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4433 /* 13303 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4434 /* 13307 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4435 /* 13311 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4436 /* 13315 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4437 /* 13319 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4438 /* 13324 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4439 /* 13329 */ // MIs[0] v2
4440 /* 13329 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
4441 /* 13334 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4442 /* 13336 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4443 /* 13336 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4444 /* 13339 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4445 /* 13341 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4446 /* 13345 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
4447 /* 13349 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4448 /* 13353 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4449 /* 13356 */ GIR_RootConstrainSelectedInstOperands,
4450 /* 13357 */ // GIR_Coverage, 1383,
4451 /* 13357 */ GIR_EraseRootFromParent_Done,
4452 /* 13358 */ // Label 331: @13358
4453 /* 13358 */ GIM_Try, /*On fail goto*//*Label 332*/ GIMT_Encode4(13439), // Rule ID 1384 //
4454 /* 13363 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4455 /* 13367 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4456 /* 13371 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4457 /* 13375 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4458 /* 13379 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4459 /* 13384 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4460 /* 13388 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4461 /* 13392 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4462 /* 13396 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4463 /* 13400 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4464 /* 13405 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4465 /* 13410 */ // MIs[0] v2
4466 /* 13410 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4467 /* 13415 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4468 /* 13417 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4469 /* 13417 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4470 /* 13420 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4471 /* 13422 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4472 /* 13426 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4473 /* 13430 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4474 /* 13434 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4475 /* 13437 */ GIR_RootConstrainSelectedInstOperands,
4476 /* 13438 */ // GIR_Coverage, 1384,
4477 /* 13438 */ GIR_EraseRootFromParent_Done,
4478 /* 13439 */ // Label 332: @13439
4479 /* 13439 */ GIM_Reject,
4480 /* 13440 */ // Label 328: @13440
4481 /* 13440 */ GIM_Try, /*On fail goto*//*Label 333*/ GIMT_Encode4(13790),
4482 /* 13445 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
4483 /* 13448 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4484 /* 13452 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4485 /* 13456 */ GIM_Try, /*On fail goto*//*Label 334*/ GIMT_Encode4(13526), // Rule ID 1385 //
4486 /* 13461 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4487 /* 13465 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4488 /* 13469 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4489 /* 13473 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4490 /* 13477 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4491 /* 13481 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4492 /* 13485 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4493 /* 13489 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4494 /* 13494 */ // MIs[2] v2
4495 /* 13494 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4496 /* 13499 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4497 /* 13504 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4498 /* 13506 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4499 /* 13506 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4500 /* 13509 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4501 /* 13511 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4502 /* 13515 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4503 /* 13517 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4504 /* 13521 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4505 /* 13524 */ GIR_RootConstrainSelectedInstOperands,
4506 /* 13525 */ // GIR_Coverage, 1385,
4507 /* 13525 */ GIR_EraseRootFromParent_Done,
4508 /* 13526 */ // Label 334: @13526
4509 /* 13526 */ GIM_Try, /*On fail goto*//*Label 335*/ GIMT_Encode4(13596), // Rule ID 1386 //
4510 /* 13531 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4511 /* 13535 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4512 /* 13539 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4513 /* 13543 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4514 /* 13547 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4515 /* 13551 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4516 /* 13555 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4517 /* 13559 */ // MIs[2] v2
4518 /* 13559 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4519 /* 13564 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4520 /* 13569 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4521 /* 13574 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4522 /* 13576 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4523 /* 13576 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4524 /* 13579 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4525 /* 13581 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4526 /* 13585 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4527 /* 13587 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4528 /* 13591 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4529 /* 13594 */ GIR_RootConstrainSelectedInstOperands,
4530 /* 13595 */ // GIR_Coverage, 1386,
4531 /* 13595 */ GIR_EraseRootFromParent_Done,
4532 /* 13596 */ // Label 335: @13596
4533 /* 13596 */ GIM_Try, /*On fail goto*//*Label 336*/ GIMT_Encode4(13666), // Rule ID 1387 //
4534 /* 13601 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4535 /* 13605 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4536 /* 13609 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4537 /* 13613 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4538 /* 13617 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4539 /* 13622 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4540 /* 13626 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4541 /* 13630 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4542 /* 13634 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4543 /* 13639 */ // MIs[2] v2
4544 /* 13639 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4545 /* 13644 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4546 /* 13646 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4547 /* 13646 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4548 /* 13649 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4549 /* 13651 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4550 /* 13655 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4551 /* 13657 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4552 /* 13661 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4553 /* 13664 */ GIR_RootConstrainSelectedInstOperands,
4554 /* 13665 */ // GIR_Coverage, 1387,
4555 /* 13665 */ GIR_EraseRootFromParent_Done,
4556 /* 13666 */ // Label 336: @13666
4557 /* 13666 */ GIM_Try, /*On fail goto*//*Label 337*/ GIMT_Encode4(13736), // Rule ID 1388 //
4558 /* 13671 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4559 /* 13675 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4560 /* 13679 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4561 /* 13683 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4562 /* 13687 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4563 /* 13692 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4564 /* 13696 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4565 /* 13700 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4566 /* 13704 */ // MIs[2] v2
4567 /* 13704 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4568 /* 13709 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4569 /* 13714 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4570 /* 13716 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4571 /* 13716 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4572 /* 13719 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4573 /* 13721 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4574 /* 13725 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4575 /* 13727 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4576 /* 13731 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4577 /* 13734 */ GIR_RootConstrainSelectedInstOperands,
4578 /* 13735 */ // GIR_Coverage, 1388,
4579 /* 13735 */ GIR_EraseRootFromParent_Done,
4580 /* 13736 */ // Label 337: @13736
4581 /* 13736 */ GIM_Try, /*On fail goto*//*Label 338*/ GIMT_Encode4(13767), // Rule ID 1032 //
4582 /* 13741 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4583 /* 13745 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4584 /* 13751 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
4585 /* 13753 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
4586 /* 13755 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v, immAllOnesV:{ *:[v2i64] }) => (NOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v)
4587 /* 13755 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
4588 /* 13758 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4589 /* 13760 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
4590 /* 13762 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4591 /* 13765 */ GIR_RootConstrainSelectedInstOperands,
4592 /* 13766 */ // GIR_Coverage, 1032,
4593 /* 13766 */ GIR_EraseRootFromParent_Done,
4594 /* 13767 */ // Label 338: @13767
4595 /* 13767 */ GIM_Try, /*On fail goto*//*Label 339*/ GIMT_Encode4(13789), // Rule ID 1043 //
4596 /* 13772 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4597 /* 13776 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (XOR:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
4598 /* 13776 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
4599 /* 13781 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4600 /* 13787 */ GIR_RootConstrainSelectedInstOperands,
4601 /* 13788 */ // GIR_Coverage, 1043,
4602 /* 13788 */ GIR_Done,
4603 /* 13789 */ // Label 339: @13789
4604 /* 13789 */ GIM_Reject,
4605 /* 13790 */ // Label 333: @13790
4606 /* 13790 */ GIM_Reject,
4607 /* 13791 */ // Label 317: @13791
4608 /* 13791 */ GIM_Reject,
4609 /* 13792 */ // Label 245: @13792
4610 /* 13792 */ GIM_Reject,
4611 /* 13793 */ // Label 10: @13793
4612 /* 13793 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(14), /*)*//*default:*//*Label 342*/ GIMT_Encode4(13886),
4613 /* 13804 */ /*GILLT_v16i8*//*Label 340*/ GIMT_Encode4(13812),
4614 /* 13808 */ /*GILLT_v8i16*//*Label 341*/ GIMT_Encode4(13849),
4615 /* 13812 */ // Label 340: @13812
4616 /* 13812 */ GIM_Try, /*On fail goto*//*Label 343*/ GIMT_Encode4(13848), // Rule ID 1159 //
4617 /* 13817 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
4618 /* 13820 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
4619 /* 13823 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4620 /* 13827 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4621 /* 13831 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4622 /* 13835 */ // (avgceilu:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (AVGR_U_I8x16:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
4623 /* 13835 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I8x16),
4624 /* 13840 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4625 /* 13846 */ GIR_RootConstrainSelectedInstOperands,
4626 /* 13847 */ // GIR_Coverage, 1159,
4627 /* 13847 */ GIR_Done,
4628 /* 13848 */ // Label 343: @13848
4629 /* 13848 */ GIM_Reject,
4630 /* 13849 */ // Label 341: @13849
4631 /* 13849 */ GIM_Try, /*On fail goto*//*Label 344*/ GIMT_Encode4(13885), // Rule ID 1161 //
4632 /* 13854 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
4633 /* 13857 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
4634 /* 13860 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4635 /* 13864 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4636 /* 13868 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4637 /* 13872 */ // (avgceilu:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (AVGR_U_I16x8:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
4638 /* 13872 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I16x8),
4639 /* 13877 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4640 /* 13883 */ GIR_RootConstrainSelectedInstOperands,
4641 /* 13884 */ // GIR_Coverage, 1161,
4642 /* 13884 */ GIR_Done,
4643 /* 13885 */ // Label 344: @13885
4644 /* 13885 */ GIM_Reject,
4645 /* 13886 */ // Label 342: @13886
4646 /* 13886 */ GIM_Reject,
4647 /* 13887 */ // Label 11: @13887
4648 /* 13887 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 345*/ GIMT_Encode4(13917), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 1300 //
4649 /* 13894 */ // MIs[0] DstI[res]
4650 /* 13894 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/0, /*SizeInBits*/32,
4651 /* 13898 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
4652 /* 13902 */ // MIs[0] Operand 1
4653 /* 13902 */ // No operand predicates
4654 /* 13902 */ // (frameindex:{ *:[i32] }):$fi => (COPY_I32:{ *:[i32] } (to_tframeindex:{ *:[i32] } ?:{ *:[i32] }:$fi))
4655 /* 13902 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::COPY_I32),
4656 /* 13905 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
4657 /* 13907 */ GIR_CustomRenderer, /*InsnID*/0, /*OldInsnID*/0, /*Renderer*/GIMT_Encode2(GICR_renderFrameIndex), // fi
4658 /* 13912 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4659 /* 13915 */ GIR_RootConstrainSelectedInstOperands,
4660 /* 13916 */ // GIR_Coverage, 1300,
4661 /* 13916 */ GIR_EraseRootFromParent_Done,
4662 /* 13917 */ // Label 345: @13917
4663 /* 13917 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 346*/ GIMT_Encode4(13947), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 1301 //
4664 /* 13924 */ // MIs[0] DstI[res]
4665 /* 13924 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/0, /*SizeInBits*/64,
4666 /* 13928 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
4667 /* 13932 */ // MIs[0] Operand 1
4668 /* 13932 */ // No operand predicates
4669 /* 13932 */ // (frameindex:{ *:[i64] }):$fi => (COPY_I64:{ *:[i64] } (to_tframeindex:{ *:[i64] } ?:{ *:[i64] }:$fi))
4670 /* 13932 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::COPY_I64),
4671 /* 13935 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
4672 /* 13937 */ GIR_CustomRenderer, /*InsnID*/0, /*OldInsnID*/0, /*Renderer*/GIMT_Encode2(GICR_renderFrameIndex), // fi
4673 /* 13942 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4674 /* 13945 */ GIR_RootConstrainSelectedInstOperands,
4675 /* 13946 */ // GIR_Coverage, 1301,
4676 /* 13946 */ GIR_EraseRootFromParent_Done,
4677 /* 13947 */ // Label 346: @13947
4678 /* 13947 */ GIM_Reject,
4679 /* 13948 */ // Label 12: @13948
4680 /* 13948 */ GIM_Try, /*On fail goto*//*Label 347*/ GIMT_Encode4(14052),
4681 /* 13953 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
4682 /* 13956 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
4683 /* 13959 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
4684 /* 13962 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
4685 /* 13965 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4686 /* 13969 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 348*/ GIMT_Encode4(14010), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 178 //
4687 /* 13976 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4688 /* 13980 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4689 /* 13984 */ // MIs[1] Operand 1
4690 /* 13984 */ // No operand predicates
4691 /* 13984 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4692 /* 13988 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4693 /* 13992 */ // MIs[2] Operand 1
4694 /* 13992 */ // No operand predicates
4695 /* 13992 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4696 /* 13994 */ // (build_vector:{ *:[v2f64] } (fpimm:{ *:[f64] }):$i0, (fpimm:{ *:[f64] }):$i1) => (CONST_V128_F64x2:{ *:[v2f64] } (fpimm:{ *:[f64] }):$i0, (fpimm:{ *:[f64] }):$i1)
4697 /* 13994 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F64x2),
4698 /* 13997 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4699 /* 13999 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4700 /* 14002 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4701 /* 14005 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4702 /* 14008 */ GIR_RootConstrainSelectedInstOperands,
4703 /* 14009 */ // GIR_Coverage, 178,
4704 /* 14009 */ GIR_EraseRootFromParent_Done,
4705 /* 14010 */ // Label 348: @14010
4706 /* 14010 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 349*/ GIMT_Encode4(14051), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 176 //
4707 /* 14017 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4708 /* 14021 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4709 /* 14025 */ // MIs[1] Operand 1
4710 /* 14025 */ // No operand predicates
4711 /* 14025 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4712 /* 14029 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4713 /* 14033 */ // MIs[2] Operand 1
4714 /* 14033 */ // No operand predicates
4715 /* 14033 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4716 /* 14035 */ // (build_vector:{ *:[v2i64] } (imm:{ *:[i64] }):$i0, (imm:{ *:[i64] }):$i1) => (CONST_V128_I64x2:{ *:[v2i64] } (imm:{ *:[i64] }):$i0, (imm:{ *:[i64] }):$i1)
4717 /* 14035 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I64x2),
4718 /* 14038 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4719 /* 14040 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4720 /* 14043 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4721 /* 14046 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4722 /* 14049 */ GIR_RootConstrainSelectedInstOperands,
4723 /* 14050 */ // GIR_Coverage, 176,
4724 /* 14050 */ GIR_EraseRootFromParent_Done,
4725 /* 14051 */ // Label 349: @14051
4726 /* 14051 */ GIM_Reject,
4727 /* 14052 */ // Label 347: @14052
4728 /* 14052 */ GIM_Try, /*On fail goto*//*Label 350*/ GIMT_Encode4(14206),
4729 /* 14057 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
4730 /* 14060 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
4731 /* 14063 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
4732 /* 14066 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
4733 /* 14069 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
4734 /* 14072 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
4735 /* 14075 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4736 /* 14079 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 351*/ GIMT_Encode4(14142), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 177 //
4737 /* 14086 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4738 /* 14090 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4739 /* 14094 */ // MIs[1] Operand 1
4740 /* 14094 */ // No operand predicates
4741 /* 14094 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4742 /* 14098 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4743 /* 14102 */ // MIs[2] Operand 1
4744 /* 14102 */ // No operand predicates
4745 /* 14102 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
4746 /* 14106 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4747 /* 14110 */ // MIs[3] Operand 1
4748 /* 14110 */ // No operand predicates
4749 /* 14110 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
4750 /* 14114 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
4751 /* 14118 */ // MIs[4] Operand 1
4752 /* 14118 */ // No operand predicates
4753 /* 14118 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4754 /* 14120 */ // (build_vector:{ *:[v4f32] } (fpimm:{ *:[f32] }):$i0, (fpimm:{ *:[f32] }):$i1, (fpimm:{ *:[f32] }):$i2, (fpimm:{ *:[f32] }):$i3) => (CONST_V128_F32x4:{ *:[v4f32] } (fpimm:{ *:[f32] }):$i0, (fpimm:{ *:[f32] }):$i1, (fpimm:{ *:[f32] }):$i2, (fpimm:{ *:[f32] }):$i3)
4755 /* 14120 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F32x4),
4756 /* 14123 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4757 /* 14125 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4758 /* 14128 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4759 /* 14131 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
4760 /* 14134 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
4761 /* 14137 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4762 /* 14140 */ GIR_RootConstrainSelectedInstOperands,
4763 /* 14141 */ // GIR_Coverage, 177,
4764 /* 14141 */ GIR_EraseRootFromParent_Done,
4765 /* 14142 */ // Label 351: @14142
4766 /* 14142 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 352*/ GIMT_Encode4(14205), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 175 //
4767 /* 14149 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4768 /* 14153 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4769 /* 14157 */ // MIs[1] Operand 1
4770 /* 14157 */ // No operand predicates
4771 /* 14157 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4772 /* 14161 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4773 /* 14165 */ // MIs[2] Operand 1
4774 /* 14165 */ // No operand predicates
4775 /* 14165 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
4776 /* 14169 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4777 /* 14173 */ // MIs[3] Operand 1
4778 /* 14173 */ // No operand predicates
4779 /* 14173 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
4780 /* 14177 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4781 /* 14181 */ // MIs[4] Operand 1
4782 /* 14181 */ // No operand predicates
4783 /* 14181 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4784 /* 14183 */ // (build_vector:{ *:[v4i32] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3) => (CONST_V128_I32x4:{ *:[v4i32] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3)
4785 /* 14183 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I32x4),
4786 /* 14186 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4787 /* 14188 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4788 /* 14191 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4789 /* 14194 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
4790 /* 14197 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
4791 /* 14200 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4792 /* 14203 */ GIR_RootConstrainSelectedInstOperands,
4793 /* 14204 */ // GIR_Coverage, 175,
4794 /* 14204 */ GIR_EraseRootFromParent_Done,
4795 /* 14205 */ // Label 352: @14205
4796 /* 14205 */ GIM_Reject,
4797 /* 14206 */ // Label 350: @14206
4798 /* 14206 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 353*/ GIMT_Encode4(14379), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 174 //
4799 /* 14213 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/9,
4800 /* 14216 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
4801 /* 14219 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
4802 /* 14222 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
4803 /* 14225 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
4804 /* 14228 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
4805 /* 14231 */ GIM_RootCheckType, /*Op*/5, /*Type*/GILLT_s32,
4806 /* 14234 */ GIM_RootCheckType, /*Op*/6, /*Type*/GILLT_s32,
4807 /* 14237 */ GIM_RootCheckType, /*Op*/7, /*Type*/GILLT_s32,
4808 /* 14240 */ GIM_RootCheckType, /*Op*/8, /*Type*/GILLT_s32,
4809 /* 14243 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4810 /* 14247 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4811 /* 14251 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4812 /* 14255 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4813 /* 14259 */ // MIs[1] Operand 1
4814 /* 14259 */ // No operand predicates
4815 /* 14259 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4816 /* 14263 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4817 /* 14267 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4818 /* 14271 */ // MIs[2] Operand 1
4819 /* 14271 */ // No operand predicates
4820 /* 14271 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
4821 /* 14275 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4822 /* 14279 */ GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4823 /* 14283 */ // MIs[3] Operand 1
4824 /* 14283 */ // No operand predicates
4825 /* 14283 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
4826 /* 14287 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4827 /* 14291 */ GIM_CheckI64ImmPredicate, /*MI*/4, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4828 /* 14295 */ // MIs[4] Operand 1
4829 /* 14295 */ // No operand predicates
4830 /* 14295 */ GIM_RecordInsn, /*DefineMI*/5, /*MI*/0, /*OpIdx*/5, // MIs[5]
4831 /* 14299 */ GIM_CheckOpcode, /*MI*/5, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4832 /* 14303 */ GIM_CheckI64ImmPredicate, /*MI*/5, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4833 /* 14307 */ // MIs[5] Operand 1
4834 /* 14307 */ // No operand predicates
4835 /* 14307 */ GIM_RecordInsn, /*DefineMI*/6, /*MI*/0, /*OpIdx*/6, // MIs[6]
4836 /* 14311 */ GIM_CheckOpcode, /*MI*/6, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4837 /* 14315 */ GIM_CheckI64ImmPredicate, /*MI*/6, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4838 /* 14319 */ // MIs[6] Operand 1
4839 /* 14319 */ // No operand predicates
4840 /* 14319 */ GIM_RecordInsn, /*DefineMI*/7, /*MI*/0, /*OpIdx*/7, // MIs[7]
4841 /* 14323 */ GIM_CheckOpcode, /*MI*/7, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4842 /* 14327 */ GIM_CheckI64ImmPredicate, /*MI*/7, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4843 /* 14331 */ // MIs[7] Operand 1
4844 /* 14331 */ // No operand predicates
4845 /* 14331 */ GIM_RecordInsn, /*DefineMI*/8, /*MI*/0, /*OpIdx*/8, // MIs[8]
4846 /* 14335 */ GIM_CheckOpcode, /*MI*/8, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4847 /* 14339 */ GIM_CheckI64ImmPredicate, /*MI*/8, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
4848 /* 14343 */ // MIs[8] Operand 1
4849 /* 14343 */ // No operand predicates
4850 /* 14343 */ GIM_CheckIsSafeToFold, /*NumInsns*/8,
4851 /* 14345 */ // (build_vector:{ *:[v8i16] } (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i0, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i1, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i2, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i3, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i4, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i5, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i6, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i7) => (CONST_V128_I16x8:{ *:[v8i16] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3, (imm:{ *:[i32] }):$i4, (imm:{ *:[i32] }):$i5, (imm:{ *:[i32] }):$i6, (imm:{ *:[i32] }):$i7)
4852 /* 14345 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I16x8),
4853 /* 14348 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4854 /* 14350 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4855 /* 14353 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4856 /* 14356 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
4857 /* 14359 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
4858 /* 14362 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/5, // i4
4859 /* 14365 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/6, // i5
4860 /* 14368 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/7, // i6
4861 /* 14371 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/8, // i7
4862 /* 14374 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4863 /* 14377 */ GIR_RootConstrainSelectedInstOperands,
4864 /* 14378 */ // GIR_Coverage, 174,
4865 /* 14378 */ GIR_EraseRootFromParent_Done,
4866 /* 14379 */ // Label 353: @14379
4867 /* 14379 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 354*/ GIMT_Encode4(14696), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 173 //
4868 /* 14386 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/17,
4869 /* 14389 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
4870 /* 14392 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
4871 /* 14395 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
4872 /* 14398 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
4873 /* 14401 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
4874 /* 14404 */ GIM_RootCheckType, /*Op*/5, /*Type*/GILLT_s32,
4875 /* 14407 */ GIM_RootCheckType, /*Op*/6, /*Type*/GILLT_s32,
4876 /* 14410 */ GIM_RootCheckType, /*Op*/7, /*Type*/GILLT_s32,
4877 /* 14413 */ GIM_RootCheckType, /*Op*/8, /*Type*/GILLT_s32,
4878 /* 14416 */ GIM_RootCheckType, /*Op*/9, /*Type*/GILLT_s32,
4879 /* 14419 */ GIM_RootCheckType, /*Op*/10, /*Type*/GILLT_s32,
4880 /* 14422 */ GIM_RootCheckType, /*Op*/11, /*Type*/GILLT_s32,
4881 /* 14425 */ GIM_RootCheckType, /*Op*/12, /*Type*/GILLT_s32,
4882 /* 14428 */ GIM_RootCheckType, /*Op*/13, /*Type*/GILLT_s32,
4883 /* 14431 */ GIM_RootCheckType, /*Op*/14, /*Type*/GILLT_s32,
4884 /* 14434 */ GIM_RootCheckType, /*Op*/15, /*Type*/GILLT_s32,
4885 /* 14437 */ GIM_RootCheckType, /*Op*/16, /*Type*/GILLT_s32,
4886 /* 14440 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4887 /* 14444 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4888 /* 14448 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4889 /* 14452 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4890 /* 14456 */ // MIs[1] Operand 1
4891 /* 14456 */ // No operand predicates
4892 /* 14456 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4893 /* 14460 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4894 /* 14464 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4895 /* 14468 */ // MIs[2] Operand 1
4896 /* 14468 */ // No operand predicates
4897 /* 14468 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
4898 /* 14472 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4899 /* 14476 */ GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4900 /* 14480 */ // MIs[3] Operand 1
4901 /* 14480 */ // No operand predicates
4902 /* 14480 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
4903 /* 14484 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4904 /* 14488 */ GIM_CheckI64ImmPredicate, /*MI*/4, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4905 /* 14492 */ // MIs[4] Operand 1
4906 /* 14492 */ // No operand predicates
4907 /* 14492 */ GIM_RecordInsn, /*DefineMI*/5, /*MI*/0, /*OpIdx*/5, // MIs[5]
4908 /* 14496 */ GIM_CheckOpcode, /*MI*/5, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4909 /* 14500 */ GIM_CheckI64ImmPredicate, /*MI*/5, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4910 /* 14504 */ // MIs[5] Operand 1
4911 /* 14504 */ // No operand predicates
4912 /* 14504 */ GIM_RecordInsn, /*DefineMI*/6, /*MI*/0, /*OpIdx*/6, // MIs[6]
4913 /* 14508 */ GIM_CheckOpcode, /*MI*/6, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4914 /* 14512 */ GIM_CheckI64ImmPredicate, /*MI*/6, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4915 /* 14516 */ // MIs[6] Operand 1
4916 /* 14516 */ // No operand predicates
4917 /* 14516 */ GIM_RecordInsn, /*DefineMI*/7, /*MI*/0, /*OpIdx*/7, // MIs[7]
4918 /* 14520 */ GIM_CheckOpcode, /*MI*/7, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4919 /* 14524 */ GIM_CheckI64ImmPredicate, /*MI*/7, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4920 /* 14528 */ // MIs[7] Operand 1
4921 /* 14528 */ // No operand predicates
4922 /* 14528 */ GIM_RecordInsn, /*DefineMI*/8, /*MI*/0, /*OpIdx*/8, // MIs[8]
4923 /* 14532 */ GIM_CheckOpcode, /*MI*/8, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4924 /* 14536 */ GIM_CheckI64ImmPredicate, /*MI*/8, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4925 /* 14540 */ // MIs[8] Operand 1
4926 /* 14540 */ // No operand predicates
4927 /* 14540 */ GIM_RecordInsn, /*DefineMI*/9, /*MI*/0, /*OpIdx*/9, // MIs[9]
4928 /* 14544 */ GIM_CheckOpcode, /*MI*/9, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4929 /* 14548 */ GIM_CheckI64ImmPredicate, /*MI*/9, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4930 /* 14552 */ // MIs[9] Operand 1
4931 /* 14552 */ // No operand predicates
4932 /* 14552 */ GIM_RecordInsn, /*DefineMI*/10, /*MI*/0, /*OpIdx*/10, // MIs[10]
4933 /* 14556 */ GIM_CheckOpcode, /*MI*/10, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4934 /* 14560 */ GIM_CheckI64ImmPredicate, /*MI*/10, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4935 /* 14564 */ // MIs[10] Operand 1
4936 /* 14564 */ // No operand predicates
4937 /* 14564 */ GIM_RecordInsn, /*DefineMI*/11, /*MI*/0, /*OpIdx*/11, // MIs[11]
4938 /* 14568 */ GIM_CheckOpcode, /*MI*/11, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4939 /* 14572 */ GIM_CheckI64ImmPredicate, /*MI*/11, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4940 /* 14576 */ // MIs[11] Operand 1
4941 /* 14576 */ // No operand predicates
4942 /* 14576 */ GIM_RecordInsn, /*DefineMI*/12, /*MI*/0, /*OpIdx*/12, // MIs[12]
4943 /* 14580 */ GIM_CheckOpcode, /*MI*/12, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4944 /* 14584 */ GIM_CheckI64ImmPredicate, /*MI*/12, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4945 /* 14588 */ // MIs[12] Operand 1
4946 /* 14588 */ // No operand predicates
4947 /* 14588 */ GIM_RecordInsn, /*DefineMI*/13, /*MI*/0, /*OpIdx*/13, // MIs[13]
4948 /* 14592 */ GIM_CheckOpcode, /*MI*/13, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4949 /* 14596 */ GIM_CheckI64ImmPredicate, /*MI*/13, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4950 /* 14600 */ // MIs[13] Operand 1
4951 /* 14600 */ // No operand predicates
4952 /* 14600 */ GIM_RecordInsn, /*DefineMI*/14, /*MI*/0, /*OpIdx*/14, // MIs[14]
4953 /* 14604 */ GIM_CheckOpcode, /*MI*/14, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4954 /* 14608 */ GIM_CheckI64ImmPredicate, /*MI*/14, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4955 /* 14612 */ // MIs[14] Operand 1
4956 /* 14612 */ // No operand predicates
4957 /* 14612 */ GIM_RecordInsn, /*DefineMI*/15, /*MI*/0, /*OpIdx*/15, // MIs[15]
4958 /* 14616 */ GIM_CheckOpcode, /*MI*/15, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4959 /* 14620 */ GIM_CheckI64ImmPredicate, /*MI*/15, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4960 /* 14624 */ // MIs[15] Operand 1
4961 /* 14624 */ // No operand predicates
4962 /* 14624 */ GIM_RecordInsn, /*DefineMI*/16, /*MI*/0, /*OpIdx*/16, // MIs[16]
4963 /* 14628 */ GIM_CheckOpcode, /*MI*/16, GIMT_Encode2(TargetOpcode::G_CONSTANT),
4964 /* 14632 */ GIM_CheckI64ImmPredicate, /*MI*/16, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
4965 /* 14636 */ // MIs[16] Operand 1
4966 /* 14636 */ // No operand predicates
4967 /* 14636 */ GIM_CheckIsSafeToFold, /*NumInsns*/16,
4968 /* 14638 */ // (build_vector:{ *:[v16i8] } (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i0, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i1, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i2, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i3, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i4, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i5, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i6, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i7, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i8, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i9, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iA, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iB, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iC, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iD, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iE, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iF) => (CONST_V128_I8x16:{ *:[v16i8] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3, (imm:{ *:[i32] }):$i4, (imm:{ *:[i32] }):$i5, (imm:{ *:[i32] }):$i6, (imm:{ *:[i32] }):$i7, (imm:{ *:[i32] }):$i8, (imm:{ *:[i32] }):$i9, (imm:{ *:[i32] }):$iA, (imm:{ *:[i32] }):$iB, (imm:{ *:[i32] }):$iC, (imm:{ *:[i32] }):$iD, (imm:{ *:[i32] }):$iE, (imm:{ *:[i32] }):$iF)
4969 /* 14638 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I8x16),
4970 /* 14641 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4971 /* 14643 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
4972 /* 14646 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
4973 /* 14649 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
4974 /* 14652 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
4975 /* 14655 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/5, // i4
4976 /* 14658 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/6, // i5
4977 /* 14661 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/7, // i6
4978 /* 14664 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/8, // i7
4979 /* 14667 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/9, // i8
4980 /* 14670 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/10, // i9
4981 /* 14673 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/11, // iA
4982 /* 14676 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/12, // iB
4983 /* 14679 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/13, // iC
4984 /* 14682 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/14, // iD
4985 /* 14685 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/15, // iE
4986 /* 14688 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/16, // iF
4987 /* 14691 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4988 /* 14694 */ GIR_RootConstrainSelectedInstOperands,
4989 /* 14695 */ // GIR_Coverage, 173,
4990 /* 14695 */ GIR_EraseRootFromParent_Done,
4991 /* 14696 */ // Label 354: @14696
4992 /* 14696 */ GIM_Reject,
4993 /* 14697 */ // Label 13: @14697
4994 /* 14697 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(12), /*)*//*default:*//*Label 361*/ GIMT_Encode4(16158),
4995 /* 14708 */ /*GILLT_s32*//*Label 355*/ GIMT_Encode4(14756),
4996 /* 14712 */ /*GILLT_s64*//*Label 356*/ GIMT_Encode4(14818), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
4997 /* 14740 */ /*GILLT_v16s8*//*Label 357*/ GIMT_Encode4(14880),
4998 /* 14744 */ /*GILLT_v8s16*//*Label 358*/ GIMT_Encode4(15057),
4999 /* 14748 */ /*GILLT_v4s32*//*Label 359*/ GIMT_Encode4(15424),
5000 /* 14752 */ /*GILLT_v2s64*//*Label 360*/ GIMT_Encode4(15791),
5001 /* 14756 */ // Label 355: @14756
5002 /* 14756 */ GIM_Try, /*On fail goto*//*Label 362*/ GIMT_Encode4(14817),
5003 /* 14761 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
5004 /* 14764 */ GIM_Try, /*On fail goto*//*Label 363*/ GIMT_Encode4(14790), // Rule ID 60 //
5005 /* 14769 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5006 /* 14773 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5007 /* 14777 */ // (bitconvert:{ *:[i32] } F32:{ *:[f32] }:$src) => (I32_REINTERPRET_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
5008 /* 14777 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_REINTERPRET_F32),
5009 /* 14782 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5010 /* 14788 */ GIR_RootConstrainSelectedInstOperands,
5011 /* 14789 */ // GIR_Coverage, 60,
5012 /* 14789 */ GIR_Done,
5013 /* 14790 */ // Label 363: @14790
5014 /* 14790 */ GIM_Try, /*On fail goto*//*Label 364*/ GIMT_Encode4(14816), // Rule ID 61 //
5015 /* 14795 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5016 /* 14799 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5017 /* 14803 */ // (bitconvert:{ *:[f32] } I32:{ *:[i32] }:$src) => (F32_REINTERPRET_I32:{ *:[f32] } I32:{ *:[i32] }:$src)
5018 /* 14803 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_REINTERPRET_I32),
5019 /* 14808 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5020 /* 14814 */ GIR_RootConstrainSelectedInstOperands,
5021 /* 14815 */ // GIR_Coverage, 61,
5022 /* 14815 */ GIR_Done,
5023 /* 14816 */ // Label 364: @14816
5024 /* 14816 */ GIM_Reject,
5025 /* 14817 */ // Label 362: @14817
5026 /* 14817 */ GIM_Reject,
5027 /* 14818 */ // Label 356: @14818
5028 /* 14818 */ GIM_Try, /*On fail goto*//*Label 365*/ GIMT_Encode4(14879),
5029 /* 14823 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
5030 /* 14826 */ GIM_Try, /*On fail goto*//*Label 366*/ GIMT_Encode4(14852), // Rule ID 62 //
5031 /* 14831 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
5032 /* 14835 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5033 /* 14839 */ // (bitconvert:{ *:[i64] } F64:{ *:[f64] }:$src) => (I64_REINTERPRET_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
5034 /* 14839 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_REINTERPRET_F64),
5035 /* 14844 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5036 /* 14850 */ GIR_RootConstrainSelectedInstOperands,
5037 /* 14851 */ // GIR_Coverage, 62,
5038 /* 14851 */ GIR_Done,
5039 /* 14852 */ // Label 366: @14852
5040 /* 14852 */ GIM_Try, /*On fail goto*//*Label 367*/ GIMT_Encode4(14878), // Rule ID 63 //
5041 /* 14857 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5042 /* 14861 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
5043 /* 14865 */ // (bitconvert:{ *:[f64] } I64:{ *:[i64] }:$src) => (F64_REINTERPRET_I64:{ *:[f64] } I64:{ *:[i64] }:$src)
5044 /* 14865 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_REINTERPRET_I64),
5045 /* 14870 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5046 /* 14876 */ GIR_RootConstrainSelectedInstOperands,
5047 /* 14877 */ // GIR_Coverage, 63,
5048 /* 14877 */ GIR_Done,
5049 /* 14878 */ // Label 367: @14878
5050 /* 14878 */ GIM_Reject,
5051 /* 14879 */ // Label 365: @14879
5052 /* 14879 */ GIM_Reject,
5053 /* 14880 */ // Label 357: @14880
5054 /* 14880 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(9), GIMT_Encode2(12), /*)*//*default:*//*Label 371*/ GIMT_Encode4(15056),
5055 /* 14891 */ /*GILLT_v8s16*//*Label 368*/ GIMT_Encode4(14903),
5056 /* 14895 */ /*GILLT_v4s32*//*Label 369*/ GIMT_Encode4(14954),
5057 /* 14899 */ /*GILLT_v2s64*//*Label 370*/ GIMT_Encode4(15005),
5058 /* 14903 */ // Label 368: @14903
5059 /* 14903 */ GIM_Try, /*On fail goto*//*Label 372*/ GIMT_Encode4(14953),
5060 /* 14908 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5061 /* 14912 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5062 /* 14916 */ GIM_Try, /*On fail goto*//*Label 373*/ GIMT_Encode4(14934), // Rule ID 1196 //
5063 /* 14921 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v16i8] }:$v
5064 /* 14921 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5065 /* 14924 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5066 /* 14926 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5067 /* 14928 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5068 /* 14933 */ // GIR_Coverage, 1196,
5069 /* 14933 */ GIR_EraseRootFromParent_Done,
5070 /* 14934 */ // Label 373: @14934
5071 /* 14934 */ GIM_Try, /*On fail goto*//*Label 374*/ GIMT_Encode4(14952), // Rule ID 1201 //
5072 /* 14939 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v16i8] }:$v
5073 /* 14939 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5074 /* 14942 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5075 /* 14944 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5076 /* 14946 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5077 /* 14951 */ // GIR_Coverage, 1201,
5078 /* 14951 */ GIR_EraseRootFromParent_Done,
5079 /* 14952 */ // Label 374: @14952
5080 /* 14952 */ GIM_Reject,
5081 /* 14953 */ // Label 372: @14953
5082 /* 14953 */ GIM_Reject,
5083 /* 14954 */ // Label 369: @14954
5084 /* 14954 */ GIM_Try, /*On fail goto*//*Label 375*/ GIMT_Encode4(15004),
5085 /* 14959 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5086 /* 14963 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5087 /* 14967 */ GIM_Try, /*On fail goto*//*Label 376*/ GIMT_Encode4(14985), // Rule ID 1197 //
5088 /* 14972 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v16i8] }:$v
5089 /* 14972 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5090 /* 14975 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5091 /* 14977 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5092 /* 14979 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5093 /* 14984 */ // GIR_Coverage, 1197,
5094 /* 14984 */ GIR_EraseRootFromParent_Done,
5095 /* 14985 */ // Label 376: @14985
5096 /* 14985 */ GIM_Try, /*On fail goto*//*Label 377*/ GIMT_Encode4(15003), // Rule ID 1199 //
5097 /* 14990 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v16i8] }:$v
5098 /* 14990 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5099 /* 14993 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5100 /* 14995 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5101 /* 14997 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5102 /* 15002 */ // GIR_Coverage, 1199,
5103 /* 15002 */ GIR_EraseRootFromParent_Done,
5104 /* 15003 */ // Label 377: @15003
5105 /* 15003 */ GIM_Reject,
5106 /* 15004 */ // Label 375: @15004
5107 /* 15004 */ GIM_Reject,
5108 /* 15005 */ // Label 370: @15005
5109 /* 15005 */ GIM_Try, /*On fail goto*//*Label 378*/ GIMT_Encode4(15055),
5110 /* 15010 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5111 /* 15014 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5112 /* 15018 */ GIM_Try, /*On fail goto*//*Label 379*/ GIMT_Encode4(15036), // Rule ID 1198 //
5113 /* 15023 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v16i8] }:$v
5114 /* 15023 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5115 /* 15026 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5116 /* 15028 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5117 /* 15030 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5118 /* 15035 */ // GIR_Coverage, 1198,
5119 /* 15035 */ GIR_EraseRootFromParent_Done,
5120 /* 15036 */ // Label 379: @15036
5121 /* 15036 */ GIM_Try, /*On fail goto*//*Label 380*/ GIMT_Encode4(15054), // Rule ID 1200 //
5122 /* 15041 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v16i8] }:$v
5123 /* 15041 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5124 /* 15044 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5125 /* 15046 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5126 /* 15048 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5127 /* 15053 */ // GIR_Coverage, 1200,
5128 /* 15053 */ GIR_EraseRootFromParent_Done,
5129 /* 15054 */ // Label 380: @15054
5130 /* 15054 */ GIM_Reject,
5131 /* 15055 */ // Label 378: @15055
5132 /* 15055 */ GIM_Reject,
5133 /* 15056 */ // Label 371: @15056
5134 /* 15056 */ GIM_Reject,
5135 /* 15057 */ // Label 358: @15057
5136 /* 15057 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(8), GIMT_Encode2(12), /*)*//*default:*//*Label 385*/ GIMT_Encode4(15240),
5137 /* 15068 */ /*GILLT_v16s8*//*Label 381*/ GIMT_Encode4(15084),
5138 /* 15072 */ /*GILLT_v8s16*//*Label 382*/ GIMT_Encode4(15111),
5139 /* 15076 */ /*GILLT_v4s32*//*Label 383*/ GIMT_Encode4(15138),
5140 /* 15080 */ /*GILLT_v2s64*//*Label 384*/ GIMT_Encode4(15189),
5141 /* 15084 */ // Label 381: @15084
5142 /* 15084 */ GIM_Try, /*On fail goto*//*Label 386*/ GIMT_Encode4(15110), // Rule ID 1202 //
5143 /* 15089 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5144 /* 15093 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5145 /* 15097 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v8i16] }:$v
5146 /* 15097 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5147 /* 15100 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5148 /* 15102 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5149 /* 15104 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5150 /* 15109 */ // GIR_Coverage, 1202,
5151 /* 15109 */ GIR_EraseRootFromParent_Done,
5152 /* 15110 */ // Label 386: @15110
5153 /* 15110 */ GIM_Reject,
5154 /* 15111 */ // Label 382: @15111
5155 /* 15111 */ GIM_Try, /*On fail goto*//*Label 387*/ GIMT_Encode4(15137), // Rule ID 1207 //
5156 /* 15116 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5157 /* 15120 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5158 /* 15124 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v8i16] }:$v
5159 /* 15124 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5160 /* 15127 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5161 /* 15129 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5162 /* 15131 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5163 /* 15136 */ // GIR_Coverage, 1207,
5164 /* 15136 */ GIR_EraseRootFromParent_Done,
5165 /* 15137 */ // Label 387: @15137
5166 /* 15137 */ GIM_Reject,
5167 /* 15138 */ // Label 383: @15138
5168 /* 15138 */ GIM_Try, /*On fail goto*//*Label 388*/ GIMT_Encode4(15188),
5169 /* 15143 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5170 /* 15147 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5171 /* 15151 */ GIM_Try, /*On fail goto*//*Label 389*/ GIMT_Encode4(15169), // Rule ID 1203 //
5172 /* 15156 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v8i16] }:$v
5173 /* 15156 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5174 /* 15159 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5175 /* 15161 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5176 /* 15163 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5177 /* 15168 */ // GIR_Coverage, 1203,
5178 /* 15168 */ GIR_EraseRootFromParent_Done,
5179 /* 15169 */ // Label 389: @15169
5180 /* 15169 */ GIM_Try, /*On fail goto*//*Label 390*/ GIMT_Encode4(15187), // Rule ID 1205 //
5181 /* 15174 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v8i16] }:$v
5182 /* 15174 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5183 /* 15177 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5184 /* 15179 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5185 /* 15181 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5186 /* 15186 */ // GIR_Coverage, 1205,
5187 /* 15186 */ GIR_EraseRootFromParent_Done,
5188 /* 15187 */ // Label 390: @15187
5189 /* 15187 */ GIM_Reject,
5190 /* 15188 */ // Label 388: @15188
5191 /* 15188 */ GIM_Reject,
5192 /* 15189 */ // Label 384: @15189
5193 /* 15189 */ GIM_Try, /*On fail goto*//*Label 391*/ GIMT_Encode4(15239),
5194 /* 15194 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5195 /* 15198 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5196 /* 15202 */ GIM_Try, /*On fail goto*//*Label 392*/ GIMT_Encode4(15220), // Rule ID 1204 //
5197 /* 15207 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v8i16] }:$v
5198 /* 15207 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5199 /* 15210 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5200 /* 15212 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5201 /* 15214 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5202 /* 15219 */ // GIR_Coverage, 1204,
5203 /* 15219 */ GIR_EraseRootFromParent_Done,
5204 /* 15220 */ // Label 392: @15220
5205 /* 15220 */ GIM_Try, /*On fail goto*//*Label 393*/ GIMT_Encode4(15238), // Rule ID 1206 //
5206 /* 15225 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v8i16] }:$v
5207 /* 15225 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5208 /* 15228 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5209 /* 15230 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5210 /* 15232 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5211 /* 15237 */ // GIR_Coverage, 1206,
5212 /* 15237 */ GIR_EraseRootFromParent_Done,
5213 /* 15238 */ // Label 393: @15238
5214 /* 15238 */ GIM_Reject,
5215 /* 15239 */ // Label 391: @15239
5216 /* 15239 */ GIM_Reject,
5217 /* 15240 */ // Label 385: @15240
5218 /* 15240 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(8), GIMT_Encode2(12), /*)*//*default:*//*Label 398*/ GIMT_Encode4(15423),
5219 /* 15251 */ /*GILLT_v16s8*//*Label 394*/ GIMT_Encode4(15267),
5220 /* 15255 */ /*GILLT_v8s16*//*Label 395*/ GIMT_Encode4(15294),
5221 /* 15259 */ /*GILLT_v4s32*//*Label 396*/ GIMT_Encode4(15321),
5222 /* 15263 */ /*GILLT_v2s64*//*Label 397*/ GIMT_Encode4(15372),
5223 /* 15267 */ // Label 394: @15267
5224 /* 15267 */ GIM_Try, /*On fail goto*//*Label 399*/ GIMT_Encode4(15293), // Rule ID 1232 //
5225 /* 15272 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5226 /* 15276 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5227 /* 15280 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v8f16] }:$v
5228 /* 15280 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5229 /* 15283 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5230 /* 15285 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5231 /* 15287 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5232 /* 15292 */ // GIR_Coverage, 1232,
5233 /* 15292 */ GIR_EraseRootFromParent_Done,
5234 /* 15293 */ // Label 399: @15293
5235 /* 15293 */ GIM_Reject,
5236 /* 15294 */ // Label 395: @15294
5237 /* 15294 */ GIM_Try, /*On fail goto*//*Label 400*/ GIMT_Encode4(15320), // Rule ID 1233 //
5238 /* 15299 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5239 /* 15303 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5240 /* 15307 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v8f16] }:$v
5241 /* 15307 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5242 /* 15310 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5243 /* 15312 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5244 /* 15314 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5245 /* 15319 */ // GIR_Coverage, 1233,
5246 /* 15319 */ GIR_EraseRootFromParent_Done,
5247 /* 15320 */ // Label 400: @15320
5248 /* 15320 */ GIM_Reject,
5249 /* 15321 */ // Label 396: @15321
5250 /* 15321 */ GIM_Try, /*On fail goto*//*Label 401*/ GIMT_Encode4(15371),
5251 /* 15326 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5252 /* 15330 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5253 /* 15334 */ GIM_Try, /*On fail goto*//*Label 402*/ GIMT_Encode4(15352), // Rule ID 1234 //
5254 /* 15339 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v8f16] }:$v
5255 /* 15339 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5256 /* 15342 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5257 /* 15344 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5258 /* 15346 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5259 /* 15351 */ // GIR_Coverage, 1234,
5260 /* 15351 */ GIR_EraseRootFromParent_Done,
5261 /* 15352 */ // Label 402: @15352
5262 /* 15352 */ GIM_Try, /*On fail goto*//*Label 403*/ GIMT_Encode4(15370), // Rule ID 1236 //
5263 /* 15357 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v8f16] }:$v
5264 /* 15357 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5265 /* 15360 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5266 /* 15362 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5267 /* 15364 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5268 /* 15369 */ // GIR_Coverage, 1236,
5269 /* 15369 */ GIR_EraseRootFromParent_Done,
5270 /* 15370 */ // Label 403: @15370
5271 /* 15370 */ GIM_Reject,
5272 /* 15371 */ // Label 401: @15371
5273 /* 15371 */ GIM_Reject,
5274 /* 15372 */ // Label 397: @15372
5275 /* 15372 */ GIM_Try, /*On fail goto*//*Label 404*/ GIMT_Encode4(15422),
5276 /* 15377 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5277 /* 15381 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5278 /* 15385 */ GIM_Try, /*On fail goto*//*Label 405*/ GIMT_Encode4(15403), // Rule ID 1235 //
5279 /* 15390 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v8f16] }:$v
5280 /* 15390 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5281 /* 15393 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5282 /* 15395 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5283 /* 15397 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5284 /* 15402 */ // GIR_Coverage, 1235,
5285 /* 15402 */ GIR_EraseRootFromParent_Done,
5286 /* 15403 */ // Label 405: @15403
5287 /* 15403 */ GIM_Try, /*On fail goto*//*Label 406*/ GIMT_Encode4(15421), // Rule ID 1237 //
5288 /* 15408 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v8f16] }:$v
5289 /* 15408 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5290 /* 15411 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5291 /* 15413 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5292 /* 15415 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5293 /* 15420 */ // GIR_Coverage, 1237,
5294 /* 15420 */ GIR_EraseRootFromParent_Done,
5295 /* 15421 */ // Label 406: @15421
5296 /* 15421 */ GIM_Reject,
5297 /* 15422 */ // Label 404: @15422
5298 /* 15422 */ GIM_Reject,
5299 /* 15423 */ // Label 398: @15423
5300 /* 15423 */ GIM_Reject,
5301 /* 15424 */ // Label 359: @15424
5302 /* 15424 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(8), GIMT_Encode2(12), /*)*//*default:*//*Label 411*/ GIMT_Encode4(15607),
5303 /* 15435 */ /*GILLT_v16s8*//*Label 407*/ GIMT_Encode4(15451),
5304 /* 15439 */ /*GILLT_v8s16*//*Label 408*/ GIMT_Encode4(15478),
5305 /* 15443 */ /*GILLT_v4s32*//*Label 409*/ GIMT_Encode4(15529),
5306 /* 15447 */ /*GILLT_v2s64*//*Label 410*/ GIMT_Encode4(15556),
5307 /* 15451 */ // Label 407: @15451
5308 /* 15451 */ GIM_Try, /*On fail goto*//*Label 412*/ GIMT_Encode4(15477), // Rule ID 1208 //
5309 /* 15456 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5310 /* 15460 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5311 /* 15464 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v4i32] }:$v
5312 /* 15464 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5313 /* 15467 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5314 /* 15469 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5315 /* 15471 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5316 /* 15476 */ // GIR_Coverage, 1208,
5317 /* 15476 */ GIR_EraseRootFromParent_Done,
5318 /* 15477 */ // Label 412: @15477
5319 /* 15477 */ GIM_Reject,
5320 /* 15478 */ // Label 408: @15478
5321 /* 15478 */ GIM_Try, /*On fail goto*//*Label 413*/ GIMT_Encode4(15528),
5322 /* 15483 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5323 /* 15487 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5324 /* 15491 */ GIM_Try, /*On fail goto*//*Label 414*/ GIMT_Encode4(15509), // Rule ID 1209 //
5325 /* 15496 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v4i32] }:$v
5326 /* 15496 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5327 /* 15499 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5328 /* 15501 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5329 /* 15503 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5330 /* 15508 */ // GIR_Coverage, 1209,
5331 /* 15508 */ GIR_EraseRootFromParent_Done,
5332 /* 15509 */ // Label 414: @15509
5333 /* 15509 */ GIM_Try, /*On fail goto*//*Label 415*/ GIMT_Encode4(15527), // Rule ID 1213 //
5334 /* 15514 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v4i32] }:$v
5335 /* 15514 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5336 /* 15517 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5337 /* 15519 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5338 /* 15521 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5339 /* 15526 */ // GIR_Coverage, 1213,
5340 /* 15526 */ GIR_EraseRootFromParent_Done,
5341 /* 15527 */ // Label 415: @15527
5342 /* 15527 */ GIM_Reject,
5343 /* 15528 */ // Label 413: @15528
5344 /* 15528 */ GIM_Reject,
5345 /* 15529 */ // Label 409: @15529
5346 /* 15529 */ GIM_Try, /*On fail goto*//*Label 416*/ GIMT_Encode4(15555), // Rule ID 1211 //
5347 /* 15534 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5348 /* 15538 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5349 /* 15542 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v4i32] }:$v
5350 /* 15542 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5351 /* 15545 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5352 /* 15547 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5353 /* 15549 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5354 /* 15554 */ // GIR_Coverage, 1211,
5355 /* 15554 */ GIR_EraseRootFromParent_Done,
5356 /* 15555 */ // Label 416: @15555
5357 /* 15555 */ GIM_Reject,
5358 /* 15556 */ // Label 410: @15556
5359 /* 15556 */ GIM_Try, /*On fail goto*//*Label 417*/ GIMT_Encode4(15606),
5360 /* 15561 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5361 /* 15565 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5362 /* 15569 */ GIM_Try, /*On fail goto*//*Label 418*/ GIMT_Encode4(15587), // Rule ID 1210 //
5363 /* 15574 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v4i32] }:$v
5364 /* 15574 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5365 /* 15577 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5366 /* 15579 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5367 /* 15581 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5368 /* 15586 */ // GIR_Coverage, 1210,
5369 /* 15586 */ GIR_EraseRootFromParent_Done,
5370 /* 15587 */ // Label 418: @15587
5371 /* 15587 */ GIM_Try, /*On fail goto*//*Label 419*/ GIMT_Encode4(15605), // Rule ID 1212 //
5372 /* 15592 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v4i32] }:$v
5373 /* 15592 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5374 /* 15595 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5375 /* 15597 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5376 /* 15599 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5377 /* 15604 */ // GIR_Coverage, 1212,
5378 /* 15604 */ GIR_EraseRootFromParent_Done,
5379 /* 15605 */ // Label 419: @15605
5380 /* 15605 */ GIM_Reject,
5381 /* 15606 */ // Label 417: @15606
5382 /* 15606 */ GIM_Reject,
5383 /* 15607 */ // Label 411: @15607
5384 /* 15607 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(8), GIMT_Encode2(12), /*)*//*default:*//*Label 424*/ GIMT_Encode4(15790),
5385 /* 15618 */ /*GILLT_v16s8*//*Label 420*/ GIMT_Encode4(15634),
5386 /* 15622 */ /*GILLT_v8s16*//*Label 421*/ GIMT_Encode4(15661),
5387 /* 15626 */ /*GILLT_v4s32*//*Label 422*/ GIMT_Encode4(15712),
5388 /* 15630 */ /*GILLT_v2s64*//*Label 423*/ GIMT_Encode4(15739),
5389 /* 15634 */ // Label 420: @15634
5390 /* 15634 */ GIM_Try, /*On fail goto*//*Label 425*/ GIMT_Encode4(15660), // Rule ID 1220 //
5391 /* 15639 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5392 /* 15643 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5393 /* 15647 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v4f32] }:$v
5394 /* 15647 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5395 /* 15650 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5396 /* 15652 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5397 /* 15654 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5398 /* 15659 */ // GIR_Coverage, 1220,
5399 /* 15659 */ GIR_EraseRootFromParent_Done,
5400 /* 15660 */ // Label 425: @15660
5401 /* 15660 */ GIM_Reject,
5402 /* 15661 */ // Label 421: @15661
5403 /* 15661 */ GIM_Try, /*On fail goto*//*Label 426*/ GIMT_Encode4(15711),
5404 /* 15666 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5405 /* 15670 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5406 /* 15674 */ GIM_Try, /*On fail goto*//*Label 427*/ GIMT_Encode4(15692), // Rule ID 1221 //
5407 /* 15679 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v4f32] }:$v
5408 /* 15679 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5409 /* 15682 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5410 /* 15684 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5411 /* 15686 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5412 /* 15691 */ // GIR_Coverage, 1221,
5413 /* 15691 */ GIR_EraseRootFromParent_Done,
5414 /* 15692 */ // Label 427: @15692
5415 /* 15692 */ GIM_Try, /*On fail goto*//*Label 428*/ GIMT_Encode4(15710), // Rule ID 1225 //
5416 /* 15697 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v4f32] }:$v
5417 /* 15697 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5418 /* 15700 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5419 /* 15702 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5420 /* 15704 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5421 /* 15709 */ // GIR_Coverage, 1225,
5422 /* 15709 */ GIR_EraseRootFromParent_Done,
5423 /* 15710 */ // Label 428: @15710
5424 /* 15710 */ GIM_Reject,
5425 /* 15711 */ // Label 426: @15711
5426 /* 15711 */ GIM_Reject,
5427 /* 15712 */ // Label 422: @15712
5428 /* 15712 */ GIM_Try, /*On fail goto*//*Label 429*/ GIMT_Encode4(15738), // Rule ID 1222 //
5429 /* 15717 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5430 /* 15721 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5431 /* 15725 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v4f32] }:$v
5432 /* 15725 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5433 /* 15728 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5434 /* 15730 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5435 /* 15732 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5436 /* 15737 */ // GIR_Coverage, 1222,
5437 /* 15737 */ GIR_EraseRootFromParent_Done,
5438 /* 15738 */ // Label 429: @15738
5439 /* 15738 */ GIM_Reject,
5440 /* 15739 */ // Label 423: @15739
5441 /* 15739 */ GIM_Try, /*On fail goto*//*Label 430*/ GIMT_Encode4(15789),
5442 /* 15744 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5443 /* 15748 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5444 /* 15752 */ GIM_Try, /*On fail goto*//*Label 431*/ GIMT_Encode4(15770), // Rule ID 1223 //
5445 /* 15757 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v4f32] }:$v
5446 /* 15757 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5447 /* 15760 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5448 /* 15762 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5449 /* 15764 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5450 /* 15769 */ // GIR_Coverage, 1223,
5451 /* 15769 */ GIR_EraseRootFromParent_Done,
5452 /* 15770 */ // Label 431: @15770
5453 /* 15770 */ GIM_Try, /*On fail goto*//*Label 432*/ GIMT_Encode4(15788), // Rule ID 1224 //
5454 /* 15775 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v4f32] }:$v
5455 /* 15775 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5456 /* 15778 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5457 /* 15780 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5458 /* 15782 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5459 /* 15787 */ // GIR_Coverage, 1224,
5460 /* 15787 */ GIR_EraseRootFromParent_Done,
5461 /* 15788 */ // Label 432: @15788
5462 /* 15788 */ GIM_Reject,
5463 /* 15789 */ // Label 430: @15789
5464 /* 15789 */ GIM_Reject,
5465 /* 15790 */ // Label 424: @15790
5466 /* 15790 */ GIM_Reject,
5467 /* 15791 */ // Label 360: @15791
5468 /* 15791 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(8), GIMT_Encode2(12), /*)*//*default:*//*Label 437*/ GIMT_Encode4(15974),
5469 /* 15802 */ /*GILLT_v16s8*//*Label 433*/ GIMT_Encode4(15818),
5470 /* 15806 */ /*GILLT_v8s16*//*Label 434*/ GIMT_Encode4(15845),
5471 /* 15810 */ /*GILLT_v4s32*//*Label 435*/ GIMT_Encode4(15896),
5472 /* 15814 */ /*GILLT_v2s64*//*Label 436*/ GIMT_Encode4(15947),
5473 /* 15818 */ // Label 433: @15818
5474 /* 15818 */ GIM_Try, /*On fail goto*//*Label 438*/ GIMT_Encode4(15844), // Rule ID 1214 //
5475 /* 15823 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5476 /* 15827 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5477 /* 15831 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v2i64] }:$v
5478 /* 15831 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5479 /* 15834 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5480 /* 15836 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5481 /* 15838 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5482 /* 15843 */ // GIR_Coverage, 1214,
5483 /* 15843 */ GIR_EraseRootFromParent_Done,
5484 /* 15844 */ // Label 438: @15844
5485 /* 15844 */ GIM_Reject,
5486 /* 15845 */ // Label 434: @15845
5487 /* 15845 */ GIM_Try, /*On fail goto*//*Label 439*/ GIMT_Encode4(15895),
5488 /* 15850 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5489 /* 15854 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5490 /* 15858 */ GIM_Try, /*On fail goto*//*Label 440*/ GIMT_Encode4(15876), // Rule ID 1215 //
5491 /* 15863 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v2i64] }:$v
5492 /* 15863 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5493 /* 15866 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5494 /* 15868 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5495 /* 15870 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5496 /* 15875 */ // GIR_Coverage, 1215,
5497 /* 15875 */ GIR_EraseRootFromParent_Done,
5498 /* 15876 */ // Label 440: @15876
5499 /* 15876 */ GIM_Try, /*On fail goto*//*Label 441*/ GIMT_Encode4(15894), // Rule ID 1219 //
5500 /* 15881 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v2i64] }:$v
5501 /* 15881 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5502 /* 15884 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5503 /* 15886 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5504 /* 15888 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5505 /* 15893 */ // GIR_Coverage, 1219,
5506 /* 15893 */ GIR_EraseRootFromParent_Done,
5507 /* 15894 */ // Label 441: @15894
5508 /* 15894 */ GIM_Reject,
5509 /* 15895 */ // Label 439: @15895
5510 /* 15895 */ GIM_Reject,
5511 /* 15896 */ // Label 435: @15896
5512 /* 15896 */ GIM_Try, /*On fail goto*//*Label 442*/ GIMT_Encode4(15946),
5513 /* 15901 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5514 /* 15905 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5515 /* 15909 */ GIM_Try, /*On fail goto*//*Label 443*/ GIMT_Encode4(15927), // Rule ID 1216 //
5516 /* 15914 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v2i64] }:$v
5517 /* 15914 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5518 /* 15917 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5519 /* 15919 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5520 /* 15921 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5521 /* 15926 */ // GIR_Coverage, 1216,
5522 /* 15926 */ GIR_EraseRootFromParent_Done,
5523 /* 15927 */ // Label 443: @15927
5524 /* 15927 */ GIM_Try, /*On fail goto*//*Label 444*/ GIMT_Encode4(15945), // Rule ID 1217 //
5525 /* 15932 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v2i64] }:$v
5526 /* 15932 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5527 /* 15935 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5528 /* 15937 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5529 /* 15939 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5530 /* 15944 */ // GIR_Coverage, 1217,
5531 /* 15944 */ GIR_EraseRootFromParent_Done,
5532 /* 15945 */ // Label 444: @15945
5533 /* 15945 */ GIM_Reject,
5534 /* 15946 */ // Label 442: @15946
5535 /* 15946 */ GIM_Reject,
5536 /* 15947 */ // Label 436: @15947
5537 /* 15947 */ GIM_Try, /*On fail goto*//*Label 445*/ GIMT_Encode4(15973), // Rule ID 1218 //
5538 /* 15952 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5539 /* 15956 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5540 /* 15960 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v2i64] }:$v
5541 /* 15960 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5542 /* 15963 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5543 /* 15965 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5544 /* 15967 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5545 /* 15972 */ // GIR_Coverage, 1218,
5546 /* 15972 */ GIR_EraseRootFromParent_Done,
5547 /* 15973 */ // Label 445: @15973
5548 /* 15973 */ GIM_Reject,
5549 /* 15974 */ // Label 437: @15974
5550 /* 15974 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(8), GIMT_Encode2(12), /*)*//*default:*//*Label 450*/ GIMT_Encode4(16157),
5551 /* 15985 */ /*GILLT_v16s8*//*Label 446*/ GIMT_Encode4(16001),
5552 /* 15989 */ /*GILLT_v8s16*//*Label 447*/ GIMT_Encode4(16028),
5553 /* 15993 */ /*GILLT_v4s32*//*Label 448*/ GIMT_Encode4(16079),
5554 /* 15997 */ /*GILLT_v2s64*//*Label 449*/ GIMT_Encode4(16130),
5555 /* 16001 */ // Label 446: @16001
5556 /* 16001 */ GIM_Try, /*On fail goto*//*Label 451*/ GIMT_Encode4(16027), // Rule ID 1226 //
5557 /* 16006 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5558 /* 16010 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5559 /* 16014 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v2f64] }:$v
5560 /* 16014 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5561 /* 16017 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5562 /* 16019 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5563 /* 16021 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5564 /* 16026 */ // GIR_Coverage, 1226,
5565 /* 16026 */ GIR_EraseRootFromParent_Done,
5566 /* 16027 */ // Label 451: @16027
5567 /* 16027 */ GIM_Reject,
5568 /* 16028 */ // Label 447: @16028
5569 /* 16028 */ GIM_Try, /*On fail goto*//*Label 452*/ GIMT_Encode4(16078),
5570 /* 16033 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5571 /* 16037 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5572 /* 16041 */ GIM_Try, /*On fail goto*//*Label 453*/ GIMT_Encode4(16059), // Rule ID 1227 //
5573 /* 16046 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v2f64] }:$v
5574 /* 16046 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5575 /* 16049 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5576 /* 16051 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5577 /* 16053 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5578 /* 16058 */ // GIR_Coverage, 1227,
5579 /* 16058 */ GIR_EraseRootFromParent_Done,
5580 /* 16059 */ // Label 453: @16059
5581 /* 16059 */ GIM_Try, /*On fail goto*//*Label 454*/ GIMT_Encode4(16077), // Rule ID 1231 //
5582 /* 16064 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v2f64] }:$v
5583 /* 16064 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5584 /* 16067 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5585 /* 16069 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5586 /* 16071 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5587 /* 16076 */ // GIR_Coverage, 1231,
5588 /* 16076 */ GIR_EraseRootFromParent_Done,
5589 /* 16077 */ // Label 454: @16077
5590 /* 16077 */ GIM_Reject,
5591 /* 16078 */ // Label 452: @16078
5592 /* 16078 */ GIM_Reject,
5593 /* 16079 */ // Label 448: @16079
5594 /* 16079 */ GIM_Try, /*On fail goto*//*Label 455*/ GIMT_Encode4(16129),
5595 /* 16084 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5596 /* 16088 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5597 /* 16092 */ GIM_Try, /*On fail goto*//*Label 456*/ GIMT_Encode4(16110), // Rule ID 1228 //
5598 /* 16097 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v2f64] }:$v
5599 /* 16097 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5600 /* 16100 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5601 /* 16102 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5602 /* 16104 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5603 /* 16109 */ // GIR_Coverage, 1228,
5604 /* 16109 */ GIR_EraseRootFromParent_Done,
5605 /* 16110 */ // Label 456: @16110
5606 /* 16110 */ GIM_Try, /*On fail goto*//*Label 457*/ GIMT_Encode4(16128), // Rule ID 1230 //
5607 /* 16115 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v2f64] }:$v
5608 /* 16115 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5609 /* 16118 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5610 /* 16120 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5611 /* 16122 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5612 /* 16127 */ // GIR_Coverage, 1230,
5613 /* 16127 */ GIR_EraseRootFromParent_Done,
5614 /* 16128 */ // Label 457: @16128
5615 /* 16128 */ GIM_Reject,
5616 /* 16129 */ // Label 455: @16129
5617 /* 16129 */ GIM_Reject,
5618 /* 16130 */ // Label 449: @16130
5619 /* 16130 */ GIM_Try, /*On fail goto*//*Label 458*/ GIMT_Encode4(16156), // Rule ID 1229 //
5620 /* 16135 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5621 /* 16139 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5622 /* 16143 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v2f64] }:$v
5623 /* 16143 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5624 /* 16146 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5625 /* 16148 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5626 /* 16150 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5627 /* 16155 */ // GIR_Coverage, 1229,
5628 /* 16155 */ GIR_EraseRootFromParent_Done,
5629 /* 16156 */ // Label 458: @16156
5630 /* 16156 */ GIM_Reject,
5631 /* 16157 */ // Label 450: @16157
5632 /* 16157 */ GIM_Reject,
5633 /* 16158 */ // Label 361: @16158
5634 /* 16158 */ GIM_Reject,
5635 /* 16159 */ // Label 14: @16159
5636 /* 16159 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 464*/ GIMT_Encode4(16386),
5637 /* 16170 */ /*GILLT_f32*//*Label 459*/ GIMT_Encode4(16230),
5638 /* 16174 */ /*GILLT_f64*//*Label 460*/ GIMT_Encode4(16260), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
5639 /* 16218 */ /*GILLT_v8f16*//*Label 461*/ GIMT_Encode4(16290),
5640 /* 16222 */ /*GILLT_v4f32*//*Label 462*/ GIMT_Encode4(16322),
5641 /* 16226 */ /*GILLT_v2f64*//*Label 463*/ GIMT_Encode4(16354),
5642 /* 16230 */ // Label 459: @16230
5643 /* 16230 */ GIM_Try, /*On fail goto*//*Label 465*/ GIMT_Encode4(16259), // Rule ID 148 //
5644 /* 16235 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
5645 /* 16238 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5646 /* 16242 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5647 /* 16246 */ // (ftrunc:{ *:[f32] } F32:{ *:[f32] }:$src) => (TRUNC_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
5648 /* 16246 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F32),
5649 /* 16251 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5650 /* 16257 */ GIR_RootConstrainSelectedInstOperands,
5651 /* 16258 */ // GIR_Coverage, 148,
5652 /* 16258 */ GIR_Done,
5653 /* 16259 */ // Label 465: @16259
5654 /* 16259 */ GIM_Reject,
5655 /* 16260 */ // Label 460: @16260
5656 /* 16260 */ GIM_Try, /*On fail goto*//*Label 466*/ GIMT_Encode4(16289), // Rule ID 149 //
5657 /* 16265 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
5658 /* 16268 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5659 /* 16272 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5660 /* 16276 */ // (ftrunc:{ *:[f64] } F64:{ *:[f64] }:$src) => (TRUNC_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
5661 /* 16276 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F64),
5662 /* 16281 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5663 /* 16287 */ GIR_RootConstrainSelectedInstOperands,
5664 /* 16288 */ // GIR_Coverage, 149,
5665 /* 16288 */ GIR_Done,
5666 /* 16289 */ // Label 466: @16289
5667 /* 16289 */ GIM_Reject,
5668 /* 16290 */ // Label 461: @16290
5669 /* 16290 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 467*/ GIMT_Encode4(16321), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 343 //
5670 /* 16297 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
5671 /* 16300 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5672 /* 16304 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5673 /* 16308 */ // (ftrunc:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (TRUNC_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
5674 /* 16308 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F16x8),
5675 /* 16313 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5676 /* 16319 */ GIR_RootConstrainSelectedInstOperands,
5677 /* 16320 */ // GIR_Coverage, 343,
5678 /* 16320 */ GIR_Done,
5679 /* 16321 */ // Label 467: @16321
5680 /* 16321 */ GIM_Reject,
5681 /* 16322 */ // Label 462: @16322
5682 /* 16322 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 468*/ GIMT_Encode4(16353), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 335 //
5683 /* 16329 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
5684 /* 16332 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5685 /* 16336 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5686 /* 16340 */ // (ftrunc:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (TRUNC_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
5687 /* 16340 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F32x4),
5688 /* 16345 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5689 /* 16351 */ GIR_RootConstrainSelectedInstOperands,
5690 /* 16352 */ // GIR_Coverage, 335,
5691 /* 16352 */ GIR_Done,
5692 /* 16353 */ // Label 468: @16353
5693 /* 16353 */ GIM_Reject,
5694 /* 16354 */ // Label 463: @16354
5695 /* 16354 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 469*/ GIMT_Encode4(16385), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 339 //
5696 /* 16361 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
5697 /* 16364 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5698 /* 16368 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5699 /* 16372 */ // (ftrunc:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (TRUNC_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
5700 /* 16372 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F64x2),
5701 /* 16377 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5702 /* 16383 */ GIR_RootConstrainSelectedInstOperands,
5703 /* 16384 */ // GIR_Coverage, 339,
5704 /* 16384 */ GIR_Done,
5705 /* 16385 */ // Label 469: @16385
5706 /* 16385 */ GIM_Reject,
5707 /* 16386 */ // Label 464: @16386
5708 /* 16386 */ GIM_Reject,
5709 /* 16387 */ // Label 15: @16387
5710 /* 16387 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 475*/ GIMT_Encode4(16600),
5711 /* 16398 */ /*GILLT_f32*//*Label 470*/ GIMT_Encode4(16458),
5712 /* 16402 */ /*GILLT_f64*//*Label 471*/ GIMT_Encode4(16484), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
5713 /* 16446 */ /*GILLT_v8f16*//*Label 472*/ GIMT_Encode4(16510),
5714 /* 16450 */ /*GILLT_v4f32*//*Label 473*/ GIMT_Encode4(16540),
5715 /* 16454 */ /*GILLT_v2f64*//*Label 474*/ GIMT_Encode4(16570),
5716 /* 16458 */ // Label 470: @16458
5717 /* 16458 */ GIM_Try, /*On fail goto*//*Label 476*/ GIMT_Encode4(16483), // Rule ID 639 //
5718 /* 16463 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
5719 /* 16466 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5720 /* 16470 */ // (froundeven:{ *:[f32] } f32:{ *:[f32] }:$src) => (NEAREST_F32:{ *:[f32] } f32:{ *:[f32] }:$src)
5721 /* 16470 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32),
5722 /* 16475 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5723 /* 16481 */ GIR_RootConstrainSelectedInstOperands,
5724 /* 16482 */ // GIR_Coverage, 639,
5725 /* 16482 */ GIR_Done,
5726 /* 16483 */ // Label 476: @16483
5727 /* 16483 */ GIM_Reject,
5728 /* 16484 */ // Label 471: @16484
5729 /* 16484 */ GIM_Try, /*On fail goto*//*Label 477*/ GIMT_Encode4(16509), // Rule ID 640 //
5730 /* 16489 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
5731 /* 16492 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5732 /* 16496 */ // (froundeven:{ *:[f64] } f64:{ *:[f64] }:$src) => (NEAREST_F64:{ *:[f64] } f64:{ *:[f64] }:$src)
5733 /* 16496 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64),
5734 /* 16501 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5735 /* 16507 */ GIR_RootConstrainSelectedInstOperands,
5736 /* 16508 */ // GIR_Coverage, 640,
5737 /* 16508 */ GIR_Done,
5738 /* 16509 */ // Label 477: @16509
5739 /* 16509 */ GIM_Reject,
5740 /* 16510 */ // Label 472: @16510
5741 /* 16510 */ GIM_Try, /*On fail goto*//*Label 478*/ GIMT_Encode4(16539), // Rule ID 1169 //
5742 /* 16515 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
5743 /* 16518 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5744 /* 16522 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5745 /* 16526 */ // (froundeven:{ *:[v8f16] } V128:{ *:[v8f16] }:$src) => (NEAREST_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$src)
5746 /* 16526 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F16x8),
5747 /* 16531 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5748 /* 16537 */ GIR_RootConstrainSelectedInstOperands,
5749 /* 16538 */ // GIR_Coverage, 1169,
5750 /* 16538 */ GIR_Done,
5751 /* 16539 */ // Label 478: @16539
5752 /* 16539 */ GIM_Reject,
5753 /* 16540 */ // Label 473: @16540
5754 /* 16540 */ GIM_Try, /*On fail goto*//*Label 479*/ GIMT_Encode4(16569), // Rule ID 1167 //
5755 /* 16545 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
5756 /* 16548 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5757 /* 16552 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5758 /* 16556 */ // (froundeven:{ *:[v4f32] } V128:{ *:[v4f32] }:$src) => (NEAREST_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$src)
5759 /* 16556 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32x4),
5760 /* 16561 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5761 /* 16567 */ GIR_RootConstrainSelectedInstOperands,
5762 /* 16568 */ // GIR_Coverage, 1167,
5763 /* 16568 */ GIR_Done,
5764 /* 16569 */ // Label 479: @16569
5765 /* 16569 */ GIM_Reject,
5766 /* 16570 */ // Label 474: @16570
5767 /* 16570 */ GIM_Try, /*On fail goto*//*Label 480*/ GIMT_Encode4(16599), // Rule ID 1168 //
5768 /* 16575 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
5769 /* 16578 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5770 /* 16582 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5771 /* 16586 */ // (froundeven:{ *:[v2f64] } V128:{ *:[v2f64] }:$src) => (NEAREST_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$src)
5772 /* 16586 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64x2),
5773 /* 16591 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5774 /* 16597 */ GIR_RootConstrainSelectedInstOperands,
5775 /* 16598 */ // GIR_Coverage, 1168,
5776 /* 16598 */ GIR_Done,
5777 /* 16599 */ // Label 480: @16599
5778 /* 16599 */ GIM_Reject,
5779 /* 16600 */ // Label 475: @16600
5780 /* 16600 */ GIM_Reject,
5781 /* 16601 */ // Label 16: @16601
5782 /* 16601 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(12), /*)*//*default:*//*Label 487*/ GIMT_Encode4(18507),
5783 /* 16612 */ /*GILLT_s32*//*Label 481*/ GIMT_Encode4(16660),
5784 /* 16616 */ /*GILLT_s64*//*Label 482*/ GIMT_Encode4(17104), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
5785 /* 16644 */ /*GILLT_v16s8*//*Label 483*/ GIMT_Encode4(17655),
5786 /* 16648 */ /*GILLT_v8s16*//*Label 484*/ GIMT_Encode4(17763),
5787 /* 16652 */ /*GILLT_v4s32*//*Label 485*/ GIMT_Encode4(17961),
5788 /* 16656 */ /*GILLT_v2s64*//*Label 486*/ GIMT_Encode4(18159),
5789 /* 16660 */ // Label 481: @16660
5790 /* 16660 */ GIM_Try, /*On fail goto*//*Label 488*/ GIMT_Encode4(17103),
5791 /* 16665 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
5792 /* 16668 */ GIM_Try, /*On fail goto*//*Label 489*/ GIMT_Encode4(16892),
5793 /* 16673 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
5794 /* 16677 */ GIM_Try, /*On fail goto*//*Label 490*/ GIMT_Encode4(16784),
5795 /* 16682 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(1),
5796 /* 16689 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5797 /* 16693 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 491*/ GIMT_Encode4(16738), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 558 //
5798 /* 16700 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
5799 /* 16704 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
5800 /* 16711 */ // (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>> => (LOAD8_U_I32_A32:{ *:[i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
5801 /* 16711 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_U_I32_A32),
5802 /* 16714 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5803 /* 16716 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
5804 /* 16719 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
5805 /* 16724 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
5806 /* 16729 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5807 /* 16732 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
5808 /* 16736 */ GIR_RootConstrainSelectedInstOperands,
5809 /* 16737 */ // GIR_Coverage, 558,
5810 /* 16737 */ GIR_EraseRootFromParent_Done,
5811 /* 16738 */ // Label 491: @16738
5812 /* 16738 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 492*/ GIMT_Encode4(16783), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 559 //
5813 /* 16745 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
5814 /* 16749 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
5815 /* 16756 */ // (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>> => (LOAD8_U_I32_A64:{ *:[i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
5816 /* 16756 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_U_I32_A64),
5817 /* 16759 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5818 /* 16761 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
5819 /* 16764 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
5820 /* 16769 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
5821 /* 16774 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5822 /* 16777 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
5823 /* 16781 */ GIR_RootConstrainSelectedInstOperands,
5824 /* 16782 */ // GIR_Coverage, 559,
5825 /* 16782 */ GIR_EraseRootFromParent_Done,
5826 /* 16783 */ // Label 492: @16783
5827 /* 16783 */ GIM_Reject,
5828 /* 16784 */ // Label 490: @16784
5829 /* 16784 */ GIM_Try, /*On fail goto*//*Label 493*/ GIMT_Encode4(16891),
5830 /* 16789 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
5831 /* 16796 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5832 /* 16800 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 494*/ GIMT_Encode4(16845), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 560 //
5833 /* 16807 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
5834 /* 16811 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
5835 /* 16818 */ // (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>> => (LOAD16_U_I32_A32:{ *:[i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
5836 /* 16818 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_U_I32_A32),
5837 /* 16821 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5838 /* 16823 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
5839 /* 16826 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
5840 /* 16831 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
5841 /* 16836 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5842 /* 16839 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
5843 /* 16843 */ GIR_RootConstrainSelectedInstOperands,
5844 /* 16844 */ // GIR_Coverage, 560,
5845 /* 16844 */ GIR_EraseRootFromParent_Done,
5846 /* 16845 */ // Label 494: @16845
5847 /* 16845 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 495*/ GIMT_Encode4(16890), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 561 //
5848 /* 16852 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
5849 /* 16856 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
5850 /* 16863 */ // (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>> => (LOAD16_U_I32_A64:{ *:[i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
5851 /* 16863 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_U_I32_A64),
5852 /* 16866 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5853 /* 16868 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
5854 /* 16871 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
5855 /* 16876 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
5856 /* 16881 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5857 /* 16884 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
5858 /* 16888 */ GIR_RootConstrainSelectedInstOperands,
5859 /* 16889 */ // GIR_Coverage, 561,
5860 /* 16889 */ GIR_EraseRootFromParent_Done,
5861 /* 16890 */ // Label 495: @16890
5862 /* 16890 */ GIM_Reject,
5863 /* 16891 */ // Label 493: @16891
5864 /* 16891 */ GIM_Reject,
5865 /* 16892 */ // Label 489: @16892
5866 /* 16892 */ GIM_Try, /*On fail goto*//*Label 496*/ GIMT_Encode4(17102),
5867 /* 16897 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
5868 /* 16901 */ GIM_Try, /*On fail goto*//*Label 497*/ GIMT_Encode4(17001),
5869 /* 16906 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5870 /* 16910 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 498*/ GIMT_Encode4(16955), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 530 //
5871 /* 16917 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
5872 /* 16921 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
5873 /* 16928 */ // (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_I32_A32:{ *:[i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
5874 /* 16928 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_I32_A32),
5875 /* 16931 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5876 /* 16933 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
5877 /* 16936 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
5878 /* 16941 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
5879 /* 16946 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5880 /* 16949 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
5881 /* 16953 */ GIR_RootConstrainSelectedInstOperands,
5882 /* 16954 */ // GIR_Coverage, 530,
5883 /* 16954 */ GIR_EraseRootFromParent_Done,
5884 /* 16955 */ // Label 498: @16955
5885 /* 16955 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 499*/ GIMT_Encode4(17000), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 531 //
5886 /* 16962 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
5887 /* 16966 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
5888 /* 16973 */ // (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_I32_A64:{ *:[i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
5889 /* 16973 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_I32_A64),
5890 /* 16976 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5891 /* 16978 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
5892 /* 16981 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
5893 /* 16986 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
5894 /* 16991 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5895 /* 16994 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
5896 /* 16998 */ GIR_RootConstrainSelectedInstOperands,
5897 /* 16999 */ // GIR_Coverage, 531,
5898 /* 16999 */ GIR_EraseRootFromParent_Done,
5899 /* 17000 */ // Label 499: @17000
5900 /* 17000 */ GIM_Reject,
5901 /* 17001 */ // Label 497: @17001
5902 /* 17001 */ GIM_Try, /*On fail goto*//*Label 500*/ GIMT_Encode4(17101),
5903 /* 17006 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5904 /* 17010 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 501*/ GIMT_Encode4(17055), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 534 //
5905 /* 17017 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
5906 /* 17021 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
5907 /* 17028 */ // (ld:{ *:[f32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_F32_A32:{ *:[f32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
5908 /* 17028 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_F32_A32),
5909 /* 17031 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5910 /* 17033 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
5911 /* 17036 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
5912 /* 17041 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
5913 /* 17046 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5914 /* 17049 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
5915 /* 17053 */ GIR_RootConstrainSelectedInstOperands,
5916 /* 17054 */ // GIR_Coverage, 534,
5917 /* 17054 */ GIR_EraseRootFromParent_Done,
5918 /* 17055 */ // Label 501: @17055
5919 /* 17055 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 502*/ GIMT_Encode4(17100), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 535 //
5920 /* 17062 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
5921 /* 17066 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
5922 /* 17073 */ // (ld:{ *:[f32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_F32_A64:{ *:[f32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
5923 /* 17073 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_F32_A64),
5924 /* 17076 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5925 /* 17078 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
5926 /* 17081 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
5927 /* 17086 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
5928 /* 17091 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5929 /* 17094 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
5930 /* 17098 */ GIR_RootConstrainSelectedInstOperands,
5931 /* 17099 */ // GIR_Coverage, 535,
5932 /* 17099 */ GIR_EraseRootFromParent_Done,
5933 /* 17100 */ // Label 502: @17100
5934 /* 17100 */ GIM_Reject,
5935 /* 17101 */ // Label 500: @17101
5936 /* 17101 */ GIM_Reject,
5937 /* 17102 */ // Label 496: @17102
5938 /* 17102 */ GIM_Reject,
5939 /* 17103 */ // Label 488: @17103
5940 /* 17103 */ GIM_Reject,
5941 /* 17104 */ // Label 482: @17104
5942 /* 17104 */ GIM_Try, /*On fail goto*//*Label 503*/ GIMT_Encode4(17654),
5943 /* 17109 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
5944 /* 17112 */ GIM_Try, /*On fail goto*//*Label 504*/ GIMT_Encode4(17443),
5945 /* 17117 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
5946 /* 17121 */ GIM_Try, /*On fail goto*//*Label 505*/ GIMT_Encode4(17228),
5947 /* 17126 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(1),
5948 /* 17133 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
5949 /* 17137 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 506*/ GIMT_Encode4(17182), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 562 //
5950 /* 17144 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
5951 /* 17148 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
5952 /* 17155 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>> => (LOAD8_U_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
5953 /* 17155 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_U_I64_A32),
5954 /* 17158 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5955 /* 17160 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
5956 /* 17163 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
5957 /* 17168 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
5958 /* 17173 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5959 /* 17176 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
5960 /* 17180 */ GIR_RootConstrainSelectedInstOperands,
5961 /* 17181 */ // GIR_Coverage, 562,
5962 /* 17181 */ GIR_EraseRootFromParent_Done,
5963 /* 17182 */ // Label 506: @17182
5964 /* 17182 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 507*/ GIMT_Encode4(17227), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 563 //
5965 /* 17189 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
5966 /* 17193 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
5967 /* 17200 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>> => (LOAD8_U_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
5968 /* 17200 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_U_I64_A64),
5969 /* 17203 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5970 /* 17205 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
5971 /* 17208 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
5972 /* 17213 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
5973 /* 17218 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5974 /* 17221 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
5975 /* 17225 */ GIR_RootConstrainSelectedInstOperands,
5976 /* 17226 */ // GIR_Coverage, 563,
5977 /* 17226 */ GIR_EraseRootFromParent_Done,
5978 /* 17227 */ // Label 507: @17227
5979 /* 17227 */ GIM_Reject,
5980 /* 17228 */ // Label 505: @17228
5981 /* 17228 */ GIM_Try, /*On fail goto*//*Label 508*/ GIMT_Encode4(17335),
5982 /* 17233 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
5983 /* 17240 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
5984 /* 17244 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 509*/ GIMT_Encode4(17289), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 564 //
5985 /* 17251 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
5986 /* 17255 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
5987 /* 17262 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>> => (LOAD16_U_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
5988 /* 17262 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_U_I64_A32),
5989 /* 17265 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5990 /* 17267 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
5991 /* 17270 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
5992 /* 17275 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
5993 /* 17280 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5994 /* 17283 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
5995 /* 17287 */ GIR_RootConstrainSelectedInstOperands,
5996 /* 17288 */ // GIR_Coverage, 564,
5997 /* 17288 */ GIR_EraseRootFromParent_Done,
5998 /* 17289 */ // Label 509: @17289
5999 /* 17289 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 510*/ GIMT_Encode4(17334), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 565 //
6000 /* 17296 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6001 /* 17300 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6002 /* 17307 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>> => (LOAD16_U_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6003 /* 17307 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_U_I64_A64),
6004 /* 17310 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6005 /* 17312 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6006 /* 17315 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6007 /* 17320 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6008 /* 17325 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6009 /* 17328 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6010 /* 17332 */ GIR_RootConstrainSelectedInstOperands,
6011 /* 17333 */ // GIR_Coverage, 565,
6012 /* 17333 */ GIR_EraseRootFromParent_Done,
6013 /* 17334 */ // Label 510: @17334
6014 /* 17334 */ GIM_Reject,
6015 /* 17335 */ // Label 508: @17335
6016 /* 17335 */ GIM_Try, /*On fail goto*//*Label 511*/ GIMT_Encode4(17442),
6017 /* 17340 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(4),
6018 /* 17347 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6019 /* 17351 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 512*/ GIMT_Encode4(17396), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 566 //
6020 /* 17358 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6021 /* 17362 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6022 /* 17369 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi32>> => (LOAD32_U_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6023 /* 17369 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_U_I64_A32),
6024 /* 17372 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6025 /* 17374 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6026 /* 17377 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6027 /* 17382 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6028 /* 17387 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6029 /* 17390 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6030 /* 17394 */ GIR_RootConstrainSelectedInstOperands,
6031 /* 17395 */ // GIR_Coverage, 566,
6032 /* 17395 */ GIR_EraseRootFromParent_Done,
6033 /* 17396 */ // Label 512: @17396
6034 /* 17396 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 513*/ GIMT_Encode4(17441), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 567 //
6035 /* 17403 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6036 /* 17407 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6037 /* 17414 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi32>> => (LOAD32_U_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6038 /* 17414 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_U_I64_A64),
6039 /* 17417 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6040 /* 17419 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6041 /* 17422 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6042 /* 17427 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6043 /* 17432 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6044 /* 17435 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6045 /* 17439 */ GIR_RootConstrainSelectedInstOperands,
6046 /* 17440 */ // GIR_Coverage, 567,
6047 /* 17440 */ GIR_EraseRootFromParent_Done,
6048 /* 17441 */ // Label 513: @17441
6049 /* 17441 */ GIM_Reject,
6050 /* 17442 */ // Label 511: @17442
6051 /* 17442 */ GIM_Reject,
6052 /* 17443 */ // Label 504: @17443
6053 /* 17443 */ GIM_Try, /*On fail goto*//*Label 514*/ GIMT_Encode4(17653),
6054 /* 17448 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6055 /* 17452 */ GIM_Try, /*On fail goto*//*Label 515*/ GIMT_Encode4(17552),
6056 /* 17457 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6057 /* 17461 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 516*/ GIMT_Encode4(17506), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 532 //
6058 /* 17468 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6059 /* 17472 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6060 /* 17479 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6061 /* 17479 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_I64_A32),
6062 /* 17482 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6063 /* 17484 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6064 /* 17487 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6065 /* 17492 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6066 /* 17497 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6067 /* 17500 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6068 /* 17504 */ GIR_RootConstrainSelectedInstOperands,
6069 /* 17505 */ // GIR_Coverage, 532,
6070 /* 17505 */ GIR_EraseRootFromParent_Done,
6071 /* 17506 */ // Label 516: @17506
6072 /* 17506 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 517*/ GIMT_Encode4(17551), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 533 //
6073 /* 17513 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6074 /* 17517 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6075 /* 17524 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6076 /* 17524 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_I64_A64),
6077 /* 17527 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6078 /* 17529 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6079 /* 17532 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6080 /* 17537 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6081 /* 17542 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6082 /* 17545 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6083 /* 17549 */ GIR_RootConstrainSelectedInstOperands,
6084 /* 17550 */ // GIR_Coverage, 533,
6085 /* 17550 */ GIR_EraseRootFromParent_Done,
6086 /* 17551 */ // Label 517: @17551
6087 /* 17551 */ GIM_Reject,
6088 /* 17552 */ // Label 515: @17552
6089 /* 17552 */ GIM_Try, /*On fail goto*//*Label 518*/ GIMT_Encode4(17652),
6090 /* 17557 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
6091 /* 17561 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 519*/ GIMT_Encode4(17606), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 536 //
6092 /* 17568 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6093 /* 17572 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6094 /* 17579 */ // (ld:{ *:[f64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_F64_A32:{ *:[f64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6095 /* 17579 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_F64_A32),
6096 /* 17582 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6097 /* 17584 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6098 /* 17587 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6099 /* 17592 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6100 /* 17597 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6101 /* 17600 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6102 /* 17604 */ GIR_RootConstrainSelectedInstOperands,
6103 /* 17605 */ // GIR_Coverage, 536,
6104 /* 17605 */ GIR_EraseRootFromParent_Done,
6105 /* 17606 */ // Label 519: @17606
6106 /* 17606 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 520*/ GIMT_Encode4(17651), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 537 //
6107 /* 17613 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6108 /* 17617 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6109 /* 17624 */ // (ld:{ *:[f64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_F64_A64:{ *:[f64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6110 /* 17624 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_F64_A64),
6111 /* 17627 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6112 /* 17629 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6113 /* 17632 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6114 /* 17637 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6115 /* 17642 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6116 /* 17645 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6117 /* 17649 */ GIR_RootConstrainSelectedInstOperands,
6118 /* 17650 */ // GIR_Coverage, 537,
6119 /* 17650 */ GIR_EraseRootFromParent_Done,
6120 /* 17651 */ // Label 520: @17651
6121 /* 17651 */ GIM_Reject,
6122 /* 17652 */ // Label 518: @17652
6123 /* 17652 */ GIM_Reject,
6124 /* 17653 */ // Label 514: @17653
6125 /* 17653 */ GIM_Reject,
6126 /* 17654 */ // Label 503: @17654
6127 /* 17654 */ GIM_Reject,
6128 /* 17655 */ // Label 483: @17655
6129 /* 17655 */ GIM_Try, /*On fail goto*//*Label 521*/ GIMT_Encode4(17762),
6130 /* 17660 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6131 /* 17663 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6132 /* 17667 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6133 /* 17671 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 522*/ GIMT_Encode4(17716), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 855 //
6134 /* 17678 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6135 /* 17682 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6136 /* 17689 */ // (ld:{ *:[v16i8] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A32:{ *:[v16i8] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6137 /* 17689 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A32),
6138 /* 17692 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6139 /* 17694 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6140 /* 17697 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6141 /* 17702 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6142 /* 17707 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6143 /* 17710 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6144 /* 17714 */ GIR_RootConstrainSelectedInstOperands,
6145 /* 17715 */ // GIR_Coverage, 855,
6146 /* 17715 */ GIR_EraseRootFromParent_Done,
6147 /* 17716 */ // Label 522: @17716
6148 /* 17716 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 523*/ GIMT_Encode4(17761), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 856 //
6149 /* 17723 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6150 /* 17727 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6151 /* 17734 */ // (ld:{ *:[v16i8] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A64:{ *:[v16i8] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6152 /* 17734 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A64),
6153 /* 17737 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6154 /* 17739 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6155 /* 17742 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6156 /* 17747 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6157 /* 17752 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6158 /* 17755 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6159 /* 17759 */ GIR_RootConstrainSelectedInstOperands,
6160 /* 17760 */ // GIR_Coverage, 856,
6161 /* 17760 */ GIR_EraseRootFromParent_Done,
6162 /* 17761 */ // Label 523: @17761
6163 /* 17761 */ GIM_Reject,
6164 /* 17762 */ // Label 521: @17762
6165 /* 17762 */ GIM_Reject,
6166 /* 17763 */ // Label 484: @17763
6167 /* 17763 */ GIM_Try, /*On fail goto*//*Label 524*/ GIMT_Encode4(17960),
6168 /* 17768 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6169 /* 17771 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6170 /* 17775 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6171 /* 17779 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 525*/ GIMT_Encode4(17824), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 857 //
6172 /* 17786 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6173 /* 17790 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6174 /* 17797 */ // (ld:{ *:[v8i16] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A32:{ *:[v8i16] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6175 /* 17797 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A32),
6176 /* 17800 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6177 /* 17802 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6178 /* 17805 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6179 /* 17810 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6180 /* 17815 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6181 /* 17818 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6182 /* 17822 */ GIR_RootConstrainSelectedInstOperands,
6183 /* 17823 */ // GIR_Coverage, 857,
6184 /* 17823 */ GIR_EraseRootFromParent_Done,
6185 /* 17824 */ // Label 525: @17824
6186 /* 17824 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 526*/ GIMT_Encode4(17869), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 858 //
6187 /* 17831 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6188 /* 17835 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6189 /* 17842 */ // (ld:{ *:[v8i16] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A64:{ *:[v8i16] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6190 /* 17842 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A64),
6191 /* 17845 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6192 /* 17847 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6193 /* 17850 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6194 /* 17855 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6195 /* 17860 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6196 /* 17863 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6197 /* 17867 */ GIR_RootConstrainSelectedInstOperands,
6198 /* 17868 */ // GIR_Coverage, 858,
6199 /* 17868 */ GIR_EraseRootFromParent_Done,
6200 /* 17869 */ // Label 526: @17869
6201 /* 17869 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 527*/ GIMT_Encode4(17914), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 867 //
6202 /* 17876 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6203 /* 17880 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6204 /* 17887 */ // (ld:{ *:[v8f16] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A32:{ *:[v8f16] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6205 /* 17887 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A32),
6206 /* 17890 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6207 /* 17892 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6208 /* 17895 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6209 /* 17900 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6210 /* 17905 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6211 /* 17908 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6212 /* 17912 */ GIR_RootConstrainSelectedInstOperands,
6213 /* 17913 */ // GIR_Coverage, 867,
6214 /* 17913 */ GIR_EraseRootFromParent_Done,
6215 /* 17914 */ // Label 527: @17914
6216 /* 17914 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 528*/ GIMT_Encode4(17959), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 868 //
6217 /* 17921 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6218 /* 17925 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6219 /* 17932 */ // (ld:{ *:[v8f16] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A64:{ *:[v8f16] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6220 /* 17932 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A64),
6221 /* 17935 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6222 /* 17937 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6223 /* 17940 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6224 /* 17945 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6225 /* 17950 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6226 /* 17953 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6227 /* 17957 */ GIR_RootConstrainSelectedInstOperands,
6228 /* 17958 */ // GIR_Coverage, 868,
6229 /* 17958 */ GIR_EraseRootFromParent_Done,
6230 /* 17959 */ // Label 528: @17959
6231 /* 17959 */ GIM_Reject,
6232 /* 17960 */ // Label 524: @17960
6233 /* 17960 */ GIM_Reject,
6234 /* 17961 */ // Label 485: @17961
6235 /* 17961 */ GIM_Try, /*On fail goto*//*Label 529*/ GIMT_Encode4(18158),
6236 /* 17966 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6237 /* 17969 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6238 /* 17973 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6239 /* 17977 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 530*/ GIMT_Encode4(18022), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 859 //
6240 /* 17984 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6241 /* 17988 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6242 /* 17995 */ // (ld:{ *:[v4i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A32:{ *:[v4i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6243 /* 17995 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A32),
6244 /* 17998 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6245 /* 18000 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6246 /* 18003 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6247 /* 18008 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6248 /* 18013 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6249 /* 18016 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6250 /* 18020 */ GIR_RootConstrainSelectedInstOperands,
6251 /* 18021 */ // GIR_Coverage, 859,
6252 /* 18021 */ GIR_EraseRootFromParent_Done,
6253 /* 18022 */ // Label 530: @18022
6254 /* 18022 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 531*/ GIMT_Encode4(18067), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 860 //
6255 /* 18029 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6256 /* 18033 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6257 /* 18040 */ // (ld:{ *:[v4i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A64:{ *:[v4i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6258 /* 18040 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A64),
6259 /* 18043 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6260 /* 18045 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6261 /* 18048 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6262 /* 18053 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6263 /* 18058 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6264 /* 18061 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6265 /* 18065 */ GIR_RootConstrainSelectedInstOperands,
6266 /* 18066 */ // GIR_Coverage, 860,
6267 /* 18066 */ GIR_EraseRootFromParent_Done,
6268 /* 18067 */ // Label 531: @18067
6269 /* 18067 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 532*/ GIMT_Encode4(18112), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 863 //
6270 /* 18074 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6271 /* 18078 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6272 /* 18085 */ // (ld:{ *:[v4f32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A32:{ *:[v4f32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6273 /* 18085 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A32),
6274 /* 18088 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6275 /* 18090 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6276 /* 18093 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6277 /* 18098 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6278 /* 18103 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6279 /* 18106 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6280 /* 18110 */ GIR_RootConstrainSelectedInstOperands,
6281 /* 18111 */ // GIR_Coverage, 863,
6282 /* 18111 */ GIR_EraseRootFromParent_Done,
6283 /* 18112 */ // Label 532: @18112
6284 /* 18112 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 533*/ GIMT_Encode4(18157), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 864 //
6285 /* 18119 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6286 /* 18123 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6287 /* 18130 */ // (ld:{ *:[v4f32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A64:{ *:[v4f32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6288 /* 18130 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A64),
6289 /* 18133 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6290 /* 18135 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6291 /* 18138 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6292 /* 18143 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6293 /* 18148 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6294 /* 18151 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6295 /* 18155 */ GIR_RootConstrainSelectedInstOperands,
6296 /* 18156 */ // GIR_Coverage, 864,
6297 /* 18156 */ GIR_EraseRootFromParent_Done,
6298 /* 18157 */ // Label 533: @18157
6299 /* 18157 */ GIM_Reject,
6300 /* 18158 */ // Label 529: @18158
6301 /* 18158 */ GIM_Reject,
6302 /* 18159 */ // Label 486: @18159
6303 /* 18159 */ GIM_Try, /*On fail goto*//*Label 534*/ GIMT_Encode4(18506),
6304 /* 18164 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6305 /* 18167 */ GIM_Try, /*On fail goto*//*Label 535*/ GIMT_Encode4(18361),
6306 /* 18172 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6307 /* 18176 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6308 /* 18180 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 536*/ GIMT_Encode4(18225), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 861 //
6309 /* 18187 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6310 /* 18191 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6311 /* 18198 */ // (ld:{ *:[v2i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A32:{ *:[v2i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6312 /* 18198 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A32),
6313 /* 18201 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6314 /* 18203 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6315 /* 18206 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6316 /* 18211 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6317 /* 18216 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6318 /* 18219 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6319 /* 18223 */ GIR_RootConstrainSelectedInstOperands,
6320 /* 18224 */ // GIR_Coverage, 861,
6321 /* 18224 */ GIR_EraseRootFromParent_Done,
6322 /* 18225 */ // Label 536: @18225
6323 /* 18225 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 537*/ GIMT_Encode4(18270), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 862 //
6324 /* 18232 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6325 /* 18236 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6326 /* 18243 */ // (ld:{ *:[v2i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A64:{ *:[v2i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6327 /* 18243 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A64),
6328 /* 18246 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6329 /* 18248 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6330 /* 18251 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6331 /* 18256 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6332 /* 18261 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6333 /* 18264 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6334 /* 18268 */ GIR_RootConstrainSelectedInstOperands,
6335 /* 18269 */ // GIR_Coverage, 862,
6336 /* 18269 */ GIR_EraseRootFromParent_Done,
6337 /* 18270 */ // Label 537: @18270
6338 /* 18270 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 538*/ GIMT_Encode4(18315), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 865 //
6339 /* 18277 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6340 /* 18281 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6341 /* 18288 */ // (ld:{ *:[v2f64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A32:{ *:[v2f64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6342 /* 18288 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A32),
6343 /* 18291 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6344 /* 18293 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6345 /* 18296 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6346 /* 18301 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6347 /* 18306 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6348 /* 18309 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6349 /* 18313 */ GIR_RootConstrainSelectedInstOperands,
6350 /* 18314 */ // GIR_Coverage, 865,
6351 /* 18314 */ GIR_EraseRootFromParent_Done,
6352 /* 18315 */ // Label 538: @18315
6353 /* 18315 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 539*/ GIMT_Encode4(18360), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 866 //
6354 /* 18322 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6355 /* 18326 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6356 /* 18333 */ // (ld:{ *:[v2f64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A64:{ *:[v2f64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6357 /* 18333 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A64),
6358 /* 18336 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6359 /* 18338 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6360 /* 18341 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6361 /* 18346 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6362 /* 18351 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6363 /* 18354 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6364 /* 18358 */ GIR_RootConstrainSelectedInstOperands,
6365 /* 18359 */ // GIR_Coverage, 866,
6366 /* 18359 */ GIR_EraseRootFromParent_Done,
6367 /* 18360 */ // Label 539: @18360
6368 /* 18360 */ GIM_Reject,
6369 /* 18361 */ // Label 535: @18361
6370 /* 18361 */ GIM_Try, /*On fail goto*//*Label 540*/ GIMT_Encode4(18505),
6371 /* 18366 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6372 /* 18370 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6373 /* 18374 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 541*/ GIMT_Encode4(18439), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 1250 //
6374 /* 18381 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6375 /* 18385 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6376 /* 18392 */ // (ld:{ *:[v2f64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>> => (promote_low_F64x2:{ *:[v2f64] } (LOAD_ZERO_64_A32:{ *:[v16i8] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))
6377 /* 18392 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16i8,
6378 /* 18395 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_ZERO_64_A32),
6379 /* 18399 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
6380 /* 18404 */ GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
6381 /* 18407 */ GIR_ComplexSubOperandRenderer, /*InsnID*/1, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6382 /* 18412 */ GIR_ComplexSubOperandRenderer, /*InsnID*/1, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6383 /* 18417 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6384 /* 18420 */ GIR_MergeMemOperands, /*InsnID*/1, /*NumInsns*/1, /*MergeInsnID's*/0,
6385 /* 18424 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
6386 /* 18426 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::promote_low_F64x2),
6387 /* 18429 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6388 /* 18431 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
6389 /* 18434 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6390 /* 18437 */ GIR_RootConstrainSelectedInstOperands,
6391 /* 18438 */ // GIR_Coverage, 1250,
6392 /* 18438 */ GIR_EraseRootFromParent_Done,
6393 /* 18439 */ // Label 541: @18439
6394 /* 18439 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 542*/ GIMT_Encode4(18504), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 1251 //
6395 /* 18446 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6396 /* 18450 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6397 /* 18457 */ // (ld:{ *:[v2f64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>> => (promote_low_F64x2:{ *:[v2f64] } (LOAD_ZERO_64_A64:{ *:[v16i8] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))
6398 /* 18457 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16i8,
6399 /* 18460 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_ZERO_64_A64),
6400 /* 18464 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
6401 /* 18469 */ GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
6402 /* 18472 */ GIR_ComplexSubOperandRenderer, /*InsnID*/1, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6403 /* 18477 */ GIR_ComplexSubOperandRenderer, /*InsnID*/1, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6404 /* 18482 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6405 /* 18485 */ GIR_MergeMemOperands, /*InsnID*/1, /*NumInsns*/1, /*MergeInsnID's*/0,
6406 /* 18489 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
6407 /* 18491 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::promote_low_F64x2),
6408 /* 18494 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6409 /* 18496 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
6410 /* 18499 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6411 /* 18502 */ GIR_RootConstrainSelectedInstOperands,
6412 /* 18503 */ // GIR_Coverage, 1251,
6413 /* 18503 */ GIR_EraseRootFromParent_Done,
6414 /* 18504 */ // Label 542: @18504
6415 /* 18504 */ GIM_Reject,
6416 /* 18505 */ // Label 540: @18505
6417 /* 18505 */ GIM_Reject,
6418 /* 18506 */ // Label 534: @18506
6419 /* 18506 */ GIM_Reject,
6420 /* 18507 */ // Label 487: @18507
6421 /* 18507 */ GIM_Reject,
6422 /* 18508 */ // Label 17: @18508
6423 /* 18508 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 545*/ GIMT_Encode4(19082),
6424 /* 18519 */ /*GILLT_i32*//*Label 543*/ GIMT_Encode4(18527),
6425 /* 18523 */ /*GILLT_i64*//*Label 544*/ GIMT_Encode4(18751),
6426 /* 18527 */ // Label 543: @18527
6427 /* 18527 */ GIM_Try, /*On fail goto*//*Label 546*/ GIMT_Encode4(18750),
6428 /* 18532 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6429 /* 18535 */ GIM_Try, /*On fail goto*//*Label 547*/ GIMT_Encode4(18642),
6430 /* 18540 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(1),
6431 /* 18547 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6432 /* 18551 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 548*/ GIMT_Encode4(18596), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 538 //
6433 /* 18558 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6434 /* 18562 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6435 /* 18569 */ // (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi8>> => (LOAD8_S_I32_A32:{ *:[i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6436 /* 18569 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_S_I32_A32),
6437 /* 18572 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6438 /* 18574 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6439 /* 18577 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6440 /* 18582 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6441 /* 18587 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6442 /* 18590 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6443 /* 18594 */ GIR_RootConstrainSelectedInstOperands,
6444 /* 18595 */ // GIR_Coverage, 538,
6445 /* 18595 */ GIR_EraseRootFromParent_Done,
6446 /* 18596 */ // Label 548: @18596
6447 /* 18596 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 549*/ GIMT_Encode4(18641), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 539 //
6448 /* 18603 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6449 /* 18607 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6450 /* 18614 */ // (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi8>> => (LOAD8_S_I32_A64:{ *:[i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6451 /* 18614 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_S_I32_A64),
6452 /* 18617 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6453 /* 18619 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6454 /* 18622 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6455 /* 18627 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6456 /* 18632 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6457 /* 18635 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6458 /* 18639 */ GIR_RootConstrainSelectedInstOperands,
6459 /* 18640 */ // GIR_Coverage, 539,
6460 /* 18640 */ GIR_EraseRootFromParent_Done,
6461 /* 18641 */ // Label 549: @18641
6462 /* 18641 */ GIM_Reject,
6463 /* 18642 */ // Label 547: @18642
6464 /* 18642 */ GIM_Try, /*On fail goto*//*Label 550*/ GIMT_Encode4(18749),
6465 /* 18647 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
6466 /* 18654 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6467 /* 18658 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 551*/ GIMT_Encode4(18703), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 540 //
6468 /* 18665 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6469 /* 18669 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6470 /* 18676 */ // (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>> => (LOAD16_S_I32_A32:{ *:[i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6471 /* 18676 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_S_I32_A32),
6472 /* 18679 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6473 /* 18681 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6474 /* 18684 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6475 /* 18689 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6476 /* 18694 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6477 /* 18697 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6478 /* 18701 */ GIR_RootConstrainSelectedInstOperands,
6479 /* 18702 */ // GIR_Coverage, 540,
6480 /* 18702 */ GIR_EraseRootFromParent_Done,
6481 /* 18703 */ // Label 551: @18703
6482 /* 18703 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 552*/ GIMT_Encode4(18748), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 541 //
6483 /* 18710 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6484 /* 18714 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6485 /* 18721 */ // (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>> => (LOAD16_S_I32_A64:{ *:[i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6486 /* 18721 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_S_I32_A64),
6487 /* 18724 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6488 /* 18726 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6489 /* 18729 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6490 /* 18734 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6491 /* 18739 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6492 /* 18742 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6493 /* 18746 */ GIR_RootConstrainSelectedInstOperands,
6494 /* 18747 */ // GIR_Coverage, 541,
6495 /* 18747 */ GIR_EraseRootFromParent_Done,
6496 /* 18748 */ // Label 552: @18748
6497 /* 18748 */ GIM_Reject,
6498 /* 18749 */ // Label 550: @18749
6499 /* 18749 */ GIM_Reject,
6500 /* 18750 */ // Label 546: @18750
6501 /* 18750 */ GIM_Reject,
6502 /* 18751 */ // Label 544: @18751
6503 /* 18751 */ GIM_Try, /*On fail goto*//*Label 553*/ GIMT_Encode4(19081),
6504 /* 18756 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6505 /* 18759 */ GIM_Try, /*On fail goto*//*Label 554*/ GIMT_Encode4(18866),
6506 /* 18764 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(1),
6507 /* 18771 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6508 /* 18775 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 555*/ GIMT_Encode4(18820), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 542 //
6509 /* 18782 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6510 /* 18786 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6511 /* 18793 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi8>> => (LOAD8_S_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6512 /* 18793 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_S_I64_A32),
6513 /* 18796 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6514 /* 18798 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6515 /* 18801 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6516 /* 18806 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6517 /* 18811 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6518 /* 18814 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6519 /* 18818 */ GIR_RootConstrainSelectedInstOperands,
6520 /* 18819 */ // GIR_Coverage, 542,
6521 /* 18819 */ GIR_EraseRootFromParent_Done,
6522 /* 18820 */ // Label 555: @18820
6523 /* 18820 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 556*/ GIMT_Encode4(18865), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 543 //
6524 /* 18827 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6525 /* 18831 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6526 /* 18838 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi8>> => (LOAD8_S_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6527 /* 18838 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_S_I64_A64),
6528 /* 18841 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6529 /* 18843 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6530 /* 18846 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6531 /* 18851 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6532 /* 18856 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6533 /* 18859 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6534 /* 18863 */ GIR_RootConstrainSelectedInstOperands,
6535 /* 18864 */ // GIR_Coverage, 543,
6536 /* 18864 */ GIR_EraseRootFromParent_Done,
6537 /* 18865 */ // Label 556: @18865
6538 /* 18865 */ GIM_Reject,
6539 /* 18866 */ // Label 554: @18866
6540 /* 18866 */ GIM_Try, /*On fail goto*//*Label 557*/ GIMT_Encode4(18973),
6541 /* 18871 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
6542 /* 18878 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6543 /* 18882 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 558*/ GIMT_Encode4(18927), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 544 //
6544 /* 18889 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6545 /* 18893 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6546 /* 18900 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>> => (LOAD16_S_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6547 /* 18900 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_S_I64_A32),
6548 /* 18903 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6549 /* 18905 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6550 /* 18908 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6551 /* 18913 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6552 /* 18918 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6553 /* 18921 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6554 /* 18925 */ GIR_RootConstrainSelectedInstOperands,
6555 /* 18926 */ // GIR_Coverage, 544,
6556 /* 18926 */ GIR_EraseRootFromParent_Done,
6557 /* 18927 */ // Label 558: @18927
6558 /* 18927 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 559*/ GIMT_Encode4(18972), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 545 //
6559 /* 18934 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6560 /* 18938 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6561 /* 18945 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>> => (LOAD16_S_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6562 /* 18945 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_S_I64_A64),
6563 /* 18948 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6564 /* 18950 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6565 /* 18953 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6566 /* 18958 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6567 /* 18963 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6568 /* 18966 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6569 /* 18970 */ GIR_RootConstrainSelectedInstOperands,
6570 /* 18971 */ // GIR_Coverage, 545,
6571 /* 18971 */ GIR_EraseRootFromParent_Done,
6572 /* 18972 */ // Label 559: @18972
6573 /* 18972 */ GIM_Reject,
6574 /* 18973 */ // Label 557: @18973
6575 /* 18973 */ GIM_Try, /*On fail goto*//*Label 560*/ GIMT_Encode4(19080),
6576 /* 18978 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(4),
6577 /* 18985 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6578 /* 18989 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 561*/ GIMT_Encode4(19034), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 546 //
6579 /* 18996 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6580 /* 19000 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6581 /* 19007 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi32>> => (LOAD32_S_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6582 /* 19007 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_S_I64_A32),
6583 /* 19010 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6584 /* 19012 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6585 /* 19015 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6586 /* 19020 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6587 /* 19025 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6588 /* 19028 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6589 /* 19032 */ GIR_RootConstrainSelectedInstOperands,
6590 /* 19033 */ // GIR_Coverage, 546,
6591 /* 19033 */ GIR_EraseRootFromParent_Done,
6592 /* 19034 */ // Label 561: @19034
6593 /* 19034 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 562*/ GIMT_Encode4(19079), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 547 //
6594 /* 19041 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6595 /* 19045 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6596 /* 19052 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi32>> => (LOAD32_S_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6597 /* 19052 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_S_I64_A64),
6598 /* 19055 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6599 /* 19057 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6600 /* 19060 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6601 /* 19065 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6602 /* 19070 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6603 /* 19073 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6604 /* 19077 */ GIR_RootConstrainSelectedInstOperands,
6605 /* 19078 */ // GIR_Coverage, 547,
6606 /* 19078 */ GIR_EraseRootFromParent_Done,
6607 /* 19079 */ // Label 562: @19079
6608 /* 19079 */ GIM_Reject,
6609 /* 19080 */ // Label 560: @19080
6610 /* 19080 */ GIM_Reject,
6611 /* 19081 */ // Label 553: @19081
6612 /* 19081 */ GIM_Reject,
6613 /* 19082 */ // Label 545: @19082
6614 /* 19082 */ GIM_Reject,
6615 /* 19083 */ // Label 18: @19083
6616 /* 19083 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 565*/ GIMT_Encode4(19657),
6617 /* 19094 */ /*GILLT_i32*//*Label 563*/ GIMT_Encode4(19102),
6618 /* 19098 */ /*GILLT_i64*//*Label 564*/ GIMT_Encode4(19326),
6619 /* 19102 */ // Label 563: @19102
6620 /* 19102 */ GIM_Try, /*On fail goto*//*Label 566*/ GIMT_Encode4(19325),
6621 /* 19107 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6622 /* 19110 */ GIM_Try, /*On fail goto*//*Label 567*/ GIMT_Encode4(19217),
6623 /* 19115 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(1),
6624 /* 19122 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6625 /* 19126 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 568*/ GIMT_Encode4(19171), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 548 //
6626 /* 19133 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6627 /* 19137 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6628 /* 19144 */ // (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi8>> => (LOAD8_U_I32_A32:{ *:[i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6629 /* 19144 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_U_I32_A32),
6630 /* 19147 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6631 /* 19149 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6632 /* 19152 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6633 /* 19157 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6634 /* 19162 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6635 /* 19165 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6636 /* 19169 */ GIR_RootConstrainSelectedInstOperands,
6637 /* 19170 */ // GIR_Coverage, 548,
6638 /* 19170 */ GIR_EraseRootFromParent_Done,
6639 /* 19171 */ // Label 568: @19171
6640 /* 19171 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 569*/ GIMT_Encode4(19216), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 549 //
6641 /* 19178 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6642 /* 19182 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6643 /* 19189 */ // (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi8>> => (LOAD8_U_I32_A64:{ *:[i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6644 /* 19189 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_U_I32_A64),
6645 /* 19192 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6646 /* 19194 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6647 /* 19197 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6648 /* 19202 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6649 /* 19207 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6650 /* 19210 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6651 /* 19214 */ GIR_RootConstrainSelectedInstOperands,
6652 /* 19215 */ // GIR_Coverage, 549,
6653 /* 19215 */ GIR_EraseRootFromParent_Done,
6654 /* 19216 */ // Label 569: @19216
6655 /* 19216 */ GIM_Reject,
6656 /* 19217 */ // Label 567: @19217
6657 /* 19217 */ GIM_Try, /*On fail goto*//*Label 570*/ GIMT_Encode4(19324),
6658 /* 19222 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
6659 /* 19229 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6660 /* 19233 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 571*/ GIMT_Encode4(19278), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 550 //
6661 /* 19240 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6662 /* 19244 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6663 /* 19251 */ // (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi16>> => (LOAD16_U_I32_A32:{ *:[i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6664 /* 19251 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_U_I32_A32),
6665 /* 19254 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6666 /* 19256 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6667 /* 19259 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6668 /* 19264 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6669 /* 19269 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6670 /* 19272 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6671 /* 19276 */ GIR_RootConstrainSelectedInstOperands,
6672 /* 19277 */ // GIR_Coverage, 550,
6673 /* 19277 */ GIR_EraseRootFromParent_Done,
6674 /* 19278 */ // Label 571: @19278
6675 /* 19278 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 572*/ GIMT_Encode4(19323), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 551 //
6676 /* 19285 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6677 /* 19289 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6678 /* 19296 */ // (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi16>> => (LOAD16_U_I32_A64:{ *:[i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6679 /* 19296 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_U_I32_A64),
6680 /* 19299 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6681 /* 19301 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6682 /* 19304 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6683 /* 19309 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6684 /* 19314 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6685 /* 19317 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6686 /* 19321 */ GIR_RootConstrainSelectedInstOperands,
6687 /* 19322 */ // GIR_Coverage, 551,
6688 /* 19322 */ GIR_EraseRootFromParent_Done,
6689 /* 19323 */ // Label 572: @19323
6690 /* 19323 */ GIM_Reject,
6691 /* 19324 */ // Label 570: @19324
6692 /* 19324 */ GIM_Reject,
6693 /* 19325 */ // Label 566: @19325
6694 /* 19325 */ GIM_Reject,
6695 /* 19326 */ // Label 564: @19326
6696 /* 19326 */ GIM_Try, /*On fail goto*//*Label 573*/ GIMT_Encode4(19656),
6697 /* 19331 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6698 /* 19334 */ GIM_Try, /*On fail goto*//*Label 574*/ GIMT_Encode4(19441),
6699 /* 19339 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(1),
6700 /* 19346 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6701 /* 19350 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 575*/ GIMT_Encode4(19395), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 552 //
6702 /* 19357 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6703 /* 19361 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6704 /* 19368 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi8>> => (LOAD8_U_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6705 /* 19368 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_U_I64_A32),
6706 /* 19371 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6707 /* 19373 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6708 /* 19376 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6709 /* 19381 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6710 /* 19386 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6711 /* 19389 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6712 /* 19393 */ GIR_RootConstrainSelectedInstOperands,
6713 /* 19394 */ // GIR_Coverage, 552,
6714 /* 19394 */ GIR_EraseRootFromParent_Done,
6715 /* 19395 */ // Label 575: @19395
6716 /* 19395 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 576*/ GIMT_Encode4(19440), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 553 //
6717 /* 19402 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6718 /* 19406 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6719 /* 19413 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi8>> => (LOAD8_U_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6720 /* 19413 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_U_I64_A64),
6721 /* 19416 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6722 /* 19418 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6723 /* 19421 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6724 /* 19426 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6725 /* 19431 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6726 /* 19434 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6727 /* 19438 */ GIR_RootConstrainSelectedInstOperands,
6728 /* 19439 */ // GIR_Coverage, 553,
6729 /* 19439 */ GIR_EraseRootFromParent_Done,
6730 /* 19440 */ // Label 576: @19440
6731 /* 19440 */ GIM_Reject,
6732 /* 19441 */ // Label 574: @19441
6733 /* 19441 */ GIM_Try, /*On fail goto*//*Label 577*/ GIMT_Encode4(19548),
6734 /* 19446 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
6735 /* 19453 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6736 /* 19457 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 578*/ GIMT_Encode4(19502), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 554 //
6737 /* 19464 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6738 /* 19468 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6739 /* 19475 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi16>> => (LOAD16_U_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6740 /* 19475 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_U_I64_A32),
6741 /* 19478 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6742 /* 19480 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6743 /* 19483 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6744 /* 19488 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6745 /* 19493 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6746 /* 19496 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6747 /* 19500 */ GIR_RootConstrainSelectedInstOperands,
6748 /* 19501 */ // GIR_Coverage, 554,
6749 /* 19501 */ GIR_EraseRootFromParent_Done,
6750 /* 19502 */ // Label 578: @19502
6751 /* 19502 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 579*/ GIMT_Encode4(19547), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 555 //
6752 /* 19509 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6753 /* 19513 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6754 /* 19520 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi16>> => (LOAD16_U_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6755 /* 19520 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_U_I64_A64),
6756 /* 19523 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6757 /* 19525 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6758 /* 19528 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6759 /* 19533 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6760 /* 19538 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6761 /* 19541 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6762 /* 19545 */ GIR_RootConstrainSelectedInstOperands,
6763 /* 19546 */ // GIR_Coverage, 555,
6764 /* 19546 */ GIR_EraseRootFromParent_Done,
6765 /* 19547 */ // Label 579: @19547
6766 /* 19547 */ GIM_Reject,
6767 /* 19548 */ // Label 577: @19548
6768 /* 19548 */ GIM_Try, /*On fail goto*//*Label 580*/ GIMT_Encode4(19655),
6769 /* 19553 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(4),
6770 /* 19560 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6771 /* 19564 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 581*/ GIMT_Encode4(19609), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 556 //
6772 /* 19571 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6773 /* 19575 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6774 /* 19582 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi32>> => (LOAD32_U_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6775 /* 19582 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_U_I64_A32),
6776 /* 19585 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6777 /* 19587 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6778 /* 19590 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6779 /* 19595 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6780 /* 19600 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6781 /* 19603 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6782 /* 19607 */ GIR_RootConstrainSelectedInstOperands,
6783 /* 19608 */ // GIR_Coverage, 556,
6784 /* 19608 */ GIR_EraseRootFromParent_Done,
6785 /* 19609 */ // Label 581: @19609
6786 /* 19609 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 582*/ GIMT_Encode4(19654), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 557 //
6787 /* 19616 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6788 /* 19620 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6789 /* 19627 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi32>> => (LOAD32_U_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6790 /* 19627 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_U_I64_A64),
6791 /* 19630 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6792 /* 19632 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6793 /* 19635 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6794 /* 19640 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6795 /* 19645 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6796 /* 19648 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6797 /* 19652 */ GIR_RootConstrainSelectedInstOperands,
6798 /* 19653 */ // GIR_Coverage, 557,
6799 /* 19653 */ GIR_EraseRootFromParent_Done,
6800 /* 19654 */ // Label 582: @19654
6801 /* 19654 */ GIM_Reject,
6802 /* 19655 */ // Label 580: @19655
6803 /* 19655 */ GIM_Reject,
6804 /* 19656 */ // Label 573: @19656
6805 /* 19656 */ GIM_Reject,
6806 /* 19657 */ // Label 565: @19657
6807 /* 19657 */ GIM_Reject,
6808 /* 19658 */ // Label 19: @19658
6809 /* 19658 */ GIM_Try, /*On fail goto*//*Label 583*/ GIMT_Encode4(19775),
6810 /* 19663 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_f32,
6811 /* 19666 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6812 /* 19669 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6813 /* 19673 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
6814 /* 19680 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6815 /* 19684 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 584*/ GIMT_Encode4(19729), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 568 //
6816 /* 19691 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6817 /* 19695 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6818 /* 19702 */ // (ld:{ *:[f32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadf16>> => (LOAD_F16_F32_A32:{ *:[f32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6819 /* 19702 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_F16_F32_A32),
6820 /* 19705 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6821 /* 19707 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6822 /* 19710 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6823 /* 19715 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6824 /* 19720 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6825 /* 19723 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6826 /* 19727 */ GIR_RootConstrainSelectedInstOperands,
6827 /* 19728 */ // GIR_Coverage, 568,
6828 /* 19728 */ GIR_EraseRootFromParent_Done,
6829 /* 19729 */ // Label 584: @19729
6830 /* 19729 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 585*/ GIMT_Encode4(19774), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 569 //
6831 /* 19736 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6832 /* 19740 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6833 /* 19747 */ // (ld:{ *:[f32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadf16>> => (LOAD_F16_F32_A64:{ *:[f32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6834 /* 19747 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_F16_F32_A64),
6835 /* 19750 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6836 /* 19752 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6837 /* 19755 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6838 /* 19760 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6839 /* 19765 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6840 /* 19768 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6841 /* 19772 */ GIR_RootConstrainSelectedInstOperands,
6842 /* 19773 */ // GIR_Coverage, 569,
6843 /* 19773 */ GIR_EraseRootFromParent_Done,
6844 /* 19774 */ // Label 585: @19774
6845 /* 19774 */ GIM_Reject,
6846 /* 19775 */ // Label 583: @19775
6847 /* 19775 */ GIM_Reject,
6848 /* 19776 */ // Label 20: @19776
6849 /* 19776 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(12), /*)*//*default:*//*Label 592*/ GIMT_Encode4(21532),
6850 /* 19787 */ /*GILLT_s32*//*Label 586*/ GIMT_Encode4(19835),
6851 /* 19791 */ /*GILLT_s64*//*Label 587*/ GIMT_Encode4(20279), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
6852 /* 19819 */ /*GILLT_v16s8*//*Label 588*/ GIMT_Encode4(20830),
6853 /* 19823 */ /*GILLT_v8s16*//*Label 589*/ GIMT_Encode4(20938),
6854 /* 19827 */ /*GILLT_v4s32*//*Label 590*/ GIMT_Encode4(21136),
6855 /* 19831 */ /*GILLT_v2s64*//*Label 591*/ GIMT_Encode4(21334),
6856 /* 19835 */ // Label 586: @19835
6857 /* 19835 */ GIM_Try, /*On fail goto*//*Label 593*/ GIMT_Encode4(20278),
6858 /* 19840 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6859 /* 19843 */ GIM_Try, /*On fail goto*//*Label 594*/ GIMT_Encode4(20067),
6860 /* 19848 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6861 /* 19852 */ GIM_Try, /*On fail goto*//*Label 595*/ GIMT_Encode4(19959),
6862 /* 19857 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(1),
6863 /* 19864 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6864 /* 19868 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 596*/ GIMT_Encode4(19913), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 580 //
6865 /* 19875 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6866 /* 19879 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6867 /* 19886 */ // (st I32:{ *:[i32] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei8>> => (STORE8_I32_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, i32:{ *:[i32] }:$val)
6868 /* 19886 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE8_I32_A32),
6869 /* 19889 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6870 /* 19892 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6871 /* 19897 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6872 /* 19902 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
6873 /* 19904 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6874 /* 19907 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6875 /* 19911 */ GIR_RootConstrainSelectedInstOperands,
6876 /* 19912 */ // GIR_Coverage, 580,
6877 /* 19912 */ GIR_EraseRootFromParent_Done,
6878 /* 19913 */ // Label 596: @19913
6879 /* 19913 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 597*/ GIMT_Encode4(19958), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 581 //
6880 /* 19920 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6881 /* 19924 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6882 /* 19931 */ // (st I32:{ *:[i32] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei8>> => (STORE8_I32_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, i32:{ *:[i32] }:$val)
6883 /* 19931 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE8_I32_A64),
6884 /* 19934 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6885 /* 19937 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6886 /* 19942 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6887 /* 19947 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
6888 /* 19949 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6889 /* 19952 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6890 /* 19956 */ GIR_RootConstrainSelectedInstOperands,
6891 /* 19957 */ // GIR_Coverage, 581,
6892 /* 19957 */ GIR_EraseRootFromParent_Done,
6893 /* 19958 */ // Label 597: @19958
6894 /* 19958 */ GIM_Reject,
6895 /* 19959 */ // Label 595: @19959
6896 /* 19959 */ GIM_Try, /*On fail goto*//*Label 598*/ GIMT_Encode4(20066),
6897 /* 19964 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
6898 /* 19971 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6899 /* 19975 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 599*/ GIMT_Encode4(20020), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 582 //
6900 /* 19982 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6901 /* 19986 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6902 /* 19993 */ // (st I32:{ *:[i32] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei16>> => (STORE16_I32_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, i32:{ *:[i32] }:$val)
6903 /* 19993 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE16_I32_A32),
6904 /* 19996 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6905 /* 19999 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6906 /* 20004 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6907 /* 20009 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
6908 /* 20011 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6909 /* 20014 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6910 /* 20018 */ GIR_RootConstrainSelectedInstOperands,
6911 /* 20019 */ // GIR_Coverage, 582,
6912 /* 20019 */ GIR_EraseRootFromParent_Done,
6913 /* 20020 */ // Label 599: @20020
6914 /* 20020 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 600*/ GIMT_Encode4(20065), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 583 //
6915 /* 20027 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6916 /* 20031 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6917 /* 20038 */ // (st I32:{ *:[i32] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei16>> => (STORE16_I32_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, i32:{ *:[i32] }:$val)
6918 /* 20038 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE16_I32_A64),
6919 /* 20041 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6920 /* 20044 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6921 /* 20049 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6922 /* 20054 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
6923 /* 20056 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6924 /* 20059 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6925 /* 20063 */ GIR_RootConstrainSelectedInstOperands,
6926 /* 20064 */ // GIR_Coverage, 583,
6927 /* 20064 */ GIR_EraseRootFromParent_Done,
6928 /* 20065 */ // Label 600: @20065
6929 /* 20065 */ GIM_Reject,
6930 /* 20066 */ // Label 598: @20066
6931 /* 20066 */ GIM_Reject,
6932 /* 20067 */ // Label 594: @20067
6933 /* 20067 */ GIM_Try, /*On fail goto*//*Label 601*/ GIMT_Encode4(20277),
6934 /* 20072 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6935 /* 20076 */ GIM_Try, /*On fail goto*//*Label 602*/ GIMT_Encode4(20176),
6936 /* 20081 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6937 /* 20085 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 603*/ GIMT_Encode4(20130), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 572 //
6938 /* 20092 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6939 /* 20096 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6940 /* 20103 */ // (st I32:{ *:[i32] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_I32_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, i32:{ *:[i32] }:$val)
6941 /* 20103 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_I32_A32),
6942 /* 20106 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6943 /* 20109 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6944 /* 20114 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6945 /* 20119 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
6946 /* 20121 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6947 /* 20124 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6948 /* 20128 */ GIR_RootConstrainSelectedInstOperands,
6949 /* 20129 */ // GIR_Coverage, 572,
6950 /* 20129 */ GIR_EraseRootFromParent_Done,
6951 /* 20130 */ // Label 603: @20130
6952 /* 20130 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 604*/ GIMT_Encode4(20175), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 573 //
6953 /* 20137 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6954 /* 20141 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6955 /* 20148 */ // (st I32:{ *:[i32] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_I32_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, i32:{ *:[i32] }:$val)
6956 /* 20148 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_I32_A64),
6957 /* 20151 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6958 /* 20154 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6959 /* 20159 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6960 /* 20164 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
6961 /* 20166 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6962 /* 20169 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6963 /* 20173 */ GIR_RootConstrainSelectedInstOperands,
6964 /* 20174 */ // GIR_Coverage, 573,
6965 /* 20174 */ GIR_EraseRootFromParent_Done,
6966 /* 20175 */ // Label 604: @20175
6967 /* 20175 */ GIM_Reject,
6968 /* 20176 */ // Label 602: @20176
6969 /* 20176 */ GIM_Try, /*On fail goto*//*Label 605*/ GIMT_Encode4(20276),
6970 /* 20181 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6971 /* 20185 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 606*/ GIMT_Encode4(20230), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 576 //
6972 /* 20192 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6973 /* 20196 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6974 /* 20203 */ // (st F32:{ *:[f32] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_F32_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, f32:{ *:[f32] }:$val)
6975 /* 20203 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_F32_A32),
6976 /* 20206 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6977 /* 20209 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6978 /* 20214 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6979 /* 20219 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
6980 /* 20221 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6981 /* 20224 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6982 /* 20228 */ GIR_RootConstrainSelectedInstOperands,
6983 /* 20229 */ // GIR_Coverage, 576,
6984 /* 20229 */ GIR_EraseRootFromParent_Done,
6985 /* 20230 */ // Label 606: @20230
6986 /* 20230 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 607*/ GIMT_Encode4(20275), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 577 //
6987 /* 20237 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6988 /* 20241 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6989 /* 20248 */ // (st F32:{ *:[f32] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_F32_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, f32:{ *:[f32] }:$val)
6990 /* 20248 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_F32_A64),
6991 /* 20251 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6992 /* 20254 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6993 /* 20259 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6994 /* 20264 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
6995 /* 20266 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6996 /* 20269 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6997 /* 20273 */ GIR_RootConstrainSelectedInstOperands,
6998 /* 20274 */ // GIR_Coverage, 577,
6999 /* 20274 */ GIR_EraseRootFromParent_Done,
7000 /* 20275 */ // Label 607: @20275
7001 /* 20275 */ GIM_Reject,
7002 /* 20276 */ // Label 605: @20276
7003 /* 20276 */ GIM_Reject,
7004 /* 20277 */ // Label 601: @20277
7005 /* 20277 */ GIM_Reject,
7006 /* 20278 */ // Label 593: @20278
7007 /* 20278 */ GIM_Reject,
7008 /* 20279 */ // Label 587: @20279
7009 /* 20279 */ GIM_Try, /*On fail goto*//*Label 608*/ GIMT_Encode4(20829),
7010 /* 20284 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7011 /* 20287 */ GIM_Try, /*On fail goto*//*Label 609*/ GIMT_Encode4(20618),
7012 /* 20292 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
7013 /* 20296 */ GIM_Try, /*On fail goto*//*Label 610*/ GIMT_Encode4(20403),
7014 /* 20301 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(1),
7015 /* 20308 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7016 /* 20312 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 611*/ GIMT_Encode4(20357), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 584 //
7017 /* 20319 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7018 /* 20323 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7019 /* 20330 */ // (st I64:{ *:[i64] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei8>> => (STORE8_I64_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, i64:{ *:[i64] }:$val)
7020 /* 20330 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE8_I64_A32),
7021 /* 20333 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7022 /* 20336 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7023 /* 20341 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7024 /* 20346 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7025 /* 20348 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7026 /* 20351 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7027 /* 20355 */ GIR_RootConstrainSelectedInstOperands,
7028 /* 20356 */ // GIR_Coverage, 584,
7029 /* 20356 */ GIR_EraseRootFromParent_Done,
7030 /* 20357 */ // Label 611: @20357
7031 /* 20357 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 612*/ GIMT_Encode4(20402), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 585 //
7032 /* 20364 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7033 /* 20368 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7034 /* 20375 */ // (st I64:{ *:[i64] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei8>> => (STORE8_I64_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, i64:{ *:[i64] }:$val)
7035 /* 20375 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE8_I64_A64),
7036 /* 20378 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7037 /* 20381 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7038 /* 20386 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7039 /* 20391 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7040 /* 20393 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7041 /* 20396 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7042 /* 20400 */ GIR_RootConstrainSelectedInstOperands,
7043 /* 20401 */ // GIR_Coverage, 585,
7044 /* 20401 */ GIR_EraseRootFromParent_Done,
7045 /* 20402 */ // Label 612: @20402
7046 /* 20402 */ GIM_Reject,
7047 /* 20403 */ // Label 610: @20403
7048 /* 20403 */ GIM_Try, /*On fail goto*//*Label 613*/ GIMT_Encode4(20510),
7049 /* 20408 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
7050 /* 20415 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7051 /* 20419 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 614*/ GIMT_Encode4(20464), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 586 //
7052 /* 20426 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7053 /* 20430 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7054 /* 20437 */ // (st I64:{ *:[i64] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei16>> => (STORE16_I64_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, i64:{ *:[i64] }:$val)
7055 /* 20437 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE16_I64_A32),
7056 /* 20440 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7057 /* 20443 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7058 /* 20448 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7059 /* 20453 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7060 /* 20455 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7061 /* 20458 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7062 /* 20462 */ GIR_RootConstrainSelectedInstOperands,
7063 /* 20463 */ // GIR_Coverage, 586,
7064 /* 20463 */ GIR_EraseRootFromParent_Done,
7065 /* 20464 */ // Label 614: @20464
7066 /* 20464 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 615*/ GIMT_Encode4(20509), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 587 //
7067 /* 20471 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7068 /* 20475 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7069 /* 20482 */ // (st I64:{ *:[i64] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei16>> => (STORE16_I64_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, i64:{ *:[i64] }:$val)
7070 /* 20482 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE16_I64_A64),
7071 /* 20485 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7072 /* 20488 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7073 /* 20493 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7074 /* 20498 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7075 /* 20500 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7076 /* 20503 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7077 /* 20507 */ GIR_RootConstrainSelectedInstOperands,
7078 /* 20508 */ // GIR_Coverage, 587,
7079 /* 20508 */ GIR_EraseRootFromParent_Done,
7080 /* 20509 */ // Label 615: @20509
7081 /* 20509 */ GIM_Reject,
7082 /* 20510 */ // Label 613: @20510
7083 /* 20510 */ GIM_Try, /*On fail goto*//*Label 616*/ GIMT_Encode4(20617),
7084 /* 20515 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(4),
7085 /* 20522 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7086 /* 20526 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 617*/ GIMT_Encode4(20571), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 588 //
7087 /* 20533 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7088 /* 20537 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7089 /* 20544 */ // (st I64:{ *:[i64] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei32>> => (STORE32_I64_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, i64:{ *:[i64] }:$val)
7090 /* 20544 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE32_I64_A32),
7091 /* 20547 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7092 /* 20550 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7093 /* 20555 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7094 /* 20560 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7095 /* 20562 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7096 /* 20565 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7097 /* 20569 */ GIR_RootConstrainSelectedInstOperands,
7098 /* 20570 */ // GIR_Coverage, 588,
7099 /* 20570 */ GIR_EraseRootFromParent_Done,
7100 /* 20571 */ // Label 617: @20571
7101 /* 20571 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 618*/ GIMT_Encode4(20616), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 589 //
7102 /* 20578 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7103 /* 20582 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7104 /* 20589 */ // (st I64:{ *:[i64] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei32>> => (STORE32_I64_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, i64:{ *:[i64] }:$val)
7105 /* 20589 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE32_I64_A64),
7106 /* 20592 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7107 /* 20595 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7108 /* 20600 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7109 /* 20605 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7110 /* 20607 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7111 /* 20610 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7112 /* 20614 */ GIR_RootConstrainSelectedInstOperands,
7113 /* 20615 */ // GIR_Coverage, 589,
7114 /* 20615 */ GIR_EraseRootFromParent_Done,
7115 /* 20616 */ // Label 618: @20616
7116 /* 20616 */ GIM_Reject,
7117 /* 20617 */ // Label 616: @20617
7118 /* 20617 */ GIM_Reject,
7119 /* 20618 */ // Label 609: @20618
7120 /* 20618 */ GIM_Try, /*On fail goto*//*Label 619*/ GIMT_Encode4(20828),
7121 /* 20623 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
7122 /* 20627 */ GIM_Try, /*On fail goto*//*Label 620*/ GIMT_Encode4(20727),
7123 /* 20632 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7124 /* 20636 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 621*/ GIMT_Encode4(20681), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 574 //
7125 /* 20643 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7126 /* 20647 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7127 /* 20654 */ // (st I64:{ *:[i64] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_I64_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, i64:{ *:[i64] }:$val)
7128 /* 20654 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_I64_A32),
7129 /* 20657 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7130 /* 20660 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7131 /* 20665 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7132 /* 20670 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7133 /* 20672 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7134 /* 20675 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7135 /* 20679 */ GIR_RootConstrainSelectedInstOperands,
7136 /* 20680 */ // GIR_Coverage, 574,
7137 /* 20680 */ GIR_EraseRootFromParent_Done,
7138 /* 20681 */ // Label 621: @20681
7139 /* 20681 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 622*/ GIMT_Encode4(20726), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 575 //
7140 /* 20688 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7141 /* 20692 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7142 /* 20699 */ // (st I64:{ *:[i64] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_I64_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, i64:{ *:[i64] }:$val)
7143 /* 20699 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_I64_A64),
7144 /* 20702 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7145 /* 20705 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7146 /* 20710 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7147 /* 20715 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7148 /* 20717 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7149 /* 20720 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7150 /* 20724 */ GIR_RootConstrainSelectedInstOperands,
7151 /* 20725 */ // GIR_Coverage, 575,
7152 /* 20725 */ GIR_EraseRootFromParent_Done,
7153 /* 20726 */ // Label 622: @20726
7154 /* 20726 */ GIM_Reject,
7155 /* 20727 */ // Label 620: @20727
7156 /* 20727 */ GIM_Try, /*On fail goto*//*Label 623*/ GIMT_Encode4(20827),
7157 /* 20732 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
7158 /* 20736 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 624*/ GIMT_Encode4(20781), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 578 //
7159 /* 20743 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7160 /* 20747 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7161 /* 20754 */ // (st F64:{ *:[f64] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_F64_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, f64:{ *:[f64] }:$val)
7162 /* 20754 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_F64_A32),
7163 /* 20757 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7164 /* 20760 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7165 /* 20765 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7166 /* 20770 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7167 /* 20772 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7168 /* 20775 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7169 /* 20779 */ GIR_RootConstrainSelectedInstOperands,
7170 /* 20780 */ // GIR_Coverage, 578,
7171 /* 20780 */ GIR_EraseRootFromParent_Done,
7172 /* 20781 */ // Label 624: @20781
7173 /* 20781 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 625*/ GIMT_Encode4(20826), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 579 //
7174 /* 20788 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7175 /* 20792 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7176 /* 20799 */ // (st F64:{ *:[f64] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_F64_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, f64:{ *:[f64] }:$val)
7177 /* 20799 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_F64_A64),
7178 /* 20802 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7179 /* 20805 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7180 /* 20810 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7181 /* 20815 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7182 /* 20817 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7183 /* 20820 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7184 /* 20824 */ GIR_RootConstrainSelectedInstOperands,
7185 /* 20825 */ // GIR_Coverage, 579,
7186 /* 20825 */ GIR_EraseRootFromParent_Done,
7187 /* 20826 */ // Label 625: @20826
7188 /* 20826 */ GIM_Reject,
7189 /* 20827 */ // Label 623: @20827
7190 /* 20827 */ GIM_Reject,
7191 /* 20828 */ // Label 619: @20828
7192 /* 20828 */ GIM_Reject,
7193 /* 20829 */ // Label 608: @20829
7194 /* 20829 */ GIM_Reject,
7195 /* 20830 */ // Label 588: @20830
7196 /* 20830 */ GIM_Try, /*On fail goto*//*Label 626*/ GIMT_Encode4(20937),
7197 /* 20835 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7198 /* 20838 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
7199 /* 20842 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7200 /* 20846 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 627*/ GIMT_Encode4(20891), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 939 //
7201 /* 20853 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7202 /* 20857 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7203 /* 20864 */ // (st V128:{ *:[v16i8] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, v16i8:{ *:[v16i8] }:$val)
7204 /* 20864 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A32),
7205 /* 20867 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7206 /* 20870 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7207 /* 20875 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7208 /* 20880 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7209 /* 20882 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7210 /* 20885 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7211 /* 20889 */ GIR_RootConstrainSelectedInstOperands,
7212 /* 20890 */ // GIR_Coverage, 939,
7213 /* 20890 */ GIR_EraseRootFromParent_Done,
7214 /* 20891 */ // Label 627: @20891
7215 /* 20891 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 628*/ GIMT_Encode4(20936), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 940 //
7216 /* 20898 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7217 /* 20902 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7218 /* 20909 */ // (st V128:{ *:[v16i8] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, v16i8:{ *:[v16i8] }:$val)
7219 /* 20909 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A64),
7220 /* 20912 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7221 /* 20915 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7222 /* 20920 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7223 /* 20925 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7224 /* 20927 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7225 /* 20930 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7226 /* 20934 */ GIR_RootConstrainSelectedInstOperands,
7227 /* 20935 */ // GIR_Coverage, 940,
7228 /* 20935 */ GIR_EraseRootFromParent_Done,
7229 /* 20936 */ // Label 628: @20936
7230 /* 20936 */ GIM_Reject,
7231 /* 20937 */ // Label 626: @20937
7232 /* 20937 */ GIM_Reject,
7233 /* 20938 */ // Label 589: @20938
7234 /* 20938 */ GIM_Try, /*On fail goto*//*Label 629*/ GIMT_Encode4(21135),
7235 /* 20943 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7236 /* 20946 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
7237 /* 20950 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7238 /* 20954 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 630*/ GIMT_Encode4(20999), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 941 //
7239 /* 20961 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7240 /* 20965 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7241 /* 20972 */ // (st V128:{ *:[v8i16] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, v8i16:{ *:[v8i16] }:$val)
7242 /* 20972 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A32),
7243 /* 20975 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7244 /* 20978 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7245 /* 20983 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7246 /* 20988 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7247 /* 20990 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7248 /* 20993 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7249 /* 20997 */ GIR_RootConstrainSelectedInstOperands,
7250 /* 20998 */ // GIR_Coverage, 941,
7251 /* 20998 */ GIR_EraseRootFromParent_Done,
7252 /* 20999 */ // Label 630: @20999
7253 /* 20999 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 631*/ GIMT_Encode4(21044), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 942 //
7254 /* 21006 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7255 /* 21010 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7256 /* 21017 */ // (st V128:{ *:[v8i16] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, v8i16:{ *:[v8i16] }:$val)
7257 /* 21017 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A64),
7258 /* 21020 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7259 /* 21023 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7260 /* 21028 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7261 /* 21033 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7262 /* 21035 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7263 /* 21038 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7264 /* 21042 */ GIR_RootConstrainSelectedInstOperands,
7265 /* 21043 */ // GIR_Coverage, 942,
7266 /* 21043 */ GIR_EraseRootFromParent_Done,
7267 /* 21044 */ // Label 631: @21044
7268 /* 21044 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 632*/ GIMT_Encode4(21089), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 951 //
7269 /* 21051 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7270 /* 21055 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7271 /* 21062 */ // (st V128:{ *:[v8f16] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, v8f16:{ *:[v8f16] }:$val)
7272 /* 21062 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A32),
7273 /* 21065 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7274 /* 21068 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7275 /* 21073 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7276 /* 21078 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7277 /* 21080 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7278 /* 21083 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7279 /* 21087 */ GIR_RootConstrainSelectedInstOperands,
7280 /* 21088 */ // GIR_Coverage, 951,
7281 /* 21088 */ GIR_EraseRootFromParent_Done,
7282 /* 21089 */ // Label 632: @21089
7283 /* 21089 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 633*/ GIMT_Encode4(21134), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 952 //
7284 /* 21096 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7285 /* 21100 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7286 /* 21107 */ // (st V128:{ *:[v8f16] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, v8f16:{ *:[v8f16] }:$val)
7287 /* 21107 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A64),
7288 /* 21110 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7289 /* 21113 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7290 /* 21118 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7291 /* 21123 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7292 /* 21125 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7293 /* 21128 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7294 /* 21132 */ GIR_RootConstrainSelectedInstOperands,
7295 /* 21133 */ // GIR_Coverage, 952,
7296 /* 21133 */ GIR_EraseRootFromParent_Done,
7297 /* 21134 */ // Label 633: @21134
7298 /* 21134 */ GIM_Reject,
7299 /* 21135 */ // Label 629: @21135
7300 /* 21135 */ GIM_Reject,
7301 /* 21136 */ // Label 590: @21136
7302 /* 21136 */ GIM_Try, /*On fail goto*//*Label 634*/ GIMT_Encode4(21333),
7303 /* 21141 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7304 /* 21144 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
7305 /* 21148 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7306 /* 21152 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 635*/ GIMT_Encode4(21197), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 943 //
7307 /* 21159 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7308 /* 21163 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7309 /* 21170 */ // (st V128:{ *:[v4i32] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, v4i32:{ *:[v4i32] }:$val)
7310 /* 21170 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A32),
7311 /* 21173 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7312 /* 21176 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7313 /* 21181 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7314 /* 21186 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7315 /* 21188 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7316 /* 21191 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7317 /* 21195 */ GIR_RootConstrainSelectedInstOperands,
7318 /* 21196 */ // GIR_Coverage, 943,
7319 /* 21196 */ GIR_EraseRootFromParent_Done,
7320 /* 21197 */ // Label 635: @21197
7321 /* 21197 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 636*/ GIMT_Encode4(21242), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 944 //
7322 /* 21204 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7323 /* 21208 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7324 /* 21215 */ // (st V128:{ *:[v4i32] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, v4i32:{ *:[v4i32] }:$val)
7325 /* 21215 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A64),
7326 /* 21218 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7327 /* 21221 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7328 /* 21226 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7329 /* 21231 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7330 /* 21233 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7331 /* 21236 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7332 /* 21240 */ GIR_RootConstrainSelectedInstOperands,
7333 /* 21241 */ // GIR_Coverage, 944,
7334 /* 21241 */ GIR_EraseRootFromParent_Done,
7335 /* 21242 */ // Label 636: @21242
7336 /* 21242 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 637*/ GIMT_Encode4(21287), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 947 //
7337 /* 21249 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7338 /* 21253 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7339 /* 21260 */ // (st V128:{ *:[v4f32] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, v4f32:{ *:[v4f32] }:$val)
7340 /* 21260 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A32),
7341 /* 21263 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7342 /* 21266 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7343 /* 21271 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7344 /* 21276 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7345 /* 21278 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7346 /* 21281 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7347 /* 21285 */ GIR_RootConstrainSelectedInstOperands,
7348 /* 21286 */ // GIR_Coverage, 947,
7349 /* 21286 */ GIR_EraseRootFromParent_Done,
7350 /* 21287 */ // Label 637: @21287
7351 /* 21287 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 638*/ GIMT_Encode4(21332), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 948 //
7352 /* 21294 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7353 /* 21298 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7354 /* 21305 */ // (st V128:{ *:[v4f32] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, v4f32:{ *:[v4f32] }:$val)
7355 /* 21305 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A64),
7356 /* 21308 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7357 /* 21311 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7358 /* 21316 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7359 /* 21321 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7360 /* 21323 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7361 /* 21326 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7362 /* 21330 */ GIR_RootConstrainSelectedInstOperands,
7363 /* 21331 */ // GIR_Coverage, 948,
7364 /* 21331 */ GIR_EraseRootFromParent_Done,
7365 /* 21332 */ // Label 638: @21332
7366 /* 21332 */ GIM_Reject,
7367 /* 21333 */ // Label 634: @21333
7368 /* 21333 */ GIM_Reject,
7369 /* 21334 */ // Label 591: @21334
7370 /* 21334 */ GIM_Try, /*On fail goto*//*Label 639*/ GIMT_Encode4(21531),
7371 /* 21339 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7372 /* 21342 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
7373 /* 21346 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7374 /* 21350 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 640*/ GIMT_Encode4(21395), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 945 //
7375 /* 21357 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7376 /* 21361 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7377 /* 21368 */ // (st V128:{ *:[v2i64] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, v2i64:{ *:[v2i64] }:$val)
7378 /* 21368 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A32),
7379 /* 21371 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7380 /* 21374 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7381 /* 21379 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7382 /* 21384 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7383 /* 21386 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7384 /* 21389 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7385 /* 21393 */ GIR_RootConstrainSelectedInstOperands,
7386 /* 21394 */ // GIR_Coverage, 945,
7387 /* 21394 */ GIR_EraseRootFromParent_Done,
7388 /* 21395 */ // Label 640: @21395
7389 /* 21395 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 641*/ GIMT_Encode4(21440), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 946 //
7390 /* 21402 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7391 /* 21406 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7392 /* 21413 */ // (st V128:{ *:[v2i64] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, v2i64:{ *:[v2i64] }:$val)
7393 /* 21413 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A64),
7394 /* 21416 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7395 /* 21419 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7396 /* 21424 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7397 /* 21429 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7398 /* 21431 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7399 /* 21434 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7400 /* 21438 */ GIR_RootConstrainSelectedInstOperands,
7401 /* 21439 */ // GIR_Coverage, 946,
7402 /* 21439 */ GIR_EraseRootFromParent_Done,
7403 /* 21440 */ // Label 641: @21440
7404 /* 21440 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 642*/ GIMT_Encode4(21485), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 949 //
7405 /* 21447 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7406 /* 21451 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7407 /* 21458 */ // (st V128:{ *:[v2f64] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, v2f64:{ *:[v2f64] }:$val)
7408 /* 21458 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A32),
7409 /* 21461 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7410 /* 21464 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7411 /* 21469 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7412 /* 21474 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7413 /* 21476 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7414 /* 21479 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7415 /* 21483 */ GIR_RootConstrainSelectedInstOperands,
7416 /* 21484 */ // GIR_Coverage, 949,
7417 /* 21484 */ GIR_EraseRootFromParent_Done,
7418 /* 21485 */ // Label 642: @21485
7419 /* 21485 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 643*/ GIMT_Encode4(21530), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 950 //
7420 /* 21492 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7421 /* 21496 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7422 /* 21503 */ // (st V128:{ *:[v2f64] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, v2f64:{ *:[v2f64] }:$val)
7423 /* 21503 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A64),
7424 /* 21506 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7425 /* 21509 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7426 /* 21514 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7427 /* 21519 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7428 /* 21521 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7429 /* 21524 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7430 /* 21528 */ GIR_RootConstrainSelectedInstOperands,
7431 /* 21529 */ // GIR_Coverage, 950,
7432 /* 21529 */ GIR_EraseRootFromParent_Done,
7433 /* 21530 */ // Label 643: @21530
7434 /* 21530 */ GIM_Reject,
7435 /* 21531 */ // Label 639: @21531
7436 /* 21531 */ GIM_Reject,
7437 /* 21532 */ // Label 592: @21532
7438 /* 21532 */ GIM_Reject,
7439 /* 21533 */ // Label 21: @21533
7440 /* 21533 */ GIM_Try, /*On fail goto*//*Label 644*/ GIMT_Encode4(21650),
7441 /* 21538 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_f32,
7442 /* 21541 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7443 /* 21544 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
7444 /* 21548 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
7445 /* 21555 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
7446 /* 21559 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 645*/ GIMT_Encode4(21604), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 590 //
7447 /* 21566 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7448 /* 21570 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7449 /* 21577 */ // (st F32:{ *:[f32] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstoref16>> => (STORE_F16_F32_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, f32:{ *:[f32] }:$val)
7450 /* 21577 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_F16_F32_A32),
7451 /* 21580 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7452 /* 21583 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7453 /* 21588 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7454 /* 21593 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7455 /* 21595 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7456 /* 21598 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7457 /* 21602 */ GIR_RootConstrainSelectedInstOperands,
7458 /* 21603 */ // GIR_Coverage, 590,
7459 /* 21603 */ GIR_EraseRootFromParent_Done,
7460 /* 21604 */ // Label 645: @21604
7461 /* 21604 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 646*/ GIMT_Encode4(21649), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 591 //
7462 /* 21611 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7463 /* 21615 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7464 /* 21622 */ // (st F32:{ *:[f32] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstoref16>> => (STORE_F16_F32_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, f32:{ *:[f32] }:$val)
7465 /* 21622 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_F16_F32_A64),
7466 /* 21625 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7467 /* 21628 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7468 /* 21633 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7469 /* 21638 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7470 /* 21640 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7471 /* 21643 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7472 /* 21647 */ GIR_RootConstrainSelectedInstOperands,
7473 /* 21648 */ // GIR_Coverage, 591,
7474 /* 21648 */ GIR_EraseRootFromParent_Done,
7475 /* 21649 */ // Label 646: @21649
7476 /* 21649 */ GIM_Reject,
7477 /* 21650 */ // Label 644: @21650
7478 /* 21650 */ GIM_Reject,
7479 /* 21651 */ // Label 22: @21651
7480 /* 21651 */ GIM_Try, /*On fail goto*//*Label 647*/ GIMT_Encode4(21678), // Rule ID 17 //
7481 /* 21656 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
7482 /* 21659 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7483 /* 21663 */ // MIs[0] dst
7484 /* 21663 */ GIM_CheckIsMBB, /*MI*/0, /*Op*/1,
7485 /* 21666 */ // (brcond I32:{ *:[i32] }:$cond, (bb:{ *:[Other] }):$dst) => (BR_IF (bb:{ *:[Other] }):$dst, I32:{ *:[i32] }:$cond)
7486 /* 21666 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BR_IF),
7487 /* 21669 */ GIR_RootToRootCopy, /*OpIdx*/1, // dst
7488 /* 21671 */ GIR_RootToRootCopy, /*OpIdx*/0, // cond
7489 /* 21673 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7490 /* 21676 */ GIR_RootConstrainSelectedInstOperands,
7491 /* 21677 */ // GIR_Coverage, 17,
7492 /* 21677 */ GIR_EraseRootFromParent_Done,
7493 /* 21678 */ // Label 647: @21678
7494 /* 21678 */ GIM_Reject,
7495 /* 21679 */ // Label 23: @21679
7496 /* 21679 */ GIM_Try, /*On fail goto*//*Label 648*/ GIMT_Encode4(23067),
7497 /* 21684 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
7498 /* 21687 */ GIM_Try, /*On fail goto*//*Label 649*/ GIMT_Encode4(21999),
7499 /* 21692 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_splat_f16x8),
7500 /* 21697 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
7501 /* 21700 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
7502 /* 21703 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7503 /* 21707 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 650*/ GIMT_Encode4(21771), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 882 //
7504 /* 21714 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7505 /* 21718 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS),
7506 /* 21722 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7507 /* 21725 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_loadf16_f32),
7508 /* 21730 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/2, /*SizeInBits*/32,
7509 /* 21734 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7510 /* 21736 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7511 /* 21743 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14733:{ *:[iPTR] }, (intrinsic_w_chain:{ *:[f32] } 14696:{ *:[iPTR] }, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))) => (LOAD16_SPLAT_A32:{ *:[v8f16] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
7512 /* 21743 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_SPLAT_A32),
7513 /* 21746 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7514 /* 21748 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7515 /* 21751 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7516 /* 21756 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7517 /* 21761 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7518 /* 21764 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7519 /* 21769 */ GIR_RootConstrainSelectedInstOperands,
7520 /* 21770 */ // GIR_Coverage, 882,
7521 /* 21770 */ GIR_EraseRootFromParent_Done,
7522 /* 21771 */ // Label 650: @21771
7523 /* 21771 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 651*/ GIMT_Encode4(21835), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 884 //
7524 /* 21778 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7525 /* 21782 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS),
7526 /* 21786 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7527 /* 21789 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_loadf16_f32),
7528 /* 21794 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/2, /*SizeInBits*/64,
7529 /* 21798 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7530 /* 21800 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7531 /* 21807 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14733:{ *:[iPTR] }, (intrinsic_w_chain:{ *:[f32] } 14696:{ *:[iPTR] }, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))) => (LOAD16_SPLAT_A64:{ *:[v8f16] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
7532 /* 21807 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_SPLAT_A64),
7533 /* 21810 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7534 /* 21812 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7535 /* 21815 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7536 /* 21820 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7537 /* 21825 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7538 /* 21828 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7539 /* 21833 */ GIR_RootConstrainSelectedInstOperands,
7540 /* 21834 */ // GIR_Coverage, 884,
7541 /* 21834 */ GIR_EraseRootFromParent_Done,
7542 /* 21835 */ // Label 651: @21835
7543 /* 21835 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 652*/ GIMT_Encode4(21905), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 881 //
7544 /* 21842 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7545 /* 21846 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FPEXTLOAD),
7546 /* 21850 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7547 /* 21853 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
7548 /* 21857 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(2),
7549 /* 21864 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
7550 /* 21868 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7551 /* 21870 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7552 /* 21877 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14733:{ *:[iPTR] }, (ld:{ *:[f32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadf16>>) => (LOAD16_SPLAT_A32:{ *:[v8f16] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
7553 /* 21877 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_SPLAT_A32),
7554 /* 21880 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7555 /* 21882 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7556 /* 21885 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7557 /* 21890 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7558 /* 21895 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7559 /* 21898 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7560 /* 21903 */ GIR_RootConstrainSelectedInstOperands,
7561 /* 21904 */ // GIR_Coverage, 881,
7562 /* 21904 */ GIR_EraseRootFromParent_Done,
7563 /* 21905 */ // Label 652: @21905
7564 /* 21905 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 653*/ GIMT_Encode4(21975), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 883 //
7565 /* 21912 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7566 /* 21916 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FPEXTLOAD),
7567 /* 21920 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7568 /* 21923 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
7569 /* 21927 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(2),
7570 /* 21934 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
7571 /* 21938 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7572 /* 21940 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7573 /* 21947 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14733:{ *:[iPTR] }, (ld:{ *:[f32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadf16>>) => (LOAD16_SPLAT_A64:{ *:[v8f16] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
7574 /* 21947 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_SPLAT_A64),
7575 /* 21950 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7576 /* 21952 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7577 /* 21955 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7578 /* 21960 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7579 /* 21965 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7580 /* 21968 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7581 /* 21973 */ GIR_RootConstrainSelectedInstOperands,
7582 /* 21974 */ // GIR_Coverage, 883,
7583 /* 21974 */ GIR_EraseRootFromParent_Done,
7584 /* 21975 */ // Label 653: @21975
7585 /* 21975 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 654*/ GIMT_Encode4(21998), GIMT_Encode2(GIFBS_HasFP16), // Rule ID 186 //
7586 /* 21982 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
7587 /* 21986 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14733:{ *:[iPTR] }, F32:{ *:[f32] }:$x) => (SPLAT_F16x8:{ *:[v8f16] } F32:{ *:[f32] }:$x)
7588 /* 21986 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_F16x8),
7589 /* 21989 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7590 /* 21991 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
7591 /* 21993 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7592 /* 21996 */ GIR_RootConstrainSelectedInstOperands,
7593 /* 21997 */ // GIR_Coverage, 186,
7594 /* 21997 */ GIR_EraseRootFromParent_Done,
7595 /* 21998 */ // Label 654: @21998
7596 /* 21998 */ GIM_Reject,
7597 /* 21999 */ // Label 649: @21999
7598 /* 21999 */ GIM_Try, /*On fail goto*//*Label 655*/ GIMT_Encode4(22152),
7599 /* 22004 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
7600 /* 22009 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
7601 /* 22012 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(12), GIMT_Encode2(16), /*)*//*default:*//*Label 660*/ GIMT_Encode4(22151),
7602 /* 22023 */ /*GILLT_v16i8*//*Label 656*/ GIMT_Encode4(22039),
7603 /* 22027 */ /*GILLT_v8i16*//*Label 657*/ GIMT_Encode4(22067),
7604 /* 22031 */ /*GILLT_v4i32*//*Label 658*/ GIMT_Encode4(22095),
7605 /* 22035 */ /*GILLT_v2i64*//*Label 659*/ GIMT_Encode4(22123),
7606 /* 22039 */ // Label 656: @22039
7607 /* 22039 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 661*/ GIMT_Encode4(22066), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 258 //
7608 /* 22046 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7609 /* 22050 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7610 /* 22054 */ // (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v16i8] }:$vec) => (ALLTRUE_I8x16:{ *:[i32] } V128:{ *:[v16i8] }:$vec)
7611 /* 22054 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
7612 /* 22057 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7613 /* 22059 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
7614 /* 22061 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7615 /* 22064 */ GIR_RootConstrainSelectedInstOperands,
7616 /* 22065 */ // GIR_Coverage, 258,
7617 /* 22065 */ GIR_EraseRootFromParent_Done,
7618 /* 22066 */ // Label 661: @22066
7619 /* 22066 */ GIM_Reject,
7620 /* 22067 */ // Label 657: @22067
7621 /* 22067 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 662*/ GIMT_Encode4(22094), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 259 //
7622 /* 22074 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7623 /* 22078 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7624 /* 22082 */ // (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v8i16] }:$vec) => (ALLTRUE_I16x8:{ *:[i32] } V128:{ *:[v8i16] }:$vec)
7625 /* 22082 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
7626 /* 22085 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7627 /* 22087 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
7628 /* 22089 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7629 /* 22092 */ GIR_RootConstrainSelectedInstOperands,
7630 /* 22093 */ // GIR_Coverage, 259,
7631 /* 22093 */ GIR_EraseRootFromParent_Done,
7632 /* 22094 */ // Label 662: @22094
7633 /* 22094 */ GIM_Reject,
7634 /* 22095 */ // Label 658: @22095
7635 /* 22095 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 663*/ GIMT_Encode4(22122), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 260 //
7636 /* 22102 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7637 /* 22106 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7638 /* 22110 */ // (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v4i32] }:$vec) => (ALLTRUE_I32x4:{ *:[i32] } V128:{ *:[v4i32] }:$vec)
7639 /* 22110 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
7640 /* 22113 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7641 /* 22115 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
7642 /* 22117 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7643 /* 22120 */ GIR_RootConstrainSelectedInstOperands,
7644 /* 22121 */ // GIR_Coverage, 260,
7645 /* 22121 */ GIR_EraseRootFromParent_Done,
7646 /* 22122 */ // Label 663: @22122
7647 /* 22122 */ GIM_Reject,
7648 /* 22123 */ // Label 659: @22123
7649 /* 22123 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 664*/ GIMT_Encode4(22150), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 261 //
7650 /* 22130 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7651 /* 22134 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7652 /* 22138 */ // (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v2i64] }:$vec) => (ALLTRUE_I64x2:{ *:[i32] } V128:{ *:[v2i64] }:$vec)
7653 /* 22138 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
7654 /* 22141 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7655 /* 22143 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
7656 /* 22145 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7657 /* 22148 */ GIR_RootConstrainSelectedInstOperands,
7658 /* 22149 */ // GIR_Coverage, 261,
7659 /* 22149 */ GIR_EraseRootFromParent_Done,
7660 /* 22150 */ // Label 664: @22150
7661 /* 22150 */ GIM_Reject,
7662 /* 22151 */ // Label 660: @22151
7663 /* 22151 */ GIM_Reject,
7664 /* 22152 */ // Label 655: @22152
7665 /* 22152 */ GIM_Try, /*On fail goto*//*Label 665*/ GIMT_Encode4(22305),
7666 /* 22157 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitmask),
7667 /* 22162 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
7668 /* 22165 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(12), GIMT_Encode2(16), /*)*//*default:*//*Label 670*/ GIMT_Encode4(22304),
7669 /* 22176 */ /*GILLT_v16i8*//*Label 666*/ GIMT_Encode4(22192),
7670 /* 22180 */ /*GILLT_v8i16*//*Label 667*/ GIMT_Encode4(22220),
7671 /* 22184 */ /*GILLT_v4i32*//*Label 668*/ GIMT_Encode4(22248),
7672 /* 22188 */ /*GILLT_v2i64*//*Label 669*/ GIMT_Encode4(22276),
7673 /* 22192 */ // Label 666: @22192
7674 /* 22192 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 671*/ GIMT_Encode4(22219), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 262 //
7675 /* 22199 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7676 /* 22203 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7677 /* 22207 */ // (intrinsic_wo_chain:{ *:[i32] } 14685:{ *:[iPTR] }, V128:{ *:[v16i8] }:$vec) => (BITMASK_I8x16:{ *:[i32] } V128:{ *:[v16i8] }:$vec)
7678 /* 22207 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I8x16),
7679 /* 22210 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7680 /* 22212 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
7681 /* 22214 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7682 /* 22217 */ GIR_RootConstrainSelectedInstOperands,
7683 /* 22218 */ // GIR_Coverage, 262,
7684 /* 22218 */ GIR_EraseRootFromParent_Done,
7685 /* 22219 */ // Label 671: @22219
7686 /* 22219 */ GIM_Reject,
7687 /* 22220 */ // Label 667: @22220
7688 /* 22220 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 672*/ GIMT_Encode4(22247), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 263 //
7689 /* 22227 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7690 /* 22231 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7691 /* 22235 */ // (intrinsic_wo_chain:{ *:[i32] } 14685:{ *:[iPTR] }, V128:{ *:[v8i16] }:$vec) => (BITMASK_I16x8:{ *:[i32] } V128:{ *:[v8i16] }:$vec)
7692 /* 22235 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I16x8),
7693 /* 22238 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7694 /* 22240 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
7695 /* 22242 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7696 /* 22245 */ GIR_RootConstrainSelectedInstOperands,
7697 /* 22246 */ // GIR_Coverage, 263,
7698 /* 22246 */ GIR_EraseRootFromParent_Done,
7699 /* 22247 */ // Label 672: @22247
7700 /* 22247 */ GIM_Reject,
7701 /* 22248 */ // Label 668: @22248
7702 /* 22248 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 673*/ GIMT_Encode4(22275), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 264 //
7703 /* 22255 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7704 /* 22259 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7705 /* 22263 */ // (intrinsic_wo_chain:{ *:[i32] } 14685:{ *:[iPTR] }, V128:{ *:[v4i32] }:$vec) => (BITMASK_I32x4:{ *:[i32] } V128:{ *:[v4i32] }:$vec)
7706 /* 22263 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I32x4),
7707 /* 22266 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7708 /* 22268 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
7709 /* 22270 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7710 /* 22273 */ GIR_RootConstrainSelectedInstOperands,
7711 /* 22274 */ // GIR_Coverage, 264,
7712 /* 22274 */ GIR_EraseRootFromParent_Done,
7713 /* 22275 */ // Label 673: @22275
7714 /* 22275 */ GIM_Reject,
7715 /* 22276 */ // Label 669: @22276
7716 /* 22276 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 674*/ GIMT_Encode4(22303), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 265 //
7717 /* 22283 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7718 /* 22287 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7719 /* 22291 */ // (intrinsic_wo_chain:{ *:[i32] } 14685:{ *:[iPTR] }, V128:{ *:[v2i64] }:$vec) => (BITMASK_I64x2:{ *:[i32] } V128:{ *:[v2i64] }:$vec)
7720 /* 22291 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I64x2),
7721 /* 22294 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7722 /* 22296 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
7723 /* 22298 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7724 /* 22301 */ GIR_RootConstrainSelectedInstOperands,
7725 /* 22302 */ // GIR_Coverage, 265,
7726 /* 22302 */ GIR_EraseRootFromParent_Done,
7727 /* 22303 */ // Label 674: @22303
7728 /* 22303 */ GIM_Reject,
7729 /* 22304 */ // Label 670: @22304
7730 /* 22304 */ GIM_Reject,
7731 /* 22305 */ // Label 665: @22305
7732 /* 22305 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 675*/ GIMT_Encode4(22343), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 407 //
7733 /* 22312 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_signed),
7734 /* 22317 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
7735 /* 22320 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
7736 /* 22323 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7737 /* 22327 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7738 /* 22331 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14726:{ *:[iPTR] }, V128:{ *:[v4f32] }:$vec) => (int_wasm_relaxed_trunc_signed_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
7739 /* 22331 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_signed_I32x4),
7740 /* 22334 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7741 /* 22336 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
7742 /* 22338 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7743 /* 22341 */ GIR_RootConstrainSelectedInstOperands,
7744 /* 22342 */ // GIR_Coverage, 407,
7745 /* 22342 */ GIR_EraseRootFromParent_Done,
7746 /* 22343 */ // Label 675: @22343
7747 /* 22343 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 676*/ GIMT_Encode4(22381), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 408 //
7748 /* 22350 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_unsigned),
7749 /* 22355 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
7750 /* 22358 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
7751 /* 22361 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7752 /* 22365 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7753 /* 22369 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14728:{ *:[iPTR] }, V128:{ *:[v4f32] }:$vec) => (int_wasm_relaxed_trunc_unsigned_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
7754 /* 22369 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_unsigned_I32x4),
7755 /* 22372 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7756 /* 22374 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
7757 /* 22376 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7758 /* 22379 */ GIR_RootConstrainSelectedInstOperands,
7759 /* 22380 */ // GIR_Coverage, 408,
7760 /* 22380 */ GIR_EraseRootFromParent_Done,
7761 /* 22381 */ // Label 676: @22381
7762 /* 22381 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 677*/ GIMT_Encode4(22419), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 409 //
7763 /* 22388 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_signed_zero),
7764 /* 22393 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
7765 /* 22396 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
7766 /* 22399 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7767 /* 22403 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7768 /* 22407 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14727:{ *:[iPTR] }, V128:{ *:[v2f64] }:$vec) => (int_wasm_relaxed_trunc_signed_zero_I32x4:{ *:[v4i32] } V128:{ *:[v2f64] }:$vec)
7769 /* 22407 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_signed_zero_I32x4),
7770 /* 22410 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7771 /* 22412 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
7772 /* 22414 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7773 /* 22417 */ GIR_RootConstrainSelectedInstOperands,
7774 /* 22418 */ // GIR_Coverage, 409,
7775 /* 22418 */ GIR_EraseRootFromParent_Done,
7776 /* 22419 */ // Label 677: @22419
7777 /* 22419 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 678*/ GIMT_Encode4(22457), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 410 //
7778 /* 22426 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_unsigned_zero),
7779 /* 22431 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
7780 /* 22434 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
7781 /* 22437 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7782 /* 22441 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7783 /* 22445 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14729:{ *:[iPTR] }, V128:{ *:[v2f64] }:$vec) => (int_wasm_relaxed_trunc_unsigned_zero_I32x4:{ *:[v4i32] } V128:{ *:[v2f64] }:$vec)
7784 /* 22445 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_unsigned_zero_I32x4),
7785 /* 22448 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7786 /* 22450 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
7787 /* 22452 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7788 /* 22455 */ GIR_RootConstrainSelectedInstOperands,
7789 /* 22456 */ // GIR_Coverage, 410,
7790 /* 22456 */ GIR_EraseRootFromParent_Done,
7791 /* 22457 */ // Label 678: @22457
7792 /* 22457 */ GIM_Try, /*On fail goto*//*Label 679*/ GIMT_Encode4(22493), // Rule ID 606 //
7793 /* 22462 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
7794 /* 22467 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
7795 /* 22470 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
7796 /* 22473 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7797 /* 22477 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
7798 /* 22481 */ // (intrinsic_wo_chain:{ *:[i32] } 14756:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I32_TRUNC_S_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
7799 /* 22481 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_F32),
7800 /* 22484 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7801 /* 22486 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
7802 /* 22488 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7803 /* 22491 */ GIR_RootConstrainSelectedInstOperands,
7804 /* 22492 */ // GIR_Coverage, 606,
7805 /* 22492 */ GIR_EraseRootFromParent_Done,
7806 /* 22493 */ // Label 679: @22493
7807 /* 22493 */ GIM_Try, /*On fail goto*//*Label 680*/ GIMT_Encode4(22529), // Rule ID 607 //
7808 /* 22498 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
7809 /* 22503 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
7810 /* 22506 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
7811 /* 22509 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7812 /* 22513 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
7813 /* 22517 */ // (intrinsic_wo_chain:{ *:[i32] } 14757:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I32_TRUNC_U_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
7814 /* 22517 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_F32),
7815 /* 22520 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7816 /* 22522 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
7817 /* 22524 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7818 /* 22527 */ GIR_RootConstrainSelectedInstOperands,
7819 /* 22528 */ // GIR_Coverage, 607,
7820 /* 22528 */ GIR_EraseRootFromParent_Done,
7821 /* 22529 */ // Label 680: @22529
7822 /* 22529 */ GIM_Try, /*On fail goto*//*Label 681*/ GIMT_Encode4(22565), // Rule ID 608 //
7823 /* 22534 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
7824 /* 22539 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
7825 /* 22542 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
7826 /* 22545 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7827 /* 22549 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
7828 /* 22553 */ // (intrinsic_wo_chain:{ *:[i32] } 14756:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I32_TRUNC_S_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
7829 /* 22553 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_F64),
7830 /* 22556 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7831 /* 22558 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
7832 /* 22560 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7833 /* 22563 */ GIR_RootConstrainSelectedInstOperands,
7834 /* 22564 */ // GIR_Coverage, 608,
7835 /* 22564 */ GIR_EraseRootFromParent_Done,
7836 /* 22565 */ // Label 681: @22565
7837 /* 22565 */ GIM_Try, /*On fail goto*//*Label 682*/ GIMT_Encode4(22601), // Rule ID 609 //
7838 /* 22570 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
7839 /* 22575 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
7840 /* 22578 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
7841 /* 22581 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7842 /* 22585 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
7843 /* 22589 */ // (intrinsic_wo_chain:{ *:[i32] } 14757:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I32_TRUNC_U_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
7844 /* 22589 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_F64),
7845 /* 22592 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7846 /* 22594 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
7847 /* 22596 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7848 /* 22599 */ GIR_RootConstrainSelectedInstOperands,
7849 /* 22600 */ // GIR_Coverage, 609,
7850 /* 22600 */ GIR_EraseRootFromParent_Done,
7851 /* 22601 */ // Label 682: @22601
7852 /* 22601 */ GIM_Try, /*On fail goto*//*Label 683*/ GIMT_Encode4(22637), // Rule ID 610 //
7853 /* 22606 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
7854 /* 22611 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
7855 /* 22614 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
7856 /* 22617 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7857 /* 22621 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
7858 /* 22625 */ // (intrinsic_wo_chain:{ *:[i64] } 14756:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I64_TRUNC_S_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
7859 /* 22625 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_F32),
7860 /* 22628 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7861 /* 22630 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
7862 /* 22632 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7863 /* 22635 */ GIR_RootConstrainSelectedInstOperands,
7864 /* 22636 */ // GIR_Coverage, 610,
7865 /* 22636 */ GIR_EraseRootFromParent_Done,
7866 /* 22637 */ // Label 683: @22637
7867 /* 22637 */ GIM_Try, /*On fail goto*//*Label 684*/ GIMT_Encode4(22673), // Rule ID 611 //
7868 /* 22642 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
7869 /* 22647 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
7870 /* 22650 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
7871 /* 22653 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7872 /* 22657 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
7873 /* 22661 */ // (intrinsic_wo_chain:{ *:[i64] } 14757:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I64_TRUNC_U_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
7874 /* 22661 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_F32),
7875 /* 22664 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7876 /* 22666 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
7877 /* 22668 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7878 /* 22671 */ GIR_RootConstrainSelectedInstOperands,
7879 /* 22672 */ // GIR_Coverage, 611,
7880 /* 22672 */ GIR_EraseRootFromParent_Done,
7881 /* 22673 */ // Label 684: @22673
7882 /* 22673 */ GIM_Try, /*On fail goto*//*Label 685*/ GIMT_Encode4(22709), // Rule ID 612 //
7883 /* 22678 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
7884 /* 22683 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
7885 /* 22686 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
7886 /* 22689 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7887 /* 22693 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
7888 /* 22697 */ // (intrinsic_wo_chain:{ *:[i64] } 14756:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I64_TRUNC_S_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
7889 /* 22697 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_F64),
7890 /* 22700 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7891 /* 22702 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
7892 /* 22704 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7893 /* 22707 */ GIR_RootConstrainSelectedInstOperands,
7894 /* 22708 */ // GIR_Coverage, 612,
7895 /* 22708 */ GIR_EraseRootFromParent_Done,
7896 /* 22709 */ // Label 685: @22709
7897 /* 22709 */ GIM_Try, /*On fail goto*//*Label 686*/ GIMT_Encode4(22745), // Rule ID 613 //
7898 /* 22714 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
7899 /* 22719 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
7900 /* 22722 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
7901 /* 22725 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7902 /* 22729 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
7903 /* 22733 */ // (intrinsic_wo_chain:{ *:[i64] } 14757:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I64_TRUNC_U_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
7904 /* 22733 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_F64),
7905 /* 22736 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7906 /* 22738 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
7907 /* 22740 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7908 /* 22743 */ GIR_RootConstrainSelectedInstOperands,
7909 /* 22744 */ // GIR_Coverage, 613,
7910 /* 22744 */ GIR_EraseRootFromParent_Done,
7911 /* 22745 */ // Label 686: @22745
7912 /* 22745 */ GIM_Try, /*On fail goto*//*Label 687*/ GIMT_Encode4(22890),
7913 /* 22750 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
7914 /* 22755 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
7915 /* 22758 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(12), GIMT_Encode2(16), /*)*//*default:*//*Label 692*/ GIMT_Encode4(22889),
7916 /* 22769 */ /*GILLT_v16i8*//*Label 688*/ GIMT_Encode4(22785),
7917 /* 22773 */ /*GILLT_v8i16*//*Label 689*/ GIMT_Encode4(22811),
7918 /* 22777 */ /*GILLT_v4i32*//*Label 690*/ GIMT_Encode4(22837),
7919 /* 22781 */ /*GILLT_v2i64*//*Label 691*/ GIMT_Encode4(22863),
7920 /* 22785 */ // Label 688: @22785
7921 /* 22785 */ GIM_Try, /*On fail goto*//*Label 693*/ GIMT_Encode4(22810), // Rule ID 1099 //
7922 /* 22790 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7923 /* 22794 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7924 /* 22798 */ // (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v16i8] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v16i8] }:$vec)
7925 /* 22798 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7926 /* 22801 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7927 /* 22803 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
7928 /* 22805 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7929 /* 22808 */ GIR_RootConstrainSelectedInstOperands,
7930 /* 22809 */ // GIR_Coverage, 1099,
7931 /* 22809 */ GIR_EraseRootFromParent_Done,
7932 /* 22810 */ // Label 693: @22810
7933 /* 22810 */ GIM_Reject,
7934 /* 22811 */ // Label 689: @22811
7935 /* 22811 */ GIM_Try, /*On fail goto*//*Label 694*/ GIMT_Encode4(22836), // Rule ID 1100 //
7936 /* 22816 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7937 /* 22820 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7938 /* 22824 */ // (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v8i16] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v8i16] }:$vec)
7939 /* 22824 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7940 /* 22827 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7941 /* 22829 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
7942 /* 22831 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7943 /* 22834 */ GIR_RootConstrainSelectedInstOperands,
7944 /* 22835 */ // GIR_Coverage, 1100,
7945 /* 22835 */ GIR_EraseRootFromParent_Done,
7946 /* 22836 */ // Label 694: @22836
7947 /* 22836 */ GIM_Reject,
7948 /* 22837 */ // Label 690: @22837
7949 /* 22837 */ GIM_Try, /*On fail goto*//*Label 695*/ GIMT_Encode4(22862), // Rule ID 1101 //
7950 /* 22842 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7951 /* 22846 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7952 /* 22850 */ // (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v4i32] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v4i32] }:$vec)
7953 /* 22850 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7954 /* 22853 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7955 /* 22855 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
7956 /* 22857 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7957 /* 22860 */ GIR_RootConstrainSelectedInstOperands,
7958 /* 22861 */ // GIR_Coverage, 1101,
7959 /* 22861 */ GIR_EraseRootFromParent_Done,
7960 /* 22862 */ // Label 695: @22862
7961 /* 22862 */ GIM_Reject,
7962 /* 22863 */ // Label 691: @22863
7963 /* 22863 */ GIM_Try, /*On fail goto*//*Label 696*/ GIMT_Encode4(22888), // Rule ID 1102 //
7964 /* 22868 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7965 /* 22872 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7966 /* 22876 */ // (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v2i64] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v2i64] }:$vec)
7967 /* 22876 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
7968 /* 22879 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7969 /* 22881 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
7970 /* 22883 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7971 /* 22886 */ GIR_RootConstrainSelectedInstOperands,
7972 /* 22887 */ // GIR_Coverage, 1102,
7973 /* 22887 */ GIR_EraseRootFromParent_Done,
7974 /* 22888 */ // Label 696: @22888
7975 /* 22888 */ GIM_Reject,
7976 /* 22889 */ // Label 692: @22889
7977 /* 22889 */ GIM_Reject,
7978 /* 22890 */ // Label 687: @22890
7979 /* 22890 */ GIM_Try, /*On fail goto*//*Label 697*/ GIMT_Encode4(22978),
7980 /* 22895 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_unsigned),
7981 /* 22900 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(13), GIMT_Encode2(15), /*)*//*default:*//*Label 700*/ GIMT_Encode4(22977),
7982 /* 22911 */ /*GILLT_v8i16*//*Label 698*/ GIMT_Encode4(22919),
7983 /* 22915 */ /*GILLT_v4i32*//*Label 699*/ GIMT_Encode4(22948),
7984 /* 22919 */ // Label 698: @22919
7985 /* 22919 */ GIM_Try, /*On fail goto*//*Label 701*/ GIMT_Encode4(22947), // Rule ID 1239 //
7986 /* 22924 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
7987 /* 22927 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7988 /* 22931 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7989 /* 22935 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14690:{ *:[iPTR] }, V128:{ *:[v16i8] }:$in) => (extadd_pairwise_u_I16x8:{ *:[v8i16] } V128:{ *:[v16i8] }:$in)
7990 /* 22935 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_u_I16x8),
7991 /* 22938 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7992 /* 22940 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
7993 /* 22942 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7994 /* 22945 */ GIR_RootConstrainSelectedInstOperands,
7995 /* 22946 */ // GIR_Coverage, 1239,
7996 /* 22946 */ GIR_EraseRootFromParent_Done,
7997 /* 22947 */ // Label 701: @22947
7998 /* 22947 */ GIM_Reject,
7999 /* 22948 */ // Label 699: @22948
8000 /* 22948 */ GIM_Try, /*On fail goto*//*Label 702*/ GIMT_Encode4(22976), // Rule ID 1238 //
8001 /* 22953 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8002 /* 22956 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8003 /* 22960 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8004 /* 22964 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14690:{ *:[iPTR] }, V128:{ *:[v8i16] }:$in) => (extadd_pairwise_u_I32x4:{ *:[v4i32] } V128:{ *:[v8i16] }:$in)
8005 /* 22964 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_u_I32x4),
8006 /* 22967 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8007 /* 22969 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
8008 /* 22971 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8009 /* 22974 */ GIR_RootConstrainSelectedInstOperands,
8010 /* 22975 */ // GIR_Coverage, 1238,
8011 /* 22975 */ GIR_EraseRootFromParent_Done,
8012 /* 22976 */ // Label 702: @22976
8013 /* 22976 */ GIM_Reject,
8014 /* 22977 */ // Label 700: @22977
8015 /* 22977 */ GIM_Reject,
8016 /* 22978 */ // Label 697: @22978
8017 /* 22978 */ GIM_Try, /*On fail goto*//*Label 703*/ GIMT_Encode4(23066),
8018 /* 22983 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_signed),
8019 /* 22988 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(13), GIMT_Encode2(15), /*)*//*default:*//*Label 706*/ GIMT_Encode4(23065),
8020 /* 22999 */ /*GILLT_v8i16*//*Label 704*/ GIMT_Encode4(23007),
8021 /* 23003 */ /*GILLT_v4i32*//*Label 705*/ GIMT_Encode4(23036),
8022 /* 23007 */ // Label 704: @23007
8023 /* 23007 */ GIM_Try, /*On fail goto*//*Label 707*/ GIMT_Encode4(23035), // Rule ID 1241 //
8024 /* 23012 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
8025 /* 23015 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8026 /* 23019 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8027 /* 23023 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14689:{ *:[iPTR] }, V128:{ *:[v16i8] }:$in) => (extadd_pairwise_s_I16x8:{ *:[v8i16] } V128:{ *:[v16i8] }:$in)
8028 /* 23023 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_s_I16x8),
8029 /* 23026 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8030 /* 23028 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
8031 /* 23030 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8032 /* 23033 */ GIR_RootConstrainSelectedInstOperands,
8033 /* 23034 */ // GIR_Coverage, 1241,
8034 /* 23034 */ GIR_EraseRootFromParent_Done,
8035 /* 23035 */ // Label 707: @23035
8036 /* 23035 */ GIM_Reject,
8037 /* 23036 */ // Label 705: @23036
8038 /* 23036 */ GIM_Try, /*On fail goto*//*Label 708*/ GIMT_Encode4(23064), // Rule ID 1240 //
8039 /* 23041 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8040 /* 23044 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8041 /* 23048 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8042 /* 23052 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14689:{ *:[iPTR] }, V128:{ *:[v8i16] }:$in) => (extadd_pairwise_s_I32x4:{ *:[v4i32] } V128:{ *:[v8i16] }:$in)
8043 /* 23052 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_s_I32x4),
8044 /* 23055 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8045 /* 23057 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
8046 /* 23059 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8047 /* 23062 */ GIR_RootConstrainSelectedInstOperands,
8048 /* 23063 */ // GIR_Coverage, 1240,
8049 /* 23063 */ GIR_EraseRootFromParent_Done,
8050 /* 23064 */ // Label 708: @23064
8051 /* 23064 */ GIM_Reject,
8052 /* 23065 */ // Label 706: @23065
8053 /* 23065 */ GIM_Reject,
8054 /* 23066 */ // Label 703: @23066
8055 /* 23066 */ GIM_Reject,
8056 /* 23067 */ // Label 648: @23067
8057 /* 23067 */ GIM_Try, /*On fail goto*//*Label 709*/ GIMT_Encode4(24170),
8058 /* 23072 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
8059 /* 23075 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 710*/ GIMT_Encode4(23133), GIMT_Encode2(GIFBS_HasFP16), // Rule ID 187 //
8060 /* 23082 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extract_lane_f16x8),
8061 /* 23087 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_f32,
8062 /* 23090 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
8063 /* 23093 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
8064 /* 23096 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
8065 /* 23100 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8066 /* 23104 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
8067 /* 23108 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
8068 /* 23112 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
8069 /* 23116 */ // MIs[1] Operand 1
8070 /* 23116 */ // No operand predicates
8071 /* 23116 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8072 /* 23118 */ // (intrinsic_wo_chain:{ *:[f32] } 14691:{ *:[iPTR] }, V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx) => (EXTRACT_LANE_F16x8:{ *:[f32] } V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] }):$idx)
8073 /* 23118 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EXTRACT_LANE_F16x8),
8074 /* 23121 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8075 /* 23123 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8076 /* 23125 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
8077 /* 23128 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8078 /* 23131 */ GIR_RootConstrainSelectedInstOperands,
8079 /* 23132 */ // GIR_Coverage, 187,
8080 /* 23132 */ GIR_EraseRootFromParent_Done,
8081 /* 23133 */ // Label 710: @23133
8082 /* 23133 */ GIM_Try, /*On fail goto*//*Label 711*/ GIMT_Encode4(23243),
8083 /* 23138 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_avgr_unsigned),
8084 /* 23143 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(14), /*)*//*default:*//*Label 714*/ GIMT_Encode4(23242),
8085 /* 23154 */ /*GILLT_v16i8*//*Label 712*/ GIMT_Encode4(23162),
8086 /* 23158 */ /*GILLT_v8i16*//*Label 713*/ GIMT_Encode4(23202),
8087 /* 23162 */ // Label 712: @23162
8088 /* 23162 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 715*/ GIMT_Encode4(23201), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 309 //
8089 /* 23169 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
8090 /* 23172 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
8091 /* 23175 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8092 /* 23179 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8093 /* 23183 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8094 /* 23187 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14684:{ *:[iPTR] }, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (AVGR_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
8095 /* 23187 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I8x16),
8096 /* 23190 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8097 /* 23192 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8098 /* 23194 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8099 /* 23196 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8100 /* 23199 */ GIR_RootConstrainSelectedInstOperands,
8101 /* 23200 */ // GIR_Coverage, 309,
8102 /* 23200 */ GIR_EraseRootFromParent_Done,
8103 /* 23201 */ // Label 715: @23201
8104 /* 23201 */ GIM_Reject,
8105 /* 23202 */ // Label 713: @23202
8106 /* 23202 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 716*/ GIMT_Encode4(23241), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 310 //
8107 /* 23209 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8108 /* 23212 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
8109 /* 23215 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8110 /* 23219 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8111 /* 23223 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8112 /* 23227 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14684:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (AVGR_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
8113 /* 23227 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I16x8),
8114 /* 23230 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8115 /* 23232 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8116 /* 23234 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8117 /* 23236 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8118 /* 23239 */ GIR_RootConstrainSelectedInstOperands,
8119 /* 23240 */ // GIR_Coverage, 310,
8120 /* 23240 */ GIR_EraseRootFromParent_Done,
8121 /* 23241 */ // Label 716: @23241
8122 /* 23241 */ GIM_Reject,
8123 /* 23242 */ // Label 714: @23242
8124 /* 23242 */ GIM_Reject,
8125 /* 23243 */ // Label 711: @23243
8126 /* 23243 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 717*/ GIMT_Encode4(23290), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 311 //
8127 /* 23250 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_dot),
8128 /* 23255 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
8129 /* 23258 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8130 /* 23261 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
8131 /* 23264 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8132 /* 23268 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8133 /* 23272 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8134 /* 23276 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14688:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (DOT:{ *:[v4i32] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
8135 /* 23276 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::DOT),
8136 /* 23279 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8137 /* 23281 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8138 /* 23283 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8139 /* 23285 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8140 /* 23288 */ GIR_RootConstrainSelectedInstOperands,
8141 /* 23289 */ // GIR_Coverage, 311,
8142 /* 23289 */ GIR_EraseRootFromParent_Done,
8143 /* 23290 */ // Label 717: @23290
8144 /* 23290 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 718*/ GIMT_Encode4(23337), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 393 //
8145 /* 23297 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_signed),
8146 /* 23302 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16i8,
8147 /* 23305 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8148 /* 23308 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
8149 /* 23311 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8150 /* 23315 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8151 /* 23319 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8152 /* 23323 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14703:{ *:[iPTR] }, V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high) => (NARROW_S_I8x16:{ *:[v16i8] } V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high)
8153 /* 23323 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_S_I8x16),
8154 /* 23326 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8155 /* 23328 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
8156 /* 23330 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
8157 /* 23332 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8158 /* 23335 */ GIR_RootConstrainSelectedInstOperands,
8159 /* 23336 */ // GIR_Coverage, 393,
8160 /* 23336 */ GIR_EraseRootFromParent_Done,
8161 /* 23337 */ // Label 718: @23337
8162 /* 23337 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 719*/ GIMT_Encode4(23384), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 394 //
8163 /* 23344 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_unsigned),
8164 /* 23349 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16i8,
8165 /* 23352 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8166 /* 23355 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
8167 /* 23358 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8168 /* 23362 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8169 /* 23366 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8170 /* 23370 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14704:{ *:[iPTR] }, V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high) => (NARROW_U_I8x16:{ *:[v16i8] } V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high)
8171 /* 23370 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_U_I8x16),
8172 /* 23373 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8173 /* 23375 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
8174 /* 23377 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
8175 /* 23379 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8176 /* 23382 */ GIR_RootConstrainSelectedInstOperands,
8177 /* 23383 */ // GIR_Coverage, 394,
8178 /* 23383 */ GIR_EraseRootFromParent_Done,
8179 /* 23384 */ // Label 719: @23384
8180 /* 23384 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 720*/ GIMT_Encode4(23431), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 395 //
8181 /* 23391 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_signed),
8182 /* 23396 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8i16,
8183 /* 23399 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
8184 /* 23402 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
8185 /* 23405 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8186 /* 23409 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8187 /* 23413 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8188 /* 23417 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14703:{ *:[iPTR] }, V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high) => (NARROW_S_I16x8:{ *:[v8i16] } V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high)
8189 /* 23417 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_S_I16x8),
8190 /* 23420 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8191 /* 23422 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
8192 /* 23424 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
8193 /* 23426 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8194 /* 23429 */ GIR_RootConstrainSelectedInstOperands,
8195 /* 23430 */ // GIR_Coverage, 395,
8196 /* 23430 */ GIR_EraseRootFromParent_Done,
8197 /* 23431 */ // Label 720: @23431
8198 /* 23431 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 721*/ GIMT_Encode4(23478), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 396 //
8199 /* 23438 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_unsigned),
8200 /* 23443 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8i16,
8201 /* 23446 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
8202 /* 23449 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
8203 /* 23452 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8204 /* 23456 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8205 /* 23460 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8206 /* 23464 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14704:{ *:[iPTR] }, V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high) => (NARROW_U_I16x8:{ *:[v8i16] } V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high)
8207 /* 23464 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_U_I16x8),
8208 /* 23467 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8209 /* 23469 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
8210 /* 23471 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
8211 /* 23473 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8212 /* 23476 */ GIR_RootConstrainSelectedInstOperands,
8213 /* 23477 */ // GIR_Coverage, 396,
8214 /* 23477 */ GIR_EraseRootFromParent_Done,
8215 /* 23478 */ // Label 721: @23478
8216 /* 23478 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 722*/ GIMT_Encode4(23525), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 405 //
8217 /* 23485 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_q15mulr_sat_signed),
8218 /* 23490 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8i16,
8219 /* 23493 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8220 /* 23496 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
8221 /* 23499 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8222 /* 23503 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8223 /* 23507 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8224 /* 23511 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14708:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (Q15MULR_SAT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
8225 /* 23511 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::Q15MULR_SAT_S_I16x8),
8226 /* 23514 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8227 /* 23516 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8228 /* 23518 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8229 /* 23520 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8230 /* 23523 */ GIR_RootConstrainSelectedInstOperands,
8231 /* 23524 */ // GIR_Coverage, 405,
8232 /* 23524 */ GIR_EraseRootFromParent_Done,
8233 /* 23525 */ // Label 722: @23525
8234 /* 23525 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 723*/ GIMT_Encode4(23572), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 406 //
8235 /* 23532 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_swizzle),
8236 /* 23537 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16i8,
8237 /* 23540 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
8238 /* 23543 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
8239 /* 23546 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8240 /* 23550 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8241 /* 23554 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8242 /* 23558 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14725:{ *:[iPTR] }, V128:{ *:[v16i8] }:$src, V128:{ *:[v16i8] }:$mask) => (RELAXED_SWIZZLE:{ *:[v16i8] } V128:{ *:[v16i8] }:$src, V128:{ *:[v16i8] }:$mask)
8243 /* 23558 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_SWIZZLE),
8244 /* 23561 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8245 /* 23563 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8246 /* 23565 */ GIR_RootToRootCopy, /*OpIdx*/3, // mask
8247 /* 23567 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8248 /* 23570 */ GIR_RootConstrainSelectedInstOperands,
8249 /* 23571 */ // GIR_Coverage, 406,
8250 /* 23571 */ GIR_EraseRootFromParent_Done,
8251 /* 23572 */ // Label 723: @23572
8252 /* 23572 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 724*/ GIMT_Encode4(23619), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 421 //
8253 /* 23579 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_min),
8254 /* 23584 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
8255 /* 23587 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
8256 /* 23590 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
8257 /* 23593 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8258 /* 23597 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8259 /* 23601 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8260 /* 23605 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14722:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SIMD_RELAXED_FMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
8261 /* 23605 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F32x4),
8262 /* 23608 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8263 /* 23610 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8264 /* 23612 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8265 /* 23614 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8266 /* 23617 */ GIR_RootConstrainSelectedInstOperands,
8267 /* 23618 */ // GIR_Coverage, 421,
8268 /* 23618 */ GIR_EraseRootFromParent_Done,
8269 /* 23619 */ // Label 724: @23619
8270 /* 23619 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 725*/ GIMT_Encode4(23666), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 422 //
8271 /* 23626 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_max),
8272 /* 23631 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
8273 /* 23634 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
8274 /* 23637 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
8275 /* 23640 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8276 /* 23644 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8277 /* 23648 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8278 /* 23652 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14721:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SIMD_RELAXED_FMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
8279 /* 23652 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F32x4),
8280 /* 23655 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8281 /* 23657 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8282 /* 23659 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8283 /* 23661 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8284 /* 23664 */ GIR_RootConstrainSelectedInstOperands,
8285 /* 23665 */ // GIR_Coverage, 422,
8286 /* 23665 */ GIR_EraseRootFromParent_Done,
8287 /* 23666 */ // Label 725: @23666
8288 /* 23666 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 726*/ GIMT_Encode4(23713), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 423 //
8289 /* 23673 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_min),
8290 /* 23678 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
8291 /* 23681 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
8292 /* 23684 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
8293 /* 23687 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8294 /* 23691 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8295 /* 23695 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8296 /* 23699 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14722:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SIMD_RELAXED_FMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
8297 /* 23699 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F64x2),
8298 /* 23702 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8299 /* 23704 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8300 /* 23706 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8301 /* 23708 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8302 /* 23711 */ GIR_RootConstrainSelectedInstOperands,
8303 /* 23712 */ // GIR_Coverage, 423,
8304 /* 23712 */ GIR_EraseRootFromParent_Done,
8305 /* 23713 */ // Label 726: @23713
8306 /* 23713 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 727*/ GIMT_Encode4(23760), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 424 //
8307 /* 23720 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_max),
8308 /* 23725 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
8309 /* 23728 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
8310 /* 23731 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
8311 /* 23734 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8312 /* 23738 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8313 /* 23742 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8314 /* 23746 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14721:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SIMD_RELAXED_FMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
8315 /* 23746 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F64x2),
8316 /* 23749 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8317 /* 23751 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8318 /* 23753 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8319 /* 23755 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8320 /* 23758 */ GIR_RootConstrainSelectedInstOperands,
8321 /* 23759 */ // GIR_Coverage, 424,
8322 /* 23759 */ GIR_EraseRootFromParent_Done,
8323 /* 23760 */ // Label 727: @23760
8324 /* 23760 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 728*/ GIMT_Encode4(23807), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 425 //
8325 /* 23767 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_q15mulr_signed),
8326 /* 23772 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8i16,
8327 /* 23775 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8328 /* 23778 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
8329 /* 23781 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8330 /* 23785 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8331 /* 23789 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8332 /* 23793 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14724:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (RELAXED_Q15MULR_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
8333 /* 23793 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_Q15MULR_S_I16x8),
8334 /* 23796 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8335 /* 23798 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8336 /* 23800 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8337 /* 23802 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8338 /* 23805 */ GIR_RootConstrainSelectedInstOperands,
8339 /* 23806 */ // GIR_Coverage, 425,
8340 /* 23806 */ GIR_EraseRootFromParent_Done,
8341 /* 23807 */ // Label 728: @23807
8342 /* 23807 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 729*/ GIMT_Encode4(23854), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 426 //
8343 /* 23814 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_signed),
8344 /* 23819 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8i16,
8345 /* 23822 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
8346 /* 23825 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
8347 /* 23828 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8348 /* 23832 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8349 /* 23836 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8350 /* 23840 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14718:{ *:[iPTR] }, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (RELAXED_DOT:{ *:[v8i16] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
8351 /* 23840 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT),
8352 /* 23843 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8353 /* 23845 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8354 /* 23847 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8355 /* 23849 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8356 /* 23852 */ GIR_RootConstrainSelectedInstOperands,
8357 /* 23853 */ // GIR_Coverage, 426,
8358 /* 23853 */ GIR_EraseRootFromParent_Done,
8359 /* 23854 */ // Label 729: @23854
8360 /* 23854 */ GIM_Try, /*On fail goto*//*Label 730*/ GIMT_Encode4(23899), // Rule ID 993 //
8361 /* 23859 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_swizzle),
8362 /* 23864 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16i8,
8363 /* 23867 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
8364 /* 23870 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
8365 /* 23873 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8366 /* 23877 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8367 /* 23881 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8368 /* 23885 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14735:{ *:[iPTR] }, V128:{ *:[v16i8] }:$src, V128:{ *:[v16i8] }:$mask) => (SWIZZLE:{ *:[v16i8] } ?:{ *:[v16i8] }:$src, ?:{ *:[v16i8] }:$mask)
8369 /* 23885 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SWIZZLE),
8370 /* 23888 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8371 /* 23890 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8372 /* 23892 */ GIR_RootToRootCopy, /*OpIdx*/3, // mask
8373 /* 23894 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8374 /* 23897 */ GIR_RootConstrainSelectedInstOperands,
8375 /* 23898 */ // GIR_Coverage, 993,
8376 /* 23898 */ GIR_EraseRootFromParent_Done,
8377 /* 23899 */ // Label 730: @23899
8378 /* 23899 */ GIM_Try, /*On fail goto*//*Label 731*/ GIMT_Encode4(23944), // Rule ID 1176 //
8379 /* 23904 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmin),
8380 /* 23909 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
8381 /* 23912 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
8382 /* 23915 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
8383 /* 23918 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8384 /* 23922 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8385 /* 23926 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8386 /* 23930 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14706:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (PMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
8387 /* 23930 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
8388 /* 23933 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8389 /* 23935 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8390 /* 23937 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8391 /* 23939 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8392 /* 23942 */ GIR_RootConstrainSelectedInstOperands,
8393 /* 23943 */ // GIR_Coverage, 1176,
8394 /* 23943 */ GIR_EraseRootFromParent_Done,
8395 /* 23944 */ // Label 731: @23944
8396 /* 23944 */ GIM_Try, /*On fail goto*//*Label 732*/ GIMT_Encode4(23989), // Rule ID 1177 //
8397 /* 23949 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmax),
8398 /* 23954 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
8399 /* 23957 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
8400 /* 23960 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
8401 /* 23963 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8402 /* 23967 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8403 /* 23971 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8404 /* 23975 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14705:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (PMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
8405 /* 23975 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
8406 /* 23978 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8407 /* 23980 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8408 /* 23982 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8409 /* 23984 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8410 /* 23987 */ GIR_RootConstrainSelectedInstOperands,
8411 /* 23988 */ // GIR_Coverage, 1177,
8412 /* 23988 */ GIR_EraseRootFromParent_Done,
8413 /* 23989 */ // Label 732: @23989
8414 /* 23989 */ GIM_Try, /*On fail goto*//*Label 733*/ GIMT_Encode4(24034), // Rule ID 1178 //
8415 /* 23994 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmin),
8416 /* 23999 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
8417 /* 24002 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
8418 /* 24005 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
8419 /* 24008 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8420 /* 24012 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8421 /* 24016 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8422 /* 24020 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14706:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (PMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
8423 /* 24020 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
8424 /* 24023 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8425 /* 24025 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8426 /* 24027 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8427 /* 24029 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8428 /* 24032 */ GIR_RootConstrainSelectedInstOperands,
8429 /* 24033 */ // GIR_Coverage, 1178,
8430 /* 24033 */ GIR_EraseRootFromParent_Done,
8431 /* 24034 */ // Label 733: @24034
8432 /* 24034 */ GIM_Try, /*On fail goto*//*Label 734*/ GIMT_Encode4(24079), // Rule ID 1179 //
8433 /* 24039 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmax),
8434 /* 24044 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
8435 /* 24047 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
8436 /* 24050 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
8437 /* 24053 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8438 /* 24057 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8439 /* 24061 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8440 /* 24065 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14705:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (PMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
8441 /* 24065 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
8442 /* 24068 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8443 /* 24070 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8444 /* 24072 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8445 /* 24074 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8446 /* 24077 */ GIR_RootConstrainSelectedInstOperands,
8447 /* 24078 */ // GIR_Coverage, 1179,
8448 /* 24078 */ GIR_EraseRootFromParent_Done,
8449 /* 24079 */ // Label 734: @24079
8450 /* 24079 */ GIM_Try, /*On fail goto*//*Label 735*/ GIMT_Encode4(24124), // Rule ID 1180 //
8451 /* 24084 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmin),
8452 /* 24089 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
8453 /* 24092 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
8454 /* 24095 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
8455 /* 24098 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8456 /* 24102 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8457 /* 24106 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8458 /* 24110 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14706:{ *:[iPTR] }, V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (PMIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
8459 /* 24110 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
8460 /* 24113 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8461 /* 24115 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8462 /* 24117 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8463 /* 24119 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8464 /* 24122 */ GIR_RootConstrainSelectedInstOperands,
8465 /* 24123 */ // GIR_Coverage, 1180,
8466 /* 24123 */ GIR_EraseRootFromParent_Done,
8467 /* 24124 */ // Label 735: @24124
8468 /* 24124 */ GIM_Try, /*On fail goto*//*Label 736*/ GIMT_Encode4(24169), // Rule ID 1181 //
8469 /* 24129 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmax),
8470 /* 24134 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
8471 /* 24137 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
8472 /* 24140 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
8473 /* 24143 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8474 /* 24147 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8475 /* 24151 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8476 /* 24155 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14705:{ *:[iPTR] }, V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (PMAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
8477 /* 24155 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
8478 /* 24158 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8479 /* 24160 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8480 /* 24162 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8481 /* 24164 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8482 /* 24167 */ GIR_RootConstrainSelectedInstOperands,
8483 /* 24168 */ // GIR_Coverage, 1181,
8484 /* 24168 */ GIR_EraseRootFromParent_Done,
8485 /* 24169 */ // Label 736: @24169
8486 /* 24169 */ GIM_Reject,
8487 /* 24170 */ // Label 709: @24170
8488 /* 24170 */ GIM_Try, /*On fail goto*//*Label 737*/ GIMT_Encode4(25303),
8489 /* 24175 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
8490 /* 24178 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 738*/ GIMT_Encode4(24245), GIMT_Encode2(GIFBS_HasFP16), // Rule ID 194 //
8491 /* 24185 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_replace_lane_f16x8),
8492 /* 24190 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
8493 /* 24193 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
8494 /* 24196 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
8495 /* 24199 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_f32,
8496 /* 24202 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8497 /* 24206 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8498 /* 24210 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
8499 /* 24214 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
8500 /* 24218 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
8501 /* 24222 */ // MIs[1] Operand 1
8502 /* 24222 */ // No operand predicates
8503 /* 24222 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
8504 /* 24226 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8505 /* 24228 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14730:{ *:[iPTR] }, V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx, F32:{ *:[f32] }:$x) => (REPLACE_LANE_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] }):$idx, F32:{ *:[f32] }:$x)
8506 /* 24228 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_F16x8),
8507 /* 24231 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8508 /* 24233 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8509 /* 24235 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
8510 /* 24238 */ GIR_RootToRootCopy, /*OpIdx*/4, // x
8511 /* 24240 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8512 /* 24243 */ GIR_RootConstrainSelectedInstOperands,
8513 /* 24244 */ // GIR_Coverage, 194,
8514 /* 24244 */ GIR_EraseRootFromParent_Done,
8515 /* 24245 */ // Label 738: @24245
8516 /* 24245 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 739*/ GIMT_Encode4(24301), GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128), // Rule ID 411 //
8517 /* 24252 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_madd),
8518 /* 24257 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
8519 /* 24260 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
8520 /* 24263 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
8521 /* 24266 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4f32,
8522 /* 24269 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8523 /* 24273 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8524 /* 24277 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8525 /* 24281 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8526 /* 24285 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14720:{ *:[iPTR] }, V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c) => (MADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c)
8527 /* 24285 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F32x4),
8528 /* 24288 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8529 /* 24290 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
8530 /* 24292 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
8531 /* 24294 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8532 /* 24296 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8533 /* 24299 */ GIR_RootConstrainSelectedInstOperands,
8534 /* 24300 */ // GIR_Coverage, 411,
8535 /* 24300 */ GIR_EraseRootFromParent_Done,
8536 /* 24301 */ // Label 739: @24301
8537 /* 24301 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 740*/ GIMT_Encode4(24357), GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128), // Rule ID 412 //
8538 /* 24308 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_nmadd),
8539 /* 24313 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
8540 /* 24316 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
8541 /* 24319 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
8542 /* 24322 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4f32,
8543 /* 24325 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8544 /* 24329 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8545 /* 24333 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8546 /* 24337 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8547 /* 24341 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14723:{ *:[iPTR] }, V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c) => (NMADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c)
8548 /* 24341 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F32x4),
8549 /* 24344 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8550 /* 24346 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
8551 /* 24348 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
8552 /* 24350 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8553 /* 24352 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8554 /* 24355 */ GIR_RootConstrainSelectedInstOperands,
8555 /* 24356 */ // GIR_Coverage, 412,
8556 /* 24356 */ GIR_EraseRootFromParent_Done,
8557 /* 24357 */ // Label 740: @24357
8558 /* 24357 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 741*/ GIMT_Encode4(24413), GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128), // Rule ID 413 //
8559 /* 24364 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_madd),
8560 /* 24369 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
8561 /* 24372 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
8562 /* 24375 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
8563 /* 24378 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2f64,
8564 /* 24381 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8565 /* 24385 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8566 /* 24389 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8567 /* 24393 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8568 /* 24397 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14720:{ *:[iPTR] }, V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c) => (MADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c)
8569 /* 24397 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F64x2),
8570 /* 24400 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8571 /* 24402 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
8572 /* 24404 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
8573 /* 24406 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8574 /* 24408 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8575 /* 24411 */ GIR_RootConstrainSelectedInstOperands,
8576 /* 24412 */ // GIR_Coverage, 413,
8577 /* 24412 */ GIR_EraseRootFromParent_Done,
8578 /* 24413 */ // Label 741: @24413
8579 /* 24413 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 742*/ GIMT_Encode4(24469), GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128), // Rule ID 414 //
8580 /* 24420 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_nmadd),
8581 /* 24425 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
8582 /* 24428 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
8583 /* 24431 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
8584 /* 24434 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2f64,
8585 /* 24437 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8586 /* 24441 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8587 /* 24445 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8588 /* 24449 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8589 /* 24453 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14723:{ *:[iPTR] }, V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c) => (NMADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c)
8590 /* 24453 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F64x2),
8591 /* 24456 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8592 /* 24458 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
8593 /* 24460 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
8594 /* 24462 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8595 /* 24464 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8596 /* 24467 */ GIR_RootConstrainSelectedInstOperands,
8597 /* 24468 */ // GIR_Coverage, 414,
8598 /* 24468 */ GIR_EraseRootFromParent_Done,
8599 /* 24469 */ // Label 742: @24469
8600 /* 24469 */ GIM_Try, /*On fail goto*//*Label 743*/ GIMT_Encode4(24703),
8601 /* 24474 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_laneselect),
8602 /* 24479 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(16), /*)*//*default:*//*Label 748*/ GIMT_Encode4(24702),
8603 /* 24490 */ /*GILLT_v16i8*//*Label 744*/ GIMT_Encode4(24506),
8604 /* 24494 */ /*GILLT_v8i16*//*Label 745*/ GIMT_Encode4(24555),
8605 /* 24498 */ /*GILLT_v4i32*//*Label 746*/ GIMT_Encode4(24604),
8606 /* 24502 */ /*GILLT_v2i64*//*Label 747*/ GIMT_Encode4(24653),
8607 /* 24506 */ // Label 744: @24506
8608 /* 24506 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 749*/ GIMT_Encode4(24554), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 417 //
8609 /* 24513 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
8610 /* 24516 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
8611 /* 24519 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v16i8,
8612 /* 24522 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8613 /* 24526 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8614 /* 24530 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8615 /* 24534 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8616 /* 24538 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14719:{ *:[iPTR] }, V128:{ *:[v16i8] }:$a, V128:{ *:[v16i8] }:$b, V128:{ *:[v16i8] }:$c) => (LANESELECT_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$a, V128:{ *:[v16i8] }:$b, V128:{ *:[v16i8] }:$c)
8617 /* 24538 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I8x16),
8618 /* 24541 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8619 /* 24543 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
8620 /* 24545 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
8621 /* 24547 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8622 /* 24549 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8623 /* 24552 */ GIR_RootConstrainSelectedInstOperands,
8624 /* 24553 */ // GIR_Coverage, 417,
8625 /* 24553 */ GIR_EraseRootFromParent_Done,
8626 /* 24554 */ // Label 749: @24554
8627 /* 24554 */ GIM_Reject,
8628 /* 24555 */ // Label 745: @24555
8629 /* 24555 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 750*/ GIMT_Encode4(24603), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 418 //
8630 /* 24562 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8631 /* 24565 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
8632 /* 24568 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8i16,
8633 /* 24571 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8634 /* 24575 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8635 /* 24579 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8636 /* 24583 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8637 /* 24587 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14719:{ *:[iPTR] }, V128:{ *:[v8i16] }:$a, V128:{ *:[v8i16] }:$b, V128:{ *:[v8i16] }:$c) => (LANESELECT_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$a, V128:{ *:[v8i16] }:$b, V128:{ *:[v8i16] }:$c)
8638 /* 24587 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I16x8),
8639 /* 24590 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8640 /* 24592 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
8641 /* 24594 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
8642 /* 24596 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8643 /* 24598 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8644 /* 24601 */ GIR_RootConstrainSelectedInstOperands,
8645 /* 24602 */ // GIR_Coverage, 418,
8646 /* 24602 */ GIR_EraseRootFromParent_Done,
8647 /* 24603 */ // Label 750: @24603
8648 /* 24603 */ GIM_Reject,
8649 /* 24604 */ // Label 746: @24604
8650 /* 24604 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 751*/ GIMT_Encode4(24652), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 419 //
8651 /* 24611 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
8652 /* 24614 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
8653 /* 24617 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4i32,
8654 /* 24620 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8655 /* 24624 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8656 /* 24628 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8657 /* 24632 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8658 /* 24636 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14719:{ *:[iPTR] }, V128:{ *:[v4i32] }:$a, V128:{ *:[v4i32] }:$b, V128:{ *:[v4i32] }:$c) => (LANESELECT_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$a, V128:{ *:[v4i32] }:$b, V128:{ *:[v4i32] }:$c)
8659 /* 24636 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I32x4),
8660 /* 24639 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8661 /* 24641 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
8662 /* 24643 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
8663 /* 24645 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8664 /* 24647 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8665 /* 24650 */ GIR_RootConstrainSelectedInstOperands,
8666 /* 24651 */ // GIR_Coverage, 419,
8667 /* 24651 */ GIR_EraseRootFromParent_Done,
8668 /* 24652 */ // Label 751: @24652
8669 /* 24652 */ GIM_Reject,
8670 /* 24653 */ // Label 747: @24653
8671 /* 24653 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 752*/ GIMT_Encode4(24701), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 420 //
8672 /* 24660 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
8673 /* 24663 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
8674 /* 24666 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2i64,
8675 /* 24669 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8676 /* 24673 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8677 /* 24677 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8678 /* 24681 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8679 /* 24685 */ // (intrinsic_wo_chain:{ *:[v2i64] } 14719:{ *:[iPTR] }, V128:{ *:[v2i64] }:$a, V128:{ *:[v2i64] }:$b, V128:{ *:[v2i64] }:$c) => (LANESELECT_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$a, V128:{ *:[v2i64] }:$b, V128:{ *:[v2i64] }:$c)
8680 /* 24685 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I64x2),
8681 /* 24688 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8682 /* 24690 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
8683 /* 24692 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
8684 /* 24694 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8685 /* 24696 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8686 /* 24699 */ GIR_RootConstrainSelectedInstOperands,
8687 /* 24700 */ // GIR_Coverage, 420,
8688 /* 24700 */ GIR_EraseRootFromParent_Done,
8689 /* 24701 */ // Label 752: @24701
8690 /* 24701 */ GIM_Reject,
8691 /* 24702 */ // Label 748: @24702
8692 /* 24702 */ GIM_Reject,
8693 /* 24703 */ // Label 743: @24703
8694 /* 24703 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 753*/ GIMT_Encode4(24759), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 427 //
8695 /* 24710 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_add_signed),
8696 /* 24715 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
8697 /* 24718 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
8698 /* 24721 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
8699 /* 24724 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4i32,
8700 /* 24727 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8701 /* 24731 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8702 /* 24735 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8703 /* 24739 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8704 /* 24743 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14717:{ *:[iPTR] }, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc) => (RELAXED_DOT_ADD:{ *:[v4i32] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc)
8705 /* 24743 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_ADD),
8706 /* 24746 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8707 /* 24748 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8708 /* 24750 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8709 /* 24752 */ GIR_RootToRootCopy, /*OpIdx*/4, // acc
8710 /* 24754 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8711 /* 24757 */ GIR_RootConstrainSelectedInstOperands,
8712 /* 24758 */ // GIR_Coverage, 427,
8713 /* 24758 */ GIR_EraseRootFromParent_Done,
8714 /* 24759 */ // Label 753: @24759
8715 /* 24759 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 754*/ GIMT_Encode4(24815), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 428 //
8716 /* 24766 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_bf16x8_add_f32),
8717 /* 24771 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
8718 /* 24774 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8719 /* 24777 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
8720 /* 24780 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4f32,
8721 /* 24783 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8722 /* 24787 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8723 /* 24791 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8724 /* 24795 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8725 /* 24799 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14716:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, V128:{ *:[v4f32] }:$acc) => (RELAXED_DOT_BFLOAT:{ *:[v4f32] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, V128:{ *:[v4f32] }:$acc)
8726 /* 24799 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_BFLOAT),
8727 /* 24802 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8728 /* 24804 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8729 /* 24806 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8730 /* 24808 */ GIR_RootToRootCopy, /*OpIdx*/4, // acc
8731 /* 24810 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8732 /* 24813 */ GIR_RootConstrainSelectedInstOperands,
8733 /* 24814 */ // GIR_Coverage, 428,
8734 /* 24814 */ GIR_EraseRootFromParent_Done,
8735 /* 24815 */ // Label 754: @24815
8736 /* 24815 */ GIM_Try, /*On fail goto*//*Label 755*/ GIMT_Encode4(25194),
8737 /* 24820 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitselect),
8738 /* 24825 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(19), /*)*//*default:*//*Label 763*/ GIMT_Encode4(25193),
8739 /* 24836 */ /*GILLT_v16i8*//*Label 756*/ GIMT_Encode4(24864),
8740 /* 24840 */ /*GILLT_v8i16*//*Label 757*/ GIMT_Encode4(24911),
8741 /* 24844 */ /*GILLT_v4i32*//*Label 758*/ GIMT_Encode4(24958),
8742 /* 24848 */ /*GILLT_v2i64*//*Label 759*/ GIMT_Encode4(25005),
8743 /* 24852 */ /*GILLT_v8f16*//*Label 760*/ GIMT_Encode4(25052),
8744 /* 24856 */ /*GILLT_v4f32*//*Label 761*/ GIMT_Encode4(25099),
8745 /* 24860 */ /*GILLT_v2f64*//*Label 762*/ GIMT_Encode4(25146),
8746 /* 24864 */ // Label 756: @24864
8747 /* 24864 */ GIM_Try, /*On fail goto*//*Label 764*/ GIMT_Encode4(24910), // Rule ID 1048 //
8748 /* 24869 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
8749 /* 24872 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
8750 /* 24875 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v16i8,
8751 /* 24878 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8752 /* 24882 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8753 /* 24886 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8754 /* 24890 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8755 /* 24894 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14686:{ *:[iPTR] }, V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$c) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
8756 /* 24894 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
8757 /* 24897 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8758 /* 24899 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
8759 /* 24901 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
8760 /* 24903 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8761 /* 24905 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8762 /* 24908 */ GIR_RootConstrainSelectedInstOperands,
8763 /* 24909 */ // GIR_Coverage, 1048,
8764 /* 24909 */ GIR_EraseRootFromParent_Done,
8765 /* 24910 */ // Label 764: @24910
8766 /* 24910 */ GIM_Reject,
8767 /* 24911 */ // Label 757: @24911
8768 /* 24911 */ GIM_Try, /*On fail goto*//*Label 765*/ GIMT_Encode4(24957), // Rule ID 1049 //
8769 /* 24916 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8770 /* 24919 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
8771 /* 24922 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8i16,
8772 /* 24925 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8773 /* 24929 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8774 /* 24933 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8775 /* 24937 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8776 /* 24941 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14686:{ *:[iPTR] }, V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$c) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
8777 /* 24941 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
8778 /* 24944 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8779 /* 24946 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
8780 /* 24948 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
8781 /* 24950 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8782 /* 24952 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8783 /* 24955 */ GIR_RootConstrainSelectedInstOperands,
8784 /* 24956 */ // GIR_Coverage, 1049,
8785 /* 24956 */ GIR_EraseRootFromParent_Done,
8786 /* 24957 */ // Label 765: @24957
8787 /* 24957 */ GIM_Reject,
8788 /* 24958 */ // Label 758: @24958
8789 /* 24958 */ GIM_Try, /*On fail goto*//*Label 766*/ GIMT_Encode4(25004), // Rule ID 1050 //
8790 /* 24963 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
8791 /* 24966 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
8792 /* 24969 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4i32,
8793 /* 24972 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8794 /* 24976 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8795 /* 24980 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8796 /* 24984 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8797 /* 24988 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14686:{ *:[iPTR] }, V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$c) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
8798 /* 24988 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
8799 /* 24991 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8800 /* 24993 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
8801 /* 24995 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
8802 /* 24997 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8803 /* 24999 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8804 /* 25002 */ GIR_RootConstrainSelectedInstOperands,
8805 /* 25003 */ // GIR_Coverage, 1050,
8806 /* 25003 */ GIR_EraseRootFromParent_Done,
8807 /* 25004 */ // Label 766: @25004
8808 /* 25004 */ GIM_Reject,
8809 /* 25005 */ // Label 759: @25005
8810 /* 25005 */ GIM_Try, /*On fail goto*//*Label 767*/ GIMT_Encode4(25051), // Rule ID 1051 //
8811 /* 25010 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
8812 /* 25013 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
8813 /* 25016 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2i64,
8814 /* 25019 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8815 /* 25023 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8816 /* 25027 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8817 /* 25031 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8818 /* 25035 */ // (intrinsic_wo_chain:{ *:[v2i64] } 14686:{ *:[iPTR] }, V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$c) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
8819 /* 25035 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
8820 /* 25038 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8821 /* 25040 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
8822 /* 25042 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
8823 /* 25044 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8824 /* 25046 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8825 /* 25049 */ GIR_RootConstrainSelectedInstOperands,
8826 /* 25050 */ // GIR_Coverage, 1051,
8827 /* 25050 */ GIR_EraseRootFromParent_Done,
8828 /* 25051 */ // Label 767: @25051
8829 /* 25051 */ GIM_Reject,
8830 /* 25052 */ // Label 760: @25052
8831 /* 25052 */ GIM_Try, /*On fail goto*//*Label 768*/ GIMT_Encode4(25098), // Rule ID 1054 //
8832 /* 25057 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
8833 /* 25060 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
8834 /* 25063 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8f16,
8835 /* 25066 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8836 /* 25070 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8837 /* 25074 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8838 /* 25078 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8839 /* 25082 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14686:{ *:[iPTR] }, V128:{ *:[v8f16] }:$v1, V128:{ *:[v8f16] }:$v2, V128:{ *:[v8f16] }:$c) => (BITSELECT:{ *:[v8f16] } ?:{ *:[v8f16] }:$v1, ?:{ *:[v8f16] }:$v2, ?:{ *:[v8f16] }:$c)
8840 /* 25082 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
8841 /* 25085 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8842 /* 25087 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
8843 /* 25089 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
8844 /* 25091 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8845 /* 25093 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8846 /* 25096 */ GIR_RootConstrainSelectedInstOperands,
8847 /* 25097 */ // GIR_Coverage, 1054,
8848 /* 25097 */ GIR_EraseRootFromParent_Done,
8849 /* 25098 */ // Label 768: @25098
8850 /* 25098 */ GIM_Reject,
8851 /* 25099 */ // Label 761: @25099
8852 /* 25099 */ GIM_Try, /*On fail goto*//*Label 769*/ GIMT_Encode4(25145), // Rule ID 1052 //
8853 /* 25104 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
8854 /* 25107 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
8855 /* 25110 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4f32,
8856 /* 25113 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8857 /* 25117 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8858 /* 25121 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8859 /* 25125 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8860 /* 25129 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14686:{ *:[iPTR] }, V128:{ *:[v4f32] }:$v1, V128:{ *:[v4f32] }:$v2, V128:{ *:[v4f32] }:$c) => (BITSELECT:{ *:[v4f32] } ?:{ *:[v4f32] }:$v1, ?:{ *:[v4f32] }:$v2, ?:{ *:[v4f32] }:$c)
8861 /* 25129 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
8862 /* 25132 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8863 /* 25134 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
8864 /* 25136 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
8865 /* 25138 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8866 /* 25140 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8867 /* 25143 */ GIR_RootConstrainSelectedInstOperands,
8868 /* 25144 */ // GIR_Coverage, 1052,
8869 /* 25144 */ GIR_EraseRootFromParent_Done,
8870 /* 25145 */ // Label 769: @25145
8871 /* 25145 */ GIM_Reject,
8872 /* 25146 */ // Label 762: @25146
8873 /* 25146 */ GIM_Try, /*On fail goto*//*Label 770*/ GIMT_Encode4(25192), // Rule ID 1053 //
8874 /* 25151 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
8875 /* 25154 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
8876 /* 25157 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2f64,
8877 /* 25160 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8878 /* 25164 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8879 /* 25168 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8880 /* 25172 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8881 /* 25176 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14686:{ *:[iPTR] }, V128:{ *:[v2f64] }:$v1, V128:{ *:[v2f64] }:$v2, V128:{ *:[v2f64] }:$c) => (BITSELECT:{ *:[v2f64] } ?:{ *:[v2f64] }:$v1, ?:{ *:[v2f64] }:$v2, ?:{ *:[v2f64] }:$c)
8882 /* 25176 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
8883 /* 25179 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8884 /* 25181 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
8885 /* 25183 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
8886 /* 25185 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8887 /* 25187 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8888 /* 25190 */ GIR_RootConstrainSelectedInstOperands,
8889 /* 25191 */ // GIR_Coverage, 1053,
8890 /* 25191 */ GIR_EraseRootFromParent_Done,
8891 /* 25192 */ // Label 770: @25192
8892 /* 25192 */ GIM_Reject,
8893 /* 25193 */ // Label 763: @25193
8894 /* 25193 */ GIM_Reject,
8895 /* 25194 */ // Label 755: @25194
8896 /* 25194 */ GIM_Try, /*On fail goto*//*Label 771*/ GIMT_Encode4(25248), // Rule ID 1268 //
8897 /* 25199 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_madd),
8898 /* 25204 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
8899 /* 25207 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
8900 /* 25210 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
8901 /* 25213 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8f16,
8902 /* 25216 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8903 /* 25220 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8904 /* 25224 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8905 /* 25228 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8906 /* 25232 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14720:{ *:[iPTR] }, V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (MADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
8907 /* 25232 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F16x8),
8908 /* 25235 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8909 /* 25237 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
8910 /* 25239 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
8911 /* 25241 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8912 /* 25243 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8913 /* 25246 */ GIR_RootConstrainSelectedInstOperands,
8914 /* 25247 */ // GIR_Coverage, 1268,
8915 /* 25247 */ GIR_EraseRootFromParent_Done,
8916 /* 25248 */ // Label 771: @25248
8917 /* 25248 */ GIM_Try, /*On fail goto*//*Label 772*/ GIMT_Encode4(25302), // Rule ID 1269 //
8918 /* 25253 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_nmadd),
8919 /* 25258 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
8920 /* 25261 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
8921 /* 25264 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
8922 /* 25267 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8f16,
8923 /* 25270 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8924 /* 25274 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8925 /* 25278 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8926 /* 25282 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8927 /* 25286 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14723:{ *:[iPTR] }, V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (NMADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
8928 /* 25286 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F16x8),
8929 /* 25289 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8930 /* 25291 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
8931 /* 25293 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
8932 /* 25295 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8933 /* 25297 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8934 /* 25300 */ GIR_RootConstrainSelectedInstOperands,
8935 /* 25301 */ // GIR_Coverage, 1269,
8936 /* 25301 */ GIR_EraseRootFromParent_Done,
8937 /* 25302 */ // Label 772: @25302
8938 /* 25302 */ GIM_Reject,
8939 /* 25303 */ // Label 737: @25303
8940 /* 25303 */ GIM_Reject,
8941 /* 25304 */ // Label 24: @25304
8942 /* 25304 */ GIM_Try, /*On fail goto*//*Label 773*/ GIMT_Encode4(25641),
8943 /* 25309 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
8944 /* 25312 */ GIM_Try, /*On fail goto*//*Label 774*/ GIMT_Encode4(25420),
8945 /* 25317 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_loadf16_f32),
8946 /* 25322 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_f32,
8947 /* 25325 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
8948 /* 25329 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 775*/ GIMT_Encode4(25374), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 570 //
8949 /* 25336 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/32,
8950 /* 25340 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
8951 /* 25347 */ // (intrinsic_w_chain:{ *:[f32] } 14696:{ *:[iPTR] }, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)) => (LOAD_F16_F32_A32:{ *:[f32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
8952 /* 25347 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_F16_F32_A32),
8953 /* 25350 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8954 /* 25352 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
8955 /* 25355 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
8956 /* 25360 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
8957 /* 25365 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8958 /* 25368 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
8959 /* 25372 */ GIR_RootConstrainSelectedInstOperands,
8960 /* 25373 */ // GIR_Coverage, 570,
8961 /* 25373 */ GIR_EraseRootFromParent_Done,
8962 /* 25374 */ // Label 775: @25374
8963 /* 25374 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 776*/ GIMT_Encode4(25419), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 571 //
8964 /* 25381 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/64,
8965 /* 25385 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
8966 /* 25392 */ // (intrinsic_w_chain:{ *:[f32] } 14696:{ *:[iPTR] }, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)) => (LOAD_F16_F32_A64:{ *:[f32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
8967 /* 25392 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_F16_F32_A64),
8968 /* 25395 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8969 /* 25397 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
8970 /* 25400 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
8971 /* 25405 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
8972 /* 25410 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8973 /* 25413 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
8974 /* 25417 */ GIR_RootConstrainSelectedInstOperands,
8975 /* 25418 */ // GIR_Coverage, 571,
8976 /* 25418 */ GIR_EraseRootFromParent_Done,
8977 /* 25419 */ // Label 776: @25419
8978 /* 25419 */ GIM_Reject,
8979 /* 25420 */ // Label 774: @25420
8980 /* 25420 */ GIM_Try, /*On fail goto*//*Label 777*/ GIMT_Encode4(25528),
8981 /* 25425 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::wasm_storef16_f32),
8982 /* 25430 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
8983 /* 25433 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
8984 /* 25437 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 778*/ GIMT_Encode4(25482), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 592 //
8985 /* 25444 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/32,
8986 /* 25448 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
8987 /* 25455 */ // (intrinsic_void 14734:{ *:[iPTR] }, F32:{ *:[f32] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)) => (STORE_F16_F32_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, f32:{ *:[f32] }:$val)
8988 /* 25455 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_F16_F32_A32),
8989 /* 25458 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
8990 /* 25461 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
8991 /* 25466 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
8992 /* 25471 */ GIR_RootToRootCopy, /*OpIdx*/1, // val
8993 /* 25473 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8994 /* 25476 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
8995 /* 25480 */ GIR_RootConstrainSelectedInstOperands,
8996 /* 25481 */ // GIR_Coverage, 592,
8997 /* 25481 */ GIR_EraseRootFromParent_Done,
8998 /* 25482 */ // Label 778: @25482
8999 /* 25482 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 779*/ GIMT_Encode4(25527), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 593 //
9000 /* 25489 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/64,
9001 /* 25493 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
9002 /* 25500 */ // (intrinsic_void 14734:{ *:[iPTR] }, F32:{ *:[f32] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)) => (STORE_F16_F32_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, f32:{ *:[f32] }:$val)
9003 /* 25500 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_F16_F32_A64),
9004 /* 25503 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9005 /* 25506 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
9006 /* 25511 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
9007 /* 25516 */ GIR_RootToRootCopy, /*OpIdx*/1, // val
9008 /* 25518 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9009 /* 25521 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9010 /* 25525 */ GIR_RootConstrainSelectedInstOperands,
9011 /* 25526 */ // GIR_Coverage, 593,
9012 /* 25526 */ GIR_EraseRootFromParent_Done,
9013 /* 25527 */ // Label 779: @25527
9014 /* 25527 */ GIM_Reject,
9015 /* 25528 */ // Label 777: @25528
9016 /* 25528 */ GIM_Try, /*On fail goto*//*Label 780*/ GIMT_Encode4(25640),
9017 /* 25533 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_memory_size),
9018 /* 25538 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 783*/ GIMT_Encode4(25639),
9019 /* 25549 */ /*GILLT_i32*//*Label 781*/ GIMT_Encode4(25557),
9020 /* 25553 */ /*GILLT_i64*//*Label 782*/ GIMT_Encode4(25598),
9021 /* 25557 */ // Label 781: @25557
9022 /* 25557 */ GIM_Try, /*On fail goto*//*Label 784*/ GIMT_Encode4(25597), // Rule ID 11 //
9023 /* 25562 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
9024 /* 25565 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9025 /* 25569 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9026 /* 25573 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
9027 /* 25577 */ // MIs[1] Operand 1
9028 /* 25577 */ // No operand predicates
9029 /* 25577 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9030 /* 25579 */ // (intrinsic_w_chain:{ *:[i32] } 14702:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags) => (anonymous_14422MEMORY_SIZE_A32:{ *:[i32] } (imm:{ *:[i32] }):$flags)
9031 /* 25579 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_14422MEMORY_SIZE_A32),
9032 /* 25582 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9033 /* 25584 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
9034 /* 25587 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9035 /* 25590 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
9036 /* 25595 */ GIR_RootConstrainSelectedInstOperands,
9037 /* 25596 */ // GIR_Coverage, 11,
9038 /* 25596 */ GIR_EraseRootFromParent_Done,
9039 /* 25597 */ // Label 784: @25597
9040 /* 25597 */ GIM_Reject,
9041 /* 25598 */ // Label 782: @25598
9042 /* 25598 */ GIM_Try, /*On fail goto*//*Label 785*/ GIMT_Encode4(25638), // Rule ID 13 //
9043 /* 25603 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
9044 /* 25606 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9045 /* 25610 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9046 /* 25614 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
9047 /* 25618 */ // MIs[1] Operand 1
9048 /* 25618 */ // No operand predicates
9049 /* 25618 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9050 /* 25620 */ // (intrinsic_w_chain:{ *:[i64] } 14702:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags) => (anonymous_14423MEMORY_SIZE_A64:{ *:[i64] } (imm:{ *:[i32] }):$flags)
9051 /* 25620 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_14423MEMORY_SIZE_A64),
9052 /* 25623 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9053 /* 25625 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
9054 /* 25628 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9055 /* 25631 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
9056 /* 25636 */ GIR_RootConstrainSelectedInstOperands,
9057 /* 25637 */ // GIR_Coverage, 13,
9058 /* 25637 */ GIR_EraseRootFromParent_Done,
9059 /* 25638 */ // Label 785: @25638
9060 /* 25638 */ GIM_Reject,
9061 /* 25639 */ // Label 783: @25639
9062 /* 25639 */ GIM_Reject,
9063 /* 25640 */ // Label 780: @25640
9064 /* 25640 */ GIM_Reject,
9065 /* 25641 */ // Label 773: @25641
9066 /* 25641 */ GIM_Try, /*On fail goto*//*Label 786*/ GIMT_Encode4(25909),
9067 /* 25646 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
9068 /* 25649 */ GIM_Try, /*On fail goto*//*Label 787*/ GIMT_Encode4(25778),
9069 /* 25654 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_memory_atomic_notify),
9070 /* 25659 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
9071 /* 25662 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
9072 /* 25665 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9073 /* 25669 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 788*/ GIMT_Encode4(25723), GIMT_Encode2(GIFBS_HasAddr32_HasAtomics), // Rule ID 456 //
9074 /* 25676 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/32,
9075 /* 25680 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9076 /* 25684 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
9077 /* 25691 */ // (intrinsic_w_chain:{ *:[i32] } 14698:{ *:[iPTR] }, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr), I32:{ *:[i32] }:$count) => (MEMORY_ATOMIC_NOTIFY_A32:{ *:[i32] } 0:{ *:[i32] }, 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, ?:{ *:[i32] }:$addr, ?:{ *:[i32] }:$count)
9078 /* 25691 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MEMORY_ATOMIC_NOTIFY_A32),
9079 /* 25694 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9080 /* 25696 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9081 /* 25699 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9082 /* 25702 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
9083 /* 25707 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
9084 /* 25712 */ GIR_RootToRootCopy, /*OpIdx*/3, // count
9085 /* 25714 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9086 /* 25717 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9087 /* 25721 */ GIR_RootConstrainSelectedInstOperands,
9088 /* 25722 */ // GIR_Coverage, 456,
9089 /* 25722 */ GIR_EraseRootFromParent_Done,
9090 /* 25723 */ // Label 788: @25723
9091 /* 25723 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 789*/ GIMT_Encode4(25777), GIMT_Encode2(GIFBS_HasAddr64_HasAtomics), // Rule ID 457 //
9092 /* 25730 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/64,
9093 /* 25734 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9094 /* 25738 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
9095 /* 25745 */ // (intrinsic_w_chain:{ *:[i32] } 14698:{ *:[iPTR] }, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr), I32:{ *:[i32] }:$count) => (MEMORY_ATOMIC_NOTIFY_A64:{ *:[i32] } 0:{ *:[i32] }, 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, ?:{ *:[i64] }:$addr, ?:{ *:[i32] }:$count)
9096 /* 25745 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MEMORY_ATOMIC_NOTIFY_A64),
9097 /* 25748 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9098 /* 25750 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9099 /* 25753 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9100 /* 25756 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
9101 /* 25761 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
9102 /* 25766 */ GIR_RootToRootCopy, /*OpIdx*/3, // count
9103 /* 25768 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9104 /* 25771 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9105 /* 25775 */ GIR_RootConstrainSelectedInstOperands,
9106 /* 25776 */ // GIR_Coverage, 457,
9107 /* 25776 */ GIR_EraseRootFromParent_Done,
9108 /* 25777 */ // Label 789: @25777
9109 /* 25777 */ GIM_Reject,
9110 /* 25778 */ // Label 787: @25778
9111 /* 25778 */ GIM_Try, /*On fail goto*//*Label 790*/ GIMT_Encode4(25908),
9112 /* 25783 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_memory_grow),
9113 /* 25788 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 793*/ GIMT_Encode4(25907),
9114 /* 25799 */ /*GILLT_i32*//*Label 791*/ GIMT_Encode4(25807),
9115 /* 25803 */ /*GILLT_i64*//*Label 792*/ GIMT_Encode4(25857),
9116 /* 25807 */ // Label 791: @25807
9117 /* 25807 */ GIM_Try, /*On fail goto*//*Label 794*/ GIMT_Encode4(25856), // Rule ID 12 //
9118 /* 25812 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
9119 /* 25815 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
9120 /* 25818 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9121 /* 25822 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9122 /* 25826 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
9123 /* 25830 */ // MIs[1] Operand 1
9124 /* 25830 */ // No operand predicates
9125 /* 25830 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9126 /* 25834 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9127 /* 25836 */ // (intrinsic_w_chain:{ *:[i32] } 14701:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags, I32:{ *:[i32] }:$delta) => (anonymous_14422MEMORY_GROW_A32:{ *:[i32] } (imm:{ *:[i32] }):$flags, I32:{ *:[i32] }:$delta)
9128 /* 25836 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_14422MEMORY_GROW_A32),
9129 /* 25839 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9130 /* 25841 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
9131 /* 25844 */ GIR_RootToRootCopy, /*OpIdx*/3, // delta
9132 /* 25846 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9133 /* 25849 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
9134 /* 25854 */ GIR_RootConstrainSelectedInstOperands,
9135 /* 25855 */ // GIR_Coverage, 12,
9136 /* 25855 */ GIR_EraseRootFromParent_Done,
9137 /* 25856 */ // Label 794: @25856
9138 /* 25856 */ GIM_Reject,
9139 /* 25857 */ // Label 792: @25857
9140 /* 25857 */ GIM_Try, /*On fail goto*//*Label 795*/ GIMT_Encode4(25906), // Rule ID 14 //
9141 /* 25862 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
9142 /* 25865 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i64,
9143 /* 25868 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9144 /* 25872 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9145 /* 25876 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
9146 /* 25880 */ // MIs[1] Operand 1
9147 /* 25880 */ // No operand predicates
9148 /* 25880 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9149 /* 25884 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9150 /* 25886 */ // (intrinsic_w_chain:{ *:[i64] } 14701:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags, I64:{ *:[i64] }:$delta) => (anonymous_14423MEMORY_GROW_A64:{ *:[i64] } (imm:{ *:[i32] }):$flags, I64:{ *:[i64] }:$delta)
9151 /* 25886 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_14423MEMORY_GROW_A64),
9152 /* 25889 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9153 /* 25891 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
9154 /* 25894 */ GIR_RootToRootCopy, /*OpIdx*/3, // delta
9155 /* 25896 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9156 /* 25899 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
9157 /* 25904 */ GIR_RootConstrainSelectedInstOperands,
9158 /* 25905 */ // GIR_Coverage, 14,
9159 /* 25905 */ GIR_EraseRootFromParent_Done,
9160 /* 25906 */ // Label 795: @25906
9161 /* 25906 */ GIM_Reject,
9162 /* 25907 */ // Label 793: @25907
9163 /* 25907 */ GIM_Reject,
9164 /* 25908 */ // Label 790: @25908
9165 /* 25908 */ GIM_Reject,
9166 /* 25909 */ // Label 786: @25909
9167 /* 25909 */ GIM_Try, /*On fail goto*//*Label 796*/ GIMT_Encode4(26190),
9168 /* 25914 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
9169 /* 25917 */ GIM_Try, /*On fail goto*//*Label 797*/ GIMT_Encode4(26053),
9170 /* 25922 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_memory_atomic_wait32),
9171 /* 25927 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
9172 /* 25930 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
9173 /* 25933 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_i64,
9174 /* 25936 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9175 /* 25940 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 798*/ GIMT_Encode4(25996), GIMT_Encode2(GIFBS_HasAddr32_HasAtomics), // Rule ID 657 //
9176 /* 25947 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/32,
9177 /* 25951 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9178 /* 25955 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
9179 /* 25962 */ // (intrinsic_w_chain:{ *:[i32] } 14699:{ *:[iPTR] }, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr), i32:{ *:[i32] }:$exp, I64:{ *:[i64] }:$timeout) => (MEMORY_ATOMIC_WAIT32_A32:{ *:[i32] } 0:{ *:[i32] }, 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, ?:{ *:[i32] }:$addr, ?:{ *:[i32] }:$exp, ?:{ *:[i64] }:$timeout)
9180 /* 25962 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MEMORY_ATOMIC_WAIT32_A32),
9181 /* 25965 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9182 /* 25967 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9183 /* 25970 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9184 /* 25973 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
9185 /* 25978 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
9186 /* 25983 */ GIR_RootToRootCopy, /*OpIdx*/3, // exp
9187 /* 25985 */ GIR_RootToRootCopy, /*OpIdx*/4, // timeout
9188 /* 25987 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9189 /* 25990 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9190 /* 25994 */ GIR_RootConstrainSelectedInstOperands,
9191 /* 25995 */ // GIR_Coverage, 657,
9192 /* 25995 */ GIR_EraseRootFromParent_Done,
9193 /* 25996 */ // Label 798: @25996
9194 /* 25996 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 799*/ GIMT_Encode4(26052), GIMT_Encode2(GIFBS_HasAddr64_HasAtomics), // Rule ID 658 //
9195 /* 26003 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/64,
9196 /* 26007 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9197 /* 26011 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
9198 /* 26018 */ // (intrinsic_w_chain:{ *:[i32] } 14699:{ *:[iPTR] }, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr), i32:{ *:[i32] }:$exp, I64:{ *:[i64] }:$timeout) => (MEMORY_ATOMIC_WAIT32_A64:{ *:[i32] } 0:{ *:[i32] }, 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, ?:{ *:[i64] }:$addr, ?:{ *:[i32] }:$exp, ?:{ *:[i64] }:$timeout)
9199 /* 26018 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MEMORY_ATOMIC_WAIT32_A64),
9200 /* 26021 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9201 /* 26023 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9202 /* 26026 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9203 /* 26029 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
9204 /* 26034 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
9205 /* 26039 */ GIR_RootToRootCopy, /*OpIdx*/3, // exp
9206 /* 26041 */ GIR_RootToRootCopy, /*OpIdx*/4, // timeout
9207 /* 26043 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9208 /* 26046 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9209 /* 26050 */ GIR_RootConstrainSelectedInstOperands,
9210 /* 26051 */ // GIR_Coverage, 658,
9211 /* 26051 */ GIR_EraseRootFromParent_Done,
9212 /* 26052 */ // Label 799: @26052
9213 /* 26052 */ GIM_Reject,
9214 /* 26053 */ // Label 797: @26053
9215 /* 26053 */ GIM_Try, /*On fail goto*//*Label 800*/ GIMT_Encode4(26189),
9216 /* 26058 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_memory_atomic_wait64),
9217 /* 26063 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
9218 /* 26066 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i64,
9219 /* 26069 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_i64,
9220 /* 26072 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9221 /* 26076 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 801*/ GIMT_Encode4(26132), GIMT_Encode2(GIFBS_HasAddr32_HasAtomics), // Rule ID 659 //
9222 /* 26083 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/32,
9223 /* 26087 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9224 /* 26091 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
9225 /* 26098 */ // (intrinsic_w_chain:{ *:[i32] } 14700:{ *:[iPTR] }, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr), i64:{ *:[i64] }:$exp, I64:{ *:[i64] }:$timeout) => (MEMORY_ATOMIC_WAIT64_A32:{ *:[i32] } 0:{ *:[i32] }, 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, ?:{ *:[i32] }:$addr, ?:{ *:[i64] }:$exp, ?:{ *:[i64] }:$timeout)
9226 /* 26098 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MEMORY_ATOMIC_WAIT64_A32),
9227 /* 26101 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9228 /* 26103 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9229 /* 26106 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9230 /* 26109 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
9231 /* 26114 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
9232 /* 26119 */ GIR_RootToRootCopy, /*OpIdx*/3, // exp
9233 /* 26121 */ GIR_RootToRootCopy, /*OpIdx*/4, // timeout
9234 /* 26123 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9235 /* 26126 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9236 /* 26130 */ GIR_RootConstrainSelectedInstOperands,
9237 /* 26131 */ // GIR_Coverage, 659,
9238 /* 26131 */ GIR_EraseRootFromParent_Done,
9239 /* 26132 */ // Label 801: @26132
9240 /* 26132 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 802*/ GIMT_Encode4(26188), GIMT_Encode2(GIFBS_HasAddr64_HasAtomics), // Rule ID 660 //
9241 /* 26139 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/64,
9242 /* 26143 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9243 /* 26147 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
9244 /* 26154 */ // (intrinsic_w_chain:{ *:[i32] } 14700:{ *:[iPTR] }, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr), i64:{ *:[i64] }:$exp, I64:{ *:[i64] }:$timeout) => (MEMORY_ATOMIC_WAIT64_A64:{ *:[i32] } 0:{ *:[i32] }, 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, ?:{ *:[i64] }:$addr, ?:{ *:[i64] }:$exp, ?:{ *:[i64] }:$timeout)
9245 /* 26154 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MEMORY_ATOMIC_WAIT64_A64),
9246 /* 26157 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9247 /* 26159 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9248 /* 26162 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9249 /* 26165 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
9250 /* 26170 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
9251 /* 26175 */ GIR_RootToRootCopy, /*OpIdx*/3, // exp
9252 /* 26177 */ GIR_RootToRootCopy, /*OpIdx*/4, // timeout
9253 /* 26179 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9254 /* 26182 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9255 /* 26186 */ GIR_RootConstrainSelectedInstOperands,
9256 /* 26187 */ // GIR_Coverage, 660,
9257 /* 26187 */ GIR_EraseRootFromParent_Done,
9258 /* 26188 */ // Label 802: @26188
9259 /* 26188 */ GIM_Reject,
9260 /* 26189 */ // Label 800: @26189
9261 /* 26189 */ GIM_Reject,
9262 /* 26190 */ // Label 796: @26190
9263 /* 26190 */ GIM_Reject,
9264 /* 26191 */ // Label 25: @26191
9265 /* 26191 */ GIM_Try, /*On fail goto*//*Label 803*/ GIMT_Encode4(26223), // Rule ID 597 //
9266 /* 26196 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
9267 /* 26199 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
9268 /* 26202 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9269 /* 26206 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9270 /* 26210 */ // (anyext:{ *:[i64] } I32:{ *:[i32] }:$src) => (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$src)
9271 /* 26210 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
9272 /* 26215 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9273 /* 26221 */ GIR_RootConstrainSelectedInstOperands,
9274 /* 26222 */ // GIR_Coverage, 597,
9275 /* 26222 */ GIR_Done,
9276 /* 26223 */ // Label 803: @26223
9277 /* 26223 */ GIM_Reject,
9278 /* 26224 */ // Label 26: @26224
9279 /* 26224 */ GIM_Try, /*On fail goto*//*Label 804*/ GIMT_Encode4(26256), // Rule ID 26 //
9280 /* 26229 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
9281 /* 26232 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
9282 /* 26235 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9283 /* 26239 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9284 /* 26243 */ // (trunc:{ *:[i32] } I64:{ *:[i64] }:$src) => (I32_WRAP_I64:{ *:[i32] } I64:{ *:[i64] }:$src)
9285 /* 26243 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_WRAP_I64),
9286 /* 26248 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9287 /* 26254 */ GIR_RootConstrainSelectedInstOperands,
9288 /* 26255 */ // GIR_Coverage, 26,
9289 /* 26255 */ GIR_Done,
9290 /* 26256 */ // Label 804: @26256
9291 /* 26256 */ GIM_Reject,
9292 /* 26257 */ // Label 27: @26257
9293 /* 26257 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 807*/ GIMT_Encode4(26322),
9294 /* 26268 */ /*GILLT_s32*//*Label 805*/ GIMT_Encode4(26276),
9295 /* 26272 */ /*GILLT_s64*//*Label 806*/ GIMT_Encode4(26299),
9296 /* 26276 */ // Label 805: @26276
9297 /* 26276 */ GIM_Try, /*On fail goto*//*Label 808*/ GIMT_Encode4(26298), // Rule ID 7 //
9298 /* 26281 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9299 /* 26285 */ // MIs[0] Operand 1
9300 /* 26285 */ // No operand predicates
9301 /* 26285 */ // (imm:{ *:[i32] }):$imm => (CONST_I32:{ *:[i32] } (imm:{ *:[i32] }):$imm)
9302 /* 26285 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_I32),
9303 /* 26288 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
9304 /* 26290 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
9305 /* 26293 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9306 /* 26296 */ GIR_RootConstrainSelectedInstOperands,
9307 /* 26297 */ // GIR_Coverage, 7,
9308 /* 26297 */ GIR_EraseRootFromParent_Done,
9309 /* 26298 */ // Label 808: @26298
9310 /* 26298 */ GIM_Reject,
9311 /* 26299 */ // Label 806: @26299
9312 /* 26299 */ GIM_Try, /*On fail goto*//*Label 809*/ GIMT_Encode4(26321), // Rule ID 8 //
9313 /* 26304 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9314 /* 26308 */ // MIs[0] Operand 1
9315 /* 26308 */ // No operand predicates
9316 /* 26308 */ // (imm:{ *:[i64] }):$imm => (CONST_I64:{ *:[i64] } (imm:{ *:[i64] }):$imm)
9317 /* 26308 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_I64),
9318 /* 26311 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
9319 /* 26313 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
9320 /* 26316 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9321 /* 26319 */ GIR_RootConstrainSelectedInstOperands,
9322 /* 26320 */ // GIR_Coverage, 8,
9323 /* 26320 */ GIR_EraseRootFromParent_Done,
9324 /* 26321 */ // Label 809: @26321
9325 /* 26321 */ GIM_Reject,
9326 /* 26322 */ // Label 807: @26322
9327 /* 26322 */ GIM_Reject,
9328 /* 26323 */ // Label 28: @26323
9329 /* 26323 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 812*/ GIMT_Encode4(26388),
9330 /* 26334 */ /*GILLT_s32*//*Label 810*/ GIMT_Encode4(26342),
9331 /* 26338 */ /*GILLT_s64*//*Label 811*/ GIMT_Encode4(26365),
9332 /* 26342 */ // Label 810: @26342
9333 /* 26342 */ GIM_Try, /*On fail goto*//*Label 813*/ GIMT_Encode4(26364), // Rule ID 9 //
9334 /* 26347 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9335 /* 26351 */ // MIs[0] Operand 1
9336 /* 26351 */ // No operand predicates
9337 /* 26351 */ // (fpimm:{ *:[f32] }):$imm => (CONST_F32:{ *:[f32] } (fpimm:{ *:[f32] }):$imm)
9338 /* 26351 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_F32),
9339 /* 26354 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
9340 /* 26356 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
9341 /* 26359 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9342 /* 26362 */ GIR_RootConstrainSelectedInstOperands,
9343 /* 26363 */ // GIR_Coverage, 9,
9344 /* 26363 */ GIR_EraseRootFromParent_Done,
9345 /* 26364 */ // Label 813: @26364
9346 /* 26364 */ GIM_Reject,
9347 /* 26365 */ // Label 811: @26365
9348 /* 26365 */ GIM_Try, /*On fail goto*//*Label 814*/ GIMT_Encode4(26387), // Rule ID 10 //
9349 /* 26370 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9350 /* 26374 */ // MIs[0] Operand 1
9351 /* 26374 */ // No operand predicates
9352 /* 26374 */ // (fpimm:{ *:[f64] }):$imm => (CONST_F64:{ *:[f64] } (fpimm:{ *:[f64] }):$imm)
9353 /* 26374 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_F64),
9354 /* 26377 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
9355 /* 26379 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
9356 /* 26382 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9357 /* 26385 */ GIR_RootConstrainSelectedInstOperands,
9358 /* 26386 */ // GIR_Coverage, 10,
9359 /* 26386 */ GIR_EraseRootFromParent_Done,
9360 /* 26387 */ // Label 814: @26387
9361 /* 26387 */ GIM_Reject,
9362 /* 26388 */ // Label 812: @26388
9363 /* 26388 */ GIM_Reject,
9364 /* 26389 */ // Label 29: @26389
9365 /* 26389 */ GIM_Try, /*On fail goto*//*Label 815*/ GIMT_Encode4(26421), // Rule ID 27 //
9366 /* 26394 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
9367 /* 26397 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
9368 /* 26400 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9369 /* 26404 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9370 /* 26408 */ // (sext:{ *:[i64] } I32:{ *:[i32] }:$src) => (I64_EXTEND_S_I32:{ *:[i64] } I32:{ *:[i32] }:$src)
9371 /* 26408 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_S_I32),
9372 /* 26413 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9373 /* 26419 */ GIR_RootConstrainSelectedInstOperands,
9374 /* 26420 */ // GIR_Coverage, 27,
9375 /* 26420 */ GIR_Done,
9376 /* 26421 */ // Label 815: @26421
9377 /* 26421 */ GIM_Reject,
9378 /* 26422 */ // Label 30: @26422
9379 /* 26422 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 818*/ GIMT_Encode4(26627),
9380 /* 26433 */ /*GILLT_i32*//*Label 816*/ GIMT_Encode4(26441),
9381 /* 26437 */ /*GILLT_i64*//*Label 817*/ GIMT_Encode4(26519),
9382 /* 26441 */ // Label 816: @26441
9383 /* 26441 */ GIM_Try, /*On fail goto*//*Label 819*/ GIMT_Encode4(26518),
9384 /* 26446 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
9385 /* 26449 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9386 /* 26453 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9387 /* 26457 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 820*/ GIMT_Encode4(26487), GIMT_Encode2(GIFBS_HasSignExt), // Rule ID 29 //
9388 /* 26464 */ // MIs[0] Operand 2
9389 /* 26464 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(8),
9390 /* 26475 */ // (sext_inreg:{ *:[i32] } I32:{ *:[i32] }:$src, i8:{ *:[Other] }) => (I32_EXTEND8_S_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
9391 /* 26475 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_EXTEND8_S_I32),
9392 /* 26478 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9393 /* 26480 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
9394 /* 26482 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9395 /* 26485 */ GIR_RootConstrainSelectedInstOperands,
9396 /* 26486 */ // GIR_Coverage, 29,
9397 /* 26486 */ GIR_EraseRootFromParent_Done,
9398 /* 26487 */ // Label 820: @26487
9399 /* 26487 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 821*/ GIMT_Encode4(26517), GIMT_Encode2(GIFBS_HasSignExt), // Rule ID 30 //
9400 /* 26494 */ // MIs[0] Operand 2
9401 /* 26494 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(16),
9402 /* 26505 */ // (sext_inreg:{ *:[i32] } I32:{ *:[i32] }:$src, i16:{ *:[Other] }) => (I32_EXTEND16_S_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
9403 /* 26505 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_EXTEND16_S_I32),
9404 /* 26508 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9405 /* 26510 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
9406 /* 26512 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9407 /* 26515 */ GIR_RootConstrainSelectedInstOperands,
9408 /* 26516 */ // GIR_Coverage, 30,
9409 /* 26516 */ GIR_EraseRootFromParent_Done,
9410 /* 26517 */ // Label 821: @26517
9411 /* 26517 */ GIM_Reject,
9412 /* 26518 */ // Label 819: @26518
9413 /* 26518 */ GIM_Reject,
9414 /* 26519 */ // Label 817: @26519
9415 /* 26519 */ GIM_Try, /*On fail goto*//*Label 822*/ GIMT_Encode4(26626),
9416 /* 26524 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
9417 /* 26527 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9418 /* 26531 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9419 /* 26535 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 823*/ GIMT_Encode4(26565), GIMT_Encode2(GIFBS_HasSignExt), // Rule ID 31 //
9420 /* 26542 */ // MIs[0] Operand 2
9421 /* 26542 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(8),
9422 /* 26553 */ // (sext_inreg:{ *:[i64] } I64:{ *:[i64] }:$src, i8:{ *:[Other] }) => (I64_EXTEND8_S_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
9423 /* 26553 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND8_S_I64),
9424 /* 26556 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9425 /* 26558 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
9426 /* 26560 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9427 /* 26563 */ GIR_RootConstrainSelectedInstOperands,
9428 /* 26564 */ // GIR_Coverage, 31,
9429 /* 26564 */ GIR_EraseRootFromParent_Done,
9430 /* 26565 */ // Label 823: @26565
9431 /* 26565 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 824*/ GIMT_Encode4(26595), GIMT_Encode2(GIFBS_HasSignExt), // Rule ID 32 //
9432 /* 26572 */ // MIs[0] Operand 2
9433 /* 26572 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(16),
9434 /* 26583 */ // (sext_inreg:{ *:[i64] } I64:{ *:[i64] }:$src, i16:{ *:[Other] }) => (I64_EXTEND16_S_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
9435 /* 26583 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND16_S_I64),
9436 /* 26586 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9437 /* 26588 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
9438 /* 26590 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9439 /* 26593 */ GIR_RootConstrainSelectedInstOperands,
9440 /* 26594 */ // GIR_Coverage, 32,
9441 /* 26594 */ GIR_EraseRootFromParent_Done,
9442 /* 26595 */ // Label 824: @26595
9443 /* 26595 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 825*/ GIMT_Encode4(26625), GIMT_Encode2(GIFBS_HasSignExt), // Rule ID 33 //
9444 /* 26602 */ // MIs[0] Operand 2
9445 /* 26602 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(32),
9446 /* 26613 */ // (sext_inreg:{ *:[i64] } I64:{ *:[i64] }:$src, i32:{ *:[Other] }) => (I64_EXTEND32_S_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
9447 /* 26613 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND32_S_I64),
9448 /* 26616 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9449 /* 26618 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
9450 /* 26620 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9451 /* 26623 */ GIR_RootConstrainSelectedInstOperands,
9452 /* 26624 */ // GIR_Coverage, 33,
9453 /* 26624 */ GIR_EraseRootFromParent_Done,
9454 /* 26625 */ // Label 825: @26625
9455 /* 26625 */ GIM_Reject,
9456 /* 26626 */ // Label 822: @26626
9457 /* 26626 */ GIM_Reject,
9458 /* 26627 */ // Label 818: @26627
9459 /* 26627 */ GIM_Reject,
9460 /* 26628 */ // Label 31: @26628
9461 /* 26628 */ GIM_Try, /*On fail goto*//*Label 826*/ GIMT_Encode4(26660), // Rule ID 28 //
9462 /* 26633 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
9463 /* 26636 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
9464 /* 26639 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9465 /* 26643 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9466 /* 26647 */ // (zext:{ *:[i64] } I32:{ *:[i32] }:$src) => (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$src)
9467 /* 26647 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
9468 /* 26652 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9469 /* 26658 */ GIR_RootConstrainSelectedInstOperands,
9470 /* 26659 */ // GIR_Coverage, 28,
9471 /* 26659 */ GIR_Done,
9472 /* 26660 */ // Label 826: @26660
9473 /* 26660 */ GIM_Reject,
9474 /* 26661 */ // Label 32: @26661
9475 /* 26661 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 829*/ GIMT_Encode4(26942),
9476 /* 26672 */ /*GILLT_i32*//*Label 827*/ GIMT_Encode4(26680),
9477 /* 26676 */ /*GILLT_i64*//*Label 828*/ GIMT_Encode4(26771),
9478 /* 26680 */ // Label 827: @26680
9479 /* 26680 */ GIM_Try, /*On fail goto*//*Label 830*/ GIMT_Encode4(26770),
9480 /* 26685 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
9481 /* 26688 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
9482 /* 26691 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9483 /* 26695 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9484 /* 26699 */ GIM_Try, /*On fail goto*//*Label 831*/ GIMT_Encode4(26747), // Rule ID 614 //
9485 /* 26704 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9486 /* 26708 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
9487 /* 26712 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
9488 /* 26716 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
9489 /* 26720 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9490 /* 26725 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
9491 /* 26729 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9492 /* 26731 */ // (shl:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (SHL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
9493 /* 26731 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I32),
9494 /* 26734 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9495 /* 26736 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
9496 /* 26738 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
9497 /* 26742 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9498 /* 26745 */ GIR_RootConstrainSelectedInstOperands,
9499 /* 26746 */ // GIR_Coverage, 614,
9500 /* 26746 */ GIR_EraseRootFromParent_Done,
9501 /* 26747 */ // Label 831: @26747
9502 /* 26747 */ GIM_Try, /*On fail goto*//*Label 832*/ GIMT_Encode4(26769), // Rule ID 84 //
9503 /* 26752 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9504 /* 26756 */ // (shl:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SHL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
9505 /* 26756 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I32),
9506 /* 26761 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9507 /* 26767 */ GIR_RootConstrainSelectedInstOperands,
9508 /* 26768 */ // GIR_Coverage, 84,
9509 /* 26768 */ GIR_Done,
9510 /* 26769 */ // Label 832: @26769
9511 /* 26769 */ GIM_Reject,
9512 /* 26770 */ // Label 830: @26770
9513 /* 26770 */ GIM_Reject,
9514 /* 26771 */ // Label 828: @26771
9515 /* 26771 */ GIM_Try, /*On fail goto*//*Label 833*/ GIMT_Encode4(26941),
9516 /* 26776 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
9517 /* 26779 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
9518 /* 26782 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9519 /* 26786 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9520 /* 26790 */ GIM_Try, /*On fail goto*//*Label 834*/ GIMT_Encode4(26870), // Rule ID 624 //
9521 /* 26795 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9522 /* 26799 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ZEXT),
9523 /* 26803 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
9524 /* 26807 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
9525 /* 26811 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
9526 /* 26815 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_i32,
9527 /* 26819 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_i32,
9528 /* 26823 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9529 /* 26828 */ GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 63,
9530 /* 26832 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
9531 /* 26834 */ // (shl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (zext:{ *:[i64] } (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 63:{ *:[i32] }))) => (SHL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$rhs))
9532 /* 26834 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i64,
9533 /* 26837 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
9534 /* 26841 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
9535 /* 26846 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/2, /*OpIdx*/1, // rhs
9536 /* 26850 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9537 /* 26853 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
9538 /* 26855 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I64),
9539 /* 26858 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9540 /* 26860 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
9541 /* 26862 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
9542 /* 26865 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9543 /* 26868 */ GIR_RootConstrainSelectedInstOperands,
9544 /* 26869 */ // GIR_Coverage, 624,
9545 /* 26869 */ GIR_EraseRootFromParent_Done,
9546 /* 26870 */ // Label 834: @26870
9547 /* 26870 */ GIM_Try, /*On fail goto*//*Label 835*/ GIMT_Encode4(26918), // Rule ID 617 //
9548 /* 26875 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9549 /* 26879 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
9550 /* 26883 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i64,
9551 /* 26887 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i64,
9552 /* 26891 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9553 /* 26896 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
9554 /* 26900 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9555 /* 26902 */ // (shl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (SHL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
9556 /* 26902 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I64),
9557 /* 26905 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9558 /* 26907 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
9559 /* 26909 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
9560 /* 26913 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9561 /* 26916 */ GIR_RootConstrainSelectedInstOperands,
9562 /* 26917 */ // GIR_Coverage, 617,
9563 /* 26917 */ GIR_EraseRootFromParent_Done,
9564 /* 26918 */ // Label 835: @26918
9565 /* 26918 */ GIM_Try, /*On fail goto*//*Label 836*/ GIMT_Encode4(26940), // Rule ID 85 //
9566 /* 26923 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9567 /* 26927 */ // (shl:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SHL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
9568 /* 26927 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I64),
9569 /* 26932 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9570 /* 26938 */ GIR_RootConstrainSelectedInstOperands,
9571 /* 26939 */ // GIR_Coverage, 85,
9572 /* 26939 */ GIR_Done,
9573 /* 26940 */ // Label 836: @26940
9574 /* 26940 */ GIM_Reject,
9575 /* 26941 */ // Label 833: @26941
9576 /* 26941 */ GIM_Reject,
9577 /* 26942 */ // Label 829: @26942
9578 /* 26942 */ GIM_Reject,
9579 /* 26943 */ // Label 33: @26943
9580 /* 26943 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 839*/ GIMT_Encode4(27224),
9581 /* 26954 */ /*GILLT_i32*//*Label 837*/ GIMT_Encode4(26962),
9582 /* 26958 */ /*GILLT_i64*//*Label 838*/ GIMT_Encode4(27053),
9583 /* 26962 */ // Label 837: @26962
9584 /* 26962 */ GIM_Try, /*On fail goto*//*Label 840*/ GIMT_Encode4(27052),
9585 /* 26967 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
9586 /* 26970 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
9587 /* 26973 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9588 /* 26977 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9589 /* 26981 */ GIM_Try, /*On fail goto*//*Label 841*/ GIMT_Encode4(27029), // Rule ID 616 //
9590 /* 26986 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9591 /* 26990 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
9592 /* 26994 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
9593 /* 26998 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
9594 /* 27002 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9595 /* 27007 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
9596 /* 27011 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9597 /* 27013 */ // (srl:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (SHR_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
9598 /* 27013 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I32),
9599 /* 27016 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9600 /* 27018 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
9601 /* 27020 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
9602 /* 27024 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9603 /* 27027 */ GIR_RootConstrainSelectedInstOperands,
9604 /* 27028 */ // GIR_Coverage, 616,
9605 /* 27028 */ GIR_EraseRootFromParent_Done,
9606 /* 27029 */ // Label 841: @27029
9607 /* 27029 */ GIM_Try, /*On fail goto*//*Label 842*/ GIMT_Encode4(27051), // Rule ID 88 //
9608 /* 27034 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9609 /* 27038 */ // (srl:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SHR_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
9610 /* 27038 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I32),
9611 /* 27043 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9612 /* 27049 */ GIR_RootConstrainSelectedInstOperands,
9613 /* 27050 */ // GIR_Coverage, 88,
9614 /* 27050 */ GIR_Done,
9615 /* 27051 */ // Label 842: @27051
9616 /* 27051 */ GIM_Reject,
9617 /* 27052 */ // Label 840: @27052
9618 /* 27052 */ GIM_Reject,
9619 /* 27053 */ // Label 838: @27053
9620 /* 27053 */ GIM_Try, /*On fail goto*//*Label 843*/ GIMT_Encode4(27223),
9621 /* 27058 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
9622 /* 27061 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
9623 /* 27064 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9624 /* 27068 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9625 /* 27072 */ GIM_Try, /*On fail goto*//*Label 844*/ GIMT_Encode4(27152), // Rule ID 626 //
9626 /* 27077 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9627 /* 27081 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ZEXT),
9628 /* 27085 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
9629 /* 27089 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
9630 /* 27093 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
9631 /* 27097 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_i32,
9632 /* 27101 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_i32,
9633 /* 27105 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9634 /* 27110 */ GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 63,
9635 /* 27114 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
9636 /* 27116 */ // (srl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (zext:{ *:[i64] } (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 63:{ *:[i32] }))) => (SHR_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$rhs))
9637 /* 27116 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i64,
9638 /* 27119 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
9639 /* 27123 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
9640 /* 27128 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/2, /*OpIdx*/1, // rhs
9641 /* 27132 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9642 /* 27135 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
9643 /* 27137 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I64),
9644 /* 27140 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9645 /* 27142 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
9646 /* 27144 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
9647 /* 27147 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9648 /* 27150 */ GIR_RootConstrainSelectedInstOperands,
9649 /* 27151 */ // GIR_Coverage, 626,
9650 /* 27151 */ GIR_EraseRootFromParent_Done,
9651 /* 27152 */ // Label 844: @27152
9652 /* 27152 */ GIM_Try, /*On fail goto*//*Label 845*/ GIMT_Encode4(27200), // Rule ID 619 //
9653 /* 27157 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9654 /* 27161 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
9655 /* 27165 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i64,
9656 /* 27169 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i64,
9657 /* 27173 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9658 /* 27178 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
9659 /* 27182 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9660 /* 27184 */ // (srl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (SHR_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
9661 /* 27184 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I64),
9662 /* 27187 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9663 /* 27189 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
9664 /* 27191 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
9665 /* 27195 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9666 /* 27198 */ GIR_RootConstrainSelectedInstOperands,
9667 /* 27199 */ // GIR_Coverage, 619,
9668 /* 27199 */ GIR_EraseRootFromParent_Done,
9669 /* 27200 */ // Label 845: @27200
9670 /* 27200 */ GIM_Try, /*On fail goto*//*Label 846*/ GIMT_Encode4(27222), // Rule ID 89 //
9671 /* 27205 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9672 /* 27209 */ // (srl:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SHR_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
9673 /* 27209 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I64),
9674 /* 27214 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9675 /* 27220 */ GIR_RootConstrainSelectedInstOperands,
9676 /* 27221 */ // GIR_Coverage, 89,
9677 /* 27221 */ GIR_Done,
9678 /* 27222 */ // Label 846: @27222
9679 /* 27222 */ GIM_Reject,
9680 /* 27223 */ // Label 843: @27223
9681 /* 27223 */ GIM_Reject,
9682 /* 27224 */ // Label 839: @27224
9683 /* 27224 */ GIM_Reject,
9684 /* 27225 */ // Label 34: @27225
9685 /* 27225 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 849*/ GIMT_Encode4(27506),
9686 /* 27236 */ /*GILLT_i32*//*Label 847*/ GIMT_Encode4(27244),
9687 /* 27240 */ /*GILLT_i64*//*Label 848*/ GIMT_Encode4(27335),
9688 /* 27244 */ // Label 847: @27244
9689 /* 27244 */ GIM_Try, /*On fail goto*//*Label 850*/ GIMT_Encode4(27334),
9690 /* 27249 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
9691 /* 27252 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
9692 /* 27255 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9693 /* 27259 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9694 /* 27263 */ GIM_Try, /*On fail goto*//*Label 851*/ GIMT_Encode4(27311), // Rule ID 615 //
9695 /* 27268 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9696 /* 27272 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
9697 /* 27276 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
9698 /* 27280 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
9699 /* 27284 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9700 /* 27289 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
9701 /* 27293 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9702 /* 27295 */ // (sra:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (SHR_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
9703 /* 27295 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I32),
9704 /* 27298 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9705 /* 27300 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
9706 /* 27302 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
9707 /* 27306 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9708 /* 27309 */ GIR_RootConstrainSelectedInstOperands,
9709 /* 27310 */ // GIR_Coverage, 615,
9710 /* 27310 */ GIR_EraseRootFromParent_Done,
9711 /* 27311 */ // Label 851: @27311
9712 /* 27311 */ GIM_Try, /*On fail goto*//*Label 852*/ GIMT_Encode4(27333), // Rule ID 86 //
9713 /* 27316 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9714 /* 27320 */ // (sra:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SHR_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
9715 /* 27320 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I32),
9716 /* 27325 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9717 /* 27331 */ GIR_RootConstrainSelectedInstOperands,
9718 /* 27332 */ // GIR_Coverage, 86,
9719 /* 27332 */ GIR_Done,
9720 /* 27333 */ // Label 852: @27333
9721 /* 27333 */ GIM_Reject,
9722 /* 27334 */ // Label 850: @27334
9723 /* 27334 */ GIM_Reject,
9724 /* 27335 */ // Label 848: @27335
9725 /* 27335 */ GIM_Try, /*On fail goto*//*Label 853*/ GIMT_Encode4(27505),
9726 /* 27340 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
9727 /* 27343 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
9728 /* 27346 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9729 /* 27350 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9730 /* 27354 */ GIM_Try, /*On fail goto*//*Label 854*/ GIMT_Encode4(27434), // Rule ID 625 //
9731 /* 27359 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9732 /* 27363 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ZEXT),
9733 /* 27367 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
9734 /* 27371 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
9735 /* 27375 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
9736 /* 27379 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_i32,
9737 /* 27383 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_i32,
9738 /* 27387 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9739 /* 27392 */ GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 63,
9740 /* 27396 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
9741 /* 27398 */ // (sra:{ *:[i64] } I64:{ *:[i64] }:$lhs, (zext:{ *:[i64] } (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 63:{ *:[i32] }))) => (SHR_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$rhs))
9742 /* 27398 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i64,
9743 /* 27401 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
9744 /* 27405 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
9745 /* 27410 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/2, /*OpIdx*/1, // rhs
9746 /* 27414 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9747 /* 27417 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
9748 /* 27419 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I64),
9749 /* 27422 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9750 /* 27424 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
9751 /* 27426 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
9752 /* 27429 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9753 /* 27432 */ GIR_RootConstrainSelectedInstOperands,
9754 /* 27433 */ // GIR_Coverage, 625,
9755 /* 27433 */ GIR_EraseRootFromParent_Done,
9756 /* 27434 */ // Label 854: @27434
9757 /* 27434 */ GIM_Try, /*On fail goto*//*Label 855*/ GIMT_Encode4(27482), // Rule ID 618 //
9758 /* 27439 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9759 /* 27443 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
9760 /* 27447 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i64,
9761 /* 27451 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i64,
9762 /* 27455 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9763 /* 27460 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
9764 /* 27464 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9765 /* 27466 */ // (sra:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (SHR_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
9766 /* 27466 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I64),
9767 /* 27469 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9768 /* 27471 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
9769 /* 27473 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
9770 /* 27477 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9771 /* 27480 */ GIR_RootConstrainSelectedInstOperands,
9772 /* 27481 */ // GIR_Coverage, 618,
9773 /* 27481 */ GIR_EraseRootFromParent_Done,
9774 /* 27482 */ // Label 855: @27482
9775 /* 27482 */ GIM_Try, /*On fail goto*//*Label 856*/ GIMT_Encode4(27504), // Rule ID 87 //
9776 /* 27487 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9777 /* 27491 */ // (sra:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SHR_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
9778 /* 27491 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I64),
9779 /* 27496 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9780 /* 27502 */ GIR_RootConstrainSelectedInstOperands,
9781 /* 27503 */ // GIR_Coverage, 87,
9782 /* 27503 */ GIR_Done,
9783 /* 27504 */ // Label 856: @27504
9784 /* 27504 */ GIM_Reject,
9785 /* 27505 */ // Label 853: @27505
9786 /* 27505 */ GIM_Reject,
9787 /* 27506 */ // Label 849: @27506
9788 /* 27506 */ GIM_Reject,
9789 /* 27507 */ // Label 35: @27507
9790 /* 27507 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 859*/ GIMT_Encode4(27708),
9791 /* 27518 */ /*GILLT_i32*//*Label 857*/ GIMT_Encode4(27526),
9792 /* 27522 */ /*GILLT_i64*//*Label 858*/ GIMT_Encode4(27617),
9793 /* 27526 */ // Label 857: @27526
9794 /* 27526 */ GIM_Try, /*On fail goto*//*Label 860*/ GIMT_Encode4(27616),
9795 /* 27531 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
9796 /* 27534 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
9797 /* 27537 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9798 /* 27541 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9799 /* 27545 */ GIM_Try, /*On fail goto*//*Label 861*/ GIMT_Encode4(27593), // Rule ID 621 //
9800 /* 27550 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9801 /* 27554 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
9802 /* 27558 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
9803 /* 27562 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
9804 /* 27566 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9805 /* 27571 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
9806 /* 27575 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9807 /* 27577 */ // (rotr:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (ROTR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
9808 /* 27577 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I32),
9809 /* 27580 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9810 /* 27582 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
9811 /* 27584 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
9812 /* 27588 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9813 /* 27591 */ GIR_RootConstrainSelectedInstOperands,
9814 /* 27592 */ // GIR_Coverage, 621,
9815 /* 27592 */ GIR_EraseRootFromParent_Done,
9816 /* 27593 */ // Label 861: @27593
9817 /* 27593 */ GIM_Try, /*On fail goto*//*Label 862*/ GIMT_Encode4(27615), // Rule ID 92 //
9818 /* 27598 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9819 /* 27602 */ // (rotr:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (ROTR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
9820 /* 27602 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I32),
9821 /* 27607 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9822 /* 27613 */ GIR_RootConstrainSelectedInstOperands,
9823 /* 27614 */ // GIR_Coverage, 92,
9824 /* 27614 */ GIR_Done,
9825 /* 27615 */ // Label 862: @27615
9826 /* 27615 */ GIM_Reject,
9827 /* 27616 */ // Label 860: @27616
9828 /* 27616 */ GIM_Reject,
9829 /* 27617 */ // Label 858: @27617
9830 /* 27617 */ GIM_Try, /*On fail goto*//*Label 863*/ GIMT_Encode4(27707),
9831 /* 27622 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
9832 /* 27625 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
9833 /* 27628 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9834 /* 27632 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9835 /* 27636 */ GIM_Try, /*On fail goto*//*Label 864*/ GIMT_Encode4(27684), // Rule ID 623 //
9836 /* 27641 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9837 /* 27645 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
9838 /* 27649 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i64,
9839 /* 27653 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i64,
9840 /* 27657 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9841 /* 27662 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
9842 /* 27666 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9843 /* 27668 */ // (rotr:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (ROTR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
9844 /* 27668 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I64),
9845 /* 27671 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9846 /* 27673 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
9847 /* 27675 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
9848 /* 27679 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9849 /* 27682 */ GIR_RootConstrainSelectedInstOperands,
9850 /* 27683 */ // GIR_Coverage, 623,
9851 /* 27683 */ GIR_EraseRootFromParent_Done,
9852 /* 27684 */ // Label 864: @27684
9853 /* 27684 */ GIM_Try, /*On fail goto*//*Label 865*/ GIMT_Encode4(27706), // Rule ID 93 //
9854 /* 27689 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9855 /* 27693 */ // (rotr:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (ROTR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
9856 /* 27693 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I64),
9857 /* 27698 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9858 /* 27704 */ GIR_RootConstrainSelectedInstOperands,
9859 /* 27705 */ // GIR_Coverage, 93,
9860 /* 27705 */ GIR_Done,
9861 /* 27706 */ // Label 865: @27706
9862 /* 27706 */ GIM_Reject,
9863 /* 27707 */ // Label 863: @27707
9864 /* 27707 */ GIM_Reject,
9865 /* 27708 */ // Label 859: @27708
9866 /* 27708 */ GIM_Reject,
9867 /* 27709 */ // Label 36: @27709
9868 /* 27709 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 868*/ GIMT_Encode4(27910),
9869 /* 27720 */ /*GILLT_i32*//*Label 866*/ GIMT_Encode4(27728),
9870 /* 27724 */ /*GILLT_i64*//*Label 867*/ GIMT_Encode4(27819),
9871 /* 27728 */ // Label 866: @27728
9872 /* 27728 */ GIM_Try, /*On fail goto*//*Label 869*/ GIMT_Encode4(27818),
9873 /* 27733 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
9874 /* 27736 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
9875 /* 27739 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9876 /* 27743 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9877 /* 27747 */ GIM_Try, /*On fail goto*//*Label 870*/ GIMT_Encode4(27795), // Rule ID 620 //
9878 /* 27752 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9879 /* 27756 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
9880 /* 27760 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
9881 /* 27764 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
9882 /* 27768 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9883 /* 27773 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
9884 /* 27777 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9885 /* 27779 */ // (rotl:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (ROTL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
9886 /* 27779 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I32),
9887 /* 27782 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9888 /* 27784 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
9889 /* 27786 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
9890 /* 27790 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9891 /* 27793 */ GIR_RootConstrainSelectedInstOperands,
9892 /* 27794 */ // GIR_Coverage, 620,
9893 /* 27794 */ GIR_EraseRootFromParent_Done,
9894 /* 27795 */ // Label 870: @27795
9895 /* 27795 */ GIM_Try, /*On fail goto*//*Label 871*/ GIMT_Encode4(27817), // Rule ID 90 //
9896 /* 27800 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9897 /* 27804 */ // (rotl:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (ROTL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
9898 /* 27804 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I32),
9899 /* 27809 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9900 /* 27815 */ GIR_RootConstrainSelectedInstOperands,
9901 /* 27816 */ // GIR_Coverage, 90,
9902 /* 27816 */ GIR_Done,
9903 /* 27817 */ // Label 871: @27817
9904 /* 27817 */ GIM_Reject,
9905 /* 27818 */ // Label 869: @27818
9906 /* 27818 */ GIM_Reject,
9907 /* 27819 */ // Label 867: @27819
9908 /* 27819 */ GIM_Try, /*On fail goto*//*Label 872*/ GIMT_Encode4(27909),
9909 /* 27824 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
9910 /* 27827 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
9911 /* 27830 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9912 /* 27834 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9913 /* 27838 */ GIM_Try, /*On fail goto*//*Label 873*/ GIMT_Encode4(27886), // Rule ID 622 //
9914 /* 27843 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9915 /* 27847 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
9916 /* 27851 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i64,
9917 /* 27855 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i64,
9918 /* 27859 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9919 /* 27864 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
9920 /* 27868 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9921 /* 27870 */ // (rotl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (ROTL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
9922 /* 27870 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I64),
9923 /* 27873 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9924 /* 27875 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
9925 /* 27877 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
9926 /* 27881 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9927 /* 27884 */ GIR_RootConstrainSelectedInstOperands,
9928 /* 27885 */ // GIR_Coverage, 622,
9929 /* 27885 */ GIR_EraseRootFromParent_Done,
9930 /* 27886 */ // Label 873: @27886
9931 /* 27886 */ GIM_Try, /*On fail goto*//*Label 874*/ GIMT_Encode4(27908), // Rule ID 91 //
9932 /* 27891 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9933 /* 27895 */ // (rotl:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (ROTL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
9934 /* 27895 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I64),
9935 /* 27900 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9936 /* 27906 */ GIR_RootConstrainSelectedInstOperands,
9937 /* 27907 */ // GIR_Coverage, 91,
9938 /* 27907 */ GIR_Done,
9939 /* 27908 */ // Label 874: @27908
9940 /* 27908 */ GIM_Reject,
9941 /* 27909 */ // Label 872: @27909
9942 /* 27909 */ GIM_Reject,
9943 /* 27910 */ // Label 868: @27910
9944 /* 27910 */ GIM_Reject,
9945 /* 27911 */ // Label 37: @27911
9946 /* 27911 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 880*/ GIMT_Encode4(32670),
9947 /* 27922 */ /*GILLT_i32*//*Label 875*/ GIMT_Encode4(27978), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
9948 /* 27962 */ /*GILLT_v16i8*//*Label 876*/ GIMT_Encode4(31378),
9949 /* 27966 */ /*GILLT_v8i16*//*Label 877*/ GIMT_Encode4(31735),
9950 /* 27970 */ /*GILLT_v4i32*//*Label 878*/ GIMT_Encode4(32092),
9951 /* 27974 */ /*GILLT_v2i64*//*Label 879*/ GIMT_Encode4(32449),
9952 /* 27978 */ // Label 875: @27978
9953 /* 27978 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(2), GIMT_Encode2(8), /*)*//*default:*//*Label 885*/ GIMT_Encode4(31377),
9954 /* 27989 */ /*GILLT_i32*//*Label 881*/ GIMT_Encode4(28013),
9955 /* 27993 */ /*GILLT_i64*//*Label 882*/ GIMT_Encode4(30468), GIMT_Encode4(0), GIMT_Encode4(0),
9956 /* 28005 */ /*GILLT_p0s32*//*Label 883*/ GIMT_Encode4(30829),
9957 /* 28009 */ /*GILLT_p0s64*//*Label 884*/ GIMT_Encode4(31103),
9958 /* 28013 */ // Label 881: @28013
9959 /* 28013 */ GIM_Try, /*On fail goto*//*Label 886*/ GIMT_Encode4(30467),
9960 /* 28018 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
9961 /* 28021 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9962 /* 28025 */ GIM_Try, /*On fail goto*//*Label 887*/ GIMT_Encode4(28156),
9963 /* 28030 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
9964 /* 28035 */ GIM_Try, /*On fail goto*//*Label 888*/ GIMT_Encode4(28085), // Rule ID 1104 //
9965 /* 28040 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9966 /* 28044 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
9967 /* 28048 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
9968 /* 28051 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
9969 /* 28056 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
9970 /* 28060 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9971 /* 28065 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
9972 /* 28069 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9973 /* 28071 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x)
9974 /* 28071 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
9975 /* 28074 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9976 /* 28076 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
9977 /* 28080 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9978 /* 28083 */ GIR_RootConstrainSelectedInstOperands,
9979 /* 28084 */ // GIR_Coverage, 1104,
9980 /* 28084 */ GIR_EraseRootFromParent_Done,
9981 /* 28085 */ // Label 888: @28085
9982 /* 28085 */ GIM_Try, /*On fail goto*//*Label 889*/ GIMT_Encode4(28155), // Rule ID 1105 //
9983 /* 28090 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9984 /* 28094 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
9985 /* 28098 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
9986 /* 28101 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
9987 /* 28106 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
9988 /* 28110 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9989 /* 28115 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
9990 /* 28119 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9991 /* 28121 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x))
9992 /* 28121 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
9993 /* 28124 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
9994 /* 28128 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
9995 /* 28133 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
9996 /* 28137 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9997 /* 28140 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
9998 /* 28142 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
9999 /* 28145 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10000 /* 28147 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10001 /* 28150 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10002 /* 28153 */ GIR_RootConstrainSelectedInstOperands,
10003 /* 28154 */ // GIR_Coverage, 1105,
10004 /* 28154 */ GIR_EraseRootFromParent_Done,
10005 /* 28155 */ // Label 889: @28155
10006 /* 28155 */ GIM_Reject,
10007 /* 28156 */ // Label 887: @28156
10008 /* 28156 */ GIM_Try, /*On fail goto*//*Label 890*/ GIMT_Encode4(28287),
10009 /* 28161 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10010 /* 28166 */ GIM_Try, /*On fail goto*//*Label 891*/ GIMT_Encode4(28216), // Rule ID 1106 //
10011 /* 28171 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10012 /* 28175 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10013 /* 28179 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10014 /* 28182 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10015 /* 28187 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
10016 /* 28191 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10017 /* 28196 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10018 /* 28200 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10019 /* 28202 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x)
10020 /* 28202 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10021 /* 28205 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10022 /* 28207 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10023 /* 28211 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10024 /* 28214 */ GIR_RootConstrainSelectedInstOperands,
10025 /* 28215 */ // GIR_Coverage, 1106,
10026 /* 28215 */ GIR_EraseRootFromParent_Done,
10027 /* 28216 */ // Label 891: @28216
10028 /* 28216 */ GIM_Try, /*On fail goto*//*Label 892*/ GIMT_Encode4(28286), // Rule ID 1107 //
10029 /* 28221 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10030 /* 28225 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10031 /* 28229 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10032 /* 28232 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10033 /* 28237 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
10034 /* 28241 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10035 /* 28246 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10036 /* 28250 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10037 /* 28252 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x))
10038 /* 28252 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10039 /* 28255 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10040 /* 28259 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10041 /* 28264 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10042 /* 28268 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10043 /* 28271 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10044 /* 28273 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10045 /* 28276 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10046 /* 28278 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10047 /* 28281 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10048 /* 28284 */ GIR_RootConstrainSelectedInstOperands,
10049 /* 28285 */ // GIR_Coverage, 1107,
10050 /* 28285 */ GIR_EraseRootFromParent_Done,
10051 /* 28286 */ // Label 892: @28286
10052 /* 28286 */ GIM_Reject,
10053 /* 28287 */ // Label 890: @28287
10054 /* 28287 */ GIM_Try, /*On fail goto*//*Label 893*/ GIMT_Encode4(28418),
10055 /* 28292 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10056 /* 28297 */ GIM_Try, /*On fail goto*//*Label 894*/ GIMT_Encode4(28347), // Rule ID 1109 //
10057 /* 28302 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10058 /* 28306 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10059 /* 28310 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10060 /* 28313 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10061 /* 28318 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
10062 /* 28322 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10063 /* 28327 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10064 /* 28331 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10065 /* 28333 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x)
10066 /* 28333 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10067 /* 28336 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10068 /* 28338 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10069 /* 28342 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10070 /* 28345 */ GIR_RootConstrainSelectedInstOperands,
10071 /* 28346 */ // GIR_Coverage, 1109,
10072 /* 28346 */ GIR_EraseRootFromParent_Done,
10073 /* 28347 */ // Label 894: @28347
10074 /* 28347 */ GIM_Try, /*On fail goto*//*Label 895*/ GIMT_Encode4(28417), // Rule ID 1110 //
10075 /* 28352 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10076 /* 28356 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10077 /* 28360 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10078 /* 28363 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10079 /* 28368 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
10080 /* 28372 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10081 /* 28377 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10082 /* 28381 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10083 /* 28383 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x))
10084 /* 28383 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10085 /* 28386 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10086 /* 28390 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10087 /* 28395 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10088 /* 28399 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10089 /* 28402 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10090 /* 28404 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10091 /* 28407 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10092 /* 28409 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10093 /* 28412 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10094 /* 28415 */ GIR_RootConstrainSelectedInstOperands,
10095 /* 28416 */ // GIR_Coverage, 1110,
10096 /* 28416 */ GIR_EraseRootFromParent_Done,
10097 /* 28417 */ // Label 895: @28417
10098 /* 28417 */ GIM_Reject,
10099 /* 28418 */ // Label 893: @28418
10100 /* 28418 */ GIM_Try, /*On fail goto*//*Label 896*/ GIMT_Encode4(28549),
10101 /* 28423 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10102 /* 28428 */ GIM_Try, /*On fail goto*//*Label 897*/ GIMT_Encode4(28478), // Rule ID 1111 //
10103 /* 28433 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10104 /* 28437 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10105 /* 28441 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10106 /* 28444 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10107 /* 28449 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
10108 /* 28453 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10109 /* 28458 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10110 /* 28462 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10111 /* 28464 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x)
10112 /* 28464 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10113 /* 28467 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10114 /* 28469 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10115 /* 28473 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10116 /* 28476 */ GIR_RootConstrainSelectedInstOperands,
10117 /* 28477 */ // GIR_Coverage, 1111,
10118 /* 28477 */ GIR_EraseRootFromParent_Done,
10119 /* 28478 */ // Label 897: @28478
10120 /* 28478 */ GIM_Try, /*On fail goto*//*Label 898*/ GIMT_Encode4(28548), // Rule ID 1112 //
10121 /* 28483 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10122 /* 28487 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10123 /* 28491 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10124 /* 28494 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10125 /* 28499 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
10126 /* 28503 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10127 /* 28508 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10128 /* 28512 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10129 /* 28514 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x))
10130 /* 28514 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10131 /* 28517 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10132 /* 28521 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10133 /* 28526 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10134 /* 28530 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10135 /* 28533 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10136 /* 28535 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10137 /* 28538 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10138 /* 28540 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10139 /* 28543 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10140 /* 28546 */ GIR_RootConstrainSelectedInstOperands,
10141 /* 28547 */ // GIR_Coverage, 1112,
10142 /* 28547 */ GIR_EraseRootFromParent_Done,
10143 /* 28548 */ // Label 898: @28548
10144 /* 28548 */ GIM_Reject,
10145 /* 28549 */ // Label 896: @28549
10146 /* 28549 */ GIM_Try, /*On fail goto*//*Label 899*/ GIMT_Encode4(28680),
10147 /* 28554 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10148 /* 28559 */ GIM_Try, /*On fail goto*//*Label 900*/ GIMT_Encode4(28609), // Rule ID 1114 //
10149 /* 28564 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10150 /* 28568 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10151 /* 28572 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10152 /* 28575 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10153 /* 28580 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
10154 /* 28584 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10155 /* 28589 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10156 /* 28593 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10157 /* 28595 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x)
10158 /* 28595 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10159 /* 28598 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10160 /* 28600 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10161 /* 28604 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10162 /* 28607 */ GIR_RootConstrainSelectedInstOperands,
10163 /* 28608 */ // GIR_Coverage, 1114,
10164 /* 28608 */ GIR_EraseRootFromParent_Done,
10165 /* 28609 */ // Label 900: @28609
10166 /* 28609 */ GIM_Try, /*On fail goto*//*Label 901*/ GIMT_Encode4(28679), // Rule ID 1115 //
10167 /* 28614 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10168 /* 28618 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10169 /* 28622 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10170 /* 28625 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10171 /* 28630 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
10172 /* 28634 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10173 /* 28639 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10174 /* 28643 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10175 /* 28645 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x))
10176 /* 28645 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10177 /* 28648 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10178 /* 28652 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10179 /* 28657 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10180 /* 28661 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10181 /* 28664 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10182 /* 28666 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10183 /* 28669 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10184 /* 28671 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10185 /* 28674 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10186 /* 28677 */ GIR_RootConstrainSelectedInstOperands,
10187 /* 28678 */ // GIR_Coverage, 1115,
10188 /* 28678 */ GIR_EraseRootFromParent_Done,
10189 /* 28679 */ // Label 901: @28679
10190 /* 28679 */ GIM_Reject,
10191 /* 28680 */ // Label 899: @28680
10192 /* 28680 */ GIM_Try, /*On fail goto*//*Label 902*/ GIMT_Encode4(28811),
10193 /* 28685 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10194 /* 28690 */ GIM_Try, /*On fail goto*//*Label 903*/ GIMT_Encode4(28740), // Rule ID 1116 //
10195 /* 28695 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10196 /* 28699 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10197 /* 28703 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10198 /* 28706 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10199 /* 28711 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
10200 /* 28715 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10201 /* 28720 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10202 /* 28724 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10203 /* 28726 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x)
10204 /* 28726 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10205 /* 28729 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10206 /* 28731 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10207 /* 28735 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10208 /* 28738 */ GIR_RootConstrainSelectedInstOperands,
10209 /* 28739 */ // GIR_Coverage, 1116,
10210 /* 28739 */ GIR_EraseRootFromParent_Done,
10211 /* 28740 */ // Label 903: @28740
10212 /* 28740 */ GIM_Try, /*On fail goto*//*Label 904*/ GIMT_Encode4(28810), // Rule ID 1117 //
10213 /* 28745 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10214 /* 28749 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10215 /* 28753 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10216 /* 28756 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10217 /* 28761 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
10218 /* 28765 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10219 /* 28770 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10220 /* 28774 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10221 /* 28776 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x))
10222 /* 28776 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10223 /* 28779 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10224 /* 28783 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10225 /* 28788 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10226 /* 28792 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10227 /* 28795 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10228 /* 28797 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10229 /* 28800 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10230 /* 28802 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10231 /* 28805 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10232 /* 28808 */ GIR_RootConstrainSelectedInstOperands,
10233 /* 28809 */ // GIR_Coverage, 1117,
10234 /* 28809 */ GIR_EraseRootFromParent_Done,
10235 /* 28810 */ // Label 904: @28810
10236 /* 28810 */ GIM_Reject,
10237 /* 28811 */ // Label 902: @28811
10238 /* 28811 */ GIM_Try, /*On fail goto*//*Label 905*/ GIMT_Encode4(28942),
10239 /* 28816 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10240 /* 28821 */ GIM_Try, /*On fail goto*//*Label 906*/ GIMT_Encode4(28871), // Rule ID 1119 //
10241 /* 28826 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10242 /* 28830 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10243 /* 28834 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10244 /* 28837 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10245 /* 28842 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
10246 /* 28846 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10247 /* 28851 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10248 /* 28855 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10249 /* 28857 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x)
10250 /* 28857 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10251 /* 28860 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10252 /* 28862 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10253 /* 28866 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10254 /* 28869 */ GIR_RootConstrainSelectedInstOperands,
10255 /* 28870 */ // GIR_Coverage, 1119,
10256 /* 28870 */ GIR_EraseRootFromParent_Done,
10257 /* 28871 */ // Label 906: @28871
10258 /* 28871 */ GIM_Try, /*On fail goto*//*Label 907*/ GIMT_Encode4(28941), // Rule ID 1120 //
10259 /* 28876 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10260 /* 28880 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10261 /* 28884 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10262 /* 28887 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10263 /* 28892 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
10264 /* 28896 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10265 /* 28901 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10266 /* 28905 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10267 /* 28907 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x))
10268 /* 28907 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10269 /* 28910 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10270 /* 28914 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10271 /* 28919 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10272 /* 28923 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10273 /* 28926 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10274 /* 28928 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10275 /* 28931 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10276 /* 28933 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10277 /* 28936 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10278 /* 28939 */ GIR_RootConstrainSelectedInstOperands,
10279 /* 28940 */ // GIR_Coverage, 1120,
10280 /* 28940 */ GIR_EraseRootFromParent_Done,
10281 /* 28941 */ // Label 907: @28941
10282 /* 28941 */ GIM_Reject,
10283 /* 28942 */ // Label 905: @28942
10284 /* 28942 */ GIM_Try, /*On fail goto*//*Label 908*/ GIMT_Encode4(29073),
10285 /* 28947 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10286 /* 28952 */ GIM_Try, /*On fail goto*//*Label 909*/ GIMT_Encode4(29002), // Rule ID 1121 //
10287 /* 28957 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10288 /* 28961 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10289 /* 28965 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10290 /* 28968 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10291 /* 28973 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
10292 /* 28977 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10293 /* 28982 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10294 /* 28986 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10295 /* 28988 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x)
10296 /* 28988 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10297 /* 28991 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10298 /* 28993 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10299 /* 28997 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10300 /* 29000 */ GIR_RootConstrainSelectedInstOperands,
10301 /* 29001 */ // GIR_Coverage, 1121,
10302 /* 29001 */ GIR_EraseRootFromParent_Done,
10303 /* 29002 */ // Label 909: @29002
10304 /* 29002 */ GIM_Try, /*On fail goto*//*Label 910*/ GIMT_Encode4(29072), // Rule ID 1122 //
10305 /* 29007 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10306 /* 29011 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10307 /* 29015 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10308 /* 29018 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10309 /* 29023 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
10310 /* 29027 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10311 /* 29032 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10312 /* 29036 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10313 /* 29038 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14683:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x))
10314 /* 29038 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10315 /* 29041 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10316 /* 29045 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10317 /* 29050 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10318 /* 29054 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10319 /* 29057 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10320 /* 29059 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10321 /* 29062 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10322 /* 29064 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10323 /* 29067 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10324 /* 29070 */ GIR_RootConstrainSelectedInstOperands,
10325 /* 29071 */ // GIR_Coverage, 1122,
10326 /* 29071 */ GIR_EraseRootFromParent_Done,
10327 /* 29072 */ // Label 910: @29072
10328 /* 29072 */ GIM_Reject,
10329 /* 29073 */ // Label 908: @29073
10330 /* 29073 */ GIM_Try, /*On fail goto*//*Label 911*/ GIMT_Encode4(29204),
10331 /* 29078 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10332 /* 29083 */ GIM_Try, /*On fail goto*//*Label 912*/ GIMT_Encode4(29133), // Rule ID 1124 //
10333 /* 29088 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10334 /* 29092 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10335 /* 29096 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10336 /* 29099 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10337 /* 29104 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
10338 /* 29108 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10339 /* 29113 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10340 /* 29117 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10341 /* 29119 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x)
10342 /* 29119 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
10343 /* 29122 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10344 /* 29124 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10345 /* 29128 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10346 /* 29131 */ GIR_RootConstrainSelectedInstOperands,
10347 /* 29132 */ // GIR_Coverage, 1124,
10348 /* 29132 */ GIR_EraseRootFromParent_Done,
10349 /* 29133 */ // Label 912: @29133
10350 /* 29133 */ GIM_Try, /*On fail goto*//*Label 913*/ GIMT_Encode4(29203), // Rule ID 1125 //
10351 /* 29138 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10352 /* 29142 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10353 /* 29146 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10354 /* 29149 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10355 /* 29154 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
10356 /* 29158 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10357 /* 29163 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10358 /* 29167 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10359 /* 29169 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x))
10360 /* 29169 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10361 /* 29172 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
10362 /* 29176 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10363 /* 29181 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10364 /* 29185 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10365 /* 29188 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10366 /* 29190 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10367 /* 29193 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10368 /* 29195 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10369 /* 29198 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10370 /* 29201 */ GIR_RootConstrainSelectedInstOperands,
10371 /* 29202 */ // GIR_Coverage, 1125,
10372 /* 29202 */ GIR_EraseRootFromParent_Done,
10373 /* 29203 */ // Label 913: @29203
10374 /* 29203 */ GIM_Reject,
10375 /* 29204 */ // Label 911: @29204
10376 /* 29204 */ GIM_Try, /*On fail goto*//*Label 914*/ GIMT_Encode4(29335),
10377 /* 29209 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10378 /* 29214 */ GIM_Try, /*On fail goto*//*Label 915*/ GIMT_Encode4(29264), // Rule ID 1126 //
10379 /* 29219 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10380 /* 29223 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10381 /* 29227 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10382 /* 29230 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10383 /* 29235 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
10384 /* 29239 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10385 /* 29244 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10386 /* 29248 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10387 /* 29250 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x)
10388 /* 29250 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
10389 /* 29253 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10390 /* 29255 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10391 /* 29259 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10392 /* 29262 */ GIR_RootConstrainSelectedInstOperands,
10393 /* 29263 */ // GIR_Coverage, 1126,
10394 /* 29263 */ GIR_EraseRootFromParent_Done,
10395 /* 29264 */ // Label 915: @29264
10396 /* 29264 */ GIM_Try, /*On fail goto*//*Label 916*/ GIMT_Encode4(29334), // Rule ID 1127 //
10397 /* 29269 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10398 /* 29273 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10399 /* 29277 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10400 /* 29280 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10401 /* 29285 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
10402 /* 29289 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10403 /* 29294 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10404 /* 29298 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10405 /* 29300 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x))
10406 /* 29300 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10407 /* 29303 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
10408 /* 29307 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10409 /* 29312 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10410 /* 29316 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10411 /* 29319 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10412 /* 29321 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10413 /* 29324 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10414 /* 29326 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10415 /* 29329 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10416 /* 29332 */ GIR_RootConstrainSelectedInstOperands,
10417 /* 29333 */ // GIR_Coverage, 1127,
10418 /* 29333 */ GIR_EraseRootFromParent_Done,
10419 /* 29334 */ // Label 916: @29334
10420 /* 29334 */ GIM_Reject,
10421 /* 29335 */ // Label 914: @29335
10422 /* 29335 */ GIM_Try, /*On fail goto*//*Label 917*/ GIMT_Encode4(29466),
10423 /* 29340 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10424 /* 29345 */ GIM_Try, /*On fail goto*//*Label 918*/ GIMT_Encode4(29395), // Rule ID 1129 //
10425 /* 29350 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10426 /* 29354 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10427 /* 29358 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10428 /* 29361 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10429 /* 29366 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
10430 /* 29370 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10431 /* 29375 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10432 /* 29379 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10433 /* 29381 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x)
10434 /* 29381 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
10435 /* 29384 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10436 /* 29386 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10437 /* 29390 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10438 /* 29393 */ GIR_RootConstrainSelectedInstOperands,
10439 /* 29394 */ // GIR_Coverage, 1129,
10440 /* 29394 */ GIR_EraseRootFromParent_Done,
10441 /* 29395 */ // Label 918: @29395
10442 /* 29395 */ GIM_Try, /*On fail goto*//*Label 919*/ GIMT_Encode4(29465), // Rule ID 1130 //
10443 /* 29400 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10444 /* 29404 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10445 /* 29408 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10446 /* 29411 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10447 /* 29416 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
10448 /* 29420 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10449 /* 29425 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10450 /* 29429 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10451 /* 29431 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x))
10452 /* 29431 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10453 /* 29434 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
10454 /* 29438 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10455 /* 29443 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10456 /* 29447 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10457 /* 29450 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10458 /* 29452 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10459 /* 29455 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10460 /* 29457 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10461 /* 29460 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10462 /* 29463 */ GIR_RootConstrainSelectedInstOperands,
10463 /* 29464 */ // GIR_Coverage, 1130,
10464 /* 29464 */ GIR_EraseRootFromParent_Done,
10465 /* 29465 */ // Label 919: @29465
10466 /* 29465 */ GIM_Reject,
10467 /* 29466 */ // Label 917: @29466
10468 /* 29466 */ GIM_Try, /*On fail goto*//*Label 920*/ GIMT_Encode4(29597),
10469 /* 29471 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10470 /* 29476 */ GIM_Try, /*On fail goto*//*Label 921*/ GIMT_Encode4(29526), // Rule ID 1131 //
10471 /* 29481 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10472 /* 29485 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10473 /* 29489 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10474 /* 29492 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10475 /* 29497 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
10476 /* 29501 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10477 /* 29506 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10478 /* 29510 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10479 /* 29512 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x)
10480 /* 29512 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
10481 /* 29515 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10482 /* 29517 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10483 /* 29521 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10484 /* 29524 */ GIR_RootConstrainSelectedInstOperands,
10485 /* 29525 */ // GIR_Coverage, 1131,
10486 /* 29525 */ GIR_EraseRootFromParent_Done,
10487 /* 29526 */ // Label 921: @29526
10488 /* 29526 */ GIM_Try, /*On fail goto*//*Label 922*/ GIMT_Encode4(29596), // Rule ID 1132 //
10489 /* 29531 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10490 /* 29535 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10491 /* 29539 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10492 /* 29542 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10493 /* 29547 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
10494 /* 29551 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10495 /* 29556 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10496 /* 29560 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10497 /* 29562 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x))
10498 /* 29562 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10499 /* 29565 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
10500 /* 29569 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10501 /* 29574 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10502 /* 29578 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10503 /* 29581 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10504 /* 29583 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10505 /* 29586 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10506 /* 29588 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10507 /* 29591 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10508 /* 29594 */ GIR_RootConstrainSelectedInstOperands,
10509 /* 29595 */ // GIR_Coverage, 1132,
10510 /* 29595 */ GIR_EraseRootFromParent_Done,
10511 /* 29596 */ // Label 922: @29596
10512 /* 29596 */ GIM_Reject,
10513 /* 29597 */ // Label 920: @29597
10514 /* 29597 */ GIM_Try, /*On fail goto*//*Label 923*/ GIMT_Encode4(29728),
10515 /* 29602 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10516 /* 29607 */ GIM_Try, /*On fail goto*//*Label 924*/ GIMT_Encode4(29657), // Rule ID 1134 //
10517 /* 29612 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10518 /* 29616 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10519 /* 29620 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10520 /* 29623 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10521 /* 29628 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
10522 /* 29632 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10523 /* 29637 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10524 /* 29641 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10525 /* 29643 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x)
10526 /* 29643 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
10527 /* 29646 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10528 /* 29648 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10529 /* 29652 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10530 /* 29655 */ GIR_RootConstrainSelectedInstOperands,
10531 /* 29656 */ // GIR_Coverage, 1134,
10532 /* 29656 */ GIR_EraseRootFromParent_Done,
10533 /* 29657 */ // Label 924: @29657
10534 /* 29657 */ GIM_Try, /*On fail goto*//*Label 925*/ GIMT_Encode4(29727), // Rule ID 1135 //
10535 /* 29662 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10536 /* 29666 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10537 /* 29670 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10538 /* 29673 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10539 /* 29678 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
10540 /* 29682 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10541 /* 29687 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10542 /* 29691 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10543 /* 29693 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x))
10544 /* 29693 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10545 /* 29696 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
10546 /* 29700 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10547 /* 29705 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10548 /* 29709 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10549 /* 29712 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10550 /* 29714 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10551 /* 29717 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10552 /* 29719 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10553 /* 29722 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10554 /* 29725 */ GIR_RootConstrainSelectedInstOperands,
10555 /* 29726 */ // GIR_Coverage, 1135,
10556 /* 29726 */ GIR_EraseRootFromParent_Done,
10557 /* 29727 */ // Label 925: @29727
10558 /* 29727 */ GIM_Reject,
10559 /* 29728 */ // Label 923: @29728
10560 /* 29728 */ GIM_Try, /*On fail goto*//*Label 926*/ GIMT_Encode4(29859),
10561 /* 29733 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10562 /* 29738 */ GIM_Try, /*On fail goto*//*Label 927*/ GIMT_Encode4(29788), // Rule ID 1136 //
10563 /* 29743 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10564 /* 29747 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10565 /* 29751 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10566 /* 29754 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10567 /* 29759 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
10568 /* 29763 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10569 /* 29768 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10570 /* 29772 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10571 /* 29774 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x)
10572 /* 29774 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
10573 /* 29777 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10574 /* 29779 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10575 /* 29783 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10576 /* 29786 */ GIR_RootConstrainSelectedInstOperands,
10577 /* 29787 */ // GIR_Coverage, 1136,
10578 /* 29787 */ GIR_EraseRootFromParent_Done,
10579 /* 29788 */ // Label 927: @29788
10580 /* 29788 */ GIM_Try, /*On fail goto*//*Label 928*/ GIMT_Encode4(29858), // Rule ID 1137 //
10581 /* 29793 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10582 /* 29797 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10583 /* 29801 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10584 /* 29804 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10585 /* 29809 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
10586 /* 29813 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10587 /* 29818 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10588 /* 29822 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10589 /* 29824 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x))
10590 /* 29824 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10591 /* 29827 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
10592 /* 29831 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10593 /* 29836 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10594 /* 29840 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10595 /* 29843 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10596 /* 29845 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10597 /* 29848 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10598 /* 29850 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10599 /* 29853 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10600 /* 29856 */ GIR_RootConstrainSelectedInstOperands,
10601 /* 29857 */ // GIR_Coverage, 1137,
10602 /* 29857 */ GIR_EraseRootFromParent_Done,
10603 /* 29858 */ // Label 928: @29858
10604 /* 29858 */ GIM_Reject,
10605 /* 29859 */ // Label 926: @29859
10606 /* 29859 */ GIM_Try, /*On fail goto*//*Label 929*/ GIMT_Encode4(29990),
10607 /* 29864 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10608 /* 29869 */ GIM_Try, /*On fail goto*//*Label 930*/ GIMT_Encode4(29919), // Rule ID 1139 //
10609 /* 29874 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10610 /* 29878 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10611 /* 29882 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10612 /* 29885 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10613 /* 29890 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
10614 /* 29894 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10615 /* 29899 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10616 /* 29903 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10617 /* 29905 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x)
10618 /* 29905 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
10619 /* 29908 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10620 /* 29910 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10621 /* 29914 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10622 /* 29917 */ GIR_RootConstrainSelectedInstOperands,
10623 /* 29918 */ // GIR_Coverage, 1139,
10624 /* 29918 */ GIR_EraseRootFromParent_Done,
10625 /* 29919 */ // Label 930: @29919
10626 /* 29919 */ GIM_Try, /*On fail goto*//*Label 931*/ GIMT_Encode4(29989), // Rule ID 1140 //
10627 /* 29924 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10628 /* 29928 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10629 /* 29932 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10630 /* 29935 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10631 /* 29940 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
10632 /* 29944 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10633 /* 29949 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10634 /* 29953 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10635 /* 29955 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x))
10636 /* 29955 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10637 /* 29958 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
10638 /* 29962 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10639 /* 29967 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10640 /* 29971 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10641 /* 29974 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10642 /* 29976 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10643 /* 29979 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10644 /* 29981 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10645 /* 29984 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10646 /* 29987 */ GIR_RootConstrainSelectedInstOperands,
10647 /* 29988 */ // GIR_Coverage, 1140,
10648 /* 29988 */ GIR_EraseRootFromParent_Done,
10649 /* 29989 */ // Label 931: @29989
10650 /* 29989 */ GIM_Reject,
10651 /* 29990 */ // Label 929: @29990
10652 /* 29990 */ GIM_Try, /*On fail goto*//*Label 932*/ GIMT_Encode4(30146),
10653 /* 29995 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10654 /* 30000 */ GIM_Try, /*On fail goto*//*Label 933*/ GIMT_Encode4(30050), // Rule ID 1141 //
10655 /* 30005 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10656 /* 30009 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10657 /* 30013 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10658 /* 30016 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10659 /* 30021 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
10660 /* 30025 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10661 /* 30030 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10662 /* 30034 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10663 /* 30036 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x)
10664 /* 30036 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
10665 /* 30039 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10666 /* 30041 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10667 /* 30045 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10668 /* 30048 */ GIR_RootConstrainSelectedInstOperands,
10669 /* 30049 */ // GIR_Coverage, 1141,
10670 /* 30049 */ GIR_EraseRootFromParent_Done,
10671 /* 30050 */ // Label 933: @30050
10672 /* 30050 */ GIM_Try, /*On fail goto*//*Label 934*/ GIMT_Encode4(30120), // Rule ID 1142 //
10673 /* 30055 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10674 /* 30059 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10675 /* 30063 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10676 /* 30066 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10677 /* 30071 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
10678 /* 30075 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10679 /* 30080 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10680 /* 30084 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10681 /* 30086 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14682:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x))
10682 /* 30086 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10683 /* 30089 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
10684 /* 30093 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10685 /* 30098 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10686 /* 30102 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10687 /* 30105 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10688 /* 30107 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10689 /* 30110 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10690 /* 30112 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10691 /* 30115 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10692 /* 30118 */ GIR_RootConstrainSelectedInstOperands,
10693 /* 30119 */ // GIR_Coverage, 1142,
10694 /* 30119 */ GIR_EraseRootFromParent_Done,
10695 /* 30120 */ // Label 934: @30120
10696 /* 30120 */ GIM_Try, /*On fail goto*//*Label 935*/ GIMT_Encode4(30145), // Rule ID 120 //
10697 /* 30125 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10698 /* 30129 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10699 /* 30133 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$src, 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
10700 /* 30133 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10701 /* 30136 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10702 /* 30138 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
10703 /* 30140 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10704 /* 30143 */ GIR_RootConstrainSelectedInstOperands,
10705 /* 30144 */ // GIR_Coverage, 120,
10706 /* 30144 */ GIR_EraseRootFromParent_Done,
10707 /* 30145 */ // Label 935: @30145
10708 /* 30145 */ GIM_Reject,
10709 /* 30146 */ // Label 932: @30146
10710 /* 30146 */ GIM_Try, /*On fail goto*//*Label 936*/ GIMT_Encode4(30178), // Rule ID 94 //
10711 /* 30151 */ // MIs[0] Operand 1
10712 /* 30151 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10713 /* 30156 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10714 /* 30160 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10715 /* 30164 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10716 /* 30164 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I32),
10717 /* 30167 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10718 /* 30169 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10719 /* 30171 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10720 /* 30173 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10721 /* 30176 */ GIR_RootConstrainSelectedInstOperands,
10722 /* 30177 */ // GIR_Coverage, 94,
10723 /* 30177 */ GIR_EraseRootFromParent_Done,
10724 /* 30178 */ // Label 936: @30178
10725 /* 30178 */ GIM_Try, /*On fail goto*//*Label 937*/ GIMT_Encode4(30210), // Rule ID 96 //
10726 /* 30183 */ // MIs[0] Operand 1
10727 /* 30183 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10728 /* 30188 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10729 /* 30192 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10730 /* 30196 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETNE:{ *:[Other] }) => (NE_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10731 /* 30196 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I32),
10732 /* 30199 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10733 /* 30201 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10734 /* 30203 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10735 /* 30205 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10736 /* 30208 */ GIR_RootConstrainSelectedInstOperands,
10737 /* 30209 */ // GIR_Coverage, 96,
10738 /* 30209 */ GIR_EraseRootFromParent_Done,
10739 /* 30210 */ // Label 937: @30210
10740 /* 30210 */ GIM_Try, /*On fail goto*//*Label 938*/ GIMT_Encode4(30242), // Rule ID 98 //
10741 /* 30215 */ // MIs[0] Operand 1
10742 /* 30215 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
10743 /* 30220 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10744 /* 30224 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10745 /* 30228 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10746 /* 30228 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I32),
10747 /* 30231 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10748 /* 30233 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10749 /* 30235 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10750 /* 30237 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10751 /* 30240 */ GIR_RootConstrainSelectedInstOperands,
10752 /* 30241 */ // GIR_Coverage, 98,
10753 /* 30241 */ GIR_EraseRootFromParent_Done,
10754 /* 30242 */ // Label 938: @30242
10755 /* 30242 */ GIM_Try, /*On fail goto*//*Label 939*/ GIMT_Encode4(30274), // Rule ID 100 //
10756 /* 30247 */ // MIs[0] Operand 1
10757 /* 30247 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
10758 /* 30252 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10759 /* 30256 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10760 /* 30260 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10761 /* 30260 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I32),
10762 /* 30263 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10763 /* 30265 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10764 /* 30267 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10765 /* 30269 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10766 /* 30272 */ GIR_RootConstrainSelectedInstOperands,
10767 /* 30273 */ // GIR_Coverage, 100,
10768 /* 30273 */ GIR_EraseRootFromParent_Done,
10769 /* 30274 */ // Label 939: @30274
10770 /* 30274 */ GIM_Try, /*On fail goto*//*Label 940*/ GIMT_Encode4(30306), // Rule ID 102 //
10771 /* 30279 */ // MIs[0] Operand 1
10772 /* 30279 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
10773 /* 30284 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10774 /* 30288 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10775 /* 30292 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10776 /* 30292 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I32),
10777 /* 30295 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10778 /* 30297 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10779 /* 30299 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10780 /* 30301 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10781 /* 30304 */ GIR_RootConstrainSelectedInstOperands,
10782 /* 30305 */ // GIR_Coverage, 102,
10783 /* 30305 */ GIR_EraseRootFromParent_Done,
10784 /* 30306 */ // Label 940: @30306
10785 /* 30306 */ GIM_Try, /*On fail goto*//*Label 941*/ GIMT_Encode4(30338), // Rule ID 104 //
10786 /* 30311 */ // MIs[0] Operand 1
10787 /* 30311 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
10788 /* 30316 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10789 /* 30320 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10790 /* 30324 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10791 /* 30324 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I32),
10792 /* 30327 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10793 /* 30329 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10794 /* 30331 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10795 /* 30333 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10796 /* 30336 */ GIR_RootConstrainSelectedInstOperands,
10797 /* 30337 */ // GIR_Coverage, 104,
10798 /* 30337 */ GIR_EraseRootFromParent_Done,
10799 /* 30338 */ // Label 941: @30338
10800 /* 30338 */ GIM_Try, /*On fail goto*//*Label 942*/ GIMT_Encode4(30370), // Rule ID 106 //
10801 /* 30343 */ // MIs[0] Operand 1
10802 /* 30343 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
10803 /* 30348 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10804 /* 30352 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10805 /* 30356 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10806 /* 30356 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I32),
10807 /* 30359 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10808 /* 30361 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10809 /* 30363 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10810 /* 30365 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10811 /* 30368 */ GIR_RootConstrainSelectedInstOperands,
10812 /* 30369 */ // GIR_Coverage, 106,
10813 /* 30369 */ GIR_EraseRootFromParent_Done,
10814 /* 30370 */ // Label 942: @30370
10815 /* 30370 */ GIM_Try, /*On fail goto*//*Label 943*/ GIMT_Encode4(30402), // Rule ID 108 //
10816 /* 30375 */ // MIs[0] Operand 1
10817 /* 30375 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
10818 /* 30380 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10819 /* 30384 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10820 /* 30388 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10821 /* 30388 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I32),
10822 /* 30391 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10823 /* 30393 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10824 /* 30395 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10825 /* 30397 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10826 /* 30400 */ GIR_RootConstrainSelectedInstOperands,
10827 /* 30401 */ // GIR_Coverage, 108,
10828 /* 30401 */ GIR_EraseRootFromParent_Done,
10829 /* 30402 */ // Label 943: @30402
10830 /* 30402 */ GIM_Try, /*On fail goto*//*Label 944*/ GIMT_Encode4(30434), // Rule ID 110 //
10831 /* 30407 */ // MIs[0] Operand 1
10832 /* 30407 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
10833 /* 30412 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10834 /* 30416 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10835 /* 30420 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10836 /* 30420 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I32),
10837 /* 30423 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10838 /* 30425 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10839 /* 30427 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10840 /* 30429 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10841 /* 30432 */ GIR_RootConstrainSelectedInstOperands,
10842 /* 30433 */ // GIR_Coverage, 110,
10843 /* 30433 */ GIR_EraseRootFromParent_Done,
10844 /* 30434 */ // Label 944: @30434
10845 /* 30434 */ GIM_Try, /*On fail goto*//*Label 945*/ GIMT_Encode4(30466), // Rule ID 112 //
10846 /* 30439 */ // MIs[0] Operand 1
10847 /* 30439 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
10848 /* 30444 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10849 /* 30448 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10850 /* 30452 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10851 /* 30452 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I32),
10852 /* 30455 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10853 /* 30457 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10854 /* 30459 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10855 /* 30461 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10856 /* 30464 */ GIR_RootConstrainSelectedInstOperands,
10857 /* 30465 */ // GIR_Coverage, 112,
10858 /* 30465 */ GIR_EraseRootFromParent_Done,
10859 /* 30466 */ // Label 945: @30466
10860 /* 30466 */ GIM_Reject,
10861 /* 30467 */ // Label 886: @30467
10862 /* 30467 */ GIM_Reject,
10863 /* 30468 */ // Label 882: @30468
10864 /* 30468 */ GIM_Try, /*On fail goto*//*Label 946*/ GIMT_Encode4(30828),
10865 /* 30473 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i64,
10866 /* 30476 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10867 /* 30480 */ GIM_Try, /*On fail goto*//*Label 947*/ GIMT_Encode4(30539),
10868 /* 30485 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10869 /* 30490 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10870 /* 30494 */ GIM_Try, /*On fail goto*//*Label 948*/ GIMT_Encode4(30515), // Rule ID 121 //
10871 /* 30499 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10872 /* 30503 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$src, 0:{ *:[i64] }, SETEQ:{ *:[Other] }) => (EQZ_I64:{ *:[i32] } I64:{ *:[i64] }:$src)
10873 /* 30503 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I64),
10874 /* 30506 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10875 /* 30508 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
10876 /* 30510 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10877 /* 30513 */ GIR_RootConstrainSelectedInstOperands,
10878 /* 30514 */ // GIR_Coverage, 121,
10879 /* 30514 */ GIR_EraseRootFromParent_Done,
10880 /* 30515 */ // Label 948: @30515
10881 /* 30515 */ GIM_Try, /*On fail goto*//*Label 949*/ GIMT_Encode4(30538), // Rule ID 95 //
10882 /* 30520 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10883 /* 30524 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10884 /* 30524 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I64),
10885 /* 30527 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10886 /* 30529 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10887 /* 30531 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10888 /* 30533 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10889 /* 30536 */ GIR_RootConstrainSelectedInstOperands,
10890 /* 30537 */ // GIR_Coverage, 95,
10891 /* 30537 */ GIR_EraseRootFromParent_Done,
10892 /* 30538 */ // Label 949: @30538
10893 /* 30538 */ GIM_Reject,
10894 /* 30539 */ // Label 947: @30539
10895 /* 30539 */ GIM_Try, /*On fail goto*//*Label 950*/ GIMT_Encode4(30571), // Rule ID 97 //
10896 /* 30544 */ // MIs[0] Operand 1
10897 /* 30544 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10898 /* 30549 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10899 /* 30553 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10900 /* 30557 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETNE:{ *:[Other] }) => (NE_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10901 /* 30557 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I64),
10902 /* 30560 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10903 /* 30562 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10904 /* 30564 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10905 /* 30566 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10906 /* 30569 */ GIR_RootConstrainSelectedInstOperands,
10907 /* 30570 */ // GIR_Coverage, 97,
10908 /* 30570 */ GIR_EraseRootFromParent_Done,
10909 /* 30571 */ // Label 950: @30571
10910 /* 30571 */ GIM_Try, /*On fail goto*//*Label 951*/ GIMT_Encode4(30603), // Rule ID 99 //
10911 /* 30576 */ // MIs[0] Operand 1
10912 /* 30576 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
10913 /* 30581 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10914 /* 30585 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10915 /* 30589 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10916 /* 30589 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I64),
10917 /* 30592 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10918 /* 30594 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10919 /* 30596 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10920 /* 30598 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10921 /* 30601 */ GIR_RootConstrainSelectedInstOperands,
10922 /* 30602 */ // GIR_Coverage, 99,
10923 /* 30602 */ GIR_EraseRootFromParent_Done,
10924 /* 30603 */ // Label 951: @30603
10925 /* 30603 */ GIM_Try, /*On fail goto*//*Label 952*/ GIMT_Encode4(30635), // Rule ID 101 //
10926 /* 30608 */ // MIs[0] Operand 1
10927 /* 30608 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
10928 /* 30613 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10929 /* 30617 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10930 /* 30621 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10931 /* 30621 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I64),
10932 /* 30624 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10933 /* 30626 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10934 /* 30628 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10935 /* 30630 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10936 /* 30633 */ GIR_RootConstrainSelectedInstOperands,
10937 /* 30634 */ // GIR_Coverage, 101,
10938 /* 30634 */ GIR_EraseRootFromParent_Done,
10939 /* 30635 */ // Label 952: @30635
10940 /* 30635 */ GIM_Try, /*On fail goto*//*Label 953*/ GIMT_Encode4(30667), // Rule ID 103 //
10941 /* 30640 */ // MIs[0] Operand 1
10942 /* 30640 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
10943 /* 30645 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10944 /* 30649 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10945 /* 30653 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10946 /* 30653 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I64),
10947 /* 30656 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10948 /* 30658 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10949 /* 30660 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10950 /* 30662 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10951 /* 30665 */ GIR_RootConstrainSelectedInstOperands,
10952 /* 30666 */ // GIR_Coverage, 103,
10953 /* 30666 */ GIR_EraseRootFromParent_Done,
10954 /* 30667 */ // Label 953: @30667
10955 /* 30667 */ GIM_Try, /*On fail goto*//*Label 954*/ GIMT_Encode4(30699), // Rule ID 105 //
10956 /* 30672 */ // MIs[0] Operand 1
10957 /* 30672 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
10958 /* 30677 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10959 /* 30681 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10960 /* 30685 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10961 /* 30685 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I64),
10962 /* 30688 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10963 /* 30690 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10964 /* 30692 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10965 /* 30694 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10966 /* 30697 */ GIR_RootConstrainSelectedInstOperands,
10967 /* 30698 */ // GIR_Coverage, 105,
10968 /* 30698 */ GIR_EraseRootFromParent_Done,
10969 /* 30699 */ // Label 954: @30699
10970 /* 30699 */ GIM_Try, /*On fail goto*//*Label 955*/ GIMT_Encode4(30731), // Rule ID 107 //
10971 /* 30704 */ // MIs[0] Operand 1
10972 /* 30704 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
10973 /* 30709 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10974 /* 30713 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10975 /* 30717 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10976 /* 30717 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I64),
10977 /* 30720 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10978 /* 30722 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10979 /* 30724 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10980 /* 30726 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10981 /* 30729 */ GIR_RootConstrainSelectedInstOperands,
10982 /* 30730 */ // GIR_Coverage, 107,
10983 /* 30730 */ GIR_EraseRootFromParent_Done,
10984 /* 30731 */ // Label 955: @30731
10985 /* 30731 */ GIM_Try, /*On fail goto*//*Label 956*/ GIMT_Encode4(30763), // Rule ID 109 //
10986 /* 30736 */ // MIs[0] Operand 1
10987 /* 30736 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
10988 /* 30741 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10989 /* 30745 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10990 /* 30749 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10991 /* 30749 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I64),
10992 /* 30752 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10993 /* 30754 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
10994 /* 30756 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
10995 /* 30758 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10996 /* 30761 */ GIR_RootConstrainSelectedInstOperands,
10997 /* 30762 */ // GIR_Coverage, 109,
10998 /* 30762 */ GIR_EraseRootFromParent_Done,
10999 /* 30763 */ // Label 956: @30763
11000 /* 30763 */ GIM_Try, /*On fail goto*//*Label 957*/ GIMT_Encode4(30795), // Rule ID 111 //
11001 /* 30768 */ // MIs[0] Operand 1
11002 /* 30768 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
11003 /* 30773 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11004 /* 30777 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11005 /* 30781 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11006 /* 30781 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I64),
11007 /* 30784 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11008 /* 30786 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11009 /* 30788 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11010 /* 30790 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11011 /* 30793 */ GIR_RootConstrainSelectedInstOperands,
11012 /* 30794 */ // GIR_Coverage, 111,
11013 /* 30794 */ GIR_EraseRootFromParent_Done,
11014 /* 30795 */ // Label 957: @30795
11015 /* 30795 */ GIM_Try, /*On fail goto*//*Label 958*/ GIMT_Encode4(30827), // Rule ID 113 //
11016 /* 30800 */ // MIs[0] Operand 1
11017 /* 30800 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
11018 /* 30805 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11019 /* 30809 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11020 /* 30813 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11021 /* 30813 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I64),
11022 /* 30816 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11023 /* 30818 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11024 /* 30820 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11025 /* 30822 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11026 /* 30825 */ GIR_RootConstrainSelectedInstOperands,
11027 /* 30826 */ // GIR_Coverage, 113,
11028 /* 30826 */ GIR_EraseRootFromParent_Done,
11029 /* 30827 */ // Label 958: @30827
11030 /* 30827 */ GIM_Reject,
11031 /* 30828 */ // Label 946: @30828
11032 /* 30828 */ GIM_Reject,
11033 /* 30829 */ // Label 883: @30829
11034 /* 30829 */ GIM_Try, /*On fail goto*//*Label 959*/ GIMT_Encode4(31102),
11035 /* 30834 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_p0s32,
11036 /* 30837 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11037 /* 30841 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 960*/ GIMT_Encode4(30867), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1302 //
11038 /* 30848 */ // MIs[0] Operand 1
11039 /* 30848 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11040 /* 30853 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11041 /* 30853 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I32),
11042 /* 30856 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11043 /* 30858 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11044 /* 30860 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11045 /* 30862 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11046 /* 30865 */ GIR_RootConstrainSelectedInstOperands,
11047 /* 30866 */ // GIR_Coverage, 1302,
11048 /* 30866 */ GIR_EraseRootFromParent_Done,
11049 /* 30867 */ // Label 960: @30867
11050 /* 30867 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 961*/ GIMT_Encode4(30893), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1304 //
11051 /* 30874 */ // MIs[0] Operand 1
11052 /* 30874 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11053 /* 30879 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETNE:{ *:[Other] }) => (NE_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11054 /* 30879 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I32),
11055 /* 30882 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11056 /* 30884 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11057 /* 30886 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11058 /* 30888 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11059 /* 30891 */ GIR_RootConstrainSelectedInstOperands,
11060 /* 30892 */ // GIR_Coverage, 1304,
11061 /* 30892 */ GIR_EraseRootFromParent_Done,
11062 /* 30893 */ // Label 961: @30893
11063 /* 30893 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 962*/ GIMT_Encode4(30919), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1306 //
11064 /* 30900 */ // MIs[0] Operand 1
11065 /* 30900 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
11066 /* 30905 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11067 /* 30905 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I32),
11068 /* 30908 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11069 /* 30910 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11070 /* 30912 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11071 /* 30914 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11072 /* 30917 */ GIR_RootConstrainSelectedInstOperands,
11073 /* 30918 */ // GIR_Coverage, 1306,
11074 /* 30918 */ GIR_EraseRootFromParent_Done,
11075 /* 30919 */ // Label 962: @30919
11076 /* 30919 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 963*/ GIMT_Encode4(30945), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1308 //
11077 /* 30926 */ // MIs[0] Operand 1
11078 /* 30926 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
11079 /* 30931 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11080 /* 30931 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I32),
11081 /* 30934 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11082 /* 30936 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11083 /* 30938 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11084 /* 30940 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11085 /* 30943 */ GIR_RootConstrainSelectedInstOperands,
11086 /* 30944 */ // GIR_Coverage, 1308,
11087 /* 30944 */ GIR_EraseRootFromParent_Done,
11088 /* 30945 */ // Label 963: @30945
11089 /* 30945 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 964*/ GIMT_Encode4(30971), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1310 //
11090 /* 30952 */ // MIs[0] Operand 1
11091 /* 30952 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
11092 /* 30957 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11093 /* 30957 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I32),
11094 /* 30960 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11095 /* 30962 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11096 /* 30964 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11097 /* 30966 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11098 /* 30969 */ GIR_RootConstrainSelectedInstOperands,
11099 /* 30970 */ // GIR_Coverage, 1310,
11100 /* 30970 */ GIR_EraseRootFromParent_Done,
11101 /* 30971 */ // Label 964: @30971
11102 /* 30971 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 965*/ GIMT_Encode4(30997), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1312 //
11103 /* 30978 */ // MIs[0] Operand 1
11104 /* 30978 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
11105 /* 30983 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11106 /* 30983 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I32),
11107 /* 30986 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11108 /* 30988 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11109 /* 30990 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11110 /* 30992 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11111 /* 30995 */ GIR_RootConstrainSelectedInstOperands,
11112 /* 30996 */ // GIR_Coverage, 1312,
11113 /* 30996 */ GIR_EraseRootFromParent_Done,
11114 /* 30997 */ // Label 965: @30997
11115 /* 30997 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 966*/ GIMT_Encode4(31023), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1314 //
11116 /* 31004 */ // MIs[0] Operand 1
11117 /* 31004 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
11118 /* 31009 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11119 /* 31009 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I32),
11120 /* 31012 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11121 /* 31014 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11122 /* 31016 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11123 /* 31018 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11124 /* 31021 */ GIR_RootConstrainSelectedInstOperands,
11125 /* 31022 */ // GIR_Coverage, 1314,
11126 /* 31022 */ GIR_EraseRootFromParent_Done,
11127 /* 31023 */ // Label 966: @31023
11128 /* 31023 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 967*/ GIMT_Encode4(31049), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1316 //
11129 /* 31030 */ // MIs[0] Operand 1
11130 /* 31030 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
11131 /* 31035 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11132 /* 31035 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I32),
11133 /* 31038 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11134 /* 31040 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11135 /* 31042 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11136 /* 31044 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11137 /* 31047 */ GIR_RootConstrainSelectedInstOperands,
11138 /* 31048 */ // GIR_Coverage, 1316,
11139 /* 31048 */ GIR_EraseRootFromParent_Done,
11140 /* 31049 */ // Label 967: @31049
11141 /* 31049 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 968*/ GIMT_Encode4(31075), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1318 //
11142 /* 31056 */ // MIs[0] Operand 1
11143 /* 31056 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
11144 /* 31061 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11145 /* 31061 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I32),
11146 /* 31064 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11147 /* 31066 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11148 /* 31068 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11149 /* 31070 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11150 /* 31073 */ GIR_RootConstrainSelectedInstOperands,
11151 /* 31074 */ // GIR_Coverage, 1318,
11152 /* 31074 */ GIR_EraseRootFromParent_Done,
11153 /* 31075 */ // Label 968: @31075
11154 /* 31075 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 969*/ GIMT_Encode4(31101), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1320 //
11155 /* 31082 */ // MIs[0] Operand 1
11156 /* 31082 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
11157 /* 31087 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11158 /* 31087 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I32),
11159 /* 31090 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11160 /* 31092 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11161 /* 31094 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11162 /* 31096 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11163 /* 31099 */ GIR_RootConstrainSelectedInstOperands,
11164 /* 31100 */ // GIR_Coverage, 1320,
11165 /* 31100 */ GIR_EraseRootFromParent_Done,
11166 /* 31101 */ // Label 969: @31101
11167 /* 31101 */ GIM_Reject,
11168 /* 31102 */ // Label 959: @31102
11169 /* 31102 */ GIM_Reject,
11170 /* 31103 */ // Label 884: @31103
11171 /* 31103 */ GIM_Try, /*On fail goto*//*Label 970*/ GIMT_Encode4(31376),
11172 /* 31108 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_p0s64,
11173 /* 31111 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11174 /* 31115 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 971*/ GIMT_Encode4(31141), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1303 //
11175 /* 31122 */ // MIs[0] Operand 1
11176 /* 31122 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11177 /* 31127 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11178 /* 31127 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I64),
11179 /* 31130 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11180 /* 31132 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11181 /* 31134 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11182 /* 31136 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11183 /* 31139 */ GIR_RootConstrainSelectedInstOperands,
11184 /* 31140 */ // GIR_Coverage, 1303,
11185 /* 31140 */ GIR_EraseRootFromParent_Done,
11186 /* 31141 */ // Label 971: @31141
11187 /* 31141 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 972*/ GIMT_Encode4(31167), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1305 //
11188 /* 31148 */ // MIs[0] Operand 1
11189 /* 31148 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11190 /* 31153 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETNE:{ *:[Other] }) => (NE_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11191 /* 31153 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I64),
11192 /* 31156 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11193 /* 31158 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11194 /* 31160 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11195 /* 31162 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11196 /* 31165 */ GIR_RootConstrainSelectedInstOperands,
11197 /* 31166 */ // GIR_Coverage, 1305,
11198 /* 31166 */ GIR_EraseRootFromParent_Done,
11199 /* 31167 */ // Label 972: @31167
11200 /* 31167 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 973*/ GIMT_Encode4(31193), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1307 //
11201 /* 31174 */ // MIs[0] Operand 1
11202 /* 31174 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
11203 /* 31179 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11204 /* 31179 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I64),
11205 /* 31182 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11206 /* 31184 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11207 /* 31186 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11208 /* 31188 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11209 /* 31191 */ GIR_RootConstrainSelectedInstOperands,
11210 /* 31192 */ // GIR_Coverage, 1307,
11211 /* 31192 */ GIR_EraseRootFromParent_Done,
11212 /* 31193 */ // Label 973: @31193
11213 /* 31193 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 974*/ GIMT_Encode4(31219), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1309 //
11214 /* 31200 */ // MIs[0] Operand 1
11215 /* 31200 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
11216 /* 31205 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11217 /* 31205 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I64),
11218 /* 31208 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11219 /* 31210 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11220 /* 31212 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11221 /* 31214 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11222 /* 31217 */ GIR_RootConstrainSelectedInstOperands,
11223 /* 31218 */ // GIR_Coverage, 1309,
11224 /* 31218 */ GIR_EraseRootFromParent_Done,
11225 /* 31219 */ // Label 974: @31219
11226 /* 31219 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 975*/ GIMT_Encode4(31245), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1311 //
11227 /* 31226 */ // MIs[0] Operand 1
11228 /* 31226 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
11229 /* 31231 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11230 /* 31231 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I64),
11231 /* 31234 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11232 /* 31236 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11233 /* 31238 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11234 /* 31240 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11235 /* 31243 */ GIR_RootConstrainSelectedInstOperands,
11236 /* 31244 */ // GIR_Coverage, 1311,
11237 /* 31244 */ GIR_EraseRootFromParent_Done,
11238 /* 31245 */ // Label 975: @31245
11239 /* 31245 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 976*/ GIMT_Encode4(31271), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1313 //
11240 /* 31252 */ // MIs[0] Operand 1
11241 /* 31252 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
11242 /* 31257 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11243 /* 31257 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I64),
11244 /* 31260 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11245 /* 31262 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11246 /* 31264 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11247 /* 31266 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11248 /* 31269 */ GIR_RootConstrainSelectedInstOperands,
11249 /* 31270 */ // GIR_Coverage, 1313,
11250 /* 31270 */ GIR_EraseRootFromParent_Done,
11251 /* 31271 */ // Label 976: @31271
11252 /* 31271 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 977*/ GIMT_Encode4(31297), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1315 //
11253 /* 31278 */ // MIs[0] Operand 1
11254 /* 31278 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
11255 /* 31283 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11256 /* 31283 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I64),
11257 /* 31286 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11258 /* 31288 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11259 /* 31290 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11260 /* 31292 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11261 /* 31295 */ GIR_RootConstrainSelectedInstOperands,
11262 /* 31296 */ // GIR_Coverage, 1315,
11263 /* 31296 */ GIR_EraseRootFromParent_Done,
11264 /* 31297 */ // Label 977: @31297
11265 /* 31297 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 978*/ GIMT_Encode4(31323), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1317 //
11266 /* 31304 */ // MIs[0] Operand 1
11267 /* 31304 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
11268 /* 31309 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11269 /* 31309 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I64),
11270 /* 31312 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11271 /* 31314 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11272 /* 31316 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11273 /* 31318 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11274 /* 31321 */ GIR_RootConstrainSelectedInstOperands,
11275 /* 31322 */ // GIR_Coverage, 1317,
11276 /* 31322 */ GIR_EraseRootFromParent_Done,
11277 /* 31323 */ // Label 978: @31323
11278 /* 31323 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 979*/ GIMT_Encode4(31349), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1319 //
11279 /* 31330 */ // MIs[0] Operand 1
11280 /* 31330 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
11281 /* 31335 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11282 /* 31335 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I64),
11283 /* 31338 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11284 /* 31340 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11285 /* 31342 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11286 /* 31344 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11287 /* 31347 */ GIR_RootConstrainSelectedInstOperands,
11288 /* 31348 */ // GIR_Coverage, 1319,
11289 /* 31348 */ GIR_EraseRootFromParent_Done,
11290 /* 31349 */ // Label 979: @31349
11291 /* 31349 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 980*/ GIMT_Encode4(31375), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1321 //
11292 /* 31356 */ // MIs[0] Operand 1
11293 /* 31356 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
11294 /* 31361 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11295 /* 31361 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I64),
11296 /* 31364 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11297 /* 31366 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11298 /* 31368 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11299 /* 31370 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11300 /* 31373 */ GIR_RootConstrainSelectedInstOperands,
11301 /* 31374 */ // GIR_Coverage, 1321,
11302 /* 31374 */ GIR_EraseRootFromParent_Done,
11303 /* 31375 */ // Label 980: @31375
11304 /* 31375 */ GIM_Reject,
11305 /* 31376 */ // Label 970: @31376
11306 /* 31376 */ GIM_Reject,
11307 /* 31377 */ // Label 885: @31377
11308 /* 31377 */ GIM_Reject,
11309 /* 31378 */ // Label 876: @31378
11310 /* 31378 */ GIM_Try, /*On fail goto*//*Label 981*/ GIMT_Encode4(31734),
11311 /* 31383 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
11312 /* 31386 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
11313 /* 31389 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11314 /* 31393 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 982*/ GIMT_Encode4(31427), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 195 //
11315 /* 31400 */ // MIs[0] Operand 1
11316 /* 31400 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11317 /* 31405 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11318 /* 31409 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11319 /* 31413 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11320 /* 31413 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I8x16),
11321 /* 31416 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11322 /* 31418 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11323 /* 31420 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11324 /* 31422 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11325 /* 31425 */ GIR_RootConstrainSelectedInstOperands,
11326 /* 31426 */ // GIR_Coverage, 195,
11327 /* 31426 */ GIR_EraseRootFromParent_Done,
11328 /* 31427 */ // Label 982: @31427
11329 /* 31427 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 983*/ GIMT_Encode4(31461), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 202 //
11330 /* 31434 */ // MIs[0] Operand 1
11331 /* 31434 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11332 /* 31439 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11333 /* 31443 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11334 /* 31447 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETNE:{ *:[Other] }) => (NE_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11335 /* 31447 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I8x16),
11336 /* 31450 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11337 /* 31452 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11338 /* 31454 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11339 /* 31456 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11340 /* 31459 */ GIR_RootConstrainSelectedInstOperands,
11341 /* 31460 */ // GIR_Coverage, 202,
11342 /* 31460 */ GIR_EraseRootFromParent_Done,
11343 /* 31461 */ // Label 983: @31461
11344 /* 31461 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 984*/ GIMT_Encode4(31495), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 209 //
11345 /* 31468 */ // MIs[0] Operand 1
11346 /* 31468 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
11347 /* 31473 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11348 /* 31477 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11349 /* 31481 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11350 /* 31481 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I8x16),
11351 /* 31484 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11352 /* 31486 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11353 /* 31488 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11354 /* 31490 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11355 /* 31493 */ GIR_RootConstrainSelectedInstOperands,
11356 /* 31494 */ // GIR_Coverage, 209,
11357 /* 31494 */ GIR_EraseRootFromParent_Done,
11358 /* 31495 */ // Label 984: @31495
11359 /* 31495 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 985*/ GIMT_Encode4(31529), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 213 //
11360 /* 31502 */ // MIs[0] Operand 1
11361 /* 31502 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
11362 /* 31507 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11363 /* 31511 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11364 /* 31515 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11365 /* 31515 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I8x16),
11366 /* 31518 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11367 /* 31520 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11368 /* 31522 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11369 /* 31524 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11370 /* 31527 */ GIR_RootConstrainSelectedInstOperands,
11371 /* 31528 */ // GIR_Coverage, 213,
11372 /* 31528 */ GIR_EraseRootFromParent_Done,
11373 /* 31529 */ // Label 985: @31529
11374 /* 31529 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 986*/ GIMT_Encode4(31563), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 219 //
11375 /* 31536 */ // MIs[0] Operand 1
11376 /* 31536 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
11377 /* 31541 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11378 /* 31545 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11379 /* 31549 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11380 /* 31549 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I8x16),
11381 /* 31552 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11382 /* 31554 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11383 /* 31556 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11384 /* 31558 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11385 /* 31561 */ GIR_RootConstrainSelectedInstOperands,
11386 /* 31562 */ // GIR_Coverage, 219,
11387 /* 31562 */ GIR_EraseRootFromParent_Done,
11388 /* 31563 */ // Label 986: @31563
11389 /* 31563 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 987*/ GIMT_Encode4(31597), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 223 //
11390 /* 31570 */ // MIs[0] Operand 1
11391 /* 31570 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
11392 /* 31575 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11393 /* 31579 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11394 /* 31583 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11395 /* 31583 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I8x16),
11396 /* 31586 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11397 /* 31588 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11398 /* 31590 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11399 /* 31592 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11400 /* 31595 */ GIR_RootConstrainSelectedInstOperands,
11401 /* 31596 */ // GIR_Coverage, 223,
11402 /* 31596 */ GIR_EraseRootFromParent_Done,
11403 /* 31597 */ // Label 987: @31597
11404 /* 31597 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 988*/ GIMT_Encode4(31631), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 229 //
11405 /* 31604 */ // MIs[0] Operand 1
11406 /* 31604 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
11407 /* 31609 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11408 /* 31613 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11409 /* 31617 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11410 /* 31617 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I8x16),
11411 /* 31620 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11412 /* 31622 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11413 /* 31624 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11414 /* 31626 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11415 /* 31629 */ GIR_RootConstrainSelectedInstOperands,
11416 /* 31630 */ // GIR_Coverage, 229,
11417 /* 31630 */ GIR_EraseRootFromParent_Done,
11418 /* 31631 */ // Label 988: @31631
11419 /* 31631 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 989*/ GIMT_Encode4(31665), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 233 //
11420 /* 31638 */ // MIs[0] Operand 1
11421 /* 31638 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
11422 /* 31643 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11423 /* 31647 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11424 /* 31651 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11425 /* 31651 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I8x16),
11426 /* 31654 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11427 /* 31656 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11428 /* 31658 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11429 /* 31660 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11430 /* 31663 */ GIR_RootConstrainSelectedInstOperands,
11431 /* 31664 */ // GIR_Coverage, 233,
11432 /* 31664 */ GIR_EraseRootFromParent_Done,
11433 /* 31665 */ // Label 989: @31665
11434 /* 31665 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 990*/ GIMT_Encode4(31699), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 239 //
11435 /* 31672 */ // MIs[0] Operand 1
11436 /* 31672 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
11437 /* 31677 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11438 /* 31681 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11439 /* 31685 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11440 /* 31685 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I8x16),
11441 /* 31688 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11442 /* 31690 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11443 /* 31692 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11444 /* 31694 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11445 /* 31697 */ GIR_RootConstrainSelectedInstOperands,
11446 /* 31698 */ // GIR_Coverage, 239,
11447 /* 31698 */ GIR_EraseRootFromParent_Done,
11448 /* 31699 */ // Label 990: @31699
11449 /* 31699 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 991*/ GIMT_Encode4(31733), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 243 //
11450 /* 31706 */ // MIs[0] Operand 1
11451 /* 31706 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
11452 /* 31711 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11453 /* 31715 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11454 /* 31719 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11455 /* 31719 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I8x16),
11456 /* 31722 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11457 /* 31724 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11458 /* 31726 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11459 /* 31728 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11460 /* 31731 */ GIR_RootConstrainSelectedInstOperands,
11461 /* 31732 */ // GIR_Coverage, 243,
11462 /* 31732 */ GIR_EraseRootFromParent_Done,
11463 /* 31733 */ // Label 991: @31733
11464 /* 31733 */ GIM_Reject,
11465 /* 31734 */ // Label 981: @31734
11466 /* 31734 */ GIM_Reject,
11467 /* 31735 */ // Label 877: @31735
11468 /* 31735 */ GIM_Try, /*On fail goto*//*Label 992*/ GIMT_Encode4(32091),
11469 /* 31740 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
11470 /* 31743 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
11471 /* 31746 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11472 /* 31750 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 993*/ GIMT_Encode4(31784), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 196 //
11473 /* 31757 */ // MIs[0] Operand 1
11474 /* 31757 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11475 /* 31762 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11476 /* 31766 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11477 /* 31770 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
11478 /* 31770 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I16x8),
11479 /* 31773 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11480 /* 31775 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11481 /* 31777 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11482 /* 31779 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11483 /* 31782 */ GIR_RootConstrainSelectedInstOperands,
11484 /* 31783 */ // GIR_Coverage, 196,
11485 /* 31783 */ GIR_EraseRootFromParent_Done,
11486 /* 31784 */ // Label 993: @31784
11487 /* 31784 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 994*/ GIMT_Encode4(31818), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 203 //
11488 /* 31791 */ // MIs[0] Operand 1
11489 /* 31791 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11490 /* 31796 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11491 /* 31800 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11492 /* 31804 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETNE:{ *:[Other] }) => (NE_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
11493 /* 31804 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I16x8),
11494 /* 31807 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11495 /* 31809 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11496 /* 31811 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11497 /* 31813 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11498 /* 31816 */ GIR_RootConstrainSelectedInstOperands,
11499 /* 31817 */ // GIR_Coverage, 203,
11500 /* 31817 */ GIR_EraseRootFromParent_Done,
11501 /* 31818 */ // Label 994: @31818
11502 /* 31818 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 995*/ GIMT_Encode4(31852), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 210 //
11503 /* 31825 */ // MIs[0] Operand 1
11504 /* 31825 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
11505 /* 31830 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11506 /* 31834 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11507 /* 31838 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
11508 /* 31838 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I16x8),
11509 /* 31841 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11510 /* 31843 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11511 /* 31845 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11512 /* 31847 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11513 /* 31850 */ GIR_RootConstrainSelectedInstOperands,
11514 /* 31851 */ // GIR_Coverage, 210,
11515 /* 31851 */ GIR_EraseRootFromParent_Done,
11516 /* 31852 */ // Label 995: @31852
11517 /* 31852 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 996*/ GIMT_Encode4(31886), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 214 //
11518 /* 31859 */ // MIs[0] Operand 1
11519 /* 31859 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
11520 /* 31864 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11521 /* 31868 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11522 /* 31872 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
11523 /* 31872 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I16x8),
11524 /* 31875 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11525 /* 31877 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11526 /* 31879 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11527 /* 31881 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11528 /* 31884 */ GIR_RootConstrainSelectedInstOperands,
11529 /* 31885 */ // GIR_Coverage, 214,
11530 /* 31885 */ GIR_EraseRootFromParent_Done,
11531 /* 31886 */ // Label 996: @31886
11532 /* 31886 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 997*/ GIMT_Encode4(31920), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 220 //
11533 /* 31893 */ // MIs[0] Operand 1
11534 /* 31893 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
11535 /* 31898 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11536 /* 31902 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11537 /* 31906 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
11538 /* 31906 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I16x8),
11539 /* 31909 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11540 /* 31911 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11541 /* 31913 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11542 /* 31915 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11543 /* 31918 */ GIR_RootConstrainSelectedInstOperands,
11544 /* 31919 */ // GIR_Coverage, 220,
11545 /* 31919 */ GIR_EraseRootFromParent_Done,
11546 /* 31920 */ // Label 997: @31920
11547 /* 31920 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 998*/ GIMT_Encode4(31954), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 224 //
11548 /* 31927 */ // MIs[0] Operand 1
11549 /* 31927 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
11550 /* 31932 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11551 /* 31936 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11552 /* 31940 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
11553 /* 31940 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I16x8),
11554 /* 31943 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11555 /* 31945 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11556 /* 31947 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11557 /* 31949 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11558 /* 31952 */ GIR_RootConstrainSelectedInstOperands,
11559 /* 31953 */ // GIR_Coverage, 224,
11560 /* 31953 */ GIR_EraseRootFromParent_Done,
11561 /* 31954 */ // Label 998: @31954
11562 /* 31954 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 999*/ GIMT_Encode4(31988), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 230 //
11563 /* 31961 */ // MIs[0] Operand 1
11564 /* 31961 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
11565 /* 31966 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11566 /* 31970 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11567 /* 31974 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
11568 /* 31974 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I16x8),
11569 /* 31977 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11570 /* 31979 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11571 /* 31981 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11572 /* 31983 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11573 /* 31986 */ GIR_RootConstrainSelectedInstOperands,
11574 /* 31987 */ // GIR_Coverage, 230,
11575 /* 31987 */ GIR_EraseRootFromParent_Done,
11576 /* 31988 */ // Label 999: @31988
11577 /* 31988 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1000*/ GIMT_Encode4(32022), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 234 //
11578 /* 31995 */ // MIs[0] Operand 1
11579 /* 31995 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
11580 /* 32000 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11581 /* 32004 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11582 /* 32008 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
11583 /* 32008 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I16x8),
11584 /* 32011 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11585 /* 32013 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11586 /* 32015 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11587 /* 32017 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11588 /* 32020 */ GIR_RootConstrainSelectedInstOperands,
11589 /* 32021 */ // GIR_Coverage, 234,
11590 /* 32021 */ GIR_EraseRootFromParent_Done,
11591 /* 32022 */ // Label 1000: @32022
11592 /* 32022 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1001*/ GIMT_Encode4(32056), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 240 //
11593 /* 32029 */ // MIs[0] Operand 1
11594 /* 32029 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
11595 /* 32034 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11596 /* 32038 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11597 /* 32042 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
11598 /* 32042 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I16x8),
11599 /* 32045 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11600 /* 32047 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11601 /* 32049 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11602 /* 32051 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11603 /* 32054 */ GIR_RootConstrainSelectedInstOperands,
11604 /* 32055 */ // GIR_Coverage, 240,
11605 /* 32055 */ GIR_EraseRootFromParent_Done,
11606 /* 32056 */ // Label 1001: @32056
11607 /* 32056 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1002*/ GIMT_Encode4(32090), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 244 //
11608 /* 32063 */ // MIs[0] Operand 1
11609 /* 32063 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
11610 /* 32068 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11611 /* 32072 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11612 /* 32076 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
11613 /* 32076 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I16x8),
11614 /* 32079 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11615 /* 32081 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11616 /* 32083 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11617 /* 32085 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11618 /* 32088 */ GIR_RootConstrainSelectedInstOperands,
11619 /* 32089 */ // GIR_Coverage, 244,
11620 /* 32089 */ GIR_EraseRootFromParent_Done,
11621 /* 32090 */ // Label 1002: @32090
11622 /* 32090 */ GIM_Reject,
11623 /* 32091 */ // Label 992: @32091
11624 /* 32091 */ GIM_Reject,
11625 /* 32092 */ // Label 878: @32092
11626 /* 32092 */ GIM_Try, /*On fail goto*//*Label 1003*/ GIMT_Encode4(32448),
11627 /* 32097 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
11628 /* 32100 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
11629 /* 32103 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11630 /* 32107 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1004*/ GIMT_Encode4(32141), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 197 //
11631 /* 32114 */ // MIs[0] Operand 1
11632 /* 32114 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11633 /* 32119 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11634 /* 32123 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11635 /* 32127 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
11636 /* 32127 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I32x4),
11637 /* 32130 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11638 /* 32132 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11639 /* 32134 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11640 /* 32136 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11641 /* 32139 */ GIR_RootConstrainSelectedInstOperands,
11642 /* 32140 */ // GIR_Coverage, 197,
11643 /* 32140 */ GIR_EraseRootFromParent_Done,
11644 /* 32141 */ // Label 1004: @32141
11645 /* 32141 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1005*/ GIMT_Encode4(32175), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 204 //
11646 /* 32148 */ // MIs[0] Operand 1
11647 /* 32148 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11648 /* 32153 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11649 /* 32157 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11650 /* 32161 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETNE:{ *:[Other] }) => (NE_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
11651 /* 32161 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I32x4),
11652 /* 32164 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11653 /* 32166 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11654 /* 32168 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11655 /* 32170 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11656 /* 32173 */ GIR_RootConstrainSelectedInstOperands,
11657 /* 32174 */ // GIR_Coverage, 204,
11658 /* 32174 */ GIR_EraseRootFromParent_Done,
11659 /* 32175 */ // Label 1005: @32175
11660 /* 32175 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1006*/ GIMT_Encode4(32209), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 211 //
11661 /* 32182 */ // MIs[0] Operand 1
11662 /* 32182 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
11663 /* 32187 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11664 /* 32191 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11665 /* 32195 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
11666 /* 32195 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I32x4),
11667 /* 32198 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11668 /* 32200 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11669 /* 32202 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11670 /* 32204 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11671 /* 32207 */ GIR_RootConstrainSelectedInstOperands,
11672 /* 32208 */ // GIR_Coverage, 211,
11673 /* 32208 */ GIR_EraseRootFromParent_Done,
11674 /* 32209 */ // Label 1006: @32209
11675 /* 32209 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1007*/ GIMT_Encode4(32243), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 215 //
11676 /* 32216 */ // MIs[0] Operand 1
11677 /* 32216 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
11678 /* 32221 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11679 /* 32225 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11680 /* 32229 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
11681 /* 32229 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I32x4),
11682 /* 32232 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11683 /* 32234 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11684 /* 32236 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11685 /* 32238 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11686 /* 32241 */ GIR_RootConstrainSelectedInstOperands,
11687 /* 32242 */ // GIR_Coverage, 215,
11688 /* 32242 */ GIR_EraseRootFromParent_Done,
11689 /* 32243 */ // Label 1007: @32243
11690 /* 32243 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1008*/ GIMT_Encode4(32277), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 221 //
11691 /* 32250 */ // MIs[0] Operand 1
11692 /* 32250 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
11693 /* 32255 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11694 /* 32259 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11695 /* 32263 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
11696 /* 32263 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I32x4),
11697 /* 32266 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11698 /* 32268 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11699 /* 32270 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11700 /* 32272 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11701 /* 32275 */ GIR_RootConstrainSelectedInstOperands,
11702 /* 32276 */ // GIR_Coverage, 221,
11703 /* 32276 */ GIR_EraseRootFromParent_Done,
11704 /* 32277 */ // Label 1008: @32277
11705 /* 32277 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1009*/ GIMT_Encode4(32311), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 225 //
11706 /* 32284 */ // MIs[0] Operand 1
11707 /* 32284 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
11708 /* 32289 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11709 /* 32293 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11710 /* 32297 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
11711 /* 32297 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I32x4),
11712 /* 32300 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11713 /* 32302 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11714 /* 32304 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11715 /* 32306 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11716 /* 32309 */ GIR_RootConstrainSelectedInstOperands,
11717 /* 32310 */ // GIR_Coverage, 225,
11718 /* 32310 */ GIR_EraseRootFromParent_Done,
11719 /* 32311 */ // Label 1009: @32311
11720 /* 32311 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1010*/ GIMT_Encode4(32345), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 231 //
11721 /* 32318 */ // MIs[0] Operand 1
11722 /* 32318 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
11723 /* 32323 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11724 /* 32327 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11725 /* 32331 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
11726 /* 32331 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I32x4),
11727 /* 32334 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11728 /* 32336 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11729 /* 32338 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11730 /* 32340 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11731 /* 32343 */ GIR_RootConstrainSelectedInstOperands,
11732 /* 32344 */ // GIR_Coverage, 231,
11733 /* 32344 */ GIR_EraseRootFromParent_Done,
11734 /* 32345 */ // Label 1010: @32345
11735 /* 32345 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1011*/ GIMT_Encode4(32379), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 235 //
11736 /* 32352 */ // MIs[0] Operand 1
11737 /* 32352 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
11738 /* 32357 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11739 /* 32361 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11740 /* 32365 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
11741 /* 32365 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I32x4),
11742 /* 32368 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11743 /* 32370 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11744 /* 32372 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11745 /* 32374 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11746 /* 32377 */ GIR_RootConstrainSelectedInstOperands,
11747 /* 32378 */ // GIR_Coverage, 235,
11748 /* 32378 */ GIR_EraseRootFromParent_Done,
11749 /* 32379 */ // Label 1011: @32379
11750 /* 32379 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1012*/ GIMT_Encode4(32413), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 241 //
11751 /* 32386 */ // MIs[0] Operand 1
11752 /* 32386 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
11753 /* 32391 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11754 /* 32395 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11755 /* 32399 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
11756 /* 32399 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I32x4),
11757 /* 32402 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11758 /* 32404 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11759 /* 32406 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11760 /* 32408 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11761 /* 32411 */ GIR_RootConstrainSelectedInstOperands,
11762 /* 32412 */ // GIR_Coverage, 241,
11763 /* 32412 */ GIR_EraseRootFromParent_Done,
11764 /* 32413 */ // Label 1012: @32413
11765 /* 32413 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1013*/ GIMT_Encode4(32447), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 245 //
11766 /* 32420 */ // MIs[0] Operand 1
11767 /* 32420 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
11768 /* 32425 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11769 /* 32429 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11770 /* 32433 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
11771 /* 32433 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I32x4),
11772 /* 32436 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11773 /* 32438 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11774 /* 32440 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11775 /* 32442 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11776 /* 32445 */ GIR_RootConstrainSelectedInstOperands,
11777 /* 32446 */ // GIR_Coverage, 245,
11778 /* 32446 */ GIR_EraseRootFromParent_Done,
11779 /* 32447 */ // Label 1013: @32447
11780 /* 32447 */ GIM_Reject,
11781 /* 32448 */ // Label 1003: @32448
11782 /* 32448 */ GIM_Reject,
11783 /* 32449 */ // Label 879: @32449
11784 /* 32449 */ GIM_Try, /*On fail goto*//*Label 1014*/ GIMT_Encode4(32669),
11785 /* 32454 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
11786 /* 32457 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
11787 /* 32460 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11788 /* 32464 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1015*/ GIMT_Encode4(32498), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 198 //
11789 /* 32471 */ // MIs[0] Operand 1
11790 /* 32471 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11791 /* 32476 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11792 /* 32480 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11793 /* 32484 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
11794 /* 32484 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I64x2),
11795 /* 32487 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11796 /* 32489 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11797 /* 32491 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11798 /* 32493 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11799 /* 32496 */ GIR_RootConstrainSelectedInstOperands,
11800 /* 32497 */ // GIR_Coverage, 198,
11801 /* 32497 */ GIR_EraseRootFromParent_Done,
11802 /* 32498 */ // Label 1015: @32498
11803 /* 32498 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1016*/ GIMT_Encode4(32532), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 205 //
11804 /* 32505 */ // MIs[0] Operand 1
11805 /* 32505 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11806 /* 32510 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11807 /* 32514 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11808 /* 32518 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETNE:{ *:[Other] }) => (NE_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
11809 /* 32518 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I64x2),
11810 /* 32521 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11811 /* 32523 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11812 /* 32525 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11813 /* 32527 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11814 /* 32530 */ GIR_RootConstrainSelectedInstOperands,
11815 /* 32531 */ // GIR_Coverage, 205,
11816 /* 32531 */ GIR_EraseRootFromParent_Done,
11817 /* 32532 */ // Label 1016: @32532
11818 /* 32532 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1017*/ GIMT_Encode4(32566), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 212 //
11819 /* 32539 */ // MIs[0] Operand 1
11820 /* 32539 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
11821 /* 32544 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11822 /* 32548 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11823 /* 32552 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
11824 /* 32552 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I64x2),
11825 /* 32555 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11826 /* 32557 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11827 /* 32559 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11828 /* 32561 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11829 /* 32564 */ GIR_RootConstrainSelectedInstOperands,
11830 /* 32565 */ // GIR_Coverage, 212,
11831 /* 32565 */ GIR_EraseRootFromParent_Done,
11832 /* 32566 */ // Label 1017: @32566
11833 /* 32566 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1018*/ GIMT_Encode4(32600), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 222 //
11834 /* 32573 */ // MIs[0] Operand 1
11835 /* 32573 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
11836 /* 32578 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11837 /* 32582 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11838 /* 32586 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
11839 /* 32586 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I64x2),
11840 /* 32589 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11841 /* 32591 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11842 /* 32593 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11843 /* 32595 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11844 /* 32598 */ GIR_RootConstrainSelectedInstOperands,
11845 /* 32599 */ // GIR_Coverage, 222,
11846 /* 32599 */ GIR_EraseRootFromParent_Done,
11847 /* 32600 */ // Label 1018: @32600
11848 /* 32600 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1019*/ GIMT_Encode4(32634), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 232 //
11849 /* 32607 */ // MIs[0] Operand 1
11850 /* 32607 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
11851 /* 32612 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11852 /* 32616 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11853 /* 32620 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
11854 /* 32620 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I64x2),
11855 /* 32623 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11856 /* 32625 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11857 /* 32627 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11858 /* 32629 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11859 /* 32632 */ GIR_RootConstrainSelectedInstOperands,
11860 /* 32633 */ // GIR_Coverage, 232,
11861 /* 32633 */ GIR_EraseRootFromParent_Done,
11862 /* 32634 */ // Label 1019: @32634
11863 /* 32634 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1020*/ GIMT_Encode4(32668), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 242 //
11864 /* 32641 */ // MIs[0] Operand 1
11865 /* 32641 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
11866 /* 32646 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11867 /* 32650 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11868 /* 32654 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
11869 /* 32654 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I64x2),
11870 /* 32657 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11871 /* 32659 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11872 /* 32661 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11873 /* 32663 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11874 /* 32666 */ GIR_RootConstrainSelectedInstOperands,
11875 /* 32667 */ // GIR_Coverage, 242,
11876 /* 32667 */ GIR_EraseRootFromParent_Done,
11877 /* 32668 */ // Label 1020: @32668
11878 /* 32668 */ GIM_Reject,
11879 /* 32669 */ // Label 1014: @32669
11880 /* 32669 */ GIM_Reject,
11881 /* 32670 */ // Label 880: @32670
11882 /* 32670 */ GIM_Reject,
11883 /* 32671 */ // Label 38: @32671
11884 /* 32671 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 1025*/ GIMT_Encode4(33833),
11885 /* 32682 */ /*GILLT_i32*//*Label 1021*/ GIMT_Encode4(32738), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
11886 /* 32726 */ /*GILLT_v8i16*//*Label 1022*/ GIMT_Encode4(33170),
11887 /* 32730 */ /*GILLT_v4i32*//*Label 1023*/ GIMT_Encode4(33391),
11888 /* 32734 */ /*GILLT_v2i64*//*Label 1024*/ GIMT_Encode4(33612),
11889 /* 32738 */ // Label 1021: @32738
11890 /* 32738 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1028*/ GIMT_Encode4(33169),
11891 /* 32749 */ /*GILLT_f32*//*Label 1026*/ GIMT_Encode4(32757),
11892 /* 32753 */ /*GILLT_f64*//*Label 1027*/ GIMT_Encode4(32963),
11893 /* 32757 */ // Label 1026: @32757
11894 /* 32757 */ GIM_Try, /*On fail goto*//*Label 1029*/ GIMT_Encode4(32962),
11895 /* 32762 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_f32,
11896 /* 32765 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11897 /* 32769 */ GIM_Try, /*On fail goto*//*Label 1030*/ GIMT_Encode4(32801), // Rule ID 152 //
11898 /* 32774 */ // MIs[0] Operand 1
11899 /* 32774 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
11900 /* 32779 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11901 /* 32783 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11902 /* 32787 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
11903 /* 32787 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F32),
11904 /* 32790 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11905 /* 32792 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11906 /* 32794 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11907 /* 32796 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11908 /* 32799 */ GIR_RootConstrainSelectedInstOperands,
11909 /* 32800 */ // GIR_Coverage, 152,
11910 /* 32800 */ GIR_EraseRootFromParent_Done,
11911 /* 32801 */ // Label 1030: @32801
11912 /* 32801 */ GIM_Try, /*On fail goto*//*Label 1031*/ GIMT_Encode4(32833), // Rule ID 154 //
11913 /* 32806 */ // MIs[0] Operand 1
11914 /* 32806 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
11915 /* 32811 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11916 /* 32815 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11917 /* 32819 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
11918 /* 32819 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F32),
11919 /* 32822 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11920 /* 32824 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11921 /* 32826 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11922 /* 32828 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11923 /* 32831 */ GIR_RootConstrainSelectedInstOperands,
11924 /* 32832 */ // GIR_Coverage, 154,
11925 /* 32832 */ GIR_EraseRootFromParent_Done,
11926 /* 32833 */ // Label 1031: @32833
11927 /* 32833 */ GIM_Try, /*On fail goto*//*Label 1032*/ GIMT_Encode4(32865), // Rule ID 156 //
11928 /* 32838 */ // MIs[0] Operand 1
11929 /* 32838 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
11930 /* 32843 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11931 /* 32847 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11932 /* 32851 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
11933 /* 32851 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F32),
11934 /* 32854 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11935 /* 32856 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11936 /* 32858 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11937 /* 32860 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11938 /* 32863 */ GIR_RootConstrainSelectedInstOperands,
11939 /* 32864 */ // GIR_Coverage, 156,
11940 /* 32864 */ GIR_EraseRootFromParent_Done,
11941 /* 32865 */ // Label 1032: @32865
11942 /* 32865 */ GIM_Try, /*On fail goto*//*Label 1033*/ GIMT_Encode4(32897), // Rule ID 158 //
11943 /* 32870 */ // MIs[0] Operand 1
11944 /* 32870 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
11945 /* 32875 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11946 /* 32879 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11947 /* 32883 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
11948 /* 32883 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F32),
11949 /* 32886 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11950 /* 32888 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11951 /* 32890 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11952 /* 32892 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11953 /* 32895 */ GIR_RootConstrainSelectedInstOperands,
11954 /* 32896 */ // GIR_Coverage, 158,
11955 /* 32896 */ GIR_EraseRootFromParent_Done,
11956 /* 32897 */ // Label 1033: @32897
11957 /* 32897 */ GIM_Try, /*On fail goto*//*Label 1034*/ GIMT_Encode4(32929), // Rule ID 160 //
11958 /* 32902 */ // MIs[0] Operand 1
11959 /* 32902 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
11960 /* 32907 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11961 /* 32911 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11962 /* 32915 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
11963 /* 32915 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F32),
11964 /* 32918 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11965 /* 32920 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11966 /* 32922 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11967 /* 32924 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11968 /* 32927 */ GIR_RootConstrainSelectedInstOperands,
11969 /* 32928 */ // GIR_Coverage, 160,
11970 /* 32928 */ GIR_EraseRootFromParent_Done,
11971 /* 32929 */ // Label 1034: @32929
11972 /* 32929 */ GIM_Try, /*On fail goto*//*Label 1035*/ GIMT_Encode4(32961), // Rule ID 162 //
11973 /* 32934 */ // MIs[0] Operand 1
11974 /* 32934 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
11975 /* 32939 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11976 /* 32943 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
11977 /* 32947 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
11978 /* 32947 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F32),
11979 /* 32950 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11980 /* 32952 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11981 /* 32954 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11982 /* 32956 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11983 /* 32959 */ GIR_RootConstrainSelectedInstOperands,
11984 /* 32960 */ // GIR_Coverage, 162,
11985 /* 32960 */ GIR_EraseRootFromParent_Done,
11986 /* 32961 */ // Label 1035: @32961
11987 /* 32961 */ GIM_Reject,
11988 /* 32962 */ // Label 1029: @32962
11989 /* 32962 */ GIM_Reject,
11990 /* 32963 */ // Label 1027: @32963
11991 /* 32963 */ GIM_Try, /*On fail goto*//*Label 1036*/ GIMT_Encode4(33168),
11992 /* 32968 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_f64,
11993 /* 32971 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11994 /* 32975 */ GIM_Try, /*On fail goto*//*Label 1037*/ GIMT_Encode4(33007), // Rule ID 153 //
11995 /* 32980 */ // MIs[0] Operand 1
11996 /* 32980 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
11997 /* 32985 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
11998 /* 32989 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
11999 /* 32993 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12000 /* 32993 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F64),
12001 /* 32996 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12002 /* 32998 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12003 /* 33000 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12004 /* 33002 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12005 /* 33005 */ GIR_RootConstrainSelectedInstOperands,
12006 /* 33006 */ // GIR_Coverage, 153,
12007 /* 33006 */ GIR_EraseRootFromParent_Done,
12008 /* 33007 */ // Label 1037: @33007
12009 /* 33007 */ GIM_Try, /*On fail goto*//*Label 1038*/ GIMT_Encode4(33039), // Rule ID 155 //
12010 /* 33012 */ // MIs[0] Operand 1
12011 /* 33012 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
12012 /* 33017 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12013 /* 33021 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12014 /* 33025 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12015 /* 33025 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F64),
12016 /* 33028 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12017 /* 33030 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12018 /* 33032 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12019 /* 33034 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12020 /* 33037 */ GIR_RootConstrainSelectedInstOperands,
12021 /* 33038 */ // GIR_Coverage, 155,
12022 /* 33038 */ GIR_EraseRootFromParent_Done,
12023 /* 33039 */ // Label 1038: @33039
12024 /* 33039 */ GIM_Try, /*On fail goto*//*Label 1039*/ GIMT_Encode4(33071), // Rule ID 157 //
12025 /* 33044 */ // MIs[0] Operand 1
12026 /* 33044 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
12027 /* 33049 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12028 /* 33053 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12029 /* 33057 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12030 /* 33057 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F64),
12031 /* 33060 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12032 /* 33062 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12033 /* 33064 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12034 /* 33066 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12035 /* 33069 */ GIR_RootConstrainSelectedInstOperands,
12036 /* 33070 */ // GIR_Coverage, 157,
12037 /* 33070 */ GIR_EraseRootFromParent_Done,
12038 /* 33071 */ // Label 1039: @33071
12039 /* 33071 */ GIM_Try, /*On fail goto*//*Label 1040*/ GIMT_Encode4(33103), // Rule ID 159 //
12040 /* 33076 */ // MIs[0] Operand 1
12041 /* 33076 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
12042 /* 33081 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12043 /* 33085 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12044 /* 33089 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12045 /* 33089 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F64),
12046 /* 33092 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12047 /* 33094 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12048 /* 33096 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12049 /* 33098 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12050 /* 33101 */ GIR_RootConstrainSelectedInstOperands,
12051 /* 33102 */ // GIR_Coverage, 159,
12052 /* 33102 */ GIR_EraseRootFromParent_Done,
12053 /* 33103 */ // Label 1040: @33103
12054 /* 33103 */ GIM_Try, /*On fail goto*//*Label 1041*/ GIMT_Encode4(33135), // Rule ID 161 //
12055 /* 33108 */ // MIs[0] Operand 1
12056 /* 33108 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
12057 /* 33113 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12058 /* 33117 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12059 /* 33121 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12060 /* 33121 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F64),
12061 /* 33124 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12062 /* 33126 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12063 /* 33128 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12064 /* 33130 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12065 /* 33133 */ GIR_RootConstrainSelectedInstOperands,
12066 /* 33134 */ // GIR_Coverage, 161,
12067 /* 33134 */ GIR_EraseRootFromParent_Done,
12068 /* 33135 */ // Label 1041: @33135
12069 /* 33135 */ GIM_Try, /*On fail goto*//*Label 1042*/ GIMT_Encode4(33167), // Rule ID 163 //
12070 /* 33140 */ // MIs[0] Operand 1
12071 /* 33140 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
12072 /* 33145 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12073 /* 33149 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12074 /* 33153 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12075 /* 33153 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F64),
12076 /* 33156 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12077 /* 33158 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12078 /* 33160 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12079 /* 33162 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12080 /* 33165 */ GIR_RootConstrainSelectedInstOperands,
12081 /* 33166 */ // GIR_Coverage, 163,
12082 /* 33166 */ GIR_EraseRootFromParent_Done,
12083 /* 33167 */ // Label 1042: @33167
12084 /* 33167 */ GIM_Reject,
12085 /* 33168 */ // Label 1036: @33168
12086 /* 33168 */ GIM_Reject,
12087 /* 33169 */ // Label 1028: @33169
12088 /* 33169 */ GIM_Reject,
12089 /* 33170 */ // Label 1022: @33170
12090 /* 33170 */ GIM_Try, /*On fail goto*//*Label 1043*/ GIMT_Encode4(33390),
12091 /* 33175 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
12092 /* 33178 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
12093 /* 33181 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12094 /* 33185 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1044*/ GIMT_Encode4(33219), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 201 //
12095 /* 33192 */ // MIs[0] Operand 1
12096 /* 33192 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
12097 /* 33197 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12098 /* 33201 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12099 /* 33205 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12100 /* 33205 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F16x8),
12101 /* 33208 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12102 /* 33210 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12103 /* 33212 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12104 /* 33214 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12105 /* 33217 */ GIR_RootConstrainSelectedInstOperands,
12106 /* 33218 */ // GIR_Coverage, 201,
12107 /* 33218 */ GIR_EraseRootFromParent_Done,
12108 /* 33219 */ // Label 1044: @33219
12109 /* 33219 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1045*/ GIMT_Encode4(33253), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 208 //
12110 /* 33226 */ // MIs[0] Operand 1
12111 /* 33226 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
12112 /* 33231 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12113 /* 33235 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12114 /* 33239 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12115 /* 33239 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F16x8),
12116 /* 33242 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12117 /* 33244 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12118 /* 33246 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12119 /* 33248 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12120 /* 33251 */ GIR_RootConstrainSelectedInstOperands,
12121 /* 33252 */ // GIR_Coverage, 208,
12122 /* 33252 */ GIR_EraseRootFromParent_Done,
12123 /* 33253 */ // Label 1045: @33253
12124 /* 33253 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1046*/ GIMT_Encode4(33287), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 218 //
12125 /* 33260 */ // MIs[0] Operand 1
12126 /* 33260 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
12127 /* 33265 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12128 /* 33269 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12129 /* 33273 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12130 /* 33273 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F16x8),
12131 /* 33276 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12132 /* 33278 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12133 /* 33280 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12134 /* 33282 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12135 /* 33285 */ GIR_RootConstrainSelectedInstOperands,
12136 /* 33286 */ // GIR_Coverage, 218,
12137 /* 33286 */ GIR_EraseRootFromParent_Done,
12138 /* 33287 */ // Label 1046: @33287
12139 /* 33287 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1047*/ GIMT_Encode4(33321), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 228 //
12140 /* 33294 */ // MIs[0] Operand 1
12141 /* 33294 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
12142 /* 33299 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12143 /* 33303 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12144 /* 33307 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12145 /* 33307 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F16x8),
12146 /* 33310 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12147 /* 33312 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12148 /* 33314 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12149 /* 33316 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12150 /* 33319 */ GIR_RootConstrainSelectedInstOperands,
12151 /* 33320 */ // GIR_Coverage, 228,
12152 /* 33320 */ GIR_EraseRootFromParent_Done,
12153 /* 33321 */ // Label 1047: @33321
12154 /* 33321 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1048*/ GIMT_Encode4(33355), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 238 //
12155 /* 33328 */ // MIs[0] Operand 1
12156 /* 33328 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
12157 /* 33333 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12158 /* 33337 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12159 /* 33341 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12160 /* 33341 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F16x8),
12161 /* 33344 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12162 /* 33346 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12163 /* 33348 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12164 /* 33350 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12165 /* 33353 */ GIR_RootConstrainSelectedInstOperands,
12166 /* 33354 */ // GIR_Coverage, 238,
12167 /* 33354 */ GIR_EraseRootFromParent_Done,
12168 /* 33355 */ // Label 1048: @33355
12169 /* 33355 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1049*/ GIMT_Encode4(33389), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 248 //
12170 /* 33362 */ // MIs[0] Operand 1
12171 /* 33362 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
12172 /* 33367 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12173 /* 33371 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12174 /* 33375 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12175 /* 33375 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F16x8),
12176 /* 33378 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12177 /* 33380 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12178 /* 33382 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12179 /* 33384 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12180 /* 33387 */ GIR_RootConstrainSelectedInstOperands,
12181 /* 33388 */ // GIR_Coverage, 248,
12182 /* 33388 */ GIR_EraseRootFromParent_Done,
12183 /* 33389 */ // Label 1049: @33389
12184 /* 33389 */ GIM_Reject,
12185 /* 33390 */ // Label 1043: @33390
12186 /* 33390 */ GIM_Reject,
12187 /* 33391 */ // Label 1023: @33391
12188 /* 33391 */ GIM_Try, /*On fail goto*//*Label 1050*/ GIMT_Encode4(33611),
12189 /* 33396 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
12190 /* 33399 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
12191 /* 33402 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12192 /* 33406 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1051*/ GIMT_Encode4(33440), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 199 //
12193 /* 33413 */ // MIs[0] Operand 1
12194 /* 33413 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
12195 /* 33418 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12196 /* 33422 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12197 /* 33426 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12198 /* 33426 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F32x4),
12199 /* 33429 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12200 /* 33431 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12201 /* 33433 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12202 /* 33435 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12203 /* 33438 */ GIR_RootConstrainSelectedInstOperands,
12204 /* 33439 */ // GIR_Coverage, 199,
12205 /* 33439 */ GIR_EraseRootFromParent_Done,
12206 /* 33440 */ // Label 1051: @33440
12207 /* 33440 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1052*/ GIMT_Encode4(33474), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 206 //
12208 /* 33447 */ // MIs[0] Operand 1
12209 /* 33447 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
12210 /* 33452 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12211 /* 33456 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12212 /* 33460 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12213 /* 33460 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F32x4),
12214 /* 33463 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12215 /* 33465 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12216 /* 33467 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12217 /* 33469 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12218 /* 33472 */ GIR_RootConstrainSelectedInstOperands,
12219 /* 33473 */ // GIR_Coverage, 206,
12220 /* 33473 */ GIR_EraseRootFromParent_Done,
12221 /* 33474 */ // Label 1052: @33474
12222 /* 33474 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1053*/ GIMT_Encode4(33508), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 216 //
12223 /* 33481 */ // MIs[0] Operand 1
12224 /* 33481 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
12225 /* 33486 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12226 /* 33490 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12227 /* 33494 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12228 /* 33494 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F32x4),
12229 /* 33497 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12230 /* 33499 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12231 /* 33501 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12232 /* 33503 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12233 /* 33506 */ GIR_RootConstrainSelectedInstOperands,
12234 /* 33507 */ // GIR_Coverage, 216,
12235 /* 33507 */ GIR_EraseRootFromParent_Done,
12236 /* 33508 */ // Label 1053: @33508
12237 /* 33508 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1054*/ GIMT_Encode4(33542), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 226 //
12238 /* 33515 */ // MIs[0] Operand 1
12239 /* 33515 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
12240 /* 33520 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12241 /* 33524 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12242 /* 33528 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12243 /* 33528 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F32x4),
12244 /* 33531 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12245 /* 33533 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12246 /* 33535 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12247 /* 33537 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12248 /* 33540 */ GIR_RootConstrainSelectedInstOperands,
12249 /* 33541 */ // GIR_Coverage, 226,
12250 /* 33541 */ GIR_EraseRootFromParent_Done,
12251 /* 33542 */ // Label 1054: @33542
12252 /* 33542 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1055*/ GIMT_Encode4(33576), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 236 //
12253 /* 33549 */ // MIs[0] Operand 1
12254 /* 33549 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
12255 /* 33554 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12256 /* 33558 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12257 /* 33562 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12258 /* 33562 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F32x4),
12259 /* 33565 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12260 /* 33567 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12261 /* 33569 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12262 /* 33571 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12263 /* 33574 */ GIR_RootConstrainSelectedInstOperands,
12264 /* 33575 */ // GIR_Coverage, 236,
12265 /* 33575 */ GIR_EraseRootFromParent_Done,
12266 /* 33576 */ // Label 1055: @33576
12267 /* 33576 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1056*/ GIMT_Encode4(33610), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 246 //
12268 /* 33583 */ // MIs[0] Operand 1
12269 /* 33583 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
12270 /* 33588 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12271 /* 33592 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12272 /* 33596 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12273 /* 33596 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F32x4),
12274 /* 33599 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12275 /* 33601 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12276 /* 33603 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12277 /* 33605 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12278 /* 33608 */ GIR_RootConstrainSelectedInstOperands,
12279 /* 33609 */ // GIR_Coverage, 246,
12280 /* 33609 */ GIR_EraseRootFromParent_Done,
12281 /* 33610 */ // Label 1056: @33610
12282 /* 33610 */ GIM_Reject,
12283 /* 33611 */ // Label 1050: @33611
12284 /* 33611 */ GIM_Reject,
12285 /* 33612 */ // Label 1024: @33612
12286 /* 33612 */ GIM_Try, /*On fail goto*//*Label 1057*/ GIMT_Encode4(33832),
12287 /* 33617 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
12288 /* 33620 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
12289 /* 33623 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12290 /* 33627 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1058*/ GIMT_Encode4(33661), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 200 //
12291 /* 33634 */ // MIs[0] Operand 1
12292 /* 33634 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
12293 /* 33639 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12294 /* 33643 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12295 /* 33647 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12296 /* 33647 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F64x2),
12297 /* 33650 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12298 /* 33652 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12299 /* 33654 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12300 /* 33656 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12301 /* 33659 */ GIR_RootConstrainSelectedInstOperands,
12302 /* 33660 */ // GIR_Coverage, 200,
12303 /* 33660 */ GIR_EraseRootFromParent_Done,
12304 /* 33661 */ // Label 1058: @33661
12305 /* 33661 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1059*/ GIMT_Encode4(33695), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 207 //
12306 /* 33668 */ // MIs[0] Operand 1
12307 /* 33668 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
12308 /* 33673 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12309 /* 33677 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12310 /* 33681 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12311 /* 33681 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F64x2),
12312 /* 33684 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12313 /* 33686 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12314 /* 33688 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12315 /* 33690 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12316 /* 33693 */ GIR_RootConstrainSelectedInstOperands,
12317 /* 33694 */ // GIR_Coverage, 207,
12318 /* 33694 */ GIR_EraseRootFromParent_Done,
12319 /* 33695 */ // Label 1059: @33695
12320 /* 33695 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1060*/ GIMT_Encode4(33729), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 217 //
12321 /* 33702 */ // MIs[0] Operand 1
12322 /* 33702 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
12323 /* 33707 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12324 /* 33711 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12325 /* 33715 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12326 /* 33715 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F64x2),
12327 /* 33718 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12328 /* 33720 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12329 /* 33722 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12330 /* 33724 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12331 /* 33727 */ GIR_RootConstrainSelectedInstOperands,
12332 /* 33728 */ // GIR_Coverage, 217,
12333 /* 33728 */ GIR_EraseRootFromParent_Done,
12334 /* 33729 */ // Label 1060: @33729
12335 /* 33729 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1061*/ GIMT_Encode4(33763), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 227 //
12336 /* 33736 */ // MIs[0] Operand 1
12337 /* 33736 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
12338 /* 33741 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12339 /* 33745 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12340 /* 33749 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12341 /* 33749 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F64x2),
12342 /* 33752 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12343 /* 33754 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12344 /* 33756 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12345 /* 33758 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12346 /* 33761 */ GIR_RootConstrainSelectedInstOperands,
12347 /* 33762 */ // GIR_Coverage, 227,
12348 /* 33762 */ GIR_EraseRootFromParent_Done,
12349 /* 33763 */ // Label 1061: @33763
12350 /* 33763 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1062*/ GIMT_Encode4(33797), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 237 //
12351 /* 33770 */ // MIs[0] Operand 1
12352 /* 33770 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
12353 /* 33775 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12354 /* 33779 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12355 /* 33783 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12356 /* 33783 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F64x2),
12357 /* 33786 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12358 /* 33788 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12359 /* 33790 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12360 /* 33792 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12361 /* 33795 */ GIR_RootConstrainSelectedInstOperands,
12362 /* 33796 */ // GIR_Coverage, 237,
12363 /* 33796 */ GIR_EraseRootFromParent_Done,
12364 /* 33797 */ // Label 1062: @33797
12365 /* 33797 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1063*/ GIMT_Encode4(33831), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 247 //
12366 /* 33804 */ // MIs[0] Operand 1
12367 /* 33804 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
12368 /* 33809 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12369 /* 33813 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12370 /* 33817 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12371 /* 33817 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F64x2),
12372 /* 33820 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12373 /* 33822 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12374 /* 33824 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12375 /* 33826 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12376 /* 33829 */ GIR_RootConstrainSelectedInstOperands,
12377 /* 33830 */ // GIR_Coverage, 247,
12378 /* 33830 */ GIR_EraseRootFromParent_Done,
12379 /* 33831 */ // Label 1063: @33831
12380 /* 33831 */ GIM_Reject,
12381 /* 33832 */ // Label 1057: @33832
12382 /* 33832 */ GIM_Reject,
12383 /* 33833 */ // Label 1025: @33833
12384 /* 33833 */ GIM_Reject,
12385 /* 33834 */ // Label 39: @33834
12386 /* 33834 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(19), /*)*//*default:*//*Label 1077*/ GIMT_Encode4(38167),
12387 /* 33845 */ /*GILLT_i32*//*Label 1064*/ GIMT_Encode4(33913),
12388 /* 33849 */ /*GILLT_i64*//*Label 1065*/ GIMT_Encode4(34090),
12389 /* 33853 */ /*GILLT_f32*//*Label 1066*/ GIMT_Encode4(34267),
12390 /* 33857 */ /*GILLT_f64*//*Label 1067*/ GIMT_Encode4(34444),
12391 /* 33861 */ /*GILLT_p0s32*//*Label 1068*/ GIMT_Encode4(34621),
12392 /* 33865 */ /*GILLT_p0s64*//*Label 1069*/ GIMT_Encode4(34782), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
12393 /* 33885 */ /*GILLT_v16i8*//*Label 1070*/ GIMT_Encode4(34943),
12394 /* 33889 */ /*GILLT_v8i16*//*Label 1071*/ GIMT_Encode4(35291),
12395 /* 33893 */ /*GILLT_v4i32*//*Label 1072*/ GIMT_Encode4(35841),
12396 /* 33897 */ /*GILLT_v2i64*//*Label 1073*/ GIMT_Encode4(36579),
12397 /* 33901 */ /*GILLT_v8f16*//*Label 1074*/ GIMT_Encode4(37321),
12398 /* 33905 */ /*GILLT_v4f32*//*Label 1075*/ GIMT_Encode4(37599),
12399 /* 33909 */ /*GILLT_v2f64*//*Label 1076*/ GIMT_Encode4(37881),
12400 /* 33913 */ // Label 1064: @33913
12401 /* 33913 */ GIM_Try, /*On fail goto*//*Label 1078*/ GIMT_Encode4(34089),
12402 /* 33918 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
12403 /* 33921 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
12404 /* 33924 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
12405 /* 33927 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12406 /* 33931 */ GIM_Try, /*On fail goto*//*Label 1079*/ GIMT_Encode4(34055),
12407 /* 33936 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12408 /* 33940 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12409 /* 33944 */ GIM_Try, /*On fail goto*//*Label 1080*/ GIMT_Encode4(33999), // Rule ID 627 //
12410 /* 33949 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12411 /* 33953 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12412 /* 33957 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12413 /* 33961 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12414 /* 33965 */ // MIs[1] Operand 1
12415 /* 33965 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
12416 /* 33970 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12417 /* 33975 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12418 /* 33979 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12419 /* 33981 */ // (select:{ *:[i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$cond)
12420 /* 33981 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
12421 /* 33984 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12422 /* 33986 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12423 /* 33988 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12424 /* 33990 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12425 /* 33994 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12426 /* 33997 */ GIR_RootConstrainSelectedInstOperands,
12427 /* 33998 */ // GIR_Coverage, 627,
12428 /* 33998 */ GIR_EraseRootFromParent_Done,
12429 /* 33999 */ // Label 1080: @33999
12430 /* 33999 */ GIM_Try, /*On fail goto*//*Label 1081*/ GIMT_Encode4(34054), // Rule ID 629 //
12431 /* 34004 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12432 /* 34008 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12433 /* 34012 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12434 /* 34016 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12435 /* 34020 */ // MIs[1] Operand 1
12436 /* 34020 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
12437 /* 34025 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12438 /* 34030 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12439 /* 34034 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12440 /* 34036 */ // (select:{ *:[i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$cond)
12441 /* 34036 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
12442 /* 34039 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12443 /* 34041 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12444 /* 34043 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12445 /* 34045 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12446 /* 34049 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12447 /* 34052 */ GIR_RootConstrainSelectedInstOperands,
12448 /* 34053 */ // GIR_Coverage, 629,
12449 /* 34053 */ GIR_EraseRootFromParent_Done,
12450 /* 34054 */ // Label 1081: @34054
12451 /* 34054 */ GIM_Reject,
12452 /* 34055 */ // Label 1079: @34055
12453 /* 34055 */ GIM_Try, /*On fail goto*//*Label 1082*/ GIMT_Encode4(34088), // Rule ID 122 //
12454 /* 34060 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12455 /* 34064 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12456 /* 34068 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12457 /* 34072 */ // (select:{ *:[i32] } I32:{ *:[i32] }:$cond, I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$cond)
12458 /* 34072 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
12459 /* 34075 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12460 /* 34077 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12461 /* 34079 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12462 /* 34081 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
12463 /* 34083 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12464 /* 34086 */ GIR_RootConstrainSelectedInstOperands,
12465 /* 34087 */ // GIR_Coverage, 122,
12466 /* 34087 */ GIR_EraseRootFromParent_Done,
12467 /* 34088 */ // Label 1082: @34088
12468 /* 34088 */ GIM_Reject,
12469 /* 34089 */ // Label 1078: @34089
12470 /* 34089 */ GIM_Reject,
12471 /* 34090 */ // Label 1065: @34090
12472 /* 34090 */ GIM_Try, /*On fail goto*//*Label 1083*/ GIMT_Encode4(34266),
12473 /* 34095 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
12474 /* 34098 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
12475 /* 34101 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i64,
12476 /* 34104 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12477 /* 34108 */ GIM_Try, /*On fail goto*//*Label 1084*/ GIMT_Encode4(34232),
12478 /* 34113 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12479 /* 34117 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12480 /* 34121 */ GIM_Try, /*On fail goto*//*Label 1085*/ GIMT_Encode4(34176), // Rule ID 628 //
12481 /* 34126 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12482 /* 34130 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12483 /* 34134 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12484 /* 34138 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12485 /* 34142 */ // MIs[1] Operand 1
12486 /* 34142 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
12487 /* 34147 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12488 /* 34152 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12489 /* 34156 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12490 /* 34158 */ // (select:{ *:[i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, I32:{ *:[i32] }:$cond)
12491 /* 34158 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
12492 /* 34161 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12493 /* 34163 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12494 /* 34165 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12495 /* 34167 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12496 /* 34171 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12497 /* 34174 */ GIR_RootConstrainSelectedInstOperands,
12498 /* 34175 */ // GIR_Coverage, 628,
12499 /* 34175 */ GIR_EraseRootFromParent_Done,
12500 /* 34176 */ // Label 1085: @34176
12501 /* 34176 */ GIM_Try, /*On fail goto*//*Label 1086*/ GIMT_Encode4(34231), // Rule ID 630 //
12502 /* 34181 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12503 /* 34185 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12504 /* 34189 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12505 /* 34193 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12506 /* 34197 */ // MIs[1] Operand 1
12507 /* 34197 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
12508 /* 34202 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12509 /* 34207 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12510 /* 34211 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12511 /* 34213 */ // (select:{ *:[i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$rhs, I64:{ *:[i64] }:$lhs, I32:{ *:[i32] }:$cond)
12512 /* 34213 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
12513 /* 34216 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12514 /* 34218 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12515 /* 34220 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12516 /* 34222 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12517 /* 34226 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12518 /* 34229 */ GIR_RootConstrainSelectedInstOperands,
12519 /* 34230 */ // GIR_Coverage, 630,
12520 /* 34230 */ GIR_EraseRootFromParent_Done,
12521 /* 34231 */ // Label 1086: @34231
12522 /* 34231 */ GIM_Reject,
12523 /* 34232 */ // Label 1084: @34232
12524 /* 34232 */ GIM_Try, /*On fail goto*//*Label 1087*/ GIMT_Encode4(34265), // Rule ID 123 //
12525 /* 34237 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12526 /* 34241 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12527 /* 34245 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12528 /* 34249 */ // (select:{ *:[i64] } I32:{ *:[i32] }:$cond, I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, I32:{ *:[i32] }:$cond)
12529 /* 34249 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
12530 /* 34252 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12531 /* 34254 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12532 /* 34256 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12533 /* 34258 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
12534 /* 34260 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12535 /* 34263 */ GIR_RootConstrainSelectedInstOperands,
12536 /* 34264 */ // GIR_Coverage, 123,
12537 /* 34264 */ GIR_EraseRootFromParent_Done,
12538 /* 34265 */ // Label 1087: @34265
12539 /* 34265 */ GIM_Reject,
12540 /* 34266 */ // Label 1083: @34266
12541 /* 34266 */ GIM_Reject,
12542 /* 34267 */ // Label 1066: @34267
12543 /* 34267 */ GIM_Try, /*On fail goto*//*Label 1088*/ GIMT_Encode4(34443),
12544 /* 34272 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
12545 /* 34275 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
12546 /* 34278 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_f32,
12547 /* 34281 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12548 /* 34285 */ GIM_Try, /*On fail goto*//*Label 1089*/ GIMT_Encode4(34409),
12549 /* 34290 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12550 /* 34294 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12551 /* 34298 */ GIM_Try, /*On fail goto*//*Label 1090*/ GIMT_Encode4(34353), // Rule ID 653 //
12552 /* 34303 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12553 /* 34307 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12554 /* 34311 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12555 /* 34315 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12556 /* 34319 */ // MIs[1] Operand 1
12557 /* 34319 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
12558 /* 34324 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12559 /* 34329 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12560 /* 34333 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12561 /* 34335 */ // (select:{ *:[f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SELECT_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, I32:{ *:[i32] }:$cond)
12562 /* 34335 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F32),
12563 /* 34338 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12564 /* 34340 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12565 /* 34342 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12566 /* 34344 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12567 /* 34348 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12568 /* 34351 */ GIR_RootConstrainSelectedInstOperands,
12569 /* 34352 */ // GIR_Coverage, 653,
12570 /* 34352 */ GIR_EraseRootFromParent_Done,
12571 /* 34353 */ // Label 1090: @34353
12572 /* 34353 */ GIM_Try, /*On fail goto*//*Label 1091*/ GIMT_Encode4(34408), // Rule ID 655 //
12573 /* 34358 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12574 /* 34362 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12575 /* 34366 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12576 /* 34370 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12577 /* 34374 */ // MIs[1] Operand 1
12578 /* 34374 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
12579 /* 34379 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12580 /* 34384 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12581 /* 34388 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12582 /* 34390 */ // (select:{ *:[f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SELECT_F32:{ *:[f32] } F32:{ *:[f32] }:$rhs, F32:{ *:[f32] }:$lhs, I32:{ *:[i32] }:$cond)
12583 /* 34390 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F32),
12584 /* 34393 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12585 /* 34395 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12586 /* 34397 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12587 /* 34399 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12588 /* 34403 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12589 /* 34406 */ GIR_RootConstrainSelectedInstOperands,
12590 /* 34407 */ // GIR_Coverage, 655,
12591 /* 34407 */ GIR_EraseRootFromParent_Done,
12592 /* 34408 */ // Label 1091: @34408
12593 /* 34408 */ GIM_Reject,
12594 /* 34409 */ // Label 1089: @34409
12595 /* 34409 */ GIM_Try, /*On fail goto*//*Label 1092*/ GIMT_Encode4(34442), // Rule ID 164 //
12596 /* 34414 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12597 /* 34418 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12598 /* 34422 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12599 /* 34426 */ // (select:{ *:[f32] } I32:{ *:[i32] }:$cond, F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SELECT_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, I32:{ *:[i32] }:$cond)
12600 /* 34426 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F32),
12601 /* 34429 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12602 /* 34431 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12603 /* 34433 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12604 /* 34435 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
12605 /* 34437 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12606 /* 34440 */ GIR_RootConstrainSelectedInstOperands,
12607 /* 34441 */ // GIR_Coverage, 164,
12608 /* 34441 */ GIR_EraseRootFromParent_Done,
12609 /* 34442 */ // Label 1092: @34442
12610 /* 34442 */ GIM_Reject,
12611 /* 34443 */ // Label 1088: @34443
12612 /* 34443 */ GIM_Reject,
12613 /* 34444 */ // Label 1067: @34444
12614 /* 34444 */ GIM_Try, /*On fail goto*//*Label 1093*/ GIMT_Encode4(34620),
12615 /* 34449 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
12616 /* 34452 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
12617 /* 34455 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_f64,
12618 /* 34458 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12619 /* 34462 */ GIM_Try, /*On fail goto*//*Label 1094*/ GIMT_Encode4(34586),
12620 /* 34467 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12621 /* 34471 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12622 /* 34475 */ GIM_Try, /*On fail goto*//*Label 1095*/ GIMT_Encode4(34530), // Rule ID 654 //
12623 /* 34480 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12624 /* 34484 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12625 /* 34488 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12626 /* 34492 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12627 /* 34496 */ // MIs[1] Operand 1
12628 /* 34496 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
12629 /* 34501 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12630 /* 34506 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12631 /* 34510 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12632 /* 34512 */ // (select:{ *:[f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SELECT_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, I32:{ *:[i32] }:$cond)
12633 /* 34512 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F64),
12634 /* 34515 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12635 /* 34517 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12636 /* 34519 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12637 /* 34521 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12638 /* 34525 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12639 /* 34528 */ GIR_RootConstrainSelectedInstOperands,
12640 /* 34529 */ // GIR_Coverage, 654,
12641 /* 34529 */ GIR_EraseRootFromParent_Done,
12642 /* 34530 */ // Label 1095: @34530
12643 /* 34530 */ GIM_Try, /*On fail goto*//*Label 1096*/ GIMT_Encode4(34585), // Rule ID 656 //
12644 /* 34535 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12645 /* 34539 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12646 /* 34543 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12647 /* 34547 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12648 /* 34551 */ // MIs[1] Operand 1
12649 /* 34551 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
12650 /* 34556 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12651 /* 34561 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12652 /* 34565 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12653 /* 34567 */ // (select:{ *:[f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SELECT_F64:{ *:[f64] } F64:{ *:[f64] }:$rhs, F64:{ *:[f64] }:$lhs, I32:{ *:[i32] }:$cond)
12654 /* 34567 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F64),
12655 /* 34570 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12656 /* 34572 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12657 /* 34574 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12658 /* 34576 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12659 /* 34580 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12660 /* 34583 */ GIR_RootConstrainSelectedInstOperands,
12661 /* 34584 */ // GIR_Coverage, 656,
12662 /* 34584 */ GIR_EraseRootFromParent_Done,
12663 /* 34585 */ // Label 1096: @34585
12664 /* 34585 */ GIM_Reject,
12665 /* 34586 */ // Label 1094: @34586
12666 /* 34586 */ GIM_Try, /*On fail goto*//*Label 1097*/ GIMT_Encode4(34619), // Rule ID 165 //
12667 /* 34591 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12668 /* 34595 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12669 /* 34599 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12670 /* 34603 */ // (select:{ *:[f64] } I32:{ *:[i32] }:$cond, F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SELECT_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, I32:{ *:[i32] }:$cond)
12671 /* 34603 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F64),
12672 /* 34606 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12673 /* 34608 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12674 /* 34610 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12675 /* 34612 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
12676 /* 34614 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12677 /* 34617 */ GIR_RootConstrainSelectedInstOperands,
12678 /* 34618 */ // GIR_Coverage, 165,
12679 /* 34618 */ GIR_EraseRootFromParent_Done,
12680 /* 34619 */ // Label 1097: @34619
12681 /* 34619 */ GIM_Reject,
12682 /* 34620 */ // Label 1093: @34620
12683 /* 34620 */ GIM_Reject,
12684 /* 34621 */ // Label 1068: @34621
12685 /* 34621 */ GIM_Try, /*On fail goto*//*Label 1098*/ GIMT_Encode4(34781),
12686 /* 34626 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
12687 /* 34629 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_p0s32,
12688 /* 34632 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_p0s32,
12689 /* 34635 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12690 /* 34639 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1099*/ GIMT_Encode4(34696), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1324 //
12691 /* 34646 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12692 /* 34650 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12693 /* 34654 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12694 /* 34658 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12695 /* 34662 */ // MIs[1] Operand 1
12696 /* 34662 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
12697 /* 34667 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12698 /* 34672 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12699 /* 34676 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12700 /* 34678 */ // (select:{ *:[i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$cond)
12701 /* 34678 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
12702 /* 34681 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12703 /* 34683 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12704 /* 34685 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12705 /* 34687 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12706 /* 34691 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12707 /* 34694 */ GIR_RootConstrainSelectedInstOperands,
12708 /* 34695 */ // GIR_Coverage, 1324,
12709 /* 34695 */ GIR_EraseRootFromParent_Done,
12710 /* 34696 */ // Label 1099: @34696
12711 /* 34696 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1100*/ GIMT_Encode4(34753), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1326 //
12712 /* 34703 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12713 /* 34707 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12714 /* 34711 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12715 /* 34715 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12716 /* 34719 */ // MIs[1] Operand 1
12717 /* 34719 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
12718 /* 34724 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12719 /* 34729 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12720 /* 34733 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12721 /* 34735 */ // (select:{ *:[i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$cond)
12722 /* 34735 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
12723 /* 34738 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12724 /* 34740 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12725 /* 34742 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12726 /* 34744 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12727 /* 34748 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12728 /* 34751 */ GIR_RootConstrainSelectedInstOperands,
12729 /* 34752 */ // GIR_Coverage, 1326,
12730 /* 34752 */ GIR_EraseRootFromParent_Done,
12731 /* 34753 */ // Label 1100: @34753
12732 /* 34753 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1101*/ GIMT_Encode4(34780), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1322 //
12733 /* 34760 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12734 /* 34764 */ // (select:{ *:[i32] } I32:{ *:[i32] }:$cond, p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$cond)
12735 /* 34764 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
12736 /* 34767 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12737 /* 34769 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12738 /* 34771 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12739 /* 34773 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
12740 /* 34775 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12741 /* 34778 */ GIR_RootConstrainSelectedInstOperands,
12742 /* 34779 */ // GIR_Coverage, 1322,
12743 /* 34779 */ GIR_EraseRootFromParent_Done,
12744 /* 34780 */ // Label 1101: @34780
12745 /* 34780 */ GIM_Reject,
12746 /* 34781 */ // Label 1098: @34781
12747 /* 34781 */ GIM_Reject,
12748 /* 34782 */ // Label 1069: @34782
12749 /* 34782 */ GIM_Try, /*On fail goto*//*Label 1102*/ GIMT_Encode4(34942),
12750 /* 34787 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
12751 /* 34790 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_p0s64,
12752 /* 34793 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_p0s64,
12753 /* 34796 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
12754 /* 34800 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1103*/ GIMT_Encode4(34857), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1325 //
12755 /* 34807 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12756 /* 34811 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12757 /* 34815 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12758 /* 34819 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12759 /* 34823 */ // MIs[1] Operand 1
12760 /* 34823 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
12761 /* 34828 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12762 /* 34833 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12763 /* 34837 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12764 /* 34839 */ // (select:{ *:[i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, I32:{ *:[i32] }:$cond)
12765 /* 34839 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
12766 /* 34842 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12767 /* 34844 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12768 /* 34846 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12769 /* 34848 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12770 /* 34852 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12771 /* 34855 */ GIR_RootConstrainSelectedInstOperands,
12772 /* 34856 */ // GIR_Coverage, 1325,
12773 /* 34856 */ GIR_EraseRootFromParent_Done,
12774 /* 34857 */ // Label 1103: @34857
12775 /* 34857 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1104*/ GIMT_Encode4(34914), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1327 //
12776 /* 34864 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12777 /* 34868 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12778 /* 34872 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12779 /* 34876 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12780 /* 34880 */ // MIs[1] Operand 1
12781 /* 34880 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
12782 /* 34885 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12783 /* 34890 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12784 /* 34894 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12785 /* 34896 */ // (select:{ *:[i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$rhs, I64:{ *:[i64] }:$lhs, I32:{ *:[i32] }:$cond)
12786 /* 34896 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
12787 /* 34899 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12788 /* 34901 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12789 /* 34903 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12790 /* 34905 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12791 /* 34909 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12792 /* 34912 */ GIR_RootConstrainSelectedInstOperands,
12793 /* 34913 */ // GIR_Coverage, 1327,
12794 /* 34913 */ GIR_EraseRootFromParent_Done,
12795 /* 34914 */ // Label 1104: @34914
12796 /* 34914 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1105*/ GIMT_Encode4(34941), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1323 //
12797 /* 34921 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12798 /* 34925 */ // (select:{ *:[i64] } I32:{ *:[i32] }:$cond, p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, I32:{ *:[i32] }:$cond)
12799 /* 34925 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
12800 /* 34928 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12801 /* 34930 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12802 /* 34932 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12803 /* 34934 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
12804 /* 34936 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12805 /* 34939 */ GIR_RootConstrainSelectedInstOperands,
12806 /* 34940 */ // GIR_Coverage, 1323,
12807 /* 34940 */ GIR_EraseRootFromParent_Done,
12808 /* 34941 */ // Label 1105: @34941
12809 /* 34941 */ GIM_Reject,
12810 /* 34942 */ // Label 1102: @34942
12811 /* 34942 */ GIM_Reject,
12812 /* 34943 */ // Label 1070: @34943
12813 /* 34943 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(13), /*)*//*default:*//*Label 1108*/ GIMT_Encode4(35290),
12814 /* 34954 */ /*GILLT_i32*//*Label 1106*/ GIMT_Encode4(34998), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
12815 /* 34994 */ /*GILLT_v16i8*//*Label 1107*/ GIMT_Encode4(35172),
12816 /* 34998 */ // Label 1106: @34998
12817 /* 34998 */ GIM_Try, /*On fail goto*//*Label 1109*/ GIMT_Encode4(35171),
12818 /* 35003 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
12819 /* 35006 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
12820 /* 35009 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12821 /* 35013 */ GIM_Try, /*On fail goto*//*Label 1110*/ GIMT_Encode4(35137),
12822 /* 35018 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12823 /* 35022 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12824 /* 35026 */ GIM_Try, /*On fail goto*//*Label 1111*/ GIMT_Encode4(35081), // Rule ID 1079 //
12825 /* 35031 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12826 /* 35035 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12827 /* 35039 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12828 /* 35043 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12829 /* 35047 */ // MIs[1] Operand 1
12830 /* 35047 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
12831 /* 35052 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12832 /* 35057 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12833 /* 35061 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12834 /* 35063 */ // (select:{ *:[v16i8] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SELECT_V128:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs, ?:{ *:[i32] }:$cond)
12835 /* 35063 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
12836 /* 35066 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12837 /* 35068 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12838 /* 35070 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12839 /* 35072 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12840 /* 35076 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12841 /* 35079 */ GIR_RootConstrainSelectedInstOperands,
12842 /* 35080 */ // GIR_Coverage, 1079,
12843 /* 35080 */ GIR_EraseRootFromParent_Done,
12844 /* 35081 */ // Label 1111: @35081
12845 /* 35081 */ GIM_Try, /*On fail goto*//*Label 1112*/ GIMT_Encode4(35136), // Rule ID 1080 //
12846 /* 35086 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12847 /* 35090 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12848 /* 35094 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12849 /* 35098 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12850 /* 35102 */ // MIs[1] Operand 1
12851 /* 35102 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
12852 /* 35107 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12853 /* 35112 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12854 /* 35116 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12855 /* 35118 */ // (select:{ *:[v16i8] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SELECT_V128:{ *:[v16i8] } ?:{ *:[v16i8] }:$rhs, ?:{ *:[v16i8] }:$lhs, ?:{ *:[i32] }:$cond)
12856 /* 35118 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
12857 /* 35121 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12858 /* 35123 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12859 /* 35125 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12860 /* 35127 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12861 /* 35131 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12862 /* 35134 */ GIR_RootConstrainSelectedInstOperands,
12863 /* 35135 */ // GIR_Coverage, 1080,
12864 /* 35135 */ GIR_EraseRootFromParent_Done,
12865 /* 35136 */ // Label 1112: @35136
12866 /* 35136 */ GIM_Reject,
12867 /* 35137 */ // Label 1110: @35137
12868 /* 35137 */ GIM_Try, /*On fail goto*//*Label 1113*/ GIMT_Encode4(35170), // Rule ID 1078 //
12869 /* 35142 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12870 /* 35146 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12871 /* 35150 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12872 /* 35154 */ // (select:{ *:[v16i8] } I32:{ *:[i32] }:$cond, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SELECT_V128:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs, ?:{ *:[i32] }:$cond)
12873 /* 35154 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
12874 /* 35157 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12875 /* 35159 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12876 /* 35161 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12877 /* 35163 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
12878 /* 35165 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12879 /* 35168 */ GIR_RootConstrainSelectedInstOperands,
12880 /* 35169 */ // GIR_Coverage, 1078,
12881 /* 35169 */ GIR_EraseRootFromParent_Done,
12882 /* 35170 */ // Label 1113: @35170
12883 /* 35170 */ GIM_Reject,
12884 /* 35171 */ // Label 1109: @35171
12885 /* 35171 */ GIM_Reject,
12886 /* 35172 */ // Label 1107: @35172
12887 /* 35172 */ GIM_Try, /*On fail goto*//*Label 1114*/ GIMT_Encode4(35289),
12888 /* 35177 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
12889 /* 35180 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
12890 /* 35183 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12891 /* 35187 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12892 /* 35191 */ GIM_Try, /*On fail goto*//*Label 1115*/ GIMT_Encode4(35259), // Rule ID 1067 //
12893 /* 35196 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
12894 /* 35200 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
12895 /* 35204 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
12896 /* 35208 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
12897 /* 35212 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12898 /* 35217 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
12899 /* 35221 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
12900 /* 35227 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
12901 /* 35229 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
12902 /* 35233 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
12903 /* 35239 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
12904 /* 35241 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
12905 /* 35243 */ // (vselect:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$x, immAllOnesV:{ *:[v16i8] }), immAllZerosV:{ *:[v16i8] }) => (ANDNOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$c, ?:{ *:[v16i8] }:$x)
12906 /* 35243 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
12907 /* 35246 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12908 /* 35248 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
12909 /* 35250 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // x
12910 /* 35254 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12911 /* 35257 */ GIR_RootConstrainSelectedInstOperands,
12912 /* 35258 */ // GIR_Coverage, 1067,
12913 /* 35258 */ GIR_EraseRootFromParent_Done,
12914 /* 35259 */ // Label 1115: @35259
12915 /* 35259 */ GIM_Try, /*On fail goto*//*Label 1116*/ GIMT_Encode4(35288), // Rule ID 1071 //
12916 /* 35264 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12917 /* 35268 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12918 /* 35272 */ // (vselect:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
12919 /* 35272 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
12920 /* 35275 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12921 /* 35277 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
12922 /* 35279 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
12923 /* 35281 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
12924 /* 35283 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12925 /* 35286 */ GIR_RootConstrainSelectedInstOperands,
12926 /* 35287 */ // GIR_Coverage, 1071,
12927 /* 35287 */ GIR_EraseRootFromParent_Done,
12928 /* 35288 */ // Label 1116: @35288
12929 /* 35288 */ GIM_Reject,
12930 /* 35289 */ // Label 1114: @35289
12931 /* 35289 */ GIM_Reject,
12932 /* 35290 */ // Label 1108: @35290
12933 /* 35290 */ GIM_Reject,
12934 /* 35291 */ // Label 1071: @35291
12935 /* 35291 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(14), /*)*//*default:*//*Label 1119*/ GIMT_Encode4(35840),
12936 /* 35302 */ /*GILLT_i32*//*Label 1117*/ GIMT_Encode4(35350), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
12937 /* 35346 */ /*GILLT_v8i16*//*Label 1118*/ GIMT_Encode4(35524),
12938 /* 35350 */ // Label 1117: @35350
12939 /* 35350 */ GIM_Try, /*On fail goto*//*Label 1120*/ GIMT_Encode4(35523),
12940 /* 35355 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
12941 /* 35358 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
12942 /* 35361 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12943 /* 35365 */ GIM_Try, /*On fail goto*//*Label 1121*/ GIMT_Encode4(35489),
12944 /* 35370 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12945 /* 35374 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12946 /* 35378 */ GIM_Try, /*On fail goto*//*Label 1122*/ GIMT_Encode4(35433), // Rule ID 1082 //
12947 /* 35383 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12948 /* 35387 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12949 /* 35391 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12950 /* 35395 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12951 /* 35399 */ // MIs[1] Operand 1
12952 /* 35399 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
12953 /* 35404 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12954 /* 35409 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12955 /* 35413 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12956 /* 35415 */ // (select:{ *:[v8i16] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SELECT_V128:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs, ?:{ *:[i32] }:$cond)
12957 /* 35415 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
12958 /* 35418 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12959 /* 35420 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12960 /* 35422 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12961 /* 35424 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12962 /* 35428 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12963 /* 35431 */ GIR_RootConstrainSelectedInstOperands,
12964 /* 35432 */ // GIR_Coverage, 1082,
12965 /* 35432 */ GIR_EraseRootFromParent_Done,
12966 /* 35433 */ // Label 1122: @35433
12967 /* 35433 */ GIM_Try, /*On fail goto*//*Label 1123*/ GIMT_Encode4(35488), // Rule ID 1083 //
12968 /* 35438 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12969 /* 35442 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12970 /* 35446 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12971 /* 35450 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12972 /* 35454 */ // MIs[1] Operand 1
12973 /* 35454 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
12974 /* 35459 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12975 /* 35464 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12976 /* 35468 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12977 /* 35470 */ // (select:{ *:[v8i16] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SELECT_V128:{ *:[v8i16] } ?:{ *:[v8i16] }:$rhs, ?:{ *:[v8i16] }:$lhs, ?:{ *:[i32] }:$cond)
12978 /* 35470 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
12979 /* 35473 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12980 /* 35475 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12981 /* 35477 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12982 /* 35479 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12983 /* 35483 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12984 /* 35486 */ GIR_RootConstrainSelectedInstOperands,
12985 /* 35487 */ // GIR_Coverage, 1083,
12986 /* 35487 */ GIR_EraseRootFromParent_Done,
12987 /* 35488 */ // Label 1123: @35488
12988 /* 35488 */ GIM_Reject,
12989 /* 35489 */ // Label 1121: @35489
12990 /* 35489 */ GIM_Try, /*On fail goto*//*Label 1124*/ GIMT_Encode4(35522), // Rule ID 1081 //
12991 /* 35494 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12992 /* 35498 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12993 /* 35502 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12994 /* 35506 */ // (select:{ *:[v8i16] } I32:{ *:[i32] }:$cond, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SELECT_V128:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs, ?:{ *:[i32] }:$cond)
12995 /* 35506 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
12996 /* 35509 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12997 /* 35511 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12998 /* 35513 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12999 /* 35515 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
13000 /* 35517 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13001 /* 35520 */ GIR_RootConstrainSelectedInstOperands,
13002 /* 35521 */ // GIR_Coverage, 1081,
13003 /* 35521 */ GIR_EraseRootFromParent_Done,
13004 /* 35522 */ // Label 1124: @35522
13005 /* 35522 */ GIM_Reject,
13006 /* 35523 */ // Label 1120: @35523
13007 /* 35523 */ GIM_Reject,
13008 /* 35524 */ // Label 1118: @35524
13009 /* 35524 */ GIM_Try, /*On fail goto*//*Label 1125*/ GIMT_Encode4(35606), // Rule ID 1068 //
13010 /* 35529 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
13011 /* 35532 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
13012 /* 35535 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13013 /* 35539 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13014 /* 35543 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
13015 /* 35547 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
13016 /* 35551 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
13017 /* 35555 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
13018 /* 35559 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13019 /* 35564 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13020 /* 35568 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
13021 /* 35574 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
13022 /* 35576 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
13023 /* 35580 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
13024 /* 35586 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
13025 /* 35588 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13026 /* 35590 */ // (vselect:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$x, immAllOnesV:{ *:[v8i16] }), immAllZerosV:{ *:[v8i16] }) => (ANDNOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$c, ?:{ *:[v8i16] }:$x)
13027 /* 35590 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
13028 /* 35593 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13029 /* 35595 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
13030 /* 35597 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // x
13031 /* 35601 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13032 /* 35604 */ GIR_RootConstrainSelectedInstOperands,
13033 /* 35605 */ // GIR_Coverage, 1068,
13034 /* 35605 */ GIR_EraseRootFromParent_Done,
13035 /* 35606 */ // Label 1125: @35606
13036 /* 35606 */ GIM_Try, /*On fail goto*//*Label 1126*/ GIMT_Encode4(35796),
13037 /* 35611 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13038 /* 35615 */ GIM_Try, /*On fail goto*//*Label 1127*/ GIMT_Encode4(35705), // Rule ID 1174 //
13039 /* 35620 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13040 /* 35624 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
13041 /* 35628 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8f16,
13042 /* 35632 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8f16,
13043 /* 35636 */ // MIs[1] Operand 1
13044 /* 35636 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
13045 /* 35641 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13046 /* 35645 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
13047 /* 35649 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
13048 /* 35653 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13049 /* 35658 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
13050 /* 35662 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
13051 /* 35666 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
13052 /* 35670 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13053 /* 35675 */ // MIs[0] rhs
13054 /* 35675 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
13055 /* 35680 */ // MIs[0] lhs
13056 /* 35680 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
13057 /* 35685 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13058 /* 35687 */ // (vselect:{ *:[v8i16] } (setcc:{ *:[v8i16] } (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$rhs), (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v8i16] }:$rhs, V128:{ *:[v8i16] }:$lhs) => (PMIN_F16x8:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
13059 /* 35687 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
13060 /* 35690 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13061 /* 35692 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
13062 /* 35696 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
13063 /* 35700 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13064 /* 35703 */ GIR_RootConstrainSelectedInstOperands,
13065 /* 35704 */ // GIR_Coverage, 1174,
13066 /* 35704 */ GIR_EraseRootFromParent_Done,
13067 /* 35705 */ // Label 1127: @35705
13068 /* 35705 */ GIM_Try, /*On fail goto*//*Label 1128*/ GIMT_Encode4(35795), // Rule ID 1175 //
13069 /* 35710 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13070 /* 35714 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
13071 /* 35718 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8f16,
13072 /* 35722 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8f16,
13073 /* 35726 */ // MIs[1] Operand 1
13074 /* 35726 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
13075 /* 35731 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13076 /* 35735 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
13077 /* 35739 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
13078 /* 35743 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13079 /* 35748 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
13080 /* 35752 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
13081 /* 35756 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
13082 /* 35760 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13083 /* 35765 */ // MIs[0] rhs
13084 /* 35765 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
13085 /* 35770 */ // MIs[0] lhs
13086 /* 35770 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
13087 /* 35775 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13088 /* 35777 */ // (vselect:{ *:[v8i16] } (setcc:{ *:[v8i16] } (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$lhs), (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v8i16] }:$rhs, V128:{ *:[v8i16] }:$lhs) => (PMAX_F16x8:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
13089 /* 35777 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
13090 /* 35780 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13091 /* 35782 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
13092 /* 35786 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
13093 /* 35790 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13094 /* 35793 */ GIR_RootConstrainSelectedInstOperands,
13095 /* 35794 */ // GIR_Coverage, 1175,
13096 /* 35794 */ GIR_EraseRootFromParent_Done,
13097 /* 35795 */ // Label 1128: @35795
13098 /* 35795 */ GIM_Reject,
13099 /* 35796 */ // Label 1126: @35796
13100 /* 35796 */ GIM_Try, /*On fail goto*//*Label 1129*/ GIMT_Encode4(35839), // Rule ID 1072 //
13101 /* 35801 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
13102 /* 35804 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
13103 /* 35807 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13104 /* 35811 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13105 /* 35815 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13106 /* 35819 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13107 /* 35823 */ // (vselect:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
13108 /* 35823 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
13109 /* 35826 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13110 /* 35828 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
13111 /* 35830 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
13112 /* 35832 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
13113 /* 35834 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13114 /* 35837 */ GIR_RootConstrainSelectedInstOperands,
13115 /* 35838 */ // GIR_Coverage, 1072,
13116 /* 35838 */ GIR_EraseRootFromParent_Done,
13117 /* 35839 */ // Label 1129: @35839
13118 /* 35839 */ GIM_Reject,
13119 /* 35840 */ // Label 1119: @35840
13120 /* 35840 */ GIM_Reject,
13121 /* 35841 */ // Label 1072: @35841
13122 /* 35841 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(15), /*)*//*default:*//*Label 1132*/ GIMT_Encode4(36578),
13123 /* 35852 */ /*GILLT_i32*//*Label 1130*/ GIMT_Encode4(35904), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
13124 /* 35900 */ /*GILLT_v4i32*//*Label 1131*/ GIMT_Encode4(36078),
13125 /* 35904 */ // Label 1130: @35904
13126 /* 35904 */ GIM_Try, /*On fail goto*//*Label 1133*/ GIMT_Encode4(36077),
13127 /* 35909 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
13128 /* 35912 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
13129 /* 35915 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13130 /* 35919 */ GIM_Try, /*On fail goto*//*Label 1134*/ GIMT_Encode4(36043),
13131 /* 35924 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13132 /* 35928 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13133 /* 35932 */ GIM_Try, /*On fail goto*//*Label 1135*/ GIMT_Encode4(35987), // Rule ID 1085 //
13134 /* 35937 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13135 /* 35941 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13136 /* 35945 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13137 /* 35949 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13138 /* 35953 */ // MIs[1] Operand 1
13139 /* 35953 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
13140 /* 35958 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13141 /* 35963 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13142 /* 35967 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13143 /* 35969 */ // (select:{ *:[v4i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SELECT_V128:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs, ?:{ *:[i32] }:$cond)
13144 /* 35969 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13145 /* 35972 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13146 /* 35974 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13147 /* 35976 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13148 /* 35978 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13149 /* 35982 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13150 /* 35985 */ GIR_RootConstrainSelectedInstOperands,
13151 /* 35986 */ // GIR_Coverage, 1085,
13152 /* 35986 */ GIR_EraseRootFromParent_Done,
13153 /* 35987 */ // Label 1135: @35987
13154 /* 35987 */ GIM_Try, /*On fail goto*//*Label 1136*/ GIMT_Encode4(36042), // Rule ID 1086 //
13155 /* 35992 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13156 /* 35996 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13157 /* 36000 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13158 /* 36004 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13159 /* 36008 */ // MIs[1] Operand 1
13160 /* 36008 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
13161 /* 36013 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13162 /* 36018 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13163 /* 36022 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13164 /* 36024 */ // (select:{ *:[v4i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SELECT_V128:{ *:[v4i32] } ?:{ *:[v4i32] }:$rhs, ?:{ *:[v4i32] }:$lhs, ?:{ *:[i32] }:$cond)
13165 /* 36024 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13166 /* 36027 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13167 /* 36029 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13168 /* 36031 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13169 /* 36033 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13170 /* 36037 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13171 /* 36040 */ GIR_RootConstrainSelectedInstOperands,
13172 /* 36041 */ // GIR_Coverage, 1086,
13173 /* 36041 */ GIR_EraseRootFromParent_Done,
13174 /* 36042 */ // Label 1136: @36042
13175 /* 36042 */ GIM_Reject,
13176 /* 36043 */ // Label 1134: @36043
13177 /* 36043 */ GIM_Try, /*On fail goto*//*Label 1137*/ GIMT_Encode4(36076), // Rule ID 1084 //
13178 /* 36048 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13179 /* 36052 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13180 /* 36056 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13181 /* 36060 */ // (select:{ *:[v4i32] } I32:{ *:[i32] }:$cond, V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SELECT_V128:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs, ?:{ *:[i32] }:$cond)
13182 /* 36060 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13183 /* 36063 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13184 /* 36065 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13185 /* 36067 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13186 /* 36069 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
13187 /* 36071 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13188 /* 36074 */ GIR_RootConstrainSelectedInstOperands,
13189 /* 36075 */ // GIR_Coverage, 1084,
13190 /* 36075 */ GIR_EraseRootFromParent_Done,
13191 /* 36076 */ // Label 1137: @36076
13192 /* 36076 */ GIM_Reject,
13193 /* 36077 */ // Label 1133: @36077
13194 /* 36077 */ GIM_Reject,
13195 /* 36078 */ // Label 1131: @36078
13196 /* 36078 */ GIM_Try, /*On fail goto*//*Label 1138*/ GIMT_Encode4(36160), // Rule ID 1069 //
13197 /* 36083 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
13198 /* 36086 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
13199 /* 36089 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13200 /* 36093 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13201 /* 36097 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
13202 /* 36101 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
13203 /* 36105 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
13204 /* 36109 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
13205 /* 36113 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13206 /* 36118 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13207 /* 36122 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
13208 /* 36128 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
13209 /* 36130 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
13210 /* 36134 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
13211 /* 36140 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
13212 /* 36142 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13213 /* 36144 */ // (vselect:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$x, immAllOnesV:{ *:[v4i32] }), immAllZerosV:{ *:[v4i32] }) => (ANDNOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$c, ?:{ *:[v4i32] }:$x)
13214 /* 36144 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
13215 /* 36147 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13216 /* 36149 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
13217 /* 36151 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // x
13218 /* 36155 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13219 /* 36158 */ GIR_RootConstrainSelectedInstOperands,
13220 /* 36159 */ // GIR_Coverage, 1069,
13221 /* 36159 */ GIR_EraseRootFromParent_Done,
13222 /* 36160 */ // Label 1138: @36160
13223 /* 36160 */ GIM_Try, /*On fail goto*//*Label 1139*/ GIMT_Encode4(36534),
13224 /* 36165 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13225 /* 36169 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1140*/ GIMT_Encode4(36261), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1274 //
13226 /* 36176 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13227 /* 36180 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
13228 /* 36184 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
13229 /* 36188 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
13230 /* 36192 */ // MIs[1] Operand 1
13231 /* 36192 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
13232 /* 36197 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13233 /* 36201 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
13234 /* 36205 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
13235 /* 36209 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13236 /* 36214 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
13237 /* 36218 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
13238 /* 36222 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
13239 /* 36226 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13240 /* 36231 */ // MIs[0] rhs
13241 /* 36231 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
13242 /* 36236 */ // MIs[0] lhs
13243 /* 36236 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
13244 /* 36241 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13245 /* 36243 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (SIMD_RELAXED_FMIN_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
13246 /* 36243 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F32x4),
13247 /* 36246 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13248 /* 36248 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
13249 /* 36252 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
13250 /* 36256 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13251 /* 36259 */ GIR_RootConstrainSelectedInstOperands,
13252 /* 36260 */ // GIR_Coverage, 1274,
13253 /* 36260 */ GIR_EraseRootFromParent_Done,
13254 /* 36261 */ // Label 1140: @36261
13255 /* 36261 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1141*/ GIMT_Encode4(36353), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1275 //
13256 /* 36268 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13257 /* 36272 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
13258 /* 36276 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
13259 /* 36280 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
13260 /* 36284 */ // MIs[1] Operand 1
13261 /* 36284 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
13262 /* 36289 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13263 /* 36293 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
13264 /* 36297 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
13265 /* 36301 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13266 /* 36306 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
13267 /* 36310 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
13268 /* 36314 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
13269 /* 36318 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13270 /* 36323 */ // MIs[0] rhs
13271 /* 36323 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
13272 /* 36328 */ // MIs[0] lhs
13273 /* 36328 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
13274 /* 36333 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13275 /* 36335 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (SIMD_RELAXED_FMAX_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
13276 /* 36335 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F32x4),
13277 /* 36338 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13278 /* 36340 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
13279 /* 36344 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
13280 /* 36348 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13281 /* 36351 */ GIR_RootConstrainSelectedInstOperands,
13282 /* 36352 */ // GIR_Coverage, 1275,
13283 /* 36352 */ GIR_EraseRootFromParent_Done,
13284 /* 36353 */ // Label 1141: @36353
13285 /* 36353 */ GIM_Try, /*On fail goto*//*Label 1142*/ GIMT_Encode4(36443), // Rule ID 1170 //
13286 /* 36358 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13287 /* 36362 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
13288 /* 36366 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
13289 /* 36370 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
13290 /* 36374 */ // MIs[1] Operand 1
13291 /* 36374 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
13292 /* 36379 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13293 /* 36383 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
13294 /* 36387 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
13295 /* 36391 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13296 /* 36396 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
13297 /* 36400 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
13298 /* 36404 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
13299 /* 36408 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13300 /* 36413 */ // MIs[0] rhs
13301 /* 36413 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
13302 /* 36418 */ // MIs[0] lhs
13303 /* 36418 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
13304 /* 36423 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13305 /* 36425 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (PMIN_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
13306 /* 36425 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
13307 /* 36428 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13308 /* 36430 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
13309 /* 36434 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
13310 /* 36438 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13311 /* 36441 */ GIR_RootConstrainSelectedInstOperands,
13312 /* 36442 */ // GIR_Coverage, 1170,
13313 /* 36442 */ GIR_EraseRootFromParent_Done,
13314 /* 36443 */ // Label 1142: @36443
13315 /* 36443 */ GIM_Try, /*On fail goto*//*Label 1143*/ GIMT_Encode4(36533), // Rule ID 1171 //
13316 /* 36448 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13317 /* 36452 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
13318 /* 36456 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
13319 /* 36460 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
13320 /* 36464 */ // MIs[1] Operand 1
13321 /* 36464 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
13322 /* 36469 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13323 /* 36473 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
13324 /* 36477 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
13325 /* 36481 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13326 /* 36486 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
13327 /* 36490 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
13328 /* 36494 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
13329 /* 36498 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13330 /* 36503 */ // MIs[0] rhs
13331 /* 36503 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
13332 /* 36508 */ // MIs[0] lhs
13333 /* 36508 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
13334 /* 36513 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13335 /* 36515 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (PMAX_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
13336 /* 36515 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
13337 /* 36518 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13338 /* 36520 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
13339 /* 36524 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
13340 /* 36528 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13341 /* 36531 */ GIR_RootConstrainSelectedInstOperands,
13342 /* 36532 */ // GIR_Coverage, 1171,
13343 /* 36532 */ GIR_EraseRootFromParent_Done,
13344 /* 36533 */ // Label 1143: @36533
13345 /* 36533 */ GIM_Reject,
13346 /* 36534 */ // Label 1139: @36534
13347 /* 36534 */ GIM_Try, /*On fail goto*//*Label 1144*/ GIMT_Encode4(36577), // Rule ID 1073 //
13348 /* 36539 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
13349 /* 36542 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
13350 /* 36545 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13351 /* 36549 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13352 /* 36553 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13353 /* 36557 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13354 /* 36561 */ // (vselect:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
13355 /* 36561 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
13356 /* 36564 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13357 /* 36566 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
13358 /* 36568 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
13359 /* 36570 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
13360 /* 36572 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13361 /* 36575 */ GIR_RootConstrainSelectedInstOperands,
13362 /* 36576 */ // GIR_Coverage, 1073,
13363 /* 36576 */ GIR_EraseRootFromParent_Done,
13364 /* 36577 */ // Label 1144: @36577
13365 /* 36577 */ GIM_Reject,
13366 /* 36578 */ // Label 1132: @36578
13367 /* 36578 */ GIM_Reject,
13368 /* 36579 */ // Label 1073: @36579
13369 /* 36579 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 1147*/ GIMT_Encode4(37320),
13370 /* 36590 */ /*GILLT_i32*//*Label 1145*/ GIMT_Encode4(36646), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
13371 /* 36642 */ /*GILLT_v2i64*//*Label 1146*/ GIMT_Encode4(36820),
13372 /* 36646 */ // Label 1145: @36646
13373 /* 36646 */ GIM_Try, /*On fail goto*//*Label 1148*/ GIMT_Encode4(36819),
13374 /* 36651 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
13375 /* 36654 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
13376 /* 36657 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13377 /* 36661 */ GIM_Try, /*On fail goto*//*Label 1149*/ GIMT_Encode4(36785),
13378 /* 36666 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13379 /* 36670 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13380 /* 36674 */ GIM_Try, /*On fail goto*//*Label 1150*/ GIMT_Encode4(36729), // Rule ID 1088 //
13381 /* 36679 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13382 /* 36683 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13383 /* 36687 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13384 /* 36691 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13385 /* 36695 */ // MIs[1] Operand 1
13386 /* 36695 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
13387 /* 36700 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13388 /* 36705 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13389 /* 36709 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13390 /* 36711 */ // (select:{ *:[v2i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SELECT_V128:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs, ?:{ *:[i32] }:$cond)
13391 /* 36711 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13392 /* 36714 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13393 /* 36716 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13394 /* 36718 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13395 /* 36720 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13396 /* 36724 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13397 /* 36727 */ GIR_RootConstrainSelectedInstOperands,
13398 /* 36728 */ // GIR_Coverage, 1088,
13399 /* 36728 */ GIR_EraseRootFromParent_Done,
13400 /* 36729 */ // Label 1150: @36729
13401 /* 36729 */ GIM_Try, /*On fail goto*//*Label 1151*/ GIMT_Encode4(36784), // Rule ID 1089 //
13402 /* 36734 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13403 /* 36738 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13404 /* 36742 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13405 /* 36746 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13406 /* 36750 */ // MIs[1] Operand 1
13407 /* 36750 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
13408 /* 36755 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13409 /* 36760 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13410 /* 36764 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13411 /* 36766 */ // (select:{ *:[v2i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SELECT_V128:{ *:[v2i64] } ?:{ *:[v2i64] }:$rhs, ?:{ *:[v2i64] }:$lhs, ?:{ *:[i32] }:$cond)
13412 /* 36766 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13413 /* 36769 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13414 /* 36771 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13415 /* 36773 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13416 /* 36775 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13417 /* 36779 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13418 /* 36782 */ GIR_RootConstrainSelectedInstOperands,
13419 /* 36783 */ // GIR_Coverage, 1089,
13420 /* 36783 */ GIR_EraseRootFromParent_Done,
13421 /* 36784 */ // Label 1151: @36784
13422 /* 36784 */ GIM_Reject,
13423 /* 36785 */ // Label 1149: @36785
13424 /* 36785 */ GIM_Try, /*On fail goto*//*Label 1152*/ GIMT_Encode4(36818), // Rule ID 1087 //
13425 /* 36790 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13426 /* 36794 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13427 /* 36798 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13428 /* 36802 */ // (select:{ *:[v2i64] } I32:{ *:[i32] }:$cond, V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SELECT_V128:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs, ?:{ *:[i32] }:$cond)
13429 /* 36802 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13430 /* 36805 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13431 /* 36807 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13432 /* 36809 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13433 /* 36811 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
13434 /* 36813 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13435 /* 36816 */ GIR_RootConstrainSelectedInstOperands,
13436 /* 36817 */ // GIR_Coverage, 1087,
13437 /* 36817 */ GIR_EraseRootFromParent_Done,
13438 /* 36818 */ // Label 1152: @36818
13439 /* 36818 */ GIM_Reject,
13440 /* 36819 */ // Label 1148: @36819
13441 /* 36819 */ GIM_Reject,
13442 /* 36820 */ // Label 1146: @36820
13443 /* 36820 */ GIM_Try, /*On fail goto*//*Label 1153*/ GIMT_Encode4(36902), // Rule ID 1070 //
13444 /* 36825 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
13445 /* 36828 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
13446 /* 36831 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13447 /* 36835 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13448 /* 36839 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
13449 /* 36843 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
13450 /* 36847 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
13451 /* 36851 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
13452 /* 36855 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13453 /* 36860 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13454 /* 36864 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
13455 /* 36870 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
13456 /* 36872 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
13457 /* 36876 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
13458 /* 36882 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
13459 /* 36884 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13460 /* 36886 */ // (vselect:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$x, immAllOnesV:{ *:[v2i64] }), immAllZerosV:{ *:[v2i64] }) => (ANDNOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$c, ?:{ *:[v2i64] }:$x)
13461 /* 36886 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
13462 /* 36889 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13463 /* 36891 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
13464 /* 36893 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // x
13465 /* 36897 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13466 /* 36900 */ GIR_RootConstrainSelectedInstOperands,
13467 /* 36901 */ // GIR_Coverage, 1070,
13468 /* 36901 */ GIR_EraseRootFromParent_Done,
13469 /* 36902 */ // Label 1153: @36902
13470 /* 36902 */ GIM_Try, /*On fail goto*//*Label 1154*/ GIMT_Encode4(37276),
13471 /* 36907 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13472 /* 36911 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1155*/ GIMT_Encode4(37003), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1280 //
13473 /* 36918 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13474 /* 36922 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
13475 /* 36926 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
13476 /* 36930 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
13477 /* 36934 */ // MIs[1] Operand 1
13478 /* 36934 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
13479 /* 36939 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13480 /* 36943 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
13481 /* 36947 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
13482 /* 36951 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13483 /* 36956 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
13484 /* 36960 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
13485 /* 36964 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
13486 /* 36968 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13487 /* 36973 */ // MIs[0] rhs
13488 /* 36973 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
13489 /* 36978 */ // MIs[0] lhs
13490 /* 36978 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
13491 /* 36983 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13492 /* 36985 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (SIMD_RELAXED_FMIN_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
13493 /* 36985 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F64x2),
13494 /* 36988 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13495 /* 36990 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
13496 /* 36994 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
13497 /* 36998 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13498 /* 37001 */ GIR_RootConstrainSelectedInstOperands,
13499 /* 37002 */ // GIR_Coverage, 1280,
13500 /* 37002 */ GIR_EraseRootFromParent_Done,
13501 /* 37003 */ // Label 1155: @37003
13502 /* 37003 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1156*/ GIMT_Encode4(37095), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1281 //
13503 /* 37010 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13504 /* 37014 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
13505 /* 37018 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
13506 /* 37022 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
13507 /* 37026 */ // MIs[1] Operand 1
13508 /* 37026 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
13509 /* 37031 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13510 /* 37035 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
13511 /* 37039 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
13512 /* 37043 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13513 /* 37048 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
13514 /* 37052 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
13515 /* 37056 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
13516 /* 37060 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13517 /* 37065 */ // MIs[0] rhs
13518 /* 37065 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
13519 /* 37070 */ // MIs[0] lhs
13520 /* 37070 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
13521 /* 37075 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13522 /* 37077 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (SIMD_RELAXED_FMAX_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
13523 /* 37077 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F64x2),
13524 /* 37080 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13525 /* 37082 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
13526 /* 37086 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
13527 /* 37090 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13528 /* 37093 */ GIR_RootConstrainSelectedInstOperands,
13529 /* 37094 */ // GIR_Coverage, 1281,
13530 /* 37094 */ GIR_EraseRootFromParent_Done,
13531 /* 37095 */ // Label 1156: @37095
13532 /* 37095 */ GIM_Try, /*On fail goto*//*Label 1157*/ GIMT_Encode4(37185), // Rule ID 1172 //
13533 /* 37100 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13534 /* 37104 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
13535 /* 37108 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
13536 /* 37112 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
13537 /* 37116 */ // MIs[1] Operand 1
13538 /* 37116 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
13539 /* 37121 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13540 /* 37125 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
13541 /* 37129 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
13542 /* 37133 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13543 /* 37138 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
13544 /* 37142 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
13545 /* 37146 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
13546 /* 37150 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13547 /* 37155 */ // MIs[0] rhs
13548 /* 37155 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
13549 /* 37160 */ // MIs[0] lhs
13550 /* 37160 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
13551 /* 37165 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13552 /* 37167 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (PMIN_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
13553 /* 37167 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
13554 /* 37170 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13555 /* 37172 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
13556 /* 37176 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
13557 /* 37180 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13558 /* 37183 */ GIR_RootConstrainSelectedInstOperands,
13559 /* 37184 */ // GIR_Coverage, 1172,
13560 /* 37184 */ GIR_EraseRootFromParent_Done,
13561 /* 37185 */ // Label 1157: @37185
13562 /* 37185 */ GIM_Try, /*On fail goto*//*Label 1158*/ GIMT_Encode4(37275), // Rule ID 1173 //
13563 /* 37190 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13564 /* 37194 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
13565 /* 37198 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
13566 /* 37202 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
13567 /* 37206 */ // MIs[1] Operand 1
13568 /* 37206 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
13569 /* 37211 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13570 /* 37215 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
13571 /* 37219 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
13572 /* 37223 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13573 /* 37228 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
13574 /* 37232 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
13575 /* 37236 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
13576 /* 37240 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13577 /* 37245 */ // MIs[0] rhs
13578 /* 37245 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
13579 /* 37250 */ // MIs[0] lhs
13580 /* 37250 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
13581 /* 37255 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13582 /* 37257 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (PMAX_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
13583 /* 37257 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
13584 /* 37260 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13585 /* 37262 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
13586 /* 37266 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
13587 /* 37270 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13588 /* 37273 */ GIR_RootConstrainSelectedInstOperands,
13589 /* 37274 */ // GIR_Coverage, 1173,
13590 /* 37274 */ GIR_EraseRootFromParent_Done,
13591 /* 37275 */ // Label 1158: @37275
13592 /* 37275 */ GIM_Reject,
13593 /* 37276 */ // Label 1154: @37276
13594 /* 37276 */ GIM_Try, /*On fail goto*//*Label 1159*/ GIMT_Encode4(37319), // Rule ID 1074 //
13595 /* 37281 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
13596 /* 37284 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
13597 /* 37287 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13598 /* 37291 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13599 /* 37295 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13600 /* 37299 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13601 /* 37303 */ // (vselect:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
13602 /* 37303 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
13603 /* 37306 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13604 /* 37308 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
13605 /* 37310 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
13606 /* 37312 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
13607 /* 37314 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13608 /* 37317 */ GIR_RootConstrainSelectedInstOperands,
13609 /* 37318 */ // GIR_Coverage, 1074,
13610 /* 37318 */ GIR_EraseRootFromParent_Done,
13611 /* 37319 */ // Label 1159: @37319
13612 /* 37319 */ GIM_Reject,
13613 /* 37320 */ // Label 1147: @37320
13614 /* 37320 */ GIM_Reject,
13615 /* 37321 */ // Label 1074: @37321
13616 /* 37321 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(14), /*)*//*default:*//*Label 1162*/ GIMT_Encode4(37598),
13617 /* 37332 */ /*GILLT_i32*//*Label 1160*/ GIMT_Encode4(37380), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
13618 /* 37376 */ /*GILLT_v8i16*//*Label 1161*/ GIMT_Encode4(37554),
13619 /* 37380 */ // Label 1160: @37380
13620 /* 37380 */ GIM_Try, /*On fail goto*//*Label 1163*/ GIMT_Encode4(37553),
13621 /* 37385 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
13622 /* 37388 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
13623 /* 37391 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13624 /* 37395 */ GIM_Try, /*On fail goto*//*Label 1164*/ GIMT_Encode4(37519),
13625 /* 37400 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13626 /* 37404 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13627 /* 37408 */ GIM_Try, /*On fail goto*//*Label 1165*/ GIMT_Encode4(37463), // Rule ID 1097 //
13628 /* 37413 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13629 /* 37417 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13630 /* 37421 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13631 /* 37425 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13632 /* 37429 */ // MIs[1] Operand 1
13633 /* 37429 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
13634 /* 37434 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13635 /* 37439 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13636 /* 37443 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13637 /* 37445 */ // (select:{ *:[v8f16] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (SELECT_V128:{ *:[v8f16] } ?:{ *:[v8f16] }:$lhs, ?:{ *:[v8f16] }:$rhs, ?:{ *:[i32] }:$cond)
13638 /* 37445 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13639 /* 37448 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13640 /* 37450 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13641 /* 37452 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13642 /* 37454 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13643 /* 37458 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13644 /* 37461 */ GIR_RootConstrainSelectedInstOperands,
13645 /* 37462 */ // GIR_Coverage, 1097,
13646 /* 37462 */ GIR_EraseRootFromParent_Done,
13647 /* 37463 */ // Label 1165: @37463
13648 /* 37463 */ GIM_Try, /*On fail goto*//*Label 1166*/ GIMT_Encode4(37518), // Rule ID 1098 //
13649 /* 37468 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13650 /* 37472 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13651 /* 37476 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13652 /* 37480 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13653 /* 37484 */ // MIs[1] Operand 1
13654 /* 37484 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
13655 /* 37489 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13656 /* 37494 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13657 /* 37498 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13658 /* 37500 */ // (select:{ *:[v8f16] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (SELECT_V128:{ *:[v8f16] } ?:{ *:[v8f16] }:$rhs, ?:{ *:[v8f16] }:$lhs, ?:{ *:[i32] }:$cond)
13659 /* 37500 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13660 /* 37503 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13661 /* 37505 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13662 /* 37507 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13663 /* 37509 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13664 /* 37513 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13665 /* 37516 */ GIR_RootConstrainSelectedInstOperands,
13666 /* 37517 */ // GIR_Coverage, 1098,
13667 /* 37517 */ GIR_EraseRootFromParent_Done,
13668 /* 37518 */ // Label 1166: @37518
13669 /* 37518 */ GIM_Reject,
13670 /* 37519 */ // Label 1164: @37519
13671 /* 37519 */ GIM_Try, /*On fail goto*//*Label 1167*/ GIMT_Encode4(37552), // Rule ID 1096 //
13672 /* 37524 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13673 /* 37528 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13674 /* 37532 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13675 /* 37536 */ // (select:{ *:[v8f16] } I32:{ *:[i32] }:$cond, V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (SELECT_V128:{ *:[v8f16] } ?:{ *:[v8f16] }:$lhs, ?:{ *:[v8f16] }:$rhs, ?:{ *:[i32] }:$cond)
13676 /* 37536 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13677 /* 37539 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13678 /* 37541 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13679 /* 37543 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13680 /* 37545 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
13681 /* 37547 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13682 /* 37550 */ GIR_RootConstrainSelectedInstOperands,
13683 /* 37551 */ // GIR_Coverage, 1096,
13684 /* 37551 */ GIR_EraseRootFromParent_Done,
13685 /* 37552 */ // Label 1167: @37552
13686 /* 37552 */ GIM_Reject,
13687 /* 37553 */ // Label 1163: @37553
13688 /* 37553 */ GIM_Reject,
13689 /* 37554 */ // Label 1161: @37554
13690 /* 37554 */ GIM_Try, /*On fail goto*//*Label 1168*/ GIMT_Encode4(37597), // Rule ID 1077 //
13691 /* 37559 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
13692 /* 37562 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
13693 /* 37565 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13694 /* 37569 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13695 /* 37573 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13696 /* 37577 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13697 /* 37581 */ // (vselect:{ *:[v8f16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8f16] }:$v1, V128:{ *:[v8f16] }:$v2) => (BITSELECT:{ *:[v8f16] } ?:{ *:[v8f16] }:$v1, ?:{ *:[v8f16] }:$v2, ?:{ *:[v8i16] }:$c)
13698 /* 37581 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
13699 /* 37584 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13700 /* 37586 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
13701 /* 37588 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
13702 /* 37590 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
13703 /* 37592 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13704 /* 37595 */ GIR_RootConstrainSelectedInstOperands,
13705 /* 37596 */ // GIR_Coverage, 1077,
13706 /* 37596 */ GIR_EraseRootFromParent_Done,
13707 /* 37597 */ // Label 1168: @37597
13708 /* 37597 */ GIM_Reject,
13709 /* 37598 */ // Label 1162: @37598
13710 /* 37598 */ GIM_Reject,
13711 /* 37599 */ // Label 1075: @37599
13712 /* 37599 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(15), /*)*//*default:*//*Label 1171*/ GIMT_Encode4(37880),
13713 /* 37610 */ /*GILLT_i32*//*Label 1169*/ GIMT_Encode4(37662), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
13714 /* 37658 */ /*GILLT_v4i32*//*Label 1170*/ GIMT_Encode4(37836),
13715 /* 37662 */ // Label 1169: @37662
13716 /* 37662 */ GIM_Try, /*On fail goto*//*Label 1172*/ GIMT_Encode4(37835),
13717 /* 37667 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
13718 /* 37670 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
13719 /* 37673 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13720 /* 37677 */ GIM_Try, /*On fail goto*//*Label 1173*/ GIMT_Encode4(37801),
13721 /* 37682 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13722 /* 37686 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13723 /* 37690 */ GIM_Try, /*On fail goto*//*Label 1174*/ GIMT_Encode4(37745), // Rule ID 1091 //
13724 /* 37695 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13725 /* 37699 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13726 /* 37703 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13727 /* 37707 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13728 /* 37711 */ // MIs[1] Operand 1
13729 /* 37711 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
13730 /* 37716 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13731 /* 37721 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13732 /* 37725 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13733 /* 37727 */ // (select:{ *:[v4f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SELECT_V128:{ *:[v4f32] } ?:{ *:[v4f32] }:$lhs, ?:{ *:[v4f32] }:$rhs, ?:{ *:[i32] }:$cond)
13734 /* 37727 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13735 /* 37730 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13736 /* 37732 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13737 /* 37734 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13738 /* 37736 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13739 /* 37740 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13740 /* 37743 */ GIR_RootConstrainSelectedInstOperands,
13741 /* 37744 */ // GIR_Coverage, 1091,
13742 /* 37744 */ GIR_EraseRootFromParent_Done,
13743 /* 37745 */ // Label 1174: @37745
13744 /* 37745 */ GIM_Try, /*On fail goto*//*Label 1175*/ GIMT_Encode4(37800), // Rule ID 1092 //
13745 /* 37750 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13746 /* 37754 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13747 /* 37758 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13748 /* 37762 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13749 /* 37766 */ // MIs[1] Operand 1
13750 /* 37766 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
13751 /* 37771 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13752 /* 37776 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13753 /* 37780 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13754 /* 37782 */ // (select:{ *:[v4f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SELECT_V128:{ *:[v4f32] } ?:{ *:[v4f32] }:$rhs, ?:{ *:[v4f32] }:$lhs, ?:{ *:[i32] }:$cond)
13755 /* 37782 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13756 /* 37785 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13757 /* 37787 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13758 /* 37789 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13759 /* 37791 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13760 /* 37795 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13761 /* 37798 */ GIR_RootConstrainSelectedInstOperands,
13762 /* 37799 */ // GIR_Coverage, 1092,
13763 /* 37799 */ GIR_EraseRootFromParent_Done,
13764 /* 37800 */ // Label 1175: @37800
13765 /* 37800 */ GIM_Reject,
13766 /* 37801 */ // Label 1173: @37801
13767 /* 37801 */ GIM_Try, /*On fail goto*//*Label 1176*/ GIMT_Encode4(37834), // Rule ID 1090 //
13768 /* 37806 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13769 /* 37810 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13770 /* 37814 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13771 /* 37818 */ // (select:{ *:[v4f32] } I32:{ *:[i32] }:$cond, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SELECT_V128:{ *:[v4f32] } ?:{ *:[v4f32] }:$lhs, ?:{ *:[v4f32] }:$rhs, ?:{ *:[i32] }:$cond)
13772 /* 37818 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13773 /* 37821 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13774 /* 37823 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13775 /* 37825 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13776 /* 37827 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
13777 /* 37829 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13778 /* 37832 */ GIR_RootConstrainSelectedInstOperands,
13779 /* 37833 */ // GIR_Coverage, 1090,
13780 /* 37833 */ GIR_EraseRootFromParent_Done,
13781 /* 37834 */ // Label 1176: @37834
13782 /* 37834 */ GIM_Reject,
13783 /* 37835 */ // Label 1172: @37835
13784 /* 37835 */ GIM_Reject,
13785 /* 37836 */ // Label 1170: @37836
13786 /* 37836 */ GIM_Try, /*On fail goto*//*Label 1177*/ GIMT_Encode4(37879), // Rule ID 1075 //
13787 /* 37841 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
13788 /* 37844 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
13789 /* 37847 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13790 /* 37851 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13791 /* 37855 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13792 /* 37859 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13793 /* 37863 */ // (vselect:{ *:[v4f32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4f32] }:$v1, V128:{ *:[v4f32] }:$v2) => (BITSELECT:{ *:[v4f32] } ?:{ *:[v4f32] }:$v1, ?:{ *:[v4f32] }:$v2, ?:{ *:[v4i32] }:$c)
13794 /* 37863 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
13795 /* 37866 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13796 /* 37868 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
13797 /* 37870 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
13798 /* 37872 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
13799 /* 37874 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13800 /* 37877 */ GIR_RootConstrainSelectedInstOperands,
13801 /* 37878 */ // GIR_Coverage, 1075,
13802 /* 37878 */ GIR_EraseRootFromParent_Done,
13803 /* 37879 */ // Label 1177: @37879
13804 /* 37879 */ GIM_Reject,
13805 /* 37880 */ // Label 1171: @37880
13806 /* 37880 */ GIM_Reject,
13807 /* 37881 */ // Label 1076: @37881
13808 /* 37881 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 1180*/ GIMT_Encode4(38166),
13809 /* 37892 */ /*GILLT_i32*//*Label 1178*/ GIMT_Encode4(37948), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
13810 /* 37944 */ /*GILLT_v2i64*//*Label 1179*/ GIMT_Encode4(38122),
13811 /* 37948 */ // Label 1178: @37948
13812 /* 37948 */ GIM_Try, /*On fail goto*//*Label 1181*/ GIMT_Encode4(38121),
13813 /* 37953 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
13814 /* 37956 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
13815 /* 37959 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13816 /* 37963 */ GIM_Try, /*On fail goto*//*Label 1182*/ GIMT_Encode4(38087),
13817 /* 37968 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13818 /* 37972 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13819 /* 37976 */ GIM_Try, /*On fail goto*//*Label 1183*/ GIMT_Encode4(38031), // Rule ID 1094 //
13820 /* 37981 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13821 /* 37985 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13822 /* 37989 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13823 /* 37993 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13824 /* 37997 */ // MIs[1] Operand 1
13825 /* 37997 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
13826 /* 38002 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13827 /* 38007 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13828 /* 38011 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13829 /* 38013 */ // (select:{ *:[v2f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SELECT_V128:{ *:[v2f64] } ?:{ *:[v2f64] }:$lhs, ?:{ *:[v2f64] }:$rhs, ?:{ *:[i32] }:$cond)
13830 /* 38013 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13831 /* 38016 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13832 /* 38018 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13833 /* 38020 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13834 /* 38022 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13835 /* 38026 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13836 /* 38029 */ GIR_RootConstrainSelectedInstOperands,
13837 /* 38030 */ // GIR_Coverage, 1094,
13838 /* 38030 */ GIR_EraseRootFromParent_Done,
13839 /* 38031 */ // Label 1183: @38031
13840 /* 38031 */ GIM_Try, /*On fail goto*//*Label 1184*/ GIMT_Encode4(38086), // Rule ID 1095 //
13841 /* 38036 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13842 /* 38040 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13843 /* 38044 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13844 /* 38048 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13845 /* 38052 */ // MIs[1] Operand 1
13846 /* 38052 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
13847 /* 38057 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13848 /* 38062 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13849 /* 38066 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13850 /* 38068 */ // (select:{ *:[v2f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SELECT_V128:{ *:[v2f64] } ?:{ *:[v2f64] }:$rhs, ?:{ *:[v2f64] }:$lhs, ?:{ *:[i32] }:$cond)
13851 /* 38068 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13852 /* 38071 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13853 /* 38073 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13854 /* 38075 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13855 /* 38077 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13856 /* 38081 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13857 /* 38084 */ GIR_RootConstrainSelectedInstOperands,
13858 /* 38085 */ // GIR_Coverage, 1095,
13859 /* 38085 */ GIR_EraseRootFromParent_Done,
13860 /* 38086 */ // Label 1184: @38086
13861 /* 38086 */ GIM_Reject,
13862 /* 38087 */ // Label 1182: @38087
13863 /* 38087 */ GIM_Try, /*On fail goto*//*Label 1185*/ GIMT_Encode4(38120), // Rule ID 1093 //
13864 /* 38092 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13865 /* 38096 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13866 /* 38100 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13867 /* 38104 */ // (select:{ *:[v2f64] } I32:{ *:[i32] }:$cond, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SELECT_V128:{ *:[v2f64] } ?:{ *:[v2f64] }:$lhs, ?:{ *:[v2f64] }:$rhs, ?:{ *:[i32] }:$cond)
13868 /* 38104 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13869 /* 38107 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13870 /* 38109 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13871 /* 38111 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13872 /* 38113 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
13873 /* 38115 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13874 /* 38118 */ GIR_RootConstrainSelectedInstOperands,
13875 /* 38119 */ // GIR_Coverage, 1093,
13876 /* 38119 */ GIR_EraseRootFromParent_Done,
13877 /* 38120 */ // Label 1185: @38120
13878 /* 38120 */ GIM_Reject,
13879 /* 38121 */ // Label 1181: @38121
13880 /* 38121 */ GIM_Reject,
13881 /* 38122 */ // Label 1179: @38122
13882 /* 38122 */ GIM_Try, /*On fail goto*//*Label 1186*/ GIMT_Encode4(38165), // Rule ID 1076 //
13883 /* 38127 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
13884 /* 38130 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
13885 /* 38133 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13886 /* 38137 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13887 /* 38141 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13888 /* 38145 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13889 /* 38149 */ // (vselect:{ *:[v2f64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2f64] }:$v1, V128:{ *:[v2f64] }:$v2) => (BITSELECT:{ *:[v2f64] } ?:{ *:[v2f64] }:$v1, ?:{ *:[v2f64] }:$v2, ?:{ *:[v2i64] }:$c)
13890 /* 38149 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
13891 /* 38152 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13892 /* 38154 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
13893 /* 38156 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
13894 /* 38158 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
13895 /* 38160 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13896 /* 38163 */ GIR_RootConstrainSelectedInstOperands,
13897 /* 38164 */ // GIR_Coverage, 1076,
13898 /* 38164 */ GIR_EraseRootFromParent_Done,
13899 /* 38165 */ // Label 1186: @38165
13900 /* 38165 */ GIM_Reject,
13901 /* 38166 */ // Label 1180: @38166
13902 /* 38166 */ GIM_Reject,
13903 /* 38167 */ // Label 1077: @38167
13904 /* 38167 */ GIM_Reject,
13905 /* 38168 */ // Label 40: @38168
13906 /* 38168 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(14), /*)*//*default:*//*Label 1189*/ GIMT_Encode4(38265),
13907 /* 38179 */ /*GILLT_v16i8*//*Label 1187*/ GIMT_Encode4(38187),
13908 /* 38183 */ /*GILLT_v8i16*//*Label 1188*/ GIMT_Encode4(38226),
13909 /* 38187 */ // Label 1187: @38187
13910 /* 38187 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1190*/ GIMT_Encode4(38225), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 284 //
13911 /* 38194 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
13912 /* 38197 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
13913 /* 38200 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13914 /* 38204 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13915 /* 38208 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13916 /* 38212 */ // (uaddsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (ADD_SAT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
13917 /* 38212 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_U_I8x16),
13918 /* 38217 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13919 /* 38223 */ GIR_RootConstrainSelectedInstOperands,
13920 /* 38224 */ // GIR_Coverage, 284,
13921 /* 38224 */ GIR_Done,
13922 /* 38225 */ // Label 1190: @38225
13923 /* 38225 */ GIM_Reject,
13924 /* 38226 */ // Label 1188: @38226
13925 /* 38226 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1191*/ GIMT_Encode4(38264), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 285 //
13926 /* 38233 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
13927 /* 38236 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
13928 /* 38239 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13929 /* 38243 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13930 /* 38247 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13931 /* 38251 */ // (uaddsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (ADD_SAT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
13932 /* 38251 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_U_I16x8),
13933 /* 38256 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13934 /* 38262 */ GIR_RootConstrainSelectedInstOperands,
13935 /* 38263 */ // GIR_Coverage, 285,
13936 /* 38263 */ GIR_Done,
13937 /* 38264 */ // Label 1191: @38264
13938 /* 38264 */ GIM_Reject,
13939 /* 38265 */ // Label 1189: @38265
13940 /* 38265 */ GIM_Reject,
13941 /* 38266 */ // Label 41: @38266
13942 /* 38266 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(14), /*)*//*default:*//*Label 1194*/ GIMT_Encode4(38363),
13943 /* 38277 */ /*GILLT_v16i8*//*Label 1192*/ GIMT_Encode4(38285),
13944 /* 38281 */ /*GILLT_v8i16*//*Label 1193*/ GIMT_Encode4(38324),
13945 /* 38285 */ // Label 1192: @38285
13946 /* 38285 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1195*/ GIMT_Encode4(38323), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 282 //
13947 /* 38292 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
13948 /* 38295 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
13949 /* 38298 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13950 /* 38302 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13951 /* 38306 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13952 /* 38310 */ // (saddsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (ADD_SAT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
13953 /* 38310 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_S_I8x16),
13954 /* 38315 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13955 /* 38321 */ GIR_RootConstrainSelectedInstOperands,
13956 /* 38322 */ // GIR_Coverage, 282,
13957 /* 38322 */ GIR_Done,
13958 /* 38323 */ // Label 1195: @38323
13959 /* 38323 */ GIM_Reject,
13960 /* 38324 */ // Label 1193: @38324
13961 /* 38324 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1196*/ GIMT_Encode4(38362), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 283 //
13962 /* 38331 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
13963 /* 38334 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
13964 /* 38337 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13965 /* 38341 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13966 /* 38345 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13967 /* 38349 */ // (saddsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (ADD_SAT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
13968 /* 38349 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_S_I16x8),
13969 /* 38354 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13970 /* 38360 */ GIR_RootConstrainSelectedInstOperands,
13971 /* 38361 */ // GIR_Coverage, 283,
13972 /* 38361 */ GIR_Done,
13973 /* 38362 */ // Label 1196: @38362
13974 /* 38362 */ GIM_Reject,
13975 /* 38363 */ // Label 1194: @38363
13976 /* 38363 */ GIM_Reject,
13977 /* 38364 */ // Label 42: @38364
13978 /* 38364 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(14), /*)*//*default:*//*Label 1199*/ GIMT_Encode4(38461),
13979 /* 38375 */ /*GILLT_v16i8*//*Label 1197*/ GIMT_Encode4(38383),
13980 /* 38379 */ /*GILLT_v8i16*//*Label 1198*/ GIMT_Encode4(38422),
13981 /* 38383 */ // Label 1197: @38383
13982 /* 38383 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1200*/ GIMT_Encode4(38421), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 292 //
13983 /* 38390 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
13984 /* 38393 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
13985 /* 38396 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13986 /* 38400 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13987 /* 38404 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13988 /* 38408 */ // (usubsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SUB_SAT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
13989 /* 38408 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_U_I8x16),
13990 /* 38413 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
13991 /* 38419 */ GIR_RootConstrainSelectedInstOperands,
13992 /* 38420 */ // GIR_Coverage, 292,
13993 /* 38420 */ GIR_Done,
13994 /* 38421 */ // Label 1200: @38421
13995 /* 38421 */ GIM_Reject,
13996 /* 38422 */ // Label 1198: @38422
13997 /* 38422 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1201*/ GIMT_Encode4(38460), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 293 //
13998 /* 38429 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
13999 /* 38432 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
14000 /* 38435 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14001 /* 38439 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14002 /* 38443 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14003 /* 38447 */ // (usubsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SUB_SAT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
14004 /* 38447 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_U_I16x8),
14005 /* 38452 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14006 /* 38458 */ GIR_RootConstrainSelectedInstOperands,
14007 /* 38459 */ // GIR_Coverage, 293,
14008 /* 38459 */ GIR_Done,
14009 /* 38460 */ // Label 1201: @38460
14010 /* 38460 */ GIM_Reject,
14011 /* 38461 */ // Label 1199: @38461
14012 /* 38461 */ GIM_Reject,
14013 /* 38462 */ // Label 43: @38462
14014 /* 38462 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(14), /*)*//*default:*//*Label 1204*/ GIMT_Encode4(38559),
14015 /* 38473 */ /*GILLT_v16i8*//*Label 1202*/ GIMT_Encode4(38481),
14016 /* 38477 */ /*GILLT_v8i16*//*Label 1203*/ GIMT_Encode4(38520),
14017 /* 38481 */ // Label 1202: @38481
14018 /* 38481 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1205*/ GIMT_Encode4(38519), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 290 //
14019 /* 38488 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
14020 /* 38491 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
14021 /* 38494 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14022 /* 38498 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14023 /* 38502 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14024 /* 38506 */ // (ssubsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SUB_SAT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
14025 /* 38506 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_S_I8x16),
14026 /* 38511 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14027 /* 38517 */ GIR_RootConstrainSelectedInstOperands,
14028 /* 38518 */ // GIR_Coverage, 290,
14029 /* 38518 */ GIR_Done,
14030 /* 38519 */ // Label 1205: @38519
14031 /* 38519 */ GIM_Reject,
14032 /* 38520 */ // Label 1203: @38520
14033 /* 38520 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1206*/ GIMT_Encode4(38558), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 291 //
14034 /* 38527 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
14035 /* 38530 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
14036 /* 38533 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14037 /* 38537 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14038 /* 38541 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14039 /* 38545 */ // (ssubsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SUB_SAT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
14040 /* 38545 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_S_I16x8),
14041 /* 38550 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14042 /* 38556 */ GIR_RootConstrainSelectedInstOperands,
14043 /* 38557 */ // GIR_Coverage, 291,
14044 /* 38557 */ GIR_Done,
14045 /* 38558 */ // Label 1206: @38558
14046 /* 38558 */ GIM_Reject,
14047 /* 38559 */ // Label 1204: @38559
14048 /* 38559 */ GIM_Reject,
14049 /* 38560 */ // Label 44: @38560
14050 /* 38560 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1212*/ GIMT_Encode4(38822),
14051 /* 38571 */ /*GILLT_f32*//*Label 1207*/ GIMT_Encode4(38631),
14052 /* 38575 */ /*GILLT_f64*//*Label 1208*/ GIMT_Encode4(38668), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14053 /* 38619 */ /*GILLT_v8f16*//*Label 1209*/ GIMT_Encode4(38705),
14054 /* 38623 */ /*GILLT_v4f32*//*Label 1210*/ GIMT_Encode4(38744),
14055 /* 38627 */ /*GILLT_v2f64*//*Label 1211*/ GIMT_Encode4(38783),
14056 /* 38631 */ // Label 1207: @38631
14057 /* 38631 */ GIM_Try, /*On fail goto*//*Label 1213*/ GIMT_Encode4(38667), // Rule ID 124 //
14058 /* 38636 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
14059 /* 38639 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
14060 /* 38642 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14061 /* 38646 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14062 /* 38650 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14063 /* 38654 */ // (fadd:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (ADD_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
14064 /* 38654 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F32),
14065 /* 38659 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14066 /* 38665 */ GIR_RootConstrainSelectedInstOperands,
14067 /* 38666 */ // GIR_Coverage, 124,
14068 /* 38666 */ GIR_Done,
14069 /* 38667 */ // Label 1213: @38667
14070 /* 38667 */ GIM_Reject,
14071 /* 38668 */ // Label 1208: @38668
14072 /* 38668 */ GIM_Try, /*On fail goto*//*Label 1214*/ GIMT_Encode4(38704), // Rule ID 125 //
14073 /* 38673 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
14074 /* 38676 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
14075 /* 38679 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14076 /* 38683 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14077 /* 38687 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14078 /* 38691 */ // (fadd:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (ADD_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
14079 /* 38691 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F64),
14080 /* 38696 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14081 /* 38702 */ GIR_RootConstrainSelectedInstOperands,
14082 /* 38703 */ // GIR_Coverage, 125,
14083 /* 38703 */ GIR_Done,
14084 /* 38704 */ // Label 1214: @38704
14085 /* 38704 */ GIM_Reject,
14086 /* 38705 */ // Label 1209: @38705
14087 /* 38705 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1215*/ GIMT_Encode4(38743), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 347 //
14088 /* 38712 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
14089 /* 38715 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
14090 /* 38718 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14091 /* 38722 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14092 /* 38726 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14093 /* 38730 */ // (fadd:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (ADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
14094 /* 38730 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F16x8),
14095 /* 38735 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14096 /* 38741 */ GIR_RootConstrainSelectedInstOperands,
14097 /* 38742 */ // GIR_Coverage, 347,
14098 /* 38742 */ GIR_Done,
14099 /* 38743 */ // Label 1215: @38743
14100 /* 38743 */ GIM_Reject,
14101 /* 38744 */ // Label 1210: @38744
14102 /* 38744 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1216*/ GIMT_Encode4(38782), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 345 //
14103 /* 38751 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
14104 /* 38754 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
14105 /* 38757 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14106 /* 38761 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14107 /* 38765 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14108 /* 38769 */ // (fadd:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (ADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
14109 /* 38769 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F32x4),
14110 /* 38774 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14111 /* 38780 */ GIR_RootConstrainSelectedInstOperands,
14112 /* 38781 */ // GIR_Coverage, 345,
14113 /* 38781 */ GIR_Done,
14114 /* 38782 */ // Label 1216: @38782
14115 /* 38782 */ GIM_Reject,
14116 /* 38783 */ // Label 1211: @38783
14117 /* 38783 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1217*/ GIMT_Encode4(38821), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 346 //
14118 /* 38790 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
14119 /* 38793 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
14120 /* 38796 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14121 /* 38800 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14122 /* 38804 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14123 /* 38808 */ // (fadd:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (ADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
14124 /* 38808 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F64x2),
14125 /* 38813 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14126 /* 38819 */ GIR_RootConstrainSelectedInstOperands,
14127 /* 38820 */ // GIR_Coverage, 346,
14128 /* 38820 */ GIR_Done,
14129 /* 38821 */ // Label 1217: @38821
14130 /* 38821 */ GIM_Reject,
14131 /* 38822 */ // Label 1212: @38822
14132 /* 38822 */ GIM_Reject,
14133 /* 38823 */ // Label 45: @38823
14134 /* 38823 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1223*/ GIMT_Encode4(39085),
14135 /* 38834 */ /*GILLT_f32*//*Label 1218*/ GIMT_Encode4(38894),
14136 /* 38838 */ /*GILLT_f64*//*Label 1219*/ GIMT_Encode4(38931), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14137 /* 38882 */ /*GILLT_v8f16*//*Label 1220*/ GIMT_Encode4(38968),
14138 /* 38886 */ /*GILLT_v4f32*//*Label 1221*/ GIMT_Encode4(39007),
14139 /* 38890 */ /*GILLT_v2f64*//*Label 1222*/ GIMT_Encode4(39046),
14140 /* 38894 */ // Label 1218: @38894
14141 /* 38894 */ GIM_Try, /*On fail goto*//*Label 1224*/ GIMT_Encode4(38930), // Rule ID 126 //
14142 /* 38899 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
14143 /* 38902 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
14144 /* 38905 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14145 /* 38909 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14146 /* 38913 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14147 /* 38917 */ // (fsub:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SUB_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
14148 /* 38917 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F32),
14149 /* 38922 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14150 /* 38928 */ GIR_RootConstrainSelectedInstOperands,
14151 /* 38929 */ // GIR_Coverage, 126,
14152 /* 38929 */ GIR_Done,
14153 /* 38930 */ // Label 1224: @38930
14154 /* 38930 */ GIM_Reject,
14155 /* 38931 */ // Label 1219: @38931
14156 /* 38931 */ GIM_Try, /*On fail goto*//*Label 1225*/ GIMT_Encode4(38967), // Rule ID 127 //
14157 /* 38936 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
14158 /* 38939 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
14159 /* 38942 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14160 /* 38946 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14161 /* 38950 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14162 /* 38954 */ // (fsub:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SUB_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
14163 /* 38954 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F64),
14164 /* 38959 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14165 /* 38965 */ GIR_RootConstrainSelectedInstOperands,
14166 /* 38966 */ // GIR_Coverage, 127,
14167 /* 38966 */ GIR_Done,
14168 /* 38967 */ // Label 1225: @38967
14169 /* 38967 */ GIM_Reject,
14170 /* 38968 */ // Label 1220: @38968
14171 /* 38968 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1226*/ GIMT_Encode4(39006), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 350 //
14172 /* 38975 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
14173 /* 38978 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
14174 /* 38981 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14175 /* 38985 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14176 /* 38989 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14177 /* 38993 */ // (fsub:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (SUB_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
14178 /* 38993 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F16x8),
14179 /* 38998 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14180 /* 39004 */ GIR_RootConstrainSelectedInstOperands,
14181 /* 39005 */ // GIR_Coverage, 350,
14182 /* 39005 */ GIR_Done,
14183 /* 39006 */ // Label 1226: @39006
14184 /* 39006 */ GIM_Reject,
14185 /* 39007 */ // Label 1221: @39007
14186 /* 39007 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1227*/ GIMT_Encode4(39045), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 348 //
14187 /* 39014 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
14188 /* 39017 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
14189 /* 39020 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14190 /* 39024 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14191 /* 39028 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14192 /* 39032 */ // (fsub:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SUB_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
14193 /* 39032 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F32x4),
14194 /* 39037 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14195 /* 39043 */ GIR_RootConstrainSelectedInstOperands,
14196 /* 39044 */ // GIR_Coverage, 348,
14197 /* 39044 */ GIR_Done,
14198 /* 39045 */ // Label 1227: @39045
14199 /* 39045 */ GIM_Reject,
14200 /* 39046 */ // Label 1222: @39046
14201 /* 39046 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1228*/ GIMT_Encode4(39084), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 349 //
14202 /* 39053 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
14203 /* 39056 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
14204 /* 39059 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14205 /* 39063 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14206 /* 39067 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14207 /* 39071 */ // (fsub:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SUB_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
14208 /* 39071 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F64x2),
14209 /* 39076 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14210 /* 39082 */ GIR_RootConstrainSelectedInstOperands,
14211 /* 39083 */ // GIR_Coverage, 349,
14212 /* 39083 */ GIR_Done,
14213 /* 39084 */ // Label 1228: @39084
14214 /* 39084 */ GIM_Reject,
14215 /* 39085 */ // Label 1223: @39085
14216 /* 39085 */ GIM_Reject,
14217 /* 39086 */ // Label 46: @39086
14218 /* 39086 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1234*/ GIMT_Encode4(39348),
14219 /* 39097 */ /*GILLT_f32*//*Label 1229*/ GIMT_Encode4(39157),
14220 /* 39101 */ /*GILLT_f64*//*Label 1230*/ GIMT_Encode4(39194), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14221 /* 39145 */ /*GILLT_v8f16*//*Label 1231*/ GIMT_Encode4(39231),
14222 /* 39149 */ /*GILLT_v4f32*//*Label 1232*/ GIMT_Encode4(39270),
14223 /* 39153 */ /*GILLT_v2f64*//*Label 1233*/ GIMT_Encode4(39309),
14224 /* 39157 */ // Label 1229: @39157
14225 /* 39157 */ GIM_Try, /*On fail goto*//*Label 1235*/ GIMT_Encode4(39193), // Rule ID 128 //
14226 /* 39162 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
14227 /* 39165 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
14228 /* 39168 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14229 /* 39172 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14230 /* 39176 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14231 /* 39180 */ // (fmul:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (MUL_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
14232 /* 39180 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F32),
14233 /* 39185 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14234 /* 39191 */ GIR_RootConstrainSelectedInstOperands,
14235 /* 39192 */ // GIR_Coverage, 128,
14236 /* 39192 */ GIR_Done,
14237 /* 39193 */ // Label 1235: @39193
14238 /* 39193 */ GIM_Reject,
14239 /* 39194 */ // Label 1230: @39194
14240 /* 39194 */ GIM_Try, /*On fail goto*//*Label 1236*/ GIMT_Encode4(39230), // Rule ID 129 //
14241 /* 39199 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
14242 /* 39202 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
14243 /* 39205 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14244 /* 39209 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14245 /* 39213 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14246 /* 39217 */ // (fmul:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (MUL_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
14247 /* 39217 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F64),
14248 /* 39222 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14249 /* 39228 */ GIR_RootConstrainSelectedInstOperands,
14250 /* 39229 */ // GIR_Coverage, 129,
14251 /* 39229 */ GIR_Done,
14252 /* 39230 */ // Label 1236: @39230
14253 /* 39230 */ GIM_Reject,
14254 /* 39231 */ // Label 1231: @39231
14255 /* 39231 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1237*/ GIMT_Encode4(39269), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 353 //
14256 /* 39238 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
14257 /* 39241 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
14258 /* 39244 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14259 /* 39248 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14260 /* 39252 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14261 /* 39256 */ // (fmul:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (MUL_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
14262 /* 39256 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F16x8),
14263 /* 39261 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14264 /* 39267 */ GIR_RootConstrainSelectedInstOperands,
14265 /* 39268 */ // GIR_Coverage, 353,
14266 /* 39268 */ GIR_Done,
14267 /* 39269 */ // Label 1237: @39269
14268 /* 39269 */ GIM_Reject,
14269 /* 39270 */ // Label 1232: @39270
14270 /* 39270 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1238*/ GIMT_Encode4(39308), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 351 //
14271 /* 39277 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
14272 /* 39280 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
14273 /* 39283 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14274 /* 39287 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14275 /* 39291 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14276 /* 39295 */ // (fmul:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (MUL_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
14277 /* 39295 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F32x4),
14278 /* 39300 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14279 /* 39306 */ GIR_RootConstrainSelectedInstOperands,
14280 /* 39307 */ // GIR_Coverage, 351,
14281 /* 39307 */ GIR_Done,
14282 /* 39308 */ // Label 1238: @39308
14283 /* 39308 */ GIM_Reject,
14284 /* 39309 */ // Label 1233: @39309
14285 /* 39309 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1239*/ GIMT_Encode4(39347), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 352 //
14286 /* 39316 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
14287 /* 39319 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
14288 /* 39322 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14289 /* 39326 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14290 /* 39330 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14291 /* 39334 */ // (fmul:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (MUL_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
14292 /* 39334 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F64x2),
14293 /* 39339 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14294 /* 39345 */ GIR_RootConstrainSelectedInstOperands,
14295 /* 39346 */ // GIR_Coverage, 352,
14296 /* 39346 */ GIR_Done,
14297 /* 39347 */ // Label 1239: @39347
14298 /* 39347 */ GIM_Reject,
14299 /* 39348 */ // Label 1234: @39348
14300 /* 39348 */ GIM_Reject,
14301 /* 39349 */ // Label 47: @39349
14302 /* 39349 */ GIM_Try, /*On fail goto*//*Label 1240*/ GIMT_Encode4(39509),
14303 /* 39354 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
14304 /* 39357 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
14305 /* 39360 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
14306 /* 39363 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
14307 /* 39366 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14308 /* 39370 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1241*/ GIMT_Encode4(39422), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 416 //
14309 /* 39377 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14310 /* 39381 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FNEG),
14311 /* 39385 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8f16,
14312 /* 39389 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14313 /* 39394 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14314 /* 39398 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14315 /* 39402 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14316 /* 39404 */ // (fma:{ *:[v8f16] } (fneg:{ *:[v8f16] } V128:{ *:[v8f16] }:$a), V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (NMADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
14317 /* 39404 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F16x8),
14318 /* 39407 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14319 /* 39409 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // a
14320 /* 39413 */ GIR_RootToRootCopy, /*OpIdx*/2, // b
14321 /* 39415 */ GIR_RootToRootCopy, /*OpIdx*/3, // c
14322 /* 39417 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14323 /* 39420 */ GIR_RootConstrainSelectedInstOperands,
14324 /* 39421 */ // GIR_Coverage, 416,
14325 /* 39421 */ GIR_EraseRootFromParent_Done,
14326 /* 39422 */ // Label 1241: @39422
14327 /* 39422 */ GIM_Try, /*On fail goto*//*Label 1242*/ GIMT_Encode4(39508),
14328 /* 39427 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14329 /* 39431 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1243*/ GIMT_Encode4(39479), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 1328 //
14330 /* 39438 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
14331 /* 39442 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FNEG),
14332 /* 39446 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8f16,
14333 /* 39450 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14334 /* 39455 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14335 /* 39459 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14336 /* 39461 */ // (fma:{ *:[v8f16] } V128:{ *:[v8f16] }:$b, (fneg:{ *:[v8f16] } V128:{ *:[v8f16] }:$a), V128:{ *:[v8f16] }:$c) => (NMADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
14337 /* 39461 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F16x8),
14338 /* 39464 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14339 /* 39466 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // a
14340 /* 39470 */ GIR_RootToRootCopy, /*OpIdx*/1, // b
14341 /* 39472 */ GIR_RootToRootCopy, /*OpIdx*/3, // c
14342 /* 39474 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14343 /* 39477 */ GIR_RootConstrainSelectedInstOperands,
14344 /* 39478 */ // GIR_Coverage, 1328,
14345 /* 39478 */ GIR_EraseRootFromParent_Done,
14346 /* 39479 */ // Label 1243: @39479
14347 /* 39479 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1244*/ GIMT_Encode4(39507), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 415 //
14348 /* 39486 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14349 /* 39490 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14350 /* 39494 */ // (fma:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (MADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
14351 /* 39494 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F16x8),
14352 /* 39499 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14353 /* 39505 */ GIR_RootConstrainSelectedInstOperands,
14354 /* 39506 */ // GIR_Coverage, 415,
14355 /* 39506 */ GIR_Done,
14356 /* 39507 */ // Label 1244: @39507
14357 /* 39507 */ GIM_Reject,
14358 /* 39508 */ // Label 1242: @39508
14359 /* 39508 */ GIM_Reject,
14360 /* 39509 */ // Label 1240: @39509
14361 /* 39509 */ GIM_Reject,
14362 /* 39510 */ // Label 48: @39510
14363 /* 39510 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1250*/ GIMT_Encode4(39772),
14364 /* 39521 */ /*GILLT_f32*//*Label 1245*/ GIMT_Encode4(39581),
14365 /* 39525 */ /*GILLT_f64*//*Label 1246*/ GIMT_Encode4(39618), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14366 /* 39569 */ /*GILLT_v8f16*//*Label 1247*/ GIMT_Encode4(39655),
14367 /* 39573 */ /*GILLT_v4f32*//*Label 1248*/ GIMT_Encode4(39694),
14368 /* 39577 */ /*GILLT_v2f64*//*Label 1249*/ GIMT_Encode4(39733),
14369 /* 39581 */ // Label 1245: @39581
14370 /* 39581 */ GIM_Try, /*On fail goto*//*Label 1251*/ GIMT_Encode4(39617), // Rule ID 130 //
14371 /* 39586 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
14372 /* 39589 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
14373 /* 39592 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14374 /* 39596 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14375 /* 39600 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14376 /* 39604 */ // (fdiv:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (DIV_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
14377 /* 39604 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F32),
14378 /* 39609 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14379 /* 39615 */ GIR_RootConstrainSelectedInstOperands,
14380 /* 39616 */ // GIR_Coverage, 130,
14381 /* 39616 */ GIR_Done,
14382 /* 39617 */ // Label 1251: @39617
14383 /* 39617 */ GIM_Reject,
14384 /* 39618 */ // Label 1246: @39618
14385 /* 39618 */ GIM_Try, /*On fail goto*//*Label 1252*/ GIMT_Encode4(39654), // Rule ID 131 //
14386 /* 39623 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
14387 /* 39626 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
14388 /* 39629 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14389 /* 39633 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14390 /* 39637 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14391 /* 39641 */ // (fdiv:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (DIV_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
14392 /* 39641 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F64),
14393 /* 39646 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14394 /* 39652 */ GIR_RootConstrainSelectedInstOperands,
14395 /* 39653 */ // GIR_Coverage, 131,
14396 /* 39653 */ GIR_Done,
14397 /* 39654 */ // Label 1252: @39654
14398 /* 39654 */ GIM_Reject,
14399 /* 39655 */ // Label 1247: @39655
14400 /* 39655 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1253*/ GIMT_Encode4(39693), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 356 //
14401 /* 39662 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
14402 /* 39665 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
14403 /* 39668 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14404 /* 39672 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14405 /* 39676 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14406 /* 39680 */ // (fdiv:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (DIV_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
14407 /* 39680 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F16x8),
14408 /* 39685 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14409 /* 39691 */ GIR_RootConstrainSelectedInstOperands,
14410 /* 39692 */ // GIR_Coverage, 356,
14411 /* 39692 */ GIR_Done,
14412 /* 39693 */ // Label 1253: @39693
14413 /* 39693 */ GIM_Reject,
14414 /* 39694 */ // Label 1248: @39694
14415 /* 39694 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1254*/ GIMT_Encode4(39732), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 354 //
14416 /* 39701 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
14417 /* 39704 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
14418 /* 39707 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14419 /* 39711 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14420 /* 39715 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14421 /* 39719 */ // (fdiv:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (DIV_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
14422 /* 39719 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F32x4),
14423 /* 39724 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14424 /* 39730 */ GIR_RootConstrainSelectedInstOperands,
14425 /* 39731 */ // GIR_Coverage, 354,
14426 /* 39731 */ GIR_Done,
14427 /* 39732 */ // Label 1254: @39732
14428 /* 39732 */ GIM_Reject,
14429 /* 39733 */ // Label 1249: @39733
14430 /* 39733 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1255*/ GIMT_Encode4(39771), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 355 //
14431 /* 39740 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
14432 /* 39743 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
14433 /* 39746 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14434 /* 39750 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14435 /* 39754 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14436 /* 39758 */ // (fdiv:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (DIV_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
14437 /* 39758 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F64x2),
14438 /* 39763 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14439 /* 39769 */ GIR_RootConstrainSelectedInstOperands,
14440 /* 39770 */ // GIR_Coverage, 355,
14441 /* 39770 */ GIR_Done,
14442 /* 39771 */ // Label 1255: @39771
14443 /* 39771 */ GIM_Reject,
14444 /* 39772 */ // Label 1250: @39772
14445 /* 39772 */ GIM_Reject,
14446 /* 39773 */ // Label 49: @39773
14447 /* 39773 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1261*/ GIMT_Encode4(40000),
14448 /* 39784 */ /*GILLT_f32*//*Label 1256*/ GIMT_Encode4(39844),
14449 /* 39788 */ /*GILLT_f64*//*Label 1257*/ GIMT_Encode4(39874), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14450 /* 39832 */ /*GILLT_v8f16*//*Label 1258*/ GIMT_Encode4(39904),
14451 /* 39836 */ /*GILLT_v4f32*//*Label 1259*/ GIMT_Encode4(39936),
14452 /* 39840 */ /*GILLT_v2f64*//*Label 1260*/ GIMT_Encode4(39968),
14453 /* 39844 */ // Label 1256: @39844
14454 /* 39844 */ GIM_Try, /*On fail goto*//*Label 1262*/ GIMT_Encode4(39873), // Rule ID 136 //
14455 /* 39849 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
14456 /* 39852 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14457 /* 39856 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14458 /* 39860 */ // (fneg:{ *:[f32] } F32:{ *:[f32] }:$src) => (NEG_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
14459 /* 39860 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F32),
14460 /* 39865 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14461 /* 39871 */ GIR_RootConstrainSelectedInstOperands,
14462 /* 39872 */ // GIR_Coverage, 136,
14463 /* 39872 */ GIR_Done,
14464 /* 39873 */ // Label 1262: @39873
14465 /* 39873 */ GIM_Reject,
14466 /* 39874 */ // Label 1257: @39874
14467 /* 39874 */ GIM_Try, /*On fail goto*//*Label 1263*/ GIMT_Encode4(39903), // Rule ID 137 //
14468 /* 39879 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
14469 /* 39882 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14470 /* 39886 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14471 /* 39890 */ // (fneg:{ *:[f64] } F64:{ *:[f64] }:$src) => (NEG_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
14472 /* 39890 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F64),
14473 /* 39895 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14474 /* 39901 */ GIR_RootConstrainSelectedInstOperands,
14475 /* 39902 */ // GIR_Coverage, 137,
14476 /* 39902 */ GIR_Done,
14477 /* 39903 */ // Label 1263: @39903
14478 /* 39903 */ GIM_Reject,
14479 /* 39904 */ // Label 1258: @39904
14480 /* 39904 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1264*/ GIMT_Encode4(39935), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 329 //
14481 /* 39911 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
14482 /* 39914 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14483 /* 39918 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14484 /* 39922 */ // (fneg:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (NEG_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
14485 /* 39922 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F16x8),
14486 /* 39927 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14487 /* 39933 */ GIR_RootConstrainSelectedInstOperands,
14488 /* 39934 */ // GIR_Coverage, 329,
14489 /* 39934 */ GIR_Done,
14490 /* 39935 */ // Label 1264: @39935
14491 /* 39935 */ GIM_Reject,
14492 /* 39936 */ // Label 1259: @39936
14493 /* 39936 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1265*/ GIMT_Encode4(39967), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 327 //
14494 /* 39943 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
14495 /* 39946 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14496 /* 39950 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14497 /* 39954 */ // (fneg:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (NEG_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
14498 /* 39954 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F32x4),
14499 /* 39959 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14500 /* 39965 */ GIR_RootConstrainSelectedInstOperands,
14501 /* 39966 */ // GIR_Coverage, 327,
14502 /* 39966 */ GIR_Done,
14503 /* 39967 */ // Label 1265: @39967
14504 /* 39967 */ GIM_Reject,
14505 /* 39968 */ // Label 1260: @39968
14506 /* 39968 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1266*/ GIMT_Encode4(39999), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 328 //
14507 /* 39975 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
14508 /* 39978 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14509 /* 39982 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14510 /* 39986 */ // (fneg:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (NEG_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
14511 /* 39986 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F64x2),
14512 /* 39991 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14513 /* 39997 */ GIR_RootConstrainSelectedInstOperands,
14514 /* 39998 */ // GIR_Coverage, 328,
14515 /* 39998 */ GIR_Done,
14516 /* 39999 */ // Label 1266: @39999
14517 /* 39999 */ GIM_Reject,
14518 /* 40000 */ // Label 1261: @40000
14519 /* 40000 */ GIM_Reject,
14520 /* 40001 */ // Label 50: @40001
14521 /* 40001 */ GIM_Try, /*On fail goto*//*Label 1267*/ GIMT_Encode4(40033), // Rule ID 58 //
14522 /* 40006 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_f64,
14523 /* 40009 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
14524 /* 40012 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14525 /* 40016 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14526 /* 40020 */ // (fpextend:{ *:[f64] } F32:{ *:[f32] }:$src) => (F64_PROMOTE_F32:{ *:[f64] } F32:{ *:[f32] }:$src)
14527 /* 40020 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_PROMOTE_F32),
14528 /* 40025 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14529 /* 40031 */ GIR_RootConstrainSelectedInstOperands,
14530 /* 40032 */ // GIR_Coverage, 58,
14531 /* 40032 */ GIR_Done,
14532 /* 40033 */ // Label 1267: @40033
14533 /* 40033 */ GIM_Reject,
14534 /* 40034 */ // Label 51: @40034
14535 /* 40034 */ GIM_Try, /*On fail goto*//*Label 1268*/ GIMT_Encode4(40066), // Rule ID 59 //
14536 /* 40039 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_f32,
14537 /* 40042 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
14538 /* 40045 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14539 /* 40049 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14540 /* 40053 */ // (fpround:{ *:[f32] } F64:{ *:[f64] }:$src) => (F32_DEMOTE_F64:{ *:[f32] } F64:{ *:[f64] }:$src)
14541 /* 40053 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_DEMOTE_F64),
14542 /* 40058 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14543 /* 40064 */ GIR_RootConstrainSelectedInstOperands,
14544 /* 40065 */ // GIR_Coverage, 59,
14545 /* 40065 */ GIR_Done,
14546 /* 40066 */ // Label 1268: @40066
14547 /* 40066 */ GIM_Reject,
14548 /* 40067 */ // Label 52: @40067
14549 /* 40067 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(15), /*)*//*default:*//*Label 1273*/ GIMT_Encode4(40454),
14550 /* 40078 */ /*GILLT_i32*//*Label 1269*/ GIMT_Encode4(40130),
14551 /* 40082 */ /*GILLT_i64*//*Label 1270*/ GIMT_Encode4(40260), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14552 /* 40122 */ /*GILLT_v8i16*//*Label 1271*/ GIMT_Encode4(40390),
14553 /* 40126 */ /*GILLT_v4i32*//*Label 1272*/ GIMT_Encode4(40422),
14554 /* 40130 */ // Label 1269: @40130
14555 /* 40130 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1276*/ GIMT_Encode4(40259),
14556 /* 40141 */ /*GILLT_f32*//*Label 1274*/ GIMT_Encode4(40149),
14557 /* 40145 */ /*GILLT_f64*//*Label 1275*/ GIMT_Encode4(40204),
14558 /* 40149 */ // Label 1274: @40149
14559 /* 40149 */ GIM_Try, /*On fail goto*//*Label 1277*/ GIMT_Encode4(40203),
14560 /* 40154 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14561 /* 40158 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14562 /* 40162 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1278*/ GIMT_Encode4(40182), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 34 //
14563 /* 40169 */ // (fp_to_sint:{ *:[i32] } F32:{ *:[f32] }:$src) => (I32_TRUNC_S_SAT_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
14564 /* 40169 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_SAT_F32),
14565 /* 40174 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14566 /* 40180 */ GIR_RootConstrainSelectedInstOperands,
14567 /* 40181 */ // GIR_Coverage, 34,
14568 /* 40181 */ GIR_Done,
14569 /* 40182 */ // Label 1278: @40182
14570 /* 40182 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1279*/ GIMT_Encode4(40202), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 42 //
14571 /* 40189 */ // (fp_to_sint:{ *:[i32] } F32:{ *:[f32] }:$src) => (FP_TO_SINT_I32_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
14572 /* 40189 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I32_F32),
14573 /* 40194 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14574 /* 40200 */ GIR_RootConstrainSelectedInstOperands,
14575 /* 40201 */ // GIR_Coverage, 42,
14576 /* 40201 */ GIR_Done,
14577 /* 40202 */ // Label 1279: @40202
14578 /* 40202 */ GIM_Reject,
14579 /* 40203 */ // Label 1277: @40203
14580 /* 40203 */ GIM_Reject,
14581 /* 40204 */ // Label 1275: @40204
14582 /* 40204 */ GIM_Try, /*On fail goto*//*Label 1280*/ GIMT_Encode4(40258),
14583 /* 40209 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14584 /* 40213 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14585 /* 40217 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1281*/ GIMT_Encode4(40237), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 38 //
14586 /* 40224 */ // (fp_to_sint:{ *:[i32] } F64:{ *:[f64] }:$src) => (I32_TRUNC_S_SAT_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
14587 /* 40224 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_SAT_F64),
14588 /* 40229 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14589 /* 40235 */ GIR_RootConstrainSelectedInstOperands,
14590 /* 40236 */ // GIR_Coverage, 38,
14591 /* 40236 */ GIR_Done,
14592 /* 40237 */ // Label 1281: @40237
14593 /* 40237 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1282*/ GIMT_Encode4(40257), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 46 //
14594 /* 40244 */ // (fp_to_sint:{ *:[i32] } F64:{ *:[f64] }:$src) => (FP_TO_SINT_I32_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
14595 /* 40244 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I32_F64),
14596 /* 40249 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14597 /* 40255 */ GIR_RootConstrainSelectedInstOperands,
14598 /* 40256 */ // GIR_Coverage, 46,
14599 /* 40256 */ GIR_Done,
14600 /* 40257 */ // Label 1282: @40257
14601 /* 40257 */ GIM_Reject,
14602 /* 40258 */ // Label 1280: @40258
14603 /* 40258 */ GIM_Reject,
14604 /* 40259 */ // Label 1276: @40259
14605 /* 40259 */ GIM_Reject,
14606 /* 40260 */ // Label 1270: @40260
14607 /* 40260 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1285*/ GIMT_Encode4(40389),
14608 /* 40271 */ /*GILLT_f32*//*Label 1283*/ GIMT_Encode4(40279),
14609 /* 40275 */ /*GILLT_f64*//*Label 1284*/ GIMT_Encode4(40334),
14610 /* 40279 */ // Label 1283: @40279
14611 /* 40279 */ GIM_Try, /*On fail goto*//*Label 1286*/ GIMT_Encode4(40333),
14612 /* 40284 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14613 /* 40288 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14614 /* 40292 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1287*/ GIMT_Encode4(40312), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 36 //
14615 /* 40299 */ // (fp_to_sint:{ *:[i64] } F32:{ *:[f32] }:$src) => (I64_TRUNC_S_SAT_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
14616 /* 40299 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_SAT_F32),
14617 /* 40304 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14618 /* 40310 */ GIR_RootConstrainSelectedInstOperands,
14619 /* 40311 */ // GIR_Coverage, 36,
14620 /* 40311 */ GIR_Done,
14621 /* 40312 */ // Label 1287: @40312
14622 /* 40312 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1288*/ GIMT_Encode4(40332), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 44 //
14623 /* 40319 */ // (fp_to_sint:{ *:[i64] } F32:{ *:[f32] }:$src) => (FP_TO_SINT_I64_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
14624 /* 40319 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I64_F32),
14625 /* 40324 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14626 /* 40330 */ GIR_RootConstrainSelectedInstOperands,
14627 /* 40331 */ // GIR_Coverage, 44,
14628 /* 40331 */ GIR_Done,
14629 /* 40332 */ // Label 1288: @40332
14630 /* 40332 */ GIM_Reject,
14631 /* 40333 */ // Label 1286: @40333
14632 /* 40333 */ GIM_Reject,
14633 /* 40334 */ // Label 1284: @40334
14634 /* 40334 */ GIM_Try, /*On fail goto*//*Label 1289*/ GIMT_Encode4(40388),
14635 /* 40339 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14636 /* 40343 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14637 /* 40347 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1290*/ GIMT_Encode4(40367), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 40 //
14638 /* 40354 */ // (fp_to_sint:{ *:[i64] } F64:{ *:[f64] }:$src) => (I64_TRUNC_S_SAT_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
14639 /* 40354 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_SAT_F64),
14640 /* 40359 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14641 /* 40365 */ GIR_RootConstrainSelectedInstOperands,
14642 /* 40366 */ // GIR_Coverage, 40,
14643 /* 40366 */ GIR_Done,
14644 /* 40367 */ // Label 1290: @40367
14645 /* 40367 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1291*/ GIMT_Encode4(40387), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 48 //
14646 /* 40374 */ // (fp_to_sint:{ *:[i64] } F64:{ *:[f64] }:$src) => (FP_TO_SINT_I64_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
14647 /* 40374 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I64_F64),
14648 /* 40379 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14649 /* 40385 */ GIR_RootConstrainSelectedInstOperands,
14650 /* 40386 */ // GIR_Coverage, 48,
14651 /* 40386 */ GIR_Done,
14652 /* 40387 */ // Label 1291: @40387
14653 /* 40387 */ GIM_Reject,
14654 /* 40388 */ // Label 1289: @40388
14655 /* 40388 */ GIM_Reject,
14656 /* 40389 */ // Label 1285: @40389
14657 /* 40389 */ GIM_Reject,
14658 /* 40390 */ // Label 1271: @40390
14659 /* 40390 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1292*/ GIMT_Encode4(40421), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 371 //
14660 /* 40397 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
14661 /* 40400 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14662 /* 40404 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14663 /* 40408 */ // (fp_to_sint:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec) => (fp_to_sint_I16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec)
14664 /* 40408 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_sint_I16x8),
14665 /* 40413 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14666 /* 40419 */ GIR_RootConstrainSelectedInstOperands,
14667 /* 40420 */ // GIR_Coverage, 371,
14668 /* 40420 */ GIR_Done,
14669 /* 40421 */ // Label 1292: @40421
14670 /* 40421 */ GIM_Reject,
14671 /* 40422 */ // Label 1272: @40422
14672 /* 40422 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1293*/ GIMT_Encode4(40453), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 369 //
14673 /* 40429 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
14674 /* 40432 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14675 /* 40436 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14676 /* 40440 */ // (fp_to_sint:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec) => (fp_to_sint_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
14677 /* 40440 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_sint_I32x4),
14678 /* 40445 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14679 /* 40451 */ GIR_RootConstrainSelectedInstOperands,
14680 /* 40452 */ // GIR_Coverage, 369,
14681 /* 40452 */ GIR_Done,
14682 /* 40453 */ // Label 1293: @40453
14683 /* 40453 */ GIM_Reject,
14684 /* 40454 */ // Label 1273: @40454
14685 /* 40454 */ GIM_Reject,
14686 /* 40455 */ // Label 53: @40455
14687 /* 40455 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(15), /*)*//*default:*//*Label 1298*/ GIMT_Encode4(40842),
14688 /* 40466 */ /*GILLT_i32*//*Label 1294*/ GIMT_Encode4(40518),
14689 /* 40470 */ /*GILLT_i64*//*Label 1295*/ GIMT_Encode4(40648), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14690 /* 40510 */ /*GILLT_v8i16*//*Label 1296*/ GIMT_Encode4(40778),
14691 /* 40514 */ /*GILLT_v4i32*//*Label 1297*/ GIMT_Encode4(40810),
14692 /* 40518 */ // Label 1294: @40518
14693 /* 40518 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1301*/ GIMT_Encode4(40647),
14694 /* 40529 */ /*GILLT_f32*//*Label 1299*/ GIMT_Encode4(40537),
14695 /* 40533 */ /*GILLT_f64*//*Label 1300*/ GIMT_Encode4(40592),
14696 /* 40537 */ // Label 1299: @40537
14697 /* 40537 */ GIM_Try, /*On fail goto*//*Label 1302*/ GIMT_Encode4(40591),
14698 /* 40542 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14699 /* 40546 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14700 /* 40550 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1303*/ GIMT_Encode4(40570), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 35 //
14701 /* 40557 */ // (fp_to_uint:{ *:[i32] } F32:{ *:[f32] }:$src) => (I32_TRUNC_U_SAT_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
14702 /* 40557 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_SAT_F32),
14703 /* 40562 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14704 /* 40568 */ GIR_RootConstrainSelectedInstOperands,
14705 /* 40569 */ // GIR_Coverage, 35,
14706 /* 40569 */ GIR_Done,
14707 /* 40570 */ // Label 1303: @40570
14708 /* 40570 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1304*/ GIMT_Encode4(40590), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 43 //
14709 /* 40577 */ // (fp_to_uint:{ *:[i32] } F32:{ *:[f32] }:$src) => (FP_TO_UINT_I32_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
14710 /* 40577 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I32_F32),
14711 /* 40582 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14712 /* 40588 */ GIR_RootConstrainSelectedInstOperands,
14713 /* 40589 */ // GIR_Coverage, 43,
14714 /* 40589 */ GIR_Done,
14715 /* 40590 */ // Label 1304: @40590
14716 /* 40590 */ GIM_Reject,
14717 /* 40591 */ // Label 1302: @40591
14718 /* 40591 */ GIM_Reject,
14719 /* 40592 */ // Label 1300: @40592
14720 /* 40592 */ GIM_Try, /*On fail goto*//*Label 1305*/ GIMT_Encode4(40646),
14721 /* 40597 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14722 /* 40601 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14723 /* 40605 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1306*/ GIMT_Encode4(40625), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 39 //
14724 /* 40612 */ // (fp_to_uint:{ *:[i32] } F64:{ *:[f64] }:$src) => (I32_TRUNC_U_SAT_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
14725 /* 40612 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_SAT_F64),
14726 /* 40617 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14727 /* 40623 */ GIR_RootConstrainSelectedInstOperands,
14728 /* 40624 */ // GIR_Coverage, 39,
14729 /* 40624 */ GIR_Done,
14730 /* 40625 */ // Label 1306: @40625
14731 /* 40625 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1307*/ GIMT_Encode4(40645), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 47 //
14732 /* 40632 */ // (fp_to_uint:{ *:[i32] } F64:{ *:[f64] }:$src) => (FP_TO_UINT_I32_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
14733 /* 40632 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I32_F64),
14734 /* 40637 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14735 /* 40643 */ GIR_RootConstrainSelectedInstOperands,
14736 /* 40644 */ // GIR_Coverage, 47,
14737 /* 40644 */ GIR_Done,
14738 /* 40645 */ // Label 1307: @40645
14739 /* 40645 */ GIM_Reject,
14740 /* 40646 */ // Label 1305: @40646
14741 /* 40646 */ GIM_Reject,
14742 /* 40647 */ // Label 1301: @40647
14743 /* 40647 */ GIM_Reject,
14744 /* 40648 */ // Label 1295: @40648
14745 /* 40648 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1310*/ GIMT_Encode4(40777),
14746 /* 40659 */ /*GILLT_f32*//*Label 1308*/ GIMT_Encode4(40667),
14747 /* 40663 */ /*GILLT_f64*//*Label 1309*/ GIMT_Encode4(40722),
14748 /* 40667 */ // Label 1308: @40667
14749 /* 40667 */ GIM_Try, /*On fail goto*//*Label 1311*/ GIMT_Encode4(40721),
14750 /* 40672 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14751 /* 40676 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14752 /* 40680 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1312*/ GIMT_Encode4(40700), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 37 //
14753 /* 40687 */ // (fp_to_uint:{ *:[i64] } F32:{ *:[f32] }:$src) => (I64_TRUNC_U_SAT_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
14754 /* 40687 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_SAT_F32),
14755 /* 40692 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14756 /* 40698 */ GIR_RootConstrainSelectedInstOperands,
14757 /* 40699 */ // GIR_Coverage, 37,
14758 /* 40699 */ GIR_Done,
14759 /* 40700 */ // Label 1312: @40700
14760 /* 40700 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1313*/ GIMT_Encode4(40720), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 45 //
14761 /* 40707 */ // (fp_to_uint:{ *:[i64] } F32:{ *:[f32] }:$src) => (FP_TO_UINT_I64_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
14762 /* 40707 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I64_F32),
14763 /* 40712 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14764 /* 40718 */ GIR_RootConstrainSelectedInstOperands,
14765 /* 40719 */ // GIR_Coverage, 45,
14766 /* 40719 */ GIR_Done,
14767 /* 40720 */ // Label 1313: @40720
14768 /* 40720 */ GIM_Reject,
14769 /* 40721 */ // Label 1311: @40721
14770 /* 40721 */ GIM_Reject,
14771 /* 40722 */ // Label 1309: @40722
14772 /* 40722 */ GIM_Try, /*On fail goto*//*Label 1314*/ GIMT_Encode4(40776),
14773 /* 40727 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14774 /* 40731 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14775 /* 40735 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1315*/ GIMT_Encode4(40755), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 41 //
14776 /* 40742 */ // (fp_to_uint:{ *:[i64] } F64:{ *:[f64] }:$src) => (I64_TRUNC_U_SAT_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
14777 /* 40742 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_SAT_F64),
14778 /* 40747 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14779 /* 40753 */ GIR_RootConstrainSelectedInstOperands,
14780 /* 40754 */ // GIR_Coverage, 41,
14781 /* 40754 */ GIR_Done,
14782 /* 40755 */ // Label 1315: @40755
14783 /* 40755 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1316*/ GIMT_Encode4(40775), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 49 //
14784 /* 40762 */ // (fp_to_uint:{ *:[i64] } F64:{ *:[f64] }:$src) => (FP_TO_UINT_I64_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
14785 /* 40762 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I64_F64),
14786 /* 40767 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14787 /* 40773 */ GIR_RootConstrainSelectedInstOperands,
14788 /* 40774 */ // GIR_Coverage, 49,
14789 /* 40774 */ GIR_Done,
14790 /* 40775 */ // Label 1316: @40775
14791 /* 40775 */ GIM_Reject,
14792 /* 40776 */ // Label 1314: @40776
14793 /* 40776 */ GIM_Reject,
14794 /* 40777 */ // Label 1310: @40777
14795 /* 40777 */ GIM_Reject,
14796 /* 40778 */ // Label 1296: @40778
14797 /* 40778 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1317*/ GIMT_Encode4(40809), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 372 //
14798 /* 40785 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
14799 /* 40788 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14800 /* 40792 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14801 /* 40796 */ // (fp_to_uint:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec) => (fp_to_uint_I16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec)
14802 /* 40796 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_uint_I16x8),
14803 /* 40801 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14804 /* 40807 */ GIR_RootConstrainSelectedInstOperands,
14805 /* 40808 */ // GIR_Coverage, 372,
14806 /* 40808 */ GIR_Done,
14807 /* 40809 */ // Label 1317: @40809
14808 /* 40809 */ GIM_Reject,
14809 /* 40810 */ // Label 1297: @40810
14810 /* 40810 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1318*/ GIMT_Encode4(40841), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 370 //
14811 /* 40817 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
14812 /* 40820 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14813 /* 40824 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14814 /* 40828 */ // (fp_to_uint:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec) => (fp_to_uint_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
14815 /* 40828 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_uint_I32x4),
14816 /* 40833 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14817 /* 40839 */ GIR_RootConstrainSelectedInstOperands,
14818 /* 40840 */ // GIR_Coverage, 370,
14819 /* 40840 */ GIR_Done,
14820 /* 40841 */ // Label 1318: @40841
14821 /* 40841 */ GIM_Reject,
14822 /* 40842 */ // Label 1298: @40842
14823 /* 40842 */ GIM_Reject,
14824 /* 40843 */ // Label 54: @40843
14825 /* 40843 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(18), /*)*//*default:*//*Label 1323*/ GIMT_Encode4(41122),
14826 /* 40854 */ /*GILLT_f32*//*Label 1319*/ GIMT_Encode4(40910),
14827 /* 40858 */ /*GILLT_f64*//*Label 1320*/ GIMT_Encode4(40984), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14828 /* 40902 */ /*GILLT_v8f16*//*Label 1321*/ GIMT_Encode4(41058),
14829 /* 40906 */ /*GILLT_v4f32*//*Label 1322*/ GIMT_Encode4(41090),
14830 /* 40910 */ // Label 1319: @40910
14831 /* 40910 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1326*/ GIMT_Encode4(40983),
14832 /* 40921 */ /*GILLT_i32*//*Label 1324*/ GIMT_Encode4(40929),
14833 /* 40925 */ /*GILLT_i64*//*Label 1325*/ GIMT_Encode4(40956),
14834 /* 40929 */ // Label 1324: @40929
14835 /* 40929 */ GIM_Try, /*On fail goto*//*Label 1327*/ GIMT_Encode4(40955), // Rule ID 50 //
14836 /* 40934 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14837 /* 40938 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14838 /* 40942 */ // (sint_to_fp:{ *:[f32] } I32:{ *:[i32] }:$src) => (F32_CONVERT_S_I32:{ *:[f32] } I32:{ *:[i32] }:$src)
14839 /* 40942 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_S_I32),
14840 /* 40947 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14841 /* 40953 */ GIR_RootConstrainSelectedInstOperands,
14842 /* 40954 */ // GIR_Coverage, 50,
14843 /* 40954 */ GIR_Done,
14844 /* 40955 */ // Label 1327: @40955
14845 /* 40955 */ GIM_Reject,
14846 /* 40956 */ // Label 1325: @40956
14847 /* 40956 */ GIM_Try, /*On fail goto*//*Label 1328*/ GIMT_Encode4(40982), // Rule ID 54 //
14848 /* 40961 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14849 /* 40965 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14850 /* 40969 */ // (sint_to_fp:{ *:[f32] } I64:{ *:[i64] }:$src) => (F32_CONVERT_S_I64:{ *:[f32] } I64:{ *:[i64] }:$src)
14851 /* 40969 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_S_I64),
14852 /* 40974 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14853 /* 40980 */ GIR_RootConstrainSelectedInstOperands,
14854 /* 40981 */ // GIR_Coverage, 54,
14855 /* 40981 */ GIR_Done,
14856 /* 40982 */ // Label 1328: @40982
14857 /* 40982 */ GIM_Reject,
14858 /* 40983 */ // Label 1326: @40983
14859 /* 40983 */ GIM_Reject,
14860 /* 40984 */ // Label 1320: @40984
14861 /* 40984 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1331*/ GIMT_Encode4(41057),
14862 /* 40995 */ /*GILLT_i32*//*Label 1329*/ GIMT_Encode4(41003),
14863 /* 40999 */ /*GILLT_i64*//*Label 1330*/ GIMT_Encode4(41030),
14864 /* 41003 */ // Label 1329: @41003
14865 /* 41003 */ GIM_Try, /*On fail goto*//*Label 1332*/ GIMT_Encode4(41029), // Rule ID 52 //
14866 /* 41008 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14867 /* 41012 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14868 /* 41016 */ // (sint_to_fp:{ *:[f64] } I32:{ *:[i32] }:$src) => (F64_CONVERT_S_I32:{ *:[f64] } I32:{ *:[i32] }:$src)
14869 /* 41016 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_S_I32),
14870 /* 41021 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14871 /* 41027 */ GIR_RootConstrainSelectedInstOperands,
14872 /* 41028 */ // GIR_Coverage, 52,
14873 /* 41028 */ GIR_Done,
14874 /* 41029 */ // Label 1332: @41029
14875 /* 41029 */ GIM_Reject,
14876 /* 41030 */ // Label 1330: @41030
14877 /* 41030 */ GIM_Try, /*On fail goto*//*Label 1333*/ GIMT_Encode4(41056), // Rule ID 56 //
14878 /* 41035 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14879 /* 41039 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14880 /* 41043 */ // (sint_to_fp:{ *:[f64] } I64:{ *:[i64] }:$src) => (F64_CONVERT_S_I64:{ *:[f64] } I64:{ *:[i64] }:$src)
14881 /* 41043 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_S_I64),
14882 /* 41048 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14883 /* 41054 */ GIR_RootConstrainSelectedInstOperands,
14884 /* 41055 */ // GIR_Coverage, 56,
14885 /* 41055 */ GIR_Done,
14886 /* 41056 */ // Label 1333: @41056
14887 /* 41056 */ GIM_Reject,
14888 /* 41057 */ // Label 1331: @41057
14889 /* 41057 */ GIM_Reject,
14890 /* 41058 */ // Label 1321: @41058
14891 /* 41058 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1334*/ GIMT_Encode4(41089), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 379 //
14892 /* 41065 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
14893 /* 41068 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14894 /* 41072 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14895 /* 41076 */ // (sint_to_fp:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec) => (sint_to_fp_F16x8:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec)
14896 /* 41076 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::sint_to_fp_F16x8),
14897 /* 41081 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14898 /* 41087 */ GIR_RootConstrainSelectedInstOperands,
14899 /* 41088 */ // GIR_Coverage, 379,
14900 /* 41088 */ GIR_Done,
14901 /* 41089 */ // Label 1334: @41089
14902 /* 41089 */ GIM_Reject,
14903 /* 41090 */ // Label 1322: @41090
14904 /* 41090 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1335*/ GIMT_Encode4(41121), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 375 //
14905 /* 41097 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
14906 /* 41100 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14907 /* 41104 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14908 /* 41108 */ // (sint_to_fp:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec) => (sint_to_fp_F32x4:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec)
14909 /* 41108 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::sint_to_fp_F32x4),
14910 /* 41113 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14911 /* 41119 */ GIR_RootConstrainSelectedInstOperands,
14912 /* 41120 */ // GIR_Coverage, 375,
14913 /* 41120 */ GIR_Done,
14914 /* 41121 */ // Label 1335: @41121
14915 /* 41121 */ GIM_Reject,
14916 /* 41122 */ // Label 1323: @41122
14917 /* 41122 */ GIM_Reject,
14918 /* 41123 */ // Label 55: @41123
14919 /* 41123 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(18), /*)*//*default:*//*Label 1340*/ GIMT_Encode4(41402),
14920 /* 41134 */ /*GILLT_f32*//*Label 1336*/ GIMT_Encode4(41190),
14921 /* 41138 */ /*GILLT_f64*//*Label 1337*/ GIMT_Encode4(41264), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14922 /* 41182 */ /*GILLT_v8f16*//*Label 1338*/ GIMT_Encode4(41338),
14923 /* 41186 */ /*GILLT_v4f32*//*Label 1339*/ GIMT_Encode4(41370),
14924 /* 41190 */ // Label 1336: @41190
14925 /* 41190 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1343*/ GIMT_Encode4(41263),
14926 /* 41201 */ /*GILLT_i32*//*Label 1341*/ GIMT_Encode4(41209),
14927 /* 41205 */ /*GILLT_i64*//*Label 1342*/ GIMT_Encode4(41236),
14928 /* 41209 */ // Label 1341: @41209
14929 /* 41209 */ GIM_Try, /*On fail goto*//*Label 1344*/ GIMT_Encode4(41235), // Rule ID 51 //
14930 /* 41214 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14931 /* 41218 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14932 /* 41222 */ // (uint_to_fp:{ *:[f32] } I32:{ *:[i32] }:$src) => (F32_CONVERT_U_I32:{ *:[f32] } I32:{ *:[i32] }:$src)
14933 /* 41222 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_U_I32),
14934 /* 41227 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14935 /* 41233 */ GIR_RootConstrainSelectedInstOperands,
14936 /* 41234 */ // GIR_Coverage, 51,
14937 /* 41234 */ GIR_Done,
14938 /* 41235 */ // Label 1344: @41235
14939 /* 41235 */ GIM_Reject,
14940 /* 41236 */ // Label 1342: @41236
14941 /* 41236 */ GIM_Try, /*On fail goto*//*Label 1345*/ GIMT_Encode4(41262), // Rule ID 55 //
14942 /* 41241 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14943 /* 41245 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14944 /* 41249 */ // (uint_to_fp:{ *:[f32] } I64:{ *:[i64] }:$src) => (F32_CONVERT_U_I64:{ *:[f32] } I64:{ *:[i64] }:$src)
14945 /* 41249 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_U_I64),
14946 /* 41254 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14947 /* 41260 */ GIR_RootConstrainSelectedInstOperands,
14948 /* 41261 */ // GIR_Coverage, 55,
14949 /* 41261 */ GIR_Done,
14950 /* 41262 */ // Label 1345: @41262
14951 /* 41262 */ GIM_Reject,
14952 /* 41263 */ // Label 1343: @41263
14953 /* 41263 */ GIM_Reject,
14954 /* 41264 */ // Label 1337: @41264
14955 /* 41264 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1348*/ GIMT_Encode4(41337),
14956 /* 41275 */ /*GILLT_i32*//*Label 1346*/ GIMT_Encode4(41283),
14957 /* 41279 */ /*GILLT_i64*//*Label 1347*/ GIMT_Encode4(41310),
14958 /* 41283 */ // Label 1346: @41283
14959 /* 41283 */ GIM_Try, /*On fail goto*//*Label 1349*/ GIMT_Encode4(41309), // Rule ID 53 //
14960 /* 41288 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14961 /* 41292 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14962 /* 41296 */ // (uint_to_fp:{ *:[f64] } I32:{ *:[i32] }:$src) => (F64_CONVERT_U_I32:{ *:[f64] } I32:{ *:[i32] }:$src)
14963 /* 41296 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_U_I32),
14964 /* 41301 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14965 /* 41307 */ GIR_RootConstrainSelectedInstOperands,
14966 /* 41308 */ // GIR_Coverage, 53,
14967 /* 41308 */ GIR_Done,
14968 /* 41309 */ // Label 1349: @41309
14969 /* 41309 */ GIM_Reject,
14970 /* 41310 */ // Label 1347: @41310
14971 /* 41310 */ GIM_Try, /*On fail goto*//*Label 1350*/ GIMT_Encode4(41336), // Rule ID 57 //
14972 /* 41315 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14973 /* 41319 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
14974 /* 41323 */ // (uint_to_fp:{ *:[f64] } I64:{ *:[i64] }:$src) => (F64_CONVERT_U_I64:{ *:[f64] } I64:{ *:[i64] }:$src)
14975 /* 41323 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_U_I64),
14976 /* 41328 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14977 /* 41334 */ GIR_RootConstrainSelectedInstOperands,
14978 /* 41335 */ // GIR_Coverage, 57,
14979 /* 41335 */ GIR_Done,
14980 /* 41336 */ // Label 1350: @41336
14981 /* 41336 */ GIM_Reject,
14982 /* 41337 */ // Label 1348: @41337
14983 /* 41337 */ GIM_Reject,
14984 /* 41338 */ // Label 1338: @41338
14985 /* 41338 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1351*/ GIMT_Encode4(41369), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 380 //
14986 /* 41345 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
14987 /* 41348 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14988 /* 41352 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14989 /* 41356 */ // (uint_to_fp:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec) => (uint_to_fp_F16x8:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec)
14990 /* 41356 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::uint_to_fp_F16x8),
14991 /* 41361 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14992 /* 41367 */ GIR_RootConstrainSelectedInstOperands,
14993 /* 41368 */ // GIR_Coverage, 380,
14994 /* 41368 */ GIR_Done,
14995 /* 41369 */ // Label 1351: @41369
14996 /* 41369 */ GIM_Reject,
14997 /* 41370 */ // Label 1339: @41370
14998 /* 41370 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1352*/ GIMT_Encode4(41401), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 376 //
14999 /* 41377 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
15000 /* 41380 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15001 /* 41384 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15002 /* 41388 */ // (uint_to_fp:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec) => (uint_to_fp_F32x4:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec)
15003 /* 41388 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::uint_to_fp_F32x4),
15004 /* 41393 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15005 /* 41399 */ GIR_RootConstrainSelectedInstOperands,
15006 /* 41400 */ // GIR_Coverage, 376,
15007 /* 41400 */ GIR_Done,
15008 /* 41401 */ // Label 1352: @41401
15009 /* 41401 */ GIM_Reject,
15010 /* 41402 */ // Label 1340: @41402
15011 /* 41402 */ GIM_Reject,
15012 /* 41403 */ // Label 56: @41403
15013 /* 41403 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(15), /*)*//*default:*//*Label 1357*/ GIMT_Encode4(41674),
15014 /* 41414 */ /*GILLT_i32*//*Label 1353*/ GIMT_Encode4(41466),
15015 /* 41418 */ /*GILLT_i64*//*Label 1354*/ GIMT_Encode4(41540), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
15016 /* 41458 */ /*GILLT_v8i16*//*Label 1355*/ GIMT_Encode4(41614),
15017 /* 41462 */ /*GILLT_v4i32*//*Label 1356*/ GIMT_Encode4(41644),
15018 /* 41466 */ // Label 1353: @41466
15019 /* 41466 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1360*/ GIMT_Encode4(41539),
15020 /* 41477 */ /*GILLT_f32*//*Label 1358*/ GIMT_Encode4(41485),
15021 /* 41481 */ /*GILLT_f64*//*Label 1359*/ GIMT_Encode4(41512),
15022 /* 41485 */ // Label 1358: @41485
15023 /* 41485 */ GIM_Try, /*On fail goto*//*Label 1361*/ GIMT_Encode4(41511), // Rule ID 598 //
15024 /* 41490 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15025 /* 41494 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15026 /* 41498 */ // (fp_to_sint_sat:{ *:[i32] } F32:{ *:[f32] }:$src, i32:{ *:[Other] }) => (I32_TRUNC_S_SAT_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
15027 /* 41498 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_SAT_F32),
15028 /* 41503 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15029 /* 41509 */ GIR_RootConstrainSelectedInstOperands,
15030 /* 41510 */ // GIR_Coverage, 598,
15031 /* 41510 */ GIR_Done,
15032 /* 41511 */ // Label 1361: @41511
15033 /* 41511 */ GIM_Reject,
15034 /* 41512 */ // Label 1359: @41512
15035 /* 41512 */ GIM_Try, /*On fail goto*//*Label 1362*/ GIMT_Encode4(41538), // Rule ID 600 //
15036 /* 41517 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15037 /* 41521 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15038 /* 41525 */ // (fp_to_sint_sat:{ *:[i32] } F64:{ *:[f64] }:$src, i32:{ *:[Other] }) => (I32_TRUNC_S_SAT_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
15039 /* 41525 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_SAT_F64),
15040 /* 41530 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15041 /* 41536 */ GIR_RootConstrainSelectedInstOperands,
15042 /* 41537 */ // GIR_Coverage, 600,
15043 /* 41537 */ GIR_Done,
15044 /* 41538 */ // Label 1362: @41538
15045 /* 41538 */ GIM_Reject,
15046 /* 41539 */ // Label 1360: @41539
15047 /* 41539 */ GIM_Reject,
15048 /* 41540 */ // Label 1354: @41540
15049 /* 41540 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1365*/ GIMT_Encode4(41613),
15050 /* 41551 */ /*GILLT_f32*//*Label 1363*/ GIMT_Encode4(41559),
15051 /* 41555 */ /*GILLT_f64*//*Label 1364*/ GIMT_Encode4(41586),
15052 /* 41559 */ // Label 1363: @41559
15053 /* 41559 */ GIM_Try, /*On fail goto*//*Label 1366*/ GIMT_Encode4(41585), // Rule ID 602 //
15054 /* 41564 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
15055 /* 41568 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15056 /* 41572 */ // (fp_to_sint_sat:{ *:[i64] } F32:{ *:[f32] }:$src, i64:{ *:[Other] }) => (I64_TRUNC_S_SAT_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
15057 /* 41572 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_SAT_F32),
15058 /* 41577 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15059 /* 41583 */ GIR_RootConstrainSelectedInstOperands,
15060 /* 41584 */ // GIR_Coverage, 602,
15061 /* 41584 */ GIR_Done,
15062 /* 41585 */ // Label 1366: @41585
15063 /* 41585 */ GIM_Reject,
15064 /* 41586 */ // Label 1364: @41586
15065 /* 41586 */ GIM_Try, /*On fail goto*//*Label 1367*/ GIMT_Encode4(41612), // Rule ID 604 //
15066 /* 41591 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
15067 /* 41595 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15068 /* 41599 */ // (fp_to_sint_sat:{ *:[i64] } F64:{ *:[f64] }:$src, i64:{ *:[Other] }) => (I64_TRUNC_S_SAT_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
15069 /* 41599 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_SAT_F64),
15070 /* 41604 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15071 /* 41610 */ GIR_RootConstrainSelectedInstOperands,
15072 /* 41611 */ // GIR_Coverage, 604,
15073 /* 41611 */ GIR_Done,
15074 /* 41612 */ // Label 1367: @41612
15075 /* 41612 */ GIM_Reject,
15076 /* 41613 */ // Label 1365: @41613
15077 /* 41613 */ GIM_Reject,
15078 /* 41614 */ // Label 1355: @41614
15079 /* 41614 */ GIM_Try, /*On fail goto*//*Label 1368*/ GIMT_Encode4(41643), // Rule ID 1184 //
15080 /* 41619 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
15081 /* 41622 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15082 /* 41626 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15083 /* 41630 */ // (fp_to_sint_sat:{ *:[v8i16] } V128:{ *:[v8f16] }:$src, i16:{ *:[Other] }) => (fp_to_sint_I16x8:{ *:[v8i16] } ?:{ *:[v8f16] }:$src)
15084 /* 41630 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_sint_I16x8),
15085 /* 41635 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15086 /* 41641 */ GIR_RootConstrainSelectedInstOperands,
15087 /* 41642 */ // GIR_Coverage, 1184,
15088 /* 41642 */ GIR_Done,
15089 /* 41643 */ // Label 1368: @41643
15090 /* 41643 */ GIM_Reject,
15091 /* 41644 */ // Label 1356: @41644
15092 /* 41644 */ GIM_Try, /*On fail goto*//*Label 1369*/ GIMT_Encode4(41673), // Rule ID 1182 //
15093 /* 41649 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
15094 /* 41652 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15095 /* 41656 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15096 /* 41660 */ // (fp_to_sint_sat:{ *:[v4i32] } V128:{ *:[v4f32] }:$src, i32:{ *:[Other] }) => (fp_to_sint_I32x4:{ *:[v4i32] } ?:{ *:[v4f32] }:$src)
15097 /* 41660 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_sint_I32x4),
15098 /* 41665 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15099 /* 41671 */ GIR_RootConstrainSelectedInstOperands,
15100 /* 41672 */ // GIR_Coverage, 1182,
15101 /* 41672 */ GIR_Done,
15102 /* 41673 */ // Label 1369: @41673
15103 /* 41673 */ GIM_Reject,
15104 /* 41674 */ // Label 1357: @41674
15105 /* 41674 */ GIM_Reject,
15106 /* 41675 */ // Label 57: @41675
15107 /* 41675 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(15), /*)*//*default:*//*Label 1374*/ GIMT_Encode4(41946),
15108 /* 41686 */ /*GILLT_i32*//*Label 1370*/ GIMT_Encode4(41738),
15109 /* 41690 */ /*GILLT_i64*//*Label 1371*/ GIMT_Encode4(41812), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
15110 /* 41730 */ /*GILLT_v8i16*//*Label 1372*/ GIMT_Encode4(41886),
15111 /* 41734 */ /*GILLT_v4i32*//*Label 1373*/ GIMT_Encode4(41916),
15112 /* 41738 */ // Label 1370: @41738
15113 /* 41738 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1377*/ GIMT_Encode4(41811),
15114 /* 41749 */ /*GILLT_f32*//*Label 1375*/ GIMT_Encode4(41757),
15115 /* 41753 */ /*GILLT_f64*//*Label 1376*/ GIMT_Encode4(41784),
15116 /* 41757 */ // Label 1375: @41757
15117 /* 41757 */ GIM_Try, /*On fail goto*//*Label 1378*/ GIMT_Encode4(41783), // Rule ID 599 //
15118 /* 41762 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15119 /* 41766 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15120 /* 41770 */ // (fp_to_uint_sat:{ *:[i32] } F32:{ *:[f32] }:$src, i32:{ *:[Other] }) => (I32_TRUNC_U_SAT_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
15121 /* 41770 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_SAT_F32),
15122 /* 41775 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15123 /* 41781 */ GIR_RootConstrainSelectedInstOperands,
15124 /* 41782 */ // GIR_Coverage, 599,
15125 /* 41782 */ GIR_Done,
15126 /* 41783 */ // Label 1378: @41783
15127 /* 41783 */ GIM_Reject,
15128 /* 41784 */ // Label 1376: @41784
15129 /* 41784 */ GIM_Try, /*On fail goto*//*Label 1379*/ GIMT_Encode4(41810), // Rule ID 601 //
15130 /* 41789 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15131 /* 41793 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15132 /* 41797 */ // (fp_to_uint_sat:{ *:[i32] } F64:{ *:[f64] }:$src, i32:{ *:[Other] }) => (I32_TRUNC_U_SAT_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
15133 /* 41797 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_SAT_F64),
15134 /* 41802 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15135 /* 41808 */ GIR_RootConstrainSelectedInstOperands,
15136 /* 41809 */ // GIR_Coverage, 601,
15137 /* 41809 */ GIR_Done,
15138 /* 41810 */ // Label 1379: @41810
15139 /* 41810 */ GIM_Reject,
15140 /* 41811 */ // Label 1377: @41811
15141 /* 41811 */ GIM_Reject,
15142 /* 41812 */ // Label 1371: @41812
15143 /* 41812 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1382*/ GIMT_Encode4(41885),
15144 /* 41823 */ /*GILLT_f32*//*Label 1380*/ GIMT_Encode4(41831),
15145 /* 41827 */ /*GILLT_f64*//*Label 1381*/ GIMT_Encode4(41858),
15146 /* 41831 */ // Label 1380: @41831
15147 /* 41831 */ GIM_Try, /*On fail goto*//*Label 1383*/ GIMT_Encode4(41857), // Rule ID 603 //
15148 /* 41836 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
15149 /* 41840 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15150 /* 41844 */ // (fp_to_uint_sat:{ *:[i64] } F32:{ *:[f32] }:$src, i64:{ *:[Other] }) => (I64_TRUNC_U_SAT_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
15151 /* 41844 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_SAT_F32),
15152 /* 41849 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15153 /* 41855 */ GIR_RootConstrainSelectedInstOperands,
15154 /* 41856 */ // GIR_Coverage, 603,
15155 /* 41856 */ GIR_Done,
15156 /* 41857 */ // Label 1383: @41857
15157 /* 41857 */ GIM_Reject,
15158 /* 41858 */ // Label 1381: @41858
15159 /* 41858 */ GIM_Try, /*On fail goto*//*Label 1384*/ GIMT_Encode4(41884), // Rule ID 605 //
15160 /* 41863 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
15161 /* 41867 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15162 /* 41871 */ // (fp_to_uint_sat:{ *:[i64] } F64:{ *:[f64] }:$src, i64:{ *:[Other] }) => (I64_TRUNC_U_SAT_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
15163 /* 41871 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_SAT_F64),
15164 /* 41876 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15165 /* 41882 */ GIR_RootConstrainSelectedInstOperands,
15166 /* 41883 */ // GIR_Coverage, 605,
15167 /* 41883 */ GIR_Done,
15168 /* 41884 */ // Label 1384: @41884
15169 /* 41884 */ GIM_Reject,
15170 /* 41885 */ // Label 1382: @41885
15171 /* 41885 */ GIM_Reject,
15172 /* 41886 */ // Label 1372: @41886
15173 /* 41886 */ GIM_Try, /*On fail goto*//*Label 1385*/ GIMT_Encode4(41915), // Rule ID 1185 //
15174 /* 41891 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
15175 /* 41894 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15176 /* 41898 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15177 /* 41902 */ // (fp_to_uint_sat:{ *:[v8i16] } V128:{ *:[v8f16] }:$src, i16:{ *:[Other] }) => (fp_to_uint_I16x8:{ *:[v8i16] } ?:{ *:[v8f16] }:$src)
15178 /* 41902 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_uint_I16x8),
15179 /* 41907 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15180 /* 41913 */ GIR_RootConstrainSelectedInstOperands,
15181 /* 41914 */ // GIR_Coverage, 1185,
15182 /* 41914 */ GIR_Done,
15183 /* 41915 */ // Label 1385: @41915
15184 /* 41915 */ GIM_Reject,
15185 /* 41916 */ // Label 1373: @41916
15186 /* 41916 */ GIM_Try, /*On fail goto*//*Label 1386*/ GIMT_Encode4(41945), // Rule ID 1183 //
15187 /* 41921 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
15188 /* 41924 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15189 /* 41928 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15190 /* 41932 */ // (fp_to_uint_sat:{ *:[v4i32] } V128:{ *:[v4f32] }:$src, i32:{ *:[Other] }) => (fp_to_uint_I32x4:{ *:[v4i32] } ?:{ *:[v4f32] }:$src)
15191 /* 41932 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_uint_I32x4),
15192 /* 41937 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15193 /* 41943 */ GIR_RootConstrainSelectedInstOperands,
15194 /* 41944 */ // GIR_Coverage, 1183,
15195 /* 41944 */ GIR_Done,
15196 /* 41945 */ // Label 1386: @41945
15197 /* 41945 */ GIM_Reject,
15198 /* 41946 */ // Label 1374: @41946
15199 /* 41946 */ GIM_Reject,
15200 /* 41947 */ // Label 58: @41947
15201 /* 41947 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1392*/ GIMT_Encode4(42174),
15202 /* 41958 */ /*GILLT_f32*//*Label 1387*/ GIMT_Encode4(42018),
15203 /* 41962 */ /*GILLT_f64*//*Label 1388*/ GIMT_Encode4(42048), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
15204 /* 42006 */ /*GILLT_v8f16*//*Label 1389*/ GIMT_Encode4(42078),
15205 /* 42010 */ /*GILLT_v4f32*//*Label 1390*/ GIMT_Encode4(42110),
15206 /* 42014 */ /*GILLT_v2f64*//*Label 1391*/ GIMT_Encode4(42142),
15207 /* 42018 */ // Label 1387: @42018
15208 /* 42018 */ GIM_Try, /*On fail goto*//*Label 1393*/ GIMT_Encode4(42047), // Rule ID 134 //
15209 /* 42023 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
15210 /* 42026 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15211 /* 42030 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15212 /* 42034 */ // (fabs:{ *:[f32] } F32:{ *:[f32] }:$src) => (ABS_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
15213 /* 42034 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F32),
15214 /* 42039 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15215 /* 42045 */ GIR_RootConstrainSelectedInstOperands,
15216 /* 42046 */ // GIR_Coverage, 134,
15217 /* 42046 */ GIR_Done,
15218 /* 42047 */ // Label 1393: @42047
15219 /* 42047 */ GIM_Reject,
15220 /* 42048 */ // Label 1388: @42048
15221 /* 42048 */ GIM_Try, /*On fail goto*//*Label 1394*/ GIMT_Encode4(42077), // Rule ID 135 //
15222 /* 42053 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
15223 /* 42056 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15224 /* 42060 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15225 /* 42064 */ // (fabs:{ *:[f64] } F64:{ *:[f64] }:$src) => (ABS_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
15226 /* 42064 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F64),
15227 /* 42069 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15228 /* 42075 */ GIR_RootConstrainSelectedInstOperands,
15229 /* 42076 */ // GIR_Coverage, 135,
15230 /* 42076 */ GIR_Done,
15231 /* 42077 */ // Label 1394: @42077
15232 /* 42077 */ GIM_Reject,
15233 /* 42078 */ // Label 1389: @42078
15234 /* 42078 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1395*/ GIMT_Encode4(42109), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 326 //
15235 /* 42085 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
15236 /* 42088 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15237 /* 42092 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15238 /* 42096 */ // (fabs:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (ABS_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
15239 /* 42096 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F16x8),
15240 /* 42101 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15241 /* 42107 */ GIR_RootConstrainSelectedInstOperands,
15242 /* 42108 */ // GIR_Coverage, 326,
15243 /* 42108 */ GIR_Done,
15244 /* 42109 */ // Label 1395: @42109
15245 /* 42109 */ GIM_Reject,
15246 /* 42110 */ // Label 1390: @42110
15247 /* 42110 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1396*/ GIMT_Encode4(42141), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 324 //
15248 /* 42117 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
15249 /* 42120 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15250 /* 42124 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15251 /* 42128 */ // (fabs:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (ABS_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
15252 /* 42128 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F32x4),
15253 /* 42133 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15254 /* 42139 */ GIR_RootConstrainSelectedInstOperands,
15255 /* 42140 */ // GIR_Coverage, 324,
15256 /* 42140 */ GIR_Done,
15257 /* 42141 */ // Label 1396: @42141
15258 /* 42141 */ GIM_Reject,
15259 /* 42142 */ // Label 1391: @42142
15260 /* 42142 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1397*/ GIMT_Encode4(42173), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 325 //
15261 /* 42149 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
15262 /* 42152 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15263 /* 42156 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15264 /* 42160 */ // (fabs:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (ABS_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
15265 /* 42160 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F64x2),
15266 /* 42165 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15267 /* 42171 */ GIR_RootConstrainSelectedInstOperands,
15268 /* 42172 */ // GIR_Coverage, 325,
15269 /* 42172 */ GIR_Done,
15270 /* 42173 */ // Label 1397: @42173
15271 /* 42173 */ GIM_Reject,
15272 /* 42174 */ // Label 1392: @42174
15273 /* 42174 */ GIM_Reject,
15274 /* 42175 */ // Label 59: @42175
15275 /* 42175 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1400*/ GIMT_Encode4(42422),
15276 /* 42186 */ /*GILLT_f32*//*Label 1398*/ GIMT_Encode4(42194),
15277 /* 42190 */ /*GILLT_f64*//*Label 1399*/ GIMT_Encode4(42308),
15278 /* 42194 */ // Label 1398: @42194
15279 /* 42194 */ GIM_Try, /*On fail goto*//*Label 1401*/ GIMT_Encode4(42307),
15280 /* 42199 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
15281 /* 42202 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1404*/ GIMT_Encode4(42306),
15282 /* 42213 */ /*GILLT_f32*//*Label 1402*/ GIMT_Encode4(42221),
15283 /* 42217 */ /*GILLT_f64*//*Label 1403*/ GIMT_Encode4(42252),
15284 /* 42221 */ // Label 1402: @42221
15285 /* 42221 */ GIM_Try, /*On fail goto*//*Label 1405*/ GIMT_Encode4(42251), // Rule ID 138 //
15286 /* 42226 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15287 /* 42230 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15288 /* 42234 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15289 /* 42238 */ // (fcopysign:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (COPYSIGN_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
15290 /* 42238 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F32),
15291 /* 42243 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15292 /* 42249 */ GIR_RootConstrainSelectedInstOperands,
15293 /* 42250 */ // GIR_Coverage, 138,
15294 /* 42250 */ GIR_Done,
15295 /* 42251 */ // Label 1405: @42251
15296 /* 42251 */ GIM_Reject,
15297 /* 42252 */ // Label 1403: @42252
15298 /* 42252 */ GIM_Try, /*On fail goto*//*Label 1406*/ GIMT_Encode4(42305), // Rule ID 636 //
15299 /* 42257 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15300 /* 42261 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15301 /* 42265 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15302 /* 42269 */ // (fcopysign:{ *:[f32] } F32:{ *:[f32] }:$lhs, F64:{ *:[f64] }:$rhs) => (COPYSIGN_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, (F32_DEMOTE_F64:{ *:[f32] } F64:{ *:[f64] }:$rhs))
15303 /* 42269 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_f32,
15304 /* 42272 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::F32_DEMOTE_F64),
15305 /* 42276 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
15306 /* 42281 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // rhs
15307 /* 42285 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
15308 /* 42288 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15309 /* 42290 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F32),
15310 /* 42293 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15311 /* 42295 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
15312 /* 42297 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
15313 /* 42300 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
15314 /* 42303 */ GIR_RootConstrainSelectedInstOperands,
15315 /* 42304 */ // GIR_Coverage, 636,
15316 /* 42304 */ GIR_EraseRootFromParent_Done,
15317 /* 42305 */ // Label 1406: @42305
15318 /* 42305 */ GIM_Reject,
15319 /* 42306 */ // Label 1404: @42306
15320 /* 42306 */ GIM_Reject,
15321 /* 42307 */ // Label 1401: @42307
15322 /* 42307 */ GIM_Reject,
15323 /* 42308 */ // Label 1399: @42308
15324 /* 42308 */ GIM_Try, /*On fail goto*//*Label 1407*/ GIMT_Encode4(42421),
15325 /* 42313 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
15326 /* 42316 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1410*/ GIMT_Encode4(42420),
15327 /* 42327 */ /*GILLT_f32*//*Label 1408*/ GIMT_Encode4(42335),
15328 /* 42331 */ /*GILLT_f64*//*Label 1409*/ GIMT_Encode4(42389),
15329 /* 42335 */ // Label 1408: @42335
15330 /* 42335 */ GIM_Try, /*On fail goto*//*Label 1411*/ GIMT_Encode4(42388), // Rule ID 635 //
15331 /* 42340 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15332 /* 42344 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15333 /* 42348 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15334 /* 42352 */ // (fcopysign:{ *:[f64] } F64:{ *:[f64] }:$lhs, F32:{ *:[f32] }:$rhs) => (COPYSIGN_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, (F64_PROMOTE_F32:{ *:[f64] } F32:{ *:[f32] }:$rhs))
15335 /* 42352 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_f64,
15336 /* 42355 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::F64_PROMOTE_F32),
15337 /* 42359 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
15338 /* 42364 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // rhs
15339 /* 42368 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
15340 /* 42371 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
15341 /* 42373 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F64),
15342 /* 42376 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15343 /* 42378 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
15344 /* 42380 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
15345 /* 42383 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
15346 /* 42386 */ GIR_RootConstrainSelectedInstOperands,
15347 /* 42387 */ // GIR_Coverage, 635,
15348 /* 42387 */ GIR_EraseRootFromParent_Done,
15349 /* 42388 */ // Label 1411: @42388
15350 /* 42388 */ GIM_Reject,
15351 /* 42389 */ // Label 1409: @42389
15352 /* 42389 */ GIM_Try, /*On fail goto*//*Label 1412*/ GIMT_Encode4(42419), // Rule ID 139 //
15353 /* 42394 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15354 /* 42398 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15355 /* 42402 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15356 /* 42406 */ // (fcopysign:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (COPYSIGN_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
15357 /* 42406 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F64),
15358 /* 42411 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15359 /* 42417 */ GIR_RootConstrainSelectedInstOperands,
15360 /* 42418 */ // GIR_Coverage, 139,
15361 /* 42418 */ GIR_Done,
15362 /* 42419 */ // Label 1412: @42419
15363 /* 42419 */ GIM_Reject,
15364 /* 42420 */ // Label 1410: @42420
15365 /* 42420 */ GIM_Reject,
15366 /* 42421 */ // Label 1407: @42421
15367 /* 42421 */ GIM_Reject,
15368 /* 42422 */ // Label 1400: @42422
15369 /* 42422 */ GIM_Reject,
15370 /* 42423 */ // Label 60: @42423
15371 /* 42423 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1418*/ GIMT_Encode4(42685),
15372 /* 42434 */ /*GILLT_f32*//*Label 1413*/ GIMT_Encode4(42494),
15373 /* 42438 */ /*GILLT_f64*//*Label 1414*/ GIMT_Encode4(42531), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
15374 /* 42482 */ /*GILLT_v8f16*//*Label 1415*/ GIMT_Encode4(42568),
15375 /* 42486 */ /*GILLT_v4f32*//*Label 1416*/ GIMT_Encode4(42607),
15376 /* 42490 */ /*GILLT_v2f64*//*Label 1417*/ GIMT_Encode4(42646),
15377 /* 42494 */ // Label 1413: @42494
15378 /* 42494 */ GIM_Try, /*On fail goto*//*Label 1419*/ GIMT_Encode4(42530), // Rule ID 140 //
15379 /* 42499 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
15380 /* 42502 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
15381 /* 42505 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15382 /* 42509 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15383 /* 42513 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15384 /* 42517 */ // (fminimum:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (MIN_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
15385 /* 42517 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F32),
15386 /* 42522 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15387 /* 42528 */ GIR_RootConstrainSelectedInstOperands,
15388 /* 42529 */ // GIR_Coverage, 140,
15389 /* 42529 */ GIR_Done,
15390 /* 42530 */ // Label 1419: @42530
15391 /* 42530 */ GIM_Reject,
15392 /* 42531 */ // Label 1414: @42531
15393 /* 42531 */ GIM_Try, /*On fail goto*//*Label 1420*/ GIMT_Encode4(42567), // Rule ID 141 //
15394 /* 42536 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
15395 /* 42539 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
15396 /* 42542 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15397 /* 42546 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15398 /* 42550 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15399 /* 42554 */ // (fminimum:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (MIN_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
15400 /* 42554 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F64),
15401 /* 42559 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15402 /* 42565 */ GIR_RootConstrainSelectedInstOperands,
15403 /* 42566 */ // GIR_Coverage, 141,
15404 /* 42566 */ GIR_Done,
15405 /* 42567 */ // Label 1420: @42567
15406 /* 42567 */ GIM_Reject,
15407 /* 42568 */ // Label 1415: @42568
15408 /* 42568 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1421*/ GIMT_Encode4(42606), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 359 //
15409 /* 42575 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
15410 /* 42578 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
15411 /* 42581 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15412 /* 42585 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15413 /* 42589 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15414 /* 42593 */ // (fminimum:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (MIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
15415 /* 42593 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F16x8),
15416 /* 42598 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15417 /* 42604 */ GIR_RootConstrainSelectedInstOperands,
15418 /* 42605 */ // GIR_Coverage, 359,
15419 /* 42605 */ GIR_Done,
15420 /* 42606 */ // Label 1421: @42606
15421 /* 42606 */ GIM_Reject,
15422 /* 42607 */ // Label 1416: @42607
15423 /* 42607 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1422*/ GIMT_Encode4(42645), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 357 //
15424 /* 42614 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
15425 /* 42617 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
15426 /* 42620 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15427 /* 42624 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15428 /* 42628 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15429 /* 42632 */ // (fminimum:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (MIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
15430 /* 42632 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F32x4),
15431 /* 42637 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15432 /* 42643 */ GIR_RootConstrainSelectedInstOperands,
15433 /* 42644 */ // GIR_Coverage, 357,
15434 /* 42644 */ GIR_Done,
15435 /* 42645 */ // Label 1422: @42645
15436 /* 42645 */ GIM_Reject,
15437 /* 42646 */ // Label 1417: @42646
15438 /* 42646 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1423*/ GIMT_Encode4(42684), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 358 //
15439 /* 42653 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
15440 /* 42656 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
15441 /* 42659 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15442 /* 42663 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15443 /* 42667 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15444 /* 42671 */ // (fminimum:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (MIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
15445 /* 42671 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F64x2),
15446 /* 42676 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15447 /* 42682 */ GIR_RootConstrainSelectedInstOperands,
15448 /* 42683 */ // GIR_Coverage, 358,
15449 /* 42683 */ GIR_Done,
15450 /* 42684 */ // Label 1423: @42684
15451 /* 42684 */ GIM_Reject,
15452 /* 42685 */ // Label 1418: @42685
15453 /* 42685 */ GIM_Reject,
15454 /* 42686 */ // Label 61: @42686
15455 /* 42686 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1429*/ GIMT_Encode4(42948),
15456 /* 42697 */ /*GILLT_f32*//*Label 1424*/ GIMT_Encode4(42757),
15457 /* 42701 */ /*GILLT_f64*//*Label 1425*/ GIMT_Encode4(42794), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
15458 /* 42745 */ /*GILLT_v8f16*//*Label 1426*/ GIMT_Encode4(42831),
15459 /* 42749 */ /*GILLT_v4f32*//*Label 1427*/ GIMT_Encode4(42870),
15460 /* 42753 */ /*GILLT_v2f64*//*Label 1428*/ GIMT_Encode4(42909),
15461 /* 42757 */ // Label 1424: @42757
15462 /* 42757 */ GIM_Try, /*On fail goto*//*Label 1430*/ GIMT_Encode4(42793), // Rule ID 142 //
15463 /* 42762 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
15464 /* 42765 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
15465 /* 42768 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15466 /* 42772 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15467 /* 42776 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15468 /* 42780 */ // (fmaximum:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (MAX_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
15469 /* 42780 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F32),
15470 /* 42785 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15471 /* 42791 */ GIR_RootConstrainSelectedInstOperands,
15472 /* 42792 */ // GIR_Coverage, 142,
15473 /* 42792 */ GIR_Done,
15474 /* 42793 */ // Label 1430: @42793
15475 /* 42793 */ GIM_Reject,
15476 /* 42794 */ // Label 1425: @42794
15477 /* 42794 */ GIM_Try, /*On fail goto*//*Label 1431*/ GIMT_Encode4(42830), // Rule ID 143 //
15478 /* 42799 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
15479 /* 42802 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
15480 /* 42805 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15481 /* 42809 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15482 /* 42813 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15483 /* 42817 */ // (fmaximum:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (MAX_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
15484 /* 42817 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F64),
15485 /* 42822 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15486 /* 42828 */ GIR_RootConstrainSelectedInstOperands,
15487 /* 42829 */ // GIR_Coverage, 143,
15488 /* 42829 */ GIR_Done,
15489 /* 42830 */ // Label 1431: @42830
15490 /* 42830 */ GIM_Reject,
15491 /* 42831 */ // Label 1426: @42831
15492 /* 42831 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1432*/ GIMT_Encode4(42869), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 362 //
15493 /* 42838 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
15494 /* 42841 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
15495 /* 42844 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15496 /* 42848 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15497 /* 42852 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15498 /* 42856 */ // (fmaximum:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (MAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
15499 /* 42856 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F16x8),
15500 /* 42861 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15501 /* 42867 */ GIR_RootConstrainSelectedInstOperands,
15502 /* 42868 */ // GIR_Coverage, 362,
15503 /* 42868 */ GIR_Done,
15504 /* 42869 */ // Label 1432: @42869
15505 /* 42869 */ GIM_Reject,
15506 /* 42870 */ // Label 1427: @42870
15507 /* 42870 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1433*/ GIMT_Encode4(42908), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 360 //
15508 /* 42877 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
15509 /* 42880 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
15510 /* 42883 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15511 /* 42887 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15512 /* 42891 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15513 /* 42895 */ // (fmaximum:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (MAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
15514 /* 42895 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F32x4),
15515 /* 42900 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15516 /* 42906 */ GIR_RootConstrainSelectedInstOperands,
15517 /* 42907 */ // GIR_Coverage, 360,
15518 /* 42907 */ GIR_Done,
15519 /* 42908 */ // Label 1433: @42908
15520 /* 42908 */ GIM_Reject,
15521 /* 42909 */ // Label 1428: @42909
15522 /* 42909 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1434*/ GIMT_Encode4(42947), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 361 //
15523 /* 42916 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
15524 /* 42919 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
15525 /* 42922 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15526 /* 42926 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15527 /* 42930 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15528 /* 42934 */ // (fmaximum:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (MAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
15529 /* 42934 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F64x2),
15530 /* 42939 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15531 /* 42945 */ GIR_RootConstrainSelectedInstOperands,
15532 /* 42946 */ // GIR_Coverage, 361,
15533 /* 42946 */ GIR_Done,
15534 /* 42947 */ // Label 1434: @42947
15535 /* 42947 */ GIM_Reject,
15536 /* 42948 */ // Label 1429: @42948
15537 /* 42948 */ GIM_Reject,
15538 /* 42949 */ // Label 62: @42949
15539 /* 42949 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1437*/ GIMT_Encode4(43034),
15540 /* 42960 */ /*GILLT_i32*//*Label 1435*/ GIMT_Encode4(42968),
15541 /* 42964 */ /*GILLT_i64*//*Label 1436*/ GIMT_Encode4(43001),
15542 /* 42968 */ // Label 1435: @42968
15543 /* 42968 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1438*/ GIMT_Encode4(43000), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1298 //
15544 /* 42975 */ // MIs[0] DstI[dst]
15545 /* 42975 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/0, /*SizeInBits*/32,
15546 /* 42979 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15547 /* 42983 */ // MIs[0] lhs
15548 /* 42983 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
15549 /* 42987 */ // (ptradd:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0i:{ *:[i32] }:$rhs) => (ADD_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
15550 /* 42987 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I32),
15551 /* 42992 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15552 /* 42998 */ GIR_RootConstrainSelectedInstOperands,
15553 /* 42999 */ // GIR_Coverage, 1298,
15554 /* 42999 */ GIR_Done,
15555 /* 43000 */ // Label 1438: @43000
15556 /* 43000 */ GIM_Reject,
15557 /* 43001 */ // Label 1436: @43001
15558 /* 43001 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1439*/ GIMT_Encode4(43033), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1299 //
15559 /* 43008 */ // MIs[0] DstI[dst]
15560 /* 43008 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/0, /*SizeInBits*/64,
15561 /* 43012 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
15562 /* 43016 */ // MIs[0] lhs
15563 /* 43016 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
15564 /* 43020 */ // (ptradd:{ *:[i64] } p0:{ *:[i64] }:$lhs, p0i:{ *:[i64] }:$rhs) => (ADD_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
15565 /* 43020 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I64),
15566 /* 43025 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15567 /* 43031 */ GIR_RootConstrainSelectedInstOperands,
15568 /* 43032 */ // GIR_Coverage, 1299,
15569 /* 43032 */ GIR_Done,
15570 /* 43033 */ // Label 1439: @43033
15571 /* 43033 */ GIM_Reject,
15572 /* 43034 */ // Label 1437: @43034
15573 /* 43034 */ GIM_Reject,
15574 /* 43035 */ // Label 63: @43035
15575 /* 43035 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(15), /*)*//*default:*//*Label 1443*/ GIMT_Encode4(43175),
15576 /* 43046 */ /*GILLT_v16i8*//*Label 1440*/ GIMT_Encode4(43058),
15577 /* 43050 */ /*GILLT_v8i16*//*Label 1441*/ GIMT_Encode4(43097),
15578 /* 43054 */ /*GILLT_v4i32*//*Label 1442*/ GIMT_Encode4(43136),
15579 /* 43058 */ // Label 1440: @43058
15580 /* 43058 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1444*/ GIMT_Encode4(43096), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 297 //
15581 /* 43065 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
15582 /* 43068 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
15583 /* 43071 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15584 /* 43075 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15585 /* 43079 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15586 /* 43083 */ // (smin:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MIN_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
15587 /* 43083 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_S_I8x16),
15588 /* 43088 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15589 /* 43094 */ GIR_RootConstrainSelectedInstOperands,
15590 /* 43095 */ // GIR_Coverage, 297,
15591 /* 43095 */ GIR_Done,
15592 /* 43096 */ // Label 1444: @43096
15593 /* 43096 */ GIM_Reject,
15594 /* 43097 */ // Label 1441: @43097
15595 /* 43097 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1445*/ GIMT_Encode4(43135), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 298 //
15596 /* 43104 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
15597 /* 43107 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
15598 /* 43110 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15599 /* 43114 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15600 /* 43118 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15601 /* 43122 */ // (smin:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MIN_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
15602 /* 43122 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_S_I16x8),
15603 /* 43127 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15604 /* 43133 */ GIR_RootConstrainSelectedInstOperands,
15605 /* 43134 */ // GIR_Coverage, 298,
15606 /* 43134 */ GIR_Done,
15607 /* 43135 */ // Label 1445: @43135
15608 /* 43135 */ GIM_Reject,
15609 /* 43136 */ // Label 1442: @43136
15610 /* 43136 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1446*/ GIMT_Encode4(43174), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 299 //
15611 /* 43143 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
15612 /* 43146 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
15613 /* 43149 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15614 /* 43153 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15615 /* 43157 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15616 /* 43161 */ // (smin:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MIN_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
15617 /* 43161 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_S_I32x4),
15618 /* 43166 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15619 /* 43172 */ GIR_RootConstrainSelectedInstOperands,
15620 /* 43173 */ // GIR_Coverage, 299,
15621 /* 43173 */ GIR_Done,
15622 /* 43174 */ // Label 1446: @43174
15623 /* 43174 */ GIM_Reject,
15624 /* 43175 */ // Label 1443: @43175
15625 /* 43175 */ GIM_Reject,
15626 /* 43176 */ // Label 64: @43176
15627 /* 43176 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(15), /*)*//*default:*//*Label 1450*/ GIMT_Encode4(43316),
15628 /* 43187 */ /*GILLT_v16i8*//*Label 1447*/ GIMT_Encode4(43199),
15629 /* 43191 */ /*GILLT_v8i16*//*Label 1448*/ GIMT_Encode4(43238),
15630 /* 43195 */ /*GILLT_v4i32*//*Label 1449*/ GIMT_Encode4(43277),
15631 /* 43199 */ // Label 1447: @43199
15632 /* 43199 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1451*/ GIMT_Encode4(43237), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 303 //
15633 /* 43206 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
15634 /* 43209 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
15635 /* 43212 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15636 /* 43216 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15637 /* 43220 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15638 /* 43224 */ // (smax:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MAX_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
15639 /* 43224 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_S_I8x16),
15640 /* 43229 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15641 /* 43235 */ GIR_RootConstrainSelectedInstOperands,
15642 /* 43236 */ // GIR_Coverage, 303,
15643 /* 43236 */ GIR_Done,
15644 /* 43237 */ // Label 1451: @43237
15645 /* 43237 */ GIM_Reject,
15646 /* 43238 */ // Label 1448: @43238
15647 /* 43238 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1452*/ GIMT_Encode4(43276), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 304 //
15648 /* 43245 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
15649 /* 43248 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
15650 /* 43251 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15651 /* 43255 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15652 /* 43259 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15653 /* 43263 */ // (smax:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MAX_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
15654 /* 43263 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_S_I16x8),
15655 /* 43268 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15656 /* 43274 */ GIR_RootConstrainSelectedInstOperands,
15657 /* 43275 */ // GIR_Coverage, 304,
15658 /* 43275 */ GIR_Done,
15659 /* 43276 */ // Label 1452: @43276
15660 /* 43276 */ GIM_Reject,
15661 /* 43277 */ // Label 1449: @43277
15662 /* 43277 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1453*/ GIMT_Encode4(43315), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 305 //
15663 /* 43284 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
15664 /* 43287 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
15665 /* 43290 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15666 /* 43294 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15667 /* 43298 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15668 /* 43302 */ // (smax:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MAX_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
15669 /* 43302 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_S_I32x4),
15670 /* 43307 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15671 /* 43313 */ GIR_RootConstrainSelectedInstOperands,
15672 /* 43314 */ // GIR_Coverage, 305,
15673 /* 43314 */ GIR_Done,
15674 /* 43315 */ // Label 1453: @43315
15675 /* 43315 */ GIM_Reject,
15676 /* 43316 */ // Label 1450: @43316
15677 /* 43316 */ GIM_Reject,
15678 /* 43317 */ // Label 65: @43317
15679 /* 43317 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(15), /*)*//*default:*//*Label 1457*/ GIMT_Encode4(43457),
15680 /* 43328 */ /*GILLT_v16i8*//*Label 1454*/ GIMT_Encode4(43340),
15681 /* 43332 */ /*GILLT_v8i16*//*Label 1455*/ GIMT_Encode4(43379),
15682 /* 43336 */ /*GILLT_v4i32*//*Label 1456*/ GIMT_Encode4(43418),
15683 /* 43340 */ // Label 1454: @43340
15684 /* 43340 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1458*/ GIMT_Encode4(43378), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 300 //
15685 /* 43347 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
15686 /* 43350 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
15687 /* 43353 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15688 /* 43357 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15689 /* 43361 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15690 /* 43365 */ // (umin:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MIN_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
15691 /* 43365 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_U_I8x16),
15692 /* 43370 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15693 /* 43376 */ GIR_RootConstrainSelectedInstOperands,
15694 /* 43377 */ // GIR_Coverage, 300,
15695 /* 43377 */ GIR_Done,
15696 /* 43378 */ // Label 1458: @43378
15697 /* 43378 */ GIM_Reject,
15698 /* 43379 */ // Label 1455: @43379
15699 /* 43379 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1459*/ GIMT_Encode4(43417), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 301 //
15700 /* 43386 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
15701 /* 43389 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
15702 /* 43392 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15703 /* 43396 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15704 /* 43400 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15705 /* 43404 */ // (umin:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MIN_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
15706 /* 43404 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_U_I16x8),
15707 /* 43409 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15708 /* 43415 */ GIR_RootConstrainSelectedInstOperands,
15709 /* 43416 */ // GIR_Coverage, 301,
15710 /* 43416 */ GIR_Done,
15711 /* 43417 */ // Label 1459: @43417
15712 /* 43417 */ GIM_Reject,
15713 /* 43418 */ // Label 1456: @43418
15714 /* 43418 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1460*/ GIMT_Encode4(43456), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 302 //
15715 /* 43425 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
15716 /* 43428 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
15717 /* 43431 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15718 /* 43435 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15719 /* 43439 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15720 /* 43443 */ // (umin:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MIN_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
15721 /* 43443 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_U_I32x4),
15722 /* 43448 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15723 /* 43454 */ GIR_RootConstrainSelectedInstOperands,
15724 /* 43455 */ // GIR_Coverage, 302,
15725 /* 43455 */ GIR_Done,
15726 /* 43456 */ // Label 1460: @43456
15727 /* 43456 */ GIM_Reject,
15728 /* 43457 */ // Label 1457: @43457
15729 /* 43457 */ GIM_Reject,
15730 /* 43458 */ // Label 66: @43458
15731 /* 43458 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(15), /*)*//*default:*//*Label 1464*/ GIMT_Encode4(43598),
15732 /* 43469 */ /*GILLT_v16i8*//*Label 1461*/ GIMT_Encode4(43481),
15733 /* 43473 */ /*GILLT_v8i16*//*Label 1462*/ GIMT_Encode4(43520),
15734 /* 43477 */ /*GILLT_v4i32*//*Label 1463*/ GIMT_Encode4(43559),
15735 /* 43481 */ // Label 1461: @43481
15736 /* 43481 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1465*/ GIMT_Encode4(43519), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 306 //
15737 /* 43488 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
15738 /* 43491 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
15739 /* 43494 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15740 /* 43498 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15741 /* 43502 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15742 /* 43506 */ // (umax:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MAX_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
15743 /* 43506 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_U_I8x16),
15744 /* 43511 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15745 /* 43517 */ GIR_RootConstrainSelectedInstOperands,
15746 /* 43518 */ // GIR_Coverage, 306,
15747 /* 43518 */ GIR_Done,
15748 /* 43519 */ // Label 1465: @43519
15749 /* 43519 */ GIM_Reject,
15750 /* 43520 */ // Label 1462: @43520
15751 /* 43520 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1466*/ GIMT_Encode4(43558), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 307 //
15752 /* 43527 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
15753 /* 43530 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
15754 /* 43533 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15755 /* 43537 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15756 /* 43541 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15757 /* 43545 */ // (umax:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MAX_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
15758 /* 43545 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_U_I16x8),
15759 /* 43550 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15760 /* 43556 */ GIR_RootConstrainSelectedInstOperands,
15761 /* 43557 */ // GIR_Coverage, 307,
15762 /* 43557 */ GIR_Done,
15763 /* 43558 */ // Label 1466: @43558
15764 /* 43558 */ GIM_Reject,
15765 /* 43559 */ // Label 1463: @43559
15766 /* 43559 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1467*/ GIMT_Encode4(43597), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 308 //
15767 /* 43566 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
15768 /* 43569 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
15769 /* 43572 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15770 /* 43576 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15771 /* 43580 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15772 /* 43584 */ // (umax:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MAX_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
15773 /* 43584 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_U_I32x4),
15774 /* 43589 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15775 /* 43595 */ GIR_RootConstrainSelectedInstOperands,
15776 /* 43596 */ // GIR_Coverage, 308,
15777 /* 43596 */ GIR_Done,
15778 /* 43597 */ // Label 1467: @43597
15779 /* 43597 */ GIM_Reject,
15780 /* 43598 */ // Label 1464: @43598
15781 /* 43598 */ GIM_Reject,
15782 /* 43599 */ // Label 67: @43599
15783 /* 43599 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(16), /*)*//*default:*//*Label 1472*/ GIMT_Encode4(43754),
15784 /* 43610 */ /*GILLT_v16i8*//*Label 1468*/ GIMT_Encode4(43626),
15785 /* 43614 */ /*GILLT_v8i16*//*Label 1469*/ GIMT_Encode4(43658),
15786 /* 43618 */ /*GILLT_v4i32*//*Label 1470*/ GIMT_Encode4(43690),
15787 /* 43622 */ /*GILLT_v2i64*//*Label 1471*/ GIMT_Encode4(43722),
15788 /* 43626 */ // Label 1468: @43626
15789 /* 43626 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1473*/ GIMT_Encode4(43657), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 249 //
15790 /* 43633 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
15791 /* 43636 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15792 /* 43640 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15793 /* 43644 */ // (abs:{ *:[v16i8] } V128:{ *:[v16i8] }:$v) => (ABS_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$v)
15794 /* 43644 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I8x16),
15795 /* 43649 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15796 /* 43655 */ GIR_RootConstrainSelectedInstOperands,
15797 /* 43656 */ // GIR_Coverage, 249,
15798 /* 43656 */ GIR_Done,
15799 /* 43657 */ // Label 1473: @43657
15800 /* 43657 */ GIM_Reject,
15801 /* 43658 */ // Label 1469: @43658
15802 /* 43658 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1474*/ GIMT_Encode4(43689), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 250 //
15803 /* 43665 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
15804 /* 43668 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15805 /* 43672 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15806 /* 43676 */ // (abs:{ *:[v8i16] } V128:{ *:[v8i16] }:$v) => (ABS_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$v)
15807 /* 43676 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I16x8),
15808 /* 43681 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15809 /* 43687 */ GIR_RootConstrainSelectedInstOperands,
15810 /* 43688 */ // GIR_Coverage, 250,
15811 /* 43688 */ GIR_Done,
15812 /* 43689 */ // Label 1474: @43689
15813 /* 43689 */ GIM_Reject,
15814 /* 43690 */ // Label 1470: @43690
15815 /* 43690 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1475*/ GIMT_Encode4(43721), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 251 //
15816 /* 43697 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
15817 /* 43700 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15818 /* 43704 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15819 /* 43708 */ // (abs:{ *:[v4i32] } V128:{ *:[v4i32] }:$v) => (ABS_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$v)
15820 /* 43708 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I32x4),
15821 /* 43713 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15822 /* 43719 */ GIR_RootConstrainSelectedInstOperands,
15823 /* 43720 */ // GIR_Coverage, 251,
15824 /* 43720 */ GIR_Done,
15825 /* 43721 */ // Label 1475: @43721
15826 /* 43721 */ GIM_Reject,
15827 /* 43722 */ // Label 1471: @43722
15828 /* 43722 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1476*/ GIMT_Encode4(43753), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 252 //
15829 /* 43729 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
15830 /* 43732 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15831 /* 43736 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15832 /* 43740 */ // (abs:{ *:[v2i64] } V128:{ *:[v2i64] }:$v) => (ABS_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$v)
15833 /* 43740 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I64x2),
15834 /* 43745 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15835 /* 43751 */ GIR_RootConstrainSelectedInstOperands,
15836 /* 43752 */ // GIR_Coverage, 252,
15837 /* 43752 */ GIR_Done,
15838 /* 43753 */ // Label 1476: @43753
15839 /* 43753 */ GIM_Reject,
15840 /* 43754 */ // Label 1472: @43754
15841 /* 43754 */ GIM_Reject,
15842 /* 43755 */ // Label 68: @43755
15843 /* 43755 */ GIM_Try, /*On fail goto*//*Label 1477*/ GIMT_Encode4(43776), // Rule ID 18 //
15844 /* 43760 */ // MIs[0] dst
15845 /* 43760 */ GIM_CheckIsMBB, /*MI*/0, /*Op*/0,
15846 /* 43763 */ // (br (bb:{ *:[Other] }):$dst) => (BR (bb:{ *:[Other] }):$dst)
15847 /* 43763 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::BR),
15848 /* 43768 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15849 /* 43774 */ GIR_RootConstrainSelectedInstOperands,
15850 /* 43775 */ // GIR_Coverage, 18,
15851 /* 43775 */ GIR_Done,
15852 /* 43776 */ // Label 1477: @43776
15853 /* 43776 */ GIM_Reject,
15854 /* 43777 */ // Label 69: @43777
15855 /* 43777 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(8), GIMT_Encode2(12), /*)*//*default:*//*Label 1482*/ GIMT_Encode4(45800),
15856 /* 43788 */ /*GILLT_v16s8*//*Label 1478*/ GIMT_Encode4(43804),
15857 /* 43792 */ /*GILLT_v8s16*//*Label 1479*/ GIMT_Encode4(44046),
15858 /* 43796 */ /*GILLT_v4s32*//*Label 1480*/ GIMT_Encode4(44288),
15859 /* 43800 */ /*GILLT_v2s64*//*Label 1481*/ GIMT_Encode4(45044),
15860 /* 43804 */ // Label 1478: @43804
15861 /* 43804 */ GIM_Try, /*On fail goto*//*Label 1483*/ GIMT_Encode4(44045),
15862 /* 43809 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
15863 /* 43812 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
15864 /* 43815 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
15865 /* 43818 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15866 /* 43822 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15867 /* 43826 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1484*/ GIMT_Encode4(43914), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 919 //
15868 /* 43833 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
15869 /* 43837 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
15870 /* 43841 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
15871 /* 43844 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
15872 /* 43848 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(1),
15873 /* 43855 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
15874 /* 43859 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
15875 /* 43863 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
15876 /* 43867 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx16),
15877 /* 43871 */ // MIs[2] Operand 1
15878 /* 43871 */ // No operand predicates
15879 /* 43871 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
15880 /* 43873 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
15881 /* 43880 */ // (vector_insert:{ *:[v16i8] } V128:{ *:[v16i8] }:$vec, (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx16>>:$idx) => (LOAD_LANE_8_A32:{ *:[v16i8] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v16i8] }:$vec)
15882 /* 43880 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_8_A32),
15883 /* 43883 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15884 /* 43885 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
15885 /* 43888 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
15886 /* 43893 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
15887 /* 43896 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
15888 /* 43901 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
15889 /* 43903 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
15890 /* 43906 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
15891 /* 43912 */ GIR_RootConstrainSelectedInstOperands,
15892 /* 43913 */ // GIR_Coverage, 919,
15893 /* 43913 */ GIR_EraseRootFromParent_Done,
15894 /* 43914 */ // Label 1484: @43914
15895 /* 43914 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1485*/ GIMT_Encode4(44002), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 920 //
15896 /* 43921 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
15897 /* 43925 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
15898 /* 43929 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
15899 /* 43932 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
15900 /* 43936 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(1),
15901 /* 43943 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
15902 /* 43947 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
15903 /* 43951 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
15904 /* 43955 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx16),
15905 /* 43959 */ // MIs[2] Operand 1
15906 /* 43959 */ // No operand predicates
15907 /* 43959 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
15908 /* 43961 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
15909 /* 43968 */ // (vector_insert:{ *:[v16i8] } V128:{ *:[v16i8] }:$vec, (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx16>>:$idx) => (LOAD_LANE_8_A64:{ *:[v16i8] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v16i8] }:$vec)
15910 /* 43968 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_8_A64),
15911 /* 43971 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15912 /* 43973 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
15913 /* 43976 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
15914 /* 43981 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
15915 /* 43984 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
15916 /* 43989 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
15917 /* 43991 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
15918 /* 43994 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
15919 /* 44000 */ GIR_RootConstrainSelectedInstOperands,
15920 /* 44001 */ // GIR_Coverage, 920,
15921 /* 44001 */ GIR_EraseRootFromParent_Done,
15922 /* 44002 */ // Label 1485: @44002
15923 /* 44002 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1486*/ GIMT_Encode4(44044), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 188 //
15924 /* 44009 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15925 /* 44013 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
15926 /* 44017 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
15927 /* 44021 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx16),
15928 /* 44025 */ // MIs[1] Operand 1
15929 /* 44025 */ // No operand predicates
15930 /* 44025 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
15931 /* 44027 */ // (vector_insert:{ *:[v16i8] } V128:{ *:[v16i8] }:$vec, I32:{ *:[i32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx16>>:$idx) => (REPLACE_LANE_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$vec, (imm:{ *:[i32] }):$idx, I32:{ *:[i32] }:$x)
15932 /* 44027 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I8x16),
15933 /* 44030 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15934 /* 44032 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
15935 /* 44034 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
15936 /* 44037 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
15937 /* 44039 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
15938 /* 44042 */ GIR_RootConstrainSelectedInstOperands,
15939 /* 44043 */ // GIR_Coverage, 188,
15940 /* 44043 */ GIR_EraseRootFromParent_Done,
15941 /* 44044 */ // Label 1486: @44044
15942 /* 44044 */ GIM_Reject,
15943 /* 44045 */ // Label 1483: @44045
15944 /* 44045 */ GIM_Reject,
15945 /* 44046 */ // Label 1479: @44046
15946 /* 44046 */ GIM_Try, /*On fail goto*//*Label 1487*/ GIMT_Encode4(44287),
15947 /* 44051 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
15948 /* 44054 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
15949 /* 44057 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
15950 /* 44060 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15951 /* 44064 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15952 /* 44068 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1488*/ GIMT_Encode4(44156), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 921 //
15953 /* 44075 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
15954 /* 44079 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
15955 /* 44083 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
15956 /* 44086 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
15957 /* 44090 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(2),
15958 /* 44097 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
15959 /* 44101 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
15960 /* 44105 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
15961 /* 44109 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
15962 /* 44113 */ // MIs[2] Operand 1
15963 /* 44113 */ // No operand predicates
15964 /* 44113 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
15965 /* 44115 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
15966 /* 44122 */ // (vector_insert:{ *:[v8i16] } V128:{ *:[v8i16] }:$vec, (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx) => (LOAD_LANE_16_A32:{ *:[v8i16] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v8i16] }:$vec)
15967 /* 44122 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_16_A32),
15968 /* 44125 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15969 /* 44127 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
15970 /* 44130 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
15971 /* 44135 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
15972 /* 44138 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
15973 /* 44143 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
15974 /* 44145 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
15975 /* 44148 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
15976 /* 44154 */ GIR_RootConstrainSelectedInstOperands,
15977 /* 44155 */ // GIR_Coverage, 921,
15978 /* 44155 */ GIR_EraseRootFromParent_Done,
15979 /* 44156 */ // Label 1488: @44156
15980 /* 44156 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1489*/ GIMT_Encode4(44244), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 922 //
15981 /* 44163 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
15982 /* 44167 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
15983 /* 44171 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
15984 /* 44174 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
15985 /* 44178 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(2),
15986 /* 44185 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
15987 /* 44189 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
15988 /* 44193 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
15989 /* 44197 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
15990 /* 44201 */ // MIs[2] Operand 1
15991 /* 44201 */ // No operand predicates
15992 /* 44201 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
15993 /* 44203 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
15994 /* 44210 */ // (vector_insert:{ *:[v8i16] } V128:{ *:[v8i16] }:$vec, (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx) => (LOAD_LANE_16_A64:{ *:[v8i16] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v8i16] }:$vec)
15995 /* 44210 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_16_A64),
15996 /* 44213 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15997 /* 44215 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
15998 /* 44218 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
15999 /* 44223 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16000 /* 44226 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16001 /* 44231 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16002 /* 44233 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16003 /* 44236 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16004 /* 44242 */ GIR_RootConstrainSelectedInstOperands,
16005 /* 44243 */ // GIR_Coverage, 922,
16006 /* 44243 */ GIR_EraseRootFromParent_Done,
16007 /* 44244 */ // Label 1489: @44244
16008 /* 44244 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1490*/ GIMT_Encode4(44286), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 189 //
16009 /* 44251 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
16010 /* 44255 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
16011 /* 44259 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16012 /* 44263 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
16013 /* 44267 */ // MIs[1] Operand 1
16014 /* 44267 */ // No operand predicates
16015 /* 44267 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16016 /* 44269 */ // (vector_insert:{ *:[v8i16] } V128:{ *:[v8i16] }:$vec, I32:{ *:[i32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx) => (REPLACE_LANE_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$vec, (imm:{ *:[i32] }):$idx, I32:{ *:[i32] }:$x)
16017 /* 44269 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I16x8),
16018 /* 44272 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16019 /* 44274 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16020 /* 44276 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
16021 /* 44279 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
16022 /* 44281 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16023 /* 44284 */ GIR_RootConstrainSelectedInstOperands,
16024 /* 44285 */ // GIR_Coverage, 189,
16025 /* 44285 */ GIR_EraseRootFromParent_Done,
16026 /* 44286 */ // Label 1490: @44286
16027 /* 44286 */ GIM_Reject,
16028 /* 44287 */ // Label 1487: @44287
16029 /* 44287 */ GIM_Reject,
16030 /* 44288 */ // Label 1480: @44288
16031 /* 44288 */ GIM_Try, /*On fail goto*//*Label 1491*/ GIMT_Encode4(45043),
16032 /* 44293 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
16033 /* 44296 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
16034 /* 44299 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
16035 /* 44302 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16036 /* 44306 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16037 /* 44310 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1492*/ GIMT_Encode4(44391), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 923 //
16038 /* 44317 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16039 /* 44321 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16040 /* 44325 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16041 /* 44328 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16042 /* 44332 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16043 /* 44336 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16044 /* 44340 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16045 /* 44344 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
16046 /* 44348 */ // MIs[2] Operand 1
16047 /* 44348 */ // No operand predicates
16048 /* 44348 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16049 /* 44350 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16050 /* 44357 */ // (vector_insert:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (LOAD_LANE_32_A32:{ *:[v4i32] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v4i32] }:$vec)
16051 /* 44357 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_32_A32),
16052 /* 44360 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16053 /* 44362 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16054 /* 44365 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16055 /* 44370 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16056 /* 44373 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16057 /* 44378 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16058 /* 44380 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16059 /* 44383 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16060 /* 44389 */ GIR_RootConstrainSelectedInstOperands,
16061 /* 44390 */ // GIR_Coverage, 923,
16062 /* 44390 */ GIR_EraseRootFromParent_Done,
16063 /* 44391 */ // Label 1492: @44391
16064 /* 44391 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1493*/ GIMT_Encode4(44472), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 924 //
16065 /* 44398 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16066 /* 44402 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16067 /* 44406 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16068 /* 44409 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16069 /* 44413 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16070 /* 44417 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16071 /* 44421 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16072 /* 44425 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
16073 /* 44429 */ // MIs[2] Operand 1
16074 /* 44429 */ // No operand predicates
16075 /* 44429 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16076 /* 44431 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16077 /* 44438 */ // (vector_insert:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, (ld:{ *:[f32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (LOAD_LANE_32_A32:{ *:[v4i32] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v4i32] }:$vec)
16078 /* 44438 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_32_A32),
16079 /* 44441 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16080 /* 44443 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16081 /* 44446 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16082 /* 44451 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16083 /* 44454 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16084 /* 44459 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16085 /* 44461 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16086 /* 44464 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16087 /* 44470 */ GIR_RootConstrainSelectedInstOperands,
16088 /* 44471 */ // GIR_Coverage, 924,
16089 /* 44471 */ GIR_EraseRootFromParent_Done,
16090 /* 44472 */ // Label 1493: @44472
16091 /* 44472 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1494*/ GIMT_Encode4(44553), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 925 //
16092 /* 44479 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16093 /* 44483 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16094 /* 44487 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16095 /* 44490 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16096 /* 44494 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16097 /* 44498 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16098 /* 44502 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16099 /* 44506 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
16100 /* 44510 */ // MIs[2] Operand 1
16101 /* 44510 */ // No operand predicates
16102 /* 44510 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16103 /* 44512 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16104 /* 44519 */ // (vector_insert:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (LOAD_LANE_32_A64:{ *:[v4i32] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v4i32] }:$vec)
16105 /* 44519 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_32_A64),
16106 /* 44522 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16107 /* 44524 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16108 /* 44527 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16109 /* 44532 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16110 /* 44535 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16111 /* 44540 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16112 /* 44542 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16113 /* 44545 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16114 /* 44551 */ GIR_RootConstrainSelectedInstOperands,
16115 /* 44552 */ // GIR_Coverage, 925,
16116 /* 44552 */ GIR_EraseRootFromParent_Done,
16117 /* 44553 */ // Label 1494: @44553
16118 /* 44553 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1495*/ GIMT_Encode4(44634), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 926 //
16119 /* 44560 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16120 /* 44564 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16121 /* 44568 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16122 /* 44571 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16123 /* 44575 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16124 /* 44579 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16125 /* 44583 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16126 /* 44587 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
16127 /* 44591 */ // MIs[2] Operand 1
16128 /* 44591 */ // No operand predicates
16129 /* 44591 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16130 /* 44593 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16131 /* 44600 */ // (vector_insert:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, (ld:{ *:[f32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (LOAD_LANE_32_A64:{ *:[v4i32] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v4i32] }:$vec)
16132 /* 44600 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_32_A64),
16133 /* 44603 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16134 /* 44605 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16135 /* 44608 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16136 /* 44613 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16137 /* 44616 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16138 /* 44621 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16139 /* 44623 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16140 /* 44626 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16141 /* 44632 */ GIR_RootConstrainSelectedInstOperands,
16142 /* 44633 */ // GIR_Coverage, 926,
16143 /* 44633 */ GIR_EraseRootFromParent_Done,
16144 /* 44634 */ // Label 1495: @44634
16145 /* 44634 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1496*/ GIMT_Encode4(44715), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 931 //
16146 /* 44641 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16147 /* 44645 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16148 /* 44649 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16149 /* 44652 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16150 /* 44656 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16151 /* 44660 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16152 /* 44664 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16153 /* 44668 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
16154 /* 44672 */ // MIs[2] Operand 1
16155 /* 44672 */ // No operand predicates
16156 /* 44672 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16157 /* 44674 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16158 /* 44681 */ // (vector_insert:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (LOAD_LANE_32_A32:{ *:[v4f32] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v4f32] }:$vec)
16159 /* 44681 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_32_A32),
16160 /* 44684 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16161 /* 44686 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16162 /* 44689 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16163 /* 44694 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16164 /* 44697 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16165 /* 44702 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16166 /* 44704 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16167 /* 44707 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16168 /* 44713 */ GIR_RootConstrainSelectedInstOperands,
16169 /* 44714 */ // GIR_Coverage, 931,
16170 /* 44714 */ GIR_EraseRootFromParent_Done,
16171 /* 44715 */ // Label 1496: @44715
16172 /* 44715 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1497*/ GIMT_Encode4(44796), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 932 //
16173 /* 44722 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16174 /* 44726 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16175 /* 44730 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16176 /* 44733 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16177 /* 44737 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16178 /* 44741 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16179 /* 44745 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16180 /* 44749 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
16181 /* 44753 */ // MIs[2] Operand 1
16182 /* 44753 */ // No operand predicates
16183 /* 44753 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16184 /* 44755 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16185 /* 44762 */ // (vector_insert:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, (ld:{ *:[f32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (LOAD_LANE_32_A32:{ *:[v4f32] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v4f32] }:$vec)
16186 /* 44762 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_32_A32),
16187 /* 44765 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16188 /* 44767 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16189 /* 44770 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16190 /* 44775 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16191 /* 44778 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16192 /* 44783 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16193 /* 44785 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16194 /* 44788 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16195 /* 44794 */ GIR_RootConstrainSelectedInstOperands,
16196 /* 44795 */ // GIR_Coverage, 932,
16197 /* 44795 */ GIR_EraseRootFromParent_Done,
16198 /* 44796 */ // Label 1497: @44796
16199 /* 44796 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1498*/ GIMT_Encode4(44877), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 933 //
16200 /* 44803 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16201 /* 44807 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16202 /* 44811 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16203 /* 44814 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16204 /* 44818 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16205 /* 44822 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16206 /* 44826 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16207 /* 44830 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
16208 /* 44834 */ // MIs[2] Operand 1
16209 /* 44834 */ // No operand predicates
16210 /* 44834 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16211 /* 44836 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16212 /* 44843 */ // (vector_insert:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (LOAD_LANE_32_A64:{ *:[v4f32] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v4f32] }:$vec)
16213 /* 44843 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_32_A64),
16214 /* 44846 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16215 /* 44848 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16216 /* 44851 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16217 /* 44856 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16218 /* 44859 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16219 /* 44864 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16220 /* 44866 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16221 /* 44869 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16222 /* 44875 */ GIR_RootConstrainSelectedInstOperands,
16223 /* 44876 */ // GIR_Coverage, 933,
16224 /* 44876 */ GIR_EraseRootFromParent_Done,
16225 /* 44877 */ // Label 1498: @44877
16226 /* 44877 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1499*/ GIMT_Encode4(44958), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 934 //
16227 /* 44884 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16228 /* 44888 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16229 /* 44892 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16230 /* 44895 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16231 /* 44899 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16232 /* 44903 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16233 /* 44907 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16234 /* 44911 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
16235 /* 44915 */ // MIs[2] Operand 1
16236 /* 44915 */ // No operand predicates
16237 /* 44915 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16238 /* 44917 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16239 /* 44924 */ // (vector_insert:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, (ld:{ *:[f32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (LOAD_LANE_32_A64:{ *:[v4f32] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v4f32] }:$vec)
16240 /* 44924 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_32_A64),
16241 /* 44927 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16242 /* 44929 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16243 /* 44932 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16244 /* 44937 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16245 /* 44940 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16246 /* 44945 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16247 /* 44947 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16248 /* 44950 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16249 /* 44956 */ GIR_RootConstrainSelectedInstOperands,
16250 /* 44957 */ // GIR_Coverage, 934,
16251 /* 44957 */ GIR_EraseRootFromParent_Done,
16252 /* 44958 */ // Label 1499: @44958
16253 /* 44958 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1500*/ GIMT_Encode4(45000), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 190 //
16254 /* 44965 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
16255 /* 44969 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
16256 /* 44973 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16257 /* 44977 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
16258 /* 44981 */ // MIs[1] Operand 1
16259 /* 44981 */ // No operand predicates
16260 /* 44981 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16261 /* 44983 */ // (vector_insert:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, I32:{ *:[i32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (REPLACE_LANE_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, (imm:{ *:[i32] }):$idx, I32:{ *:[i32] }:$x)
16262 /* 44983 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I32x4),
16263 /* 44986 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16264 /* 44988 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16265 /* 44990 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
16266 /* 44993 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
16267 /* 44995 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16268 /* 44998 */ GIR_RootConstrainSelectedInstOperands,
16269 /* 44999 */ // GIR_Coverage, 190,
16270 /* 44999 */ GIR_EraseRootFromParent_Done,
16271 /* 45000 */ // Label 1500: @45000
16272 /* 45000 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1501*/ GIMT_Encode4(45042), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 192 //
16273 /* 45007 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
16274 /* 45011 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
16275 /* 45015 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16276 /* 45019 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
16277 /* 45023 */ // MIs[1] Operand 1
16278 /* 45023 */ // No operand predicates
16279 /* 45023 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16280 /* 45025 */ // (vector_insert:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, F32:{ *:[f32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (REPLACE_LANE_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, (imm:{ *:[i32] }):$idx, F32:{ *:[f32] }:$x)
16281 /* 45025 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_F32x4),
16282 /* 45028 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16283 /* 45030 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16284 /* 45032 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
16285 /* 45035 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
16286 /* 45037 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16287 /* 45040 */ GIR_RootConstrainSelectedInstOperands,
16288 /* 45041 */ // GIR_Coverage, 192,
16289 /* 45041 */ GIR_EraseRootFromParent_Done,
16290 /* 45042 */ // Label 1501: @45042
16291 /* 45042 */ GIM_Reject,
16292 /* 45043 */ // Label 1491: @45043
16293 /* 45043 */ GIM_Reject,
16294 /* 45044 */ // Label 1481: @45044
16295 /* 45044 */ GIM_Try, /*On fail goto*//*Label 1502*/ GIMT_Encode4(45799),
16296 /* 45049 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
16297 /* 45052 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
16298 /* 45055 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
16299 /* 45058 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16300 /* 45062 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16301 /* 45066 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1503*/ GIMT_Encode4(45147), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 927 //
16302 /* 45073 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16303 /* 45077 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16304 /* 45081 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16305 /* 45084 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16306 /* 45088 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16307 /* 45092 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16308 /* 45096 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16309 /* 45100 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
16310 /* 45104 */ // MIs[2] Operand 1
16311 /* 45104 */ // No operand predicates
16312 /* 45104 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16313 /* 45106 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16314 /* 45113 */ // (vector_insert:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (LOAD_LANE_64_A32:{ *:[v2i64] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v2i64] }:$vec)
16315 /* 45113 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_64_A32),
16316 /* 45116 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16317 /* 45118 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16318 /* 45121 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16319 /* 45126 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16320 /* 45129 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16321 /* 45134 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16322 /* 45136 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16323 /* 45139 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16324 /* 45145 */ GIR_RootConstrainSelectedInstOperands,
16325 /* 45146 */ // GIR_Coverage, 927,
16326 /* 45146 */ GIR_EraseRootFromParent_Done,
16327 /* 45147 */ // Label 1503: @45147
16328 /* 45147 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1504*/ GIMT_Encode4(45228), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 928 //
16329 /* 45154 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16330 /* 45158 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16331 /* 45162 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16332 /* 45165 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16333 /* 45169 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16334 /* 45173 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16335 /* 45177 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16336 /* 45181 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
16337 /* 45185 */ // MIs[2] Operand 1
16338 /* 45185 */ // No operand predicates
16339 /* 45185 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16340 /* 45187 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16341 /* 45194 */ // (vector_insert:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, (ld:{ *:[f64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (LOAD_LANE_64_A32:{ *:[v2i64] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v2i64] }:$vec)
16342 /* 45194 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_64_A32),
16343 /* 45197 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16344 /* 45199 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16345 /* 45202 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16346 /* 45207 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16347 /* 45210 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16348 /* 45215 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16349 /* 45217 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16350 /* 45220 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16351 /* 45226 */ GIR_RootConstrainSelectedInstOperands,
16352 /* 45227 */ // GIR_Coverage, 928,
16353 /* 45227 */ GIR_EraseRootFromParent_Done,
16354 /* 45228 */ // Label 1504: @45228
16355 /* 45228 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1505*/ GIMT_Encode4(45309), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 929 //
16356 /* 45235 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16357 /* 45239 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16358 /* 45243 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16359 /* 45246 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16360 /* 45250 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16361 /* 45254 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16362 /* 45258 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16363 /* 45262 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
16364 /* 45266 */ // MIs[2] Operand 1
16365 /* 45266 */ // No operand predicates
16366 /* 45266 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16367 /* 45268 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16368 /* 45275 */ // (vector_insert:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (LOAD_LANE_64_A64:{ *:[v2i64] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v2i64] }:$vec)
16369 /* 45275 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_64_A64),
16370 /* 45278 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16371 /* 45280 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16372 /* 45283 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16373 /* 45288 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16374 /* 45291 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16375 /* 45296 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16376 /* 45298 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16377 /* 45301 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16378 /* 45307 */ GIR_RootConstrainSelectedInstOperands,
16379 /* 45308 */ // GIR_Coverage, 929,
16380 /* 45308 */ GIR_EraseRootFromParent_Done,
16381 /* 45309 */ // Label 1505: @45309
16382 /* 45309 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1506*/ GIMT_Encode4(45390), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 930 //
16383 /* 45316 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16384 /* 45320 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16385 /* 45324 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16386 /* 45327 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16387 /* 45331 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16388 /* 45335 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16389 /* 45339 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16390 /* 45343 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
16391 /* 45347 */ // MIs[2] Operand 1
16392 /* 45347 */ // No operand predicates
16393 /* 45347 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16394 /* 45349 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16395 /* 45356 */ // (vector_insert:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, (ld:{ *:[f64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (LOAD_LANE_64_A64:{ *:[v2i64] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v2i64] }:$vec)
16396 /* 45356 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_64_A64),
16397 /* 45359 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16398 /* 45361 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16399 /* 45364 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16400 /* 45369 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16401 /* 45372 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16402 /* 45377 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16403 /* 45379 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16404 /* 45382 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16405 /* 45388 */ GIR_RootConstrainSelectedInstOperands,
16406 /* 45389 */ // GIR_Coverage, 930,
16407 /* 45389 */ GIR_EraseRootFromParent_Done,
16408 /* 45390 */ // Label 1506: @45390
16409 /* 45390 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1507*/ GIMT_Encode4(45471), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 935 //
16410 /* 45397 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16411 /* 45401 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16412 /* 45405 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16413 /* 45408 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16414 /* 45412 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16415 /* 45416 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16416 /* 45420 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16417 /* 45424 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
16418 /* 45428 */ // MIs[2] Operand 1
16419 /* 45428 */ // No operand predicates
16420 /* 45428 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16421 /* 45430 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16422 /* 45437 */ // (vector_insert:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (LOAD_LANE_64_A32:{ *:[v2f64] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v2f64] }:$vec)
16423 /* 45437 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_64_A32),
16424 /* 45440 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16425 /* 45442 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16426 /* 45445 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16427 /* 45450 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16428 /* 45453 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16429 /* 45458 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16430 /* 45460 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16431 /* 45463 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16432 /* 45469 */ GIR_RootConstrainSelectedInstOperands,
16433 /* 45470 */ // GIR_Coverage, 935,
16434 /* 45470 */ GIR_EraseRootFromParent_Done,
16435 /* 45471 */ // Label 1507: @45471
16436 /* 45471 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1508*/ GIMT_Encode4(45552), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 936 //
16437 /* 45478 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16438 /* 45482 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16439 /* 45486 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16440 /* 45489 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16441 /* 45493 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16442 /* 45497 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16443 /* 45501 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16444 /* 45505 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
16445 /* 45509 */ // MIs[2] Operand 1
16446 /* 45509 */ // No operand predicates
16447 /* 45509 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16448 /* 45511 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16449 /* 45518 */ // (vector_insert:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, (ld:{ *:[f64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (LOAD_LANE_64_A32:{ *:[v2f64] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v2f64] }:$vec)
16450 /* 45518 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_64_A32),
16451 /* 45521 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16452 /* 45523 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16453 /* 45526 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16454 /* 45531 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16455 /* 45534 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16456 /* 45539 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16457 /* 45541 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16458 /* 45544 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16459 /* 45550 */ GIR_RootConstrainSelectedInstOperands,
16460 /* 45551 */ // GIR_Coverage, 936,
16461 /* 45551 */ GIR_EraseRootFromParent_Done,
16462 /* 45552 */ // Label 1508: @45552
16463 /* 45552 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1509*/ GIMT_Encode4(45633), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 937 //
16464 /* 45559 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16465 /* 45563 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16466 /* 45567 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16467 /* 45570 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16468 /* 45574 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16469 /* 45578 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16470 /* 45582 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16471 /* 45586 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
16472 /* 45590 */ // MIs[2] Operand 1
16473 /* 45590 */ // No operand predicates
16474 /* 45590 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16475 /* 45592 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16476 /* 45599 */ // (vector_insert:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (LOAD_LANE_64_A64:{ *:[v2f64] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v2f64] }:$vec)
16477 /* 45599 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_64_A64),
16478 /* 45602 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16479 /* 45604 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16480 /* 45607 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16481 /* 45612 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16482 /* 45615 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16483 /* 45620 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16484 /* 45622 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16485 /* 45625 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16486 /* 45631 */ GIR_RootConstrainSelectedInstOperands,
16487 /* 45632 */ // GIR_Coverage, 937,
16488 /* 45632 */ GIR_EraseRootFromParent_Done,
16489 /* 45633 */ // Label 1509: @45633
16490 /* 45633 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1510*/ GIMT_Encode4(45714), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 938 //
16491 /* 45640 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16492 /* 45644 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16493 /* 45648 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16494 /* 45651 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16495 /* 45655 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16496 /* 45659 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16497 /* 45663 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16498 /* 45667 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
16499 /* 45671 */ // MIs[2] Operand 1
16500 /* 45671 */ // No operand predicates
16501 /* 45671 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16502 /* 45673 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16503 /* 45680 */ // (vector_insert:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, (ld:{ *:[f64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (LOAD_LANE_64_A64:{ *:[v2f64] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v2f64] }:$vec)
16504 /* 45680 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_64_A64),
16505 /* 45683 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16506 /* 45685 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16507 /* 45688 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16508 /* 45693 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16509 /* 45696 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16510 /* 45701 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16511 /* 45703 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16512 /* 45706 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16513 /* 45712 */ GIR_RootConstrainSelectedInstOperands,
16514 /* 45713 */ // GIR_Coverage, 938,
16515 /* 45713 */ GIR_EraseRootFromParent_Done,
16516 /* 45714 */ // Label 1510: @45714
16517 /* 45714 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1511*/ GIMT_Encode4(45756), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 191 //
16518 /* 45721 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
16519 /* 45725 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
16520 /* 45729 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16521 /* 45733 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
16522 /* 45737 */ // MIs[1] Operand 1
16523 /* 45737 */ // No operand predicates
16524 /* 45737 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16525 /* 45739 */ // (vector_insert:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, I64:{ *:[i64] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (REPLACE_LANE_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, (imm:{ *:[i32] }):$idx, I64:{ *:[i64] }:$x)
16526 /* 45739 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I64x2),
16527 /* 45742 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16528 /* 45744 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16529 /* 45746 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
16530 /* 45749 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
16531 /* 45751 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16532 /* 45754 */ GIR_RootConstrainSelectedInstOperands,
16533 /* 45755 */ // GIR_Coverage, 191,
16534 /* 45755 */ GIR_EraseRootFromParent_Done,
16535 /* 45756 */ // Label 1511: @45756
16536 /* 45756 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1512*/ GIMT_Encode4(45798), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 193 //
16537 /* 45763 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
16538 /* 45767 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
16539 /* 45771 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16540 /* 45775 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
16541 /* 45779 */ // MIs[1] Operand 1
16542 /* 45779 */ // No operand predicates
16543 /* 45779 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16544 /* 45781 */ // (vector_insert:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, F64:{ *:[f64] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (REPLACE_LANE_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, (imm:{ *:[i32] }):$idx, F64:{ *:[f64] }:$x)
16545 /* 45781 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_F64x2),
16546 /* 45784 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16547 /* 45786 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16548 /* 45788 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
16549 /* 45791 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
16550 /* 45793 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16551 /* 45796 */ GIR_RootConstrainSelectedInstOperands,
16552 /* 45797 */ // GIR_Coverage, 193,
16553 /* 45797 */ GIR_EraseRootFromParent_Done,
16554 /* 45798 */ // Label 1512: @45798
16555 /* 45798 */ GIM_Reject,
16556 /* 45799 */ // Label 1502: @45799
16557 /* 45799 */ GIM_Reject,
16558 /* 45800 */ // Label 1482: @45800
16559 /* 45800 */ GIM_Reject,
16560 /* 45801 */ // Label 70: @45801
16561 /* 45801 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(8), GIMT_Encode2(12), /*)*//*default:*//*Label 1517*/ GIMT_Encode4(47070),
16562 /* 45812 */ /*GILLT_v16s8*//*Label 1513*/ GIMT_Encode4(45828),
16563 /* 45816 */ /*GILLT_v8s16*//*Label 1514*/ GIMT_Encode4(46079),
16564 /* 45820 */ /*GILLT_v4s32*//*Label 1515*/ GIMT_Encode4(46306),
16565 /* 45824 */ /*GILLT_v2s64*//*Label 1516*/ GIMT_Encode4(46694),
16566 /* 45828 */ // Label 1513: @45828
16567 /* 45828 */ GIM_Try, /*On fail goto*//*Label 1518*/ GIMT_Encode4(46078),
16568 /* 45833 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
16569 /* 45836 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16570 /* 45840 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1519*/ GIMT_Encode4(45910), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 869 //
16571 /* 45847 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16572 /* 45851 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16573 /* 45855 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16574 /* 45858 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16575 /* 45862 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(1),
16576 /* 45869 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16577 /* 45873 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16578 /* 45875 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16579 /* 45882 */ // (splat_vector:{ *:[v16i8] } (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>>) => (LOAD8_SPLAT_A32:{ *:[v16i8] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
16580 /* 45882 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_SPLAT_A32),
16581 /* 45885 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16582 /* 45887 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16583 /* 45890 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16584 /* 45895 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16585 /* 45900 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16586 /* 45903 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
16587 /* 45908 */ GIR_RootConstrainSelectedInstOperands,
16588 /* 45909 */ // GIR_Coverage, 869,
16589 /* 45909 */ GIR_EraseRootFromParent_Done,
16590 /* 45910 */ // Label 1519: @45910
16591 /* 45910 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1520*/ GIMT_Encode4(45980), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 870 //
16592 /* 45917 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16593 /* 45921 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16594 /* 45925 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16595 /* 45928 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16596 /* 45932 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(1),
16597 /* 45939 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16598 /* 45943 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16599 /* 45945 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16600 /* 45952 */ // (splat_vector:{ *:[v16i8] } (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>>) => (LOAD8_SPLAT_A64:{ *:[v16i8] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
16601 /* 45952 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_SPLAT_A64),
16602 /* 45955 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16603 /* 45957 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16604 /* 45960 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16605 /* 45965 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16606 /* 45970 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16607 /* 45973 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
16608 /* 45978 */ GIR_RootConstrainSelectedInstOperands,
16609 /* 45979 */ // GIR_Coverage, 870,
16610 /* 45979 */ GIR_EraseRootFromParent_Done,
16611 /* 45980 */ // Label 1520: @45980
16612 /* 45980 */ GIM_Try, /*On fail goto*//*Label 1521*/ GIMT_Encode4(46053), // Rule ID 973 //
16613 /* 45985 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16614 /* 45989 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16615 /* 45993 */ // MIs[1] Operand 1
16616 /* 45993 */ // No operand predicates
16617 /* 45993 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16618 /* 45995 */ // (splat_vector:{ *:[v16i8] } (imm:{ *:[i32] }):$x) => (CONST_V128_I8x16:{ *:[v16i8] } (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x)
16619 /* 45995 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I8x16),
16620 /* 45998 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16621 /* 46000 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16622 /* 46003 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16623 /* 46006 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16624 /* 46009 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16625 /* 46012 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16626 /* 46015 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16627 /* 46018 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16628 /* 46021 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16629 /* 46024 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16630 /* 46027 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16631 /* 46030 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16632 /* 46033 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16633 /* 46036 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16634 /* 46039 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16635 /* 46042 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16636 /* 46045 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16637 /* 46048 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16638 /* 46051 */ GIR_RootConstrainSelectedInstOperands,
16639 /* 46052 */ // GIR_Coverage, 973,
16640 /* 46052 */ GIR_EraseRootFromParent_Done,
16641 /* 46053 */ // Label 1521: @46053
16642 /* 46053 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1522*/ GIMT_Encode4(46077), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 180 //
16643 /* 46060 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
16644 /* 46064 */ // (splat_vector:{ *:[v16i8] } I32:{ *:[i32] }:$x) => (SPLAT_I8x16:{ *:[v16i8] } I32:{ *:[i32] }:$x)
16645 /* 46064 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I8x16),
16646 /* 46069 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16647 /* 46075 */ GIR_RootConstrainSelectedInstOperands,
16648 /* 46076 */ // GIR_Coverage, 180,
16649 /* 46076 */ GIR_Done,
16650 /* 46077 */ // Label 1522: @46077
16651 /* 46077 */ GIM_Reject,
16652 /* 46078 */ // Label 1518: @46078
16653 /* 46078 */ GIM_Reject,
16654 /* 46079 */ // Label 1514: @46079
16655 /* 46079 */ GIM_Try, /*On fail goto*//*Label 1523*/ GIMT_Encode4(46305),
16656 /* 46084 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
16657 /* 46087 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16658 /* 46091 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1524*/ GIMT_Encode4(46161), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 871 //
16659 /* 46098 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16660 /* 46102 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16661 /* 46106 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16662 /* 46109 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16663 /* 46113 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(2),
16664 /* 46120 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16665 /* 46124 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16666 /* 46126 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16667 /* 46133 */ // (splat_vector:{ *:[v8i16] } (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>>) => (LOAD16_SPLAT_A32:{ *:[v8i16] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
16668 /* 46133 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_SPLAT_A32),
16669 /* 46136 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16670 /* 46138 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16671 /* 46141 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16672 /* 46146 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16673 /* 46151 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16674 /* 46154 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
16675 /* 46159 */ GIR_RootConstrainSelectedInstOperands,
16676 /* 46160 */ // GIR_Coverage, 871,
16677 /* 46160 */ GIR_EraseRootFromParent_Done,
16678 /* 46161 */ // Label 1524: @46161
16679 /* 46161 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1525*/ GIMT_Encode4(46231), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 872 //
16680 /* 46168 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16681 /* 46172 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16682 /* 46176 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16683 /* 46179 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16684 /* 46183 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(2),
16685 /* 46190 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16686 /* 46194 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16687 /* 46196 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16688 /* 46203 */ // (splat_vector:{ *:[v8i16] } (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>>) => (LOAD16_SPLAT_A64:{ *:[v8i16] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
16689 /* 46203 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_SPLAT_A64),
16690 /* 46206 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16691 /* 46208 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16692 /* 46211 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16693 /* 46216 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16694 /* 46221 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16695 /* 46224 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
16696 /* 46229 */ GIR_RootConstrainSelectedInstOperands,
16697 /* 46230 */ // GIR_Coverage, 872,
16698 /* 46230 */ GIR_EraseRootFromParent_Done,
16699 /* 46231 */ // Label 1525: @46231
16700 /* 46231 */ GIM_Try, /*On fail goto*//*Label 1526*/ GIMT_Encode4(46280), // Rule ID 974 //
16701 /* 46236 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16702 /* 46240 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16703 /* 46244 */ // MIs[1] Operand 1
16704 /* 46244 */ // No operand predicates
16705 /* 46244 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16706 /* 46246 */ // (splat_vector:{ *:[v8i16] } (imm:{ *:[i32] }):$x) => (CONST_V128_I16x8:{ *:[v8i16] } (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x)
16707 /* 46246 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I16x8),
16708 /* 46249 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16709 /* 46251 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16710 /* 46254 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16711 /* 46257 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16712 /* 46260 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16713 /* 46263 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16714 /* 46266 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16715 /* 46269 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16716 /* 46272 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16717 /* 46275 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16718 /* 46278 */ GIR_RootConstrainSelectedInstOperands,
16719 /* 46279 */ // GIR_Coverage, 974,
16720 /* 46279 */ GIR_EraseRootFromParent_Done,
16721 /* 46280 */ // Label 1526: @46280
16722 /* 46280 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1527*/ GIMT_Encode4(46304), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 181 //
16723 /* 46287 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
16724 /* 46291 */ // (splat_vector:{ *:[v8i16] } I32:{ *:[i32] }:$x) => (SPLAT_I16x8:{ *:[v8i16] } I32:{ *:[i32] }:$x)
16725 /* 46291 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I16x8),
16726 /* 46296 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16727 /* 46302 */ GIR_RootConstrainSelectedInstOperands,
16728 /* 46303 */ // GIR_Coverage, 181,
16729 /* 46303 */ GIR_Done,
16730 /* 46304 */ // Label 1527: @46304
16731 /* 46304 */ GIM_Reject,
16732 /* 46305 */ // Label 1523: @46305
16733 /* 46305 */ GIM_Reject,
16734 /* 46306 */ // Label 1515: @46306
16735 /* 46306 */ GIM_Try, /*On fail goto*//*Label 1528*/ GIMT_Encode4(46693),
16736 /* 46311 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
16737 /* 46314 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16738 /* 46318 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1529*/ GIMT_Encode4(46381), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 873 //
16739 /* 46325 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16740 /* 46329 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16741 /* 46333 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16742 /* 46336 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16743 /* 46340 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16744 /* 46344 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16745 /* 46346 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16746 /* 46353 */ // (splat_vector:{ *:[v4i32] } (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>) => (LOAD32_SPLAT_A32:{ *:[v4i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
16747 /* 46353 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_SPLAT_A32),
16748 /* 46356 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16749 /* 46358 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16750 /* 46361 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16751 /* 46366 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16752 /* 46371 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16753 /* 46374 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
16754 /* 46379 */ GIR_RootConstrainSelectedInstOperands,
16755 /* 46380 */ // GIR_Coverage, 873,
16756 /* 46380 */ GIR_EraseRootFromParent_Done,
16757 /* 46381 */ // Label 1529: @46381
16758 /* 46381 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1530*/ GIMT_Encode4(46444), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 874 //
16759 /* 46388 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16760 /* 46392 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16761 /* 46396 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16762 /* 46399 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16763 /* 46403 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16764 /* 46407 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16765 /* 46409 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16766 /* 46416 */ // (splat_vector:{ *:[v4i32] } (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>) => (LOAD32_SPLAT_A64:{ *:[v4i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
16767 /* 46416 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_SPLAT_A64),
16768 /* 46419 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16769 /* 46421 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16770 /* 46424 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16771 /* 46429 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16772 /* 46434 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16773 /* 46437 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
16774 /* 46442 */ GIR_RootConstrainSelectedInstOperands,
16775 /* 46443 */ // GIR_Coverage, 874,
16776 /* 46443 */ GIR_EraseRootFromParent_Done,
16777 /* 46444 */ // Label 1530: @46444
16778 /* 46444 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1531*/ GIMT_Encode4(46507), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 877 //
16779 /* 46451 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16780 /* 46455 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16781 /* 46459 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16782 /* 46462 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16783 /* 46466 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16784 /* 46470 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16785 /* 46472 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16786 /* 46479 */ // (splat_vector:{ *:[v4f32] } (ld:{ *:[f32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>) => (LOAD32_SPLAT_A32:{ *:[v4f32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
16787 /* 46479 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_SPLAT_A32),
16788 /* 46482 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16789 /* 46484 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16790 /* 46487 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16791 /* 46492 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16792 /* 46497 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16793 /* 46500 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
16794 /* 46505 */ GIR_RootConstrainSelectedInstOperands,
16795 /* 46506 */ // GIR_Coverage, 877,
16796 /* 46506 */ GIR_EraseRootFromParent_Done,
16797 /* 46507 */ // Label 1531: @46507
16798 /* 46507 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1532*/ GIMT_Encode4(46570), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 878 //
16799 /* 46514 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16800 /* 46518 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16801 /* 46522 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16802 /* 46525 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16803 /* 46529 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16804 /* 46533 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16805 /* 46535 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16806 /* 46542 */ // (splat_vector:{ *:[v4f32] } (ld:{ *:[f32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>) => (LOAD32_SPLAT_A64:{ *:[v4f32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
16807 /* 46542 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_SPLAT_A64),
16808 /* 46545 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16809 /* 46547 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16810 /* 46550 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16811 /* 46555 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16812 /* 46560 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16813 /* 46563 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
16814 /* 46568 */ GIR_RootConstrainSelectedInstOperands,
16815 /* 46569 */ // GIR_Coverage, 878,
16816 /* 46569 */ GIR_EraseRootFromParent_Done,
16817 /* 46570 */ // Label 1532: @46570
16818 /* 46570 */ GIM_Try, /*On fail goto*//*Label 1533*/ GIMT_Encode4(46607), // Rule ID 977 //
16819 /* 46575 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16820 /* 46579 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
16821 /* 46583 */ // MIs[1] Operand 1
16822 /* 46583 */ // No operand predicates
16823 /* 46583 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16824 /* 46585 */ // (splat_vector:{ *:[v4f32] } (fpimm:{ *:[f32] }):$x) => (CONST_V128_F32x4:{ *:[v4f32] } (fpimm:{ *:[f32] }):$x, (fpimm:{ *:[f32] }):$x, (fpimm:{ *:[f32] }):$x, (fpimm:{ *:[f32] }):$x)
16825 /* 46585 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F32x4),
16826 /* 46588 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16827 /* 46590 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16828 /* 46593 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16829 /* 46596 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16830 /* 46599 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16831 /* 46602 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16832 /* 46605 */ GIR_RootConstrainSelectedInstOperands,
16833 /* 46606 */ // GIR_Coverage, 977,
16834 /* 46606 */ GIR_EraseRootFromParent_Done,
16835 /* 46607 */ // Label 1533: @46607
16836 /* 46607 */ GIM_Try, /*On fail goto*//*Label 1534*/ GIMT_Encode4(46644), // Rule ID 975 //
16837 /* 46612 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16838 /* 46616 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16839 /* 46620 */ // MIs[1] Operand 1
16840 /* 46620 */ // No operand predicates
16841 /* 46620 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16842 /* 46622 */ // (splat_vector:{ *:[v4i32] } (imm:{ *:[i32] }):$x) => (CONST_V128_I32x4:{ *:[v4i32] } (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x)
16843 /* 46622 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I32x4),
16844 /* 46625 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16845 /* 46627 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16846 /* 46630 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16847 /* 46633 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16848 /* 46636 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16849 /* 46639 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16850 /* 46642 */ GIR_RootConstrainSelectedInstOperands,
16851 /* 46643 */ // GIR_Coverage, 975,
16852 /* 46643 */ GIR_EraseRootFromParent_Done,
16853 /* 46644 */ // Label 1534: @46644
16854 /* 46644 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1535*/ GIMT_Encode4(46668), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 182 //
16855 /* 46651 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
16856 /* 46655 */ // (splat_vector:{ *:[v4i32] } I32:{ *:[i32] }:$x) => (SPLAT_I32x4:{ *:[v4i32] } I32:{ *:[i32] }:$x)
16857 /* 46655 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I32x4),
16858 /* 46660 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16859 /* 46666 */ GIR_RootConstrainSelectedInstOperands,
16860 /* 46667 */ // GIR_Coverage, 182,
16861 /* 46667 */ GIR_Done,
16862 /* 46668 */ // Label 1535: @46668
16863 /* 46668 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1536*/ GIMT_Encode4(46692), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 184 //
16864 /* 46675 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
16865 /* 46679 */ // (splat_vector:{ *:[v4f32] } F32:{ *:[f32] }:$x) => (SPLAT_F32x4:{ *:[v4f32] } F32:{ *:[f32] }:$x)
16866 /* 46679 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_F32x4),
16867 /* 46684 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16868 /* 46690 */ GIR_RootConstrainSelectedInstOperands,
16869 /* 46691 */ // GIR_Coverage, 184,
16870 /* 46691 */ GIR_Done,
16871 /* 46692 */ // Label 1536: @46692
16872 /* 46692 */ GIM_Reject,
16873 /* 46693 */ // Label 1528: @46693
16874 /* 46693 */ GIM_Reject,
16875 /* 46694 */ // Label 1516: @46694
16876 /* 46694 */ GIM_Try, /*On fail goto*//*Label 1537*/ GIMT_Encode4(47069),
16877 /* 46699 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
16878 /* 46702 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16879 /* 46706 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1538*/ GIMT_Encode4(46769), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 875 //
16880 /* 46713 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16881 /* 46717 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16882 /* 46721 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16883 /* 46724 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16884 /* 46728 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16885 /* 46732 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16886 /* 46734 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16887 /* 46741 */ // (splat_vector:{ *:[v2i64] } (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>) => (LOAD64_SPLAT_A32:{ *:[v2i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
16888 /* 46741 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD64_SPLAT_A32),
16889 /* 46744 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16890 /* 46746 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16891 /* 46749 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16892 /* 46754 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16893 /* 46759 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16894 /* 46762 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
16895 /* 46767 */ GIR_RootConstrainSelectedInstOperands,
16896 /* 46768 */ // GIR_Coverage, 875,
16897 /* 46768 */ GIR_EraseRootFromParent_Done,
16898 /* 46769 */ // Label 1538: @46769
16899 /* 46769 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1539*/ GIMT_Encode4(46832), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 876 //
16900 /* 46776 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16901 /* 46780 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16902 /* 46784 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16903 /* 46787 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16904 /* 46791 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16905 /* 46795 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16906 /* 46797 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16907 /* 46804 */ // (splat_vector:{ *:[v2i64] } (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>) => (LOAD64_SPLAT_A64:{ *:[v2i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
16908 /* 46804 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD64_SPLAT_A64),
16909 /* 46807 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16910 /* 46809 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16911 /* 46812 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16912 /* 46817 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16913 /* 46822 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16914 /* 46825 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
16915 /* 46830 */ GIR_RootConstrainSelectedInstOperands,
16916 /* 46831 */ // GIR_Coverage, 876,
16917 /* 46831 */ GIR_EraseRootFromParent_Done,
16918 /* 46832 */ // Label 1539: @46832
16919 /* 46832 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1540*/ GIMT_Encode4(46895), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 879 //
16920 /* 46839 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16921 /* 46843 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16922 /* 46847 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16923 /* 46850 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16924 /* 46854 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16925 /* 46858 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16926 /* 46860 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16927 /* 46867 */ // (splat_vector:{ *:[v2f64] } (ld:{ *:[f64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>) => (LOAD64_SPLAT_A32:{ *:[v2f64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
16928 /* 46867 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD64_SPLAT_A32),
16929 /* 46870 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16930 /* 46872 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16931 /* 46875 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16932 /* 46880 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16933 /* 46885 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16934 /* 46888 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
16935 /* 46893 */ GIR_RootConstrainSelectedInstOperands,
16936 /* 46894 */ // GIR_Coverage, 879,
16937 /* 46894 */ GIR_EraseRootFromParent_Done,
16938 /* 46895 */ // Label 1540: @46895
16939 /* 46895 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1541*/ GIMT_Encode4(46958), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 880 //
16940 /* 46902 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16941 /* 46906 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16942 /* 46910 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16943 /* 46913 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16944 /* 46917 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16945 /* 46921 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16946 /* 46923 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16947 /* 46930 */ // (splat_vector:{ *:[v2f64] } (ld:{ *:[f64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>) => (LOAD64_SPLAT_A64:{ *:[v2f64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
16948 /* 46930 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD64_SPLAT_A64),
16949 /* 46933 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16950 /* 46935 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16951 /* 46938 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16952 /* 46943 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16953 /* 46948 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16954 /* 46951 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
16955 /* 46956 */ GIR_RootConstrainSelectedInstOperands,
16956 /* 46957 */ // GIR_Coverage, 880,
16957 /* 46957 */ GIR_EraseRootFromParent_Done,
16958 /* 46958 */ // Label 1541: @46958
16959 /* 46958 */ GIM_Try, /*On fail goto*//*Label 1542*/ GIMT_Encode4(46989), // Rule ID 978 //
16960 /* 46963 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16961 /* 46967 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
16962 /* 46971 */ // MIs[1] Operand 1
16963 /* 46971 */ // No operand predicates
16964 /* 46971 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16965 /* 46973 */ // (splat_vector:{ *:[v2f64] } (fpimm:{ *:[f64] }):$x) => (CONST_V128_F64x2:{ *:[v2f64] } (fpimm:{ *:[f64] }):$x, (fpimm:{ *:[f64] }):$x)
16966 /* 46973 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F64x2),
16967 /* 46976 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16968 /* 46978 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16969 /* 46981 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16970 /* 46984 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16971 /* 46987 */ GIR_RootConstrainSelectedInstOperands,
16972 /* 46988 */ // GIR_Coverage, 978,
16973 /* 46988 */ GIR_EraseRootFromParent_Done,
16974 /* 46989 */ // Label 1542: @46989
16975 /* 46989 */ GIM_Try, /*On fail goto*//*Label 1543*/ GIMT_Encode4(47020), // Rule ID 976 //
16976 /* 46994 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
16977 /* 46998 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16978 /* 47002 */ // MIs[1] Operand 1
16979 /* 47002 */ // No operand predicates
16980 /* 47002 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16981 /* 47004 */ // (splat_vector:{ *:[v2i64] } (imm:{ *:[i64] }):$x) => (CONST_V128_I64x2:{ *:[v2i64] } (imm:{ *:[i64] }):$x, (imm:{ *:[i64] }):$x)
16982 /* 47004 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I64x2),
16983 /* 47007 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16984 /* 47009 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16985 /* 47012 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
16986 /* 47015 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16987 /* 47018 */ GIR_RootConstrainSelectedInstOperands,
16988 /* 47019 */ // GIR_Coverage, 976,
16989 /* 47019 */ GIR_EraseRootFromParent_Done,
16990 /* 47020 */ // Label 1543: @47020
16991 /* 47020 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1544*/ GIMT_Encode4(47044), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 183 //
16992 /* 47027 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
16993 /* 47031 */ // (splat_vector:{ *:[v2i64] } I64:{ *:[i64] }:$x) => (SPLAT_I64x2:{ *:[v2i64] } I64:{ *:[i64] }:$x)
16994 /* 47031 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I64x2),
16995 /* 47036 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16996 /* 47042 */ GIR_RootConstrainSelectedInstOperands,
16997 /* 47043 */ // GIR_Coverage, 183,
16998 /* 47043 */ GIR_Done,
16999 /* 47044 */ // Label 1544: @47044
17000 /* 47044 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1545*/ GIMT_Encode4(47068), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 185 //
17001 /* 47051 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
17002 /* 47055 */ // (splat_vector:{ *:[v2f64] } F64:{ *:[f64] }:$x) => (SPLAT_F64x2:{ *:[v2f64] } F64:{ *:[f64] }:$x)
17003 /* 47055 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_F64x2),
17004 /* 47060 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17005 /* 47066 */ GIR_RootConstrainSelectedInstOperands,
17006 /* 47067 */ // GIR_Coverage, 185,
17007 /* 47067 */ GIR_Done,
17008 /* 47068 */ // Label 1545: @47068
17009 /* 47068 */ GIM_Reject,
17010 /* 47069 */ // Label 1537: @47069
17011 /* 47069 */ GIM_Reject,
17012 /* 47070 */ // Label 1517: @47070
17013 /* 47070 */ GIM_Reject,
17014 /* 47071 */ // Label 71: @47071
17015 /* 47071 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1548*/ GIMT_Encode4(47150),
17016 /* 47082 */ /*GILLT_i32*//*Label 1546*/ GIMT_Encode4(47090),
17017 /* 47086 */ /*GILLT_i64*//*Label 1547*/ GIMT_Encode4(47120),
17018 /* 47090 */ // Label 1546: @47090
17019 /* 47090 */ GIM_Try, /*On fail goto*//*Label 1549*/ GIMT_Encode4(47119), // Rule ID 116 //
17020 /* 47095 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
17021 /* 47098 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
17022 /* 47102 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
17023 /* 47106 */ // (cttz:{ *:[i32] } I32:{ *:[i32] }:$src) => (CTZ_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
17024 /* 47106 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CTZ_I32),
17025 /* 47111 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17026 /* 47117 */ GIR_RootConstrainSelectedInstOperands,
17027 /* 47118 */ // GIR_Coverage, 116,
17028 /* 47118 */ GIR_Done,
17029 /* 47119 */ // Label 1549: @47119
17030 /* 47119 */ GIM_Reject,
17031 /* 47120 */ // Label 1547: @47120
17032 /* 47120 */ GIM_Try, /*On fail goto*//*Label 1550*/ GIMT_Encode4(47149), // Rule ID 117 //
17033 /* 47125 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
17034 /* 47128 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
17035 /* 47132 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
17036 /* 47136 */ // (cttz:{ *:[i64] } I64:{ *:[i64] }:$src) => (CTZ_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
17037 /* 47136 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CTZ_I64),
17038 /* 47141 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17039 /* 47147 */ GIR_RootConstrainSelectedInstOperands,
17040 /* 47148 */ // GIR_Coverage, 117,
17041 /* 47148 */ GIR_Done,
17042 /* 47149 */ // Label 1550: @47149
17043 /* 47149 */ GIM_Reject,
17044 /* 47150 */ // Label 1548: @47150
17045 /* 47150 */ GIM_Reject,
17046 /* 47151 */ // Label 72: @47151
17047 /* 47151 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1553*/ GIMT_Encode4(47230),
17048 /* 47162 */ /*GILLT_i32*//*Label 1551*/ GIMT_Encode4(47170),
17049 /* 47166 */ /*GILLT_i64*//*Label 1552*/ GIMT_Encode4(47200),
17050 /* 47170 */ // Label 1551: @47170
17051 /* 47170 */ GIM_Try, /*On fail goto*//*Label 1554*/ GIMT_Encode4(47199), // Rule ID 114 //
17052 /* 47175 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
17053 /* 47178 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
17054 /* 47182 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
17055 /* 47186 */ // (ctlz:{ *:[i32] } I32:{ *:[i32] }:$src) => (CLZ_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
17056 /* 47186 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CLZ_I32),
17057 /* 47191 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17058 /* 47197 */ GIR_RootConstrainSelectedInstOperands,
17059 /* 47198 */ // GIR_Coverage, 114,
17060 /* 47198 */ GIR_Done,
17061 /* 47199 */ // Label 1554: @47199
17062 /* 47199 */ GIM_Reject,
17063 /* 47200 */ // Label 1552: @47200
17064 /* 47200 */ GIM_Try, /*On fail goto*//*Label 1555*/ GIMT_Encode4(47229), // Rule ID 115 //
17065 /* 47205 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
17066 /* 47208 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
17067 /* 47212 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
17068 /* 47216 */ // (ctlz:{ *:[i64] } I64:{ *:[i64] }:$src) => (CLZ_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
17069 /* 47216 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CLZ_I64),
17070 /* 47221 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17071 /* 47227 */ GIR_RootConstrainSelectedInstOperands,
17072 /* 47228 */ // GIR_Coverage, 115,
17073 /* 47228 */ GIR_Done,
17074 /* 47229 */ // Label 1555: @47229
17075 /* 47229 */ GIM_Reject,
17076 /* 47230 */ // Label 1553: @47230
17077 /* 47230 */ GIM_Reject,
17078 /* 47231 */ // Label 73: @47231
17079 /* 47231 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(13), /*)*//*default:*//*Label 1559*/ GIMT_Encode4(47378),
17080 /* 47242 */ /*GILLT_i32*//*Label 1556*/ GIMT_Encode4(47286),
17081 /* 47246 */ /*GILLT_i64*//*Label 1557*/ GIMT_Encode4(47316), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
17082 /* 47282 */ /*GILLT_v16i8*//*Label 1558*/ GIMT_Encode4(47346),
17083 /* 47286 */ // Label 1556: @47286
17084 /* 47286 */ GIM_Try, /*On fail goto*//*Label 1560*/ GIMT_Encode4(47315), // Rule ID 118 //
17085 /* 47291 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
17086 /* 47294 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
17087 /* 47298 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
17088 /* 47302 */ // (ctpop:{ *:[i32] } I32:{ *:[i32] }:$src) => (POPCNT_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
17089 /* 47302 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::POPCNT_I32),
17090 /* 47307 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17091 /* 47313 */ GIR_RootConstrainSelectedInstOperands,
17092 /* 47314 */ // GIR_Coverage, 118,
17093 /* 47314 */ GIR_Done,
17094 /* 47315 */ // Label 1560: @47315
17095 /* 47315 */ GIM_Reject,
17096 /* 47316 */ // Label 1557: @47316
17097 /* 47316 */ GIM_Try, /*On fail goto*//*Label 1561*/ GIMT_Encode4(47345), // Rule ID 119 //
17098 /* 47321 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
17099 /* 47324 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
17100 /* 47328 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
17101 /* 47332 */ // (ctpop:{ *:[i64] } I64:{ *:[i64] }:$src) => (POPCNT_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
17102 /* 47332 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::POPCNT_I64),
17103 /* 47337 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17104 /* 47343 */ GIR_RootConstrainSelectedInstOperands,
17105 /* 47344 */ // GIR_Coverage, 119,
17106 /* 47344 */ GIR_Done,
17107 /* 47345 */ // Label 1561: @47345
17108 /* 47345 */ GIM_Reject,
17109 /* 47346 */ // Label 1558: @47346
17110 /* 47346 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1562*/ GIMT_Encode4(47377), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 257 //
17111 /* 47353 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
17112 /* 47356 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17113 /* 47360 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17114 /* 47364 */ // (ctpop:{ *:[v16i8] } V128:{ *:[v16i8] }:$v) => (POPCNT_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$v)
17115 /* 47364 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::POPCNT_I8x16),
17116 /* 47369 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17117 /* 47375 */ GIR_RootConstrainSelectedInstOperands,
17118 /* 47376 */ // GIR_Coverage, 257,
17119 /* 47376 */ GIR_Done,
17120 /* 47377 */ // Label 1562: @47377
17121 /* 47377 */ GIM_Reject,
17122 /* 47378 */ // Label 1559: @47378
17123 /* 47378 */ GIM_Reject,
17124 /* 47379 */ // Label 74: @47379
17125 /* 47379 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1568*/ GIMT_Encode4(47606),
17126 /* 47390 */ /*GILLT_f32*//*Label 1563*/ GIMT_Encode4(47450),
17127 /* 47394 */ /*GILLT_f64*//*Label 1564*/ GIMT_Encode4(47480), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
17128 /* 47438 */ /*GILLT_v8f16*//*Label 1565*/ GIMT_Encode4(47510),
17129 /* 47442 */ /*GILLT_v4f32*//*Label 1566*/ GIMT_Encode4(47542),
17130 /* 47446 */ /*GILLT_v2f64*//*Label 1567*/ GIMT_Encode4(47574),
17131 /* 47450 */ // Label 1563: @47450
17132 /* 47450 */ GIM_Try, /*On fail goto*//*Label 1569*/ GIMT_Encode4(47479), // Rule ID 144 //
17133 /* 47455 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
17134 /* 47458 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
17135 /* 47462 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
17136 /* 47466 */ // (fceil:{ *:[f32] } F32:{ *:[f32] }:$src) => (CEIL_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
17137 /* 47466 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F32),
17138 /* 47471 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17139 /* 47477 */ GIR_RootConstrainSelectedInstOperands,
17140 /* 47478 */ // GIR_Coverage, 144,
17141 /* 47478 */ GIR_Done,
17142 /* 47479 */ // Label 1569: @47479
17143 /* 47479 */ GIM_Reject,
17144 /* 47480 */ // Label 1564: @47480
17145 /* 47480 */ GIM_Try, /*On fail goto*//*Label 1570*/ GIMT_Encode4(47509), // Rule ID 145 //
17146 /* 47485 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
17147 /* 47488 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
17148 /* 47492 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
17149 /* 47496 */ // (fceil:{ *:[f64] } F64:{ *:[f64] }:$src) => (CEIL_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
17150 /* 47496 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F64),
17151 /* 47501 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17152 /* 47507 */ GIR_RootConstrainSelectedInstOperands,
17153 /* 47508 */ // GIR_Coverage, 145,
17154 /* 47508 */ GIR_Done,
17155 /* 47509 */ // Label 1570: @47509
17156 /* 47509 */ GIM_Reject,
17157 /* 47510 */ // Label 1565: @47510
17158 /* 47510 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1571*/ GIMT_Encode4(47541), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 341 //
17159 /* 47517 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
17160 /* 47520 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17161 /* 47524 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17162 /* 47528 */ // (fceil:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (CEIL_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
17163 /* 47528 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F16x8),
17164 /* 47533 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17165 /* 47539 */ GIR_RootConstrainSelectedInstOperands,
17166 /* 47540 */ // GIR_Coverage, 341,
17167 /* 47540 */ GIR_Done,
17168 /* 47541 */ // Label 1571: @47541
17169 /* 47541 */ GIM_Reject,
17170 /* 47542 */ // Label 1566: @47542
17171 /* 47542 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1572*/ GIMT_Encode4(47573), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 333 //
17172 /* 47549 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
17173 /* 47552 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17174 /* 47556 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17175 /* 47560 */ // (fceil:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (CEIL_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
17176 /* 47560 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F32x4),
17177 /* 47565 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17178 /* 47571 */ GIR_RootConstrainSelectedInstOperands,
17179 /* 47572 */ // GIR_Coverage, 333,
17180 /* 47572 */ GIR_Done,
17181 /* 47573 */ // Label 1572: @47573
17182 /* 47573 */ GIM_Reject,
17183 /* 47574 */ // Label 1567: @47574
17184 /* 47574 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1573*/ GIMT_Encode4(47605), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 337 //
17185 /* 47581 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
17186 /* 47584 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17187 /* 47588 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17188 /* 47592 */ // (fceil:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (CEIL_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
17189 /* 47592 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F64x2),
17190 /* 47597 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17191 /* 47603 */ GIR_RootConstrainSelectedInstOperands,
17192 /* 47604 */ // GIR_Coverage, 337,
17193 /* 47604 */ GIR_Done,
17194 /* 47605 */ // Label 1573: @47605
17195 /* 47605 */ GIM_Reject,
17196 /* 47606 */ // Label 1568: @47606
17197 /* 47606 */ GIM_Reject,
17198 /* 47607 */ // Label 75: @47607
17199 /* 47607 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1579*/ GIMT_Encode4(47834),
17200 /* 47618 */ /*GILLT_f32*//*Label 1574*/ GIMT_Encode4(47678),
17201 /* 47622 */ /*GILLT_f64*//*Label 1575*/ GIMT_Encode4(47708), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
17202 /* 47666 */ /*GILLT_v8f16*//*Label 1576*/ GIMT_Encode4(47738),
17203 /* 47670 */ /*GILLT_v4f32*//*Label 1577*/ GIMT_Encode4(47770),
17204 /* 47674 */ /*GILLT_v2f64*//*Label 1578*/ GIMT_Encode4(47802),
17205 /* 47678 */ // Label 1574: @47678
17206 /* 47678 */ GIM_Try, /*On fail goto*//*Label 1580*/ GIMT_Encode4(47707), // Rule ID 132 //
17207 /* 47683 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
17208 /* 47686 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
17209 /* 47690 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
17210 /* 47694 */ // (fsqrt:{ *:[f32] } F32:{ *:[f32] }:$src) => (SQRT_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
17211 /* 47694 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F32),
17212 /* 47699 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17213 /* 47705 */ GIR_RootConstrainSelectedInstOperands,
17214 /* 47706 */ // GIR_Coverage, 132,
17215 /* 47706 */ GIR_Done,
17216 /* 47707 */ // Label 1580: @47707
17217 /* 47707 */ GIM_Reject,
17218 /* 47708 */ // Label 1575: @47708
17219 /* 47708 */ GIM_Try, /*On fail goto*//*Label 1581*/ GIMT_Encode4(47737), // Rule ID 133 //
17220 /* 47713 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
17221 /* 47716 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
17222 /* 47720 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
17223 /* 47724 */ // (fsqrt:{ *:[f64] } F64:{ *:[f64] }:$src) => (SQRT_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
17224 /* 47724 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F64),
17225 /* 47729 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17226 /* 47735 */ GIR_RootConstrainSelectedInstOperands,
17227 /* 47736 */ // GIR_Coverage, 133,
17228 /* 47736 */ GIR_Done,
17229 /* 47737 */ // Label 1581: @47737
17230 /* 47737 */ GIM_Reject,
17231 /* 47738 */ // Label 1576: @47738
17232 /* 47738 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1582*/ GIMT_Encode4(47769), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 332 //
17233 /* 47745 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
17234 /* 47748 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17235 /* 47752 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17236 /* 47756 */ // (fsqrt:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (SQRT_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
17237 /* 47756 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F16x8),
17238 /* 47761 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17239 /* 47767 */ GIR_RootConstrainSelectedInstOperands,
17240 /* 47768 */ // GIR_Coverage, 332,
17241 /* 47768 */ GIR_Done,
17242 /* 47769 */ // Label 1582: @47769
17243 /* 47769 */ GIM_Reject,
17244 /* 47770 */ // Label 1577: @47770
17245 /* 47770 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1583*/ GIMT_Encode4(47801), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 330 //
17246 /* 47777 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
17247 /* 47780 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17248 /* 47784 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17249 /* 47788 */ // (fsqrt:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (SQRT_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
17250 /* 47788 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F32x4),
17251 /* 47793 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17252 /* 47799 */ GIR_RootConstrainSelectedInstOperands,
17253 /* 47800 */ // GIR_Coverage, 330,
17254 /* 47800 */ GIR_Done,
17255 /* 47801 */ // Label 1583: @47801
17256 /* 47801 */ GIM_Reject,
17257 /* 47802 */ // Label 1578: @47802
17258 /* 47802 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1584*/ GIMT_Encode4(47833), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 331 //
17259 /* 47809 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
17260 /* 47812 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17261 /* 47816 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17262 /* 47820 */ // (fsqrt:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (SQRT_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
17263 /* 47820 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F64x2),
17264 /* 47825 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17265 /* 47831 */ GIR_RootConstrainSelectedInstOperands,
17266 /* 47832 */ // GIR_Coverage, 331,
17267 /* 47832 */ GIR_Done,
17268 /* 47833 */ // Label 1584: @47833
17269 /* 47833 */ GIM_Reject,
17270 /* 47834 */ // Label 1579: @47834
17271 /* 47834 */ GIM_Reject,
17272 /* 47835 */ // Label 76: @47835
17273 /* 47835 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1590*/ GIMT_Encode4(48062),
17274 /* 47846 */ /*GILLT_f32*//*Label 1585*/ GIMT_Encode4(47906),
17275 /* 47850 */ /*GILLT_f64*//*Label 1586*/ GIMT_Encode4(47936), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
17276 /* 47894 */ /*GILLT_v8f16*//*Label 1587*/ GIMT_Encode4(47966),
17277 /* 47898 */ /*GILLT_v4f32*//*Label 1588*/ GIMT_Encode4(47998),
17278 /* 47902 */ /*GILLT_v2f64*//*Label 1589*/ GIMT_Encode4(48030),
17279 /* 47906 */ // Label 1585: @47906
17280 /* 47906 */ GIM_Try, /*On fail goto*//*Label 1591*/ GIMT_Encode4(47935), // Rule ID 146 //
17281 /* 47911 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
17282 /* 47914 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
17283 /* 47918 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
17284 /* 47922 */ // (ffloor:{ *:[f32] } F32:{ *:[f32] }:$src) => (FLOOR_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
17285 /* 47922 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F32),
17286 /* 47927 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17287 /* 47933 */ GIR_RootConstrainSelectedInstOperands,
17288 /* 47934 */ // GIR_Coverage, 146,
17289 /* 47934 */ GIR_Done,
17290 /* 47935 */ // Label 1591: @47935
17291 /* 47935 */ GIM_Reject,
17292 /* 47936 */ // Label 1586: @47936
17293 /* 47936 */ GIM_Try, /*On fail goto*//*Label 1592*/ GIMT_Encode4(47965), // Rule ID 147 //
17294 /* 47941 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
17295 /* 47944 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
17296 /* 47948 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
17297 /* 47952 */ // (ffloor:{ *:[f64] } F64:{ *:[f64] }:$src) => (FLOOR_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
17298 /* 47952 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F64),
17299 /* 47957 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17300 /* 47963 */ GIR_RootConstrainSelectedInstOperands,
17301 /* 47964 */ // GIR_Coverage, 147,
17302 /* 47964 */ GIR_Done,
17303 /* 47965 */ // Label 1592: @47965
17304 /* 47965 */ GIM_Reject,
17305 /* 47966 */ // Label 1587: @47966
17306 /* 47966 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1593*/ GIMT_Encode4(47997), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 342 //
17307 /* 47973 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
17308 /* 47976 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17309 /* 47980 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17310 /* 47984 */ // (ffloor:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (FLOOR_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
17311 /* 47984 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F16x8),
17312 /* 47989 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17313 /* 47995 */ GIR_RootConstrainSelectedInstOperands,
17314 /* 47996 */ // GIR_Coverage, 342,
17315 /* 47996 */ GIR_Done,
17316 /* 47997 */ // Label 1593: @47997
17317 /* 47997 */ GIM_Reject,
17318 /* 47998 */ // Label 1588: @47998
17319 /* 47998 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1594*/ GIMT_Encode4(48029), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 334 //
17320 /* 48005 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
17321 /* 48008 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17322 /* 48012 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17323 /* 48016 */ // (ffloor:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (FLOOR_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
17324 /* 48016 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F32x4),
17325 /* 48021 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17326 /* 48027 */ GIR_RootConstrainSelectedInstOperands,
17327 /* 48028 */ // GIR_Coverage, 334,
17328 /* 48028 */ GIR_Done,
17329 /* 48029 */ // Label 1594: @48029
17330 /* 48029 */ GIM_Reject,
17331 /* 48030 */ // Label 1589: @48030
17332 /* 48030 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1595*/ GIMT_Encode4(48061), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 338 //
17333 /* 48037 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
17334 /* 48040 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17335 /* 48044 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17336 /* 48048 */ // (ffloor:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (FLOOR_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
17337 /* 48048 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F64x2),
17338 /* 48053 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17339 /* 48059 */ GIR_RootConstrainSelectedInstOperands,
17340 /* 48060 */ // GIR_Coverage, 338,
17341 /* 48060 */ GIR_Done,
17342 /* 48061 */ // Label 1595: @48061
17343 /* 48061 */ GIM_Reject,
17344 /* 48062 */ // Label 1590: @48062
17345 /* 48062 */ GIM_Reject,
17346 /* 48063 */ // Label 77: @48063
17347 /* 48063 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1601*/ GIMT_Encode4(48276),
17348 /* 48074 */ /*GILLT_f32*//*Label 1596*/ GIMT_Encode4(48134),
17349 /* 48078 */ /*GILLT_f64*//*Label 1597*/ GIMT_Encode4(48160), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
17350 /* 48122 */ /*GILLT_v8f16*//*Label 1598*/ GIMT_Encode4(48186),
17351 /* 48126 */ /*GILLT_v4f32*//*Label 1599*/ GIMT_Encode4(48216),
17352 /* 48130 */ /*GILLT_v2f64*//*Label 1600*/ GIMT_Encode4(48246),
17353 /* 48134 */ // Label 1596: @48134
17354 /* 48134 */ GIM_Try, /*On fail goto*//*Label 1602*/ GIMT_Encode4(48159), // Rule ID 637 //
17355 /* 48139 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
17356 /* 48142 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
17357 /* 48146 */ // (frint:{ *:[f32] } f32:{ *:[f32] }:$src) => (NEAREST_F32:{ *:[f32] } f32:{ *:[f32] }:$src)
17358 /* 48146 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32),
17359 /* 48151 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17360 /* 48157 */ GIR_RootConstrainSelectedInstOperands,
17361 /* 48158 */ // GIR_Coverage, 637,
17362 /* 48158 */ GIR_Done,
17363 /* 48159 */ // Label 1602: @48159
17364 /* 48159 */ GIM_Reject,
17365 /* 48160 */ // Label 1597: @48160
17366 /* 48160 */ GIM_Try, /*On fail goto*//*Label 1603*/ GIMT_Encode4(48185), // Rule ID 638 //
17367 /* 48165 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
17368 /* 48168 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
17369 /* 48172 */ // (frint:{ *:[f64] } f64:{ *:[f64] }:$src) => (NEAREST_F64:{ *:[f64] } f64:{ *:[f64] }:$src)
17370 /* 48172 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64),
17371 /* 48177 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17372 /* 48183 */ GIR_RootConstrainSelectedInstOperands,
17373 /* 48184 */ // GIR_Coverage, 638,
17374 /* 48184 */ GIR_Done,
17375 /* 48185 */ // Label 1603: @48185
17376 /* 48185 */ GIM_Reject,
17377 /* 48186 */ // Label 1598: @48186
17378 /* 48186 */ GIM_Try, /*On fail goto*//*Label 1604*/ GIMT_Encode4(48215), // Rule ID 1166 //
17379 /* 48191 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
17380 /* 48194 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17381 /* 48198 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17382 /* 48202 */ // (frint:{ *:[v8f16] } V128:{ *:[v8f16] }:$src) => (NEAREST_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$src)
17383 /* 48202 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F16x8),
17384 /* 48207 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17385 /* 48213 */ GIR_RootConstrainSelectedInstOperands,
17386 /* 48214 */ // GIR_Coverage, 1166,
17387 /* 48214 */ GIR_Done,
17388 /* 48215 */ // Label 1604: @48215
17389 /* 48215 */ GIM_Reject,
17390 /* 48216 */ // Label 1599: @48216
17391 /* 48216 */ GIM_Try, /*On fail goto*//*Label 1605*/ GIMT_Encode4(48245), // Rule ID 1164 //
17392 /* 48221 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
17393 /* 48224 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17394 /* 48228 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17395 /* 48232 */ // (frint:{ *:[v4f32] } V128:{ *:[v4f32] }:$src) => (NEAREST_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$src)
17396 /* 48232 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32x4),
17397 /* 48237 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17398 /* 48243 */ GIR_RootConstrainSelectedInstOperands,
17399 /* 48244 */ // GIR_Coverage, 1164,
17400 /* 48244 */ GIR_Done,
17401 /* 48245 */ // Label 1605: @48245
17402 /* 48245 */ GIM_Reject,
17403 /* 48246 */ // Label 1600: @48246
17404 /* 48246 */ GIM_Try, /*On fail goto*//*Label 1606*/ GIMT_Encode4(48275), // Rule ID 1165 //
17405 /* 48251 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
17406 /* 48254 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17407 /* 48258 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17408 /* 48262 */ // (frint:{ *:[v2f64] } V128:{ *:[v2f64] }:$src) => (NEAREST_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$src)
17409 /* 48262 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64x2),
17410 /* 48267 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17411 /* 48273 */ GIR_RootConstrainSelectedInstOperands,
17412 /* 48274 */ // GIR_Coverage, 1165,
17413 /* 48274 */ GIR_Done,
17414 /* 48275 */ // Label 1606: @48275
17415 /* 48275 */ GIM_Reject,
17416 /* 48276 */ // Label 1601: @48276
17417 /* 48276 */ GIM_Reject,
17418 /* 48277 */ // Label 78: @48277
17419 /* 48277 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1612*/ GIMT_Encode4(48504),
17420 /* 48288 */ /*GILLT_f32*//*Label 1607*/ GIMT_Encode4(48348),
17421 /* 48292 */ /*GILLT_f64*//*Label 1608*/ GIMT_Encode4(48378), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
17422 /* 48336 */ /*GILLT_v8f16*//*Label 1609*/ GIMT_Encode4(48408),
17423 /* 48340 */ /*GILLT_v4f32*//*Label 1610*/ GIMT_Encode4(48440),
17424 /* 48344 */ /*GILLT_v2f64*//*Label 1611*/ GIMT_Encode4(48472),
17425 /* 48348 */ // Label 1607: @48348
17426 /* 48348 */ GIM_Try, /*On fail goto*//*Label 1613*/ GIMT_Encode4(48377), // Rule ID 150 //
17427 /* 48353 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
17428 /* 48356 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
17429 /* 48360 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
17430 /* 48364 */ // (fnearbyint:{ *:[f32] } F32:{ *:[f32] }:$src) => (NEAREST_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
17431 /* 48364 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32),
17432 /* 48369 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17433 /* 48375 */ GIR_RootConstrainSelectedInstOperands,
17434 /* 48376 */ // GIR_Coverage, 150,
17435 /* 48376 */ GIR_Done,
17436 /* 48377 */ // Label 1613: @48377
17437 /* 48377 */ GIM_Reject,
17438 /* 48378 */ // Label 1608: @48378
17439 /* 48378 */ GIM_Try, /*On fail goto*//*Label 1614*/ GIMT_Encode4(48407), // Rule ID 151 //
17440 /* 48383 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
17441 /* 48386 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
17442 /* 48390 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
17443 /* 48394 */ // (fnearbyint:{ *:[f64] } F64:{ *:[f64] }:$src) => (NEAREST_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
17444 /* 48394 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64),
17445 /* 48399 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17446 /* 48405 */ GIR_RootConstrainSelectedInstOperands,
17447 /* 48406 */ // GIR_Coverage, 151,
17448 /* 48406 */ GIR_Done,
17449 /* 48407 */ // Label 1614: @48407
17450 /* 48407 */ GIM_Reject,
17451 /* 48408 */ // Label 1609: @48408
17452 /* 48408 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1615*/ GIMT_Encode4(48439), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 344 //
17453 /* 48415 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
17454 /* 48418 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17455 /* 48422 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17456 /* 48426 */ // (fnearbyint:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (NEAREST_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
17457 /* 48426 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F16x8),
17458 /* 48431 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17459 /* 48437 */ GIR_RootConstrainSelectedInstOperands,
17460 /* 48438 */ // GIR_Coverage, 344,
17461 /* 48438 */ GIR_Done,
17462 /* 48439 */ // Label 1615: @48439
17463 /* 48439 */ GIM_Reject,
17464 /* 48440 */ // Label 1610: @48440
17465 /* 48440 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1616*/ GIMT_Encode4(48471), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 336 //
17466 /* 48447 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
17467 /* 48450 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17468 /* 48454 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17469 /* 48458 */ // (fnearbyint:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (NEAREST_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
17470 /* 48458 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32x4),
17471 /* 48463 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17472 /* 48469 */ GIR_RootConstrainSelectedInstOperands,
17473 /* 48470 */ // GIR_Coverage, 336,
17474 /* 48470 */ GIR_Done,
17475 /* 48471 */ // Label 1616: @48471
17476 /* 48471 */ GIM_Reject,
17477 /* 48472 */ // Label 1611: @48472
17478 /* 48472 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1617*/ GIMT_Encode4(48503), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 340 //
17479 /* 48479 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
17480 /* 48482 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17481 /* 48486 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17482 /* 48490 */ // (fnearbyint:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (NEAREST_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
17483 /* 48490 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64x2),
17484 /* 48495 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17485 /* 48501 */ GIR_RootConstrainSelectedInstOperands,
17486 /* 48502 */ // GIR_Coverage, 340,
17487 /* 48502 */ GIR_Done,
17488 /* 48503 */ // Label 1617: @48503
17489 /* 48503 */ GIM_Reject,
17490 /* 48504 */ // Label 1612: @48504
17491 /* 48504 */ GIM_Reject,
17492 /* 48505 */ // Label 79: @48505
17493 /* 48505 */ GIM_Try, /*On fail goto*//*Label 1618*/ GIMT_Encode4(48523), // Rule ID 22 //
17494 /* 48510 */ // (trap) => (UNREACHABLE)
17495 /* 48510 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::UNREACHABLE),
17496 /* 48515 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17497 /* 48521 */ GIR_RootConstrainSelectedInstOperands,
17498 /* 48522 */ // GIR_Coverage, 22,
17499 /* 48522 */ GIR_Done,
17500 /* 48523 */ // Label 1618: @48523
17501 /* 48523 */ GIM_Reject,
17502 /* 48524 */ // Label 80: @48524
17503 /* 48524 */ GIM_Try, /*On fail goto*//*Label 1619*/ GIMT_Encode4(48542), // Rule ID 23 //
17504 /* 48529 */ // (debugtrap) => (DEBUG_UNREACHABLE)
17505 /* 48529 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DEBUG_UNREACHABLE),
17506 /* 48534 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17507 /* 48540 */ GIR_RootConstrainSelectedInstOperands,
17508 /* 48541 */ // GIR_Coverage, 23,
17509 /* 48541 */ GIR_Done,
17510 /* 48542 */ // Label 1619: @48542
17511 /* 48542 */ GIM_Reject,
17512 /* 48543 */ // Label 81: @48543
17513 /* 48543 */ GIM_Reject,
17514 /* 48544 */ }; // Size: 48544 bytes
17515 return MatchTable0;
17516}
17517#undef GIMT_Encode2
17518#undef GIMT_Encode4
17519#undef GIMT_Encode8
17520
17521
17522#endif // GET_GLOBALISEL_IMPL
17523
17524#ifdef GET_GLOBALISEL_PREDICATES_DECL
17525
17526PredicateBitset AvailableModuleFeatures;
17527mutable PredicateBitset AvailableFunctionFeatures;
17528PredicateBitset getAvailableFeatures() const {
17529 return AvailableModuleFeatures | AvailableFunctionFeatures;
17530}
17531PredicateBitset
17532computeAvailableModuleFeatures(const WebAssemblySubtarget *Subtarget) const;
17533PredicateBitset
17534computeAvailableFunctionFeatures(const WebAssemblySubtarget *Subtarget,
17535 const MachineFunction *MF) const;
17536void setupGeneratedPerFunctionState(MachineFunction &MF) override;
17537
17538#endif // GET_GLOBALISEL_PREDICATES_DECL
17539
17540#ifdef GET_GLOBALISEL_PREDICATES_INIT
17541
17542AvailableModuleFeatures(computeAvailableModuleFeatures(&STI)),
17543AvailableFunctionFeatures()
17544
17545#endif // GET_GLOBALISEL_PREDICATES_INIT
17546
17547