1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Global Instruction Selector for the WebAssembly target *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_GLOBALISEL_PREDICATE_BITSET
10
11const unsigned MAX_SUBTARGET_PREDICATES = 16;
12using PredicateBitset = llvm::Bitset<MAX_SUBTARGET_PREDICATES>;
13
14#endif // GET_GLOBALISEL_PREDICATE_BITSET
15
16#ifdef GET_GLOBALISEL_TEMPORARIES_DECL
17
18 mutable MatcherState State;
19 typedef ComplexRendererFns(WebAssemblyInstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const;
20 typedef void(WebAssemblyInstructionSelector::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr &, int) const;
21 const ExecInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn> ExecInfo;
22 static WebAssemblyInstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[];
23 static WebAssemblyInstructionSelector::CustomRendererFn CustomRenderers[];
24 bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
25 bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override;
26 bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override;
27 const uint8_t *getMatchTable() const override;
28 bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI, const MatcherState &State) const override;
29 bool testMOPredicate_MO(unsigned PredicateID, const MachineOperand &MO, const MatcherState &State) const override;
30 bool testSimplePredicate(unsigned PredicateID) const override;
31 bool runCustomAction(unsigned FnID, const MatcherState &State, NewMIVector &OutMIs) const override;
32
33#endif // GET_GLOBALISEL_TEMPORARIES_DECL
34
35#ifdef GET_GLOBALISEL_TEMPORARIES_INIT
36
37, State(1),
38ExecInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers)
39
40#endif // GET_GLOBALISEL_TEMPORARIES_INIT
41
42#ifdef GET_GLOBALISEL_IMPL
43
44// LLT Objects.
45enum {
46 GILLT_s32,
47 GILLT_s64,
48 GILLT_i32,
49 GILLT_i64,
50 GILLT_f32,
51 GILLT_f64,
52 GILLT_p0s32,
53 GILLT_p0s64,
54 GILLT_v16s8,
55 GILLT_v8s16,
56 GILLT_v4s32,
57 GILLT_v2s64,
58 GILLT_v16i8,
59 GILLT_v8i16,
60 GILLT_v4i32,
61 GILLT_v2i64,
62 GILLT_v8f16,
63 GILLT_v4f32,
64 GILLT_v2f64,
65};
66const static size_t NumTypeObjects = 19;
67const static LLT TypeObjects[] = {
68 LLT::scalar(32),
69 LLT::scalar(64),
70 LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 32),
71 LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 64),
72 LLT(LLT::Kind::FLOAT, ElementCount::getFixed(0), 32, LLT::FpSemantics::S_IEEEsingle),
73 LLT(LLT::Kind::FLOAT, ElementCount::getFixed(0), 64, LLT::FpSemantics::S_IEEEdouble),
74 LLT::pointer(0, 32),
75 LLT::pointer(0, 64),
76 LLT::vector(ElementCount::getFixed(16), LLT::scalar(8)),
77 LLT::vector(ElementCount::getFixed(8), LLT::scalar(16)),
78 LLT::vector(ElementCount::getFixed(4), LLT::scalar(32)),
79 LLT::vector(ElementCount::getFixed(2), LLT::scalar(64)),
80 LLT::vector(ElementCount::getFixed(16), LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 8)),
81 LLT::vector(ElementCount::getFixed(8), LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 16)),
82 LLT::vector(ElementCount::getFixed(4), LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 32)),
83 LLT::vector(ElementCount::getFixed(2), LLT(LLT::Kind::INTEGER, ElementCount::getFixed(0), 64)),
84 LLT::vector(ElementCount::getFixed(8), LLT(LLT::Kind::FLOAT, ElementCount::getFixed(0), 16, LLT::FpSemantics::S_IEEEhalf)),
85 LLT::vector(ElementCount::getFixed(4), LLT(LLT::Kind::FLOAT, ElementCount::getFixed(0), 32, LLT::FpSemantics::S_IEEEsingle)),
86 LLT::vector(ElementCount::getFixed(2), LLT(LLT::Kind::FLOAT, ElementCount::getFixed(0), 64, LLT::FpSemantics::S_IEEEdouble)),
87};
88
89// Bits for subtarget features that participate in instruction matching.
90enum SubtargetFeatureBits : uint8_t {
91 Feature_IsPICBit = 13,
92 Feature_IsNotPICBit = 12,
93 Feature_HasAddr32Bit = 9,
94 Feature_HasAddr64Bit = 11,
95 Feature_HasAtomicsBit = 10,
96 Feature_HasBulkMemoryOptBit = 8,
97 Feature_HasExceptionHandlingBit = 0,
98 Feature_HasFP16Bit = 5,
99 Feature_HasNontrappingFPToIntBit = 2,
100 Feature_NotHasNontrappingFPToIntBit = 3,
101 Feature_HasReferenceTypesBit = 7,
102 Feature_HasRelaxedSIMDBit = 6,
103 Feature_HasSignExtBit = 1,
104 Feature_HasSIMD128Bit = 4,
105 Feature_HwMode0Bit = 14,
106 Feature_HwMode1Bit = 15,
107};
108
109PredicateBitset WebAssemblyInstructionSelector::
110computeAvailableModuleFeatures(const WebAssemblySubtarget *Subtarget) const {
111 PredicateBitset Features{};
112 if (TM.isPositionIndependent())
113 Features.set(Feature_IsPICBit);
114 if (!TM.isPositionIndependent())
115 Features.set(Feature_IsNotPICBit);
116 if (!Subtarget->hasAddr64())
117 Features.set(Feature_HasAddr32Bit);
118 if (Subtarget->hasAddr64())
119 Features.set(Feature_HasAddr64Bit);
120 if (Subtarget->hasAtomics())
121 Features.set(Feature_HasAtomicsBit);
122 if (Subtarget->hasBulkMemoryOpt())
123 Features.set(Feature_HasBulkMemoryOptBit);
124 if (Subtarget->hasExceptionHandling())
125 Features.set(Feature_HasExceptionHandlingBit);
126 if (Subtarget->hasFP16())
127 Features.set(Feature_HasFP16Bit);
128 if (Subtarget->hasNontrappingFPToInt())
129 Features.set(Feature_HasNontrappingFPToIntBit);
130 if (!Subtarget->hasNontrappingFPToInt())
131 Features.set(Feature_NotHasNontrappingFPToIntBit);
132 if (Subtarget->hasReferenceTypes())
133 Features.set(Feature_HasReferenceTypesBit);
134 if (Subtarget->hasRelaxedSIMD())
135 Features.set(Feature_HasRelaxedSIMDBit);
136 if (Subtarget->hasSignExt())
137 Features.set(Feature_HasSignExtBit);
138 if (Subtarget->hasSIMD128())
139 Features.set(Feature_HasSIMD128Bit);
140 if (!((Subtarget->hasAddr64())))
141 Features.set(Feature_HwMode0Bit);
142 if ((Subtarget->hasAddr64()))
143 Features.set(Feature_HwMode1Bit);
144 return Features;
145}
146
147void WebAssemblyInstructionSelector::setupGeneratedPerFunctionState(MachineFunction &MF) {
148 AvailableFunctionFeatures = computeAvailableFunctionFeatures((const WebAssemblySubtarget *)&MF.getSubtarget(), &MF);
149}
150PredicateBitset WebAssemblyInstructionSelector::
151computeAvailableFunctionFeatures(const WebAssemblySubtarget *Subtarget, const MachineFunction *MF) const {
152 PredicateBitset Features{};
153 return Features;
154}
155
156// Feature bitsets.
157enum {
158 GIFBS_Invalid,
159 GIFBS_HasAddr32,
160 GIFBS_HasAddr32_HwMode0,
161 GIFBS_HasAddr64,
162 GIFBS_HasAddr64_HwMode1,
163 GIFBS_HasBulkMemoryOpt,
164 GIFBS_HasFP16,
165 GIFBS_HasNontrappingFPToInt,
166 GIFBS_HasRelaxedSIMD,
167 GIFBS_HasSIMD128,
168 GIFBS_HasSignExt,
169 GIFBS_NotHasNontrappingFPToInt,
170 GIFBS_HasAddr32_HasAtomics,
171 GIFBS_HasAddr64_HasAtomics,
172 GIFBS_HasFP16_HasSIMD128,
173 GIFBS_HasRelaxedSIMD_HasSIMD128,
174};
175constexpr static PredicateBitset FeatureBitsets[] {
176 {}, // GIFBS_Invalid
177 {Feature_HasAddr32Bit, },
178 {Feature_HasAddr32Bit, Feature_HwMode0Bit, },
179 {Feature_HasAddr64Bit, },
180 {Feature_HasAddr64Bit, Feature_HwMode1Bit, },
181 {Feature_HasBulkMemoryOptBit, },
182 {Feature_HasFP16Bit, },
183 {Feature_HasNontrappingFPToIntBit, },
184 {Feature_HasRelaxedSIMDBit, },
185 {Feature_HasSIMD128Bit, },
186 {Feature_HasSignExtBit, },
187 {Feature_NotHasNontrappingFPToIntBit, },
188 {Feature_HasAddr32Bit, Feature_HasAtomicsBit, },
189 {Feature_HasAddr64Bit, Feature_HasAtomicsBit, },
190 {Feature_HasFP16Bit, Feature_HasSIMD128Bit, },
191 {Feature_HasRelaxedSIMDBit, Feature_HasSIMD128Bit, },
192};
193
194// ComplexPattern predicates.
195enum {
196 GICP_Invalid,
197 GICP_gi_AddrOps32,
198 GICP_gi_AddrOps64,
199};
200// See constructor for table contents
201
202WebAssemblyInstructionSelector::ComplexMatcherMemFn
203WebAssemblyInstructionSelector::ComplexPredicateFns[] = {
204 nullptr, // GICP_Invalid
205 &WebAssemblyInstructionSelector::selectAddrOperands32, // gi_AddrOps32
206 &WebAssemblyInstructionSelector::selectAddrOperands64, // gi_AddrOps64
207};
208
209// PatFrag predicates.
210enum {
211 GICXXPred_MI_Predicate_fadd_contract = GICXXPred_Invalid + 1,
212 GICXXPred_MI_Predicate_ffloor_nnan,
213 GICXXPred_MI_Predicate_fmul_contract,
214 GICXXPred_MI_Predicate_fsub_contract,
215 GICXXPred_MI_Predicate_or_disjoint,
216};
217bool WebAssemblyInstructionSelector::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI, const MatcherState &State) const {
218 const MachineFunction &MF = *MI.getParent()->getParent();
219 const MachineRegisterInfo &MRI = MF.getRegInfo();
220 const auto &Operands = State.RecordedOperands;
221 (void)Operands;
222 (void)MRI;
223 switch (PredicateID) {
224 case GICXXPred_MI_Predicate_fadd_contract: {
225
226 return MI.getFlag(MachineInstr::FmContract);
227
228 }
229 case GICXXPred_MI_Predicate_ffloor_nnan: {
230
231 return MI.getFlag(MachineInstr::FmNoNans);
232
233 }
234 case GICXXPred_MI_Predicate_fmul_contract: {
235
236 return MI.getFlag(MachineInstr::FmContract);
237
238 }
239 case GICXXPred_MI_Predicate_fsub_contract: {
240
241 return MI.getFlag(MachineInstr::FmContract);
242
243 }
244 case GICXXPred_MI_Predicate_or_disjoint: {
245
246 return MI.getFlag(MachineInstr::Disjoint);
247
248 }
249 }
250 llvm_unreachable("Unknown predicate");
251 return false;
252}
253// PatFrag predicates.
254bool WebAssemblyInstructionSelector::testMOPredicate_MO(unsigned PredicateID, const MachineOperand & MO, const MatcherState &State) const {
255 const auto &Operands = State.RecordedOperands;
256 Register Reg = MO.getReg();
257 (void)Operands;
258 (void)Reg;
259 llvm_unreachable("Unknown predicate");
260 return false;
261}
262// PatFrag predicates.
263enum {
264 GICXXPred_I64_Predicate_FPNoSaturation = GICXXPred_Invalid + 1,
265 GICXXPred_I64_Predicate_Float8E4M3FN,
266 GICXXPred_I64_Predicate_Float8E5M2,
267 GICXXPred_I64_Predicate_ImmI8,
268 GICXXPred_I64_Predicate_ImmI16,
269 GICXXPred_I64_Predicate_LaneIdx2,
270 GICXXPred_I64_Predicate_LaneIdx4,
271 GICXXPred_I64_Predicate_LaneIdx8,
272 GICXXPred_I64_Predicate_LaneIdx16,
273 GICXXPred_I64_Predicate_LaneIdx32,
274 GICXXPred_I64_Predicate_NearestTiesToEven,
275};
276bool WebAssemblyInstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
277 switch (PredicateID) {
278 case GICXXPred_I64_Predicate_FPNoSaturation: {
279 return Imm == 0;
280 }
281 case GICXXPred_I64_Predicate_Float8E4M3FN: {
282 return Imm == APFloatBase::S_Float8E4M3FN;
283 }
284 case GICXXPred_I64_Predicate_Float8E5M2: {
285 return Imm == APFloatBase::S_Float8E5M2;
286 }
287 case GICXXPred_I64_Predicate_ImmI8: {
288 return -(1 << (8 - 1)) <= Imm && Imm < (1 << 8);
289 }
290 case GICXXPred_I64_Predicate_ImmI16: {
291 return -(1 << (16 - 1)) <= Imm && Imm < (1 << 16);
292 }
293 case GICXXPred_I64_Predicate_LaneIdx2: {
294 return 0 <= Imm && Imm < 2;
295 }
296 case GICXXPred_I64_Predicate_LaneIdx4: {
297 return 0 <= Imm && Imm < 4;
298 }
299 case GICXXPred_I64_Predicate_LaneIdx8: {
300 return 0 <= Imm && Imm < 8;
301 }
302 case GICXXPred_I64_Predicate_LaneIdx16: {
303 return 0 <= Imm && Imm < 16;
304 }
305 case GICXXPred_I64_Predicate_LaneIdx32: {
306 return 0 <= Imm && Imm < 32;
307 }
308 case GICXXPred_I64_Predicate_NearestTiesToEven: {
309 return Imm == static_cast<int>(RoundingMode::NearestTiesToEven);
310 }
311 }
312 llvm_unreachable("Unknown predicate");
313 return false;
314}
315// PatFrag predicates.
316bool WebAssemblyInstructionSelector::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const {
317 llvm_unreachable("Unknown predicate");
318 return false;
319}
320// PatFrag predicates.
321bool WebAssemblyInstructionSelector::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const {
322 llvm_unreachable("Unknown predicate");
323 return false;
324}
325bool WebAssemblyInstructionSelector::testSimplePredicate(unsigned) const {
326 llvm_unreachable("WebAssemblyInstructionSelector does not support simple predicates!");
327 return false;
328}
329// Custom renderers.
330enum {
331 GICR_Invalid,
332 GICR_renderFrameIndex,
333};
334WebAssemblyInstructionSelector::CustomRendererFn
335WebAssemblyInstructionSelector::CustomRenderers[] = {
336 nullptr, // GICR_Invalid
337 &WebAssemblyInstructionSelector::renderFrameIndex,
338};
339
340bool WebAssemblyInstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const {
341 const PredicateBitset AvailableFeatures = getAvailableFeatures();
342 MachineIRBuilder B(I);
343 State.MIs.clear();
344 State.MIs.push_back(&I);
345
346 if (executeMatchTable(*this, State, ExecInfo, B, getMatchTable(), TII, MF->getRegInfo(), TRI, RBI, AvailableFeatures, &CoverageInfo)) {
347 return true;
348 }
349
350 return false;
351}
352
353bool WebAssemblyInstructionSelector::runCustomAction(unsigned, const MatcherState&, NewMIVector &) const {
354 llvm_unreachable("WebAssemblyInstructionSelector does not support custom C++ actions!");
355}
356#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
357#define GIMT_Encode2(Val) uint8_t(Val), uint8_t((Val) >> 8)
358#define GIMT_Encode4(Val) uint8_t(Val), uint8_t((Val) >> 8), uint8_t((Val) >> 16), uint8_t((Val) >> 24)
359#define GIMT_Encode8(Val) uint8_t(Val), uint8_t((Val) >> 8), uint8_t((Val) >> 16), uint8_t((Val) >> 24), uint8_t(uint64_t(Val) >> 32), uint8_t(uint64_t(Val) >> 40), uint8_t(uint64_t(Val) >> 48), uint8_t(uint64_t(Val) >> 56)
360#else
361#define GIMT_Encode2(Val) uint8_t((Val) >> 8), uint8_t(Val)
362#define GIMT_Encode4(Val) uint8_t((Val) >> 24), uint8_t((Val) >> 16), uint8_t((Val) >> 8), uint8_t(Val)
363#define GIMT_Encode8(Val) uint8_t(uint64_t(Val) >> 56), uint8_t(uint64_t(Val) >> 48), uint8_t(uint64_t(Val) >> 40), uint8_t(uint64_t(Val) >> 32), uint8_t((Val) >> 24), uint8_t((Val) >> 16), uint8_t((Val) >> 8), uint8_t(Val)
364#endif
365const uint8_t *WebAssemblyInstructionSelector::getMatchTable() const {
366 constexpr static uint8_t MatchTable0[] = {
367 /* 0 */ GIM_SwitchOpcode, /*MI*/0, /*[*/GIMT_Encode2(55), GIMT_Encode2(313), /*)*//*default:*//*Label 81*/ GIMT_Encode4(51177),
368 /* 10 */ /*TargetOpcode::G_ADD*//*Label 0*/ GIMT_Encode4(1042),
369 /* 14 */ /*TargetOpcode::G_SUB*//*Label 1*/ GIMT_Encode4(1514),
370 /* 18 */ /*TargetOpcode::G_MUL*//*Label 2*/ GIMT_Encode4(2000),
371 /* 22 */ /*TargetOpcode::G_SDIV*//*Label 3*/ GIMT_Encode4(2259),
372 /* 26 */ /*TargetOpcode::G_UDIV*//*Label 4*/ GIMT_Encode4(2353),
373 /* 30 */ /*TargetOpcode::G_SREM*//*Label 5*/ GIMT_Encode4(2447),
374 /* 34 */ /*TargetOpcode::G_UREM*//*Label 6*/ GIMT_Encode4(2541), GIMT_Encode4(0), GIMT_Encode4(0),
375 /* 46 */ /*TargetOpcode::G_AND*//*Label 7*/ GIMT_Encode4(2635),
376 /* 50 */ /*TargetOpcode::G_OR*//*Label 8*/ GIMT_Encode4(3917),
377 /* 54 */ /*TargetOpcode::G_XOR*//*Label 9*/ GIMT_Encode4(8103), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
378 /* 70 */ /*TargetOpcode::G_UAVGCEIL*//*Label 10*/ GIMT_Encode4(15225), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
379 /* 90 */ /*TargetOpcode::G_FRAME_INDEX*//*Label 11*/ GIMT_Encode4(15319), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
380 /* 122 */ /*TargetOpcode::G_BUILD_VECTOR*//*Label 12*/ GIMT_Encode4(15380), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
381 /* 142 */ /*TargetOpcode::G_BITCAST*//*Label 13*/ GIMT_Encode4(16129), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
382 /* 158 */ /*TargetOpcode::G_INTRINSIC_TRUNC*//*Label 14*/ GIMT_Encode4(17591), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
383 /* 174 */ /*TargetOpcode::G_INTRINSIC_ROUNDEVEN*//*Label 15*/ GIMT_Encode4(17819), GIMT_Encode4(0), GIMT_Encode4(0),
384 /* 186 */ /*TargetOpcode::G_LOAD*//*Label 16*/ GIMT_Encode4(18033),
385 /* 190 */ /*TargetOpcode::G_SEXTLOAD*//*Label 17*/ GIMT_Encode4(19940),
386 /* 194 */ /*TargetOpcode::G_ZEXTLOAD*//*Label 18*/ GIMT_Encode4(20515),
387 /* 198 */ /*TargetOpcode::G_FPEXTLOAD*//*Label 19*/ GIMT_Encode4(21090), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
388 /* 214 */ /*TargetOpcode::G_STORE*//*Label 20*/ GIMT_Encode4(21208),
389 /* 218 */ /*TargetOpcode::G_FPTRUNCSTORE*//*Label 21*/ GIMT_Encode4(22965), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
390 /* 334 */ /*TargetOpcode::G_BRCOND*//*Label 22*/ GIMT_Encode4(23083), GIMT_Encode4(0), GIMT_Encode4(0),
391 /* 346 */ /*TargetOpcode::G_INTRINSIC*//*Label 23*/ GIMT_Encode4(23111),
392 /* 350 */ /*TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS*//*Label 24*/ GIMT_Encode4(26752), GIMT_Encode4(0), GIMT_Encode4(0),
393 /* 362 */ /*TargetOpcode::G_ANYEXT*//*Label 25*/ GIMT_Encode4(27911),
394 /* 366 */ /*TargetOpcode::G_TRUNC*//*Label 26*/ GIMT_Encode4(27944), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
395 /* 382 */ /*TargetOpcode::G_CONSTANT*//*Label 27*/ GIMT_Encode4(27977),
396 /* 386 */ /*TargetOpcode::G_FCONSTANT*//*Label 28*/ GIMT_Encode4(28043), GIMT_Encode4(0), GIMT_Encode4(0),
397 /* 398 */ /*TargetOpcode::G_SEXT*//*Label 29*/ GIMT_Encode4(28109),
398 /* 402 */ /*TargetOpcode::G_SEXT_INREG*//*Label 30*/ GIMT_Encode4(28142),
399 /* 406 */ /*TargetOpcode::G_ZEXT*//*Label 31*/ GIMT_Encode4(28348),
400 /* 410 */ /*TargetOpcode::G_SHL*//*Label 32*/ GIMT_Encode4(28381),
401 /* 414 */ /*TargetOpcode::G_LSHR*//*Label 33*/ GIMT_Encode4(28679),
402 /* 418 */ /*TargetOpcode::G_ASHR*//*Label 34*/ GIMT_Encode4(28977), GIMT_Encode4(0), GIMT_Encode4(0),
403 /* 430 */ /*TargetOpcode::G_ROTR*//*Label 35*/ GIMT_Encode4(29275),
404 /* 434 */ /*TargetOpcode::G_ROTL*//*Label 36*/ GIMT_Encode4(29485),
405 /* 438 */ /*TargetOpcode::G_ICMP*//*Label 37*/ GIMT_Encode4(29695),
406 /* 442 */ /*TargetOpcode::G_FCMP*//*Label 38*/ GIMT_Encode4(34583), GIMT_Encode4(0), GIMT_Encode4(0),
407 /* 454 */ /*TargetOpcode::G_SELECT*//*Label 39*/ GIMT_Encode4(35746), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
408 /* 506 */ /*TargetOpcode::G_UADDSAT*//*Label 40*/ GIMT_Encode4(40272),
409 /* 510 */ /*TargetOpcode::G_SADDSAT*//*Label 41*/ GIMT_Encode4(40370),
410 /* 514 */ /*TargetOpcode::G_USUBSAT*//*Label 42*/ GIMT_Encode4(40468),
411 /* 518 */ /*TargetOpcode::G_SSUBSAT*//*Label 43*/ GIMT_Encode4(40566), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
412 /* 562 */ /*TargetOpcode::G_FADD*//*Label 44*/ GIMT_Encode4(40664),
413 /* 566 */ /*TargetOpcode::G_FSUB*//*Label 45*/ GIMT_Encode4(41235),
414 /* 570 */ /*TargetOpcode::G_FMUL*//*Label 46*/ GIMT_Encode4(41660),
415 /* 574 */ /*TargetOpcode::G_FMA*//*Label 47*/ GIMT_Encode4(41923), GIMT_Encode4(0),
416 /* 582 */ /*TargetOpcode::G_FDIV*//*Label 48*/ GIMT_Encode4(42092), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
417 /* 634 */ /*TargetOpcode::G_FNEG*//*Label 49*/ GIMT_Encode4(42355),
418 /* 638 */ /*TargetOpcode::G_FPEXT*//*Label 50*/ GIMT_Encode4(42583),
419 /* 642 */ /*TargetOpcode::G_FPTRUNC*//*Label 51*/ GIMT_Encode4(42616),
420 /* 646 */ /*TargetOpcode::G_FPTOSI*//*Label 52*/ GIMT_Encode4(42649),
421 /* 650 */ /*TargetOpcode::G_FPTOUI*//*Label 53*/ GIMT_Encode4(43063),
422 /* 654 */ /*TargetOpcode::G_SITOFP*//*Label 54*/ GIMT_Encode4(43477),
423 /* 658 */ /*TargetOpcode::G_UITOFP*//*Label 55*/ GIMT_Encode4(43757),
424 /* 662 */ /*TargetOpcode::G_FPTOSI_SAT*//*Label 56*/ GIMT_Encode4(44037),
425 /* 666 */ /*TargetOpcode::G_FPTOUI_SAT*//*Label 57*/ GIMT_Encode4(44309),
426 /* 670 */ /*TargetOpcode::G_FABS*//*Label 58*/ GIMT_Encode4(44581),
427 /* 674 */ /*TargetOpcode::G_FCOPYSIGN*//*Label 59*/ GIMT_Encode4(44809), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
428 /* 702 */ /*TargetOpcode::G_FMINIMUM*//*Label 60*/ GIMT_Encode4(45057),
429 /* 706 */ /*TargetOpcode::G_FMAXIMUM*//*Label 61*/ GIMT_Encode4(45320), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
430 /* 750 */ /*TargetOpcode::G_PTR_ADD*//*Label 62*/ GIMT_Encode4(45583), GIMT_Encode4(0),
431 /* 758 */ /*TargetOpcode::G_SMIN*//*Label 63*/ GIMT_Encode4(45669),
432 /* 762 */ /*TargetOpcode::G_SMAX*//*Label 64*/ GIMT_Encode4(45810),
433 /* 766 */ /*TargetOpcode::G_UMIN*//*Label 65*/ GIMT_Encode4(45951),
434 /* 770 */ /*TargetOpcode::G_UMAX*//*Label 66*/ GIMT_Encode4(46092),
435 /* 774 */ /*TargetOpcode::G_ABS*//*Label 67*/ GIMT_Encode4(46233), GIMT_Encode4(0), GIMT_Encode4(0),
436 /* 786 */ /*TargetOpcode::G_BR*//*Label 68*/ GIMT_Encode4(46389), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
437 /* 806 */ /*TargetOpcode::G_INSERT_VECTOR_ELT*//*Label 69*/ GIMT_Encode4(46411), GIMT_Encode4(0), GIMT_Encode4(0),
438 /* 818 */ /*TargetOpcode::G_SPLAT_VECTOR*//*Label 70*/ GIMT_Encode4(48435), GIMT_Encode4(0), GIMT_Encode4(0),
439 /* 830 */ /*TargetOpcode::G_CTTZ*//*Label 71*/ GIMT_Encode4(49705), GIMT_Encode4(0),
440 /* 838 */ /*TargetOpcode::G_CTLZ*//*Label 72*/ GIMT_Encode4(49785), GIMT_Encode4(0), GIMT_Encode4(0),
441 /* 850 */ /*TargetOpcode::G_CTPOP*//*Label 73*/ GIMT_Encode4(49865), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
442 /* 874 */ /*TargetOpcode::G_FCEIL*//*Label 74*/ GIMT_Encode4(50013), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
443 /* 922 */ /*TargetOpcode::G_FSQRT*//*Label 75*/ GIMT_Encode4(50241),
444 /* 926 */ /*TargetOpcode::G_FFLOOR*//*Label 76*/ GIMT_Encode4(50469),
445 /* 930 */ /*TargetOpcode::G_FRINT*//*Label 77*/ GIMT_Encode4(50697),
446 /* 934 */ /*TargetOpcode::G_FNEARBYINT*//*Label 78*/ GIMT_Encode4(50911), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
447 /* 1034 */ /*TargetOpcode::G_TRAP*//*Label 79*/ GIMT_Encode4(51139),
448 /* 1038 */ /*TargetOpcode::G_DEBUGTRAP*//*Label 80*/ GIMT_Encode4(51158),
449 /* 1042 */ // Label 0: @1042
450 /* 1042 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 88*/ GIMT_Encode4(1513),
451 /* 1053 */ /*GILLT_i32*//*Label 82*/ GIMT_Encode4(1109),
452 /* 1057 */ /*GILLT_i64*//*Label 83*/ GIMT_Encode4(1146), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
453 /* 1093 */ /*GILLT_v16i8*//*Label 84*/ GIMT_Encode4(1183),
454 /* 1097 */ /*GILLT_v8i16*//*Label 85*/ GIMT_Encode4(1222),
455 /* 1101 */ /*GILLT_v4i32*//*Label 86*/ GIMT_Encode4(1261),
456 /* 1105 */ /*GILLT_v2i64*//*Label 87*/ GIMT_Encode4(1474),
457 /* 1109 */ // Label 82: @1109
458 /* 1109 */ GIM_Try, /*On fail goto*//*Label 89*/ GIMT_Encode4(1145), // Rule ID 64 //
459 /* 1114 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
460 /* 1117 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
461 /* 1120 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
462 /* 1124 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
463 /* 1128 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
464 /* 1132 */ // (add:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (ADD_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
465 /* 1132 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I32),
466 /* 1137 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
467 /* 1143 */ GIR_RootConstrainSelectedInstOperands,
468 /* 1144 */ // GIR_Coverage, 64,
469 /* 1144 */ GIR_Done,
470 /* 1145 */ // Label 89: @1145
471 /* 1145 */ GIM_Reject,
472 /* 1146 */ // Label 83: @1146
473 /* 1146 */ GIM_Try, /*On fail goto*//*Label 90*/ GIMT_Encode4(1182), // Rule ID 65 //
474 /* 1151 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
475 /* 1154 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
476 /* 1157 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
477 /* 1161 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
478 /* 1165 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
479 /* 1169 */ // (add:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (ADD_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
480 /* 1169 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I64),
481 /* 1174 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
482 /* 1180 */ GIR_RootConstrainSelectedInstOperands,
483 /* 1181 */ // GIR_Coverage, 65,
484 /* 1181 */ GIR_Done,
485 /* 1182 */ // Label 90: @1182
486 /* 1182 */ GIM_Reject,
487 /* 1183 */ // Label 84: @1183
488 /* 1183 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 91*/ GIMT_Encode4(1221), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 278 //
489 /* 1190 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
490 /* 1193 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
491 /* 1196 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
492 /* 1200 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
493 /* 1204 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
494 /* 1208 */ // (add:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (ADD_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
495 /* 1208 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I8x16),
496 /* 1213 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
497 /* 1219 */ GIR_RootConstrainSelectedInstOperands,
498 /* 1220 */ // GIR_Coverage, 278,
499 /* 1220 */ GIR_Done,
500 /* 1221 */ // Label 91: @1221
501 /* 1221 */ GIM_Reject,
502 /* 1222 */ // Label 85: @1222
503 /* 1222 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 92*/ GIMT_Encode4(1260), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 279 //
504 /* 1229 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
505 /* 1232 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
506 /* 1235 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
507 /* 1239 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
508 /* 1243 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
509 /* 1247 */ // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (ADD_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
510 /* 1247 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I16x8),
511 /* 1252 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
512 /* 1258 */ GIR_RootConstrainSelectedInstOperands,
513 /* 1259 */ // GIR_Coverage, 279,
514 /* 1259 */ GIR_Done,
515 /* 1260 */ // Label 92: @1260
516 /* 1260 */ GIM_Reject,
517 /* 1261 */ // Label 86: @1261
518 /* 1261 */ GIM_Try, /*On fail goto*//*Label 93*/ GIMT_Encode4(1473),
519 /* 1266 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
520 /* 1269 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
521 /* 1272 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
522 /* 1276 */ GIM_Try, /*On fail goto*//*Label 94*/ GIMT_Encode4(1359), // Rule ID 1289 //
523 /* 1281 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
524 /* 1285 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
525 /* 1289 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
526 /* 1292 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_signed),
527 /* 1297 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
528 /* 1301 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
529 /* 1305 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
530 /* 1309 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
531 /* 1313 */ GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
532 /* 1316 */ GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_signed),
533 /* 1321 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
534 /* 1325 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
535 /* 1329 */ GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v16i8,
536 /* 1333 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
537 /* 1337 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
538 /* 1339 */ // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 14908:{ *:[iPTR] }, (intrinsic_wo_chain:{ *:[v8i16] } 14939:{ *:[iPTR] }, v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs)), V128:{ *:[v4i32] }:$acc) => (RELAXED_DOT_ADD:{ *:[v4i32] } v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc)
539 /* 1339 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_ADD),
540 /* 1342 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
541 /* 1344 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // lhs
542 /* 1348 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // rhs
543 /* 1352 */ GIR_RootToRootCopy, /*OpIdx*/2, // acc
544 /* 1354 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
545 /* 1357 */ GIR_RootConstrainSelectedInstOperands,
546 /* 1358 */ // GIR_Coverage, 1289,
547 /* 1358 */ GIR_EraseRootFromParent_Done,
548 /* 1359 */ // Label 94: @1359
549 /* 1359 */ GIM_Try, /*On fail goto*//*Label 95*/ GIMT_Encode4(1472),
550 /* 1364 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
551 /* 1368 */ GIM_Try, /*On fail goto*//*Label 96*/ GIMT_Encode4(1447), // Rule ID 1811 //
552 /* 1373 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
553 /* 1377 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
554 /* 1381 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
555 /* 1384 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_signed),
556 /* 1389 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
557 /* 1393 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
558 /* 1397 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
559 /* 1401 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
560 /* 1405 */ GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
561 /* 1408 */ GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_signed),
562 /* 1413 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
563 /* 1417 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
564 /* 1421 */ GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v16i8,
565 /* 1425 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
566 /* 1427 */ // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$acc, (intrinsic_wo_chain:{ *:[v4i32] } 14908:{ *:[iPTR] }, (intrinsic_wo_chain:{ *:[v8i16] } 14939:{ *:[iPTR] }, v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs))) => (RELAXED_DOT_ADD:{ *:[v4i32] } v16i8:{ *:[v16i8] }:$lhs, v16i8:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc)
567 /* 1427 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_ADD),
568 /* 1430 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
569 /* 1432 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // lhs
570 /* 1436 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // rhs
571 /* 1440 */ GIR_RootToRootCopy, /*OpIdx*/1, // acc
572 /* 1442 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
573 /* 1445 */ GIR_RootConstrainSelectedInstOperands,
574 /* 1446 */ // GIR_Coverage, 1811,
575 /* 1446 */ GIR_EraseRootFromParent_Done,
576 /* 1447 */ // Label 96: @1447
577 /* 1447 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 97*/ GIMT_Encode4(1471), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 280 //
578 /* 1454 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
579 /* 1458 */ // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (ADD_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
580 /* 1458 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I32x4),
581 /* 1463 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
582 /* 1469 */ GIR_RootConstrainSelectedInstOperands,
583 /* 1470 */ // GIR_Coverage, 280,
584 /* 1470 */ GIR_Done,
585 /* 1471 */ // Label 97: @1471
586 /* 1471 */ GIM_Reject,
587 /* 1472 */ // Label 95: @1472
588 /* 1472 */ GIM_Reject,
589 /* 1473 */ // Label 93: @1473
590 /* 1473 */ GIM_Reject,
591 /* 1474 */ // Label 87: @1474
592 /* 1474 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 98*/ GIMT_Encode4(1512), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 281 //
593 /* 1481 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
594 /* 1484 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
595 /* 1487 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
596 /* 1491 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
597 /* 1495 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
598 /* 1499 */ // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (ADD_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
599 /* 1499 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I64x2),
600 /* 1504 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
601 /* 1510 */ GIR_RootConstrainSelectedInstOperands,
602 /* 1511 */ // GIR_Coverage, 281,
603 /* 1511 */ GIR_Done,
604 /* 1512 */ // Label 98: @1512
605 /* 1512 */ GIM_Reject,
606 /* 1513 */ // Label 88: @1513
607 /* 1513 */ GIM_Reject,
608 /* 1514 */ // Label 1: @1514
609 /* 1514 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 105*/ GIMT_Encode4(1999),
610 /* 1525 */ /*GILLT_i32*//*Label 99*/ GIMT_Encode4(1581),
611 /* 1529 */ /*GILLT_i64*//*Label 100*/ GIMT_Encode4(1618), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
612 /* 1565 */ /*GILLT_v16i8*//*Label 101*/ GIMT_Encode4(1655),
613 /* 1569 */ /*GILLT_v8i16*//*Label 102*/ GIMT_Encode4(1741),
614 /* 1573 */ /*GILLT_v4i32*//*Label 103*/ GIMT_Encode4(1827),
615 /* 1577 */ /*GILLT_v2i64*//*Label 104*/ GIMT_Encode4(1913),
616 /* 1581 */ // Label 99: @1581
617 /* 1581 */ GIM_Try, /*On fail goto*//*Label 106*/ GIMT_Encode4(1617), // Rule ID 66 //
618 /* 1586 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
619 /* 1589 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
620 /* 1592 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
621 /* 1596 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
622 /* 1600 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
623 /* 1604 */ // (sub:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SUB_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
624 /* 1604 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I32),
625 /* 1609 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
626 /* 1615 */ GIR_RootConstrainSelectedInstOperands,
627 /* 1616 */ // GIR_Coverage, 66,
628 /* 1616 */ GIR_Done,
629 /* 1617 */ // Label 106: @1617
630 /* 1617 */ GIM_Reject,
631 /* 1618 */ // Label 100: @1618
632 /* 1618 */ GIM_Try, /*On fail goto*//*Label 107*/ GIMT_Encode4(1654), // Rule ID 67 //
633 /* 1623 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
634 /* 1626 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
635 /* 1629 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
636 /* 1633 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
637 /* 1637 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
638 /* 1641 */ // (sub:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SUB_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
639 /* 1641 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I64),
640 /* 1646 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
641 /* 1652 */ GIR_RootConstrainSelectedInstOperands,
642 /* 1653 */ // GIR_Coverage, 67,
643 /* 1653 */ GIR_Done,
644 /* 1654 */ // Label 107: @1654
645 /* 1654 */ GIM_Reject,
646 /* 1655 */ // Label 101: @1655
647 /* 1655 */ GIM_Try, /*On fail goto*//*Label 108*/ GIMT_Encode4(1740),
648 /* 1660 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
649 /* 1663 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
650 /* 1666 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
651 /* 1670 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 109*/ GIMT_Encode4(1711), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 253 //
652 /* 1677 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
653 /* 1681 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
654 /* 1687 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
655 /* 1691 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
656 /* 1693 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
657 /* 1697 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
658 /* 1699 */ // (sub:{ *:[v16i8] } immAllZerosV:{ *:[v16i8] }, V128:{ *:[v16i8] }:$v) => (NEG_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$v)
659 /* 1699 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I8x16),
660 /* 1702 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
661 /* 1704 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
662 /* 1706 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
663 /* 1709 */ GIR_RootConstrainSelectedInstOperands,
664 /* 1710 */ // GIR_Coverage, 253,
665 /* 1710 */ GIR_EraseRootFromParent_Done,
666 /* 1711 */ // Label 109: @1711
667 /* 1711 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 110*/ GIMT_Encode4(1739), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 286 //
668 /* 1718 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
669 /* 1722 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
670 /* 1726 */ // (sub:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SUB_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
671 /* 1726 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I8x16),
672 /* 1731 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
673 /* 1737 */ GIR_RootConstrainSelectedInstOperands,
674 /* 1738 */ // GIR_Coverage, 286,
675 /* 1738 */ GIR_Done,
676 /* 1739 */ // Label 110: @1739
677 /* 1739 */ GIM_Reject,
678 /* 1740 */ // Label 108: @1740
679 /* 1740 */ GIM_Reject,
680 /* 1741 */ // Label 102: @1741
681 /* 1741 */ GIM_Try, /*On fail goto*//*Label 111*/ GIMT_Encode4(1826),
682 /* 1746 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
683 /* 1749 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
684 /* 1752 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
685 /* 1756 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 112*/ GIMT_Encode4(1797), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 254 //
686 /* 1763 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
687 /* 1767 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
688 /* 1773 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
689 /* 1777 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
690 /* 1779 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
691 /* 1783 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
692 /* 1785 */ // (sub:{ *:[v8i16] } immAllZerosV:{ *:[v8i16] }, V128:{ *:[v8i16] }:$v) => (NEG_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$v)
693 /* 1785 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I16x8),
694 /* 1788 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
695 /* 1790 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
696 /* 1792 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
697 /* 1795 */ GIR_RootConstrainSelectedInstOperands,
698 /* 1796 */ // GIR_Coverage, 254,
699 /* 1796 */ GIR_EraseRootFromParent_Done,
700 /* 1797 */ // Label 112: @1797
701 /* 1797 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 113*/ GIMT_Encode4(1825), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 287 //
702 /* 1804 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
703 /* 1808 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
704 /* 1812 */ // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SUB_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
705 /* 1812 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I16x8),
706 /* 1817 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
707 /* 1823 */ GIR_RootConstrainSelectedInstOperands,
708 /* 1824 */ // GIR_Coverage, 287,
709 /* 1824 */ GIR_Done,
710 /* 1825 */ // Label 113: @1825
711 /* 1825 */ GIM_Reject,
712 /* 1826 */ // Label 111: @1826
713 /* 1826 */ GIM_Reject,
714 /* 1827 */ // Label 103: @1827
715 /* 1827 */ GIM_Try, /*On fail goto*//*Label 114*/ GIMT_Encode4(1912),
716 /* 1832 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
717 /* 1835 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
718 /* 1838 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
719 /* 1842 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 115*/ GIMT_Encode4(1883), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 255 //
720 /* 1849 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
721 /* 1853 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
722 /* 1859 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
723 /* 1863 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
724 /* 1865 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
725 /* 1869 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
726 /* 1871 */ // (sub:{ *:[v4i32] } immAllZerosV:{ *:[v4i32] }, V128:{ *:[v4i32] }:$v) => (NEG_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$v)
727 /* 1871 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I32x4),
728 /* 1874 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
729 /* 1876 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
730 /* 1878 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
731 /* 1881 */ GIR_RootConstrainSelectedInstOperands,
732 /* 1882 */ // GIR_Coverage, 255,
733 /* 1882 */ GIR_EraseRootFromParent_Done,
734 /* 1883 */ // Label 115: @1883
735 /* 1883 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 116*/ GIMT_Encode4(1911), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 288 //
736 /* 1890 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
737 /* 1894 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
738 /* 1898 */ // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SUB_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
739 /* 1898 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I32x4),
740 /* 1903 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
741 /* 1909 */ GIR_RootConstrainSelectedInstOperands,
742 /* 1910 */ // GIR_Coverage, 288,
743 /* 1910 */ GIR_Done,
744 /* 1911 */ // Label 116: @1911
745 /* 1911 */ GIM_Reject,
746 /* 1912 */ // Label 114: @1912
747 /* 1912 */ GIM_Reject,
748 /* 1913 */ // Label 104: @1913
749 /* 1913 */ GIM_Try, /*On fail goto*//*Label 117*/ GIMT_Encode4(1998),
750 /* 1918 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
751 /* 1921 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
752 /* 1924 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
753 /* 1928 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 118*/ GIMT_Encode4(1969), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 256 //
754 /* 1935 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
755 /* 1939 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
756 /* 1945 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
757 /* 1949 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/1,
758 /* 1951 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
759 /* 1955 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
760 /* 1957 */ // (sub:{ *:[v2i64] } immAllZerosV:{ *:[v2i64] }, V128:{ *:[v2i64] }:$v) => (NEG_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$v)
761 /* 1957 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_I64x2),
762 /* 1960 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
763 /* 1962 */ GIR_RootToRootCopy, /*OpIdx*/2, // v
764 /* 1964 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
765 /* 1967 */ GIR_RootConstrainSelectedInstOperands,
766 /* 1968 */ // GIR_Coverage, 256,
767 /* 1968 */ GIR_EraseRootFromParent_Done,
768 /* 1969 */ // Label 118: @1969
769 /* 1969 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 119*/ GIMT_Encode4(1997), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 289 //
770 /* 1976 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
771 /* 1980 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
772 /* 1984 */ // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SUB_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
773 /* 1984 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_I64x2),
774 /* 1989 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
775 /* 1995 */ GIR_RootConstrainSelectedInstOperands,
776 /* 1996 */ // GIR_Coverage, 289,
777 /* 1996 */ GIR_Done,
778 /* 1997 */ // Label 119: @1997
779 /* 1997 */ GIM_Reject,
780 /* 1998 */ // Label 117: @1998
781 /* 1998 */ GIM_Reject,
782 /* 1999 */ // Label 105: @1999
783 /* 1999 */ GIM_Reject,
784 /* 2000 */ // Label 2: @2000
785 /* 2000 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 125*/ GIMT_Encode4(2258),
786 /* 2011 */ /*GILLT_i32*//*Label 120*/ GIMT_Encode4(2067),
787 /* 2015 */ /*GILLT_i64*//*Label 121*/ GIMT_Encode4(2104), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
788 /* 2055 */ /*GILLT_v8i16*//*Label 122*/ GIMT_Encode4(2141),
789 /* 2059 */ /*GILLT_v4i32*//*Label 123*/ GIMT_Encode4(2180),
790 /* 2063 */ /*GILLT_v2i64*//*Label 124*/ GIMT_Encode4(2219),
791 /* 2067 */ // Label 120: @2067
792 /* 2067 */ GIM_Try, /*On fail goto*//*Label 126*/ GIMT_Encode4(2103), // Rule ID 68 //
793 /* 2072 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
794 /* 2075 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
795 /* 2078 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
796 /* 2082 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
797 /* 2086 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
798 /* 2090 */ // (mul:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (MUL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
799 /* 2090 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I32),
800 /* 2095 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
801 /* 2101 */ GIR_RootConstrainSelectedInstOperands,
802 /* 2102 */ // GIR_Coverage, 68,
803 /* 2102 */ GIR_Done,
804 /* 2103 */ // Label 126: @2103
805 /* 2103 */ GIM_Reject,
806 /* 2104 */ // Label 121: @2104
807 /* 2104 */ GIM_Try, /*On fail goto*//*Label 127*/ GIMT_Encode4(2140), // Rule ID 69 //
808 /* 2109 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
809 /* 2112 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
810 /* 2115 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
811 /* 2119 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
812 /* 2123 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
813 /* 2127 */ // (mul:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (MUL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
814 /* 2127 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I64),
815 /* 2132 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
816 /* 2138 */ GIR_RootConstrainSelectedInstOperands,
817 /* 2139 */ // GIR_Coverage, 69,
818 /* 2139 */ GIR_Done,
819 /* 2140 */ // Label 127: @2140
820 /* 2140 */ GIM_Reject,
821 /* 2141 */ // Label 122: @2141
822 /* 2141 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 128*/ GIMT_Encode4(2179), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 294 //
823 /* 2148 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
824 /* 2151 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
825 /* 2154 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
826 /* 2158 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
827 /* 2162 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
828 /* 2166 */ // (mul:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MUL_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
829 /* 2166 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I16x8),
830 /* 2171 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
831 /* 2177 */ GIR_RootConstrainSelectedInstOperands,
832 /* 2178 */ // GIR_Coverage, 294,
833 /* 2178 */ GIR_Done,
834 /* 2179 */ // Label 128: @2179
835 /* 2179 */ GIM_Reject,
836 /* 2180 */ // Label 123: @2180
837 /* 2180 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 129*/ GIMT_Encode4(2218), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 295 //
838 /* 2187 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
839 /* 2190 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
840 /* 2193 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
841 /* 2197 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
842 /* 2201 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
843 /* 2205 */ // (mul:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MUL_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
844 /* 2205 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I32x4),
845 /* 2210 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
846 /* 2216 */ GIR_RootConstrainSelectedInstOperands,
847 /* 2217 */ // GIR_Coverage, 295,
848 /* 2217 */ GIR_Done,
849 /* 2218 */ // Label 129: @2218
850 /* 2218 */ GIM_Reject,
851 /* 2219 */ // Label 124: @2219
852 /* 2219 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 130*/ GIMT_Encode4(2257), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 296 //
853 /* 2226 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
854 /* 2229 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
855 /* 2232 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
856 /* 2236 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
857 /* 2240 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
858 /* 2244 */ // (mul:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (MUL_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
859 /* 2244 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_I64x2),
860 /* 2249 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
861 /* 2255 */ GIR_RootConstrainSelectedInstOperands,
862 /* 2256 */ // GIR_Coverage, 296,
863 /* 2256 */ GIR_Done,
864 /* 2257 */ // Label 130: @2257
865 /* 2257 */ GIM_Reject,
866 /* 2258 */ // Label 125: @2258
867 /* 2258 */ GIM_Reject,
868 /* 2259 */ // Label 3: @2259
869 /* 2259 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 133*/ GIMT_Encode4(2352),
870 /* 2270 */ /*GILLT_i32*//*Label 131*/ GIMT_Encode4(2278),
871 /* 2274 */ /*GILLT_i64*//*Label 132*/ GIMT_Encode4(2315),
872 /* 2278 */ // Label 131: @2278
873 /* 2278 */ GIM_Try, /*On fail goto*//*Label 134*/ GIMT_Encode4(2314), // Rule ID 70 //
874 /* 2283 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
875 /* 2286 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
876 /* 2289 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
877 /* 2293 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
878 /* 2297 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
879 /* 2301 */ // (sdiv:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (DIV_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
880 /* 2301 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_S_I32),
881 /* 2306 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
882 /* 2312 */ GIR_RootConstrainSelectedInstOperands,
883 /* 2313 */ // GIR_Coverage, 70,
884 /* 2313 */ GIR_Done,
885 /* 2314 */ // Label 134: @2314
886 /* 2314 */ GIM_Reject,
887 /* 2315 */ // Label 132: @2315
888 /* 2315 */ GIM_Try, /*On fail goto*//*Label 135*/ GIMT_Encode4(2351), // Rule ID 71 //
889 /* 2320 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
890 /* 2323 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
891 /* 2326 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
892 /* 2330 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
893 /* 2334 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
894 /* 2338 */ // (sdiv:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (DIV_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
895 /* 2338 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_S_I64),
896 /* 2343 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
897 /* 2349 */ GIR_RootConstrainSelectedInstOperands,
898 /* 2350 */ // GIR_Coverage, 71,
899 /* 2350 */ GIR_Done,
900 /* 2351 */ // Label 135: @2351
901 /* 2351 */ GIM_Reject,
902 /* 2352 */ // Label 133: @2352
903 /* 2352 */ GIM_Reject,
904 /* 2353 */ // Label 4: @2353
905 /* 2353 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 138*/ GIMT_Encode4(2446),
906 /* 2364 */ /*GILLT_i32*//*Label 136*/ GIMT_Encode4(2372),
907 /* 2368 */ /*GILLT_i64*//*Label 137*/ GIMT_Encode4(2409),
908 /* 2372 */ // Label 136: @2372
909 /* 2372 */ GIM_Try, /*On fail goto*//*Label 139*/ GIMT_Encode4(2408), // Rule ID 72 //
910 /* 2377 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
911 /* 2380 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
912 /* 2383 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
913 /* 2387 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
914 /* 2391 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
915 /* 2395 */ // (udiv:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (DIV_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
916 /* 2395 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_U_I32),
917 /* 2400 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
918 /* 2406 */ GIR_RootConstrainSelectedInstOperands,
919 /* 2407 */ // GIR_Coverage, 72,
920 /* 2407 */ GIR_Done,
921 /* 2408 */ // Label 139: @2408
922 /* 2408 */ GIM_Reject,
923 /* 2409 */ // Label 137: @2409
924 /* 2409 */ GIM_Try, /*On fail goto*//*Label 140*/ GIMT_Encode4(2445), // Rule ID 73 //
925 /* 2414 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
926 /* 2417 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
927 /* 2420 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
928 /* 2424 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
929 /* 2428 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
930 /* 2432 */ // (udiv:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (DIV_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
931 /* 2432 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_U_I64),
932 /* 2437 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
933 /* 2443 */ GIR_RootConstrainSelectedInstOperands,
934 /* 2444 */ // GIR_Coverage, 73,
935 /* 2444 */ GIR_Done,
936 /* 2445 */ // Label 140: @2445
937 /* 2445 */ GIM_Reject,
938 /* 2446 */ // Label 138: @2446
939 /* 2446 */ GIM_Reject,
940 /* 2447 */ // Label 5: @2447
941 /* 2447 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 143*/ GIMT_Encode4(2540),
942 /* 2458 */ /*GILLT_i32*//*Label 141*/ GIMT_Encode4(2466),
943 /* 2462 */ /*GILLT_i64*//*Label 142*/ GIMT_Encode4(2503),
944 /* 2466 */ // Label 141: @2466
945 /* 2466 */ GIM_Try, /*On fail goto*//*Label 144*/ GIMT_Encode4(2502), // Rule ID 74 //
946 /* 2471 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
947 /* 2474 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
948 /* 2477 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
949 /* 2481 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
950 /* 2485 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
951 /* 2489 */ // (srem:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (REM_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
952 /* 2489 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_S_I32),
953 /* 2494 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
954 /* 2500 */ GIR_RootConstrainSelectedInstOperands,
955 /* 2501 */ // GIR_Coverage, 74,
956 /* 2501 */ GIR_Done,
957 /* 2502 */ // Label 144: @2502
958 /* 2502 */ GIM_Reject,
959 /* 2503 */ // Label 142: @2503
960 /* 2503 */ GIM_Try, /*On fail goto*//*Label 145*/ GIMT_Encode4(2539), // Rule ID 75 //
961 /* 2508 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
962 /* 2511 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
963 /* 2514 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
964 /* 2518 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
965 /* 2522 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
966 /* 2526 */ // (srem:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (REM_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
967 /* 2526 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_S_I64),
968 /* 2531 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
969 /* 2537 */ GIR_RootConstrainSelectedInstOperands,
970 /* 2538 */ // GIR_Coverage, 75,
971 /* 2538 */ GIR_Done,
972 /* 2539 */ // Label 145: @2539
973 /* 2539 */ GIM_Reject,
974 /* 2540 */ // Label 143: @2540
975 /* 2540 */ GIM_Reject,
976 /* 2541 */ // Label 6: @2541
977 /* 2541 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 148*/ GIMT_Encode4(2634),
978 /* 2552 */ /*GILLT_i32*//*Label 146*/ GIMT_Encode4(2560),
979 /* 2556 */ /*GILLT_i64*//*Label 147*/ GIMT_Encode4(2597),
980 /* 2560 */ // Label 146: @2560
981 /* 2560 */ GIM_Try, /*On fail goto*//*Label 149*/ GIMT_Encode4(2596), // Rule ID 76 //
982 /* 2565 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
983 /* 2568 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
984 /* 2571 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
985 /* 2575 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
986 /* 2579 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
987 /* 2583 */ // (urem:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (REM_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
988 /* 2583 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_U_I32),
989 /* 2588 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
990 /* 2594 */ GIR_RootConstrainSelectedInstOperands,
991 /* 2595 */ // GIR_Coverage, 76,
992 /* 2595 */ GIR_Done,
993 /* 2596 */ // Label 149: @2596
994 /* 2596 */ GIM_Reject,
995 /* 2597 */ // Label 147: @2597
996 /* 2597 */ GIM_Try, /*On fail goto*//*Label 150*/ GIMT_Encode4(2633), // Rule ID 77 //
997 /* 2602 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
998 /* 2605 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
999 /* 2608 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1000 /* 2612 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1001 /* 2616 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1002 /* 2620 */ // (urem:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (REM_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
1003 /* 2620 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::REM_U_I64),
1004 /* 2625 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1005 /* 2631 */ GIR_RootConstrainSelectedInstOperands,
1006 /* 2632 */ // GIR_Coverage, 77,
1007 /* 2632 */ GIR_Done,
1008 /* 2633 */ // Label 150: @2633
1009 /* 2633 */ GIM_Reject,
1010 /* 2634 */ // Label 148: @2634
1011 /* 2634 */ GIM_Reject,
1012 /* 2635 */ // Label 7: @2635
1013 /* 2635 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 157*/ GIMT_Encode4(3916),
1014 /* 2646 */ /*GILLT_i32*//*Label 151*/ GIMT_Encode4(2702),
1015 /* 2650 */ /*GILLT_i64*//*Label 152*/ GIMT_Encode4(3155), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
1016 /* 2686 */ /*GILLT_v16i8*//*Label 153*/ GIMT_Encode4(3192),
1017 /* 2690 */ /*GILLT_v8i16*//*Label 154*/ GIMT_Encode4(3373),
1018 /* 2694 */ /*GILLT_v4i32*//*Label 155*/ GIMT_Encode4(3554),
1019 /* 2698 */ /*GILLT_v2i64*//*Label 156*/ GIMT_Encode4(3735),
1020 /* 2702 */ // Label 151: @2702
1021 /* 2702 */ GIM_Try, /*On fail goto*//*Label 158*/ GIMT_Encode4(3154),
1022 /* 2707 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
1023 /* 2710 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
1024 /* 2713 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1025 /* 2717 */ GIM_Try, /*On fail goto*//*Label 159*/ GIMT_Encode4(3127),
1026 /* 2722 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/2, 1,
1027 /* 2726 */ GIM_Try, /*On fail goto*//*Label 160*/ GIMT_Encode4(2776), // Rule ID 1107 //
1028 /* 2731 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1029 /* 2735 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1030 /* 2739 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1031 /* 2742 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
1032 /* 2747 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
1033 /* 2751 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1034 /* 2755 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1035 /* 2760 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1036 /* 2762 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x)
1037 /* 2762 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
1038 /* 2765 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1039 /* 2767 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1040 /* 2771 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1041 /* 2774 */ GIR_RootConstrainSelectedInstOperands,
1042 /* 2775 */ // GIR_Coverage, 1107,
1043 /* 2775 */ GIR_EraseRootFromParent_Done,
1044 /* 2776 */ // Label 160: @2776
1045 /* 2776 */ GIM_Try, /*On fail goto*//*Label 161*/ GIMT_Encode4(2826), // Rule ID 1112 //
1046 /* 2781 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1047 /* 2785 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1048 /* 2789 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1049 /* 2792 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
1050 /* 2797 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
1051 /* 2801 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1052 /* 2805 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1053 /* 2810 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1054 /* 2812 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x)
1055 /* 2812 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
1056 /* 2815 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1057 /* 2817 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1058 /* 2821 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1059 /* 2824 */ GIR_RootConstrainSelectedInstOperands,
1060 /* 2825 */ // GIR_Coverage, 1112,
1061 /* 2825 */ GIR_EraseRootFromParent_Done,
1062 /* 2826 */ // Label 161: @2826
1063 /* 2826 */ GIM_Try, /*On fail goto*//*Label 162*/ GIMT_Encode4(2876), // Rule ID 1117 //
1064 /* 2831 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1065 /* 2835 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1066 /* 2839 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1067 /* 2842 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
1068 /* 2847 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
1069 /* 2851 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
1070 /* 2855 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1071 /* 2860 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1072 /* 2862 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x)
1073 /* 2862 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
1074 /* 2865 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1075 /* 2867 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1076 /* 2871 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1077 /* 2874 */ GIR_RootConstrainSelectedInstOperands,
1078 /* 2875 */ // GIR_Coverage, 1117,
1079 /* 2875 */ GIR_EraseRootFromParent_Done,
1080 /* 2876 */ // Label 162: @2876
1081 /* 2876 */ GIM_Try, /*On fail goto*//*Label 163*/ GIMT_Encode4(2926), // Rule ID 1122 //
1082 /* 2881 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1083 /* 2885 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1084 /* 2889 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1085 /* 2892 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
1086 /* 2897 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
1087 /* 2901 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
1088 /* 2905 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1089 /* 2910 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1090 /* 2912 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x)
1091 /* 2912 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
1092 /* 2915 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1093 /* 2917 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1094 /* 2921 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1095 /* 2924 */ GIR_RootConstrainSelectedInstOperands,
1096 /* 2925 */ // GIR_Coverage, 1122,
1097 /* 2925 */ GIR_EraseRootFromParent_Done,
1098 /* 2926 */ // Label 163: @2926
1099 /* 2926 */ GIM_Try, /*On fail goto*//*Label 164*/ GIMT_Encode4(2976), // Rule ID 1127 //
1100 /* 2931 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1101 /* 2935 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1102 /* 2939 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1103 /* 2942 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1104 /* 2947 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
1105 /* 2951 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1106 /* 2955 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1107 /* 2960 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1108 /* 2962 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x)
1109 /* 2962 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
1110 /* 2965 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1111 /* 2967 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1112 /* 2971 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1113 /* 2974 */ GIR_RootConstrainSelectedInstOperands,
1114 /* 2975 */ // GIR_Coverage, 1127,
1115 /* 2975 */ GIR_EraseRootFromParent_Done,
1116 /* 2976 */ // Label 164: @2976
1117 /* 2976 */ GIM_Try, /*On fail goto*//*Label 165*/ GIMT_Encode4(3026), // Rule ID 1132 //
1118 /* 2981 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1119 /* 2985 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1120 /* 2989 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1121 /* 2992 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1122 /* 2997 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
1123 /* 3001 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1124 /* 3005 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1125 /* 3010 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1126 /* 3012 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x)
1127 /* 3012 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
1128 /* 3015 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1129 /* 3017 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1130 /* 3021 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1131 /* 3024 */ GIR_RootConstrainSelectedInstOperands,
1132 /* 3025 */ // GIR_Coverage, 1132,
1133 /* 3025 */ GIR_EraseRootFromParent_Done,
1134 /* 3026 */ // Label 165: @3026
1135 /* 3026 */ GIM_Try, /*On fail goto*//*Label 166*/ GIMT_Encode4(3076), // Rule ID 1137 //
1136 /* 3031 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1137 /* 3035 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1138 /* 3039 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1139 /* 3042 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1140 /* 3047 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
1141 /* 3051 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
1142 /* 3055 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1143 /* 3060 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1144 /* 3062 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x)
1145 /* 3062 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
1146 /* 3065 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1147 /* 3067 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1148 /* 3071 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1149 /* 3074 */ GIR_RootConstrainSelectedInstOperands,
1150 /* 3075 */ // GIR_Coverage, 1137,
1151 /* 3075 */ GIR_EraseRootFromParent_Done,
1152 /* 3076 */ // Label 166: @3076
1153 /* 3076 */ GIM_Try, /*On fail goto*//*Label 167*/ GIMT_Encode4(3126), // Rule ID 1142 //
1154 /* 3081 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1155 /* 3085 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
1156 /* 3089 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
1157 /* 3092 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
1158 /* 3097 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
1159 /* 3101 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
1160 /* 3105 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1161 /* 3110 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
1162 /* 3112 */ // (and:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }) => (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x)
1163 /* 3112 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
1164 /* 3115 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1165 /* 3117 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
1166 /* 3121 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1167 /* 3124 */ GIR_RootConstrainSelectedInstOperands,
1168 /* 3125 */ // GIR_Coverage, 1142,
1169 /* 3125 */ GIR_EraseRootFromParent_Done,
1170 /* 3126 */ // Label 167: @3126
1171 /* 3126 */ GIM_Reject,
1172 /* 3127 */ // Label 159: @3127
1173 /* 3127 */ GIM_Try, /*On fail goto*//*Label 168*/ GIMT_Encode4(3153), // Rule ID 78 //
1174 /* 3132 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1175 /* 3136 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1176 /* 3140 */ // (and:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (AND_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
1177 /* 3140 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND_I32),
1178 /* 3145 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1179 /* 3151 */ GIR_RootConstrainSelectedInstOperands,
1180 /* 3152 */ // GIR_Coverage, 78,
1181 /* 3152 */ GIR_Done,
1182 /* 3153 */ // Label 168: @3153
1183 /* 3153 */ GIM_Reject,
1184 /* 3154 */ // Label 158: @3154
1185 /* 3154 */ GIM_Reject,
1186 /* 3155 */ // Label 152: @3155
1187 /* 3155 */ GIM_Try, /*On fail goto*//*Label 169*/ GIMT_Encode4(3191), // Rule ID 79 //
1188 /* 3160 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
1189 /* 3163 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
1190 /* 3166 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1191 /* 3170 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1192 /* 3174 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1193 /* 3178 */ // (and:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (AND_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
1194 /* 3178 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND_I64),
1195 /* 3183 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1196 /* 3189 */ GIR_RootConstrainSelectedInstOperands,
1197 /* 3190 */ // GIR_Coverage, 79,
1198 /* 3190 */ GIR_Done,
1199 /* 3191 */ // Label 169: @3191
1200 /* 3191 */ GIM_Reject,
1201 /* 3192 */ // Label 153: @3192
1202 /* 3192 */ GIM_Try, /*On fail goto*//*Label 170*/ GIMT_Encode4(3372),
1203 /* 3197 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
1204 /* 3200 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
1205 /* 3203 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1206 /* 3207 */ GIM_Try, /*On fail goto*//*Label 171*/ GIMT_Encode4(3275), // Rule ID 1335 //
1207 /* 3212 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1208 /* 3216 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1209 /* 3220 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
1210 /* 3224 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1211 /* 3228 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1212 /* 3232 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1213 /* 3237 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1214 /* 3241 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1215 /* 3247 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
1216 /* 3251 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1217 /* 3253 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1218 /* 3257 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1219 /* 3259 */ // (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$rhs, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$lhs) => (ANDNOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1220 /* 3259 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1221 /* 3262 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1222 /* 3264 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1223 /* 3266 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1224 /* 3270 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1225 /* 3273 */ GIR_RootConstrainSelectedInstOperands,
1226 /* 3274 */ // GIR_Coverage, 1335,
1227 /* 3274 */ GIR_EraseRootFromParent_Done,
1228 /* 3275 */ // Label 171: @3275
1229 /* 3275 */ GIM_Try, /*On fail goto*//*Label 172*/ GIMT_Encode4(3371),
1230 /* 3280 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1231 /* 3284 */ GIM_Try, /*On fail goto*//*Label 173*/ GIMT_Encode4(3348), // Rule ID 1048 //
1232 /* 3289 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1233 /* 3293 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1234 /* 3297 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
1235 /* 3301 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1236 /* 3305 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1237 /* 3309 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1238 /* 3314 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1239 /* 3318 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1240 /* 3324 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
1241 /* 3328 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1242 /* 3330 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1243 /* 3332 */ // (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$rhs, immAllOnesV:{ *:[v16i8] })) => (ANDNOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1244 /* 3332 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1245 /* 3335 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1246 /* 3337 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1247 /* 3339 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1248 /* 3343 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1249 /* 3346 */ GIR_RootConstrainSelectedInstOperands,
1250 /* 3347 */ // GIR_Coverage, 1048,
1251 /* 3347 */ GIR_EraseRootFromParent_Done,
1252 /* 3348 */ // Label 173: @3348
1253 /* 3348 */ GIM_Try, /*On fail goto*//*Label 174*/ GIMT_Encode4(3370), // Rule ID 1032 //
1254 /* 3353 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1255 /* 3357 */ // (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (AND:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1256 /* 3357 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1257 /* 3362 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1258 /* 3368 */ GIR_RootConstrainSelectedInstOperands,
1259 /* 3369 */ // GIR_Coverage, 1032,
1260 /* 3369 */ GIR_Done,
1261 /* 3370 */ // Label 174: @3370
1262 /* 3370 */ GIM_Reject,
1263 /* 3371 */ // Label 172: @3371
1264 /* 3371 */ GIM_Reject,
1265 /* 3372 */ // Label 170: @3372
1266 /* 3372 */ GIM_Reject,
1267 /* 3373 */ // Label 154: @3373
1268 /* 3373 */ GIM_Try, /*On fail goto*//*Label 175*/ GIMT_Encode4(3553),
1269 /* 3378 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
1270 /* 3381 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
1271 /* 3384 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1272 /* 3388 */ GIM_Try, /*On fail goto*//*Label 176*/ GIMT_Encode4(3456), // Rule ID 1336 //
1273 /* 3393 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1274 /* 3397 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1275 /* 3401 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
1276 /* 3405 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1277 /* 3409 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1278 /* 3413 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1279 /* 3418 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1280 /* 3422 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1281 /* 3428 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
1282 /* 3432 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1283 /* 3434 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1284 /* 3438 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1285 /* 3440 */ // (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$rhs, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$lhs) => (ANDNOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1286 /* 3440 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1287 /* 3443 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1288 /* 3445 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1289 /* 3447 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1290 /* 3451 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1291 /* 3454 */ GIR_RootConstrainSelectedInstOperands,
1292 /* 3455 */ // GIR_Coverage, 1336,
1293 /* 3455 */ GIR_EraseRootFromParent_Done,
1294 /* 3456 */ // Label 176: @3456
1295 /* 3456 */ GIM_Try, /*On fail goto*//*Label 177*/ GIMT_Encode4(3552),
1296 /* 3461 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1297 /* 3465 */ GIM_Try, /*On fail goto*//*Label 178*/ GIMT_Encode4(3529), // Rule ID 1049 //
1298 /* 3470 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1299 /* 3474 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1300 /* 3478 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
1301 /* 3482 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1302 /* 3486 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1303 /* 3490 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1304 /* 3495 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1305 /* 3499 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1306 /* 3505 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
1307 /* 3509 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1308 /* 3511 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1309 /* 3513 */ // (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$rhs, immAllOnesV:{ *:[v8i16] })) => (ANDNOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1310 /* 3513 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1311 /* 3516 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1312 /* 3518 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1313 /* 3520 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1314 /* 3524 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1315 /* 3527 */ GIR_RootConstrainSelectedInstOperands,
1316 /* 3528 */ // GIR_Coverage, 1049,
1317 /* 3528 */ GIR_EraseRootFromParent_Done,
1318 /* 3529 */ // Label 178: @3529
1319 /* 3529 */ GIM_Try, /*On fail goto*//*Label 179*/ GIMT_Encode4(3551), // Rule ID 1037 //
1320 /* 3534 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1321 /* 3538 */ // (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (AND:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
1322 /* 3538 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1323 /* 3543 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1324 /* 3549 */ GIR_RootConstrainSelectedInstOperands,
1325 /* 3550 */ // GIR_Coverage, 1037,
1326 /* 3550 */ GIR_Done,
1327 /* 3551 */ // Label 179: @3551
1328 /* 3551 */ GIM_Reject,
1329 /* 3552 */ // Label 177: @3552
1330 /* 3552 */ GIM_Reject,
1331 /* 3553 */ // Label 175: @3553
1332 /* 3553 */ GIM_Reject,
1333 /* 3554 */ // Label 155: @3554
1334 /* 3554 */ GIM_Try, /*On fail goto*//*Label 180*/ GIMT_Encode4(3734),
1335 /* 3559 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
1336 /* 3562 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
1337 /* 3565 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1338 /* 3569 */ GIM_Try, /*On fail goto*//*Label 181*/ GIMT_Encode4(3637), // Rule ID 1337 //
1339 /* 3574 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1340 /* 3578 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1341 /* 3582 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
1342 /* 3586 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
1343 /* 3590 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
1344 /* 3594 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1345 /* 3599 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1346 /* 3603 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1347 /* 3609 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
1348 /* 3613 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1349 /* 3615 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1350 /* 3619 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1351 /* 3621 */ // (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$rhs, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$lhs) => (ANDNOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
1352 /* 3621 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1353 /* 3624 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1354 /* 3626 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1355 /* 3628 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1356 /* 3632 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1357 /* 3635 */ GIR_RootConstrainSelectedInstOperands,
1358 /* 3636 */ // GIR_Coverage, 1337,
1359 /* 3636 */ GIR_EraseRootFromParent_Done,
1360 /* 3637 */ // Label 181: @3637
1361 /* 3637 */ GIM_Try, /*On fail goto*//*Label 182*/ GIMT_Encode4(3733),
1362 /* 3642 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1363 /* 3646 */ GIM_Try, /*On fail goto*//*Label 183*/ GIMT_Encode4(3710), // Rule ID 1050 //
1364 /* 3651 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1365 /* 3655 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1366 /* 3659 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
1367 /* 3663 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
1368 /* 3667 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
1369 /* 3671 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1370 /* 3676 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1371 /* 3680 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1372 /* 3686 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
1373 /* 3690 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1374 /* 3692 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1375 /* 3694 */ // (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$rhs, immAllOnesV:{ *:[v4i32] })) => (ANDNOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
1376 /* 3694 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1377 /* 3697 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1378 /* 3699 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1379 /* 3701 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1380 /* 3705 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1381 /* 3708 */ GIR_RootConstrainSelectedInstOperands,
1382 /* 3709 */ // GIR_Coverage, 1050,
1383 /* 3709 */ GIR_EraseRootFromParent_Done,
1384 /* 3710 */ // Label 183: @3710
1385 /* 3710 */ GIM_Try, /*On fail goto*//*Label 184*/ GIMT_Encode4(3732), // Rule ID 1038 //
1386 /* 3715 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1387 /* 3719 */ // (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (AND:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
1388 /* 3719 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1389 /* 3724 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1390 /* 3730 */ GIR_RootConstrainSelectedInstOperands,
1391 /* 3731 */ // GIR_Coverage, 1038,
1392 /* 3731 */ GIR_Done,
1393 /* 3732 */ // Label 184: @3732
1394 /* 3732 */ GIM_Reject,
1395 /* 3733 */ // Label 182: @3733
1396 /* 3733 */ GIM_Reject,
1397 /* 3734 */ // Label 180: @3734
1398 /* 3734 */ GIM_Reject,
1399 /* 3735 */ // Label 156: @3735
1400 /* 3735 */ GIM_Try, /*On fail goto*//*Label 185*/ GIMT_Encode4(3915),
1401 /* 3740 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
1402 /* 3743 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
1403 /* 3746 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1404 /* 3750 */ GIM_Try, /*On fail goto*//*Label 186*/ GIMT_Encode4(3818), // Rule ID 1338 //
1405 /* 3755 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1406 /* 3759 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1407 /* 3763 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
1408 /* 3767 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
1409 /* 3771 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
1410 /* 3775 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1411 /* 3780 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1412 /* 3784 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1413 /* 3790 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
1414 /* 3794 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1415 /* 3796 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1416 /* 3800 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1417 /* 3802 */ // (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$rhs, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$lhs) => (ANDNOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
1418 /* 3802 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1419 /* 3805 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1420 /* 3807 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
1421 /* 3809 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1422 /* 3813 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1423 /* 3816 */ GIR_RootConstrainSelectedInstOperands,
1424 /* 3817 */ // GIR_Coverage, 1338,
1425 /* 3817 */ GIR_EraseRootFromParent_Done,
1426 /* 3818 */ // Label 186: @3818
1427 /* 3818 */ GIM_Try, /*On fail goto*//*Label 187*/ GIMT_Encode4(3914),
1428 /* 3823 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1429 /* 3827 */ GIM_Try, /*On fail goto*//*Label 188*/ GIMT_Encode4(3891), // Rule ID 1051 //
1430 /* 3832 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1431 /* 3836 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
1432 /* 3840 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
1433 /* 3844 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
1434 /* 3848 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
1435 /* 3852 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1436 /* 3857 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1437 /* 3861 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1438 /* 3867 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
1439 /* 3871 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
1440 /* 3873 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
1441 /* 3875 */ // (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$rhs, immAllOnesV:{ *:[v2i64] })) => (ANDNOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
1442 /* 3875 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
1443 /* 3878 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1444 /* 3880 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
1445 /* 3882 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
1446 /* 3886 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1447 /* 3889 */ GIR_RootConstrainSelectedInstOperands,
1448 /* 3890 */ // GIR_Coverage, 1051,
1449 /* 3890 */ GIR_EraseRootFromParent_Done,
1450 /* 3891 */ // Label 188: @3891
1451 /* 3891 */ GIM_Try, /*On fail goto*//*Label 189*/ GIMT_Encode4(3913), // Rule ID 1039 //
1452 /* 3896 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1453 /* 3900 */ // (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (AND:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
1454 /* 3900 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AND),
1455 /* 3905 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1456 /* 3911 */ GIR_RootConstrainSelectedInstOperands,
1457 /* 3912 */ // GIR_Coverage, 1039,
1458 /* 3912 */ GIR_Done,
1459 /* 3913 */ // Label 189: @3913
1460 /* 3913 */ GIM_Reject,
1461 /* 3914 */ // Label 187: @3914
1462 /* 3914 */ GIM_Reject,
1463 /* 3915 */ // Label 185: @3915
1464 /* 3915 */ GIM_Reject,
1465 /* 3916 */ // Label 157: @3916
1466 /* 3916 */ GIM_Reject,
1467 /* 3917 */ // Label 8: @3917
1468 /* 3917 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 196*/ GIMT_Encode4(8102),
1469 /* 3928 */ /*GILLT_i32*//*Label 190*/ GIMT_Encode4(3984),
1470 /* 3932 */ /*GILLT_i64*//*Label 191*/ GIMT_Encode4(4021), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
1471 /* 3968 */ /*GILLT_v16i8*//*Label 192*/ GIMT_Encode4(4058),
1472 /* 3972 */ /*GILLT_v8i16*//*Label 193*/ GIMT_Encode4(5069),
1473 /* 3976 */ /*GILLT_v4i32*//*Label 194*/ GIMT_Encode4(6080),
1474 /* 3980 */ /*GILLT_v2i64*//*Label 195*/ GIMT_Encode4(7091),
1475 /* 3984 */ // Label 190: @3984
1476 /* 3984 */ GIM_Try, /*On fail goto*//*Label 197*/ GIMT_Encode4(4020), // Rule ID 80 //
1477 /* 3989 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
1478 /* 3992 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
1479 /* 3995 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1480 /* 3999 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1481 /* 4003 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
1482 /* 4007 */ // (or:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (OR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
1483 /* 4007 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR_I32),
1484 /* 4012 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1485 /* 4018 */ GIR_RootConstrainSelectedInstOperands,
1486 /* 4019 */ // GIR_Coverage, 80,
1487 /* 4019 */ GIR_Done,
1488 /* 4020 */ // Label 197: @4020
1489 /* 4020 */ GIM_Reject,
1490 /* 4021 */ // Label 191: @4021
1491 /* 4021 */ GIM_Try, /*On fail goto*//*Label 198*/ GIMT_Encode4(4057), // Rule ID 81 //
1492 /* 4026 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
1493 /* 4029 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
1494 /* 4032 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1495 /* 4036 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1496 /* 4040 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
1497 /* 4044 */ // (or:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (OR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
1498 /* 4044 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR_I64),
1499 /* 4049 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1500 /* 4055 */ GIR_RootConstrainSelectedInstOperands,
1501 /* 4056 */ // GIR_Coverage, 81,
1502 /* 4056 */ GIR_Done,
1503 /* 4057 */ // Label 198: @4057
1504 /* 4057 */ GIM_Reject,
1505 /* 4058 */ // Label 192: @4058
1506 /* 4058 */ GIM_Try, /*On fail goto*//*Label 199*/ GIMT_Encode4(5068),
1507 /* 4063 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
1508 /* 4066 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
1509 /* 4069 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1510 /* 4073 */ GIM_Try, /*On fail goto*//*Label 200*/ GIMT_Encode4(4194), // Rule ID 1343 //
1511 /* 4078 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1512 /* 4082 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1513 /* 4086 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
1514 /* 4090 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1515 /* 4094 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1516 /* 4098 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1517 /* 4102 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1518 /* 4106 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
1519 /* 4110 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1520 /* 4114 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1521 /* 4118 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1522 /* 4123 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1523 /* 4127 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1524 /* 4133 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v16i8,
1525 /* 4137 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1526 /* 4139 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1527 /* 4144 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1528 /* 4148 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1529 /* 4152 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v16i8,
1530 /* 4156 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16i8,
1531 /* 4160 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1532 /* 4165 */ // MIs[4] c
1533 /* 4165 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1534 /* 4170 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1535 /* 4172 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1536 /* 4172 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1537 /* 4175 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1538 /* 4177 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1539 /* 4181 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1540 /* 4185 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1541 /* 4189 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1542 /* 4192 */ GIR_RootConstrainSelectedInstOperands,
1543 /* 4193 */ // GIR_Coverage, 1343,
1544 /* 4193 */ GIR_EraseRootFromParent_Done,
1545 /* 4194 */ // Label 200: @4194
1546 /* 4194 */ GIM_Try, /*On fail goto*//*Label 201*/ GIMT_Encode4(4315), // Rule ID 1342 //
1547 /* 4199 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1548 /* 4203 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1549 /* 4207 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
1550 /* 4211 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1551 /* 4215 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1552 /* 4219 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1553 /* 4223 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1554 /* 4227 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
1555 /* 4231 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1556 /* 4235 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1557 /* 4239 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1558 /* 4244 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1559 /* 4248 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1560 /* 4254 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v16i8,
1561 /* 4258 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1562 /* 4260 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1563 /* 4265 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1564 /* 4269 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1565 /* 4273 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v16i8,
1566 /* 4277 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16i8,
1567 /* 4281 */ // MIs[4] c
1568 /* 4281 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1569 /* 4286 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1570 /* 4291 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1571 /* 4293 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1572 /* 4293 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1573 /* 4296 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1574 /* 4298 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1575 /* 4302 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1576 /* 4306 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1577 /* 4310 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1578 /* 4313 */ GIR_RootConstrainSelectedInstOperands,
1579 /* 4314 */ // GIR_Coverage, 1342,
1580 /* 4314 */ GIR_EraseRootFromParent_Done,
1581 /* 4315 */ // Label 201: @4315
1582 /* 4315 */ GIM_Try, /*On fail goto*//*Label 202*/ GIMT_Encode4(4436), // Rule ID 1345 //
1583 /* 4320 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1584 /* 4324 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1585 /* 4328 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
1586 /* 4332 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1587 /* 4336 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1588 /* 4340 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1589 /* 4345 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1590 /* 4349 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1591 /* 4353 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
1592 /* 4357 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1593 /* 4361 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1594 /* 4365 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1595 /* 4370 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1596 /* 4374 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1597 /* 4380 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v16i8,
1598 /* 4384 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1599 /* 4386 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1600 /* 4390 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1601 /* 4394 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v16i8,
1602 /* 4398 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16i8,
1603 /* 4402 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1604 /* 4407 */ // MIs[4] c
1605 /* 4407 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1606 /* 4412 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1607 /* 4414 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1608 /* 4414 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1609 /* 4417 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1610 /* 4419 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1611 /* 4423 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1612 /* 4427 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1613 /* 4431 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1614 /* 4434 */ GIR_RootConstrainSelectedInstOperands,
1615 /* 4435 */ // GIR_Coverage, 1345,
1616 /* 4435 */ GIR_EraseRootFromParent_Done,
1617 /* 4436 */ // Label 202: @4436
1618 /* 4436 */ GIM_Try, /*On fail goto*//*Label 203*/ GIMT_Encode4(4557), // Rule ID 1344 //
1619 /* 4441 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1620 /* 4445 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1621 /* 4449 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
1622 /* 4453 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1623 /* 4457 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1624 /* 4461 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1625 /* 4466 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1626 /* 4470 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1627 /* 4474 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
1628 /* 4478 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1629 /* 4482 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1630 /* 4486 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1631 /* 4491 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1632 /* 4495 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1633 /* 4501 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v16i8,
1634 /* 4505 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1635 /* 4507 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1636 /* 4511 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1637 /* 4515 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v16i8,
1638 /* 4519 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16i8,
1639 /* 4523 */ // MIs[4] c
1640 /* 4523 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1641 /* 4528 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1642 /* 4533 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1643 /* 4535 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1644 /* 4535 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1645 /* 4538 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1646 /* 4540 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1647 /* 4544 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1648 /* 4548 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1649 /* 4552 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1650 /* 4555 */ GIR_RootConstrainSelectedInstOperands,
1651 /* 4556 */ // GIR_Coverage, 1344,
1652 /* 4556 */ GIR_EraseRootFromParent_Done,
1653 /* 4557 */ // Label 203: @4557
1654 /* 4557 */ GIM_Try, /*On fail goto*//*Label 204*/ GIMT_Encode4(4678), // Rule ID 1059 //
1655 /* 4562 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1656 /* 4566 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1657 /* 4570 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
1658 /* 4574 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1659 /* 4578 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1660 /* 4582 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1661 /* 4587 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1662 /* 4592 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1663 /* 4596 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1664 /* 4600 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
1665 /* 4604 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1666 /* 4608 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1667 /* 4612 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1668 /* 4616 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1669 /* 4620 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v16i8,
1670 /* 4624 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
1671 /* 4628 */ // MIs[3] c
1672 /* 4628 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1673 /* 4633 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1674 /* 4637 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1675 /* 4643 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v16i8,
1676 /* 4647 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1677 /* 4649 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1678 /* 4654 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1679 /* 4656 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1), (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1680 /* 4656 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1681 /* 4659 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1682 /* 4661 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1683 /* 4665 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1684 /* 4669 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1685 /* 4673 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1686 /* 4676 */ GIR_RootConstrainSelectedInstOperands,
1687 /* 4677 */ // GIR_Coverage, 1059,
1688 /* 4677 */ GIR_EraseRootFromParent_Done,
1689 /* 4678 */ // Label 204: @4678
1690 /* 4678 */ GIM_Try, /*On fail goto*//*Label 205*/ GIMT_Encode4(4799), // Rule ID 1340 //
1691 /* 4683 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1692 /* 4687 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1693 /* 4691 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
1694 /* 4695 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1695 /* 4699 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1696 /* 4703 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1697 /* 4708 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1698 /* 4713 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1699 /* 4717 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1700 /* 4721 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
1701 /* 4725 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1702 /* 4729 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1703 /* 4733 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1704 /* 4737 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1705 /* 4741 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v16i8,
1706 /* 4745 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
1707 /* 4749 */ // MIs[3] c
1708 /* 4749 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1709 /* 4754 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1710 /* 4758 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1711 /* 4764 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v16i8,
1712 /* 4768 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1713 /* 4770 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1714 /* 4775 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1715 /* 4777 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c), (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), V128:{ *:[v16i8] }:$v2)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1716 /* 4777 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1717 /* 4780 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1718 /* 4782 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1719 /* 4786 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1720 /* 4790 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1721 /* 4794 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1722 /* 4797 */ GIR_RootConstrainSelectedInstOperands,
1723 /* 4798 */ // GIR_Coverage, 1340,
1724 /* 4798 */ GIR_EraseRootFromParent_Done,
1725 /* 4799 */ // Label 205: @4799
1726 /* 4799 */ GIM_Try, /*On fail goto*//*Label 206*/ GIMT_Encode4(4920), // Rule ID 1339 //
1727 /* 4804 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1728 /* 4808 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1729 /* 4812 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
1730 /* 4816 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1731 /* 4820 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1732 /* 4824 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1733 /* 4829 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1734 /* 4834 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1735 /* 4838 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1736 /* 4842 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
1737 /* 4846 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1738 /* 4850 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1739 /* 4854 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1740 /* 4859 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1741 /* 4863 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1742 /* 4867 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v16i8,
1743 /* 4871 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
1744 /* 4875 */ // MIs[3] c
1745 /* 4875 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1746 /* 4880 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1747 /* 4884 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1748 /* 4890 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v16i8,
1749 /* 4894 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1750 /* 4896 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1751 /* 4898 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1752 /* 4898 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1753 /* 4901 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1754 /* 4903 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1755 /* 4907 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1756 /* 4911 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1757 /* 4915 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1758 /* 4918 */ GIR_RootConstrainSelectedInstOperands,
1759 /* 4919 */ // GIR_Coverage, 1339,
1760 /* 4919 */ GIR_EraseRootFromParent_Done,
1761 /* 4920 */ // Label 206: @4920
1762 /* 4920 */ GIM_Try, /*On fail goto*//*Label 207*/ GIMT_Encode4(5041), // Rule ID 1341 //
1763 /* 4925 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1764 /* 4929 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1765 /* 4933 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
1766 /* 4937 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
1767 /* 4941 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
1768 /* 4945 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1769 /* 4950 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1770 /* 4955 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1771 /* 4959 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1772 /* 4963 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
1773 /* 4967 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
1774 /* 4971 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
1775 /* 4975 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1776 /* 4980 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1777 /* 4984 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1778 /* 4988 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v16i8,
1779 /* 4992 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
1780 /* 4996 */ // MIs[3] c
1781 /* 4996 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
1782 /* 5001 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1783 /* 5005 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1784 /* 5011 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v16i8,
1785 /* 5015 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1786 /* 5017 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1787 /* 5019 */ // (or:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$c), (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
1788 /* 5019 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1789 /* 5022 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1790 /* 5024 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
1791 /* 5028 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
1792 /* 5032 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
1793 /* 5036 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1794 /* 5039 */ GIR_RootConstrainSelectedInstOperands,
1795 /* 5040 */ // GIR_Coverage, 1341,
1796 /* 5040 */ GIR_EraseRootFromParent_Done,
1797 /* 5041 */ // Label 207: @5041
1798 /* 5041 */ GIM_Try, /*On fail goto*//*Label 208*/ GIMT_Encode4(5067), // Rule ID 1040 //
1799 /* 5046 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1800 /* 5050 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1801 /* 5054 */ // (or:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (OR:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
1802 /* 5054 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
1803 /* 5059 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
1804 /* 5065 */ GIR_RootConstrainSelectedInstOperands,
1805 /* 5066 */ // GIR_Coverage, 1040,
1806 /* 5066 */ GIR_Done,
1807 /* 5067 */ // Label 208: @5067
1808 /* 5067 */ GIM_Reject,
1809 /* 5068 */ // Label 199: @5068
1810 /* 5068 */ GIM_Reject,
1811 /* 5069 */ // Label 193: @5069
1812 /* 5069 */ GIM_Try, /*On fail goto*//*Label 209*/ GIMT_Encode4(6079),
1813 /* 5074 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
1814 /* 5077 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
1815 /* 5080 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1816 /* 5084 */ GIM_Try, /*On fail goto*//*Label 210*/ GIMT_Encode4(5205), // Rule ID 1350 //
1817 /* 5089 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1818 /* 5093 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1819 /* 5097 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
1820 /* 5101 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1821 /* 5105 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1822 /* 5109 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1823 /* 5113 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1824 /* 5117 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
1825 /* 5121 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1826 /* 5125 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1827 /* 5129 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1828 /* 5134 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1829 /* 5138 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1830 /* 5144 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v8i16,
1831 /* 5148 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1832 /* 5150 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1833 /* 5155 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1834 /* 5159 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1835 /* 5163 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v8i16,
1836 /* 5167 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8i16,
1837 /* 5171 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1838 /* 5176 */ // MIs[4] c
1839 /* 5176 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1840 /* 5181 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1841 /* 5183 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1842 /* 5183 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1843 /* 5186 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1844 /* 5188 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1845 /* 5192 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1846 /* 5196 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1847 /* 5200 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1848 /* 5203 */ GIR_RootConstrainSelectedInstOperands,
1849 /* 5204 */ // GIR_Coverage, 1350,
1850 /* 5204 */ GIR_EraseRootFromParent_Done,
1851 /* 5205 */ // Label 210: @5205
1852 /* 5205 */ GIM_Try, /*On fail goto*//*Label 211*/ GIMT_Encode4(5326), // Rule ID 1349 //
1853 /* 5210 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1854 /* 5214 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1855 /* 5218 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
1856 /* 5222 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1857 /* 5226 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1858 /* 5230 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
1859 /* 5234 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1860 /* 5238 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
1861 /* 5242 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1862 /* 5246 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1863 /* 5250 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1864 /* 5255 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1865 /* 5259 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1866 /* 5265 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v8i16,
1867 /* 5269 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1868 /* 5271 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1869 /* 5276 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1870 /* 5280 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1871 /* 5284 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v8i16,
1872 /* 5288 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8i16,
1873 /* 5292 */ // MIs[4] c
1874 /* 5292 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1875 /* 5297 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1876 /* 5302 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1877 /* 5304 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1878 /* 5304 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1879 /* 5307 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1880 /* 5309 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1881 /* 5313 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
1882 /* 5317 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1883 /* 5321 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1884 /* 5324 */ GIR_RootConstrainSelectedInstOperands,
1885 /* 5325 */ // GIR_Coverage, 1349,
1886 /* 5325 */ GIR_EraseRootFromParent_Done,
1887 /* 5326 */ // Label 211: @5326
1888 /* 5326 */ GIM_Try, /*On fail goto*//*Label 212*/ GIMT_Encode4(5447), // Rule ID 1352 //
1889 /* 5331 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1890 /* 5335 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1891 /* 5339 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
1892 /* 5343 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1893 /* 5347 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1894 /* 5351 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1895 /* 5356 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1896 /* 5360 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1897 /* 5364 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
1898 /* 5368 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1899 /* 5372 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1900 /* 5376 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1901 /* 5381 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1902 /* 5385 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1903 /* 5391 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v8i16,
1904 /* 5395 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1905 /* 5397 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1906 /* 5401 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1907 /* 5405 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v8i16,
1908 /* 5409 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8i16,
1909 /* 5413 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1910 /* 5418 */ // MIs[4] c
1911 /* 5418 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
1912 /* 5423 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1913 /* 5425 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1914 /* 5425 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1915 /* 5428 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1916 /* 5430 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
1917 /* 5434 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1918 /* 5438 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1919 /* 5442 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1920 /* 5445 */ GIR_RootConstrainSelectedInstOperands,
1921 /* 5446 */ // GIR_Coverage, 1352,
1922 /* 5446 */ GIR_EraseRootFromParent_Done,
1923 /* 5447 */ // Label 212: @5447
1924 /* 5447 */ GIM_Try, /*On fail goto*//*Label 213*/ GIMT_Encode4(5568), // Rule ID 1351 //
1925 /* 5452 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1926 /* 5456 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1927 /* 5460 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
1928 /* 5464 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1929 /* 5468 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1930 /* 5472 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1931 /* 5477 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
1932 /* 5481 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
1933 /* 5485 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
1934 /* 5489 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1935 /* 5493 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1936 /* 5497 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1937 /* 5502 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
1938 /* 5506 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1939 /* 5512 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v8i16,
1940 /* 5516 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
1941 /* 5518 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
1942 /* 5522 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
1943 /* 5526 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v8i16,
1944 /* 5530 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8i16,
1945 /* 5534 */ // MIs[4] c
1946 /* 5534 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
1947 /* 5539 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1948 /* 5544 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1949 /* 5546 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1950 /* 5546 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1951 /* 5549 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1952 /* 5551 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
1953 /* 5555 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
1954 /* 5559 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
1955 /* 5563 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1956 /* 5566 */ GIR_RootConstrainSelectedInstOperands,
1957 /* 5567 */ // GIR_Coverage, 1351,
1958 /* 5567 */ GIR_EraseRootFromParent_Done,
1959 /* 5568 */ // Label 213: @5568
1960 /* 5568 */ GIM_Try, /*On fail goto*//*Label 214*/ GIMT_Encode4(5689), // Rule ID 1060 //
1961 /* 5573 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1962 /* 5577 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1963 /* 5581 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
1964 /* 5585 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
1965 /* 5589 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
1966 /* 5593 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1967 /* 5598 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1968 /* 5603 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
1969 /* 5607 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
1970 /* 5611 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
1971 /* 5615 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
1972 /* 5619 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
1973 /* 5623 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
1974 /* 5627 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
1975 /* 5631 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v8i16,
1976 /* 5635 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
1977 /* 5639 */ // MIs[3] c
1978 /* 5639 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
1979 /* 5644 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
1980 /* 5648 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
1981 /* 5654 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v8i16,
1982 /* 5658 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
1983 /* 5660 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
1984 /* 5665 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
1985 /* 5667 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1), (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
1986 /* 5667 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
1987 /* 5670 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
1988 /* 5672 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
1989 /* 5676 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
1990 /* 5680 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
1991 /* 5684 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
1992 /* 5687 */ GIR_RootConstrainSelectedInstOperands,
1993 /* 5688 */ // GIR_Coverage, 1060,
1994 /* 5688 */ GIR_EraseRootFromParent_Done,
1995 /* 5689 */ // Label 214: @5689
1996 /* 5689 */ GIM_Try, /*On fail goto*//*Label 215*/ GIMT_Encode4(5810), // Rule ID 1347 //
1997 /* 5694 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1998 /* 5698 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
1999 /* 5702 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
2000 /* 5706 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
2001 /* 5710 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
2002 /* 5714 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2003 /* 5719 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2004 /* 5724 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2005 /* 5728 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2006 /* 5732 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
2007 /* 5736 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
2008 /* 5740 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
2009 /* 5744 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2010 /* 5748 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2011 /* 5752 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v8i16,
2012 /* 5756 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
2013 /* 5760 */ // MIs[3] c
2014 /* 5760 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2015 /* 5765 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2016 /* 5769 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2017 /* 5775 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v8i16,
2018 /* 5779 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2019 /* 5781 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2020 /* 5786 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2021 /* 5788 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c), (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), V128:{ *:[v8i16] }:$v2)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
2022 /* 5788 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2023 /* 5791 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2024 /* 5793 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2025 /* 5797 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2026 /* 5801 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2027 /* 5805 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2028 /* 5808 */ GIR_RootConstrainSelectedInstOperands,
2029 /* 5809 */ // GIR_Coverage, 1347,
2030 /* 5809 */ GIR_EraseRootFromParent_Done,
2031 /* 5810 */ // Label 215: @5810
2032 /* 5810 */ GIM_Try, /*On fail goto*//*Label 216*/ GIMT_Encode4(5931), // Rule ID 1346 //
2033 /* 5815 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2034 /* 5819 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2035 /* 5823 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
2036 /* 5827 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
2037 /* 5831 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
2038 /* 5835 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2039 /* 5840 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2040 /* 5845 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2041 /* 5849 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2042 /* 5853 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
2043 /* 5857 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
2044 /* 5861 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
2045 /* 5865 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2046 /* 5870 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2047 /* 5874 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2048 /* 5878 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v8i16,
2049 /* 5882 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
2050 /* 5886 */ // MIs[3] c
2051 /* 5886 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2052 /* 5891 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2053 /* 5895 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2054 /* 5901 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v8i16,
2055 /* 5905 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2056 /* 5907 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2057 /* 5909 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
2058 /* 5909 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2059 /* 5912 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2060 /* 5914 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2061 /* 5918 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2062 /* 5922 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2063 /* 5926 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2064 /* 5929 */ GIR_RootConstrainSelectedInstOperands,
2065 /* 5930 */ // GIR_Coverage, 1346,
2066 /* 5930 */ GIR_EraseRootFromParent_Done,
2067 /* 5931 */ // Label 216: @5931
2068 /* 5931 */ GIM_Try, /*On fail goto*//*Label 217*/ GIMT_Encode4(6052), // Rule ID 1348 //
2069 /* 5936 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2070 /* 5940 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2071 /* 5944 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
2072 /* 5948 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
2073 /* 5952 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
2074 /* 5956 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2075 /* 5961 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2076 /* 5966 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2077 /* 5970 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2078 /* 5974 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
2079 /* 5978 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
2080 /* 5982 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
2081 /* 5986 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2082 /* 5991 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2083 /* 5995 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2084 /* 5999 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v8i16,
2085 /* 6003 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
2086 /* 6007 */ // MIs[3] c
2087 /* 6007 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2088 /* 6012 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2089 /* 6016 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2090 /* 6022 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v8i16,
2091 /* 6026 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2092 /* 6028 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2093 /* 6030 */ // (or:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$c), (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
2094 /* 6030 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2095 /* 6033 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2096 /* 6035 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2097 /* 6039 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2098 /* 6043 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2099 /* 6047 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2100 /* 6050 */ GIR_RootConstrainSelectedInstOperands,
2101 /* 6051 */ // GIR_Coverage, 1348,
2102 /* 6051 */ GIR_EraseRootFromParent_Done,
2103 /* 6052 */ // Label 217: @6052
2104 /* 6052 */ GIM_Try, /*On fail goto*//*Label 218*/ GIMT_Encode4(6078), // Rule ID 1041 //
2105 /* 6057 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2106 /* 6061 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2107 /* 6065 */ // (or:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (OR:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
2108 /* 6065 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
2109 /* 6070 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2110 /* 6076 */ GIR_RootConstrainSelectedInstOperands,
2111 /* 6077 */ // GIR_Coverage, 1041,
2112 /* 6077 */ GIR_Done,
2113 /* 6078 */ // Label 218: @6078
2114 /* 6078 */ GIM_Reject,
2115 /* 6079 */ // Label 209: @6079
2116 /* 6079 */ GIM_Reject,
2117 /* 6080 */ // Label 194: @6080
2118 /* 6080 */ GIM_Try, /*On fail goto*//*Label 219*/ GIMT_Encode4(7090),
2119 /* 6085 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
2120 /* 6088 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
2121 /* 6091 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2122 /* 6095 */ GIM_Try, /*On fail goto*//*Label 220*/ GIMT_Encode4(6216), // Rule ID 1357 //
2123 /* 6100 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2124 /* 6104 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2125 /* 6108 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
2126 /* 6112 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2127 /* 6116 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2128 /* 6120 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2129 /* 6124 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2130 /* 6128 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
2131 /* 6132 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2132 /* 6136 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2133 /* 6140 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2134 /* 6145 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2135 /* 6149 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2136 /* 6155 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v4i32,
2137 /* 6159 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2138 /* 6161 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2139 /* 6166 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2140 /* 6170 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2141 /* 6174 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v4i32,
2142 /* 6178 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4i32,
2143 /* 6182 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2144 /* 6187 */ // MIs[4] c
2145 /* 6187 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2146 /* 6192 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2147 /* 6194 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2148 /* 6194 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2149 /* 6197 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2150 /* 6199 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2151 /* 6203 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
2152 /* 6207 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2153 /* 6211 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2154 /* 6214 */ GIR_RootConstrainSelectedInstOperands,
2155 /* 6215 */ // GIR_Coverage, 1357,
2156 /* 6215 */ GIR_EraseRootFromParent_Done,
2157 /* 6216 */ // Label 220: @6216
2158 /* 6216 */ GIM_Try, /*On fail goto*//*Label 221*/ GIMT_Encode4(6337), // Rule ID 1356 //
2159 /* 6221 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2160 /* 6225 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2161 /* 6229 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
2162 /* 6233 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2163 /* 6237 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2164 /* 6241 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2165 /* 6245 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2166 /* 6249 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
2167 /* 6253 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2168 /* 6257 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2169 /* 6261 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2170 /* 6266 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2171 /* 6270 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2172 /* 6276 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v4i32,
2173 /* 6280 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2174 /* 6282 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2175 /* 6287 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2176 /* 6291 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2177 /* 6295 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v4i32,
2178 /* 6299 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4i32,
2179 /* 6303 */ // MIs[4] c
2180 /* 6303 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2181 /* 6308 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2182 /* 6313 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2183 /* 6315 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2184 /* 6315 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2185 /* 6318 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2186 /* 6320 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2187 /* 6324 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
2188 /* 6328 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2189 /* 6332 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2190 /* 6335 */ GIR_RootConstrainSelectedInstOperands,
2191 /* 6336 */ // GIR_Coverage, 1356,
2192 /* 6336 */ GIR_EraseRootFromParent_Done,
2193 /* 6337 */ // Label 221: @6337
2194 /* 6337 */ GIM_Try, /*On fail goto*//*Label 222*/ GIMT_Encode4(6458), // Rule ID 1359 //
2195 /* 6342 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2196 /* 6346 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2197 /* 6350 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
2198 /* 6354 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2199 /* 6358 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2200 /* 6362 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2201 /* 6367 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2202 /* 6371 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2203 /* 6375 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
2204 /* 6379 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2205 /* 6383 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2206 /* 6387 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2207 /* 6392 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2208 /* 6396 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2209 /* 6402 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v4i32,
2210 /* 6406 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2211 /* 6408 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2212 /* 6412 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2213 /* 6416 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v4i32,
2214 /* 6420 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4i32,
2215 /* 6424 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2216 /* 6429 */ // MIs[4] c
2217 /* 6429 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2218 /* 6434 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2219 /* 6436 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2220 /* 6436 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2221 /* 6439 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2222 /* 6441 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2223 /* 6445 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2224 /* 6449 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2225 /* 6453 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2226 /* 6456 */ GIR_RootConstrainSelectedInstOperands,
2227 /* 6457 */ // GIR_Coverage, 1359,
2228 /* 6457 */ GIR_EraseRootFromParent_Done,
2229 /* 6458 */ // Label 222: @6458
2230 /* 6458 */ GIM_Try, /*On fail goto*//*Label 223*/ GIMT_Encode4(6579), // Rule ID 1358 //
2231 /* 6463 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2232 /* 6467 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2233 /* 6471 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
2234 /* 6475 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2235 /* 6479 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2236 /* 6483 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2237 /* 6488 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2238 /* 6492 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2239 /* 6496 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
2240 /* 6500 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2241 /* 6504 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2242 /* 6508 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2243 /* 6513 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2244 /* 6517 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2245 /* 6523 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v4i32,
2246 /* 6527 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2247 /* 6529 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2248 /* 6533 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2249 /* 6537 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v4i32,
2250 /* 6541 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4i32,
2251 /* 6545 */ // MIs[4] c
2252 /* 6545 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2253 /* 6550 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2254 /* 6555 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2255 /* 6557 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2256 /* 6557 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2257 /* 6560 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2258 /* 6562 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2259 /* 6566 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2260 /* 6570 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2261 /* 6574 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2262 /* 6577 */ GIR_RootConstrainSelectedInstOperands,
2263 /* 6578 */ // GIR_Coverage, 1358,
2264 /* 6578 */ GIR_EraseRootFromParent_Done,
2265 /* 6579 */ // Label 223: @6579
2266 /* 6579 */ GIM_Try, /*On fail goto*//*Label 224*/ GIMT_Encode4(6700), // Rule ID 1061 //
2267 /* 6584 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2268 /* 6588 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2269 /* 6592 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
2270 /* 6596 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2271 /* 6600 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2272 /* 6604 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2273 /* 6609 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2274 /* 6614 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2275 /* 6618 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2276 /* 6622 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
2277 /* 6626 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2278 /* 6630 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2279 /* 6634 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2280 /* 6638 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2281 /* 6642 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v4i32,
2282 /* 6646 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
2283 /* 6650 */ // MIs[3] c
2284 /* 6650 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2285 /* 6655 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2286 /* 6659 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2287 /* 6665 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v4i32,
2288 /* 6669 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2289 /* 6671 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2290 /* 6676 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2291 /* 6678 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1), (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2292 /* 6678 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2293 /* 6681 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2294 /* 6683 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2295 /* 6687 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2296 /* 6691 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2297 /* 6695 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2298 /* 6698 */ GIR_RootConstrainSelectedInstOperands,
2299 /* 6699 */ // GIR_Coverage, 1061,
2300 /* 6699 */ GIR_EraseRootFromParent_Done,
2301 /* 6700 */ // Label 224: @6700
2302 /* 6700 */ GIM_Try, /*On fail goto*//*Label 225*/ GIMT_Encode4(6821), // Rule ID 1354 //
2303 /* 6705 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2304 /* 6709 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2305 /* 6713 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
2306 /* 6717 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2307 /* 6721 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2308 /* 6725 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2309 /* 6730 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2310 /* 6735 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2311 /* 6739 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2312 /* 6743 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
2313 /* 6747 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2314 /* 6751 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2315 /* 6755 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2316 /* 6759 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2317 /* 6763 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v4i32,
2318 /* 6767 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
2319 /* 6771 */ // MIs[3] c
2320 /* 6771 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2321 /* 6776 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2322 /* 6780 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2323 /* 6786 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v4i32,
2324 /* 6790 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2325 /* 6792 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2326 /* 6797 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2327 /* 6799 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c), (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), V128:{ *:[v4i32] }:$v2)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2328 /* 6799 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2329 /* 6802 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2330 /* 6804 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2331 /* 6808 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2332 /* 6812 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2333 /* 6816 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2334 /* 6819 */ GIR_RootConstrainSelectedInstOperands,
2335 /* 6820 */ // GIR_Coverage, 1354,
2336 /* 6820 */ GIR_EraseRootFromParent_Done,
2337 /* 6821 */ // Label 225: @6821
2338 /* 6821 */ GIM_Try, /*On fail goto*//*Label 226*/ GIMT_Encode4(6942), // Rule ID 1353 //
2339 /* 6826 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2340 /* 6830 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2341 /* 6834 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
2342 /* 6838 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2343 /* 6842 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2344 /* 6846 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2345 /* 6851 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2346 /* 6856 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2347 /* 6860 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2348 /* 6864 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
2349 /* 6868 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2350 /* 6872 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2351 /* 6876 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2352 /* 6881 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2353 /* 6885 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2354 /* 6889 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v4i32,
2355 /* 6893 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
2356 /* 6897 */ // MIs[3] c
2357 /* 6897 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2358 /* 6902 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2359 /* 6906 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2360 /* 6912 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v4i32,
2361 /* 6916 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2362 /* 6918 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2363 /* 6920 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2364 /* 6920 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2365 /* 6923 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2366 /* 6925 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2367 /* 6929 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2368 /* 6933 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2369 /* 6937 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2370 /* 6940 */ GIR_RootConstrainSelectedInstOperands,
2371 /* 6941 */ // GIR_Coverage, 1353,
2372 /* 6941 */ GIR_EraseRootFromParent_Done,
2373 /* 6942 */ // Label 226: @6942
2374 /* 6942 */ GIM_Try, /*On fail goto*//*Label 227*/ GIMT_Encode4(7063), // Rule ID 1355 //
2375 /* 6947 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2376 /* 6951 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2377 /* 6955 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
2378 /* 6959 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
2379 /* 6963 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
2380 /* 6967 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2381 /* 6972 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2382 /* 6977 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2383 /* 6981 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2384 /* 6985 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
2385 /* 6989 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
2386 /* 6993 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
2387 /* 6997 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2388 /* 7002 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2389 /* 7006 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2390 /* 7010 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v4i32,
2391 /* 7014 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
2392 /* 7018 */ // MIs[3] c
2393 /* 7018 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2394 /* 7023 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2395 /* 7027 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2396 /* 7033 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v4i32,
2397 /* 7037 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2398 /* 7039 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2399 /* 7041 */ // (or:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$c), (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
2400 /* 7041 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2401 /* 7044 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2402 /* 7046 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2403 /* 7050 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2404 /* 7054 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2405 /* 7058 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2406 /* 7061 */ GIR_RootConstrainSelectedInstOperands,
2407 /* 7062 */ // GIR_Coverage, 1355,
2408 /* 7062 */ GIR_EraseRootFromParent_Done,
2409 /* 7063 */ // Label 227: @7063
2410 /* 7063 */ GIM_Try, /*On fail goto*//*Label 228*/ GIMT_Encode4(7089), // Rule ID 1042 //
2411 /* 7068 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2412 /* 7072 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2413 /* 7076 */ // (or:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (OR:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
2414 /* 7076 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
2415 /* 7081 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2416 /* 7087 */ GIR_RootConstrainSelectedInstOperands,
2417 /* 7088 */ // GIR_Coverage, 1042,
2418 /* 7088 */ GIR_Done,
2419 /* 7089 */ // Label 228: @7089
2420 /* 7089 */ GIM_Reject,
2421 /* 7090 */ // Label 219: @7090
2422 /* 7090 */ GIM_Reject,
2423 /* 7091 */ // Label 195: @7091
2424 /* 7091 */ GIM_Try, /*On fail goto*//*Label 229*/ GIMT_Encode4(8101),
2425 /* 7096 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
2426 /* 7099 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
2427 /* 7102 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2428 /* 7106 */ GIM_Try, /*On fail goto*//*Label 230*/ GIMT_Encode4(7227), // Rule ID 1364 //
2429 /* 7111 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2430 /* 7115 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2431 /* 7119 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
2432 /* 7123 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2433 /* 7127 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2434 /* 7131 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2435 /* 7135 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2436 /* 7139 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
2437 /* 7143 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2438 /* 7147 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2439 /* 7151 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2440 /* 7156 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2441 /* 7160 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2442 /* 7166 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v2i64,
2443 /* 7170 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2444 /* 7172 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2445 /* 7177 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2446 /* 7181 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2447 /* 7185 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v2i64,
2448 /* 7189 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2i64,
2449 /* 7193 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2450 /* 7198 */ // MIs[4] c
2451 /* 7198 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2452 /* 7203 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2453 /* 7205 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2454 /* 7205 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2455 /* 7208 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2456 /* 7210 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2457 /* 7214 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
2458 /* 7218 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2459 /* 7222 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2460 /* 7225 */ GIR_RootConstrainSelectedInstOperands,
2461 /* 7226 */ // GIR_Coverage, 1364,
2462 /* 7226 */ GIR_EraseRootFromParent_Done,
2463 /* 7227 */ // Label 230: @7227
2464 /* 7227 */ GIM_Try, /*On fail goto*//*Label 231*/ GIMT_Encode4(7348), // Rule ID 1363 //
2465 /* 7232 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2466 /* 7236 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2467 /* 7240 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
2468 /* 7244 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2469 /* 7248 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2470 /* 7252 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2471 /* 7256 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2472 /* 7260 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
2473 /* 7264 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2474 /* 7268 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2475 /* 7272 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2476 /* 7277 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2477 /* 7281 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2478 /* 7287 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v2i64,
2479 /* 7291 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2480 /* 7293 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2481 /* 7298 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2482 /* 7302 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2483 /* 7306 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v2i64,
2484 /* 7310 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2i64,
2485 /* 7314 */ // MIs[4] c
2486 /* 7314 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2487 /* 7319 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2488 /* 7324 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2489 /* 7326 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2490 /* 7326 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2491 /* 7329 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2492 /* 7331 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2493 /* 7335 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v2
2494 /* 7339 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2495 /* 7343 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2496 /* 7346 */ GIR_RootConstrainSelectedInstOperands,
2497 /* 7347 */ // GIR_Coverage, 1363,
2498 /* 7347 */ GIR_EraseRootFromParent_Done,
2499 /* 7348 */ // Label 231: @7348
2500 /* 7348 */ GIM_Try, /*On fail goto*//*Label 232*/ GIMT_Encode4(7469), // Rule ID 1366 //
2501 /* 7353 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2502 /* 7357 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2503 /* 7361 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
2504 /* 7365 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2505 /* 7369 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2506 /* 7373 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2507 /* 7378 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2508 /* 7382 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2509 /* 7386 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
2510 /* 7390 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2511 /* 7394 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2512 /* 7398 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2513 /* 7403 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2514 /* 7407 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2515 /* 7413 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v2i64,
2516 /* 7417 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2517 /* 7419 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2518 /* 7423 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2519 /* 7427 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v2i64,
2520 /* 7431 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2i64,
2521 /* 7435 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2522 /* 7440 */ // MIs[4] c
2523 /* 7440 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2524 /* 7445 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2525 /* 7447 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2526 /* 7447 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2527 /* 7450 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2528 /* 7452 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2529 /* 7456 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2530 /* 7460 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2531 /* 7464 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2532 /* 7467 */ GIR_RootConstrainSelectedInstOperands,
2533 /* 7468 */ // GIR_Coverage, 1366,
2534 /* 7468 */ GIR_EraseRootFromParent_Done,
2535 /* 7469 */ // Label 232: @7469
2536 /* 7469 */ GIM_Try, /*On fail goto*//*Label 233*/ GIMT_Encode4(7590), // Rule ID 1365 //
2537 /* 7474 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2538 /* 7478 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2539 /* 7482 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
2540 /* 7486 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2541 /* 7490 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2542 /* 7494 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2543 /* 7499 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2544 /* 7503 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2545 /* 7507 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
2546 /* 7511 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2547 /* 7515 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2548 /* 7519 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2549 /* 7524 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2550 /* 7528 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2551 /* 7534 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v2i64,
2552 /* 7538 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2553 /* 7540 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
2554 /* 7544 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_AND),
2555 /* 7548 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v2i64,
2556 /* 7552 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2i64,
2557 /* 7556 */ // MIs[4] c
2558 /* 7556 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/2, /*OtherOpIdx*/1,
2559 /* 7561 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2560 /* 7566 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2561 /* 7568 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2562 /* 7568 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2563 /* 7571 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2564 /* 7573 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2565 /* 7577 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v2
2566 /* 7581 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2567 /* 7585 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2568 /* 7588 */ GIR_RootConstrainSelectedInstOperands,
2569 /* 7589 */ // GIR_Coverage, 1365,
2570 /* 7589 */ GIR_EraseRootFromParent_Done,
2571 /* 7590 */ // Label 233: @7590
2572 /* 7590 */ GIM_Try, /*On fail goto*//*Label 234*/ GIMT_Encode4(7711), // Rule ID 1062 //
2573 /* 7595 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2574 /* 7599 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2575 /* 7603 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
2576 /* 7607 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2577 /* 7611 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2578 /* 7615 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2579 /* 7620 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2580 /* 7625 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2581 /* 7629 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2582 /* 7633 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
2583 /* 7637 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2584 /* 7641 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2585 /* 7645 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2586 /* 7649 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2587 /* 7653 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v2i64,
2588 /* 7657 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
2589 /* 7661 */ // MIs[3] c
2590 /* 7661 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2591 /* 7666 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2592 /* 7670 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2593 /* 7676 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v2i64,
2594 /* 7680 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2595 /* 7682 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2596 /* 7687 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2597 /* 7689 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1), (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2598 /* 7689 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2599 /* 7692 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2600 /* 7694 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2601 /* 7698 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2602 /* 7702 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2603 /* 7706 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2604 /* 7709 */ GIR_RootConstrainSelectedInstOperands,
2605 /* 7710 */ // GIR_Coverage, 1062,
2606 /* 7710 */ GIR_EraseRootFromParent_Done,
2607 /* 7711 */ // Label 234: @7711
2608 /* 7711 */ GIM_Try, /*On fail goto*//*Label 235*/ GIMT_Encode4(7832), // Rule ID 1361 //
2609 /* 7716 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2610 /* 7720 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2611 /* 7724 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
2612 /* 7728 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2613 /* 7732 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2614 /* 7736 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2615 /* 7741 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2616 /* 7746 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2617 /* 7750 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2618 /* 7754 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
2619 /* 7758 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2620 /* 7762 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2621 /* 7766 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2622 /* 7770 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2623 /* 7774 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v2i64,
2624 /* 7778 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
2625 /* 7782 */ // MIs[3] c
2626 /* 7782 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2627 /* 7787 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2628 /* 7791 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2629 /* 7797 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v2i64,
2630 /* 7801 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2631 /* 7803 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2632 /* 7808 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2633 /* 7810 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c), (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), V128:{ *:[v2i64] }:$v2)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2634 /* 7810 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2635 /* 7813 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2636 /* 7815 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2637 /* 7819 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2638 /* 7823 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2639 /* 7827 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2640 /* 7830 */ GIR_RootConstrainSelectedInstOperands,
2641 /* 7831 */ // GIR_Coverage, 1361,
2642 /* 7831 */ GIR_EraseRootFromParent_Done,
2643 /* 7832 */ // Label 235: @7832
2644 /* 7832 */ GIM_Try, /*On fail goto*//*Label 236*/ GIMT_Encode4(7953), // Rule ID 1360 //
2645 /* 7837 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2646 /* 7841 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2647 /* 7845 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
2648 /* 7849 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2649 /* 7853 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2650 /* 7857 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2651 /* 7862 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2652 /* 7867 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2653 /* 7871 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2654 /* 7875 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
2655 /* 7879 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2656 /* 7883 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2657 /* 7887 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2658 /* 7892 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2659 /* 7896 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2660 /* 7900 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v2i64,
2661 /* 7904 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
2662 /* 7908 */ // MIs[3] c
2663 /* 7908 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2664 /* 7913 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2665 /* 7917 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2666 /* 7923 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v2i64,
2667 /* 7927 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2668 /* 7929 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2669 /* 7931 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2670 /* 7931 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2671 /* 7934 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2672 /* 7936 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // v1
2673 /* 7940 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2674 /* 7944 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
2675 /* 7948 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2676 /* 7951 */ GIR_RootConstrainSelectedInstOperands,
2677 /* 7952 */ // GIR_Coverage, 1360,
2678 /* 7952 */ GIR_EraseRootFromParent_Done,
2679 /* 7953 */ // Label 236: @7953
2680 /* 7953 */ GIM_Try, /*On fail goto*//*Label 237*/ GIMT_Encode4(8074), // Rule ID 1362 //
2681 /* 7958 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2682 /* 7962 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2683 /* 7966 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
2684 /* 7970 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
2685 /* 7974 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
2686 /* 7978 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2687 /* 7983 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2688 /* 7988 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2689 /* 7992 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
2690 /* 7996 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
2691 /* 8000 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
2692 /* 8004 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
2693 /* 8008 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2694 /* 8013 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2695 /* 8017 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2696 /* 8021 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v2i64,
2697 /* 8025 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
2698 /* 8029 */ // MIs[3] c
2699 /* 8029 */ GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/2,
2700 /* 8034 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2701 /* 8038 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2702 /* 8044 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v2i64,
2703 /* 8048 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2704 /* 8050 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2705 /* 8052 */ // (or:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$c), (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
2706 /* 8052 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2707 /* 8055 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2708 /* 8057 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // v1
2709 /* 8061 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2710 /* 8065 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
2711 /* 8069 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2712 /* 8072 */ GIR_RootConstrainSelectedInstOperands,
2713 /* 8073 */ // GIR_Coverage, 1362,
2714 /* 8073 */ GIR_EraseRootFromParent_Done,
2715 /* 8074 */ // Label 237: @8074
2716 /* 8074 */ GIM_Try, /*On fail goto*//*Label 238*/ GIMT_Encode4(8100), // Rule ID 1043 //
2717 /* 8079 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2718 /* 8083 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2719 /* 8087 */ // (or:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (OR:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
2720 /* 8087 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::OR),
2721 /* 8092 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2722 /* 8098 */ GIR_RootConstrainSelectedInstOperands,
2723 /* 8099 */ // GIR_Coverage, 1043,
2724 /* 8099 */ GIR_Done,
2725 /* 8100 */ // Label 238: @8100
2726 /* 8100 */ GIM_Reject,
2727 /* 8101 */ // Label 229: @8101
2728 /* 8101 */ GIM_Reject,
2729 /* 8102 */ // Label 196: @8102
2730 /* 8102 */ GIM_Reject,
2731 /* 8103 */ // Label 9: @8103
2732 /* 8103 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 245*/ GIMT_Encode4(15224),
2733 /* 8114 */ /*GILLT_i32*//*Label 239*/ GIMT_Encode4(8170),
2734 /* 8118 */ /*GILLT_i64*//*Label 240*/ GIMT_Encode4(8207), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
2735 /* 8154 */ /*GILLT_v16i8*//*Label 241*/ GIMT_Encode4(8244),
2736 /* 8158 */ /*GILLT_v8i16*//*Label 242*/ GIMT_Encode4(9989),
2737 /* 8162 */ /*GILLT_v4i32*//*Label 243*/ GIMT_Encode4(11734),
2738 /* 8166 */ /*GILLT_v2i64*//*Label 244*/ GIMT_Encode4(13479),
2739 /* 8170 */ // Label 239: @8170
2740 /* 8170 */ GIM_Try, /*On fail goto*//*Label 246*/ GIMT_Encode4(8206), // Rule ID 82 //
2741 /* 8175 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
2742 /* 8178 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
2743 /* 8181 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
2744 /* 8185 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
2745 /* 8189 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
2746 /* 8193 */ // (xor:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (XOR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
2747 /* 8193 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR_I32),
2748 /* 8198 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2749 /* 8204 */ GIR_RootConstrainSelectedInstOperands,
2750 /* 8205 */ // GIR_Coverage, 82,
2751 /* 8205 */ GIR_Done,
2752 /* 8206 */ // Label 246: @8206
2753 /* 8206 */ GIM_Reject,
2754 /* 8207 */ // Label 240: @8207
2755 /* 8207 */ GIM_Try, /*On fail goto*//*Label 247*/ GIMT_Encode4(8243), // Rule ID 83 //
2756 /* 8212 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
2757 /* 8215 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
2758 /* 8218 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
2759 /* 8222 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
2760 /* 8226 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
2761 /* 8230 */ // (xor:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (XOR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
2762 /* 8230 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR_I64),
2763 /* 8235 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
2764 /* 8241 */ GIR_RootConstrainSelectedInstOperands,
2765 /* 8242 */ // GIR_Coverage, 83,
2766 /* 8242 */ GIR_Done,
2767 /* 8243 */ // Label 247: @8243
2768 /* 8243 */ GIM_Reject,
2769 /* 8244 */ // Label 241: @8244
2770 /* 8244 */ GIM_Try, /*On fail goto*//*Label 248*/ GIMT_Encode4(9988),
2771 /* 8249 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
2772 /* 8252 */ GIM_Try, /*On fail goto*//*Label 249*/ GIMT_Encode4(8762),
2773 /* 8257 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2774 /* 8261 */ GIM_Try, /*On fail goto*//*Label 250*/ GIMT_Encode4(8386), // Rule ID 1396 //
2775 /* 8266 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2776 /* 8270 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2777 /* 8274 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
2778 /* 8278 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2779 /* 8282 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2780 /* 8286 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2781 /* 8290 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2782 /* 8294 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
2783 /* 8298 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2784 /* 8302 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2785 /* 8306 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2786 /* 8311 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2787 /* 8315 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2788 /* 8321 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v16i8,
2789 /* 8325 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2790 /* 8327 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2791 /* 8331 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2792 /* 8335 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v16i8,
2793 /* 8339 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16i8,
2794 /* 8343 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16i8,
2795 /* 8347 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2796 /* 8352 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2797 /* 8357 */ // MIs[0] v2
2798 /* 8357 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
2799 /* 8362 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2800 /* 8364 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2801 /* 8364 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2802 /* 8367 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2803 /* 8369 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
2804 /* 8373 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2805 /* 8377 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2806 /* 8381 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2807 /* 8384 */ GIR_RootConstrainSelectedInstOperands,
2808 /* 8385 */ // GIR_Coverage, 1396,
2809 /* 8385 */ GIR_EraseRootFromParent_Done,
2810 /* 8386 */ // Label 250: @8386
2811 /* 8386 */ GIM_Try, /*On fail goto*//*Label 251*/ GIMT_Encode4(8511), // Rule ID 1397 //
2812 /* 8391 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2813 /* 8395 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2814 /* 8399 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
2815 /* 8403 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2816 /* 8407 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2817 /* 8411 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2818 /* 8415 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2819 /* 8419 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
2820 /* 8423 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2821 /* 8427 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2822 /* 8431 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2823 /* 8436 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2824 /* 8440 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2825 /* 8446 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v16i8,
2826 /* 8450 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2827 /* 8452 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2828 /* 8456 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2829 /* 8460 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v16i8,
2830 /* 8464 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16i8,
2831 /* 8468 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16i8,
2832 /* 8472 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2833 /* 8477 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2834 /* 8482 */ // MIs[0] v2
2835 /* 8482 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
2836 /* 8487 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2837 /* 8489 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2838 /* 8489 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2839 /* 8492 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2840 /* 8494 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
2841 /* 8498 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2842 /* 8502 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2843 /* 8506 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2844 /* 8509 */ GIR_RootConstrainSelectedInstOperands,
2845 /* 8510 */ // GIR_Coverage, 1397,
2846 /* 8510 */ GIR_EraseRootFromParent_Done,
2847 /* 8511 */ // Label 251: @8511
2848 /* 8511 */ GIM_Try, /*On fail goto*//*Label 252*/ GIMT_Encode4(8636), // Rule ID 1067 //
2849 /* 8516 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2850 /* 8520 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2851 /* 8524 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
2852 /* 8528 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2853 /* 8532 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2854 /* 8536 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2855 /* 8540 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2856 /* 8544 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
2857 /* 8548 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2858 /* 8552 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2859 /* 8556 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2860 /* 8561 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2861 /* 8566 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2862 /* 8570 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2863 /* 8574 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v16i8,
2864 /* 8578 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16i8,
2865 /* 8582 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
2866 /* 8586 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2867 /* 8591 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2868 /* 8595 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2869 /* 8601 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v16i8,
2870 /* 8605 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2871 /* 8607 */ // MIs[0] v2
2872 /* 8607 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
2873 /* 8612 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2874 /* 8614 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2875 /* 8614 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2876 /* 8617 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2877 /* 8619 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
2878 /* 8623 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
2879 /* 8627 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2880 /* 8631 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2881 /* 8634 */ GIR_RootConstrainSelectedInstOperands,
2882 /* 8635 */ // GIR_Coverage, 1067,
2883 /* 8635 */ GIR_EraseRootFromParent_Done,
2884 /* 8636 */ // Label 252: @8636
2885 /* 8636 */ GIM_Try, /*On fail goto*//*Label 253*/ GIMT_Encode4(8761), // Rule ID 1395 //
2886 /* 8641 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2887 /* 8645 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2888 /* 8649 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
2889 /* 8653 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2890 /* 8657 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2891 /* 8661 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2892 /* 8665 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2893 /* 8669 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
2894 /* 8673 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2895 /* 8677 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2896 /* 8681 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2897 /* 8686 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2898 /* 8691 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
2899 /* 8695 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
2900 /* 8699 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v16i8,
2901 /* 8703 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16i8,
2902 /* 8707 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
2903 /* 8711 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2904 /* 8716 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
2905 /* 8720 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2906 /* 8726 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v16i8,
2907 /* 8730 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
2908 /* 8732 */ // MIs[0] v2
2909 /* 8732 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
2910 /* 8737 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2911 /* 8739 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] })), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2912 /* 8739 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2913 /* 8742 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2914 /* 8744 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
2915 /* 8748 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
2916 /* 8752 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
2917 /* 8756 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2918 /* 8759 */ GIR_RootConstrainSelectedInstOperands,
2919 /* 8760 */ // GIR_Coverage, 1395,
2920 /* 8760 */ GIR_EraseRootFromParent_Done,
2921 /* 8761 */ // Label 253: @8761
2922 /* 8761 */ GIM_Reject,
2923 /* 8762 */ // Label 249: @8762
2924 /* 8762 */ GIM_Try, /*On fail goto*//*Label 254*/ GIMT_Encode4(9235),
2925 /* 8767 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
2926 /* 8770 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2927 /* 8774 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2928 /* 8778 */ GIM_Try, /*On fail goto*//*Label 255*/ GIMT_Encode4(8892), // Rule ID 1400 //
2929 /* 8783 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2930 /* 8787 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2931 /* 8791 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
2932 /* 8795 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2933 /* 8799 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2934 /* 8803 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2935 /* 8807 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2936 /* 8811 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
2937 /* 8815 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2938 /* 8819 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2939 /* 8823 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2940 /* 8828 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2941 /* 8832 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2942 /* 8838 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v16i8,
2943 /* 8842 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2944 /* 8844 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2945 /* 8848 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2946 /* 8852 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v16i8,
2947 /* 8856 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v16i8,
2948 /* 8860 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2949 /* 8865 */ // MIs[4] v2
2950 /* 8865 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
2951 /* 8870 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2952 /* 8872 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2953 /* 8872 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2954 /* 8875 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2955 /* 8877 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2956 /* 8879 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
2957 /* 8883 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2958 /* 8887 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2959 /* 8890 */ GIR_RootConstrainSelectedInstOperands,
2960 /* 8891 */ // GIR_Coverage, 1400,
2961 /* 8891 */ GIR_EraseRootFromParent_Done,
2962 /* 8892 */ // Label 255: @8892
2963 /* 8892 */ GIM_Try, /*On fail goto*//*Label 256*/ GIMT_Encode4(9006), // Rule ID 1401 //
2964 /* 8897 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2965 /* 8901 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
2966 /* 8905 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
2967 /* 8909 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
2968 /* 8913 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
2969 /* 8917 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
2970 /* 8921 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
2971 /* 8925 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
2972 /* 8929 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
2973 /* 8933 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
2974 /* 8937 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2975 /* 8942 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
2976 /* 8946 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
2977 /* 8952 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v16i8,
2978 /* 8956 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
2979 /* 8958 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
2980 /* 8962 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
2981 /* 8966 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v16i8,
2982 /* 8970 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v16i8,
2983 /* 8974 */ // MIs[4] v2
2984 /* 8974 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
2985 /* 8979 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
2986 /* 8984 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
2987 /* 8986 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
2988 /* 8986 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
2989 /* 8989 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
2990 /* 8991 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
2991 /* 8993 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
2992 /* 8997 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
2993 /* 9001 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
2994 /* 9004 */ GIR_RootConstrainSelectedInstOperands,
2995 /* 9005 */ // GIR_Coverage, 1401,
2996 /* 9005 */ GIR_EraseRootFromParent_Done,
2997 /* 9006 */ // Label 256: @9006
2998 /* 9006 */ GIM_Try, /*On fail goto*//*Label 257*/ GIMT_Encode4(9120), // Rule ID 1398 //
2999 /* 9011 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3000 /* 9015 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3001 /* 9019 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
3002 /* 9023 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
3003 /* 9027 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
3004 /* 9031 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3005 /* 9035 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3006 /* 9039 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
3007 /* 9043 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
3008 /* 9047 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3009 /* 9052 */ // MIs[2] v2
3010 /* 9052 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3011 /* 9057 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3012 /* 9061 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3013 /* 9065 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v16i8,
3014 /* 9069 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16i8,
3015 /* 9073 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
3016 /* 9077 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3017 /* 9082 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3018 /* 9086 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3019 /* 9092 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v16i8,
3020 /* 9096 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3021 /* 9098 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3022 /* 9100 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
3023 /* 9100 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3024 /* 9103 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3025 /* 9105 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3026 /* 9107 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3027 /* 9111 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3028 /* 9115 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3029 /* 9118 */ GIR_RootConstrainSelectedInstOperands,
3030 /* 9119 */ // GIR_Coverage, 1398,
3031 /* 9119 */ GIR_EraseRootFromParent_Done,
3032 /* 9120 */ // Label 257: @9120
3033 /* 9120 */ GIM_Try, /*On fail goto*//*Label 258*/ GIMT_Encode4(9234), // Rule ID 1399 //
3034 /* 9125 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3035 /* 9129 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3036 /* 9133 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
3037 /* 9137 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
3038 /* 9141 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
3039 /* 9145 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3040 /* 9149 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3041 /* 9153 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
3042 /* 9157 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
3043 /* 9161 */ // MIs[2] v2
3044 /* 9161 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3045 /* 9166 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3046 /* 9171 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3047 /* 9175 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3048 /* 9179 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v16i8,
3049 /* 9183 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v16i8,
3050 /* 9187 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v16i8,
3051 /* 9191 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3052 /* 9196 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3053 /* 9200 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3054 /* 9206 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v16i8,
3055 /* 9210 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3056 /* 9212 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3057 /* 9214 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, immAllOnesV:{ *:[v16i8] }))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$c)
3058 /* 9214 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3059 /* 9217 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3060 /* 9219 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3061 /* 9221 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3062 /* 9225 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3063 /* 9229 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3064 /* 9232 */ GIR_RootConstrainSelectedInstOperands,
3065 /* 9233 */ // GIR_Coverage, 1399,
3066 /* 9233 */ GIR_EraseRootFromParent_Done,
3067 /* 9234 */ // Label 258: @9234
3068 /* 9234 */ GIM_Reject,
3069 /* 9235 */ // Label 254: @9235
3070 /* 9235 */ GIM_Try, /*On fail goto*//*Label 259*/ GIMT_Encode4(9601),
3071 /* 9240 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3072 /* 9244 */ GIM_Try, /*On fail goto*//*Label 260*/ GIMT_Encode4(9333), // Rule ID 1063 //
3073 /* 9249 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3074 /* 9253 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3075 /* 9257 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
3076 /* 9261 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
3077 /* 9265 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
3078 /* 9269 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3079 /* 9273 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3080 /* 9277 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
3081 /* 9281 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
3082 /* 9285 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
3083 /* 9289 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3084 /* 9294 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3085 /* 9299 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3086 /* 9304 */ // MIs[0] v2
3087 /* 9304 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3088 /* 9309 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3089 /* 9311 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), V128:{ *:[v16i8] }:$c), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
3090 /* 9311 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3091 /* 9314 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3092 /* 9316 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3093 /* 9320 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3094 /* 9324 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3095 /* 9328 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3096 /* 9331 */ GIR_RootConstrainSelectedInstOperands,
3097 /* 9332 */ // GIR_Coverage, 1063,
3098 /* 9332 */ GIR_EraseRootFromParent_Done,
3099 /* 9333 */ // Label 260: @9333
3100 /* 9333 */ GIM_Try, /*On fail goto*//*Label 261*/ GIMT_Encode4(9422), // Rule ID 1367 //
3101 /* 9338 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3102 /* 9342 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3103 /* 9346 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
3104 /* 9350 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
3105 /* 9354 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
3106 /* 9358 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3107 /* 9362 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3108 /* 9366 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
3109 /* 9370 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
3110 /* 9374 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
3111 /* 9378 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3112 /* 9383 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3113 /* 9388 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3114 /* 9393 */ // MIs[0] v2
3115 /* 9393 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3116 /* 9398 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3117 /* 9400 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), V128:{ *:[v16i8] }:$c), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
3118 /* 9400 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3119 /* 9403 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3120 /* 9405 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3121 /* 9409 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3122 /* 9413 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3123 /* 9417 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3124 /* 9420 */ GIR_RootConstrainSelectedInstOperands,
3125 /* 9421 */ // GIR_Coverage, 1367,
3126 /* 9421 */ GIR_EraseRootFromParent_Done,
3127 /* 9422 */ // Label 261: @9422
3128 /* 9422 */ GIM_Try, /*On fail goto*//*Label 262*/ GIMT_Encode4(9511), // Rule ID 1368 //
3129 /* 9427 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3130 /* 9431 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3131 /* 9435 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
3132 /* 9439 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
3133 /* 9443 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
3134 /* 9447 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3135 /* 9452 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3136 /* 9456 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3137 /* 9460 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
3138 /* 9464 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
3139 /* 9468 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
3140 /* 9472 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3141 /* 9477 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3142 /* 9482 */ // MIs[0] v2
3143 /* 9482 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3144 /* 9487 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3145 /* 9489 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
3146 /* 9489 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3147 /* 9492 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3148 /* 9494 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3149 /* 9498 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3150 /* 9502 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3151 /* 9506 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3152 /* 9509 */ GIR_RootConstrainSelectedInstOperands,
3153 /* 9510 */ // GIR_Coverage, 1368,
3154 /* 9510 */ GIR_EraseRootFromParent_Done,
3155 /* 9511 */ // Label 262: @9511
3156 /* 9511 */ GIM_Try, /*On fail goto*//*Label 263*/ GIMT_Encode4(9600), // Rule ID 1369 //
3157 /* 9516 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3158 /* 9520 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3159 /* 9524 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
3160 /* 9528 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
3161 /* 9532 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
3162 /* 9536 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3163 /* 9541 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3164 /* 9545 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3165 /* 9549 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
3166 /* 9553 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
3167 /* 9557 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
3168 /* 9561 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3169 /* 9566 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3170 /* 9571 */ // MIs[0] v2
3171 /* 9571 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3172 /* 9576 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3173 /* 9578 */ // (xor:{ *:[v16i8] } (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1)), V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
3174 /* 9578 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3175 /* 9581 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3176 /* 9583 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3177 /* 9587 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3178 /* 9591 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3179 /* 9595 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3180 /* 9598 */ GIR_RootConstrainSelectedInstOperands,
3181 /* 9599 */ // GIR_Coverage, 1369,
3182 /* 9599 */ GIR_EraseRootFromParent_Done,
3183 /* 9600 */ // Label 263: @9600
3184 /* 9600 */ GIM_Reject,
3185 /* 9601 */ // Label 259: @9601
3186 /* 9601 */ GIM_Try, /*On fail goto*//*Label 264*/ GIMT_Encode4(9987),
3187 /* 9606 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
3188 /* 9609 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3189 /* 9613 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3190 /* 9617 */ GIM_Try, /*On fail goto*//*Label 265*/ GIMT_Encode4(9695), // Rule ID 1370 //
3191 /* 9622 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3192 /* 9626 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3193 /* 9630 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
3194 /* 9634 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
3195 /* 9638 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
3196 /* 9642 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3197 /* 9646 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3198 /* 9650 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
3199 /* 9654 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
3200 /* 9658 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3201 /* 9663 */ // MIs[2] v2
3202 /* 9663 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3203 /* 9668 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3204 /* 9673 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3205 /* 9675 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2), V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
3206 /* 9675 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3207 /* 9678 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3208 /* 9680 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3209 /* 9684 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3210 /* 9686 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3211 /* 9690 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3212 /* 9693 */ GIR_RootConstrainSelectedInstOperands,
3213 /* 9694 */ // GIR_Coverage, 1370,
3214 /* 9694 */ GIR_EraseRootFromParent_Done,
3215 /* 9695 */ // Label 265: @9695
3216 /* 9695 */ GIM_Try, /*On fail goto*//*Label 266*/ GIMT_Encode4(9773), // Rule ID 1371 //
3217 /* 9700 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3218 /* 9704 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3219 /* 9708 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
3220 /* 9712 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
3221 /* 9716 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
3222 /* 9720 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3223 /* 9724 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3224 /* 9728 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
3225 /* 9732 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
3226 /* 9736 */ // MIs[2] v2
3227 /* 9736 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3228 /* 9741 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3229 /* 9746 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3230 /* 9751 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3231 /* 9753 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1), V128:{ *:[v16i8] }:$c)) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
3232 /* 9753 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3233 /* 9756 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3234 /* 9758 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3235 /* 9762 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3236 /* 9764 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3237 /* 9768 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3238 /* 9771 */ GIR_RootConstrainSelectedInstOperands,
3239 /* 9772 */ // GIR_Coverage, 1371,
3240 /* 9772 */ GIR_EraseRootFromParent_Done,
3241 /* 9773 */ // Label 266: @9773
3242 /* 9773 */ GIM_Try, /*On fail goto*//*Label 267*/ GIMT_Encode4(9851), // Rule ID 1372 //
3243 /* 9778 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3244 /* 9782 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3245 /* 9786 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
3246 /* 9790 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
3247 /* 9794 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
3248 /* 9798 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3249 /* 9803 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3250 /* 9807 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3251 /* 9811 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
3252 /* 9815 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v16i8,
3253 /* 9819 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3254 /* 9824 */ // MIs[2] v2
3255 /* 9824 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3256 /* 9829 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3257 /* 9831 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
3258 /* 9831 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3259 /* 9834 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3260 /* 9836 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3261 /* 9840 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3262 /* 9842 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3263 /* 9846 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3264 /* 9849 */ GIR_RootConstrainSelectedInstOperands,
3265 /* 9850 */ // GIR_Coverage, 1372,
3266 /* 9850 */ GIR_EraseRootFromParent_Done,
3267 /* 9851 */ // Label 267: @9851
3268 /* 9851 */ GIM_Try, /*On fail goto*//*Label 268*/ GIMT_Encode4(9929), // Rule ID 1373 //
3269 /* 9856 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3270 /* 9860 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3271 /* 9864 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
3272 /* 9868 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
3273 /* 9872 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
3274 /* 9876 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3275 /* 9881 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3276 /* 9885 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3277 /* 9889 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
3278 /* 9893 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v16i8,
3279 /* 9897 */ // MIs[2] v2
3280 /* 9897 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3281 /* 9902 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3282 /* 9907 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3283 /* 9909 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$v1))) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
3284 /* 9909 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3285 /* 9912 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3286 /* 9914 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3287 /* 9918 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3288 /* 9920 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3289 /* 9924 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3290 /* 9927 */ GIR_RootConstrainSelectedInstOperands,
3291 /* 9928 */ // GIR_Coverage, 1373,
3292 /* 9928 */ GIR_EraseRootFromParent_Done,
3293 /* 9929 */ // Label 268: @9929
3294 /* 9929 */ GIM_Try, /*On fail goto*//*Label 269*/ GIMT_Encode4(9964), // Rule ID 1033 //
3295 /* 9934 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3296 /* 9938 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3297 /* 9944 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
3298 /* 9948 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
3299 /* 9950 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
3300 /* 9952 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$v, immAllOnesV:{ *:[v16i8] }) => (NOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v)
3301 /* 9952 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
3302 /* 9955 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3303 /* 9957 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
3304 /* 9959 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3305 /* 9962 */ GIR_RootConstrainSelectedInstOperands,
3306 /* 9963 */ // GIR_Coverage, 1033,
3307 /* 9963 */ GIR_EraseRootFromParent_Done,
3308 /* 9964 */ // Label 269: @9964
3309 /* 9964 */ GIM_Try, /*On fail goto*//*Label 270*/ GIMT_Encode4(9986), // Rule ID 1044 //
3310 /* 9969 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3311 /* 9973 */ // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (XOR:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
3312 /* 9973 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
3313 /* 9978 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
3314 /* 9984 */ GIR_RootConstrainSelectedInstOperands,
3315 /* 9985 */ // GIR_Coverage, 1044,
3316 /* 9985 */ GIR_Done,
3317 /* 9986 */ // Label 270: @9986
3318 /* 9986 */ GIM_Reject,
3319 /* 9987 */ // Label 264: @9987
3320 /* 9987 */ GIM_Reject,
3321 /* 9988 */ // Label 248: @9988
3322 /* 9988 */ GIM_Reject,
3323 /* 9989 */ // Label 242: @9989
3324 /* 9989 */ GIM_Try, /*On fail goto*//*Label 271*/ GIMT_Encode4(11733),
3325 /* 9994 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
3326 /* 9997 */ GIM_Try, /*On fail goto*//*Label 272*/ GIMT_Encode4(10507),
3327 /* 10002 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3328 /* 10006 */ GIM_Try, /*On fail goto*//*Label 273*/ GIMT_Encode4(10131), // Rule ID 1403 //
3329 /* 10011 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3330 /* 10015 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3331 /* 10019 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
3332 /* 10023 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3333 /* 10027 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3334 /* 10031 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3335 /* 10035 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3336 /* 10039 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
3337 /* 10043 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3338 /* 10047 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3339 /* 10051 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3340 /* 10056 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3341 /* 10060 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3342 /* 10066 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v8i16,
3343 /* 10070 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3344 /* 10072 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3345 /* 10076 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3346 /* 10080 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v8i16,
3347 /* 10084 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8i16,
3348 /* 10088 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8i16,
3349 /* 10092 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3350 /* 10097 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3351 /* 10102 */ // MIs[0] v2
3352 /* 10102 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
3353 /* 10107 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3354 /* 10109 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3355 /* 10109 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3356 /* 10112 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3357 /* 10114 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
3358 /* 10118 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3359 /* 10122 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3360 /* 10126 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3361 /* 10129 */ GIR_RootConstrainSelectedInstOperands,
3362 /* 10130 */ // GIR_Coverage, 1403,
3363 /* 10130 */ GIR_EraseRootFromParent_Done,
3364 /* 10131 */ // Label 273: @10131
3365 /* 10131 */ GIM_Try, /*On fail goto*//*Label 274*/ GIMT_Encode4(10256), // Rule ID 1404 //
3366 /* 10136 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3367 /* 10140 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3368 /* 10144 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
3369 /* 10148 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3370 /* 10152 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3371 /* 10156 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3372 /* 10160 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3373 /* 10164 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
3374 /* 10168 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3375 /* 10172 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3376 /* 10176 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3377 /* 10181 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3378 /* 10185 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3379 /* 10191 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v8i16,
3380 /* 10195 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3381 /* 10197 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3382 /* 10201 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3383 /* 10205 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v8i16,
3384 /* 10209 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8i16,
3385 /* 10213 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8i16,
3386 /* 10217 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3387 /* 10222 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3388 /* 10227 */ // MIs[0] v2
3389 /* 10227 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
3390 /* 10232 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3391 /* 10234 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3392 /* 10234 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3393 /* 10237 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3394 /* 10239 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
3395 /* 10243 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3396 /* 10247 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3397 /* 10251 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3398 /* 10254 */ GIR_RootConstrainSelectedInstOperands,
3399 /* 10255 */ // GIR_Coverage, 1404,
3400 /* 10255 */ GIR_EraseRootFromParent_Done,
3401 /* 10256 */ // Label 274: @10256
3402 /* 10256 */ GIM_Try, /*On fail goto*//*Label 275*/ GIMT_Encode4(10381), // Rule ID 1068 //
3403 /* 10261 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3404 /* 10265 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3405 /* 10269 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
3406 /* 10273 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3407 /* 10277 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3408 /* 10281 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3409 /* 10285 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3410 /* 10289 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
3411 /* 10293 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3412 /* 10297 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3413 /* 10301 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3414 /* 10306 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3415 /* 10311 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3416 /* 10315 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3417 /* 10319 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v8i16,
3418 /* 10323 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8i16,
3419 /* 10327 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
3420 /* 10331 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3421 /* 10336 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3422 /* 10340 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3423 /* 10346 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v8i16,
3424 /* 10350 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3425 /* 10352 */ // MIs[0] v2
3426 /* 10352 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3427 /* 10357 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3428 /* 10359 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3429 /* 10359 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3430 /* 10362 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3431 /* 10364 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3432 /* 10368 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3433 /* 10372 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3434 /* 10376 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3435 /* 10379 */ GIR_RootConstrainSelectedInstOperands,
3436 /* 10380 */ // GIR_Coverage, 1068,
3437 /* 10380 */ GIR_EraseRootFromParent_Done,
3438 /* 10381 */ // Label 275: @10381
3439 /* 10381 */ GIM_Try, /*On fail goto*//*Label 276*/ GIMT_Encode4(10506), // Rule ID 1402 //
3440 /* 10386 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3441 /* 10390 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3442 /* 10394 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
3443 /* 10398 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3444 /* 10402 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3445 /* 10406 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3446 /* 10410 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3447 /* 10414 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
3448 /* 10418 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3449 /* 10422 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3450 /* 10426 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3451 /* 10431 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3452 /* 10436 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3453 /* 10440 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3454 /* 10444 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v8i16,
3455 /* 10448 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8i16,
3456 /* 10452 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
3457 /* 10456 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3458 /* 10461 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3459 /* 10465 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3460 /* 10471 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v8i16,
3461 /* 10475 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3462 /* 10477 */ // MIs[0] v2
3463 /* 10477 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3464 /* 10482 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3465 /* 10484 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] })), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3466 /* 10484 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3467 /* 10487 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3468 /* 10489 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3469 /* 10493 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3470 /* 10497 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3471 /* 10501 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3472 /* 10504 */ GIR_RootConstrainSelectedInstOperands,
3473 /* 10505 */ // GIR_Coverage, 1402,
3474 /* 10505 */ GIR_EraseRootFromParent_Done,
3475 /* 10506 */ // Label 276: @10506
3476 /* 10506 */ GIM_Reject,
3477 /* 10507 */ // Label 272: @10507
3478 /* 10507 */ GIM_Try, /*On fail goto*//*Label 277*/ GIMT_Encode4(10980),
3479 /* 10512 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
3480 /* 10515 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3481 /* 10519 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3482 /* 10523 */ GIM_Try, /*On fail goto*//*Label 278*/ GIMT_Encode4(10637), // Rule ID 1407 //
3483 /* 10528 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3484 /* 10532 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3485 /* 10536 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
3486 /* 10540 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3487 /* 10544 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3488 /* 10548 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3489 /* 10552 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3490 /* 10556 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
3491 /* 10560 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3492 /* 10564 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3493 /* 10568 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3494 /* 10573 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3495 /* 10577 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3496 /* 10583 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v8i16,
3497 /* 10587 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3498 /* 10589 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3499 /* 10593 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3500 /* 10597 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v8i16,
3501 /* 10601 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v8i16,
3502 /* 10605 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3503 /* 10610 */ // MIs[4] v2
3504 /* 10610 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3505 /* 10615 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3506 /* 10617 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3507 /* 10617 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3508 /* 10620 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3509 /* 10622 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3510 /* 10624 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3511 /* 10628 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3512 /* 10632 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3513 /* 10635 */ GIR_RootConstrainSelectedInstOperands,
3514 /* 10636 */ // GIR_Coverage, 1407,
3515 /* 10636 */ GIR_EraseRootFromParent_Done,
3516 /* 10637 */ // Label 278: @10637
3517 /* 10637 */ GIM_Try, /*On fail goto*//*Label 279*/ GIMT_Encode4(10751), // Rule ID 1408 //
3518 /* 10642 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3519 /* 10646 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3520 /* 10650 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
3521 /* 10654 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3522 /* 10658 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3523 /* 10662 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3524 /* 10666 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3525 /* 10670 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
3526 /* 10674 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3527 /* 10678 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3528 /* 10682 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3529 /* 10687 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3530 /* 10691 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3531 /* 10697 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v8i16,
3532 /* 10701 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3533 /* 10703 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3534 /* 10707 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3535 /* 10711 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v8i16,
3536 /* 10715 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v8i16,
3537 /* 10719 */ // MIs[4] v2
3538 /* 10719 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3539 /* 10724 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3540 /* 10729 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3541 /* 10731 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3542 /* 10731 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3543 /* 10734 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3544 /* 10736 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3545 /* 10738 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3546 /* 10742 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3547 /* 10746 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3548 /* 10749 */ GIR_RootConstrainSelectedInstOperands,
3549 /* 10750 */ // GIR_Coverage, 1408,
3550 /* 10750 */ GIR_EraseRootFromParent_Done,
3551 /* 10751 */ // Label 279: @10751
3552 /* 10751 */ GIM_Try, /*On fail goto*//*Label 280*/ GIMT_Encode4(10865), // Rule ID 1405 //
3553 /* 10756 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3554 /* 10760 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3555 /* 10764 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
3556 /* 10768 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3557 /* 10772 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3558 /* 10776 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3559 /* 10780 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3560 /* 10784 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
3561 /* 10788 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3562 /* 10792 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3563 /* 10797 */ // MIs[2] v2
3564 /* 10797 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3565 /* 10802 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3566 /* 10806 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3567 /* 10810 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v8i16,
3568 /* 10814 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8i16,
3569 /* 10818 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
3570 /* 10822 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3571 /* 10827 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3572 /* 10831 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3573 /* 10837 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v8i16,
3574 /* 10841 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3575 /* 10843 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3576 /* 10845 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3577 /* 10845 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3578 /* 10848 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3579 /* 10850 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3580 /* 10852 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3581 /* 10856 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3582 /* 10860 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3583 /* 10863 */ GIR_RootConstrainSelectedInstOperands,
3584 /* 10864 */ // GIR_Coverage, 1405,
3585 /* 10864 */ GIR_EraseRootFromParent_Done,
3586 /* 10865 */ // Label 280: @10865
3587 /* 10865 */ GIM_Try, /*On fail goto*//*Label 281*/ GIMT_Encode4(10979), // Rule ID 1406 //
3588 /* 10870 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3589 /* 10874 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3590 /* 10878 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
3591 /* 10882 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3592 /* 10886 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3593 /* 10890 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3594 /* 10894 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3595 /* 10898 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
3596 /* 10902 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3597 /* 10906 */ // MIs[2] v2
3598 /* 10906 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3599 /* 10911 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3600 /* 10916 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3601 /* 10920 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3602 /* 10924 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v8i16,
3603 /* 10928 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8i16,
3604 /* 10932 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v8i16,
3605 /* 10936 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3606 /* 10941 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3607 /* 10945 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3608 /* 10951 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v8i16,
3609 /* 10955 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3610 /* 10957 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3611 /* 10959 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, immAllOnesV:{ *:[v8i16] }))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$c)
3612 /* 10959 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3613 /* 10962 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3614 /* 10964 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3615 /* 10966 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3616 /* 10970 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3617 /* 10974 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3618 /* 10977 */ GIR_RootConstrainSelectedInstOperands,
3619 /* 10978 */ // GIR_Coverage, 1406,
3620 /* 10978 */ GIR_EraseRootFromParent_Done,
3621 /* 10979 */ // Label 281: @10979
3622 /* 10979 */ GIM_Reject,
3623 /* 10980 */ // Label 277: @10980
3624 /* 10980 */ GIM_Try, /*On fail goto*//*Label 282*/ GIMT_Encode4(11346),
3625 /* 10985 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3626 /* 10989 */ GIM_Try, /*On fail goto*//*Label 283*/ GIMT_Encode4(11078), // Rule ID 1064 //
3627 /* 10994 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3628 /* 10998 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3629 /* 11002 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
3630 /* 11006 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3631 /* 11010 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3632 /* 11014 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3633 /* 11018 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3634 /* 11022 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
3635 /* 11026 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3636 /* 11030 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3637 /* 11034 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3638 /* 11039 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3639 /* 11044 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3640 /* 11049 */ // MIs[0] v2
3641 /* 11049 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3642 /* 11054 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3643 /* 11056 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), V128:{ *:[v8i16] }:$c), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3644 /* 11056 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3645 /* 11059 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3646 /* 11061 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3647 /* 11065 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3648 /* 11069 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3649 /* 11073 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3650 /* 11076 */ GIR_RootConstrainSelectedInstOperands,
3651 /* 11077 */ // GIR_Coverage, 1064,
3652 /* 11077 */ GIR_EraseRootFromParent_Done,
3653 /* 11078 */ // Label 283: @11078
3654 /* 11078 */ GIM_Try, /*On fail goto*//*Label 284*/ GIMT_Encode4(11167), // Rule ID 1374 //
3655 /* 11083 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3656 /* 11087 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3657 /* 11091 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
3658 /* 11095 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3659 /* 11099 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3660 /* 11103 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3661 /* 11107 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3662 /* 11111 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
3663 /* 11115 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3664 /* 11119 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3665 /* 11123 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3666 /* 11128 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3667 /* 11133 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3668 /* 11138 */ // MIs[0] v2
3669 /* 11138 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3670 /* 11143 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3671 /* 11145 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), V128:{ *:[v8i16] }:$c), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3672 /* 11145 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3673 /* 11148 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3674 /* 11150 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3675 /* 11154 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3676 /* 11158 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3677 /* 11162 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3678 /* 11165 */ GIR_RootConstrainSelectedInstOperands,
3679 /* 11166 */ // GIR_Coverage, 1374,
3680 /* 11166 */ GIR_EraseRootFromParent_Done,
3681 /* 11167 */ // Label 284: @11167
3682 /* 11167 */ GIM_Try, /*On fail goto*//*Label 285*/ GIMT_Encode4(11256), // Rule ID 1375 //
3683 /* 11172 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3684 /* 11176 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3685 /* 11180 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
3686 /* 11184 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3687 /* 11188 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3688 /* 11192 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3689 /* 11197 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3690 /* 11201 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3691 /* 11205 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
3692 /* 11209 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3693 /* 11213 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3694 /* 11217 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3695 /* 11222 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3696 /* 11227 */ // MIs[0] v2
3697 /* 11227 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3698 /* 11232 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3699 /* 11234 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3700 /* 11234 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3701 /* 11237 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3702 /* 11239 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3703 /* 11243 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3704 /* 11247 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3705 /* 11251 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3706 /* 11254 */ GIR_RootConstrainSelectedInstOperands,
3707 /* 11255 */ // GIR_Coverage, 1375,
3708 /* 11255 */ GIR_EraseRootFromParent_Done,
3709 /* 11256 */ // Label 285: @11256
3710 /* 11256 */ GIM_Try, /*On fail goto*//*Label 286*/ GIMT_Encode4(11345), // Rule ID 1376 //
3711 /* 11261 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3712 /* 11265 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3713 /* 11269 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
3714 /* 11273 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3715 /* 11277 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3716 /* 11281 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3717 /* 11286 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3718 /* 11290 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3719 /* 11294 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
3720 /* 11298 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3721 /* 11302 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3722 /* 11306 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3723 /* 11311 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3724 /* 11316 */ // MIs[0] v2
3725 /* 11316 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3726 /* 11321 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3727 /* 11323 */ // (xor:{ *:[v8i16] } (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1)), V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3728 /* 11323 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3729 /* 11326 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3730 /* 11328 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3731 /* 11332 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
3732 /* 11336 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3733 /* 11340 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3734 /* 11343 */ GIR_RootConstrainSelectedInstOperands,
3735 /* 11344 */ // GIR_Coverage, 1376,
3736 /* 11344 */ GIR_EraseRootFromParent_Done,
3737 /* 11345 */ // Label 286: @11345
3738 /* 11345 */ GIM_Reject,
3739 /* 11346 */ // Label 282: @11346
3740 /* 11346 */ GIM_Try, /*On fail goto*//*Label 287*/ GIMT_Encode4(11732),
3741 /* 11351 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
3742 /* 11354 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3743 /* 11358 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3744 /* 11362 */ GIM_Try, /*On fail goto*//*Label 288*/ GIMT_Encode4(11440), // Rule ID 1377 //
3745 /* 11367 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3746 /* 11371 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3747 /* 11375 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
3748 /* 11379 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3749 /* 11383 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3750 /* 11387 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3751 /* 11391 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3752 /* 11395 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
3753 /* 11399 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3754 /* 11403 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3755 /* 11408 */ // MIs[2] v2
3756 /* 11408 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3757 /* 11413 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3758 /* 11418 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3759 /* 11420 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2), V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3760 /* 11420 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3761 /* 11423 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3762 /* 11425 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3763 /* 11429 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3764 /* 11431 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3765 /* 11435 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3766 /* 11438 */ GIR_RootConstrainSelectedInstOperands,
3767 /* 11439 */ // GIR_Coverage, 1377,
3768 /* 11439 */ GIR_EraseRootFromParent_Done,
3769 /* 11440 */ // Label 288: @11440
3770 /* 11440 */ GIM_Try, /*On fail goto*//*Label 289*/ GIMT_Encode4(11518), // Rule ID 1378 //
3771 /* 11445 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3772 /* 11449 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3773 /* 11453 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
3774 /* 11457 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3775 /* 11461 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3776 /* 11465 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3777 /* 11469 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3778 /* 11473 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
3779 /* 11477 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3780 /* 11481 */ // MIs[2] v2
3781 /* 11481 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3782 /* 11486 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3783 /* 11491 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3784 /* 11496 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3785 /* 11498 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1), V128:{ *:[v8i16] }:$c)) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3786 /* 11498 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3787 /* 11501 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3788 /* 11503 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3789 /* 11507 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3790 /* 11509 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
3791 /* 11513 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3792 /* 11516 */ GIR_RootConstrainSelectedInstOperands,
3793 /* 11517 */ // GIR_Coverage, 1378,
3794 /* 11517 */ GIR_EraseRootFromParent_Done,
3795 /* 11518 */ // Label 289: @11518
3796 /* 11518 */ GIM_Try, /*On fail goto*//*Label 290*/ GIMT_Encode4(11596), // Rule ID 1379 //
3797 /* 11523 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3798 /* 11527 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3799 /* 11531 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
3800 /* 11535 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3801 /* 11539 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3802 /* 11543 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3803 /* 11548 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3804 /* 11552 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3805 /* 11556 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
3806 /* 11560 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8i16,
3807 /* 11564 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3808 /* 11569 */ // MIs[2] v2
3809 /* 11569 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3810 /* 11574 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3811 /* 11576 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3812 /* 11576 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3813 /* 11579 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3814 /* 11581 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3815 /* 11585 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3816 /* 11587 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3817 /* 11591 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3818 /* 11594 */ GIR_RootConstrainSelectedInstOperands,
3819 /* 11595 */ // GIR_Coverage, 1379,
3820 /* 11595 */ GIR_EraseRootFromParent_Done,
3821 /* 11596 */ // Label 290: @11596
3822 /* 11596 */ GIM_Try, /*On fail goto*//*Label 291*/ GIMT_Encode4(11674), // Rule ID 1380 //
3823 /* 11601 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3824 /* 11605 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3825 /* 11609 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
3826 /* 11613 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
3827 /* 11617 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
3828 /* 11621 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3829 /* 11626 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
3830 /* 11630 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3831 /* 11634 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
3832 /* 11638 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8i16,
3833 /* 11642 */ // MIs[2] v2
3834 /* 11642 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3835 /* 11647 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3836 /* 11652 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
3837 /* 11654 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$v1))) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
3838 /* 11654 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3839 /* 11657 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3840 /* 11659 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
3841 /* 11663 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
3842 /* 11665 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
3843 /* 11669 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3844 /* 11672 */ GIR_RootConstrainSelectedInstOperands,
3845 /* 11673 */ // GIR_Coverage, 1380,
3846 /* 11673 */ GIR_EraseRootFromParent_Done,
3847 /* 11674 */ // Label 291: @11674
3848 /* 11674 */ GIM_Try, /*On fail goto*//*Label 292*/ GIMT_Encode4(11709), // Rule ID 1034 //
3849 /* 11679 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3850 /* 11683 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3851 /* 11689 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
3852 /* 11693 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
3853 /* 11695 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
3854 /* 11697 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$v, immAllOnesV:{ *:[v8i16] }) => (NOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v)
3855 /* 11697 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
3856 /* 11700 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3857 /* 11702 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
3858 /* 11704 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3859 /* 11707 */ GIR_RootConstrainSelectedInstOperands,
3860 /* 11708 */ // GIR_Coverage, 1034,
3861 /* 11708 */ GIR_EraseRootFromParent_Done,
3862 /* 11709 */ // Label 292: @11709
3863 /* 11709 */ GIM_Try, /*On fail goto*//*Label 293*/ GIMT_Encode4(11731), // Rule ID 1045 //
3864 /* 11714 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3865 /* 11718 */ // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (XOR:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
3866 /* 11718 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
3867 /* 11723 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
3868 /* 11729 */ GIR_RootConstrainSelectedInstOperands,
3869 /* 11730 */ // GIR_Coverage, 1045,
3870 /* 11730 */ GIR_Done,
3871 /* 11731 */ // Label 293: @11731
3872 /* 11731 */ GIM_Reject,
3873 /* 11732 */ // Label 287: @11732
3874 /* 11732 */ GIM_Reject,
3875 /* 11733 */ // Label 271: @11733
3876 /* 11733 */ GIM_Reject,
3877 /* 11734 */ // Label 243: @11734
3878 /* 11734 */ GIM_Try, /*On fail goto*//*Label 294*/ GIMT_Encode4(13478),
3879 /* 11739 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
3880 /* 11742 */ GIM_Try, /*On fail goto*//*Label 295*/ GIMT_Encode4(12252),
3881 /* 11747 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3882 /* 11751 */ GIM_Try, /*On fail goto*//*Label 296*/ GIMT_Encode4(11876), // Rule ID 1410 //
3883 /* 11756 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3884 /* 11760 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3885 /* 11764 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
3886 /* 11768 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3887 /* 11772 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3888 /* 11776 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3889 /* 11780 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3890 /* 11784 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
3891 /* 11788 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3892 /* 11792 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3893 /* 11796 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3894 /* 11801 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3895 /* 11805 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3896 /* 11811 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v4i32,
3897 /* 11815 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3898 /* 11817 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3899 /* 11821 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3900 /* 11825 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v4i32,
3901 /* 11829 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4i32,
3902 /* 11833 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4i32,
3903 /* 11837 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3904 /* 11842 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3905 /* 11847 */ // MIs[0] v2
3906 /* 11847 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
3907 /* 11852 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3908 /* 11854 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3909 /* 11854 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3910 /* 11857 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3911 /* 11859 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
3912 /* 11863 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
3913 /* 11867 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3914 /* 11871 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3915 /* 11874 */ GIR_RootConstrainSelectedInstOperands,
3916 /* 11875 */ // GIR_Coverage, 1410,
3917 /* 11875 */ GIR_EraseRootFromParent_Done,
3918 /* 11876 */ // Label 296: @11876
3919 /* 11876 */ GIM_Try, /*On fail goto*//*Label 297*/ GIMT_Encode4(12001), // Rule ID 1411 //
3920 /* 11881 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3921 /* 11885 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3922 /* 11889 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
3923 /* 11893 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3924 /* 11897 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3925 /* 11901 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3926 /* 11905 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3927 /* 11909 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
3928 /* 11913 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3929 /* 11917 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3930 /* 11921 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3931 /* 11926 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
3932 /* 11930 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3933 /* 11936 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v4i32,
3934 /* 11940 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
3935 /* 11942 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
3936 /* 11946 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
3937 /* 11950 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v4i32,
3938 /* 11954 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4i32,
3939 /* 11958 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4i32,
3940 /* 11962 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3941 /* 11967 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3942 /* 11972 */ // MIs[0] v2
3943 /* 11972 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
3944 /* 11977 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3945 /* 11979 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3946 /* 11979 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3947 /* 11982 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3948 /* 11984 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
3949 /* 11988 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
3950 /* 11992 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
3951 /* 11996 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3952 /* 11999 */ GIR_RootConstrainSelectedInstOperands,
3953 /* 12000 */ // GIR_Coverage, 1411,
3954 /* 12000 */ GIR_EraseRootFromParent_Done,
3955 /* 12001 */ // Label 297: @12001
3956 /* 12001 */ GIM_Try, /*On fail goto*//*Label 298*/ GIMT_Encode4(12126), // Rule ID 1069 //
3957 /* 12006 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3958 /* 12010 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3959 /* 12014 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
3960 /* 12018 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3961 /* 12022 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3962 /* 12026 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3963 /* 12030 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
3964 /* 12034 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
3965 /* 12038 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
3966 /* 12042 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
3967 /* 12046 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3968 /* 12051 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3969 /* 12056 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
3970 /* 12060 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
3971 /* 12064 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v4i32,
3972 /* 12068 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4i32,
3973 /* 12072 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
3974 /* 12076 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
3975 /* 12081 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
3976 /* 12085 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
3977 /* 12091 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v4i32,
3978 /* 12095 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
3979 /* 12097 */ // MIs[0] v2
3980 /* 12097 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
3981 /* 12102 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
3982 /* 12104 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
3983 /* 12104 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
3984 /* 12107 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
3985 /* 12109 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
3986 /* 12113 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
3987 /* 12117 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
3988 /* 12121 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
3989 /* 12124 */ GIR_RootConstrainSelectedInstOperands,
3990 /* 12125 */ // GIR_Coverage, 1069,
3991 /* 12125 */ GIR_EraseRootFromParent_Done,
3992 /* 12126 */ // Label 298: @12126
3993 /* 12126 */ GIM_Try, /*On fail goto*//*Label 299*/ GIMT_Encode4(12251), // Rule ID 1409 //
3994 /* 12131 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3995 /* 12135 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
3996 /* 12139 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
3997 /* 12143 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
3998 /* 12147 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
3999 /* 12151 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4000 /* 12155 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4001 /* 12159 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
4002 /* 12163 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
4003 /* 12167 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
4004 /* 12171 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4005 /* 12176 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4006 /* 12181 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4007 /* 12185 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4008 /* 12189 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v4i32,
4009 /* 12193 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4i32,
4010 /* 12197 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
4011 /* 12201 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4012 /* 12206 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4013 /* 12210 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4014 /* 12216 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v4i32,
4015 /* 12220 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4016 /* 12222 */ // MIs[0] v2
4017 /* 12222 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4018 /* 12227 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4019 /* 12229 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] })), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
4020 /* 12229 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4021 /* 12232 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4022 /* 12234 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4023 /* 12238 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4024 /* 12242 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4025 /* 12246 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4026 /* 12249 */ GIR_RootConstrainSelectedInstOperands,
4027 /* 12250 */ // GIR_Coverage, 1409,
4028 /* 12250 */ GIR_EraseRootFromParent_Done,
4029 /* 12251 */ // Label 299: @12251
4030 /* 12251 */ GIM_Reject,
4031 /* 12252 */ // Label 295: @12252
4032 /* 12252 */ GIM_Try, /*On fail goto*//*Label 300*/ GIMT_Encode4(12725),
4033 /* 12257 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
4034 /* 12260 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4035 /* 12264 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4036 /* 12268 */ GIM_Try, /*On fail goto*//*Label 301*/ GIMT_Encode4(12382), // Rule ID 1414 //
4037 /* 12273 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4038 /* 12277 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4039 /* 12281 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
4040 /* 12285 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
4041 /* 12289 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
4042 /* 12293 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4043 /* 12297 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4044 /* 12301 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
4045 /* 12305 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
4046 /* 12309 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
4047 /* 12313 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4048 /* 12318 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4049 /* 12322 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4050 /* 12328 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v4i32,
4051 /* 12332 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4052 /* 12334 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4053 /* 12338 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4054 /* 12342 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v4i32,
4055 /* 12346 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v4i32,
4056 /* 12350 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4057 /* 12355 */ // MIs[4] v2
4058 /* 12355 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4059 /* 12360 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4060 /* 12362 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
4061 /* 12362 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4062 /* 12365 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4063 /* 12367 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4064 /* 12369 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
4065 /* 12373 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4066 /* 12377 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4067 /* 12380 */ GIR_RootConstrainSelectedInstOperands,
4068 /* 12381 */ // GIR_Coverage, 1414,
4069 /* 12381 */ GIR_EraseRootFromParent_Done,
4070 /* 12382 */ // Label 301: @12382
4071 /* 12382 */ GIM_Try, /*On fail goto*//*Label 302*/ GIMT_Encode4(12496), // Rule ID 1415 //
4072 /* 12387 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4073 /* 12391 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4074 /* 12395 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
4075 /* 12399 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
4076 /* 12403 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
4077 /* 12407 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4078 /* 12411 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4079 /* 12415 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
4080 /* 12419 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
4081 /* 12423 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
4082 /* 12427 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4083 /* 12432 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4084 /* 12436 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4085 /* 12442 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v4i32,
4086 /* 12446 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4087 /* 12448 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4088 /* 12452 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4089 /* 12456 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v4i32,
4090 /* 12460 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v4i32,
4091 /* 12464 */ // MIs[4] v2
4092 /* 12464 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4093 /* 12469 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4094 /* 12474 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4095 /* 12476 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
4096 /* 12476 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4097 /* 12479 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4098 /* 12481 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4099 /* 12483 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
4100 /* 12487 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4101 /* 12491 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4102 /* 12494 */ GIR_RootConstrainSelectedInstOperands,
4103 /* 12495 */ // GIR_Coverage, 1415,
4104 /* 12495 */ GIR_EraseRootFromParent_Done,
4105 /* 12496 */ // Label 302: @12496
4106 /* 12496 */ GIM_Try, /*On fail goto*//*Label 303*/ GIMT_Encode4(12610), // Rule ID 1412 //
4107 /* 12501 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4108 /* 12505 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4109 /* 12509 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
4110 /* 12513 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
4111 /* 12517 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
4112 /* 12521 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4113 /* 12525 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4114 /* 12529 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
4115 /* 12533 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
4116 /* 12537 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4117 /* 12542 */ // MIs[2] v2
4118 /* 12542 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4119 /* 12547 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4120 /* 12551 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4121 /* 12555 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v4i32,
4122 /* 12559 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4i32,
4123 /* 12563 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
4124 /* 12567 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4125 /* 12572 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4126 /* 12576 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4127 /* 12582 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v4i32,
4128 /* 12586 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4129 /* 12588 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4130 /* 12590 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
4131 /* 12590 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4132 /* 12593 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4133 /* 12595 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4134 /* 12597 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4135 /* 12601 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4136 /* 12605 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4137 /* 12608 */ GIR_RootConstrainSelectedInstOperands,
4138 /* 12609 */ // GIR_Coverage, 1412,
4139 /* 12609 */ GIR_EraseRootFromParent_Done,
4140 /* 12610 */ // Label 303: @12610
4141 /* 12610 */ GIM_Try, /*On fail goto*//*Label 304*/ GIMT_Encode4(12724), // Rule ID 1413 //
4142 /* 12615 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4143 /* 12619 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4144 /* 12623 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
4145 /* 12627 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
4146 /* 12631 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
4147 /* 12635 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4148 /* 12639 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4149 /* 12643 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
4150 /* 12647 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
4151 /* 12651 */ // MIs[2] v2
4152 /* 12651 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4153 /* 12656 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4154 /* 12661 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4155 /* 12665 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4156 /* 12669 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v4i32,
4157 /* 12673 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4i32,
4158 /* 12677 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v4i32,
4159 /* 12681 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4160 /* 12686 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4161 /* 12690 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4162 /* 12696 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v4i32,
4163 /* 12700 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4164 /* 12702 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4165 /* 12704 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, immAllOnesV:{ *:[v4i32] }))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$c)
4166 /* 12704 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4167 /* 12707 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4168 /* 12709 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4169 /* 12711 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4170 /* 12715 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4171 /* 12719 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4172 /* 12722 */ GIR_RootConstrainSelectedInstOperands,
4173 /* 12723 */ // GIR_Coverage, 1413,
4174 /* 12723 */ GIR_EraseRootFromParent_Done,
4175 /* 12724 */ // Label 304: @12724
4176 /* 12724 */ GIM_Reject,
4177 /* 12725 */ // Label 300: @12725
4178 /* 12725 */ GIM_Try, /*On fail goto*//*Label 305*/ GIMT_Encode4(13091),
4179 /* 12730 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4180 /* 12734 */ GIM_Try, /*On fail goto*//*Label 306*/ GIMT_Encode4(12823), // Rule ID 1065 //
4181 /* 12739 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4182 /* 12743 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4183 /* 12747 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
4184 /* 12751 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
4185 /* 12755 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
4186 /* 12759 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4187 /* 12763 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4188 /* 12767 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
4189 /* 12771 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
4190 /* 12775 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
4191 /* 12779 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4192 /* 12784 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4193 /* 12789 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4194 /* 12794 */ // MIs[0] v2
4195 /* 12794 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
4196 /* 12799 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4197 /* 12801 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), V128:{ *:[v4i32] }:$c), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
4198 /* 12801 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4199 /* 12804 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4200 /* 12806 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4201 /* 12810 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
4202 /* 12814 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4203 /* 12818 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4204 /* 12821 */ GIR_RootConstrainSelectedInstOperands,
4205 /* 12822 */ // GIR_Coverage, 1065,
4206 /* 12822 */ GIR_EraseRootFromParent_Done,
4207 /* 12823 */ // Label 306: @12823
4208 /* 12823 */ GIM_Try, /*On fail goto*//*Label 307*/ GIMT_Encode4(12912), // Rule ID 1381 //
4209 /* 12828 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4210 /* 12832 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4211 /* 12836 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
4212 /* 12840 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
4213 /* 12844 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
4214 /* 12848 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4215 /* 12852 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4216 /* 12856 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
4217 /* 12860 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
4218 /* 12864 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
4219 /* 12868 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4220 /* 12873 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4221 /* 12878 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4222 /* 12883 */ // MIs[0] v2
4223 /* 12883 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4224 /* 12888 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4225 /* 12890 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), V128:{ *:[v4i32] }:$c), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
4226 /* 12890 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4227 /* 12893 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4228 /* 12895 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4229 /* 12899 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4230 /* 12903 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4231 /* 12907 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4232 /* 12910 */ GIR_RootConstrainSelectedInstOperands,
4233 /* 12911 */ // GIR_Coverage, 1381,
4234 /* 12911 */ GIR_EraseRootFromParent_Done,
4235 /* 12912 */ // Label 307: @12912
4236 /* 12912 */ GIM_Try, /*On fail goto*//*Label 308*/ GIMT_Encode4(13001), // Rule ID 1382 //
4237 /* 12917 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4238 /* 12921 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4239 /* 12925 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
4240 /* 12929 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
4241 /* 12933 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
4242 /* 12937 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4243 /* 12942 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4244 /* 12946 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4245 /* 12950 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
4246 /* 12954 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
4247 /* 12958 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
4248 /* 12962 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4249 /* 12967 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4250 /* 12972 */ // MIs[0] v2
4251 /* 12972 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
4252 /* 12977 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4253 /* 12979 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
4254 /* 12979 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4255 /* 12982 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4256 /* 12984 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4257 /* 12988 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
4258 /* 12992 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4259 /* 12996 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4260 /* 12999 */ GIR_RootConstrainSelectedInstOperands,
4261 /* 13000 */ // GIR_Coverage, 1382,
4262 /* 13000 */ GIR_EraseRootFromParent_Done,
4263 /* 13001 */ // Label 308: @13001
4264 /* 13001 */ GIM_Try, /*On fail goto*//*Label 309*/ GIMT_Encode4(13090), // Rule ID 1383 //
4265 /* 13006 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4266 /* 13010 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4267 /* 13014 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
4268 /* 13018 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
4269 /* 13022 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
4270 /* 13026 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4271 /* 13031 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4272 /* 13035 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4273 /* 13039 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
4274 /* 13043 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
4275 /* 13047 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
4276 /* 13051 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4277 /* 13056 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4278 /* 13061 */ // MIs[0] v2
4279 /* 13061 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4280 /* 13066 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4281 /* 13068 */ // (xor:{ *:[v4i32] } (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1)), V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
4282 /* 13068 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4283 /* 13071 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4284 /* 13073 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4285 /* 13077 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4286 /* 13081 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4287 /* 13085 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4288 /* 13088 */ GIR_RootConstrainSelectedInstOperands,
4289 /* 13089 */ // GIR_Coverage, 1383,
4290 /* 13089 */ GIR_EraseRootFromParent_Done,
4291 /* 13090 */ // Label 309: @13090
4292 /* 13090 */ GIM_Reject,
4293 /* 13091 */ // Label 305: @13091
4294 /* 13091 */ GIM_Try, /*On fail goto*//*Label 310*/ GIMT_Encode4(13477),
4295 /* 13096 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
4296 /* 13099 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4297 /* 13103 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4298 /* 13107 */ GIM_Try, /*On fail goto*//*Label 311*/ GIMT_Encode4(13185), // Rule ID 1384 //
4299 /* 13112 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4300 /* 13116 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4301 /* 13120 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
4302 /* 13124 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
4303 /* 13128 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
4304 /* 13132 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4305 /* 13136 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4306 /* 13140 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
4307 /* 13144 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
4308 /* 13148 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4309 /* 13153 */ // MIs[2] v2
4310 /* 13153 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4311 /* 13158 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4312 /* 13163 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4313 /* 13165 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2), V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
4314 /* 13165 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4315 /* 13168 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4316 /* 13170 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4317 /* 13174 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4318 /* 13176 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4319 /* 13180 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4320 /* 13183 */ GIR_RootConstrainSelectedInstOperands,
4321 /* 13184 */ // GIR_Coverage, 1384,
4322 /* 13184 */ GIR_EraseRootFromParent_Done,
4323 /* 13185 */ // Label 311: @13185
4324 /* 13185 */ GIM_Try, /*On fail goto*//*Label 312*/ GIMT_Encode4(13263), // Rule ID 1385 //
4325 /* 13190 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4326 /* 13194 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4327 /* 13198 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
4328 /* 13202 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
4329 /* 13206 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
4330 /* 13210 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4331 /* 13214 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4332 /* 13218 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
4333 /* 13222 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
4334 /* 13226 */ // MIs[2] v2
4335 /* 13226 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4336 /* 13231 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4337 /* 13236 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4338 /* 13241 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4339 /* 13243 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1), V128:{ *:[v4i32] }:$c)) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
4340 /* 13243 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4341 /* 13246 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4342 /* 13248 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4343 /* 13252 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4344 /* 13254 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4345 /* 13258 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4346 /* 13261 */ GIR_RootConstrainSelectedInstOperands,
4347 /* 13262 */ // GIR_Coverage, 1385,
4348 /* 13262 */ GIR_EraseRootFromParent_Done,
4349 /* 13263 */ // Label 312: @13263
4350 /* 13263 */ GIM_Try, /*On fail goto*//*Label 313*/ GIMT_Encode4(13341), // Rule ID 1386 //
4351 /* 13268 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4352 /* 13272 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4353 /* 13276 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
4354 /* 13280 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
4355 /* 13284 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
4356 /* 13288 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4357 /* 13293 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4358 /* 13297 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4359 /* 13301 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
4360 /* 13305 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4i32,
4361 /* 13309 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4362 /* 13314 */ // MIs[2] v2
4363 /* 13314 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4364 /* 13319 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4365 /* 13321 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
4366 /* 13321 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4367 /* 13324 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4368 /* 13326 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4369 /* 13330 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4370 /* 13332 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4371 /* 13336 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4372 /* 13339 */ GIR_RootConstrainSelectedInstOperands,
4373 /* 13340 */ // GIR_Coverage, 1386,
4374 /* 13340 */ GIR_EraseRootFromParent_Done,
4375 /* 13341 */ // Label 313: @13341
4376 /* 13341 */ GIM_Try, /*On fail goto*//*Label 314*/ GIMT_Encode4(13419), // Rule ID 1387 //
4377 /* 13346 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4378 /* 13350 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4379 /* 13354 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
4380 /* 13358 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
4381 /* 13362 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
4382 /* 13366 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4383 /* 13371 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4384 /* 13375 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4385 /* 13379 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
4386 /* 13383 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4i32,
4387 /* 13387 */ // MIs[2] v2
4388 /* 13387 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4389 /* 13392 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4390 /* 13397 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4391 /* 13399 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$v1))) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
4392 /* 13399 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4393 /* 13402 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4394 /* 13404 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4395 /* 13408 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4396 /* 13410 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4397 /* 13414 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4398 /* 13417 */ GIR_RootConstrainSelectedInstOperands,
4399 /* 13418 */ // GIR_Coverage, 1387,
4400 /* 13418 */ GIR_EraseRootFromParent_Done,
4401 /* 13419 */ // Label 314: @13419
4402 /* 13419 */ GIM_Try, /*On fail goto*//*Label 315*/ GIMT_Encode4(13454), // Rule ID 1035 //
4403 /* 13424 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4404 /* 13428 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4405 /* 13434 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
4406 /* 13438 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
4407 /* 13440 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
4408 /* 13442 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$v, immAllOnesV:{ *:[v4i32] }) => (NOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v)
4409 /* 13442 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
4410 /* 13445 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4411 /* 13447 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
4412 /* 13449 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4413 /* 13452 */ GIR_RootConstrainSelectedInstOperands,
4414 /* 13453 */ // GIR_Coverage, 1035,
4415 /* 13453 */ GIR_EraseRootFromParent_Done,
4416 /* 13454 */ // Label 315: @13454
4417 /* 13454 */ GIM_Try, /*On fail goto*//*Label 316*/ GIMT_Encode4(13476), // Rule ID 1046 //
4418 /* 13459 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4419 /* 13463 */ // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (XOR:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
4420 /* 13463 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
4421 /* 13468 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4422 /* 13474 */ GIR_RootConstrainSelectedInstOperands,
4423 /* 13475 */ // GIR_Coverage, 1046,
4424 /* 13475 */ GIR_Done,
4425 /* 13476 */ // Label 316: @13476
4426 /* 13476 */ GIM_Reject,
4427 /* 13477 */ // Label 310: @13477
4428 /* 13477 */ GIM_Reject,
4429 /* 13478 */ // Label 294: @13478
4430 /* 13478 */ GIM_Reject,
4431 /* 13479 */ // Label 244: @13479
4432 /* 13479 */ GIM_Try, /*On fail goto*//*Label 317*/ GIMT_Encode4(15223),
4433 /* 13484 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
4434 /* 13487 */ GIM_Try, /*On fail goto*//*Label 318*/ GIMT_Encode4(13997),
4435 /* 13492 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4436 /* 13496 */ GIM_Try, /*On fail goto*//*Label 319*/ GIMT_Encode4(13621), // Rule ID 1417 //
4437 /* 13501 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4438 /* 13505 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4439 /* 13509 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
4440 /* 13513 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4441 /* 13517 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4442 /* 13521 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4443 /* 13525 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4444 /* 13529 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
4445 /* 13533 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4446 /* 13537 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4447 /* 13541 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4448 /* 13546 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4449 /* 13550 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4450 /* 13556 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v2i64,
4451 /* 13560 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4452 /* 13562 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4453 /* 13566 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4454 /* 13570 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v2i64,
4455 /* 13574 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2i64,
4456 /* 13578 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2i64,
4457 /* 13582 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4458 /* 13587 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4459 /* 13592 */ // MIs[0] v2
4460 /* 13592 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/2,
4461 /* 13597 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4462 /* 13599 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4463 /* 13599 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4464 /* 13602 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4465 /* 13604 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v2
4466 /* 13608 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
4467 /* 13612 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4468 /* 13616 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4469 /* 13619 */ GIR_RootConstrainSelectedInstOperands,
4470 /* 13620 */ // GIR_Coverage, 1417,
4471 /* 13620 */ GIR_EraseRootFromParent_Done,
4472 /* 13621 */ // Label 319: @13621
4473 /* 13621 */ GIM_Try, /*On fail goto*//*Label 320*/ GIMT_Encode4(13746), // Rule ID 1418 //
4474 /* 13626 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4475 /* 13630 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4476 /* 13634 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
4477 /* 13638 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4478 /* 13642 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4479 /* 13646 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4480 /* 13650 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4481 /* 13654 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
4482 /* 13658 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4483 /* 13662 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4484 /* 13666 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4485 /* 13671 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4486 /* 13675 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4487 /* 13681 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v2i64,
4488 /* 13685 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4489 /* 13687 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4490 /* 13691 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4491 /* 13695 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v2i64,
4492 /* 13699 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2i64,
4493 /* 13703 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2i64,
4494 /* 13707 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4495 /* 13712 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4496 /* 13717 */ // MIs[0] v2
4497 /* 13717 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
4498 /* 13722 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4499 /* 13724 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4500 /* 13724 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4501 /* 13727 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4502 /* 13729 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v2
4503 /* 13733 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
4504 /* 13737 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4505 /* 13741 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4506 /* 13744 */ GIR_RootConstrainSelectedInstOperands,
4507 /* 13745 */ // GIR_Coverage, 1418,
4508 /* 13745 */ GIR_EraseRootFromParent_Done,
4509 /* 13746 */ // Label 320: @13746
4510 /* 13746 */ GIM_Try, /*On fail goto*//*Label 321*/ GIMT_Encode4(13871), // Rule ID 1070 //
4511 /* 13751 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4512 /* 13755 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4513 /* 13759 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
4514 /* 13763 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4515 /* 13767 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4516 /* 13771 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4517 /* 13775 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4518 /* 13779 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
4519 /* 13783 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4520 /* 13787 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4521 /* 13791 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4522 /* 13796 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4523 /* 13801 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4524 /* 13805 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4525 /* 13809 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v2i64,
4526 /* 13813 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2i64,
4527 /* 13817 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
4528 /* 13821 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4529 /* 13826 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4530 /* 13830 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4531 /* 13836 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v2i64,
4532 /* 13840 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4533 /* 13842 */ // MIs[0] v2
4534 /* 13842 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
4535 /* 13847 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4536 /* 13849 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4537 /* 13849 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4538 /* 13852 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4539 /* 13854 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
4540 /* 13858 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4541 /* 13862 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4542 /* 13866 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4543 /* 13869 */ GIR_RootConstrainSelectedInstOperands,
4544 /* 13870 */ // GIR_Coverage, 1070,
4545 /* 13870 */ GIR_EraseRootFromParent_Done,
4546 /* 13871 */ // Label 321: @13871
4547 /* 13871 */ GIM_Try, /*On fail goto*//*Label 322*/ GIMT_Encode4(13996), // Rule ID 1416 //
4548 /* 13876 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4549 /* 13880 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4550 /* 13884 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
4551 /* 13888 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4552 /* 13892 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4553 /* 13896 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4554 /* 13900 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4555 /* 13904 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
4556 /* 13908 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4557 /* 13912 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4558 /* 13916 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4559 /* 13921 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4560 /* 13926 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4561 /* 13930 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4562 /* 13934 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v2i64,
4563 /* 13938 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2i64,
4564 /* 13942 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
4565 /* 13946 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4566 /* 13951 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4567 /* 13955 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4568 /* 13961 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v2i64,
4569 /* 13965 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4570 /* 13967 */ // MIs[0] v2
4571 /* 13967 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4572 /* 13972 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4573 /* 13974 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] })), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4574 /* 13974 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4575 /* 13977 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4576 /* 13979 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4577 /* 13983 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4578 /* 13987 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4579 /* 13991 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4580 /* 13994 */ GIR_RootConstrainSelectedInstOperands,
4581 /* 13995 */ // GIR_Coverage, 1416,
4582 /* 13995 */ GIR_EraseRootFromParent_Done,
4583 /* 13996 */ // Label 322: @13996
4584 /* 13996 */ GIM_Reject,
4585 /* 13997 */ // Label 318: @13997
4586 /* 13997 */ GIM_Try, /*On fail goto*//*Label 323*/ GIMT_Encode4(14470),
4587 /* 14002 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
4588 /* 14005 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4589 /* 14009 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4590 /* 14013 */ GIM_Try, /*On fail goto*//*Label 324*/ GIMT_Encode4(14127), // Rule ID 1421 //
4591 /* 14018 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4592 /* 14022 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4593 /* 14026 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
4594 /* 14030 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4595 /* 14034 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4596 /* 14038 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4597 /* 14042 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4598 /* 14046 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
4599 /* 14050 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4600 /* 14054 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4601 /* 14058 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4602 /* 14063 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4603 /* 14067 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4604 /* 14073 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v2i64,
4605 /* 14077 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4606 /* 14079 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4607 /* 14083 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4608 /* 14087 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v2i64,
4609 /* 14091 */ GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_v2i64,
4610 /* 14095 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4611 /* 14100 */ // MIs[4] v2
4612 /* 14100 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4613 /* 14105 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4614 /* 14107 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4615 /* 14107 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4616 /* 14110 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4617 /* 14112 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4618 /* 14114 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // v1
4619 /* 14118 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4620 /* 14122 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4621 /* 14125 */ GIR_RootConstrainSelectedInstOperands,
4622 /* 14126 */ // GIR_Coverage, 1421,
4623 /* 14126 */ GIR_EraseRootFromParent_Done,
4624 /* 14127 */ // Label 324: @14127
4625 /* 14127 */ GIM_Try, /*On fail goto*//*Label 325*/ GIMT_Encode4(14241), // Rule ID 1422 //
4626 /* 14132 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4627 /* 14136 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4628 /* 14140 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
4629 /* 14144 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4630 /* 14148 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4631 /* 14152 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4632 /* 14156 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4633 /* 14160 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
4634 /* 14164 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4635 /* 14168 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4636 /* 14172 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4637 /* 14177 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/2, // MIs[3]
4638 /* 14181 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4639 /* 14187 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v2i64,
4640 /* 14191 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/3,
4641 /* 14193 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/1, /*OpIdx*/2, // MIs[4]
4642 /* 14197 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_XOR),
4643 /* 14201 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v2i64,
4644 /* 14205 */ GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_v2i64,
4645 /* 14209 */ // MIs[4] v2
4646 /* 14209 */ GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4647 /* 14214 */ GIM_CheckRegBankForClass, /*MI*/4, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4648 /* 14219 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4649 /* 14221 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4650 /* 14221 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4651 /* 14224 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4652 /* 14226 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4653 /* 14228 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/2, // v1
4654 /* 14232 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // c
4655 /* 14236 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4656 /* 14239 */ GIR_RootConstrainSelectedInstOperands,
4657 /* 14240 */ // GIR_Coverage, 1422,
4658 /* 14240 */ GIR_EraseRootFromParent_Done,
4659 /* 14241 */ // Label 325: @14241
4660 /* 14241 */ GIM_Try, /*On fail goto*//*Label 326*/ GIMT_Encode4(14355), // Rule ID 1419 //
4661 /* 14246 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4662 /* 14250 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4663 /* 14254 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
4664 /* 14258 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4665 /* 14262 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4666 /* 14266 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4667 /* 14270 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4668 /* 14274 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
4669 /* 14278 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4670 /* 14282 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4671 /* 14287 */ // MIs[2] v2
4672 /* 14287 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4673 /* 14292 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4674 /* 14296 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4675 /* 14300 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v2i64,
4676 /* 14304 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2i64,
4677 /* 14308 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
4678 /* 14312 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4679 /* 14317 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4680 /* 14321 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4681 /* 14327 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v2i64,
4682 /* 14331 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4683 /* 14333 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4684 /* 14335 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4685 /* 14335 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4686 /* 14338 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4687 /* 14340 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4688 /* 14342 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4689 /* 14346 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4690 /* 14350 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4691 /* 14353 */ GIR_RootConstrainSelectedInstOperands,
4692 /* 14354 */ // GIR_Coverage, 1419,
4693 /* 14354 */ GIR_EraseRootFromParent_Done,
4694 /* 14355 */ // Label 326: @14355
4695 /* 14355 */ GIM_Try, /*On fail goto*//*Label 327*/ GIMT_Encode4(14469), // Rule ID 1420 //
4696 /* 14360 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4697 /* 14364 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4698 /* 14368 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
4699 /* 14372 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4700 /* 14376 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4701 /* 14380 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4702 /* 14384 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4703 /* 14388 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
4704 /* 14392 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4705 /* 14396 */ // MIs[2] v2
4706 /* 14396 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4707 /* 14401 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4708 /* 14406 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
4709 /* 14410 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_XOR),
4710 /* 14414 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v2i64,
4711 /* 14418 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2i64,
4712 /* 14422 */ GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_v2i64,
4713 /* 14426 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4714 /* 14431 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
4715 /* 14435 */ GIM_CheckOpcodeIsEither, /*MI*/4, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4716 /* 14441 */ GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_v2i64,
4717 /* 14445 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/4,
4718 /* 14447 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
4719 /* 14449 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, immAllOnesV:{ *:[v2i64] }))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$c)
4720 /* 14449 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4721 /* 14452 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4722 /* 14454 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4723 /* 14456 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4724 /* 14460 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // c
4725 /* 14464 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4726 /* 14467 */ GIR_RootConstrainSelectedInstOperands,
4727 /* 14468 */ // GIR_Coverage, 1420,
4728 /* 14468 */ GIR_EraseRootFromParent_Done,
4729 /* 14469 */ // Label 327: @14469
4730 /* 14469 */ GIM_Reject,
4731 /* 14470 */ // Label 323: @14470
4732 /* 14470 */ GIM_Try, /*On fail goto*//*Label 328*/ GIMT_Encode4(14836),
4733 /* 14475 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4734 /* 14479 */ GIM_Try, /*On fail goto*//*Label 329*/ GIMT_Encode4(14568), // Rule ID 1066 //
4735 /* 14484 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4736 /* 14488 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4737 /* 14492 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
4738 /* 14496 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4739 /* 14500 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4740 /* 14504 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4741 /* 14508 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4742 /* 14512 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
4743 /* 14516 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4744 /* 14520 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4745 /* 14524 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4746 /* 14529 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4747 /* 14534 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4748 /* 14539 */ // MIs[0] v2
4749 /* 14539 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
4750 /* 14544 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4751 /* 14546 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), V128:{ *:[v2i64] }:$c), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4752 /* 14546 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4753 /* 14549 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4754 /* 14551 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4755 /* 14555 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
4756 /* 14559 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4757 /* 14563 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4758 /* 14566 */ GIR_RootConstrainSelectedInstOperands,
4759 /* 14567 */ // GIR_Coverage, 1066,
4760 /* 14567 */ GIR_EraseRootFromParent_Done,
4761 /* 14568 */ // Label 329: @14568
4762 /* 14568 */ GIM_Try, /*On fail goto*//*Label 330*/ GIMT_Encode4(14657), // Rule ID 1388 //
4763 /* 14573 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4764 /* 14577 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4765 /* 14581 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
4766 /* 14585 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4767 /* 14589 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4768 /* 14593 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4769 /* 14597 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4770 /* 14601 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
4771 /* 14605 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4772 /* 14609 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4773 /* 14613 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4774 /* 14618 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4775 /* 14623 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4776 /* 14628 */ // MIs[0] v2
4777 /* 14628 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4778 /* 14633 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4779 /* 14635 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), V128:{ *:[v2i64] }:$c), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4780 /* 14635 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4781 /* 14638 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4782 /* 14640 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4783 /* 14644 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4784 /* 14648 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4785 /* 14652 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4786 /* 14655 */ GIR_RootConstrainSelectedInstOperands,
4787 /* 14656 */ // GIR_Coverage, 1388,
4788 /* 14656 */ GIR_EraseRootFromParent_Done,
4789 /* 14657 */ // Label 330: @14657
4790 /* 14657 */ GIM_Try, /*On fail goto*//*Label 331*/ GIMT_Encode4(14746), // Rule ID 1389 //
4791 /* 14662 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4792 /* 14666 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4793 /* 14670 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
4794 /* 14674 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4795 /* 14678 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4796 /* 14682 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4797 /* 14687 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4798 /* 14691 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4799 /* 14695 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
4800 /* 14699 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4801 /* 14703 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4802 /* 14707 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4803 /* 14712 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4804 /* 14717 */ // MIs[0] v2
4805 /* 14717 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/2,
4806 /* 14722 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4807 /* 14724 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4808 /* 14724 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4809 /* 14727 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4810 /* 14729 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4811 /* 14733 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v2
4812 /* 14737 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4813 /* 14741 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4814 /* 14744 */ GIR_RootConstrainSelectedInstOperands,
4815 /* 14745 */ // GIR_Coverage, 1389,
4816 /* 14745 */ GIR_EraseRootFromParent_Done,
4817 /* 14746 */ // Label 331: @14746
4818 /* 14746 */ GIM_Try, /*On fail goto*//*Label 332*/ GIMT_Encode4(14835), // Rule ID 1390 //
4819 /* 14751 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4820 /* 14755 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4821 /* 14759 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
4822 /* 14763 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4823 /* 14767 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4824 /* 14771 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4825 /* 14776 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4826 /* 14780 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4827 /* 14784 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
4828 /* 14788 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4829 /* 14792 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4830 /* 14796 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4831 /* 14801 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4832 /* 14806 */ // MIs[0] v2
4833 /* 14806 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4834 /* 14811 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4835 /* 14813 */ // (xor:{ *:[v2i64] } (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1)), V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4836 /* 14813 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4837 /* 14816 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4838 /* 14818 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4839 /* 14822 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v2
4840 /* 14826 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4841 /* 14830 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4842 /* 14833 */ GIR_RootConstrainSelectedInstOperands,
4843 /* 14834 */ // GIR_Coverage, 1390,
4844 /* 14834 */ GIR_EraseRootFromParent_Done,
4845 /* 14835 */ // Label 332: @14835
4846 /* 14835 */ GIM_Reject,
4847 /* 14836 */ // Label 328: @14836
4848 /* 14836 */ GIM_Try, /*On fail goto*//*Label 333*/ GIMT_Encode4(15222),
4849 /* 14841 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
4850 /* 14844 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4851 /* 14848 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4852 /* 14852 */ GIM_Try, /*On fail goto*//*Label 334*/ GIMT_Encode4(14930), // Rule ID 1391 //
4853 /* 14857 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4854 /* 14861 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4855 /* 14865 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
4856 /* 14869 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4857 /* 14873 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4858 /* 14877 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4859 /* 14881 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4860 /* 14885 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
4861 /* 14889 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4862 /* 14893 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4863 /* 14898 */ // MIs[2] v2
4864 /* 14898 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4865 /* 14903 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4866 /* 14908 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4867 /* 14910 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2), V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4868 /* 14910 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4869 /* 14913 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4870 /* 14915 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4871 /* 14919 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4872 /* 14921 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4873 /* 14925 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4874 /* 14928 */ GIR_RootConstrainSelectedInstOperands,
4875 /* 14929 */ // GIR_Coverage, 1391,
4876 /* 14929 */ GIR_EraseRootFromParent_Done,
4877 /* 14930 */ // Label 334: @14930
4878 /* 14930 */ GIM_Try, /*On fail goto*//*Label 335*/ GIMT_Encode4(15008), // Rule ID 1392 //
4879 /* 14935 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4880 /* 14939 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4881 /* 14943 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
4882 /* 14947 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4883 /* 14951 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4884 /* 14955 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4885 /* 14959 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4886 /* 14963 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
4887 /* 14967 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4888 /* 14971 */ // MIs[2] v2
4889 /* 14971 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4890 /* 14976 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4891 /* 14981 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4892 /* 14986 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4893 /* 14988 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1), V128:{ *:[v2i64] }:$c)) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4894 /* 14988 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4895 /* 14991 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4896 /* 14993 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4897 /* 14997 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4898 /* 14999 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // c
4899 /* 15003 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4900 /* 15006 */ GIR_RootConstrainSelectedInstOperands,
4901 /* 15007 */ // GIR_Coverage, 1392,
4902 /* 15007 */ GIR_EraseRootFromParent_Done,
4903 /* 15008 */ // Label 335: @15008
4904 /* 15008 */ GIM_Try, /*On fail goto*//*Label 336*/ GIMT_Encode4(15086), // Rule ID 1393 //
4905 /* 15013 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4906 /* 15017 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4907 /* 15021 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
4908 /* 15025 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4909 /* 15029 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4910 /* 15033 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4911 /* 15038 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4912 /* 15042 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4913 /* 15046 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
4914 /* 15050 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2i64,
4915 /* 15054 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4916 /* 15059 */ // MIs[2] v2
4917 /* 15059 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4918 /* 15064 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4919 /* 15066 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4920 /* 15066 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4921 /* 15069 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4922 /* 15071 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // v1
4923 /* 15075 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4924 /* 15077 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4925 /* 15081 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4926 /* 15084 */ GIR_RootConstrainSelectedInstOperands,
4927 /* 15085 */ // GIR_Coverage, 1393,
4928 /* 15085 */ GIR_EraseRootFromParent_Done,
4929 /* 15086 */ // Label 336: @15086
4930 /* 15086 */ GIM_Try, /*On fail goto*//*Label 337*/ GIMT_Encode4(15164), // Rule ID 1394 //
4931 /* 15091 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4932 /* 15095 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
4933 /* 15099 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
4934 /* 15103 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
4935 /* 15107 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
4936 /* 15111 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4937 /* 15116 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
4938 /* 15120 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_XOR),
4939 /* 15124 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
4940 /* 15128 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2i64,
4941 /* 15132 */ // MIs[2] v2
4942 /* 15132 */ GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4943 /* 15137 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4944 /* 15142 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
4945 /* 15144 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$v1))) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
4946 /* 15144 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
4947 /* 15147 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4948 /* 15149 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // v1
4949 /* 15153 */ GIR_RootToRootCopy, /*OpIdx*/1, // v2
4950 /* 15155 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // c
4951 /* 15159 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4952 /* 15162 */ GIR_RootConstrainSelectedInstOperands,
4953 /* 15163 */ // GIR_Coverage, 1394,
4954 /* 15163 */ GIR_EraseRootFromParent_Done,
4955 /* 15164 */ // Label 337: @15164
4956 /* 15164 */ GIM_Try, /*On fail goto*//*Label 338*/ GIMT_Encode4(15199), // Rule ID 1036 //
4957 /* 15169 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4958 /* 15173 */ GIM_CheckOpcodeIsEither, /*MI*/1, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
4959 /* 15179 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
4960 /* 15183 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/1,
4961 /* 15185 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
4962 /* 15187 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$v, immAllOnesV:{ *:[v2i64] }) => (NOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v)
4963 /* 15187 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NOT),
4964 /* 15190 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
4965 /* 15192 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
4966 /* 15194 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
4967 /* 15197 */ GIR_RootConstrainSelectedInstOperands,
4968 /* 15198 */ // GIR_Coverage, 1036,
4969 /* 15198 */ GIR_EraseRootFromParent_Done,
4970 /* 15199 */ // Label 338: @15199
4971 /* 15199 */ GIM_Try, /*On fail goto*//*Label 339*/ GIMT_Encode4(15221), // Rule ID 1047 //
4972 /* 15204 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4973 /* 15208 */ // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (XOR:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
4974 /* 15208 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::XOR),
4975 /* 15213 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
4976 /* 15219 */ GIR_RootConstrainSelectedInstOperands,
4977 /* 15220 */ // GIR_Coverage, 1047,
4978 /* 15220 */ GIR_Done,
4979 /* 15221 */ // Label 339: @15221
4980 /* 15221 */ GIM_Reject,
4981 /* 15222 */ // Label 333: @15222
4982 /* 15222 */ GIM_Reject,
4983 /* 15223 */ // Label 317: @15223
4984 /* 15223 */ GIM_Reject,
4985 /* 15224 */ // Label 245: @15224
4986 /* 15224 */ GIM_Reject,
4987 /* 15225 */ // Label 10: @15225
4988 /* 15225 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(14), /*)*//*default:*//*Label 342*/ GIMT_Encode4(15318),
4989 /* 15236 */ /*GILLT_v16i8*//*Label 340*/ GIMT_Encode4(15244),
4990 /* 15240 */ /*GILLT_v8i16*//*Label 341*/ GIMT_Encode4(15281),
4991 /* 15244 */ // Label 340: @15244
4992 /* 15244 */ GIM_Try, /*On fail goto*//*Label 343*/ GIMT_Encode4(15280), // Rule ID 1163 //
4993 /* 15249 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
4994 /* 15252 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
4995 /* 15255 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4996 /* 15259 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4997 /* 15263 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
4998 /* 15267 */ // (avgceilu:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (AVGR_U_I8x16:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs)
4999 /* 15267 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I8x16),
5000 /* 15272 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5001 /* 15278 */ GIR_RootConstrainSelectedInstOperands,
5002 /* 15279 */ // GIR_Coverage, 1163,
5003 /* 15279 */ GIR_Done,
5004 /* 15280 */ // Label 343: @15280
5005 /* 15280 */ GIM_Reject,
5006 /* 15281 */ // Label 341: @15281
5007 /* 15281 */ GIM_Try, /*On fail goto*//*Label 344*/ GIMT_Encode4(15317), // Rule ID 1165 //
5008 /* 15286 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
5009 /* 15289 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
5010 /* 15292 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5011 /* 15296 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5012 /* 15300 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5013 /* 15304 */ // (avgceilu:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (AVGR_U_I16x8:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
5014 /* 15304 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I16x8),
5015 /* 15309 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5016 /* 15315 */ GIR_RootConstrainSelectedInstOperands,
5017 /* 15316 */ // GIR_Coverage, 1165,
5018 /* 15316 */ GIR_Done,
5019 /* 15317 */ // Label 344: @15317
5020 /* 15317 */ GIM_Reject,
5021 /* 15318 */ // Label 342: @15318
5022 /* 15318 */ GIM_Reject,
5023 /* 15319 */ // Label 11: @15319
5024 /* 15319 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 345*/ GIMT_Encode4(15349), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 1306 //
5025 /* 15326 */ // MIs[0] DstI[res]
5026 /* 15326 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/0, /*SizeInBits*/32,
5027 /* 15330 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5028 /* 15334 */ // MIs[0] Operand 1
5029 /* 15334 */ // No operand predicates
5030 /* 15334 */ // (frameindex:{ *:[i32] }):$fi => (COPY_I32:{ *:[i32] } (to_tframeindex:{ *:[i32] } ?:{ *:[i32] }:$fi))
5031 /* 15334 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::COPY_I32),
5032 /* 15337 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
5033 /* 15339 */ GIR_CustomRenderer, /*InsnID*/0, /*OldInsnID*/0, /*Renderer*/GIMT_Encode2(GICR_renderFrameIndex), // fi
5034 /* 15344 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5035 /* 15347 */ GIR_RootConstrainSelectedInstOperands,
5036 /* 15348 */ // GIR_Coverage, 1306,
5037 /* 15348 */ GIR_EraseRootFromParent_Done,
5038 /* 15349 */ // Label 345: @15349
5039 /* 15349 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 346*/ GIMT_Encode4(15379), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 1307 //
5040 /* 15356 */ // MIs[0] DstI[res]
5041 /* 15356 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/0, /*SizeInBits*/64,
5042 /* 15360 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
5043 /* 15364 */ // MIs[0] Operand 1
5044 /* 15364 */ // No operand predicates
5045 /* 15364 */ // (frameindex:{ *:[i64] }):$fi => (COPY_I64:{ *:[i64] } (to_tframeindex:{ *:[i64] } ?:{ *:[i64] }:$fi))
5046 /* 15364 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::COPY_I64),
5047 /* 15367 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
5048 /* 15369 */ GIR_CustomRenderer, /*InsnID*/0, /*OldInsnID*/0, /*Renderer*/GIMT_Encode2(GICR_renderFrameIndex), // fi
5049 /* 15374 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5050 /* 15377 */ GIR_RootConstrainSelectedInstOperands,
5051 /* 15378 */ // GIR_Coverage, 1307,
5052 /* 15378 */ GIR_EraseRootFromParent_Done,
5053 /* 15379 */ // Label 346: @15379
5054 /* 15379 */ GIM_Reject,
5055 /* 15380 */ // Label 12: @15380
5056 /* 15380 */ GIM_Try, /*On fail goto*//*Label 347*/ GIMT_Encode4(15484),
5057 /* 15385 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
5058 /* 15388 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2s64,
5059 /* 15391 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
5060 /* 15394 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
5061 /* 15397 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5062 /* 15401 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 348*/ GIMT_Encode4(15442), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 178 //
5063 /* 15408 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5064 /* 15412 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
5065 /* 15416 */ // MIs[1] Operand 1
5066 /* 15416 */ // No operand predicates
5067 /* 15416 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
5068 /* 15420 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
5069 /* 15424 */ // MIs[2] Operand 1
5070 /* 15424 */ // No operand predicates
5071 /* 15424 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
5072 /* 15426 */ // (build_vector:{ *:[v2f64] } (fpimm:{ *:[f64] }):$i0, (fpimm:{ *:[f64] }):$i1) => (CONST_V128_F64x2:{ *:[v2f64] } (fpimm:{ *:[f64] }):$i0, (fpimm:{ *:[f64] }):$i1)
5073 /* 15426 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F64x2),
5074 /* 15429 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5075 /* 15431 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
5076 /* 15434 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
5077 /* 15437 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5078 /* 15440 */ GIR_RootConstrainSelectedInstOperands,
5079 /* 15441 */ // GIR_Coverage, 178,
5080 /* 15441 */ GIR_EraseRootFromParent_Done,
5081 /* 15442 */ // Label 348: @15442
5082 /* 15442 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 349*/ GIMT_Encode4(15483), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 176 //
5083 /* 15449 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5084 /* 15453 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5085 /* 15457 */ // MIs[1] Operand 1
5086 /* 15457 */ // No operand predicates
5087 /* 15457 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
5088 /* 15461 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5089 /* 15465 */ // MIs[2] Operand 1
5090 /* 15465 */ // No operand predicates
5091 /* 15465 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
5092 /* 15467 */ // (build_vector:{ *:[v2i64] } (imm:{ *:[i64] }):$i0, (imm:{ *:[i64] }):$i1) => (CONST_V128_I64x2:{ *:[v2i64] } (imm:{ *:[i64] }):$i0, (imm:{ *:[i64] }):$i1)
5093 /* 15467 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I64x2),
5094 /* 15470 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5095 /* 15472 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
5096 /* 15475 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
5097 /* 15478 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5098 /* 15481 */ GIR_RootConstrainSelectedInstOperands,
5099 /* 15482 */ // GIR_Coverage, 176,
5100 /* 15482 */ GIR_EraseRootFromParent_Done,
5101 /* 15483 */ // Label 349: @15483
5102 /* 15483 */ GIM_Reject,
5103 /* 15484 */ // Label 347: @15484
5104 /* 15484 */ GIM_Try, /*On fail goto*//*Label 350*/ GIMT_Encode4(15638),
5105 /* 15489 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
5106 /* 15492 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4s32,
5107 /* 15495 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
5108 /* 15498 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5109 /* 15501 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
5110 /* 15504 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
5111 /* 15507 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5112 /* 15511 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 351*/ GIMT_Encode4(15574), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 177 //
5113 /* 15518 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5114 /* 15522 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
5115 /* 15526 */ // MIs[1] Operand 1
5116 /* 15526 */ // No operand predicates
5117 /* 15526 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
5118 /* 15530 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
5119 /* 15534 */ // MIs[2] Operand 1
5120 /* 15534 */ // No operand predicates
5121 /* 15534 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
5122 /* 15538 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
5123 /* 15542 */ // MIs[3] Operand 1
5124 /* 15542 */ // No operand predicates
5125 /* 15542 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
5126 /* 15546 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
5127 /* 15550 */ // MIs[4] Operand 1
5128 /* 15550 */ // No operand predicates
5129 /* 15550 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
5130 /* 15552 */ // (build_vector:{ *:[v4f32] } (fpimm:{ *:[f32] }):$i0, (fpimm:{ *:[f32] }):$i1, (fpimm:{ *:[f32] }):$i2, (fpimm:{ *:[f32] }):$i3) => (CONST_V128_F32x4:{ *:[v4f32] } (fpimm:{ *:[f32] }):$i0, (fpimm:{ *:[f32] }):$i1, (fpimm:{ *:[f32] }):$i2, (fpimm:{ *:[f32] }):$i3)
5131 /* 15552 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F32x4),
5132 /* 15555 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5133 /* 15557 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
5134 /* 15560 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
5135 /* 15563 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
5136 /* 15566 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
5137 /* 15569 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5138 /* 15572 */ GIR_RootConstrainSelectedInstOperands,
5139 /* 15573 */ // GIR_Coverage, 177,
5140 /* 15573 */ GIR_EraseRootFromParent_Done,
5141 /* 15574 */ // Label 351: @15574
5142 /* 15574 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 352*/ GIMT_Encode4(15637), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 175 //
5143 /* 15581 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5144 /* 15585 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5145 /* 15589 */ // MIs[1] Operand 1
5146 /* 15589 */ // No operand predicates
5147 /* 15589 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
5148 /* 15593 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5149 /* 15597 */ // MIs[2] Operand 1
5150 /* 15597 */ // No operand predicates
5151 /* 15597 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
5152 /* 15601 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5153 /* 15605 */ // MIs[3] Operand 1
5154 /* 15605 */ // No operand predicates
5155 /* 15605 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
5156 /* 15609 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5157 /* 15613 */ // MIs[4] Operand 1
5158 /* 15613 */ // No operand predicates
5159 /* 15613 */ GIM_CheckIsSafeToFold, /*NumInsns*/4,
5160 /* 15615 */ // (build_vector:{ *:[v4i32] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3) => (CONST_V128_I32x4:{ *:[v4i32] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3)
5161 /* 15615 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I32x4),
5162 /* 15618 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5163 /* 15620 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
5164 /* 15623 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
5165 /* 15626 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
5166 /* 15629 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
5167 /* 15632 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5168 /* 15635 */ GIR_RootConstrainSelectedInstOperands,
5169 /* 15636 */ // GIR_Coverage, 175,
5170 /* 15636 */ GIR_EraseRootFromParent_Done,
5171 /* 15637 */ // Label 352: @15637
5172 /* 15637 */ GIM_Reject,
5173 /* 15638 */ // Label 350: @15638
5174 /* 15638 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 353*/ GIMT_Encode4(15811), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 174 //
5175 /* 15645 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/9,
5176 /* 15648 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8s16,
5177 /* 15651 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
5178 /* 15654 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5179 /* 15657 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
5180 /* 15660 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
5181 /* 15663 */ GIM_RootCheckType, /*Op*/5, /*Type*/GILLT_s32,
5182 /* 15666 */ GIM_RootCheckType, /*Op*/6, /*Type*/GILLT_s32,
5183 /* 15669 */ GIM_RootCheckType, /*Op*/7, /*Type*/GILLT_s32,
5184 /* 15672 */ GIM_RootCheckType, /*Op*/8, /*Type*/GILLT_s32,
5185 /* 15675 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5186 /* 15679 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5187 /* 15683 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5188 /* 15687 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
5189 /* 15691 */ // MIs[1] Operand 1
5190 /* 15691 */ // No operand predicates
5191 /* 15691 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
5192 /* 15695 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5193 /* 15699 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
5194 /* 15703 */ // MIs[2] Operand 1
5195 /* 15703 */ // No operand predicates
5196 /* 15703 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
5197 /* 15707 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5198 /* 15711 */ GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
5199 /* 15715 */ // MIs[3] Operand 1
5200 /* 15715 */ // No operand predicates
5201 /* 15715 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
5202 /* 15719 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5203 /* 15723 */ GIM_CheckI64ImmPredicate, /*MI*/4, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
5204 /* 15727 */ // MIs[4] Operand 1
5205 /* 15727 */ // No operand predicates
5206 /* 15727 */ GIM_RecordInsn, /*DefineMI*/5, /*MI*/0, /*OpIdx*/5, // MIs[5]
5207 /* 15731 */ GIM_CheckOpcode, /*MI*/5, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5208 /* 15735 */ GIM_CheckI64ImmPredicate, /*MI*/5, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
5209 /* 15739 */ // MIs[5] Operand 1
5210 /* 15739 */ // No operand predicates
5211 /* 15739 */ GIM_RecordInsn, /*DefineMI*/6, /*MI*/0, /*OpIdx*/6, // MIs[6]
5212 /* 15743 */ GIM_CheckOpcode, /*MI*/6, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5213 /* 15747 */ GIM_CheckI64ImmPredicate, /*MI*/6, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
5214 /* 15751 */ // MIs[6] Operand 1
5215 /* 15751 */ // No operand predicates
5216 /* 15751 */ GIM_RecordInsn, /*DefineMI*/7, /*MI*/0, /*OpIdx*/7, // MIs[7]
5217 /* 15755 */ GIM_CheckOpcode, /*MI*/7, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5218 /* 15759 */ GIM_CheckI64ImmPredicate, /*MI*/7, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
5219 /* 15763 */ // MIs[7] Operand 1
5220 /* 15763 */ // No operand predicates
5221 /* 15763 */ GIM_RecordInsn, /*DefineMI*/8, /*MI*/0, /*OpIdx*/8, // MIs[8]
5222 /* 15767 */ GIM_CheckOpcode, /*MI*/8, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5223 /* 15771 */ GIM_CheckI64ImmPredicate, /*MI*/8, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI16),
5224 /* 15775 */ // MIs[8] Operand 1
5225 /* 15775 */ // No operand predicates
5226 /* 15775 */ GIM_CheckIsSafeToFold, /*NumInsns*/8,
5227 /* 15777 */ // (build_vector:{ *:[v8i16] } (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i0, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i1, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i2, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i3, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i4, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i5, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i6, (imm:{ *:[i32] })<<P:Predicate_ImmI16>>:$i7) => (CONST_V128_I16x8:{ *:[v8i16] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3, (imm:{ *:[i32] }):$i4, (imm:{ *:[i32] }):$i5, (imm:{ *:[i32] }):$i6, (imm:{ *:[i32] }):$i7)
5228 /* 15777 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I16x8),
5229 /* 15780 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5230 /* 15782 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
5231 /* 15785 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
5232 /* 15788 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
5233 /* 15791 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
5234 /* 15794 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/5, // i4
5235 /* 15797 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/6, // i5
5236 /* 15800 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/7, // i6
5237 /* 15803 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/8, // i7
5238 /* 15806 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5239 /* 15809 */ GIR_RootConstrainSelectedInstOperands,
5240 /* 15810 */ // GIR_Coverage, 174,
5241 /* 15810 */ GIR_EraseRootFromParent_Done,
5242 /* 15811 */ // Label 353: @15811
5243 /* 15811 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 354*/ GIMT_Encode4(16128), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 173 //
5244 /* 15818 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/17,
5245 /* 15821 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16s8,
5246 /* 15824 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
5247 /* 15827 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
5248 /* 15830 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
5249 /* 15833 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_s32,
5250 /* 15836 */ GIM_RootCheckType, /*Op*/5, /*Type*/GILLT_s32,
5251 /* 15839 */ GIM_RootCheckType, /*Op*/6, /*Type*/GILLT_s32,
5252 /* 15842 */ GIM_RootCheckType, /*Op*/7, /*Type*/GILLT_s32,
5253 /* 15845 */ GIM_RootCheckType, /*Op*/8, /*Type*/GILLT_s32,
5254 /* 15848 */ GIM_RootCheckType, /*Op*/9, /*Type*/GILLT_s32,
5255 /* 15851 */ GIM_RootCheckType, /*Op*/10, /*Type*/GILLT_s32,
5256 /* 15854 */ GIM_RootCheckType, /*Op*/11, /*Type*/GILLT_s32,
5257 /* 15857 */ GIM_RootCheckType, /*Op*/12, /*Type*/GILLT_s32,
5258 /* 15860 */ GIM_RootCheckType, /*Op*/13, /*Type*/GILLT_s32,
5259 /* 15863 */ GIM_RootCheckType, /*Op*/14, /*Type*/GILLT_s32,
5260 /* 15866 */ GIM_RootCheckType, /*Op*/15, /*Type*/GILLT_s32,
5261 /* 15869 */ GIM_RootCheckType, /*Op*/16, /*Type*/GILLT_s32,
5262 /* 15872 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5263 /* 15876 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5264 /* 15880 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5265 /* 15884 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
5266 /* 15888 */ // MIs[1] Operand 1
5267 /* 15888 */ // No operand predicates
5268 /* 15888 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
5269 /* 15892 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5270 /* 15896 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
5271 /* 15900 */ // MIs[2] Operand 1
5272 /* 15900 */ // No operand predicates
5273 /* 15900 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
5274 /* 15904 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5275 /* 15908 */ GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
5276 /* 15912 */ // MIs[3] Operand 1
5277 /* 15912 */ // No operand predicates
5278 /* 15912 */ GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/4, // MIs[4]
5279 /* 15916 */ GIM_CheckOpcode, /*MI*/4, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5280 /* 15920 */ GIM_CheckI64ImmPredicate, /*MI*/4, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
5281 /* 15924 */ // MIs[4] Operand 1
5282 /* 15924 */ // No operand predicates
5283 /* 15924 */ GIM_RecordInsn, /*DefineMI*/5, /*MI*/0, /*OpIdx*/5, // MIs[5]
5284 /* 15928 */ GIM_CheckOpcode, /*MI*/5, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5285 /* 15932 */ GIM_CheckI64ImmPredicate, /*MI*/5, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
5286 /* 15936 */ // MIs[5] Operand 1
5287 /* 15936 */ // No operand predicates
5288 /* 15936 */ GIM_RecordInsn, /*DefineMI*/6, /*MI*/0, /*OpIdx*/6, // MIs[6]
5289 /* 15940 */ GIM_CheckOpcode, /*MI*/6, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5290 /* 15944 */ GIM_CheckI64ImmPredicate, /*MI*/6, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
5291 /* 15948 */ // MIs[6] Operand 1
5292 /* 15948 */ // No operand predicates
5293 /* 15948 */ GIM_RecordInsn, /*DefineMI*/7, /*MI*/0, /*OpIdx*/7, // MIs[7]
5294 /* 15952 */ GIM_CheckOpcode, /*MI*/7, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5295 /* 15956 */ GIM_CheckI64ImmPredicate, /*MI*/7, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
5296 /* 15960 */ // MIs[7] Operand 1
5297 /* 15960 */ // No operand predicates
5298 /* 15960 */ GIM_RecordInsn, /*DefineMI*/8, /*MI*/0, /*OpIdx*/8, // MIs[8]
5299 /* 15964 */ GIM_CheckOpcode, /*MI*/8, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5300 /* 15968 */ GIM_CheckI64ImmPredicate, /*MI*/8, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
5301 /* 15972 */ // MIs[8] Operand 1
5302 /* 15972 */ // No operand predicates
5303 /* 15972 */ GIM_RecordInsn, /*DefineMI*/9, /*MI*/0, /*OpIdx*/9, // MIs[9]
5304 /* 15976 */ GIM_CheckOpcode, /*MI*/9, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5305 /* 15980 */ GIM_CheckI64ImmPredicate, /*MI*/9, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
5306 /* 15984 */ // MIs[9] Operand 1
5307 /* 15984 */ // No operand predicates
5308 /* 15984 */ GIM_RecordInsn, /*DefineMI*/10, /*MI*/0, /*OpIdx*/10, // MIs[10]
5309 /* 15988 */ GIM_CheckOpcode, /*MI*/10, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5310 /* 15992 */ GIM_CheckI64ImmPredicate, /*MI*/10, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
5311 /* 15996 */ // MIs[10] Operand 1
5312 /* 15996 */ // No operand predicates
5313 /* 15996 */ GIM_RecordInsn, /*DefineMI*/11, /*MI*/0, /*OpIdx*/11, // MIs[11]
5314 /* 16000 */ GIM_CheckOpcode, /*MI*/11, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5315 /* 16004 */ GIM_CheckI64ImmPredicate, /*MI*/11, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
5316 /* 16008 */ // MIs[11] Operand 1
5317 /* 16008 */ // No operand predicates
5318 /* 16008 */ GIM_RecordInsn, /*DefineMI*/12, /*MI*/0, /*OpIdx*/12, // MIs[12]
5319 /* 16012 */ GIM_CheckOpcode, /*MI*/12, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5320 /* 16016 */ GIM_CheckI64ImmPredicate, /*MI*/12, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
5321 /* 16020 */ // MIs[12] Operand 1
5322 /* 16020 */ // No operand predicates
5323 /* 16020 */ GIM_RecordInsn, /*DefineMI*/13, /*MI*/0, /*OpIdx*/13, // MIs[13]
5324 /* 16024 */ GIM_CheckOpcode, /*MI*/13, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5325 /* 16028 */ GIM_CheckI64ImmPredicate, /*MI*/13, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
5326 /* 16032 */ // MIs[13] Operand 1
5327 /* 16032 */ // No operand predicates
5328 /* 16032 */ GIM_RecordInsn, /*DefineMI*/14, /*MI*/0, /*OpIdx*/14, // MIs[14]
5329 /* 16036 */ GIM_CheckOpcode, /*MI*/14, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5330 /* 16040 */ GIM_CheckI64ImmPredicate, /*MI*/14, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
5331 /* 16044 */ // MIs[14] Operand 1
5332 /* 16044 */ // No operand predicates
5333 /* 16044 */ GIM_RecordInsn, /*DefineMI*/15, /*MI*/0, /*OpIdx*/15, // MIs[15]
5334 /* 16048 */ GIM_CheckOpcode, /*MI*/15, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5335 /* 16052 */ GIM_CheckI64ImmPredicate, /*MI*/15, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
5336 /* 16056 */ // MIs[15] Operand 1
5337 /* 16056 */ // No operand predicates
5338 /* 16056 */ GIM_RecordInsn, /*DefineMI*/16, /*MI*/0, /*OpIdx*/16, // MIs[16]
5339 /* 16060 */ GIM_CheckOpcode, /*MI*/16, GIMT_Encode2(TargetOpcode::G_CONSTANT),
5340 /* 16064 */ GIM_CheckI64ImmPredicate, /*MI*/16, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_ImmI8),
5341 /* 16068 */ // MIs[16] Operand 1
5342 /* 16068 */ // No operand predicates
5343 /* 16068 */ GIM_CheckIsSafeToFold, /*NumInsns*/16,
5344 /* 16070 */ // (build_vector:{ *:[v16i8] } (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i0, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i1, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i2, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i3, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i4, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i5, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i6, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i7, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i8, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$i9, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iA, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iB, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iC, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iD, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iE, (imm:{ *:[i32] })<<P:Predicate_ImmI8>>:$iF) => (CONST_V128_I8x16:{ *:[v16i8] } (imm:{ *:[i32] }):$i0, (imm:{ *:[i32] }):$i1, (imm:{ *:[i32] }):$i2, (imm:{ *:[i32] }):$i3, (imm:{ *:[i32] }):$i4, (imm:{ *:[i32] }):$i5, (imm:{ *:[i32] }):$i6, (imm:{ *:[i32] }):$i7, (imm:{ *:[i32] }):$i8, (imm:{ *:[i32] }):$i9, (imm:{ *:[i32] }):$iA, (imm:{ *:[i32] }):$iB, (imm:{ *:[i32] }):$iC, (imm:{ *:[i32] }):$iD, (imm:{ *:[i32] }):$iE, (imm:{ *:[i32] }):$iF)
5345 /* 16070 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I8x16),
5346 /* 16073 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
5347 /* 16075 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // i0
5348 /* 16078 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // i1
5349 /* 16081 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/3, // i2
5350 /* 16084 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/4, // i3
5351 /* 16087 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/5, // i4
5352 /* 16090 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/6, // i5
5353 /* 16093 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/7, // i6
5354 /* 16096 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/8, // i7
5355 /* 16099 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/9, // i8
5356 /* 16102 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/10, // i9
5357 /* 16105 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/11, // iA
5358 /* 16108 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/12, // iB
5359 /* 16111 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/13, // iC
5360 /* 16114 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/14, // iD
5361 /* 16117 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/15, // iE
5362 /* 16120 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/16, // iF
5363 /* 16123 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
5364 /* 16126 */ GIR_RootConstrainSelectedInstOperands,
5365 /* 16127 */ // GIR_Coverage, 173,
5366 /* 16127 */ GIR_EraseRootFromParent_Done,
5367 /* 16128 */ // Label 354: @16128
5368 /* 16128 */ GIM_Reject,
5369 /* 16129 */ // Label 13: @16129
5370 /* 16129 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(12), /*)*//*default:*//*Label 361*/ GIMT_Encode4(17590),
5371 /* 16140 */ /*GILLT_s32*//*Label 355*/ GIMT_Encode4(16188),
5372 /* 16144 */ /*GILLT_s64*//*Label 356*/ GIMT_Encode4(16250), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
5373 /* 16172 */ /*GILLT_v16s8*//*Label 357*/ GIMT_Encode4(16312),
5374 /* 16176 */ /*GILLT_v8s16*//*Label 358*/ GIMT_Encode4(16489),
5375 /* 16180 */ /*GILLT_v4s32*//*Label 359*/ GIMT_Encode4(16856),
5376 /* 16184 */ /*GILLT_v2s64*//*Label 360*/ GIMT_Encode4(17223),
5377 /* 16188 */ // Label 355: @16188
5378 /* 16188 */ GIM_Try, /*On fail goto*//*Label 362*/ GIMT_Encode4(16249),
5379 /* 16193 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
5380 /* 16196 */ GIM_Try, /*On fail goto*//*Label 363*/ GIMT_Encode4(16222), // Rule ID 60 //
5381 /* 16201 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5382 /* 16205 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5383 /* 16209 */ // (bitconvert:{ *:[i32] } F32:{ *:[f32] }:$src) => (I32_REINTERPRET_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
5384 /* 16209 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_REINTERPRET_F32),
5385 /* 16214 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5386 /* 16220 */ GIR_RootConstrainSelectedInstOperands,
5387 /* 16221 */ // GIR_Coverage, 60,
5388 /* 16221 */ GIR_Done,
5389 /* 16222 */ // Label 363: @16222
5390 /* 16222 */ GIM_Try, /*On fail goto*//*Label 364*/ GIMT_Encode4(16248), // Rule ID 61 //
5391 /* 16227 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
5392 /* 16231 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
5393 /* 16235 */ // (bitconvert:{ *:[f32] } I32:{ *:[i32] }:$src) => (F32_REINTERPRET_I32:{ *:[f32] } I32:{ *:[i32] }:$src)
5394 /* 16235 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_REINTERPRET_I32),
5395 /* 16240 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5396 /* 16246 */ GIR_RootConstrainSelectedInstOperands,
5397 /* 16247 */ // GIR_Coverage, 61,
5398 /* 16247 */ GIR_Done,
5399 /* 16248 */ // Label 364: @16248
5400 /* 16248 */ GIM_Reject,
5401 /* 16249 */ // Label 362: @16249
5402 /* 16249 */ GIM_Reject,
5403 /* 16250 */ // Label 356: @16250
5404 /* 16250 */ GIM_Try, /*On fail goto*//*Label 365*/ GIMT_Encode4(16311),
5405 /* 16255 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
5406 /* 16258 */ GIM_Try, /*On fail goto*//*Label 366*/ GIMT_Encode4(16284), // Rule ID 62 //
5407 /* 16263 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
5408 /* 16267 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5409 /* 16271 */ // (bitconvert:{ *:[i64] } F64:{ *:[f64] }:$src) => (I64_REINTERPRET_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
5410 /* 16271 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_REINTERPRET_F64),
5411 /* 16276 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5412 /* 16282 */ GIR_RootConstrainSelectedInstOperands,
5413 /* 16283 */ // GIR_Coverage, 62,
5414 /* 16283 */ GIR_Done,
5415 /* 16284 */ // Label 366: @16284
5416 /* 16284 */ GIM_Try, /*On fail goto*//*Label 367*/ GIMT_Encode4(16310), // Rule ID 63 //
5417 /* 16289 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
5418 /* 16293 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
5419 /* 16297 */ // (bitconvert:{ *:[f64] } I64:{ *:[i64] }:$src) => (F64_REINTERPRET_I64:{ *:[f64] } I64:{ *:[i64] }:$src)
5420 /* 16297 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_REINTERPRET_I64),
5421 /* 16302 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
5422 /* 16308 */ GIR_RootConstrainSelectedInstOperands,
5423 /* 16309 */ // GIR_Coverage, 63,
5424 /* 16309 */ GIR_Done,
5425 /* 16310 */ // Label 367: @16310
5426 /* 16310 */ GIM_Reject,
5427 /* 16311 */ // Label 365: @16311
5428 /* 16311 */ GIM_Reject,
5429 /* 16312 */ // Label 357: @16312
5430 /* 16312 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(9), GIMT_Encode2(12), /*)*//*default:*//*Label 371*/ GIMT_Encode4(16488),
5431 /* 16323 */ /*GILLT_v8s16*//*Label 368*/ GIMT_Encode4(16335),
5432 /* 16327 */ /*GILLT_v4s32*//*Label 369*/ GIMT_Encode4(16386),
5433 /* 16331 */ /*GILLT_v2s64*//*Label 370*/ GIMT_Encode4(16437),
5434 /* 16335 */ // Label 368: @16335
5435 /* 16335 */ GIM_Try, /*On fail goto*//*Label 372*/ GIMT_Encode4(16385),
5436 /* 16340 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5437 /* 16344 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5438 /* 16348 */ GIM_Try, /*On fail goto*//*Label 373*/ GIMT_Encode4(16366), // Rule ID 1200 //
5439 /* 16353 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v16i8] }:$v
5440 /* 16353 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5441 /* 16356 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5442 /* 16358 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5443 /* 16360 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5444 /* 16365 */ // GIR_Coverage, 1200,
5445 /* 16365 */ GIR_EraseRootFromParent_Done,
5446 /* 16366 */ // Label 373: @16366
5447 /* 16366 */ GIM_Try, /*On fail goto*//*Label 374*/ GIMT_Encode4(16384), // Rule ID 1205 //
5448 /* 16371 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v16i8] }:$v
5449 /* 16371 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5450 /* 16374 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5451 /* 16376 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5452 /* 16378 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5453 /* 16383 */ // GIR_Coverage, 1205,
5454 /* 16383 */ GIR_EraseRootFromParent_Done,
5455 /* 16384 */ // Label 374: @16384
5456 /* 16384 */ GIM_Reject,
5457 /* 16385 */ // Label 372: @16385
5458 /* 16385 */ GIM_Reject,
5459 /* 16386 */ // Label 369: @16386
5460 /* 16386 */ GIM_Try, /*On fail goto*//*Label 375*/ GIMT_Encode4(16436),
5461 /* 16391 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5462 /* 16395 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5463 /* 16399 */ GIM_Try, /*On fail goto*//*Label 376*/ GIMT_Encode4(16417), // Rule ID 1201 //
5464 /* 16404 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v16i8] }:$v
5465 /* 16404 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5466 /* 16407 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5467 /* 16409 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5468 /* 16411 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5469 /* 16416 */ // GIR_Coverage, 1201,
5470 /* 16416 */ GIR_EraseRootFromParent_Done,
5471 /* 16417 */ // Label 376: @16417
5472 /* 16417 */ GIM_Try, /*On fail goto*//*Label 377*/ GIMT_Encode4(16435), // Rule ID 1203 //
5473 /* 16422 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v16i8] }:$v
5474 /* 16422 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5475 /* 16425 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5476 /* 16427 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5477 /* 16429 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5478 /* 16434 */ // GIR_Coverage, 1203,
5479 /* 16434 */ GIR_EraseRootFromParent_Done,
5480 /* 16435 */ // Label 377: @16435
5481 /* 16435 */ GIM_Reject,
5482 /* 16436 */ // Label 375: @16436
5483 /* 16436 */ GIM_Reject,
5484 /* 16437 */ // Label 370: @16437
5485 /* 16437 */ GIM_Try, /*On fail goto*//*Label 378*/ GIMT_Encode4(16487),
5486 /* 16442 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5487 /* 16446 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5488 /* 16450 */ GIM_Try, /*On fail goto*//*Label 379*/ GIMT_Encode4(16468), // Rule ID 1202 //
5489 /* 16455 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v16i8] }:$v
5490 /* 16455 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5491 /* 16458 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5492 /* 16460 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5493 /* 16462 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5494 /* 16467 */ // GIR_Coverage, 1202,
5495 /* 16467 */ GIR_EraseRootFromParent_Done,
5496 /* 16468 */ // Label 379: @16468
5497 /* 16468 */ GIM_Try, /*On fail goto*//*Label 380*/ GIMT_Encode4(16486), // Rule ID 1204 //
5498 /* 16473 */ // (bitconvert:{ *:[v16i8] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v16i8] }:$v
5499 /* 16473 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5500 /* 16476 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5501 /* 16478 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5502 /* 16480 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5503 /* 16485 */ // GIR_Coverage, 1204,
5504 /* 16485 */ GIR_EraseRootFromParent_Done,
5505 /* 16486 */ // Label 380: @16486
5506 /* 16486 */ GIM_Reject,
5507 /* 16487 */ // Label 378: @16487
5508 /* 16487 */ GIM_Reject,
5509 /* 16488 */ // Label 371: @16488
5510 /* 16488 */ GIM_Reject,
5511 /* 16489 */ // Label 358: @16489
5512 /* 16489 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(8), GIMT_Encode2(12), /*)*//*default:*//*Label 385*/ GIMT_Encode4(16672),
5513 /* 16500 */ /*GILLT_v16s8*//*Label 381*/ GIMT_Encode4(16516),
5514 /* 16504 */ /*GILLT_v8s16*//*Label 382*/ GIMT_Encode4(16543),
5515 /* 16508 */ /*GILLT_v4s32*//*Label 383*/ GIMT_Encode4(16570),
5516 /* 16512 */ /*GILLT_v2s64*//*Label 384*/ GIMT_Encode4(16621),
5517 /* 16516 */ // Label 381: @16516
5518 /* 16516 */ GIM_Try, /*On fail goto*//*Label 386*/ GIMT_Encode4(16542), // Rule ID 1206 //
5519 /* 16521 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5520 /* 16525 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5521 /* 16529 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v8i16] }:$v
5522 /* 16529 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5523 /* 16532 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5524 /* 16534 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5525 /* 16536 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5526 /* 16541 */ // GIR_Coverage, 1206,
5527 /* 16541 */ GIR_EraseRootFromParent_Done,
5528 /* 16542 */ // Label 386: @16542
5529 /* 16542 */ GIM_Reject,
5530 /* 16543 */ // Label 382: @16543
5531 /* 16543 */ GIM_Try, /*On fail goto*//*Label 387*/ GIMT_Encode4(16569), // Rule ID 1211 //
5532 /* 16548 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5533 /* 16552 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5534 /* 16556 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v8i16] }:$v
5535 /* 16556 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5536 /* 16559 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5537 /* 16561 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5538 /* 16563 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5539 /* 16568 */ // GIR_Coverage, 1211,
5540 /* 16568 */ GIR_EraseRootFromParent_Done,
5541 /* 16569 */ // Label 387: @16569
5542 /* 16569 */ GIM_Reject,
5543 /* 16570 */ // Label 383: @16570
5544 /* 16570 */ GIM_Try, /*On fail goto*//*Label 388*/ GIMT_Encode4(16620),
5545 /* 16575 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5546 /* 16579 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5547 /* 16583 */ GIM_Try, /*On fail goto*//*Label 389*/ GIMT_Encode4(16601), // Rule ID 1207 //
5548 /* 16588 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v8i16] }:$v
5549 /* 16588 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5550 /* 16591 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5551 /* 16593 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5552 /* 16595 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5553 /* 16600 */ // GIR_Coverage, 1207,
5554 /* 16600 */ GIR_EraseRootFromParent_Done,
5555 /* 16601 */ // Label 389: @16601
5556 /* 16601 */ GIM_Try, /*On fail goto*//*Label 390*/ GIMT_Encode4(16619), // Rule ID 1209 //
5557 /* 16606 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v8i16] }:$v
5558 /* 16606 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5559 /* 16609 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5560 /* 16611 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5561 /* 16613 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5562 /* 16618 */ // GIR_Coverage, 1209,
5563 /* 16618 */ GIR_EraseRootFromParent_Done,
5564 /* 16619 */ // Label 390: @16619
5565 /* 16619 */ GIM_Reject,
5566 /* 16620 */ // Label 388: @16620
5567 /* 16620 */ GIM_Reject,
5568 /* 16621 */ // Label 384: @16621
5569 /* 16621 */ GIM_Try, /*On fail goto*//*Label 391*/ GIMT_Encode4(16671),
5570 /* 16626 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5571 /* 16630 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5572 /* 16634 */ GIM_Try, /*On fail goto*//*Label 392*/ GIMT_Encode4(16652), // Rule ID 1208 //
5573 /* 16639 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v8i16] }:$v
5574 /* 16639 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5575 /* 16642 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5576 /* 16644 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5577 /* 16646 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5578 /* 16651 */ // GIR_Coverage, 1208,
5579 /* 16651 */ GIR_EraseRootFromParent_Done,
5580 /* 16652 */ // Label 392: @16652
5581 /* 16652 */ GIM_Try, /*On fail goto*//*Label 393*/ GIMT_Encode4(16670), // Rule ID 1210 //
5582 /* 16657 */ // (bitconvert:{ *:[v8i16] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v8i16] }:$v
5583 /* 16657 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5584 /* 16660 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5585 /* 16662 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5586 /* 16664 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5587 /* 16669 */ // GIR_Coverage, 1210,
5588 /* 16669 */ GIR_EraseRootFromParent_Done,
5589 /* 16670 */ // Label 393: @16670
5590 /* 16670 */ GIM_Reject,
5591 /* 16671 */ // Label 391: @16671
5592 /* 16671 */ GIM_Reject,
5593 /* 16672 */ // Label 385: @16672
5594 /* 16672 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(8), GIMT_Encode2(12), /*)*//*default:*//*Label 398*/ GIMT_Encode4(16855),
5595 /* 16683 */ /*GILLT_v16s8*//*Label 394*/ GIMT_Encode4(16699),
5596 /* 16687 */ /*GILLT_v8s16*//*Label 395*/ GIMT_Encode4(16726),
5597 /* 16691 */ /*GILLT_v4s32*//*Label 396*/ GIMT_Encode4(16753),
5598 /* 16695 */ /*GILLT_v2s64*//*Label 397*/ GIMT_Encode4(16804),
5599 /* 16699 */ // Label 394: @16699
5600 /* 16699 */ GIM_Try, /*On fail goto*//*Label 399*/ GIMT_Encode4(16725), // Rule ID 1236 //
5601 /* 16704 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5602 /* 16708 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5603 /* 16712 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v8f16] }:$v
5604 /* 16712 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5605 /* 16715 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5606 /* 16717 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5607 /* 16719 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5608 /* 16724 */ // GIR_Coverage, 1236,
5609 /* 16724 */ GIR_EraseRootFromParent_Done,
5610 /* 16725 */ // Label 399: @16725
5611 /* 16725 */ GIM_Reject,
5612 /* 16726 */ // Label 395: @16726
5613 /* 16726 */ GIM_Try, /*On fail goto*//*Label 400*/ GIMT_Encode4(16752), // Rule ID 1237 //
5614 /* 16731 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5615 /* 16735 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5616 /* 16739 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v8f16] }:$v
5617 /* 16739 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5618 /* 16742 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5619 /* 16744 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5620 /* 16746 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5621 /* 16751 */ // GIR_Coverage, 1237,
5622 /* 16751 */ GIR_EraseRootFromParent_Done,
5623 /* 16752 */ // Label 400: @16752
5624 /* 16752 */ GIM_Reject,
5625 /* 16753 */ // Label 396: @16753
5626 /* 16753 */ GIM_Try, /*On fail goto*//*Label 401*/ GIMT_Encode4(16803),
5627 /* 16758 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5628 /* 16762 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5629 /* 16766 */ GIM_Try, /*On fail goto*//*Label 402*/ GIMT_Encode4(16784), // Rule ID 1238 //
5630 /* 16771 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v8f16] }:$v
5631 /* 16771 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5632 /* 16774 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5633 /* 16776 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5634 /* 16778 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5635 /* 16783 */ // GIR_Coverage, 1238,
5636 /* 16783 */ GIR_EraseRootFromParent_Done,
5637 /* 16784 */ // Label 402: @16784
5638 /* 16784 */ GIM_Try, /*On fail goto*//*Label 403*/ GIMT_Encode4(16802), // Rule ID 1240 //
5639 /* 16789 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v8f16] }:$v
5640 /* 16789 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5641 /* 16792 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5642 /* 16794 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5643 /* 16796 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5644 /* 16801 */ // GIR_Coverage, 1240,
5645 /* 16801 */ GIR_EraseRootFromParent_Done,
5646 /* 16802 */ // Label 403: @16802
5647 /* 16802 */ GIM_Reject,
5648 /* 16803 */ // Label 401: @16803
5649 /* 16803 */ GIM_Reject,
5650 /* 16804 */ // Label 397: @16804
5651 /* 16804 */ GIM_Try, /*On fail goto*//*Label 404*/ GIMT_Encode4(16854),
5652 /* 16809 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5653 /* 16813 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5654 /* 16817 */ GIM_Try, /*On fail goto*//*Label 405*/ GIMT_Encode4(16835), // Rule ID 1239 //
5655 /* 16822 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v8f16] }:$v
5656 /* 16822 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5657 /* 16825 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5658 /* 16827 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5659 /* 16829 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5660 /* 16834 */ // GIR_Coverage, 1239,
5661 /* 16834 */ GIR_EraseRootFromParent_Done,
5662 /* 16835 */ // Label 405: @16835
5663 /* 16835 */ GIM_Try, /*On fail goto*//*Label 406*/ GIMT_Encode4(16853), // Rule ID 1241 //
5664 /* 16840 */ // (bitconvert:{ *:[v8f16] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v8f16] }:$v
5665 /* 16840 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5666 /* 16843 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5667 /* 16845 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5668 /* 16847 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5669 /* 16852 */ // GIR_Coverage, 1241,
5670 /* 16852 */ GIR_EraseRootFromParent_Done,
5671 /* 16853 */ // Label 406: @16853
5672 /* 16853 */ GIM_Reject,
5673 /* 16854 */ // Label 404: @16854
5674 /* 16854 */ GIM_Reject,
5675 /* 16855 */ // Label 398: @16855
5676 /* 16855 */ GIM_Reject,
5677 /* 16856 */ // Label 359: @16856
5678 /* 16856 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(8), GIMT_Encode2(12), /*)*//*default:*//*Label 411*/ GIMT_Encode4(17039),
5679 /* 16867 */ /*GILLT_v16s8*//*Label 407*/ GIMT_Encode4(16883),
5680 /* 16871 */ /*GILLT_v8s16*//*Label 408*/ GIMT_Encode4(16910),
5681 /* 16875 */ /*GILLT_v4s32*//*Label 409*/ GIMT_Encode4(16961),
5682 /* 16879 */ /*GILLT_v2s64*//*Label 410*/ GIMT_Encode4(16988),
5683 /* 16883 */ // Label 407: @16883
5684 /* 16883 */ GIM_Try, /*On fail goto*//*Label 412*/ GIMT_Encode4(16909), // Rule ID 1212 //
5685 /* 16888 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5686 /* 16892 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5687 /* 16896 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v4i32] }:$v
5688 /* 16896 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5689 /* 16899 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5690 /* 16901 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5691 /* 16903 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5692 /* 16908 */ // GIR_Coverage, 1212,
5693 /* 16908 */ GIR_EraseRootFromParent_Done,
5694 /* 16909 */ // Label 412: @16909
5695 /* 16909 */ GIM_Reject,
5696 /* 16910 */ // Label 408: @16910
5697 /* 16910 */ GIM_Try, /*On fail goto*//*Label 413*/ GIMT_Encode4(16960),
5698 /* 16915 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5699 /* 16919 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5700 /* 16923 */ GIM_Try, /*On fail goto*//*Label 414*/ GIMT_Encode4(16941), // Rule ID 1213 //
5701 /* 16928 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v4i32] }:$v
5702 /* 16928 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5703 /* 16931 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5704 /* 16933 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5705 /* 16935 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5706 /* 16940 */ // GIR_Coverage, 1213,
5707 /* 16940 */ GIR_EraseRootFromParent_Done,
5708 /* 16941 */ // Label 414: @16941
5709 /* 16941 */ GIM_Try, /*On fail goto*//*Label 415*/ GIMT_Encode4(16959), // Rule ID 1217 //
5710 /* 16946 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v4i32] }:$v
5711 /* 16946 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5712 /* 16949 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5713 /* 16951 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5714 /* 16953 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5715 /* 16958 */ // GIR_Coverage, 1217,
5716 /* 16958 */ GIR_EraseRootFromParent_Done,
5717 /* 16959 */ // Label 415: @16959
5718 /* 16959 */ GIM_Reject,
5719 /* 16960 */ // Label 413: @16960
5720 /* 16960 */ GIM_Reject,
5721 /* 16961 */ // Label 409: @16961
5722 /* 16961 */ GIM_Try, /*On fail goto*//*Label 416*/ GIMT_Encode4(16987), // Rule ID 1215 //
5723 /* 16966 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5724 /* 16970 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5725 /* 16974 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v4i32] }:$v
5726 /* 16974 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5727 /* 16977 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5728 /* 16979 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5729 /* 16981 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5730 /* 16986 */ // GIR_Coverage, 1215,
5731 /* 16986 */ GIR_EraseRootFromParent_Done,
5732 /* 16987 */ // Label 416: @16987
5733 /* 16987 */ GIM_Reject,
5734 /* 16988 */ // Label 410: @16988
5735 /* 16988 */ GIM_Try, /*On fail goto*//*Label 417*/ GIMT_Encode4(17038),
5736 /* 16993 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5737 /* 16997 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5738 /* 17001 */ GIM_Try, /*On fail goto*//*Label 418*/ GIMT_Encode4(17019), // Rule ID 1214 //
5739 /* 17006 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v4i32] }:$v
5740 /* 17006 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5741 /* 17009 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5742 /* 17011 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5743 /* 17013 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5744 /* 17018 */ // GIR_Coverage, 1214,
5745 /* 17018 */ GIR_EraseRootFromParent_Done,
5746 /* 17019 */ // Label 418: @17019
5747 /* 17019 */ GIM_Try, /*On fail goto*//*Label 419*/ GIMT_Encode4(17037), // Rule ID 1216 //
5748 /* 17024 */ // (bitconvert:{ *:[v4i32] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v4i32] }:$v
5749 /* 17024 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5750 /* 17027 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5751 /* 17029 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5752 /* 17031 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5753 /* 17036 */ // GIR_Coverage, 1216,
5754 /* 17036 */ GIR_EraseRootFromParent_Done,
5755 /* 17037 */ // Label 419: @17037
5756 /* 17037 */ GIM_Reject,
5757 /* 17038 */ // Label 417: @17038
5758 /* 17038 */ GIM_Reject,
5759 /* 17039 */ // Label 411: @17039
5760 /* 17039 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(8), GIMT_Encode2(12), /*)*//*default:*//*Label 424*/ GIMT_Encode4(17222),
5761 /* 17050 */ /*GILLT_v16s8*//*Label 420*/ GIMT_Encode4(17066),
5762 /* 17054 */ /*GILLT_v8s16*//*Label 421*/ GIMT_Encode4(17093),
5763 /* 17058 */ /*GILLT_v4s32*//*Label 422*/ GIMT_Encode4(17144),
5764 /* 17062 */ /*GILLT_v2s64*//*Label 423*/ GIMT_Encode4(17171),
5765 /* 17066 */ // Label 420: @17066
5766 /* 17066 */ GIM_Try, /*On fail goto*//*Label 425*/ GIMT_Encode4(17092), // Rule ID 1224 //
5767 /* 17071 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5768 /* 17075 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5769 /* 17079 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v4f32] }:$v
5770 /* 17079 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5771 /* 17082 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5772 /* 17084 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5773 /* 17086 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5774 /* 17091 */ // GIR_Coverage, 1224,
5775 /* 17091 */ GIR_EraseRootFromParent_Done,
5776 /* 17092 */ // Label 425: @17092
5777 /* 17092 */ GIM_Reject,
5778 /* 17093 */ // Label 421: @17093
5779 /* 17093 */ GIM_Try, /*On fail goto*//*Label 426*/ GIMT_Encode4(17143),
5780 /* 17098 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5781 /* 17102 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5782 /* 17106 */ GIM_Try, /*On fail goto*//*Label 427*/ GIMT_Encode4(17124), // Rule ID 1225 //
5783 /* 17111 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v4f32] }:$v
5784 /* 17111 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5785 /* 17114 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5786 /* 17116 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5787 /* 17118 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5788 /* 17123 */ // GIR_Coverage, 1225,
5789 /* 17123 */ GIR_EraseRootFromParent_Done,
5790 /* 17124 */ // Label 427: @17124
5791 /* 17124 */ GIM_Try, /*On fail goto*//*Label 428*/ GIMT_Encode4(17142), // Rule ID 1229 //
5792 /* 17129 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v4f32] }:$v
5793 /* 17129 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5794 /* 17132 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5795 /* 17134 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5796 /* 17136 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5797 /* 17141 */ // GIR_Coverage, 1229,
5798 /* 17141 */ GIR_EraseRootFromParent_Done,
5799 /* 17142 */ // Label 428: @17142
5800 /* 17142 */ GIM_Reject,
5801 /* 17143 */ // Label 426: @17143
5802 /* 17143 */ GIM_Reject,
5803 /* 17144 */ // Label 422: @17144
5804 /* 17144 */ GIM_Try, /*On fail goto*//*Label 429*/ GIMT_Encode4(17170), // Rule ID 1226 //
5805 /* 17149 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5806 /* 17153 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5807 /* 17157 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v4f32] }:$v
5808 /* 17157 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5809 /* 17160 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5810 /* 17162 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5811 /* 17164 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5812 /* 17169 */ // GIR_Coverage, 1226,
5813 /* 17169 */ GIR_EraseRootFromParent_Done,
5814 /* 17170 */ // Label 429: @17170
5815 /* 17170 */ GIM_Reject,
5816 /* 17171 */ // Label 423: @17171
5817 /* 17171 */ GIM_Try, /*On fail goto*//*Label 430*/ GIMT_Encode4(17221),
5818 /* 17176 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5819 /* 17180 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5820 /* 17184 */ GIM_Try, /*On fail goto*//*Label 431*/ GIMT_Encode4(17202), // Rule ID 1227 //
5821 /* 17189 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v4f32] }:$v
5822 /* 17189 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5823 /* 17192 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5824 /* 17194 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5825 /* 17196 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5826 /* 17201 */ // GIR_Coverage, 1227,
5827 /* 17201 */ GIR_EraseRootFromParent_Done,
5828 /* 17202 */ // Label 431: @17202
5829 /* 17202 */ GIM_Try, /*On fail goto*//*Label 432*/ GIMT_Encode4(17220), // Rule ID 1228 //
5830 /* 17207 */ // (bitconvert:{ *:[v4f32] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v4f32] }:$v
5831 /* 17207 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5832 /* 17210 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5833 /* 17212 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5834 /* 17214 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5835 /* 17219 */ // GIR_Coverage, 1228,
5836 /* 17219 */ GIR_EraseRootFromParent_Done,
5837 /* 17220 */ // Label 432: @17220
5838 /* 17220 */ GIM_Reject,
5839 /* 17221 */ // Label 430: @17221
5840 /* 17221 */ GIM_Reject,
5841 /* 17222 */ // Label 424: @17222
5842 /* 17222 */ GIM_Reject,
5843 /* 17223 */ // Label 360: @17223
5844 /* 17223 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(8), GIMT_Encode2(12), /*)*//*default:*//*Label 437*/ GIMT_Encode4(17406),
5845 /* 17234 */ /*GILLT_v16s8*//*Label 433*/ GIMT_Encode4(17250),
5846 /* 17238 */ /*GILLT_v8s16*//*Label 434*/ GIMT_Encode4(17277),
5847 /* 17242 */ /*GILLT_v4s32*//*Label 435*/ GIMT_Encode4(17328),
5848 /* 17246 */ /*GILLT_v2s64*//*Label 436*/ GIMT_Encode4(17379),
5849 /* 17250 */ // Label 433: @17250
5850 /* 17250 */ GIM_Try, /*On fail goto*//*Label 438*/ GIMT_Encode4(17276), // Rule ID 1218 //
5851 /* 17255 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5852 /* 17259 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5853 /* 17263 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v2i64] }:$v
5854 /* 17263 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5855 /* 17266 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5856 /* 17268 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5857 /* 17270 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5858 /* 17275 */ // GIR_Coverage, 1218,
5859 /* 17275 */ GIR_EraseRootFromParent_Done,
5860 /* 17276 */ // Label 438: @17276
5861 /* 17276 */ GIM_Reject,
5862 /* 17277 */ // Label 434: @17277
5863 /* 17277 */ GIM_Try, /*On fail goto*//*Label 439*/ GIMT_Encode4(17327),
5864 /* 17282 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5865 /* 17286 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5866 /* 17290 */ GIM_Try, /*On fail goto*//*Label 440*/ GIMT_Encode4(17308), // Rule ID 1219 //
5867 /* 17295 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v2i64] }:$v
5868 /* 17295 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5869 /* 17298 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5870 /* 17300 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5871 /* 17302 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5872 /* 17307 */ // GIR_Coverage, 1219,
5873 /* 17307 */ GIR_EraseRootFromParent_Done,
5874 /* 17308 */ // Label 440: @17308
5875 /* 17308 */ GIM_Try, /*On fail goto*//*Label 441*/ GIMT_Encode4(17326), // Rule ID 1223 //
5876 /* 17313 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v2i64] }:$v
5877 /* 17313 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5878 /* 17316 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5879 /* 17318 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5880 /* 17320 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5881 /* 17325 */ // GIR_Coverage, 1223,
5882 /* 17325 */ GIR_EraseRootFromParent_Done,
5883 /* 17326 */ // Label 441: @17326
5884 /* 17326 */ GIM_Reject,
5885 /* 17327 */ // Label 439: @17327
5886 /* 17327 */ GIM_Reject,
5887 /* 17328 */ // Label 435: @17328
5888 /* 17328 */ GIM_Try, /*On fail goto*//*Label 442*/ GIMT_Encode4(17378),
5889 /* 17333 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5890 /* 17337 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5891 /* 17341 */ GIM_Try, /*On fail goto*//*Label 443*/ GIMT_Encode4(17359), // Rule ID 1220 //
5892 /* 17346 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v2i64] }:$v
5893 /* 17346 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5894 /* 17349 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5895 /* 17351 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5896 /* 17353 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5897 /* 17358 */ // GIR_Coverage, 1220,
5898 /* 17358 */ GIR_EraseRootFromParent_Done,
5899 /* 17359 */ // Label 443: @17359
5900 /* 17359 */ GIM_Try, /*On fail goto*//*Label 444*/ GIMT_Encode4(17377), // Rule ID 1221 //
5901 /* 17364 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v2i64] }:$v
5902 /* 17364 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5903 /* 17367 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5904 /* 17369 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5905 /* 17371 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5906 /* 17376 */ // GIR_Coverage, 1221,
5907 /* 17376 */ GIR_EraseRootFromParent_Done,
5908 /* 17377 */ // Label 444: @17377
5909 /* 17377 */ GIM_Reject,
5910 /* 17378 */ // Label 442: @17378
5911 /* 17378 */ GIM_Reject,
5912 /* 17379 */ // Label 436: @17379
5913 /* 17379 */ GIM_Try, /*On fail goto*//*Label 445*/ GIMT_Encode4(17405), // Rule ID 1222 //
5914 /* 17384 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5915 /* 17388 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5916 /* 17392 */ // (bitconvert:{ *:[v2i64] } V128:{ *:[v2f64] }:$v) => V128:{ *:[v2i64] }:$v
5917 /* 17392 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5918 /* 17395 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5919 /* 17397 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5920 /* 17399 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5921 /* 17404 */ // GIR_Coverage, 1222,
5922 /* 17404 */ GIR_EraseRootFromParent_Done,
5923 /* 17405 */ // Label 445: @17405
5924 /* 17405 */ GIM_Reject,
5925 /* 17406 */ // Label 437: @17406
5926 /* 17406 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(8), GIMT_Encode2(12), /*)*//*default:*//*Label 450*/ GIMT_Encode4(17589),
5927 /* 17417 */ /*GILLT_v16s8*//*Label 446*/ GIMT_Encode4(17433),
5928 /* 17421 */ /*GILLT_v8s16*//*Label 447*/ GIMT_Encode4(17460),
5929 /* 17425 */ /*GILLT_v4s32*//*Label 448*/ GIMT_Encode4(17511),
5930 /* 17429 */ /*GILLT_v2s64*//*Label 449*/ GIMT_Encode4(17562),
5931 /* 17433 */ // Label 446: @17433
5932 /* 17433 */ GIM_Try, /*On fail goto*//*Label 451*/ GIMT_Encode4(17459), // Rule ID 1230 //
5933 /* 17438 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5934 /* 17442 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5935 /* 17446 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v16i8] }:$v) => V128:{ *:[v2f64] }:$v
5936 /* 17446 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5937 /* 17449 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5938 /* 17451 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5939 /* 17453 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5940 /* 17458 */ // GIR_Coverage, 1230,
5941 /* 17458 */ GIR_EraseRootFromParent_Done,
5942 /* 17459 */ // Label 451: @17459
5943 /* 17459 */ GIM_Reject,
5944 /* 17460 */ // Label 447: @17460
5945 /* 17460 */ GIM_Try, /*On fail goto*//*Label 452*/ GIMT_Encode4(17510),
5946 /* 17465 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5947 /* 17469 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5948 /* 17473 */ GIM_Try, /*On fail goto*//*Label 453*/ GIMT_Encode4(17491), // Rule ID 1231 //
5949 /* 17478 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v8i16] }:$v) => V128:{ *:[v2f64] }:$v
5950 /* 17478 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5951 /* 17481 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5952 /* 17483 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5953 /* 17485 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5954 /* 17490 */ // GIR_Coverage, 1231,
5955 /* 17490 */ GIR_EraseRootFromParent_Done,
5956 /* 17491 */ // Label 453: @17491
5957 /* 17491 */ GIM_Try, /*On fail goto*//*Label 454*/ GIMT_Encode4(17509), // Rule ID 1235 //
5958 /* 17496 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v8f16] }:$v) => V128:{ *:[v2f64] }:$v
5959 /* 17496 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5960 /* 17499 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5961 /* 17501 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5962 /* 17503 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5963 /* 17508 */ // GIR_Coverage, 1235,
5964 /* 17508 */ GIR_EraseRootFromParent_Done,
5965 /* 17509 */ // Label 454: @17509
5966 /* 17509 */ GIM_Reject,
5967 /* 17510 */ // Label 452: @17510
5968 /* 17510 */ GIM_Reject,
5969 /* 17511 */ // Label 448: @17511
5970 /* 17511 */ GIM_Try, /*On fail goto*//*Label 455*/ GIMT_Encode4(17561),
5971 /* 17516 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5972 /* 17520 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5973 /* 17524 */ GIM_Try, /*On fail goto*//*Label 456*/ GIMT_Encode4(17542), // Rule ID 1232 //
5974 /* 17529 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v4i32] }:$v) => V128:{ *:[v2f64] }:$v
5975 /* 17529 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5976 /* 17532 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5977 /* 17534 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5978 /* 17536 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5979 /* 17541 */ // GIR_Coverage, 1232,
5980 /* 17541 */ GIR_EraseRootFromParent_Done,
5981 /* 17542 */ // Label 456: @17542
5982 /* 17542 */ GIM_Try, /*On fail goto*//*Label 457*/ GIMT_Encode4(17560), // Rule ID 1234 //
5983 /* 17547 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v4f32] }:$v) => V128:{ *:[v2f64] }:$v
5984 /* 17547 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
5985 /* 17550 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
5986 /* 17552 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
5987 /* 17554 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
5988 /* 17559 */ // GIR_Coverage, 1234,
5989 /* 17559 */ GIR_EraseRootFromParent_Done,
5990 /* 17560 */ // Label 457: @17560
5991 /* 17560 */ GIM_Reject,
5992 /* 17561 */ // Label 455: @17561
5993 /* 17561 */ GIM_Reject,
5994 /* 17562 */ // Label 449: @17562
5995 /* 17562 */ GIM_Try, /*On fail goto*//*Label 458*/ GIMT_Encode4(17588), // Rule ID 1233 //
5996 /* 17567 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5997 /* 17571 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
5998 /* 17575 */ // (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$v) => V128:{ *:[v2f64] }:$v
5999 /* 17575 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(TargetOpcode::COPY),
6000 /* 17578 */ GIR_RootToRootCopy, /*OpIdx*/0, // dst
6001 /* 17580 */ GIR_RootToRootCopy, /*OpIdx*/1, // v
6002 /* 17582 */ GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, GIMT_Encode2(WebAssembly::V128RegClassID),
6003 /* 17587 */ // GIR_Coverage, 1233,
6004 /* 17587 */ GIR_EraseRootFromParent_Done,
6005 /* 17588 */ // Label 458: @17588
6006 /* 17588 */ GIM_Reject,
6007 /* 17589 */ // Label 450: @17589
6008 /* 17589 */ GIM_Reject,
6009 /* 17590 */ // Label 361: @17590
6010 /* 17590 */ GIM_Reject,
6011 /* 17591 */ // Label 14: @17591
6012 /* 17591 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 464*/ GIMT_Encode4(17818),
6013 /* 17602 */ /*GILLT_f32*//*Label 459*/ GIMT_Encode4(17662),
6014 /* 17606 */ /*GILLT_f64*//*Label 460*/ GIMT_Encode4(17692), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
6015 /* 17650 */ /*GILLT_v8f16*//*Label 461*/ GIMT_Encode4(17722),
6016 /* 17654 */ /*GILLT_v4f32*//*Label 462*/ GIMT_Encode4(17754),
6017 /* 17658 */ /*GILLT_v2f64*//*Label 463*/ GIMT_Encode4(17786),
6018 /* 17662 */ // Label 459: @17662
6019 /* 17662 */ GIM_Try, /*On fail goto*//*Label 465*/ GIMT_Encode4(17691), // Rule ID 148 //
6020 /* 17667 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
6021 /* 17670 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6022 /* 17674 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6023 /* 17678 */ // (ftrunc:{ *:[f32] } F32:{ *:[f32] }:$src) => (TRUNC_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
6024 /* 17678 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F32),
6025 /* 17683 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
6026 /* 17689 */ GIR_RootConstrainSelectedInstOperands,
6027 /* 17690 */ // GIR_Coverage, 148,
6028 /* 17690 */ GIR_Done,
6029 /* 17691 */ // Label 465: @17691
6030 /* 17691 */ GIM_Reject,
6031 /* 17692 */ // Label 460: @17692
6032 /* 17692 */ GIM_Try, /*On fail goto*//*Label 466*/ GIMT_Encode4(17721), // Rule ID 149 //
6033 /* 17697 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
6034 /* 17700 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
6035 /* 17704 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
6036 /* 17708 */ // (ftrunc:{ *:[f64] } F64:{ *:[f64] }:$src) => (TRUNC_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
6037 /* 17708 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F64),
6038 /* 17713 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
6039 /* 17719 */ GIR_RootConstrainSelectedInstOperands,
6040 /* 17720 */ // GIR_Coverage, 149,
6041 /* 17720 */ GIR_Done,
6042 /* 17721 */ // Label 466: @17721
6043 /* 17721 */ GIM_Reject,
6044 /* 17722 */ // Label 461: @17722
6045 /* 17722 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 467*/ GIMT_Encode4(17753), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 343 //
6046 /* 17729 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
6047 /* 17732 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6048 /* 17736 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6049 /* 17740 */ // (ftrunc:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (TRUNC_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
6050 /* 17740 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F16x8),
6051 /* 17745 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
6052 /* 17751 */ GIR_RootConstrainSelectedInstOperands,
6053 /* 17752 */ // GIR_Coverage, 343,
6054 /* 17752 */ GIR_Done,
6055 /* 17753 */ // Label 467: @17753
6056 /* 17753 */ GIM_Reject,
6057 /* 17754 */ // Label 462: @17754
6058 /* 17754 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 468*/ GIMT_Encode4(17785), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 335 //
6059 /* 17761 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
6060 /* 17764 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6061 /* 17768 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6062 /* 17772 */ // (ftrunc:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (TRUNC_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
6063 /* 17772 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F32x4),
6064 /* 17777 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
6065 /* 17783 */ GIR_RootConstrainSelectedInstOperands,
6066 /* 17784 */ // GIR_Coverage, 335,
6067 /* 17784 */ GIR_Done,
6068 /* 17785 */ // Label 468: @17785
6069 /* 17785 */ GIM_Reject,
6070 /* 17786 */ // Label 463: @17786
6071 /* 17786 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 469*/ GIMT_Encode4(17817), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 339 //
6072 /* 17793 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
6073 /* 17796 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6074 /* 17800 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6075 /* 17804 */ // (ftrunc:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (TRUNC_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
6076 /* 17804 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::TRUNC_F64x2),
6077 /* 17809 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
6078 /* 17815 */ GIR_RootConstrainSelectedInstOperands,
6079 /* 17816 */ // GIR_Coverage, 339,
6080 /* 17816 */ GIR_Done,
6081 /* 17817 */ // Label 469: @17817
6082 /* 17817 */ GIM_Reject,
6083 /* 17818 */ // Label 464: @17818
6084 /* 17818 */ GIM_Reject,
6085 /* 17819 */ // Label 15: @17819
6086 /* 17819 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 475*/ GIMT_Encode4(18032),
6087 /* 17830 */ /*GILLT_f32*//*Label 470*/ GIMT_Encode4(17890),
6088 /* 17834 */ /*GILLT_f64*//*Label 471*/ GIMT_Encode4(17916), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
6089 /* 17878 */ /*GILLT_v8f16*//*Label 472*/ GIMT_Encode4(17942),
6090 /* 17882 */ /*GILLT_v4f32*//*Label 473*/ GIMT_Encode4(17972),
6091 /* 17886 */ /*GILLT_v2f64*//*Label 474*/ GIMT_Encode4(18002),
6092 /* 17890 */ // Label 470: @17890
6093 /* 17890 */ GIM_Try, /*On fail goto*//*Label 476*/ GIMT_Encode4(17915), // Rule ID 643 //
6094 /* 17895 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
6095 /* 17898 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6096 /* 17902 */ // (froundeven:{ *:[f32] } f32:{ *:[f32] }:$src) => (NEAREST_F32:{ *:[f32] } f32:{ *:[f32] }:$src)
6097 /* 17902 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32),
6098 /* 17907 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
6099 /* 17913 */ GIR_RootConstrainSelectedInstOperands,
6100 /* 17914 */ // GIR_Coverage, 643,
6101 /* 17914 */ GIR_Done,
6102 /* 17915 */ // Label 476: @17915
6103 /* 17915 */ GIM_Reject,
6104 /* 17916 */ // Label 471: @17916
6105 /* 17916 */ GIM_Try, /*On fail goto*//*Label 477*/ GIMT_Encode4(17941), // Rule ID 644 //
6106 /* 17921 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
6107 /* 17924 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
6108 /* 17928 */ // (froundeven:{ *:[f64] } f64:{ *:[f64] }:$src) => (NEAREST_F64:{ *:[f64] } f64:{ *:[f64] }:$src)
6109 /* 17928 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64),
6110 /* 17933 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
6111 /* 17939 */ GIR_RootConstrainSelectedInstOperands,
6112 /* 17940 */ // GIR_Coverage, 644,
6113 /* 17940 */ GIR_Done,
6114 /* 17941 */ // Label 477: @17941
6115 /* 17941 */ GIM_Reject,
6116 /* 17942 */ // Label 472: @17942
6117 /* 17942 */ GIM_Try, /*On fail goto*//*Label 478*/ GIMT_Encode4(17971), // Rule ID 1173 //
6118 /* 17947 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
6119 /* 17950 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6120 /* 17954 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6121 /* 17958 */ // (froundeven:{ *:[v8f16] } V128:{ *:[v8f16] }:$src) => (NEAREST_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$src)
6122 /* 17958 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F16x8),
6123 /* 17963 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
6124 /* 17969 */ GIR_RootConstrainSelectedInstOperands,
6125 /* 17970 */ // GIR_Coverage, 1173,
6126 /* 17970 */ GIR_Done,
6127 /* 17971 */ // Label 478: @17971
6128 /* 17971 */ GIM_Reject,
6129 /* 17972 */ // Label 473: @17972
6130 /* 17972 */ GIM_Try, /*On fail goto*//*Label 479*/ GIMT_Encode4(18001), // Rule ID 1171 //
6131 /* 17977 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
6132 /* 17980 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6133 /* 17984 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6134 /* 17988 */ // (froundeven:{ *:[v4f32] } V128:{ *:[v4f32] }:$src) => (NEAREST_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$src)
6135 /* 17988 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32x4),
6136 /* 17993 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
6137 /* 17999 */ GIR_RootConstrainSelectedInstOperands,
6138 /* 18000 */ // GIR_Coverage, 1171,
6139 /* 18000 */ GIR_Done,
6140 /* 18001 */ // Label 479: @18001
6141 /* 18001 */ GIM_Reject,
6142 /* 18002 */ // Label 474: @18002
6143 /* 18002 */ GIM_Try, /*On fail goto*//*Label 480*/ GIMT_Encode4(18031), // Rule ID 1172 //
6144 /* 18007 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
6145 /* 18010 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6146 /* 18014 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6147 /* 18018 */ // (froundeven:{ *:[v2f64] } V128:{ *:[v2f64] }:$src) => (NEAREST_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$src)
6148 /* 18018 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64x2),
6149 /* 18023 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
6150 /* 18029 */ GIR_RootConstrainSelectedInstOperands,
6151 /* 18030 */ // GIR_Coverage, 1172,
6152 /* 18030 */ GIR_Done,
6153 /* 18031 */ // Label 480: @18031
6154 /* 18031 */ GIM_Reject,
6155 /* 18032 */ // Label 475: @18032
6156 /* 18032 */ GIM_Reject,
6157 /* 18033 */ // Label 16: @18033
6158 /* 18033 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(12), /*)*//*default:*//*Label 487*/ GIMT_Encode4(19939),
6159 /* 18044 */ /*GILLT_s32*//*Label 481*/ GIMT_Encode4(18092),
6160 /* 18048 */ /*GILLT_s64*//*Label 482*/ GIMT_Encode4(18536), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
6161 /* 18076 */ /*GILLT_v16s8*//*Label 483*/ GIMT_Encode4(19087),
6162 /* 18080 */ /*GILLT_v8s16*//*Label 484*/ GIMT_Encode4(19195),
6163 /* 18084 */ /*GILLT_v4s32*//*Label 485*/ GIMT_Encode4(19393),
6164 /* 18088 */ /*GILLT_v2s64*//*Label 486*/ GIMT_Encode4(19591),
6165 /* 18092 */ // Label 481: @18092
6166 /* 18092 */ GIM_Try, /*On fail goto*//*Label 488*/ GIMT_Encode4(18535),
6167 /* 18097 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6168 /* 18100 */ GIM_Try, /*On fail goto*//*Label 489*/ GIMT_Encode4(18324),
6169 /* 18105 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6170 /* 18109 */ GIM_Try, /*On fail goto*//*Label 490*/ GIMT_Encode4(18216),
6171 /* 18114 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(1),
6172 /* 18121 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6173 /* 18125 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 491*/ GIMT_Encode4(18170), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 562 //
6174 /* 18132 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6175 /* 18136 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6176 /* 18143 */ // (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>> => (LOAD8_U_I32_A32:{ *:[i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6177 /* 18143 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_U_I32_A32),
6178 /* 18146 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6179 /* 18148 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6180 /* 18151 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6181 /* 18156 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6182 /* 18161 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6183 /* 18164 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6184 /* 18168 */ GIR_RootConstrainSelectedInstOperands,
6185 /* 18169 */ // GIR_Coverage, 562,
6186 /* 18169 */ GIR_EraseRootFromParent_Done,
6187 /* 18170 */ // Label 491: @18170
6188 /* 18170 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 492*/ GIMT_Encode4(18215), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 563 //
6189 /* 18177 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6190 /* 18181 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6191 /* 18188 */ // (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>> => (LOAD8_U_I32_A64:{ *:[i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6192 /* 18188 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_U_I32_A64),
6193 /* 18191 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6194 /* 18193 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6195 /* 18196 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6196 /* 18201 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6197 /* 18206 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6198 /* 18209 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6199 /* 18213 */ GIR_RootConstrainSelectedInstOperands,
6200 /* 18214 */ // GIR_Coverage, 563,
6201 /* 18214 */ GIR_EraseRootFromParent_Done,
6202 /* 18215 */ // Label 492: @18215
6203 /* 18215 */ GIM_Reject,
6204 /* 18216 */ // Label 490: @18216
6205 /* 18216 */ GIM_Try, /*On fail goto*//*Label 493*/ GIMT_Encode4(18323),
6206 /* 18221 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
6207 /* 18228 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6208 /* 18232 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 494*/ GIMT_Encode4(18277), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 564 //
6209 /* 18239 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6210 /* 18243 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6211 /* 18250 */ // (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>> => (LOAD16_U_I32_A32:{ *:[i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6212 /* 18250 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_U_I32_A32),
6213 /* 18253 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6214 /* 18255 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6215 /* 18258 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6216 /* 18263 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6217 /* 18268 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6218 /* 18271 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6219 /* 18275 */ GIR_RootConstrainSelectedInstOperands,
6220 /* 18276 */ // GIR_Coverage, 564,
6221 /* 18276 */ GIR_EraseRootFromParent_Done,
6222 /* 18277 */ // Label 494: @18277
6223 /* 18277 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 495*/ GIMT_Encode4(18322), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 565 //
6224 /* 18284 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6225 /* 18288 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6226 /* 18295 */ // (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>> => (LOAD16_U_I32_A64:{ *:[i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6227 /* 18295 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_U_I32_A64),
6228 /* 18298 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6229 /* 18300 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6230 /* 18303 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6231 /* 18308 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6232 /* 18313 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6233 /* 18316 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6234 /* 18320 */ GIR_RootConstrainSelectedInstOperands,
6235 /* 18321 */ // GIR_Coverage, 565,
6236 /* 18321 */ GIR_EraseRootFromParent_Done,
6237 /* 18322 */ // Label 495: @18322
6238 /* 18322 */ GIM_Reject,
6239 /* 18323 */ // Label 493: @18323
6240 /* 18323 */ GIM_Reject,
6241 /* 18324 */ // Label 489: @18324
6242 /* 18324 */ GIM_Try, /*On fail goto*//*Label 496*/ GIMT_Encode4(18534),
6243 /* 18329 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6244 /* 18333 */ GIM_Try, /*On fail goto*//*Label 497*/ GIMT_Encode4(18433),
6245 /* 18338 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6246 /* 18342 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 498*/ GIMT_Encode4(18387), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 534 //
6247 /* 18349 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6248 /* 18353 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6249 /* 18360 */ // (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_I32_A32:{ *:[i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6250 /* 18360 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_I32_A32),
6251 /* 18363 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6252 /* 18365 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6253 /* 18368 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6254 /* 18373 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6255 /* 18378 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6256 /* 18381 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6257 /* 18385 */ GIR_RootConstrainSelectedInstOperands,
6258 /* 18386 */ // GIR_Coverage, 534,
6259 /* 18386 */ GIR_EraseRootFromParent_Done,
6260 /* 18387 */ // Label 498: @18387
6261 /* 18387 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 499*/ GIMT_Encode4(18432), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 535 //
6262 /* 18394 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6263 /* 18398 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6264 /* 18405 */ // (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_I32_A64:{ *:[i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6265 /* 18405 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_I32_A64),
6266 /* 18408 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6267 /* 18410 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6268 /* 18413 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6269 /* 18418 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6270 /* 18423 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6271 /* 18426 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6272 /* 18430 */ GIR_RootConstrainSelectedInstOperands,
6273 /* 18431 */ // GIR_Coverage, 535,
6274 /* 18431 */ GIR_EraseRootFromParent_Done,
6275 /* 18432 */ // Label 499: @18432
6276 /* 18432 */ GIM_Reject,
6277 /* 18433 */ // Label 497: @18433
6278 /* 18433 */ GIM_Try, /*On fail goto*//*Label 500*/ GIMT_Encode4(18533),
6279 /* 18438 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
6280 /* 18442 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 501*/ GIMT_Encode4(18487), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 538 //
6281 /* 18449 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6282 /* 18453 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6283 /* 18460 */ // (ld:{ *:[f32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_F32_A32:{ *:[f32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6284 /* 18460 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_F32_A32),
6285 /* 18463 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6286 /* 18465 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6287 /* 18468 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6288 /* 18473 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6289 /* 18478 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6290 /* 18481 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6291 /* 18485 */ GIR_RootConstrainSelectedInstOperands,
6292 /* 18486 */ // GIR_Coverage, 538,
6293 /* 18486 */ GIR_EraseRootFromParent_Done,
6294 /* 18487 */ // Label 501: @18487
6295 /* 18487 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 502*/ GIMT_Encode4(18532), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 539 //
6296 /* 18494 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6297 /* 18498 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6298 /* 18505 */ // (ld:{ *:[f32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_F32_A64:{ *:[f32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6299 /* 18505 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_F32_A64),
6300 /* 18508 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6301 /* 18510 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6302 /* 18513 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6303 /* 18518 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6304 /* 18523 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6305 /* 18526 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6306 /* 18530 */ GIR_RootConstrainSelectedInstOperands,
6307 /* 18531 */ // GIR_Coverage, 539,
6308 /* 18531 */ GIR_EraseRootFromParent_Done,
6309 /* 18532 */ // Label 502: @18532
6310 /* 18532 */ GIM_Reject,
6311 /* 18533 */ // Label 500: @18533
6312 /* 18533 */ GIM_Reject,
6313 /* 18534 */ // Label 496: @18534
6314 /* 18534 */ GIM_Reject,
6315 /* 18535 */ // Label 488: @18535
6316 /* 18535 */ GIM_Reject,
6317 /* 18536 */ // Label 482: @18536
6318 /* 18536 */ GIM_Try, /*On fail goto*//*Label 503*/ GIMT_Encode4(19086),
6319 /* 18541 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6320 /* 18544 */ GIM_Try, /*On fail goto*//*Label 504*/ GIMT_Encode4(18875),
6321 /* 18549 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6322 /* 18553 */ GIM_Try, /*On fail goto*//*Label 505*/ GIMT_Encode4(18660),
6323 /* 18558 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(1),
6324 /* 18565 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6325 /* 18569 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 506*/ GIMT_Encode4(18614), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 566 //
6326 /* 18576 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6327 /* 18580 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6328 /* 18587 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>> => (LOAD8_U_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6329 /* 18587 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_U_I64_A32),
6330 /* 18590 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6331 /* 18592 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6332 /* 18595 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6333 /* 18600 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6334 /* 18605 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6335 /* 18608 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6336 /* 18612 */ GIR_RootConstrainSelectedInstOperands,
6337 /* 18613 */ // GIR_Coverage, 566,
6338 /* 18613 */ GIR_EraseRootFromParent_Done,
6339 /* 18614 */ // Label 506: @18614
6340 /* 18614 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 507*/ GIMT_Encode4(18659), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 567 //
6341 /* 18621 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6342 /* 18625 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6343 /* 18632 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>> => (LOAD8_U_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6344 /* 18632 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_U_I64_A64),
6345 /* 18635 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6346 /* 18637 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6347 /* 18640 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6348 /* 18645 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6349 /* 18650 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6350 /* 18653 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6351 /* 18657 */ GIR_RootConstrainSelectedInstOperands,
6352 /* 18658 */ // GIR_Coverage, 567,
6353 /* 18658 */ GIR_EraseRootFromParent_Done,
6354 /* 18659 */ // Label 507: @18659
6355 /* 18659 */ GIM_Reject,
6356 /* 18660 */ // Label 505: @18660
6357 /* 18660 */ GIM_Try, /*On fail goto*//*Label 508*/ GIMT_Encode4(18767),
6358 /* 18665 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
6359 /* 18672 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6360 /* 18676 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 509*/ GIMT_Encode4(18721), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 568 //
6361 /* 18683 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6362 /* 18687 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6363 /* 18694 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>> => (LOAD16_U_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6364 /* 18694 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_U_I64_A32),
6365 /* 18697 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6366 /* 18699 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6367 /* 18702 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6368 /* 18707 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6369 /* 18712 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6370 /* 18715 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6371 /* 18719 */ GIR_RootConstrainSelectedInstOperands,
6372 /* 18720 */ // GIR_Coverage, 568,
6373 /* 18720 */ GIR_EraseRootFromParent_Done,
6374 /* 18721 */ // Label 509: @18721
6375 /* 18721 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 510*/ GIMT_Encode4(18766), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 569 //
6376 /* 18728 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6377 /* 18732 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6378 /* 18739 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>> => (LOAD16_U_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6379 /* 18739 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_U_I64_A64),
6380 /* 18742 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6381 /* 18744 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6382 /* 18747 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6383 /* 18752 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6384 /* 18757 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6385 /* 18760 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6386 /* 18764 */ GIR_RootConstrainSelectedInstOperands,
6387 /* 18765 */ // GIR_Coverage, 569,
6388 /* 18765 */ GIR_EraseRootFromParent_Done,
6389 /* 18766 */ // Label 510: @18766
6390 /* 18766 */ GIM_Reject,
6391 /* 18767 */ // Label 508: @18767
6392 /* 18767 */ GIM_Try, /*On fail goto*//*Label 511*/ GIMT_Encode4(18874),
6393 /* 18772 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(4),
6394 /* 18779 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6395 /* 18783 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 512*/ GIMT_Encode4(18828), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 570 //
6396 /* 18790 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6397 /* 18794 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6398 /* 18801 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi32>> => (LOAD32_U_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6399 /* 18801 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_U_I64_A32),
6400 /* 18804 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6401 /* 18806 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6402 /* 18809 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6403 /* 18814 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6404 /* 18819 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6405 /* 18822 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6406 /* 18826 */ GIR_RootConstrainSelectedInstOperands,
6407 /* 18827 */ // GIR_Coverage, 570,
6408 /* 18827 */ GIR_EraseRootFromParent_Done,
6409 /* 18828 */ // Label 512: @18828
6410 /* 18828 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 513*/ GIMT_Encode4(18873), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 571 //
6411 /* 18835 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6412 /* 18839 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6413 /* 18846 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi32>> => (LOAD32_U_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6414 /* 18846 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_U_I64_A64),
6415 /* 18849 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6416 /* 18851 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6417 /* 18854 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6418 /* 18859 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6419 /* 18864 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6420 /* 18867 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6421 /* 18871 */ GIR_RootConstrainSelectedInstOperands,
6422 /* 18872 */ // GIR_Coverage, 571,
6423 /* 18872 */ GIR_EraseRootFromParent_Done,
6424 /* 18873 */ // Label 513: @18873
6425 /* 18873 */ GIM_Reject,
6426 /* 18874 */ // Label 511: @18874
6427 /* 18874 */ GIM_Reject,
6428 /* 18875 */ // Label 504: @18875
6429 /* 18875 */ GIM_Try, /*On fail goto*//*Label 514*/ GIMT_Encode4(19085),
6430 /* 18880 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6431 /* 18884 */ GIM_Try, /*On fail goto*//*Label 515*/ GIMT_Encode4(18984),
6432 /* 18889 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6433 /* 18893 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 516*/ GIMT_Encode4(18938), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 536 //
6434 /* 18900 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6435 /* 18904 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6436 /* 18911 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6437 /* 18911 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_I64_A32),
6438 /* 18914 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6439 /* 18916 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6440 /* 18919 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6441 /* 18924 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6442 /* 18929 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6443 /* 18932 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6444 /* 18936 */ GIR_RootConstrainSelectedInstOperands,
6445 /* 18937 */ // GIR_Coverage, 536,
6446 /* 18937 */ GIR_EraseRootFromParent_Done,
6447 /* 18938 */ // Label 516: @18938
6448 /* 18938 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 517*/ GIMT_Encode4(18983), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 537 //
6449 /* 18945 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6450 /* 18949 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6451 /* 18956 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6452 /* 18956 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_I64_A64),
6453 /* 18959 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6454 /* 18961 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6455 /* 18964 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6456 /* 18969 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6457 /* 18974 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6458 /* 18977 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6459 /* 18981 */ GIR_RootConstrainSelectedInstOperands,
6460 /* 18982 */ // GIR_Coverage, 537,
6461 /* 18982 */ GIR_EraseRootFromParent_Done,
6462 /* 18983 */ // Label 517: @18983
6463 /* 18983 */ GIM_Reject,
6464 /* 18984 */ // Label 515: @18984
6465 /* 18984 */ GIM_Try, /*On fail goto*//*Label 518*/ GIMT_Encode4(19084),
6466 /* 18989 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
6467 /* 18993 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 519*/ GIMT_Encode4(19038), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 540 //
6468 /* 19000 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6469 /* 19004 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6470 /* 19011 */ // (ld:{ *:[f64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_F64_A32:{ *:[f64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6471 /* 19011 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_F64_A32),
6472 /* 19014 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6473 /* 19016 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6474 /* 19019 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6475 /* 19024 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6476 /* 19029 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6477 /* 19032 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6478 /* 19036 */ GIR_RootConstrainSelectedInstOperands,
6479 /* 19037 */ // GIR_Coverage, 540,
6480 /* 19037 */ GIR_EraseRootFromParent_Done,
6481 /* 19038 */ // Label 519: @19038
6482 /* 19038 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 520*/ GIMT_Encode4(19083), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 541 //
6483 /* 19045 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6484 /* 19049 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6485 /* 19056 */ // (ld:{ *:[f64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_F64_A64:{ *:[f64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6486 /* 19056 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_F64_A64),
6487 /* 19059 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6488 /* 19061 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6489 /* 19064 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6490 /* 19069 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6491 /* 19074 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6492 /* 19077 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6493 /* 19081 */ GIR_RootConstrainSelectedInstOperands,
6494 /* 19082 */ // GIR_Coverage, 541,
6495 /* 19082 */ GIR_EraseRootFromParent_Done,
6496 /* 19083 */ // Label 520: @19083
6497 /* 19083 */ GIM_Reject,
6498 /* 19084 */ // Label 518: @19084
6499 /* 19084 */ GIM_Reject,
6500 /* 19085 */ // Label 514: @19085
6501 /* 19085 */ GIM_Reject,
6502 /* 19086 */ // Label 503: @19086
6503 /* 19086 */ GIM_Reject,
6504 /* 19087 */ // Label 483: @19087
6505 /* 19087 */ GIM_Try, /*On fail goto*//*Label 521*/ GIMT_Encode4(19194),
6506 /* 19092 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6507 /* 19095 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6508 /* 19099 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6509 /* 19103 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 522*/ GIMT_Encode4(19148), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 859 //
6510 /* 19110 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6511 /* 19114 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6512 /* 19121 */ // (ld:{ *:[v16i8] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A32:{ *:[v16i8] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6513 /* 19121 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A32),
6514 /* 19124 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6515 /* 19126 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6516 /* 19129 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6517 /* 19134 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6518 /* 19139 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6519 /* 19142 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6520 /* 19146 */ GIR_RootConstrainSelectedInstOperands,
6521 /* 19147 */ // GIR_Coverage, 859,
6522 /* 19147 */ GIR_EraseRootFromParent_Done,
6523 /* 19148 */ // Label 522: @19148
6524 /* 19148 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 523*/ GIMT_Encode4(19193), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 860 //
6525 /* 19155 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6526 /* 19159 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6527 /* 19166 */ // (ld:{ *:[v16i8] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A64:{ *:[v16i8] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6528 /* 19166 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A64),
6529 /* 19169 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6530 /* 19171 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6531 /* 19174 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6532 /* 19179 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6533 /* 19184 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6534 /* 19187 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6535 /* 19191 */ GIR_RootConstrainSelectedInstOperands,
6536 /* 19192 */ // GIR_Coverage, 860,
6537 /* 19192 */ GIR_EraseRootFromParent_Done,
6538 /* 19193 */ // Label 523: @19193
6539 /* 19193 */ GIM_Reject,
6540 /* 19194 */ // Label 521: @19194
6541 /* 19194 */ GIM_Reject,
6542 /* 19195 */ // Label 484: @19195
6543 /* 19195 */ GIM_Try, /*On fail goto*//*Label 524*/ GIMT_Encode4(19392),
6544 /* 19200 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6545 /* 19203 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6546 /* 19207 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6547 /* 19211 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 525*/ GIMT_Encode4(19256), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 861 //
6548 /* 19218 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6549 /* 19222 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6550 /* 19229 */ // (ld:{ *:[v8i16] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A32:{ *:[v8i16] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6551 /* 19229 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A32),
6552 /* 19232 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6553 /* 19234 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6554 /* 19237 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6555 /* 19242 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6556 /* 19247 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6557 /* 19250 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6558 /* 19254 */ GIR_RootConstrainSelectedInstOperands,
6559 /* 19255 */ // GIR_Coverage, 861,
6560 /* 19255 */ GIR_EraseRootFromParent_Done,
6561 /* 19256 */ // Label 525: @19256
6562 /* 19256 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 526*/ GIMT_Encode4(19301), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 862 //
6563 /* 19263 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6564 /* 19267 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6565 /* 19274 */ // (ld:{ *:[v8i16] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A64:{ *:[v8i16] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6566 /* 19274 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A64),
6567 /* 19277 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6568 /* 19279 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6569 /* 19282 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6570 /* 19287 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6571 /* 19292 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6572 /* 19295 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6573 /* 19299 */ GIR_RootConstrainSelectedInstOperands,
6574 /* 19300 */ // GIR_Coverage, 862,
6575 /* 19300 */ GIR_EraseRootFromParent_Done,
6576 /* 19301 */ // Label 526: @19301
6577 /* 19301 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 527*/ GIMT_Encode4(19346), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 871 //
6578 /* 19308 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6579 /* 19312 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6580 /* 19319 */ // (ld:{ *:[v8f16] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A32:{ *:[v8f16] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6581 /* 19319 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A32),
6582 /* 19322 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6583 /* 19324 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6584 /* 19327 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6585 /* 19332 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6586 /* 19337 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6587 /* 19340 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6588 /* 19344 */ GIR_RootConstrainSelectedInstOperands,
6589 /* 19345 */ // GIR_Coverage, 871,
6590 /* 19345 */ GIR_EraseRootFromParent_Done,
6591 /* 19346 */ // Label 527: @19346
6592 /* 19346 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 528*/ GIMT_Encode4(19391), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 872 //
6593 /* 19353 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6594 /* 19357 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6595 /* 19364 */ // (ld:{ *:[v8f16] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A64:{ *:[v8f16] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6596 /* 19364 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A64),
6597 /* 19367 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6598 /* 19369 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6599 /* 19372 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6600 /* 19377 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6601 /* 19382 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6602 /* 19385 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6603 /* 19389 */ GIR_RootConstrainSelectedInstOperands,
6604 /* 19390 */ // GIR_Coverage, 872,
6605 /* 19390 */ GIR_EraseRootFromParent_Done,
6606 /* 19391 */ // Label 528: @19391
6607 /* 19391 */ GIM_Reject,
6608 /* 19392 */ // Label 524: @19392
6609 /* 19392 */ GIM_Reject,
6610 /* 19393 */ // Label 485: @19393
6611 /* 19393 */ GIM_Try, /*On fail goto*//*Label 529*/ GIMT_Encode4(19590),
6612 /* 19398 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6613 /* 19401 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6614 /* 19405 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6615 /* 19409 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 530*/ GIMT_Encode4(19454), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 863 //
6616 /* 19416 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6617 /* 19420 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6618 /* 19427 */ // (ld:{ *:[v4i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A32:{ *:[v4i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6619 /* 19427 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A32),
6620 /* 19430 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6621 /* 19432 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6622 /* 19435 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6623 /* 19440 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6624 /* 19445 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6625 /* 19448 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6626 /* 19452 */ GIR_RootConstrainSelectedInstOperands,
6627 /* 19453 */ // GIR_Coverage, 863,
6628 /* 19453 */ GIR_EraseRootFromParent_Done,
6629 /* 19454 */ // Label 530: @19454
6630 /* 19454 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 531*/ GIMT_Encode4(19499), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 864 //
6631 /* 19461 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6632 /* 19465 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6633 /* 19472 */ // (ld:{ *:[v4i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A64:{ *:[v4i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6634 /* 19472 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A64),
6635 /* 19475 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6636 /* 19477 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6637 /* 19480 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6638 /* 19485 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6639 /* 19490 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6640 /* 19493 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6641 /* 19497 */ GIR_RootConstrainSelectedInstOperands,
6642 /* 19498 */ // GIR_Coverage, 864,
6643 /* 19498 */ GIR_EraseRootFromParent_Done,
6644 /* 19499 */ // Label 531: @19499
6645 /* 19499 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 532*/ GIMT_Encode4(19544), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 867 //
6646 /* 19506 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6647 /* 19510 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6648 /* 19517 */ // (ld:{ *:[v4f32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A32:{ *:[v4f32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6649 /* 19517 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A32),
6650 /* 19520 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6651 /* 19522 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6652 /* 19525 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6653 /* 19530 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6654 /* 19535 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6655 /* 19538 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6656 /* 19542 */ GIR_RootConstrainSelectedInstOperands,
6657 /* 19543 */ // GIR_Coverage, 867,
6658 /* 19543 */ GIR_EraseRootFromParent_Done,
6659 /* 19544 */ // Label 532: @19544
6660 /* 19544 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 533*/ GIMT_Encode4(19589), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 868 //
6661 /* 19551 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6662 /* 19555 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6663 /* 19562 */ // (ld:{ *:[v4f32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A64:{ *:[v4f32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6664 /* 19562 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A64),
6665 /* 19565 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6666 /* 19567 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6667 /* 19570 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6668 /* 19575 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6669 /* 19580 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6670 /* 19583 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6671 /* 19587 */ GIR_RootConstrainSelectedInstOperands,
6672 /* 19588 */ // GIR_Coverage, 868,
6673 /* 19588 */ GIR_EraseRootFromParent_Done,
6674 /* 19589 */ // Label 533: @19589
6675 /* 19589 */ GIM_Reject,
6676 /* 19590 */ // Label 529: @19590
6677 /* 19590 */ GIM_Reject,
6678 /* 19591 */ // Label 486: @19591
6679 /* 19591 */ GIM_Try, /*On fail goto*//*Label 534*/ GIMT_Encode4(19938),
6680 /* 19596 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6681 /* 19599 */ GIM_Try, /*On fail goto*//*Label 535*/ GIMT_Encode4(19793),
6682 /* 19604 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6683 /* 19608 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6684 /* 19612 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 536*/ GIMT_Encode4(19657), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 865 //
6685 /* 19619 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6686 /* 19623 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6687 /* 19630 */ // (ld:{ *:[v2i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A32:{ *:[v2i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6688 /* 19630 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A32),
6689 /* 19633 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6690 /* 19635 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6691 /* 19638 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6692 /* 19643 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6693 /* 19648 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6694 /* 19651 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6695 /* 19655 */ GIR_RootConstrainSelectedInstOperands,
6696 /* 19656 */ // GIR_Coverage, 865,
6697 /* 19656 */ GIR_EraseRootFromParent_Done,
6698 /* 19657 */ // Label 536: @19657
6699 /* 19657 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 537*/ GIMT_Encode4(19702), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 866 //
6700 /* 19664 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6701 /* 19668 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6702 /* 19675 */ // (ld:{ *:[v2i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A64:{ *:[v2i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6703 /* 19675 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A64),
6704 /* 19678 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6705 /* 19680 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6706 /* 19683 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6707 /* 19688 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6708 /* 19693 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6709 /* 19696 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6710 /* 19700 */ GIR_RootConstrainSelectedInstOperands,
6711 /* 19701 */ // GIR_Coverage, 866,
6712 /* 19701 */ GIR_EraseRootFromParent_Done,
6713 /* 19702 */ // Label 537: @19702
6714 /* 19702 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 538*/ GIMT_Encode4(19747), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 869 //
6715 /* 19709 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6716 /* 19713 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6717 /* 19720 */ // (ld:{ *:[v2f64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A32:{ *:[v2f64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6718 /* 19720 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A32),
6719 /* 19723 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6720 /* 19725 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6721 /* 19728 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6722 /* 19733 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6723 /* 19738 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6724 /* 19741 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6725 /* 19745 */ GIR_RootConstrainSelectedInstOperands,
6726 /* 19746 */ // GIR_Coverage, 869,
6727 /* 19746 */ GIR_EraseRootFromParent_Done,
6728 /* 19747 */ // Label 538: @19747
6729 /* 19747 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 539*/ GIMT_Encode4(19792), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 870 //
6730 /* 19754 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6731 /* 19758 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6732 /* 19765 */ // (ld:{ *:[v2f64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>> => (LOAD_V128_A64:{ *:[v2f64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6733 /* 19765 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_V128_A64),
6734 /* 19768 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6735 /* 19770 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6736 /* 19773 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6737 /* 19778 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6738 /* 19783 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6739 /* 19786 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6740 /* 19790 */ GIR_RootConstrainSelectedInstOperands,
6741 /* 19791 */ // GIR_Coverage, 870,
6742 /* 19791 */ GIR_EraseRootFromParent_Done,
6743 /* 19792 */ // Label 539: @19792
6744 /* 19792 */ GIM_Reject,
6745 /* 19793 */ // Label 535: @19793
6746 /* 19793 */ GIM_Try, /*On fail goto*//*Label 540*/ GIMT_Encode4(19937),
6747 /* 19798 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
6748 /* 19802 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
6749 /* 19806 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 541*/ GIMT_Encode4(19871), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 1254 //
6750 /* 19813 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6751 /* 19817 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6752 /* 19824 */ // (ld:{ *:[v2f64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>> => (promote_low_F64x2:{ *:[v2f64] } (LOAD_ZERO_64_A32:{ *:[v16i8] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))
6753 /* 19824 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16i8,
6754 /* 19827 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_ZERO_64_A32),
6755 /* 19831 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
6756 /* 19836 */ GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
6757 /* 19839 */ GIR_ComplexSubOperandRenderer, /*InsnID*/1, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6758 /* 19844 */ GIR_ComplexSubOperandRenderer, /*InsnID*/1, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6759 /* 19849 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6760 /* 19852 */ GIR_MergeMemOperands, /*InsnID*/1, /*NumInsns*/1, /*MergeInsnID's*/0,
6761 /* 19856 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
6762 /* 19858 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::promote_low_F64x2),
6763 /* 19861 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6764 /* 19863 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
6765 /* 19866 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6766 /* 19869 */ GIR_RootConstrainSelectedInstOperands,
6767 /* 19870 */ // GIR_Coverage, 1254,
6768 /* 19870 */ GIR_EraseRootFromParent_Done,
6769 /* 19871 */ // Label 541: @19871
6770 /* 19871 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 542*/ GIMT_Encode4(19936), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 1255 //
6771 /* 19878 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6772 /* 19882 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6773 /* 19889 */ // (ld:{ *:[v2f64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>> => (promote_low_F64x2:{ *:[v2f64] } (LOAD_ZERO_64_A64:{ *:[v16i8] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))
6774 /* 19889 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16i8,
6775 /* 19892 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_ZERO_64_A64),
6776 /* 19896 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
6777 /* 19901 */ GIR_AddImm8, /*InsnID*/1, /*Imm*/0,
6778 /* 19904 */ GIR_ComplexSubOperandRenderer, /*InsnID*/1, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6779 /* 19909 */ GIR_ComplexSubOperandRenderer, /*InsnID*/1, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6780 /* 19914 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6781 /* 19917 */ GIR_MergeMemOperands, /*InsnID*/1, /*NumInsns*/1, /*MergeInsnID's*/0,
6782 /* 19921 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
6783 /* 19923 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::promote_low_F64x2),
6784 /* 19926 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6785 /* 19928 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
6786 /* 19931 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6787 /* 19934 */ GIR_RootConstrainSelectedInstOperands,
6788 /* 19935 */ // GIR_Coverage, 1255,
6789 /* 19935 */ GIR_EraseRootFromParent_Done,
6790 /* 19936 */ // Label 542: @19936
6791 /* 19936 */ GIM_Reject,
6792 /* 19937 */ // Label 540: @19937
6793 /* 19937 */ GIM_Reject,
6794 /* 19938 */ // Label 534: @19938
6795 /* 19938 */ GIM_Reject,
6796 /* 19939 */ // Label 487: @19939
6797 /* 19939 */ GIM_Reject,
6798 /* 19940 */ // Label 17: @19940
6799 /* 19940 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 545*/ GIMT_Encode4(20514),
6800 /* 19951 */ /*GILLT_i32*//*Label 543*/ GIMT_Encode4(19959),
6801 /* 19955 */ /*GILLT_i64*//*Label 544*/ GIMT_Encode4(20183),
6802 /* 19959 */ // Label 543: @19959
6803 /* 19959 */ GIM_Try, /*On fail goto*//*Label 546*/ GIMT_Encode4(20182),
6804 /* 19964 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6805 /* 19967 */ GIM_Try, /*On fail goto*//*Label 547*/ GIMT_Encode4(20074),
6806 /* 19972 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(1),
6807 /* 19979 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6808 /* 19983 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 548*/ GIMT_Encode4(20028), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 542 //
6809 /* 19990 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6810 /* 19994 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6811 /* 20001 */ // (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi8>> => (LOAD8_S_I32_A32:{ *:[i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6812 /* 20001 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_S_I32_A32),
6813 /* 20004 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6814 /* 20006 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6815 /* 20009 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6816 /* 20014 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6817 /* 20019 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6818 /* 20022 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6819 /* 20026 */ GIR_RootConstrainSelectedInstOperands,
6820 /* 20027 */ // GIR_Coverage, 542,
6821 /* 20027 */ GIR_EraseRootFromParent_Done,
6822 /* 20028 */ // Label 548: @20028
6823 /* 20028 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 549*/ GIMT_Encode4(20073), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 543 //
6824 /* 20035 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6825 /* 20039 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6826 /* 20046 */ // (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi8>> => (LOAD8_S_I32_A64:{ *:[i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6827 /* 20046 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_S_I32_A64),
6828 /* 20049 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6829 /* 20051 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6830 /* 20054 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6831 /* 20059 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6832 /* 20064 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6833 /* 20067 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6834 /* 20071 */ GIR_RootConstrainSelectedInstOperands,
6835 /* 20072 */ // GIR_Coverage, 543,
6836 /* 20072 */ GIR_EraseRootFromParent_Done,
6837 /* 20073 */ // Label 549: @20073
6838 /* 20073 */ GIM_Reject,
6839 /* 20074 */ // Label 547: @20074
6840 /* 20074 */ GIM_Try, /*On fail goto*//*Label 550*/ GIMT_Encode4(20181),
6841 /* 20079 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
6842 /* 20086 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
6843 /* 20090 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 551*/ GIMT_Encode4(20135), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 544 //
6844 /* 20097 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6845 /* 20101 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6846 /* 20108 */ // (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>> => (LOAD16_S_I32_A32:{ *:[i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6847 /* 20108 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_S_I32_A32),
6848 /* 20111 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6849 /* 20113 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6850 /* 20116 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6851 /* 20121 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6852 /* 20126 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6853 /* 20129 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6854 /* 20133 */ GIR_RootConstrainSelectedInstOperands,
6855 /* 20134 */ // GIR_Coverage, 544,
6856 /* 20134 */ GIR_EraseRootFromParent_Done,
6857 /* 20135 */ // Label 551: @20135
6858 /* 20135 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 552*/ GIMT_Encode4(20180), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 545 //
6859 /* 20142 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6860 /* 20146 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6861 /* 20153 */ // (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>> => (LOAD16_S_I32_A64:{ *:[i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6862 /* 20153 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_S_I32_A64),
6863 /* 20156 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6864 /* 20158 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6865 /* 20161 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6866 /* 20166 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6867 /* 20171 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6868 /* 20174 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6869 /* 20178 */ GIR_RootConstrainSelectedInstOperands,
6870 /* 20179 */ // GIR_Coverage, 545,
6871 /* 20179 */ GIR_EraseRootFromParent_Done,
6872 /* 20180 */ // Label 552: @20180
6873 /* 20180 */ GIM_Reject,
6874 /* 20181 */ // Label 550: @20181
6875 /* 20181 */ GIM_Reject,
6876 /* 20182 */ // Label 546: @20182
6877 /* 20182 */ GIM_Reject,
6878 /* 20183 */ // Label 544: @20183
6879 /* 20183 */ GIM_Try, /*On fail goto*//*Label 553*/ GIMT_Encode4(20513),
6880 /* 20188 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6881 /* 20191 */ GIM_Try, /*On fail goto*//*Label 554*/ GIMT_Encode4(20298),
6882 /* 20196 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(1),
6883 /* 20203 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6884 /* 20207 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 555*/ GIMT_Encode4(20252), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 546 //
6885 /* 20214 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6886 /* 20218 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6887 /* 20225 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi8>> => (LOAD8_S_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6888 /* 20225 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_S_I64_A32),
6889 /* 20228 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6890 /* 20230 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6891 /* 20233 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6892 /* 20238 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6893 /* 20243 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6894 /* 20246 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6895 /* 20250 */ GIR_RootConstrainSelectedInstOperands,
6896 /* 20251 */ // GIR_Coverage, 546,
6897 /* 20251 */ GIR_EraseRootFromParent_Done,
6898 /* 20252 */ // Label 555: @20252
6899 /* 20252 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 556*/ GIMT_Encode4(20297), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 547 //
6900 /* 20259 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6901 /* 20263 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6902 /* 20270 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi8>> => (LOAD8_S_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6903 /* 20270 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_S_I64_A64),
6904 /* 20273 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6905 /* 20275 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6906 /* 20278 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6907 /* 20283 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6908 /* 20288 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6909 /* 20291 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6910 /* 20295 */ GIR_RootConstrainSelectedInstOperands,
6911 /* 20296 */ // GIR_Coverage, 547,
6912 /* 20296 */ GIR_EraseRootFromParent_Done,
6913 /* 20297 */ // Label 556: @20297
6914 /* 20297 */ GIM_Reject,
6915 /* 20298 */ // Label 554: @20298
6916 /* 20298 */ GIM_Try, /*On fail goto*//*Label 557*/ GIMT_Encode4(20405),
6917 /* 20303 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
6918 /* 20310 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6919 /* 20314 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 558*/ GIMT_Encode4(20359), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 548 //
6920 /* 20321 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6921 /* 20325 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6922 /* 20332 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>> => (LOAD16_S_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6923 /* 20332 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_S_I64_A32),
6924 /* 20335 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6925 /* 20337 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6926 /* 20340 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6927 /* 20345 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6928 /* 20350 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6929 /* 20353 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6930 /* 20357 */ GIR_RootConstrainSelectedInstOperands,
6931 /* 20358 */ // GIR_Coverage, 548,
6932 /* 20358 */ GIR_EraseRootFromParent_Done,
6933 /* 20359 */ // Label 558: @20359
6934 /* 20359 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 559*/ GIMT_Encode4(20404), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 549 //
6935 /* 20366 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6936 /* 20370 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6937 /* 20377 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>> => (LOAD16_S_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6938 /* 20377 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_S_I64_A64),
6939 /* 20380 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6940 /* 20382 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6941 /* 20385 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6942 /* 20390 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6943 /* 20395 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6944 /* 20398 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6945 /* 20402 */ GIR_RootConstrainSelectedInstOperands,
6946 /* 20403 */ // GIR_Coverage, 549,
6947 /* 20403 */ GIR_EraseRootFromParent_Done,
6948 /* 20404 */ // Label 559: @20404
6949 /* 20404 */ GIM_Reject,
6950 /* 20405 */ // Label 557: @20405
6951 /* 20405 */ GIM_Try, /*On fail goto*//*Label 560*/ GIMT_Encode4(20512),
6952 /* 20410 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(4),
6953 /* 20417 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
6954 /* 20421 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 561*/ GIMT_Encode4(20466), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 550 //
6955 /* 20428 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
6956 /* 20432 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
6957 /* 20439 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi32>> => (LOAD32_S_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
6958 /* 20439 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_S_I64_A32),
6959 /* 20442 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6960 /* 20444 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6961 /* 20447 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6962 /* 20452 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6963 /* 20457 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6964 /* 20460 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6965 /* 20464 */ GIR_RootConstrainSelectedInstOperands,
6966 /* 20465 */ // GIR_Coverage, 550,
6967 /* 20465 */ GIR_EraseRootFromParent_Done,
6968 /* 20466 */ // Label 561: @20466
6969 /* 20466 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 562*/ GIMT_Encode4(20511), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 551 //
6970 /* 20473 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
6971 /* 20477 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
6972 /* 20484 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi32>> => (LOAD32_S_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
6973 /* 20484 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_S_I64_A64),
6974 /* 20487 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
6975 /* 20489 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
6976 /* 20492 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
6977 /* 20497 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
6978 /* 20502 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
6979 /* 20505 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
6980 /* 20509 */ GIR_RootConstrainSelectedInstOperands,
6981 /* 20510 */ // GIR_Coverage, 551,
6982 /* 20510 */ GIR_EraseRootFromParent_Done,
6983 /* 20511 */ // Label 562: @20511
6984 /* 20511 */ GIM_Reject,
6985 /* 20512 */ // Label 560: @20512
6986 /* 20512 */ GIM_Reject,
6987 /* 20513 */ // Label 553: @20513
6988 /* 20513 */ GIM_Reject,
6989 /* 20514 */ // Label 545: @20514
6990 /* 20514 */ GIM_Reject,
6991 /* 20515 */ // Label 18: @20515
6992 /* 20515 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 565*/ GIMT_Encode4(21089),
6993 /* 20526 */ /*GILLT_i32*//*Label 563*/ GIMT_Encode4(20534),
6994 /* 20530 */ /*GILLT_i64*//*Label 564*/ GIMT_Encode4(20758),
6995 /* 20534 */ // Label 563: @20534
6996 /* 20534 */ GIM_Try, /*On fail goto*//*Label 566*/ GIMT_Encode4(20757),
6997 /* 20539 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
6998 /* 20542 */ GIM_Try, /*On fail goto*//*Label 567*/ GIMT_Encode4(20649),
6999 /* 20547 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(1),
7000 /* 20554 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7001 /* 20558 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 568*/ GIMT_Encode4(20603), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 552 //
7002 /* 20565 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7003 /* 20569 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7004 /* 20576 */ // (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi8>> => (LOAD8_U_I32_A32:{ *:[i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
7005 /* 20576 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_U_I32_A32),
7006 /* 20579 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7007 /* 20581 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7008 /* 20584 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7009 /* 20589 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7010 /* 20594 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7011 /* 20597 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7012 /* 20601 */ GIR_RootConstrainSelectedInstOperands,
7013 /* 20602 */ // GIR_Coverage, 552,
7014 /* 20602 */ GIR_EraseRootFromParent_Done,
7015 /* 20603 */ // Label 568: @20603
7016 /* 20603 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 569*/ GIMT_Encode4(20648), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 553 //
7017 /* 20610 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7018 /* 20614 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7019 /* 20621 */ // (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi8>> => (LOAD8_U_I32_A64:{ *:[i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
7020 /* 20621 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_U_I32_A64),
7021 /* 20624 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7022 /* 20626 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7023 /* 20629 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7024 /* 20634 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7025 /* 20639 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7026 /* 20642 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7027 /* 20646 */ GIR_RootConstrainSelectedInstOperands,
7028 /* 20647 */ // GIR_Coverage, 553,
7029 /* 20647 */ GIR_EraseRootFromParent_Done,
7030 /* 20648 */ // Label 569: @20648
7031 /* 20648 */ GIM_Reject,
7032 /* 20649 */ // Label 567: @20649
7033 /* 20649 */ GIM_Try, /*On fail goto*//*Label 570*/ GIMT_Encode4(20756),
7034 /* 20654 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
7035 /* 20661 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7036 /* 20665 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 571*/ GIMT_Encode4(20710), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 554 //
7037 /* 20672 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7038 /* 20676 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7039 /* 20683 */ // (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi16>> => (LOAD16_U_I32_A32:{ *:[i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
7040 /* 20683 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_U_I32_A32),
7041 /* 20686 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7042 /* 20688 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7043 /* 20691 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7044 /* 20696 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7045 /* 20701 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7046 /* 20704 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7047 /* 20708 */ GIR_RootConstrainSelectedInstOperands,
7048 /* 20709 */ // GIR_Coverage, 554,
7049 /* 20709 */ GIR_EraseRootFromParent_Done,
7050 /* 20710 */ // Label 571: @20710
7051 /* 20710 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 572*/ GIMT_Encode4(20755), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 555 //
7052 /* 20717 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7053 /* 20721 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7054 /* 20728 */ // (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi16>> => (LOAD16_U_I32_A64:{ *:[i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
7055 /* 20728 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_U_I32_A64),
7056 /* 20731 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7057 /* 20733 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7058 /* 20736 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7059 /* 20741 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7060 /* 20746 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7061 /* 20749 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7062 /* 20753 */ GIR_RootConstrainSelectedInstOperands,
7063 /* 20754 */ // GIR_Coverage, 555,
7064 /* 20754 */ GIR_EraseRootFromParent_Done,
7065 /* 20755 */ // Label 572: @20755
7066 /* 20755 */ GIM_Reject,
7067 /* 20756 */ // Label 570: @20756
7068 /* 20756 */ GIM_Reject,
7069 /* 20757 */ // Label 566: @20757
7070 /* 20757 */ GIM_Reject,
7071 /* 20758 */ // Label 564: @20758
7072 /* 20758 */ GIM_Try, /*On fail goto*//*Label 573*/ GIMT_Encode4(21088),
7073 /* 20763 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7074 /* 20766 */ GIM_Try, /*On fail goto*//*Label 574*/ GIMT_Encode4(20873),
7075 /* 20771 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(1),
7076 /* 20778 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7077 /* 20782 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 575*/ GIMT_Encode4(20827), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 556 //
7078 /* 20789 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7079 /* 20793 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7080 /* 20800 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi8>> => (LOAD8_U_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
7081 /* 20800 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_U_I64_A32),
7082 /* 20803 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7083 /* 20805 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7084 /* 20808 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7085 /* 20813 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7086 /* 20818 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7087 /* 20821 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7088 /* 20825 */ GIR_RootConstrainSelectedInstOperands,
7089 /* 20826 */ // GIR_Coverage, 556,
7090 /* 20826 */ GIR_EraseRootFromParent_Done,
7091 /* 20827 */ // Label 575: @20827
7092 /* 20827 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 576*/ GIMT_Encode4(20872), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 557 //
7093 /* 20834 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7094 /* 20838 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7095 /* 20845 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi8>> => (LOAD8_U_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
7096 /* 20845 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_U_I64_A64),
7097 /* 20848 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7098 /* 20850 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7099 /* 20853 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7100 /* 20858 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7101 /* 20863 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7102 /* 20866 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7103 /* 20870 */ GIR_RootConstrainSelectedInstOperands,
7104 /* 20871 */ // GIR_Coverage, 557,
7105 /* 20871 */ GIR_EraseRootFromParent_Done,
7106 /* 20872 */ // Label 576: @20872
7107 /* 20872 */ GIM_Reject,
7108 /* 20873 */ // Label 574: @20873
7109 /* 20873 */ GIM_Try, /*On fail goto*//*Label 577*/ GIMT_Encode4(20980),
7110 /* 20878 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
7111 /* 20885 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7112 /* 20889 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 578*/ GIMT_Encode4(20934), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 558 //
7113 /* 20896 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7114 /* 20900 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7115 /* 20907 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi16>> => (LOAD16_U_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
7116 /* 20907 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_U_I64_A32),
7117 /* 20910 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7118 /* 20912 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7119 /* 20915 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7120 /* 20920 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7121 /* 20925 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7122 /* 20928 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7123 /* 20932 */ GIR_RootConstrainSelectedInstOperands,
7124 /* 20933 */ // GIR_Coverage, 558,
7125 /* 20933 */ GIR_EraseRootFromParent_Done,
7126 /* 20934 */ // Label 578: @20934
7127 /* 20934 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 579*/ GIMT_Encode4(20979), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 559 //
7128 /* 20941 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7129 /* 20945 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7130 /* 20952 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi16>> => (LOAD16_U_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
7131 /* 20952 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_U_I64_A64),
7132 /* 20955 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7133 /* 20957 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7134 /* 20960 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7135 /* 20965 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7136 /* 20970 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7137 /* 20973 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7138 /* 20977 */ GIR_RootConstrainSelectedInstOperands,
7139 /* 20978 */ // GIR_Coverage, 559,
7140 /* 20978 */ GIR_EraseRootFromParent_Done,
7141 /* 20979 */ // Label 579: @20979
7142 /* 20979 */ GIM_Reject,
7143 /* 20980 */ // Label 577: @20980
7144 /* 20980 */ GIM_Try, /*On fail goto*//*Label 580*/ GIMT_Encode4(21087),
7145 /* 20985 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(4),
7146 /* 20992 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7147 /* 20996 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 581*/ GIMT_Encode4(21041), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 560 //
7148 /* 21003 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7149 /* 21007 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7150 /* 21014 */ // (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi32>> => (LOAD32_U_I64_A32:{ *:[i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
7151 /* 21014 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_U_I64_A32),
7152 /* 21017 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7153 /* 21019 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7154 /* 21022 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7155 /* 21027 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7156 /* 21032 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7157 /* 21035 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7158 /* 21039 */ GIR_RootConstrainSelectedInstOperands,
7159 /* 21040 */ // GIR_Coverage, 560,
7160 /* 21040 */ GIR_EraseRootFromParent_Done,
7161 /* 21041 */ // Label 581: @21041
7162 /* 21041 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 582*/ GIMT_Encode4(21086), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 561 //
7163 /* 21048 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7164 /* 21052 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7165 /* 21059 */ // (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi32>> => (LOAD32_U_I64_A64:{ *:[i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
7166 /* 21059 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_U_I64_A64),
7167 /* 21062 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7168 /* 21064 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7169 /* 21067 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7170 /* 21072 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7171 /* 21077 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7172 /* 21080 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7173 /* 21084 */ GIR_RootConstrainSelectedInstOperands,
7174 /* 21085 */ // GIR_Coverage, 561,
7175 /* 21085 */ GIR_EraseRootFromParent_Done,
7176 /* 21086 */ // Label 582: @21086
7177 /* 21086 */ GIM_Reject,
7178 /* 21087 */ // Label 580: @21087
7179 /* 21087 */ GIM_Reject,
7180 /* 21088 */ // Label 573: @21088
7181 /* 21088 */ GIM_Reject,
7182 /* 21089 */ // Label 565: @21089
7183 /* 21089 */ GIM_Reject,
7184 /* 21090 */ // Label 19: @21090
7185 /* 21090 */ GIM_Try, /*On fail goto*//*Label 583*/ GIMT_Encode4(21207),
7186 /* 21095 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_f32,
7187 /* 21098 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7188 /* 21101 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
7189 /* 21105 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
7190 /* 21112 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
7191 /* 21116 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 584*/ GIMT_Encode4(21161), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 572 //
7192 /* 21123 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7193 /* 21127 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7194 /* 21134 */ // (ld:{ *:[f32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadf16>> => (LOAD_F16_F32_A32:{ *:[f32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
7195 /* 21134 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_F16_F32_A32),
7196 /* 21137 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7197 /* 21139 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7198 /* 21142 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7199 /* 21147 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7200 /* 21152 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7201 /* 21155 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7202 /* 21159 */ GIR_RootConstrainSelectedInstOperands,
7203 /* 21160 */ // GIR_Coverage, 572,
7204 /* 21160 */ GIR_EraseRootFromParent_Done,
7205 /* 21161 */ // Label 584: @21161
7206 /* 21161 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 585*/ GIMT_Encode4(21206), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 573 //
7207 /* 21168 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7208 /* 21172 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7209 /* 21179 */ // (ld:{ *:[f32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadf16>> => (LOAD_F16_F32_A64:{ *:[f32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
7210 /* 21179 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_F16_F32_A64),
7211 /* 21182 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7212 /* 21184 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7213 /* 21187 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7214 /* 21192 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7215 /* 21197 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7216 /* 21200 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7217 /* 21204 */ GIR_RootConstrainSelectedInstOperands,
7218 /* 21205 */ // GIR_Coverage, 573,
7219 /* 21205 */ GIR_EraseRootFromParent_Done,
7220 /* 21206 */ // Label 585: @21206
7221 /* 21206 */ GIM_Reject,
7222 /* 21207 */ // Label 583: @21207
7223 /* 21207 */ GIM_Reject,
7224 /* 21208 */ // Label 20: @21208
7225 /* 21208 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(12), /*)*//*default:*//*Label 592*/ GIMT_Encode4(22964),
7226 /* 21219 */ /*GILLT_s32*//*Label 586*/ GIMT_Encode4(21267),
7227 /* 21223 */ /*GILLT_s64*//*Label 587*/ GIMT_Encode4(21711), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
7228 /* 21251 */ /*GILLT_v16s8*//*Label 588*/ GIMT_Encode4(22262),
7229 /* 21255 */ /*GILLT_v8s16*//*Label 589*/ GIMT_Encode4(22370),
7230 /* 21259 */ /*GILLT_v4s32*//*Label 590*/ GIMT_Encode4(22568),
7231 /* 21263 */ /*GILLT_v2s64*//*Label 591*/ GIMT_Encode4(22766),
7232 /* 21267 */ // Label 586: @21267
7233 /* 21267 */ GIM_Try, /*On fail goto*//*Label 593*/ GIMT_Encode4(21710),
7234 /* 21272 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7235 /* 21275 */ GIM_Try, /*On fail goto*//*Label 594*/ GIMT_Encode4(21499),
7236 /* 21280 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
7237 /* 21284 */ GIM_Try, /*On fail goto*//*Label 595*/ GIMT_Encode4(21391),
7238 /* 21289 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(1),
7239 /* 21296 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7240 /* 21300 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 596*/ GIMT_Encode4(21345), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 584 //
7241 /* 21307 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7242 /* 21311 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7243 /* 21318 */ // (st I32:{ *:[i32] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei8>> => (STORE8_I32_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, i32:{ *:[i32] }:$val)
7244 /* 21318 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE8_I32_A32),
7245 /* 21321 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7246 /* 21324 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7247 /* 21329 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7248 /* 21334 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7249 /* 21336 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7250 /* 21339 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7251 /* 21343 */ GIR_RootConstrainSelectedInstOperands,
7252 /* 21344 */ // GIR_Coverage, 584,
7253 /* 21344 */ GIR_EraseRootFromParent_Done,
7254 /* 21345 */ // Label 596: @21345
7255 /* 21345 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 597*/ GIMT_Encode4(21390), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 585 //
7256 /* 21352 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7257 /* 21356 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7258 /* 21363 */ // (st I32:{ *:[i32] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei8>> => (STORE8_I32_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, i32:{ *:[i32] }:$val)
7259 /* 21363 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE8_I32_A64),
7260 /* 21366 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7261 /* 21369 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7262 /* 21374 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7263 /* 21379 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7264 /* 21381 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7265 /* 21384 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7266 /* 21388 */ GIR_RootConstrainSelectedInstOperands,
7267 /* 21389 */ // GIR_Coverage, 585,
7268 /* 21389 */ GIR_EraseRootFromParent_Done,
7269 /* 21390 */ // Label 597: @21390
7270 /* 21390 */ GIM_Reject,
7271 /* 21391 */ // Label 595: @21391
7272 /* 21391 */ GIM_Try, /*On fail goto*//*Label 598*/ GIMT_Encode4(21498),
7273 /* 21396 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
7274 /* 21403 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7275 /* 21407 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 599*/ GIMT_Encode4(21452), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 586 //
7276 /* 21414 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7277 /* 21418 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7278 /* 21425 */ // (st I32:{ *:[i32] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei16>> => (STORE16_I32_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, i32:{ *:[i32] }:$val)
7279 /* 21425 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE16_I32_A32),
7280 /* 21428 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7281 /* 21431 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7282 /* 21436 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7283 /* 21441 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7284 /* 21443 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7285 /* 21446 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7286 /* 21450 */ GIR_RootConstrainSelectedInstOperands,
7287 /* 21451 */ // GIR_Coverage, 586,
7288 /* 21451 */ GIR_EraseRootFromParent_Done,
7289 /* 21452 */ // Label 599: @21452
7290 /* 21452 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 600*/ GIMT_Encode4(21497), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 587 //
7291 /* 21459 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7292 /* 21463 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7293 /* 21470 */ // (st I32:{ *:[i32] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei16>> => (STORE16_I32_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, i32:{ *:[i32] }:$val)
7294 /* 21470 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE16_I32_A64),
7295 /* 21473 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7296 /* 21476 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7297 /* 21481 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7298 /* 21486 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7299 /* 21488 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7300 /* 21491 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7301 /* 21495 */ GIR_RootConstrainSelectedInstOperands,
7302 /* 21496 */ // GIR_Coverage, 587,
7303 /* 21496 */ GIR_EraseRootFromParent_Done,
7304 /* 21497 */ // Label 600: @21497
7305 /* 21497 */ GIM_Reject,
7306 /* 21498 */ // Label 598: @21498
7307 /* 21498 */ GIM_Reject,
7308 /* 21499 */ // Label 594: @21499
7309 /* 21499 */ GIM_Try, /*On fail goto*//*Label 601*/ GIMT_Encode4(21709),
7310 /* 21504 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
7311 /* 21508 */ GIM_Try, /*On fail goto*//*Label 602*/ GIMT_Encode4(21608),
7312 /* 21513 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7313 /* 21517 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 603*/ GIMT_Encode4(21562), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 576 //
7314 /* 21524 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7315 /* 21528 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7316 /* 21535 */ // (st I32:{ *:[i32] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_I32_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, i32:{ *:[i32] }:$val)
7317 /* 21535 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_I32_A32),
7318 /* 21538 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7319 /* 21541 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7320 /* 21546 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7321 /* 21551 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7322 /* 21553 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7323 /* 21556 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7324 /* 21560 */ GIR_RootConstrainSelectedInstOperands,
7325 /* 21561 */ // GIR_Coverage, 576,
7326 /* 21561 */ GIR_EraseRootFromParent_Done,
7327 /* 21562 */ // Label 603: @21562
7328 /* 21562 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 604*/ GIMT_Encode4(21607), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 577 //
7329 /* 21569 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7330 /* 21573 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7331 /* 21580 */ // (st I32:{ *:[i32] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_I32_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, i32:{ *:[i32] }:$val)
7332 /* 21580 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_I32_A64),
7333 /* 21583 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7334 /* 21586 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7335 /* 21591 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7336 /* 21596 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7337 /* 21598 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7338 /* 21601 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7339 /* 21605 */ GIR_RootConstrainSelectedInstOperands,
7340 /* 21606 */ // GIR_Coverage, 577,
7341 /* 21606 */ GIR_EraseRootFromParent_Done,
7342 /* 21607 */ // Label 604: @21607
7343 /* 21607 */ GIM_Reject,
7344 /* 21608 */ // Label 602: @21608
7345 /* 21608 */ GIM_Try, /*On fail goto*//*Label 605*/ GIMT_Encode4(21708),
7346 /* 21613 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
7347 /* 21617 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 606*/ GIMT_Encode4(21662), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 580 //
7348 /* 21624 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7349 /* 21628 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7350 /* 21635 */ // (st F32:{ *:[f32] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_F32_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, f32:{ *:[f32] }:$val)
7351 /* 21635 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_F32_A32),
7352 /* 21638 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7353 /* 21641 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7354 /* 21646 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7355 /* 21651 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7356 /* 21653 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7357 /* 21656 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7358 /* 21660 */ GIR_RootConstrainSelectedInstOperands,
7359 /* 21661 */ // GIR_Coverage, 580,
7360 /* 21661 */ GIR_EraseRootFromParent_Done,
7361 /* 21662 */ // Label 606: @21662
7362 /* 21662 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 607*/ GIMT_Encode4(21707), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 581 //
7363 /* 21669 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7364 /* 21673 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7365 /* 21680 */ // (st F32:{ *:[f32] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_F32_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, f32:{ *:[f32] }:$val)
7366 /* 21680 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_F32_A64),
7367 /* 21683 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7368 /* 21686 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7369 /* 21691 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7370 /* 21696 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7371 /* 21698 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7372 /* 21701 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7373 /* 21705 */ GIR_RootConstrainSelectedInstOperands,
7374 /* 21706 */ // GIR_Coverage, 581,
7375 /* 21706 */ GIR_EraseRootFromParent_Done,
7376 /* 21707 */ // Label 607: @21707
7377 /* 21707 */ GIM_Reject,
7378 /* 21708 */ // Label 605: @21708
7379 /* 21708 */ GIM_Reject,
7380 /* 21709 */ // Label 601: @21709
7381 /* 21709 */ GIM_Reject,
7382 /* 21710 */ // Label 593: @21710
7383 /* 21710 */ GIM_Reject,
7384 /* 21711 */ // Label 587: @21711
7385 /* 21711 */ GIM_Try, /*On fail goto*//*Label 608*/ GIMT_Encode4(22261),
7386 /* 21716 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7387 /* 21719 */ GIM_Try, /*On fail goto*//*Label 609*/ GIMT_Encode4(22050),
7388 /* 21724 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
7389 /* 21728 */ GIM_Try, /*On fail goto*//*Label 610*/ GIMT_Encode4(21835),
7390 /* 21733 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(1),
7391 /* 21740 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7392 /* 21744 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 611*/ GIMT_Encode4(21789), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 588 //
7393 /* 21751 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7394 /* 21755 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7395 /* 21762 */ // (st I64:{ *:[i64] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei8>> => (STORE8_I64_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, i64:{ *:[i64] }:$val)
7396 /* 21762 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE8_I64_A32),
7397 /* 21765 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7398 /* 21768 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7399 /* 21773 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7400 /* 21778 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7401 /* 21780 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7402 /* 21783 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7403 /* 21787 */ GIR_RootConstrainSelectedInstOperands,
7404 /* 21788 */ // GIR_Coverage, 588,
7405 /* 21788 */ GIR_EraseRootFromParent_Done,
7406 /* 21789 */ // Label 611: @21789
7407 /* 21789 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 612*/ GIMT_Encode4(21834), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 589 //
7408 /* 21796 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7409 /* 21800 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7410 /* 21807 */ // (st I64:{ *:[i64] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei8>> => (STORE8_I64_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, i64:{ *:[i64] }:$val)
7411 /* 21807 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE8_I64_A64),
7412 /* 21810 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7413 /* 21813 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7414 /* 21818 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7415 /* 21823 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7416 /* 21825 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7417 /* 21828 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7418 /* 21832 */ GIR_RootConstrainSelectedInstOperands,
7419 /* 21833 */ // GIR_Coverage, 589,
7420 /* 21833 */ GIR_EraseRootFromParent_Done,
7421 /* 21834 */ // Label 612: @21834
7422 /* 21834 */ GIM_Reject,
7423 /* 21835 */ // Label 610: @21835
7424 /* 21835 */ GIM_Try, /*On fail goto*//*Label 613*/ GIMT_Encode4(21942),
7425 /* 21840 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
7426 /* 21847 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7427 /* 21851 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 614*/ GIMT_Encode4(21896), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 590 //
7428 /* 21858 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7429 /* 21862 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7430 /* 21869 */ // (st I64:{ *:[i64] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei16>> => (STORE16_I64_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, i64:{ *:[i64] }:$val)
7431 /* 21869 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE16_I64_A32),
7432 /* 21872 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7433 /* 21875 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7434 /* 21880 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7435 /* 21885 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7436 /* 21887 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7437 /* 21890 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7438 /* 21894 */ GIR_RootConstrainSelectedInstOperands,
7439 /* 21895 */ // GIR_Coverage, 590,
7440 /* 21895 */ GIR_EraseRootFromParent_Done,
7441 /* 21896 */ // Label 614: @21896
7442 /* 21896 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 615*/ GIMT_Encode4(21941), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 591 //
7443 /* 21903 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7444 /* 21907 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7445 /* 21914 */ // (st I64:{ *:[i64] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei16>> => (STORE16_I64_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, i64:{ *:[i64] }:$val)
7446 /* 21914 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE16_I64_A64),
7447 /* 21917 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7448 /* 21920 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7449 /* 21925 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7450 /* 21930 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7451 /* 21932 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7452 /* 21935 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7453 /* 21939 */ GIR_RootConstrainSelectedInstOperands,
7454 /* 21940 */ // GIR_Coverage, 591,
7455 /* 21940 */ GIR_EraseRootFromParent_Done,
7456 /* 21941 */ // Label 615: @21941
7457 /* 21941 */ GIM_Reject,
7458 /* 21942 */ // Label 613: @21942
7459 /* 21942 */ GIM_Try, /*On fail goto*//*Label 616*/ GIMT_Encode4(22049),
7460 /* 21947 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(4),
7461 /* 21954 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7462 /* 21958 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 617*/ GIMT_Encode4(22003), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 592 //
7463 /* 21965 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7464 /* 21969 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7465 /* 21976 */ // (st I64:{ *:[i64] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei32>> => (STORE32_I64_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, i64:{ *:[i64] }:$val)
7466 /* 21976 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE32_I64_A32),
7467 /* 21979 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7468 /* 21982 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7469 /* 21987 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7470 /* 21992 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7471 /* 21994 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7472 /* 21997 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7473 /* 22001 */ GIR_RootConstrainSelectedInstOperands,
7474 /* 22002 */ // GIR_Coverage, 592,
7475 /* 22002 */ GIR_EraseRootFromParent_Done,
7476 /* 22003 */ // Label 617: @22003
7477 /* 22003 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 618*/ GIMT_Encode4(22048), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 593 //
7478 /* 22010 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7479 /* 22014 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7480 /* 22021 */ // (st I64:{ *:[i64] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstorei32>> => (STORE32_I64_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, i64:{ *:[i64] }:$val)
7481 /* 22021 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE32_I64_A64),
7482 /* 22024 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7483 /* 22027 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7484 /* 22032 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7485 /* 22037 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7486 /* 22039 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7487 /* 22042 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7488 /* 22046 */ GIR_RootConstrainSelectedInstOperands,
7489 /* 22047 */ // GIR_Coverage, 593,
7490 /* 22047 */ GIR_EraseRootFromParent_Done,
7491 /* 22048 */ // Label 618: @22048
7492 /* 22048 */ GIM_Reject,
7493 /* 22049 */ // Label 616: @22049
7494 /* 22049 */ GIM_Reject,
7495 /* 22050 */ // Label 609: @22050
7496 /* 22050 */ GIM_Try, /*On fail goto*//*Label 619*/ GIMT_Encode4(22260),
7497 /* 22055 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
7498 /* 22059 */ GIM_Try, /*On fail goto*//*Label 620*/ GIMT_Encode4(22159),
7499 /* 22064 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
7500 /* 22068 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 621*/ GIMT_Encode4(22113), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 578 //
7501 /* 22075 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7502 /* 22079 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7503 /* 22086 */ // (st I64:{ *:[i64] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_I64_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, i64:{ *:[i64] }:$val)
7504 /* 22086 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_I64_A32),
7505 /* 22089 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7506 /* 22092 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7507 /* 22097 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7508 /* 22102 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7509 /* 22104 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7510 /* 22107 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7511 /* 22111 */ GIR_RootConstrainSelectedInstOperands,
7512 /* 22112 */ // GIR_Coverage, 578,
7513 /* 22112 */ GIR_EraseRootFromParent_Done,
7514 /* 22113 */ // Label 621: @22113
7515 /* 22113 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 622*/ GIMT_Encode4(22158), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 579 //
7516 /* 22120 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7517 /* 22124 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7518 /* 22131 */ // (st I64:{ *:[i64] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_I64_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, i64:{ *:[i64] }:$val)
7519 /* 22131 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_I64_A64),
7520 /* 22134 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7521 /* 22137 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7522 /* 22142 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7523 /* 22147 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7524 /* 22149 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7525 /* 22152 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7526 /* 22156 */ GIR_RootConstrainSelectedInstOperands,
7527 /* 22157 */ // GIR_Coverage, 579,
7528 /* 22157 */ GIR_EraseRootFromParent_Done,
7529 /* 22158 */ // Label 622: @22158
7530 /* 22158 */ GIM_Reject,
7531 /* 22159 */ // Label 620: @22159
7532 /* 22159 */ GIM_Try, /*On fail goto*//*Label 623*/ GIMT_Encode4(22259),
7533 /* 22164 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
7534 /* 22168 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 624*/ GIMT_Encode4(22213), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 582 //
7535 /* 22175 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7536 /* 22179 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7537 /* 22186 */ // (st F64:{ *:[f64] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_F64_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, f64:{ *:[f64] }:$val)
7538 /* 22186 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_F64_A32),
7539 /* 22189 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7540 /* 22192 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7541 /* 22197 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7542 /* 22202 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7543 /* 22204 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7544 /* 22207 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7545 /* 22211 */ GIR_RootConstrainSelectedInstOperands,
7546 /* 22212 */ // GIR_Coverage, 582,
7547 /* 22212 */ GIR_EraseRootFromParent_Done,
7548 /* 22213 */ // Label 624: @22213
7549 /* 22213 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 625*/ GIMT_Encode4(22258), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 583 //
7550 /* 22220 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7551 /* 22224 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7552 /* 22231 */ // (st F64:{ *:[f64] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_F64_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, f64:{ *:[f64] }:$val)
7553 /* 22231 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_F64_A64),
7554 /* 22234 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7555 /* 22237 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7556 /* 22242 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7557 /* 22247 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7558 /* 22249 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7559 /* 22252 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7560 /* 22256 */ GIR_RootConstrainSelectedInstOperands,
7561 /* 22257 */ // GIR_Coverage, 583,
7562 /* 22257 */ GIR_EraseRootFromParent_Done,
7563 /* 22258 */ // Label 625: @22258
7564 /* 22258 */ GIM_Reject,
7565 /* 22259 */ // Label 623: @22259
7566 /* 22259 */ GIM_Reject,
7567 /* 22260 */ // Label 619: @22260
7568 /* 22260 */ GIM_Reject,
7569 /* 22261 */ // Label 608: @22261
7570 /* 22261 */ GIM_Reject,
7571 /* 22262 */ // Label 588: @22262
7572 /* 22262 */ GIM_Try, /*On fail goto*//*Label 626*/ GIMT_Encode4(22369),
7573 /* 22267 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7574 /* 22270 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
7575 /* 22274 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7576 /* 22278 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 627*/ GIMT_Encode4(22323), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 943 //
7577 /* 22285 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7578 /* 22289 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7579 /* 22296 */ // (st V128:{ *:[v16i8] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, v16i8:{ *:[v16i8] }:$val)
7580 /* 22296 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A32),
7581 /* 22299 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7582 /* 22302 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7583 /* 22307 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7584 /* 22312 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7585 /* 22314 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7586 /* 22317 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7587 /* 22321 */ GIR_RootConstrainSelectedInstOperands,
7588 /* 22322 */ // GIR_Coverage, 943,
7589 /* 22322 */ GIR_EraseRootFromParent_Done,
7590 /* 22323 */ // Label 627: @22323
7591 /* 22323 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 628*/ GIMT_Encode4(22368), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 944 //
7592 /* 22330 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7593 /* 22334 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7594 /* 22341 */ // (st V128:{ *:[v16i8] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, v16i8:{ *:[v16i8] }:$val)
7595 /* 22341 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A64),
7596 /* 22344 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7597 /* 22347 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7598 /* 22352 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7599 /* 22357 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7600 /* 22359 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7601 /* 22362 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7602 /* 22366 */ GIR_RootConstrainSelectedInstOperands,
7603 /* 22367 */ // GIR_Coverage, 944,
7604 /* 22367 */ GIR_EraseRootFromParent_Done,
7605 /* 22368 */ // Label 628: @22368
7606 /* 22368 */ GIM_Reject,
7607 /* 22369 */ // Label 626: @22369
7608 /* 22369 */ GIM_Reject,
7609 /* 22370 */ // Label 589: @22370
7610 /* 22370 */ GIM_Try, /*On fail goto*//*Label 629*/ GIMT_Encode4(22567),
7611 /* 22375 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7612 /* 22378 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
7613 /* 22382 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7614 /* 22386 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 630*/ GIMT_Encode4(22431), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 945 //
7615 /* 22393 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7616 /* 22397 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7617 /* 22404 */ // (st V128:{ *:[v8i16] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, v8i16:{ *:[v8i16] }:$val)
7618 /* 22404 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A32),
7619 /* 22407 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7620 /* 22410 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7621 /* 22415 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7622 /* 22420 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7623 /* 22422 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7624 /* 22425 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7625 /* 22429 */ GIR_RootConstrainSelectedInstOperands,
7626 /* 22430 */ // GIR_Coverage, 945,
7627 /* 22430 */ GIR_EraseRootFromParent_Done,
7628 /* 22431 */ // Label 630: @22431
7629 /* 22431 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 631*/ GIMT_Encode4(22476), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 946 //
7630 /* 22438 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7631 /* 22442 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7632 /* 22449 */ // (st V128:{ *:[v8i16] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, v8i16:{ *:[v8i16] }:$val)
7633 /* 22449 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A64),
7634 /* 22452 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7635 /* 22455 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7636 /* 22460 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7637 /* 22465 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7638 /* 22467 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7639 /* 22470 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7640 /* 22474 */ GIR_RootConstrainSelectedInstOperands,
7641 /* 22475 */ // GIR_Coverage, 946,
7642 /* 22475 */ GIR_EraseRootFromParent_Done,
7643 /* 22476 */ // Label 631: @22476
7644 /* 22476 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 632*/ GIMT_Encode4(22521), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 955 //
7645 /* 22483 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7646 /* 22487 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7647 /* 22494 */ // (st V128:{ *:[v8f16] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, v8f16:{ *:[v8f16] }:$val)
7648 /* 22494 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A32),
7649 /* 22497 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7650 /* 22500 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7651 /* 22505 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7652 /* 22510 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7653 /* 22512 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7654 /* 22515 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7655 /* 22519 */ GIR_RootConstrainSelectedInstOperands,
7656 /* 22520 */ // GIR_Coverage, 955,
7657 /* 22520 */ GIR_EraseRootFromParent_Done,
7658 /* 22521 */ // Label 632: @22521
7659 /* 22521 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 633*/ GIMT_Encode4(22566), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 956 //
7660 /* 22528 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7661 /* 22532 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7662 /* 22539 */ // (st V128:{ *:[v8f16] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, v8f16:{ *:[v8f16] }:$val)
7663 /* 22539 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A64),
7664 /* 22542 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7665 /* 22545 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7666 /* 22550 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7667 /* 22555 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7668 /* 22557 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7669 /* 22560 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7670 /* 22564 */ GIR_RootConstrainSelectedInstOperands,
7671 /* 22565 */ // GIR_Coverage, 956,
7672 /* 22565 */ GIR_EraseRootFromParent_Done,
7673 /* 22566 */ // Label 633: @22566
7674 /* 22566 */ GIM_Reject,
7675 /* 22567 */ // Label 629: @22567
7676 /* 22567 */ GIM_Reject,
7677 /* 22568 */ // Label 590: @22568
7678 /* 22568 */ GIM_Try, /*On fail goto*//*Label 634*/ GIMT_Encode4(22765),
7679 /* 22573 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7680 /* 22576 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
7681 /* 22580 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7682 /* 22584 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 635*/ GIMT_Encode4(22629), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 947 //
7683 /* 22591 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7684 /* 22595 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7685 /* 22602 */ // (st V128:{ *:[v4i32] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, v4i32:{ *:[v4i32] }:$val)
7686 /* 22602 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A32),
7687 /* 22605 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7688 /* 22608 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7689 /* 22613 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7690 /* 22618 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7691 /* 22620 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7692 /* 22623 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7693 /* 22627 */ GIR_RootConstrainSelectedInstOperands,
7694 /* 22628 */ // GIR_Coverage, 947,
7695 /* 22628 */ GIR_EraseRootFromParent_Done,
7696 /* 22629 */ // Label 635: @22629
7697 /* 22629 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 636*/ GIMT_Encode4(22674), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 948 //
7698 /* 22636 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7699 /* 22640 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7700 /* 22647 */ // (st V128:{ *:[v4i32] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, v4i32:{ *:[v4i32] }:$val)
7701 /* 22647 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A64),
7702 /* 22650 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7703 /* 22653 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7704 /* 22658 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7705 /* 22663 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7706 /* 22665 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7707 /* 22668 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7708 /* 22672 */ GIR_RootConstrainSelectedInstOperands,
7709 /* 22673 */ // GIR_Coverage, 948,
7710 /* 22673 */ GIR_EraseRootFromParent_Done,
7711 /* 22674 */ // Label 636: @22674
7712 /* 22674 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 637*/ GIMT_Encode4(22719), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 951 //
7713 /* 22681 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7714 /* 22685 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7715 /* 22692 */ // (st V128:{ *:[v4f32] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, v4f32:{ *:[v4f32] }:$val)
7716 /* 22692 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A32),
7717 /* 22695 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7718 /* 22698 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7719 /* 22703 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7720 /* 22708 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7721 /* 22710 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7722 /* 22713 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7723 /* 22717 */ GIR_RootConstrainSelectedInstOperands,
7724 /* 22718 */ // GIR_Coverage, 951,
7725 /* 22718 */ GIR_EraseRootFromParent_Done,
7726 /* 22719 */ // Label 637: @22719
7727 /* 22719 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 638*/ GIMT_Encode4(22764), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 952 //
7728 /* 22726 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7729 /* 22730 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7730 /* 22737 */ // (st V128:{ *:[v4f32] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, v4f32:{ *:[v4f32] }:$val)
7731 /* 22737 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A64),
7732 /* 22740 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7733 /* 22743 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7734 /* 22748 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7735 /* 22753 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7736 /* 22755 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7737 /* 22758 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7738 /* 22762 */ GIR_RootConstrainSelectedInstOperands,
7739 /* 22763 */ // GIR_Coverage, 952,
7740 /* 22763 */ GIR_EraseRootFromParent_Done,
7741 /* 22764 */ // Label 638: @22764
7742 /* 22764 */ GIM_Reject,
7743 /* 22765 */ // Label 634: @22765
7744 /* 22765 */ GIM_Reject,
7745 /* 22766 */ // Label 591: @22766
7746 /* 22766 */ GIM_Try, /*On fail goto*//*Label 639*/ GIMT_Encode4(22963),
7747 /* 22771 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7748 /* 22774 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
7749 /* 22778 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7750 /* 22782 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 640*/ GIMT_Encode4(22827), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 949 //
7751 /* 22789 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7752 /* 22793 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7753 /* 22800 */ // (st V128:{ *:[v2i64] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, v2i64:{ *:[v2i64] }:$val)
7754 /* 22800 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A32),
7755 /* 22803 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7756 /* 22806 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7757 /* 22811 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7758 /* 22816 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7759 /* 22818 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7760 /* 22821 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7761 /* 22825 */ GIR_RootConstrainSelectedInstOperands,
7762 /* 22826 */ // GIR_Coverage, 949,
7763 /* 22826 */ GIR_EraseRootFromParent_Done,
7764 /* 22827 */ // Label 640: @22827
7765 /* 22827 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 641*/ GIMT_Encode4(22872), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 950 //
7766 /* 22834 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7767 /* 22838 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7768 /* 22845 */ // (st V128:{ *:[v2i64] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, v2i64:{ *:[v2i64] }:$val)
7769 /* 22845 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A64),
7770 /* 22848 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7771 /* 22851 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7772 /* 22856 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7773 /* 22861 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7774 /* 22863 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7775 /* 22866 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7776 /* 22870 */ GIR_RootConstrainSelectedInstOperands,
7777 /* 22871 */ // GIR_Coverage, 950,
7778 /* 22871 */ GIR_EraseRootFromParent_Done,
7779 /* 22872 */ // Label 641: @22872
7780 /* 22872 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 642*/ GIMT_Encode4(22917), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 953 //
7781 /* 22879 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7782 /* 22883 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7783 /* 22890 */ // (st V128:{ *:[v2f64] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, v2f64:{ *:[v2f64] }:$val)
7784 /* 22890 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A32),
7785 /* 22893 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7786 /* 22896 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7787 /* 22901 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7788 /* 22906 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7789 /* 22908 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7790 /* 22911 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7791 /* 22915 */ GIR_RootConstrainSelectedInstOperands,
7792 /* 22916 */ // GIR_Coverage, 953,
7793 /* 22916 */ GIR_EraseRootFromParent_Done,
7794 /* 22917 */ // Label 642: @22917
7795 /* 22917 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 643*/ GIMT_Encode4(22962), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 954 //
7796 /* 22924 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7797 /* 22928 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7798 /* 22935 */ // (st V128:{ *:[v2f64] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_store>> => (STORE_V128_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, v2f64:{ *:[v2f64] }:$val)
7799 /* 22935 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_V128_A64),
7800 /* 22938 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7801 /* 22941 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7802 /* 22946 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7803 /* 22951 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7804 /* 22953 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7805 /* 22956 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7806 /* 22960 */ GIR_RootConstrainSelectedInstOperands,
7807 /* 22961 */ // GIR_Coverage, 954,
7808 /* 22961 */ GIR_EraseRootFromParent_Done,
7809 /* 22962 */ // Label 643: @22962
7810 /* 22962 */ GIM_Reject,
7811 /* 22963 */ // Label 639: @22963
7812 /* 22963 */ GIM_Reject,
7813 /* 22964 */ // Label 592: @22964
7814 /* 22964 */ GIM_Reject,
7815 /* 22965 */ // Label 21: @22965
7816 /* 22965 */ GIM_Try, /*On fail goto*//*Label 644*/ GIMT_Encode4(23082),
7817 /* 22970 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_f32,
7818 /* 22973 */ GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7819 /* 22976 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
7820 /* 22980 */ GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/GIMT_Encode4(2),
7821 /* 22987 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
7822 /* 22991 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 645*/ GIMT_Encode4(23036), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 594 //
7823 /* 22998 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
7824 /* 23002 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7825 /* 23009 */ // (st F32:{ *:[f32] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstoref16>> => (STORE_F16_F32_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, f32:{ *:[f32] }:$val)
7826 /* 23009 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_F16_F32_A32),
7827 /* 23012 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7828 /* 23015 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7829 /* 23020 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7830 /* 23025 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7831 /* 23027 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7832 /* 23030 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7833 /* 23034 */ GIR_RootConstrainSelectedInstOperands,
7834 /* 23035 */ // GIR_Coverage, 594,
7835 /* 23035 */ GIR_EraseRootFromParent_Done,
7836 /* 23036 */ // Label 645: @23036
7837 /* 23036 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 646*/ GIMT_Encode4(23081), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 595 //
7838 /* 23043 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
7839 /* 23047 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7840 /* 23054 */ // (st F32:{ *:[f32] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedstore>><<P:Predicate_truncstore>><<P:Predicate_truncstoref16>> => (STORE_F16_F32_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, f32:{ *:[f32] }:$val)
7841 /* 23054 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_F16_F32_A64),
7842 /* 23057 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7843 /* 23060 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7844 /* 23065 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7845 /* 23070 */ GIR_RootToRootCopy, /*OpIdx*/0, // val
7846 /* 23072 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7847 /* 23075 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
7848 /* 23079 */ GIR_RootConstrainSelectedInstOperands,
7849 /* 23080 */ // GIR_Coverage, 595,
7850 /* 23080 */ GIR_EraseRootFromParent_Done,
7851 /* 23081 */ // Label 646: @23081
7852 /* 23081 */ GIM_Reject,
7853 /* 23082 */ // Label 644: @23082
7854 /* 23082 */ GIM_Reject,
7855 /* 23083 */ // Label 22: @23083
7856 /* 23083 */ GIM_Try, /*On fail goto*//*Label 647*/ GIMT_Encode4(23110), // Rule ID 17 //
7857 /* 23088 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
7858 /* 23091 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7859 /* 23095 */ // MIs[0] dst
7860 /* 23095 */ GIM_CheckIsMBB, /*MI*/0, /*Op*/1,
7861 /* 23098 */ // (brcond I32:{ *:[i32] }:$cond, (bb:{ *:[Other] }):$dst) => (BR_IF (bb:{ *:[Other] }):$dst, I32:{ *:[i32] }:$cond)
7862 /* 23098 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BR_IF),
7863 /* 23101 */ GIR_RootToRootCopy, /*OpIdx*/1, // dst
7864 /* 23103 */ GIR_RootToRootCopy, /*OpIdx*/0, // cond
7865 /* 23105 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7866 /* 23108 */ GIR_RootConstrainSelectedInstOperands,
7867 /* 23109 */ // GIR_Coverage, 17,
7868 /* 23109 */ GIR_EraseRootFromParent_Done,
7869 /* 23110 */ // Label 647: @23110
7870 /* 23110 */ GIM_Reject,
7871 /* 23111 */ // Label 23: @23111
7872 /* 23111 */ GIM_Try, /*On fail goto*//*Label 648*/ GIMT_Encode4(24515),
7873 /* 23116 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
7874 /* 23119 */ GIM_Try, /*On fail goto*//*Label 649*/ GIMT_Encode4(23447),
7875 /* 23124 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_splat_f16x8),
7876 /* 23129 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
7877 /* 23132 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
7878 /* 23135 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7879 /* 23139 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 650*/ GIMT_Encode4(23207), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 886 //
7880 /* 23146 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7881 /* 23150 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS),
7882 /* 23154 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7883 /* 23157 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_loadf16_f32),
7884 /* 23162 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_f32,
7885 /* 23166 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/2, /*SizeInBits*/32,
7886 /* 23170 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7887 /* 23172 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7888 /* 23179 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14954:{ *:[iPTR] }, (intrinsic_w_chain:{ *:[f32] } 14915:{ *:[iPTR] }, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))) => (LOAD16_SPLAT_A32:{ *:[v8f16] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
7889 /* 23179 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_SPLAT_A32),
7890 /* 23182 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7891 /* 23184 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7892 /* 23187 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7893 /* 23192 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7894 /* 23197 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7895 /* 23200 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7896 /* 23205 */ GIR_RootConstrainSelectedInstOperands,
7897 /* 23206 */ // GIR_Coverage, 886,
7898 /* 23206 */ GIR_EraseRootFromParent_Done,
7899 /* 23207 */ // Label 650: @23207
7900 /* 23207 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 651*/ GIMT_Encode4(23275), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 888 //
7901 /* 23214 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7902 /* 23218 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS),
7903 /* 23222 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
7904 /* 23225 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_loadf16_f32),
7905 /* 23230 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_f32,
7906 /* 23234 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/2, /*SizeInBits*/64,
7907 /* 23238 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7908 /* 23240 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7909 /* 23247 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14954:{ *:[iPTR] }, (intrinsic_w_chain:{ *:[f32] } 14915:{ *:[iPTR] }, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))) => (LOAD16_SPLAT_A64:{ *:[v8f16] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
7910 /* 23247 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_SPLAT_A64),
7911 /* 23250 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7912 /* 23252 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7913 /* 23255 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7914 /* 23260 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7915 /* 23265 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7916 /* 23268 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7917 /* 23273 */ GIR_RootConstrainSelectedInstOperands,
7918 /* 23274 */ // GIR_Coverage, 888,
7919 /* 23274 */ GIR_EraseRootFromParent_Done,
7920 /* 23275 */ // Label 651: @23275
7921 /* 23275 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 652*/ GIMT_Encode4(23349), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 885 //
7922 /* 23282 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7923 /* 23286 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FPEXTLOAD),
7924 /* 23290 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_f32,
7925 /* 23294 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7926 /* 23297 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
7927 /* 23301 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(2),
7928 /* 23308 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
7929 /* 23312 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7930 /* 23314 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
7931 /* 23321 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14954:{ *:[iPTR] }, (ld:{ *:[f32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadf16>>) => (LOAD16_SPLAT_A32:{ *:[v8f16] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
7932 /* 23321 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_SPLAT_A32),
7933 /* 23324 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7934 /* 23326 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7935 /* 23329 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7936 /* 23334 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7937 /* 23339 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7938 /* 23342 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7939 /* 23347 */ GIR_RootConstrainSelectedInstOperands,
7940 /* 23348 */ // GIR_Coverage, 885,
7941 /* 23348 */ GIR_EraseRootFromParent_Done,
7942 /* 23349 */ // Label 652: @23349
7943 /* 23349 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 653*/ GIMT_Encode4(23423), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 887 //
7944 /* 23356 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
7945 /* 23360 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FPEXTLOAD),
7946 /* 23364 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_f32,
7947 /* 23368 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
7948 /* 23371 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
7949 /* 23375 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(2),
7950 /* 23382 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
7951 /* 23386 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
7952 /* 23388 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
7953 /* 23395 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14954:{ *:[iPTR] }, (ld:{ *:[f32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadf16>>) => (LOAD16_SPLAT_A64:{ *:[v8f16] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
7954 /* 23395 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_SPLAT_A64),
7955 /* 23398 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7956 /* 23400 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
7957 /* 23403 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
7958 /* 23408 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
7959 /* 23413 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7960 /* 23416 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
7961 /* 23421 */ GIR_RootConstrainSelectedInstOperands,
7962 /* 23422 */ // GIR_Coverage, 887,
7963 /* 23422 */ GIR_EraseRootFromParent_Done,
7964 /* 23423 */ // Label 653: @23423
7965 /* 23423 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 654*/ GIMT_Encode4(23446), GIMT_Encode2(GIFBS_HasFP16), // Rule ID 186 //
7966 /* 23430 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
7967 /* 23434 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14954:{ *:[iPTR] }, F32:{ *:[f32] }:$x) => (SPLAT_F16x8:{ *:[v8f16] } F32:{ *:[f32] }:$x)
7968 /* 23434 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_F16x8),
7969 /* 23437 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7970 /* 23439 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
7971 /* 23441 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7972 /* 23444 */ GIR_RootConstrainSelectedInstOperands,
7973 /* 23445 */ // GIR_Coverage, 186,
7974 /* 23445 */ GIR_EraseRootFromParent_Done,
7975 /* 23446 */ // Label 654: @23446
7976 /* 23446 */ GIM_Reject,
7977 /* 23447 */ // Label 649: @23447
7978 /* 23447 */ GIM_Try, /*On fail goto*//*Label 655*/ GIMT_Encode4(23600),
7979 /* 23452 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
7980 /* 23457 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
7981 /* 23460 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(12), GIMT_Encode2(16), /*)*//*default:*//*Label 660*/ GIMT_Encode4(23599),
7982 /* 23471 */ /*GILLT_v16i8*//*Label 656*/ GIMT_Encode4(23487),
7983 /* 23475 */ /*GILLT_v8i16*//*Label 657*/ GIMT_Encode4(23515),
7984 /* 23479 */ /*GILLT_v4i32*//*Label 658*/ GIMT_Encode4(23543),
7985 /* 23483 */ /*GILLT_v2i64*//*Label 659*/ GIMT_Encode4(23571),
7986 /* 23487 */ // Label 656: @23487
7987 /* 23487 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 661*/ GIMT_Encode4(23514), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 258 //
7988 /* 23494 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
7989 /* 23498 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
7990 /* 23502 */ // (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v16i8] }:$vec) => (ALLTRUE_I8x16:{ *:[i32] } V128:{ *:[v16i8] }:$vec)
7991 /* 23502 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
7992 /* 23505 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
7993 /* 23507 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
7994 /* 23509 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
7995 /* 23512 */ GIR_RootConstrainSelectedInstOperands,
7996 /* 23513 */ // GIR_Coverage, 258,
7997 /* 23513 */ GIR_EraseRootFromParent_Done,
7998 /* 23514 */ // Label 661: @23514
7999 /* 23514 */ GIM_Reject,
8000 /* 23515 */ // Label 657: @23515
8001 /* 23515 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 662*/ GIMT_Encode4(23542), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 259 //
8002 /* 23522 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8003 /* 23526 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8004 /* 23530 */ // (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v8i16] }:$vec) => (ALLTRUE_I16x8:{ *:[i32] } V128:{ *:[v8i16] }:$vec)
8005 /* 23530 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
8006 /* 23533 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8007 /* 23535 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8008 /* 23537 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8009 /* 23540 */ GIR_RootConstrainSelectedInstOperands,
8010 /* 23541 */ // GIR_Coverage, 259,
8011 /* 23541 */ GIR_EraseRootFromParent_Done,
8012 /* 23542 */ // Label 662: @23542
8013 /* 23542 */ GIM_Reject,
8014 /* 23543 */ // Label 658: @23543
8015 /* 23543 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 663*/ GIMT_Encode4(23570), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 260 //
8016 /* 23550 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8017 /* 23554 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8018 /* 23558 */ // (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v4i32] }:$vec) => (ALLTRUE_I32x4:{ *:[i32] } V128:{ *:[v4i32] }:$vec)
8019 /* 23558 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
8020 /* 23561 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8021 /* 23563 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8022 /* 23565 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8023 /* 23568 */ GIR_RootConstrainSelectedInstOperands,
8024 /* 23569 */ // GIR_Coverage, 260,
8025 /* 23569 */ GIR_EraseRootFromParent_Done,
8026 /* 23570 */ // Label 663: @23570
8027 /* 23570 */ GIM_Reject,
8028 /* 23571 */ // Label 659: @23571
8029 /* 23571 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 664*/ GIMT_Encode4(23598), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 261 //
8030 /* 23578 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8031 /* 23582 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8032 /* 23586 */ // (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v2i64] }:$vec) => (ALLTRUE_I64x2:{ *:[i32] } V128:{ *:[v2i64] }:$vec)
8033 /* 23586 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
8034 /* 23589 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8035 /* 23591 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8036 /* 23593 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8037 /* 23596 */ GIR_RootConstrainSelectedInstOperands,
8038 /* 23597 */ // GIR_Coverage, 261,
8039 /* 23597 */ GIR_EraseRootFromParent_Done,
8040 /* 23598 */ // Label 664: @23598
8041 /* 23598 */ GIM_Reject,
8042 /* 23599 */ // Label 660: @23599
8043 /* 23599 */ GIM_Reject,
8044 /* 23600 */ // Label 655: @23600
8045 /* 23600 */ GIM_Try, /*On fail goto*//*Label 665*/ GIMT_Encode4(23753),
8046 /* 23605 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitmask),
8047 /* 23610 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
8048 /* 23613 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(12), GIMT_Encode2(16), /*)*//*default:*//*Label 670*/ GIMT_Encode4(23752),
8049 /* 23624 */ /*GILLT_v16i8*//*Label 666*/ GIMT_Encode4(23640),
8050 /* 23628 */ /*GILLT_v8i16*//*Label 667*/ GIMT_Encode4(23668),
8051 /* 23632 */ /*GILLT_v4i32*//*Label 668*/ GIMT_Encode4(23696),
8052 /* 23636 */ /*GILLT_v2i64*//*Label 669*/ GIMT_Encode4(23724),
8053 /* 23640 */ // Label 666: @23640
8054 /* 23640 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 671*/ GIMT_Encode4(23667), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 262 //
8055 /* 23647 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8056 /* 23651 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8057 /* 23655 */ // (intrinsic_wo_chain:{ *:[i32] } 14904:{ *:[iPTR] }, V128:{ *:[v16i8] }:$vec) => (BITMASK_I8x16:{ *:[i32] } V128:{ *:[v16i8] }:$vec)
8058 /* 23655 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I8x16),
8059 /* 23658 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8060 /* 23660 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8061 /* 23662 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8062 /* 23665 */ GIR_RootConstrainSelectedInstOperands,
8063 /* 23666 */ // GIR_Coverage, 262,
8064 /* 23666 */ GIR_EraseRootFromParent_Done,
8065 /* 23667 */ // Label 671: @23667
8066 /* 23667 */ GIM_Reject,
8067 /* 23668 */ // Label 667: @23668
8068 /* 23668 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 672*/ GIMT_Encode4(23695), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 263 //
8069 /* 23675 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8070 /* 23679 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8071 /* 23683 */ // (intrinsic_wo_chain:{ *:[i32] } 14904:{ *:[iPTR] }, V128:{ *:[v8i16] }:$vec) => (BITMASK_I16x8:{ *:[i32] } V128:{ *:[v8i16] }:$vec)
8072 /* 23683 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I16x8),
8073 /* 23686 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8074 /* 23688 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8075 /* 23690 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8076 /* 23693 */ GIR_RootConstrainSelectedInstOperands,
8077 /* 23694 */ // GIR_Coverage, 263,
8078 /* 23694 */ GIR_EraseRootFromParent_Done,
8079 /* 23695 */ // Label 672: @23695
8080 /* 23695 */ GIM_Reject,
8081 /* 23696 */ // Label 668: @23696
8082 /* 23696 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 673*/ GIMT_Encode4(23723), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 264 //
8083 /* 23703 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8084 /* 23707 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8085 /* 23711 */ // (intrinsic_wo_chain:{ *:[i32] } 14904:{ *:[iPTR] }, V128:{ *:[v4i32] }:$vec) => (BITMASK_I32x4:{ *:[i32] } V128:{ *:[v4i32] }:$vec)
8086 /* 23711 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I32x4),
8087 /* 23714 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8088 /* 23716 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8089 /* 23718 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8090 /* 23721 */ GIR_RootConstrainSelectedInstOperands,
8091 /* 23722 */ // GIR_Coverage, 264,
8092 /* 23722 */ GIR_EraseRootFromParent_Done,
8093 /* 23723 */ // Label 673: @23723
8094 /* 23723 */ GIM_Reject,
8095 /* 23724 */ // Label 669: @23724
8096 /* 23724 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 674*/ GIMT_Encode4(23751), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 265 //
8097 /* 23731 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8098 /* 23735 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8099 /* 23739 */ // (intrinsic_wo_chain:{ *:[i32] } 14904:{ *:[iPTR] }, V128:{ *:[v2i64] }:$vec) => (BITMASK_I64x2:{ *:[i32] } V128:{ *:[v2i64] }:$vec)
8100 /* 23739 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITMASK_I64x2),
8101 /* 23742 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8102 /* 23744 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8103 /* 23746 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8104 /* 23749 */ GIR_RootConstrainSelectedInstOperands,
8105 /* 23750 */ // GIR_Coverage, 265,
8106 /* 23750 */ GIR_EraseRootFromParent_Done,
8107 /* 23751 */ // Label 674: @23751
8108 /* 23751 */ GIM_Reject,
8109 /* 23752 */ // Label 670: @23752
8110 /* 23752 */ GIM_Reject,
8111 /* 23753 */ // Label 665: @23753
8112 /* 23753 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 675*/ GIMT_Encode4(23791), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 407 //
8113 /* 23760 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_signed),
8114 /* 23765 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
8115 /* 23768 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
8116 /* 23771 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8117 /* 23775 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8118 /* 23779 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14947:{ *:[iPTR] }, V128:{ *:[v4f32] }:$vec) => (int_wasm_relaxed_trunc_signed_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
8119 /* 23779 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_signed_I32x4),
8120 /* 23782 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8121 /* 23784 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8122 /* 23786 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8123 /* 23789 */ GIR_RootConstrainSelectedInstOperands,
8124 /* 23790 */ // GIR_Coverage, 407,
8125 /* 23790 */ GIR_EraseRootFromParent_Done,
8126 /* 23791 */ // Label 675: @23791
8127 /* 23791 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 676*/ GIMT_Encode4(23829), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 408 //
8128 /* 23798 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_unsigned),
8129 /* 23803 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
8130 /* 23806 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
8131 /* 23809 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8132 /* 23813 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8133 /* 23817 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14949:{ *:[iPTR] }, V128:{ *:[v4f32] }:$vec) => (int_wasm_relaxed_trunc_unsigned_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
8134 /* 23817 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_unsigned_I32x4),
8135 /* 23820 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8136 /* 23822 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8137 /* 23824 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8138 /* 23827 */ GIR_RootConstrainSelectedInstOperands,
8139 /* 23828 */ // GIR_Coverage, 408,
8140 /* 23828 */ GIR_EraseRootFromParent_Done,
8141 /* 23829 */ // Label 676: @23829
8142 /* 23829 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 677*/ GIMT_Encode4(23867), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 409 //
8143 /* 23836 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_signed_zero),
8144 /* 23841 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
8145 /* 23844 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
8146 /* 23847 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8147 /* 23851 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8148 /* 23855 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14948:{ *:[iPTR] }, V128:{ *:[v2f64] }:$vec) => (int_wasm_relaxed_trunc_signed_zero_I32x4:{ *:[v4i32] } V128:{ *:[v2f64] }:$vec)
8149 /* 23855 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_signed_zero_I32x4),
8150 /* 23858 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8151 /* 23860 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8152 /* 23862 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8153 /* 23865 */ GIR_RootConstrainSelectedInstOperands,
8154 /* 23866 */ // GIR_Coverage, 409,
8155 /* 23866 */ GIR_EraseRootFromParent_Done,
8156 /* 23867 */ // Label 677: @23867
8157 /* 23867 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 678*/ GIMT_Encode4(23905), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 410 //
8158 /* 23874 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_trunc_unsigned_zero),
8159 /* 23879 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
8160 /* 23882 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
8161 /* 23885 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8162 /* 23889 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8163 /* 23893 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14950:{ *:[iPTR] }, V128:{ *:[v2f64] }:$vec) => (int_wasm_relaxed_trunc_unsigned_zero_I32x4:{ *:[v4i32] } V128:{ *:[v2f64] }:$vec)
8164 /* 23893 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_unsigned_zero_I32x4),
8165 /* 23896 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8166 /* 23898 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8167 /* 23900 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8168 /* 23903 */ GIR_RootConstrainSelectedInstOperands,
8169 /* 23904 */ // GIR_Coverage, 410,
8170 /* 23904 */ GIR_EraseRootFromParent_Done,
8171 /* 23905 */ // Label 678: @23905
8172 /* 23905 */ GIM_Try, /*On fail goto*//*Label 679*/ GIMT_Encode4(23941), // Rule ID 610 //
8173 /* 23910 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
8174 /* 23915 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
8175 /* 23918 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
8176 /* 23921 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8177 /* 23925 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
8178 /* 23929 */ // (intrinsic_wo_chain:{ *:[i32] } 14977:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I32_TRUNC_S_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
8179 /* 23929 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_F32),
8180 /* 23932 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8181 /* 23934 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8182 /* 23936 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8183 /* 23939 */ GIR_RootConstrainSelectedInstOperands,
8184 /* 23940 */ // GIR_Coverage, 610,
8185 /* 23940 */ GIR_EraseRootFromParent_Done,
8186 /* 23941 */ // Label 679: @23941
8187 /* 23941 */ GIM_Try, /*On fail goto*//*Label 680*/ GIMT_Encode4(23977), // Rule ID 611 //
8188 /* 23946 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
8189 /* 23951 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
8190 /* 23954 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
8191 /* 23957 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8192 /* 23961 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
8193 /* 23965 */ // (intrinsic_wo_chain:{ *:[i32] } 14978:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I32_TRUNC_U_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
8194 /* 23965 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_F32),
8195 /* 23968 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8196 /* 23970 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8197 /* 23972 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8198 /* 23975 */ GIR_RootConstrainSelectedInstOperands,
8199 /* 23976 */ // GIR_Coverage, 611,
8200 /* 23976 */ GIR_EraseRootFromParent_Done,
8201 /* 23977 */ // Label 680: @23977
8202 /* 23977 */ GIM_Try, /*On fail goto*//*Label 681*/ GIMT_Encode4(24013), // Rule ID 612 //
8203 /* 23982 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
8204 /* 23987 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
8205 /* 23990 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
8206 /* 23993 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8207 /* 23997 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
8208 /* 24001 */ // (intrinsic_wo_chain:{ *:[i32] } 14977:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I32_TRUNC_S_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
8209 /* 24001 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_F64),
8210 /* 24004 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8211 /* 24006 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8212 /* 24008 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8213 /* 24011 */ GIR_RootConstrainSelectedInstOperands,
8214 /* 24012 */ // GIR_Coverage, 612,
8215 /* 24012 */ GIR_EraseRootFromParent_Done,
8216 /* 24013 */ // Label 681: @24013
8217 /* 24013 */ GIM_Try, /*On fail goto*//*Label 682*/ GIMT_Encode4(24049), // Rule ID 613 //
8218 /* 24018 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
8219 /* 24023 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
8220 /* 24026 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
8221 /* 24029 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8222 /* 24033 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
8223 /* 24037 */ // (intrinsic_wo_chain:{ *:[i32] } 14978:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I32_TRUNC_U_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
8224 /* 24037 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_F64),
8225 /* 24040 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8226 /* 24042 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8227 /* 24044 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8228 /* 24047 */ GIR_RootConstrainSelectedInstOperands,
8229 /* 24048 */ // GIR_Coverage, 613,
8230 /* 24048 */ GIR_EraseRootFromParent_Done,
8231 /* 24049 */ // Label 682: @24049
8232 /* 24049 */ GIM_Try, /*On fail goto*//*Label 683*/ GIMT_Encode4(24085), // Rule ID 614 //
8233 /* 24054 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
8234 /* 24059 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
8235 /* 24062 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
8236 /* 24065 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8237 /* 24069 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
8238 /* 24073 */ // (intrinsic_wo_chain:{ *:[i64] } 14977:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I64_TRUNC_S_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
8239 /* 24073 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_F32),
8240 /* 24076 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8241 /* 24078 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8242 /* 24080 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8243 /* 24083 */ GIR_RootConstrainSelectedInstOperands,
8244 /* 24084 */ // GIR_Coverage, 614,
8245 /* 24084 */ GIR_EraseRootFromParent_Done,
8246 /* 24085 */ // Label 683: @24085
8247 /* 24085 */ GIM_Try, /*On fail goto*//*Label 684*/ GIMT_Encode4(24121), // Rule ID 615 //
8248 /* 24090 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
8249 /* 24095 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
8250 /* 24098 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
8251 /* 24101 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8252 /* 24105 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
8253 /* 24109 */ // (intrinsic_wo_chain:{ *:[i64] } 14978:{ *:[iPTR] }, F32:{ *:[f32] }:$src) => (I64_TRUNC_U_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
8254 /* 24109 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_F32),
8255 /* 24112 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8256 /* 24114 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8257 /* 24116 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8258 /* 24119 */ GIR_RootConstrainSelectedInstOperands,
8259 /* 24120 */ // GIR_Coverage, 615,
8260 /* 24120 */ GIR_EraseRootFromParent_Done,
8261 /* 24121 */ // Label 684: @24121
8262 /* 24121 */ GIM_Try, /*On fail goto*//*Label 685*/ GIMT_Encode4(24157), // Rule ID 616 //
8263 /* 24126 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_signed),
8264 /* 24131 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
8265 /* 24134 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
8266 /* 24137 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8267 /* 24141 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
8268 /* 24145 */ // (intrinsic_wo_chain:{ *:[i64] } 14977:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I64_TRUNC_S_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
8269 /* 24145 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_F64),
8270 /* 24148 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8271 /* 24150 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8272 /* 24152 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8273 /* 24155 */ GIR_RootConstrainSelectedInstOperands,
8274 /* 24156 */ // GIR_Coverage, 616,
8275 /* 24156 */ GIR_EraseRootFromParent_Done,
8276 /* 24157 */ // Label 685: @24157
8277 /* 24157 */ GIM_Try, /*On fail goto*//*Label 686*/ GIMT_Encode4(24193), // Rule ID 617 //
8278 /* 24162 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_trunc_unsigned),
8279 /* 24167 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
8280 /* 24170 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
8281 /* 24173 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
8282 /* 24177 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
8283 /* 24181 */ // (intrinsic_wo_chain:{ *:[i64] } 14978:{ *:[iPTR] }, F64:{ *:[f64] }:$src) => (I64_TRUNC_U_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
8284 /* 24181 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_F64),
8285 /* 24184 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8286 /* 24186 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8287 /* 24188 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8288 /* 24191 */ GIR_RootConstrainSelectedInstOperands,
8289 /* 24192 */ // GIR_Coverage, 617,
8290 /* 24192 */ GIR_EraseRootFromParent_Done,
8291 /* 24193 */ // Label 686: @24193
8292 /* 24193 */ GIM_Try, /*On fail goto*//*Label 687*/ GIMT_Encode4(24338),
8293 /* 24198 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
8294 /* 24203 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
8295 /* 24206 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(12), GIMT_Encode2(16), /*)*//*default:*//*Label 692*/ GIMT_Encode4(24337),
8296 /* 24217 */ /*GILLT_v16i8*//*Label 688*/ GIMT_Encode4(24233),
8297 /* 24221 */ /*GILLT_v8i16*//*Label 689*/ GIMT_Encode4(24259),
8298 /* 24225 */ /*GILLT_v4i32*//*Label 690*/ GIMT_Encode4(24285),
8299 /* 24229 */ /*GILLT_v2i64*//*Label 691*/ GIMT_Encode4(24311),
8300 /* 24233 */ // Label 688: @24233
8301 /* 24233 */ GIM_Try, /*On fail goto*//*Label 693*/ GIMT_Encode4(24258), // Rule ID 1103 //
8302 /* 24238 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8303 /* 24242 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8304 /* 24246 */ // (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v16i8] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v16i8] }:$vec)
8305 /* 24246 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8306 /* 24249 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8307 /* 24251 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8308 /* 24253 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8309 /* 24256 */ GIR_RootConstrainSelectedInstOperands,
8310 /* 24257 */ // GIR_Coverage, 1103,
8311 /* 24257 */ GIR_EraseRootFromParent_Done,
8312 /* 24258 */ // Label 693: @24258
8313 /* 24258 */ GIM_Reject,
8314 /* 24259 */ // Label 689: @24259
8315 /* 24259 */ GIM_Try, /*On fail goto*//*Label 694*/ GIMT_Encode4(24284), // Rule ID 1104 //
8316 /* 24264 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8317 /* 24268 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8318 /* 24272 */ // (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v8i16] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v8i16] }:$vec)
8319 /* 24272 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8320 /* 24275 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8321 /* 24277 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8322 /* 24279 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8323 /* 24282 */ GIR_RootConstrainSelectedInstOperands,
8324 /* 24283 */ // GIR_Coverage, 1104,
8325 /* 24283 */ GIR_EraseRootFromParent_Done,
8326 /* 24284 */ // Label 694: @24284
8327 /* 24284 */ GIM_Reject,
8328 /* 24285 */ // Label 690: @24285
8329 /* 24285 */ GIM_Try, /*On fail goto*//*Label 695*/ GIMT_Encode4(24310), // Rule ID 1105 //
8330 /* 24290 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8331 /* 24294 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8332 /* 24298 */ // (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v4i32] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v4i32] }:$vec)
8333 /* 24298 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8334 /* 24301 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8335 /* 24303 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8336 /* 24305 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8337 /* 24308 */ GIR_RootConstrainSelectedInstOperands,
8338 /* 24309 */ // GIR_Coverage, 1105,
8339 /* 24309 */ GIR_EraseRootFromParent_Done,
8340 /* 24310 */ // Label 695: @24310
8341 /* 24310 */ GIM_Reject,
8342 /* 24311 */ // Label 691: @24311
8343 /* 24311 */ GIM_Try, /*On fail goto*//*Label 696*/ GIMT_Encode4(24336), // Rule ID 1106 //
8344 /* 24316 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
8345 /* 24320 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8346 /* 24324 */ // (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v2i64] }:$vec) => (ANYTRUE:{ *:[i32] } V128:{ *:[v2i64] }:$vec)
8347 /* 24324 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
8348 /* 24327 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8349 /* 24329 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8350 /* 24331 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8351 /* 24334 */ GIR_RootConstrainSelectedInstOperands,
8352 /* 24335 */ // GIR_Coverage, 1106,
8353 /* 24335 */ GIR_EraseRootFromParent_Done,
8354 /* 24336 */ // Label 696: @24336
8355 /* 24336 */ GIM_Reject,
8356 /* 24337 */ // Label 692: @24337
8357 /* 24337 */ GIM_Reject,
8358 /* 24338 */ // Label 687: @24338
8359 /* 24338 */ GIM_Try, /*On fail goto*//*Label 697*/ GIMT_Encode4(24426),
8360 /* 24343 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_unsigned),
8361 /* 24348 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(13), GIMT_Encode2(15), /*)*//*default:*//*Label 700*/ GIMT_Encode4(24425),
8362 /* 24359 */ /*GILLT_v8i16*//*Label 698*/ GIMT_Encode4(24367),
8363 /* 24363 */ /*GILLT_v4i32*//*Label 699*/ GIMT_Encode4(24396),
8364 /* 24367 */ // Label 698: @24367
8365 /* 24367 */ GIM_Try, /*On fail goto*//*Label 701*/ GIMT_Encode4(24395), // Rule ID 1243 //
8366 /* 24372 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
8367 /* 24375 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8368 /* 24379 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8369 /* 24383 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14909:{ *:[iPTR] }, V128:{ *:[v16i8] }:$in) => (extadd_pairwise_u_I16x8:{ *:[v8i16] } V128:{ *:[v16i8] }:$in)
8370 /* 24383 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_u_I16x8),
8371 /* 24386 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8372 /* 24388 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
8373 /* 24390 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8374 /* 24393 */ GIR_RootConstrainSelectedInstOperands,
8375 /* 24394 */ // GIR_Coverage, 1243,
8376 /* 24394 */ GIR_EraseRootFromParent_Done,
8377 /* 24395 */ // Label 701: @24395
8378 /* 24395 */ GIM_Reject,
8379 /* 24396 */ // Label 699: @24396
8380 /* 24396 */ GIM_Try, /*On fail goto*//*Label 702*/ GIMT_Encode4(24424), // Rule ID 1242 //
8381 /* 24401 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8382 /* 24404 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8383 /* 24408 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8384 /* 24412 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14909:{ *:[iPTR] }, V128:{ *:[v8i16] }:$in) => (extadd_pairwise_u_I32x4:{ *:[v4i32] } V128:{ *:[v8i16] }:$in)
8385 /* 24412 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_u_I32x4),
8386 /* 24415 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8387 /* 24417 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
8388 /* 24419 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8389 /* 24422 */ GIR_RootConstrainSelectedInstOperands,
8390 /* 24423 */ // GIR_Coverage, 1242,
8391 /* 24423 */ GIR_EraseRootFromParent_Done,
8392 /* 24424 */ // Label 702: @24424
8393 /* 24424 */ GIM_Reject,
8394 /* 24425 */ // Label 700: @24425
8395 /* 24425 */ GIM_Reject,
8396 /* 24426 */ // Label 697: @24426
8397 /* 24426 */ GIM_Try, /*On fail goto*//*Label 703*/ GIMT_Encode4(24514),
8398 /* 24431 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extadd_pairwise_signed),
8399 /* 24436 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(13), GIMT_Encode2(15), /*)*//*default:*//*Label 706*/ GIMT_Encode4(24513),
8400 /* 24447 */ /*GILLT_v8i16*//*Label 704*/ GIMT_Encode4(24455),
8401 /* 24451 */ /*GILLT_v4i32*//*Label 705*/ GIMT_Encode4(24484),
8402 /* 24455 */ // Label 704: @24455
8403 /* 24455 */ GIM_Try, /*On fail goto*//*Label 707*/ GIMT_Encode4(24483), // Rule ID 1245 //
8404 /* 24460 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
8405 /* 24463 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8406 /* 24467 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8407 /* 24471 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14908:{ *:[iPTR] }, V128:{ *:[v16i8] }:$in) => (extadd_pairwise_s_I16x8:{ *:[v8i16] } V128:{ *:[v16i8] }:$in)
8408 /* 24471 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_s_I16x8),
8409 /* 24474 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8410 /* 24476 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
8411 /* 24478 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8412 /* 24481 */ GIR_RootConstrainSelectedInstOperands,
8413 /* 24482 */ // GIR_Coverage, 1245,
8414 /* 24482 */ GIR_EraseRootFromParent_Done,
8415 /* 24483 */ // Label 707: @24483
8416 /* 24483 */ GIM_Reject,
8417 /* 24484 */ // Label 705: @24484
8418 /* 24484 */ GIM_Try, /*On fail goto*//*Label 708*/ GIMT_Encode4(24512), // Rule ID 1244 //
8419 /* 24489 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8420 /* 24492 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8421 /* 24496 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8422 /* 24500 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14908:{ *:[iPTR] }, V128:{ *:[v8i16] }:$in) => (extadd_pairwise_s_I32x4:{ *:[v4i32] } V128:{ *:[v8i16] }:$in)
8423 /* 24500 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::extadd_pairwise_s_I32x4),
8424 /* 24503 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8425 /* 24505 */ GIR_RootToRootCopy, /*OpIdx*/2, // in
8426 /* 24507 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8427 /* 24510 */ GIR_RootConstrainSelectedInstOperands,
8428 /* 24511 */ // GIR_Coverage, 1244,
8429 /* 24511 */ GIR_EraseRootFromParent_Done,
8430 /* 24512 */ // Label 708: @24512
8431 /* 24512 */ GIM_Reject,
8432 /* 24513 */ // Label 706: @24513
8433 /* 24513 */ GIM_Reject,
8434 /* 24514 */ // Label 703: @24514
8435 /* 24514 */ GIM_Reject,
8436 /* 24515 */ // Label 648: @24515
8437 /* 24515 */ GIM_Try, /*On fail goto*//*Label 709*/ GIMT_Encode4(25618),
8438 /* 24520 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
8439 /* 24523 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 710*/ GIMT_Encode4(24581), GIMT_Encode2(GIFBS_HasFP16), // Rule ID 187 //
8440 /* 24530 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_extract_lane_f16x8),
8441 /* 24535 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_f32,
8442 /* 24538 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
8443 /* 24541 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
8444 /* 24544 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
8445 /* 24548 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8446 /* 24552 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
8447 /* 24556 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
8448 /* 24560 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
8449 /* 24564 */ // MIs[1] Operand 1
8450 /* 24564 */ // No operand predicates
8451 /* 24564 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8452 /* 24566 */ // (intrinsic_wo_chain:{ *:[f32] } 14910:{ *:[iPTR] }, V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx) => (EXTRACT_LANE_F16x8:{ *:[f32] } V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] }):$idx)
8453 /* 24566 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EXTRACT_LANE_F16x8),
8454 /* 24569 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8455 /* 24571 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8456 /* 24573 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
8457 /* 24576 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8458 /* 24579 */ GIR_RootConstrainSelectedInstOperands,
8459 /* 24580 */ // GIR_Coverage, 187,
8460 /* 24580 */ GIR_EraseRootFromParent_Done,
8461 /* 24581 */ // Label 710: @24581
8462 /* 24581 */ GIM_Try, /*On fail goto*//*Label 711*/ GIMT_Encode4(24691),
8463 /* 24586 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_avgr_unsigned),
8464 /* 24591 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(14), /*)*//*default:*//*Label 714*/ GIMT_Encode4(24690),
8465 /* 24602 */ /*GILLT_v16i8*//*Label 712*/ GIMT_Encode4(24610),
8466 /* 24606 */ /*GILLT_v8i16*//*Label 713*/ GIMT_Encode4(24650),
8467 /* 24610 */ // Label 712: @24610
8468 /* 24610 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 715*/ GIMT_Encode4(24649), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 309 //
8469 /* 24617 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
8470 /* 24620 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
8471 /* 24623 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8472 /* 24627 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8473 /* 24631 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8474 /* 24635 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14903:{ *:[iPTR] }, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (AVGR_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
8475 /* 24635 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I8x16),
8476 /* 24638 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8477 /* 24640 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8478 /* 24642 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8479 /* 24644 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8480 /* 24647 */ GIR_RootConstrainSelectedInstOperands,
8481 /* 24648 */ // GIR_Coverage, 309,
8482 /* 24648 */ GIR_EraseRootFromParent_Done,
8483 /* 24649 */ // Label 715: @24649
8484 /* 24649 */ GIM_Reject,
8485 /* 24650 */ // Label 713: @24650
8486 /* 24650 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 716*/ GIMT_Encode4(24689), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 310 //
8487 /* 24657 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8488 /* 24660 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
8489 /* 24663 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8490 /* 24667 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8491 /* 24671 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8492 /* 24675 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14903:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (AVGR_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
8493 /* 24675 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::AVGR_U_I16x8),
8494 /* 24678 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8495 /* 24680 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8496 /* 24682 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8497 /* 24684 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8498 /* 24687 */ GIR_RootConstrainSelectedInstOperands,
8499 /* 24688 */ // GIR_Coverage, 310,
8500 /* 24688 */ GIR_EraseRootFromParent_Done,
8501 /* 24689 */ // Label 716: @24689
8502 /* 24689 */ GIM_Reject,
8503 /* 24690 */ // Label 714: @24690
8504 /* 24690 */ GIM_Reject,
8505 /* 24691 */ // Label 711: @24691
8506 /* 24691 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 717*/ GIMT_Encode4(24738), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 311 //
8507 /* 24698 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_dot),
8508 /* 24703 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
8509 /* 24706 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8510 /* 24709 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
8511 /* 24712 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8512 /* 24716 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8513 /* 24720 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8514 /* 24724 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14907:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (DOT:{ *:[v4i32] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
8515 /* 24724 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::DOT),
8516 /* 24727 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8517 /* 24729 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8518 /* 24731 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8519 /* 24733 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8520 /* 24736 */ GIR_RootConstrainSelectedInstOperands,
8521 /* 24737 */ // GIR_Coverage, 311,
8522 /* 24737 */ GIR_EraseRootFromParent_Done,
8523 /* 24738 */ // Label 717: @24738
8524 /* 24738 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 718*/ GIMT_Encode4(24785), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 393 //
8525 /* 24745 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_signed),
8526 /* 24750 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16i8,
8527 /* 24753 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8528 /* 24756 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
8529 /* 24759 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8530 /* 24763 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8531 /* 24767 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8532 /* 24771 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14924:{ *:[iPTR] }, V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high) => (NARROW_S_I8x16:{ *:[v16i8] } V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high)
8533 /* 24771 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_S_I8x16),
8534 /* 24774 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8535 /* 24776 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
8536 /* 24778 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
8537 /* 24780 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8538 /* 24783 */ GIR_RootConstrainSelectedInstOperands,
8539 /* 24784 */ // GIR_Coverage, 393,
8540 /* 24784 */ GIR_EraseRootFromParent_Done,
8541 /* 24785 */ // Label 718: @24785
8542 /* 24785 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 719*/ GIMT_Encode4(24832), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 394 //
8543 /* 24792 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_unsigned),
8544 /* 24797 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16i8,
8545 /* 24800 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8546 /* 24803 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
8547 /* 24806 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8548 /* 24810 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8549 /* 24814 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8550 /* 24818 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14925:{ *:[iPTR] }, V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high) => (NARROW_U_I8x16:{ *:[v16i8] } V128:{ *:[v8i16] }:$low, V128:{ *:[v8i16] }:$high)
8551 /* 24818 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_U_I8x16),
8552 /* 24821 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8553 /* 24823 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
8554 /* 24825 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
8555 /* 24827 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8556 /* 24830 */ GIR_RootConstrainSelectedInstOperands,
8557 /* 24831 */ // GIR_Coverage, 394,
8558 /* 24831 */ GIR_EraseRootFromParent_Done,
8559 /* 24832 */ // Label 719: @24832
8560 /* 24832 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 720*/ GIMT_Encode4(24879), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 395 //
8561 /* 24839 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_signed),
8562 /* 24844 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8i16,
8563 /* 24847 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
8564 /* 24850 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
8565 /* 24853 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8566 /* 24857 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8567 /* 24861 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8568 /* 24865 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14924:{ *:[iPTR] }, V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high) => (NARROW_S_I16x8:{ *:[v8i16] } V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high)
8569 /* 24865 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_S_I16x8),
8570 /* 24868 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8571 /* 24870 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
8572 /* 24872 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
8573 /* 24874 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8574 /* 24877 */ GIR_RootConstrainSelectedInstOperands,
8575 /* 24878 */ // GIR_Coverage, 395,
8576 /* 24878 */ GIR_EraseRootFromParent_Done,
8577 /* 24879 */ // Label 720: @24879
8578 /* 24879 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 721*/ GIMT_Encode4(24926), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 396 //
8579 /* 24886 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_narrow_unsigned),
8580 /* 24891 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8i16,
8581 /* 24894 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
8582 /* 24897 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
8583 /* 24900 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8584 /* 24904 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8585 /* 24908 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8586 /* 24912 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14925:{ *:[iPTR] }, V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high) => (NARROW_U_I16x8:{ *:[v8i16] } V128:{ *:[v4i32] }:$low, V128:{ *:[v4i32] }:$high)
8587 /* 24912 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NARROW_U_I16x8),
8588 /* 24915 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8589 /* 24917 */ GIR_RootToRootCopy, /*OpIdx*/2, // low
8590 /* 24919 */ GIR_RootToRootCopy, /*OpIdx*/3, // high
8591 /* 24921 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8592 /* 24924 */ GIR_RootConstrainSelectedInstOperands,
8593 /* 24925 */ // GIR_Coverage, 396,
8594 /* 24925 */ GIR_EraseRootFromParent_Done,
8595 /* 24926 */ // Label 721: @24926
8596 /* 24926 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 722*/ GIMT_Encode4(24973), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 405 //
8597 /* 24933 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_q15mulr_sat_signed),
8598 /* 24938 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8i16,
8599 /* 24941 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8600 /* 24944 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
8601 /* 24947 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8602 /* 24951 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8603 /* 24955 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8604 /* 24959 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14929:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (Q15MULR_SAT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
8605 /* 24959 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::Q15MULR_SAT_S_I16x8),
8606 /* 24962 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8607 /* 24964 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8608 /* 24966 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8609 /* 24968 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8610 /* 24971 */ GIR_RootConstrainSelectedInstOperands,
8611 /* 24972 */ // GIR_Coverage, 405,
8612 /* 24972 */ GIR_EraseRootFromParent_Done,
8613 /* 24973 */ // Label 722: @24973
8614 /* 24973 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 723*/ GIMT_Encode4(25020), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 406 //
8615 /* 24980 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_swizzle),
8616 /* 24985 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16i8,
8617 /* 24988 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
8618 /* 24991 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
8619 /* 24994 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8620 /* 24998 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8621 /* 25002 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8622 /* 25006 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14946:{ *:[iPTR] }, V128:{ *:[v16i8] }:$src, V128:{ *:[v16i8] }:$mask) => (RELAXED_SWIZZLE:{ *:[v16i8] } V128:{ *:[v16i8] }:$src, V128:{ *:[v16i8] }:$mask)
8623 /* 25006 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_SWIZZLE),
8624 /* 25009 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8625 /* 25011 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8626 /* 25013 */ GIR_RootToRootCopy, /*OpIdx*/3, // mask
8627 /* 25015 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8628 /* 25018 */ GIR_RootConstrainSelectedInstOperands,
8629 /* 25019 */ // GIR_Coverage, 406,
8630 /* 25019 */ GIR_EraseRootFromParent_Done,
8631 /* 25020 */ // Label 723: @25020
8632 /* 25020 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 724*/ GIMT_Encode4(25067), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 421 //
8633 /* 25027 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_min),
8634 /* 25032 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
8635 /* 25035 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
8636 /* 25038 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
8637 /* 25041 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8638 /* 25045 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8639 /* 25049 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8640 /* 25053 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14943:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SIMD_RELAXED_FMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
8641 /* 25053 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F32x4),
8642 /* 25056 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8643 /* 25058 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8644 /* 25060 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8645 /* 25062 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8646 /* 25065 */ GIR_RootConstrainSelectedInstOperands,
8647 /* 25066 */ // GIR_Coverage, 421,
8648 /* 25066 */ GIR_EraseRootFromParent_Done,
8649 /* 25067 */ // Label 724: @25067
8650 /* 25067 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 725*/ GIMT_Encode4(25114), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 422 //
8651 /* 25074 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_max),
8652 /* 25079 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
8653 /* 25082 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
8654 /* 25085 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
8655 /* 25088 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8656 /* 25092 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8657 /* 25096 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8658 /* 25100 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14942:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SIMD_RELAXED_FMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
8659 /* 25100 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F32x4),
8660 /* 25103 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8661 /* 25105 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8662 /* 25107 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8663 /* 25109 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8664 /* 25112 */ GIR_RootConstrainSelectedInstOperands,
8665 /* 25113 */ // GIR_Coverage, 422,
8666 /* 25113 */ GIR_EraseRootFromParent_Done,
8667 /* 25114 */ // Label 725: @25114
8668 /* 25114 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 726*/ GIMT_Encode4(25161), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 423 //
8669 /* 25121 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_min),
8670 /* 25126 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
8671 /* 25129 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
8672 /* 25132 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
8673 /* 25135 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8674 /* 25139 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8675 /* 25143 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8676 /* 25147 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14943:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SIMD_RELAXED_FMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
8677 /* 25147 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F64x2),
8678 /* 25150 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8679 /* 25152 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8680 /* 25154 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8681 /* 25156 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8682 /* 25159 */ GIR_RootConstrainSelectedInstOperands,
8683 /* 25160 */ // GIR_Coverage, 423,
8684 /* 25160 */ GIR_EraseRootFromParent_Done,
8685 /* 25161 */ // Label 726: @25161
8686 /* 25161 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 727*/ GIMT_Encode4(25208), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 424 //
8687 /* 25168 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_max),
8688 /* 25173 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
8689 /* 25176 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
8690 /* 25179 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
8691 /* 25182 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8692 /* 25186 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8693 /* 25190 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8694 /* 25194 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14942:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SIMD_RELAXED_FMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
8695 /* 25194 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F64x2),
8696 /* 25197 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8697 /* 25199 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8698 /* 25201 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8699 /* 25203 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8700 /* 25206 */ GIR_RootConstrainSelectedInstOperands,
8701 /* 25207 */ // GIR_Coverage, 424,
8702 /* 25207 */ GIR_EraseRootFromParent_Done,
8703 /* 25208 */ // Label 727: @25208
8704 /* 25208 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 728*/ GIMT_Encode4(25255), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 425 //
8705 /* 25215 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_q15mulr_signed),
8706 /* 25220 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8i16,
8707 /* 25223 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
8708 /* 25226 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
8709 /* 25229 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8710 /* 25233 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8711 /* 25237 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8712 /* 25241 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14945:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (RELAXED_Q15MULR_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
8713 /* 25241 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_Q15MULR_S_I16x8),
8714 /* 25244 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8715 /* 25246 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8716 /* 25248 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8717 /* 25250 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8718 /* 25253 */ GIR_RootConstrainSelectedInstOperands,
8719 /* 25254 */ // GIR_Coverage, 425,
8720 /* 25254 */ GIR_EraseRootFromParent_Done,
8721 /* 25255 */ // Label 728: @25255
8722 /* 25255 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 729*/ GIMT_Encode4(25302), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 426 //
8723 /* 25262 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_signed),
8724 /* 25267 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8i16,
8725 /* 25270 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
8726 /* 25273 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
8727 /* 25276 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8728 /* 25280 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8729 /* 25284 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8730 /* 25288 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14939:{ *:[iPTR] }, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (RELAXED_DOT:{ *:[v8i16] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
8731 /* 25288 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT),
8732 /* 25291 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8733 /* 25293 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8734 /* 25295 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8735 /* 25297 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8736 /* 25300 */ GIR_RootConstrainSelectedInstOperands,
8737 /* 25301 */ // GIR_Coverage, 426,
8738 /* 25301 */ GIR_EraseRootFromParent_Done,
8739 /* 25302 */ // Label 729: @25302
8740 /* 25302 */ GIM_Try, /*On fail goto*//*Label 730*/ GIMT_Encode4(25347), // Rule ID 997 //
8741 /* 25307 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_swizzle),
8742 /* 25312 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v16i8,
8743 /* 25315 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
8744 /* 25318 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
8745 /* 25321 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8746 /* 25325 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8747 /* 25329 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8748 /* 25333 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14956:{ *:[iPTR] }, V128:{ *:[v16i8] }:$src, V128:{ *:[v16i8] }:$mask) => (SWIZZLE:{ *:[v16i8] } ?:{ *:[v16i8] }:$src, ?:{ *:[v16i8] }:$mask)
8749 /* 25333 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SWIZZLE),
8750 /* 25336 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8751 /* 25338 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
8752 /* 25340 */ GIR_RootToRootCopy, /*OpIdx*/3, // mask
8753 /* 25342 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8754 /* 25345 */ GIR_RootConstrainSelectedInstOperands,
8755 /* 25346 */ // GIR_Coverage, 997,
8756 /* 25346 */ GIR_EraseRootFromParent_Done,
8757 /* 25347 */ // Label 730: @25347
8758 /* 25347 */ GIM_Try, /*On fail goto*//*Label 731*/ GIMT_Encode4(25392), // Rule ID 1180 //
8759 /* 25352 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmin),
8760 /* 25357 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
8761 /* 25360 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
8762 /* 25363 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
8763 /* 25366 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8764 /* 25370 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8765 /* 25374 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8766 /* 25378 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14927:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (PMIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
8767 /* 25378 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
8768 /* 25381 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8769 /* 25383 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8770 /* 25385 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8771 /* 25387 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8772 /* 25390 */ GIR_RootConstrainSelectedInstOperands,
8773 /* 25391 */ // GIR_Coverage, 1180,
8774 /* 25391 */ GIR_EraseRootFromParent_Done,
8775 /* 25392 */ // Label 731: @25392
8776 /* 25392 */ GIM_Try, /*On fail goto*//*Label 732*/ GIMT_Encode4(25437), // Rule ID 1181 //
8777 /* 25397 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmax),
8778 /* 25402 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
8779 /* 25405 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
8780 /* 25408 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
8781 /* 25411 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8782 /* 25415 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8783 /* 25419 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8784 /* 25423 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14926:{ *:[iPTR] }, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (PMAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
8785 /* 25423 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
8786 /* 25426 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8787 /* 25428 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8788 /* 25430 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8789 /* 25432 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8790 /* 25435 */ GIR_RootConstrainSelectedInstOperands,
8791 /* 25436 */ // GIR_Coverage, 1181,
8792 /* 25436 */ GIR_EraseRootFromParent_Done,
8793 /* 25437 */ // Label 732: @25437
8794 /* 25437 */ GIM_Try, /*On fail goto*//*Label 733*/ GIMT_Encode4(25482), // Rule ID 1182 //
8795 /* 25442 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmin),
8796 /* 25447 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
8797 /* 25450 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
8798 /* 25453 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
8799 /* 25456 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8800 /* 25460 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8801 /* 25464 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8802 /* 25468 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14927:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (PMIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
8803 /* 25468 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
8804 /* 25471 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8805 /* 25473 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8806 /* 25475 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8807 /* 25477 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8808 /* 25480 */ GIR_RootConstrainSelectedInstOperands,
8809 /* 25481 */ // GIR_Coverage, 1182,
8810 /* 25481 */ GIR_EraseRootFromParent_Done,
8811 /* 25482 */ // Label 733: @25482
8812 /* 25482 */ GIM_Try, /*On fail goto*//*Label 734*/ GIMT_Encode4(25527), // Rule ID 1183 //
8813 /* 25487 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmax),
8814 /* 25492 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
8815 /* 25495 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
8816 /* 25498 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
8817 /* 25501 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8818 /* 25505 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8819 /* 25509 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8820 /* 25513 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14926:{ *:[iPTR] }, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (PMAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
8821 /* 25513 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
8822 /* 25516 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8823 /* 25518 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8824 /* 25520 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8825 /* 25522 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8826 /* 25525 */ GIR_RootConstrainSelectedInstOperands,
8827 /* 25526 */ // GIR_Coverage, 1183,
8828 /* 25526 */ GIR_EraseRootFromParent_Done,
8829 /* 25527 */ // Label 734: @25527
8830 /* 25527 */ GIM_Try, /*On fail goto*//*Label 735*/ GIMT_Encode4(25572), // Rule ID 1184 //
8831 /* 25532 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmin),
8832 /* 25537 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
8833 /* 25540 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
8834 /* 25543 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
8835 /* 25546 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8836 /* 25550 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8837 /* 25554 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8838 /* 25558 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14927:{ *:[iPTR] }, V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (PMIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
8839 /* 25558 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
8840 /* 25561 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8841 /* 25563 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8842 /* 25565 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8843 /* 25567 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8844 /* 25570 */ GIR_RootConstrainSelectedInstOperands,
8845 /* 25571 */ // GIR_Coverage, 1184,
8846 /* 25571 */ GIR_EraseRootFromParent_Done,
8847 /* 25572 */ // Label 735: @25572
8848 /* 25572 */ GIM_Try, /*On fail goto*//*Label 736*/ GIMT_Encode4(25617), // Rule ID 1185 //
8849 /* 25577 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_pmax),
8850 /* 25582 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
8851 /* 25585 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
8852 /* 25588 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
8853 /* 25591 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8854 /* 25595 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8855 /* 25599 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8856 /* 25603 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14926:{ *:[iPTR] }, V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (PMAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
8857 /* 25603 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
8858 /* 25606 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8859 /* 25608 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
8860 /* 25610 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
8861 /* 25612 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8862 /* 25615 */ GIR_RootConstrainSelectedInstOperands,
8863 /* 25616 */ // GIR_Coverage, 1185,
8864 /* 25616 */ GIR_EraseRootFromParent_Done,
8865 /* 25617 */ // Label 736: @25617
8866 /* 25617 */ GIM_Reject,
8867 /* 25618 */ // Label 709: @25618
8868 /* 25618 */ GIM_Try, /*On fail goto*//*Label 737*/ GIMT_Encode4(26751),
8869 /* 25623 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
8870 /* 25626 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 738*/ GIMT_Encode4(25693), GIMT_Encode2(GIFBS_HasFP16), // Rule ID 194 //
8871 /* 25633 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_replace_lane_f16x8),
8872 /* 25638 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
8873 /* 25641 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
8874 /* 25644 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
8875 /* 25647 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_f32,
8876 /* 25650 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8877 /* 25654 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8878 /* 25658 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
8879 /* 25662 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
8880 /* 25666 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
8881 /* 25670 */ // MIs[1] Operand 1
8882 /* 25670 */ // No operand predicates
8883 /* 25670 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
8884 /* 25674 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
8885 /* 25676 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14951:{ *:[iPTR] }, V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx, F32:{ *:[f32] }:$x) => (REPLACE_LANE_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$vec, (imm:{ *:[i32] }):$idx, F32:{ *:[f32] }:$x)
8886 /* 25676 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_F16x8),
8887 /* 25679 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8888 /* 25681 */ GIR_RootToRootCopy, /*OpIdx*/2, // vec
8889 /* 25683 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
8890 /* 25686 */ GIR_RootToRootCopy, /*OpIdx*/4, // x
8891 /* 25688 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8892 /* 25691 */ GIR_RootConstrainSelectedInstOperands,
8893 /* 25692 */ // GIR_Coverage, 194,
8894 /* 25692 */ GIR_EraseRootFromParent_Done,
8895 /* 25693 */ // Label 738: @25693
8896 /* 25693 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 739*/ GIMT_Encode4(25749), GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128), // Rule ID 411 //
8897 /* 25700 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_madd),
8898 /* 25705 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
8899 /* 25708 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
8900 /* 25711 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
8901 /* 25714 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4f32,
8902 /* 25717 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8903 /* 25721 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8904 /* 25725 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8905 /* 25729 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8906 /* 25733 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14941:{ *:[iPTR] }, V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c) => (MADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c)
8907 /* 25733 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F32x4),
8908 /* 25736 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8909 /* 25738 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
8910 /* 25740 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
8911 /* 25742 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8912 /* 25744 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8913 /* 25747 */ GIR_RootConstrainSelectedInstOperands,
8914 /* 25748 */ // GIR_Coverage, 411,
8915 /* 25748 */ GIR_EraseRootFromParent_Done,
8916 /* 25749 */ // Label 739: @25749
8917 /* 25749 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 740*/ GIMT_Encode4(25805), GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128), // Rule ID 412 //
8918 /* 25756 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_nmadd),
8919 /* 25761 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
8920 /* 25764 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
8921 /* 25767 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
8922 /* 25770 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4f32,
8923 /* 25773 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8924 /* 25777 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8925 /* 25781 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8926 /* 25785 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8927 /* 25789 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14944:{ *:[iPTR] }, V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c) => (NMADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c)
8928 /* 25789 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F32x4),
8929 /* 25792 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8930 /* 25794 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
8931 /* 25796 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
8932 /* 25798 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8933 /* 25800 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8934 /* 25803 */ GIR_RootConstrainSelectedInstOperands,
8935 /* 25804 */ // GIR_Coverage, 412,
8936 /* 25804 */ GIR_EraseRootFromParent_Done,
8937 /* 25805 */ // Label 740: @25805
8938 /* 25805 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 741*/ GIMT_Encode4(25861), GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128), // Rule ID 413 //
8939 /* 25812 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_madd),
8940 /* 25817 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
8941 /* 25820 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
8942 /* 25823 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
8943 /* 25826 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2f64,
8944 /* 25829 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8945 /* 25833 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8946 /* 25837 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8947 /* 25841 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8948 /* 25845 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14941:{ *:[iPTR] }, V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c) => (MADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c)
8949 /* 25845 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F64x2),
8950 /* 25848 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8951 /* 25850 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
8952 /* 25852 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
8953 /* 25854 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8954 /* 25856 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8955 /* 25859 */ GIR_RootConstrainSelectedInstOperands,
8956 /* 25860 */ // GIR_Coverage, 413,
8957 /* 25860 */ GIR_EraseRootFromParent_Done,
8958 /* 25861 */ // Label 741: @25861
8959 /* 25861 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 742*/ GIMT_Encode4(25917), GIMT_Encode2(GIFBS_HasRelaxedSIMD_HasSIMD128), // Rule ID 414 //
8960 /* 25868 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_nmadd),
8961 /* 25873 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v2f64,
8962 /* 25876 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
8963 /* 25879 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
8964 /* 25882 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2f64,
8965 /* 25885 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8966 /* 25889 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8967 /* 25893 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8968 /* 25897 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8969 /* 25901 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14944:{ *:[iPTR] }, V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c) => (NMADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c)
8970 /* 25901 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F64x2),
8971 /* 25904 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8972 /* 25906 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
8973 /* 25908 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
8974 /* 25910 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
8975 /* 25912 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
8976 /* 25915 */ GIR_RootConstrainSelectedInstOperands,
8977 /* 25916 */ // GIR_Coverage, 414,
8978 /* 25916 */ GIR_EraseRootFromParent_Done,
8979 /* 25917 */ // Label 742: @25917
8980 /* 25917 */ GIM_Try, /*On fail goto*//*Label 743*/ GIMT_Encode4(26151),
8981 /* 25922 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_laneselect),
8982 /* 25927 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(16), /*)*//*default:*//*Label 748*/ GIMT_Encode4(26150),
8983 /* 25938 */ /*GILLT_v16i8*//*Label 744*/ GIMT_Encode4(25954),
8984 /* 25942 */ /*GILLT_v8i16*//*Label 745*/ GIMT_Encode4(26003),
8985 /* 25946 */ /*GILLT_v4i32*//*Label 746*/ GIMT_Encode4(26052),
8986 /* 25950 */ /*GILLT_v2i64*//*Label 747*/ GIMT_Encode4(26101),
8987 /* 25954 */ // Label 744: @25954
8988 /* 25954 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 749*/ GIMT_Encode4(26002), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 417 //
8989 /* 25961 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
8990 /* 25964 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
8991 /* 25967 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v16i8,
8992 /* 25970 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8993 /* 25974 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8994 /* 25978 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8995 /* 25982 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
8996 /* 25986 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14940:{ *:[iPTR] }, V128:{ *:[v16i8] }:$a, V128:{ *:[v16i8] }:$b, V128:{ *:[v16i8] }:$c) => (LANESELECT_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$a, V128:{ *:[v16i8] }:$b, V128:{ *:[v16i8] }:$c)
8997 /* 25986 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I8x16),
8998 /* 25989 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
8999 /* 25991 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
9000 /* 25993 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
9001 /* 25995 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
9002 /* 25997 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9003 /* 26000 */ GIR_RootConstrainSelectedInstOperands,
9004 /* 26001 */ // GIR_Coverage, 417,
9005 /* 26001 */ GIR_EraseRootFromParent_Done,
9006 /* 26002 */ // Label 749: @26002
9007 /* 26002 */ GIM_Reject,
9008 /* 26003 */ // Label 745: @26003
9009 /* 26003 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 750*/ GIMT_Encode4(26051), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 418 //
9010 /* 26010 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
9011 /* 26013 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
9012 /* 26016 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8i16,
9013 /* 26019 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9014 /* 26023 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9015 /* 26027 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9016 /* 26031 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9017 /* 26035 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14940:{ *:[iPTR] }, V128:{ *:[v8i16] }:$a, V128:{ *:[v8i16] }:$b, V128:{ *:[v8i16] }:$c) => (LANESELECT_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$a, V128:{ *:[v8i16] }:$b, V128:{ *:[v8i16] }:$c)
9018 /* 26035 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I16x8),
9019 /* 26038 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9020 /* 26040 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
9021 /* 26042 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
9022 /* 26044 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
9023 /* 26046 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9024 /* 26049 */ GIR_RootConstrainSelectedInstOperands,
9025 /* 26050 */ // GIR_Coverage, 418,
9026 /* 26050 */ GIR_EraseRootFromParent_Done,
9027 /* 26051 */ // Label 750: @26051
9028 /* 26051 */ GIM_Reject,
9029 /* 26052 */ // Label 746: @26052
9030 /* 26052 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 751*/ GIMT_Encode4(26100), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 419 //
9031 /* 26059 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
9032 /* 26062 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
9033 /* 26065 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4i32,
9034 /* 26068 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9035 /* 26072 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9036 /* 26076 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9037 /* 26080 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9038 /* 26084 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14940:{ *:[iPTR] }, V128:{ *:[v4i32] }:$a, V128:{ *:[v4i32] }:$b, V128:{ *:[v4i32] }:$c) => (LANESELECT_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$a, V128:{ *:[v4i32] }:$b, V128:{ *:[v4i32] }:$c)
9039 /* 26084 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I32x4),
9040 /* 26087 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9041 /* 26089 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
9042 /* 26091 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
9043 /* 26093 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
9044 /* 26095 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9045 /* 26098 */ GIR_RootConstrainSelectedInstOperands,
9046 /* 26099 */ // GIR_Coverage, 419,
9047 /* 26099 */ GIR_EraseRootFromParent_Done,
9048 /* 26100 */ // Label 751: @26100
9049 /* 26100 */ GIM_Reject,
9050 /* 26101 */ // Label 747: @26101
9051 /* 26101 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 752*/ GIMT_Encode4(26149), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 420 //
9052 /* 26108 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
9053 /* 26111 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
9054 /* 26114 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2i64,
9055 /* 26117 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9056 /* 26121 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9057 /* 26125 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9058 /* 26129 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9059 /* 26133 */ // (intrinsic_wo_chain:{ *:[v2i64] } 14940:{ *:[iPTR] }, V128:{ *:[v2i64] }:$a, V128:{ *:[v2i64] }:$b, V128:{ *:[v2i64] }:$c) => (LANESELECT_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$a, V128:{ *:[v2i64] }:$b, V128:{ *:[v2i64] }:$c)
9060 /* 26133 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LANESELECT_I64x2),
9061 /* 26136 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9062 /* 26138 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
9063 /* 26140 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
9064 /* 26142 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
9065 /* 26144 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9066 /* 26147 */ GIR_RootConstrainSelectedInstOperands,
9067 /* 26148 */ // GIR_Coverage, 420,
9068 /* 26148 */ GIR_EraseRootFromParent_Done,
9069 /* 26149 */ // Label 752: @26149
9070 /* 26149 */ GIM_Reject,
9071 /* 26150 */ // Label 748: @26150
9072 /* 26150 */ GIM_Reject,
9073 /* 26151 */ // Label 743: @26151
9074 /* 26151 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 753*/ GIMT_Encode4(26207), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 427 //
9075 /* 26158 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_i8x16_i7x16_add_signed),
9076 /* 26163 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4i32,
9077 /* 26166 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
9078 /* 26169 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
9079 /* 26172 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4i32,
9080 /* 26175 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9081 /* 26179 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9082 /* 26183 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9083 /* 26187 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9084 /* 26191 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14938:{ *:[iPTR] }, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc) => (RELAXED_DOT_ADD:{ *:[v4i32] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, V128:{ *:[v4i32] }:$acc)
9085 /* 26191 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_ADD),
9086 /* 26194 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9087 /* 26196 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9088 /* 26198 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9089 /* 26200 */ GIR_RootToRootCopy, /*OpIdx*/4, // acc
9090 /* 26202 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9091 /* 26205 */ GIR_RootConstrainSelectedInstOperands,
9092 /* 26206 */ // GIR_Coverage, 427,
9093 /* 26206 */ GIR_EraseRootFromParent_Done,
9094 /* 26207 */ // Label 753: @26207
9095 /* 26207 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 754*/ GIMT_Encode4(26263), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 428 //
9096 /* 26214 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_dot_bf16x8_add_f32),
9097 /* 26219 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v4f32,
9098 /* 26222 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
9099 /* 26225 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
9100 /* 26228 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4f32,
9101 /* 26231 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9102 /* 26235 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9103 /* 26239 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9104 /* 26243 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9105 /* 26247 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14937:{ *:[iPTR] }, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, V128:{ *:[v4f32] }:$acc) => (RELAXED_DOT_BFLOAT:{ *:[v4f32] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, V128:{ *:[v4f32] }:$acc)
9106 /* 26247 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::RELAXED_DOT_BFLOAT),
9107 /* 26250 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9108 /* 26252 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
9109 /* 26254 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
9110 /* 26256 */ GIR_RootToRootCopy, /*OpIdx*/4, // acc
9111 /* 26258 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9112 /* 26261 */ GIR_RootConstrainSelectedInstOperands,
9113 /* 26262 */ // GIR_Coverage, 428,
9114 /* 26262 */ GIR_EraseRootFromParent_Done,
9115 /* 26263 */ // Label 754: @26263
9116 /* 26263 */ GIM_Try, /*On fail goto*//*Label 755*/ GIMT_Encode4(26642),
9117 /* 26268 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_bitselect),
9118 /* 26273 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(19), /*)*//*default:*//*Label 763*/ GIMT_Encode4(26641),
9119 /* 26284 */ /*GILLT_v16i8*//*Label 756*/ GIMT_Encode4(26312),
9120 /* 26288 */ /*GILLT_v8i16*//*Label 757*/ GIMT_Encode4(26359),
9121 /* 26292 */ /*GILLT_v4i32*//*Label 758*/ GIMT_Encode4(26406),
9122 /* 26296 */ /*GILLT_v2i64*//*Label 759*/ GIMT_Encode4(26453),
9123 /* 26300 */ /*GILLT_v8f16*//*Label 760*/ GIMT_Encode4(26500),
9124 /* 26304 */ /*GILLT_v4f32*//*Label 761*/ GIMT_Encode4(26547),
9125 /* 26308 */ /*GILLT_v2f64*//*Label 762*/ GIMT_Encode4(26594),
9126 /* 26312 */ // Label 756: @26312
9127 /* 26312 */ GIM_Try, /*On fail goto*//*Label 764*/ GIMT_Encode4(26358), // Rule ID 1052 //
9128 /* 26317 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
9129 /* 26320 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
9130 /* 26323 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v16i8,
9131 /* 26326 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9132 /* 26330 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9133 /* 26334 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9134 /* 26338 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9135 /* 26342 */ // (intrinsic_wo_chain:{ *:[v16i8] } 14905:{ *:[iPTR] }, V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2, V128:{ *:[v16i8] }:$c) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
9136 /* 26342 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
9137 /* 26345 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9138 /* 26347 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
9139 /* 26349 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
9140 /* 26351 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
9141 /* 26353 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9142 /* 26356 */ GIR_RootConstrainSelectedInstOperands,
9143 /* 26357 */ // GIR_Coverage, 1052,
9144 /* 26357 */ GIR_EraseRootFromParent_Done,
9145 /* 26358 */ // Label 764: @26358
9146 /* 26358 */ GIM_Reject,
9147 /* 26359 */ // Label 757: @26359
9148 /* 26359 */ GIM_Try, /*On fail goto*//*Label 765*/ GIMT_Encode4(26405), // Rule ID 1053 //
9149 /* 26364 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
9150 /* 26367 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
9151 /* 26370 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8i16,
9152 /* 26373 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9153 /* 26377 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9154 /* 26381 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9155 /* 26385 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9156 /* 26389 */ // (intrinsic_wo_chain:{ *:[v8i16] } 14905:{ *:[iPTR] }, V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2, V128:{ *:[v8i16] }:$c) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
9157 /* 26389 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
9158 /* 26392 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9159 /* 26394 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
9160 /* 26396 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
9161 /* 26398 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
9162 /* 26400 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9163 /* 26403 */ GIR_RootConstrainSelectedInstOperands,
9164 /* 26404 */ // GIR_Coverage, 1053,
9165 /* 26404 */ GIR_EraseRootFromParent_Done,
9166 /* 26405 */ // Label 765: @26405
9167 /* 26405 */ GIM_Reject,
9168 /* 26406 */ // Label 758: @26406
9169 /* 26406 */ GIM_Try, /*On fail goto*//*Label 766*/ GIMT_Encode4(26452), // Rule ID 1054 //
9170 /* 26411 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
9171 /* 26414 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
9172 /* 26417 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4i32,
9173 /* 26420 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9174 /* 26424 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9175 /* 26428 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9176 /* 26432 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9177 /* 26436 */ // (intrinsic_wo_chain:{ *:[v4i32] } 14905:{ *:[iPTR] }, V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2, V128:{ *:[v4i32] }:$c) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
9178 /* 26436 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
9179 /* 26439 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9180 /* 26441 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
9181 /* 26443 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
9182 /* 26445 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
9183 /* 26447 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9184 /* 26450 */ GIR_RootConstrainSelectedInstOperands,
9185 /* 26451 */ // GIR_Coverage, 1054,
9186 /* 26451 */ GIR_EraseRootFromParent_Done,
9187 /* 26452 */ // Label 766: @26452
9188 /* 26452 */ GIM_Reject,
9189 /* 26453 */ // Label 759: @26453
9190 /* 26453 */ GIM_Try, /*On fail goto*//*Label 767*/ GIMT_Encode4(26499), // Rule ID 1055 //
9191 /* 26458 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
9192 /* 26461 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
9193 /* 26464 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2i64,
9194 /* 26467 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9195 /* 26471 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9196 /* 26475 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9197 /* 26479 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9198 /* 26483 */ // (intrinsic_wo_chain:{ *:[v2i64] } 14905:{ *:[iPTR] }, V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2, V128:{ *:[v2i64] }:$c) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
9199 /* 26483 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
9200 /* 26486 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9201 /* 26488 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
9202 /* 26490 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
9203 /* 26492 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
9204 /* 26494 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9205 /* 26497 */ GIR_RootConstrainSelectedInstOperands,
9206 /* 26498 */ // GIR_Coverage, 1055,
9207 /* 26498 */ GIR_EraseRootFromParent_Done,
9208 /* 26499 */ // Label 767: @26499
9209 /* 26499 */ GIM_Reject,
9210 /* 26500 */ // Label 760: @26500
9211 /* 26500 */ GIM_Try, /*On fail goto*//*Label 768*/ GIMT_Encode4(26546), // Rule ID 1058 //
9212 /* 26505 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
9213 /* 26508 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
9214 /* 26511 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8f16,
9215 /* 26514 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9216 /* 26518 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9217 /* 26522 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9218 /* 26526 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9219 /* 26530 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14905:{ *:[iPTR] }, V128:{ *:[v8f16] }:$v1, V128:{ *:[v8f16] }:$v2, V128:{ *:[v8f16] }:$c) => (BITSELECT:{ *:[v8f16] } ?:{ *:[v8f16] }:$v1, ?:{ *:[v8f16] }:$v2, ?:{ *:[v8f16] }:$c)
9220 /* 26530 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
9221 /* 26533 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9222 /* 26535 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
9223 /* 26537 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
9224 /* 26539 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
9225 /* 26541 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9226 /* 26544 */ GIR_RootConstrainSelectedInstOperands,
9227 /* 26545 */ // GIR_Coverage, 1058,
9228 /* 26545 */ GIR_EraseRootFromParent_Done,
9229 /* 26546 */ // Label 768: @26546
9230 /* 26546 */ GIM_Reject,
9231 /* 26547 */ // Label 761: @26547
9232 /* 26547 */ GIM_Try, /*On fail goto*//*Label 769*/ GIMT_Encode4(26593), // Rule ID 1056 //
9233 /* 26552 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
9234 /* 26555 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
9235 /* 26558 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v4f32,
9236 /* 26561 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9237 /* 26565 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9238 /* 26569 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9239 /* 26573 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9240 /* 26577 */ // (intrinsic_wo_chain:{ *:[v4f32] } 14905:{ *:[iPTR] }, V128:{ *:[v4f32] }:$v1, V128:{ *:[v4f32] }:$v2, V128:{ *:[v4f32] }:$c) => (BITSELECT:{ *:[v4f32] } ?:{ *:[v4f32] }:$v1, ?:{ *:[v4f32] }:$v2, ?:{ *:[v4f32] }:$c)
9241 /* 26577 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
9242 /* 26580 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9243 /* 26582 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
9244 /* 26584 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
9245 /* 26586 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
9246 /* 26588 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9247 /* 26591 */ GIR_RootConstrainSelectedInstOperands,
9248 /* 26592 */ // GIR_Coverage, 1056,
9249 /* 26592 */ GIR_EraseRootFromParent_Done,
9250 /* 26593 */ // Label 769: @26593
9251 /* 26593 */ GIM_Reject,
9252 /* 26594 */ // Label 762: @26594
9253 /* 26594 */ GIM_Try, /*On fail goto*//*Label 770*/ GIMT_Encode4(26640), // Rule ID 1057 //
9254 /* 26599 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
9255 /* 26602 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
9256 /* 26605 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v2f64,
9257 /* 26608 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9258 /* 26612 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9259 /* 26616 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9260 /* 26620 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9261 /* 26624 */ // (intrinsic_wo_chain:{ *:[v2f64] } 14905:{ *:[iPTR] }, V128:{ *:[v2f64] }:$v1, V128:{ *:[v2f64] }:$v2, V128:{ *:[v2f64] }:$c) => (BITSELECT:{ *:[v2f64] } ?:{ *:[v2f64] }:$v1, ?:{ *:[v2f64] }:$v2, ?:{ *:[v2f64] }:$c)
9262 /* 26624 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
9263 /* 26627 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9264 /* 26629 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
9265 /* 26631 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
9266 /* 26633 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
9267 /* 26635 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9268 /* 26638 */ GIR_RootConstrainSelectedInstOperands,
9269 /* 26639 */ // GIR_Coverage, 1057,
9270 /* 26639 */ GIR_EraseRootFromParent_Done,
9271 /* 26640 */ // Label 770: @26640
9272 /* 26640 */ GIM_Reject,
9273 /* 26641 */ // Label 763: @26641
9274 /* 26641 */ GIM_Reject,
9275 /* 26642 */ // Label 755: @26642
9276 /* 26642 */ GIM_Try, /*On fail goto*//*Label 771*/ GIMT_Encode4(26696), // Rule ID 1274 //
9277 /* 26647 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_madd),
9278 /* 26652 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
9279 /* 26655 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
9280 /* 26658 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
9281 /* 26661 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8f16,
9282 /* 26664 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9283 /* 26668 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9284 /* 26672 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9285 /* 26676 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9286 /* 26680 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14941:{ *:[iPTR] }, V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (MADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
9287 /* 26680 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F16x8),
9288 /* 26683 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9289 /* 26685 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
9290 /* 26687 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
9291 /* 26689 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
9292 /* 26691 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9293 /* 26694 */ GIR_RootConstrainSelectedInstOperands,
9294 /* 26695 */ // GIR_Coverage, 1274,
9295 /* 26695 */ GIR_EraseRootFromParent_Done,
9296 /* 26696 */ // Label 771: @26696
9297 /* 26696 */ GIM_Try, /*On fail goto*//*Label 772*/ GIMT_Encode4(26750), // Rule ID 1275 //
9298 /* 26701 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_relaxed_nmadd),
9299 /* 26706 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
9300 /* 26709 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
9301 /* 26712 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
9302 /* 26715 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_v8f16,
9303 /* 26718 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9304 /* 26722 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9305 /* 26726 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9306 /* 26730 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
9307 /* 26734 */ // (intrinsic_wo_chain:{ *:[v8f16] } 14944:{ *:[iPTR] }, V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (NMADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
9308 /* 26734 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F16x8),
9309 /* 26737 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9310 /* 26739 */ GIR_RootToRootCopy, /*OpIdx*/2, // a
9311 /* 26741 */ GIR_RootToRootCopy, /*OpIdx*/3, // b
9312 /* 26743 */ GIR_RootToRootCopy, /*OpIdx*/4, // c
9313 /* 26745 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9314 /* 26748 */ GIR_RootConstrainSelectedInstOperands,
9315 /* 26749 */ // GIR_Coverage, 1275,
9316 /* 26749 */ GIR_EraseRootFromParent_Done,
9317 /* 26750 */ // Label 772: @26750
9318 /* 26750 */ GIM_Reject,
9319 /* 26751 */ // Label 737: @26751
9320 /* 26751 */ GIM_Reject,
9321 /* 26752 */ // Label 24: @26752
9322 /* 26752 */ GIM_Try, /*On fail goto*//*Label 773*/ GIMT_Encode4(27089),
9323 /* 26757 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
9324 /* 26760 */ GIM_Try, /*On fail goto*//*Label 774*/ GIMT_Encode4(26868),
9325 /* 26765 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_loadf16_f32),
9326 /* 26770 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_f32,
9327 /* 26773 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9328 /* 26777 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 775*/ GIMT_Encode4(26822), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 574 //
9329 /* 26784 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/32,
9330 /* 26788 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
9331 /* 26795 */ // (intrinsic_w_chain:{ *:[f32] } 14915:{ *:[iPTR] }, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)) => (LOAD_F16_F32_A32:{ *:[f32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
9332 /* 26795 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_F16_F32_A32),
9333 /* 26798 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9334 /* 26800 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9335 /* 26803 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
9336 /* 26808 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
9337 /* 26813 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9338 /* 26816 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9339 /* 26820 */ GIR_RootConstrainSelectedInstOperands,
9340 /* 26821 */ // GIR_Coverage, 574,
9341 /* 26821 */ GIR_EraseRootFromParent_Done,
9342 /* 26822 */ // Label 775: @26822
9343 /* 26822 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 776*/ GIMT_Encode4(26867), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 575 //
9344 /* 26829 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/64,
9345 /* 26833 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
9346 /* 26840 */ // (intrinsic_w_chain:{ *:[f32] } 14915:{ *:[iPTR] }, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)) => (LOAD_F16_F32_A64:{ *:[f32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
9347 /* 26840 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_F16_F32_A64),
9348 /* 26843 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9349 /* 26845 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9350 /* 26848 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
9351 /* 26853 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
9352 /* 26858 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9353 /* 26861 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9354 /* 26865 */ GIR_RootConstrainSelectedInstOperands,
9355 /* 26866 */ // GIR_Coverage, 575,
9356 /* 26866 */ GIR_EraseRootFromParent_Done,
9357 /* 26867 */ // Label 776: @26867
9358 /* 26867 */ GIM_Reject,
9359 /* 26868 */ // Label 774: @26868
9360 /* 26868 */ GIM_Try, /*On fail goto*//*Label 777*/ GIMT_Encode4(26976),
9361 /* 26873 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::wasm_storef16_f32),
9362 /* 26878 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
9363 /* 26881 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9364 /* 26885 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 778*/ GIMT_Encode4(26930), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 596 //
9365 /* 26892 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/32,
9366 /* 26896 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
9367 /* 26903 */ // (intrinsic_void 14955:{ *:[iPTR] }, F32:{ *:[f32] }:$val, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)) => (STORE_F16_F32_A32 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr, f32:{ *:[f32] }:$val)
9368 /* 26903 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_F16_F32_A32),
9369 /* 26906 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9370 /* 26909 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
9371 /* 26914 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
9372 /* 26919 */ GIR_RootToRootCopy, /*OpIdx*/1, // val
9373 /* 26921 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9374 /* 26924 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9375 /* 26928 */ GIR_RootConstrainSelectedInstOperands,
9376 /* 26929 */ // GIR_Coverage, 596,
9377 /* 26929 */ GIR_EraseRootFromParent_Done,
9378 /* 26930 */ // Label 778: @26930
9379 /* 26930 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 779*/ GIMT_Encode4(26975), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 597 //
9380 /* 26937 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/64,
9381 /* 26941 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
9382 /* 26948 */ // (intrinsic_void 14955:{ *:[iPTR] }, F32:{ *:[f32] }:$val, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)) => (STORE_F16_F32_A64 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr, f32:{ *:[f32] }:$val)
9383 /* 26948 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::STORE_F16_F32_A64),
9384 /* 26951 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9385 /* 26954 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
9386 /* 26959 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
9387 /* 26964 */ GIR_RootToRootCopy, /*OpIdx*/1, // val
9388 /* 26966 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9389 /* 26969 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9390 /* 26973 */ GIR_RootConstrainSelectedInstOperands,
9391 /* 26974 */ // GIR_Coverage, 597,
9392 /* 26974 */ GIR_EraseRootFromParent_Done,
9393 /* 26975 */ // Label 779: @26975
9394 /* 26975 */ GIM_Reject,
9395 /* 26976 */ // Label 777: @26976
9396 /* 26976 */ GIM_Try, /*On fail goto*//*Label 780*/ GIMT_Encode4(27088),
9397 /* 26981 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_memory_size),
9398 /* 26986 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 783*/ GIMT_Encode4(27087),
9399 /* 26997 */ /*GILLT_i32*//*Label 781*/ GIMT_Encode4(27005),
9400 /* 27001 */ /*GILLT_i64*//*Label 782*/ GIMT_Encode4(27046),
9401 /* 27005 */ // Label 781: @27005
9402 /* 27005 */ GIM_Try, /*On fail goto*//*Label 784*/ GIMT_Encode4(27045), // Rule ID 11 //
9403 /* 27010 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
9404 /* 27013 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9405 /* 27017 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9406 /* 27021 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
9407 /* 27025 */ // MIs[1] Operand 1
9408 /* 27025 */ // No operand predicates
9409 /* 27025 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9410 /* 27027 */ // (intrinsic_w_chain:{ *:[i32] } 14923:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags) => (anonymous_14865MEMORY_SIZE_A32:{ *:[i32] } (imm:{ *:[i32] }):$flags)
9411 /* 27027 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_14865MEMORY_SIZE_A32),
9412 /* 27030 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9413 /* 27032 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
9414 /* 27035 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9415 /* 27038 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
9416 /* 27043 */ GIR_RootConstrainSelectedInstOperands,
9417 /* 27044 */ // GIR_Coverage, 11,
9418 /* 27044 */ GIR_EraseRootFromParent_Done,
9419 /* 27045 */ // Label 784: @27045
9420 /* 27045 */ GIM_Reject,
9421 /* 27046 */ // Label 782: @27046
9422 /* 27046 */ GIM_Try, /*On fail goto*//*Label 785*/ GIMT_Encode4(27086), // Rule ID 13 //
9423 /* 27051 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
9424 /* 27054 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9425 /* 27058 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9426 /* 27062 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
9427 /* 27066 */ // MIs[1] Operand 1
9428 /* 27066 */ // No operand predicates
9429 /* 27066 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9430 /* 27068 */ // (intrinsic_w_chain:{ *:[i64] } 14923:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags) => (anonymous_14866MEMORY_SIZE_A64:{ *:[i64] } (imm:{ *:[i32] }):$flags)
9431 /* 27068 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_14866MEMORY_SIZE_A64),
9432 /* 27071 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9433 /* 27073 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
9434 /* 27076 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9435 /* 27079 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
9436 /* 27084 */ GIR_RootConstrainSelectedInstOperands,
9437 /* 27085 */ // GIR_Coverage, 13,
9438 /* 27085 */ GIR_EraseRootFromParent_Done,
9439 /* 27086 */ // Label 785: @27086
9440 /* 27086 */ GIM_Reject,
9441 /* 27087 */ // Label 783: @27087
9442 /* 27087 */ GIM_Reject,
9443 /* 27088 */ // Label 780: @27088
9444 /* 27088 */ GIM_Reject,
9445 /* 27089 */ // Label 773: @27089
9446 /* 27089 */ GIM_Try, /*On fail goto*//*Label 786*/ GIMT_Encode4(27357),
9447 /* 27094 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
9448 /* 27097 */ GIM_Try, /*On fail goto*//*Label 787*/ GIMT_Encode4(27226),
9449 /* 27102 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_memory_atomic_notify),
9450 /* 27107 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
9451 /* 27110 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
9452 /* 27113 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9453 /* 27117 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 788*/ GIMT_Encode4(27171), GIMT_Encode2(GIFBS_HasAddr32_HasAtomics), // Rule ID 460 //
9454 /* 27124 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/32,
9455 /* 27128 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9456 /* 27132 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
9457 /* 27139 */ // (intrinsic_w_chain:{ *:[i32] } 14917:{ *:[iPTR] }, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr), I32:{ *:[i32] }:$count) => (MEMORY_ATOMIC_NOTIFY_A32:{ *:[i32] } 0:{ *:[i32] }, 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, ?:{ *:[i32] }:$addr, ?:{ *:[i32] }:$count)
9458 /* 27139 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MEMORY_ATOMIC_NOTIFY_A32),
9459 /* 27142 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9460 /* 27144 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9461 /* 27147 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9462 /* 27150 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
9463 /* 27155 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
9464 /* 27160 */ GIR_RootToRootCopy, /*OpIdx*/3, // count
9465 /* 27162 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9466 /* 27165 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9467 /* 27169 */ GIR_RootConstrainSelectedInstOperands,
9468 /* 27170 */ // GIR_Coverage, 460,
9469 /* 27170 */ GIR_EraseRootFromParent_Done,
9470 /* 27171 */ // Label 788: @27171
9471 /* 27171 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 789*/ GIMT_Encode4(27225), GIMT_Encode2(GIFBS_HasAddr64_HasAtomics), // Rule ID 461 //
9472 /* 27178 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/64,
9473 /* 27182 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9474 /* 27186 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
9475 /* 27193 */ // (intrinsic_w_chain:{ *:[i32] } 14917:{ *:[iPTR] }, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr), I32:{ *:[i32] }:$count) => (MEMORY_ATOMIC_NOTIFY_A64:{ *:[i32] } 0:{ *:[i32] }, 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, ?:{ *:[i64] }:$addr, ?:{ *:[i32] }:$count)
9476 /* 27193 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MEMORY_ATOMIC_NOTIFY_A64),
9477 /* 27196 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9478 /* 27198 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9479 /* 27201 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9480 /* 27204 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
9481 /* 27209 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
9482 /* 27214 */ GIR_RootToRootCopy, /*OpIdx*/3, // count
9483 /* 27216 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9484 /* 27219 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9485 /* 27223 */ GIR_RootConstrainSelectedInstOperands,
9486 /* 27224 */ // GIR_Coverage, 461,
9487 /* 27224 */ GIR_EraseRootFromParent_Done,
9488 /* 27225 */ // Label 789: @27225
9489 /* 27225 */ GIM_Reject,
9490 /* 27226 */ // Label 787: @27226
9491 /* 27226 */ GIM_Try, /*On fail goto*//*Label 790*/ GIMT_Encode4(27356),
9492 /* 27231 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_memory_grow),
9493 /* 27236 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 793*/ GIMT_Encode4(27355),
9494 /* 27247 */ /*GILLT_i32*//*Label 791*/ GIMT_Encode4(27255),
9495 /* 27251 */ /*GILLT_i64*//*Label 792*/ GIMT_Encode4(27305),
9496 /* 27255 */ // Label 791: @27255
9497 /* 27255 */ GIM_Try, /*On fail goto*//*Label 794*/ GIMT_Encode4(27304), // Rule ID 12 //
9498 /* 27260 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
9499 /* 27263 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
9500 /* 27266 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9501 /* 27270 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9502 /* 27274 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
9503 /* 27278 */ // MIs[1] Operand 1
9504 /* 27278 */ // No operand predicates
9505 /* 27278 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9506 /* 27282 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9507 /* 27284 */ // (intrinsic_w_chain:{ *:[i32] } 14922:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags, I32:{ *:[i32] }:$delta) => (anonymous_14865MEMORY_GROW_A32:{ *:[i32] } (imm:{ *:[i32] }):$flags, I32:{ *:[i32] }:$delta)
9508 /* 27284 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_14865MEMORY_GROW_A32),
9509 /* 27287 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9510 /* 27289 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
9511 /* 27292 */ GIR_RootToRootCopy, /*OpIdx*/3, // delta
9512 /* 27294 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9513 /* 27297 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
9514 /* 27302 */ GIR_RootConstrainSelectedInstOperands,
9515 /* 27303 */ // GIR_Coverage, 12,
9516 /* 27303 */ GIR_EraseRootFromParent_Done,
9517 /* 27304 */ // Label 794: @27304
9518 /* 27304 */ GIM_Reject,
9519 /* 27305 */ // Label 792: @27305
9520 /* 27305 */ GIM_Try, /*On fail goto*//*Label 795*/ GIMT_Encode4(27354), // Rule ID 14 //
9521 /* 27310 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
9522 /* 27313 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i64,
9523 /* 27316 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9524 /* 27320 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9525 /* 27324 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
9526 /* 27328 */ // MIs[1] Operand 1
9527 /* 27328 */ // No operand predicates
9528 /* 27328 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9529 /* 27332 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9530 /* 27334 */ // (intrinsic_w_chain:{ *:[i64] } 14922:{ *:[iPTR] }, (imm:{ *:[i32] }):$flags, I64:{ *:[i64] }:$delta) => (anonymous_14866MEMORY_GROW_A64:{ *:[i64] } (imm:{ *:[i32] }):$flags, I64:{ *:[i64] }:$delta)
9531 /* 27334 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::anonymous_14866MEMORY_GROW_A64),
9532 /* 27337 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9533 /* 27339 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // flags
9534 /* 27342 */ GIR_RootToRootCopy, /*OpIdx*/3, // delta
9535 /* 27344 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9536 /* 27347 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
9537 /* 27352 */ GIR_RootConstrainSelectedInstOperands,
9538 /* 27353 */ // GIR_Coverage, 14,
9539 /* 27353 */ GIR_EraseRootFromParent_Done,
9540 /* 27354 */ // Label 795: @27354
9541 /* 27354 */ GIM_Reject,
9542 /* 27355 */ // Label 793: @27355
9543 /* 27355 */ GIM_Reject,
9544 /* 27356 */ // Label 790: @27356
9545 /* 27356 */ GIM_Reject,
9546 /* 27357 */ // Label 786: @27357
9547 /* 27357 */ GIM_Try, /*On fail goto*//*Label 796*/ GIMT_Encode4(27765),
9548 /* 27362 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
9549 /* 27365 */ GIM_Try, /*On fail goto*//*Label 797*/ GIMT_Encode4(27501),
9550 /* 27370 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_memory_atomic_wait32),
9551 /* 27375 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
9552 /* 27378 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
9553 /* 27381 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_i64,
9554 /* 27384 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9555 /* 27388 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 798*/ GIMT_Encode4(27444), GIMT_Encode2(GIFBS_HasAddr32_HasAtomics), // Rule ID 661 //
9556 /* 27395 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/32,
9557 /* 27399 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9558 /* 27403 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
9559 /* 27410 */ // (intrinsic_w_chain:{ *:[i32] } 14918:{ *:[iPTR] }, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr), i32:{ *:[i32] }:$exp, I64:{ *:[i64] }:$timeout) => (MEMORY_ATOMIC_WAIT32_A32:{ *:[i32] } 0:{ *:[i32] }, 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, ?:{ *:[i32] }:$addr, ?:{ *:[i32] }:$exp, ?:{ *:[i64] }:$timeout)
9560 /* 27410 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MEMORY_ATOMIC_WAIT32_A32),
9561 /* 27413 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9562 /* 27415 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9563 /* 27418 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9564 /* 27421 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
9565 /* 27426 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
9566 /* 27431 */ GIR_RootToRootCopy, /*OpIdx*/3, // exp
9567 /* 27433 */ GIR_RootToRootCopy, /*OpIdx*/4, // timeout
9568 /* 27435 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9569 /* 27438 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9570 /* 27442 */ GIR_RootConstrainSelectedInstOperands,
9571 /* 27443 */ // GIR_Coverage, 661,
9572 /* 27443 */ GIR_EraseRootFromParent_Done,
9573 /* 27444 */ // Label 798: @27444
9574 /* 27444 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 799*/ GIMT_Encode4(27500), GIMT_Encode2(GIFBS_HasAddr64_HasAtomics), // Rule ID 662 //
9575 /* 27451 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/64,
9576 /* 27455 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9577 /* 27459 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
9578 /* 27466 */ // (intrinsic_w_chain:{ *:[i32] } 14918:{ *:[iPTR] }, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr), i32:{ *:[i32] }:$exp, I64:{ *:[i64] }:$timeout) => (MEMORY_ATOMIC_WAIT32_A64:{ *:[i32] } 0:{ *:[i32] }, 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, ?:{ *:[i64] }:$addr, ?:{ *:[i32] }:$exp, ?:{ *:[i64] }:$timeout)
9579 /* 27466 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MEMORY_ATOMIC_WAIT32_A64),
9580 /* 27469 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9581 /* 27471 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9582 /* 27474 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9583 /* 27477 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
9584 /* 27482 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
9585 /* 27487 */ GIR_RootToRootCopy, /*OpIdx*/3, // exp
9586 /* 27489 */ GIR_RootToRootCopy, /*OpIdx*/4, // timeout
9587 /* 27491 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9588 /* 27494 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9589 /* 27498 */ GIR_RootConstrainSelectedInstOperands,
9590 /* 27499 */ // GIR_Coverage, 662,
9591 /* 27499 */ GIR_EraseRootFromParent_Done,
9592 /* 27500 */ // Label 799: @27500
9593 /* 27500 */ GIM_Reject,
9594 /* 27501 */ // Label 797: @27501
9595 /* 27501 */ GIM_Try, /*On fail goto*//*Label 800*/ GIMT_Encode4(27637),
9596 /* 27506 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_memory_atomic_wait64),
9597 /* 27511 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i32,
9598 /* 27514 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i64,
9599 /* 27517 */ GIM_RootCheckType, /*Op*/4, /*Type*/GILLT_i64,
9600 /* 27520 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9601 /* 27524 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 801*/ GIMT_Encode4(27580), GIMT_Encode2(GIFBS_HasAddr32_HasAtomics), // Rule ID 663 //
9602 /* 27531 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/32,
9603 /* 27535 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9604 /* 27539 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
9605 /* 27546 */ // (intrinsic_w_chain:{ *:[i32] } 14919:{ *:[iPTR] }, (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr), i64:{ *:[i64] }:$exp, I64:{ *:[i64] }:$timeout) => (MEMORY_ATOMIC_WAIT64_A32:{ *:[i32] } 0:{ *:[i32] }, 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, ?:{ *:[i32] }:$addr, ?:{ *:[i64] }:$exp, ?:{ *:[i64] }:$timeout)
9606 /* 27546 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MEMORY_ATOMIC_WAIT64_A32),
9607 /* 27549 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9608 /* 27551 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9609 /* 27554 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9610 /* 27557 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
9611 /* 27562 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
9612 /* 27567 */ GIR_RootToRootCopy, /*OpIdx*/3, // exp
9613 /* 27569 */ GIR_RootToRootCopy, /*OpIdx*/4, // timeout
9614 /* 27571 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9615 /* 27574 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9616 /* 27578 */ GIR_RootConstrainSelectedInstOperands,
9617 /* 27579 */ // GIR_Coverage, 663,
9618 /* 27579 */ GIR_EraseRootFromParent_Done,
9619 /* 27580 */ // Label 801: @27580
9620 /* 27580 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 802*/ GIMT_Encode4(27636), GIMT_Encode2(GIFBS_HasAddr64_HasAtomics), // Rule ID 664 //
9621 /* 27587 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/64,
9622 /* 27591 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9623 /* 27595 */ GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
9624 /* 27602 */ // (intrinsic_w_chain:{ *:[i32] } 14919:{ *:[iPTR] }, (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr), i64:{ *:[i64] }:$exp, I64:{ *:[i64] }:$timeout) => (MEMORY_ATOMIC_WAIT64_A64:{ *:[i32] } 0:{ *:[i32] }, 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, ?:{ *:[i64] }:$addr, ?:{ *:[i64] }:$exp, ?:{ *:[i64] }:$timeout)
9625 /* 27602 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MEMORY_ATOMIC_WAIT64_A64),
9626 /* 27605 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9627 /* 27607 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9628 /* 27610 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
9629 /* 27613 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
9630 /* 27618 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
9631 /* 27623 */ GIR_RootToRootCopy, /*OpIdx*/3, // exp
9632 /* 27625 */ GIR_RootToRootCopy, /*OpIdx*/4, // timeout
9633 /* 27627 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9634 /* 27630 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9635 /* 27634 */ GIR_RootConstrainSelectedInstOperands,
9636 /* 27635 */ // GIR_Coverage, 664,
9637 /* 27635 */ GIR_EraseRootFromParent_Done,
9638 /* 27636 */ // Label 802: @27636
9639 /* 27636 */ GIM_Reject,
9640 /* 27637 */ // Label 800: @27637
9641 /* 27637 */ GIM_Try, /*On fail goto*//*Label 803*/ GIMT_Encode4(27764),
9642 /* 27642 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::wasm_memory_fill),
9643 /* 27647 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
9644 /* 27650 */ GIM_SwitchType, /*MI*/0, /*Op*/4, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 806*/ GIMT_Encode4(27763),
9645 /* 27661 */ /*GILLT_i32*//*Label 804*/ GIMT_Encode4(27669),
9646 /* 27665 */ /*GILLT_i64*//*Label 805*/ GIMT_Encode4(27716),
9647 /* 27669 */ // Label 804: @27669
9648 /* 27669 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 807*/ GIMT_Encode4(27715), GIMT_Encode2(GIFBS_HasBulkMemoryOpt), // Rule ID 439 //
9649 /* 27676 */ // MIs[0] idx
9650 /* 27676 */ GIM_CheckIsImm, /*MI*/0, /*Op*/1,
9651 /* 27679 */ // MIs[0] dst
9652 /* 27679 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/32,
9653 /* 27683 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9654 /* 27687 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9655 /* 27691 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9656 /* 27695 */ // (intrinsic_void 14921:{ *:[iPTR] }, (timm:{ *:[i32] }):$idx, I32:{ *:[i32] }:$dst, I32:{ *:[i32] }:$value, I32:{ *:[i32] }:$size) => (MEMORY_FILL_A32 (timm:{ *:[i32] }):$idx, I32:{ *:[i32] }:$dst, I32:{ *:[i32] }:$value, I32:{ *:[i32] }:$size)
9657 /* 27695 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MEMORY_FILL_A32),
9658 /* 27698 */ GIR_RootToRootCopy, /*OpIdx*/1, // idx
9659 /* 27700 */ GIR_RootToRootCopy, /*OpIdx*/2, // dst
9660 /* 27702 */ GIR_RootToRootCopy, /*OpIdx*/3, // value
9661 /* 27704 */ GIR_RootToRootCopy, /*OpIdx*/4, // size
9662 /* 27706 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9663 /* 27709 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9664 /* 27713 */ GIR_RootConstrainSelectedInstOperands,
9665 /* 27714 */ // GIR_Coverage, 439,
9666 /* 27714 */ GIR_EraseRootFromParent_Done,
9667 /* 27715 */ // Label 807: @27715
9668 /* 27715 */ GIM_Reject,
9669 /* 27716 */ // Label 805: @27716
9670 /* 27716 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 808*/ GIMT_Encode4(27762), GIMT_Encode2(GIFBS_HasBulkMemoryOpt), // Rule ID 441 //
9671 /* 27723 */ // MIs[0] idx
9672 /* 27723 */ GIM_CheckIsImm, /*MI*/0, /*Op*/1,
9673 /* 27726 */ // MIs[0] dst
9674 /* 27726 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/2, /*SizeInBits*/64,
9675 /* 27730 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9676 /* 27734 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9677 /* 27738 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9678 /* 27742 */ // (intrinsic_void 14921:{ *:[iPTR] }, (timm:{ *:[i32] }):$idx, I64:{ *:[i64] }:$dst, I32:{ *:[i32] }:$value, I64:{ *:[i64] }:$size) => (MEMORY_FILL_A64 (timm:{ *:[i32] }):$idx, I64:{ *:[i64] }:$dst, I32:{ *:[i32] }:$value, I64:{ *:[i64] }:$size)
9679 /* 27742 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MEMORY_FILL_A64),
9680 /* 27745 */ GIR_RootToRootCopy, /*OpIdx*/1, // idx
9681 /* 27747 */ GIR_RootToRootCopy, /*OpIdx*/2, // dst
9682 /* 27749 */ GIR_RootToRootCopy, /*OpIdx*/3, // value
9683 /* 27751 */ GIR_RootToRootCopy, /*OpIdx*/4, // size
9684 /* 27753 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9685 /* 27756 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9686 /* 27760 */ GIR_RootConstrainSelectedInstOperands,
9687 /* 27761 */ // GIR_Coverage, 441,
9688 /* 27761 */ GIR_EraseRootFromParent_Done,
9689 /* 27762 */ // Label 808: @27762
9690 /* 27762 */ GIM_Reject,
9691 /* 27763 */ // Label 806: @27763
9692 /* 27763 */ GIM_Reject,
9693 /* 27764 */ // Label 803: @27764
9694 /* 27764 */ GIM_Reject,
9695 /* 27765 */ // Label 796: @27765
9696 /* 27765 */ GIM_Try, /*On fail goto*//*Label 809*/ GIMT_Encode4(27910),
9697 /* 27770 */ GIM_CheckNumOperands, /*MI*/0, /*Expected*/6,
9698 /* 27773 */ GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, GIMT_Encode2(Intrinsic::wasm_memory_copy),
9699 /* 27778 */ GIM_SwitchType, /*MI*/0, /*Op*/5, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 812*/ GIMT_Encode4(27909),
9700 /* 27789 */ /*GILLT_i32*//*Label 810*/ GIMT_Encode4(27797),
9701 /* 27793 */ /*GILLT_i64*//*Label 811*/ GIMT_Encode4(27853),
9702 /* 27797 */ // Label 810: @27797
9703 /* 27797 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 813*/ GIMT_Encode4(27852), GIMT_Encode2(GIFBS_HasBulkMemoryOpt), // Rule ID 438 //
9704 /* 27804 */ // MIs[0] dst_idx
9705 /* 27804 */ GIM_CheckIsImm, /*MI*/0, /*Op*/1,
9706 /* 27807 */ // MIs[0] src_idx
9707 /* 27807 */ GIM_CheckIsImm, /*MI*/0, /*Op*/2,
9708 /* 27810 */ // MIs[0] dst
9709 /* 27810 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/3, /*SizeInBits*/32,
9710 /* 27814 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9711 /* 27818 */ // MIs[0] src
9712 /* 27818 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/4, /*SizeInBits*/32,
9713 /* 27822 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9714 /* 27826 */ GIM_RootCheckRegBankForClass, /*Op*/5, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9715 /* 27830 */ // (intrinsic_void 14920:{ *:[iPTR] }, (timm:{ *:[i32] }):$dst_idx, (timm:{ *:[i32] }):$src_idx, I32:{ *:[i32] }:$dst, I32:{ *:[i32] }:$src, I32:{ *:[i32] }:$len) => (MEMORY_COPY_A32 (timm:{ *:[i32] }):$dst_idx, (timm:{ *:[i32] }):$src_idx, I32:{ *:[i32] }:$dst, I32:{ *:[i32] }:$src, I32:{ *:[i32] }:$len)
9716 /* 27830 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MEMORY_COPY_A32),
9717 /* 27833 */ GIR_RootToRootCopy, /*OpIdx*/1, // dst_idx
9718 /* 27835 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_idx
9719 /* 27837 */ GIR_RootToRootCopy, /*OpIdx*/3, // dst
9720 /* 27839 */ GIR_RootToRootCopy, /*OpIdx*/4, // src
9721 /* 27841 */ GIR_RootToRootCopy, /*OpIdx*/5, // len
9722 /* 27843 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9723 /* 27846 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9724 /* 27850 */ GIR_RootConstrainSelectedInstOperands,
9725 /* 27851 */ // GIR_Coverage, 438,
9726 /* 27851 */ GIR_EraseRootFromParent_Done,
9727 /* 27852 */ // Label 813: @27852
9728 /* 27852 */ GIM_Reject,
9729 /* 27853 */ // Label 811: @27853
9730 /* 27853 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 814*/ GIMT_Encode4(27908), GIMT_Encode2(GIFBS_HasBulkMemoryOpt), // Rule ID 440 //
9731 /* 27860 */ // MIs[0] dst_idx
9732 /* 27860 */ GIM_CheckIsImm, /*MI*/0, /*Op*/1,
9733 /* 27863 */ // MIs[0] src_idx
9734 /* 27863 */ GIM_CheckIsImm, /*MI*/0, /*Op*/2,
9735 /* 27866 */ // MIs[0] dst
9736 /* 27866 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/3, /*SizeInBits*/64,
9737 /* 27870 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9738 /* 27874 */ // MIs[0] src
9739 /* 27874 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/4, /*SizeInBits*/64,
9740 /* 27878 */ GIM_RootCheckRegBankForClass, /*Op*/4, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9741 /* 27882 */ GIM_RootCheckRegBankForClass, /*Op*/5, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9742 /* 27886 */ // (intrinsic_void 14920:{ *:[iPTR] }, (timm:{ *:[i32] }):$dst_idx, (timm:{ *:[i32] }):$src_idx, I64:{ *:[i64] }:$dst, I64:{ *:[i64] }:$src, I64:{ *:[i64] }:$len) => (MEMORY_COPY_A64 (timm:{ *:[i32] }):$dst_idx, (timm:{ *:[i32] }):$src_idx, I64:{ *:[i64] }:$dst, I64:{ *:[i64] }:$src, I64:{ *:[i64] }:$len)
9743 /* 27886 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MEMORY_COPY_A64),
9744 /* 27889 */ GIR_RootToRootCopy, /*OpIdx*/1, // dst_idx
9745 /* 27891 */ GIR_RootToRootCopy, /*OpIdx*/2, // src_idx
9746 /* 27893 */ GIR_RootToRootCopy, /*OpIdx*/3, // dst
9747 /* 27895 */ GIR_RootToRootCopy, /*OpIdx*/4, // src
9748 /* 27897 */ GIR_RootToRootCopy, /*OpIdx*/5, // len
9749 /* 27899 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9750 /* 27902 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/1, /*MergeInsnID's*/0,
9751 /* 27906 */ GIR_RootConstrainSelectedInstOperands,
9752 /* 27907 */ // GIR_Coverage, 440,
9753 /* 27907 */ GIR_EraseRootFromParent_Done,
9754 /* 27908 */ // Label 814: @27908
9755 /* 27908 */ GIM_Reject,
9756 /* 27909 */ // Label 812: @27909
9757 /* 27909 */ GIM_Reject,
9758 /* 27910 */ // Label 809: @27910
9759 /* 27910 */ GIM_Reject,
9760 /* 27911 */ // Label 25: @27911
9761 /* 27911 */ GIM_Try, /*On fail goto*//*Label 815*/ GIMT_Encode4(27943), // Rule ID 601 //
9762 /* 27916 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
9763 /* 27919 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
9764 /* 27922 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9765 /* 27926 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9766 /* 27930 */ // (anyext:{ *:[i64] } I32:{ *:[i32] }:$src) => (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$src)
9767 /* 27930 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
9768 /* 27935 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9769 /* 27941 */ GIR_RootConstrainSelectedInstOperands,
9770 /* 27942 */ // GIR_Coverage, 601,
9771 /* 27942 */ GIR_Done,
9772 /* 27943 */ // Label 815: @27943
9773 /* 27943 */ GIM_Reject,
9774 /* 27944 */ // Label 26: @27944
9775 /* 27944 */ GIM_Try, /*On fail goto*//*Label 816*/ GIMT_Encode4(27976), // Rule ID 26 //
9776 /* 27949 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32,
9777 /* 27952 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
9778 /* 27955 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9779 /* 27959 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9780 /* 27963 */ // (trunc:{ *:[i32] } I64:{ *:[i64] }:$src) => (I32_WRAP_I64:{ *:[i32] } I64:{ *:[i64] }:$src)
9781 /* 27963 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_WRAP_I64),
9782 /* 27968 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9783 /* 27974 */ GIR_RootConstrainSelectedInstOperands,
9784 /* 27975 */ // GIR_Coverage, 26,
9785 /* 27975 */ GIR_Done,
9786 /* 27976 */ // Label 816: @27976
9787 /* 27976 */ GIM_Reject,
9788 /* 27977 */ // Label 27: @27977
9789 /* 27977 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 819*/ GIMT_Encode4(28042),
9790 /* 27988 */ /*GILLT_s32*//*Label 817*/ GIMT_Encode4(27996),
9791 /* 27992 */ /*GILLT_s64*//*Label 818*/ GIMT_Encode4(28019),
9792 /* 27996 */ // Label 817: @27996
9793 /* 27996 */ GIM_Try, /*On fail goto*//*Label 820*/ GIMT_Encode4(28018), // Rule ID 7 //
9794 /* 28001 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9795 /* 28005 */ // MIs[0] Operand 1
9796 /* 28005 */ // No operand predicates
9797 /* 28005 */ // (imm:{ *:[i32] }):$imm => (CONST_I32:{ *:[i32] } (imm:{ *:[i32] }):$imm)
9798 /* 28005 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_I32),
9799 /* 28008 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
9800 /* 28010 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
9801 /* 28013 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9802 /* 28016 */ GIR_RootConstrainSelectedInstOperands,
9803 /* 28017 */ // GIR_Coverage, 7,
9804 /* 28017 */ GIR_EraseRootFromParent_Done,
9805 /* 28018 */ // Label 820: @28018
9806 /* 28018 */ GIM_Reject,
9807 /* 28019 */ // Label 818: @28019
9808 /* 28019 */ GIM_Try, /*On fail goto*//*Label 821*/ GIMT_Encode4(28041), // Rule ID 8 //
9809 /* 28024 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9810 /* 28028 */ // MIs[0] Operand 1
9811 /* 28028 */ // No operand predicates
9812 /* 28028 */ // (imm:{ *:[i64] }):$imm => (CONST_I64:{ *:[i64] } (imm:{ *:[i64] }):$imm)
9813 /* 28028 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_I64),
9814 /* 28031 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
9815 /* 28033 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
9816 /* 28036 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9817 /* 28039 */ GIR_RootConstrainSelectedInstOperands,
9818 /* 28040 */ // GIR_Coverage, 8,
9819 /* 28040 */ GIR_EraseRootFromParent_Done,
9820 /* 28041 */ // Label 821: @28041
9821 /* 28041 */ GIM_Reject,
9822 /* 28042 */ // Label 819: @28042
9823 /* 28042 */ GIM_Reject,
9824 /* 28043 */ // Label 28: @28043
9825 /* 28043 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(0), GIMT_Encode2(2), /*)*//*default:*//*Label 824*/ GIMT_Encode4(28108),
9826 /* 28054 */ /*GILLT_s32*//*Label 822*/ GIMT_Encode4(28062),
9827 /* 28058 */ /*GILLT_s64*//*Label 823*/ GIMT_Encode4(28085),
9828 /* 28062 */ // Label 822: @28062
9829 /* 28062 */ GIM_Try, /*On fail goto*//*Label 825*/ GIMT_Encode4(28084), // Rule ID 9 //
9830 /* 28067 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
9831 /* 28071 */ // MIs[0] Operand 1
9832 /* 28071 */ // No operand predicates
9833 /* 28071 */ // (fpimm:{ *:[f32] }):$imm => (CONST_F32:{ *:[f32] } (fpimm:{ *:[f32] }):$imm)
9834 /* 28071 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_F32),
9835 /* 28074 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
9836 /* 28076 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
9837 /* 28079 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9838 /* 28082 */ GIR_RootConstrainSelectedInstOperands,
9839 /* 28083 */ // GIR_Coverage, 9,
9840 /* 28083 */ GIR_EraseRootFromParent_Done,
9841 /* 28084 */ // Label 825: @28084
9842 /* 28084 */ GIM_Reject,
9843 /* 28085 */ // Label 823: @28085
9844 /* 28085 */ GIM_Try, /*On fail goto*//*Label 826*/ GIMT_Encode4(28107), // Rule ID 10 //
9845 /* 28090 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
9846 /* 28094 */ // MIs[0] Operand 1
9847 /* 28094 */ // No operand predicates
9848 /* 28094 */ // (fpimm:{ *:[f64] }):$imm => (CONST_F64:{ *:[f64] } (fpimm:{ *:[f64] }):$imm)
9849 /* 28094 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_F64),
9850 /* 28097 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[res]
9851 /* 28099 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm
9852 /* 28102 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9853 /* 28105 */ GIR_RootConstrainSelectedInstOperands,
9854 /* 28106 */ // GIR_Coverage, 10,
9855 /* 28106 */ GIR_EraseRootFromParent_Done,
9856 /* 28107 */ // Label 826: @28107
9857 /* 28107 */ GIM_Reject,
9858 /* 28108 */ // Label 824: @28108
9859 /* 28108 */ GIM_Reject,
9860 /* 28109 */ // Label 29: @28109
9861 /* 28109 */ GIM_Try, /*On fail goto*//*Label 827*/ GIMT_Encode4(28141), // Rule ID 27 //
9862 /* 28114 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
9863 /* 28117 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
9864 /* 28120 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9865 /* 28124 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9866 /* 28128 */ // (sext:{ *:[i64] } I32:{ *:[i32] }:$src) => (I64_EXTEND_S_I32:{ *:[i64] } I32:{ *:[i32] }:$src)
9867 /* 28128 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_S_I32),
9868 /* 28133 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9869 /* 28139 */ GIR_RootConstrainSelectedInstOperands,
9870 /* 28140 */ // GIR_Coverage, 27,
9871 /* 28140 */ GIR_Done,
9872 /* 28141 */ // Label 827: @28141
9873 /* 28141 */ GIM_Reject,
9874 /* 28142 */ // Label 30: @28142
9875 /* 28142 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 830*/ GIMT_Encode4(28347),
9876 /* 28153 */ /*GILLT_i32*//*Label 828*/ GIMT_Encode4(28161),
9877 /* 28157 */ /*GILLT_i64*//*Label 829*/ GIMT_Encode4(28239),
9878 /* 28161 */ // Label 828: @28161
9879 /* 28161 */ GIM_Try, /*On fail goto*//*Label 831*/ GIMT_Encode4(28238),
9880 /* 28166 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
9881 /* 28169 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9882 /* 28173 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9883 /* 28177 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 832*/ GIMT_Encode4(28207), GIMT_Encode2(GIFBS_HasSignExt), // Rule ID 29 //
9884 /* 28184 */ // MIs[0] Operand 2
9885 /* 28184 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(8),
9886 /* 28195 */ // (sext_inreg:{ *:[i32] } I32:{ *:[i32] }:$src, i8:{ *:[Other] }) => (I32_EXTEND8_S_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
9887 /* 28195 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_EXTEND8_S_I32),
9888 /* 28198 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9889 /* 28200 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
9890 /* 28202 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9891 /* 28205 */ GIR_RootConstrainSelectedInstOperands,
9892 /* 28206 */ // GIR_Coverage, 29,
9893 /* 28206 */ GIR_EraseRootFromParent_Done,
9894 /* 28207 */ // Label 832: @28207
9895 /* 28207 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 833*/ GIMT_Encode4(28237), GIMT_Encode2(GIFBS_HasSignExt), // Rule ID 30 //
9896 /* 28214 */ // MIs[0] Operand 2
9897 /* 28214 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(16),
9898 /* 28225 */ // (sext_inreg:{ *:[i32] } I32:{ *:[i32] }:$src, i16:{ *:[Other] }) => (I32_EXTEND16_S_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
9899 /* 28225 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I32_EXTEND16_S_I32),
9900 /* 28228 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9901 /* 28230 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
9902 /* 28232 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9903 /* 28235 */ GIR_RootConstrainSelectedInstOperands,
9904 /* 28236 */ // GIR_Coverage, 30,
9905 /* 28236 */ GIR_EraseRootFromParent_Done,
9906 /* 28237 */ // Label 833: @28237
9907 /* 28237 */ GIM_Reject,
9908 /* 28238 */ // Label 831: @28238
9909 /* 28238 */ GIM_Reject,
9910 /* 28239 */ // Label 829: @28239
9911 /* 28239 */ GIM_Try, /*On fail goto*//*Label 834*/ GIMT_Encode4(28346),
9912 /* 28244 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
9913 /* 28247 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9914 /* 28251 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9915 /* 28255 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 835*/ GIMT_Encode4(28285), GIMT_Encode2(GIFBS_HasSignExt), // Rule ID 31 //
9916 /* 28262 */ // MIs[0] Operand 2
9917 /* 28262 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(8),
9918 /* 28273 */ // (sext_inreg:{ *:[i64] } I64:{ *:[i64] }:$src, i8:{ *:[Other] }) => (I64_EXTEND8_S_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
9919 /* 28273 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND8_S_I64),
9920 /* 28276 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9921 /* 28278 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
9922 /* 28280 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9923 /* 28283 */ GIR_RootConstrainSelectedInstOperands,
9924 /* 28284 */ // GIR_Coverage, 31,
9925 /* 28284 */ GIR_EraseRootFromParent_Done,
9926 /* 28285 */ // Label 835: @28285
9927 /* 28285 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 836*/ GIMT_Encode4(28315), GIMT_Encode2(GIFBS_HasSignExt), // Rule ID 32 //
9928 /* 28292 */ // MIs[0] Operand 2
9929 /* 28292 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(16),
9930 /* 28303 */ // (sext_inreg:{ *:[i64] } I64:{ *:[i64] }:$src, i16:{ *:[Other] }) => (I64_EXTEND16_S_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
9931 /* 28303 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND16_S_I64),
9932 /* 28306 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9933 /* 28308 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
9934 /* 28310 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9935 /* 28313 */ GIR_RootConstrainSelectedInstOperands,
9936 /* 28314 */ // GIR_Coverage, 32,
9937 /* 28314 */ GIR_EraseRootFromParent_Done,
9938 /* 28315 */ // Label 836: @28315
9939 /* 28315 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 837*/ GIMT_Encode4(28345), GIMT_Encode2(GIFBS_HasSignExt), // Rule ID 33 //
9940 /* 28322 */ // MIs[0] Operand 2
9941 /* 28322 */ GIM_CheckLiteralInt, /*MI*/0, /*Op*/2, GIMT_Encode8(32),
9942 /* 28333 */ // (sext_inreg:{ *:[i64] } I64:{ *:[i64] }:$src, i32:{ *:[Other] }) => (I64_EXTEND32_S_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
9943 /* 28333 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND32_S_I64),
9944 /* 28336 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9945 /* 28338 */ GIR_RootToRootCopy, /*OpIdx*/1, // src
9946 /* 28340 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9947 /* 28343 */ GIR_RootConstrainSelectedInstOperands,
9948 /* 28344 */ // GIR_Coverage, 33,
9949 /* 28344 */ GIR_EraseRootFromParent_Done,
9950 /* 28345 */ // Label 837: @28345
9951 /* 28345 */ GIM_Reject,
9952 /* 28346 */ // Label 834: @28346
9953 /* 28346 */ GIM_Reject,
9954 /* 28347 */ // Label 830: @28347
9955 /* 28347 */ GIM_Reject,
9956 /* 28348 */ // Label 31: @28348
9957 /* 28348 */ GIM_Try, /*On fail goto*//*Label 838*/ GIMT_Encode4(28380), // Rule ID 28 //
9958 /* 28353 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_i64,
9959 /* 28356 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
9960 /* 28359 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
9961 /* 28363 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9962 /* 28367 */ // (zext:{ *:[i64] } I32:{ *:[i32] }:$src) => (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$src)
9963 /* 28367 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
9964 /* 28372 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
9965 /* 28378 */ GIR_RootConstrainSelectedInstOperands,
9966 /* 28379 */ // GIR_Coverage, 28,
9967 /* 28379 */ GIR_Done,
9968 /* 28380 */ // Label 838: @28380
9969 /* 28380 */ GIM_Reject,
9970 /* 28381 */ // Label 32: @28381
9971 /* 28381 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 841*/ GIMT_Encode4(28678),
9972 /* 28392 */ /*GILLT_i32*//*Label 839*/ GIMT_Encode4(28400),
9973 /* 28396 */ /*GILLT_i64*//*Label 840*/ GIMT_Encode4(28495),
9974 /* 28400 */ // Label 839: @28400
9975 /* 28400 */ GIM_Try, /*On fail goto*//*Label 842*/ GIMT_Encode4(28494),
9976 /* 28405 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
9977 /* 28408 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
9978 /* 28411 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9979 /* 28415 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9980 /* 28419 */ GIM_Try, /*On fail goto*//*Label 843*/ GIMT_Encode4(28471), // Rule ID 618 //
9981 /* 28424 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9982 /* 28428 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
9983 /* 28432 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
9984 /* 28436 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
9985 /* 28440 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
9986 /* 28444 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
9987 /* 28449 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
9988 /* 28453 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
9989 /* 28455 */ // (shl:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (SHL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
9990 /* 28455 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I32),
9991 /* 28458 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
9992 /* 28460 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
9993 /* 28462 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
9994 /* 28466 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
9995 /* 28469 */ GIR_RootConstrainSelectedInstOperands,
9996 /* 28470 */ // GIR_Coverage, 618,
9997 /* 28470 */ GIR_EraseRootFromParent_Done,
9998 /* 28471 */ // Label 843: @28471
9999 /* 28471 */ GIM_Try, /*On fail goto*//*Label 844*/ GIMT_Encode4(28493), // Rule ID 84 //
10000 /* 28476 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10001 /* 28480 */ // (shl:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SHL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10002 /* 28480 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I32),
10003 /* 28485 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
10004 /* 28491 */ GIR_RootConstrainSelectedInstOperands,
10005 /* 28492 */ // GIR_Coverage, 84,
10006 /* 28492 */ GIR_Done,
10007 /* 28493 */ // Label 844: @28493
10008 /* 28493 */ GIM_Reject,
10009 /* 28494 */ // Label 842: @28494
10010 /* 28494 */ GIM_Reject,
10011 /* 28495 */ // Label 840: @28495
10012 /* 28495 */ GIM_Try, /*On fail goto*//*Label 845*/ GIMT_Encode4(28677),
10013 /* 28500 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
10014 /* 28503 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
10015 /* 28506 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10016 /* 28510 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10017 /* 28514 */ GIM_Try, /*On fail goto*//*Label 846*/ GIMT_Encode4(28602), // Rule ID 628 //
10018 /* 28519 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10019 /* 28523 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ZEXT),
10020 /* 28527 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i64,
10021 /* 28531 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
10022 /* 28535 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
10023 /* 28539 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
10024 /* 28543 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_i32,
10025 /* 28547 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_i32,
10026 /* 28551 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_i32,
10027 /* 28555 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10028 /* 28560 */ GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 63,
10029 /* 28564 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
10030 /* 28566 */ // (shl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (zext:{ *:[i64] } (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 63:{ *:[i32] }))) => (SHL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$rhs))
10031 /* 28566 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i64,
10032 /* 28569 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
10033 /* 28573 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10034 /* 28578 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/2, /*OpIdx*/1, // rhs
10035 /* 28582 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10036 /* 28585 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10037 /* 28587 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I64),
10038 /* 28590 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10039 /* 28592 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
10040 /* 28594 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10041 /* 28597 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10042 /* 28600 */ GIR_RootConstrainSelectedInstOperands,
10043 /* 28601 */ // GIR_Coverage, 628,
10044 /* 28601 */ GIR_EraseRootFromParent_Done,
10045 /* 28602 */ // Label 846: @28602
10046 /* 28602 */ GIM_Try, /*On fail goto*//*Label 847*/ GIMT_Encode4(28654), // Rule ID 621 //
10047 /* 28607 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10048 /* 28611 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
10049 /* 28615 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i64,
10050 /* 28619 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i64,
10051 /* 28623 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i64,
10052 /* 28627 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10053 /* 28632 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
10054 /* 28636 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10055 /* 28638 */ // (shl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (SHL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10056 /* 28638 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I64),
10057 /* 28641 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10058 /* 28643 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
10059 /* 28645 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
10060 /* 28649 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10061 /* 28652 */ GIR_RootConstrainSelectedInstOperands,
10062 /* 28653 */ // GIR_Coverage, 621,
10063 /* 28653 */ GIR_EraseRootFromParent_Done,
10064 /* 28654 */ // Label 847: @28654
10065 /* 28654 */ GIM_Try, /*On fail goto*//*Label 848*/ GIMT_Encode4(28676), // Rule ID 85 //
10066 /* 28659 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10067 /* 28663 */ // (shl:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SHL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10068 /* 28663 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHL_I64),
10069 /* 28668 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
10070 /* 28674 */ GIR_RootConstrainSelectedInstOperands,
10071 /* 28675 */ // GIR_Coverage, 85,
10072 /* 28675 */ GIR_Done,
10073 /* 28676 */ // Label 848: @28676
10074 /* 28676 */ GIM_Reject,
10075 /* 28677 */ // Label 845: @28677
10076 /* 28677 */ GIM_Reject,
10077 /* 28678 */ // Label 841: @28678
10078 /* 28678 */ GIM_Reject,
10079 /* 28679 */ // Label 33: @28679
10080 /* 28679 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 851*/ GIMT_Encode4(28976),
10081 /* 28690 */ /*GILLT_i32*//*Label 849*/ GIMT_Encode4(28698),
10082 /* 28694 */ /*GILLT_i64*//*Label 850*/ GIMT_Encode4(28793),
10083 /* 28698 */ // Label 849: @28698
10084 /* 28698 */ GIM_Try, /*On fail goto*//*Label 852*/ GIMT_Encode4(28792),
10085 /* 28703 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
10086 /* 28706 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
10087 /* 28709 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10088 /* 28713 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10089 /* 28717 */ GIM_Try, /*On fail goto*//*Label 853*/ GIMT_Encode4(28769), // Rule ID 620 //
10090 /* 28722 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10091 /* 28726 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
10092 /* 28730 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10093 /* 28734 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
10094 /* 28738 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10095 /* 28742 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10096 /* 28747 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
10097 /* 28751 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10098 /* 28753 */ // (srl:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (SHR_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10099 /* 28753 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I32),
10100 /* 28756 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10101 /* 28758 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
10102 /* 28760 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
10103 /* 28764 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10104 /* 28767 */ GIR_RootConstrainSelectedInstOperands,
10105 /* 28768 */ // GIR_Coverage, 620,
10106 /* 28768 */ GIR_EraseRootFromParent_Done,
10107 /* 28769 */ // Label 853: @28769
10108 /* 28769 */ GIM_Try, /*On fail goto*//*Label 854*/ GIMT_Encode4(28791), // Rule ID 88 //
10109 /* 28774 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10110 /* 28778 */ // (srl:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SHR_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10111 /* 28778 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I32),
10112 /* 28783 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
10113 /* 28789 */ GIR_RootConstrainSelectedInstOperands,
10114 /* 28790 */ // GIR_Coverage, 88,
10115 /* 28790 */ GIR_Done,
10116 /* 28791 */ // Label 854: @28791
10117 /* 28791 */ GIM_Reject,
10118 /* 28792 */ // Label 852: @28792
10119 /* 28792 */ GIM_Reject,
10120 /* 28793 */ // Label 850: @28793
10121 /* 28793 */ GIM_Try, /*On fail goto*//*Label 855*/ GIMT_Encode4(28975),
10122 /* 28798 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
10123 /* 28801 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
10124 /* 28804 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10125 /* 28808 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10126 /* 28812 */ GIM_Try, /*On fail goto*//*Label 856*/ GIMT_Encode4(28900), // Rule ID 630 //
10127 /* 28817 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10128 /* 28821 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ZEXT),
10129 /* 28825 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i64,
10130 /* 28829 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
10131 /* 28833 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
10132 /* 28837 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
10133 /* 28841 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_i32,
10134 /* 28845 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_i32,
10135 /* 28849 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_i32,
10136 /* 28853 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10137 /* 28858 */ GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 63,
10138 /* 28862 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
10139 /* 28864 */ // (srl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (zext:{ *:[i64] } (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 63:{ *:[i32] }))) => (SHR_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$rhs))
10140 /* 28864 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i64,
10141 /* 28867 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
10142 /* 28871 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10143 /* 28876 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/2, /*OpIdx*/1, // rhs
10144 /* 28880 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10145 /* 28883 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10146 /* 28885 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I64),
10147 /* 28888 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10148 /* 28890 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
10149 /* 28892 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10150 /* 28895 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10151 /* 28898 */ GIR_RootConstrainSelectedInstOperands,
10152 /* 28899 */ // GIR_Coverage, 630,
10153 /* 28899 */ GIR_EraseRootFromParent_Done,
10154 /* 28900 */ // Label 856: @28900
10155 /* 28900 */ GIM_Try, /*On fail goto*//*Label 857*/ GIMT_Encode4(28952), // Rule ID 623 //
10156 /* 28905 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10157 /* 28909 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
10158 /* 28913 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i64,
10159 /* 28917 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i64,
10160 /* 28921 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i64,
10161 /* 28925 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10162 /* 28930 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
10163 /* 28934 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10164 /* 28936 */ // (srl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (SHR_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10165 /* 28936 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I64),
10166 /* 28939 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10167 /* 28941 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
10168 /* 28943 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
10169 /* 28947 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10170 /* 28950 */ GIR_RootConstrainSelectedInstOperands,
10171 /* 28951 */ // GIR_Coverage, 623,
10172 /* 28951 */ GIR_EraseRootFromParent_Done,
10173 /* 28952 */ // Label 857: @28952
10174 /* 28952 */ GIM_Try, /*On fail goto*//*Label 858*/ GIMT_Encode4(28974), // Rule ID 89 //
10175 /* 28957 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10176 /* 28961 */ // (srl:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SHR_U_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10177 /* 28961 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_U_I64),
10178 /* 28966 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
10179 /* 28972 */ GIR_RootConstrainSelectedInstOperands,
10180 /* 28973 */ // GIR_Coverage, 89,
10181 /* 28973 */ GIR_Done,
10182 /* 28974 */ // Label 858: @28974
10183 /* 28974 */ GIM_Reject,
10184 /* 28975 */ // Label 855: @28975
10185 /* 28975 */ GIM_Reject,
10186 /* 28976 */ // Label 851: @28976
10187 /* 28976 */ GIM_Reject,
10188 /* 28977 */ // Label 34: @28977
10189 /* 28977 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 861*/ GIMT_Encode4(29274),
10190 /* 28988 */ /*GILLT_i32*//*Label 859*/ GIMT_Encode4(28996),
10191 /* 28992 */ /*GILLT_i64*//*Label 860*/ GIMT_Encode4(29091),
10192 /* 28996 */ // Label 859: @28996
10193 /* 28996 */ GIM_Try, /*On fail goto*//*Label 862*/ GIMT_Encode4(29090),
10194 /* 29001 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
10195 /* 29004 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
10196 /* 29007 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10197 /* 29011 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10198 /* 29015 */ GIM_Try, /*On fail goto*//*Label 863*/ GIMT_Encode4(29067), // Rule ID 619 //
10199 /* 29020 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10200 /* 29024 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
10201 /* 29028 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10202 /* 29032 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
10203 /* 29036 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10204 /* 29040 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10205 /* 29045 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
10206 /* 29049 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10207 /* 29051 */ // (sra:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (SHR_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10208 /* 29051 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I32),
10209 /* 29054 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10210 /* 29056 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
10211 /* 29058 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
10212 /* 29062 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10213 /* 29065 */ GIR_RootConstrainSelectedInstOperands,
10214 /* 29066 */ // GIR_Coverage, 619,
10215 /* 29066 */ GIR_EraseRootFromParent_Done,
10216 /* 29067 */ // Label 863: @29067
10217 /* 29067 */ GIM_Try, /*On fail goto*//*Label 864*/ GIMT_Encode4(29089), // Rule ID 86 //
10218 /* 29072 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10219 /* 29076 */ // (sra:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SHR_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10220 /* 29076 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I32),
10221 /* 29081 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
10222 /* 29087 */ GIR_RootConstrainSelectedInstOperands,
10223 /* 29088 */ // GIR_Coverage, 86,
10224 /* 29088 */ GIR_Done,
10225 /* 29089 */ // Label 864: @29089
10226 /* 29089 */ GIM_Reject,
10227 /* 29090 */ // Label 862: @29090
10228 /* 29090 */ GIM_Reject,
10229 /* 29091 */ // Label 860: @29091
10230 /* 29091 */ GIM_Try, /*On fail goto*//*Label 865*/ GIMT_Encode4(29273),
10231 /* 29096 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
10232 /* 29099 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
10233 /* 29102 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10234 /* 29106 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10235 /* 29110 */ GIM_Try, /*On fail goto*//*Label 866*/ GIMT_Encode4(29198), // Rule ID 629 //
10236 /* 29115 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10237 /* 29119 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ZEXT),
10238 /* 29123 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i64,
10239 /* 29127 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
10240 /* 29131 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
10241 /* 29135 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_AND),
10242 /* 29139 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_i32,
10243 /* 29143 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_i32,
10244 /* 29147 */ GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_i32,
10245 /* 29151 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10246 /* 29156 */ GIM_CheckConstantInt8, /*MI*/2, /*Op*/2, 63,
10247 /* 29160 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
10248 /* 29162 */ // (sra:{ *:[i64] } I64:{ *:[i64] }:$lhs, (zext:{ *:[i64] } (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 63:{ *:[i32] }))) => (SHR_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, (I64_EXTEND_U_I32:{ *:[i64] } I32:{ *:[i32] }:$rhs))
10249 /* 29162 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i64,
10250 /* 29165 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::I64_EXTEND_U_I32),
10251 /* 29169 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10252 /* 29174 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/2, /*OpIdx*/1, // rhs
10253 /* 29178 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10254 /* 29181 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10255 /* 29183 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I64),
10256 /* 29186 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10257 /* 29188 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
10258 /* 29190 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10259 /* 29193 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10260 /* 29196 */ GIR_RootConstrainSelectedInstOperands,
10261 /* 29197 */ // GIR_Coverage, 629,
10262 /* 29197 */ GIR_EraseRootFromParent_Done,
10263 /* 29198 */ // Label 866: @29198
10264 /* 29198 */ GIM_Try, /*On fail goto*//*Label 867*/ GIMT_Encode4(29250), // Rule ID 622 //
10265 /* 29203 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10266 /* 29207 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
10267 /* 29211 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i64,
10268 /* 29215 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i64,
10269 /* 29219 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i64,
10270 /* 29223 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10271 /* 29228 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
10272 /* 29232 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10273 /* 29234 */ // (sra:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (SHR_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10274 /* 29234 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I64),
10275 /* 29237 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10276 /* 29239 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
10277 /* 29241 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
10278 /* 29245 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10279 /* 29248 */ GIR_RootConstrainSelectedInstOperands,
10280 /* 29249 */ // GIR_Coverage, 622,
10281 /* 29249 */ GIR_EraseRootFromParent_Done,
10282 /* 29250 */ // Label 867: @29250
10283 /* 29250 */ GIM_Try, /*On fail goto*//*Label 868*/ GIMT_Encode4(29272), // Rule ID 87 //
10284 /* 29255 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10285 /* 29259 */ // (sra:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SHR_S_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10286 /* 29259 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SHR_S_I64),
10287 /* 29264 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
10288 /* 29270 */ GIR_RootConstrainSelectedInstOperands,
10289 /* 29271 */ // GIR_Coverage, 87,
10290 /* 29271 */ GIR_Done,
10291 /* 29272 */ // Label 868: @29272
10292 /* 29272 */ GIM_Reject,
10293 /* 29273 */ // Label 865: @29273
10294 /* 29273 */ GIM_Reject,
10295 /* 29274 */ // Label 861: @29274
10296 /* 29274 */ GIM_Reject,
10297 /* 29275 */ // Label 35: @29275
10298 /* 29275 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 871*/ GIMT_Encode4(29484),
10299 /* 29286 */ /*GILLT_i32*//*Label 869*/ GIMT_Encode4(29294),
10300 /* 29290 */ /*GILLT_i64*//*Label 870*/ GIMT_Encode4(29389),
10301 /* 29294 */ // Label 869: @29294
10302 /* 29294 */ GIM_Try, /*On fail goto*//*Label 872*/ GIMT_Encode4(29388),
10303 /* 29299 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
10304 /* 29302 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
10305 /* 29305 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10306 /* 29309 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10307 /* 29313 */ GIM_Try, /*On fail goto*//*Label 873*/ GIMT_Encode4(29365), // Rule ID 625 //
10308 /* 29318 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10309 /* 29322 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
10310 /* 29326 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10311 /* 29330 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
10312 /* 29334 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10313 /* 29338 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10314 /* 29343 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
10315 /* 29347 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10316 /* 29349 */ // (rotr:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (ROTR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10317 /* 29349 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I32),
10318 /* 29352 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10319 /* 29354 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
10320 /* 29356 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
10321 /* 29360 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10322 /* 29363 */ GIR_RootConstrainSelectedInstOperands,
10323 /* 29364 */ // GIR_Coverage, 625,
10324 /* 29364 */ GIR_EraseRootFromParent_Done,
10325 /* 29365 */ // Label 873: @29365
10326 /* 29365 */ GIM_Try, /*On fail goto*//*Label 874*/ GIMT_Encode4(29387), // Rule ID 92 //
10327 /* 29370 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10328 /* 29374 */ // (rotr:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (ROTR_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10329 /* 29374 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I32),
10330 /* 29379 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
10331 /* 29385 */ GIR_RootConstrainSelectedInstOperands,
10332 /* 29386 */ // GIR_Coverage, 92,
10333 /* 29386 */ GIR_Done,
10334 /* 29387 */ // Label 874: @29387
10335 /* 29387 */ GIM_Reject,
10336 /* 29388 */ // Label 872: @29388
10337 /* 29388 */ GIM_Reject,
10338 /* 29389 */ // Label 870: @29389
10339 /* 29389 */ GIM_Try, /*On fail goto*//*Label 875*/ GIMT_Encode4(29483),
10340 /* 29394 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
10341 /* 29397 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
10342 /* 29400 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10343 /* 29404 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10344 /* 29408 */ GIM_Try, /*On fail goto*//*Label 876*/ GIMT_Encode4(29460), // Rule ID 627 //
10345 /* 29413 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10346 /* 29417 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
10347 /* 29421 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i64,
10348 /* 29425 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i64,
10349 /* 29429 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i64,
10350 /* 29433 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10351 /* 29438 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
10352 /* 29442 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10353 /* 29444 */ // (rotr:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (ROTR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10354 /* 29444 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I64),
10355 /* 29447 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10356 /* 29449 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
10357 /* 29451 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
10358 /* 29455 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10359 /* 29458 */ GIR_RootConstrainSelectedInstOperands,
10360 /* 29459 */ // GIR_Coverage, 627,
10361 /* 29459 */ GIR_EraseRootFromParent_Done,
10362 /* 29460 */ // Label 876: @29460
10363 /* 29460 */ GIM_Try, /*On fail goto*//*Label 877*/ GIMT_Encode4(29482), // Rule ID 93 //
10364 /* 29465 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10365 /* 29469 */ // (rotr:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (ROTR_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10366 /* 29469 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTR_I64),
10367 /* 29474 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
10368 /* 29480 */ GIR_RootConstrainSelectedInstOperands,
10369 /* 29481 */ // GIR_Coverage, 93,
10370 /* 29481 */ GIR_Done,
10371 /* 29482 */ // Label 877: @29482
10372 /* 29482 */ GIM_Reject,
10373 /* 29483 */ // Label 875: @29483
10374 /* 29483 */ GIM_Reject,
10375 /* 29484 */ // Label 871: @29484
10376 /* 29484 */ GIM_Reject,
10377 /* 29485 */ // Label 36: @29485
10378 /* 29485 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 880*/ GIMT_Encode4(29694),
10379 /* 29496 */ /*GILLT_i32*//*Label 878*/ GIMT_Encode4(29504),
10380 /* 29500 */ /*GILLT_i64*//*Label 879*/ GIMT_Encode4(29599),
10381 /* 29504 */ // Label 878: @29504
10382 /* 29504 */ GIM_Try, /*On fail goto*//*Label 881*/ GIMT_Encode4(29598),
10383 /* 29509 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
10384 /* 29512 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
10385 /* 29515 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10386 /* 29519 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10387 /* 29523 */ GIM_Try, /*On fail goto*//*Label 882*/ GIMT_Encode4(29575), // Rule ID 624 //
10388 /* 29528 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10389 /* 29532 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
10390 /* 29536 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10391 /* 29540 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i32,
10392 /* 29544 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
10393 /* 29548 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10394 /* 29553 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 31,
10395 /* 29557 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10396 /* 29559 */ // (rotl:{ *:[i32] } I32:{ *:[i32] }:$lhs, (and:{ *:[i32] } I32:{ *:[i32] }:$rhs, 31:{ *:[i32] })) => (ROTL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10397 /* 29559 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I32),
10398 /* 29562 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10399 /* 29564 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
10400 /* 29566 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
10401 /* 29570 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10402 /* 29573 */ GIR_RootConstrainSelectedInstOperands,
10403 /* 29574 */ // GIR_Coverage, 624,
10404 /* 29574 */ GIR_EraseRootFromParent_Done,
10405 /* 29575 */ // Label 882: @29575
10406 /* 29575 */ GIM_Try, /*On fail goto*//*Label 883*/ GIMT_Encode4(29597), // Rule ID 90 //
10407 /* 29580 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10408 /* 29584 */ // (rotl:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (ROTL_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
10409 /* 29584 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I32),
10410 /* 29589 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
10411 /* 29595 */ GIR_RootConstrainSelectedInstOperands,
10412 /* 29596 */ // GIR_Coverage, 90,
10413 /* 29596 */ GIR_Done,
10414 /* 29597 */ // Label 883: @29597
10415 /* 29597 */ GIM_Reject,
10416 /* 29598 */ // Label 881: @29598
10417 /* 29598 */ GIM_Reject,
10418 /* 29599 */ // Label 879: @29599
10419 /* 29599 */ GIM_Try, /*On fail goto*//*Label 884*/ GIMT_Encode4(29693),
10420 /* 29604 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
10421 /* 29607 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
10422 /* 29610 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10423 /* 29614 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10424 /* 29618 */ GIM_Try, /*On fail goto*//*Label 885*/ GIMT_Encode4(29670), // Rule ID 626 //
10425 /* 29623 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10426 /* 29627 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_AND),
10427 /* 29631 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i64,
10428 /* 29635 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_i64,
10429 /* 29639 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i64,
10430 /* 29643 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10431 /* 29648 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/2, 63,
10432 /* 29652 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10433 /* 29654 */ // (rotl:{ *:[i64] } I64:{ *:[i64] }:$lhs, (and:{ *:[i64] } I64:{ *:[i64] }:$rhs, 63:{ *:[i64] })) => (ROTL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10434 /* 29654 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I64),
10435 /* 29657 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10436 /* 29659 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
10437 /* 29661 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // rhs
10438 /* 29665 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10439 /* 29668 */ GIR_RootConstrainSelectedInstOperands,
10440 /* 29669 */ // GIR_Coverage, 626,
10441 /* 29669 */ GIR_EraseRootFromParent_Done,
10442 /* 29670 */ // Label 885: @29670
10443 /* 29670 */ GIM_Try, /*On fail goto*//*Label 886*/ GIMT_Encode4(29692), // Rule ID 91 //
10444 /* 29675 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
10445 /* 29679 */ // (rotl:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (ROTL_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
10446 /* 29679 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ROTL_I64),
10447 /* 29684 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
10448 /* 29690 */ GIR_RootConstrainSelectedInstOperands,
10449 /* 29691 */ // GIR_Coverage, 91,
10450 /* 29691 */ GIR_Done,
10451 /* 29692 */ // Label 886: @29692
10452 /* 29692 */ GIM_Reject,
10453 /* 29693 */ // Label 884: @29693
10454 /* 29693 */ GIM_Reject,
10455 /* 29694 */ // Label 880: @29694
10456 /* 29694 */ GIM_Reject,
10457 /* 29695 */ // Label 37: @29695
10458 /* 29695 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 892*/ GIMT_Encode4(34582),
10459 /* 29706 */ /*GILLT_i32*//*Label 887*/ GIMT_Encode4(29762), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
10460 /* 29746 */ /*GILLT_v16i8*//*Label 888*/ GIMT_Encode4(33290),
10461 /* 29750 */ /*GILLT_v8i16*//*Label 889*/ GIMT_Encode4(33647),
10462 /* 29754 */ /*GILLT_v4i32*//*Label 890*/ GIMT_Encode4(34004),
10463 /* 29758 */ /*GILLT_v2i64*//*Label 891*/ GIMT_Encode4(34361),
10464 /* 29762 */ // Label 887: @29762
10465 /* 29762 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(2), GIMT_Encode2(8), /*)*//*default:*//*Label 897*/ GIMT_Encode4(33289),
10466 /* 29773 */ /*GILLT_i32*//*Label 893*/ GIMT_Encode4(29797),
10467 /* 29777 */ /*GILLT_i64*//*Label 894*/ GIMT_Encode4(32380), GIMT_Encode4(0), GIMT_Encode4(0),
10468 /* 29789 */ /*GILLT_p0s32*//*Label 895*/ GIMT_Encode4(32741),
10469 /* 29793 */ /*GILLT_p0s64*//*Label 896*/ GIMT_Encode4(33015),
10470 /* 29797 */ // Label 893: @29797
10471 /* 29797 */ GIM_Try, /*On fail goto*//*Label 898*/ GIMT_Encode4(32379),
10472 /* 29802 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
10473 /* 29805 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
10474 /* 29809 */ GIM_Try, /*On fail goto*//*Label 899*/ GIMT_Encode4(29948),
10475 /* 29814 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10476 /* 29819 */ GIM_Try, /*On fail goto*//*Label 900*/ GIMT_Encode4(29873), // Rule ID 1108 //
10477 /* 29824 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10478 /* 29828 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10479 /* 29832 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10480 /* 29835 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10481 /* 29840 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10482 /* 29844 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
10483 /* 29848 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10484 /* 29853 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10485 /* 29857 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10486 /* 29859 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x)
10487 /* 29859 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10488 /* 29862 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10489 /* 29864 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10490 /* 29868 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10491 /* 29871 */ GIR_RootConstrainSelectedInstOperands,
10492 /* 29872 */ // GIR_Coverage, 1108,
10493 /* 29872 */ GIR_EraseRootFromParent_Done,
10494 /* 29873 */ // Label 900: @29873
10495 /* 29873 */ GIM_Try, /*On fail goto*//*Label 901*/ GIMT_Encode4(29947), // Rule ID 1109 //
10496 /* 29878 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10497 /* 29882 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10498 /* 29886 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10499 /* 29889 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10500 /* 29894 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10501 /* 29898 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
10502 /* 29902 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10503 /* 29907 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10504 /* 29911 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10505 /* 29913 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x))
10506 /* 29913 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10507 /* 29916 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10508 /* 29920 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10509 /* 29925 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10510 /* 29929 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10511 /* 29932 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10512 /* 29934 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10513 /* 29937 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10514 /* 29939 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10515 /* 29942 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10516 /* 29945 */ GIR_RootConstrainSelectedInstOperands,
10517 /* 29946 */ // GIR_Coverage, 1109,
10518 /* 29946 */ GIR_EraseRootFromParent_Done,
10519 /* 29947 */ // Label 901: @29947
10520 /* 29947 */ GIM_Reject,
10521 /* 29948 */ // Label 899: @29948
10522 /* 29948 */ GIM_Try, /*On fail goto*//*Label 902*/ GIMT_Encode4(30087),
10523 /* 29953 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10524 /* 29958 */ GIM_Try, /*On fail goto*//*Label 903*/ GIMT_Encode4(30012), // Rule ID 1110 //
10525 /* 29963 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10526 /* 29967 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10527 /* 29971 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10528 /* 29974 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10529 /* 29979 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10530 /* 29983 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
10531 /* 29987 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10532 /* 29992 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10533 /* 29996 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10534 /* 29998 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x)
10535 /* 29998 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10536 /* 30001 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10537 /* 30003 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10538 /* 30007 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10539 /* 30010 */ GIR_RootConstrainSelectedInstOperands,
10540 /* 30011 */ // GIR_Coverage, 1110,
10541 /* 30011 */ GIR_EraseRootFromParent_Done,
10542 /* 30012 */ // Label 903: @30012
10543 /* 30012 */ GIM_Try, /*On fail goto*//*Label 904*/ GIMT_Encode4(30086), // Rule ID 1111 //
10544 /* 30017 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10545 /* 30021 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10546 /* 30025 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10547 /* 30028 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10548 /* 30033 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10549 /* 30037 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
10550 /* 30041 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10551 /* 30046 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10552 /* 30050 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10553 /* 30052 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v16i8] }:$x))
10554 /* 30052 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10555 /* 30055 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10556 /* 30059 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10557 /* 30064 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10558 /* 30068 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10559 /* 30071 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10560 /* 30073 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10561 /* 30076 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10562 /* 30078 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10563 /* 30081 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10564 /* 30084 */ GIR_RootConstrainSelectedInstOperands,
10565 /* 30085 */ // GIR_Coverage, 1111,
10566 /* 30085 */ GIR_EraseRootFromParent_Done,
10567 /* 30086 */ // Label 904: @30086
10568 /* 30086 */ GIM_Reject,
10569 /* 30087 */ // Label 902: @30087
10570 /* 30087 */ GIM_Try, /*On fail goto*//*Label 905*/ GIMT_Encode4(30226),
10571 /* 30092 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10572 /* 30097 */ GIM_Try, /*On fail goto*//*Label 906*/ GIMT_Encode4(30151), // Rule ID 1113 //
10573 /* 30102 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10574 /* 30106 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10575 /* 30110 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10576 /* 30113 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10577 /* 30118 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10578 /* 30122 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
10579 /* 30126 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10580 /* 30131 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10581 /* 30135 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10582 /* 30137 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x)
10583 /* 30137 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10584 /* 30140 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10585 /* 30142 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10586 /* 30146 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10587 /* 30149 */ GIR_RootConstrainSelectedInstOperands,
10588 /* 30150 */ // GIR_Coverage, 1113,
10589 /* 30150 */ GIR_EraseRootFromParent_Done,
10590 /* 30151 */ // Label 906: @30151
10591 /* 30151 */ GIM_Try, /*On fail goto*//*Label 907*/ GIMT_Encode4(30225), // Rule ID 1114 //
10592 /* 30156 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10593 /* 30160 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10594 /* 30164 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10595 /* 30167 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10596 /* 30172 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10597 /* 30176 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
10598 /* 30180 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10599 /* 30185 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10600 /* 30189 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10601 /* 30191 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x))
10602 /* 30191 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10603 /* 30194 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10604 /* 30198 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10605 /* 30203 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10606 /* 30207 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10607 /* 30210 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10608 /* 30212 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10609 /* 30215 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10610 /* 30217 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10611 /* 30220 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10612 /* 30223 */ GIR_RootConstrainSelectedInstOperands,
10613 /* 30224 */ // GIR_Coverage, 1114,
10614 /* 30224 */ GIR_EraseRootFromParent_Done,
10615 /* 30225 */ // Label 907: @30225
10616 /* 30225 */ GIM_Reject,
10617 /* 30226 */ // Label 905: @30226
10618 /* 30226 */ GIM_Try, /*On fail goto*//*Label 908*/ GIMT_Encode4(30365),
10619 /* 30231 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10620 /* 30236 */ GIM_Try, /*On fail goto*//*Label 909*/ GIMT_Encode4(30290), // Rule ID 1115 //
10621 /* 30241 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10622 /* 30245 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10623 /* 30249 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10624 /* 30252 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10625 /* 30257 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10626 /* 30261 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
10627 /* 30265 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10628 /* 30270 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10629 /* 30274 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10630 /* 30276 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x)
10631 /* 30276 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10632 /* 30279 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10633 /* 30281 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10634 /* 30285 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10635 /* 30288 */ GIR_RootConstrainSelectedInstOperands,
10636 /* 30289 */ // GIR_Coverage, 1115,
10637 /* 30289 */ GIR_EraseRootFromParent_Done,
10638 /* 30290 */ // Label 909: @30290
10639 /* 30290 */ GIM_Try, /*On fail goto*//*Label 910*/ GIMT_Encode4(30364), // Rule ID 1116 //
10640 /* 30295 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10641 /* 30299 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10642 /* 30303 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10643 /* 30306 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10644 /* 30311 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10645 /* 30315 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
10646 /* 30319 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10647 /* 30324 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10648 /* 30328 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10649 /* 30330 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v8i16] }:$x))
10650 /* 30330 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10651 /* 30333 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10652 /* 30337 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10653 /* 30342 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10654 /* 30346 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10655 /* 30349 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10656 /* 30351 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10657 /* 30354 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10658 /* 30356 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10659 /* 30359 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10660 /* 30362 */ GIR_RootConstrainSelectedInstOperands,
10661 /* 30363 */ // GIR_Coverage, 1116,
10662 /* 30363 */ GIR_EraseRootFromParent_Done,
10663 /* 30364 */ // Label 910: @30364
10664 /* 30364 */ GIM_Reject,
10665 /* 30365 */ // Label 908: @30365
10666 /* 30365 */ GIM_Try, /*On fail goto*//*Label 911*/ GIMT_Encode4(30504),
10667 /* 30370 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10668 /* 30375 */ GIM_Try, /*On fail goto*//*Label 912*/ GIMT_Encode4(30429), // Rule ID 1118 //
10669 /* 30380 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10670 /* 30384 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10671 /* 30388 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10672 /* 30391 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10673 /* 30396 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10674 /* 30400 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
10675 /* 30404 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10676 /* 30409 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10677 /* 30413 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10678 /* 30415 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x)
10679 /* 30415 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10680 /* 30418 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10681 /* 30420 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10682 /* 30424 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10683 /* 30427 */ GIR_RootConstrainSelectedInstOperands,
10684 /* 30428 */ // GIR_Coverage, 1118,
10685 /* 30428 */ GIR_EraseRootFromParent_Done,
10686 /* 30429 */ // Label 912: @30429
10687 /* 30429 */ GIM_Try, /*On fail goto*//*Label 913*/ GIMT_Encode4(30503), // Rule ID 1119 //
10688 /* 30434 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10689 /* 30438 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10690 /* 30442 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10691 /* 30445 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10692 /* 30450 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10693 /* 30454 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
10694 /* 30458 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10695 /* 30463 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10696 /* 30467 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10697 /* 30469 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x))
10698 /* 30469 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10699 /* 30472 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10700 /* 30476 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10701 /* 30481 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10702 /* 30485 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10703 /* 30488 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10704 /* 30490 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10705 /* 30493 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10706 /* 30495 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10707 /* 30498 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10708 /* 30501 */ GIR_RootConstrainSelectedInstOperands,
10709 /* 30502 */ // GIR_Coverage, 1119,
10710 /* 30502 */ GIR_EraseRootFromParent_Done,
10711 /* 30503 */ // Label 913: @30503
10712 /* 30503 */ GIM_Reject,
10713 /* 30504 */ // Label 911: @30504
10714 /* 30504 */ GIM_Try, /*On fail goto*//*Label 914*/ GIMT_Encode4(30643),
10715 /* 30509 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10716 /* 30514 */ GIM_Try, /*On fail goto*//*Label 915*/ GIMT_Encode4(30568), // Rule ID 1120 //
10717 /* 30519 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10718 /* 30523 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10719 /* 30527 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10720 /* 30530 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10721 /* 30535 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10722 /* 30539 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
10723 /* 30543 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10724 /* 30548 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10725 /* 30552 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10726 /* 30554 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x)
10727 /* 30554 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10728 /* 30557 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10729 /* 30559 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10730 /* 30563 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10731 /* 30566 */ GIR_RootConstrainSelectedInstOperands,
10732 /* 30567 */ // GIR_Coverage, 1120,
10733 /* 30567 */ GIR_EraseRootFromParent_Done,
10734 /* 30568 */ // Label 915: @30568
10735 /* 30568 */ GIM_Try, /*On fail goto*//*Label 916*/ GIMT_Encode4(30642), // Rule ID 1121 //
10736 /* 30573 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10737 /* 30577 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10738 /* 30581 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10739 /* 30584 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10740 /* 30589 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10741 /* 30593 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
10742 /* 30597 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10743 /* 30602 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10744 /* 30606 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10745 /* 30608 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v4i32] }:$x))
10746 /* 30608 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10747 /* 30611 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10748 /* 30615 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10749 /* 30620 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10750 /* 30624 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10751 /* 30627 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10752 /* 30629 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10753 /* 30632 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10754 /* 30634 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10755 /* 30637 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10756 /* 30640 */ GIR_RootConstrainSelectedInstOperands,
10757 /* 30641 */ // GIR_Coverage, 1121,
10758 /* 30641 */ GIR_EraseRootFromParent_Done,
10759 /* 30642 */ // Label 916: @30642
10760 /* 30642 */ GIM_Reject,
10761 /* 30643 */ // Label 914: @30643
10762 /* 30643 */ GIM_Try, /*On fail goto*//*Label 917*/ GIMT_Encode4(30782),
10763 /* 30648 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10764 /* 30653 */ GIM_Try, /*On fail goto*//*Label 918*/ GIMT_Encode4(30707), // Rule ID 1123 //
10765 /* 30658 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10766 /* 30662 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10767 /* 30666 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10768 /* 30669 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10769 /* 30674 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10770 /* 30678 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
10771 /* 30682 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10772 /* 30687 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10773 /* 30691 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10774 /* 30693 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x)
10775 /* 30693 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10776 /* 30696 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10777 /* 30698 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10778 /* 30702 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10779 /* 30705 */ GIR_RootConstrainSelectedInstOperands,
10780 /* 30706 */ // GIR_Coverage, 1123,
10781 /* 30706 */ GIR_EraseRootFromParent_Done,
10782 /* 30707 */ // Label 918: @30707
10783 /* 30707 */ GIM_Try, /*On fail goto*//*Label 919*/ GIMT_Encode4(30781), // Rule ID 1124 //
10784 /* 30712 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10785 /* 30716 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10786 /* 30720 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10787 /* 30723 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10788 /* 30728 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10789 /* 30732 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
10790 /* 30736 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10791 /* 30741 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10792 /* 30745 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10793 /* 30747 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x))
10794 /* 30747 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10795 /* 30750 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10796 /* 30754 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10797 /* 30759 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10798 /* 30763 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10799 /* 30766 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10800 /* 30768 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10801 /* 30771 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10802 /* 30773 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10803 /* 30776 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10804 /* 30779 */ GIR_RootConstrainSelectedInstOperands,
10805 /* 30780 */ // GIR_Coverage, 1124,
10806 /* 30780 */ GIR_EraseRootFromParent_Done,
10807 /* 30781 */ // Label 919: @30781
10808 /* 30781 */ GIM_Reject,
10809 /* 30782 */ // Label 917: @30782
10810 /* 30782 */ GIM_Try, /*On fail goto*//*Label 920*/ GIMT_Encode4(30921),
10811 /* 30787 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10812 /* 30792 */ GIM_Try, /*On fail goto*//*Label 921*/ GIMT_Encode4(30846), // Rule ID 1125 //
10813 /* 30797 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10814 /* 30801 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10815 /* 30805 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10816 /* 30808 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10817 /* 30813 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10818 /* 30817 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
10819 /* 30821 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10820 /* 30826 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10821 /* 30830 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10822 /* 30832 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x)
10823 /* 30832 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10824 /* 30835 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10825 /* 30837 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10826 /* 30841 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10827 /* 30844 */ GIR_RootConstrainSelectedInstOperands,
10828 /* 30845 */ // GIR_Coverage, 1125,
10829 /* 30845 */ GIR_EraseRootFromParent_Done,
10830 /* 30846 */ // Label 921: @30846
10831 /* 30846 */ GIM_Try, /*On fail goto*//*Label 922*/ GIMT_Encode4(30920), // Rule ID 1126 //
10832 /* 30851 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10833 /* 30855 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10834 /* 30859 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10835 /* 30862 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_anytrue),
10836 /* 30867 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10837 /* 30871 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
10838 /* 30875 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10839 /* 30880 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10840 /* 30884 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10841 /* 30886 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14902:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ANYTRUE:{ *:[i32] } ?:{ *:[v2i64] }:$x))
10842 /* 30886 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10843 /* 30889 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ANYTRUE),
10844 /* 30893 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10845 /* 30898 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10846 /* 30902 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10847 /* 30905 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10848 /* 30907 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10849 /* 30910 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10850 /* 30912 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10851 /* 30915 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10852 /* 30918 */ GIR_RootConstrainSelectedInstOperands,
10853 /* 30919 */ // GIR_Coverage, 1126,
10854 /* 30919 */ GIR_EraseRootFromParent_Done,
10855 /* 30920 */ // Label 922: @30920
10856 /* 30920 */ GIM_Reject,
10857 /* 30921 */ // Label 920: @30921
10858 /* 30921 */ GIM_Try, /*On fail goto*//*Label 923*/ GIMT_Encode4(31060),
10859 /* 30926 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10860 /* 30931 */ GIM_Try, /*On fail goto*//*Label 924*/ GIMT_Encode4(30985), // Rule ID 1128 //
10861 /* 30936 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10862 /* 30940 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10863 /* 30944 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10864 /* 30947 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10865 /* 30952 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10866 /* 30956 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
10867 /* 30960 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10868 /* 30965 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10869 /* 30969 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10870 /* 30971 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x)
10871 /* 30971 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
10872 /* 30974 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10873 /* 30976 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10874 /* 30980 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10875 /* 30983 */ GIR_RootConstrainSelectedInstOperands,
10876 /* 30984 */ // GIR_Coverage, 1128,
10877 /* 30984 */ GIR_EraseRootFromParent_Done,
10878 /* 30985 */ // Label 924: @30985
10879 /* 30985 */ GIM_Try, /*On fail goto*//*Label 925*/ GIMT_Encode4(31059), // Rule ID 1129 //
10880 /* 30990 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10881 /* 30994 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10882 /* 30998 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10883 /* 31001 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10884 /* 31006 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10885 /* 31010 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
10886 /* 31014 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10887 /* 31019 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10888 /* 31023 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10889 /* 31025 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x))
10890 /* 31025 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10891 /* 31028 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
10892 /* 31032 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10893 /* 31037 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10894 /* 31041 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10895 /* 31044 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10896 /* 31046 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10897 /* 31049 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10898 /* 31051 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10899 /* 31054 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10900 /* 31057 */ GIR_RootConstrainSelectedInstOperands,
10901 /* 31058 */ // GIR_Coverage, 1129,
10902 /* 31058 */ GIR_EraseRootFromParent_Done,
10903 /* 31059 */ // Label 925: @31059
10904 /* 31059 */ GIM_Reject,
10905 /* 31060 */ // Label 923: @31060
10906 /* 31060 */ GIM_Try, /*On fail goto*//*Label 926*/ GIMT_Encode4(31199),
10907 /* 31065 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
10908 /* 31070 */ GIM_Try, /*On fail goto*//*Label 927*/ GIMT_Encode4(31124), // Rule ID 1130 //
10909 /* 31075 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10910 /* 31079 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10911 /* 31083 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10912 /* 31086 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10913 /* 31091 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10914 /* 31095 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
10915 /* 31099 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10916 /* 31104 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10917 /* 31108 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10918 /* 31110 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x)
10919 /* 31110 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
10920 /* 31113 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10921 /* 31115 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10922 /* 31119 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10923 /* 31122 */ GIR_RootConstrainSelectedInstOperands,
10924 /* 31123 */ // GIR_Coverage, 1130,
10925 /* 31123 */ GIR_EraseRootFromParent_Done,
10926 /* 31124 */ // Label 927: @31124
10927 /* 31124 */ GIM_Try, /*On fail goto*//*Label 928*/ GIMT_Encode4(31198), // Rule ID 1131 //
10928 /* 31129 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10929 /* 31133 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10930 /* 31137 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10931 /* 31140 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10932 /* 31145 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10933 /* 31149 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
10934 /* 31153 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10935 /* 31158 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10936 /* 31162 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10937 /* 31164 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v16i8] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I8x16:{ *:[i32] } ?:{ *:[v16i8] }:$x))
10938 /* 31164 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10939 /* 31167 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I8x16),
10940 /* 31171 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10941 /* 31176 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10942 /* 31180 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10943 /* 31183 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10944 /* 31185 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10945 /* 31188 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10946 /* 31190 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10947 /* 31193 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10948 /* 31196 */ GIR_RootConstrainSelectedInstOperands,
10949 /* 31197 */ // GIR_Coverage, 1131,
10950 /* 31197 */ GIR_EraseRootFromParent_Done,
10951 /* 31198 */ // Label 928: @31198
10952 /* 31198 */ GIM_Reject,
10953 /* 31199 */ // Label 926: @31199
10954 /* 31199 */ GIM_Try, /*On fail goto*//*Label 929*/ GIMT_Encode4(31338),
10955 /* 31204 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
10956 /* 31209 */ GIM_Try, /*On fail goto*//*Label 930*/ GIMT_Encode4(31263), // Rule ID 1133 //
10957 /* 31214 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10958 /* 31218 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10959 /* 31222 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10960 /* 31225 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10961 /* 31230 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10962 /* 31234 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
10963 /* 31238 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10964 /* 31243 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
10965 /* 31247 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10966 /* 31249 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x)
10967 /* 31249 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
10968 /* 31252 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10969 /* 31254 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
10970 /* 31258 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10971 /* 31261 */ GIR_RootConstrainSelectedInstOperands,
10972 /* 31262 */ // GIR_Coverage, 1133,
10973 /* 31262 */ GIR_EraseRootFromParent_Done,
10974 /* 31263 */ // Label 930: @31263
10975 /* 31263 */ GIM_Try, /*On fail goto*//*Label 931*/ GIMT_Encode4(31337), // Rule ID 1134 //
10976 /* 31268 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10977 /* 31272 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
10978 /* 31276 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
10979 /* 31279 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
10980 /* 31284 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
10981 /* 31288 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
10982 /* 31292 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
10983 /* 31297 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
10984 /* 31301 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
10985 /* 31303 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x))
10986 /* 31303 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
10987 /* 31306 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
10988 /* 31310 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
10989 /* 31315 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
10990 /* 31319 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10991 /* 31322 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
10992 /* 31324 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
10993 /* 31327 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
10994 /* 31329 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
10995 /* 31332 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
10996 /* 31335 */ GIR_RootConstrainSelectedInstOperands,
10997 /* 31336 */ // GIR_Coverage, 1134,
10998 /* 31336 */ GIR_EraseRootFromParent_Done,
10999 /* 31337 */ // Label 931: @31337
11000 /* 31337 */ GIM_Reject,
11001 /* 31338 */ // Label 929: @31338
11002 /* 31338 */ GIM_Try, /*On fail goto*//*Label 932*/ GIMT_Encode4(31477),
11003 /* 31343 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11004 /* 31348 */ GIM_Try, /*On fail goto*//*Label 933*/ GIMT_Encode4(31402), // Rule ID 1135 //
11005 /* 31353 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
11006 /* 31357 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
11007 /* 31361 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
11008 /* 31364 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
11009 /* 31369 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
11010 /* 31373 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
11011 /* 31377 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11012 /* 31382 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
11013 /* 31386 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11014 /* 31388 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x)
11015 /* 31388 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
11016 /* 31391 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11017 /* 31393 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
11018 /* 31397 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11019 /* 31400 */ GIR_RootConstrainSelectedInstOperands,
11020 /* 31401 */ // GIR_Coverage, 1135,
11021 /* 31401 */ GIR_EraseRootFromParent_Done,
11022 /* 31402 */ // Label 933: @31402
11023 /* 31402 */ GIM_Try, /*On fail goto*//*Label 934*/ GIMT_Encode4(31476), // Rule ID 1136 //
11024 /* 31407 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
11025 /* 31411 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
11026 /* 31415 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
11027 /* 31418 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
11028 /* 31423 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
11029 /* 31427 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
11030 /* 31431 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11031 /* 31436 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
11032 /* 31440 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11033 /* 31442 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v8i16] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I16x8:{ *:[i32] } ?:{ *:[v8i16] }:$x))
11034 /* 31442 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
11035 /* 31445 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I16x8),
11036 /* 31449 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
11037 /* 31454 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
11038 /* 31458 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11039 /* 31461 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
11040 /* 31463 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
11041 /* 31466 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11042 /* 31468 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
11043 /* 31471 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11044 /* 31474 */ GIR_RootConstrainSelectedInstOperands,
11045 /* 31475 */ // GIR_Coverage, 1136,
11046 /* 31475 */ GIR_EraseRootFromParent_Done,
11047 /* 31476 */ // Label 934: @31476
11048 /* 31476 */ GIM_Reject,
11049 /* 31477 */ // Label 932: @31477
11050 /* 31477 */ GIM_Try, /*On fail goto*//*Label 935*/ GIMT_Encode4(31616),
11051 /* 31482 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11052 /* 31487 */ GIM_Try, /*On fail goto*//*Label 936*/ GIMT_Encode4(31541), // Rule ID 1138 //
11053 /* 31492 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
11054 /* 31496 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
11055 /* 31500 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
11056 /* 31503 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
11057 /* 31508 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
11058 /* 31512 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
11059 /* 31516 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11060 /* 31521 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
11061 /* 31525 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11062 /* 31527 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x)
11063 /* 31527 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
11064 /* 31530 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11065 /* 31532 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
11066 /* 31536 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11067 /* 31539 */ GIR_RootConstrainSelectedInstOperands,
11068 /* 31540 */ // GIR_Coverage, 1138,
11069 /* 31540 */ GIR_EraseRootFromParent_Done,
11070 /* 31541 */ // Label 936: @31541
11071 /* 31541 */ GIM_Try, /*On fail goto*//*Label 937*/ GIMT_Encode4(31615), // Rule ID 1139 //
11072 /* 31546 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
11073 /* 31550 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
11074 /* 31554 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
11075 /* 31557 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
11076 /* 31562 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
11077 /* 31566 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
11078 /* 31570 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11079 /* 31575 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
11080 /* 31579 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11081 /* 31581 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x))
11082 /* 31581 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
11083 /* 31584 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
11084 /* 31588 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
11085 /* 31593 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
11086 /* 31597 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11087 /* 31600 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
11088 /* 31602 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
11089 /* 31605 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11090 /* 31607 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
11091 /* 31610 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11092 /* 31613 */ GIR_RootConstrainSelectedInstOperands,
11093 /* 31614 */ // GIR_Coverage, 1139,
11094 /* 31614 */ GIR_EraseRootFromParent_Done,
11095 /* 31615 */ // Label 937: @31615
11096 /* 31615 */ GIM_Reject,
11097 /* 31616 */ // Label 935: @31616
11098 /* 31616 */ GIM_Try, /*On fail goto*//*Label 938*/ GIMT_Encode4(31755),
11099 /* 31621 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11100 /* 31626 */ GIM_Try, /*On fail goto*//*Label 939*/ GIMT_Encode4(31680), // Rule ID 1140 //
11101 /* 31631 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
11102 /* 31635 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
11103 /* 31639 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
11104 /* 31642 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
11105 /* 31647 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
11106 /* 31651 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
11107 /* 31655 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11108 /* 31660 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
11109 /* 31664 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11110 /* 31666 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x)
11111 /* 31666 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
11112 /* 31669 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11113 /* 31671 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
11114 /* 31675 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11115 /* 31678 */ GIR_RootConstrainSelectedInstOperands,
11116 /* 31679 */ // GIR_Coverage, 1140,
11117 /* 31679 */ GIR_EraseRootFromParent_Done,
11118 /* 31680 */ // Label 939: @31680
11119 /* 31680 */ GIM_Try, /*On fail goto*//*Label 940*/ GIMT_Encode4(31754), // Rule ID 1141 //
11120 /* 31685 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
11121 /* 31689 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
11122 /* 31693 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
11123 /* 31696 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
11124 /* 31701 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
11125 /* 31705 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
11126 /* 31709 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11127 /* 31714 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
11128 /* 31718 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11129 /* 31720 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v4i32] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I32x4:{ *:[i32] } ?:{ *:[v4i32] }:$x))
11130 /* 31720 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
11131 /* 31723 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I32x4),
11132 /* 31727 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
11133 /* 31732 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
11134 /* 31736 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11135 /* 31739 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
11136 /* 31741 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
11137 /* 31744 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11138 /* 31746 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
11139 /* 31749 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11140 /* 31752 */ GIR_RootConstrainSelectedInstOperands,
11141 /* 31753 */ // GIR_Coverage, 1141,
11142 /* 31753 */ GIR_EraseRootFromParent_Done,
11143 /* 31754 */ // Label 940: @31754
11144 /* 31754 */ GIM_Reject,
11145 /* 31755 */ // Label 938: @31755
11146 /* 31755 */ GIM_Try, /*On fail goto*//*Label 941*/ GIMT_Encode4(31894),
11147 /* 31760 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11148 /* 31765 */ GIM_Try, /*On fail goto*//*Label 942*/ GIMT_Encode4(31819), // Rule ID 1143 //
11149 /* 31770 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
11150 /* 31774 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
11151 /* 31778 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
11152 /* 31781 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
11153 /* 31786 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
11154 /* 31790 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
11155 /* 31794 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11156 /* 31799 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
11157 /* 31803 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11158 /* 31805 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETNE:{ *:[Other] }) => (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x)
11159 /* 31805 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
11160 /* 31808 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11161 /* 31810 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
11162 /* 31814 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11163 /* 31817 */ GIR_RootConstrainSelectedInstOperands,
11164 /* 31818 */ // GIR_Coverage, 1143,
11165 /* 31818 */ GIR_EraseRootFromParent_Done,
11166 /* 31819 */ // Label 942: @31819
11167 /* 31819 */ GIM_Try, /*On fail goto*//*Label 943*/ GIMT_Encode4(31893), // Rule ID 1144 //
11168 /* 31824 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
11169 /* 31828 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
11170 /* 31832 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
11171 /* 31835 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
11172 /* 31840 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
11173 /* 31844 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
11174 /* 31848 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11175 /* 31853 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
11176 /* 31857 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11177 /* 31859 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETNE:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x))
11178 /* 31859 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
11179 /* 31862 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
11180 /* 31866 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
11181 /* 31871 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
11182 /* 31875 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11183 /* 31878 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
11184 /* 31880 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
11185 /* 31883 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11186 /* 31885 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
11187 /* 31888 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11188 /* 31891 */ GIR_RootConstrainSelectedInstOperands,
11189 /* 31892 */ // GIR_Coverage, 1144,
11190 /* 31892 */ GIR_EraseRootFromParent_Done,
11191 /* 31893 */ // Label 943: @31893
11192 /* 31893 */ GIM_Reject,
11193 /* 31894 */ // Label 941: @31894
11194 /* 31894 */ GIM_Try, /*On fail goto*//*Label 944*/ GIMT_Encode4(32058),
11195 /* 31899 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11196 /* 31904 */ GIM_Try, /*On fail goto*//*Label 945*/ GIMT_Encode4(31958), // Rule ID 1145 //
11197 /* 31909 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
11198 /* 31913 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
11199 /* 31917 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
11200 /* 31920 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
11201 /* 31925 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
11202 /* 31929 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
11203 /* 31933 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11204 /* 31938 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 1,
11205 /* 31942 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11206 /* 31944 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 1:{ *:[i32] }, SETEQ:{ *:[Other] }) => (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x)
11207 /* 31944 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
11208 /* 31947 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11209 /* 31949 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // x
11210 /* 31953 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11211 /* 31956 */ GIR_RootConstrainSelectedInstOperands,
11212 /* 31957 */ // GIR_Coverage, 1145,
11213 /* 31957 */ GIR_EraseRootFromParent_Done,
11214 /* 31958 */ // Label 945: @31958
11215 /* 31958 */ GIM_Try, /*On fail goto*//*Label 946*/ GIMT_Encode4(32032), // Rule ID 1146 //
11216 /* 31963 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
11217 /* 31967 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_INTRINSIC),
11218 /* 31971 */ GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
11219 /* 31974 */ GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, GIMT_Encode2(Intrinsic::wasm_alltrue),
11220 /* 31979 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
11221 /* 31983 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
11222 /* 31987 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11223 /* 31992 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
11224 /* 31996 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
11225 /* 31998 */ // (setcc:{ *:[i32] } (intrinsic_wo_chain:{ *:[i32] } 14901:{ *:[iPTR] }, V128:{ *:[v2i64] }:$x), 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } (ALLTRUE_I64x2:{ *:[i32] } ?:{ *:[v2i64] }:$x))
11226 /* 31998 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_i32,
11227 /* 32001 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::ALLTRUE_I64x2),
11228 /* 32005 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
11229 /* 32010 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // x
11230 /* 32014 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11231 /* 32017 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
11232 /* 32019 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
11233 /* 32022 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11234 /* 32024 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
11235 /* 32027 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11236 /* 32030 */ GIR_RootConstrainSelectedInstOperands,
11237 /* 32031 */ // GIR_Coverage, 1146,
11238 /* 32031 */ GIR_EraseRootFromParent_Done,
11239 /* 32032 */ // Label 946: @32032
11240 /* 32032 */ GIM_Try, /*On fail goto*//*Label 947*/ GIMT_Encode4(32057), // Rule ID 120 //
11241 /* 32037 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11242 /* 32041 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
11243 /* 32045 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$src, 0:{ *:[i32] }, SETEQ:{ *:[Other] }) => (EQZ_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
11244 /* 32045 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I32),
11245 /* 32048 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11246 /* 32050 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
11247 /* 32052 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11248 /* 32055 */ GIR_RootConstrainSelectedInstOperands,
11249 /* 32056 */ // GIR_Coverage, 120,
11250 /* 32056 */ GIR_EraseRootFromParent_Done,
11251 /* 32057 */ // Label 947: @32057
11252 /* 32057 */ GIM_Reject,
11253 /* 32058 */ // Label 944: @32058
11254 /* 32058 */ GIM_Try, /*On fail goto*//*Label 948*/ GIMT_Encode4(32090), // Rule ID 94 //
11255 /* 32063 */ // MIs[0] Operand 1
11256 /* 32063 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11257 /* 32068 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11258 /* 32072 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11259 /* 32076 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11260 /* 32076 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I32),
11261 /* 32079 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11262 /* 32081 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11263 /* 32083 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11264 /* 32085 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11265 /* 32088 */ GIR_RootConstrainSelectedInstOperands,
11266 /* 32089 */ // GIR_Coverage, 94,
11267 /* 32089 */ GIR_EraseRootFromParent_Done,
11268 /* 32090 */ // Label 948: @32090
11269 /* 32090 */ GIM_Try, /*On fail goto*//*Label 949*/ GIMT_Encode4(32122), // Rule ID 96 //
11270 /* 32095 */ // MIs[0] Operand 1
11271 /* 32095 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11272 /* 32100 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11273 /* 32104 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11274 /* 32108 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETNE:{ *:[Other] }) => (NE_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11275 /* 32108 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I32),
11276 /* 32111 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11277 /* 32113 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11278 /* 32115 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11279 /* 32117 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11280 /* 32120 */ GIR_RootConstrainSelectedInstOperands,
11281 /* 32121 */ // GIR_Coverage, 96,
11282 /* 32121 */ GIR_EraseRootFromParent_Done,
11283 /* 32122 */ // Label 949: @32122
11284 /* 32122 */ GIM_Try, /*On fail goto*//*Label 950*/ GIMT_Encode4(32154), // Rule ID 98 //
11285 /* 32127 */ // MIs[0] Operand 1
11286 /* 32127 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
11287 /* 32132 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11288 /* 32136 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11289 /* 32140 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11290 /* 32140 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I32),
11291 /* 32143 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11292 /* 32145 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11293 /* 32147 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11294 /* 32149 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11295 /* 32152 */ GIR_RootConstrainSelectedInstOperands,
11296 /* 32153 */ // GIR_Coverage, 98,
11297 /* 32153 */ GIR_EraseRootFromParent_Done,
11298 /* 32154 */ // Label 950: @32154
11299 /* 32154 */ GIM_Try, /*On fail goto*//*Label 951*/ GIMT_Encode4(32186), // Rule ID 100 //
11300 /* 32159 */ // MIs[0] Operand 1
11301 /* 32159 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
11302 /* 32164 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11303 /* 32168 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11304 /* 32172 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11305 /* 32172 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I32),
11306 /* 32175 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11307 /* 32177 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11308 /* 32179 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11309 /* 32181 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11310 /* 32184 */ GIR_RootConstrainSelectedInstOperands,
11311 /* 32185 */ // GIR_Coverage, 100,
11312 /* 32185 */ GIR_EraseRootFromParent_Done,
11313 /* 32186 */ // Label 951: @32186
11314 /* 32186 */ GIM_Try, /*On fail goto*//*Label 952*/ GIMT_Encode4(32218), // Rule ID 102 //
11315 /* 32191 */ // MIs[0] Operand 1
11316 /* 32191 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
11317 /* 32196 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11318 /* 32200 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11319 /* 32204 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11320 /* 32204 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I32),
11321 /* 32207 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11322 /* 32209 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11323 /* 32211 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11324 /* 32213 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11325 /* 32216 */ GIR_RootConstrainSelectedInstOperands,
11326 /* 32217 */ // GIR_Coverage, 102,
11327 /* 32217 */ GIR_EraseRootFromParent_Done,
11328 /* 32218 */ // Label 952: @32218
11329 /* 32218 */ GIM_Try, /*On fail goto*//*Label 953*/ GIMT_Encode4(32250), // Rule ID 104 //
11330 /* 32223 */ // MIs[0] Operand 1
11331 /* 32223 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
11332 /* 32228 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11333 /* 32232 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11334 /* 32236 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11335 /* 32236 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I32),
11336 /* 32239 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11337 /* 32241 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11338 /* 32243 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11339 /* 32245 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11340 /* 32248 */ GIR_RootConstrainSelectedInstOperands,
11341 /* 32249 */ // GIR_Coverage, 104,
11342 /* 32249 */ GIR_EraseRootFromParent_Done,
11343 /* 32250 */ // Label 953: @32250
11344 /* 32250 */ GIM_Try, /*On fail goto*//*Label 954*/ GIMT_Encode4(32282), // Rule ID 106 //
11345 /* 32255 */ // MIs[0] Operand 1
11346 /* 32255 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
11347 /* 32260 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11348 /* 32264 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11349 /* 32268 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11350 /* 32268 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I32),
11351 /* 32271 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11352 /* 32273 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11353 /* 32275 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11354 /* 32277 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11355 /* 32280 */ GIR_RootConstrainSelectedInstOperands,
11356 /* 32281 */ // GIR_Coverage, 106,
11357 /* 32281 */ GIR_EraseRootFromParent_Done,
11358 /* 32282 */ // Label 954: @32282
11359 /* 32282 */ GIM_Try, /*On fail goto*//*Label 955*/ GIMT_Encode4(32314), // Rule ID 108 //
11360 /* 32287 */ // MIs[0] Operand 1
11361 /* 32287 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
11362 /* 32292 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11363 /* 32296 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11364 /* 32300 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11365 /* 32300 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I32),
11366 /* 32303 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11367 /* 32305 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11368 /* 32307 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11369 /* 32309 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11370 /* 32312 */ GIR_RootConstrainSelectedInstOperands,
11371 /* 32313 */ // GIR_Coverage, 108,
11372 /* 32313 */ GIR_EraseRootFromParent_Done,
11373 /* 32314 */ // Label 955: @32314
11374 /* 32314 */ GIM_Try, /*On fail goto*//*Label 956*/ GIMT_Encode4(32346), // Rule ID 110 //
11375 /* 32319 */ // MIs[0] Operand 1
11376 /* 32319 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
11377 /* 32324 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11378 /* 32328 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11379 /* 32332 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11380 /* 32332 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I32),
11381 /* 32335 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11382 /* 32337 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11383 /* 32339 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11384 /* 32341 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11385 /* 32344 */ GIR_RootConstrainSelectedInstOperands,
11386 /* 32345 */ // GIR_Coverage, 110,
11387 /* 32345 */ GIR_EraseRootFromParent_Done,
11388 /* 32346 */ // Label 956: @32346
11389 /* 32346 */ GIM_Try, /*On fail goto*//*Label 957*/ GIMT_Encode4(32378), // Rule ID 112 //
11390 /* 32351 */ // MIs[0] Operand 1
11391 /* 32351 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
11392 /* 32356 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11393 /* 32360 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11394 /* 32364 */ // (setcc:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11395 /* 32364 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I32),
11396 /* 32367 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11397 /* 32369 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11398 /* 32371 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11399 /* 32373 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11400 /* 32376 */ GIR_RootConstrainSelectedInstOperands,
11401 /* 32377 */ // GIR_Coverage, 112,
11402 /* 32377 */ GIR_EraseRootFromParent_Done,
11403 /* 32378 */ // Label 957: @32378
11404 /* 32378 */ GIM_Reject,
11405 /* 32379 */ // Label 898: @32379
11406 /* 32379 */ GIM_Reject,
11407 /* 32380 */ // Label 894: @32380
11408 /* 32380 */ GIM_Try, /*On fail goto*//*Label 958*/ GIMT_Encode4(32740),
11409 /* 32385 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i64,
11410 /* 32388 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11411 /* 32392 */ GIM_Try, /*On fail goto*//*Label 959*/ GIMT_Encode4(32451),
11412 /* 32397 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11413 /* 32402 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11414 /* 32406 */ GIM_Try, /*On fail goto*//*Label 960*/ GIMT_Encode4(32427), // Rule ID 121 //
11415 /* 32411 */ GIM_CheckConstantInt8, /*MI*/0, /*Op*/3, 0,
11416 /* 32415 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$src, 0:{ *:[i64] }, SETEQ:{ *:[Other] }) => (EQZ_I64:{ *:[i32] } I64:{ *:[i64] }:$src)
11417 /* 32415 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQZ_I64),
11418 /* 32418 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11419 /* 32420 */ GIR_RootToRootCopy, /*OpIdx*/2, // src
11420 /* 32422 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11421 /* 32425 */ GIR_RootConstrainSelectedInstOperands,
11422 /* 32426 */ // GIR_Coverage, 121,
11423 /* 32426 */ GIR_EraseRootFromParent_Done,
11424 /* 32427 */ // Label 960: @32427
11425 /* 32427 */ GIM_Try, /*On fail goto*//*Label 961*/ GIMT_Encode4(32450), // Rule ID 95 //
11426 /* 32432 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11427 /* 32436 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11428 /* 32436 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I64),
11429 /* 32439 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11430 /* 32441 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11431 /* 32443 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11432 /* 32445 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11433 /* 32448 */ GIR_RootConstrainSelectedInstOperands,
11434 /* 32449 */ // GIR_Coverage, 95,
11435 /* 32449 */ GIR_EraseRootFromParent_Done,
11436 /* 32450 */ // Label 961: @32450
11437 /* 32450 */ GIM_Reject,
11438 /* 32451 */ // Label 959: @32451
11439 /* 32451 */ GIM_Try, /*On fail goto*//*Label 962*/ GIMT_Encode4(32483), // Rule ID 97 //
11440 /* 32456 */ // MIs[0] Operand 1
11441 /* 32456 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11442 /* 32461 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11443 /* 32465 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11444 /* 32469 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETNE:{ *:[Other] }) => (NE_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11445 /* 32469 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I64),
11446 /* 32472 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11447 /* 32474 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11448 /* 32476 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11449 /* 32478 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11450 /* 32481 */ GIR_RootConstrainSelectedInstOperands,
11451 /* 32482 */ // GIR_Coverage, 97,
11452 /* 32482 */ GIR_EraseRootFromParent_Done,
11453 /* 32483 */ // Label 962: @32483
11454 /* 32483 */ GIM_Try, /*On fail goto*//*Label 963*/ GIMT_Encode4(32515), // Rule ID 99 //
11455 /* 32488 */ // MIs[0] Operand 1
11456 /* 32488 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
11457 /* 32493 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11458 /* 32497 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11459 /* 32501 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11460 /* 32501 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I64),
11461 /* 32504 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11462 /* 32506 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11463 /* 32508 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11464 /* 32510 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11465 /* 32513 */ GIR_RootConstrainSelectedInstOperands,
11466 /* 32514 */ // GIR_Coverage, 99,
11467 /* 32514 */ GIR_EraseRootFromParent_Done,
11468 /* 32515 */ // Label 963: @32515
11469 /* 32515 */ GIM_Try, /*On fail goto*//*Label 964*/ GIMT_Encode4(32547), // Rule ID 101 //
11470 /* 32520 */ // MIs[0] Operand 1
11471 /* 32520 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
11472 /* 32525 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11473 /* 32529 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11474 /* 32533 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11475 /* 32533 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I64),
11476 /* 32536 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11477 /* 32538 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11478 /* 32540 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11479 /* 32542 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11480 /* 32545 */ GIR_RootConstrainSelectedInstOperands,
11481 /* 32546 */ // GIR_Coverage, 101,
11482 /* 32546 */ GIR_EraseRootFromParent_Done,
11483 /* 32547 */ // Label 964: @32547
11484 /* 32547 */ GIM_Try, /*On fail goto*//*Label 965*/ GIMT_Encode4(32579), // Rule ID 103 //
11485 /* 32552 */ // MIs[0] Operand 1
11486 /* 32552 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
11487 /* 32557 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11488 /* 32561 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11489 /* 32565 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11490 /* 32565 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I64),
11491 /* 32568 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11492 /* 32570 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11493 /* 32572 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11494 /* 32574 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11495 /* 32577 */ GIR_RootConstrainSelectedInstOperands,
11496 /* 32578 */ // GIR_Coverage, 103,
11497 /* 32578 */ GIR_EraseRootFromParent_Done,
11498 /* 32579 */ // Label 965: @32579
11499 /* 32579 */ GIM_Try, /*On fail goto*//*Label 966*/ GIMT_Encode4(32611), // Rule ID 105 //
11500 /* 32584 */ // MIs[0] Operand 1
11501 /* 32584 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
11502 /* 32589 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11503 /* 32593 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11504 /* 32597 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11505 /* 32597 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I64),
11506 /* 32600 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11507 /* 32602 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11508 /* 32604 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11509 /* 32606 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11510 /* 32609 */ GIR_RootConstrainSelectedInstOperands,
11511 /* 32610 */ // GIR_Coverage, 105,
11512 /* 32610 */ GIR_EraseRootFromParent_Done,
11513 /* 32611 */ // Label 966: @32611
11514 /* 32611 */ GIM_Try, /*On fail goto*//*Label 967*/ GIMT_Encode4(32643), // Rule ID 107 //
11515 /* 32616 */ // MIs[0] Operand 1
11516 /* 32616 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
11517 /* 32621 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11518 /* 32625 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11519 /* 32629 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11520 /* 32629 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I64),
11521 /* 32632 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11522 /* 32634 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11523 /* 32636 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11524 /* 32638 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11525 /* 32641 */ GIR_RootConstrainSelectedInstOperands,
11526 /* 32642 */ // GIR_Coverage, 107,
11527 /* 32642 */ GIR_EraseRootFromParent_Done,
11528 /* 32643 */ // Label 967: @32643
11529 /* 32643 */ GIM_Try, /*On fail goto*//*Label 968*/ GIMT_Encode4(32675), // Rule ID 109 //
11530 /* 32648 */ // MIs[0] Operand 1
11531 /* 32648 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
11532 /* 32653 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11533 /* 32657 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11534 /* 32661 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11535 /* 32661 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I64),
11536 /* 32664 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11537 /* 32666 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11538 /* 32668 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11539 /* 32670 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11540 /* 32673 */ GIR_RootConstrainSelectedInstOperands,
11541 /* 32674 */ // GIR_Coverage, 109,
11542 /* 32674 */ GIR_EraseRootFromParent_Done,
11543 /* 32675 */ // Label 968: @32675
11544 /* 32675 */ GIM_Try, /*On fail goto*//*Label 969*/ GIMT_Encode4(32707), // Rule ID 111 //
11545 /* 32680 */ // MIs[0] Operand 1
11546 /* 32680 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
11547 /* 32685 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11548 /* 32689 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11549 /* 32693 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11550 /* 32693 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I64),
11551 /* 32696 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11552 /* 32698 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11553 /* 32700 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11554 /* 32702 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11555 /* 32705 */ GIR_RootConstrainSelectedInstOperands,
11556 /* 32706 */ // GIR_Coverage, 111,
11557 /* 32706 */ GIR_EraseRootFromParent_Done,
11558 /* 32707 */ // Label 969: @32707
11559 /* 32707 */ GIM_Try, /*On fail goto*//*Label 970*/ GIMT_Encode4(32739), // Rule ID 113 //
11560 /* 32712 */ // MIs[0] Operand 1
11561 /* 32712 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
11562 /* 32717 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11563 /* 32721 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
11564 /* 32725 */ // (setcc:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11565 /* 32725 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I64),
11566 /* 32728 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11567 /* 32730 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11568 /* 32732 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11569 /* 32734 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11570 /* 32737 */ GIR_RootConstrainSelectedInstOperands,
11571 /* 32738 */ // GIR_Coverage, 113,
11572 /* 32738 */ GIR_EraseRootFromParent_Done,
11573 /* 32739 */ // Label 970: @32739
11574 /* 32739 */ GIM_Reject,
11575 /* 32740 */ // Label 958: @32740
11576 /* 32740 */ GIM_Reject,
11577 /* 32741 */ // Label 895: @32741
11578 /* 32741 */ GIM_Try, /*On fail goto*//*Label 971*/ GIMT_Encode4(33014),
11579 /* 32746 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_p0s32,
11580 /* 32749 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11581 /* 32753 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 972*/ GIMT_Encode4(32779), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1308 //
11582 /* 32760 */ // MIs[0] Operand 1
11583 /* 32760 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11584 /* 32765 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11585 /* 32765 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I32),
11586 /* 32768 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11587 /* 32770 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11588 /* 32772 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11589 /* 32774 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11590 /* 32777 */ GIR_RootConstrainSelectedInstOperands,
11591 /* 32778 */ // GIR_Coverage, 1308,
11592 /* 32778 */ GIR_EraseRootFromParent_Done,
11593 /* 32779 */ // Label 972: @32779
11594 /* 32779 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 973*/ GIMT_Encode4(32805), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1310 //
11595 /* 32786 */ // MIs[0] Operand 1
11596 /* 32786 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11597 /* 32791 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETNE:{ *:[Other] }) => (NE_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11598 /* 32791 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I32),
11599 /* 32794 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11600 /* 32796 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11601 /* 32798 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11602 /* 32800 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11603 /* 32803 */ GIR_RootConstrainSelectedInstOperands,
11604 /* 32804 */ // GIR_Coverage, 1310,
11605 /* 32804 */ GIR_EraseRootFromParent_Done,
11606 /* 32805 */ // Label 973: @32805
11607 /* 32805 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 974*/ GIMT_Encode4(32831), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1312 //
11608 /* 32812 */ // MIs[0] Operand 1
11609 /* 32812 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
11610 /* 32817 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11611 /* 32817 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I32),
11612 /* 32820 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11613 /* 32822 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11614 /* 32824 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11615 /* 32826 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11616 /* 32829 */ GIR_RootConstrainSelectedInstOperands,
11617 /* 32830 */ // GIR_Coverage, 1312,
11618 /* 32830 */ GIR_EraseRootFromParent_Done,
11619 /* 32831 */ // Label 974: @32831
11620 /* 32831 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 975*/ GIMT_Encode4(32857), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1314 //
11621 /* 32838 */ // MIs[0] Operand 1
11622 /* 32838 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
11623 /* 32843 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11624 /* 32843 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I32),
11625 /* 32846 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11626 /* 32848 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11627 /* 32850 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11628 /* 32852 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11629 /* 32855 */ GIR_RootConstrainSelectedInstOperands,
11630 /* 32856 */ // GIR_Coverage, 1314,
11631 /* 32856 */ GIR_EraseRootFromParent_Done,
11632 /* 32857 */ // Label 975: @32857
11633 /* 32857 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 976*/ GIMT_Encode4(32883), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1316 //
11634 /* 32864 */ // MIs[0] Operand 1
11635 /* 32864 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
11636 /* 32869 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11637 /* 32869 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I32),
11638 /* 32872 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11639 /* 32874 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11640 /* 32876 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11641 /* 32878 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11642 /* 32881 */ GIR_RootConstrainSelectedInstOperands,
11643 /* 32882 */ // GIR_Coverage, 1316,
11644 /* 32882 */ GIR_EraseRootFromParent_Done,
11645 /* 32883 */ // Label 976: @32883
11646 /* 32883 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 977*/ GIMT_Encode4(32909), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1318 //
11647 /* 32890 */ // MIs[0] Operand 1
11648 /* 32890 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
11649 /* 32895 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11650 /* 32895 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I32),
11651 /* 32898 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11652 /* 32900 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11653 /* 32902 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11654 /* 32904 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11655 /* 32907 */ GIR_RootConstrainSelectedInstOperands,
11656 /* 32908 */ // GIR_Coverage, 1318,
11657 /* 32908 */ GIR_EraseRootFromParent_Done,
11658 /* 32909 */ // Label 977: @32909
11659 /* 32909 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 978*/ GIMT_Encode4(32935), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1320 //
11660 /* 32916 */ // MIs[0] Operand 1
11661 /* 32916 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
11662 /* 32921 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11663 /* 32921 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I32),
11664 /* 32924 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11665 /* 32926 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11666 /* 32928 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11667 /* 32930 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11668 /* 32933 */ GIR_RootConstrainSelectedInstOperands,
11669 /* 32934 */ // GIR_Coverage, 1320,
11670 /* 32934 */ GIR_EraseRootFromParent_Done,
11671 /* 32935 */ // Label 978: @32935
11672 /* 32935 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 979*/ GIMT_Encode4(32961), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1322 //
11673 /* 32942 */ // MIs[0] Operand 1
11674 /* 32942 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
11675 /* 32947 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11676 /* 32947 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I32),
11677 /* 32950 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11678 /* 32952 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11679 /* 32954 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11680 /* 32956 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11681 /* 32959 */ GIR_RootConstrainSelectedInstOperands,
11682 /* 32960 */ // GIR_Coverage, 1322,
11683 /* 32960 */ GIR_EraseRootFromParent_Done,
11684 /* 32961 */ // Label 979: @32961
11685 /* 32961 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 980*/ GIMT_Encode4(32987), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1324 //
11686 /* 32968 */ // MIs[0] Operand 1
11687 /* 32968 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
11688 /* 32973 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11689 /* 32973 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I32),
11690 /* 32976 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11691 /* 32978 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11692 /* 32980 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11693 /* 32982 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11694 /* 32985 */ GIR_RootConstrainSelectedInstOperands,
11695 /* 32986 */ // GIR_Coverage, 1324,
11696 /* 32986 */ GIR_EraseRootFromParent_Done,
11697 /* 32987 */ // Label 980: @32987
11698 /* 32987 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 981*/ GIMT_Encode4(33013), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1326 //
11699 /* 32994 */ // MIs[0] Operand 1
11700 /* 32994 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
11701 /* 32999 */ // (setcc:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
11702 /* 32999 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I32),
11703 /* 33002 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11704 /* 33004 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11705 /* 33006 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11706 /* 33008 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11707 /* 33011 */ GIR_RootConstrainSelectedInstOperands,
11708 /* 33012 */ // GIR_Coverage, 1326,
11709 /* 33012 */ GIR_EraseRootFromParent_Done,
11710 /* 33013 */ // Label 981: @33013
11711 /* 33013 */ GIM_Reject,
11712 /* 33014 */ // Label 971: @33014
11713 /* 33014 */ GIM_Reject,
11714 /* 33015 */ // Label 896: @33015
11715 /* 33015 */ GIM_Try, /*On fail goto*//*Label 982*/ GIMT_Encode4(33288),
11716 /* 33020 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_p0s64,
11717 /* 33023 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
11718 /* 33027 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 983*/ GIMT_Encode4(33053), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1309 //
11719 /* 33034 */ // MIs[0] Operand 1
11720 /* 33034 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11721 /* 33039 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11722 /* 33039 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I64),
11723 /* 33042 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11724 /* 33044 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11725 /* 33046 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11726 /* 33048 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11727 /* 33051 */ GIR_RootConstrainSelectedInstOperands,
11728 /* 33052 */ // GIR_Coverage, 1309,
11729 /* 33052 */ GIR_EraseRootFromParent_Done,
11730 /* 33053 */ // Label 983: @33053
11731 /* 33053 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 984*/ GIMT_Encode4(33079), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1311 //
11732 /* 33060 */ // MIs[0] Operand 1
11733 /* 33060 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11734 /* 33065 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETNE:{ *:[Other] }) => (NE_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11735 /* 33065 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I64),
11736 /* 33068 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11737 /* 33070 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11738 /* 33072 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11739 /* 33074 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11740 /* 33077 */ GIR_RootConstrainSelectedInstOperands,
11741 /* 33078 */ // GIR_Coverage, 1311,
11742 /* 33078 */ GIR_EraseRootFromParent_Done,
11743 /* 33079 */ // Label 984: @33079
11744 /* 33079 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 985*/ GIMT_Encode4(33105), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1313 //
11745 /* 33086 */ // MIs[0] Operand 1
11746 /* 33086 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
11747 /* 33091 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11748 /* 33091 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I64),
11749 /* 33094 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11750 /* 33096 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11751 /* 33098 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11752 /* 33100 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11753 /* 33103 */ GIR_RootConstrainSelectedInstOperands,
11754 /* 33104 */ // GIR_Coverage, 1313,
11755 /* 33104 */ GIR_EraseRootFromParent_Done,
11756 /* 33105 */ // Label 985: @33105
11757 /* 33105 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 986*/ GIMT_Encode4(33131), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1315 //
11758 /* 33112 */ // MIs[0] Operand 1
11759 /* 33112 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
11760 /* 33117 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11761 /* 33117 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I64),
11762 /* 33120 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11763 /* 33122 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11764 /* 33124 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11765 /* 33126 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11766 /* 33129 */ GIR_RootConstrainSelectedInstOperands,
11767 /* 33130 */ // GIR_Coverage, 1315,
11768 /* 33130 */ GIR_EraseRootFromParent_Done,
11769 /* 33131 */ // Label 986: @33131
11770 /* 33131 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 987*/ GIMT_Encode4(33157), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1317 //
11771 /* 33138 */ // MIs[0] Operand 1
11772 /* 33138 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
11773 /* 33143 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11774 /* 33143 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I64),
11775 /* 33146 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11776 /* 33148 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11777 /* 33150 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11778 /* 33152 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11779 /* 33155 */ GIR_RootConstrainSelectedInstOperands,
11780 /* 33156 */ // GIR_Coverage, 1317,
11781 /* 33156 */ GIR_EraseRootFromParent_Done,
11782 /* 33157 */ // Label 987: @33157
11783 /* 33157 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 988*/ GIMT_Encode4(33183), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1319 //
11784 /* 33164 */ // MIs[0] Operand 1
11785 /* 33164 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
11786 /* 33169 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11787 /* 33169 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I64),
11788 /* 33172 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11789 /* 33174 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11790 /* 33176 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11791 /* 33178 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11792 /* 33181 */ GIR_RootConstrainSelectedInstOperands,
11793 /* 33182 */ // GIR_Coverage, 1319,
11794 /* 33182 */ GIR_EraseRootFromParent_Done,
11795 /* 33183 */ // Label 988: @33183
11796 /* 33183 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 989*/ GIMT_Encode4(33209), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1321 //
11797 /* 33190 */ // MIs[0] Operand 1
11798 /* 33190 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
11799 /* 33195 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11800 /* 33195 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I64),
11801 /* 33198 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11802 /* 33200 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11803 /* 33202 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11804 /* 33204 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11805 /* 33207 */ GIR_RootConstrainSelectedInstOperands,
11806 /* 33208 */ // GIR_Coverage, 1321,
11807 /* 33208 */ GIR_EraseRootFromParent_Done,
11808 /* 33209 */ // Label 989: @33209
11809 /* 33209 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 990*/ GIMT_Encode4(33235), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1323 //
11810 /* 33216 */ // MIs[0] Operand 1
11811 /* 33216 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
11812 /* 33221 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11813 /* 33221 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I64),
11814 /* 33224 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11815 /* 33226 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11816 /* 33228 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11817 /* 33230 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11818 /* 33233 */ GIR_RootConstrainSelectedInstOperands,
11819 /* 33234 */ // GIR_Coverage, 1323,
11820 /* 33234 */ GIR_EraseRootFromParent_Done,
11821 /* 33235 */ // Label 990: @33235
11822 /* 33235 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 991*/ GIMT_Encode4(33261), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1325 //
11823 /* 33242 */ // MIs[0] Operand 1
11824 /* 33242 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
11825 /* 33247 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11826 /* 33247 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I64),
11827 /* 33250 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11828 /* 33252 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11829 /* 33254 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11830 /* 33256 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11831 /* 33259 */ GIR_RootConstrainSelectedInstOperands,
11832 /* 33260 */ // GIR_Coverage, 1325,
11833 /* 33260 */ GIR_EraseRootFromParent_Done,
11834 /* 33261 */ // Label 991: @33261
11835 /* 33261 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 992*/ GIMT_Encode4(33287), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1327 //
11836 /* 33268 */ // MIs[0] Operand 1
11837 /* 33268 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
11838 /* 33273 */ // (setcc:{ *:[i32] } p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I64:{ *:[i32] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
11839 /* 33273 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I64),
11840 /* 33276 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11841 /* 33278 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11842 /* 33280 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11843 /* 33282 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11844 /* 33285 */ GIR_RootConstrainSelectedInstOperands,
11845 /* 33286 */ // GIR_Coverage, 1327,
11846 /* 33286 */ GIR_EraseRootFromParent_Done,
11847 /* 33287 */ // Label 992: @33287
11848 /* 33287 */ GIM_Reject,
11849 /* 33288 */ // Label 982: @33288
11850 /* 33288 */ GIM_Reject,
11851 /* 33289 */ // Label 897: @33289
11852 /* 33289 */ GIM_Reject,
11853 /* 33290 */ // Label 888: @33290
11854 /* 33290 */ GIM_Try, /*On fail goto*//*Label 993*/ GIMT_Encode4(33646),
11855 /* 33295 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
11856 /* 33298 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
11857 /* 33301 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11858 /* 33305 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 994*/ GIMT_Encode4(33339), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 195 //
11859 /* 33312 */ // MIs[0] Operand 1
11860 /* 33312 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
11861 /* 33317 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11862 /* 33321 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11863 /* 33325 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11864 /* 33325 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I8x16),
11865 /* 33328 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11866 /* 33330 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11867 /* 33332 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11868 /* 33334 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11869 /* 33337 */ GIR_RootConstrainSelectedInstOperands,
11870 /* 33338 */ // GIR_Coverage, 195,
11871 /* 33338 */ GIR_EraseRootFromParent_Done,
11872 /* 33339 */ // Label 994: @33339
11873 /* 33339 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 995*/ GIMT_Encode4(33373), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 202 //
11874 /* 33346 */ // MIs[0] Operand 1
11875 /* 33346 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
11876 /* 33351 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11877 /* 33355 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11878 /* 33359 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETNE:{ *:[Other] }) => (NE_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11879 /* 33359 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I8x16),
11880 /* 33362 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11881 /* 33364 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11882 /* 33366 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11883 /* 33368 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11884 /* 33371 */ GIR_RootConstrainSelectedInstOperands,
11885 /* 33372 */ // GIR_Coverage, 202,
11886 /* 33372 */ GIR_EraseRootFromParent_Done,
11887 /* 33373 */ // Label 995: @33373
11888 /* 33373 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 996*/ GIMT_Encode4(33407), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 209 //
11889 /* 33380 */ // MIs[0] Operand 1
11890 /* 33380 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
11891 /* 33385 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11892 /* 33389 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11893 /* 33393 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11894 /* 33393 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I8x16),
11895 /* 33396 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11896 /* 33398 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11897 /* 33400 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11898 /* 33402 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11899 /* 33405 */ GIR_RootConstrainSelectedInstOperands,
11900 /* 33406 */ // GIR_Coverage, 209,
11901 /* 33406 */ GIR_EraseRootFromParent_Done,
11902 /* 33407 */ // Label 996: @33407
11903 /* 33407 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 997*/ GIMT_Encode4(33441), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 213 //
11904 /* 33414 */ // MIs[0] Operand 1
11905 /* 33414 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
11906 /* 33419 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11907 /* 33423 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11908 /* 33427 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11909 /* 33427 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I8x16),
11910 /* 33430 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11911 /* 33432 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11912 /* 33434 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11913 /* 33436 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11914 /* 33439 */ GIR_RootConstrainSelectedInstOperands,
11915 /* 33440 */ // GIR_Coverage, 213,
11916 /* 33440 */ GIR_EraseRootFromParent_Done,
11917 /* 33441 */ // Label 997: @33441
11918 /* 33441 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 998*/ GIMT_Encode4(33475), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 219 //
11919 /* 33448 */ // MIs[0] Operand 1
11920 /* 33448 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
11921 /* 33453 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11922 /* 33457 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11923 /* 33461 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11924 /* 33461 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I8x16),
11925 /* 33464 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11926 /* 33466 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11927 /* 33468 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11928 /* 33470 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11929 /* 33473 */ GIR_RootConstrainSelectedInstOperands,
11930 /* 33474 */ // GIR_Coverage, 219,
11931 /* 33474 */ GIR_EraseRootFromParent_Done,
11932 /* 33475 */ // Label 998: @33475
11933 /* 33475 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 999*/ GIMT_Encode4(33509), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 223 //
11934 /* 33482 */ // MIs[0] Operand 1
11935 /* 33482 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
11936 /* 33487 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11937 /* 33491 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11938 /* 33495 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11939 /* 33495 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I8x16),
11940 /* 33498 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11941 /* 33500 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11942 /* 33502 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11943 /* 33504 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11944 /* 33507 */ GIR_RootConstrainSelectedInstOperands,
11945 /* 33508 */ // GIR_Coverage, 223,
11946 /* 33508 */ GIR_EraseRootFromParent_Done,
11947 /* 33509 */ // Label 999: @33509
11948 /* 33509 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1000*/ GIMT_Encode4(33543), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 229 //
11949 /* 33516 */ // MIs[0] Operand 1
11950 /* 33516 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
11951 /* 33521 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11952 /* 33525 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11953 /* 33529 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11954 /* 33529 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I8x16),
11955 /* 33532 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11956 /* 33534 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11957 /* 33536 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11958 /* 33538 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11959 /* 33541 */ GIR_RootConstrainSelectedInstOperands,
11960 /* 33542 */ // GIR_Coverage, 229,
11961 /* 33542 */ GIR_EraseRootFromParent_Done,
11962 /* 33543 */ // Label 1000: @33543
11963 /* 33543 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1001*/ GIMT_Encode4(33577), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 233 //
11964 /* 33550 */ // MIs[0] Operand 1
11965 /* 33550 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
11966 /* 33555 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11967 /* 33559 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11968 /* 33563 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11969 /* 33563 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I8x16),
11970 /* 33566 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11971 /* 33568 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11972 /* 33570 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11973 /* 33572 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11974 /* 33575 */ GIR_RootConstrainSelectedInstOperands,
11975 /* 33576 */ // GIR_Coverage, 233,
11976 /* 33576 */ GIR_EraseRootFromParent_Done,
11977 /* 33577 */ // Label 1001: @33577
11978 /* 33577 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1002*/ GIMT_Encode4(33611), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 239 //
11979 /* 33584 */ // MIs[0] Operand 1
11980 /* 33584 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
11981 /* 33589 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11982 /* 33593 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11983 /* 33597 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11984 /* 33597 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I8x16),
11985 /* 33600 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
11986 /* 33602 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
11987 /* 33604 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
11988 /* 33606 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
11989 /* 33609 */ GIR_RootConstrainSelectedInstOperands,
11990 /* 33610 */ // GIR_Coverage, 239,
11991 /* 33610 */ GIR_EraseRootFromParent_Done,
11992 /* 33611 */ // Label 1002: @33611
11993 /* 33611 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1003*/ GIMT_Encode4(33645), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 243 //
11994 /* 33618 */ // MIs[0] Operand 1
11995 /* 33618 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
11996 /* 33623 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11997 /* 33627 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
11998 /* 33631 */ // (setcc:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
11999 /* 33631 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I8x16),
12000 /* 33634 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12001 /* 33636 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12002 /* 33638 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12003 /* 33640 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12004 /* 33643 */ GIR_RootConstrainSelectedInstOperands,
12005 /* 33644 */ // GIR_Coverage, 243,
12006 /* 33644 */ GIR_EraseRootFromParent_Done,
12007 /* 33645 */ // Label 1003: @33645
12008 /* 33645 */ GIM_Reject,
12009 /* 33646 */ // Label 993: @33646
12010 /* 33646 */ GIM_Reject,
12011 /* 33647 */ // Label 889: @33647
12012 /* 33647 */ GIM_Try, /*On fail goto*//*Label 1004*/ GIMT_Encode4(34003),
12013 /* 33652 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
12014 /* 33655 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
12015 /* 33658 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12016 /* 33662 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1005*/ GIMT_Encode4(33696), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 196 //
12017 /* 33669 */ // MIs[0] Operand 1
12018 /* 33669 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
12019 /* 33674 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12020 /* 33678 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12021 /* 33682 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
12022 /* 33682 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I16x8),
12023 /* 33685 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12024 /* 33687 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12025 /* 33689 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12026 /* 33691 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12027 /* 33694 */ GIR_RootConstrainSelectedInstOperands,
12028 /* 33695 */ // GIR_Coverage, 196,
12029 /* 33695 */ GIR_EraseRootFromParent_Done,
12030 /* 33696 */ // Label 1005: @33696
12031 /* 33696 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1006*/ GIMT_Encode4(33730), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 203 //
12032 /* 33703 */ // MIs[0] Operand 1
12033 /* 33703 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
12034 /* 33708 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12035 /* 33712 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12036 /* 33716 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETNE:{ *:[Other] }) => (NE_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
12037 /* 33716 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I16x8),
12038 /* 33719 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12039 /* 33721 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12040 /* 33723 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12041 /* 33725 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12042 /* 33728 */ GIR_RootConstrainSelectedInstOperands,
12043 /* 33729 */ // GIR_Coverage, 203,
12044 /* 33729 */ GIR_EraseRootFromParent_Done,
12045 /* 33730 */ // Label 1006: @33730
12046 /* 33730 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1007*/ GIMT_Encode4(33764), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 210 //
12047 /* 33737 */ // MIs[0] Operand 1
12048 /* 33737 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
12049 /* 33742 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12050 /* 33746 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12051 /* 33750 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
12052 /* 33750 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I16x8),
12053 /* 33753 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12054 /* 33755 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12055 /* 33757 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12056 /* 33759 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12057 /* 33762 */ GIR_RootConstrainSelectedInstOperands,
12058 /* 33763 */ // GIR_Coverage, 210,
12059 /* 33763 */ GIR_EraseRootFromParent_Done,
12060 /* 33764 */ // Label 1007: @33764
12061 /* 33764 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1008*/ GIMT_Encode4(33798), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 214 //
12062 /* 33771 */ // MIs[0] Operand 1
12063 /* 33771 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
12064 /* 33776 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12065 /* 33780 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12066 /* 33784 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
12067 /* 33784 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I16x8),
12068 /* 33787 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12069 /* 33789 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12070 /* 33791 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12071 /* 33793 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12072 /* 33796 */ GIR_RootConstrainSelectedInstOperands,
12073 /* 33797 */ // GIR_Coverage, 214,
12074 /* 33797 */ GIR_EraseRootFromParent_Done,
12075 /* 33798 */ // Label 1008: @33798
12076 /* 33798 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1009*/ GIMT_Encode4(33832), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 220 //
12077 /* 33805 */ // MIs[0] Operand 1
12078 /* 33805 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
12079 /* 33810 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12080 /* 33814 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12081 /* 33818 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
12082 /* 33818 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I16x8),
12083 /* 33821 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12084 /* 33823 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12085 /* 33825 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12086 /* 33827 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12087 /* 33830 */ GIR_RootConstrainSelectedInstOperands,
12088 /* 33831 */ // GIR_Coverage, 220,
12089 /* 33831 */ GIR_EraseRootFromParent_Done,
12090 /* 33832 */ // Label 1009: @33832
12091 /* 33832 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1010*/ GIMT_Encode4(33866), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 224 //
12092 /* 33839 */ // MIs[0] Operand 1
12093 /* 33839 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
12094 /* 33844 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12095 /* 33848 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12096 /* 33852 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
12097 /* 33852 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I16x8),
12098 /* 33855 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12099 /* 33857 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12100 /* 33859 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12101 /* 33861 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12102 /* 33864 */ GIR_RootConstrainSelectedInstOperands,
12103 /* 33865 */ // GIR_Coverage, 224,
12104 /* 33865 */ GIR_EraseRootFromParent_Done,
12105 /* 33866 */ // Label 1010: @33866
12106 /* 33866 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1011*/ GIMT_Encode4(33900), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 230 //
12107 /* 33873 */ // MIs[0] Operand 1
12108 /* 33873 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
12109 /* 33878 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12110 /* 33882 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12111 /* 33886 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
12112 /* 33886 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I16x8),
12113 /* 33889 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12114 /* 33891 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12115 /* 33893 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12116 /* 33895 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12117 /* 33898 */ GIR_RootConstrainSelectedInstOperands,
12118 /* 33899 */ // GIR_Coverage, 230,
12119 /* 33899 */ GIR_EraseRootFromParent_Done,
12120 /* 33900 */ // Label 1011: @33900
12121 /* 33900 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1012*/ GIMT_Encode4(33934), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 234 //
12122 /* 33907 */ // MIs[0] Operand 1
12123 /* 33907 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
12124 /* 33912 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12125 /* 33916 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12126 /* 33920 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
12127 /* 33920 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I16x8),
12128 /* 33923 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12129 /* 33925 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12130 /* 33927 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12131 /* 33929 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12132 /* 33932 */ GIR_RootConstrainSelectedInstOperands,
12133 /* 33933 */ // GIR_Coverage, 234,
12134 /* 33933 */ GIR_EraseRootFromParent_Done,
12135 /* 33934 */ // Label 1012: @33934
12136 /* 33934 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1013*/ GIMT_Encode4(33968), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 240 //
12137 /* 33941 */ // MIs[0] Operand 1
12138 /* 33941 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
12139 /* 33946 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12140 /* 33950 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12141 /* 33954 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
12142 /* 33954 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I16x8),
12143 /* 33957 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12144 /* 33959 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12145 /* 33961 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12146 /* 33963 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12147 /* 33966 */ GIR_RootConstrainSelectedInstOperands,
12148 /* 33967 */ // GIR_Coverage, 240,
12149 /* 33967 */ GIR_EraseRootFromParent_Done,
12150 /* 33968 */ // Label 1013: @33968
12151 /* 33968 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1014*/ GIMT_Encode4(34002), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 244 //
12152 /* 33975 */ // MIs[0] Operand 1
12153 /* 33975 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
12154 /* 33980 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12155 /* 33984 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12156 /* 33988 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
12157 /* 33988 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I16x8),
12158 /* 33991 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12159 /* 33993 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12160 /* 33995 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12161 /* 33997 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12162 /* 34000 */ GIR_RootConstrainSelectedInstOperands,
12163 /* 34001 */ // GIR_Coverage, 244,
12164 /* 34001 */ GIR_EraseRootFromParent_Done,
12165 /* 34002 */ // Label 1014: @34002
12166 /* 34002 */ GIM_Reject,
12167 /* 34003 */ // Label 1004: @34003
12168 /* 34003 */ GIM_Reject,
12169 /* 34004 */ // Label 890: @34004
12170 /* 34004 */ GIM_Try, /*On fail goto*//*Label 1015*/ GIMT_Encode4(34360),
12171 /* 34009 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
12172 /* 34012 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
12173 /* 34015 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12174 /* 34019 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1016*/ GIMT_Encode4(34053), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 197 //
12175 /* 34026 */ // MIs[0] Operand 1
12176 /* 34026 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
12177 /* 34031 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12178 /* 34035 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12179 /* 34039 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
12180 /* 34039 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I32x4),
12181 /* 34042 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12182 /* 34044 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12183 /* 34046 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12184 /* 34048 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12185 /* 34051 */ GIR_RootConstrainSelectedInstOperands,
12186 /* 34052 */ // GIR_Coverage, 197,
12187 /* 34052 */ GIR_EraseRootFromParent_Done,
12188 /* 34053 */ // Label 1016: @34053
12189 /* 34053 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1017*/ GIMT_Encode4(34087), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 204 //
12190 /* 34060 */ // MIs[0] Operand 1
12191 /* 34060 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
12192 /* 34065 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12193 /* 34069 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12194 /* 34073 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETNE:{ *:[Other] }) => (NE_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
12195 /* 34073 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I32x4),
12196 /* 34076 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12197 /* 34078 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12198 /* 34080 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12199 /* 34082 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12200 /* 34085 */ GIR_RootConstrainSelectedInstOperands,
12201 /* 34086 */ // GIR_Coverage, 204,
12202 /* 34086 */ GIR_EraseRootFromParent_Done,
12203 /* 34087 */ // Label 1017: @34087
12204 /* 34087 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1018*/ GIMT_Encode4(34121), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 211 //
12205 /* 34094 */ // MIs[0] Operand 1
12206 /* 34094 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
12207 /* 34099 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12208 /* 34103 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12209 /* 34107 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
12210 /* 34107 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I32x4),
12211 /* 34110 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12212 /* 34112 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12213 /* 34114 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12214 /* 34116 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12215 /* 34119 */ GIR_RootConstrainSelectedInstOperands,
12216 /* 34120 */ // GIR_Coverage, 211,
12217 /* 34120 */ GIR_EraseRootFromParent_Done,
12218 /* 34121 */ // Label 1018: @34121
12219 /* 34121 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1019*/ GIMT_Encode4(34155), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 215 //
12220 /* 34128 */ // MIs[0] Operand 1
12221 /* 34128 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULT),
12222 /* 34133 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12223 /* 34137 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12224 /* 34141 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETULT:{ *:[Other] }) => (LT_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
12225 /* 34141 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_U_I32x4),
12226 /* 34144 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12227 /* 34146 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12228 /* 34148 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12229 /* 34150 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12230 /* 34153 */ GIR_RootConstrainSelectedInstOperands,
12231 /* 34154 */ // GIR_Coverage, 215,
12232 /* 34154 */ GIR_EraseRootFromParent_Done,
12233 /* 34155 */ // Label 1019: @34155
12234 /* 34155 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1020*/ GIMT_Encode4(34189), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 221 //
12235 /* 34162 */ // MIs[0] Operand 1
12236 /* 34162 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
12237 /* 34167 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12238 /* 34171 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12239 /* 34175 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
12240 /* 34175 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I32x4),
12241 /* 34178 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12242 /* 34180 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12243 /* 34182 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12244 /* 34184 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12245 /* 34187 */ GIR_RootConstrainSelectedInstOperands,
12246 /* 34188 */ // GIR_Coverage, 221,
12247 /* 34188 */ GIR_EraseRootFromParent_Done,
12248 /* 34189 */ // Label 1020: @34189
12249 /* 34189 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1021*/ GIMT_Encode4(34223), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 225 //
12250 /* 34196 */ // MIs[0] Operand 1
12251 /* 34196 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGT),
12252 /* 34201 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12253 /* 34205 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12254 /* 34209 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETUGT:{ *:[Other] }) => (GT_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
12255 /* 34209 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_U_I32x4),
12256 /* 34212 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12257 /* 34214 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12258 /* 34216 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12259 /* 34218 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12260 /* 34221 */ GIR_RootConstrainSelectedInstOperands,
12261 /* 34222 */ // GIR_Coverage, 225,
12262 /* 34222 */ GIR_EraseRootFromParent_Done,
12263 /* 34223 */ // Label 1021: @34223
12264 /* 34223 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1022*/ GIMT_Encode4(34257), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 231 //
12265 /* 34230 */ // MIs[0] Operand 1
12266 /* 34230 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
12267 /* 34235 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12268 /* 34239 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12269 /* 34243 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
12270 /* 34243 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I32x4),
12271 /* 34246 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12272 /* 34248 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12273 /* 34250 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12274 /* 34252 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12275 /* 34255 */ GIR_RootConstrainSelectedInstOperands,
12276 /* 34256 */ // GIR_Coverage, 231,
12277 /* 34256 */ GIR_EraseRootFromParent_Done,
12278 /* 34257 */ // Label 1022: @34257
12279 /* 34257 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1023*/ GIMT_Encode4(34291), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 235 //
12280 /* 34264 */ // MIs[0] Operand 1
12281 /* 34264 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_ULE),
12282 /* 34269 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12283 /* 34273 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12284 /* 34277 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETULE:{ *:[Other] }) => (LE_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
12285 /* 34277 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_U_I32x4),
12286 /* 34280 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12287 /* 34282 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12288 /* 34284 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12289 /* 34286 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12290 /* 34289 */ GIR_RootConstrainSelectedInstOperands,
12291 /* 34290 */ // GIR_Coverage, 235,
12292 /* 34290 */ GIR_EraseRootFromParent_Done,
12293 /* 34291 */ // Label 1023: @34291
12294 /* 34291 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1024*/ GIMT_Encode4(34325), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 241 //
12295 /* 34298 */ // MIs[0] Operand 1
12296 /* 34298 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
12297 /* 34303 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12298 /* 34307 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12299 /* 34311 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
12300 /* 34311 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I32x4),
12301 /* 34314 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12302 /* 34316 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12303 /* 34318 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12304 /* 34320 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12305 /* 34323 */ GIR_RootConstrainSelectedInstOperands,
12306 /* 34324 */ // GIR_Coverage, 241,
12307 /* 34324 */ GIR_EraseRootFromParent_Done,
12308 /* 34325 */ // Label 1024: @34325
12309 /* 34325 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1025*/ GIMT_Encode4(34359), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 245 //
12310 /* 34332 */ // MIs[0] Operand 1
12311 /* 34332 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_UGE),
12312 /* 34337 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12313 /* 34341 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12314 /* 34345 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs, SETUGE:{ *:[Other] }) => (GE_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
12315 /* 34345 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_U_I32x4),
12316 /* 34348 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12317 /* 34350 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12318 /* 34352 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12319 /* 34354 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12320 /* 34357 */ GIR_RootConstrainSelectedInstOperands,
12321 /* 34358 */ // GIR_Coverage, 245,
12322 /* 34358 */ GIR_EraseRootFromParent_Done,
12323 /* 34359 */ // Label 1025: @34359
12324 /* 34359 */ GIM_Reject,
12325 /* 34360 */ // Label 1015: @34360
12326 /* 34360 */ GIM_Reject,
12327 /* 34361 */ // Label 891: @34361
12328 /* 34361 */ GIM_Try, /*On fail goto*//*Label 1026*/ GIMT_Encode4(34581),
12329 /* 34366 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
12330 /* 34369 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
12331 /* 34372 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12332 /* 34376 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1027*/ GIMT_Encode4(34410), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 198 //
12333 /* 34383 */ // MIs[0] Operand 1
12334 /* 34383 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
12335 /* 34388 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12336 /* 34392 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12337 /* 34396 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETEQ:{ *:[Other] }) => (EQ_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
12338 /* 34396 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_I64x2),
12339 /* 34399 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12340 /* 34401 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12341 /* 34403 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12342 /* 34405 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12343 /* 34408 */ GIR_RootConstrainSelectedInstOperands,
12344 /* 34409 */ // GIR_Coverage, 198,
12345 /* 34409 */ GIR_EraseRootFromParent_Done,
12346 /* 34410 */ // Label 1027: @34410
12347 /* 34410 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1028*/ GIMT_Encode4(34444), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 205 //
12348 /* 34417 */ // MIs[0] Operand 1
12349 /* 34417 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
12350 /* 34422 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12351 /* 34426 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12352 /* 34430 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETNE:{ *:[Other] }) => (NE_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
12353 /* 34430 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_I64x2),
12354 /* 34433 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12355 /* 34435 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12356 /* 34437 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12357 /* 34439 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12358 /* 34442 */ GIR_RootConstrainSelectedInstOperands,
12359 /* 34443 */ // GIR_Coverage, 205,
12360 /* 34443 */ GIR_EraseRootFromParent_Done,
12361 /* 34444 */ // Label 1028: @34444
12362 /* 34444 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1029*/ GIMT_Encode4(34478), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 212 //
12363 /* 34451 */ // MIs[0] Operand 1
12364 /* 34451 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLT),
12365 /* 34456 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12366 /* 34460 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12367 /* 34464 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETLT:{ *:[Other] }) => (LT_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
12368 /* 34464 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_S_I64x2),
12369 /* 34467 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12370 /* 34469 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12371 /* 34471 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12372 /* 34473 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12373 /* 34476 */ GIR_RootConstrainSelectedInstOperands,
12374 /* 34477 */ // GIR_Coverage, 212,
12375 /* 34477 */ GIR_EraseRootFromParent_Done,
12376 /* 34478 */ // Label 1029: @34478
12377 /* 34478 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1030*/ GIMT_Encode4(34512), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 222 //
12378 /* 34485 */ // MIs[0] Operand 1
12379 /* 34485 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGT),
12380 /* 34490 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12381 /* 34494 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12382 /* 34498 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETGT:{ *:[Other] }) => (GT_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
12383 /* 34498 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_S_I64x2),
12384 /* 34501 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12385 /* 34503 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12386 /* 34505 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12387 /* 34507 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12388 /* 34510 */ GIR_RootConstrainSelectedInstOperands,
12389 /* 34511 */ // GIR_Coverage, 222,
12390 /* 34511 */ GIR_EraseRootFromParent_Done,
12391 /* 34512 */ // Label 1030: @34512
12392 /* 34512 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1031*/ GIMT_Encode4(34546), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 232 //
12393 /* 34519 */ // MIs[0] Operand 1
12394 /* 34519 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SLE),
12395 /* 34524 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12396 /* 34528 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12397 /* 34532 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETLE:{ *:[Other] }) => (LE_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
12398 /* 34532 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_S_I64x2),
12399 /* 34535 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12400 /* 34537 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12401 /* 34539 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12402 /* 34541 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12403 /* 34544 */ GIR_RootConstrainSelectedInstOperands,
12404 /* 34545 */ // GIR_Coverage, 232,
12405 /* 34545 */ GIR_EraseRootFromParent_Done,
12406 /* 34546 */ // Label 1031: @34546
12407 /* 34546 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1032*/ GIMT_Encode4(34580), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 242 //
12408 /* 34553 */ // MIs[0] Operand 1
12409 /* 34553 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_SGE),
12410 /* 34558 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12411 /* 34562 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12412 /* 34566 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs, SETGE:{ *:[Other] }) => (GE_S_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs)
12413 /* 34566 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_S_I64x2),
12414 /* 34569 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12415 /* 34571 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12416 /* 34573 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12417 /* 34575 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12418 /* 34578 */ GIR_RootConstrainSelectedInstOperands,
12419 /* 34579 */ // GIR_Coverage, 242,
12420 /* 34579 */ GIR_EraseRootFromParent_Done,
12421 /* 34580 */ // Label 1032: @34580
12422 /* 34580 */ GIM_Reject,
12423 /* 34581 */ // Label 1026: @34581
12424 /* 34581 */ GIM_Reject,
12425 /* 34582 */ // Label 892: @34582
12426 /* 34582 */ GIM_Reject,
12427 /* 34583 */ // Label 38: @34583
12428 /* 34583 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 1037*/ GIMT_Encode4(35745),
12429 /* 34594 */ /*GILLT_i32*//*Label 1033*/ GIMT_Encode4(34650), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
12430 /* 34638 */ /*GILLT_v8i16*//*Label 1034*/ GIMT_Encode4(35082),
12431 /* 34642 */ /*GILLT_v4i32*//*Label 1035*/ GIMT_Encode4(35303),
12432 /* 34646 */ /*GILLT_v2i64*//*Label 1036*/ GIMT_Encode4(35524),
12433 /* 34650 */ // Label 1033: @34650
12434 /* 34650 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1040*/ GIMT_Encode4(35081),
12435 /* 34661 */ /*GILLT_f32*//*Label 1038*/ GIMT_Encode4(34669),
12436 /* 34665 */ /*GILLT_f64*//*Label 1039*/ GIMT_Encode4(34875),
12437 /* 34669 */ // Label 1038: @34669
12438 /* 34669 */ GIM_Try, /*On fail goto*//*Label 1041*/ GIMT_Encode4(34874),
12439 /* 34674 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_f32,
12440 /* 34677 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12441 /* 34681 */ GIM_Try, /*On fail goto*//*Label 1042*/ GIMT_Encode4(34713), // Rule ID 152 //
12442 /* 34686 */ // MIs[0] Operand 1
12443 /* 34686 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
12444 /* 34691 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12445 /* 34695 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12446 /* 34699 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12447 /* 34699 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F32),
12448 /* 34702 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12449 /* 34704 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12450 /* 34706 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12451 /* 34708 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12452 /* 34711 */ GIR_RootConstrainSelectedInstOperands,
12453 /* 34712 */ // GIR_Coverage, 152,
12454 /* 34712 */ GIR_EraseRootFromParent_Done,
12455 /* 34713 */ // Label 1042: @34713
12456 /* 34713 */ GIM_Try, /*On fail goto*//*Label 1043*/ GIMT_Encode4(34745), // Rule ID 154 //
12457 /* 34718 */ // MIs[0] Operand 1
12458 /* 34718 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
12459 /* 34723 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12460 /* 34727 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12461 /* 34731 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12462 /* 34731 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F32),
12463 /* 34734 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12464 /* 34736 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12465 /* 34738 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12466 /* 34740 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12467 /* 34743 */ GIR_RootConstrainSelectedInstOperands,
12468 /* 34744 */ // GIR_Coverage, 154,
12469 /* 34744 */ GIR_EraseRootFromParent_Done,
12470 /* 34745 */ // Label 1043: @34745
12471 /* 34745 */ GIM_Try, /*On fail goto*//*Label 1044*/ GIMT_Encode4(34777), // Rule ID 156 //
12472 /* 34750 */ // MIs[0] Operand 1
12473 /* 34750 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
12474 /* 34755 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12475 /* 34759 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12476 /* 34763 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12477 /* 34763 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F32),
12478 /* 34766 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12479 /* 34768 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12480 /* 34770 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12481 /* 34772 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12482 /* 34775 */ GIR_RootConstrainSelectedInstOperands,
12483 /* 34776 */ // GIR_Coverage, 156,
12484 /* 34776 */ GIR_EraseRootFromParent_Done,
12485 /* 34777 */ // Label 1044: @34777
12486 /* 34777 */ GIM_Try, /*On fail goto*//*Label 1045*/ GIMT_Encode4(34809), // Rule ID 158 //
12487 /* 34782 */ // MIs[0] Operand 1
12488 /* 34782 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
12489 /* 34787 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12490 /* 34791 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12491 /* 34795 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12492 /* 34795 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F32),
12493 /* 34798 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12494 /* 34800 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12495 /* 34802 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12496 /* 34804 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12497 /* 34807 */ GIR_RootConstrainSelectedInstOperands,
12498 /* 34808 */ // GIR_Coverage, 158,
12499 /* 34808 */ GIR_EraseRootFromParent_Done,
12500 /* 34809 */ // Label 1045: @34809
12501 /* 34809 */ GIM_Try, /*On fail goto*//*Label 1046*/ GIMT_Encode4(34841), // Rule ID 160 //
12502 /* 34814 */ // MIs[0] Operand 1
12503 /* 34814 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
12504 /* 34819 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12505 /* 34823 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12506 /* 34827 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12507 /* 34827 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F32),
12508 /* 34830 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12509 /* 34832 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12510 /* 34834 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12511 /* 34836 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12512 /* 34839 */ GIR_RootConstrainSelectedInstOperands,
12513 /* 34840 */ // GIR_Coverage, 160,
12514 /* 34840 */ GIR_EraseRootFromParent_Done,
12515 /* 34841 */ // Label 1046: @34841
12516 /* 34841 */ GIM_Try, /*On fail goto*//*Label 1047*/ GIMT_Encode4(34873), // Rule ID 162 //
12517 /* 34846 */ // MIs[0] Operand 1
12518 /* 34846 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
12519 /* 34851 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12520 /* 34855 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
12521 /* 34859 */ // (setcc:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F32:{ *:[i32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
12522 /* 34859 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F32),
12523 /* 34862 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12524 /* 34864 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12525 /* 34866 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12526 /* 34868 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12527 /* 34871 */ GIR_RootConstrainSelectedInstOperands,
12528 /* 34872 */ // GIR_Coverage, 162,
12529 /* 34872 */ GIR_EraseRootFromParent_Done,
12530 /* 34873 */ // Label 1047: @34873
12531 /* 34873 */ GIM_Reject,
12532 /* 34874 */ // Label 1041: @34874
12533 /* 34874 */ GIM_Reject,
12534 /* 34875 */ // Label 1039: @34875
12535 /* 34875 */ GIM_Try, /*On fail goto*//*Label 1048*/ GIMT_Encode4(35080),
12536 /* 34880 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_f64,
12537 /* 34883 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12538 /* 34887 */ GIM_Try, /*On fail goto*//*Label 1049*/ GIMT_Encode4(34919), // Rule ID 153 //
12539 /* 34892 */ // MIs[0] Operand 1
12540 /* 34892 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
12541 /* 34897 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12542 /* 34901 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12543 /* 34905 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12544 /* 34905 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F64),
12545 /* 34908 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12546 /* 34910 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12547 /* 34912 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12548 /* 34914 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12549 /* 34917 */ GIR_RootConstrainSelectedInstOperands,
12550 /* 34918 */ // GIR_Coverage, 153,
12551 /* 34918 */ GIR_EraseRootFromParent_Done,
12552 /* 34919 */ // Label 1049: @34919
12553 /* 34919 */ GIM_Try, /*On fail goto*//*Label 1050*/ GIMT_Encode4(34951), // Rule ID 155 //
12554 /* 34924 */ // MIs[0] Operand 1
12555 /* 34924 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
12556 /* 34929 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12557 /* 34933 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12558 /* 34937 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12559 /* 34937 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F64),
12560 /* 34940 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12561 /* 34942 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12562 /* 34944 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12563 /* 34946 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12564 /* 34949 */ GIR_RootConstrainSelectedInstOperands,
12565 /* 34950 */ // GIR_Coverage, 155,
12566 /* 34950 */ GIR_EraseRootFromParent_Done,
12567 /* 34951 */ // Label 1050: @34951
12568 /* 34951 */ GIM_Try, /*On fail goto*//*Label 1051*/ GIMT_Encode4(34983), // Rule ID 157 //
12569 /* 34956 */ // MIs[0] Operand 1
12570 /* 34956 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
12571 /* 34961 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12572 /* 34965 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12573 /* 34969 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12574 /* 34969 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F64),
12575 /* 34972 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12576 /* 34974 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12577 /* 34976 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12578 /* 34978 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12579 /* 34981 */ GIR_RootConstrainSelectedInstOperands,
12580 /* 34982 */ // GIR_Coverage, 157,
12581 /* 34982 */ GIR_EraseRootFromParent_Done,
12582 /* 34983 */ // Label 1051: @34983
12583 /* 34983 */ GIM_Try, /*On fail goto*//*Label 1052*/ GIMT_Encode4(35015), // Rule ID 159 //
12584 /* 34988 */ // MIs[0] Operand 1
12585 /* 34988 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
12586 /* 34993 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12587 /* 34997 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12588 /* 35001 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12589 /* 35001 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F64),
12590 /* 35004 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12591 /* 35006 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12592 /* 35008 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12593 /* 35010 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12594 /* 35013 */ GIR_RootConstrainSelectedInstOperands,
12595 /* 35014 */ // GIR_Coverage, 159,
12596 /* 35014 */ GIR_EraseRootFromParent_Done,
12597 /* 35015 */ // Label 1052: @35015
12598 /* 35015 */ GIM_Try, /*On fail goto*//*Label 1053*/ GIMT_Encode4(35047), // Rule ID 161 //
12599 /* 35020 */ // MIs[0] Operand 1
12600 /* 35020 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
12601 /* 35025 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12602 /* 35029 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12603 /* 35033 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12604 /* 35033 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F64),
12605 /* 35036 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12606 /* 35038 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12607 /* 35040 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12608 /* 35042 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12609 /* 35045 */ GIR_RootConstrainSelectedInstOperands,
12610 /* 35046 */ // GIR_Coverage, 161,
12611 /* 35046 */ GIR_EraseRootFromParent_Done,
12612 /* 35047 */ // Label 1053: @35047
12613 /* 35047 */ GIM_Try, /*On fail goto*//*Label 1054*/ GIMT_Encode4(35079), // Rule ID 163 //
12614 /* 35052 */ // MIs[0] Operand 1
12615 /* 35052 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
12616 /* 35057 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12617 /* 35061 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
12618 /* 35065 */ // (setcc:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F64:{ *:[i32] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
12619 /* 35065 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F64),
12620 /* 35068 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12621 /* 35070 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12622 /* 35072 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12623 /* 35074 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12624 /* 35077 */ GIR_RootConstrainSelectedInstOperands,
12625 /* 35078 */ // GIR_Coverage, 163,
12626 /* 35078 */ GIR_EraseRootFromParent_Done,
12627 /* 35079 */ // Label 1054: @35079
12628 /* 35079 */ GIM_Reject,
12629 /* 35080 */ // Label 1048: @35080
12630 /* 35080 */ GIM_Reject,
12631 /* 35081 */ // Label 1040: @35081
12632 /* 35081 */ GIM_Reject,
12633 /* 35082 */ // Label 1034: @35082
12634 /* 35082 */ GIM_Try, /*On fail goto*//*Label 1055*/ GIMT_Encode4(35302),
12635 /* 35087 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
12636 /* 35090 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
12637 /* 35093 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12638 /* 35097 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1056*/ GIMT_Encode4(35131), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 201 //
12639 /* 35104 */ // MIs[0] Operand 1
12640 /* 35104 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
12641 /* 35109 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12642 /* 35113 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12643 /* 35117 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12644 /* 35117 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F16x8),
12645 /* 35120 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12646 /* 35122 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12647 /* 35124 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12648 /* 35126 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12649 /* 35129 */ GIR_RootConstrainSelectedInstOperands,
12650 /* 35130 */ // GIR_Coverage, 201,
12651 /* 35130 */ GIR_EraseRootFromParent_Done,
12652 /* 35131 */ // Label 1056: @35131
12653 /* 35131 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1057*/ GIMT_Encode4(35165), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 208 //
12654 /* 35138 */ // MIs[0] Operand 1
12655 /* 35138 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
12656 /* 35143 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12657 /* 35147 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12658 /* 35151 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12659 /* 35151 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F16x8),
12660 /* 35154 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12661 /* 35156 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12662 /* 35158 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12663 /* 35160 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12664 /* 35163 */ GIR_RootConstrainSelectedInstOperands,
12665 /* 35164 */ // GIR_Coverage, 208,
12666 /* 35164 */ GIR_EraseRootFromParent_Done,
12667 /* 35165 */ // Label 1057: @35165
12668 /* 35165 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1058*/ GIMT_Encode4(35199), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 218 //
12669 /* 35172 */ // MIs[0] Operand 1
12670 /* 35172 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
12671 /* 35177 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12672 /* 35181 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12673 /* 35185 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12674 /* 35185 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F16x8),
12675 /* 35188 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12676 /* 35190 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12677 /* 35192 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12678 /* 35194 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12679 /* 35197 */ GIR_RootConstrainSelectedInstOperands,
12680 /* 35198 */ // GIR_Coverage, 218,
12681 /* 35198 */ GIR_EraseRootFromParent_Done,
12682 /* 35199 */ // Label 1058: @35199
12683 /* 35199 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1059*/ GIMT_Encode4(35233), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 228 //
12684 /* 35206 */ // MIs[0] Operand 1
12685 /* 35206 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
12686 /* 35211 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12687 /* 35215 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12688 /* 35219 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12689 /* 35219 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F16x8),
12690 /* 35222 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12691 /* 35224 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12692 /* 35226 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12693 /* 35228 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12694 /* 35231 */ GIR_RootConstrainSelectedInstOperands,
12695 /* 35232 */ // GIR_Coverage, 228,
12696 /* 35232 */ GIR_EraseRootFromParent_Done,
12697 /* 35233 */ // Label 1059: @35233
12698 /* 35233 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1060*/ GIMT_Encode4(35267), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 238 //
12699 /* 35240 */ // MIs[0] Operand 1
12700 /* 35240 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
12701 /* 35245 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12702 /* 35249 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12703 /* 35253 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12704 /* 35253 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F16x8),
12705 /* 35256 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12706 /* 35258 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12707 /* 35260 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12708 /* 35262 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12709 /* 35265 */ GIR_RootConstrainSelectedInstOperands,
12710 /* 35266 */ // GIR_Coverage, 238,
12711 /* 35266 */ GIR_EraseRootFromParent_Done,
12712 /* 35267 */ // Label 1060: @35267
12713 /* 35267 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1061*/ GIMT_Encode4(35301), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 248 //
12714 /* 35274 */ // MIs[0] Operand 1
12715 /* 35274 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
12716 /* 35279 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12717 /* 35283 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12718 /* 35287 */ // (setcc:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
12719 /* 35287 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F16x8),
12720 /* 35290 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12721 /* 35292 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12722 /* 35294 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12723 /* 35296 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12724 /* 35299 */ GIR_RootConstrainSelectedInstOperands,
12725 /* 35300 */ // GIR_Coverage, 248,
12726 /* 35300 */ GIR_EraseRootFromParent_Done,
12727 /* 35301 */ // Label 1061: @35301
12728 /* 35301 */ GIM_Reject,
12729 /* 35302 */ // Label 1055: @35302
12730 /* 35302 */ GIM_Reject,
12731 /* 35303 */ // Label 1035: @35303
12732 /* 35303 */ GIM_Try, /*On fail goto*//*Label 1062*/ GIMT_Encode4(35523),
12733 /* 35308 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
12734 /* 35311 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
12735 /* 35314 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12736 /* 35318 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1063*/ GIMT_Encode4(35352), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 199 //
12737 /* 35325 */ // MIs[0] Operand 1
12738 /* 35325 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
12739 /* 35330 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12740 /* 35334 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12741 /* 35338 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12742 /* 35338 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F32x4),
12743 /* 35341 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12744 /* 35343 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12745 /* 35345 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12746 /* 35347 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12747 /* 35350 */ GIR_RootConstrainSelectedInstOperands,
12748 /* 35351 */ // GIR_Coverage, 199,
12749 /* 35351 */ GIR_EraseRootFromParent_Done,
12750 /* 35352 */ // Label 1063: @35352
12751 /* 35352 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1064*/ GIMT_Encode4(35386), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 206 //
12752 /* 35359 */ // MIs[0] Operand 1
12753 /* 35359 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
12754 /* 35364 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12755 /* 35368 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12756 /* 35372 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12757 /* 35372 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F32x4),
12758 /* 35375 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12759 /* 35377 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12760 /* 35379 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12761 /* 35381 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12762 /* 35384 */ GIR_RootConstrainSelectedInstOperands,
12763 /* 35385 */ // GIR_Coverage, 206,
12764 /* 35385 */ GIR_EraseRootFromParent_Done,
12765 /* 35386 */ // Label 1064: @35386
12766 /* 35386 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1065*/ GIMT_Encode4(35420), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 216 //
12767 /* 35393 */ // MIs[0] Operand 1
12768 /* 35393 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
12769 /* 35398 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12770 /* 35402 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12771 /* 35406 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12772 /* 35406 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F32x4),
12773 /* 35409 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12774 /* 35411 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12775 /* 35413 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12776 /* 35415 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12777 /* 35418 */ GIR_RootConstrainSelectedInstOperands,
12778 /* 35419 */ // GIR_Coverage, 216,
12779 /* 35419 */ GIR_EraseRootFromParent_Done,
12780 /* 35420 */ // Label 1065: @35420
12781 /* 35420 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1066*/ GIMT_Encode4(35454), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 226 //
12782 /* 35427 */ // MIs[0] Operand 1
12783 /* 35427 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
12784 /* 35432 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12785 /* 35436 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12786 /* 35440 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12787 /* 35440 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F32x4),
12788 /* 35443 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12789 /* 35445 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12790 /* 35447 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12791 /* 35449 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12792 /* 35452 */ GIR_RootConstrainSelectedInstOperands,
12793 /* 35453 */ // GIR_Coverage, 226,
12794 /* 35453 */ GIR_EraseRootFromParent_Done,
12795 /* 35454 */ // Label 1066: @35454
12796 /* 35454 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1067*/ GIMT_Encode4(35488), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 236 //
12797 /* 35461 */ // MIs[0] Operand 1
12798 /* 35461 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
12799 /* 35466 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12800 /* 35470 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12801 /* 35474 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12802 /* 35474 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F32x4),
12803 /* 35477 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12804 /* 35479 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12805 /* 35481 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12806 /* 35483 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12807 /* 35486 */ GIR_RootConstrainSelectedInstOperands,
12808 /* 35487 */ // GIR_Coverage, 236,
12809 /* 35487 */ GIR_EraseRootFromParent_Done,
12810 /* 35488 */ // Label 1067: @35488
12811 /* 35488 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1068*/ GIMT_Encode4(35522), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 246 //
12812 /* 35495 */ // MIs[0] Operand 1
12813 /* 35495 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
12814 /* 35500 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12815 /* 35504 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12816 /* 35508 */ // (setcc:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
12817 /* 35508 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F32x4),
12818 /* 35511 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12819 /* 35513 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12820 /* 35515 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12821 /* 35517 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12822 /* 35520 */ GIR_RootConstrainSelectedInstOperands,
12823 /* 35521 */ // GIR_Coverage, 246,
12824 /* 35521 */ GIR_EraseRootFromParent_Done,
12825 /* 35522 */ // Label 1068: @35522
12826 /* 35522 */ GIM_Reject,
12827 /* 35523 */ // Label 1062: @35523
12828 /* 35523 */ GIM_Reject,
12829 /* 35524 */ // Label 1036: @35524
12830 /* 35524 */ GIM_Try, /*On fail goto*//*Label 1069*/ GIMT_Encode4(35744),
12831 /* 35529 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
12832 /* 35532 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
12833 /* 35535 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12834 /* 35539 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1070*/ GIMT_Encode4(35573), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 200 //
12835 /* 35546 */ // MIs[0] Operand 1
12836 /* 35546 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OEQ),
12837 /* 35551 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12838 /* 35555 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12839 /* 35559 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOEQ:{ *:[Other] }) => (EQ_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12840 /* 35559 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::EQ_F64x2),
12841 /* 35562 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12842 /* 35564 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12843 /* 35566 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12844 /* 35568 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12845 /* 35571 */ GIR_RootConstrainSelectedInstOperands,
12846 /* 35572 */ // GIR_Coverage, 200,
12847 /* 35572 */ GIR_EraseRootFromParent_Done,
12848 /* 35573 */ // Label 1070: @35573
12849 /* 35573 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1071*/ GIMT_Encode4(35607), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 207 //
12850 /* 35580 */ // MIs[0] Operand 1
12851 /* 35580 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_UNE),
12852 /* 35585 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12853 /* 35589 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12854 /* 35593 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETUNE:{ *:[Other] }) => (NE_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12855 /* 35593 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NE_F64x2),
12856 /* 35596 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12857 /* 35598 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12858 /* 35600 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12859 /* 35602 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12860 /* 35605 */ GIR_RootConstrainSelectedInstOperands,
12861 /* 35606 */ // GIR_Coverage, 207,
12862 /* 35606 */ GIR_EraseRootFromParent_Done,
12863 /* 35607 */ // Label 1071: @35607
12864 /* 35607 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1072*/ GIMT_Encode4(35641), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 217 //
12865 /* 35614 */ // MIs[0] Operand 1
12866 /* 35614 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
12867 /* 35619 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12868 /* 35623 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12869 /* 35627 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOLT:{ *:[Other] }) => (LT_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12870 /* 35627 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LT_F64x2),
12871 /* 35630 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12872 /* 35632 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12873 /* 35634 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12874 /* 35636 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12875 /* 35639 */ GIR_RootConstrainSelectedInstOperands,
12876 /* 35640 */ // GIR_Coverage, 217,
12877 /* 35640 */ GIR_EraseRootFromParent_Done,
12878 /* 35641 */ // Label 1072: @35641
12879 /* 35641 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1073*/ GIMT_Encode4(35675), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 227 //
12880 /* 35648 */ // MIs[0] Operand 1
12881 /* 35648 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGT),
12882 /* 35653 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12883 /* 35657 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12884 /* 35661 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOGT:{ *:[Other] }) => (GT_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12885 /* 35661 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GT_F64x2),
12886 /* 35664 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12887 /* 35666 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12888 /* 35668 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12889 /* 35670 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12890 /* 35673 */ GIR_RootConstrainSelectedInstOperands,
12891 /* 35674 */ // GIR_Coverage, 227,
12892 /* 35674 */ GIR_EraseRootFromParent_Done,
12893 /* 35675 */ // Label 1073: @35675
12894 /* 35675 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1074*/ GIMT_Encode4(35709), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 237 //
12895 /* 35682 */ // MIs[0] Operand 1
12896 /* 35682 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLE),
12897 /* 35687 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12898 /* 35691 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12899 /* 35695 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOLE:{ *:[Other] }) => (LE_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12900 /* 35695 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LE_F64x2),
12901 /* 35698 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12902 /* 35700 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12903 /* 35702 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12904 /* 35704 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12905 /* 35707 */ GIR_RootConstrainSelectedInstOperands,
12906 /* 35708 */ // GIR_Coverage, 237,
12907 /* 35708 */ GIR_EraseRootFromParent_Done,
12908 /* 35709 */ // Label 1074: @35709
12909 /* 35709 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1075*/ GIMT_Encode4(35743), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 247 //
12910 /* 35716 */ // MIs[0] Operand 1
12911 /* 35716 */ GIM_CheckCmpPredicate, /*MI*/0, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OGE),
12912 /* 35721 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12913 /* 35725 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
12914 /* 35729 */ // (setcc:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs, SETOGE:{ *:[Other] }) => (GE_F64x2:{ *:[v2i64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
12915 /* 35729 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::GE_F64x2),
12916 /* 35732 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12917 /* 35734 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12918 /* 35736 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12919 /* 35738 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12920 /* 35741 */ GIR_RootConstrainSelectedInstOperands,
12921 /* 35742 */ // GIR_Coverage, 247,
12922 /* 35742 */ GIR_EraseRootFromParent_Done,
12923 /* 35743 */ // Label 1075: @35743
12924 /* 35743 */ GIM_Reject,
12925 /* 35744 */ // Label 1069: @35744
12926 /* 35744 */ GIM_Reject,
12927 /* 35745 */ // Label 1037: @35745
12928 /* 35745 */ GIM_Reject,
12929 /* 35746 */ // Label 39: @35746
12930 /* 35746 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(19), /*)*//*default:*//*Label 1089*/ GIMT_Encode4(40271),
12931 /* 35757 */ /*GILLT_i32*//*Label 1076*/ GIMT_Encode4(35825),
12932 /* 35761 */ /*GILLT_i64*//*Label 1077*/ GIMT_Encode4(36010),
12933 /* 35765 */ /*GILLT_f32*//*Label 1078*/ GIMT_Encode4(36195),
12934 /* 35769 */ /*GILLT_f64*//*Label 1079*/ GIMT_Encode4(36380),
12935 /* 35773 */ /*GILLT_p0s32*//*Label 1080*/ GIMT_Encode4(36565),
12936 /* 35777 */ /*GILLT_p0s64*//*Label 1081*/ GIMT_Encode4(36734), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
12937 /* 35797 */ /*GILLT_v16i8*//*Label 1082*/ GIMT_Encode4(36903),
12938 /* 35801 */ /*GILLT_v8i16*//*Label 1083*/ GIMT_Encode4(37271),
12939 /* 35805 */ /*GILLT_v4i32*//*Label 1084*/ GIMT_Encode4(37849),
12940 /* 35809 */ /*GILLT_v2i64*//*Label 1085*/ GIMT_Encode4(38623),
12941 /* 35813 */ /*GILLT_v8f16*//*Label 1086*/ GIMT_Encode4(39401),
12942 /* 35817 */ /*GILLT_v4f32*//*Label 1087*/ GIMT_Encode4(39687),
12943 /* 35821 */ /*GILLT_v2f64*//*Label 1088*/ GIMT_Encode4(39977),
12944 /* 35825 */ // Label 1076: @35825
12945 /* 35825 */ GIM_Try, /*On fail goto*//*Label 1090*/ GIMT_Encode4(36009),
12946 /* 35830 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
12947 /* 35833 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i32,
12948 /* 35836 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i32,
12949 /* 35839 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12950 /* 35843 */ GIM_Try, /*On fail goto*//*Label 1091*/ GIMT_Encode4(35975),
12951 /* 35848 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12952 /* 35852 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12953 /* 35856 */ GIM_Try, /*On fail goto*//*Label 1092*/ GIMT_Encode4(35915), // Rule ID 631 //
12954 /* 35861 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12955 /* 35865 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12956 /* 35869 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
12957 /* 35873 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12958 /* 35877 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12959 /* 35881 */ // MIs[1] Operand 1
12960 /* 35881 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
12961 /* 35886 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12962 /* 35891 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12963 /* 35895 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12964 /* 35897 */ // (select:{ *:[i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$cond)
12965 /* 35897 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
12966 /* 35900 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12967 /* 35902 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12968 /* 35904 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12969 /* 35906 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12970 /* 35910 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12971 /* 35913 */ GIR_RootConstrainSelectedInstOperands,
12972 /* 35914 */ // GIR_Coverage, 631,
12973 /* 35914 */ GIR_EraseRootFromParent_Done,
12974 /* 35915 */ // Label 1092: @35915
12975 /* 35915 */ GIM_Try, /*On fail goto*//*Label 1093*/ GIMT_Encode4(35974), // Rule ID 633 //
12976 /* 35920 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
12977 /* 35924 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
12978 /* 35928 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
12979 /* 35932 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
12980 /* 35936 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
12981 /* 35940 */ // MIs[1] Operand 1
12982 /* 35940 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
12983 /* 35945 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
12984 /* 35950 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
12985 /* 35954 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
12986 /* 35956 */ // (select:{ *:[i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$cond)
12987 /* 35956 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
12988 /* 35959 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
12989 /* 35961 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
12990 /* 35963 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
12991 /* 35965 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
12992 /* 35969 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
12993 /* 35972 */ GIR_RootConstrainSelectedInstOperands,
12994 /* 35973 */ // GIR_Coverage, 633,
12995 /* 35973 */ GIR_EraseRootFromParent_Done,
12996 /* 35974 */ // Label 1093: @35974
12997 /* 35974 */ GIM_Reject,
12998 /* 35975 */ // Label 1091: @35975
12999 /* 35975 */ GIM_Try, /*On fail goto*//*Label 1094*/ GIMT_Encode4(36008), // Rule ID 122 //
13000 /* 35980 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13001 /* 35984 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13002 /* 35988 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13003 /* 35992 */ // (select:{ *:[i32] } I32:{ *:[i32] }:$cond, I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$cond)
13004 /* 35992 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
13005 /* 35995 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13006 /* 35997 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13007 /* 35999 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13008 /* 36001 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
13009 /* 36003 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13010 /* 36006 */ GIR_RootConstrainSelectedInstOperands,
13011 /* 36007 */ // GIR_Coverage, 122,
13012 /* 36007 */ GIR_EraseRootFromParent_Done,
13013 /* 36008 */ // Label 1094: @36008
13014 /* 36008 */ GIM_Reject,
13015 /* 36009 */ // Label 1090: @36009
13016 /* 36009 */ GIM_Reject,
13017 /* 36010 */ // Label 1077: @36010
13018 /* 36010 */ GIM_Try, /*On fail goto*//*Label 1095*/ GIMT_Encode4(36194),
13019 /* 36015 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
13020 /* 36018 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_i64,
13021 /* 36021 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_i64,
13022 /* 36024 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13023 /* 36028 */ GIM_Try, /*On fail goto*//*Label 1096*/ GIMT_Encode4(36160),
13024 /* 36033 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13025 /* 36037 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13026 /* 36041 */ GIM_Try, /*On fail goto*//*Label 1097*/ GIMT_Encode4(36100), // Rule ID 632 //
13027 /* 36046 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13028 /* 36050 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13029 /* 36054 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13030 /* 36058 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13031 /* 36062 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13032 /* 36066 */ // MIs[1] Operand 1
13033 /* 36066 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
13034 /* 36071 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13035 /* 36076 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13036 /* 36080 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13037 /* 36082 */ // (select:{ *:[i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, I32:{ *:[i32] }:$cond)
13038 /* 36082 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
13039 /* 36085 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13040 /* 36087 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13041 /* 36089 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13042 /* 36091 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13043 /* 36095 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13044 /* 36098 */ GIR_RootConstrainSelectedInstOperands,
13045 /* 36099 */ // GIR_Coverage, 632,
13046 /* 36099 */ GIR_EraseRootFromParent_Done,
13047 /* 36100 */ // Label 1097: @36100
13048 /* 36100 */ GIM_Try, /*On fail goto*//*Label 1098*/ GIMT_Encode4(36159), // Rule ID 634 //
13049 /* 36105 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13050 /* 36109 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13051 /* 36113 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13052 /* 36117 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13053 /* 36121 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13054 /* 36125 */ // MIs[1] Operand 1
13055 /* 36125 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
13056 /* 36130 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13057 /* 36135 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13058 /* 36139 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13059 /* 36141 */ // (select:{ *:[i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$rhs, I64:{ *:[i64] }:$lhs, I32:{ *:[i32] }:$cond)
13060 /* 36141 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
13061 /* 36144 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13062 /* 36146 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13063 /* 36148 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13064 /* 36150 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13065 /* 36154 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13066 /* 36157 */ GIR_RootConstrainSelectedInstOperands,
13067 /* 36158 */ // GIR_Coverage, 634,
13068 /* 36158 */ GIR_EraseRootFromParent_Done,
13069 /* 36159 */ // Label 1098: @36159
13070 /* 36159 */ GIM_Reject,
13071 /* 36160 */ // Label 1096: @36160
13072 /* 36160 */ GIM_Try, /*On fail goto*//*Label 1099*/ GIMT_Encode4(36193), // Rule ID 123 //
13073 /* 36165 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13074 /* 36169 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13075 /* 36173 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13076 /* 36177 */ // (select:{ *:[i64] } I32:{ *:[i32] }:$cond, I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, I32:{ *:[i32] }:$cond)
13077 /* 36177 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
13078 /* 36180 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13079 /* 36182 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13080 /* 36184 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13081 /* 36186 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
13082 /* 36188 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13083 /* 36191 */ GIR_RootConstrainSelectedInstOperands,
13084 /* 36192 */ // GIR_Coverage, 123,
13085 /* 36192 */ GIR_EraseRootFromParent_Done,
13086 /* 36193 */ // Label 1099: @36193
13087 /* 36193 */ GIM_Reject,
13088 /* 36194 */ // Label 1095: @36194
13089 /* 36194 */ GIM_Reject,
13090 /* 36195 */ // Label 1078: @36195
13091 /* 36195 */ GIM_Try, /*On fail goto*//*Label 1100*/ GIMT_Encode4(36379),
13092 /* 36200 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
13093 /* 36203 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
13094 /* 36206 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_f32,
13095 /* 36209 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13096 /* 36213 */ GIM_Try, /*On fail goto*//*Label 1101*/ GIMT_Encode4(36345),
13097 /* 36218 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13098 /* 36222 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13099 /* 36226 */ GIM_Try, /*On fail goto*//*Label 1102*/ GIMT_Encode4(36285), // Rule ID 657 //
13100 /* 36231 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13101 /* 36235 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13102 /* 36239 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13103 /* 36243 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13104 /* 36247 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13105 /* 36251 */ // MIs[1] Operand 1
13106 /* 36251 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
13107 /* 36256 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13108 /* 36261 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13109 /* 36265 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13110 /* 36267 */ // (select:{ *:[f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SELECT_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, I32:{ *:[i32] }:$cond)
13111 /* 36267 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F32),
13112 /* 36270 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13113 /* 36272 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13114 /* 36274 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13115 /* 36276 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13116 /* 36280 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13117 /* 36283 */ GIR_RootConstrainSelectedInstOperands,
13118 /* 36284 */ // GIR_Coverage, 657,
13119 /* 36284 */ GIR_EraseRootFromParent_Done,
13120 /* 36285 */ // Label 1102: @36285
13121 /* 36285 */ GIM_Try, /*On fail goto*//*Label 1103*/ GIMT_Encode4(36344), // Rule ID 659 //
13122 /* 36290 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13123 /* 36294 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13124 /* 36298 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13125 /* 36302 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13126 /* 36306 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13127 /* 36310 */ // MIs[1] Operand 1
13128 /* 36310 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
13129 /* 36315 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13130 /* 36320 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13131 /* 36324 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13132 /* 36326 */ // (select:{ *:[f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SELECT_F32:{ *:[f32] } F32:{ *:[f32] }:$rhs, F32:{ *:[f32] }:$lhs, I32:{ *:[i32] }:$cond)
13133 /* 36326 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F32),
13134 /* 36329 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13135 /* 36331 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13136 /* 36333 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13137 /* 36335 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13138 /* 36339 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13139 /* 36342 */ GIR_RootConstrainSelectedInstOperands,
13140 /* 36343 */ // GIR_Coverage, 659,
13141 /* 36343 */ GIR_EraseRootFromParent_Done,
13142 /* 36344 */ // Label 1103: @36344
13143 /* 36344 */ GIM_Reject,
13144 /* 36345 */ // Label 1101: @36345
13145 /* 36345 */ GIM_Try, /*On fail goto*//*Label 1104*/ GIMT_Encode4(36378), // Rule ID 164 //
13146 /* 36350 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13147 /* 36354 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13148 /* 36358 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
13149 /* 36362 */ // (select:{ *:[f32] } I32:{ *:[i32] }:$cond, F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SELECT_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs, I32:{ *:[i32] }:$cond)
13150 /* 36362 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F32),
13151 /* 36365 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13152 /* 36367 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13153 /* 36369 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13154 /* 36371 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
13155 /* 36373 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13156 /* 36376 */ GIR_RootConstrainSelectedInstOperands,
13157 /* 36377 */ // GIR_Coverage, 164,
13158 /* 36377 */ GIR_EraseRootFromParent_Done,
13159 /* 36378 */ // Label 1104: @36378
13160 /* 36378 */ GIM_Reject,
13161 /* 36379 */ // Label 1100: @36379
13162 /* 36379 */ GIM_Reject,
13163 /* 36380 */ // Label 1079: @36380
13164 /* 36380 */ GIM_Try, /*On fail goto*//*Label 1105*/ GIMT_Encode4(36564),
13165 /* 36385 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
13166 /* 36388 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
13167 /* 36391 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_f64,
13168 /* 36394 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13169 /* 36398 */ GIM_Try, /*On fail goto*//*Label 1106*/ GIMT_Encode4(36530),
13170 /* 36403 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13171 /* 36407 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13172 /* 36411 */ GIM_Try, /*On fail goto*//*Label 1107*/ GIMT_Encode4(36470), // Rule ID 658 //
13173 /* 36416 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13174 /* 36420 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13175 /* 36424 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13176 /* 36428 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13177 /* 36432 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13178 /* 36436 */ // MIs[1] Operand 1
13179 /* 36436 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
13180 /* 36441 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13181 /* 36446 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13182 /* 36450 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13183 /* 36452 */ // (select:{ *:[f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SELECT_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, I32:{ *:[i32] }:$cond)
13184 /* 36452 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F64),
13185 /* 36455 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13186 /* 36457 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13187 /* 36459 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13188 /* 36461 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13189 /* 36465 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13190 /* 36468 */ GIR_RootConstrainSelectedInstOperands,
13191 /* 36469 */ // GIR_Coverage, 658,
13192 /* 36469 */ GIR_EraseRootFromParent_Done,
13193 /* 36470 */ // Label 1107: @36470
13194 /* 36470 */ GIM_Try, /*On fail goto*//*Label 1108*/ GIMT_Encode4(36529), // Rule ID 660 //
13195 /* 36475 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13196 /* 36479 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13197 /* 36483 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13198 /* 36487 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13199 /* 36491 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13200 /* 36495 */ // MIs[1] Operand 1
13201 /* 36495 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
13202 /* 36500 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13203 /* 36505 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13204 /* 36509 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13205 /* 36511 */ // (select:{ *:[f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SELECT_F64:{ *:[f64] } F64:{ *:[f64] }:$rhs, F64:{ *:[f64] }:$lhs, I32:{ *:[i32] }:$cond)
13206 /* 36511 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F64),
13207 /* 36514 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13208 /* 36516 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13209 /* 36518 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13210 /* 36520 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13211 /* 36524 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13212 /* 36527 */ GIR_RootConstrainSelectedInstOperands,
13213 /* 36528 */ // GIR_Coverage, 660,
13214 /* 36528 */ GIR_EraseRootFromParent_Done,
13215 /* 36529 */ // Label 1108: @36529
13216 /* 36529 */ GIM_Reject,
13217 /* 36530 */ // Label 1106: @36530
13218 /* 36530 */ GIM_Try, /*On fail goto*//*Label 1109*/ GIMT_Encode4(36563), // Rule ID 165 //
13219 /* 36535 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13220 /* 36539 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13221 /* 36543 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
13222 /* 36547 */ // (select:{ *:[f64] } I32:{ *:[i32] }:$cond, F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SELECT_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs, I32:{ *:[i32] }:$cond)
13223 /* 36547 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_F64),
13224 /* 36550 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13225 /* 36552 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13226 /* 36554 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13227 /* 36556 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
13228 /* 36558 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13229 /* 36561 */ GIR_RootConstrainSelectedInstOperands,
13230 /* 36562 */ // GIR_Coverage, 165,
13231 /* 36562 */ GIR_EraseRootFromParent_Done,
13232 /* 36563 */ // Label 1109: @36563
13233 /* 36563 */ GIM_Reject,
13234 /* 36564 */ // Label 1105: @36564
13235 /* 36564 */ GIM_Reject,
13236 /* 36565 */ // Label 1080: @36565
13237 /* 36565 */ GIM_Try, /*On fail goto*//*Label 1110*/ GIMT_Encode4(36733),
13238 /* 36570 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
13239 /* 36573 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_p0s32,
13240 /* 36576 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_p0s32,
13241 /* 36579 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13242 /* 36583 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1111*/ GIMT_Encode4(36644), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1330 //
13243 /* 36590 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13244 /* 36594 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13245 /* 36598 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13246 /* 36602 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13247 /* 36606 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13248 /* 36610 */ // MIs[1] Operand 1
13249 /* 36610 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
13250 /* 36615 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13251 /* 36620 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13252 /* 36624 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13253 /* 36626 */ // (select:{ *:[i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$cond)
13254 /* 36626 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
13255 /* 36629 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13256 /* 36631 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13257 /* 36633 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13258 /* 36635 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13259 /* 36639 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13260 /* 36642 */ GIR_RootConstrainSelectedInstOperands,
13261 /* 36643 */ // GIR_Coverage, 1330,
13262 /* 36643 */ GIR_EraseRootFromParent_Done,
13263 /* 36644 */ // Label 1111: @36644
13264 /* 36644 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1112*/ GIMT_Encode4(36705), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1332 //
13265 /* 36651 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13266 /* 36655 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13267 /* 36659 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13268 /* 36663 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13269 /* 36667 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13270 /* 36671 */ // MIs[1] Operand 1
13271 /* 36671 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
13272 /* 36676 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13273 /* 36681 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13274 /* 36685 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13275 /* 36687 */ // (select:{ *:[i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$cond)
13276 /* 36687 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
13277 /* 36690 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13278 /* 36692 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13279 /* 36694 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13280 /* 36696 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13281 /* 36700 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13282 /* 36703 */ GIR_RootConstrainSelectedInstOperands,
13283 /* 36704 */ // GIR_Coverage, 1332,
13284 /* 36704 */ GIR_EraseRootFromParent_Done,
13285 /* 36705 */ // Label 1112: @36705
13286 /* 36705 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1113*/ GIMT_Encode4(36732), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1328 //
13287 /* 36712 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13288 /* 36716 */ // (select:{ *:[i32] } I32:{ *:[i32] }:$cond, p0:{ *:[i32] }:$lhs, p0:{ *:[i32] }:$rhs) => (SELECT_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs, I32:{ *:[i32] }:$cond)
13289 /* 36716 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I32),
13290 /* 36719 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13291 /* 36721 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13292 /* 36723 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13293 /* 36725 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
13294 /* 36727 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13295 /* 36730 */ GIR_RootConstrainSelectedInstOperands,
13296 /* 36731 */ // GIR_Coverage, 1328,
13297 /* 36731 */ GIR_EraseRootFromParent_Done,
13298 /* 36732 */ // Label 1113: @36732
13299 /* 36732 */ GIM_Reject,
13300 /* 36733 */ // Label 1110: @36733
13301 /* 36733 */ GIM_Reject,
13302 /* 36734 */ // Label 1081: @36734
13303 /* 36734 */ GIM_Try, /*On fail goto*//*Label 1114*/ GIMT_Encode4(36902),
13304 /* 36739 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
13305 /* 36742 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_p0s64,
13306 /* 36745 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_p0s64,
13307 /* 36748 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
13308 /* 36752 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1115*/ GIMT_Encode4(36813), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1331 //
13309 /* 36759 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13310 /* 36763 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13311 /* 36767 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13312 /* 36771 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13313 /* 36775 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13314 /* 36779 */ // MIs[1] Operand 1
13315 /* 36779 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
13316 /* 36784 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13317 /* 36789 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13318 /* 36793 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13319 /* 36795 */ // (select:{ *:[i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, I32:{ *:[i32] }:$cond)
13320 /* 36795 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
13321 /* 36798 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13322 /* 36800 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13323 /* 36802 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13324 /* 36804 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13325 /* 36808 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13326 /* 36811 */ GIR_RootConstrainSelectedInstOperands,
13327 /* 36812 */ // GIR_Coverage, 1331,
13328 /* 36812 */ GIR_EraseRootFromParent_Done,
13329 /* 36813 */ // Label 1115: @36813
13330 /* 36813 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1116*/ GIMT_Encode4(36874), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1333 //
13331 /* 36820 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13332 /* 36824 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13333 /* 36828 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13334 /* 36832 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13335 /* 36836 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13336 /* 36840 */ // MIs[1] Operand 1
13337 /* 36840 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
13338 /* 36845 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13339 /* 36850 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13340 /* 36854 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13341 /* 36856 */ // (select:{ *:[i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$rhs, I64:{ *:[i64] }:$lhs, I32:{ *:[i32] }:$cond)
13342 /* 36856 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
13343 /* 36859 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13344 /* 36861 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13345 /* 36863 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13346 /* 36865 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13347 /* 36869 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13348 /* 36872 */ GIR_RootConstrainSelectedInstOperands,
13349 /* 36873 */ // GIR_Coverage, 1333,
13350 /* 36873 */ GIR_EraseRootFromParent_Done,
13351 /* 36874 */ // Label 1116: @36874
13352 /* 36874 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1117*/ GIMT_Encode4(36901), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1329 //
13353 /* 36881 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13354 /* 36885 */ // (select:{ *:[i64] } I32:{ *:[i32] }:$cond, p0:{ *:[i64] }:$lhs, p0:{ *:[i64] }:$rhs) => (SELECT_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs, I32:{ *:[i32] }:$cond)
13355 /* 36885 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_I64),
13356 /* 36888 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13357 /* 36890 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13358 /* 36892 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13359 /* 36894 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
13360 /* 36896 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13361 /* 36899 */ GIR_RootConstrainSelectedInstOperands,
13362 /* 36900 */ // GIR_Coverage, 1329,
13363 /* 36900 */ GIR_EraseRootFromParent_Done,
13364 /* 36901 */ // Label 1117: @36901
13365 /* 36901 */ GIM_Reject,
13366 /* 36902 */ // Label 1114: @36902
13367 /* 36902 */ GIM_Reject,
13368 /* 36903 */ // Label 1082: @36903
13369 /* 36903 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(13), /*)*//*default:*//*Label 1120*/ GIMT_Encode4(37270),
13370 /* 36914 */ /*GILLT_i32*//*Label 1118*/ GIMT_Encode4(36958), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
13371 /* 36954 */ /*GILLT_v16i8*//*Label 1119*/ GIMT_Encode4(37140),
13372 /* 36958 */ // Label 1118: @36958
13373 /* 36958 */ GIM_Try, /*On fail goto*//*Label 1121*/ GIMT_Encode4(37139),
13374 /* 36963 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
13375 /* 36966 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
13376 /* 36969 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13377 /* 36973 */ GIM_Try, /*On fail goto*//*Label 1122*/ GIMT_Encode4(37105),
13378 /* 36978 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13379 /* 36982 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13380 /* 36986 */ GIM_Try, /*On fail goto*//*Label 1123*/ GIMT_Encode4(37045), // Rule ID 1083 //
13381 /* 36991 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13382 /* 36995 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13383 /* 36999 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13384 /* 37003 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13385 /* 37007 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13386 /* 37011 */ // MIs[1] Operand 1
13387 /* 37011 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
13388 /* 37016 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13389 /* 37021 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13390 /* 37025 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13391 /* 37027 */ // (select:{ *:[v16i8] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SELECT_V128:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs, ?:{ *:[i32] }:$cond)
13392 /* 37027 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13393 /* 37030 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13394 /* 37032 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13395 /* 37034 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13396 /* 37036 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13397 /* 37040 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13398 /* 37043 */ GIR_RootConstrainSelectedInstOperands,
13399 /* 37044 */ // GIR_Coverage, 1083,
13400 /* 37044 */ GIR_EraseRootFromParent_Done,
13401 /* 37045 */ // Label 1123: @37045
13402 /* 37045 */ GIM_Try, /*On fail goto*//*Label 1124*/ GIMT_Encode4(37104), // Rule ID 1084 //
13403 /* 37050 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13404 /* 37054 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13405 /* 37058 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13406 /* 37062 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13407 /* 37066 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13408 /* 37070 */ // MIs[1] Operand 1
13409 /* 37070 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
13410 /* 37075 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13411 /* 37080 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13412 /* 37084 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13413 /* 37086 */ // (select:{ *:[v16i8] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SELECT_V128:{ *:[v16i8] } ?:{ *:[v16i8] }:$rhs, ?:{ *:[v16i8] }:$lhs, ?:{ *:[i32] }:$cond)
13414 /* 37086 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13415 /* 37089 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13416 /* 37091 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13417 /* 37093 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13418 /* 37095 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13419 /* 37099 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13420 /* 37102 */ GIR_RootConstrainSelectedInstOperands,
13421 /* 37103 */ // GIR_Coverage, 1084,
13422 /* 37103 */ GIR_EraseRootFromParent_Done,
13423 /* 37104 */ // Label 1124: @37104
13424 /* 37104 */ GIM_Reject,
13425 /* 37105 */ // Label 1122: @37105
13426 /* 37105 */ GIM_Try, /*On fail goto*//*Label 1125*/ GIMT_Encode4(37138), // Rule ID 1082 //
13427 /* 37110 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13428 /* 37114 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13429 /* 37118 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13430 /* 37122 */ // (select:{ *:[v16i8] } I32:{ *:[i32] }:$cond, V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SELECT_V128:{ *:[v16i8] } ?:{ *:[v16i8] }:$lhs, ?:{ *:[v16i8] }:$rhs, ?:{ *:[i32] }:$cond)
13431 /* 37122 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13432 /* 37125 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13433 /* 37127 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13434 /* 37129 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13435 /* 37131 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
13436 /* 37133 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13437 /* 37136 */ GIR_RootConstrainSelectedInstOperands,
13438 /* 37137 */ // GIR_Coverage, 1082,
13439 /* 37137 */ GIR_EraseRootFromParent_Done,
13440 /* 37138 */ // Label 1125: @37138
13441 /* 37138 */ GIM_Reject,
13442 /* 37139 */ // Label 1121: @37139
13443 /* 37139 */ GIM_Reject,
13444 /* 37140 */ // Label 1119: @37140
13445 /* 37140 */ GIM_Try, /*On fail goto*//*Label 1126*/ GIMT_Encode4(37269),
13446 /* 37145 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
13447 /* 37148 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v16i8,
13448 /* 37151 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13449 /* 37155 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13450 /* 37159 */ GIM_Try, /*On fail goto*//*Label 1127*/ GIMT_Encode4(37239), // Rule ID 1071 //
13451 /* 37164 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
13452 /* 37168 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
13453 /* 37172 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v16i8,
13454 /* 37176 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16i8,
13455 /* 37180 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16i8,
13456 /* 37184 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13457 /* 37189 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13458 /* 37193 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
13459 /* 37199 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v16i8,
13460 /* 37203 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
13461 /* 37205 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
13462 /* 37209 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
13463 /* 37215 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v16i8,
13464 /* 37219 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
13465 /* 37221 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13466 /* 37223 */ // (vselect:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$x, immAllOnesV:{ *:[v16i8] }), immAllZerosV:{ *:[v16i8] }) => (ANDNOT:{ *:[v16i8] } ?:{ *:[v16i8] }:$c, ?:{ *:[v16i8] }:$x)
13467 /* 37223 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
13468 /* 37226 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13469 /* 37228 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
13470 /* 37230 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // x
13471 /* 37234 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13472 /* 37237 */ GIR_RootConstrainSelectedInstOperands,
13473 /* 37238 */ // GIR_Coverage, 1071,
13474 /* 37238 */ GIR_EraseRootFromParent_Done,
13475 /* 37239 */ // Label 1127: @37239
13476 /* 37239 */ GIM_Try, /*On fail goto*//*Label 1128*/ GIMT_Encode4(37268), // Rule ID 1075 //
13477 /* 37244 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13478 /* 37248 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13479 /* 37252 */ // (vselect:{ *:[v16i8] } V128:{ *:[v16i8] }:$c, V128:{ *:[v16i8] }:$v1, V128:{ *:[v16i8] }:$v2) => (BITSELECT:{ *:[v16i8] } ?:{ *:[v16i8] }:$v1, ?:{ *:[v16i8] }:$v2, ?:{ *:[v16i8] }:$c)
13480 /* 37252 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
13481 /* 37255 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13482 /* 37257 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
13483 /* 37259 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
13484 /* 37261 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
13485 /* 37263 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13486 /* 37266 */ GIR_RootConstrainSelectedInstOperands,
13487 /* 37267 */ // GIR_Coverage, 1075,
13488 /* 37267 */ GIR_EraseRootFromParent_Done,
13489 /* 37268 */ // Label 1128: @37268
13490 /* 37268 */ GIM_Reject,
13491 /* 37269 */ // Label 1126: @37269
13492 /* 37269 */ GIM_Reject,
13493 /* 37270 */ // Label 1120: @37270
13494 /* 37270 */ GIM_Reject,
13495 /* 37271 */ // Label 1083: @37271
13496 /* 37271 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(14), /*)*//*default:*//*Label 1131*/ GIMT_Encode4(37848),
13497 /* 37282 */ /*GILLT_i32*//*Label 1129*/ GIMT_Encode4(37330), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
13498 /* 37326 */ /*GILLT_v8i16*//*Label 1130*/ GIMT_Encode4(37512),
13499 /* 37330 */ // Label 1129: @37330
13500 /* 37330 */ GIM_Try, /*On fail goto*//*Label 1132*/ GIMT_Encode4(37511),
13501 /* 37335 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
13502 /* 37338 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
13503 /* 37341 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13504 /* 37345 */ GIM_Try, /*On fail goto*//*Label 1133*/ GIMT_Encode4(37477),
13505 /* 37350 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13506 /* 37354 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13507 /* 37358 */ GIM_Try, /*On fail goto*//*Label 1134*/ GIMT_Encode4(37417), // Rule ID 1086 //
13508 /* 37363 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13509 /* 37367 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13510 /* 37371 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13511 /* 37375 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13512 /* 37379 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13513 /* 37383 */ // MIs[1] Operand 1
13514 /* 37383 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
13515 /* 37388 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13516 /* 37393 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13517 /* 37397 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13518 /* 37399 */ // (select:{ *:[v8i16] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SELECT_V128:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs, ?:{ *:[i32] }:$cond)
13519 /* 37399 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13520 /* 37402 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13521 /* 37404 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13522 /* 37406 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13523 /* 37408 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13524 /* 37412 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13525 /* 37415 */ GIR_RootConstrainSelectedInstOperands,
13526 /* 37416 */ // GIR_Coverage, 1086,
13527 /* 37416 */ GIR_EraseRootFromParent_Done,
13528 /* 37417 */ // Label 1134: @37417
13529 /* 37417 */ GIM_Try, /*On fail goto*//*Label 1135*/ GIMT_Encode4(37476), // Rule ID 1087 //
13530 /* 37422 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13531 /* 37426 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13532 /* 37430 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13533 /* 37434 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13534 /* 37438 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13535 /* 37442 */ // MIs[1] Operand 1
13536 /* 37442 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
13537 /* 37447 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13538 /* 37452 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13539 /* 37456 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13540 /* 37458 */ // (select:{ *:[v8i16] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SELECT_V128:{ *:[v8i16] } ?:{ *:[v8i16] }:$rhs, ?:{ *:[v8i16] }:$lhs, ?:{ *:[i32] }:$cond)
13541 /* 37458 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13542 /* 37461 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13543 /* 37463 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13544 /* 37465 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13545 /* 37467 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13546 /* 37471 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13547 /* 37474 */ GIR_RootConstrainSelectedInstOperands,
13548 /* 37475 */ // GIR_Coverage, 1087,
13549 /* 37475 */ GIR_EraseRootFromParent_Done,
13550 /* 37476 */ // Label 1135: @37476
13551 /* 37476 */ GIM_Reject,
13552 /* 37477 */ // Label 1133: @37477
13553 /* 37477 */ GIM_Try, /*On fail goto*//*Label 1136*/ GIMT_Encode4(37510), // Rule ID 1085 //
13554 /* 37482 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13555 /* 37486 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13556 /* 37490 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13557 /* 37494 */ // (select:{ *:[v8i16] } I32:{ *:[i32] }:$cond, V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SELECT_V128:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs, ?:{ *:[i32] }:$cond)
13558 /* 37494 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13559 /* 37497 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13560 /* 37499 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13561 /* 37501 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13562 /* 37503 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
13563 /* 37505 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13564 /* 37508 */ GIR_RootConstrainSelectedInstOperands,
13565 /* 37509 */ // GIR_Coverage, 1085,
13566 /* 37509 */ GIR_EraseRootFromParent_Done,
13567 /* 37510 */ // Label 1136: @37510
13568 /* 37510 */ GIM_Reject,
13569 /* 37511 */ // Label 1132: @37511
13570 /* 37511 */ GIM_Reject,
13571 /* 37512 */ // Label 1130: @37512
13572 /* 37512 */ GIM_Try, /*On fail goto*//*Label 1137*/ GIMT_Encode4(37606), // Rule ID 1072 //
13573 /* 37517 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
13574 /* 37520 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
13575 /* 37523 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13576 /* 37527 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13577 /* 37531 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
13578 /* 37535 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
13579 /* 37539 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
13580 /* 37543 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8i16,
13581 /* 37547 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8i16,
13582 /* 37551 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13583 /* 37556 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13584 /* 37560 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
13585 /* 37566 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v8i16,
13586 /* 37570 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
13587 /* 37572 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
13588 /* 37576 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
13589 /* 37582 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v8i16,
13590 /* 37586 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
13591 /* 37588 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13592 /* 37590 */ // (vselect:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$x, immAllOnesV:{ *:[v8i16] }), immAllZerosV:{ *:[v8i16] }) => (ANDNOT:{ *:[v8i16] } ?:{ *:[v8i16] }:$c, ?:{ *:[v8i16] }:$x)
13593 /* 37590 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
13594 /* 37593 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13595 /* 37595 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
13596 /* 37597 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // x
13597 /* 37601 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13598 /* 37604 */ GIR_RootConstrainSelectedInstOperands,
13599 /* 37605 */ // GIR_Coverage, 1072,
13600 /* 37605 */ GIR_EraseRootFromParent_Done,
13601 /* 37606 */ // Label 1137: @37606
13602 /* 37606 */ GIM_Try, /*On fail goto*//*Label 1138*/ GIMT_Encode4(37804),
13603 /* 37611 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13604 /* 37615 */ GIM_Try, /*On fail goto*//*Label 1139*/ GIMT_Encode4(37709), // Rule ID 1178 //
13605 /* 37620 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13606 /* 37624 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
13607 /* 37628 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
13608 /* 37632 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8f16,
13609 /* 37636 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8f16,
13610 /* 37640 */ // MIs[1] Operand 1
13611 /* 37640 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
13612 /* 37645 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13613 /* 37649 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
13614 /* 37653 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
13615 /* 37657 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13616 /* 37662 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
13617 /* 37666 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
13618 /* 37670 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
13619 /* 37674 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13620 /* 37679 */ // MIs[0] rhs
13621 /* 37679 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
13622 /* 37684 */ // MIs[0] lhs
13623 /* 37684 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
13624 /* 37689 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13625 /* 37691 */ // (vselect:{ *:[v8i16] } (setcc:{ *:[v8i16] } (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$rhs), (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v8i16] }:$rhs, V128:{ *:[v8i16] }:$lhs) => (PMIN_F16x8:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
13626 /* 37691 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F16x8),
13627 /* 37694 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13628 /* 37696 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
13629 /* 37700 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
13630 /* 37704 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13631 /* 37707 */ GIR_RootConstrainSelectedInstOperands,
13632 /* 37708 */ // GIR_Coverage, 1178,
13633 /* 37708 */ GIR_EraseRootFromParent_Done,
13634 /* 37709 */ // Label 1139: @37709
13635 /* 37709 */ GIM_Try, /*On fail goto*//*Label 1140*/ GIMT_Encode4(37803), // Rule ID 1179 //
13636 /* 37714 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13637 /* 37718 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
13638 /* 37722 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8i16,
13639 /* 37726 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8f16,
13640 /* 37730 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8f16,
13641 /* 37734 */ // MIs[1] Operand 1
13642 /* 37734 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
13643 /* 37739 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13644 /* 37743 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
13645 /* 37747 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s16,
13646 /* 37751 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13647 /* 37756 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
13648 /* 37760 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
13649 /* 37764 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v8s16,
13650 /* 37768 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13651 /* 37773 */ // MIs[0] rhs
13652 /* 37773 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
13653 /* 37778 */ // MIs[0] lhs
13654 /* 37778 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
13655 /* 37783 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13656 /* 37785 */ // (vselect:{ *:[v8i16] } (setcc:{ *:[v8i16] } (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$lhs), (bitconvert:{ *:[v8f16] } V128:{ *:[v8i16] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v8i16] }:$rhs, V128:{ *:[v8i16] }:$lhs) => (PMAX_F16x8:{ *:[v8i16] } ?:{ *:[v8i16] }:$lhs, ?:{ *:[v8i16] }:$rhs)
13657 /* 37785 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F16x8),
13658 /* 37788 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13659 /* 37790 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
13660 /* 37794 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
13661 /* 37798 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13662 /* 37801 */ GIR_RootConstrainSelectedInstOperands,
13663 /* 37802 */ // GIR_Coverage, 1179,
13664 /* 37802 */ GIR_EraseRootFromParent_Done,
13665 /* 37803 */ // Label 1140: @37803
13666 /* 37803 */ GIM_Reject,
13667 /* 37804 */ // Label 1138: @37804
13668 /* 37804 */ GIM_Try, /*On fail goto*//*Label 1141*/ GIMT_Encode4(37847), // Rule ID 1076 //
13669 /* 37809 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
13670 /* 37812 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8i16,
13671 /* 37815 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13672 /* 37819 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13673 /* 37823 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13674 /* 37827 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13675 /* 37831 */ // (vselect:{ *:[v8i16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8i16] }:$v1, V128:{ *:[v8i16] }:$v2) => (BITSELECT:{ *:[v8i16] } ?:{ *:[v8i16] }:$v1, ?:{ *:[v8i16] }:$v2, ?:{ *:[v8i16] }:$c)
13676 /* 37831 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
13677 /* 37834 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13678 /* 37836 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
13679 /* 37838 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
13680 /* 37840 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
13681 /* 37842 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13682 /* 37845 */ GIR_RootConstrainSelectedInstOperands,
13683 /* 37846 */ // GIR_Coverage, 1076,
13684 /* 37846 */ GIR_EraseRootFromParent_Done,
13685 /* 37847 */ // Label 1141: @37847
13686 /* 37847 */ GIM_Reject,
13687 /* 37848 */ // Label 1131: @37848
13688 /* 37848 */ GIM_Reject,
13689 /* 37849 */ // Label 1084: @37849
13690 /* 37849 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(15), /*)*//*default:*//*Label 1144*/ GIMT_Encode4(38622),
13691 /* 37860 */ /*GILLT_i32*//*Label 1142*/ GIMT_Encode4(37912), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
13692 /* 37908 */ /*GILLT_v4i32*//*Label 1143*/ GIMT_Encode4(38094),
13693 /* 37912 */ // Label 1142: @37912
13694 /* 37912 */ GIM_Try, /*On fail goto*//*Label 1145*/ GIMT_Encode4(38093),
13695 /* 37917 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
13696 /* 37920 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
13697 /* 37923 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13698 /* 37927 */ GIM_Try, /*On fail goto*//*Label 1146*/ GIMT_Encode4(38059),
13699 /* 37932 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13700 /* 37936 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13701 /* 37940 */ GIM_Try, /*On fail goto*//*Label 1147*/ GIMT_Encode4(37999), // Rule ID 1089 //
13702 /* 37945 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13703 /* 37949 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13704 /* 37953 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13705 /* 37957 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13706 /* 37961 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13707 /* 37965 */ // MIs[1] Operand 1
13708 /* 37965 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
13709 /* 37970 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13710 /* 37975 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13711 /* 37979 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13712 /* 37981 */ // (select:{ *:[v4i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SELECT_V128:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs, ?:{ *:[i32] }:$cond)
13713 /* 37981 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13714 /* 37984 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13715 /* 37986 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13716 /* 37988 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13717 /* 37990 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13718 /* 37994 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13719 /* 37997 */ GIR_RootConstrainSelectedInstOperands,
13720 /* 37998 */ // GIR_Coverage, 1089,
13721 /* 37998 */ GIR_EraseRootFromParent_Done,
13722 /* 37999 */ // Label 1147: @37999
13723 /* 37999 */ GIM_Try, /*On fail goto*//*Label 1148*/ GIMT_Encode4(38058), // Rule ID 1090 //
13724 /* 38004 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13725 /* 38008 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13726 /* 38012 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13727 /* 38016 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13728 /* 38020 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13729 /* 38024 */ // MIs[1] Operand 1
13730 /* 38024 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
13731 /* 38029 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13732 /* 38034 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13733 /* 38038 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13734 /* 38040 */ // (select:{ *:[v4i32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SELECT_V128:{ *:[v4i32] } ?:{ *:[v4i32] }:$rhs, ?:{ *:[v4i32] }:$lhs, ?:{ *:[i32] }:$cond)
13735 /* 38040 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13736 /* 38043 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13737 /* 38045 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13738 /* 38047 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13739 /* 38049 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13740 /* 38053 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13741 /* 38056 */ GIR_RootConstrainSelectedInstOperands,
13742 /* 38057 */ // GIR_Coverage, 1090,
13743 /* 38057 */ GIR_EraseRootFromParent_Done,
13744 /* 38058 */ // Label 1148: @38058
13745 /* 38058 */ GIM_Reject,
13746 /* 38059 */ // Label 1146: @38059
13747 /* 38059 */ GIM_Try, /*On fail goto*//*Label 1149*/ GIMT_Encode4(38092), // Rule ID 1088 //
13748 /* 38064 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13749 /* 38068 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13750 /* 38072 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13751 /* 38076 */ // (select:{ *:[v4i32] } I32:{ *:[i32] }:$cond, V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (SELECT_V128:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs, ?:{ *:[i32] }:$cond)
13752 /* 38076 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13753 /* 38079 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13754 /* 38081 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13755 /* 38083 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13756 /* 38085 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
13757 /* 38087 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13758 /* 38090 */ GIR_RootConstrainSelectedInstOperands,
13759 /* 38091 */ // GIR_Coverage, 1088,
13760 /* 38091 */ GIR_EraseRootFromParent_Done,
13761 /* 38092 */ // Label 1149: @38092
13762 /* 38092 */ GIM_Reject,
13763 /* 38093 */ // Label 1145: @38093
13764 /* 38093 */ GIM_Reject,
13765 /* 38094 */ // Label 1143: @38094
13766 /* 38094 */ GIM_Try, /*On fail goto*//*Label 1150*/ GIMT_Encode4(38188), // Rule ID 1073 //
13767 /* 38099 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
13768 /* 38102 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
13769 /* 38105 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13770 /* 38109 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13771 /* 38113 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
13772 /* 38117 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
13773 /* 38121 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
13774 /* 38125 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4i32,
13775 /* 38129 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4i32,
13776 /* 38133 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13777 /* 38138 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13778 /* 38142 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
13779 /* 38148 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v4i32,
13780 /* 38152 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
13781 /* 38154 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
13782 /* 38158 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
13783 /* 38164 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v4i32,
13784 /* 38168 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
13785 /* 38170 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13786 /* 38172 */ // (vselect:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$x, immAllOnesV:{ *:[v4i32] }), immAllZerosV:{ *:[v4i32] }) => (ANDNOT:{ *:[v4i32] } ?:{ *:[v4i32] }:$c, ?:{ *:[v4i32] }:$x)
13787 /* 38172 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
13788 /* 38175 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13789 /* 38177 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
13790 /* 38179 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // x
13791 /* 38183 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13792 /* 38186 */ GIR_RootConstrainSelectedInstOperands,
13793 /* 38187 */ // GIR_Coverage, 1073,
13794 /* 38187 */ GIR_EraseRootFromParent_Done,
13795 /* 38188 */ // Label 1150: @38188
13796 /* 38188 */ GIM_Try, /*On fail goto*//*Label 1151*/ GIMT_Encode4(38578),
13797 /* 38193 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13798 /* 38197 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1152*/ GIMT_Encode4(38293), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1280 //
13799 /* 38204 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13800 /* 38208 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
13801 /* 38212 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
13802 /* 38216 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
13803 /* 38220 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
13804 /* 38224 */ // MIs[1] Operand 1
13805 /* 38224 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
13806 /* 38229 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13807 /* 38233 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
13808 /* 38237 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
13809 /* 38241 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13810 /* 38246 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
13811 /* 38250 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
13812 /* 38254 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
13813 /* 38258 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13814 /* 38263 */ // MIs[0] rhs
13815 /* 38263 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
13816 /* 38268 */ // MIs[0] lhs
13817 /* 38268 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
13818 /* 38273 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13819 /* 38275 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (SIMD_RELAXED_FMIN_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
13820 /* 38275 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F32x4),
13821 /* 38278 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13822 /* 38280 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
13823 /* 38284 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
13824 /* 38288 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13825 /* 38291 */ GIR_RootConstrainSelectedInstOperands,
13826 /* 38292 */ // GIR_Coverage, 1280,
13827 /* 38292 */ GIR_EraseRootFromParent_Done,
13828 /* 38293 */ // Label 1152: @38293
13829 /* 38293 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1153*/ GIMT_Encode4(38389), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1281 //
13830 /* 38300 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13831 /* 38304 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
13832 /* 38308 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
13833 /* 38312 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
13834 /* 38316 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
13835 /* 38320 */ // MIs[1] Operand 1
13836 /* 38320 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
13837 /* 38325 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13838 /* 38329 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
13839 /* 38333 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
13840 /* 38337 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13841 /* 38342 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
13842 /* 38346 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
13843 /* 38350 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
13844 /* 38354 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13845 /* 38359 */ // MIs[0] rhs
13846 /* 38359 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
13847 /* 38364 */ // MIs[0] lhs
13848 /* 38364 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
13849 /* 38369 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13850 /* 38371 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (SIMD_RELAXED_FMAX_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
13851 /* 38371 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F32x4),
13852 /* 38374 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13853 /* 38376 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
13854 /* 38380 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
13855 /* 38384 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13856 /* 38387 */ GIR_RootConstrainSelectedInstOperands,
13857 /* 38388 */ // GIR_Coverage, 1281,
13858 /* 38388 */ GIR_EraseRootFromParent_Done,
13859 /* 38389 */ // Label 1153: @38389
13860 /* 38389 */ GIM_Try, /*On fail goto*//*Label 1154*/ GIMT_Encode4(38483), // Rule ID 1174 //
13861 /* 38394 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13862 /* 38398 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
13863 /* 38402 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
13864 /* 38406 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
13865 /* 38410 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
13866 /* 38414 */ // MIs[1] Operand 1
13867 /* 38414 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
13868 /* 38419 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13869 /* 38423 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
13870 /* 38427 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
13871 /* 38431 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13872 /* 38436 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
13873 /* 38440 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
13874 /* 38444 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
13875 /* 38448 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13876 /* 38453 */ // MIs[0] rhs
13877 /* 38453 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
13878 /* 38458 */ // MIs[0] lhs
13879 /* 38458 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
13880 /* 38463 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13881 /* 38465 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (PMIN_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
13882 /* 38465 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F32x4),
13883 /* 38468 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13884 /* 38470 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
13885 /* 38474 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
13886 /* 38478 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13887 /* 38481 */ GIR_RootConstrainSelectedInstOperands,
13888 /* 38482 */ // GIR_Coverage, 1174,
13889 /* 38482 */ GIR_EraseRootFromParent_Done,
13890 /* 38483 */ // Label 1154: @38483
13891 /* 38483 */ GIM_Try, /*On fail goto*//*Label 1155*/ GIMT_Encode4(38577), // Rule ID 1175 //
13892 /* 38488 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13893 /* 38492 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
13894 /* 38496 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4i32,
13895 /* 38500 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
13896 /* 38504 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4f32,
13897 /* 38508 */ // MIs[1] Operand 1
13898 /* 38508 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
13899 /* 38513 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
13900 /* 38517 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
13901 /* 38521 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s32,
13902 /* 38525 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13903 /* 38530 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
13904 /* 38534 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
13905 /* 38538 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v4s32,
13906 /* 38542 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13907 /* 38547 */ // MIs[0] rhs
13908 /* 38547 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
13909 /* 38552 */ // MIs[0] lhs
13910 /* 38552 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
13911 /* 38557 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
13912 /* 38559 */ // (vselect:{ *:[v4i32] } (setcc:{ *:[v4i32] } (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$lhs), (bitconvert:{ *:[v4f32] } V128:{ *:[v4i32] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v4i32] }:$rhs, V128:{ *:[v4i32] }:$lhs) => (PMAX_F32x4:{ *:[v4i32] } ?:{ *:[v4i32] }:$lhs, ?:{ *:[v4i32] }:$rhs)
13913 /* 38559 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F32x4),
13914 /* 38562 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13915 /* 38564 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
13916 /* 38568 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
13917 /* 38572 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13918 /* 38575 */ GIR_RootConstrainSelectedInstOperands,
13919 /* 38576 */ // GIR_Coverage, 1175,
13920 /* 38576 */ GIR_EraseRootFromParent_Done,
13921 /* 38577 */ // Label 1155: @38577
13922 /* 38577 */ GIM_Reject,
13923 /* 38578 */ // Label 1151: @38578
13924 /* 38578 */ GIM_Try, /*On fail goto*//*Label 1156*/ GIMT_Encode4(38621), // Rule ID 1077 //
13925 /* 38583 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
13926 /* 38586 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4i32,
13927 /* 38589 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13928 /* 38593 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13929 /* 38597 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13930 /* 38601 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13931 /* 38605 */ // (vselect:{ *:[v4i32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4i32] }:$v1, V128:{ *:[v4i32] }:$v2) => (BITSELECT:{ *:[v4i32] } ?:{ *:[v4i32] }:$v1, ?:{ *:[v4i32] }:$v2, ?:{ *:[v4i32] }:$c)
13932 /* 38605 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
13933 /* 38608 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13934 /* 38610 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
13935 /* 38612 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
13936 /* 38614 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
13937 /* 38616 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13938 /* 38619 */ GIR_RootConstrainSelectedInstOperands,
13939 /* 38620 */ // GIR_Coverage, 1077,
13940 /* 38620 */ GIR_EraseRootFromParent_Done,
13941 /* 38621 */ // Label 1156: @38621
13942 /* 38621 */ GIM_Reject,
13943 /* 38622 */ // Label 1144: @38622
13944 /* 38622 */ GIM_Reject,
13945 /* 38623 */ // Label 1085: @38623
13946 /* 38623 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 1159*/ GIMT_Encode4(39400),
13947 /* 38634 */ /*GILLT_i32*//*Label 1157*/ GIMT_Encode4(38690), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
13948 /* 38686 */ /*GILLT_v2i64*//*Label 1158*/ GIMT_Encode4(38872),
13949 /* 38690 */ // Label 1157: @38690
13950 /* 38690 */ GIM_Try, /*On fail goto*//*Label 1160*/ GIMT_Encode4(38871),
13951 /* 38695 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
13952 /* 38698 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
13953 /* 38701 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13954 /* 38705 */ GIM_Try, /*On fail goto*//*Label 1161*/ GIMT_Encode4(38837),
13955 /* 38710 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13956 /* 38714 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
13957 /* 38718 */ GIM_Try, /*On fail goto*//*Label 1162*/ GIMT_Encode4(38777), // Rule ID 1092 //
13958 /* 38723 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13959 /* 38727 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13960 /* 38731 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13961 /* 38735 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13962 /* 38739 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13963 /* 38743 */ // MIs[1] Operand 1
13964 /* 38743 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
13965 /* 38748 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13966 /* 38753 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13967 /* 38757 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13968 /* 38759 */ // (select:{ *:[v2i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SELECT_V128:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs, ?:{ *:[i32] }:$cond)
13969 /* 38759 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13970 /* 38762 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13971 /* 38764 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13972 /* 38766 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13973 /* 38768 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13974 /* 38772 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13975 /* 38775 */ GIR_RootConstrainSelectedInstOperands,
13976 /* 38776 */ // GIR_Coverage, 1092,
13977 /* 38776 */ GIR_EraseRootFromParent_Done,
13978 /* 38777 */ // Label 1162: @38777
13979 /* 38777 */ GIM_Try, /*On fail goto*//*Label 1163*/ GIMT_Encode4(38836), // Rule ID 1093 //
13980 /* 38782 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
13981 /* 38786 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
13982 /* 38790 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
13983 /* 38794 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
13984 /* 38798 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
13985 /* 38802 */ // MIs[1] Operand 1
13986 /* 38802 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
13987 /* 38807 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
13988 /* 38812 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
13989 /* 38816 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
13990 /* 38818 */ // (select:{ *:[v2i64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SELECT_V128:{ *:[v2i64] } ?:{ *:[v2i64] }:$rhs, ?:{ *:[v2i64] }:$lhs, ?:{ *:[i32] }:$cond)
13991 /* 38818 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
13992 /* 38821 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
13993 /* 38823 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
13994 /* 38825 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
13995 /* 38827 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
13996 /* 38831 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
13997 /* 38834 */ GIR_RootConstrainSelectedInstOperands,
13998 /* 38835 */ // GIR_Coverage, 1093,
13999 /* 38835 */ GIR_EraseRootFromParent_Done,
14000 /* 38836 */ // Label 1163: @38836
14001 /* 38836 */ GIM_Reject,
14002 /* 38837 */ // Label 1161: @38837
14003 /* 38837 */ GIM_Try, /*On fail goto*//*Label 1164*/ GIMT_Encode4(38870), // Rule ID 1091 //
14004 /* 38842 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14005 /* 38846 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14006 /* 38850 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14007 /* 38854 */ // (select:{ *:[v2i64] } I32:{ *:[i32] }:$cond, V128:{ *:[v2i64] }:$lhs, V128:{ *:[v2i64] }:$rhs) => (SELECT_V128:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs, ?:{ *:[i32] }:$cond)
14008 /* 38854 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
14009 /* 38857 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14010 /* 38859 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
14011 /* 38861 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
14012 /* 38863 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
14013 /* 38865 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14014 /* 38868 */ GIR_RootConstrainSelectedInstOperands,
14015 /* 38869 */ // GIR_Coverage, 1091,
14016 /* 38869 */ GIR_EraseRootFromParent_Done,
14017 /* 38870 */ // Label 1164: @38870
14018 /* 38870 */ GIM_Reject,
14019 /* 38871 */ // Label 1160: @38871
14020 /* 38871 */ GIM_Reject,
14021 /* 38872 */ // Label 1158: @38872
14022 /* 38872 */ GIM_Try, /*On fail goto*//*Label 1165*/ GIMT_Encode4(38966), // Rule ID 1074 //
14023 /* 38877 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
14024 /* 38880 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
14025 /* 38883 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14026 /* 38887 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14027 /* 38891 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
14028 /* 38895 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_XOR),
14029 /* 38899 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
14030 /* 38903 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2i64,
14031 /* 38907 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2i64,
14032 /* 38911 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14033 /* 38916 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
14034 /* 38920 */ GIM_CheckOpcodeIsEither, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
14035 /* 38926 */ GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_v2i64,
14036 /* 38930 */ GIM_CheckIsBuildVectorAllOnes, /*MI*/2,
14037 /* 38932 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/0, /*OpIdx*/3, // MIs[3]
14038 /* 38936 */ GIM_CheckOpcodeIsEither, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR), GIMT_Encode2(TargetOpcode::G_BUILD_VECTOR_TRUNC),
14039 /* 38942 */ GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_v2i64,
14040 /* 38946 */ GIM_CheckIsBuildVectorAllZeros, /*MI*/3,
14041 /* 38948 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
14042 /* 38950 */ // (vselect:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$x, immAllOnesV:{ *:[v2i64] }), immAllZerosV:{ *:[v2i64] }) => (ANDNOT:{ *:[v2i64] } ?:{ *:[v2i64] }:$c, ?:{ *:[v2i64] }:$x)
14043 /* 38950 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::ANDNOT),
14044 /* 38953 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14045 /* 38955 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
14046 /* 38957 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // x
14047 /* 38961 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14048 /* 38964 */ GIR_RootConstrainSelectedInstOperands,
14049 /* 38965 */ // GIR_Coverage, 1074,
14050 /* 38965 */ GIR_EraseRootFromParent_Done,
14051 /* 38966 */ // Label 1165: @38966
14052 /* 38966 */ GIM_Try, /*On fail goto*//*Label 1166*/ GIMT_Encode4(39356),
14053 /* 38971 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14054 /* 38975 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1167*/ GIMT_Encode4(39071), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1286 //
14055 /* 38982 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14056 /* 38986 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
14057 /* 38990 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
14058 /* 38994 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
14059 /* 38998 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
14060 /* 39002 */ // MIs[1] Operand 1
14061 /* 39002 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
14062 /* 39007 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
14063 /* 39011 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
14064 /* 39015 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
14065 /* 39019 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14066 /* 39024 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
14067 /* 39028 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
14068 /* 39032 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
14069 /* 39036 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14070 /* 39041 */ // MIs[0] rhs
14071 /* 39041 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
14072 /* 39046 */ // MIs[0] lhs
14073 /* 39046 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
14074 /* 39051 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
14075 /* 39053 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (SIMD_RELAXED_FMIN_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
14076 /* 39053 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMIN_F64x2),
14077 /* 39056 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14078 /* 39058 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
14079 /* 39062 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
14080 /* 39066 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14081 /* 39069 */ GIR_RootConstrainSelectedInstOperands,
14082 /* 39070 */ // GIR_Coverage, 1286,
14083 /* 39070 */ GIR_EraseRootFromParent_Done,
14084 /* 39071 */ // Label 1167: @39071
14085 /* 39071 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1168*/ GIMT_Encode4(39167), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1287 //
14086 /* 39078 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14087 /* 39082 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
14088 /* 39086 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
14089 /* 39090 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
14090 /* 39094 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
14091 /* 39098 */ // MIs[1] Operand 1
14092 /* 39098 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
14093 /* 39103 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
14094 /* 39107 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
14095 /* 39111 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
14096 /* 39115 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14097 /* 39120 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
14098 /* 39124 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
14099 /* 39128 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
14100 /* 39132 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14101 /* 39137 */ // MIs[0] rhs
14102 /* 39137 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
14103 /* 39142 */ // MIs[0] lhs
14104 /* 39142 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
14105 /* 39147 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
14106 /* 39149 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (SIMD_RELAXED_FMAX_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
14107 /* 39149 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SIMD_RELAXED_FMAX_F64x2),
14108 /* 39152 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14109 /* 39154 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
14110 /* 39158 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
14111 /* 39162 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14112 /* 39165 */ GIR_RootConstrainSelectedInstOperands,
14113 /* 39166 */ // GIR_Coverage, 1287,
14114 /* 39166 */ GIR_EraseRootFromParent_Done,
14115 /* 39167 */ // Label 1168: @39167
14116 /* 39167 */ GIM_Try, /*On fail goto*//*Label 1169*/ GIMT_Encode4(39261), // Rule ID 1176 //
14117 /* 39172 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14118 /* 39176 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
14119 /* 39180 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
14120 /* 39184 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
14121 /* 39188 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
14122 /* 39192 */ // MIs[1] Operand 1
14123 /* 39192 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
14124 /* 39197 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
14125 /* 39201 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
14126 /* 39205 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
14127 /* 39209 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14128 /* 39214 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
14129 /* 39218 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
14130 /* 39222 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
14131 /* 39226 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14132 /* 39231 */ // MIs[0] rhs
14133 /* 39231 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
14134 /* 39236 */ // MIs[0] lhs
14135 /* 39236 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/3, /*OtherOpIdx*/1,
14136 /* 39241 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
14137 /* 39243 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (PMIN_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
14138 /* 39243 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMIN_F64x2),
14139 /* 39246 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14140 /* 39248 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // lhs
14141 /* 39252 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // rhs
14142 /* 39256 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14143 /* 39259 */ GIR_RootConstrainSelectedInstOperands,
14144 /* 39260 */ // GIR_Coverage, 1176,
14145 /* 39260 */ GIR_EraseRootFromParent_Done,
14146 /* 39261 */ // Label 1169: @39261
14147 /* 39261 */ GIM_Try, /*On fail goto*//*Label 1170*/ GIMT_Encode4(39355), // Rule ID 1177 //
14148 /* 39266 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14149 /* 39270 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCMP),
14150 /* 39274 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2i64,
14151 /* 39278 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
14152 /* 39282 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2f64,
14153 /* 39286 */ // MIs[1] Operand 1
14154 /* 39286 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::FCMP_OLT),
14155 /* 39291 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
14156 /* 39295 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_BITCAST),
14157 /* 39299 */ GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s64,
14158 /* 39303 */ GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14159 /* 39308 */ GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/3, // MIs[3]
14160 /* 39312 */ GIM_CheckOpcode, /*MI*/3, GIMT_Encode2(TargetOpcode::G_BITCAST),
14161 /* 39316 */ GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_v2s64,
14162 /* 39320 */ GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14163 /* 39325 */ // MIs[0] rhs
14164 /* 39325 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/1,
14165 /* 39330 */ // MIs[0] lhs
14166 /* 39330 */ GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
14167 /* 39335 */ GIM_CheckIsSafeToFold, /*NumInsns*/3,
14168 /* 39337 */ // (vselect:{ *:[v2i64] } (setcc:{ *:[v2i64] } (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$lhs), (bitconvert:{ *:[v2f64] } V128:{ *:[v2i64] }:$rhs), SETOLT:{ *:[Other] }), V128:{ *:[v2i64] }:$rhs, V128:{ *:[v2i64] }:$lhs) => (PMAX_F64x2:{ *:[v2i64] } ?:{ *:[v2i64] }:$lhs, ?:{ *:[v2i64] }:$rhs)
14169 /* 39337 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::PMAX_F64x2),
14170 /* 39340 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14171 /* 39342 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // lhs
14172 /* 39346 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // rhs
14173 /* 39350 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14174 /* 39353 */ GIR_RootConstrainSelectedInstOperands,
14175 /* 39354 */ // GIR_Coverage, 1177,
14176 /* 39354 */ GIR_EraseRootFromParent_Done,
14177 /* 39355 */ // Label 1170: @39355
14178 /* 39355 */ GIM_Reject,
14179 /* 39356 */ // Label 1166: @39356
14180 /* 39356 */ GIM_Try, /*On fail goto*//*Label 1171*/ GIMT_Encode4(39399), // Rule ID 1078 //
14181 /* 39361 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2i64,
14182 /* 39364 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2i64,
14183 /* 39367 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14184 /* 39371 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14185 /* 39375 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14186 /* 39379 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14187 /* 39383 */ // (vselect:{ *:[v2i64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2i64] }:$v1, V128:{ *:[v2i64] }:$v2) => (BITSELECT:{ *:[v2i64] } ?:{ *:[v2i64] }:$v1, ?:{ *:[v2i64] }:$v2, ?:{ *:[v2i64] }:$c)
14188 /* 39383 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
14189 /* 39386 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14190 /* 39388 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
14191 /* 39390 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
14192 /* 39392 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
14193 /* 39394 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14194 /* 39397 */ GIR_RootConstrainSelectedInstOperands,
14195 /* 39398 */ // GIR_Coverage, 1078,
14196 /* 39398 */ GIR_EraseRootFromParent_Done,
14197 /* 39399 */ // Label 1171: @39399
14198 /* 39399 */ GIM_Reject,
14199 /* 39400 */ // Label 1159: @39400
14200 /* 39400 */ GIM_Reject,
14201 /* 39401 */ // Label 1086: @39401
14202 /* 39401 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(14), /*)*//*default:*//*Label 1174*/ GIMT_Encode4(39686),
14203 /* 39412 */ /*GILLT_i32*//*Label 1172*/ GIMT_Encode4(39460), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14204 /* 39456 */ /*GILLT_v8i16*//*Label 1173*/ GIMT_Encode4(39642),
14205 /* 39460 */ // Label 1172: @39460
14206 /* 39460 */ GIM_Try, /*On fail goto*//*Label 1175*/ GIMT_Encode4(39641),
14207 /* 39465 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
14208 /* 39468 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
14209 /* 39471 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14210 /* 39475 */ GIM_Try, /*On fail goto*//*Label 1176*/ GIMT_Encode4(39607),
14211 /* 39480 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14212 /* 39484 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14213 /* 39488 */ GIM_Try, /*On fail goto*//*Label 1177*/ GIMT_Encode4(39547), // Rule ID 1101 //
14214 /* 39493 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14215 /* 39497 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
14216 /* 39501 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
14217 /* 39505 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
14218 /* 39509 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
14219 /* 39513 */ // MIs[1] Operand 1
14220 /* 39513 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
14221 /* 39518 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14222 /* 39523 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
14223 /* 39527 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14224 /* 39529 */ // (select:{ *:[v8f16] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (SELECT_V128:{ *:[v8f16] } ?:{ *:[v8f16] }:$lhs, ?:{ *:[v8f16] }:$rhs, ?:{ *:[i32] }:$cond)
14225 /* 39529 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
14226 /* 39532 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14227 /* 39534 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
14228 /* 39536 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
14229 /* 39538 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
14230 /* 39542 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14231 /* 39545 */ GIR_RootConstrainSelectedInstOperands,
14232 /* 39546 */ // GIR_Coverage, 1101,
14233 /* 39546 */ GIR_EraseRootFromParent_Done,
14234 /* 39547 */ // Label 1177: @39547
14235 /* 39547 */ GIM_Try, /*On fail goto*//*Label 1178*/ GIMT_Encode4(39606), // Rule ID 1102 //
14236 /* 39552 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14237 /* 39556 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
14238 /* 39560 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
14239 /* 39564 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
14240 /* 39568 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
14241 /* 39572 */ // MIs[1] Operand 1
14242 /* 39572 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
14243 /* 39577 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14244 /* 39582 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
14245 /* 39586 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14246 /* 39588 */ // (select:{ *:[v8f16] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (SELECT_V128:{ *:[v8f16] } ?:{ *:[v8f16] }:$rhs, ?:{ *:[v8f16] }:$lhs, ?:{ *:[i32] }:$cond)
14247 /* 39588 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
14248 /* 39591 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14249 /* 39593 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
14250 /* 39595 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
14251 /* 39597 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
14252 /* 39601 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14253 /* 39604 */ GIR_RootConstrainSelectedInstOperands,
14254 /* 39605 */ // GIR_Coverage, 1102,
14255 /* 39605 */ GIR_EraseRootFromParent_Done,
14256 /* 39606 */ // Label 1178: @39606
14257 /* 39606 */ GIM_Reject,
14258 /* 39607 */ // Label 1176: @39607
14259 /* 39607 */ GIM_Try, /*On fail goto*//*Label 1179*/ GIMT_Encode4(39640), // Rule ID 1100 //
14260 /* 39612 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14261 /* 39616 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14262 /* 39620 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14263 /* 39624 */ // (select:{ *:[v8f16] } I32:{ *:[i32] }:$cond, V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (SELECT_V128:{ *:[v8f16] } ?:{ *:[v8f16] }:$lhs, ?:{ *:[v8f16] }:$rhs, ?:{ *:[i32] }:$cond)
14264 /* 39624 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
14265 /* 39627 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14266 /* 39629 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
14267 /* 39631 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
14268 /* 39633 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
14269 /* 39635 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14270 /* 39638 */ GIR_RootConstrainSelectedInstOperands,
14271 /* 39639 */ // GIR_Coverage, 1100,
14272 /* 39639 */ GIR_EraseRootFromParent_Done,
14273 /* 39640 */ // Label 1179: @39640
14274 /* 39640 */ GIM_Reject,
14275 /* 39641 */ // Label 1175: @39641
14276 /* 39641 */ GIM_Reject,
14277 /* 39642 */ // Label 1173: @39642
14278 /* 39642 */ GIM_Try, /*On fail goto*//*Label 1180*/ GIMT_Encode4(39685), // Rule ID 1081 //
14279 /* 39647 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
14280 /* 39650 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
14281 /* 39653 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14282 /* 39657 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14283 /* 39661 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14284 /* 39665 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14285 /* 39669 */ // (vselect:{ *:[v8f16] } V128:{ *:[v8i16] }:$c, V128:{ *:[v8f16] }:$v1, V128:{ *:[v8f16] }:$v2) => (BITSELECT:{ *:[v8f16] } ?:{ *:[v8f16] }:$v1, ?:{ *:[v8f16] }:$v2, ?:{ *:[v8i16] }:$c)
14286 /* 39669 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
14287 /* 39672 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14288 /* 39674 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
14289 /* 39676 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
14290 /* 39678 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
14291 /* 39680 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14292 /* 39683 */ GIR_RootConstrainSelectedInstOperands,
14293 /* 39684 */ // GIR_Coverage, 1081,
14294 /* 39684 */ GIR_EraseRootFromParent_Done,
14295 /* 39685 */ // Label 1180: @39685
14296 /* 39685 */ GIM_Reject,
14297 /* 39686 */ // Label 1174: @39686
14298 /* 39686 */ GIM_Reject,
14299 /* 39687 */ // Label 1087: @39687
14300 /* 39687 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(15), /*)*//*default:*//*Label 1183*/ GIMT_Encode4(39976),
14301 /* 39698 */ /*GILLT_i32*//*Label 1181*/ GIMT_Encode4(39750), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14302 /* 39746 */ /*GILLT_v4i32*//*Label 1182*/ GIMT_Encode4(39932),
14303 /* 39750 */ // Label 1181: @39750
14304 /* 39750 */ GIM_Try, /*On fail goto*//*Label 1184*/ GIMT_Encode4(39931),
14305 /* 39755 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
14306 /* 39758 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
14307 /* 39761 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14308 /* 39765 */ GIM_Try, /*On fail goto*//*Label 1185*/ GIMT_Encode4(39897),
14309 /* 39770 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14310 /* 39774 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14311 /* 39778 */ GIM_Try, /*On fail goto*//*Label 1186*/ GIMT_Encode4(39837), // Rule ID 1095 //
14312 /* 39783 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14313 /* 39787 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
14314 /* 39791 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
14315 /* 39795 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
14316 /* 39799 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
14317 /* 39803 */ // MIs[1] Operand 1
14318 /* 39803 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
14319 /* 39808 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14320 /* 39813 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
14321 /* 39817 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14322 /* 39819 */ // (select:{ *:[v4f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SELECT_V128:{ *:[v4f32] } ?:{ *:[v4f32] }:$lhs, ?:{ *:[v4f32] }:$rhs, ?:{ *:[i32] }:$cond)
14323 /* 39819 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
14324 /* 39822 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14325 /* 39824 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
14326 /* 39826 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
14327 /* 39828 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
14328 /* 39832 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14329 /* 39835 */ GIR_RootConstrainSelectedInstOperands,
14330 /* 39836 */ // GIR_Coverage, 1095,
14331 /* 39836 */ GIR_EraseRootFromParent_Done,
14332 /* 39837 */ // Label 1186: @39837
14333 /* 39837 */ GIM_Try, /*On fail goto*//*Label 1187*/ GIMT_Encode4(39896), // Rule ID 1096 //
14334 /* 39842 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14335 /* 39846 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
14336 /* 39850 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
14337 /* 39854 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
14338 /* 39858 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
14339 /* 39862 */ // MIs[1] Operand 1
14340 /* 39862 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
14341 /* 39867 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14342 /* 39872 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
14343 /* 39876 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14344 /* 39878 */ // (select:{ *:[v4f32] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SELECT_V128:{ *:[v4f32] } ?:{ *:[v4f32] }:$rhs, ?:{ *:[v4f32] }:$lhs, ?:{ *:[i32] }:$cond)
14345 /* 39878 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
14346 /* 39881 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14347 /* 39883 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
14348 /* 39885 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
14349 /* 39887 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
14350 /* 39891 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14351 /* 39894 */ GIR_RootConstrainSelectedInstOperands,
14352 /* 39895 */ // GIR_Coverage, 1096,
14353 /* 39895 */ GIR_EraseRootFromParent_Done,
14354 /* 39896 */ // Label 1187: @39896
14355 /* 39896 */ GIM_Reject,
14356 /* 39897 */ // Label 1185: @39897
14357 /* 39897 */ GIM_Try, /*On fail goto*//*Label 1188*/ GIMT_Encode4(39930), // Rule ID 1094 //
14358 /* 39902 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14359 /* 39906 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14360 /* 39910 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14361 /* 39914 */ // (select:{ *:[v4f32] } I32:{ *:[i32] }:$cond, V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SELECT_V128:{ *:[v4f32] } ?:{ *:[v4f32] }:$lhs, ?:{ *:[v4f32] }:$rhs, ?:{ *:[i32] }:$cond)
14362 /* 39914 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
14363 /* 39917 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14364 /* 39919 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
14365 /* 39921 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
14366 /* 39923 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
14367 /* 39925 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14368 /* 39928 */ GIR_RootConstrainSelectedInstOperands,
14369 /* 39929 */ // GIR_Coverage, 1094,
14370 /* 39929 */ GIR_EraseRootFromParent_Done,
14371 /* 39930 */ // Label 1188: @39930
14372 /* 39930 */ GIM_Reject,
14373 /* 39931 */ // Label 1184: @39931
14374 /* 39931 */ GIM_Reject,
14375 /* 39932 */ // Label 1182: @39932
14376 /* 39932 */ GIM_Try, /*On fail goto*//*Label 1189*/ GIMT_Encode4(39975), // Rule ID 1079 //
14377 /* 39937 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
14378 /* 39940 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v4f32,
14379 /* 39943 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14380 /* 39947 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14381 /* 39951 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14382 /* 39955 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14383 /* 39959 */ // (vselect:{ *:[v4f32] } V128:{ *:[v4i32] }:$c, V128:{ *:[v4f32] }:$v1, V128:{ *:[v4f32] }:$v2) => (BITSELECT:{ *:[v4f32] } ?:{ *:[v4f32] }:$v1, ?:{ *:[v4f32] }:$v2, ?:{ *:[v4i32] }:$c)
14384 /* 39959 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
14385 /* 39962 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14386 /* 39964 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
14387 /* 39966 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
14388 /* 39968 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
14389 /* 39970 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14390 /* 39973 */ GIR_RootConstrainSelectedInstOperands,
14391 /* 39974 */ // GIR_Coverage, 1079,
14392 /* 39974 */ GIR_EraseRootFromParent_Done,
14393 /* 39975 */ // Label 1189: @39975
14394 /* 39975 */ GIM_Reject,
14395 /* 39976 */ // Label 1183: @39976
14396 /* 39976 */ GIM_Reject,
14397 /* 39977 */ // Label 1088: @39977
14398 /* 39977 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(16), /*)*//*default:*//*Label 1192*/ GIMT_Encode4(40270),
14399 /* 39988 */ /*GILLT_i32*//*Label 1190*/ GIMT_Encode4(40044), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14400 /* 40040 */ /*GILLT_v2i64*//*Label 1191*/ GIMT_Encode4(40226),
14401 /* 40044 */ // Label 1190: @40044
14402 /* 40044 */ GIM_Try, /*On fail goto*//*Label 1193*/ GIMT_Encode4(40225),
14403 /* 40049 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
14404 /* 40052 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
14405 /* 40055 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14406 /* 40059 */ GIM_Try, /*On fail goto*//*Label 1194*/ GIMT_Encode4(40191),
14407 /* 40064 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14408 /* 40068 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14409 /* 40072 */ GIM_Try, /*On fail goto*//*Label 1195*/ GIMT_Encode4(40131), // Rule ID 1098 //
14410 /* 40077 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14411 /* 40081 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
14412 /* 40085 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
14413 /* 40089 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
14414 /* 40093 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
14415 /* 40097 */ // MIs[1] Operand 1
14416 /* 40097 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_NE),
14417 /* 40102 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14418 /* 40107 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
14419 /* 40111 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14420 /* 40113 */ // (select:{ *:[v2f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SELECT_V128:{ *:[v2f64] } ?:{ *:[v2f64] }:$lhs, ?:{ *:[v2f64] }:$rhs, ?:{ *:[i32] }:$cond)
14421 /* 40113 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
14422 /* 40116 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14423 /* 40118 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
14424 /* 40120 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
14425 /* 40122 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
14426 /* 40126 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14427 /* 40129 */ GIR_RootConstrainSelectedInstOperands,
14428 /* 40130 */ // GIR_Coverage, 1098,
14429 /* 40130 */ GIR_EraseRootFromParent_Done,
14430 /* 40131 */ // Label 1195: @40131
14431 /* 40131 */ GIM_Try, /*On fail goto*//*Label 1196*/ GIMT_Encode4(40190), // Rule ID 1099 //
14432 /* 40136 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14433 /* 40140 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_ICMP),
14434 /* 40144 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_i32,
14435 /* 40148 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_i32,
14436 /* 40152 */ GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_i32,
14437 /* 40156 */ // MIs[1] Operand 1
14438 /* 40156 */ GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/GIMT_Encode2(CmpInst::ICMP_EQ),
14439 /* 40161 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14440 /* 40166 */ GIM_CheckConstantInt8, /*MI*/1, /*Op*/3, 0,
14441 /* 40170 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14442 /* 40172 */ // (select:{ *:[v2f64] } (setcc:{ *:[i32] } I32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SELECT_V128:{ *:[v2f64] } ?:{ *:[v2f64] }:$rhs, ?:{ *:[v2f64] }:$lhs, ?:{ *:[i32] }:$cond)
14443 /* 40172 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
14444 /* 40175 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14445 /* 40177 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
14446 /* 40179 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
14447 /* 40181 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
14448 /* 40185 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14449 /* 40188 */ GIR_RootConstrainSelectedInstOperands,
14450 /* 40189 */ // GIR_Coverage, 1099,
14451 /* 40189 */ GIR_EraseRootFromParent_Done,
14452 /* 40190 */ // Label 1196: @40190
14453 /* 40190 */ GIM_Reject,
14454 /* 40191 */ // Label 1194: @40191
14455 /* 40191 */ GIM_Try, /*On fail goto*//*Label 1197*/ GIMT_Encode4(40224), // Rule ID 1097 //
14456 /* 40196 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
14457 /* 40200 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14458 /* 40204 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14459 /* 40208 */ // (select:{ *:[v2f64] } I32:{ *:[i32] }:$cond, V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SELECT_V128:{ *:[v2f64] } ?:{ *:[v2f64] }:$lhs, ?:{ *:[v2f64] }:$rhs, ?:{ *:[i32] }:$cond)
14460 /* 40208 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::SELECT_V128),
14461 /* 40211 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14462 /* 40213 */ GIR_RootToRootCopy, /*OpIdx*/2, // lhs
14463 /* 40215 */ GIR_RootToRootCopy, /*OpIdx*/3, // rhs
14464 /* 40217 */ GIR_RootToRootCopy, /*OpIdx*/1, // cond
14465 /* 40219 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14466 /* 40222 */ GIR_RootConstrainSelectedInstOperands,
14467 /* 40223 */ // GIR_Coverage, 1097,
14468 /* 40223 */ GIR_EraseRootFromParent_Done,
14469 /* 40224 */ // Label 1197: @40224
14470 /* 40224 */ GIM_Reject,
14471 /* 40225 */ // Label 1193: @40225
14472 /* 40225 */ GIM_Reject,
14473 /* 40226 */ // Label 1191: @40226
14474 /* 40226 */ GIM_Try, /*On fail goto*//*Label 1198*/ GIMT_Encode4(40269), // Rule ID 1080 //
14475 /* 40231 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
14476 /* 40234 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v2f64,
14477 /* 40237 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14478 /* 40241 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14479 /* 40245 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14480 /* 40249 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14481 /* 40253 */ // (vselect:{ *:[v2f64] } V128:{ *:[v2i64] }:$c, V128:{ *:[v2f64] }:$v1, V128:{ *:[v2f64] }:$v2) => (BITSELECT:{ *:[v2f64] } ?:{ *:[v2f64] }:$v1, ?:{ *:[v2f64] }:$v2, ?:{ *:[v2i64] }:$c)
14482 /* 40253 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::BITSELECT),
14483 /* 40256 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14484 /* 40258 */ GIR_RootToRootCopy, /*OpIdx*/2, // v1
14485 /* 40260 */ GIR_RootToRootCopy, /*OpIdx*/3, // v2
14486 /* 40262 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
14487 /* 40264 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14488 /* 40267 */ GIR_RootConstrainSelectedInstOperands,
14489 /* 40268 */ // GIR_Coverage, 1080,
14490 /* 40268 */ GIR_EraseRootFromParent_Done,
14491 /* 40269 */ // Label 1198: @40269
14492 /* 40269 */ GIM_Reject,
14493 /* 40270 */ // Label 1192: @40270
14494 /* 40270 */ GIM_Reject,
14495 /* 40271 */ // Label 1089: @40271
14496 /* 40271 */ GIM_Reject,
14497 /* 40272 */ // Label 40: @40272
14498 /* 40272 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(14), /*)*//*default:*//*Label 1201*/ GIMT_Encode4(40369),
14499 /* 40283 */ /*GILLT_v16i8*//*Label 1199*/ GIMT_Encode4(40291),
14500 /* 40287 */ /*GILLT_v8i16*//*Label 1200*/ GIMT_Encode4(40330),
14501 /* 40291 */ // Label 1199: @40291
14502 /* 40291 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1202*/ GIMT_Encode4(40329), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 284 //
14503 /* 40298 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
14504 /* 40301 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
14505 /* 40304 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14506 /* 40308 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14507 /* 40312 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14508 /* 40316 */ // (uaddsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (ADD_SAT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
14509 /* 40316 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_U_I8x16),
14510 /* 40321 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14511 /* 40327 */ GIR_RootConstrainSelectedInstOperands,
14512 /* 40328 */ // GIR_Coverage, 284,
14513 /* 40328 */ GIR_Done,
14514 /* 40329 */ // Label 1202: @40329
14515 /* 40329 */ GIM_Reject,
14516 /* 40330 */ // Label 1200: @40330
14517 /* 40330 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1203*/ GIMT_Encode4(40368), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 285 //
14518 /* 40337 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
14519 /* 40340 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
14520 /* 40343 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14521 /* 40347 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14522 /* 40351 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14523 /* 40355 */ // (uaddsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (ADD_SAT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
14524 /* 40355 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_U_I16x8),
14525 /* 40360 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14526 /* 40366 */ GIR_RootConstrainSelectedInstOperands,
14527 /* 40367 */ // GIR_Coverage, 285,
14528 /* 40367 */ GIR_Done,
14529 /* 40368 */ // Label 1203: @40368
14530 /* 40368 */ GIM_Reject,
14531 /* 40369 */ // Label 1201: @40369
14532 /* 40369 */ GIM_Reject,
14533 /* 40370 */ // Label 41: @40370
14534 /* 40370 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(14), /*)*//*default:*//*Label 1206*/ GIMT_Encode4(40467),
14535 /* 40381 */ /*GILLT_v16i8*//*Label 1204*/ GIMT_Encode4(40389),
14536 /* 40385 */ /*GILLT_v8i16*//*Label 1205*/ GIMT_Encode4(40428),
14537 /* 40389 */ // Label 1204: @40389
14538 /* 40389 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1207*/ GIMT_Encode4(40427), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 282 //
14539 /* 40396 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
14540 /* 40399 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
14541 /* 40402 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14542 /* 40406 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14543 /* 40410 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14544 /* 40414 */ // (saddsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (ADD_SAT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
14545 /* 40414 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_S_I8x16),
14546 /* 40419 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14547 /* 40425 */ GIR_RootConstrainSelectedInstOperands,
14548 /* 40426 */ // GIR_Coverage, 282,
14549 /* 40426 */ GIR_Done,
14550 /* 40427 */ // Label 1207: @40427
14551 /* 40427 */ GIM_Reject,
14552 /* 40428 */ // Label 1205: @40428
14553 /* 40428 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1208*/ GIMT_Encode4(40466), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 283 //
14554 /* 40435 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
14555 /* 40438 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
14556 /* 40441 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14557 /* 40445 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14558 /* 40449 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14559 /* 40453 */ // (saddsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (ADD_SAT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
14560 /* 40453 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_SAT_S_I16x8),
14561 /* 40458 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14562 /* 40464 */ GIR_RootConstrainSelectedInstOperands,
14563 /* 40465 */ // GIR_Coverage, 283,
14564 /* 40465 */ GIR_Done,
14565 /* 40466 */ // Label 1208: @40466
14566 /* 40466 */ GIM_Reject,
14567 /* 40467 */ // Label 1206: @40467
14568 /* 40467 */ GIM_Reject,
14569 /* 40468 */ // Label 42: @40468
14570 /* 40468 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(14), /*)*//*default:*//*Label 1211*/ GIMT_Encode4(40565),
14571 /* 40479 */ /*GILLT_v16i8*//*Label 1209*/ GIMT_Encode4(40487),
14572 /* 40483 */ /*GILLT_v8i16*//*Label 1210*/ GIMT_Encode4(40526),
14573 /* 40487 */ // Label 1209: @40487
14574 /* 40487 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1212*/ GIMT_Encode4(40525), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 292 //
14575 /* 40494 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
14576 /* 40497 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
14577 /* 40500 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14578 /* 40504 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14579 /* 40508 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14580 /* 40512 */ // (usubsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SUB_SAT_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
14581 /* 40512 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_U_I8x16),
14582 /* 40517 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14583 /* 40523 */ GIR_RootConstrainSelectedInstOperands,
14584 /* 40524 */ // GIR_Coverage, 292,
14585 /* 40524 */ GIR_Done,
14586 /* 40525 */ // Label 1212: @40525
14587 /* 40525 */ GIM_Reject,
14588 /* 40526 */ // Label 1210: @40526
14589 /* 40526 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1213*/ GIMT_Encode4(40564), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 293 //
14590 /* 40533 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
14591 /* 40536 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
14592 /* 40539 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14593 /* 40543 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14594 /* 40547 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14595 /* 40551 */ // (usubsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SUB_SAT_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
14596 /* 40551 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_U_I16x8),
14597 /* 40556 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14598 /* 40562 */ GIR_RootConstrainSelectedInstOperands,
14599 /* 40563 */ // GIR_Coverage, 293,
14600 /* 40563 */ GIR_Done,
14601 /* 40564 */ // Label 1213: @40564
14602 /* 40564 */ GIM_Reject,
14603 /* 40565 */ // Label 1211: @40565
14604 /* 40565 */ GIM_Reject,
14605 /* 40566 */ // Label 43: @40566
14606 /* 40566 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(14), /*)*//*default:*//*Label 1216*/ GIMT_Encode4(40663),
14607 /* 40577 */ /*GILLT_v16i8*//*Label 1214*/ GIMT_Encode4(40585),
14608 /* 40581 */ /*GILLT_v8i16*//*Label 1215*/ GIMT_Encode4(40624),
14609 /* 40585 */ // Label 1214: @40585
14610 /* 40585 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1217*/ GIMT_Encode4(40623), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 290 //
14611 /* 40592 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
14612 /* 40595 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
14613 /* 40598 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14614 /* 40602 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14615 /* 40606 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14616 /* 40610 */ // (ssubsat:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (SUB_SAT_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
14617 /* 40610 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_S_I8x16),
14618 /* 40615 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14619 /* 40621 */ GIR_RootConstrainSelectedInstOperands,
14620 /* 40622 */ // GIR_Coverage, 290,
14621 /* 40622 */ GIR_Done,
14622 /* 40623 */ // Label 1217: @40623
14623 /* 40623 */ GIM_Reject,
14624 /* 40624 */ // Label 1215: @40624
14625 /* 40624 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1218*/ GIMT_Encode4(40662), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 291 //
14626 /* 40631 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
14627 /* 40634 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
14628 /* 40637 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14629 /* 40641 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14630 /* 40645 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14631 /* 40649 */ // (ssubsat:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (SUB_SAT_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
14632 /* 40649 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_SAT_S_I16x8),
14633 /* 40654 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14634 /* 40660 */ GIR_RootConstrainSelectedInstOperands,
14635 /* 40661 */ // GIR_Coverage, 291,
14636 /* 40661 */ GIR_Done,
14637 /* 40662 */ // Label 1218: @40662
14638 /* 40662 */ GIM_Reject,
14639 /* 40663 */ // Label 1216: @40663
14640 /* 40663 */ GIM_Reject,
14641 /* 40664 */ // Label 44: @40664
14642 /* 40664 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1224*/ GIMT_Encode4(41234),
14643 /* 40675 */ /*GILLT_f32*//*Label 1219*/ GIMT_Encode4(40735),
14644 /* 40679 */ /*GILLT_f64*//*Label 1220*/ GIMT_Encode4(40772), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14645 /* 40723 */ /*GILLT_v8f16*//*Label 1221*/ GIMT_Encode4(40809),
14646 /* 40727 */ /*GILLT_v4f32*//*Label 1222*/ GIMT_Encode4(40848),
14647 /* 40731 */ /*GILLT_v2f64*//*Label 1223*/ GIMT_Encode4(41041),
14648 /* 40735 */ // Label 1219: @40735
14649 /* 40735 */ GIM_Try, /*On fail goto*//*Label 1225*/ GIMT_Encode4(40771), // Rule ID 124 //
14650 /* 40740 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
14651 /* 40743 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
14652 /* 40746 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14653 /* 40750 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14654 /* 40754 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14655 /* 40758 */ // (fadd:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (ADD_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
14656 /* 40758 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F32),
14657 /* 40763 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14658 /* 40769 */ GIR_RootConstrainSelectedInstOperands,
14659 /* 40770 */ // GIR_Coverage, 124,
14660 /* 40770 */ GIR_Done,
14661 /* 40771 */ // Label 1225: @40771
14662 /* 40771 */ GIM_Reject,
14663 /* 40772 */ // Label 1220: @40772
14664 /* 40772 */ GIM_Try, /*On fail goto*//*Label 1226*/ GIMT_Encode4(40808), // Rule ID 125 //
14665 /* 40777 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
14666 /* 40780 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
14667 /* 40783 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14668 /* 40787 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14669 /* 40791 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14670 /* 40795 */ // (fadd:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (ADD_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
14671 /* 40795 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F64),
14672 /* 40800 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14673 /* 40806 */ GIR_RootConstrainSelectedInstOperands,
14674 /* 40807 */ // GIR_Coverage, 125,
14675 /* 40807 */ GIR_Done,
14676 /* 40808 */ // Label 1226: @40808
14677 /* 40808 */ GIM_Reject,
14678 /* 40809 */ // Label 1221: @40809
14679 /* 40809 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1227*/ GIMT_Encode4(40847), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 347 //
14680 /* 40816 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
14681 /* 40819 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
14682 /* 40822 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14683 /* 40826 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14684 /* 40830 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14685 /* 40834 */ // (fadd:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (ADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
14686 /* 40834 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F16x8),
14687 /* 40839 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14688 /* 40845 */ GIR_RootConstrainSelectedInstOperands,
14689 /* 40846 */ // GIR_Coverage, 347,
14690 /* 40846 */ GIR_Done,
14691 /* 40847 */ // Label 1227: @40847
14692 /* 40847 */ GIM_Reject,
14693 /* 40848 */ // Label 1222: @40848
14694 /* 40848 */ GIM_Try, /*On fail goto*//*Label 1228*/ GIMT_Encode4(41040),
14695 /* 40853 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
14696 /* 40856 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
14697 /* 40859 */ GIM_Try, /*On fail goto*//*Label 1229*/ GIMT_Encode4(41007),
14698 /* 40864 */ GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_fadd_contract),
14699 /* 40868 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14700 /* 40872 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1230*/ GIMT_Encode4(40939), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1266 //
14701 /* 40879 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14702 /* 40883 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FMUL),
14703 /* 40887 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4f32,
14704 /* 40891 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4f32,
14705 /* 40895 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
14706 /* 40899 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14707 /* 40904 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14708 /* 40909 */ GIM_CheckCxxInsnPredicate, /*MI*/1, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_fmul_contract),
14709 /* 40913 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14710 /* 40917 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14711 /* 40919 */ // (fadd:{ *:[v4f32] } (fmul:{ *:[v4f32] } V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b)<<P:Predicate_fmul_contract>>, V128:{ *:[v4f32] }:$c)<<P:Predicate_fadd_contract>> => (MADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c)
14712 /* 40919 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F32x4),
14713 /* 40922 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14714 /* 40924 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // a
14715 /* 40928 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // b
14716 /* 40932 */ GIR_RootToRootCopy, /*OpIdx*/2, // c
14717 /* 40934 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14718 /* 40937 */ GIR_RootConstrainSelectedInstOperands,
14719 /* 40938 */ // GIR_Coverage, 1266,
14720 /* 40938 */ GIR_EraseRootFromParent_Done,
14721 /* 40939 */ // Label 1230: @40939
14722 /* 40939 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1231*/ GIMT_Encode4(41006), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1776 //
14723 /* 40946 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14724 /* 40950 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
14725 /* 40954 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FMUL),
14726 /* 40958 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4f32,
14727 /* 40962 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4f32,
14728 /* 40966 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
14729 /* 40970 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14730 /* 40975 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14731 /* 40980 */ GIM_CheckCxxInsnPredicate, /*MI*/1, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_fmul_contract),
14732 /* 40984 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14733 /* 40986 */ // (fadd:{ *:[v4f32] } V128:{ *:[v4f32] }:$c, (fmul:{ *:[v4f32] } V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b)<<P:Predicate_fmul_contract>>)<<P:Predicate_fadd_contract>> => (MADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c)
14734 /* 40986 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F32x4),
14735 /* 40989 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14736 /* 40991 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // a
14737 /* 40995 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // b
14738 /* 40999 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
14739 /* 41001 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14740 /* 41004 */ GIR_RootConstrainSelectedInstOperands,
14741 /* 41005 */ // GIR_Coverage, 1776,
14742 /* 41005 */ GIR_EraseRootFromParent_Done,
14743 /* 41006 */ // Label 1231: @41006
14744 /* 41006 */ GIM_Reject,
14745 /* 41007 */ // Label 1229: @41007
14746 /* 41007 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1232*/ GIMT_Encode4(41039), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 345 //
14747 /* 41014 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14748 /* 41018 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14749 /* 41022 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14750 /* 41026 */ // (fadd:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (ADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
14751 /* 41026 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F32x4),
14752 /* 41031 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14753 /* 41037 */ GIR_RootConstrainSelectedInstOperands,
14754 /* 41038 */ // GIR_Coverage, 345,
14755 /* 41038 */ GIR_Done,
14756 /* 41039 */ // Label 1232: @41039
14757 /* 41039 */ GIM_Reject,
14758 /* 41040 */ // Label 1228: @41040
14759 /* 41040 */ GIM_Reject,
14760 /* 41041 */ // Label 1223: @41041
14761 /* 41041 */ GIM_Try, /*On fail goto*//*Label 1233*/ GIMT_Encode4(41233),
14762 /* 41046 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
14763 /* 41049 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
14764 /* 41052 */ GIM_Try, /*On fail goto*//*Label 1234*/ GIMT_Encode4(41200),
14765 /* 41057 */ GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_fadd_contract),
14766 /* 41061 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14767 /* 41065 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1235*/ GIMT_Encode4(41132), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1270 //
14768 /* 41072 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
14769 /* 41076 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FMUL),
14770 /* 41080 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2f64,
14771 /* 41084 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2f64,
14772 /* 41088 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
14773 /* 41092 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14774 /* 41097 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14775 /* 41102 */ GIM_CheckCxxInsnPredicate, /*MI*/1, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_fmul_contract),
14776 /* 41106 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14777 /* 41110 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14778 /* 41112 */ // (fadd:{ *:[v2f64] } (fmul:{ *:[v2f64] } V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b)<<P:Predicate_fmul_contract>>, V128:{ *:[v2f64] }:$c)<<P:Predicate_fadd_contract>> => (MADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c)
14779 /* 41112 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F64x2),
14780 /* 41115 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14781 /* 41117 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // a
14782 /* 41121 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // b
14783 /* 41125 */ GIR_RootToRootCopy, /*OpIdx*/2, // c
14784 /* 41127 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14785 /* 41130 */ GIR_RootConstrainSelectedInstOperands,
14786 /* 41131 */ // GIR_Coverage, 1270,
14787 /* 41131 */ GIR_EraseRootFromParent_Done,
14788 /* 41132 */ // Label 1235: @41132
14789 /* 41132 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1236*/ GIMT_Encode4(41199), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1778 //
14790 /* 41139 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14791 /* 41143 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
14792 /* 41147 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FMUL),
14793 /* 41151 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2f64,
14794 /* 41155 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2f64,
14795 /* 41159 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
14796 /* 41163 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14797 /* 41168 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14798 /* 41173 */ GIM_CheckCxxInsnPredicate, /*MI*/1, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_fmul_contract),
14799 /* 41177 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14800 /* 41179 */ // (fadd:{ *:[v2f64] } V128:{ *:[v2f64] }:$c, (fmul:{ *:[v2f64] } V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b)<<P:Predicate_fmul_contract>>)<<P:Predicate_fadd_contract>> => (MADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c)
14801 /* 41179 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F64x2),
14802 /* 41182 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14803 /* 41184 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // a
14804 /* 41188 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // b
14805 /* 41192 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
14806 /* 41194 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14807 /* 41197 */ GIR_RootConstrainSelectedInstOperands,
14808 /* 41198 */ // GIR_Coverage, 1778,
14809 /* 41198 */ GIR_EraseRootFromParent_Done,
14810 /* 41199 */ // Label 1236: @41199
14811 /* 41199 */ GIM_Reject,
14812 /* 41200 */ // Label 1234: @41200
14813 /* 41200 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1237*/ GIMT_Encode4(41232), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 346 //
14814 /* 41207 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14815 /* 41211 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14816 /* 41215 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14817 /* 41219 */ // (fadd:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (ADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
14818 /* 41219 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_F64x2),
14819 /* 41224 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14820 /* 41230 */ GIR_RootConstrainSelectedInstOperands,
14821 /* 41231 */ // GIR_Coverage, 346,
14822 /* 41231 */ GIR_Done,
14823 /* 41232 */ // Label 1237: @41232
14824 /* 41232 */ GIM_Reject,
14825 /* 41233 */ // Label 1233: @41233
14826 /* 41233 */ GIM_Reject,
14827 /* 41234 */ // Label 1224: @41234
14828 /* 41234 */ GIM_Reject,
14829 /* 41235 */ // Label 45: @41235
14830 /* 41235 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1243*/ GIMT_Encode4(41659),
14831 /* 41246 */ /*GILLT_f32*//*Label 1238*/ GIMT_Encode4(41306),
14832 /* 41250 */ /*GILLT_f64*//*Label 1239*/ GIMT_Encode4(41343), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14833 /* 41294 */ /*GILLT_v8f16*//*Label 1240*/ GIMT_Encode4(41380),
14834 /* 41298 */ /*GILLT_v4f32*//*Label 1241*/ GIMT_Encode4(41419),
14835 /* 41302 */ /*GILLT_v2f64*//*Label 1242*/ GIMT_Encode4(41539),
14836 /* 41306 */ // Label 1238: @41306
14837 /* 41306 */ GIM_Try, /*On fail goto*//*Label 1244*/ GIMT_Encode4(41342), // Rule ID 126 //
14838 /* 41311 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
14839 /* 41314 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
14840 /* 41317 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14841 /* 41321 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14842 /* 41325 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14843 /* 41329 */ // (fsub:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (SUB_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
14844 /* 41329 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F32),
14845 /* 41334 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14846 /* 41340 */ GIR_RootConstrainSelectedInstOperands,
14847 /* 41341 */ // GIR_Coverage, 126,
14848 /* 41341 */ GIR_Done,
14849 /* 41342 */ // Label 1244: @41342
14850 /* 41342 */ GIM_Reject,
14851 /* 41343 */ // Label 1239: @41343
14852 /* 41343 */ GIM_Try, /*On fail goto*//*Label 1245*/ GIMT_Encode4(41379), // Rule ID 127 //
14853 /* 41348 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
14854 /* 41351 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
14855 /* 41354 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14856 /* 41358 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14857 /* 41362 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14858 /* 41366 */ // (fsub:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (SUB_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
14859 /* 41366 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F64),
14860 /* 41371 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14861 /* 41377 */ GIR_RootConstrainSelectedInstOperands,
14862 /* 41378 */ // GIR_Coverage, 127,
14863 /* 41378 */ GIR_Done,
14864 /* 41379 */ // Label 1245: @41379
14865 /* 41379 */ GIM_Reject,
14866 /* 41380 */ // Label 1240: @41380
14867 /* 41380 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1246*/ GIMT_Encode4(41418), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 350 //
14868 /* 41387 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
14869 /* 41390 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
14870 /* 41393 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14871 /* 41397 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14872 /* 41401 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14873 /* 41405 */ // (fsub:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (SUB_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
14874 /* 41405 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F16x8),
14875 /* 41410 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14876 /* 41416 */ GIR_RootConstrainSelectedInstOperands,
14877 /* 41417 */ // GIR_Coverage, 350,
14878 /* 41417 */ GIR_Done,
14879 /* 41418 */ // Label 1246: @41418
14880 /* 41418 */ GIM_Reject,
14881 /* 41419 */ // Label 1241: @41419
14882 /* 41419 */ GIM_Try, /*On fail goto*//*Label 1247*/ GIMT_Encode4(41538),
14883 /* 41424 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
14884 /* 41427 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
14885 /* 41430 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1248*/ GIMT_Encode4(41505), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1268 //
14886 /* 41437 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14887 /* 41441 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14888 /* 41445 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
14889 /* 41449 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FMUL),
14890 /* 41453 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4f32,
14891 /* 41457 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4f32,
14892 /* 41461 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4f32,
14893 /* 41465 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14894 /* 41470 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14895 /* 41475 */ GIM_CheckCxxInsnPredicate, /*MI*/1, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_fmul_contract),
14896 /* 41479 */ GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_fsub_contract),
14897 /* 41483 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14898 /* 41485 */ // (fsub:{ *:[v4f32] } V128:{ *:[v4f32] }:$c, (fmul:{ *:[v4f32] } V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b)<<P:Predicate_fmul_contract>>)<<P:Predicate_fsub_contract>> => (NMADD_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$a, V128:{ *:[v4f32] }:$b, V128:{ *:[v4f32] }:$c)
14899 /* 41485 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F32x4),
14900 /* 41488 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14901 /* 41490 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // a
14902 /* 41494 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // b
14903 /* 41498 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
14904 /* 41500 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14905 /* 41503 */ GIR_RootConstrainSelectedInstOperands,
14906 /* 41504 */ // GIR_Coverage, 1268,
14907 /* 41504 */ GIR_EraseRootFromParent_Done,
14908 /* 41505 */ // Label 1248: @41505
14909 /* 41505 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1249*/ GIMT_Encode4(41537), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 348 //
14910 /* 41512 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14911 /* 41516 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14912 /* 41520 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14913 /* 41524 */ // (fsub:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (SUB_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
14914 /* 41524 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F32x4),
14915 /* 41529 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14916 /* 41535 */ GIR_RootConstrainSelectedInstOperands,
14917 /* 41536 */ // GIR_Coverage, 348,
14918 /* 41536 */ GIR_Done,
14919 /* 41537 */ // Label 1249: @41537
14920 /* 41537 */ GIM_Reject,
14921 /* 41538 */ // Label 1247: @41538
14922 /* 41538 */ GIM_Reject,
14923 /* 41539 */ // Label 1242: @41539
14924 /* 41539 */ GIM_Try, /*On fail goto*//*Label 1250*/ GIMT_Encode4(41658),
14925 /* 41544 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
14926 /* 41547 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
14927 /* 41550 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1251*/ GIMT_Encode4(41625), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1272 //
14928 /* 41557 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14929 /* 41561 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14930 /* 41565 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
14931 /* 41569 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FMUL),
14932 /* 41573 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2f64,
14933 /* 41577 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2f64,
14934 /* 41581 */ GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2f64,
14935 /* 41585 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14936 /* 41590 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14937 /* 41595 */ GIM_CheckCxxInsnPredicate, /*MI*/1, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_fmul_contract),
14938 /* 41599 */ GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_fsub_contract),
14939 /* 41603 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
14940 /* 41605 */ // (fsub:{ *:[v2f64] } V128:{ *:[v2f64] }:$c, (fmul:{ *:[v2f64] } V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b)<<P:Predicate_fmul_contract>>)<<P:Predicate_fsub_contract>> => (NMADD_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$a, V128:{ *:[v2f64] }:$b, V128:{ *:[v2f64] }:$c)
14941 /* 41605 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F64x2),
14942 /* 41608 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
14943 /* 41610 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // a
14944 /* 41614 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // b
14945 /* 41618 */ GIR_RootToRootCopy, /*OpIdx*/1, // c
14946 /* 41620 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
14947 /* 41623 */ GIR_RootConstrainSelectedInstOperands,
14948 /* 41624 */ // GIR_Coverage, 1272,
14949 /* 41624 */ GIR_EraseRootFromParent_Done,
14950 /* 41625 */ // Label 1251: @41625
14951 /* 41625 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1252*/ GIMT_Encode4(41657), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 349 //
14952 /* 41632 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14953 /* 41636 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14954 /* 41640 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
14955 /* 41644 */ // (fsub:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (SUB_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
14956 /* 41644 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SUB_F64x2),
14957 /* 41649 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14958 /* 41655 */ GIR_RootConstrainSelectedInstOperands,
14959 /* 41656 */ // GIR_Coverage, 349,
14960 /* 41656 */ GIR_Done,
14961 /* 41657 */ // Label 1252: @41657
14962 /* 41657 */ GIM_Reject,
14963 /* 41658 */ // Label 1250: @41658
14964 /* 41658 */ GIM_Reject,
14965 /* 41659 */ // Label 1243: @41659
14966 /* 41659 */ GIM_Reject,
14967 /* 41660 */ // Label 46: @41660
14968 /* 41660 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1258*/ GIMT_Encode4(41922),
14969 /* 41671 */ /*GILLT_f32*//*Label 1253*/ GIMT_Encode4(41731),
14970 /* 41675 */ /*GILLT_f64*//*Label 1254*/ GIMT_Encode4(41768), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
14971 /* 41719 */ /*GILLT_v8f16*//*Label 1255*/ GIMT_Encode4(41805),
14972 /* 41723 */ /*GILLT_v4f32*//*Label 1256*/ GIMT_Encode4(41844),
14973 /* 41727 */ /*GILLT_v2f64*//*Label 1257*/ GIMT_Encode4(41883),
14974 /* 41731 */ // Label 1253: @41731
14975 /* 41731 */ GIM_Try, /*On fail goto*//*Label 1259*/ GIMT_Encode4(41767), // Rule ID 128 //
14976 /* 41736 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
14977 /* 41739 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
14978 /* 41742 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14979 /* 41746 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14980 /* 41750 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
14981 /* 41754 */ // (fmul:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (MUL_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
14982 /* 41754 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F32),
14983 /* 41759 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14984 /* 41765 */ GIR_RootConstrainSelectedInstOperands,
14985 /* 41766 */ // GIR_Coverage, 128,
14986 /* 41766 */ GIR_Done,
14987 /* 41767 */ // Label 1259: @41767
14988 /* 41767 */ GIM_Reject,
14989 /* 41768 */ // Label 1254: @41768
14990 /* 41768 */ GIM_Try, /*On fail goto*//*Label 1260*/ GIMT_Encode4(41804), // Rule ID 129 //
14991 /* 41773 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
14992 /* 41776 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
14993 /* 41779 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14994 /* 41783 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14995 /* 41787 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
14996 /* 41791 */ // (fmul:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (MUL_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
14997 /* 41791 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F64),
14998 /* 41796 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
14999 /* 41802 */ GIR_RootConstrainSelectedInstOperands,
15000 /* 41803 */ // GIR_Coverage, 129,
15001 /* 41803 */ GIR_Done,
15002 /* 41804 */ // Label 1260: @41804
15003 /* 41804 */ GIM_Reject,
15004 /* 41805 */ // Label 1255: @41805
15005 /* 41805 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1261*/ GIMT_Encode4(41843), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 353 //
15006 /* 41812 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
15007 /* 41815 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
15008 /* 41818 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15009 /* 41822 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15010 /* 41826 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15011 /* 41830 */ // (fmul:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (MUL_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
15012 /* 41830 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F16x8),
15013 /* 41835 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15014 /* 41841 */ GIR_RootConstrainSelectedInstOperands,
15015 /* 41842 */ // GIR_Coverage, 353,
15016 /* 41842 */ GIR_Done,
15017 /* 41843 */ // Label 1261: @41843
15018 /* 41843 */ GIM_Reject,
15019 /* 41844 */ // Label 1256: @41844
15020 /* 41844 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1262*/ GIMT_Encode4(41882), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 351 //
15021 /* 41851 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
15022 /* 41854 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
15023 /* 41857 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15024 /* 41861 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15025 /* 41865 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15026 /* 41869 */ // (fmul:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (MUL_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
15027 /* 41869 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F32x4),
15028 /* 41874 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15029 /* 41880 */ GIR_RootConstrainSelectedInstOperands,
15030 /* 41881 */ // GIR_Coverage, 351,
15031 /* 41881 */ GIR_Done,
15032 /* 41882 */ // Label 1262: @41882
15033 /* 41882 */ GIM_Reject,
15034 /* 41883 */ // Label 1257: @41883
15035 /* 41883 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1263*/ GIMT_Encode4(41921), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 352 //
15036 /* 41890 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
15037 /* 41893 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
15038 /* 41896 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15039 /* 41900 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15040 /* 41904 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15041 /* 41908 */ // (fmul:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (MUL_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
15042 /* 41908 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MUL_F64x2),
15043 /* 41913 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15044 /* 41919 */ GIR_RootConstrainSelectedInstOperands,
15045 /* 41920 */ // GIR_Coverage, 352,
15046 /* 41920 */ GIR_Done,
15047 /* 41921 */ // Label 1263: @41921
15048 /* 41921 */ GIM_Reject,
15049 /* 41922 */ // Label 1258: @41922
15050 /* 41922 */ GIM_Reject,
15051 /* 41923 */ // Label 47: @41923
15052 /* 41923 */ GIM_Try, /*On fail goto*//*Label 1264*/ GIMT_Encode4(42091),
15053 /* 41928 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_v8f16,
15054 /* 41931 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
15055 /* 41934 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
15056 /* 41937 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_v8f16,
15057 /* 41940 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15058 /* 41944 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1265*/ GIMT_Encode4(42000), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 416 //
15059 /* 41951 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
15060 /* 41955 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FNEG),
15061 /* 41959 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8f16,
15062 /* 41963 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8f16,
15063 /* 41967 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15064 /* 41972 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15065 /* 41976 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15066 /* 41980 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
15067 /* 41982 */ // (fma:{ *:[v8f16] } (fneg:{ *:[v8f16] } V128:{ *:[v8f16] }:$a), V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (NMADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
15068 /* 41982 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F16x8),
15069 /* 41985 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15070 /* 41987 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // a
15071 /* 41991 */ GIR_RootToRootCopy, /*OpIdx*/2, // b
15072 /* 41993 */ GIR_RootToRootCopy, /*OpIdx*/3, // c
15073 /* 41995 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
15074 /* 41998 */ GIR_RootConstrainSelectedInstOperands,
15075 /* 41999 */ // GIR_Coverage, 416,
15076 /* 41999 */ GIR_EraseRootFromParent_Done,
15077 /* 42000 */ // Label 1265: @42000
15078 /* 42000 */ GIM_Try, /*On fail goto*//*Label 1266*/ GIMT_Encode4(42090),
15079 /* 42005 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15080 /* 42009 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1267*/ GIMT_Encode4(42061), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 1334 //
15081 /* 42016 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
15082 /* 42020 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FNEG),
15083 /* 42024 */ GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8f16,
15084 /* 42028 */ GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8f16,
15085 /* 42032 */ GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15086 /* 42037 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15087 /* 42041 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
15088 /* 42043 */ // (fma:{ *:[v8f16] } V128:{ *:[v8f16] }:$b, (fneg:{ *:[v8f16] } V128:{ *:[v8f16] }:$a), V128:{ *:[v8f16] }:$c) => (NMADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
15089 /* 42043 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::NMADD_F16x8),
15090 /* 42046 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
15091 /* 42048 */ GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // a
15092 /* 42052 */ GIR_RootToRootCopy, /*OpIdx*/1, // b
15093 /* 42054 */ GIR_RootToRootCopy, /*OpIdx*/3, // c
15094 /* 42056 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
15095 /* 42059 */ GIR_RootConstrainSelectedInstOperands,
15096 /* 42060 */ // GIR_Coverage, 1334,
15097 /* 42060 */ GIR_EraseRootFromParent_Done,
15098 /* 42061 */ // Label 1267: @42061
15099 /* 42061 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1268*/ GIMT_Encode4(42089), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 415 //
15100 /* 42068 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15101 /* 42072 */ GIM_RootCheckRegBankForClass, /*Op*/3, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15102 /* 42076 */ // (fma:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c) => (MADD_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$a, V128:{ *:[v8f16] }:$b, V128:{ *:[v8f16] }:$c)
15103 /* 42076 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MADD_F16x8),
15104 /* 42081 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15105 /* 42087 */ GIR_RootConstrainSelectedInstOperands,
15106 /* 42088 */ // GIR_Coverage, 415,
15107 /* 42088 */ GIR_Done,
15108 /* 42089 */ // Label 1268: @42089
15109 /* 42089 */ GIM_Reject,
15110 /* 42090 */ // Label 1266: @42090
15111 /* 42090 */ GIM_Reject,
15112 /* 42091 */ // Label 1264: @42091
15113 /* 42091 */ GIM_Reject,
15114 /* 42092 */ // Label 48: @42092
15115 /* 42092 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1274*/ GIMT_Encode4(42354),
15116 /* 42103 */ /*GILLT_f32*//*Label 1269*/ GIMT_Encode4(42163),
15117 /* 42107 */ /*GILLT_f64*//*Label 1270*/ GIMT_Encode4(42200), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
15118 /* 42151 */ /*GILLT_v8f16*//*Label 1271*/ GIMT_Encode4(42237),
15119 /* 42155 */ /*GILLT_v4f32*//*Label 1272*/ GIMT_Encode4(42276),
15120 /* 42159 */ /*GILLT_v2f64*//*Label 1273*/ GIMT_Encode4(42315),
15121 /* 42163 */ // Label 1269: @42163
15122 /* 42163 */ GIM_Try, /*On fail goto*//*Label 1275*/ GIMT_Encode4(42199), // Rule ID 130 //
15123 /* 42168 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
15124 /* 42171 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
15125 /* 42174 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15126 /* 42178 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15127 /* 42182 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15128 /* 42186 */ // (fdiv:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (DIV_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
15129 /* 42186 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F32),
15130 /* 42191 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15131 /* 42197 */ GIR_RootConstrainSelectedInstOperands,
15132 /* 42198 */ // GIR_Coverage, 130,
15133 /* 42198 */ GIR_Done,
15134 /* 42199 */ // Label 1275: @42199
15135 /* 42199 */ GIM_Reject,
15136 /* 42200 */ // Label 1270: @42200
15137 /* 42200 */ GIM_Try, /*On fail goto*//*Label 1276*/ GIMT_Encode4(42236), // Rule ID 131 //
15138 /* 42205 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
15139 /* 42208 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
15140 /* 42211 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15141 /* 42215 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15142 /* 42219 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15143 /* 42223 */ // (fdiv:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (DIV_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
15144 /* 42223 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F64),
15145 /* 42228 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15146 /* 42234 */ GIR_RootConstrainSelectedInstOperands,
15147 /* 42235 */ // GIR_Coverage, 131,
15148 /* 42235 */ GIR_Done,
15149 /* 42236 */ // Label 1276: @42236
15150 /* 42236 */ GIM_Reject,
15151 /* 42237 */ // Label 1271: @42237
15152 /* 42237 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1277*/ GIMT_Encode4(42275), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 356 //
15153 /* 42244 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
15154 /* 42247 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
15155 /* 42250 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15156 /* 42254 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15157 /* 42258 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15158 /* 42262 */ // (fdiv:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (DIV_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
15159 /* 42262 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F16x8),
15160 /* 42267 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15161 /* 42273 */ GIR_RootConstrainSelectedInstOperands,
15162 /* 42274 */ // GIR_Coverage, 356,
15163 /* 42274 */ GIR_Done,
15164 /* 42275 */ // Label 1277: @42275
15165 /* 42275 */ GIM_Reject,
15166 /* 42276 */ // Label 1272: @42276
15167 /* 42276 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1278*/ GIMT_Encode4(42314), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 354 //
15168 /* 42283 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
15169 /* 42286 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
15170 /* 42289 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15171 /* 42293 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15172 /* 42297 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15173 /* 42301 */ // (fdiv:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (DIV_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
15174 /* 42301 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F32x4),
15175 /* 42306 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15176 /* 42312 */ GIR_RootConstrainSelectedInstOperands,
15177 /* 42313 */ // GIR_Coverage, 354,
15178 /* 42313 */ GIR_Done,
15179 /* 42314 */ // Label 1278: @42314
15180 /* 42314 */ GIM_Reject,
15181 /* 42315 */ // Label 1273: @42315
15182 /* 42315 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1279*/ GIMT_Encode4(42353), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 355 //
15183 /* 42322 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
15184 /* 42325 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
15185 /* 42328 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15186 /* 42332 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15187 /* 42336 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15188 /* 42340 */ // (fdiv:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (DIV_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
15189 /* 42340 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DIV_F64x2),
15190 /* 42345 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15191 /* 42351 */ GIR_RootConstrainSelectedInstOperands,
15192 /* 42352 */ // GIR_Coverage, 355,
15193 /* 42352 */ GIR_Done,
15194 /* 42353 */ // Label 1279: @42353
15195 /* 42353 */ GIM_Reject,
15196 /* 42354 */ // Label 1274: @42354
15197 /* 42354 */ GIM_Reject,
15198 /* 42355 */ // Label 49: @42355
15199 /* 42355 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1285*/ GIMT_Encode4(42582),
15200 /* 42366 */ /*GILLT_f32*//*Label 1280*/ GIMT_Encode4(42426),
15201 /* 42370 */ /*GILLT_f64*//*Label 1281*/ GIMT_Encode4(42456), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
15202 /* 42414 */ /*GILLT_v8f16*//*Label 1282*/ GIMT_Encode4(42486),
15203 /* 42418 */ /*GILLT_v4f32*//*Label 1283*/ GIMT_Encode4(42518),
15204 /* 42422 */ /*GILLT_v2f64*//*Label 1284*/ GIMT_Encode4(42550),
15205 /* 42426 */ // Label 1280: @42426
15206 /* 42426 */ GIM_Try, /*On fail goto*//*Label 1286*/ GIMT_Encode4(42455), // Rule ID 136 //
15207 /* 42431 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
15208 /* 42434 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15209 /* 42438 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15210 /* 42442 */ // (fneg:{ *:[f32] } F32:{ *:[f32] }:$src) => (NEG_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
15211 /* 42442 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F32),
15212 /* 42447 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15213 /* 42453 */ GIR_RootConstrainSelectedInstOperands,
15214 /* 42454 */ // GIR_Coverage, 136,
15215 /* 42454 */ GIR_Done,
15216 /* 42455 */ // Label 1286: @42455
15217 /* 42455 */ GIM_Reject,
15218 /* 42456 */ // Label 1281: @42456
15219 /* 42456 */ GIM_Try, /*On fail goto*//*Label 1287*/ GIMT_Encode4(42485), // Rule ID 137 //
15220 /* 42461 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
15221 /* 42464 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15222 /* 42468 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15223 /* 42472 */ // (fneg:{ *:[f64] } F64:{ *:[f64] }:$src) => (NEG_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
15224 /* 42472 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F64),
15225 /* 42477 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15226 /* 42483 */ GIR_RootConstrainSelectedInstOperands,
15227 /* 42484 */ // GIR_Coverage, 137,
15228 /* 42484 */ GIR_Done,
15229 /* 42485 */ // Label 1287: @42485
15230 /* 42485 */ GIM_Reject,
15231 /* 42486 */ // Label 1282: @42486
15232 /* 42486 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1288*/ GIMT_Encode4(42517), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 329 //
15233 /* 42493 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
15234 /* 42496 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15235 /* 42500 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15236 /* 42504 */ // (fneg:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (NEG_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
15237 /* 42504 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F16x8),
15238 /* 42509 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15239 /* 42515 */ GIR_RootConstrainSelectedInstOperands,
15240 /* 42516 */ // GIR_Coverage, 329,
15241 /* 42516 */ GIR_Done,
15242 /* 42517 */ // Label 1288: @42517
15243 /* 42517 */ GIM_Reject,
15244 /* 42518 */ // Label 1283: @42518
15245 /* 42518 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1289*/ GIMT_Encode4(42549), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 327 //
15246 /* 42525 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
15247 /* 42528 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15248 /* 42532 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15249 /* 42536 */ // (fneg:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (NEG_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
15250 /* 42536 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F32x4),
15251 /* 42541 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15252 /* 42547 */ GIR_RootConstrainSelectedInstOperands,
15253 /* 42548 */ // GIR_Coverage, 327,
15254 /* 42548 */ GIR_Done,
15255 /* 42549 */ // Label 1289: @42549
15256 /* 42549 */ GIM_Reject,
15257 /* 42550 */ // Label 1284: @42550
15258 /* 42550 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1290*/ GIMT_Encode4(42581), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 328 //
15259 /* 42557 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
15260 /* 42560 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15261 /* 42564 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15262 /* 42568 */ // (fneg:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (NEG_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
15263 /* 42568 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEG_F64x2),
15264 /* 42573 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15265 /* 42579 */ GIR_RootConstrainSelectedInstOperands,
15266 /* 42580 */ // GIR_Coverage, 328,
15267 /* 42580 */ GIR_Done,
15268 /* 42581 */ // Label 1290: @42581
15269 /* 42581 */ GIM_Reject,
15270 /* 42582 */ // Label 1285: @42582
15271 /* 42582 */ GIM_Reject,
15272 /* 42583 */ // Label 50: @42583
15273 /* 42583 */ GIM_Try, /*On fail goto*//*Label 1291*/ GIMT_Encode4(42615), // Rule ID 58 //
15274 /* 42588 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_f64,
15275 /* 42591 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
15276 /* 42594 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15277 /* 42598 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15278 /* 42602 */ // (fpextend:{ *:[f64] } F32:{ *:[f32] }:$src) => (F64_PROMOTE_F32:{ *:[f64] } F32:{ *:[f32] }:$src)
15279 /* 42602 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_PROMOTE_F32),
15280 /* 42607 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15281 /* 42613 */ GIR_RootConstrainSelectedInstOperands,
15282 /* 42614 */ // GIR_Coverage, 58,
15283 /* 42614 */ GIR_Done,
15284 /* 42615 */ // Label 1291: @42615
15285 /* 42615 */ GIM_Reject,
15286 /* 42616 */ // Label 51: @42616
15287 /* 42616 */ GIM_Try, /*On fail goto*//*Label 1292*/ GIMT_Encode4(42648), // Rule ID 59 //
15288 /* 42621 */ GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_f32,
15289 /* 42624 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
15290 /* 42627 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15291 /* 42631 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15292 /* 42635 */ // (fpround:{ *:[f32] } F64:{ *:[f64] }:$src) => (F32_DEMOTE_F64:{ *:[f32] } F64:{ *:[f64] }:$src)
15293 /* 42635 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_DEMOTE_F64),
15294 /* 42640 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15295 /* 42646 */ GIR_RootConstrainSelectedInstOperands,
15296 /* 42647 */ // GIR_Coverage, 59,
15297 /* 42647 */ GIR_Done,
15298 /* 42648 */ // Label 1292: @42648
15299 /* 42648 */ GIM_Reject,
15300 /* 42649 */ // Label 52: @42649
15301 /* 42649 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(15), /*)*//*default:*//*Label 1297*/ GIMT_Encode4(43062),
15302 /* 42660 */ /*GILLT_i32*//*Label 1293*/ GIMT_Encode4(42712),
15303 /* 42664 */ /*GILLT_i64*//*Label 1294*/ GIMT_Encode4(42842), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
15304 /* 42704 */ /*GILLT_v8i16*//*Label 1295*/ GIMT_Encode4(42972),
15305 /* 42708 */ /*GILLT_v4i32*//*Label 1296*/ GIMT_Encode4(43004),
15306 /* 42712 */ // Label 1293: @42712
15307 /* 42712 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1300*/ GIMT_Encode4(42841),
15308 /* 42723 */ /*GILLT_f32*//*Label 1298*/ GIMT_Encode4(42731),
15309 /* 42727 */ /*GILLT_f64*//*Label 1299*/ GIMT_Encode4(42786),
15310 /* 42731 */ // Label 1298: @42731
15311 /* 42731 */ GIM_Try, /*On fail goto*//*Label 1301*/ GIMT_Encode4(42785),
15312 /* 42736 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15313 /* 42740 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15314 /* 42744 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1302*/ GIMT_Encode4(42764), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 34 //
15315 /* 42751 */ // (fp_to_sint:{ *:[i32] } F32:{ *:[f32] }:$src) => (I32_TRUNC_S_SAT_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
15316 /* 42751 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_SAT_F32),
15317 /* 42756 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15318 /* 42762 */ GIR_RootConstrainSelectedInstOperands,
15319 /* 42763 */ // GIR_Coverage, 34,
15320 /* 42763 */ GIR_Done,
15321 /* 42764 */ // Label 1302: @42764
15322 /* 42764 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1303*/ GIMT_Encode4(42784), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 42 //
15323 /* 42771 */ // (fp_to_sint:{ *:[i32] } F32:{ *:[f32] }:$src) => (FP_TO_SINT_I32_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
15324 /* 42771 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I32_F32),
15325 /* 42776 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15326 /* 42782 */ GIR_RootConstrainSelectedInstOperands,
15327 /* 42783 */ // GIR_Coverage, 42,
15328 /* 42783 */ GIR_Done,
15329 /* 42784 */ // Label 1303: @42784
15330 /* 42784 */ GIM_Reject,
15331 /* 42785 */ // Label 1301: @42785
15332 /* 42785 */ GIM_Reject,
15333 /* 42786 */ // Label 1299: @42786
15334 /* 42786 */ GIM_Try, /*On fail goto*//*Label 1304*/ GIMT_Encode4(42840),
15335 /* 42791 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15336 /* 42795 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15337 /* 42799 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1305*/ GIMT_Encode4(42819), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 38 //
15338 /* 42806 */ // (fp_to_sint:{ *:[i32] } F64:{ *:[f64] }:$src) => (I32_TRUNC_S_SAT_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
15339 /* 42806 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_SAT_F64),
15340 /* 42811 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15341 /* 42817 */ GIR_RootConstrainSelectedInstOperands,
15342 /* 42818 */ // GIR_Coverage, 38,
15343 /* 42818 */ GIR_Done,
15344 /* 42819 */ // Label 1305: @42819
15345 /* 42819 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1306*/ GIMT_Encode4(42839), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 46 //
15346 /* 42826 */ // (fp_to_sint:{ *:[i32] } F64:{ *:[f64] }:$src) => (FP_TO_SINT_I32_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
15347 /* 42826 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I32_F64),
15348 /* 42831 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15349 /* 42837 */ GIR_RootConstrainSelectedInstOperands,
15350 /* 42838 */ // GIR_Coverage, 46,
15351 /* 42838 */ GIR_Done,
15352 /* 42839 */ // Label 1306: @42839
15353 /* 42839 */ GIM_Reject,
15354 /* 42840 */ // Label 1304: @42840
15355 /* 42840 */ GIM_Reject,
15356 /* 42841 */ // Label 1300: @42841
15357 /* 42841 */ GIM_Reject,
15358 /* 42842 */ // Label 1294: @42842
15359 /* 42842 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1309*/ GIMT_Encode4(42971),
15360 /* 42853 */ /*GILLT_f32*//*Label 1307*/ GIMT_Encode4(42861),
15361 /* 42857 */ /*GILLT_f64*//*Label 1308*/ GIMT_Encode4(42916),
15362 /* 42861 */ // Label 1307: @42861
15363 /* 42861 */ GIM_Try, /*On fail goto*//*Label 1310*/ GIMT_Encode4(42915),
15364 /* 42866 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
15365 /* 42870 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15366 /* 42874 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1311*/ GIMT_Encode4(42894), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 36 //
15367 /* 42881 */ // (fp_to_sint:{ *:[i64] } F32:{ *:[f32] }:$src) => (I64_TRUNC_S_SAT_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
15368 /* 42881 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_SAT_F32),
15369 /* 42886 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15370 /* 42892 */ GIR_RootConstrainSelectedInstOperands,
15371 /* 42893 */ // GIR_Coverage, 36,
15372 /* 42893 */ GIR_Done,
15373 /* 42894 */ // Label 1311: @42894
15374 /* 42894 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1312*/ GIMT_Encode4(42914), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 44 //
15375 /* 42901 */ // (fp_to_sint:{ *:[i64] } F32:{ *:[f32] }:$src) => (FP_TO_SINT_I64_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
15376 /* 42901 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I64_F32),
15377 /* 42906 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15378 /* 42912 */ GIR_RootConstrainSelectedInstOperands,
15379 /* 42913 */ // GIR_Coverage, 44,
15380 /* 42913 */ GIR_Done,
15381 /* 42914 */ // Label 1312: @42914
15382 /* 42914 */ GIM_Reject,
15383 /* 42915 */ // Label 1310: @42915
15384 /* 42915 */ GIM_Reject,
15385 /* 42916 */ // Label 1308: @42916
15386 /* 42916 */ GIM_Try, /*On fail goto*//*Label 1313*/ GIMT_Encode4(42970),
15387 /* 42921 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
15388 /* 42925 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15389 /* 42929 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1314*/ GIMT_Encode4(42949), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 40 //
15390 /* 42936 */ // (fp_to_sint:{ *:[i64] } F64:{ *:[f64] }:$src) => (I64_TRUNC_S_SAT_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
15391 /* 42936 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_SAT_F64),
15392 /* 42941 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15393 /* 42947 */ GIR_RootConstrainSelectedInstOperands,
15394 /* 42948 */ // GIR_Coverage, 40,
15395 /* 42948 */ GIR_Done,
15396 /* 42949 */ // Label 1314: @42949
15397 /* 42949 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1315*/ GIMT_Encode4(42969), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 48 //
15398 /* 42956 */ // (fp_to_sint:{ *:[i64] } F64:{ *:[f64] }:$src) => (FP_TO_SINT_I64_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
15399 /* 42956 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_SINT_I64_F64),
15400 /* 42961 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15401 /* 42967 */ GIR_RootConstrainSelectedInstOperands,
15402 /* 42968 */ // GIR_Coverage, 48,
15403 /* 42968 */ GIR_Done,
15404 /* 42969 */ // Label 1315: @42969
15405 /* 42969 */ GIM_Reject,
15406 /* 42970 */ // Label 1313: @42970
15407 /* 42970 */ GIM_Reject,
15408 /* 42971 */ // Label 1309: @42971
15409 /* 42971 */ GIM_Reject,
15410 /* 42972 */ // Label 1295: @42972
15411 /* 42972 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1316*/ GIMT_Encode4(43003), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 371 //
15412 /* 42979 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
15413 /* 42982 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15414 /* 42986 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15415 /* 42990 */ // (fp_to_sint:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec) => (fp_to_sint_I16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec)
15416 /* 42990 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_sint_I16x8),
15417 /* 42995 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15418 /* 43001 */ GIR_RootConstrainSelectedInstOperands,
15419 /* 43002 */ // GIR_Coverage, 371,
15420 /* 43002 */ GIR_Done,
15421 /* 43003 */ // Label 1316: @43003
15422 /* 43003 */ GIM_Reject,
15423 /* 43004 */ // Label 1296: @43004
15424 /* 43004 */ GIM_Try, /*On fail goto*//*Label 1317*/ GIMT_Encode4(43061),
15425 /* 43009 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
15426 /* 43012 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15427 /* 43016 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15428 /* 43020 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1318*/ GIMT_Encode4(43040), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1264 //
15429 /* 43027 */ // (fp_to_sint:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec) => (int_wasm_relaxed_trunc_signed_I32x4:{ *:[v4i32] } ?:{ *:[v4f32] }:$vec)
15430 /* 43027 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_signed_I32x4),
15431 /* 43032 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15432 /* 43038 */ GIR_RootConstrainSelectedInstOperands,
15433 /* 43039 */ // GIR_Coverage, 1264,
15434 /* 43039 */ GIR_Done,
15435 /* 43040 */ // Label 1318: @43040
15436 /* 43040 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1319*/ GIMT_Encode4(43060), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 369 //
15437 /* 43047 */ // (fp_to_sint:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec) => (fp_to_sint_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
15438 /* 43047 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_sint_I32x4),
15439 /* 43052 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15440 /* 43058 */ GIR_RootConstrainSelectedInstOperands,
15441 /* 43059 */ // GIR_Coverage, 369,
15442 /* 43059 */ GIR_Done,
15443 /* 43060 */ // Label 1319: @43060
15444 /* 43060 */ GIM_Reject,
15445 /* 43061 */ // Label 1317: @43061
15446 /* 43061 */ GIM_Reject,
15447 /* 43062 */ // Label 1297: @43062
15448 /* 43062 */ GIM_Reject,
15449 /* 43063 */ // Label 53: @43063
15450 /* 43063 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(15), /*)*//*default:*//*Label 1324*/ GIMT_Encode4(43476),
15451 /* 43074 */ /*GILLT_i32*//*Label 1320*/ GIMT_Encode4(43126),
15452 /* 43078 */ /*GILLT_i64*//*Label 1321*/ GIMT_Encode4(43256), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
15453 /* 43118 */ /*GILLT_v8i16*//*Label 1322*/ GIMT_Encode4(43386),
15454 /* 43122 */ /*GILLT_v4i32*//*Label 1323*/ GIMT_Encode4(43418),
15455 /* 43126 */ // Label 1320: @43126
15456 /* 43126 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1327*/ GIMT_Encode4(43255),
15457 /* 43137 */ /*GILLT_f32*//*Label 1325*/ GIMT_Encode4(43145),
15458 /* 43141 */ /*GILLT_f64*//*Label 1326*/ GIMT_Encode4(43200),
15459 /* 43145 */ // Label 1325: @43145
15460 /* 43145 */ GIM_Try, /*On fail goto*//*Label 1328*/ GIMT_Encode4(43199),
15461 /* 43150 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15462 /* 43154 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15463 /* 43158 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1329*/ GIMT_Encode4(43178), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 35 //
15464 /* 43165 */ // (fp_to_uint:{ *:[i32] } F32:{ *:[f32] }:$src) => (I32_TRUNC_U_SAT_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
15465 /* 43165 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_SAT_F32),
15466 /* 43170 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15467 /* 43176 */ GIR_RootConstrainSelectedInstOperands,
15468 /* 43177 */ // GIR_Coverage, 35,
15469 /* 43177 */ GIR_Done,
15470 /* 43178 */ // Label 1329: @43178
15471 /* 43178 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1330*/ GIMT_Encode4(43198), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 43 //
15472 /* 43185 */ // (fp_to_uint:{ *:[i32] } F32:{ *:[f32] }:$src) => (FP_TO_UINT_I32_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
15473 /* 43185 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I32_F32),
15474 /* 43190 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15475 /* 43196 */ GIR_RootConstrainSelectedInstOperands,
15476 /* 43197 */ // GIR_Coverage, 43,
15477 /* 43197 */ GIR_Done,
15478 /* 43198 */ // Label 1330: @43198
15479 /* 43198 */ GIM_Reject,
15480 /* 43199 */ // Label 1328: @43199
15481 /* 43199 */ GIM_Reject,
15482 /* 43200 */ // Label 1326: @43200
15483 /* 43200 */ GIM_Try, /*On fail goto*//*Label 1331*/ GIMT_Encode4(43254),
15484 /* 43205 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15485 /* 43209 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15486 /* 43213 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1332*/ GIMT_Encode4(43233), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 39 //
15487 /* 43220 */ // (fp_to_uint:{ *:[i32] } F64:{ *:[f64] }:$src) => (I32_TRUNC_U_SAT_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
15488 /* 43220 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_SAT_F64),
15489 /* 43225 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15490 /* 43231 */ GIR_RootConstrainSelectedInstOperands,
15491 /* 43232 */ // GIR_Coverage, 39,
15492 /* 43232 */ GIR_Done,
15493 /* 43233 */ // Label 1332: @43233
15494 /* 43233 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1333*/ GIMT_Encode4(43253), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 47 //
15495 /* 43240 */ // (fp_to_uint:{ *:[i32] } F64:{ *:[f64] }:$src) => (FP_TO_UINT_I32_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
15496 /* 43240 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I32_F64),
15497 /* 43245 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15498 /* 43251 */ GIR_RootConstrainSelectedInstOperands,
15499 /* 43252 */ // GIR_Coverage, 47,
15500 /* 43252 */ GIR_Done,
15501 /* 43253 */ // Label 1333: @43253
15502 /* 43253 */ GIM_Reject,
15503 /* 43254 */ // Label 1331: @43254
15504 /* 43254 */ GIM_Reject,
15505 /* 43255 */ // Label 1327: @43255
15506 /* 43255 */ GIM_Reject,
15507 /* 43256 */ // Label 1321: @43256
15508 /* 43256 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1336*/ GIMT_Encode4(43385),
15509 /* 43267 */ /*GILLT_f32*//*Label 1334*/ GIMT_Encode4(43275),
15510 /* 43271 */ /*GILLT_f64*//*Label 1335*/ GIMT_Encode4(43330),
15511 /* 43275 */ // Label 1334: @43275
15512 /* 43275 */ GIM_Try, /*On fail goto*//*Label 1337*/ GIMT_Encode4(43329),
15513 /* 43280 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
15514 /* 43284 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15515 /* 43288 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1338*/ GIMT_Encode4(43308), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 37 //
15516 /* 43295 */ // (fp_to_uint:{ *:[i64] } F32:{ *:[f32] }:$src) => (I64_TRUNC_U_SAT_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
15517 /* 43295 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_SAT_F32),
15518 /* 43300 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15519 /* 43306 */ GIR_RootConstrainSelectedInstOperands,
15520 /* 43307 */ // GIR_Coverage, 37,
15521 /* 43307 */ GIR_Done,
15522 /* 43308 */ // Label 1338: @43308
15523 /* 43308 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1339*/ GIMT_Encode4(43328), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 45 //
15524 /* 43315 */ // (fp_to_uint:{ *:[i64] } F32:{ *:[f32] }:$src) => (FP_TO_UINT_I64_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
15525 /* 43315 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I64_F32),
15526 /* 43320 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15527 /* 43326 */ GIR_RootConstrainSelectedInstOperands,
15528 /* 43327 */ // GIR_Coverage, 45,
15529 /* 43327 */ GIR_Done,
15530 /* 43328 */ // Label 1339: @43328
15531 /* 43328 */ GIM_Reject,
15532 /* 43329 */ // Label 1337: @43329
15533 /* 43329 */ GIM_Reject,
15534 /* 43330 */ // Label 1335: @43330
15535 /* 43330 */ GIM_Try, /*On fail goto*//*Label 1340*/ GIMT_Encode4(43384),
15536 /* 43335 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
15537 /* 43339 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15538 /* 43343 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1341*/ GIMT_Encode4(43363), GIMT_Encode2(GIFBS_HasNontrappingFPToInt), // Rule ID 41 //
15539 /* 43350 */ // (fp_to_uint:{ *:[i64] } F64:{ *:[f64] }:$src) => (I64_TRUNC_U_SAT_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
15540 /* 43350 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_SAT_F64),
15541 /* 43355 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15542 /* 43361 */ GIR_RootConstrainSelectedInstOperands,
15543 /* 43362 */ // GIR_Coverage, 41,
15544 /* 43362 */ GIR_Done,
15545 /* 43363 */ // Label 1341: @43363
15546 /* 43363 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1342*/ GIMT_Encode4(43383), GIMT_Encode2(GIFBS_NotHasNontrappingFPToInt), // Rule ID 49 //
15547 /* 43370 */ // (fp_to_uint:{ *:[i64] } F64:{ *:[f64] }:$src) => (FP_TO_UINT_I64_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
15548 /* 43370 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FP_TO_UINT_I64_F64),
15549 /* 43375 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15550 /* 43381 */ GIR_RootConstrainSelectedInstOperands,
15551 /* 43382 */ // GIR_Coverage, 49,
15552 /* 43382 */ GIR_Done,
15553 /* 43383 */ // Label 1342: @43383
15554 /* 43383 */ GIM_Reject,
15555 /* 43384 */ // Label 1340: @43384
15556 /* 43384 */ GIM_Reject,
15557 /* 43385 */ // Label 1336: @43385
15558 /* 43385 */ GIM_Reject,
15559 /* 43386 */ // Label 1322: @43386
15560 /* 43386 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1343*/ GIMT_Encode4(43417), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 372 //
15561 /* 43393 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
15562 /* 43396 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15563 /* 43400 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15564 /* 43404 */ // (fp_to_uint:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec) => (fp_to_uint_I16x8:{ *:[v8i16] } V128:{ *:[v8f16] }:$vec)
15565 /* 43404 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_uint_I16x8),
15566 /* 43409 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15567 /* 43415 */ GIR_RootConstrainSelectedInstOperands,
15568 /* 43416 */ // GIR_Coverage, 372,
15569 /* 43416 */ GIR_Done,
15570 /* 43417 */ // Label 1343: @43417
15571 /* 43417 */ GIM_Reject,
15572 /* 43418 */ // Label 1323: @43418
15573 /* 43418 */ GIM_Try, /*On fail goto*//*Label 1344*/ GIMT_Encode4(43475),
15574 /* 43423 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
15575 /* 43426 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15576 /* 43430 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15577 /* 43434 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1345*/ GIMT_Encode4(43454), GIMT_Encode2(GIFBS_HasRelaxedSIMD), // Rule ID 1265 //
15578 /* 43441 */ // (fp_to_uint:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec) => (int_wasm_relaxed_trunc_unsigned_I32x4:{ *:[v4i32] } ?:{ *:[v4f32] }:$vec)
15579 /* 43441 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::int_wasm_relaxed_trunc_unsigned_I32x4),
15580 /* 43446 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15581 /* 43452 */ GIR_RootConstrainSelectedInstOperands,
15582 /* 43453 */ // GIR_Coverage, 1265,
15583 /* 43453 */ GIR_Done,
15584 /* 43454 */ // Label 1345: @43454
15585 /* 43454 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1346*/ GIMT_Encode4(43474), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 370 //
15586 /* 43461 */ // (fp_to_uint:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec) => (fp_to_uint_I32x4:{ *:[v4i32] } V128:{ *:[v4f32] }:$vec)
15587 /* 43461 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_uint_I32x4),
15588 /* 43466 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15589 /* 43472 */ GIR_RootConstrainSelectedInstOperands,
15590 /* 43473 */ // GIR_Coverage, 370,
15591 /* 43473 */ GIR_Done,
15592 /* 43474 */ // Label 1346: @43474
15593 /* 43474 */ GIM_Reject,
15594 /* 43475 */ // Label 1344: @43475
15595 /* 43475 */ GIM_Reject,
15596 /* 43476 */ // Label 1324: @43476
15597 /* 43476 */ GIM_Reject,
15598 /* 43477 */ // Label 54: @43477
15599 /* 43477 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(18), /*)*//*default:*//*Label 1351*/ GIMT_Encode4(43756),
15600 /* 43488 */ /*GILLT_f32*//*Label 1347*/ GIMT_Encode4(43544),
15601 /* 43492 */ /*GILLT_f64*//*Label 1348*/ GIMT_Encode4(43618), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
15602 /* 43536 */ /*GILLT_v8f16*//*Label 1349*/ GIMT_Encode4(43692),
15603 /* 43540 */ /*GILLT_v4f32*//*Label 1350*/ GIMT_Encode4(43724),
15604 /* 43544 */ // Label 1347: @43544
15605 /* 43544 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1354*/ GIMT_Encode4(43617),
15606 /* 43555 */ /*GILLT_i32*//*Label 1352*/ GIMT_Encode4(43563),
15607 /* 43559 */ /*GILLT_i64*//*Label 1353*/ GIMT_Encode4(43590),
15608 /* 43563 */ // Label 1352: @43563
15609 /* 43563 */ GIM_Try, /*On fail goto*//*Label 1355*/ GIMT_Encode4(43589), // Rule ID 50 //
15610 /* 43568 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15611 /* 43572 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15612 /* 43576 */ // (sint_to_fp:{ *:[f32] } I32:{ *:[i32] }:$src) => (F32_CONVERT_S_I32:{ *:[f32] } I32:{ *:[i32] }:$src)
15613 /* 43576 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_S_I32),
15614 /* 43581 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15615 /* 43587 */ GIR_RootConstrainSelectedInstOperands,
15616 /* 43588 */ // GIR_Coverage, 50,
15617 /* 43588 */ GIR_Done,
15618 /* 43589 */ // Label 1355: @43589
15619 /* 43589 */ GIM_Reject,
15620 /* 43590 */ // Label 1353: @43590
15621 /* 43590 */ GIM_Try, /*On fail goto*//*Label 1356*/ GIMT_Encode4(43616), // Rule ID 54 //
15622 /* 43595 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15623 /* 43599 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
15624 /* 43603 */ // (sint_to_fp:{ *:[f32] } I64:{ *:[i64] }:$src) => (F32_CONVERT_S_I64:{ *:[f32] } I64:{ *:[i64] }:$src)
15625 /* 43603 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_S_I64),
15626 /* 43608 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15627 /* 43614 */ GIR_RootConstrainSelectedInstOperands,
15628 /* 43615 */ // GIR_Coverage, 54,
15629 /* 43615 */ GIR_Done,
15630 /* 43616 */ // Label 1356: @43616
15631 /* 43616 */ GIM_Reject,
15632 /* 43617 */ // Label 1354: @43617
15633 /* 43617 */ GIM_Reject,
15634 /* 43618 */ // Label 1348: @43618
15635 /* 43618 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1359*/ GIMT_Encode4(43691),
15636 /* 43629 */ /*GILLT_i32*//*Label 1357*/ GIMT_Encode4(43637),
15637 /* 43633 */ /*GILLT_i64*//*Label 1358*/ GIMT_Encode4(43664),
15638 /* 43637 */ // Label 1357: @43637
15639 /* 43637 */ GIM_Try, /*On fail goto*//*Label 1360*/ GIMT_Encode4(43663), // Rule ID 52 //
15640 /* 43642 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15641 /* 43646 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15642 /* 43650 */ // (sint_to_fp:{ *:[f64] } I32:{ *:[i32] }:$src) => (F64_CONVERT_S_I32:{ *:[f64] } I32:{ *:[i32] }:$src)
15643 /* 43650 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_S_I32),
15644 /* 43655 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15645 /* 43661 */ GIR_RootConstrainSelectedInstOperands,
15646 /* 43662 */ // GIR_Coverage, 52,
15647 /* 43662 */ GIR_Done,
15648 /* 43663 */ // Label 1360: @43663
15649 /* 43663 */ GIM_Reject,
15650 /* 43664 */ // Label 1358: @43664
15651 /* 43664 */ GIM_Try, /*On fail goto*//*Label 1361*/ GIMT_Encode4(43690), // Rule ID 56 //
15652 /* 43669 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15653 /* 43673 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
15654 /* 43677 */ // (sint_to_fp:{ *:[f64] } I64:{ *:[i64] }:$src) => (F64_CONVERT_S_I64:{ *:[f64] } I64:{ *:[i64] }:$src)
15655 /* 43677 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_S_I64),
15656 /* 43682 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15657 /* 43688 */ GIR_RootConstrainSelectedInstOperands,
15658 /* 43689 */ // GIR_Coverage, 56,
15659 /* 43689 */ GIR_Done,
15660 /* 43690 */ // Label 1361: @43690
15661 /* 43690 */ GIM_Reject,
15662 /* 43691 */ // Label 1359: @43691
15663 /* 43691 */ GIM_Reject,
15664 /* 43692 */ // Label 1349: @43692
15665 /* 43692 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1362*/ GIMT_Encode4(43723), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 379 //
15666 /* 43699 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
15667 /* 43702 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15668 /* 43706 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15669 /* 43710 */ // (sint_to_fp:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec) => (sint_to_fp_F16x8:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec)
15670 /* 43710 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::sint_to_fp_F16x8),
15671 /* 43715 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15672 /* 43721 */ GIR_RootConstrainSelectedInstOperands,
15673 /* 43722 */ // GIR_Coverage, 379,
15674 /* 43722 */ GIR_Done,
15675 /* 43723 */ // Label 1362: @43723
15676 /* 43723 */ GIM_Reject,
15677 /* 43724 */ // Label 1350: @43724
15678 /* 43724 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1363*/ GIMT_Encode4(43755), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 375 //
15679 /* 43731 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
15680 /* 43734 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15681 /* 43738 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15682 /* 43742 */ // (sint_to_fp:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec) => (sint_to_fp_F32x4:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec)
15683 /* 43742 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::sint_to_fp_F32x4),
15684 /* 43747 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15685 /* 43753 */ GIR_RootConstrainSelectedInstOperands,
15686 /* 43754 */ // GIR_Coverage, 375,
15687 /* 43754 */ GIR_Done,
15688 /* 43755 */ // Label 1363: @43755
15689 /* 43755 */ GIM_Reject,
15690 /* 43756 */ // Label 1351: @43756
15691 /* 43756 */ GIM_Reject,
15692 /* 43757 */ // Label 55: @43757
15693 /* 43757 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(18), /*)*//*default:*//*Label 1368*/ GIMT_Encode4(44036),
15694 /* 43768 */ /*GILLT_f32*//*Label 1364*/ GIMT_Encode4(43824),
15695 /* 43772 */ /*GILLT_f64*//*Label 1365*/ GIMT_Encode4(43898), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
15696 /* 43816 */ /*GILLT_v8f16*//*Label 1366*/ GIMT_Encode4(43972),
15697 /* 43820 */ /*GILLT_v4f32*//*Label 1367*/ GIMT_Encode4(44004),
15698 /* 43824 */ // Label 1364: @43824
15699 /* 43824 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1371*/ GIMT_Encode4(43897),
15700 /* 43835 */ /*GILLT_i32*//*Label 1369*/ GIMT_Encode4(43843),
15701 /* 43839 */ /*GILLT_i64*//*Label 1370*/ GIMT_Encode4(43870),
15702 /* 43843 */ // Label 1369: @43843
15703 /* 43843 */ GIM_Try, /*On fail goto*//*Label 1372*/ GIMT_Encode4(43869), // Rule ID 51 //
15704 /* 43848 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15705 /* 43852 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15706 /* 43856 */ // (uint_to_fp:{ *:[f32] } I32:{ *:[i32] }:$src) => (F32_CONVERT_U_I32:{ *:[f32] } I32:{ *:[i32] }:$src)
15707 /* 43856 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_U_I32),
15708 /* 43861 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15709 /* 43867 */ GIR_RootConstrainSelectedInstOperands,
15710 /* 43868 */ // GIR_Coverage, 51,
15711 /* 43868 */ GIR_Done,
15712 /* 43869 */ // Label 1372: @43869
15713 /* 43869 */ GIM_Reject,
15714 /* 43870 */ // Label 1370: @43870
15715 /* 43870 */ GIM_Try, /*On fail goto*//*Label 1373*/ GIMT_Encode4(43896), // Rule ID 55 //
15716 /* 43875 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15717 /* 43879 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
15718 /* 43883 */ // (uint_to_fp:{ *:[f32] } I64:{ *:[i64] }:$src) => (F32_CONVERT_U_I64:{ *:[f32] } I64:{ *:[i64] }:$src)
15719 /* 43883 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F32_CONVERT_U_I64),
15720 /* 43888 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15721 /* 43894 */ GIR_RootConstrainSelectedInstOperands,
15722 /* 43895 */ // GIR_Coverage, 55,
15723 /* 43895 */ GIR_Done,
15724 /* 43896 */ // Label 1373: @43896
15725 /* 43896 */ GIM_Reject,
15726 /* 43897 */ // Label 1371: @43897
15727 /* 43897 */ GIM_Reject,
15728 /* 43898 */ // Label 1365: @43898
15729 /* 43898 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1376*/ GIMT_Encode4(43971),
15730 /* 43909 */ /*GILLT_i32*//*Label 1374*/ GIMT_Encode4(43917),
15731 /* 43913 */ /*GILLT_i64*//*Label 1375*/ GIMT_Encode4(43944),
15732 /* 43917 */ // Label 1374: @43917
15733 /* 43917 */ GIM_Try, /*On fail goto*//*Label 1377*/ GIMT_Encode4(43943), // Rule ID 53 //
15734 /* 43922 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15735 /* 43926 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15736 /* 43930 */ // (uint_to_fp:{ *:[f64] } I32:{ *:[i32] }:$src) => (F64_CONVERT_U_I32:{ *:[f64] } I32:{ *:[i32] }:$src)
15737 /* 43930 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_U_I32),
15738 /* 43935 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15739 /* 43941 */ GIR_RootConstrainSelectedInstOperands,
15740 /* 43942 */ // GIR_Coverage, 53,
15741 /* 43942 */ GIR_Done,
15742 /* 43943 */ // Label 1377: @43943
15743 /* 43943 */ GIM_Reject,
15744 /* 43944 */ // Label 1375: @43944
15745 /* 43944 */ GIM_Try, /*On fail goto*//*Label 1378*/ GIMT_Encode4(43970), // Rule ID 57 //
15746 /* 43949 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15747 /* 43953 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
15748 /* 43957 */ // (uint_to_fp:{ *:[f64] } I64:{ *:[i64] }:$src) => (F64_CONVERT_U_I64:{ *:[f64] } I64:{ *:[i64] }:$src)
15749 /* 43957 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::F64_CONVERT_U_I64),
15750 /* 43962 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15751 /* 43968 */ GIR_RootConstrainSelectedInstOperands,
15752 /* 43969 */ // GIR_Coverage, 57,
15753 /* 43969 */ GIR_Done,
15754 /* 43970 */ // Label 1378: @43970
15755 /* 43970 */ GIM_Reject,
15756 /* 43971 */ // Label 1376: @43971
15757 /* 43971 */ GIM_Reject,
15758 /* 43972 */ // Label 1366: @43972
15759 /* 43972 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1379*/ GIMT_Encode4(44003), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 380 //
15760 /* 43979 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
15761 /* 43982 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15762 /* 43986 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15763 /* 43990 */ // (uint_to_fp:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec) => (uint_to_fp_F16x8:{ *:[v8f16] } V128:{ *:[v8i16] }:$vec)
15764 /* 43990 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::uint_to_fp_F16x8),
15765 /* 43995 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15766 /* 44001 */ GIR_RootConstrainSelectedInstOperands,
15767 /* 44002 */ // GIR_Coverage, 380,
15768 /* 44002 */ GIR_Done,
15769 /* 44003 */ // Label 1379: @44003
15770 /* 44003 */ GIM_Reject,
15771 /* 44004 */ // Label 1367: @44004
15772 /* 44004 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1380*/ GIMT_Encode4(44035), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 376 //
15773 /* 44011 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
15774 /* 44014 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15775 /* 44018 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15776 /* 44022 */ // (uint_to_fp:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec) => (uint_to_fp_F32x4:{ *:[v4f32] } V128:{ *:[v4i32] }:$vec)
15777 /* 44022 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::uint_to_fp_F32x4),
15778 /* 44027 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15779 /* 44033 */ GIR_RootConstrainSelectedInstOperands,
15780 /* 44034 */ // GIR_Coverage, 376,
15781 /* 44034 */ GIR_Done,
15782 /* 44035 */ // Label 1380: @44035
15783 /* 44035 */ GIM_Reject,
15784 /* 44036 */ // Label 1368: @44036
15785 /* 44036 */ GIM_Reject,
15786 /* 44037 */ // Label 56: @44037
15787 /* 44037 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(15), /*)*//*default:*//*Label 1385*/ GIMT_Encode4(44308),
15788 /* 44048 */ /*GILLT_i32*//*Label 1381*/ GIMT_Encode4(44100),
15789 /* 44052 */ /*GILLT_i64*//*Label 1382*/ GIMT_Encode4(44174), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
15790 /* 44092 */ /*GILLT_v8i16*//*Label 1383*/ GIMT_Encode4(44248),
15791 /* 44096 */ /*GILLT_v4i32*//*Label 1384*/ GIMT_Encode4(44278),
15792 /* 44100 */ // Label 1381: @44100
15793 /* 44100 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1388*/ GIMT_Encode4(44173),
15794 /* 44111 */ /*GILLT_f32*//*Label 1386*/ GIMT_Encode4(44119),
15795 /* 44115 */ /*GILLT_f64*//*Label 1387*/ GIMT_Encode4(44146),
15796 /* 44119 */ // Label 1386: @44119
15797 /* 44119 */ GIM_Try, /*On fail goto*//*Label 1389*/ GIMT_Encode4(44145), // Rule ID 602 //
15798 /* 44124 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15799 /* 44128 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15800 /* 44132 */ // (fp_to_sint_sat:{ *:[i32] } F32:{ *:[f32] }:$src, i32:{ *:[Other] }) => (I32_TRUNC_S_SAT_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
15801 /* 44132 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_SAT_F32),
15802 /* 44137 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15803 /* 44143 */ GIR_RootConstrainSelectedInstOperands,
15804 /* 44144 */ // GIR_Coverage, 602,
15805 /* 44144 */ GIR_Done,
15806 /* 44145 */ // Label 1389: @44145
15807 /* 44145 */ GIM_Reject,
15808 /* 44146 */ // Label 1387: @44146
15809 /* 44146 */ GIM_Try, /*On fail goto*//*Label 1390*/ GIMT_Encode4(44172), // Rule ID 604 //
15810 /* 44151 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15811 /* 44155 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15812 /* 44159 */ // (fp_to_sint_sat:{ *:[i32] } F64:{ *:[f64] }:$src, i32:{ *:[Other] }) => (I32_TRUNC_S_SAT_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
15813 /* 44159 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_S_SAT_F64),
15814 /* 44164 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15815 /* 44170 */ GIR_RootConstrainSelectedInstOperands,
15816 /* 44171 */ // GIR_Coverage, 604,
15817 /* 44171 */ GIR_Done,
15818 /* 44172 */ // Label 1390: @44172
15819 /* 44172 */ GIM_Reject,
15820 /* 44173 */ // Label 1388: @44173
15821 /* 44173 */ GIM_Reject,
15822 /* 44174 */ // Label 1382: @44174
15823 /* 44174 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1393*/ GIMT_Encode4(44247),
15824 /* 44185 */ /*GILLT_f32*//*Label 1391*/ GIMT_Encode4(44193),
15825 /* 44189 */ /*GILLT_f64*//*Label 1392*/ GIMT_Encode4(44220),
15826 /* 44193 */ // Label 1391: @44193
15827 /* 44193 */ GIM_Try, /*On fail goto*//*Label 1394*/ GIMT_Encode4(44219), // Rule ID 606 //
15828 /* 44198 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
15829 /* 44202 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15830 /* 44206 */ // (fp_to_sint_sat:{ *:[i64] } F32:{ *:[f32] }:$src, i64:{ *:[Other] }) => (I64_TRUNC_S_SAT_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
15831 /* 44206 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_SAT_F32),
15832 /* 44211 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15833 /* 44217 */ GIR_RootConstrainSelectedInstOperands,
15834 /* 44218 */ // GIR_Coverage, 606,
15835 /* 44218 */ GIR_Done,
15836 /* 44219 */ // Label 1394: @44219
15837 /* 44219 */ GIM_Reject,
15838 /* 44220 */ // Label 1392: @44220
15839 /* 44220 */ GIM_Try, /*On fail goto*//*Label 1395*/ GIMT_Encode4(44246), // Rule ID 608 //
15840 /* 44225 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
15841 /* 44229 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15842 /* 44233 */ // (fp_to_sint_sat:{ *:[i64] } F64:{ *:[f64] }:$src, i64:{ *:[Other] }) => (I64_TRUNC_S_SAT_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
15843 /* 44233 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_S_SAT_F64),
15844 /* 44238 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15845 /* 44244 */ GIR_RootConstrainSelectedInstOperands,
15846 /* 44245 */ // GIR_Coverage, 608,
15847 /* 44245 */ GIR_Done,
15848 /* 44246 */ // Label 1395: @44246
15849 /* 44246 */ GIM_Reject,
15850 /* 44247 */ // Label 1393: @44247
15851 /* 44247 */ GIM_Reject,
15852 /* 44248 */ // Label 1383: @44248
15853 /* 44248 */ GIM_Try, /*On fail goto*//*Label 1396*/ GIMT_Encode4(44277), // Rule ID 1188 //
15854 /* 44253 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
15855 /* 44256 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15856 /* 44260 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15857 /* 44264 */ // (fp_to_sint_sat:{ *:[v8i16] } V128:{ *:[v8f16] }:$src, i16:{ *:[Other] }) => (fp_to_sint_I16x8:{ *:[v8i16] } ?:{ *:[v8f16] }:$src)
15858 /* 44264 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_sint_I16x8),
15859 /* 44269 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15860 /* 44275 */ GIR_RootConstrainSelectedInstOperands,
15861 /* 44276 */ // GIR_Coverage, 1188,
15862 /* 44276 */ GIR_Done,
15863 /* 44277 */ // Label 1396: @44277
15864 /* 44277 */ GIM_Reject,
15865 /* 44278 */ // Label 1384: @44278
15866 /* 44278 */ GIM_Try, /*On fail goto*//*Label 1397*/ GIMT_Encode4(44307), // Rule ID 1186 //
15867 /* 44283 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
15868 /* 44286 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15869 /* 44290 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15870 /* 44294 */ // (fp_to_sint_sat:{ *:[v4i32] } V128:{ *:[v4f32] }:$src, i32:{ *:[Other] }) => (fp_to_sint_I32x4:{ *:[v4i32] } ?:{ *:[v4f32] }:$src)
15871 /* 44294 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_sint_I32x4),
15872 /* 44299 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15873 /* 44305 */ GIR_RootConstrainSelectedInstOperands,
15874 /* 44306 */ // GIR_Coverage, 1186,
15875 /* 44306 */ GIR_Done,
15876 /* 44307 */ // Label 1397: @44307
15877 /* 44307 */ GIM_Reject,
15878 /* 44308 */ // Label 1385: @44308
15879 /* 44308 */ GIM_Reject,
15880 /* 44309 */ // Label 57: @44309
15881 /* 44309 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(15), /*)*//*default:*//*Label 1402*/ GIMT_Encode4(44580),
15882 /* 44320 */ /*GILLT_i32*//*Label 1398*/ GIMT_Encode4(44372),
15883 /* 44324 */ /*GILLT_i64*//*Label 1399*/ GIMT_Encode4(44446), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
15884 /* 44364 */ /*GILLT_v8i16*//*Label 1400*/ GIMT_Encode4(44520),
15885 /* 44368 */ /*GILLT_v4i32*//*Label 1401*/ GIMT_Encode4(44550),
15886 /* 44372 */ // Label 1398: @44372
15887 /* 44372 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1405*/ GIMT_Encode4(44445),
15888 /* 44383 */ /*GILLT_f32*//*Label 1403*/ GIMT_Encode4(44391),
15889 /* 44387 */ /*GILLT_f64*//*Label 1404*/ GIMT_Encode4(44418),
15890 /* 44391 */ // Label 1403: @44391
15891 /* 44391 */ GIM_Try, /*On fail goto*//*Label 1406*/ GIMT_Encode4(44417), // Rule ID 603 //
15892 /* 44396 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15893 /* 44400 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15894 /* 44404 */ // (fp_to_uint_sat:{ *:[i32] } F32:{ *:[f32] }:$src, i32:{ *:[Other] }) => (I32_TRUNC_U_SAT_F32:{ *:[i32] } F32:{ *:[f32] }:$src)
15895 /* 44404 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_SAT_F32),
15896 /* 44409 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15897 /* 44415 */ GIR_RootConstrainSelectedInstOperands,
15898 /* 44416 */ // GIR_Coverage, 603,
15899 /* 44416 */ GIR_Done,
15900 /* 44417 */ // Label 1406: @44417
15901 /* 44417 */ GIM_Reject,
15902 /* 44418 */ // Label 1404: @44418
15903 /* 44418 */ GIM_Try, /*On fail goto*//*Label 1407*/ GIMT_Encode4(44444), // Rule ID 605 //
15904 /* 44423 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
15905 /* 44427 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15906 /* 44431 */ // (fp_to_uint_sat:{ *:[i32] } F64:{ *:[f64] }:$src, i32:{ *:[Other] }) => (I32_TRUNC_U_SAT_F64:{ *:[i32] } F64:{ *:[f64] }:$src)
15907 /* 44431 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I32_TRUNC_U_SAT_F64),
15908 /* 44436 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15909 /* 44442 */ GIR_RootConstrainSelectedInstOperands,
15910 /* 44443 */ // GIR_Coverage, 605,
15911 /* 44443 */ GIR_Done,
15912 /* 44444 */ // Label 1407: @44444
15913 /* 44444 */ GIM_Reject,
15914 /* 44445 */ // Label 1405: @44445
15915 /* 44445 */ GIM_Reject,
15916 /* 44446 */ // Label 1399: @44446
15917 /* 44446 */ GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1410*/ GIMT_Encode4(44519),
15918 /* 44457 */ /*GILLT_f32*//*Label 1408*/ GIMT_Encode4(44465),
15919 /* 44461 */ /*GILLT_f64*//*Label 1409*/ GIMT_Encode4(44492),
15920 /* 44465 */ // Label 1408: @44465
15921 /* 44465 */ GIM_Try, /*On fail goto*//*Label 1411*/ GIMT_Encode4(44491), // Rule ID 607 //
15922 /* 44470 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
15923 /* 44474 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15924 /* 44478 */ // (fp_to_uint_sat:{ *:[i64] } F32:{ *:[f32] }:$src, i64:{ *:[Other] }) => (I64_TRUNC_U_SAT_F32:{ *:[i64] } F32:{ *:[f32] }:$src)
15925 /* 44478 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_SAT_F32),
15926 /* 44483 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15927 /* 44489 */ GIR_RootConstrainSelectedInstOperands,
15928 /* 44490 */ // GIR_Coverage, 607,
15929 /* 44490 */ GIR_Done,
15930 /* 44491 */ // Label 1411: @44491
15931 /* 44491 */ GIM_Reject,
15932 /* 44492 */ // Label 1409: @44492
15933 /* 44492 */ GIM_Try, /*On fail goto*//*Label 1412*/ GIMT_Encode4(44518), // Rule ID 609 //
15934 /* 44497 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
15935 /* 44501 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15936 /* 44505 */ // (fp_to_uint_sat:{ *:[i64] } F64:{ *:[f64] }:$src, i64:{ *:[Other] }) => (I64_TRUNC_U_SAT_F64:{ *:[i64] } F64:{ *:[f64] }:$src)
15937 /* 44505 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::I64_TRUNC_U_SAT_F64),
15938 /* 44510 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15939 /* 44516 */ GIR_RootConstrainSelectedInstOperands,
15940 /* 44517 */ // GIR_Coverage, 609,
15941 /* 44517 */ GIR_Done,
15942 /* 44518 */ // Label 1412: @44518
15943 /* 44518 */ GIM_Reject,
15944 /* 44519 */ // Label 1410: @44519
15945 /* 44519 */ GIM_Reject,
15946 /* 44520 */ // Label 1400: @44520
15947 /* 44520 */ GIM_Try, /*On fail goto*//*Label 1413*/ GIMT_Encode4(44549), // Rule ID 1189 //
15948 /* 44525 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
15949 /* 44528 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15950 /* 44532 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15951 /* 44536 */ // (fp_to_uint_sat:{ *:[v8i16] } V128:{ *:[v8f16] }:$src, i16:{ *:[Other] }) => (fp_to_uint_I16x8:{ *:[v8i16] } ?:{ *:[v8f16] }:$src)
15952 /* 44536 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_uint_I16x8),
15953 /* 44541 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15954 /* 44547 */ GIR_RootConstrainSelectedInstOperands,
15955 /* 44548 */ // GIR_Coverage, 1189,
15956 /* 44548 */ GIR_Done,
15957 /* 44549 */ // Label 1413: @44549
15958 /* 44549 */ GIM_Reject,
15959 /* 44550 */ // Label 1401: @44550
15960 /* 44550 */ GIM_Try, /*On fail goto*//*Label 1414*/ GIMT_Encode4(44579), // Rule ID 1187 //
15961 /* 44555 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
15962 /* 44558 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15963 /* 44562 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
15964 /* 44566 */ // (fp_to_uint_sat:{ *:[v4i32] } V128:{ *:[v4f32] }:$src, i32:{ *:[Other] }) => (fp_to_uint_I32x4:{ *:[v4i32] } ?:{ *:[v4f32] }:$src)
15965 /* 44566 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::fp_to_uint_I32x4),
15966 /* 44571 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15967 /* 44577 */ GIR_RootConstrainSelectedInstOperands,
15968 /* 44578 */ // GIR_Coverage, 1187,
15969 /* 44578 */ GIR_Done,
15970 /* 44579 */ // Label 1414: @44579
15971 /* 44579 */ GIM_Reject,
15972 /* 44580 */ // Label 1402: @44580
15973 /* 44580 */ GIM_Reject,
15974 /* 44581 */ // Label 58: @44581
15975 /* 44581 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1420*/ GIMT_Encode4(44808),
15976 /* 44592 */ /*GILLT_f32*//*Label 1415*/ GIMT_Encode4(44652),
15977 /* 44596 */ /*GILLT_f64*//*Label 1416*/ GIMT_Encode4(44682), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
15978 /* 44640 */ /*GILLT_v8f16*//*Label 1417*/ GIMT_Encode4(44712),
15979 /* 44644 */ /*GILLT_v4f32*//*Label 1418*/ GIMT_Encode4(44744),
15980 /* 44648 */ /*GILLT_v2f64*//*Label 1419*/ GIMT_Encode4(44776),
15981 /* 44652 */ // Label 1415: @44652
15982 /* 44652 */ GIM_Try, /*On fail goto*//*Label 1421*/ GIMT_Encode4(44681), // Rule ID 134 //
15983 /* 44657 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
15984 /* 44660 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15985 /* 44664 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
15986 /* 44668 */ // (fabs:{ *:[f32] } F32:{ *:[f32] }:$src) => (ABS_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
15987 /* 44668 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F32),
15988 /* 44673 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
15989 /* 44679 */ GIR_RootConstrainSelectedInstOperands,
15990 /* 44680 */ // GIR_Coverage, 134,
15991 /* 44680 */ GIR_Done,
15992 /* 44681 */ // Label 1421: @44681
15993 /* 44681 */ GIM_Reject,
15994 /* 44682 */ // Label 1416: @44682
15995 /* 44682 */ GIM_Try, /*On fail goto*//*Label 1422*/ GIMT_Encode4(44711), // Rule ID 135 //
15996 /* 44687 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
15997 /* 44690 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15998 /* 44694 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
15999 /* 44698 */ // (fabs:{ *:[f64] } F64:{ *:[f64] }:$src) => (ABS_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
16000 /* 44698 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F64),
16001 /* 44703 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16002 /* 44709 */ GIR_RootConstrainSelectedInstOperands,
16003 /* 44710 */ // GIR_Coverage, 135,
16004 /* 44710 */ GIR_Done,
16005 /* 44711 */ // Label 1422: @44711
16006 /* 44711 */ GIM_Reject,
16007 /* 44712 */ // Label 1417: @44712
16008 /* 44712 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1423*/ GIMT_Encode4(44743), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 326 //
16009 /* 44719 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
16010 /* 44722 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16011 /* 44726 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16012 /* 44730 */ // (fabs:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (ABS_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
16013 /* 44730 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F16x8),
16014 /* 44735 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16015 /* 44741 */ GIR_RootConstrainSelectedInstOperands,
16016 /* 44742 */ // GIR_Coverage, 326,
16017 /* 44742 */ GIR_Done,
16018 /* 44743 */ // Label 1423: @44743
16019 /* 44743 */ GIM_Reject,
16020 /* 44744 */ // Label 1418: @44744
16021 /* 44744 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1424*/ GIMT_Encode4(44775), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 324 //
16022 /* 44751 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
16023 /* 44754 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16024 /* 44758 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16025 /* 44762 */ // (fabs:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (ABS_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
16026 /* 44762 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F32x4),
16027 /* 44767 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16028 /* 44773 */ GIR_RootConstrainSelectedInstOperands,
16029 /* 44774 */ // GIR_Coverage, 324,
16030 /* 44774 */ GIR_Done,
16031 /* 44775 */ // Label 1424: @44775
16032 /* 44775 */ GIM_Reject,
16033 /* 44776 */ // Label 1419: @44776
16034 /* 44776 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1425*/ GIMT_Encode4(44807), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 325 //
16035 /* 44783 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
16036 /* 44786 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16037 /* 44790 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16038 /* 44794 */ // (fabs:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (ABS_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
16039 /* 44794 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_F64x2),
16040 /* 44799 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16041 /* 44805 */ GIR_RootConstrainSelectedInstOperands,
16042 /* 44806 */ // GIR_Coverage, 325,
16043 /* 44806 */ GIR_Done,
16044 /* 44807 */ // Label 1425: @44807
16045 /* 44807 */ GIM_Reject,
16046 /* 44808 */ // Label 1420: @44808
16047 /* 44808 */ GIM_Reject,
16048 /* 44809 */ // Label 59: @44809
16049 /* 44809 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1428*/ GIMT_Encode4(45056),
16050 /* 44820 */ /*GILLT_f32*//*Label 1426*/ GIMT_Encode4(44828),
16051 /* 44824 */ /*GILLT_f64*//*Label 1427*/ GIMT_Encode4(44942),
16052 /* 44828 */ // Label 1426: @44828
16053 /* 44828 */ GIM_Try, /*On fail goto*//*Label 1429*/ GIMT_Encode4(44941),
16054 /* 44833 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
16055 /* 44836 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1432*/ GIMT_Encode4(44940),
16056 /* 44847 */ /*GILLT_f32*//*Label 1430*/ GIMT_Encode4(44855),
16057 /* 44851 */ /*GILLT_f64*//*Label 1431*/ GIMT_Encode4(44886),
16058 /* 44855 */ // Label 1430: @44855
16059 /* 44855 */ GIM_Try, /*On fail goto*//*Label 1433*/ GIMT_Encode4(44885), // Rule ID 138 //
16060 /* 44860 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
16061 /* 44864 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
16062 /* 44868 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
16063 /* 44872 */ // (fcopysign:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (COPYSIGN_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
16064 /* 44872 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F32),
16065 /* 44877 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16066 /* 44883 */ GIR_RootConstrainSelectedInstOperands,
16067 /* 44884 */ // GIR_Coverage, 138,
16068 /* 44884 */ GIR_Done,
16069 /* 44885 */ // Label 1433: @44885
16070 /* 44885 */ GIM_Reject,
16071 /* 44886 */ // Label 1431: @44886
16072 /* 44886 */ GIM_Try, /*On fail goto*//*Label 1434*/ GIMT_Encode4(44939), // Rule ID 640 //
16073 /* 44891 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
16074 /* 44895 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
16075 /* 44899 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
16076 /* 44903 */ // (fcopysign:{ *:[f32] } F32:{ *:[f32] }:$lhs, F64:{ *:[f64] }:$rhs) => (COPYSIGN_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, (F32_DEMOTE_F64:{ *:[f32] } F64:{ *:[f64] }:$rhs))
16077 /* 44903 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_f32,
16078 /* 44906 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::F32_DEMOTE_F64),
16079 /* 44910 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
16080 /* 44915 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // rhs
16081 /* 44919 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16082 /* 44922 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
16083 /* 44924 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F32),
16084 /* 44927 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16085 /* 44929 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
16086 /* 44931 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
16087 /* 44934 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16088 /* 44937 */ GIR_RootConstrainSelectedInstOperands,
16089 /* 44938 */ // GIR_Coverage, 640,
16090 /* 44938 */ GIR_EraseRootFromParent_Done,
16091 /* 44939 */ // Label 1434: @44939
16092 /* 44939 */ GIM_Reject,
16093 /* 44940 */ // Label 1432: @44940
16094 /* 44940 */ GIM_Reject,
16095 /* 44941 */ // Label 1429: @44941
16096 /* 44941 */ GIM_Reject,
16097 /* 44942 */ // Label 1427: @44942
16098 /* 44942 */ GIM_Try, /*On fail goto*//*Label 1435*/ GIMT_Encode4(45055),
16099 /* 44947 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
16100 /* 44950 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(4), GIMT_Encode2(6), /*)*//*default:*//*Label 1438*/ GIMT_Encode4(45054),
16101 /* 44961 */ /*GILLT_f32*//*Label 1436*/ GIMT_Encode4(44969),
16102 /* 44965 */ /*GILLT_f64*//*Label 1437*/ GIMT_Encode4(45023),
16103 /* 44969 */ // Label 1436: @44969
16104 /* 44969 */ GIM_Try, /*On fail goto*//*Label 1439*/ GIMT_Encode4(45022), // Rule ID 639 //
16105 /* 44974 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
16106 /* 44978 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
16107 /* 44982 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
16108 /* 44986 */ // (fcopysign:{ *:[f64] } F64:{ *:[f64] }:$lhs, F32:{ *:[f32] }:$rhs) => (COPYSIGN_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, (F64_PROMOTE_F32:{ *:[f64] } F32:{ *:[f32] }:$rhs))
16109 /* 44986 */ GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_f64,
16110 /* 44989 */ GIR_BuildMI, /*InsnID*/1, /*Opcode*/GIMT_Encode2(WebAssembly::F64_PROMOTE_F32),
16111 /* 44993 */ GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/GIMT_Encode2(static_cast<uint16_t>(RegState::Define)),
16112 /* 44998 */ GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // rhs
16113 /* 45002 */ GIR_SetImplicitDefDead, /*InsnID*/1, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16114 /* 45005 */ GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
16115 /* 45007 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F64),
16116 /* 45010 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16117 /* 45012 */ GIR_RootToRootCopy, /*OpIdx*/1, // lhs
16118 /* 45014 */ GIR_AddSimpleTempRegister, /*InsnID*/0, /*TempRegID*/0,
16119 /* 45017 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16120 /* 45020 */ GIR_RootConstrainSelectedInstOperands,
16121 /* 45021 */ // GIR_Coverage, 639,
16122 /* 45021 */ GIR_EraseRootFromParent_Done,
16123 /* 45022 */ // Label 1439: @45022
16124 /* 45022 */ GIM_Reject,
16125 /* 45023 */ // Label 1437: @45023
16126 /* 45023 */ GIM_Try, /*On fail goto*//*Label 1440*/ GIMT_Encode4(45053), // Rule ID 139 //
16127 /* 45028 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
16128 /* 45032 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
16129 /* 45036 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
16130 /* 45040 */ // (fcopysign:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (COPYSIGN_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
16131 /* 45040 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::COPYSIGN_F64),
16132 /* 45045 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16133 /* 45051 */ GIR_RootConstrainSelectedInstOperands,
16134 /* 45052 */ // GIR_Coverage, 139,
16135 /* 45052 */ GIR_Done,
16136 /* 45053 */ // Label 1440: @45053
16137 /* 45053 */ GIM_Reject,
16138 /* 45054 */ // Label 1438: @45054
16139 /* 45054 */ GIM_Reject,
16140 /* 45055 */ // Label 1435: @45055
16141 /* 45055 */ GIM_Reject,
16142 /* 45056 */ // Label 1428: @45056
16143 /* 45056 */ GIM_Reject,
16144 /* 45057 */ // Label 60: @45057
16145 /* 45057 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1446*/ GIMT_Encode4(45319),
16146 /* 45068 */ /*GILLT_f32*//*Label 1441*/ GIMT_Encode4(45128),
16147 /* 45072 */ /*GILLT_f64*//*Label 1442*/ GIMT_Encode4(45165), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
16148 /* 45116 */ /*GILLT_v8f16*//*Label 1443*/ GIMT_Encode4(45202),
16149 /* 45120 */ /*GILLT_v4f32*//*Label 1444*/ GIMT_Encode4(45241),
16150 /* 45124 */ /*GILLT_v2f64*//*Label 1445*/ GIMT_Encode4(45280),
16151 /* 45128 */ // Label 1441: @45128
16152 /* 45128 */ GIM_Try, /*On fail goto*//*Label 1447*/ GIMT_Encode4(45164), // Rule ID 140 //
16153 /* 45133 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
16154 /* 45136 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
16155 /* 45139 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
16156 /* 45143 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
16157 /* 45147 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
16158 /* 45151 */ // (fminimum:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (MIN_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
16159 /* 45151 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F32),
16160 /* 45156 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16161 /* 45162 */ GIR_RootConstrainSelectedInstOperands,
16162 /* 45163 */ // GIR_Coverage, 140,
16163 /* 45163 */ GIR_Done,
16164 /* 45164 */ // Label 1447: @45164
16165 /* 45164 */ GIM_Reject,
16166 /* 45165 */ // Label 1442: @45165
16167 /* 45165 */ GIM_Try, /*On fail goto*//*Label 1448*/ GIMT_Encode4(45201), // Rule ID 141 //
16168 /* 45170 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
16169 /* 45173 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
16170 /* 45176 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
16171 /* 45180 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
16172 /* 45184 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
16173 /* 45188 */ // (fminimum:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (MIN_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
16174 /* 45188 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F64),
16175 /* 45193 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16176 /* 45199 */ GIR_RootConstrainSelectedInstOperands,
16177 /* 45200 */ // GIR_Coverage, 141,
16178 /* 45200 */ GIR_Done,
16179 /* 45201 */ // Label 1448: @45201
16180 /* 45201 */ GIM_Reject,
16181 /* 45202 */ // Label 1443: @45202
16182 /* 45202 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1449*/ GIMT_Encode4(45240), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 359 //
16183 /* 45209 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
16184 /* 45212 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
16185 /* 45215 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16186 /* 45219 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16187 /* 45223 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16188 /* 45227 */ // (fminimum:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (MIN_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
16189 /* 45227 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F16x8),
16190 /* 45232 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16191 /* 45238 */ GIR_RootConstrainSelectedInstOperands,
16192 /* 45239 */ // GIR_Coverage, 359,
16193 /* 45239 */ GIR_Done,
16194 /* 45240 */ // Label 1449: @45240
16195 /* 45240 */ GIM_Reject,
16196 /* 45241 */ // Label 1444: @45241
16197 /* 45241 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1450*/ GIMT_Encode4(45279), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 357 //
16198 /* 45248 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
16199 /* 45251 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
16200 /* 45254 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16201 /* 45258 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16202 /* 45262 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16203 /* 45266 */ // (fminimum:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (MIN_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
16204 /* 45266 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F32x4),
16205 /* 45271 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16206 /* 45277 */ GIR_RootConstrainSelectedInstOperands,
16207 /* 45278 */ // GIR_Coverage, 357,
16208 /* 45278 */ GIR_Done,
16209 /* 45279 */ // Label 1450: @45279
16210 /* 45279 */ GIM_Reject,
16211 /* 45280 */ // Label 1445: @45280
16212 /* 45280 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1451*/ GIMT_Encode4(45318), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 358 //
16213 /* 45287 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
16214 /* 45290 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
16215 /* 45293 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16216 /* 45297 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16217 /* 45301 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16218 /* 45305 */ // (fminimum:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (MIN_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
16219 /* 45305 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_F64x2),
16220 /* 45310 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16221 /* 45316 */ GIR_RootConstrainSelectedInstOperands,
16222 /* 45317 */ // GIR_Coverage, 358,
16223 /* 45317 */ GIR_Done,
16224 /* 45318 */ // Label 1451: @45318
16225 /* 45318 */ GIM_Reject,
16226 /* 45319 */ // Label 1446: @45319
16227 /* 45319 */ GIM_Reject,
16228 /* 45320 */ // Label 61: @45320
16229 /* 45320 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1457*/ GIMT_Encode4(45582),
16230 /* 45331 */ /*GILLT_f32*//*Label 1452*/ GIMT_Encode4(45391),
16231 /* 45335 */ /*GILLT_f64*//*Label 1453*/ GIMT_Encode4(45428), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
16232 /* 45379 */ /*GILLT_v8f16*//*Label 1454*/ GIMT_Encode4(45465),
16233 /* 45383 */ /*GILLT_v4f32*//*Label 1455*/ GIMT_Encode4(45504),
16234 /* 45387 */ /*GILLT_v2f64*//*Label 1456*/ GIMT_Encode4(45543),
16235 /* 45391 */ // Label 1452: @45391
16236 /* 45391 */ GIM_Try, /*On fail goto*//*Label 1458*/ GIMT_Encode4(45427), // Rule ID 142 //
16237 /* 45396 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
16238 /* 45399 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f32,
16239 /* 45402 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
16240 /* 45406 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
16241 /* 45410 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
16242 /* 45414 */ // (fmaximum:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs) => (MAX_F32:{ *:[f32] } F32:{ *:[f32] }:$lhs, F32:{ *:[f32] }:$rhs)
16243 /* 45414 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F32),
16244 /* 45419 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16245 /* 45425 */ GIR_RootConstrainSelectedInstOperands,
16246 /* 45426 */ // GIR_Coverage, 142,
16247 /* 45426 */ GIR_Done,
16248 /* 45427 */ // Label 1458: @45427
16249 /* 45427 */ GIM_Reject,
16250 /* 45428 */ // Label 1453: @45428
16251 /* 45428 */ GIM_Try, /*On fail goto*//*Label 1459*/ GIMT_Encode4(45464), // Rule ID 143 //
16252 /* 45433 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
16253 /* 45436 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_f64,
16254 /* 45439 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
16255 /* 45443 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
16256 /* 45447 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
16257 /* 45451 */ // (fmaximum:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs) => (MAX_F64:{ *:[f64] } F64:{ *:[f64] }:$lhs, F64:{ *:[f64] }:$rhs)
16258 /* 45451 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F64),
16259 /* 45456 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16260 /* 45462 */ GIR_RootConstrainSelectedInstOperands,
16261 /* 45463 */ // GIR_Coverage, 143,
16262 /* 45463 */ GIR_Done,
16263 /* 45464 */ // Label 1459: @45464
16264 /* 45464 */ GIM_Reject,
16265 /* 45465 */ // Label 1454: @45465
16266 /* 45465 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1460*/ GIMT_Encode4(45503), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 362 //
16267 /* 45472 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
16268 /* 45475 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8f16,
16269 /* 45478 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16270 /* 45482 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16271 /* 45486 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16272 /* 45490 */ // (fmaximum:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs) => (MAX_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$lhs, V128:{ *:[v8f16] }:$rhs)
16273 /* 45490 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F16x8),
16274 /* 45495 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16275 /* 45501 */ GIR_RootConstrainSelectedInstOperands,
16276 /* 45502 */ // GIR_Coverage, 362,
16277 /* 45502 */ GIR_Done,
16278 /* 45503 */ // Label 1460: @45503
16279 /* 45503 */ GIM_Reject,
16280 /* 45504 */ // Label 1455: @45504
16281 /* 45504 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1461*/ GIMT_Encode4(45542), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 360 //
16282 /* 45511 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
16283 /* 45514 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4f32,
16284 /* 45517 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16285 /* 45521 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16286 /* 45525 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16287 /* 45529 */ // (fmaximum:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs) => (MAX_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$lhs, V128:{ *:[v4f32] }:$rhs)
16288 /* 45529 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F32x4),
16289 /* 45534 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16290 /* 45540 */ GIR_RootConstrainSelectedInstOperands,
16291 /* 45541 */ // GIR_Coverage, 360,
16292 /* 45541 */ GIR_Done,
16293 /* 45542 */ // Label 1461: @45542
16294 /* 45542 */ GIM_Reject,
16295 /* 45543 */ // Label 1456: @45543
16296 /* 45543 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1462*/ GIMT_Encode4(45581), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 361 //
16297 /* 45550 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
16298 /* 45553 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v2f64,
16299 /* 45556 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16300 /* 45560 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16301 /* 45564 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16302 /* 45568 */ // (fmaximum:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs) => (MAX_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$lhs, V128:{ *:[v2f64] }:$rhs)
16303 /* 45568 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_F64x2),
16304 /* 45573 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16305 /* 45579 */ GIR_RootConstrainSelectedInstOperands,
16306 /* 45580 */ // GIR_Coverage, 361,
16307 /* 45580 */ GIR_Done,
16308 /* 45581 */ // Label 1462: @45581
16309 /* 45581 */ GIM_Reject,
16310 /* 45582 */ // Label 1457: @45582
16311 /* 45582 */ GIM_Reject,
16312 /* 45583 */ // Label 62: @45583
16313 /* 45583 */ GIM_SwitchType, /*MI*/0, /*Op*/2, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1465*/ GIMT_Encode4(45668),
16314 /* 45594 */ /*GILLT_i32*//*Label 1463*/ GIMT_Encode4(45602),
16315 /* 45598 */ /*GILLT_i64*//*Label 1464*/ GIMT_Encode4(45635),
16316 /* 45602 */ // Label 1463: @45602
16317 /* 45602 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1466*/ GIMT_Encode4(45634), GIMT_Encode2(GIFBS_HasAddr32_HwMode0), // Rule ID 1304 //
16318 /* 45609 */ // MIs[0] DstI[dst]
16319 /* 45609 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/0, /*SizeInBits*/32,
16320 /* 45613 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
16321 /* 45617 */ // MIs[0] lhs
16322 /* 45617 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
16323 /* 45621 */ // (ptradd:{ *:[i32] } p0:{ *:[i32] }:$lhs, p0i:{ *:[i32] }:$rhs) => (ADD_I32:{ *:[i32] } I32:{ *:[i32] }:$lhs, I32:{ *:[i32] }:$rhs)
16324 /* 45621 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I32),
16325 /* 45626 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16326 /* 45632 */ GIR_RootConstrainSelectedInstOperands,
16327 /* 45633 */ // GIR_Coverage, 1304,
16328 /* 45633 */ GIR_Done,
16329 /* 45634 */ // Label 1466: @45634
16330 /* 45634 */ GIM_Reject,
16331 /* 45635 */ // Label 1464: @45635
16332 /* 45635 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1467*/ GIMT_Encode4(45667), GIMT_Encode2(GIFBS_HasAddr64_HwMode1), // Rule ID 1305 //
16333 /* 45642 */ // MIs[0] DstI[dst]
16334 /* 45642 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/0, /*SizeInBits*/64,
16335 /* 45646 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
16336 /* 45650 */ // MIs[0] lhs
16337 /* 45650 */ GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
16338 /* 45654 */ // (ptradd:{ *:[i64] } p0:{ *:[i64] }:$lhs, p0i:{ *:[i64] }:$rhs) => (ADD_I64:{ *:[i64] } I64:{ *:[i64] }:$lhs, I64:{ *:[i64] }:$rhs)
16339 /* 45654 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ADD_I64),
16340 /* 45659 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16341 /* 45665 */ GIR_RootConstrainSelectedInstOperands,
16342 /* 45666 */ // GIR_Coverage, 1305,
16343 /* 45666 */ GIR_Done,
16344 /* 45667 */ // Label 1467: @45667
16345 /* 45667 */ GIM_Reject,
16346 /* 45668 */ // Label 1465: @45668
16347 /* 45668 */ GIM_Reject,
16348 /* 45669 */ // Label 63: @45669
16349 /* 45669 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(15), /*)*//*default:*//*Label 1471*/ GIMT_Encode4(45809),
16350 /* 45680 */ /*GILLT_v16i8*//*Label 1468*/ GIMT_Encode4(45692),
16351 /* 45684 */ /*GILLT_v8i16*//*Label 1469*/ GIMT_Encode4(45731),
16352 /* 45688 */ /*GILLT_v4i32*//*Label 1470*/ GIMT_Encode4(45770),
16353 /* 45692 */ // Label 1468: @45692
16354 /* 45692 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1472*/ GIMT_Encode4(45730), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 297 //
16355 /* 45699 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
16356 /* 45702 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
16357 /* 45705 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16358 /* 45709 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16359 /* 45713 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16360 /* 45717 */ // (smin:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MIN_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
16361 /* 45717 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_S_I8x16),
16362 /* 45722 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16363 /* 45728 */ GIR_RootConstrainSelectedInstOperands,
16364 /* 45729 */ // GIR_Coverage, 297,
16365 /* 45729 */ GIR_Done,
16366 /* 45730 */ // Label 1472: @45730
16367 /* 45730 */ GIM_Reject,
16368 /* 45731 */ // Label 1469: @45731
16369 /* 45731 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1473*/ GIMT_Encode4(45769), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 298 //
16370 /* 45738 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
16371 /* 45741 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
16372 /* 45744 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16373 /* 45748 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16374 /* 45752 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16375 /* 45756 */ // (smin:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MIN_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
16376 /* 45756 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_S_I16x8),
16377 /* 45761 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16378 /* 45767 */ GIR_RootConstrainSelectedInstOperands,
16379 /* 45768 */ // GIR_Coverage, 298,
16380 /* 45768 */ GIR_Done,
16381 /* 45769 */ // Label 1473: @45769
16382 /* 45769 */ GIM_Reject,
16383 /* 45770 */ // Label 1470: @45770
16384 /* 45770 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1474*/ GIMT_Encode4(45808), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 299 //
16385 /* 45777 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
16386 /* 45780 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
16387 /* 45783 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16388 /* 45787 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16389 /* 45791 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16390 /* 45795 */ // (smin:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MIN_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
16391 /* 45795 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_S_I32x4),
16392 /* 45800 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16393 /* 45806 */ GIR_RootConstrainSelectedInstOperands,
16394 /* 45807 */ // GIR_Coverage, 299,
16395 /* 45807 */ GIR_Done,
16396 /* 45808 */ // Label 1474: @45808
16397 /* 45808 */ GIM_Reject,
16398 /* 45809 */ // Label 1471: @45809
16399 /* 45809 */ GIM_Reject,
16400 /* 45810 */ // Label 64: @45810
16401 /* 45810 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(15), /*)*//*default:*//*Label 1478*/ GIMT_Encode4(45950),
16402 /* 45821 */ /*GILLT_v16i8*//*Label 1475*/ GIMT_Encode4(45833),
16403 /* 45825 */ /*GILLT_v8i16*//*Label 1476*/ GIMT_Encode4(45872),
16404 /* 45829 */ /*GILLT_v4i32*//*Label 1477*/ GIMT_Encode4(45911),
16405 /* 45833 */ // Label 1475: @45833
16406 /* 45833 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1479*/ GIMT_Encode4(45871), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 303 //
16407 /* 45840 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
16408 /* 45843 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
16409 /* 45846 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16410 /* 45850 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16411 /* 45854 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16412 /* 45858 */ // (smax:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MAX_S_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
16413 /* 45858 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_S_I8x16),
16414 /* 45863 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16415 /* 45869 */ GIR_RootConstrainSelectedInstOperands,
16416 /* 45870 */ // GIR_Coverage, 303,
16417 /* 45870 */ GIR_Done,
16418 /* 45871 */ // Label 1479: @45871
16419 /* 45871 */ GIM_Reject,
16420 /* 45872 */ // Label 1476: @45872
16421 /* 45872 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1480*/ GIMT_Encode4(45910), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 304 //
16422 /* 45879 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
16423 /* 45882 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
16424 /* 45885 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16425 /* 45889 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16426 /* 45893 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16427 /* 45897 */ // (smax:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MAX_S_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
16428 /* 45897 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_S_I16x8),
16429 /* 45902 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16430 /* 45908 */ GIR_RootConstrainSelectedInstOperands,
16431 /* 45909 */ // GIR_Coverage, 304,
16432 /* 45909 */ GIR_Done,
16433 /* 45910 */ // Label 1480: @45910
16434 /* 45910 */ GIM_Reject,
16435 /* 45911 */ // Label 1477: @45911
16436 /* 45911 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1481*/ GIMT_Encode4(45949), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 305 //
16437 /* 45918 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
16438 /* 45921 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
16439 /* 45924 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16440 /* 45928 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16441 /* 45932 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16442 /* 45936 */ // (smax:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MAX_S_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
16443 /* 45936 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_S_I32x4),
16444 /* 45941 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16445 /* 45947 */ GIR_RootConstrainSelectedInstOperands,
16446 /* 45948 */ // GIR_Coverage, 305,
16447 /* 45948 */ GIR_Done,
16448 /* 45949 */ // Label 1481: @45949
16449 /* 45949 */ GIM_Reject,
16450 /* 45950 */ // Label 1478: @45950
16451 /* 45950 */ GIM_Reject,
16452 /* 45951 */ // Label 65: @45951
16453 /* 45951 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(15), /*)*//*default:*//*Label 1485*/ GIMT_Encode4(46091),
16454 /* 45962 */ /*GILLT_v16i8*//*Label 1482*/ GIMT_Encode4(45974),
16455 /* 45966 */ /*GILLT_v8i16*//*Label 1483*/ GIMT_Encode4(46013),
16456 /* 45970 */ /*GILLT_v4i32*//*Label 1484*/ GIMT_Encode4(46052),
16457 /* 45974 */ // Label 1482: @45974
16458 /* 45974 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1486*/ GIMT_Encode4(46012), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 300 //
16459 /* 45981 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
16460 /* 45984 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
16461 /* 45987 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16462 /* 45991 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16463 /* 45995 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16464 /* 45999 */ // (umin:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MIN_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
16465 /* 45999 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_U_I8x16),
16466 /* 46004 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16467 /* 46010 */ GIR_RootConstrainSelectedInstOperands,
16468 /* 46011 */ // GIR_Coverage, 300,
16469 /* 46011 */ GIR_Done,
16470 /* 46012 */ // Label 1486: @46012
16471 /* 46012 */ GIM_Reject,
16472 /* 46013 */ // Label 1483: @46013
16473 /* 46013 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1487*/ GIMT_Encode4(46051), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 301 //
16474 /* 46020 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
16475 /* 46023 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
16476 /* 46026 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16477 /* 46030 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16478 /* 46034 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16479 /* 46038 */ // (umin:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MIN_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
16480 /* 46038 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_U_I16x8),
16481 /* 46043 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16482 /* 46049 */ GIR_RootConstrainSelectedInstOperands,
16483 /* 46050 */ // GIR_Coverage, 301,
16484 /* 46050 */ GIR_Done,
16485 /* 46051 */ // Label 1487: @46051
16486 /* 46051 */ GIM_Reject,
16487 /* 46052 */ // Label 1484: @46052
16488 /* 46052 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1488*/ GIMT_Encode4(46090), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 302 //
16489 /* 46059 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
16490 /* 46062 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
16491 /* 46065 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16492 /* 46069 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16493 /* 46073 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16494 /* 46077 */ // (umin:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MIN_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
16495 /* 46077 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MIN_U_I32x4),
16496 /* 46082 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16497 /* 46088 */ GIR_RootConstrainSelectedInstOperands,
16498 /* 46089 */ // GIR_Coverage, 302,
16499 /* 46089 */ GIR_Done,
16500 /* 46090 */ // Label 1488: @46090
16501 /* 46090 */ GIM_Reject,
16502 /* 46091 */ // Label 1485: @46091
16503 /* 46091 */ GIM_Reject,
16504 /* 46092 */ // Label 66: @46092
16505 /* 46092 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(15), /*)*//*default:*//*Label 1492*/ GIMT_Encode4(46232),
16506 /* 46103 */ /*GILLT_v16i8*//*Label 1489*/ GIMT_Encode4(46115),
16507 /* 46107 */ /*GILLT_v8i16*//*Label 1490*/ GIMT_Encode4(46154),
16508 /* 46111 */ /*GILLT_v4i32*//*Label 1491*/ GIMT_Encode4(46193),
16509 /* 46115 */ // Label 1489: @46115
16510 /* 46115 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1493*/ GIMT_Encode4(46153), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 306 //
16511 /* 46122 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
16512 /* 46125 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v16i8,
16513 /* 46128 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16514 /* 46132 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16515 /* 46136 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16516 /* 46140 */ // (umax:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs) => (MAX_U_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$lhs, V128:{ *:[v16i8] }:$rhs)
16517 /* 46140 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_U_I8x16),
16518 /* 46145 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16519 /* 46151 */ GIR_RootConstrainSelectedInstOperands,
16520 /* 46152 */ // GIR_Coverage, 306,
16521 /* 46152 */ GIR_Done,
16522 /* 46153 */ // Label 1493: @46153
16523 /* 46153 */ GIM_Reject,
16524 /* 46154 */ // Label 1490: @46154
16525 /* 46154 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1494*/ GIMT_Encode4(46192), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 307 //
16526 /* 46161 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
16527 /* 46164 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v8i16,
16528 /* 46167 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16529 /* 46171 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16530 /* 46175 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16531 /* 46179 */ // (umax:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs) => (MAX_U_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$lhs, V128:{ *:[v8i16] }:$rhs)
16532 /* 46179 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_U_I16x8),
16533 /* 46184 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16534 /* 46190 */ GIR_RootConstrainSelectedInstOperands,
16535 /* 46191 */ // GIR_Coverage, 307,
16536 /* 46191 */ GIR_Done,
16537 /* 46192 */ // Label 1494: @46192
16538 /* 46192 */ GIM_Reject,
16539 /* 46193 */ // Label 1491: @46193
16540 /* 46193 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1495*/ GIMT_Encode4(46231), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 308 //
16541 /* 46200 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
16542 /* 46203 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_v4i32,
16543 /* 46206 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16544 /* 46210 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16545 /* 46214 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16546 /* 46218 */ // (umax:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs) => (MAX_U_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$lhs, V128:{ *:[v4i32] }:$rhs)
16547 /* 46218 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::MAX_U_I32x4),
16548 /* 46223 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16549 /* 46229 */ GIR_RootConstrainSelectedInstOperands,
16550 /* 46230 */ // GIR_Coverage, 308,
16551 /* 46230 */ GIR_Done,
16552 /* 46231 */ // Label 1495: @46231
16553 /* 46231 */ GIM_Reject,
16554 /* 46232 */ // Label 1492: @46232
16555 /* 46232 */ GIM_Reject,
16556 /* 46233 */ // Label 67: @46233
16557 /* 46233 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(12), GIMT_Encode2(16), /*)*//*default:*//*Label 1500*/ GIMT_Encode4(46388),
16558 /* 46244 */ /*GILLT_v16i8*//*Label 1496*/ GIMT_Encode4(46260),
16559 /* 46248 */ /*GILLT_v8i16*//*Label 1497*/ GIMT_Encode4(46292),
16560 /* 46252 */ /*GILLT_v4i32*//*Label 1498*/ GIMT_Encode4(46324),
16561 /* 46256 */ /*GILLT_v2i64*//*Label 1499*/ GIMT_Encode4(46356),
16562 /* 46260 */ // Label 1496: @46260
16563 /* 46260 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1501*/ GIMT_Encode4(46291), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 249 //
16564 /* 46267 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
16565 /* 46270 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16566 /* 46274 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16567 /* 46278 */ // (abs:{ *:[v16i8] } V128:{ *:[v16i8] }:$v) => (ABS_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$v)
16568 /* 46278 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I8x16),
16569 /* 46283 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16570 /* 46289 */ GIR_RootConstrainSelectedInstOperands,
16571 /* 46290 */ // GIR_Coverage, 249,
16572 /* 46290 */ GIR_Done,
16573 /* 46291 */ // Label 1501: @46291
16574 /* 46291 */ GIM_Reject,
16575 /* 46292 */ // Label 1497: @46292
16576 /* 46292 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1502*/ GIMT_Encode4(46323), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 250 //
16577 /* 46299 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8i16,
16578 /* 46302 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16579 /* 46306 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16580 /* 46310 */ // (abs:{ *:[v8i16] } V128:{ *:[v8i16] }:$v) => (ABS_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$v)
16581 /* 46310 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I16x8),
16582 /* 46315 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16583 /* 46321 */ GIR_RootConstrainSelectedInstOperands,
16584 /* 46322 */ // GIR_Coverage, 250,
16585 /* 46322 */ GIR_Done,
16586 /* 46323 */ // Label 1502: @46323
16587 /* 46323 */ GIM_Reject,
16588 /* 46324 */ // Label 1498: @46324
16589 /* 46324 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1503*/ GIMT_Encode4(46355), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 251 //
16590 /* 46331 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4i32,
16591 /* 46334 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16592 /* 46338 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16593 /* 46342 */ // (abs:{ *:[v4i32] } V128:{ *:[v4i32] }:$v) => (ABS_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$v)
16594 /* 46342 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I32x4),
16595 /* 46347 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16596 /* 46353 */ GIR_RootConstrainSelectedInstOperands,
16597 /* 46354 */ // GIR_Coverage, 251,
16598 /* 46354 */ GIR_Done,
16599 /* 46355 */ // Label 1503: @46355
16600 /* 46355 */ GIM_Reject,
16601 /* 46356 */ // Label 1499: @46356
16602 /* 46356 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1504*/ GIMT_Encode4(46387), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 252 //
16603 /* 46363 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2i64,
16604 /* 46366 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16605 /* 46370 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16606 /* 46374 */ // (abs:{ *:[v2i64] } V128:{ *:[v2i64] }:$v) => (ABS_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$v)
16607 /* 46374 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::ABS_I64x2),
16608 /* 46379 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16609 /* 46385 */ GIR_RootConstrainSelectedInstOperands,
16610 /* 46386 */ // GIR_Coverage, 252,
16611 /* 46386 */ GIR_Done,
16612 /* 46387 */ // Label 1504: @46387
16613 /* 46387 */ GIM_Reject,
16614 /* 46388 */ // Label 1500: @46388
16615 /* 46388 */ GIM_Reject,
16616 /* 46389 */ // Label 68: @46389
16617 /* 46389 */ GIM_Try, /*On fail goto*//*Label 1505*/ GIMT_Encode4(46410), // Rule ID 18 //
16618 /* 46394 */ // MIs[0] dst
16619 /* 46394 */ GIM_CheckIsMBB, /*MI*/0, /*Op*/0,
16620 /* 46397 */ // (br (bb:{ *:[Other] }):$dst) => (BR (bb:{ *:[Other] }):$dst)
16621 /* 46397 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::BR),
16622 /* 46402 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
16623 /* 46408 */ GIR_RootConstrainSelectedInstOperands,
16624 /* 46409 */ // GIR_Coverage, 18,
16625 /* 46409 */ GIR_Done,
16626 /* 46410 */ // Label 1505: @46410
16627 /* 46410 */ GIM_Reject,
16628 /* 46411 */ // Label 69: @46411
16629 /* 46411 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(8), GIMT_Encode2(12), /*)*//*default:*//*Label 1510*/ GIMT_Encode4(48434),
16630 /* 46422 */ /*GILLT_v16s8*//*Label 1506*/ GIMT_Encode4(46438),
16631 /* 46426 */ /*GILLT_v8s16*//*Label 1507*/ GIMT_Encode4(46680),
16632 /* 46430 */ /*GILLT_v4s32*//*Label 1508*/ GIMT_Encode4(46922),
16633 /* 46434 */ /*GILLT_v2s64*//*Label 1509*/ GIMT_Encode4(47678),
16634 /* 46438 */ // Label 1506: @46438
16635 /* 46438 */ GIM_Try, /*On fail goto*//*Label 1511*/ GIMT_Encode4(46679),
16636 /* 46443 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16s8,
16637 /* 46446 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
16638 /* 46449 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
16639 /* 46452 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16640 /* 46456 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16641 /* 46460 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1512*/ GIMT_Encode4(46548), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 923 //
16642 /* 46467 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16643 /* 46471 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16644 /* 46475 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16645 /* 46478 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16646 /* 46482 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(1),
16647 /* 46489 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16648 /* 46493 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16649 /* 46497 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16650 /* 46501 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx16),
16651 /* 46505 */ // MIs[2] Operand 1
16652 /* 46505 */ // No operand predicates
16653 /* 46505 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16654 /* 46507 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16655 /* 46514 */ // (vector_insert:{ *:[v16i8] } V128:{ *:[v16i8] }:$vec, (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx16>>:$idx) => (LOAD_LANE_8_A32:{ *:[v16i8] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v16i8] }:$vec)
16656 /* 46514 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_8_A32),
16657 /* 46517 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16658 /* 46519 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16659 /* 46522 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16660 /* 46527 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16661 /* 46530 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16662 /* 46535 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16663 /* 46537 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16664 /* 46540 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16665 /* 46546 */ GIR_RootConstrainSelectedInstOperands,
16666 /* 46547 */ // GIR_Coverage, 923,
16667 /* 46547 */ GIR_EraseRootFromParent_Done,
16668 /* 46548 */ // Label 1512: @46548
16669 /* 46548 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1513*/ GIMT_Encode4(46636), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 924 //
16670 /* 46555 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16671 /* 46559 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16672 /* 46563 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16673 /* 46566 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16674 /* 46570 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(1),
16675 /* 46577 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16676 /* 46581 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16677 /* 46585 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16678 /* 46589 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx16),
16679 /* 46593 */ // MIs[2] Operand 1
16680 /* 46593 */ // No operand predicates
16681 /* 46593 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16682 /* 46595 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16683 /* 46602 */ // (vector_insert:{ *:[v16i8] } V128:{ *:[v16i8] }:$vec, (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx16>>:$idx) => (LOAD_LANE_8_A64:{ *:[v16i8] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v16i8] }:$vec)
16684 /* 46602 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_8_A64),
16685 /* 46605 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16686 /* 46607 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16687 /* 46610 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16688 /* 46615 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16689 /* 46618 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16690 /* 46623 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16691 /* 46625 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16692 /* 46628 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16693 /* 46634 */ GIR_RootConstrainSelectedInstOperands,
16694 /* 46635 */ // GIR_Coverage, 924,
16695 /* 46635 */ GIR_EraseRootFromParent_Done,
16696 /* 46636 */ // Label 1513: @46636
16697 /* 46636 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1514*/ GIMT_Encode4(46678), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 188 //
16698 /* 46643 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
16699 /* 46647 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
16700 /* 46651 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16701 /* 46655 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx16),
16702 /* 46659 */ // MIs[1] Operand 1
16703 /* 46659 */ // No operand predicates
16704 /* 46659 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16705 /* 46661 */ // (vector_insert:{ *:[v16i8] } V128:{ *:[v16i8] }:$vec, I32:{ *:[i32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx16>>:$idx) => (REPLACE_LANE_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$vec, (imm:{ *:[i32] }):$idx, I32:{ *:[i32] }:$x)
16706 /* 46661 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I8x16),
16707 /* 46664 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16708 /* 46666 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16709 /* 46668 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
16710 /* 46671 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
16711 /* 46673 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16712 /* 46676 */ GIR_RootConstrainSelectedInstOperands,
16713 /* 46677 */ // GIR_Coverage, 188,
16714 /* 46677 */ GIR_EraseRootFromParent_Done,
16715 /* 46678 */ // Label 1514: @46678
16716 /* 46678 */ GIM_Reject,
16717 /* 46679 */ // Label 1511: @46679
16718 /* 46679 */ GIM_Reject,
16719 /* 46680 */ // Label 1507: @46680
16720 /* 46680 */ GIM_Try, /*On fail goto*//*Label 1515*/ GIMT_Encode4(46921),
16721 /* 46685 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8s16,
16722 /* 46688 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
16723 /* 46691 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
16724 /* 46694 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16725 /* 46698 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16726 /* 46702 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1516*/ GIMT_Encode4(46790), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 925 //
16727 /* 46709 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16728 /* 46713 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16729 /* 46717 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16730 /* 46720 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16731 /* 46724 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(2),
16732 /* 46731 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16733 /* 46735 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16734 /* 46739 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16735 /* 46743 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
16736 /* 46747 */ // MIs[2] Operand 1
16737 /* 46747 */ // No operand predicates
16738 /* 46747 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16739 /* 46749 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16740 /* 46756 */ // (vector_insert:{ *:[v8i16] } V128:{ *:[v8i16] }:$vec, (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx) => (LOAD_LANE_16_A32:{ *:[v8i16] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v8i16] }:$vec)
16741 /* 46756 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_16_A32),
16742 /* 46759 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16743 /* 46761 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16744 /* 46764 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16745 /* 46769 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16746 /* 46772 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16747 /* 46777 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16748 /* 46779 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16749 /* 46782 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16750 /* 46788 */ GIR_RootConstrainSelectedInstOperands,
16751 /* 46789 */ // GIR_Coverage, 925,
16752 /* 46789 */ GIR_EraseRootFromParent_Done,
16753 /* 46790 */ // Label 1516: @46790
16754 /* 46790 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1517*/ GIMT_Encode4(46878), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 926 //
16755 /* 46797 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16756 /* 46801 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16757 /* 46805 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16758 /* 46808 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16759 /* 46812 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(2),
16760 /* 46819 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16761 /* 46823 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16762 /* 46827 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16763 /* 46831 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
16764 /* 46835 */ // MIs[2] Operand 1
16765 /* 46835 */ // No operand predicates
16766 /* 46835 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16767 /* 46837 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16768 /* 46844 */ // (vector_insert:{ *:[v8i16] } V128:{ *:[v8i16] }:$vec, (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx) => (LOAD_LANE_16_A64:{ *:[v8i16] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v8i16] }:$vec)
16769 /* 46844 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_16_A64),
16770 /* 46847 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16771 /* 46849 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16772 /* 46852 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16773 /* 46857 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16774 /* 46860 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16775 /* 46865 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16776 /* 46867 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16777 /* 46870 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16778 /* 46876 */ GIR_RootConstrainSelectedInstOperands,
16779 /* 46877 */ // GIR_Coverage, 926,
16780 /* 46877 */ GIR_EraseRootFromParent_Done,
16781 /* 46878 */ // Label 1517: @46878
16782 /* 46878 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1518*/ GIMT_Encode4(46920), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 189 //
16783 /* 46885 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
16784 /* 46889 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
16785 /* 46893 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16786 /* 46897 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx8),
16787 /* 46901 */ // MIs[1] Operand 1
16788 /* 46901 */ // No operand predicates
16789 /* 46901 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
16790 /* 46903 */ // (vector_insert:{ *:[v8i16] } V128:{ *:[v8i16] }:$vec, I32:{ *:[i32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx8>>:$idx) => (REPLACE_LANE_I16x8:{ *:[v8i16] } V128:{ *:[v8i16] }:$vec, (imm:{ *:[i32] }):$idx, I32:{ *:[i32] }:$x)
16791 /* 46903 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I16x8),
16792 /* 46906 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16793 /* 46908 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16794 /* 46910 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
16795 /* 46913 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
16796 /* 46915 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16797 /* 46918 */ GIR_RootConstrainSelectedInstOperands,
16798 /* 46919 */ // GIR_Coverage, 189,
16799 /* 46919 */ GIR_EraseRootFromParent_Done,
16800 /* 46920 */ // Label 1518: @46920
16801 /* 46920 */ GIM_Reject,
16802 /* 46921 */ // Label 1515: @46921
16803 /* 46921 */ GIM_Reject,
16804 /* 46922 */ // Label 1508: @46922
16805 /* 46922 */ GIM_Try, /*On fail goto*//*Label 1519*/ GIMT_Encode4(47677),
16806 /* 46927 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4s32,
16807 /* 46930 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s32,
16808 /* 46933 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
16809 /* 46936 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16810 /* 46940 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
16811 /* 46944 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1520*/ GIMT_Encode4(47025), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 927 //
16812 /* 46951 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16813 /* 46955 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16814 /* 46959 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16815 /* 46962 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16816 /* 46966 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16817 /* 46970 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16818 /* 46974 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16819 /* 46978 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
16820 /* 46982 */ // MIs[2] Operand 1
16821 /* 46982 */ // No operand predicates
16822 /* 46982 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16823 /* 46984 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16824 /* 46991 */ // (vector_insert:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (LOAD_LANE_32_A32:{ *:[v4i32] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v4i32] }:$vec)
16825 /* 46991 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_32_A32),
16826 /* 46994 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16827 /* 46996 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16828 /* 46999 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16829 /* 47004 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16830 /* 47007 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16831 /* 47012 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16832 /* 47014 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16833 /* 47017 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16834 /* 47023 */ GIR_RootConstrainSelectedInstOperands,
16835 /* 47024 */ // GIR_Coverage, 927,
16836 /* 47024 */ GIR_EraseRootFromParent_Done,
16837 /* 47025 */ // Label 1520: @47025
16838 /* 47025 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1521*/ GIMT_Encode4(47106), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 928 //
16839 /* 47032 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16840 /* 47036 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16841 /* 47040 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16842 /* 47043 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16843 /* 47047 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16844 /* 47051 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16845 /* 47055 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16846 /* 47059 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
16847 /* 47063 */ // MIs[2] Operand 1
16848 /* 47063 */ // No operand predicates
16849 /* 47063 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16850 /* 47065 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16851 /* 47072 */ // (vector_insert:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, (ld:{ *:[f32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (LOAD_LANE_32_A32:{ *:[v4i32] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v4i32] }:$vec)
16852 /* 47072 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_32_A32),
16853 /* 47075 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16854 /* 47077 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16855 /* 47080 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16856 /* 47085 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16857 /* 47088 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16858 /* 47093 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16859 /* 47095 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16860 /* 47098 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16861 /* 47104 */ GIR_RootConstrainSelectedInstOperands,
16862 /* 47105 */ // GIR_Coverage, 928,
16863 /* 47105 */ GIR_EraseRootFromParent_Done,
16864 /* 47106 */ // Label 1521: @47106
16865 /* 47106 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1522*/ GIMT_Encode4(47187), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 929 //
16866 /* 47113 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16867 /* 47117 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16868 /* 47121 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16869 /* 47124 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16870 /* 47128 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16871 /* 47132 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16872 /* 47136 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16873 /* 47140 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
16874 /* 47144 */ // MIs[2] Operand 1
16875 /* 47144 */ // No operand predicates
16876 /* 47144 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16877 /* 47146 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16878 /* 47153 */ // (vector_insert:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (LOAD_LANE_32_A64:{ *:[v4i32] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v4i32] }:$vec)
16879 /* 47153 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_32_A64),
16880 /* 47156 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16881 /* 47158 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16882 /* 47161 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16883 /* 47166 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16884 /* 47169 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16885 /* 47174 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16886 /* 47176 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16887 /* 47179 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16888 /* 47185 */ GIR_RootConstrainSelectedInstOperands,
16889 /* 47186 */ // GIR_Coverage, 929,
16890 /* 47186 */ GIR_EraseRootFromParent_Done,
16891 /* 47187 */ // Label 1522: @47187
16892 /* 47187 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1523*/ GIMT_Encode4(47268), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 930 //
16893 /* 47194 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16894 /* 47198 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16895 /* 47202 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16896 /* 47205 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16897 /* 47209 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16898 /* 47213 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16899 /* 47217 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16900 /* 47221 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
16901 /* 47225 */ // MIs[2] Operand 1
16902 /* 47225 */ // No operand predicates
16903 /* 47225 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16904 /* 47227 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16905 /* 47234 */ // (vector_insert:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, (ld:{ *:[f32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (LOAD_LANE_32_A64:{ *:[v4i32] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v4i32] }:$vec)
16906 /* 47234 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_32_A64),
16907 /* 47237 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16908 /* 47239 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16909 /* 47242 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16910 /* 47247 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16911 /* 47250 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16912 /* 47255 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16913 /* 47257 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16914 /* 47260 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16915 /* 47266 */ GIR_RootConstrainSelectedInstOperands,
16916 /* 47267 */ // GIR_Coverage, 930,
16917 /* 47267 */ GIR_EraseRootFromParent_Done,
16918 /* 47268 */ // Label 1523: @47268
16919 /* 47268 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1524*/ GIMT_Encode4(47349), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 935 //
16920 /* 47275 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16921 /* 47279 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16922 /* 47283 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16923 /* 47286 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16924 /* 47290 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16925 /* 47294 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16926 /* 47298 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16927 /* 47302 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
16928 /* 47306 */ // MIs[2] Operand 1
16929 /* 47306 */ // No operand predicates
16930 /* 47306 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16931 /* 47308 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16932 /* 47315 */ // (vector_insert:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (LOAD_LANE_32_A32:{ *:[v4f32] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v4f32] }:$vec)
16933 /* 47315 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_32_A32),
16934 /* 47318 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16935 /* 47320 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16936 /* 47323 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16937 /* 47328 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16938 /* 47331 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16939 /* 47336 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16940 /* 47338 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16941 /* 47341 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16942 /* 47347 */ GIR_RootConstrainSelectedInstOperands,
16943 /* 47348 */ // GIR_Coverage, 935,
16944 /* 47348 */ GIR_EraseRootFromParent_Done,
16945 /* 47349 */ // Label 1524: @47349
16946 /* 47349 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1525*/ GIMT_Encode4(47430), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 936 //
16947 /* 47356 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16948 /* 47360 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16949 /* 47364 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16950 /* 47367 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16951 /* 47371 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
16952 /* 47375 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16953 /* 47379 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16954 /* 47383 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
16955 /* 47387 */ // MIs[2] Operand 1
16956 /* 47387 */ // No operand predicates
16957 /* 47387 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16958 /* 47389 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
16959 /* 47396 */ // (vector_insert:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, (ld:{ *:[f32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (LOAD_LANE_32_A32:{ *:[v4f32] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v4f32] }:$vec)
16960 /* 47396 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_32_A32),
16961 /* 47399 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16962 /* 47401 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16963 /* 47404 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16964 /* 47409 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16965 /* 47412 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16966 /* 47417 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16967 /* 47419 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16968 /* 47422 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16969 /* 47428 */ GIR_RootConstrainSelectedInstOperands,
16970 /* 47429 */ // GIR_Coverage, 936,
16971 /* 47429 */ GIR_EraseRootFromParent_Done,
16972 /* 47430 */ // Label 1525: @47430
16973 /* 47430 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1526*/ GIMT_Encode4(47511), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 937 //
16974 /* 47437 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
16975 /* 47441 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
16976 /* 47445 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
16977 /* 47448 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
16978 /* 47452 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
16979 /* 47456 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
16980 /* 47460 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
16981 /* 47464 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
16982 /* 47468 */ // MIs[2] Operand 1
16983 /* 47468 */ // No operand predicates
16984 /* 47468 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
16985 /* 47470 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
16986 /* 47477 */ // (vector_insert:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (LOAD_LANE_32_A64:{ *:[v4f32] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v4f32] }:$vec)
16987 /* 47477 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_32_A64),
16988 /* 47480 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
16989 /* 47482 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
16990 /* 47485 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
16991 /* 47490 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
16992 /* 47493 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
16993 /* 47498 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
16994 /* 47500 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
16995 /* 47503 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
16996 /* 47509 */ GIR_RootConstrainSelectedInstOperands,
16997 /* 47510 */ // GIR_Coverage, 937,
16998 /* 47510 */ GIR_EraseRootFromParent_Done,
16999 /* 47511 */ // Label 1526: @47511
17000 /* 47511 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1527*/ GIMT_Encode4(47592), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 938 //
17001 /* 47518 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17002 /* 47522 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17003 /* 47526 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17004 /* 47529 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17005 /* 47533 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
17006 /* 47537 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
17007 /* 47541 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17008 /* 47545 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
17009 /* 47549 */ // MIs[2] Operand 1
17010 /* 47549 */ // No operand predicates
17011 /* 47549 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
17012 /* 47551 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
17013 /* 47558 */ // (vector_insert:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, (ld:{ *:[f32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (LOAD_LANE_32_A64:{ *:[v4f32] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v4f32] }:$vec)
17014 /* 47558 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_32_A64),
17015 /* 47561 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17016 /* 47563 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17017 /* 47566 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17018 /* 47571 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
17019 /* 47574 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17020 /* 47579 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
17021 /* 47581 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17022 /* 47584 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
17023 /* 47590 */ GIR_RootConstrainSelectedInstOperands,
17024 /* 47591 */ // GIR_Coverage, 938,
17025 /* 47591 */ GIR_EraseRootFromParent_Done,
17026 /* 47592 */ // Label 1527: @47592
17027 /* 47592 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1528*/ GIMT_Encode4(47634), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 190 //
17028 /* 47599 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
17029 /* 47603 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
17030 /* 47607 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17031 /* 47611 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
17032 /* 47615 */ // MIs[1] Operand 1
17033 /* 47615 */ // No operand predicates
17034 /* 47615 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17035 /* 47617 */ // (vector_insert:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, I32:{ *:[i32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (REPLACE_LANE_I32x4:{ *:[v4i32] } V128:{ *:[v4i32] }:$vec, (imm:{ *:[i32] }):$idx, I32:{ *:[i32] }:$x)
17036 /* 47617 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I32x4),
17037 /* 47620 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17038 /* 47622 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
17039 /* 47624 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
17040 /* 47627 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
17041 /* 47629 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17042 /* 47632 */ GIR_RootConstrainSelectedInstOperands,
17043 /* 47633 */ // GIR_Coverage, 190,
17044 /* 47633 */ GIR_EraseRootFromParent_Done,
17045 /* 47634 */ // Label 1528: @47634
17046 /* 47634 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1529*/ GIMT_Encode4(47676), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 192 //
17047 /* 47641 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
17048 /* 47645 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
17049 /* 47649 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17050 /* 47653 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx4),
17051 /* 47657 */ // MIs[1] Operand 1
17052 /* 47657 */ // No operand predicates
17053 /* 47657 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17054 /* 47659 */ // (vector_insert:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, F32:{ *:[f32] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx4>>:$idx) => (REPLACE_LANE_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$vec, (imm:{ *:[i32] }):$idx, F32:{ *:[f32] }:$x)
17055 /* 47659 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_F32x4),
17056 /* 47662 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17057 /* 47664 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
17058 /* 47666 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
17059 /* 47669 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
17060 /* 47671 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17061 /* 47674 */ GIR_RootConstrainSelectedInstOperands,
17062 /* 47675 */ // GIR_Coverage, 192,
17063 /* 47675 */ GIR_EraseRootFromParent_Done,
17064 /* 47676 */ // Label 1529: @47676
17065 /* 47676 */ GIM_Reject,
17066 /* 47677 */ // Label 1519: @47677
17067 /* 47677 */ GIM_Reject,
17068 /* 47678 */ // Label 1509: @47678
17069 /* 47678 */ GIM_Try, /*On fail goto*//*Label 1530*/ GIMT_Encode4(48433),
17070 /* 47683 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2s64,
17071 /* 47686 */ GIM_RootCheckType, /*Op*/2, /*Type*/GILLT_s64,
17072 /* 47689 */ GIM_RootCheckType, /*Op*/3, /*Type*/GILLT_s32,
17073 /* 47692 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17074 /* 47696 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17075 /* 47700 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1531*/ GIMT_Encode4(47781), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 931 //
17076 /* 47707 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17077 /* 47711 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17078 /* 47715 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17079 /* 47718 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17080 /* 47722 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
17081 /* 47726 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
17082 /* 47730 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17083 /* 47734 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
17084 /* 47738 */ // MIs[2] Operand 1
17085 /* 47738 */ // No operand predicates
17086 /* 47738 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
17087 /* 47740 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
17088 /* 47747 */ // (vector_insert:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (LOAD_LANE_64_A32:{ *:[v2i64] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v2i64] }:$vec)
17089 /* 47747 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_64_A32),
17090 /* 47750 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17091 /* 47752 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17092 /* 47755 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17093 /* 47760 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
17094 /* 47763 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17095 /* 47768 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
17096 /* 47770 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17097 /* 47773 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
17098 /* 47779 */ GIR_RootConstrainSelectedInstOperands,
17099 /* 47780 */ // GIR_Coverage, 931,
17100 /* 47780 */ GIR_EraseRootFromParent_Done,
17101 /* 47781 */ // Label 1531: @47781
17102 /* 47781 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1532*/ GIMT_Encode4(47862), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 932 //
17103 /* 47788 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17104 /* 47792 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17105 /* 47796 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17106 /* 47799 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17107 /* 47803 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
17108 /* 47807 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
17109 /* 47811 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17110 /* 47815 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
17111 /* 47819 */ // MIs[2] Operand 1
17112 /* 47819 */ // No operand predicates
17113 /* 47819 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
17114 /* 47821 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
17115 /* 47828 */ // (vector_insert:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, (ld:{ *:[f64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (LOAD_LANE_64_A32:{ *:[v2i64] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v2i64] }:$vec)
17116 /* 47828 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_64_A32),
17117 /* 47831 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17118 /* 47833 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17119 /* 47836 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17120 /* 47841 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
17121 /* 47844 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17122 /* 47849 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
17123 /* 47851 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17124 /* 47854 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
17125 /* 47860 */ GIR_RootConstrainSelectedInstOperands,
17126 /* 47861 */ // GIR_Coverage, 932,
17127 /* 47861 */ GIR_EraseRootFromParent_Done,
17128 /* 47862 */ // Label 1532: @47862
17129 /* 47862 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1533*/ GIMT_Encode4(47943), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 933 //
17130 /* 47869 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17131 /* 47873 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17132 /* 47877 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17133 /* 47880 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17134 /* 47884 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
17135 /* 47888 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
17136 /* 47892 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17137 /* 47896 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
17138 /* 47900 */ // MIs[2] Operand 1
17139 /* 47900 */ // No operand predicates
17140 /* 47900 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
17141 /* 47902 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
17142 /* 47909 */ // (vector_insert:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (LOAD_LANE_64_A64:{ *:[v2i64] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v2i64] }:$vec)
17143 /* 47909 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_64_A64),
17144 /* 47912 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17145 /* 47914 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17146 /* 47917 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17147 /* 47922 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
17148 /* 47925 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17149 /* 47930 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
17150 /* 47932 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17151 /* 47935 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
17152 /* 47941 */ GIR_RootConstrainSelectedInstOperands,
17153 /* 47942 */ // GIR_Coverage, 933,
17154 /* 47942 */ GIR_EraseRootFromParent_Done,
17155 /* 47943 */ // Label 1533: @47943
17156 /* 47943 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1534*/ GIMT_Encode4(48024), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 934 //
17157 /* 47950 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17158 /* 47954 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17159 /* 47958 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17160 /* 47961 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17161 /* 47965 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
17162 /* 47969 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
17163 /* 47973 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17164 /* 47977 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
17165 /* 47981 */ // MIs[2] Operand 1
17166 /* 47981 */ // No operand predicates
17167 /* 47981 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
17168 /* 47983 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
17169 /* 47990 */ // (vector_insert:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, (ld:{ *:[f64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (LOAD_LANE_64_A64:{ *:[v2i64] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v2i64] }:$vec)
17170 /* 47990 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_64_A64),
17171 /* 47993 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17172 /* 47995 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17173 /* 47998 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17174 /* 48003 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
17175 /* 48006 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17176 /* 48011 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
17177 /* 48013 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17178 /* 48016 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
17179 /* 48022 */ GIR_RootConstrainSelectedInstOperands,
17180 /* 48023 */ // GIR_Coverage, 934,
17181 /* 48023 */ GIR_EraseRootFromParent_Done,
17182 /* 48024 */ // Label 1534: @48024
17183 /* 48024 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1535*/ GIMT_Encode4(48105), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 939 //
17184 /* 48031 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17185 /* 48035 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17186 /* 48039 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17187 /* 48042 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17188 /* 48046 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
17189 /* 48050 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
17190 /* 48054 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17191 /* 48058 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
17192 /* 48062 */ // MIs[2] Operand 1
17193 /* 48062 */ // No operand predicates
17194 /* 48062 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
17195 /* 48064 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
17196 /* 48071 */ // (vector_insert:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (LOAD_LANE_64_A32:{ *:[v2f64] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v2f64] }:$vec)
17197 /* 48071 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_64_A32),
17198 /* 48074 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17199 /* 48076 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17200 /* 48079 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17201 /* 48084 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
17202 /* 48087 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17203 /* 48092 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
17204 /* 48094 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17205 /* 48097 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
17206 /* 48103 */ GIR_RootConstrainSelectedInstOperands,
17207 /* 48104 */ // GIR_Coverage, 939,
17208 /* 48104 */ GIR_EraseRootFromParent_Done,
17209 /* 48105 */ // Label 1535: @48105
17210 /* 48105 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1536*/ GIMT_Encode4(48186), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 940 //
17211 /* 48112 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17212 /* 48116 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17213 /* 48120 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17214 /* 48123 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17215 /* 48127 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
17216 /* 48131 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
17217 /* 48135 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17218 /* 48139 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
17219 /* 48143 */ // MIs[2] Operand 1
17220 /* 48143 */ // No operand predicates
17221 /* 48143 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
17222 /* 48145 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
17223 /* 48152 */ // (vector_insert:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, (ld:{ *:[f64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (LOAD_LANE_64_A32:{ *:[v2f64] } 0:{ *:[i32] }, ?:{ *:[i32] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i32] }:$addr, ?:{ *:[v2f64] }:$vec)
17224 /* 48152 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_64_A32),
17225 /* 48155 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17226 /* 48157 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17227 /* 48160 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17228 /* 48165 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
17229 /* 48168 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17230 /* 48173 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
17231 /* 48175 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17232 /* 48178 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
17233 /* 48184 */ GIR_RootConstrainSelectedInstOperands,
17234 /* 48185 */ // GIR_Coverage, 940,
17235 /* 48185 */ GIR_EraseRootFromParent_Done,
17236 /* 48186 */ // Label 1536: @48186
17237 /* 48186 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1537*/ GIMT_Encode4(48267), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 941 //
17238 /* 48193 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17239 /* 48197 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17240 /* 48201 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17241 /* 48204 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17242 /* 48208 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
17243 /* 48212 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
17244 /* 48216 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17245 /* 48220 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
17246 /* 48224 */ // MIs[2] Operand 1
17247 /* 48224 */ // No operand predicates
17248 /* 48224 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
17249 /* 48226 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
17250 /* 48233 */ // (vector_insert:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (LOAD_LANE_64_A64:{ *:[v2f64] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v2f64] }:$vec)
17251 /* 48233 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_64_A64),
17252 /* 48236 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17253 /* 48238 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17254 /* 48241 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17255 /* 48246 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
17256 /* 48249 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17257 /* 48254 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
17258 /* 48256 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17259 /* 48259 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
17260 /* 48265 */ GIR_RootConstrainSelectedInstOperands,
17261 /* 48266 */ // GIR_Coverage, 941,
17262 /* 48266 */ GIR_EraseRootFromParent_Done,
17263 /* 48267 */ // Label 1537: @48267
17264 /* 48267 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1538*/ GIMT_Encode4(48348), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 942 //
17265 /* 48274 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
17266 /* 48278 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17267 /* 48282 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17268 /* 48285 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17269 /* 48289 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
17270 /* 48293 */ GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
17271 /* 48297 */ GIM_CheckOpcode, /*MI*/2, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17272 /* 48301 */ GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
17273 /* 48305 */ // MIs[2] Operand 1
17274 /* 48305 */ // No operand predicates
17275 /* 48305 */ GIM_CheckIsSafeToFold, /*NumInsns*/2,
17276 /* 48307 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
17277 /* 48314 */ // (vector_insert:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, (ld:{ *:[f64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (LOAD_LANE_64_A64:{ *:[v2f64] } 0:{ *:[i32] }, ?:{ *:[i64] }:$offset, (imm:{ *:[i32] }):$idx, ?:{ *:[i64] }:$addr, ?:{ *:[v2f64] }:$vec)
17278 /* 48314 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD_LANE_64_A64),
17279 /* 48317 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17280 /* 48319 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17281 /* 48322 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17282 /* 48327 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx
17283 /* 48330 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17284 /* 48335 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
17285 /* 48337 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17286 /* 48340 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/3, /*MergeInsnID's*/0, 1, 2,
17287 /* 48346 */ GIR_RootConstrainSelectedInstOperands,
17288 /* 48347 */ // GIR_Coverage, 942,
17289 /* 48347 */ GIR_EraseRootFromParent_Done,
17290 /* 48348 */ // Label 1538: @48348
17291 /* 48348 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1539*/ GIMT_Encode4(48390), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 191 //
17292 /* 48355 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
17293 /* 48359 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
17294 /* 48363 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17295 /* 48367 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
17296 /* 48371 */ // MIs[1] Operand 1
17297 /* 48371 */ // No operand predicates
17298 /* 48371 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17299 /* 48373 */ // (vector_insert:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, I64:{ *:[i64] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (REPLACE_LANE_I64x2:{ *:[v2i64] } V128:{ *:[v2i64] }:$vec, (imm:{ *:[i32] }):$idx, I64:{ *:[i64] }:$x)
17300 /* 48373 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_I64x2),
17301 /* 48376 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17302 /* 48378 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
17303 /* 48380 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
17304 /* 48383 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
17305 /* 48385 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17306 /* 48388 */ GIR_RootConstrainSelectedInstOperands,
17307 /* 48389 */ // GIR_Coverage, 191,
17308 /* 48389 */ GIR_EraseRootFromParent_Done,
17309 /* 48390 */ // Label 1539: @48390
17310 /* 48390 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1540*/ GIMT_Encode4(48432), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 193 //
17311 /* 48397 */ GIM_RootCheckRegBankForClass, /*Op*/2, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
17312 /* 48401 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
17313 /* 48405 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17314 /* 48409 */ GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIMT_Encode2(GICXXPred_I64_Predicate_LaneIdx2),
17315 /* 48413 */ // MIs[1] Operand 1
17316 /* 48413 */ // No operand predicates
17317 /* 48413 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17318 /* 48415 */ // (vector_insert:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, F64:{ *:[f64] }:$x, (imm:{ *:[i32] })<<P:Predicate_LaneIdx2>>:$idx) => (REPLACE_LANE_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$vec, (imm:{ *:[i32] }):$idx, F64:{ *:[f64] }:$x)
17319 /* 48415 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::REPLACE_LANE_F64x2),
17320 /* 48418 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17321 /* 48420 */ GIR_RootToRootCopy, /*OpIdx*/1, // vec
17322 /* 48422 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
17323 /* 48425 */ GIR_RootToRootCopy, /*OpIdx*/2, // x
17324 /* 48427 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17325 /* 48430 */ GIR_RootConstrainSelectedInstOperands,
17326 /* 48431 */ // GIR_Coverage, 193,
17327 /* 48431 */ GIR_EraseRootFromParent_Done,
17328 /* 48432 */ // Label 1540: @48432
17329 /* 48432 */ GIM_Reject,
17330 /* 48433 */ // Label 1530: @48433
17331 /* 48433 */ GIM_Reject,
17332 /* 48434 */ // Label 1510: @48434
17333 /* 48434 */ GIM_Reject,
17334 /* 48435 */ // Label 70: @48435
17335 /* 48435 */ GIM_SwitchTypeShape, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(8), GIMT_Encode2(12), /*)*//*default:*//*Label 1545*/ GIMT_Encode4(49704),
17336 /* 48446 */ /*GILLT_v16s8*//*Label 1541*/ GIMT_Encode4(48462),
17337 /* 48450 */ /*GILLT_v8s16*//*Label 1542*/ GIMT_Encode4(48713),
17338 /* 48454 */ /*GILLT_v4s32*//*Label 1543*/ GIMT_Encode4(48940),
17339 /* 48458 */ /*GILLT_v2s64*//*Label 1544*/ GIMT_Encode4(49328),
17340 /* 48462 */ // Label 1541: @48462
17341 /* 48462 */ GIM_Try, /*On fail goto*//*Label 1546*/ GIMT_Encode4(48712),
17342 /* 48467 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
17343 /* 48470 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17344 /* 48474 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1547*/ GIMT_Encode4(48544), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 873 //
17345 /* 48481 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17346 /* 48485 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17347 /* 48489 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17348 /* 48492 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17349 /* 48496 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(1),
17350 /* 48503 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
17351 /* 48507 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17352 /* 48509 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
17353 /* 48516 */ // (splat_vector:{ *:[v16i8] } (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>>) => (LOAD8_SPLAT_A32:{ *:[v16i8] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
17354 /* 48516 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_SPLAT_A32),
17355 /* 48519 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17356 /* 48521 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17357 /* 48524 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17358 /* 48529 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17359 /* 48534 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17360 /* 48537 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
17361 /* 48542 */ GIR_RootConstrainSelectedInstOperands,
17362 /* 48543 */ // GIR_Coverage, 873,
17363 /* 48543 */ GIR_EraseRootFromParent_Done,
17364 /* 48544 */ // Label 1547: @48544
17365 /* 48544 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1548*/ GIMT_Encode4(48614), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 874 //
17366 /* 48551 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17367 /* 48555 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17368 /* 48559 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17369 /* 48562 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17370 /* 48566 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(1),
17371 /* 48573 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
17372 /* 48577 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17373 /* 48579 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
17374 /* 48586 */ // (splat_vector:{ *:[v16i8] } (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>>) => (LOAD8_SPLAT_A64:{ *:[v16i8] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
17375 /* 48586 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD8_SPLAT_A64),
17376 /* 48589 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17377 /* 48591 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17378 /* 48594 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17379 /* 48599 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17380 /* 48604 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17381 /* 48607 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
17382 /* 48612 */ GIR_RootConstrainSelectedInstOperands,
17383 /* 48613 */ // GIR_Coverage, 874,
17384 /* 48613 */ GIR_EraseRootFromParent_Done,
17385 /* 48614 */ // Label 1548: @48614
17386 /* 48614 */ GIM_Try, /*On fail goto*//*Label 1549*/ GIMT_Encode4(48687), // Rule ID 977 //
17387 /* 48619 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17388 /* 48623 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17389 /* 48627 */ // MIs[1] Operand 1
17390 /* 48627 */ // No operand predicates
17391 /* 48627 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17392 /* 48629 */ // (splat_vector:{ *:[v16i8] } (imm:{ *:[i32] }):$x) => (CONST_V128_I8x16:{ *:[v16i8] } (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x)
17393 /* 48629 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I8x16),
17394 /* 48632 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17395 /* 48634 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17396 /* 48637 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17397 /* 48640 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17398 /* 48643 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17399 /* 48646 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17400 /* 48649 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17401 /* 48652 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17402 /* 48655 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17403 /* 48658 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17404 /* 48661 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17405 /* 48664 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17406 /* 48667 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17407 /* 48670 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17408 /* 48673 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17409 /* 48676 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17410 /* 48679 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17411 /* 48682 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17412 /* 48685 */ GIR_RootConstrainSelectedInstOperands,
17413 /* 48686 */ // GIR_Coverage, 977,
17414 /* 48686 */ GIR_EraseRootFromParent_Done,
17415 /* 48687 */ // Label 1549: @48687
17416 /* 48687 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1550*/ GIMT_Encode4(48711), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 180 //
17417 /* 48694 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
17418 /* 48698 */ // (splat_vector:{ *:[v16i8] } I32:{ *:[i32] }:$x) => (SPLAT_I8x16:{ *:[v16i8] } I32:{ *:[i32] }:$x)
17419 /* 48698 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I8x16),
17420 /* 48703 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17421 /* 48709 */ GIR_RootConstrainSelectedInstOperands,
17422 /* 48710 */ // GIR_Coverage, 180,
17423 /* 48710 */ GIR_Done,
17424 /* 48711 */ // Label 1550: @48711
17425 /* 48711 */ GIM_Reject,
17426 /* 48712 */ // Label 1546: @48712
17427 /* 48712 */ GIM_Reject,
17428 /* 48713 */ // Label 1542: @48713
17429 /* 48713 */ GIM_Try, /*On fail goto*//*Label 1551*/ GIMT_Encode4(48939),
17430 /* 48718 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
17431 /* 48721 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17432 /* 48725 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1552*/ GIMT_Encode4(48795), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 875 //
17433 /* 48732 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17434 /* 48736 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17435 /* 48740 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17436 /* 48743 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17437 /* 48747 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(2),
17438 /* 48754 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
17439 /* 48758 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17440 /* 48760 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
17441 /* 48767 */ // (splat_vector:{ *:[v8i16] } (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>>) => (LOAD16_SPLAT_A32:{ *:[v8i16] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
17442 /* 48767 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_SPLAT_A32),
17443 /* 48770 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17444 /* 48772 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17445 /* 48775 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17446 /* 48780 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17447 /* 48785 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17448 /* 48788 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
17449 /* 48793 */ GIR_RootConstrainSelectedInstOperands,
17450 /* 48794 */ // GIR_Coverage, 875,
17451 /* 48794 */ GIR_EraseRootFromParent_Done,
17452 /* 48795 */ // Label 1552: @48795
17453 /* 48795 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1553*/ GIMT_Encode4(48865), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 876 //
17454 /* 48802 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17455 /* 48806 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17456 /* 48810 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17457 /* 48813 */ GIM_CheckMemorySizeLessThanLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17458 /* 48817 */ GIM_CheckMemorySizeEqualTo, /*MI*/1, /*MMO*/0, /*Size*/GIMT_Encode4(2),
17459 /* 48824 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
17460 /* 48828 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17461 /* 48830 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
17462 /* 48837 */ // (splat_vector:{ *:[v8i16] } (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>>) => (LOAD16_SPLAT_A64:{ *:[v8i16] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
17463 /* 48837 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD16_SPLAT_A64),
17464 /* 48840 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17465 /* 48842 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17466 /* 48845 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17467 /* 48850 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17468 /* 48855 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17469 /* 48858 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
17470 /* 48863 */ GIR_RootConstrainSelectedInstOperands,
17471 /* 48864 */ // GIR_Coverage, 876,
17472 /* 48864 */ GIR_EraseRootFromParent_Done,
17473 /* 48865 */ // Label 1553: @48865
17474 /* 48865 */ GIM_Try, /*On fail goto*//*Label 1554*/ GIMT_Encode4(48914), // Rule ID 978 //
17475 /* 48870 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17476 /* 48874 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17477 /* 48878 */ // MIs[1] Operand 1
17478 /* 48878 */ // No operand predicates
17479 /* 48878 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17480 /* 48880 */ // (splat_vector:{ *:[v8i16] } (imm:{ *:[i32] }):$x) => (CONST_V128_I16x8:{ *:[v8i16] } (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x)
17481 /* 48880 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I16x8),
17482 /* 48883 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17483 /* 48885 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17484 /* 48888 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17485 /* 48891 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17486 /* 48894 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17487 /* 48897 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17488 /* 48900 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17489 /* 48903 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17490 /* 48906 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17491 /* 48909 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17492 /* 48912 */ GIR_RootConstrainSelectedInstOperands,
17493 /* 48913 */ // GIR_Coverage, 978,
17494 /* 48913 */ GIR_EraseRootFromParent_Done,
17495 /* 48914 */ // Label 1554: @48914
17496 /* 48914 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1555*/ GIMT_Encode4(48938), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 181 //
17497 /* 48921 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
17498 /* 48925 */ // (splat_vector:{ *:[v8i16] } I32:{ *:[i32] }:$x) => (SPLAT_I16x8:{ *:[v8i16] } I32:{ *:[i32] }:$x)
17499 /* 48925 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I16x8),
17500 /* 48930 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17501 /* 48936 */ GIR_RootConstrainSelectedInstOperands,
17502 /* 48937 */ // GIR_Coverage, 181,
17503 /* 48937 */ GIR_Done,
17504 /* 48938 */ // Label 1555: @48938
17505 /* 48938 */ GIM_Reject,
17506 /* 48939 */ // Label 1551: @48939
17507 /* 48939 */ GIM_Reject,
17508 /* 48940 */ // Label 1543: @48940
17509 /* 48940 */ GIM_Try, /*On fail goto*//*Label 1556*/ GIMT_Encode4(49327),
17510 /* 48945 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s32,
17511 /* 48948 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17512 /* 48952 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1557*/ GIMT_Encode4(49015), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 877 //
17513 /* 48959 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17514 /* 48963 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17515 /* 48967 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17516 /* 48970 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17517 /* 48974 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
17518 /* 48978 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17519 /* 48980 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
17520 /* 48987 */ // (splat_vector:{ *:[v4i32] } (ld:{ *:[i32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>) => (LOAD32_SPLAT_A32:{ *:[v4i32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
17521 /* 48987 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_SPLAT_A32),
17522 /* 48990 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17523 /* 48992 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17524 /* 48995 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17525 /* 49000 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17526 /* 49005 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17527 /* 49008 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
17528 /* 49013 */ GIR_RootConstrainSelectedInstOperands,
17529 /* 49014 */ // GIR_Coverage, 877,
17530 /* 49014 */ GIR_EraseRootFromParent_Done,
17531 /* 49015 */ // Label 1557: @49015
17532 /* 49015 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1558*/ GIMT_Encode4(49078), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 878 //
17533 /* 49022 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17534 /* 49026 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17535 /* 49030 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17536 /* 49033 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17537 /* 49037 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
17538 /* 49041 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17539 /* 49043 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
17540 /* 49050 */ // (splat_vector:{ *:[v4i32] } (ld:{ *:[i32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>) => (LOAD32_SPLAT_A64:{ *:[v4i32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
17541 /* 49050 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_SPLAT_A64),
17542 /* 49053 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17543 /* 49055 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17544 /* 49058 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17545 /* 49063 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17546 /* 49068 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17547 /* 49071 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
17548 /* 49076 */ GIR_RootConstrainSelectedInstOperands,
17549 /* 49077 */ // GIR_Coverage, 878,
17550 /* 49077 */ GIR_EraseRootFromParent_Done,
17551 /* 49078 */ // Label 1558: @49078
17552 /* 49078 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1559*/ GIMT_Encode4(49141), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 881 //
17553 /* 49085 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17554 /* 49089 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17555 /* 49093 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17556 /* 49096 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17557 /* 49100 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
17558 /* 49104 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17559 /* 49106 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
17560 /* 49113 */ // (splat_vector:{ *:[v4f32] } (ld:{ *:[f32] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>) => (LOAD32_SPLAT_A32:{ *:[v4f32] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
17561 /* 49113 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_SPLAT_A32),
17562 /* 49116 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17563 /* 49118 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17564 /* 49121 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17565 /* 49126 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17566 /* 49131 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17567 /* 49134 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
17568 /* 49139 */ GIR_RootConstrainSelectedInstOperands,
17569 /* 49140 */ // GIR_Coverage, 881,
17570 /* 49140 */ GIR_EraseRootFromParent_Done,
17571 /* 49141 */ // Label 1559: @49141
17572 /* 49141 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1560*/ GIMT_Encode4(49204), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 882 //
17573 /* 49148 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17574 /* 49152 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17575 /* 49156 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17576 /* 49159 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17577 /* 49163 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
17578 /* 49167 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17579 /* 49169 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
17580 /* 49176 */ // (splat_vector:{ *:[v4f32] } (ld:{ *:[f32] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>) => (LOAD32_SPLAT_A64:{ *:[v4f32] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
17581 /* 49176 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD32_SPLAT_A64),
17582 /* 49179 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17583 /* 49181 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17584 /* 49184 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17585 /* 49189 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17586 /* 49194 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17587 /* 49197 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
17588 /* 49202 */ GIR_RootConstrainSelectedInstOperands,
17589 /* 49203 */ // GIR_Coverage, 882,
17590 /* 49203 */ GIR_EraseRootFromParent_Done,
17591 /* 49204 */ // Label 1560: @49204
17592 /* 49204 */ GIM_Try, /*On fail goto*//*Label 1561*/ GIMT_Encode4(49241), // Rule ID 981 //
17593 /* 49209 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17594 /* 49213 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
17595 /* 49217 */ // MIs[1] Operand 1
17596 /* 49217 */ // No operand predicates
17597 /* 49217 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17598 /* 49219 */ // (splat_vector:{ *:[v4f32] } (fpimm:{ *:[f32] }):$x) => (CONST_V128_F32x4:{ *:[v4f32] } (fpimm:{ *:[f32] }):$x, (fpimm:{ *:[f32] }):$x, (fpimm:{ *:[f32] }):$x, (fpimm:{ *:[f32] }):$x)
17599 /* 49219 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F32x4),
17600 /* 49222 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17601 /* 49224 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17602 /* 49227 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17603 /* 49230 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17604 /* 49233 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17605 /* 49236 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17606 /* 49239 */ GIR_RootConstrainSelectedInstOperands,
17607 /* 49240 */ // GIR_Coverage, 981,
17608 /* 49240 */ GIR_EraseRootFromParent_Done,
17609 /* 49241 */ // Label 1561: @49241
17610 /* 49241 */ GIM_Try, /*On fail goto*//*Label 1562*/ GIMT_Encode4(49278), // Rule ID 979 //
17611 /* 49246 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17612 /* 49250 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17613 /* 49254 */ // MIs[1] Operand 1
17614 /* 49254 */ // No operand predicates
17615 /* 49254 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17616 /* 49256 */ // (splat_vector:{ *:[v4i32] } (imm:{ *:[i32] }):$x) => (CONST_V128_I32x4:{ *:[v4i32] } (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x, (imm:{ *:[i32] }):$x)
17617 /* 49256 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I32x4),
17618 /* 49259 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17619 /* 49261 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17620 /* 49264 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17621 /* 49267 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17622 /* 49270 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17623 /* 49273 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17624 /* 49276 */ GIR_RootConstrainSelectedInstOperands,
17625 /* 49277 */ // GIR_Coverage, 979,
17626 /* 49277 */ GIR_EraseRootFromParent_Done,
17627 /* 49278 */ // Label 1562: @49278
17628 /* 49278 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1563*/ GIMT_Encode4(49302), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 182 //
17629 /* 49285 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
17630 /* 49289 */ // (splat_vector:{ *:[v4i32] } I32:{ *:[i32] }:$x) => (SPLAT_I32x4:{ *:[v4i32] } I32:{ *:[i32] }:$x)
17631 /* 49289 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I32x4),
17632 /* 49294 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17633 /* 49300 */ GIR_RootConstrainSelectedInstOperands,
17634 /* 49301 */ // GIR_Coverage, 182,
17635 /* 49301 */ GIR_Done,
17636 /* 49302 */ // Label 1563: @49302
17637 /* 49302 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1564*/ GIMT_Encode4(49326), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 184 //
17638 /* 49309 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
17639 /* 49313 */ // (splat_vector:{ *:[v4f32] } F32:{ *:[f32] }:$x) => (SPLAT_F32x4:{ *:[v4f32] } F32:{ *:[f32] }:$x)
17640 /* 49313 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_F32x4),
17641 /* 49318 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17642 /* 49324 */ GIR_RootConstrainSelectedInstOperands,
17643 /* 49325 */ // GIR_Coverage, 184,
17644 /* 49325 */ GIR_Done,
17645 /* 49326 */ // Label 1564: @49326
17646 /* 49326 */ GIM_Reject,
17647 /* 49327 */ // Label 1556: @49327
17648 /* 49327 */ GIM_Reject,
17649 /* 49328 */ // Label 1544: @49328
17650 /* 49328 */ GIM_Try, /*On fail goto*//*Label 1565*/ GIMT_Encode4(49703),
17651 /* 49333 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_s64,
17652 /* 49336 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17653 /* 49340 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1566*/ GIMT_Encode4(49403), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 879 //
17654 /* 49347 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17655 /* 49351 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17656 /* 49355 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17657 /* 49358 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17658 /* 49362 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
17659 /* 49366 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17660 /* 49368 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
17661 /* 49375 */ // (splat_vector:{ *:[v2i64] } (ld:{ *:[i64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>) => (LOAD64_SPLAT_A32:{ *:[v2i64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
17662 /* 49375 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD64_SPLAT_A32),
17663 /* 49378 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17664 /* 49380 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17665 /* 49383 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17666 /* 49388 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17667 /* 49393 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17668 /* 49396 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
17669 /* 49401 */ GIR_RootConstrainSelectedInstOperands,
17670 /* 49402 */ // GIR_Coverage, 879,
17671 /* 49402 */ GIR_EraseRootFromParent_Done,
17672 /* 49403 */ // Label 1566: @49403
17673 /* 49403 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1567*/ GIMT_Encode4(49466), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 880 //
17674 /* 49410 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17675 /* 49414 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17676 /* 49418 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17677 /* 49421 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17678 /* 49425 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
17679 /* 49429 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17680 /* 49431 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
17681 /* 49438 */ // (splat_vector:{ *:[v2i64] } (ld:{ *:[i64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>) => (LOAD64_SPLAT_A64:{ *:[v2i64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
17682 /* 49438 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD64_SPLAT_A64),
17683 /* 49441 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17684 /* 49443 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17685 /* 49446 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17686 /* 49451 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17687 /* 49456 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17688 /* 49459 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
17689 /* 49464 */ GIR_RootConstrainSelectedInstOperands,
17690 /* 49465 */ // GIR_Coverage, 880,
17691 /* 49465 */ GIR_EraseRootFromParent_Done,
17692 /* 49466 */ // Label 1567: @49466
17693 /* 49466 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1568*/ GIMT_Encode4(49529), GIMT_Encode2(GIFBS_HasAddr32), // Rule ID 883 //
17694 /* 49473 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17695 /* 49477 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17696 /* 49481 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17697 /* 49484 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17698 /* 49488 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/32,
17699 /* 49492 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17700 /* 49494 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps32),
17701 /* 49501 */ // (splat_vector:{ *:[v2f64] } (ld:{ *:[f64] } (AddrOps32:{ *:[i32] } offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>) => (LOAD64_SPLAT_A32:{ *:[v2f64] } 0:{ *:[i32] }, offset32_op:{ *:[i32] }:$offset, I32:{ *:[i32] }:$addr)
17702 /* 49501 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD64_SPLAT_A32),
17703 /* 49504 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17704 /* 49506 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17705 /* 49509 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17706 /* 49514 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17707 /* 49519 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17708 /* 49522 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
17709 /* 49527 */ GIR_RootConstrainSelectedInstOperands,
17710 /* 49528 */ // GIR_Coverage, 883,
17711 /* 49528 */ GIR_EraseRootFromParent_Done,
17712 /* 49529 */ // Label 1568: @49529
17713 /* 49529 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1569*/ GIMT_Encode4(49592), GIMT_Encode2(GIFBS_HasAddr64), // Rule ID 884 //
17714 /* 49536 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17715 /* 49540 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_LOAD),
17716 /* 49544 */ GIM_CheckAtomicOrdering, /*MI*/1, /*Order*/(uint8_t)AtomicOrdering::NotAtomic,
17717 /* 49547 */ GIM_CheckMemorySizeEqualToLLT, /*MI*/1, /*MMO*/0, /*OpIdx*/0,
17718 /* 49551 */ GIM_CheckPointerToAny, /*MI*/1, /*Op*/1, /*SizeInBits*/64,
17719 /* 49555 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17720 /* 49557 */ GIM_CheckComplexPattern, /*MI*/1, /*Op*/1, /*Renderer*/GIMT_Encode2(0), GIMT_Encode2(GICP_gi_AddrOps64),
17721 /* 49564 */ // (splat_vector:{ *:[v2f64] } (ld:{ *:[f64] } (AddrOps64:{ *:[i64] } offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr))<<P:Predicate_unindexedload>><<P:Predicate_load>>) => (LOAD64_SPLAT_A64:{ *:[v2f64] } 0:{ *:[i32] }, offset64_op:{ *:[i64] }:$offset, I64:{ *:[i64] }:$addr)
17722 /* 49564 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::LOAD64_SPLAT_A64),
17723 /* 49567 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17724 /* 49569 */ GIR_AddImm8, /*InsnID*/0, /*Imm*/0,
17725 /* 49572 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/0, // offset
17726 /* 49577 */ GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/GIMT_Encode2(0), /*SubOperand*/1, // addr
17727 /* 49582 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17728 /* 49585 */ GIR_MergeMemOperands, /*InsnID*/0, /*NumInsns*/2, /*MergeInsnID's*/0, 1,
17729 /* 49590 */ GIR_RootConstrainSelectedInstOperands,
17730 /* 49591 */ // GIR_Coverage, 884,
17731 /* 49591 */ GIR_EraseRootFromParent_Done,
17732 /* 49592 */ // Label 1569: @49592
17733 /* 49592 */ GIM_Try, /*On fail goto*//*Label 1570*/ GIMT_Encode4(49623), // Rule ID 982 //
17734 /* 49597 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17735 /* 49601 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_FCONSTANT),
17736 /* 49605 */ // MIs[1] Operand 1
17737 /* 49605 */ // No operand predicates
17738 /* 49605 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17739 /* 49607 */ // (splat_vector:{ *:[v2f64] } (fpimm:{ *:[f64] }):$x) => (CONST_V128_F64x2:{ *:[v2f64] } (fpimm:{ *:[f64] }):$x, (fpimm:{ *:[f64] }):$x)
17740 /* 49607 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_F64x2),
17741 /* 49610 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17742 /* 49612 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17743 /* 49615 */ GIR_CopyFConstantAsFPImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17744 /* 49618 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17745 /* 49621 */ GIR_RootConstrainSelectedInstOperands,
17746 /* 49622 */ // GIR_Coverage, 982,
17747 /* 49622 */ GIR_EraseRootFromParent_Done,
17748 /* 49623 */ // Label 1570: @49623
17749 /* 49623 */ GIM_Try, /*On fail goto*//*Label 1571*/ GIMT_Encode4(49654), // Rule ID 980 //
17750 /* 49628 */ GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
17751 /* 49632 */ GIM_CheckOpcode, /*MI*/1, GIMT_Encode2(TargetOpcode::G_CONSTANT),
17752 /* 49636 */ // MIs[1] Operand 1
17753 /* 49636 */ // No operand predicates
17754 /* 49636 */ GIM_CheckIsSafeToFold, /*NumInsns*/1,
17755 /* 49638 */ // (splat_vector:{ *:[v2i64] } (imm:{ *:[i64] }):$x) => (CONST_V128_I64x2:{ *:[v2i64] } (imm:{ *:[i64] }):$x, (imm:{ *:[i64] }):$x)
17756 /* 49638 */ GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(WebAssembly::CONST_V128_I64x2),
17757 /* 49641 */ GIR_RootToRootCopy, /*OpIdx*/0, // DstI[dst]
17758 /* 49643 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17759 /* 49646 */ GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // x
17760 /* 49649 */ GIR_SetImplicitDefDead, /*InsnID*/0, /*OpIdx for WebAssembly::ARGUMENTS*/0,
17761 /* 49652 */ GIR_RootConstrainSelectedInstOperands,
17762 /* 49653 */ // GIR_Coverage, 980,
17763 /* 49653 */ GIR_EraseRootFromParent_Done,
17764 /* 49654 */ // Label 1571: @49654
17765 /* 49654 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1572*/ GIMT_Encode4(49678), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 183 //
17766 /* 49661 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
17767 /* 49665 */ // (splat_vector:{ *:[v2i64] } I64:{ *:[i64] }:$x) => (SPLAT_I64x2:{ *:[v2i64] } I64:{ *:[i64] }:$x)
17768 /* 49665 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_I64x2),
17769 /* 49670 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17770 /* 49676 */ GIR_RootConstrainSelectedInstOperands,
17771 /* 49677 */ // GIR_Coverage, 183,
17772 /* 49677 */ GIR_Done,
17773 /* 49678 */ // Label 1572: @49678
17774 /* 49678 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1573*/ GIMT_Encode4(49702), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 185 //
17775 /* 49685 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
17776 /* 49689 */ // (splat_vector:{ *:[v2f64] } F64:{ *:[f64] }:$x) => (SPLAT_F64x2:{ *:[v2f64] } F64:{ *:[f64] }:$x)
17777 /* 49689 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SPLAT_F64x2),
17778 /* 49694 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17779 /* 49700 */ GIR_RootConstrainSelectedInstOperands,
17780 /* 49701 */ // GIR_Coverage, 185,
17781 /* 49701 */ GIR_Done,
17782 /* 49702 */ // Label 1573: @49702
17783 /* 49702 */ GIM_Reject,
17784 /* 49703 */ // Label 1565: @49703
17785 /* 49703 */ GIM_Reject,
17786 /* 49704 */ // Label 1545: @49704
17787 /* 49704 */ GIM_Reject,
17788 /* 49705 */ // Label 71: @49705
17789 /* 49705 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1576*/ GIMT_Encode4(49784),
17790 /* 49716 */ /*GILLT_i32*//*Label 1574*/ GIMT_Encode4(49724),
17791 /* 49720 */ /*GILLT_i64*//*Label 1575*/ GIMT_Encode4(49754),
17792 /* 49724 */ // Label 1574: @49724
17793 /* 49724 */ GIM_Try, /*On fail goto*//*Label 1577*/ GIMT_Encode4(49753), // Rule ID 116 //
17794 /* 49729 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
17795 /* 49732 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
17796 /* 49736 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
17797 /* 49740 */ // (cttz:{ *:[i32] } I32:{ *:[i32] }:$src) => (CTZ_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
17798 /* 49740 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CTZ_I32),
17799 /* 49745 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17800 /* 49751 */ GIR_RootConstrainSelectedInstOperands,
17801 /* 49752 */ // GIR_Coverage, 116,
17802 /* 49752 */ GIR_Done,
17803 /* 49753 */ // Label 1577: @49753
17804 /* 49753 */ GIM_Reject,
17805 /* 49754 */ // Label 1575: @49754
17806 /* 49754 */ GIM_Try, /*On fail goto*//*Label 1578*/ GIMT_Encode4(49783), // Rule ID 117 //
17807 /* 49759 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
17808 /* 49762 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
17809 /* 49766 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
17810 /* 49770 */ // (cttz:{ *:[i64] } I64:{ *:[i64] }:$src) => (CTZ_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
17811 /* 49770 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CTZ_I64),
17812 /* 49775 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17813 /* 49781 */ GIR_RootConstrainSelectedInstOperands,
17814 /* 49782 */ // GIR_Coverage, 117,
17815 /* 49782 */ GIR_Done,
17816 /* 49783 */ // Label 1578: @49783
17817 /* 49783 */ GIM_Reject,
17818 /* 49784 */ // Label 1576: @49784
17819 /* 49784 */ GIM_Reject,
17820 /* 49785 */ // Label 72: @49785
17821 /* 49785 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(4), /*)*//*default:*//*Label 1581*/ GIMT_Encode4(49864),
17822 /* 49796 */ /*GILLT_i32*//*Label 1579*/ GIMT_Encode4(49804),
17823 /* 49800 */ /*GILLT_i64*//*Label 1580*/ GIMT_Encode4(49834),
17824 /* 49804 */ // Label 1579: @49804
17825 /* 49804 */ GIM_Try, /*On fail goto*//*Label 1582*/ GIMT_Encode4(49833), // Rule ID 114 //
17826 /* 49809 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
17827 /* 49812 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
17828 /* 49816 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
17829 /* 49820 */ // (ctlz:{ *:[i32] } I32:{ *:[i32] }:$src) => (CLZ_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
17830 /* 49820 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CLZ_I32),
17831 /* 49825 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17832 /* 49831 */ GIR_RootConstrainSelectedInstOperands,
17833 /* 49832 */ // GIR_Coverage, 114,
17834 /* 49832 */ GIR_Done,
17835 /* 49833 */ // Label 1582: @49833
17836 /* 49833 */ GIM_Reject,
17837 /* 49834 */ // Label 1580: @49834
17838 /* 49834 */ GIM_Try, /*On fail goto*//*Label 1583*/ GIMT_Encode4(49863), // Rule ID 115 //
17839 /* 49839 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
17840 /* 49842 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
17841 /* 49846 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
17842 /* 49850 */ // (ctlz:{ *:[i64] } I64:{ *:[i64] }:$src) => (CLZ_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
17843 /* 49850 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CLZ_I64),
17844 /* 49855 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17845 /* 49861 */ GIR_RootConstrainSelectedInstOperands,
17846 /* 49862 */ // GIR_Coverage, 115,
17847 /* 49862 */ GIR_Done,
17848 /* 49863 */ // Label 1583: @49863
17849 /* 49863 */ GIM_Reject,
17850 /* 49864 */ // Label 1581: @49864
17851 /* 49864 */ GIM_Reject,
17852 /* 49865 */ // Label 73: @49865
17853 /* 49865 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(2), GIMT_Encode2(13), /*)*//*default:*//*Label 1587*/ GIMT_Encode4(50012),
17854 /* 49876 */ /*GILLT_i32*//*Label 1584*/ GIMT_Encode4(49920),
17855 /* 49880 */ /*GILLT_i64*//*Label 1585*/ GIMT_Encode4(49950), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
17856 /* 49916 */ /*GILLT_v16i8*//*Label 1586*/ GIMT_Encode4(49980),
17857 /* 49920 */ // Label 1584: @49920
17858 /* 49920 */ GIM_Try, /*On fail goto*//*Label 1588*/ GIMT_Encode4(49949), // Rule ID 118 //
17859 /* 49925 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i32,
17860 /* 49928 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
17861 /* 49932 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I32RegClassID),
17862 /* 49936 */ // (ctpop:{ *:[i32] } I32:{ *:[i32] }:$src) => (POPCNT_I32:{ *:[i32] } I32:{ *:[i32] }:$src)
17863 /* 49936 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::POPCNT_I32),
17864 /* 49941 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17865 /* 49947 */ GIR_RootConstrainSelectedInstOperands,
17866 /* 49948 */ // GIR_Coverage, 118,
17867 /* 49948 */ GIR_Done,
17868 /* 49949 */ // Label 1588: @49949
17869 /* 49949 */ GIM_Reject,
17870 /* 49950 */ // Label 1585: @49950
17871 /* 49950 */ GIM_Try, /*On fail goto*//*Label 1589*/ GIMT_Encode4(49979), // Rule ID 119 //
17872 /* 49955 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_i64,
17873 /* 49958 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
17874 /* 49962 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::I64RegClassID),
17875 /* 49966 */ // (ctpop:{ *:[i64] } I64:{ *:[i64] }:$src) => (POPCNT_I64:{ *:[i64] } I64:{ *:[i64] }:$src)
17876 /* 49966 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::POPCNT_I64),
17877 /* 49971 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17878 /* 49977 */ GIR_RootConstrainSelectedInstOperands,
17879 /* 49978 */ // GIR_Coverage, 119,
17880 /* 49978 */ GIR_Done,
17881 /* 49979 */ // Label 1589: @49979
17882 /* 49979 */ GIM_Reject,
17883 /* 49980 */ // Label 1586: @49980
17884 /* 49980 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1590*/ GIMT_Encode4(50011), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 257 //
17885 /* 49987 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v16i8,
17886 /* 49990 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17887 /* 49994 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17888 /* 49998 */ // (ctpop:{ *:[v16i8] } V128:{ *:[v16i8] }:$v) => (POPCNT_I8x16:{ *:[v16i8] } V128:{ *:[v16i8] }:$v)
17889 /* 49998 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::POPCNT_I8x16),
17890 /* 50003 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17891 /* 50009 */ GIR_RootConstrainSelectedInstOperands,
17892 /* 50010 */ // GIR_Coverage, 257,
17893 /* 50010 */ GIR_Done,
17894 /* 50011 */ // Label 1590: @50011
17895 /* 50011 */ GIM_Reject,
17896 /* 50012 */ // Label 1587: @50012
17897 /* 50012 */ GIM_Reject,
17898 /* 50013 */ // Label 74: @50013
17899 /* 50013 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1596*/ GIMT_Encode4(50240),
17900 /* 50024 */ /*GILLT_f32*//*Label 1591*/ GIMT_Encode4(50084),
17901 /* 50028 */ /*GILLT_f64*//*Label 1592*/ GIMT_Encode4(50114), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
17902 /* 50072 */ /*GILLT_v8f16*//*Label 1593*/ GIMT_Encode4(50144),
17903 /* 50076 */ /*GILLT_v4f32*//*Label 1594*/ GIMT_Encode4(50176),
17904 /* 50080 */ /*GILLT_v2f64*//*Label 1595*/ GIMT_Encode4(50208),
17905 /* 50084 */ // Label 1591: @50084
17906 /* 50084 */ GIM_Try, /*On fail goto*//*Label 1597*/ GIMT_Encode4(50113), // Rule ID 144 //
17907 /* 50089 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
17908 /* 50092 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
17909 /* 50096 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
17910 /* 50100 */ // (fceil:{ *:[f32] } F32:{ *:[f32] }:$src) => (CEIL_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
17911 /* 50100 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F32),
17912 /* 50105 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17913 /* 50111 */ GIR_RootConstrainSelectedInstOperands,
17914 /* 50112 */ // GIR_Coverage, 144,
17915 /* 50112 */ GIR_Done,
17916 /* 50113 */ // Label 1597: @50113
17917 /* 50113 */ GIM_Reject,
17918 /* 50114 */ // Label 1592: @50114
17919 /* 50114 */ GIM_Try, /*On fail goto*//*Label 1598*/ GIMT_Encode4(50143), // Rule ID 145 //
17920 /* 50119 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
17921 /* 50122 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
17922 /* 50126 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
17923 /* 50130 */ // (fceil:{ *:[f64] } F64:{ *:[f64] }:$src) => (CEIL_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
17924 /* 50130 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F64),
17925 /* 50135 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17926 /* 50141 */ GIR_RootConstrainSelectedInstOperands,
17927 /* 50142 */ // GIR_Coverage, 145,
17928 /* 50142 */ GIR_Done,
17929 /* 50143 */ // Label 1598: @50143
17930 /* 50143 */ GIM_Reject,
17931 /* 50144 */ // Label 1593: @50144
17932 /* 50144 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1599*/ GIMT_Encode4(50175), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 341 //
17933 /* 50151 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
17934 /* 50154 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17935 /* 50158 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17936 /* 50162 */ // (fceil:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (CEIL_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
17937 /* 50162 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F16x8),
17938 /* 50167 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17939 /* 50173 */ GIR_RootConstrainSelectedInstOperands,
17940 /* 50174 */ // GIR_Coverage, 341,
17941 /* 50174 */ GIR_Done,
17942 /* 50175 */ // Label 1599: @50175
17943 /* 50175 */ GIM_Reject,
17944 /* 50176 */ // Label 1594: @50176
17945 /* 50176 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1600*/ GIMT_Encode4(50207), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 333 //
17946 /* 50183 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
17947 /* 50186 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17948 /* 50190 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17949 /* 50194 */ // (fceil:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (CEIL_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
17950 /* 50194 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F32x4),
17951 /* 50199 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17952 /* 50205 */ GIR_RootConstrainSelectedInstOperands,
17953 /* 50206 */ // GIR_Coverage, 333,
17954 /* 50206 */ GIR_Done,
17955 /* 50207 */ // Label 1600: @50207
17956 /* 50207 */ GIM_Reject,
17957 /* 50208 */ // Label 1595: @50208
17958 /* 50208 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1601*/ GIMT_Encode4(50239), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 337 //
17959 /* 50215 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
17960 /* 50218 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17961 /* 50222 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
17962 /* 50226 */ // (fceil:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (CEIL_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
17963 /* 50226 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::CEIL_F64x2),
17964 /* 50231 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17965 /* 50237 */ GIR_RootConstrainSelectedInstOperands,
17966 /* 50238 */ // GIR_Coverage, 337,
17967 /* 50238 */ GIR_Done,
17968 /* 50239 */ // Label 1601: @50239
17969 /* 50239 */ GIM_Reject,
17970 /* 50240 */ // Label 1596: @50240
17971 /* 50240 */ GIM_Reject,
17972 /* 50241 */ // Label 75: @50241
17973 /* 50241 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1607*/ GIMT_Encode4(50468),
17974 /* 50252 */ /*GILLT_f32*//*Label 1602*/ GIMT_Encode4(50312),
17975 /* 50256 */ /*GILLT_f64*//*Label 1603*/ GIMT_Encode4(50342), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
17976 /* 50300 */ /*GILLT_v8f16*//*Label 1604*/ GIMT_Encode4(50372),
17977 /* 50304 */ /*GILLT_v4f32*//*Label 1605*/ GIMT_Encode4(50404),
17978 /* 50308 */ /*GILLT_v2f64*//*Label 1606*/ GIMT_Encode4(50436),
17979 /* 50312 */ // Label 1602: @50312
17980 /* 50312 */ GIM_Try, /*On fail goto*//*Label 1608*/ GIMT_Encode4(50341), // Rule ID 132 //
17981 /* 50317 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
17982 /* 50320 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
17983 /* 50324 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
17984 /* 50328 */ // (fsqrt:{ *:[f32] } F32:{ *:[f32] }:$src) => (SQRT_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
17985 /* 50328 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F32),
17986 /* 50333 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
17987 /* 50339 */ GIR_RootConstrainSelectedInstOperands,
17988 /* 50340 */ // GIR_Coverage, 132,
17989 /* 50340 */ GIR_Done,
17990 /* 50341 */ // Label 1608: @50341
17991 /* 50341 */ GIM_Reject,
17992 /* 50342 */ // Label 1603: @50342
17993 /* 50342 */ GIM_Try, /*On fail goto*//*Label 1609*/ GIMT_Encode4(50371), // Rule ID 133 //
17994 /* 50347 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
17995 /* 50350 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
17996 /* 50354 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
17997 /* 50358 */ // (fsqrt:{ *:[f64] } F64:{ *:[f64] }:$src) => (SQRT_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
17998 /* 50358 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F64),
17999 /* 50363 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18000 /* 50369 */ GIR_RootConstrainSelectedInstOperands,
18001 /* 50370 */ // GIR_Coverage, 133,
18002 /* 50370 */ GIR_Done,
18003 /* 50371 */ // Label 1609: @50371
18004 /* 50371 */ GIM_Reject,
18005 /* 50372 */ // Label 1604: @50372
18006 /* 50372 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1610*/ GIMT_Encode4(50403), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 332 //
18007 /* 50379 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
18008 /* 50382 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18009 /* 50386 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18010 /* 50390 */ // (fsqrt:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (SQRT_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
18011 /* 50390 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F16x8),
18012 /* 50395 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18013 /* 50401 */ GIR_RootConstrainSelectedInstOperands,
18014 /* 50402 */ // GIR_Coverage, 332,
18015 /* 50402 */ GIR_Done,
18016 /* 50403 */ // Label 1610: @50403
18017 /* 50403 */ GIM_Reject,
18018 /* 50404 */ // Label 1605: @50404
18019 /* 50404 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1611*/ GIMT_Encode4(50435), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 330 //
18020 /* 50411 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
18021 /* 50414 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18022 /* 50418 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18023 /* 50422 */ // (fsqrt:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (SQRT_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
18024 /* 50422 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F32x4),
18025 /* 50427 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18026 /* 50433 */ GIR_RootConstrainSelectedInstOperands,
18027 /* 50434 */ // GIR_Coverage, 330,
18028 /* 50434 */ GIR_Done,
18029 /* 50435 */ // Label 1611: @50435
18030 /* 50435 */ GIM_Reject,
18031 /* 50436 */ // Label 1606: @50436
18032 /* 50436 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1612*/ GIMT_Encode4(50467), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 331 //
18033 /* 50443 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
18034 /* 50446 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18035 /* 50450 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18036 /* 50454 */ // (fsqrt:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (SQRT_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
18037 /* 50454 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::SQRT_F64x2),
18038 /* 50459 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18039 /* 50465 */ GIR_RootConstrainSelectedInstOperands,
18040 /* 50466 */ // GIR_Coverage, 331,
18041 /* 50466 */ GIR_Done,
18042 /* 50467 */ // Label 1612: @50467
18043 /* 50467 */ GIM_Reject,
18044 /* 50468 */ // Label 1607: @50468
18045 /* 50468 */ GIM_Reject,
18046 /* 50469 */ // Label 76: @50469
18047 /* 50469 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1618*/ GIMT_Encode4(50696),
18048 /* 50480 */ /*GILLT_f32*//*Label 1613*/ GIMT_Encode4(50540),
18049 /* 50484 */ /*GILLT_f64*//*Label 1614*/ GIMT_Encode4(50570), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
18050 /* 50528 */ /*GILLT_v8f16*//*Label 1615*/ GIMT_Encode4(50600),
18051 /* 50532 */ /*GILLT_v4f32*//*Label 1616*/ GIMT_Encode4(50632),
18052 /* 50536 */ /*GILLT_v2f64*//*Label 1617*/ GIMT_Encode4(50664),
18053 /* 50540 */ // Label 1613: @50540
18054 /* 50540 */ GIM_Try, /*On fail goto*//*Label 1619*/ GIMT_Encode4(50569), // Rule ID 146 //
18055 /* 50545 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
18056 /* 50548 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
18057 /* 50552 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
18058 /* 50556 */ // (ffloor:{ *:[f32] } F32:{ *:[f32] }:$src) => (FLOOR_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
18059 /* 50556 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F32),
18060 /* 50561 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18061 /* 50567 */ GIR_RootConstrainSelectedInstOperands,
18062 /* 50568 */ // GIR_Coverage, 146,
18063 /* 50568 */ GIR_Done,
18064 /* 50569 */ // Label 1619: @50569
18065 /* 50569 */ GIM_Reject,
18066 /* 50570 */ // Label 1614: @50570
18067 /* 50570 */ GIM_Try, /*On fail goto*//*Label 1620*/ GIMT_Encode4(50599), // Rule ID 147 //
18068 /* 50575 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
18069 /* 50578 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
18070 /* 50582 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
18071 /* 50586 */ // (ffloor:{ *:[f64] } F64:{ *:[f64] }:$src) => (FLOOR_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
18072 /* 50586 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F64),
18073 /* 50591 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18074 /* 50597 */ GIR_RootConstrainSelectedInstOperands,
18075 /* 50598 */ // GIR_Coverage, 147,
18076 /* 50598 */ GIR_Done,
18077 /* 50599 */ // Label 1620: @50599
18078 /* 50599 */ GIM_Reject,
18079 /* 50600 */ // Label 1615: @50600
18080 /* 50600 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1621*/ GIMT_Encode4(50631), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 342 //
18081 /* 50607 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
18082 /* 50610 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18083 /* 50614 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18084 /* 50618 */ // (ffloor:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (FLOOR_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
18085 /* 50618 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F16x8),
18086 /* 50623 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18087 /* 50629 */ GIR_RootConstrainSelectedInstOperands,
18088 /* 50630 */ // GIR_Coverage, 342,
18089 /* 50630 */ GIR_Done,
18090 /* 50631 */ // Label 1621: @50631
18091 /* 50631 */ GIM_Reject,
18092 /* 50632 */ // Label 1616: @50632
18093 /* 50632 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1622*/ GIMT_Encode4(50663), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 334 //
18094 /* 50639 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
18095 /* 50642 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18096 /* 50646 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18097 /* 50650 */ // (ffloor:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (FLOOR_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
18098 /* 50650 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F32x4),
18099 /* 50655 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18100 /* 50661 */ GIR_RootConstrainSelectedInstOperands,
18101 /* 50662 */ // GIR_Coverage, 334,
18102 /* 50662 */ GIR_Done,
18103 /* 50663 */ // Label 1622: @50663
18104 /* 50663 */ GIM_Reject,
18105 /* 50664 */ // Label 1617: @50664
18106 /* 50664 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1623*/ GIMT_Encode4(50695), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 338 //
18107 /* 50671 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
18108 /* 50674 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18109 /* 50678 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18110 /* 50682 */ // (ffloor:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (FLOOR_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
18111 /* 50682 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::FLOOR_F64x2),
18112 /* 50687 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18113 /* 50693 */ GIR_RootConstrainSelectedInstOperands,
18114 /* 50694 */ // GIR_Coverage, 338,
18115 /* 50694 */ GIR_Done,
18116 /* 50695 */ // Label 1623: @50695
18117 /* 50695 */ GIM_Reject,
18118 /* 50696 */ // Label 1618: @50696
18119 /* 50696 */ GIM_Reject,
18120 /* 50697 */ // Label 77: @50697
18121 /* 50697 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1629*/ GIMT_Encode4(50910),
18122 /* 50708 */ /*GILLT_f32*//*Label 1624*/ GIMT_Encode4(50768),
18123 /* 50712 */ /*GILLT_f64*//*Label 1625*/ GIMT_Encode4(50794), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
18124 /* 50756 */ /*GILLT_v8f16*//*Label 1626*/ GIMT_Encode4(50820),
18125 /* 50760 */ /*GILLT_v4f32*//*Label 1627*/ GIMT_Encode4(50850),
18126 /* 50764 */ /*GILLT_v2f64*//*Label 1628*/ GIMT_Encode4(50880),
18127 /* 50768 */ // Label 1624: @50768
18128 /* 50768 */ GIM_Try, /*On fail goto*//*Label 1630*/ GIMT_Encode4(50793), // Rule ID 641 //
18129 /* 50773 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
18130 /* 50776 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
18131 /* 50780 */ // (frint:{ *:[f32] } f32:{ *:[f32] }:$src) => (NEAREST_F32:{ *:[f32] } f32:{ *:[f32] }:$src)
18132 /* 50780 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32),
18133 /* 50785 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18134 /* 50791 */ GIR_RootConstrainSelectedInstOperands,
18135 /* 50792 */ // GIR_Coverage, 641,
18136 /* 50792 */ GIR_Done,
18137 /* 50793 */ // Label 1630: @50793
18138 /* 50793 */ GIM_Reject,
18139 /* 50794 */ // Label 1625: @50794
18140 /* 50794 */ GIM_Try, /*On fail goto*//*Label 1631*/ GIMT_Encode4(50819), // Rule ID 642 //
18141 /* 50799 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
18142 /* 50802 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
18143 /* 50806 */ // (frint:{ *:[f64] } f64:{ *:[f64] }:$src) => (NEAREST_F64:{ *:[f64] } f64:{ *:[f64] }:$src)
18144 /* 50806 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64),
18145 /* 50811 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18146 /* 50817 */ GIR_RootConstrainSelectedInstOperands,
18147 /* 50818 */ // GIR_Coverage, 642,
18148 /* 50818 */ GIR_Done,
18149 /* 50819 */ // Label 1631: @50819
18150 /* 50819 */ GIM_Reject,
18151 /* 50820 */ // Label 1626: @50820
18152 /* 50820 */ GIM_Try, /*On fail goto*//*Label 1632*/ GIMT_Encode4(50849), // Rule ID 1170 //
18153 /* 50825 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
18154 /* 50828 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18155 /* 50832 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18156 /* 50836 */ // (frint:{ *:[v8f16] } V128:{ *:[v8f16] }:$src) => (NEAREST_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$src)
18157 /* 50836 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F16x8),
18158 /* 50841 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18159 /* 50847 */ GIR_RootConstrainSelectedInstOperands,
18160 /* 50848 */ // GIR_Coverage, 1170,
18161 /* 50848 */ GIR_Done,
18162 /* 50849 */ // Label 1632: @50849
18163 /* 50849 */ GIM_Reject,
18164 /* 50850 */ // Label 1627: @50850
18165 /* 50850 */ GIM_Try, /*On fail goto*//*Label 1633*/ GIMT_Encode4(50879), // Rule ID 1168 //
18166 /* 50855 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
18167 /* 50858 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18168 /* 50862 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18169 /* 50866 */ // (frint:{ *:[v4f32] } V128:{ *:[v4f32] }:$src) => (NEAREST_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$src)
18170 /* 50866 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32x4),
18171 /* 50871 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18172 /* 50877 */ GIR_RootConstrainSelectedInstOperands,
18173 /* 50878 */ // GIR_Coverage, 1168,
18174 /* 50878 */ GIR_Done,
18175 /* 50879 */ // Label 1633: @50879
18176 /* 50879 */ GIM_Reject,
18177 /* 50880 */ // Label 1628: @50880
18178 /* 50880 */ GIM_Try, /*On fail goto*//*Label 1634*/ GIMT_Encode4(50909), // Rule ID 1169 //
18179 /* 50885 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
18180 /* 50888 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18181 /* 50892 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18182 /* 50896 */ // (frint:{ *:[v2f64] } V128:{ *:[v2f64] }:$src) => (NEAREST_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$src)
18183 /* 50896 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64x2),
18184 /* 50901 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18185 /* 50907 */ GIR_RootConstrainSelectedInstOperands,
18186 /* 50908 */ // GIR_Coverage, 1169,
18187 /* 50908 */ GIR_Done,
18188 /* 50909 */ // Label 1634: @50909
18189 /* 50909 */ GIM_Reject,
18190 /* 50910 */ // Label 1629: @50910
18191 /* 50910 */ GIM_Reject,
18192 /* 50911 */ // Label 78: @50911
18193 /* 50911 */ GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/GIMT_Encode2(4), GIMT_Encode2(19), /*)*//*default:*//*Label 1640*/ GIMT_Encode4(51138),
18194 /* 50922 */ /*GILLT_f32*//*Label 1635*/ GIMT_Encode4(50982),
18195 /* 50926 */ /*GILLT_f64*//*Label 1636*/ GIMT_Encode4(51012), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
18196 /* 50970 */ /*GILLT_v8f16*//*Label 1637*/ GIMT_Encode4(51042),
18197 /* 50974 */ /*GILLT_v4f32*//*Label 1638*/ GIMT_Encode4(51074),
18198 /* 50978 */ /*GILLT_v2f64*//*Label 1639*/ GIMT_Encode4(51106),
18199 /* 50982 */ // Label 1635: @50982
18200 /* 50982 */ GIM_Try, /*On fail goto*//*Label 1641*/ GIMT_Encode4(51011), // Rule ID 150 //
18201 /* 50987 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f32,
18202 /* 50990 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
18203 /* 50994 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F32RegClassID),
18204 /* 50998 */ // (fnearbyint:{ *:[f32] } F32:{ *:[f32] }:$src) => (NEAREST_F32:{ *:[f32] } F32:{ *:[f32] }:$src)
18205 /* 50998 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32),
18206 /* 51003 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18207 /* 51009 */ GIR_RootConstrainSelectedInstOperands,
18208 /* 51010 */ // GIR_Coverage, 150,
18209 /* 51010 */ GIR_Done,
18210 /* 51011 */ // Label 1641: @51011
18211 /* 51011 */ GIM_Reject,
18212 /* 51012 */ // Label 1636: @51012
18213 /* 51012 */ GIM_Try, /*On fail goto*//*Label 1642*/ GIMT_Encode4(51041), // Rule ID 151 //
18214 /* 51017 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_f64,
18215 /* 51020 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
18216 /* 51024 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::F64RegClassID),
18217 /* 51028 */ // (fnearbyint:{ *:[f64] } F64:{ *:[f64] }:$src) => (NEAREST_F64:{ *:[f64] } F64:{ *:[f64] }:$src)
18218 /* 51028 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64),
18219 /* 51033 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18220 /* 51039 */ GIR_RootConstrainSelectedInstOperands,
18221 /* 51040 */ // GIR_Coverage, 151,
18222 /* 51040 */ GIR_Done,
18223 /* 51041 */ // Label 1642: @51041
18224 /* 51041 */ GIM_Reject,
18225 /* 51042 */ // Label 1637: @51042
18226 /* 51042 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1643*/ GIMT_Encode4(51073), GIMT_Encode2(GIFBS_HasFP16_HasSIMD128), // Rule ID 344 //
18227 /* 51049 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v8f16,
18228 /* 51052 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18229 /* 51056 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18230 /* 51060 */ // (fnearbyint:{ *:[v8f16] } V128:{ *:[v8f16] }:$v) => (NEAREST_F16x8:{ *:[v8f16] } V128:{ *:[v8f16] }:$v)
18231 /* 51060 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F16x8),
18232 /* 51065 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18233 /* 51071 */ GIR_RootConstrainSelectedInstOperands,
18234 /* 51072 */ // GIR_Coverage, 344,
18235 /* 51072 */ GIR_Done,
18236 /* 51073 */ // Label 1643: @51073
18237 /* 51073 */ GIM_Reject,
18238 /* 51074 */ // Label 1638: @51074
18239 /* 51074 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1644*/ GIMT_Encode4(51105), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 336 //
18240 /* 51081 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v4f32,
18241 /* 51084 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18242 /* 51088 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18243 /* 51092 */ // (fnearbyint:{ *:[v4f32] } V128:{ *:[v4f32] }:$v) => (NEAREST_F32x4:{ *:[v4f32] } V128:{ *:[v4f32] }:$v)
18244 /* 51092 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F32x4),
18245 /* 51097 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18246 /* 51103 */ GIR_RootConstrainSelectedInstOperands,
18247 /* 51104 */ // GIR_Coverage, 336,
18248 /* 51104 */ GIR_Done,
18249 /* 51105 */ // Label 1644: @51105
18250 /* 51105 */ GIM_Reject,
18251 /* 51106 */ // Label 1639: @51106
18252 /* 51106 */ GIM_Try_CheckFeatures, /*On fail goto*//*Label 1645*/ GIMT_Encode4(51137), GIMT_Encode2(GIFBS_HasSIMD128), // Rule ID 340 //
18253 /* 51113 */ GIM_RootCheckType, /*Op*/1, /*Type*/GILLT_v2f64,
18254 /* 51116 */ GIM_RootCheckRegBankForClass, /*Op*/0, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18255 /* 51120 */ GIM_RootCheckRegBankForClass, /*Op*/1, /*RC*/GIMT_Encode2(WebAssembly::V128RegClassID),
18256 /* 51124 */ // (fnearbyint:{ *:[v2f64] } V128:{ *:[v2f64] }:$v) => (NEAREST_F64x2:{ *:[v2f64] } V128:{ *:[v2f64] }:$v)
18257 /* 51124 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::NEAREST_F64x2),
18258 /* 51129 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18259 /* 51135 */ GIR_RootConstrainSelectedInstOperands,
18260 /* 51136 */ // GIR_Coverage, 340,
18261 /* 51136 */ GIR_Done,
18262 /* 51137 */ // Label 1645: @51137
18263 /* 51137 */ GIM_Reject,
18264 /* 51138 */ // Label 1640: @51138
18265 /* 51138 */ GIM_Reject,
18266 /* 51139 */ // Label 79: @51139
18267 /* 51139 */ GIM_Try, /*On fail goto*//*Label 1646*/ GIMT_Encode4(51157), // Rule ID 22 //
18268 /* 51144 */ // (trap) => (UNREACHABLE)
18269 /* 51144 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::UNREACHABLE),
18270 /* 51149 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18271 /* 51155 */ GIR_RootConstrainSelectedInstOperands,
18272 /* 51156 */ // GIR_Coverage, 22,
18273 /* 51156 */ GIR_Done,
18274 /* 51157 */ // Label 1646: @51157
18275 /* 51157 */ GIM_Reject,
18276 /* 51158 */ // Label 80: @51158
18277 /* 51158 */ GIM_Try, /*On fail goto*//*Label 1647*/ GIMT_Encode4(51176), // Rule ID 23 //
18278 /* 51163 */ // (debugtrap) => (DEBUG_UNREACHABLE)
18279 /* 51163 */ GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/GIMT_Encode2(WebAssembly::DEBUG_UNREACHABLE),
18280 /* 51168 */ GIR_AddImplicitDef, /*InsnID*/0, GIMT_Encode2(WebAssembly::ARGUMENTS), GIMT_Encode2(static_cast<unsigned>(RegState::Dead)),
18281 /* 51174 */ GIR_RootConstrainSelectedInstOperands,
18282 /* 51175 */ // GIR_Coverage, 23,
18283 /* 51175 */ GIR_Done,
18284 /* 51176 */ // Label 1647: @51176
18285 /* 51176 */ GIM_Reject,
18286 /* 51177 */ // Label 81: @51177
18287 /* 51177 */ GIM_Reject,
18288 /* 51178 */ }; // Size: 51178 bytes
18289 return MatchTable0;
18290}
18291#undef GIMT_Encode2
18292#undef GIMT_Encode4
18293#undef GIMT_Encode8
18294
18295
18296#endif // GET_GLOBALISEL_IMPL
18297
18298#ifdef GET_GLOBALISEL_PREDICATES_DECL
18299
18300PredicateBitset AvailableModuleFeatures;
18301mutable PredicateBitset AvailableFunctionFeatures;
18302PredicateBitset getAvailableFeatures() const {
18303 return AvailableModuleFeatures | AvailableFunctionFeatures;
18304}
18305PredicateBitset
18306computeAvailableModuleFeatures(const WebAssemblySubtarget *Subtarget) const;
18307PredicateBitset
18308computeAvailableFunctionFeatures(const WebAssemblySubtarget *Subtarget,
18309 const MachineFunction *MF) const;
18310void setupGeneratedPerFunctionState(MachineFunction &MF) override;
18311
18312#endif // GET_GLOBALISEL_PREDICATES_DECL
18313
18314#ifdef GET_GLOBALISEL_PREDICATES_INIT
18315
18316AvailableModuleFeatures(computeAvailableModuleFeatures(&STI)),
18317AvailableFunctionFeatures()
18318
18319#endif // GET_GLOBALISEL_PREDICATES_INIT
18320
18321