1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Register Bank Source Fragments *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_REGBANK_DECLARATIONS
10#undef GET_REGBANK_DECLARATIONS
11
12namespace llvm::WebAssembly {
13
14enum : unsigned {
15 InvalidRegBankID = ~0u,
16 EXNREFRegBankID = 0,
17 EXTERNREFRegBankID = 1,
18 F32RegBankID = 2,
19 F64RegBankID = 3,
20 FUNCREFRegBankID = 4,
21 I32RegBankID = 5,
22 I64RegBankID = 6,
23 V128RegBankID = 7,
24 NumRegisterBanks,
25};
26
27} // namespace llvm::WebAssembly
28
29#endif // GET_REGBANK_DECLARATIONS
30
31#ifdef GET_TARGET_REGBANK_CLASS
32#undef GET_TARGET_REGBANK_CLASS
33
34private:
35 static const RegisterBank *RegBanks[];
36 static const unsigned Sizes[];
37
38public:
39 const RegisterBank &getRegBankFromRegClass(const TargetRegisterClass &RC, LLT Ty) const override;
40protected:
41 WebAssemblyGenRegisterBankInfo(unsigned HwMode = 0);
42
43
44#endif // GET_TARGET_REGBANK_CLASS
45
46#ifdef GET_TARGET_REGBANK_IMPL
47#undef GET_TARGET_REGBANK_IMPL
48
49namespace llvm {
50
51namespace WebAssembly {
52
53const uint32_t EXNREFRegBankCoverageData[] = {
54 // 0-31
55 (1u << (WebAssembly::EXNREFRegClassID - 0)) |
56 0,
57};
58const uint32_t EXTERNREFRegBankCoverageData[] = {
59 // 0-31
60 (1u << (WebAssembly::EXTERNREFRegClassID - 0)) |
61 0,
62};
63const uint32_t F32RegBankCoverageData[] = {
64 // 0-31
65 (1u << (WebAssembly::F32RegClassID - 0)) |
66 0,
67};
68const uint32_t F64RegBankCoverageData[] = {
69 // 0-31
70 (1u << (WebAssembly::F64RegClassID - 0)) |
71 0,
72};
73const uint32_t FUNCREFRegBankCoverageData[] = {
74 // 0-31
75 (1u << (WebAssembly::FUNCREFRegClassID - 0)) |
76 0,
77};
78const uint32_t I32RegBankCoverageData[] = {
79 // 0-31
80 (1u << (WebAssembly::I32RegClassID - 0)) |
81 0,
82};
83const uint32_t I64RegBankCoverageData[] = {
84 // 0-31
85 (1u << (WebAssembly::I64RegClassID - 0)) |
86 0,
87};
88const uint32_t V128RegBankCoverageData[] = {
89 // 0-31
90 (1u << (WebAssembly::V128RegClassID - 0)) |
91 0,
92};
93
94constexpr RegisterBank EXNREFRegBank(/* ID */ WebAssembly::EXNREFRegBankID, /* Name */ "EXNREFRegBank", /* CoveredRegClasses */ EXNREFRegBankCoverageData, /* NumRegClasses */ 8);
95constexpr RegisterBank EXTERNREFRegBank(/* ID */ WebAssembly::EXTERNREFRegBankID, /* Name */ "EXTERNREFRegBank", /* CoveredRegClasses */ EXTERNREFRegBankCoverageData, /* NumRegClasses */ 8);
96constexpr RegisterBank F32RegBank(/* ID */ WebAssembly::F32RegBankID, /* Name */ "F32RegBank", /* CoveredRegClasses */ F32RegBankCoverageData, /* NumRegClasses */ 8);
97constexpr RegisterBank F64RegBank(/* ID */ WebAssembly::F64RegBankID, /* Name */ "F64RegBank", /* CoveredRegClasses */ F64RegBankCoverageData, /* NumRegClasses */ 8);
98constexpr RegisterBank FUNCREFRegBank(/* ID */ WebAssembly::FUNCREFRegBankID, /* Name */ "FUNCREFRegBank", /* CoveredRegClasses */ FUNCREFRegBankCoverageData, /* NumRegClasses */ 8);
99constexpr RegisterBank I32RegBank(/* ID */ WebAssembly::I32RegBankID, /* Name */ "I32RegBank", /* CoveredRegClasses */ I32RegBankCoverageData, /* NumRegClasses */ 8);
100constexpr RegisterBank I64RegBank(/* ID */ WebAssembly::I64RegBankID, /* Name */ "I64RegBank", /* CoveredRegClasses */ I64RegBankCoverageData, /* NumRegClasses */ 8);
101constexpr RegisterBank V128RegBank(/* ID */ WebAssembly::V128RegBankID, /* Name */ "V128RegBank", /* CoveredRegClasses */ V128RegBankCoverageData, /* NumRegClasses */ 8);
102
103} // namespace WebAssembly
104
105const RegisterBank *WebAssemblyGenRegisterBankInfo::RegBanks[] = {
106 &WebAssembly::EXNREFRegBank,
107 &WebAssembly::EXTERNREFRegBank,
108 &WebAssembly::F32RegBank,
109 &WebAssembly::F64RegBank,
110 &WebAssembly::FUNCREFRegBank,
111 &WebAssembly::I32RegBank,
112 &WebAssembly::I64RegBank,
113 &WebAssembly::V128RegBank,
114};
115
116const unsigned WebAssemblyGenRegisterBankInfo::Sizes[] = {
117 // Mode = 0 (DefaultMode)
118 0,
119 0,
120 32,
121 64,
122 0,
123 32,
124 64,
125 128,
126 // Mode = 1 (WASM64)
127 0,
128 0,
129 32,
130 64,
131 0,
132 32,
133 64,
134 128,
135};
136
137WebAssemblyGenRegisterBankInfo::WebAssemblyGenRegisterBankInfo(unsigned HwMode)
138 : RegisterBankInfo(RegBanks, WebAssembly::NumRegisterBanks, Sizes, HwMode) {
139 // Assert that RegBank indices match their ID's
140#ifndef NDEBUG
141 for (auto RB : enumerate(RegBanks))
142 assert(RB.index() == RB.value()->getID() && "Index != ID");
143#endif // NDEBUG
144}
145
146const RegisterBank &
147WebAssemblyGenRegisterBankInfo::getRegBankFromRegClass(const TargetRegisterClass &RC, LLT) const {
148 static const uint32_t RegClass2RegBank[1] = {
149 (uint32_t(WebAssembly::EXNREFRegBankID) << 0) | // EXNREFRegClassID
150 (uint32_t(WebAssembly::EXTERNREFRegBankID) << 4) | // EXTERNREFRegClassID
151 (uint32_t(WebAssembly::FUNCREFRegBankID) << 8) | // FUNCREFRegClassID
152 (uint32_t(WebAssembly::I32RegBankID) << 12) | // I32RegClassID
153 (uint32_t(WebAssembly::F32RegBankID) << 16) | // F32RegClassID
154 (uint32_t(WebAssembly::I64RegBankID) << 20) | // I64RegClassID
155 (uint32_t(WebAssembly::F64RegBankID) << 24) | // F64RegClassID
156 (uint32_t(WebAssembly::V128RegBankID) << 28) // V128RegClassID
157 };
158 const unsigned RegClassID = RC.getID();
159 if (LLVM_LIKELY(RegClassID < 8)) {
160 unsigned RegBankID = (RegClass2RegBank[RegClassID / 8] >> ((RegClassID % 8) * 4)) & 15;
161 return getRegBank(RegBankID);
162 }
163 llvm_unreachable(llvm::Twine("Target needs to handle register class ID 0x").concat(llvm::Twine::utohexstr(RegClassID)).str().c_str());
164}
165
166} // namespace llvm
167
168#endif // GET_TARGET_REGBANK_IMPL
169
170