1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Register Enum Values *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9namespace llvm {
10
11class MCRegisterClass;
12extern const MCRegisterClass X86MCRegisterClasses[];
13
14namespace X86 {
15
16enum : unsigned {
17 NoRegister,
18 AH = 1,
19 AL = 2,
20 AX = 3,
21 BH = 4,
22 BL = 5,
23 BP = 6,
24 BPH = 7,
25 BPL = 8,
26 BX = 9,
27 CH = 10,
28 CL = 11,
29 CS = 12,
30 CX = 13,
31 DF = 14,
32 DH = 15,
33 DI = 16,
34 DIH = 17,
35 DIL = 18,
36 DL = 19,
37 DS = 20,
38 DX = 21,
39 EAX = 22,
40 EBP = 23,
41 EBX = 24,
42 ECX = 25,
43 EDI = 26,
44 EDX = 27,
45 EFLAGS = 28,
46 EIP = 29,
47 EIZ = 30,
48 ES = 31,
49 ESI = 32,
50 ESP = 33,
51 FPCW = 34,
52 FPSW = 35,
53 FS = 36,
54 FS_BASE = 37,
55 GS = 38,
56 GS_BASE = 39,
57 HAX = 40,
58 HBP = 41,
59 HBX = 42,
60 HCX = 43,
61 HDI = 44,
62 HDX = 45,
63 HIP = 46,
64 HSI = 47,
65 HSP = 48,
66 IP = 49,
67 MXCSR = 50,
68 RAX = 51,
69 RBP = 52,
70 RBX = 53,
71 RCX = 54,
72 RDI = 55,
73 RDX = 56,
74 RFLAGS = 57,
75 RIP = 58,
76 RIZ = 59,
77 RSI = 60,
78 RSP = 61,
79 SI = 62,
80 SIH = 63,
81 SIL = 64,
82 SP = 65,
83 SPH = 66,
84 SPL = 67,
85 SS = 68,
86 SSP = 69,
87 _EFLAGS = 70,
88 CR0 = 71,
89 CR1 = 72,
90 CR2 = 73,
91 CR3 = 74,
92 CR4 = 75,
93 CR5 = 76,
94 CR6 = 77,
95 CR7 = 78,
96 CR8 = 79,
97 CR9 = 80,
98 CR10 = 81,
99 CR11 = 82,
100 CR12 = 83,
101 CR13 = 84,
102 CR14 = 85,
103 CR15 = 86,
104 DR0 = 87,
105 DR1 = 88,
106 DR2 = 89,
107 DR3 = 90,
108 DR4 = 91,
109 DR5 = 92,
110 DR6 = 93,
111 DR7 = 94,
112 DR8 = 95,
113 DR9 = 96,
114 DR10 = 97,
115 DR11 = 98,
116 DR12 = 99,
117 DR13 = 100,
118 DR14 = 101,
119 DR15 = 102,
120 FP0 = 103,
121 FP1 = 104,
122 FP2 = 105,
123 FP3 = 106,
124 FP4 = 107,
125 FP5 = 108,
126 FP6 = 109,
127 FP7 = 110,
128 MM0 = 111,
129 MM1 = 112,
130 MM2 = 113,
131 MM3 = 114,
132 MM4 = 115,
133 MM5 = 116,
134 MM6 = 117,
135 MM7 = 118,
136 R8 = 119,
137 R9 = 120,
138 R10 = 121,
139 R11 = 122,
140 R12 = 123,
141 R13 = 124,
142 R14 = 125,
143 R15 = 126,
144 ST0 = 127,
145 ST1 = 128,
146 ST2 = 129,
147 ST3 = 130,
148 ST4 = 131,
149 ST5 = 132,
150 ST6 = 133,
151 ST7 = 134,
152 XMM0 = 135,
153 XMM1 = 136,
154 XMM2 = 137,
155 XMM3 = 138,
156 XMM4 = 139,
157 XMM5 = 140,
158 XMM6 = 141,
159 XMM7 = 142,
160 XMM8 = 143,
161 XMM9 = 144,
162 XMM10 = 145,
163 XMM11 = 146,
164 XMM12 = 147,
165 XMM13 = 148,
166 XMM14 = 149,
167 XMM15 = 150,
168 R8B = 151,
169 R9B = 152,
170 R10B = 153,
171 R11B = 154,
172 R12B = 155,
173 R13B = 156,
174 R14B = 157,
175 R15B = 158,
176 R8BH = 159,
177 R9BH = 160,
178 R10BH = 161,
179 R11BH = 162,
180 R12BH = 163,
181 R13BH = 164,
182 R14BH = 165,
183 R15BH = 166,
184 R8D = 167,
185 R9D = 168,
186 R10D = 169,
187 R11D = 170,
188 R12D = 171,
189 R13D = 172,
190 R14D = 173,
191 R15D = 174,
192 R8W = 175,
193 R9W = 176,
194 R10W = 177,
195 R11W = 178,
196 R12W = 179,
197 R13W = 180,
198 R14W = 181,
199 R15W = 182,
200 R8WH = 183,
201 R9WH = 184,
202 R10WH = 185,
203 R11WH = 186,
204 R12WH = 187,
205 R13WH = 188,
206 R14WH = 189,
207 R15WH = 190,
208 YMM0 = 191,
209 YMM1 = 192,
210 YMM2 = 193,
211 YMM3 = 194,
212 YMM4 = 195,
213 YMM5 = 196,
214 YMM6 = 197,
215 YMM7 = 198,
216 YMM8 = 199,
217 YMM9 = 200,
218 YMM10 = 201,
219 YMM11 = 202,
220 YMM12 = 203,
221 YMM13 = 204,
222 YMM14 = 205,
223 YMM15 = 206,
224 K0 = 207,
225 K1 = 208,
226 K2 = 209,
227 K3 = 210,
228 K4 = 211,
229 K5 = 212,
230 K6 = 213,
231 K7 = 214,
232 XMM16 = 215,
233 XMM17 = 216,
234 XMM18 = 217,
235 XMM19 = 218,
236 XMM20 = 219,
237 XMM21 = 220,
238 XMM22 = 221,
239 XMM23 = 222,
240 XMM24 = 223,
241 XMM25 = 224,
242 XMM26 = 225,
243 XMM27 = 226,
244 XMM28 = 227,
245 XMM29 = 228,
246 XMM30 = 229,
247 XMM31 = 230,
248 YMM16 = 231,
249 YMM17 = 232,
250 YMM18 = 233,
251 YMM19 = 234,
252 YMM20 = 235,
253 YMM21 = 236,
254 YMM22 = 237,
255 YMM23 = 238,
256 YMM24 = 239,
257 YMM25 = 240,
258 YMM26 = 241,
259 YMM27 = 242,
260 YMM28 = 243,
261 YMM29 = 244,
262 YMM30 = 245,
263 YMM31 = 246,
264 ZMM0 = 247,
265 ZMM1 = 248,
266 ZMM2 = 249,
267 ZMM3 = 250,
268 ZMM4 = 251,
269 ZMM5 = 252,
270 ZMM6 = 253,
271 ZMM7 = 254,
272 ZMM8 = 255,
273 ZMM9 = 256,
274 ZMM10 = 257,
275 ZMM11 = 258,
276 ZMM12 = 259,
277 ZMM13 = 260,
278 ZMM14 = 261,
279 ZMM15 = 262,
280 ZMM16 = 263,
281 ZMM17 = 264,
282 ZMM18 = 265,
283 ZMM19 = 266,
284 ZMM20 = 267,
285 ZMM21 = 268,
286 ZMM22 = 269,
287 ZMM23 = 270,
288 ZMM24 = 271,
289 ZMM25 = 272,
290 ZMM26 = 273,
291 ZMM27 = 274,
292 ZMM28 = 275,
293 ZMM29 = 276,
294 ZMM30 = 277,
295 ZMM31 = 278,
296 K0_K1 = 279,
297 K2_K3 = 280,
298 K4_K5 = 281,
299 K6_K7 = 282,
300 TMMCFG = 283,
301 TMM0 = 284,
302 TMM1 = 285,
303 TMM2 = 286,
304 TMM3 = 287,
305 TMM4 = 288,
306 TMM5 = 289,
307 TMM6 = 290,
308 TMM7 = 291,
309 R16 = 292,
310 R17 = 293,
311 R18 = 294,
312 R19 = 295,
313 R20 = 296,
314 R21 = 297,
315 R22 = 298,
316 R23 = 299,
317 R24 = 300,
318 R25 = 301,
319 R26 = 302,
320 R27 = 303,
321 R28 = 304,
322 R29 = 305,
323 R30 = 306,
324 R31 = 307,
325 R16B = 308,
326 R17B = 309,
327 R18B = 310,
328 R19B = 311,
329 R20B = 312,
330 R21B = 313,
331 R22B = 314,
332 R23B = 315,
333 R24B = 316,
334 R25B = 317,
335 R26B = 318,
336 R27B = 319,
337 R28B = 320,
338 R29B = 321,
339 R30B = 322,
340 R31B = 323,
341 R16BH = 324,
342 R17BH = 325,
343 R18BH = 326,
344 R19BH = 327,
345 R20BH = 328,
346 R21BH = 329,
347 R22BH = 330,
348 R23BH = 331,
349 R24BH = 332,
350 R25BH = 333,
351 R26BH = 334,
352 R27BH = 335,
353 R28BH = 336,
354 R29BH = 337,
355 R30BH = 338,
356 R31BH = 339,
357 R16D = 340,
358 R17D = 341,
359 R18D = 342,
360 R19D = 343,
361 R20D = 344,
362 R21D = 345,
363 R22D = 346,
364 R23D = 347,
365 R24D = 348,
366 R25D = 349,
367 R26D = 350,
368 R27D = 351,
369 R28D = 352,
370 R29D = 353,
371 R30D = 354,
372 R31D = 355,
373 R16W = 356,
374 R17W = 357,
375 R18W = 358,
376 R19W = 359,
377 R20W = 360,
378 R21W = 361,
379 R22W = 362,
380 R23W = 363,
381 R24W = 364,
382 R25W = 365,
383 R26W = 366,
384 R27W = 367,
385 R28W = 368,
386 R29W = 369,
387 R30W = 370,
388 R31W = 371,
389 R16WH = 372,
390 R17WH = 373,
391 R18WH = 374,
392 R19WH = 375,
393 R20WH = 376,
394 R21WH = 377,
395 R22WH = 378,
396 R23WH = 379,
397 R24WH = 380,
398 R25WH = 381,
399 R26WH = 382,
400 R27WH = 383,
401 R28WH = 384,
402 R29WH = 385,
403 R30WH = 386,
404 R31WH = 387,
405 NUM_TARGET_REGS // 388
406};
407
408} // namespace X86
409
410// Register classes
411
412namespace X86 {
413
414enum {
415 GR8RegClassID = 0,
416 GRH8RegClassID = 1,
417 GR8_NOREX2RegClassID = 2,
418 GR8_NOREXRegClassID = 3,
419 GR8_ABCD_HRegClassID = 4,
420 GR8_ABCD_LRegClassID = 5,
421 GRH16RegClassID = 6,
422 GR16RegClassID = 7,
423 GR16_NOREX2RegClassID = 8,
424 GR16_NOREXRegClassID = 9,
425 VK1RegClassID = 10,
426 VK16RegClassID = 11,
427 VK2RegClassID = 12,
428 VK4RegClassID = 13,
429 VK8RegClassID = 14,
430 VK16WMRegClassID = 15,
431 VK1WMRegClassID = 16,
432 VK2WMRegClassID = 17,
433 VK4WMRegClassID = 18,
434 VK8WMRegClassID = 19,
435 SEGMENT_REGRegClassID = 20,
436 GR16_ABCDRegClassID = 21,
437 FPCCRRegClassID = 22,
438 FR16XRegClassID = 23,
439 FR16RegClassID = 24,
440 VK16PAIRRegClassID = 25,
441 VK1PAIRRegClassID = 26,
442 VK2PAIRRegClassID = 27,
443 VK4PAIRRegClassID = 28,
444 VK8PAIRRegClassID = 29,
445 VK1PAIR_with_sub_mask_0_in_VK1WMRegClassID = 30,
446 LOW32_ADDR_ACCESS_RBPRegClassID = 31,
447 LOW32_ADDR_ACCESSRegClassID = 32,
448 LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID = 33,
449 FR32XRegClassID = 34,
450 GR32RegClassID = 35,
451 GR32_NOSPRegClassID = 36,
452 LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX2RegClassID = 37,
453 DEBUG_REGRegClassID = 38,
454 FR32RegClassID = 39,
455 GR32_NOREX2RegClassID = 40,
456 GR32_NOREX2_NOSPRegClassID = 41,
457 LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREXRegClassID = 42,
458 GR32_NOREXRegClassID = 43,
459 VK32RegClassID = 44,
460 GR32_NOREX_NOSPRegClassID = 45,
461 RFP32RegClassID = 46,
462 VK32WMRegClassID = 47,
463 GR32_ABCDRegClassID = 48,
464 GR32_TCRegClassID = 49,
465 GR32_ABCD_and_GR32_TCRegClassID = 50,
466 GR32_ADRegClassID = 51,
467 GR32_ArgRefRegClassID = 52,
468 GR32_BPSPRegClassID = 53,
469 GR32_BSIRegClassID = 54,
470 GR32_CBRegClassID = 55,
471 GR32_DCRegClassID = 56,
472 GR32_DIBPRegClassID = 57,
473 GR32_SIDIRegClassID = 58,
474 LOW32_ADDR_ACCESS_RBP_with_sub_32bitRegClassID = 59,
475 CCRRegClassID = 60,
476 DFCCRRegClassID = 61,
477 GR32_ABCD_and_GR32_BSIRegClassID = 62,
478 GR32_AD_and_GR32_ArgRefRegClassID = 63,
479 GR32_ArgRef_and_GR32_CBRegClassID = 64,
480 GR32_BPSP_and_GR32_DIBPRegClassID = 65,
481 GR32_BPSP_and_GR32_TCRegClassID = 66,
482 GR32_BSI_and_GR32_SIDIRegClassID = 67,
483 GR32_DIBP_and_GR32_SIDIRegClassID = 68,
484 LOW32_ADDR_ACCESS_RBP_with_sub_8bit_with_sub_32bitRegClassID = 69,
485 LOW32_ADDR_ACCESS_with_sub_32bitRegClassID = 70,
486 RFP64RegClassID = 71,
487 GR64RegClassID = 72,
488 FR64XRegClassID = 73,
489 GR64_with_sub_8bitRegClassID = 74,
490 GR64_NOSPRegClassID = 75,
491 GR64_NOREX2RegClassID = 76,
492 CONTROL_REGRegClassID = 77,
493 FR64RegClassID = 78,
494 GR64_with_sub_16bit_in_GR16_NOREX2RegClassID = 79,
495 GR64_NOREX2_NOSPRegClassID = 80,
496 GR64PLTSafeRegClassID = 81,
497 GR64_TCRegClassID = 82,
498 GR64_NOREXRegClassID = 83,
499 GR64_TCW64RegClassID = 84,
500 GR64_TC_with_sub_8bitRegClassID = 85,
501 GR64_NOREX2_NOSP_and_GR64_TCRegClassID = 86,
502 GR64_TCW64_with_sub_8bitRegClassID = 87,
503 GR64_TC_and_GR64_TCW64RegClassID = 88,
504 GR64_with_sub_16bit_in_GR16_NOREXRegClassID = 89,
505 VK64RegClassID = 90,
506 VR64RegClassID = 91,
507 GR64PLTSafe_and_GR64_TCRegClassID = 92,
508 GR64_NOREX2_NOSP_and_GR64_TCW64RegClassID = 93,
509 GR64_NOREX_NOSPRegClassID = 94,
510 GR64_NOREX_and_GR64_TCRegClassID = 95,
511 GR64_TCW64_and_GR64_TC_with_sub_8bitRegClassID = 96,
512 VK64WMRegClassID = 97,
513 GR64_TC_and_GR64_NOREX2_NOSP_and_GR64_TCW64RegClassID = 98,
514 GR64_TC_and_GR64_with_sub_16bit_in_GR16_NOREXRegClassID = 99,
515 GR64PLTSafe_and_GR64_TCW64RegClassID = 100,
516 GR64_NOREX_and_GR64PLTSafe_and_GR64_TCRegClassID = 101,
517 GR64_NOREX_and_GR64_TCW64RegClassID = 102,
518 GR64_ABCDRegClassID = 103,
519 GR64_with_sub_32bit_in_GR32_TCRegClassID = 104,
520 GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_TCRegClassID = 105,
521 GR64_ADRegClassID = 106,
522 GR64_ArgRefRegClassID = 107,
523 GR64_and_LOW32_ADDR_ACCESS_RBPRegClassID = 108,
524 GR64_with_sub_32bit_in_GR32_ArgRefRegClassID = 109,
525 GR64_with_sub_32bit_in_GR32_BPSPRegClassID = 110,
526 GR64_with_sub_32bit_in_GR32_BSIRegClassID = 111,
527 GR64_with_sub_32bit_in_GR32_CBRegClassID = 112,
528 GR64_with_sub_32bit_in_GR32_DIBPRegClassID = 113,
529 GR64_with_sub_32bit_in_GR32_SIDIRegClassID = 114,
530 GR64_ARegClassID = 115,
531 GR64_ArgRef_and_GR64_TCRegClassID = 116,
532 GR64_and_LOW32_ADDR_ACCESSRegClassID = 117,
533 GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_BSIRegClassID = 118,
534 GR64_with_sub_32bit_in_GR32_AD_and_GR32_ArgRefRegClassID = 119,
535 GR64_with_sub_32bit_in_GR32_ArgRef_and_GR32_CBRegClassID = 120,
536 GR64_with_sub_32bit_in_GR32_BPSP_and_GR32_DIBPRegClassID = 121,
537 GR64_with_sub_32bit_in_GR32_BPSP_and_GR32_TCRegClassID = 122,
538 GR64_with_sub_32bit_in_GR32_BSI_and_GR32_SIDIRegClassID = 123,
539 GR64_with_sub_32bit_in_GR32_DIBP_and_GR32_SIDIRegClassID = 124,
540 RSTRegClassID = 125,
541 RFP80RegClassID = 126,
542 RFP80_7RegClassID = 127,
543 VR128XRegClassID = 128,
544 VR128RegClassID = 129,
545 VR256XRegClassID = 130,
546 VR256RegClassID = 131,
547 VR512RegClassID = 132,
548 VR512_0_15RegClassID = 133,
549 TILERegClassID = 134,
550
551};
552
553} // namespace X86
554
555// Subregister indices
556
557namespace X86 {
558
559enum : uint16_t {
560 NoSubRegister,
561 sub_8bit, // 1
562 sub_8bit_hi, // 2
563 sub_8bit_hi_phony, // 3
564 sub_16bit, // 4
565 sub_16bit_hi, // 5
566 sub_32bit, // 6
567 sub_mask_0, // 7
568 sub_mask_1, // 8
569 sub_xmm, // 9
570 sub_ymm, // 10
571 NUM_TARGET_SUBREGS
572};
573
574} // namespace X86
575// Register pressure sets enum.
576namespace X86 {
577
578enum RegisterPressureSets {
579 SEGMENT_REG = 0,
580 GR32_BPSP = 1,
581 LOW32_ADDR_ACCESS_with_sub_32bit = 2,
582 GR32_BSI = 3,
583 GR32_SIDI = 4,
584 GR32_DIBP_with_GR32_SIDI = 5,
585 GR32_DIBP_with_LOW32_ADDR_ACCESS_with_sub_32bit = 6,
586 RFP32 = 7,
587 GR8_ABCD_H_with_GR32_BSI = 8,
588 GR8_ABCD_L_with_GR32_BSI = 9,
589 VK1 = 10,
590 VR64 = 11,
591 TILE = 12,
592 GR8_NOREX = 13,
593 GR32_TC = 14,
594 GR32_BPSP_with_GR32_TC = 15,
595 FR16 = 16,
596 DEBUG_REG = 17,
597 CONTROL_REG = 18,
598 GR64_NOREX = 19,
599 GR64_TCW64 = 20,
600 GR32_BPSP_with_GR64_TCW64 = 21,
601 GR64_TC_with_GR64_TCW64 = 22,
602 GR64_TC = 23,
603 FR16X = 24,
604 GR64PLTSafe_with_GR64_TC = 25,
605 GR8 = 26,
606 GR8_with_GR32_DIBP = 27,
607 GR8_with_GR32_BSI = 28,
608 GR8_with_LOW32_ADDR_ACCESS_with_sub_32bit = 29,
609 GR8_with_GR64_NOREX = 30,
610 GR8_with_GR64_TCW64 = 31,
611 GR8_with_GR64_TC = 32,
612 GR8_with_GR64PLTSafe = 33,
613 GR8_with_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX2 = 34,
614 GR16 = 35,
615};
616
617} // namespace X86
618
619} // namespace llvm
620