1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Register Enum Values *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9namespace llvm {
10
11class MCRegisterClass;
12const MCRegisterClass &getX86MCRegisterClass(unsigned RC);
13namespace X86 {
14
15enum : unsigned {
16 NoRegister,
17 AH = 1,
18 AL = 2,
19 AX = 3,
20 BH = 4,
21 BL = 5,
22 BP = 6,
23 BPH = 7,
24 BPL = 8,
25 BX = 9,
26 CH = 10,
27 CL = 11,
28 CS = 12,
29 CX = 13,
30 DF = 14,
31 DH = 15,
32 DI = 16,
33 DIH = 17,
34 DIL = 18,
35 DL = 19,
36 DS = 20,
37 DX = 21,
38 EAX = 22,
39 EBP = 23,
40 EBX = 24,
41 ECX = 25,
42 EDI = 26,
43 EDX = 27,
44 EFLAGS = 28,
45 EIP = 29,
46 EIZ = 30,
47 ES = 31,
48 ESI = 32,
49 ESP = 33,
50 FPCW = 34,
51 FPSW = 35,
52 FS = 36,
53 FS_BASE = 37,
54 GS = 38,
55 GS_BASE = 39,
56 HAX = 40,
57 HBP = 41,
58 HBX = 42,
59 HCX = 43,
60 HDI = 44,
61 HDX = 45,
62 HIP = 46,
63 HSI = 47,
64 HSP = 48,
65 IP = 49,
66 MXCSR = 50,
67 RAX = 51,
68 RBP = 52,
69 RBX = 53,
70 RCX = 54,
71 RDI = 55,
72 RDX = 56,
73 RFLAGS = 57,
74 RIP = 58,
75 RIZ = 59,
76 RSI = 60,
77 RSP = 61,
78 SI = 62,
79 SIH = 63,
80 SIL = 64,
81 SP = 65,
82 SPH = 66,
83 SPL = 67,
84 SS = 68,
85 SSP = 69,
86 _EFLAGS = 70,
87 CR0 = 71,
88 CR1 = 72,
89 CR2 = 73,
90 CR3 = 74,
91 CR4 = 75,
92 CR5 = 76,
93 CR6 = 77,
94 CR7 = 78,
95 CR8 = 79,
96 CR9 = 80,
97 CR10 = 81,
98 CR11 = 82,
99 CR12 = 83,
100 CR13 = 84,
101 CR14 = 85,
102 CR15 = 86,
103 DR0 = 87,
104 DR1 = 88,
105 DR2 = 89,
106 DR3 = 90,
107 DR4 = 91,
108 DR5 = 92,
109 DR6 = 93,
110 DR7 = 94,
111 DR8 = 95,
112 DR9 = 96,
113 DR10 = 97,
114 DR11 = 98,
115 DR12 = 99,
116 DR13 = 100,
117 DR14 = 101,
118 DR15 = 102,
119 FP0 = 103,
120 FP1 = 104,
121 FP2 = 105,
122 FP3 = 106,
123 FP4 = 107,
124 FP5 = 108,
125 FP6 = 109,
126 FP7 = 110,
127 MM0 = 111,
128 MM1 = 112,
129 MM2 = 113,
130 MM3 = 114,
131 MM4 = 115,
132 MM5 = 116,
133 MM6 = 117,
134 MM7 = 118,
135 R8 = 119,
136 R9 = 120,
137 R10 = 121,
138 R11 = 122,
139 R12 = 123,
140 R13 = 124,
141 R14 = 125,
142 R15 = 126,
143 ST0 = 127,
144 ST1 = 128,
145 ST2 = 129,
146 ST3 = 130,
147 ST4 = 131,
148 ST5 = 132,
149 ST6 = 133,
150 ST7 = 134,
151 XMM0 = 135,
152 XMM1 = 136,
153 XMM2 = 137,
154 XMM3 = 138,
155 XMM4 = 139,
156 XMM5 = 140,
157 XMM6 = 141,
158 XMM7 = 142,
159 XMM8 = 143,
160 XMM9 = 144,
161 XMM10 = 145,
162 XMM11 = 146,
163 XMM12 = 147,
164 XMM13 = 148,
165 XMM14 = 149,
166 XMM15 = 150,
167 R8B = 151,
168 R9B = 152,
169 R10B = 153,
170 R11B = 154,
171 R12B = 155,
172 R13B = 156,
173 R14B = 157,
174 R15B = 158,
175 R8BH = 159,
176 R9BH = 160,
177 R10BH = 161,
178 R11BH = 162,
179 R12BH = 163,
180 R13BH = 164,
181 R14BH = 165,
182 R15BH = 166,
183 R8D = 167,
184 R9D = 168,
185 R10D = 169,
186 R11D = 170,
187 R12D = 171,
188 R13D = 172,
189 R14D = 173,
190 R15D = 174,
191 R8W = 175,
192 R9W = 176,
193 R10W = 177,
194 R11W = 178,
195 R12W = 179,
196 R13W = 180,
197 R14W = 181,
198 R15W = 182,
199 R8WH = 183,
200 R9WH = 184,
201 R10WH = 185,
202 R11WH = 186,
203 R12WH = 187,
204 R13WH = 188,
205 R14WH = 189,
206 R15WH = 190,
207 YMM0 = 191,
208 YMM1 = 192,
209 YMM2 = 193,
210 YMM3 = 194,
211 YMM4 = 195,
212 YMM5 = 196,
213 YMM6 = 197,
214 YMM7 = 198,
215 YMM8 = 199,
216 YMM9 = 200,
217 YMM10 = 201,
218 YMM11 = 202,
219 YMM12 = 203,
220 YMM13 = 204,
221 YMM14 = 205,
222 YMM15 = 206,
223 K0 = 207,
224 K1 = 208,
225 K2 = 209,
226 K3 = 210,
227 K4 = 211,
228 K5 = 212,
229 K6 = 213,
230 K7 = 214,
231 XMM16 = 215,
232 XMM17 = 216,
233 XMM18 = 217,
234 XMM19 = 218,
235 XMM20 = 219,
236 XMM21 = 220,
237 XMM22 = 221,
238 XMM23 = 222,
239 XMM24 = 223,
240 XMM25 = 224,
241 XMM26 = 225,
242 XMM27 = 226,
243 XMM28 = 227,
244 XMM29 = 228,
245 XMM30 = 229,
246 XMM31 = 230,
247 YMM16 = 231,
248 YMM17 = 232,
249 YMM18 = 233,
250 YMM19 = 234,
251 YMM20 = 235,
252 YMM21 = 236,
253 YMM22 = 237,
254 YMM23 = 238,
255 YMM24 = 239,
256 YMM25 = 240,
257 YMM26 = 241,
258 YMM27 = 242,
259 YMM28 = 243,
260 YMM29 = 244,
261 YMM30 = 245,
262 YMM31 = 246,
263 ZMM0 = 247,
264 ZMM1 = 248,
265 ZMM2 = 249,
266 ZMM3 = 250,
267 ZMM4 = 251,
268 ZMM5 = 252,
269 ZMM6 = 253,
270 ZMM7 = 254,
271 ZMM8 = 255,
272 ZMM9 = 256,
273 ZMM10 = 257,
274 ZMM11 = 258,
275 ZMM12 = 259,
276 ZMM13 = 260,
277 ZMM14 = 261,
278 ZMM15 = 262,
279 ZMM16 = 263,
280 ZMM17 = 264,
281 ZMM18 = 265,
282 ZMM19 = 266,
283 ZMM20 = 267,
284 ZMM21 = 268,
285 ZMM22 = 269,
286 ZMM23 = 270,
287 ZMM24 = 271,
288 ZMM25 = 272,
289 ZMM26 = 273,
290 ZMM27 = 274,
291 ZMM28 = 275,
292 ZMM29 = 276,
293 ZMM30 = 277,
294 ZMM31 = 278,
295 K0_K1 = 279,
296 K2_K3 = 280,
297 K4_K5 = 281,
298 K6_K7 = 282,
299 TMMCFG = 283,
300 TMM0 = 284,
301 TMM1 = 285,
302 TMM2 = 286,
303 TMM3 = 287,
304 TMM4 = 288,
305 TMM5 = 289,
306 TMM6 = 290,
307 TMM7 = 291,
308 R16 = 292,
309 R17 = 293,
310 R18 = 294,
311 R19 = 295,
312 R20 = 296,
313 R21 = 297,
314 R22 = 298,
315 R23 = 299,
316 R24 = 300,
317 R25 = 301,
318 R26 = 302,
319 R27 = 303,
320 R28 = 304,
321 R29 = 305,
322 R30 = 306,
323 R31 = 307,
324 R16B = 308,
325 R17B = 309,
326 R18B = 310,
327 R19B = 311,
328 R20B = 312,
329 R21B = 313,
330 R22B = 314,
331 R23B = 315,
332 R24B = 316,
333 R25B = 317,
334 R26B = 318,
335 R27B = 319,
336 R28B = 320,
337 R29B = 321,
338 R30B = 322,
339 R31B = 323,
340 R16BH = 324,
341 R17BH = 325,
342 R18BH = 326,
343 R19BH = 327,
344 R20BH = 328,
345 R21BH = 329,
346 R22BH = 330,
347 R23BH = 331,
348 R24BH = 332,
349 R25BH = 333,
350 R26BH = 334,
351 R27BH = 335,
352 R28BH = 336,
353 R29BH = 337,
354 R30BH = 338,
355 R31BH = 339,
356 R16D = 340,
357 R17D = 341,
358 R18D = 342,
359 R19D = 343,
360 R20D = 344,
361 R21D = 345,
362 R22D = 346,
363 R23D = 347,
364 R24D = 348,
365 R25D = 349,
366 R26D = 350,
367 R27D = 351,
368 R28D = 352,
369 R29D = 353,
370 R30D = 354,
371 R31D = 355,
372 R16W = 356,
373 R17W = 357,
374 R18W = 358,
375 R19W = 359,
376 R20W = 360,
377 R21W = 361,
378 R22W = 362,
379 R23W = 363,
380 R24W = 364,
381 R25W = 365,
382 R26W = 366,
383 R27W = 367,
384 R28W = 368,
385 R29W = 369,
386 R30W = 370,
387 R31W = 371,
388 R16WH = 372,
389 R17WH = 373,
390 R18WH = 374,
391 R19WH = 375,
392 R20WH = 376,
393 R21WH = 377,
394 R22WH = 378,
395 R23WH = 379,
396 R24WH = 380,
397 R25WH = 381,
398 R26WH = 382,
399 R27WH = 383,
400 R28WH = 384,
401 R29WH = 385,
402 R30WH = 386,
403 R31WH = 387,
404 NUM_TARGET_REGS // 388
405};
406
407} // namespace X86
408
409// Register classes
410
411namespace X86 {
412
413enum {
414 GR8RegClassID = 0,
415 GRH8RegClassID = 1,
416 GR8_NOREX2RegClassID = 2,
417 GR8_NOREXRegClassID = 3,
418 GR8_ABCD_HRegClassID = 4,
419 GR8_ABCD_LRegClassID = 5,
420 GRH16RegClassID = 6,
421 GR16RegClassID = 7,
422 GR16_NOREX2RegClassID = 8,
423 GR16_NOREXRegClassID = 9,
424 VK1RegClassID = 10,
425 VK16RegClassID = 11,
426 VK2RegClassID = 12,
427 VK4RegClassID = 13,
428 VK8RegClassID = 14,
429 VK16WMRegClassID = 15,
430 VK1WMRegClassID = 16,
431 VK2WMRegClassID = 17,
432 VK4WMRegClassID = 18,
433 VK8WMRegClassID = 19,
434 SEGMENT_REGRegClassID = 20,
435 GR16_ABCDRegClassID = 21,
436 FPCCRRegClassID = 22,
437 FR16XRegClassID = 23,
438 FR16RegClassID = 24,
439 VK16PAIRRegClassID = 25,
440 VK1PAIRRegClassID = 26,
441 VK2PAIRRegClassID = 27,
442 VK4PAIRRegClassID = 28,
443 VK8PAIRRegClassID = 29,
444 VK1PAIR_with_sub_mask_0_in_VK1WMRegClassID = 30,
445 LOW32_ADDR_ACCESS_RBPRegClassID = 31,
446 LOW32_ADDR_ACCESSRegClassID = 32,
447 LOW32_ADDR_ACCESS_RBP_with_sub_8bitRegClassID = 33,
448 FR32XRegClassID = 34,
449 GR32RegClassID = 35,
450 GR32_NOSPRegClassID = 36,
451 LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX2RegClassID = 37,
452 DEBUG_REGRegClassID = 38,
453 FR32RegClassID = 39,
454 GR32_NOREX2RegClassID = 40,
455 GR32_NOREX2_NOSPRegClassID = 41,
456 LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREXRegClassID = 42,
457 GR32_NOREXRegClassID = 43,
458 VK32RegClassID = 44,
459 GR32_NOREX_NOSPRegClassID = 45,
460 RFP32RegClassID = 46,
461 VK32WMRegClassID = 47,
462 GR32_ABCDRegClassID = 48,
463 GR32_TCRegClassID = 49,
464 GR32_ABCD_and_GR32_TCRegClassID = 50,
465 GR32_ADRegClassID = 51,
466 GR32_ArgRefRegClassID = 52,
467 GR32_BPSPRegClassID = 53,
468 GR32_BSIRegClassID = 54,
469 GR32_CBRegClassID = 55,
470 GR32_DCRegClassID = 56,
471 GR32_DIBPRegClassID = 57,
472 GR32_SIDIRegClassID = 58,
473 LOW32_ADDR_ACCESS_RBP_with_sub_32bitRegClassID = 59,
474 CCRRegClassID = 60,
475 DFCCRRegClassID = 61,
476 GR32_ABCD_and_GR32_BSIRegClassID = 62,
477 GR32_AD_and_GR32_ArgRefRegClassID = 63,
478 GR32_ArgRef_and_GR32_CBRegClassID = 64,
479 GR32_BPSP_and_GR32_DIBPRegClassID = 65,
480 GR32_BPSP_and_GR32_TCRegClassID = 66,
481 GR32_BSI_and_GR32_SIDIRegClassID = 67,
482 GR32_DIBP_and_GR32_SIDIRegClassID = 68,
483 LOW32_ADDR_ACCESS_RBP_with_sub_8bit_with_sub_32bitRegClassID = 69,
484 LOW32_ADDR_ACCESS_with_sub_32bitRegClassID = 70,
485 RFP64RegClassID = 71,
486 GR64RegClassID = 72,
487 FR64XRegClassID = 73,
488 GR64_with_sub_8bitRegClassID = 74,
489 GR64_NOSPRegClassID = 75,
490 GR64_NOREX2RegClassID = 76,
491 CONTROL_REGRegClassID = 77,
492 FR64RegClassID = 78,
493 GR64_with_sub_16bit_in_GR16_NOREX2RegClassID = 79,
494 GR64_NOREX2_NOSPRegClassID = 80,
495 GR64PLTSafeRegClassID = 81,
496 GR64_TCRegClassID = 82,
497 GR64_NOREXRegClassID = 83,
498 GR64_TCW64RegClassID = 84,
499 GR64_TC_with_sub_8bitRegClassID = 85,
500 GR64_NOREX2_NOSP_and_GR64_TCRegClassID = 86,
501 GR64_TCW64_with_sub_8bitRegClassID = 87,
502 GR64_TC_and_GR64_TCW64RegClassID = 88,
503 GR64_with_sub_16bit_in_GR16_NOREXRegClassID = 89,
504 VK64RegClassID = 90,
505 VR64RegClassID = 91,
506 GR64PLTSafe_and_GR64_TCRegClassID = 92,
507 GR64_NOREX2_NOSP_and_GR64_TCW64RegClassID = 93,
508 GR64_NOREX_NOSPRegClassID = 94,
509 GR64_NOREX_and_GR64_TCRegClassID = 95,
510 GR64_TCW64_and_GR64_TC_with_sub_8bitRegClassID = 96,
511 VK64WMRegClassID = 97,
512 GR64_TC_and_GR64_NOREX2_NOSP_and_GR64_TCW64RegClassID = 98,
513 GR64_TC_and_GR64_with_sub_16bit_in_GR16_NOREXRegClassID = 99,
514 GR64PLTSafe_and_GR64_TCW64RegClassID = 100,
515 GR64_NOREX_and_GR64PLTSafe_and_GR64_TCRegClassID = 101,
516 GR64_NOREX_and_GR64_TCW64RegClassID = 102,
517 GR64_ABCDRegClassID = 103,
518 GR64_with_sub_32bit_in_GR32_TCRegClassID = 104,
519 GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_TCRegClassID = 105,
520 GR64_ADRegClassID = 106,
521 GR64_ArgRefRegClassID = 107,
522 GR64_and_LOW32_ADDR_ACCESS_RBPRegClassID = 108,
523 GR64_with_sub_32bit_in_GR32_ArgRefRegClassID = 109,
524 GR64_with_sub_32bit_in_GR32_BPSPRegClassID = 110,
525 GR64_with_sub_32bit_in_GR32_BSIRegClassID = 111,
526 GR64_with_sub_32bit_in_GR32_CBRegClassID = 112,
527 GR64_with_sub_32bit_in_GR32_DIBPRegClassID = 113,
528 GR64_with_sub_32bit_in_GR32_SIDIRegClassID = 114,
529 GR64_ARegClassID = 115,
530 GR64_ArgRef_and_GR64_TCRegClassID = 116,
531 GR64_and_LOW32_ADDR_ACCESSRegClassID = 117,
532 GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_BSIRegClassID = 118,
533 GR64_with_sub_32bit_in_GR32_AD_and_GR32_ArgRefRegClassID = 119,
534 GR64_with_sub_32bit_in_GR32_ArgRef_and_GR32_CBRegClassID = 120,
535 GR64_with_sub_32bit_in_GR32_BPSP_and_GR32_DIBPRegClassID = 121,
536 GR64_with_sub_32bit_in_GR32_BPSP_and_GR32_TCRegClassID = 122,
537 GR64_with_sub_32bit_in_GR32_BSI_and_GR32_SIDIRegClassID = 123,
538 GR64_with_sub_32bit_in_GR32_DIBP_and_GR32_SIDIRegClassID = 124,
539 RSTRegClassID = 125,
540 RFP80RegClassID = 126,
541 RFP80_7RegClassID = 127,
542 VR128XRegClassID = 128,
543 VR128RegClassID = 129,
544 VR256XRegClassID = 130,
545 VR256RegClassID = 131,
546 VR512RegClassID = 132,
547 VR512_0_15RegClassID = 133,
548 TILERegClassID = 134,
549
550};
551
552} // namespace X86
553
554// Subregister indices
555
556namespace X86 {
557
558enum : uint16_t {
559 NoSubRegister,
560 sub_8bit, // 1
561 sub_8bit_hi, // 2
562 sub_8bit_hi_phony, // 3
563 sub_16bit, // 4
564 sub_16bit_hi, // 5
565 sub_32bit, // 6
566 sub_mask_0, // 7
567 sub_mask_1, // 8
568 sub_xmm, // 9
569 sub_ymm, // 10
570 NUM_TARGET_SUBREGS
571};
572
573} // namespace X86
574// Register pressure sets enum.
575namespace X86 {
576
577enum RegisterPressureSets {
578 SEGMENT_REG = 0,
579 GR32_BPSP = 1,
580 LOW32_ADDR_ACCESS_with_sub_32bit = 2,
581 GR32_BSI = 3,
582 GR32_SIDI = 4,
583 GR32_DIBP_with_GR32_SIDI = 5,
584 GR32_DIBP_with_LOW32_ADDR_ACCESS_with_sub_32bit = 6,
585 RFP32 = 7,
586 GR8_ABCD_H_with_GR32_BSI = 8,
587 GR8_ABCD_L_with_GR32_BSI = 9,
588 VK1 = 10,
589 VR64 = 11,
590 TILE = 12,
591 GR8_NOREX = 13,
592 GR32_TC = 14,
593 GR32_BPSP_with_GR32_TC = 15,
594 FR16 = 16,
595 DEBUG_REG = 17,
596 CONTROL_REG = 18,
597 GR64_NOREX = 19,
598 GR64_TCW64 = 20,
599 GR32_BPSP_with_GR64_TCW64 = 21,
600 GR64_TC_with_GR64_TCW64 = 22,
601 GR64_TC = 23,
602 FR16X = 24,
603 GR64PLTSafe_with_GR64_TC = 25,
604 GR8 = 26,
605 GR8_with_GR32_DIBP = 27,
606 GR8_with_GR32_BSI = 28,
607 GR8_with_LOW32_ADDR_ACCESS_with_sub_32bit = 29,
608 GR8_with_GR64_NOREX = 30,
609 GR8_with_GR64_TCW64 = 31,
610 GR8_with_GR64_TC = 32,
611 GR8_with_GR64PLTSafe = 33,
612 GR8_with_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX2 = 34,
613 GR16 = 35,
614};
615
616} // namespace X86
617
618} // namespace llvm
619