1//===-- ExpandPostRAPseudos.cpp - Pseudo instruction expansion pass -------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines a pass that expands COPY and SUBREG_TO_REG pseudo
10// instructions after register allocation.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/CodeGen/ExpandPostRAPseudos.h"
15#include "llvm/CodeGen/MachineDominators.h"
16#include "llvm/CodeGen/MachineFunctionPass.h"
17#include "llvm/CodeGen/MachineInstr.h"
18#include "llvm/CodeGen/Passes.h"
19#include "llvm/CodeGen/TargetInstrInfo.h"
20#include "llvm/CodeGen/TargetRegisterInfo.h"
21#include "llvm/CodeGen/TargetSubtargetInfo.h"
22#include "llvm/InitializePasses.h"
23#include "llvm/Support/Debug.h"
24#include "llvm/Support/raw_ostream.h"
25
26using namespace llvm;
27
28#define DEBUG_TYPE "postrapseudos"
29
30namespace {
31struct ExpandPostRA {
32 bool run(MachineFunction &);
33
34private:
35 const TargetRegisterInfo *TRI = nullptr;
36 const TargetInstrInfo *TII = nullptr;
37
38 bool LowerSubregToReg(MachineInstr *MI);
39};
40
41struct ExpandPostRALegacy : public MachineFunctionPass {
42 static char ID;
43 ExpandPostRALegacy() : MachineFunctionPass(ID) {}
44
45 void getAnalysisUsage(AnalysisUsage &AU) const override {
46 AU.setPreservesCFG();
47 MachineFunctionPass::getAnalysisUsage(AU);
48 }
49
50 /// runOnMachineFunction - pass entry point
51 bool runOnMachineFunction(MachineFunction &) override;
52};
53} // end anonymous namespace
54
55PreservedAnalyses
56ExpandPostRAPseudosPass::run(MachineFunction &MF,
57 MachineFunctionAnalysisManager &MFAM) {
58 if (!ExpandPostRA().run(MF))
59 return PreservedAnalyses::all();
60
61 return getMachineFunctionPassPreservedAnalyses().preserveSet<CFGAnalyses>();
62}
63
64char ExpandPostRALegacy::ID = 0;
65char &llvm::ExpandPostRAPseudosID = ExpandPostRALegacy::ID;
66
67INITIALIZE_PASS(ExpandPostRALegacy, DEBUG_TYPE,
68 "Post-RA pseudo instruction expansion pass", false, false)
69
70bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) {
71 MachineBasicBlock *MBB = MI->getParent();
72 assert(MI->getOperand(0).isReg() && MI->getOperand(0).isDef() &&
73 MI->getOperand(1).isReg() && MI->getOperand(1).isUse() &&
74 MI->getOperand(2).isImm() && "Invalid subreg_to_reg");
75
76 Register DstReg = MI->getOperand(i: 0).getReg();
77 Register InsReg = MI->getOperand(i: 1).getReg();
78 assert(!MI->getOperand(1).getSubReg() && "SubIdx on physreg?");
79 unsigned SubIdx = MI->getOperand(i: 2).getImm();
80
81 assert(SubIdx != 0 && "Invalid index for insert_subreg");
82 Register DstSubReg = TRI->getSubReg(Reg: DstReg, Idx: SubIdx);
83
84 assert(DstReg.isPhysical() &&
85 "Insert destination must be in a physical register");
86 assert(InsReg.isPhysical() &&
87 "Inserted value must be in a physical register");
88
89 LLVM_DEBUG(dbgs() << "subreg: CONVERTING: " << *MI);
90
91 if (MI->allDefsAreDead() || DstSubReg == InsReg) {
92 // No need to insert an identity copy instruction.
93 // Watch out for case like this:
94 // %rax = SUBREG_TO_REG killed %eax, 3
95 // We must leave %rax live.
96 MI->setDesc(TII->get(Opcode: TargetOpcode::KILL));
97 MI->removeOperand(OpNo: 2); // SubIdx
98 LLVM_DEBUG(dbgs() << "subreg: replaced by: " << *MI);
99 return true;
100 }
101
102 TII->copyPhysReg(MBB&: *MBB, MI, DL: MI->getDebugLoc(), DestReg: DstSubReg, SrcReg: InsReg,
103 KillSrc: MI->getOperand(i: 1).isKill());
104
105 // Implicitly define DstReg for subsequent uses.
106 MachineBasicBlock::iterator CopyMI = MI;
107 --CopyMI;
108 CopyMI->addRegisterDefined(Reg: DstReg);
109 LLVM_DEBUG(dbgs() << "subreg: " << *CopyMI);
110
111 MBB->erase(I: MI);
112 return true;
113}
114
115bool ExpandPostRALegacy::runOnMachineFunction(MachineFunction &MF) {
116 return ExpandPostRA().run(MF);
117}
118
119/// runOnMachineFunction - Reduce subregister inserts and extracts to register
120/// copies.
121///
122bool ExpandPostRA::run(MachineFunction &MF) {
123 LLVM_DEBUG(dbgs() << "Machine Function\n"
124 << "********** EXPANDING POST-RA PSEUDO INSTRS **********\n"
125 << "********** Function: " << MF.getName() << '\n');
126 TRI = MF.getSubtarget().getRegisterInfo();
127 TII = MF.getSubtarget().getInstrInfo();
128
129 bool MadeChange = false;
130
131 for (MachineBasicBlock &MBB : MF) {
132 for (MachineInstr &MI : llvm::make_early_inc_range(Range&: MBB)) {
133 // Only expand pseudos.
134 if (!MI.isPseudo())
135 continue;
136
137 // Give targets a chance to expand even standard pseudos.
138 if (TII->expandPostRAPseudo(MI)) {
139 MadeChange = true;
140 continue;
141 }
142
143 // Expand standard pseudos.
144 switch (MI.getOpcode()) {
145 case TargetOpcode::SUBREG_TO_REG:
146 MadeChange |= LowerSubregToReg(MI: &MI);
147 break;
148 case TargetOpcode::COPY:
149 TII->lowerCopy(MI: &MI, TRI);
150 MadeChange = true;
151 break;
152 case TargetOpcode::DBG_VALUE:
153 continue;
154 case TargetOpcode::INSERT_SUBREG:
155 case TargetOpcode::EXTRACT_SUBREG:
156 llvm_unreachable("Sub-register pseudos should have been eliminated.");
157 }
158 }
159 }
160
161 return MadeChange;
162}
163