1//===- IndirectBrExpandPass.cpp - Expand indirectbr to switch -------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8/// \file
9///
10/// Implements an expansion pass to turn `indirectbr` instructions in the IR
11/// into `switch` instructions. This works by enumerating the basic blocks in
12/// a dense range of integers, replacing each `blockaddr` constant with the
13/// corresponding integer constant, and then building a switch that maps from
14/// the integers to the actual blocks. All of the indirectbr instructions in the
15/// function are redirected to this common switch.
16///
17/// While this is generically useful if a target is unable to codegen
18/// `indirectbr` natively, it is primarily useful when there is some desire to
19/// get the builtin non-jump-table lowering of a switch even when the input
20/// source contained an explicit indirect branch construct.
21///
22/// Note that it doesn't make any sense to enable this pass unless a target also
23/// disables jump-table lowering of switches. Doing that is likely to pessimize
24/// the code.
25///
26//===----------------------------------------------------------------------===//
27
28#include "llvm/ADT/STLExtras.h"
29#include "llvm/ADT/Sequence.h"
30#include "llvm/ADT/SmallVector.h"
31#include "llvm/Analysis/DomTreeUpdater.h"
32#include "llvm/CodeGen/IndirectBrExpand.h"
33#include "llvm/CodeGen/TargetPassConfig.h"
34#include "llvm/CodeGen/TargetSubtargetInfo.h"
35#include "llvm/IR/BasicBlock.h"
36#include "llvm/IR/Constants.h"
37#include "llvm/IR/Dominators.h"
38#include "llvm/IR/Function.h"
39#include "llvm/IR/Instructions.h"
40#include "llvm/InitializePasses.h"
41#include "llvm/Pass.h"
42#include "llvm/Support/ErrorHandling.h"
43#include "llvm/Target/TargetMachine.h"
44#include <optional>
45
46using namespace llvm;
47
48#define DEBUG_TYPE "indirectbr-expand"
49
50namespace {
51
52class IndirectBrExpandLegacyPass : public FunctionPass {
53public:
54 static char ID; // Pass identification, replacement for typeid
55
56 IndirectBrExpandLegacyPass() : FunctionPass(ID) {}
57
58 void getAnalysisUsage(AnalysisUsage &AU) const override {
59 AU.addPreserved<DominatorTreeWrapperPass>();
60 }
61
62 bool runOnFunction(Function &F) override;
63};
64
65} // end anonymous namespace
66
67static bool runImpl(Function &F, const TargetLowering *TLI,
68 DomTreeUpdater *DTU);
69
70PreservedAnalyses IndirectBrExpandPass::run(Function &F,
71 FunctionAnalysisManager &FAM) {
72 auto *STI = TM->getSubtargetImpl(F);
73 if (!STI->enableIndirectBrExpand())
74 return PreservedAnalyses::all();
75
76 auto *TLI = STI->getTargetLowering();
77 auto *DT = FAM.getCachedResult<DominatorTreeAnalysis>(IR&: F);
78 DomTreeUpdater DTU(DT, DomTreeUpdater::UpdateStrategy::Lazy);
79
80 bool Changed = runImpl(F, TLI, DTU: DT ? &DTU : nullptr);
81 if (!Changed)
82 return PreservedAnalyses::all();
83 PreservedAnalyses PA;
84 PA.preserve<DominatorTreeAnalysis>();
85 return PA;
86}
87
88char IndirectBrExpandLegacyPass::ID = 0;
89
90INITIALIZE_PASS_BEGIN(IndirectBrExpandLegacyPass, DEBUG_TYPE,
91 "Expand indirectbr instructions", false, false)
92INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
93INITIALIZE_PASS_END(IndirectBrExpandLegacyPass, DEBUG_TYPE,
94 "Expand indirectbr instructions", false, false)
95
96FunctionPass *llvm::createIndirectBrExpandPass() {
97 return new IndirectBrExpandLegacyPass();
98}
99
100bool runImpl(Function &F, const TargetLowering *TLI, DomTreeUpdater *DTU) {
101 auto &DL = F.getDataLayout();
102
103 SmallVector<IndirectBrInst *, 1> IndirectBrs;
104
105 // Set of all potential successors for indirectbr instructions.
106 SmallPtrSet<BasicBlock *, 4> IndirectBrSuccs;
107
108 // Build a list of indirectbrs that we want to rewrite.
109 for (BasicBlock &BB : F)
110 if (auto *IBr = dyn_cast<IndirectBrInst>(Val: BB.getTerminator())) {
111 // Handle the degenerate case of no successors by replacing the indirectbr
112 // with unreachable as there is no successor available.
113 if (IBr->getNumSuccessors() == 0) {
114 (void)new UnreachableInst(F.getContext(), IBr->getIterator());
115 IBr->eraseFromParent();
116 continue;
117 }
118
119 IndirectBrs.push_back(Elt: IBr);
120 IndirectBrSuccs.insert_range(R: IBr->successors());
121 }
122
123 if (IndirectBrs.empty())
124 return false;
125
126 // If we need to replace any indirectbrs we need to establish integer
127 // constants that will correspond to each of the basic blocks in the function
128 // whose address escapes. We do that here and rewrite all the blockaddress
129 // constants to just be those integer constants cast to a pointer type.
130 SmallVector<BasicBlock *, 4> BBs;
131
132 for (BasicBlock &BB : F) {
133 // Skip blocks that aren't successors to an indirectbr we're going to
134 // rewrite.
135 if (!IndirectBrSuccs.count(Ptr: &BB))
136 continue;
137
138 auto *BA = BlockAddress::lookup(BB: &BB);
139
140 // Skip if the constant was formed but ended up not being used (due to DCE
141 // or whatever).
142 if (!BA || !BA->isConstantUsed())
143 continue;
144
145 // Compute the index we want to use for this basic block. We can't use zero
146 // because null can be compared with block addresses.
147 int BBIndex = BBs.size() + 1;
148 BBs.push_back(Elt: &BB);
149
150 auto *ITy = cast<IntegerType>(Val: DL.getIntPtrType(BA->getType()));
151 ConstantInt *BBIndexC = ConstantInt::get(Ty: ITy, V: BBIndex);
152
153 // Now rewrite the blockaddress to an integer constant based on the index.
154 // FIXME: This part doesn't properly recognize other uses of blockaddress
155 // expressions, for instance, where they are used to pass labels to
156 // asm-goto. This part of the pass needs a rework.
157 BA->replaceAllUsesWith(V: ConstantExpr::getIntToPtr(C: BBIndexC, Ty: BA->getType()));
158 }
159
160 if (BBs.empty()) {
161 // There are no blocks whose address is taken, so any indirectbr instruction
162 // cannot get a valid input and we can replace all of them with unreachable.
163 SmallVector<DominatorTree::UpdateType, 8> Updates;
164 if (DTU)
165 Updates.reserve(N: IndirectBrSuccs.size());
166 for (auto *IBr : IndirectBrs) {
167 if (DTU) {
168 for (BasicBlock *SuccBB : IBr->successors())
169 Updates.push_back(Elt: {DominatorTree::Delete, IBr->getParent(), SuccBB});
170 }
171 (void)new UnreachableInst(F.getContext(), IBr->getIterator());
172 IBr->eraseFromParent();
173 }
174 if (DTU) {
175 assert(Updates.size() == IndirectBrSuccs.size() &&
176 "Got unexpected update count.");
177 DTU->applyUpdates(Updates);
178 }
179 return true;
180 }
181
182 BasicBlock *SwitchBB;
183 Value *SwitchValue;
184
185 // Compute a common integer type across all the indirectbr instructions.
186 IntegerType *CommonITy = nullptr;
187 for (auto *IBr : IndirectBrs) {
188 auto *ITy =
189 cast<IntegerType>(Val: DL.getIntPtrType(IBr->getAddress()->getType()));
190 if (!CommonITy || ITy->getBitWidth() > CommonITy->getBitWidth())
191 CommonITy = ITy;
192 }
193
194 auto GetSwitchValue = [CommonITy](IndirectBrInst *IBr) {
195 return CastInst::CreatePointerCast(S: IBr->getAddress(), Ty: CommonITy,
196 Name: Twine(IBr->getAddress()->getName()) +
197 ".switch_cast",
198 InsertBefore: IBr->getIterator());
199 };
200
201 SmallVector<DominatorTree::UpdateType, 8> Updates;
202
203 if (IndirectBrs.size() == 1) {
204 // If we only have one indirectbr, we can just directly replace it within
205 // its block.
206 IndirectBrInst *IBr = IndirectBrs[0];
207 SwitchBB = IBr->getParent();
208 SwitchValue = GetSwitchValue(IBr);
209 if (DTU) {
210 Updates.reserve(N: IndirectBrSuccs.size());
211 for (BasicBlock *SuccBB : IBr->successors())
212 Updates.push_back(Elt: {DominatorTree::Delete, IBr->getParent(), SuccBB});
213 assert(Updates.size() == IndirectBrSuccs.size() &&
214 "Got unexpected update count.");
215 }
216 IBr->eraseFromParent();
217 } else {
218 // Otherwise we need to create a new block to hold the switch across BBs,
219 // jump to that block instead of each indirectbr, and phi together the
220 // values for the switch.
221 SwitchBB = BasicBlock::Create(Context&: F.getContext(), Name: "switch_bb", Parent: &F);
222 auto *SwitchPN = PHINode::Create(Ty: CommonITy, NumReservedValues: IndirectBrs.size(),
223 NameStr: "switch_value_phi", InsertBefore: SwitchBB);
224 SwitchValue = SwitchPN;
225
226 // Now replace the indirectbr instructions with direct branches to the
227 // switch block and fill out the PHI operands.
228 if (DTU)
229 Updates.reserve(N: IndirectBrs.size() + 2 * IndirectBrSuccs.size());
230 for (auto *IBr : IndirectBrs) {
231 SwitchPN->addIncoming(V: GetSwitchValue(IBr), BB: IBr->getParent());
232 UncondBrInst::Create(Target: SwitchBB, InsertBefore: IBr->getIterator());
233 if (DTU) {
234 Updates.push_back(Elt: {DominatorTree::Insert, IBr->getParent(), SwitchBB});
235 for (BasicBlock *SuccBB : IBr->successors())
236 Updates.push_back(Elt: {DominatorTree::Delete, IBr->getParent(), SuccBB});
237 }
238 IBr->eraseFromParent();
239 }
240 }
241
242 // Now build the switch in the block. The block will have no terminator
243 // already.
244 auto *SI = SwitchInst::Create(Value: SwitchValue, Default: BBs[0], NumCases: BBs.size(), InsertBefore: SwitchBB);
245
246 // Add a case for each block.
247 for (int i : llvm::seq<int>(Begin: 1, End: BBs.size()))
248 SI->addCase(OnVal: ConstantInt::get(Ty: CommonITy, V: i + 1), Dest: BBs[i]);
249
250 if (DTU) {
251 // If there were multiple indirectbr's, they may have common successors,
252 // but in the dominator tree, we only track unique edges.
253 SmallPtrSet<BasicBlock *, 8> UniqueSuccessors;
254 Updates.reserve(N: Updates.size() + BBs.size());
255 for (BasicBlock *BB : BBs) {
256 if (UniqueSuccessors.insert(Ptr: BB).second)
257 Updates.push_back(Elt: {DominatorTree::Insert, SwitchBB, BB});
258 }
259 DTU->applyUpdates(Updates);
260 }
261
262 return true;
263}
264
265bool IndirectBrExpandLegacyPass::runOnFunction(Function &F) {
266 auto *TPC = getAnalysisIfAvailable<TargetPassConfig>();
267 if (!TPC)
268 return false;
269
270 auto &TM = TPC->getTM<TargetMachine>();
271 auto &STI = *TM.getSubtargetImpl(F);
272 if (!STI.enableIndirectBrExpand())
273 return false;
274 auto *TLI = STI.getTargetLowering();
275
276 std::optional<DomTreeUpdater> DTU;
277 if (auto *DTWP = getAnalysisIfAvailable<DominatorTreeWrapperPass>())
278 DTU.emplace(args&: DTWP->getDomTree(), args: DomTreeUpdater::UpdateStrategy::Lazy);
279
280 return runImpl(F, TLI, DTU: DTU ? &*DTU : nullptr);
281}
282