1//===- LiveRegUnits.cpp - Register Unit Set -------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file This file imlements the LiveRegUnits set.
10//
11//===----------------------------------------------------------------------===//
12
13#include "llvm/CodeGen/LiveRegUnits.h"
14#include "llvm/CodeGen/MachineBasicBlock.h"
15#include "llvm/CodeGen/MachineFrameInfo.h"
16#include "llvm/CodeGen/MachineFunction.h"
17#include "llvm/CodeGen/MachineOperand.h"
18#include "llvm/CodeGen/MachineRegisterInfo.h"
19
20using namespace llvm;
21
22void LiveRegUnits::removeRegsNotPreserved(const uint32_t *RegMask) {
23 for (MCRegUnit U : TRI->regunits()) {
24 for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) {
25 if (MachineOperand::clobbersPhysReg(RegMask, PhysReg: *RootReg)) {
26 Units.reset(Idx: static_cast<unsigned>(U));
27 break;
28 }
29 }
30 }
31}
32
33void LiveRegUnits::addRegsInMask(const uint32_t *RegMask) {
34 for (MCRegUnit U : TRI->regunits()) {
35 for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) {
36 if (MachineOperand::clobbersPhysReg(RegMask, PhysReg: *RootReg)) {
37 Units.set(static_cast<unsigned>(U));
38 break;
39 }
40 }
41 }
42}
43
44void LiveRegUnits::stepBackward(const MachineInstr &MI) {
45 assert(!MI.isDebugInstr() &&
46 "Debug instructions must not affect liveness calculation");
47
48 // Remove defined registers and regmask kills from the set.
49 for (const MachineOperand &MOP : MI.operands()) {
50 if (MOP.isReg()) {
51 if (MOP.isDef() && MOP.getReg().isPhysical())
52 removeReg(Reg: MOP.getReg());
53 continue;
54 }
55
56 if (MOP.isRegMask()) {
57 removeRegsNotPreserved(RegMask: MOP.getRegMask());
58 continue;
59 }
60 }
61
62 // Add uses to the set.
63 for (const MachineOperand &MOP : MI.operands()) {
64 if (!MOP.isReg() || !MOP.readsReg())
65 continue;
66
67 if (MOP.getReg().isPhysical())
68 addReg(Reg: MOP.getReg());
69 }
70}
71
72void LiveRegUnits::accumulate(const MachineInstr &MI) {
73 // Add defs, uses and regmask clobbers to the set.
74 for (const MachineOperand &MOP : MI.operands()) {
75 if (MOP.isReg()) {
76 if (!MOP.getReg().isPhysical())
77 continue;
78 if (MOP.isDef() || MOP.readsReg())
79 addReg(Reg: MOP.getReg());
80 continue;
81 }
82
83 if (MOP.isRegMask()) {
84 addRegsInMask(RegMask: MOP.getRegMask());
85 continue;
86 }
87 }
88}
89
90/// Add live-in registers of basic block \p MBB to \p LiveUnits.
91static void addBlockLiveIns(LiveRegUnits &LiveUnits,
92 const MachineBasicBlock &MBB) {
93 for (const auto &LI : MBB.liveins())
94 LiveUnits.addRegMasked(Reg: LI.PhysReg, Mask: LI.LaneMask);
95}
96
97/// Add live-out registers of basic block \p MBB to \p LiveUnits.
98static void addBlockLiveOuts(LiveRegUnits &LiveUnits,
99 const MachineBasicBlock &MBB) {
100 for (const auto &LO : MBB.liveouts())
101 LiveUnits.addRegMasked(Reg: LO.PhysReg, Mask: LO.LaneMask);
102}
103
104/// Adds all callee saved registers to \p LiveUnits.
105static void addCalleeSavedRegs(LiveRegUnits &LiveUnits,
106 const MachineFunction &MF) {
107 const MachineRegisterInfo &MRI = MF.getRegInfo();
108 for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; ++CSR)
109 LiveUnits.addReg(Reg: *CSR);
110}
111
112void LiveRegUnits::addPristines(const MachineFunction &MF) {
113 const MachineFrameInfo &MFI = MF.getFrameInfo();
114 if (!MFI.isCalleeSavedInfoValid())
115 return;
116 /// This function will usually be called on an empty object, handle this
117 /// as a special case.
118 if (empty()) {
119 /// Add all callee saved regs, then remove the ones that are saved and
120 /// restored.
121 addCalleeSavedRegs(LiveUnits&: *this, MF);
122 /// Remove the ones that are not saved/restored; they are pristine.
123 for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
124 removeReg(Reg: Info.getReg());
125 return;
126 }
127 /// If a callee-saved register that is not pristine is already present
128 /// in the set, we should make sure that it stays in it. Precompute the
129 /// set of pristine registers in a separate object.
130 /// Add all callee saved regs, then remove the ones that are saved+restored.
131 LiveRegUnits Pristine(*TRI);
132 addCalleeSavedRegs(LiveUnits&: Pristine, MF);
133 /// Remove the ones that are not saved/restored; they are pristine.
134 for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
135 Pristine.removeReg(Reg: Info.getReg());
136 addUnits(RegUnits: Pristine.getBitVector());
137}
138
139void LiveRegUnits::addLiveOuts(const MachineBasicBlock &MBB) {
140 const MachineFunction &MF = *MBB.getParent();
141 addPristines(MF);
142 addBlockLiveOuts(LiveUnits&: *this, MBB);
143
144 // For the return block: Add all callee saved registers.
145 if (MBB.isReturnBlock()) {
146 const MachineFrameInfo &MFI = MF.getFrameInfo();
147 if (MFI.isCalleeSavedInfoValid()) {
148 addCalleeSavedRegs(LiveUnits&: *this, MF);
149 // We assume callee-saved registers without CalleeSavedInfo are liveout.
150 for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo()) {
151 if (!Info.isRestored())
152 removeReg(Reg: Info.getReg());
153 }
154 }
155 }
156}
157
158void LiveRegUnits::addLiveIns(const MachineBasicBlock &MBB) {
159 const MachineFunction &MF = *MBB.getParent();
160 addPristines(MF);
161 addBlockLiveIns(LiveUnits&: *this, MBB);
162}
163