| 1 | //=- AArch64RedundantCondBranch.cpp - Remove redundant conditional branches -=// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // Late in the pipeline, especially with zero phi operands propagated after tail |
| 10 | // duplications, we can end up with CBZ/CBNZ/TBZ/TBNZ with a zero register. This |
| 11 | // simple pass looks at the terminators to a block, removing the redundant |
| 12 | // instructions where necessary. |
| 13 | // |
| 14 | //===----------------------------------------------------------------------===// |
| 15 | |
| 16 | #include "AArch64.h" |
| 17 | #include "AArch64InstrInfo.h" |
| 18 | #include "llvm/CodeGen/MachineFunctionPass.h" |
| 19 | #include "llvm/CodeGen/TargetInstrInfo.h" |
| 20 | |
| 21 | using namespace llvm; |
| 22 | |
| 23 | #define DEBUG_TYPE "aarch64-redundantcondbranch" |
| 24 | |
| 25 | namespace { |
| 26 | |
| 27 | class AArch64RedundantCondBranchLegacy : public MachineFunctionPass { |
| 28 | public: |
| 29 | static char ID; |
| 30 | AArch64RedundantCondBranchLegacy() : MachineFunctionPass(ID) {} |
| 31 | |
| 32 | StringRef getPassName() const override { |
| 33 | return "AArch64 Redundant Conditional Branch Elimination" ; |
| 34 | } |
| 35 | |
| 36 | protected: |
| 37 | bool runOnMachineFunction(MachineFunction &MF) override; |
| 38 | |
| 39 | MachineFunctionProperties getRequiredProperties() const override { |
| 40 | return MachineFunctionProperties().setNoVRegs(); |
| 41 | } |
| 42 | }; |
| 43 | char AArch64RedundantCondBranchLegacy::ID = 0; |
| 44 | } // namespace |
| 45 | |
| 46 | INITIALIZE_PASS(AArch64RedundantCondBranchLegacy, "aarch64-redundantcondbranch" , |
| 47 | "AArch64 Redundant Conditional Branch Elimination pass" , false, |
| 48 | false) |
| 49 | |
| 50 | static bool runAArch64RedundantCondBranch(MachineFunction &MF) { |
| 51 | const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo(); |
| 52 | |
| 53 | bool Changed = false; |
| 54 | for (MachineBasicBlock &MBB : MF) |
| 55 | Changed |= optimizeTerminators(MBB: &MBB, TII); |
| 56 | return Changed; |
| 57 | } |
| 58 | |
| 59 | bool AArch64RedundantCondBranchLegacy::runOnMachineFunction( |
| 60 | MachineFunction &MF) { |
| 61 | if (skipFunction(F: MF.getFunction())) |
| 62 | return false; |
| 63 | |
| 64 | return runAArch64RedundantCondBranch(MF); |
| 65 | } |
| 66 | |
| 67 | PreservedAnalyses |
| 68 | AArch64RedundantCondBranchPass::run(MachineFunction &MF, |
| 69 | MachineFunctionAnalysisManager &) { |
| 70 | if (runAArch64RedundantCondBranch(MF)) { |
| 71 | return getMachineFunctionPassPreservedAnalyses(); |
| 72 | } |
| 73 | return PreservedAnalyses::all(); |
| 74 | } |
| 75 | |
| 76 | FunctionPass *llvm::createAArch64RedundantCondBranchPass() { |
| 77 | return new AArch64RedundantCondBranchLegacy(); |
| 78 | } |
| 79 | |