| 1 | //=- AArch64RedundantCondBranch.cpp - Remove redundant conditional branches -=// |
|---|---|
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // Late in the pipeline, especially with zero phi operands propagated after tail |
| 10 | // duplications, we can end up with CBZ/CBNZ/TBZ/TBNZ with a zero register. This |
| 11 | // simple pass looks at the terminators to a block, removing the redundant |
| 12 | // instructions where necessary. |
| 13 | // |
| 14 | //===----------------------------------------------------------------------===// |
| 15 | |
| 16 | #include "AArch64.h" |
| 17 | #include "AArch64InstrInfo.h" |
| 18 | #include "llvm/CodeGen/MachineFunctionPass.h" |
| 19 | #include "llvm/CodeGen/MachineInstrBuilder.h" |
| 20 | #include "llvm/CodeGen/TargetInstrInfo.h" |
| 21 | #include "llvm/Support/Debug.h" |
| 22 | |
| 23 | using namespace llvm; |
| 24 | |
| 25 | #define DEBUG_TYPE "aarch64-redundantcondbranch" |
| 26 | |
| 27 | namespace { |
| 28 | class AArch64RedundantCondBranch : public MachineFunctionPass { |
| 29 | public: |
| 30 | static char ID; |
| 31 | AArch64RedundantCondBranch() : MachineFunctionPass(ID) {} |
| 32 | |
| 33 | bool runOnMachineFunction(MachineFunction &MF) override; |
| 34 | |
| 35 | MachineFunctionProperties getRequiredProperties() const override { |
| 36 | return MachineFunctionProperties().setNoVRegs(); |
| 37 | } |
| 38 | StringRef getPassName() const override { |
| 39 | return "AArch64 Redundant Conditional Branch Elimination"; |
| 40 | } |
| 41 | }; |
| 42 | char AArch64RedundantCondBranch::ID = 0; |
| 43 | } // namespace |
| 44 | |
| 45 | INITIALIZE_PASS(AArch64RedundantCondBranch, "aarch64-redundantcondbranch", |
| 46 | "AArch64 Redundant Conditional Branch Elimination pass", false, |
| 47 | false) |
| 48 | |
| 49 | bool AArch64RedundantCondBranch::runOnMachineFunction(MachineFunction &MF) { |
| 50 | if (skipFunction(F: MF.getFunction())) |
| 51 | return false; |
| 52 | |
| 53 | const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo(); |
| 54 | |
| 55 | bool Changed = false; |
| 56 | for (MachineBasicBlock &MBB : MF) |
| 57 | Changed |= optimizeTerminators(MBB: &MBB, TII); |
| 58 | return Changed; |
| 59 | } |
| 60 | |
| 61 | FunctionPass *llvm::createAArch64RedundantCondBranchPass() { |
| 62 | return new AArch64RedundantCondBranch(); |
| 63 | } |
| 64 |