1//==-- AArch64.h - Top-level interface for AArch64 --------------*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the entry points for global functions defined in the LLVM
10// AArch64 back-end.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64_H
15#define LLVM_LIB_TARGET_AARCH64_AARCH64_H
16
17#include "MCTargetDesc/AArch64MCTargetDesc.h"
18#include "Utils/AArch64BaseInfo.h"
19#include "llvm/ADT/StringMap.h"
20#include "llvm/Analysis/LoopAnalysisManager.h"
21#include "llvm/CodeGen/MachineFunction.h"
22#include "llvm/CodeGen/MachineFunctionAnalysisManager.h"
23#include "llvm/CodeGen/SelectionDAGISel.h"
24#include "llvm/Pass.h"
25#include "llvm/PassRegistry.h"
26#include "llvm/Support/DataTypes.h"
27#include "llvm/Target/TargetMachine.h"
28#include "llvm/Transforms/Scalar/LoopPassManager.h"
29#include <map>
30#include <memory>
31
32struct AArch64O0PreLegalizerCombinerImplRuleConfig;
33struct AArch64PreLegalizerCombinerImplRuleConfig;
34struct AArch64PostLegalizerCombinerImplRuleConfig;
35struct AArch64PostLegalizerLoweringImplRuleConfig;
36
37namespace llvm {
38
39class AArch64RegisterBankInfo;
40class AArch64Subtarget;
41class AArch64TargetMachine;
42enum class CodeGenOptLevel;
43class FunctionPass;
44class InstructionSelector;
45class ModulePass;
46
47FunctionPass *createAArch64DeadRegisterDefinitions();
48FunctionPass *createAArch64RedundantCopyEliminationPass();
49FunctionPass *createAArch64RedundantCondBranchPass();
50FunctionPass *createAArch64CondBrTuning();
51FunctionPass *createAArch64CompressJumpTablesPass();
52FunctionPass *createAArch64ConditionalCompares();
53FunctionPass *createAArch64AdvSIMDScalar();
54FunctionPass *createAArch64ISelDag(AArch64TargetMachine &TM,
55 CodeGenOptLevel OptLevel);
56FunctionPass *createAArch64StorePairSuppressPass();
57FunctionPass *createAArch64ExpandPseudoLegacyPass();
58FunctionPass *createAArch64SLSHardeningLegacyPass();
59FunctionPass *createAArch64SpeculationHardeningPass();
60FunctionPass *createAArch64LoadStoreOptLegacyPass();
61ModulePass *createAArch64LowerHomogeneousPrologEpilogPass();
62FunctionPass *createAArch64SIMDInstrOptPass();
63ModulePass *createAArch64PromoteConstantPass();
64FunctionPass *createAArch64ConditionOptimizerLegacyPass();
65FunctionPass *createAArch64A57FPLoadBalancingLegacyPass();
66FunctionPass *createAArch64A53Fix835769LegacyPass();
67FunctionPass *createFalkorHWPFFixPass();
68FunctionPass *createFalkorMarkStridedAccessesPass();
69FunctionPass *createAArch64PointerAuthPass();
70FunctionPass *createAArch64BranchTargetsPass();
71FunctionPass *createAArch64CodeLayoutOptPass();
72FunctionPass *createAArch64MIPeepholeOptLegacyPass();
73FunctionPass *createAArch64PostCoalescerPass();
74FunctionPass *createAArch64PTrueCoalescingLegacyPass();
75FunctionPass *createAArch64CleanupLocalDynamicTLSPass();
76
77FunctionPass *createAArch64CollectLOHPass();
78FunctionPass *createSMEPeepholeOptPass();
79FunctionPass *createMachineSMEABIPass(CodeGenOptLevel);
80FunctionPass *createAArch64SRLTDefineSuperRegsLegacyPass();
81ModulePass *createSVEIntrinsicOptsPass();
82Pass *createSVEShuffleOptsPass();
83InstructionSelector *
84createAArch64InstructionSelector(const AArch64TargetMachine &,
85 const AArch64Subtarget &,
86 const AArch64RegisterBankInfo &);
87class AArch64O0PreLegalizerCombinerPass
88 : public OptionalPassInfoMixin<AArch64O0PreLegalizerCombinerPass> {
89 std::unique_ptr<AArch64O0PreLegalizerCombinerImplRuleConfig> RuleConfig;
90
91public:
92 AArch64O0PreLegalizerCombinerPass();
93 AArch64O0PreLegalizerCombinerPass(AArch64O0PreLegalizerCombinerPass &&);
94 ~AArch64O0PreLegalizerCombinerPass();
95
96 PreservedAnalyses run(MachineFunction &MF,
97 MachineFunctionAnalysisManager &MFAM);
98};
99
100class AArch64PreLegalizerCombinerPass
101 : public OptionalPassInfoMixin<AArch64PreLegalizerCombinerPass> {
102 std::unique_ptr<AArch64PreLegalizerCombinerImplRuleConfig> RuleConfig;
103
104public:
105 AArch64PreLegalizerCombinerPass();
106 AArch64PreLegalizerCombinerPass(AArch64PreLegalizerCombinerPass &&);
107 ~AArch64PreLegalizerCombinerPass();
108
109 PreservedAnalyses run(MachineFunction &MF,
110 MachineFunctionAnalysisManager &MFAM);
111};
112
113class AArch64PostLegalizerCombinerPass
114 : public PassInfoMixin<AArch64PostLegalizerCombinerPass> {
115 std::unique_ptr<AArch64PostLegalizerCombinerImplRuleConfig> RuleConfig;
116 const AArch64TargetMachine *TM;
117
118public:
119 AArch64PostLegalizerCombinerPass(const AArch64TargetMachine *TM);
120 AArch64PostLegalizerCombinerPass(AArch64PostLegalizerCombinerPass &&);
121 ~AArch64PostLegalizerCombinerPass();
122
123 PreservedAnalyses run(MachineFunction &MF,
124 MachineFunctionAnalysisManager &MFAM);
125 MachineFunctionProperties getRequiredProperties() const {
126 return MachineFunctionProperties().set(
127 MachineFunctionProperties::Property::Legalized);
128 }
129};
130
131class AArch64PostSelectOptimizePass
132 : public OptionalPassInfoMixin<AArch64PostSelectOptimizePass> {
133public:
134 PreservedAnalyses run(MachineFunction &MF,
135 MachineFunctionAnalysisManager &MFAM);
136};
137
138class AArch64PostLegalizerLoweringPass
139 : public OptionalPassInfoMixin<AArch64PostLegalizerLoweringPass> {
140 std::unique_ptr<AArch64PostLegalizerLoweringImplRuleConfig> RuleConfig;
141
142public:
143 AArch64PostLegalizerLoweringPass();
144 AArch64PostLegalizerLoweringPass(AArch64PostLegalizerLoweringPass &&);
145 ~AArch64PostLegalizerLoweringPass();
146
147 PreservedAnalyses run(MachineFunction &MF,
148 MachineFunctionAnalysisManager &MFAM);
149
150 MachineFunctionProperties getRequiredProperties() const {
151 return MachineFunctionProperties().set(
152 MachineFunctionProperties::Property::Legalized);
153 }
154};
155
156FunctionPass *createAArch64O0PreLegalizerCombiner();
157FunctionPass *createAArch64PreLegalizerCombiner();
158FunctionPass *createAArch64PostLegalizerCombinerLegacy(bool IsOptNone);
159FunctionPass *createAArch64PostLegalizerLowering();
160FunctionPass *createAArch64PostSelectOptimize();
161FunctionPass *createAArch64StackTaggingPass(bool IsOptNone);
162FunctionPass *createAArch64StackTaggingPreRALegacyPass();
163ModulePass *createAArch64Arm64ECCallLoweringPass();
164
165void initializeAArch64A53Fix835769LegacyPass(PassRegistry &);
166void initializeAArch64A57FPLoadBalancingLegacyPass(PassRegistry &);
167void initializeAArch64AdvSIMDScalarLegacyPass(PassRegistry &);
168void initializeAArch64AsmPrinterPass(PassRegistry &);
169void initializeAArch64PointerAuthLegacyPass(PassRegistry &);
170void initializeAArch64BranchTargetsLegacyPass(PassRegistry &);
171void initializeAArch64CFIFixupPass(PassRegistry&);
172void initializeAArch64CollectLOHLegacyPass(PassRegistry &);
173void initializeAArch64CompressJumpTablesLegacyPass(PassRegistry &);
174void initializeAArch64CondBrTuningPass(PassRegistry &);
175void initializeAArch64ConditionOptimizerLegacyPass(PassRegistry &);
176void initializeAArch64ConditionalComparesLegacyPass(PassRegistry &);
177void initializeAArch64DAGToDAGISelLegacyPass(PassRegistry &);
178void initializeAArch64DeadRegisterDefinitionsLegacyPass(PassRegistry &);
179void initializeAArch64ExpandPseudoLegacyPass(PassRegistry &);
180void initializeAArch64LoadStoreOptLegacyPass(PassRegistry &);
181void initializeAArch64LowerHomogeneousPrologEpilogLegacyPass(PassRegistry &);
182void initializeAArch64CodeLayoutOptPass(PassRegistry &);
183void initializeAArch64MIPeepholeOptLegacyPass(PassRegistry &);
184void initializeAArch64PTrueCoalescingLegacyPass(PassRegistry &);
185void initializeAArch64O0PreLegalizerCombinerLegacyPass(PassRegistry &);
186void initializeAArch64PostCoalescerLegacyPass(PassRegistry &);
187void initializeAArch64PostLegalizerCombinerLegacyPass(PassRegistry &);
188void initializeAArch64PostSelectOptimizeLegacyPass(PassRegistry &);
189void initializeAArch64PostLegalizerLoweringLegacyPass(PassRegistry &);
190void initializeAArch64PreLegalizerCombinerLegacyPass(PassRegistry &);
191void initializeAArch64PromoteConstantPass(PassRegistry&);
192void initializeAArch64RedundantCopyEliminationLegacyPass(PassRegistry &);
193void initializeAArch64RedundantCondBranchLegacyPass(PassRegistry &);
194void initializeAArch64SIMDInstrOptLegacyPass(PassRegistry &);
195void initializeAArch64SLSHardeningLegacyPass(PassRegistry &);
196void initializeAArch64SpeculationHardeningPass(PassRegistry &);
197void initializeAArch64StackTaggingPass(PassRegistry &);
198void initializeAArch64StackTaggingPreRALegacyPass(PassRegistry &);
199void initializeAArch64StorePairSuppressPass(PassRegistry&);
200void initializeFalkorHWPFFixPass(PassRegistry&);
201void initializeFalkorMarkStridedAccessesLegacyPass(PassRegistry&);
202void initializeLDTLSCleanupPass(PassRegistry &);
203void initializeSMEPeepholeOptPass(PassRegistry &);
204void initializeMachineSMEABIPass(PassRegistry &);
205void initializeAArch64SRLTDefineSuperRegsLegacyPass(PassRegistry &);
206void initializeSVEIntrinsicOptsPass(PassRegistry &);
207void initializeSVEShuffleOptsPass(PassRegistry &);
208void initializeAArch64Arm64ECCallLoweringPass(PassRegistry &);
209
210class SVEShuffleOptsPass : public PassInfoMixin<SVEShuffleOptsPass> {
211 const AArch64TargetMachine &TM;
212
213public:
214 explicit SVEShuffleOptsPass(const AArch64TargetMachine &TM) : TM(TM) {}
215 LLVM_ABI PreservedAnalyses run(Loop &L, LoopAnalysisManager &AM,
216 LoopStandardAnalysisResults &AR,
217 LPMUpdater &U);
218};
219
220class AArch64StackTaggingPreRAPass
221 : public OptionalPassInfoMixin<AArch64StackTaggingPreRAPass> {
222public:
223 PreservedAnalyses run(MachineFunction &MF,
224 MachineFunctionAnalysisManager &MFAM);
225};
226
227class AArch64A57FPLoadBalancingPass
228 : public OptionalPassInfoMixin<AArch64A57FPLoadBalancingPass> {
229public:
230 PreservedAnalyses run(MachineFunction &MF,
231 MachineFunctionAnalysisManager &MFAM);
232};
233
234class AArch64LoadStoreOptPass
235 : public OptionalPassInfoMixin<AArch64LoadStoreOptPass> {
236public:
237 PreservedAnalyses run(MachineFunction &MF,
238 MachineFunctionAnalysisManager &MFAM);
239};
240
241class AArch64A53Fix835769Pass
242 : public OptionalPassInfoMixin<AArch64A53Fix835769Pass> {
243public:
244 PreservedAnalyses run(MachineFunction &MF,
245 MachineFunctionAnalysisManager &MFAM);
246};
247
248class AArch64BranchTargetsPass
249 : public OptionalPassInfoMixin<AArch64BranchTargetsPass> {
250public:
251 PreservedAnalyses run(MachineFunction &MF,
252 MachineFunctionAnalysisManager &MFAM);
253};
254
255class AArch64RedundantCondBranchPass
256 : public OptionalPassInfoMixin<AArch64RedundantCondBranchPass> {
257public:
258 PreservedAnalyses run(MachineFunction &MF,
259 MachineFunctionAnalysisManager &MFAM);
260};
261
262class AArch64AdvSIMDScalarPass
263 : public OptionalPassInfoMixin<AArch64AdvSIMDScalarPass> {
264public:
265 PreservedAnalyses run(MachineFunction &MF,
266 MachineFunctionAnalysisManager &MFAM);
267};
268
269class AArch64CollectLOHPass
270 : public OptionalPassInfoMixin<AArch64CollectLOHPass> {
271public:
272 PreservedAnalyses run(MachineFunction &MF,
273 MachineFunctionAnalysisManager &MFAM);
274};
275
276class AArch64CompressJumpTablesPass
277 : public OptionalPassInfoMixin<AArch64CompressJumpTablesPass> {
278public:
279 PreservedAnalyses run(MachineFunction &MF,
280 MachineFunctionAnalysisManager &MFAM);
281};
282
283// SelectionDAGISelPass is already a NewPM interface.
284class AArch64DAGToDAGISelPass : public SelectionDAGISelPass {
285public:
286 AArch64DAGToDAGISelPass(AArch64TargetMachine &TM);
287};
288
289class AArch64DeadRegisterDefinitionsPass
290 : public OptionalPassInfoMixin<AArch64DeadRegisterDefinitionsPass> {
291public:
292 PreservedAnalyses run(MachineFunction &MF,
293 MachineFunctionAnalysisManager &MFAM);
294};
295
296class AArch64ExpandPseudoPass
297 : public OptionalPassInfoMixin<AArch64ExpandPseudoPass> {
298public:
299 PreservedAnalyses run(MachineFunction &MF,
300 MachineFunctionAnalysisManager &MFAM);
301};
302
303class AArch64MIPeepholeOptPass
304 : public OptionalPassInfoMixin<AArch64MIPeepholeOptPass> {
305public:
306 PreservedAnalyses run(MachineFunction &MF,
307 MachineFunctionAnalysisManager &MFAM);
308};
309
310class AArch64PTrueCoalescingPass
311 : public OptionalPassInfoMixin<AArch64PTrueCoalescingPass> {
312public:
313 PreservedAnalyses run(MachineFunction &MF,
314 MachineFunctionAnalysisManager &MFAM);
315};
316
317class AArch64ConditionOptimizerPass
318 : public OptionalPassInfoMixin<AArch64ConditionOptimizerPass> {
319public:
320 PreservedAnalyses run(MachineFunction &MF,
321 MachineFunctionAnalysisManager &MFAM);
322};
323
324class AArch64SIMDInstrOptPass
325 : public OptionalPassInfoMixin<AArch64SIMDInstrOptPass> {
326 std::map<std::pair<unsigned, std::string>, bool> SIMDInstrTable;
327 StringMap<bool> InterlEarlyExit;
328
329public:
330 PreservedAnalyses run(MachineFunction &MF,
331 MachineFunctionAnalysisManager &MFAM);
332};
333
334class AArch64PointerAuthPass
335 : public OptionalPassInfoMixin<AArch64PointerAuthPass> {
336public:
337 PreservedAnalyses run(MachineFunction &MF,
338 MachineFunctionAnalysisManager &MFAM);
339};
340
341class AArch64SLSHardeningPass : public PassInfoMixin<AArch64SLSHardeningPass> {
342public:
343 PreservedAnalyses run(MachineFunction &MF,
344 MachineFunctionAnalysisManager &MFAM);
345};
346
347class AArch64PostCoalescerPass
348 : public OptionalPassInfoMixin<AArch64PostCoalescerPass> {
349public:
350 PreservedAnalyses run(MachineFunction &MF,
351 MachineFunctionAnalysisManager &MFAM);
352};
353
354class AArch64RedundantCopyEliminationPass
355 : public OptionalPassInfoMixin<AArch64RedundantCopyEliminationPass> {
356public:
357 PreservedAnalyses run(MachineFunction &MF,
358 MachineFunctionAnalysisManager &MFAM);
359};
360
361class AArch64ConditionalComparesPass
362 : public OptionalPassInfoMixin<AArch64ConditionalComparesPass> {
363public:
364 PreservedAnalyses run(MachineFunction &MF,
365 MachineFunctionAnalysisManager &MFAM);
366};
367
368class AArch64SRLTDefineSuperRegsPass
369 : public OptionalPassInfoMixin<AArch64SRLTDefineSuperRegsPass> {
370public:
371 PreservedAnalyses run(MachineFunction &MF,
372 MachineFunctionAnalysisManager &MFAM);
373};
374
375class AArch64LowerHomogeneousPrologEpilogPass
376 : public PassInfoMixin<AArch64LowerHomogeneousPrologEpilogPass> {
377public:
378 PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
379};
380
381} // end namespace llvm
382
383#endif
384