1//==-- AArch64.h - Top-level interface for AArch64 --------------*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the entry points for global functions defined in the LLVM
10// AArch64 back-end.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64_H
15#define LLVM_LIB_TARGET_AARCH64_AARCH64_H
16
17#include "MCTargetDesc/AArch64MCTargetDesc.h"
18#include "Utils/AArch64BaseInfo.h"
19#include "llvm/ADT/StringMap.h"
20#include "llvm/Analysis/LoopAnalysisManager.h"
21#include "llvm/CodeGen/MachineFunction.h"
22#include "llvm/CodeGen/MachineFunctionAnalysisManager.h"
23#include "llvm/CodeGen/SelectionDAGISel.h"
24#include "llvm/IR/PassManager.h"
25#include "llvm/Pass.h"
26#include "llvm/PassRegistry.h"
27#include "llvm/Support/DataTypes.h"
28#include "llvm/Target/TargetMachine.h"
29#include "llvm/Transforms/Scalar/LoopPassManager.h"
30#include <map>
31#include <memory>
32
33struct AArch64O0PreLegalizerCombinerImplRuleConfig;
34struct AArch64PreLegalizerCombinerImplRuleConfig;
35struct AArch64PostLegalizerCombinerImplRuleConfig;
36struct AArch64PostLegalizerLoweringImplRuleConfig;
37
38namespace llvm {
39
40class AArch64RegisterBankInfo;
41class AArch64Subtarget;
42class AArch64TargetMachine;
43enum class CodeGenOptLevel;
44class FunctionPass;
45class InstructionSelector;
46class ModulePass;
47
48FunctionPass *createAArch64DeadRegisterDefinitions();
49FunctionPass *createAArch64RedundantCopyEliminationPass();
50FunctionPass *createAArch64RedundantCondBranchPass();
51FunctionPass *createAArch64CondBrTuning();
52FunctionPass *createAArch64CompressJumpTablesPass();
53FunctionPass *createAArch64ConditionalCompares();
54FunctionPass *createAArch64AdvSIMDScalar();
55FunctionPass *createAArch64ISelDag(AArch64TargetMachine &TM,
56 CodeGenOptLevel OptLevel);
57FunctionPass *createAArch64StorePairSuppressPass();
58FunctionPass *createAArch64ExpandPseudoLegacyPass();
59FunctionPass *createAArch64SLSHardeningLegacyPass();
60FunctionPass *createAArch64SpeculationHardeningPass();
61FunctionPass *createAArch64LoadStoreOptLegacyPass();
62ModulePass *createAArch64LowerHomogeneousPrologEpilogPass();
63FunctionPass *createAArch64SIMDInstrOptPass();
64ModulePass *createAArch64PromoteConstantPass();
65FunctionPass *createAArch64ConditionOptimizerLegacyPass();
66FunctionPass *createAArch64A57FPLoadBalancingLegacyPass();
67FunctionPass *createAArch64A53Fix835769LegacyPass();
68FunctionPass *createFalkorHWPFFixPass();
69FunctionPass *createFalkorMarkStridedAccessesPass();
70FunctionPass *createAArch64PointerAuthPass();
71FunctionPass *createAArch64BranchTargetsPass();
72FunctionPass *createAArch64CodeLayoutOptPass();
73FunctionPass *createAArch64MIPeepholeOptLegacyPass();
74FunctionPass *createAArch64PostCoalescerPass();
75FunctionPass *createAArch64PTrueCoalescingLegacyPass();
76FunctionPass *createAArch64CleanupLocalDynamicTLSPass();
77
78FunctionPass *createAArch64CollectLOHPass();
79Pass *createAArch64PredicateAsCounterLoopRewritesPass();
80FunctionPass *createSMEPeepholeOptPass();
81FunctionPass *createMachineSMEABIPass(CodeGenOptLevel);
82FunctionPass *createAArch64SRLTDefineSuperRegsLegacyPass();
83Pass *createSVEShuffleOptsPass();
84InstructionSelector *
85createAArch64InstructionSelector(const AArch64TargetMachine &,
86 const AArch64Subtarget &,
87 const AArch64RegisterBankInfo &);
88class AArch64O0PreLegalizerCombinerPass
89 : public OptionalPassInfoMixin<AArch64O0PreLegalizerCombinerPass> {
90 std::unique_ptr<AArch64O0PreLegalizerCombinerImplRuleConfig> RuleConfig;
91
92public:
93 AArch64O0PreLegalizerCombinerPass();
94 AArch64O0PreLegalizerCombinerPass(AArch64O0PreLegalizerCombinerPass &&);
95 ~AArch64O0PreLegalizerCombinerPass();
96
97 PreservedAnalyses run(MachineFunction &MF,
98 MachineFunctionAnalysisManager &MFAM);
99};
100
101class AArch64PreLegalizerCombinerPass
102 : public OptionalPassInfoMixin<AArch64PreLegalizerCombinerPass> {
103 std::unique_ptr<AArch64PreLegalizerCombinerImplRuleConfig> RuleConfig;
104
105public:
106 AArch64PreLegalizerCombinerPass();
107 AArch64PreLegalizerCombinerPass(AArch64PreLegalizerCombinerPass &&);
108 ~AArch64PreLegalizerCombinerPass();
109
110 PreservedAnalyses run(MachineFunction &MF,
111 MachineFunctionAnalysisManager &MFAM);
112};
113
114class AArch64PostLegalizerCombinerPass
115 : public RequiredPassInfoMixin<AArch64PostLegalizerCombinerPass> {
116 std::unique_ptr<AArch64PostLegalizerCombinerImplRuleConfig> RuleConfig;
117 const AArch64TargetMachine *TM;
118
119public:
120 AArch64PostLegalizerCombinerPass(const AArch64TargetMachine *TM);
121 AArch64PostLegalizerCombinerPass(AArch64PostLegalizerCombinerPass &&);
122 ~AArch64PostLegalizerCombinerPass();
123
124 PreservedAnalyses run(MachineFunction &MF,
125 MachineFunctionAnalysisManager &MFAM);
126 MachineFunctionProperties getRequiredProperties() const {
127 return MachineFunctionProperties().set(
128 MachineFunctionProperties::Property::Legalized);
129 }
130};
131
132class AArch64PostSelectOptimizePass
133 : public OptionalPassInfoMixin<AArch64PostSelectOptimizePass> {
134public:
135 PreservedAnalyses run(MachineFunction &MF,
136 MachineFunctionAnalysisManager &MFAM);
137};
138
139class AArch64PostLegalizerLoweringPass
140 : public OptionalPassInfoMixin<AArch64PostLegalizerLoweringPass> {
141 std::unique_ptr<AArch64PostLegalizerLoweringImplRuleConfig> RuleConfig;
142
143public:
144 AArch64PostLegalizerLoweringPass();
145 AArch64PostLegalizerLoweringPass(AArch64PostLegalizerLoweringPass &&);
146 ~AArch64PostLegalizerLoweringPass();
147
148 PreservedAnalyses run(MachineFunction &MF,
149 MachineFunctionAnalysisManager &MFAM);
150
151 MachineFunctionProperties getRequiredProperties() const {
152 return MachineFunctionProperties().set(
153 MachineFunctionProperties::Property::Legalized);
154 }
155};
156
157FunctionPass *createAArch64O0PreLegalizerCombiner();
158FunctionPass *createAArch64PreLegalizerCombiner();
159FunctionPass *createAArch64PostLegalizerCombinerLegacy(bool IsOptNone);
160FunctionPass *createAArch64PostLegalizerLowering();
161FunctionPass *createAArch64PostSelectOptimize();
162FunctionPass *createAArch64StackTaggingPass(bool IsOptNone);
163FunctionPass *createAArch64StackTaggingPreRALegacyPass();
164ModulePass *createAArch64Arm64ECCallLoweringPass();
165
166void initializeAArch64A53Fix835769LegacyPass(PassRegistry &);
167void initializeAArch64A57FPLoadBalancingLegacyPass(PassRegistry &);
168void initializeAArch64AdvSIMDScalarLegacyPass(PassRegistry &);
169void initializeAArch64AsmPrinterPass(PassRegistry &);
170void initializeAArch64PointerAuthLegacyPass(PassRegistry &);
171void initializeAArch64PredicateAsCounterLoopRewritesPass(PassRegistry &);
172void initializeAArch64BranchTargetsLegacyPass(PassRegistry &);
173void initializeAArch64CollectLOHLegacyPass(PassRegistry &);
174void initializeAArch64CompressJumpTablesLegacyPass(PassRegistry &);
175void initializeAArch64CondBrTuningPass(PassRegistry &);
176void initializeAArch64ConditionOptimizerLegacyPass(PassRegistry &);
177void initializeAArch64ConditionalComparesLegacyPass(PassRegistry &);
178void initializeAArch64DAGToDAGISelLegacyPass(PassRegistry &);
179void initializeAArch64DeadRegisterDefinitionsLegacyPass(PassRegistry &);
180void initializeAArch64ExpandPseudoLegacyPass(PassRegistry &);
181void initializeAArch64LoadStoreOptLegacyPass(PassRegistry &);
182void initializeAArch64LowerHomogeneousPrologEpilogLegacyPass(PassRegistry &);
183void initializeAArch64CodeLayoutOptPass(PassRegistry &);
184void initializeAArch64MIPeepholeOptLegacyPass(PassRegistry &);
185void initializeAArch64PTrueCoalescingLegacyPass(PassRegistry &);
186void initializeAArch64O0PreLegalizerCombinerLegacyPass(PassRegistry &);
187void initializeAArch64PostCoalescerLegacyPass(PassRegistry &);
188void initializeAArch64PostLegalizerCombinerLegacyPass(PassRegistry &);
189void initializeAArch64PostSelectOptimizeLegacyPass(PassRegistry &);
190void initializeAArch64PostLegalizerLoweringLegacyPass(PassRegistry &);
191void initializeAArch64PreLegalizerCombinerLegacyPass(PassRegistry &);
192void initializeAArch64PromoteConstantPass(PassRegistry&);
193void initializeAArch64RedundantCopyEliminationLegacyPass(PassRegistry &);
194void initializeAArch64RedundantCondBranchLegacyPass(PassRegistry &);
195void initializeAArch64SIMDInstrOptLegacyPass(PassRegistry &);
196void initializeAArch64SLSHardeningLegacyPass(PassRegistry &);
197void initializeAArch64SpeculationHardeningPass(PassRegistry &);
198void initializeAArch64StackTaggingPass(PassRegistry &);
199void initializeAArch64StackTaggingPreRALegacyPass(PassRegistry &);
200void initializeAArch64StorePairSuppressPass(PassRegistry&);
201void initializeFalkorHWPFFixPass(PassRegistry&);
202void initializeFalkorMarkStridedAccessesLegacyPass(PassRegistry&);
203void initializeLDTLSCleanupPass(PassRegistry &);
204void initializeSMEPeepholeOptPass(PassRegistry &);
205void initializeMachineSMEABIPass(PassRegistry &);
206void initializeAArch64SRLTDefineSuperRegsLegacyPass(PassRegistry &);
207void initializeSVEShuffleOptsPass(PassRegistry &);
208void initializeAArch64Arm64ECCallLoweringPass(PassRegistry &);
209
210class AArch64SVEShuffleOptsPass
211 : public OptionalPassInfoMixin<AArch64SVEShuffleOptsPass> {
212 const AArch64TargetMachine &TM;
213
214public:
215 explicit AArch64SVEShuffleOptsPass(const AArch64TargetMachine &TM) : TM(TM) {}
216 LLVM_ABI PreservedAnalyses run(Loop &L, LoopAnalysisManager &AM,
217 LoopStandardAnalysisResults &AR,
218 LPMUpdater &U);
219};
220
221class AArch64StackTaggingPreRAPass
222 : public OptionalPassInfoMixin<AArch64StackTaggingPreRAPass> {
223public:
224 PreservedAnalyses run(MachineFunction &MF,
225 MachineFunctionAnalysisManager &MFAM);
226};
227
228class AArch64A57FPLoadBalancingPass
229 : public OptionalPassInfoMixin<AArch64A57FPLoadBalancingPass> {
230public:
231 PreservedAnalyses run(MachineFunction &MF,
232 MachineFunctionAnalysisManager &MFAM);
233};
234
235class AArch64LoadStoreOptPass
236 : public OptionalPassInfoMixin<AArch64LoadStoreOptPass> {
237public:
238 PreservedAnalyses run(MachineFunction &MF,
239 MachineFunctionAnalysisManager &MFAM);
240};
241
242class AArch64A53Fix835769Pass
243 : public OptionalPassInfoMixin<AArch64A53Fix835769Pass> {
244public:
245 PreservedAnalyses run(MachineFunction &MF,
246 MachineFunctionAnalysisManager &MFAM);
247};
248
249class AArch64BranchTargetsPass
250 : public OptionalPassInfoMixin<AArch64BranchTargetsPass> {
251public:
252 PreservedAnalyses run(MachineFunction &MF,
253 MachineFunctionAnalysisManager &MFAM);
254};
255
256class AArch64RedundantCondBranchPass
257 : public OptionalPassInfoMixin<AArch64RedundantCondBranchPass> {
258public:
259 PreservedAnalyses run(MachineFunction &MF,
260 MachineFunctionAnalysisManager &MFAM);
261};
262
263class AArch64AdvSIMDScalarPass
264 : public OptionalPassInfoMixin<AArch64AdvSIMDScalarPass> {
265public:
266 PreservedAnalyses run(MachineFunction &MF,
267 MachineFunctionAnalysisManager &MFAM);
268};
269
270class AArch64CollectLOHPass
271 : public OptionalPassInfoMixin<AArch64CollectLOHPass> {
272public:
273 PreservedAnalyses run(MachineFunction &MF,
274 MachineFunctionAnalysisManager &MFAM);
275};
276
277class AArch64CompressJumpTablesPass
278 : public OptionalPassInfoMixin<AArch64CompressJumpTablesPass> {
279public:
280 PreservedAnalyses run(MachineFunction &MF,
281 MachineFunctionAnalysisManager &MFAM);
282};
283
284// SelectionDAGISelPass is already a NewPM interface.
285class AArch64DAGToDAGISelPass : public SelectionDAGISelPass {
286public:
287 AArch64DAGToDAGISelPass(AArch64TargetMachine &TM);
288};
289
290class AArch64DeadRegisterDefinitionsPass
291 : public OptionalPassInfoMixin<AArch64DeadRegisterDefinitionsPass> {
292public:
293 PreservedAnalyses run(MachineFunction &MF,
294 MachineFunctionAnalysisManager &MFAM);
295};
296
297class AArch64ExpandPseudoPass
298 : public OptionalPassInfoMixin<AArch64ExpandPseudoPass> {
299public:
300 PreservedAnalyses run(MachineFunction &MF,
301 MachineFunctionAnalysisManager &MFAM);
302};
303
304class AArch64MIPeepholeOptPass
305 : public OptionalPassInfoMixin<AArch64MIPeepholeOptPass> {
306public:
307 PreservedAnalyses run(MachineFunction &MF,
308 MachineFunctionAnalysisManager &MFAM);
309};
310
311class AArch64PTrueCoalescingPass
312 : public OptionalPassInfoMixin<AArch64PTrueCoalescingPass> {
313public:
314 PreservedAnalyses run(MachineFunction &MF,
315 MachineFunctionAnalysisManager &MFAM);
316};
317
318class AArch64ConditionOptimizerPass
319 : public OptionalPassInfoMixin<AArch64ConditionOptimizerPass> {
320public:
321 PreservedAnalyses run(MachineFunction &MF,
322 MachineFunctionAnalysisManager &MFAM);
323};
324
325class AArch64SIMDInstrOptPass
326 : public OptionalPassInfoMixin<AArch64SIMDInstrOptPass> {
327 std::map<std::pair<unsigned, std::string>, bool> SIMDInstrTable;
328 StringMap<bool> InterlEarlyExit;
329
330public:
331 PreservedAnalyses run(MachineFunction &MF,
332 MachineFunctionAnalysisManager &MFAM);
333};
334
335class AArch64PointerAuthPass
336 : public OptionalPassInfoMixin<AArch64PointerAuthPass> {
337public:
338 PreservedAnalyses run(MachineFunction &MF,
339 MachineFunctionAnalysisManager &MFAM);
340};
341
342class AArch64SLSHardeningPass
343 : public RequiredPassInfoMixin<AArch64SLSHardeningPass> {
344public:
345 PreservedAnalyses run(MachineFunction &MF,
346 MachineFunctionAnalysisManager &MFAM);
347};
348
349class AArch64PostCoalescerPass
350 : public OptionalPassInfoMixin<AArch64PostCoalescerPass> {
351public:
352 PreservedAnalyses run(MachineFunction &MF,
353 MachineFunctionAnalysisManager &MFAM);
354};
355
356class AArch64RedundantCopyEliminationPass
357 : public OptionalPassInfoMixin<AArch64RedundantCopyEliminationPass> {
358public:
359 PreservedAnalyses run(MachineFunction &MF,
360 MachineFunctionAnalysisManager &MFAM);
361};
362
363class AArch64ConditionalComparesPass
364 : public OptionalPassInfoMixin<AArch64ConditionalComparesPass> {
365public:
366 PreservedAnalyses run(MachineFunction &MF,
367 MachineFunctionAnalysisManager &MFAM);
368};
369
370class AArch64SRLTDefineSuperRegsPass
371 : public OptionalPassInfoMixin<AArch64SRLTDefineSuperRegsPass> {
372public:
373 PreservedAnalyses run(MachineFunction &MF,
374 MachineFunctionAnalysisManager &MFAM);
375};
376
377class AArch64LowerHomogeneousPrologEpilogPass
378 : public RequiredPassInfoMixin<AArch64LowerHomogeneousPrologEpilogPass> {
379public:
380 PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
381};
382
383} // end namespace llvm
384
385#endif
386