1//==-- AArch64.h - Top-level interface for AArch64 --------------*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the entry points for global functions defined in the LLVM
10// AArch64 back-end.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64_H
15#define LLVM_LIB_TARGET_AARCH64_AARCH64_H
16
17#include "MCTargetDesc/AArch64MCTargetDesc.h"
18#include "Utils/AArch64BaseInfo.h"
19#include "llvm/Pass.h"
20#include "llvm/PassRegistry.h"
21#include "llvm/Support/DataTypes.h"
22#include "llvm/Target/TargetMachine.h"
23
24namespace llvm {
25
26class AArch64RegisterBankInfo;
27class AArch64Subtarget;
28class AArch64TargetMachine;
29enum class CodeGenOptLevel;
30class FunctionPass;
31class InstructionSelector;
32class ModulePass;
33
34FunctionPass *createAArch64DeadRegisterDefinitions();
35FunctionPass *createAArch64RedundantCopyEliminationPass();
36FunctionPass *createAArch64RedundantCondBranchPass();
37FunctionPass *createAArch64CondBrTuning();
38FunctionPass *createAArch64CompressJumpTablesPass();
39FunctionPass *createAArch64ConditionalCompares();
40FunctionPass *createAArch64AdvSIMDScalar();
41FunctionPass *createAArch64ISelDag(AArch64TargetMachine &TM,
42 CodeGenOptLevel OptLevel);
43FunctionPass *createAArch64StorePairSuppressPass();
44FunctionPass *createAArch64ExpandPseudoPass();
45FunctionPass *createAArch64SLSHardeningPass();
46FunctionPass *createAArch64SpeculationHardeningPass();
47FunctionPass *createAArch64LoadStoreOptimizationPass();
48ModulePass *createAArch64LowerHomogeneousPrologEpilogPass();
49FunctionPass *createAArch64SIMDInstrOptPass();
50ModulePass *createAArch64PromoteConstantPass();
51FunctionPass *createAArch64ConditionOptimizerPass();
52FunctionPass *createAArch64A57FPLoadBalancing();
53FunctionPass *createAArch64A53Fix835769();
54FunctionPass *createFalkorHWPFFixPass();
55FunctionPass *createFalkorMarkStridedAccessesPass();
56FunctionPass *createAArch64PointerAuthPass();
57FunctionPass *createAArch64BranchTargetsPass();
58FunctionPass *createAArch64MIPeepholeOptPass();
59FunctionPass *createAArch64PostCoalescerPass();
60
61FunctionPass *createAArch64CleanupLocalDynamicTLSPass();
62
63FunctionPass *createAArch64CollectLOHPass();
64FunctionPass *createSMEABIPass();
65FunctionPass *createSMEPeepholeOptPass();
66FunctionPass *createMachineSMEABIPass(CodeGenOptLevel);
67FunctionPass *createAArch64SRLTDefineSuperRegsPass();
68ModulePass *createSVEIntrinsicOptsPass();
69InstructionSelector *
70createAArch64InstructionSelector(const AArch64TargetMachine &,
71 const AArch64Subtarget &,
72 const AArch64RegisterBankInfo &);
73FunctionPass *createAArch64O0PreLegalizerCombiner();
74FunctionPass *createAArch64PreLegalizerCombiner();
75FunctionPass *createAArch64PostLegalizerCombiner(bool IsOptNone);
76FunctionPass *createAArch64PostLegalizerLowering();
77FunctionPass *createAArch64PostSelectOptimize();
78FunctionPass *createAArch64StackTaggingPass(bool IsOptNone);
79FunctionPass *createAArch64StackTaggingPreRAPass();
80ModulePass *createAArch64Arm64ECCallLoweringPass();
81
82void initializeAArch64A53Fix835769Pass(PassRegistry&);
83void initializeAArch64A57FPLoadBalancingPass(PassRegistry&);
84void initializeAArch64AdvSIMDScalarPass(PassRegistry&);
85void initializeAArch64AsmPrinterPass(PassRegistry &);
86void initializeAArch64PointerAuthPass(PassRegistry&);
87void initializeAArch64BranchTargetsPass(PassRegistry&);
88void initializeAArch64CFIFixupPass(PassRegistry&);
89void initializeAArch64CollectLOHPass(PassRegistry &);
90void initializeAArch64CompressJumpTablesPass(PassRegistry&);
91void initializeAArch64CondBrTuningPass(PassRegistry &);
92void initializeAArch64ConditionOptimizerPass(PassRegistry&);
93void initializeAArch64ConditionalComparesPass(PassRegistry &);
94void initializeAArch64DAGToDAGISelLegacyPass(PassRegistry &);
95void initializeAArch64DeadRegisterDefinitionsPass(PassRegistry&);
96void initializeAArch64ExpandPseudoPass(PassRegistry &);
97void initializeAArch64LoadStoreOptPass(PassRegistry&);
98void initializeAArch64LowerHomogeneousPrologEpilogPass(PassRegistry &);
99void initializeAArch64MIPeepholeOptPass(PassRegistry &);
100void initializeAArch64O0PreLegalizerCombinerPass(PassRegistry &);
101void initializeAArch64PostCoalescerPass(PassRegistry &);
102void initializeAArch64PostLegalizerCombinerPass(PassRegistry &);
103void initializeAArch64PostLegalizerLoweringPass(PassRegistry &);
104void initializeAArch64PostSelectOptimizePass(PassRegistry &);
105void initializeAArch64PreLegalizerCombinerPass(PassRegistry &);
106void initializeAArch64PromoteConstantPass(PassRegistry&);
107void initializeAArch64RedundantCopyEliminationPass(PassRegistry&);
108void initializeAArch64RedundantCondBranchPass(PassRegistry &);
109void initializeAArch64SIMDInstrOptPass(PassRegistry &);
110void initializeAArch64SLSHardeningPass(PassRegistry &);
111void initializeAArch64SpeculationHardeningPass(PassRegistry &);
112void initializeAArch64StackTaggingPass(PassRegistry &);
113void initializeAArch64StackTaggingPreRAPass(PassRegistry &);
114void initializeAArch64StorePairSuppressPass(PassRegistry&);
115void initializeFalkorHWPFFixPass(PassRegistry&);
116void initializeFalkorMarkStridedAccessesLegacyPass(PassRegistry&);
117void initializeLDTLSCleanupPass(PassRegistry&);
118void initializeSMEABIPass(PassRegistry &);
119void initializeSMEPeepholeOptPass(PassRegistry &);
120void initializeMachineSMEABIPass(PassRegistry &);
121void initializeAArch64SRLTDefineSuperRegsPass(PassRegistry &);
122void initializeSVEIntrinsicOptsPass(PassRegistry &);
123void initializeAArch64Arm64ECCallLoweringPass(PassRegistry &);
124} // end namespace llvm
125
126#endif
127