1//===- AArch64GlobalISelUtils.h ----------------------------------*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8/// \file APIs for AArch64-specific helper functions used in the GlobalISel
9/// pipeline.
10//===----------------------------------------------------------------------===//
11
12#ifndef LLVM_LIB_TARGET_AARCH64_GISEL_AARCH64GLOBALISELUTILS_H
13#define LLVM_LIB_TARGET_AARCH64_GISEL_AARCH64GLOBALISELUTILS_H
14#include "MCTargetDesc/AArch64AddressingModes.h"
15#include "Utils/AArch64BaseInfo.h"
16#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
17#include "llvm/CodeGen/GlobalISel/Utils.h"
18#include "llvm/CodeGen/Register.h"
19#include "llvm/IR/InstrTypes.h"
20#include <cstdint>
21
22namespace llvm {
23
24namespace AArch64GISelUtils {
25
26/// \returns true if \p MaybeSub and \p Pred are part of a CMN tree for an
27/// integer compare.
28bool isCMN(const MachineInstr *MaybeSub, const CmpInst::Predicate &Pred,
29 const MachineRegisterInfo &MRI);
30
31/// Replace a G_MEMSET with a value of 0 with a G_BZERO instruction if it is
32/// supported and beneficial to do so.
33///
34/// \note This only applies on Darwin.
35///
36/// \returns true if \p MI can be replaced with a G_BZERO.
37bool matchEmitBZero(const MachineInstr &MI, const MachineRegisterInfo &MRI,
38 const LibcallLoweringInfo &Libcalls, bool MinSize);
39///
40/// Replace \p MI with a G_BZERO.
41void applyEmitBZero(MachineInstr &MI, MachineIRBuilder &MIRBuilder);
42
43/// Analyze a ptrauth discriminator value to try to find the constant integer
44/// and address parts, cracking a ptrauth_blend intrinsic if there is one.
45/// \returns integer/address disc. parts, with NoRegister if no address disc.
46std::tuple<uint16_t, Register>
47extractPtrauthBlendDiscriminators(Register Disc, MachineRegisterInfo &MRI);
48
49/// Find the AArch64 condition codes necessary to represent \p P for a scalar
50/// floating point comparison.
51///
52/// \param [out] CondCode is the first condition code.
53/// \param [out] CondCode2 is the second condition code if necessary.
54/// AArch64CC::AL otherwise.
55void changeFCMPPredToAArch64CC(const CmpInst::Predicate P,
56 AArch64CC::CondCode &CondCode,
57 AArch64CC::CondCode &CondCode2);
58
59/// Find the AArch64 condition codes necessary to represent \p P for a vector
60/// floating point comparison.
61///
62/// \param [out] CondCode - The first condition code.
63/// \param [out] CondCode2 - The second condition code if necessary.
64/// AArch64CC::AL otherwise.
65/// \param [out] Invert - True if the comparison must be inverted with a NOT.
66void changeVectorFCMPPredToAArch64CC(const CmpInst::Predicate P,
67 AArch64CC::CondCode &CondCode,
68 AArch64CC::CondCode &CondCode2,
69 bool &Invert);
70
71} // namespace AArch64GISelUtils
72} // namespace llvm
73
74#endif
75