1//===- lib/Target/AMDGPU/AMDGPUCallLowering.h - Call lowering -*- C++ -*---===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file describes how to lower LLVM calls to machine code calls.
11///
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUCALLLOWERING_H
15#define LLVM_LIB_TARGET_AMDGPU_AMDGPUCALLLOWERING_H
16
17#include "llvm/CodeGen/GlobalISel/CallLowering.h"
18
19namespace llvm {
20
21class AMDGPUTargetLowering;
22class GCNSubtarget;
23class MachineInstrBuilder;
24class SIMachineFunctionInfo;
25
26class AMDGPUCallLowering final : public CallLowering {
27 void lowerParameterPtr(Register DstReg, MachineIRBuilder &B,
28 uint64_t Offset) const;
29
30 void lowerParameter(MachineIRBuilder &B, ArgInfo &AI, uint64_t Offset,
31 Align Alignment) const;
32
33 bool canLowerReturn(MachineFunction &MF, CallingConv::ID CallConv,
34 SmallVectorImpl<BaseArgInfo> &Outs,
35 bool IsVarArg) const override;
36
37 bool lowerReturnVal(MachineIRBuilder &B, const Value *Val,
38 ArrayRef<Register> VRegs, MachineInstrBuilder &Ret) const;
39
40 void addOriginalExecToReturn(MachineFunction &MF,
41 MachineInstrBuilder &Ret) const;
42
43public:
44 AMDGPUCallLowering(const AMDGPUTargetLowering &TLI);
45
46 bool lowerReturn(MachineIRBuilder &B, const Value *Val,
47 ArrayRef<Register> VRegs,
48 FunctionLoweringInfo &FLI) const override;
49
50 bool lowerFormalArgumentsKernel(MachineIRBuilder &B, const Function &F,
51 ArrayRef<ArrayRef<Register>> VRegs) const;
52
53 bool lowerFormalArguments(MachineIRBuilder &B, const Function &F,
54 ArrayRef<ArrayRef<Register>> VRegs,
55 FunctionLoweringInfo &FLI) const override;
56
57 bool passSpecialInputs(MachineIRBuilder &MIRBuilder,
58 CCState &CCInfo,
59 SmallVectorImpl<std::pair<MCRegister, Register>> &ArgRegs,
60 CallLoweringInfo &Info) const;
61
62 bool
63 doCallerAndCalleePassArgsTheSameWay(CallLoweringInfo &Info,
64 MachineFunction &MF,
65 SmallVectorImpl<ArgInfo> &InArgs) const;
66
67 bool
68 areCalleeOutgoingArgsTailCallable(CallLoweringInfo &Info, MachineFunction &MF,
69 SmallVectorImpl<ArgInfo> &OutArgs) const;
70
71 /// Returns true if the call can be lowered as a tail call.
72 bool
73 isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder,
74 CallLoweringInfo &Info,
75 SmallVectorImpl<ArgInfo> &InArgs,
76 SmallVectorImpl<ArgInfo> &OutArgs) const;
77
78 void handleImplicitCallArguments(
79 MachineIRBuilder &MIRBuilder, MachineInstrBuilder &CallInst,
80 const GCNSubtarget &ST, const SIMachineFunctionInfo &MFI,
81 CallingConv::ID CalleeCC,
82 ArrayRef<std::pair<MCRegister, Register>> ImplicitArgRegs) const;
83
84 bool lowerTailCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info,
85 SmallVectorImpl<ArgInfo> &OutArgs) const;
86 bool lowerChainCall(MachineIRBuilder &MIRBuilder,
87 CallLoweringInfo &Info) const;
88 bool lowerCall(MachineIRBuilder &MIRBuilder,
89 CallLoweringInfo &Info) const override;
90
91 static CCAssignFn *CCAssignFnForCall(CallingConv::ID CC, bool IsVarArg);
92 static CCAssignFn *CCAssignFnForReturn(CallingConv::ID CC, bool IsVarArg);
93};
94} // End of namespace llvm;
95#endif
96