1//===----------------------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "AMDGPUSelectionDAGInfo.h"
10
11#define GET_SDNODE_DESC
12#include "AMDGPUGenSDNodeInfo.inc"
13
14using namespace llvm;
15
16AMDGPUSelectionDAGInfo::AMDGPUSelectionDAGInfo()
17 : SelectionDAGGenTargetInfo(AMDGPUGenSDNodeInfo) {}
18
19AMDGPUSelectionDAGInfo::~AMDGPUSelectionDAGInfo() = default;
20
21const char *AMDGPUSelectionDAGInfo::getTargetNodeName(unsigned Opcode) const {
22#define NODE_NAME_CASE(node) \
23 case AMDGPUISD::node: \
24 return "AMDGPUISD::" #node;
25
26 switch (static_cast<AMDGPUISD::NodeType>(Opcode)) {
27 // These nodes don't have corresponding entries in *.td files yet.
28 NODE_NAME_CASE(WAVE_ADDRESS)
29 NODE_NAME_CASE(MAD_I64_I32)
30 NODE_NAME_CASE(MAD_U64_U32)
31 NODE_NAME_CASE(BUILD_VERTICAL_VECTOR)
32 // These do, but only when compiling R600.td,
33 // and the enum is generated from AMDGPU.td.
34 NODE_NAME_CASE(DOT4)
35 NODE_NAME_CASE(TEXTURE_FETCH)
36 NODE_NAME_CASE(R600_EXPORT)
37 NODE_NAME_CASE(CONST_ADDRESS)
38 NODE_NAME_CASE(DUMMY_CHAIN)
39 }
40
41#undef NODE_NAME_CASE
42
43 return SelectionDAGGenTargetInfo::getTargetNodeName(Opcode);
44}
45
46void AMDGPUSelectionDAGInfo::verifyTargetNode(const SelectionDAG &DAG,
47 const SDNode *N) const {
48 switch (N->getOpcode()) {
49 case AMDGPUISD::IF:
50 // result #0 must have type i1, but has type i32/i64
51 case AMDGPUISD::ELSE:
52 case AMDGPUISD::LOOP:
53 // operand #1 must have type i1, but has type i32/i64
54 case AMDGPUISD::LDS:
55 // result #0 must have type i64 (iPTR), but has type i32
56 return;
57 }
58 SelectionDAGGenTargetInfo::verifyTargetNode(DAG, N);
59}
60