1//===-- MCTargetDesc/AMDGPUMCAsmInfo.cpp - Assembly Info ------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7/// \file
8//===----------------------------------------------------------------------===//
9
10#include "AMDGPUMCAsmInfo.h"
11#include "MCTargetDesc/AMDGPUMCExpr.h"
12#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
13#include "llvm/ADT/Enum.h"
14#include "llvm/MC/MCExpr.h"
15#include "llvm/MC/MCSubtargetInfo.h"
16#include "llvm/TargetParser/Triple.h"
17
18using namespace llvm;
19
20constexpr EnumStringDef<MCAsmInfo::AtSpecifierKind> AtSpecifierDefs[] = {
21 {.Names: {"gotpcrel"}, .Value: AMDGPUMCExpr::S_GOTPCREL},
22 {.Names: {"gotpcrel32@lo"}, .Value: AMDGPUMCExpr::S_GOTPCREL32_LO},
23 {.Names: {"gotpcrel32@hi"}, .Value: AMDGPUMCExpr::S_GOTPCREL32_HI},
24 {.Names: {"rel32@lo"}, .Value: AMDGPUMCExpr::S_REL32_LO},
25 {.Names: {"rel32@hi"}, .Value: AMDGPUMCExpr::S_REL32_HI},
26 {.Names: {"rel64"}, .Value: AMDGPUMCExpr::S_REL64},
27 {.Names: {"abs32@lo"}, .Value: AMDGPUMCExpr::S_ABS32_LO},
28 {.Names: {"abs32@hi"}, .Value: AMDGPUMCExpr::S_ABS32_HI},
29 {.Names: {"abs64"}, .Value: AMDGPUMCExpr::S_ABS64},
30};
31constexpr auto atSpecifiers = BUILD_ENUM_STRINGS(AtSpecifierDefs);
32
33AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT,
34 const MCTargetOptions &Options)
35 : MCAsmInfoELF(Options) {
36 CodePointerSize = (TT.isAMDGCN()) ? 8 : 4;
37 StackGrowsUp = true;
38 HasSingleParameterDotFile = false;
39 //===------------------------------------------------------------------===//
40 MinInstAlignment = 4;
41
42 // This is the maximum instruction encoded size for gfx10. With a known
43 // subtarget, it can be reduced to 8 bytes.
44 MaxInstLength = (TT.isAMDGCN()) ? 20 : 16;
45 SeparatorString = "\n";
46 CommentString = ";";
47 InlineAsmStart = ";#ASMSTART";
48 InlineAsmEnd = ";#ASMEND";
49 UsesSetToEquateSymbol = true;
50
51 //===--- Data Emission Directives -------------------------------------===//
52 UsesELFSectionDirectiveForBSS = true;
53
54 //===--- Global Variable Emission Directives --------------------------===//
55 COMMDirectiveAlignmentIsInBytes = false;
56 HasNoDeadStrip = true;
57 //===--- Dwarf Emission Directives -----------------------------------===//
58 SupportsDebugInformation = true;
59 UsesCFIWithoutEH = true;
60 DwarfRegNumForCFI = true;
61
62 UseIntegratedAssembler = false;
63 initializeAtSpecifiers(atSpecifiers);
64}
65
66bool AMDGPUMCAsmInfo::shouldOmitSectionDirective(StringRef SectionName) const {
67 return SectionName == ".hsatext" || SectionName == ".hsadata_global_agent" ||
68 SectionName == ".hsadata_global_program" ||
69 SectionName == ".hsarodata_readonly_agent" ||
70 MCAsmInfo::shouldOmitSectionDirective(SectionName);
71}
72
73unsigned AMDGPUMCAsmInfo::getMaxInstLength(const MCSubtargetInfo *STI) const {
74 if (!STI || STI->getTargetTriple().getArch() == Triple::r600)
75 return MaxInstLength;
76
77 // Maximum for NSA encoded images
78 if (STI->hasFeature(Feature: AMDGPU::FeatureNSAEncoding))
79 return 20;
80
81 // VOP3PX/VOP3PX2 encoding.
82 if (STI->hasFeature(Feature: AMDGPU::FeatureGFX950Insts) ||
83 STI->hasFeature(Feature: AMDGPU::FeatureGFX1250Insts))
84 return 16;
85
86 // 64-bit instruction with 32-bit literal.
87 if (STI->hasFeature(Feature: AMDGPU::FeatureVOP3Literal))
88 return 12;
89
90 return 8;
91}
92