1//===--------------------- SIFrameLowering.h --------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
10#define LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
11
12#include "AMDGPUFrameLowering.h"
13#include "SIRegisterInfo.h"
14
15namespace llvm {
16
17class SIFrameLowering final : public AMDGPUFrameLowering {
18public:
19 SIFrameLowering(StackDirection D, Align StackAl, int LAO,
20 Align TransAl = Align(1))
21 : AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
22 ~SIFrameLowering() override = default;
23
24 void emitEntryFunctionPrologue(MachineFunction &MF,
25 MachineBasicBlock &MBB) const;
26 void emitPrologue(MachineFunction &MF,
27 MachineBasicBlock &MBB) const override;
28 void emitEpilogue(MachineFunction &MF,
29 MachineBasicBlock &MBB) const override;
30 StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
31 Register &FrameReg) const override;
32
33 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
34 RegScavenger *RS = nullptr) const override;
35 void determineCalleeSavesSGPR(MachineFunction &MF, BitVector &SavedRegs,
36 RegScavenger *RS = nullptr) const;
37 void determinePrologEpilogSGPRSaves(MachineFunction &MF, BitVector &SavedRegs,
38 bool NeedExecCopyReservedReg) const;
39 void emitCSRSpillStores(MachineFunction &MF, MachineBasicBlock &MBB,
40 MachineBasicBlock::iterator MBBI, DebugLoc &DL,
41 LiveRegUnits &LiveUnits, Register FrameReg,
42 Register FramePtrRegScratchCopy) const;
43 void emitCSRSpillRestores(MachineFunction &MF, MachineBasicBlock &MBB,
44 MachineBasicBlock::iterator MBBI, DebugLoc &DL,
45 LiveRegUnits &LiveUnits, Register FrameReg,
46 Register FramePtrRegScratchCopy) const;
47 bool
48 assignCalleeSavedSpillSlots(MachineFunction &MF,
49 const TargetRegisterInfo *TRI,
50 std::vector<CalleeSavedInfo> &CSI) const override;
51
52 bool assignCalleeSavedSpillSlotsImpl(MachineFunction &MF,
53 const TargetRegisterInfo *TRI,
54 std::vector<CalleeSavedInfo> &CSI) const;
55
56 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
57 MachineBasicBlock::iterator MI,
58 ArrayRef<CalleeSavedInfo> CSI,
59 const TargetRegisterInfo *TRI) const override;
60
61 bool
62 restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
63 MachineBasicBlock::iterator MI,
64 MutableArrayRef<CalleeSavedInfo> CSI,
65 const TargetRegisterInfo *TRI) const override;
66
67 bool allocateScavengingFrameIndexesNearIncomingSP(
68 const MachineFunction &MF) const override;
69
70 bool isSupportedStackID(TargetStackID::Value ID) const override;
71
72 void processFunctionBeforeFrameFinalized(
73 MachineFunction &MF,
74 RegScavenger *RS = nullptr) const override;
75
76 void processFunctionBeforeFrameIndicesReplaced(
77 MachineFunction &MF, RegScavenger *RS = nullptr) const override;
78
79 MachineBasicBlock::iterator
80 eliminateCallFramePseudoInstr(MachineFunction &MF,
81 MachineBasicBlock &MBB,
82 MachineBasicBlock::iterator MI) const override;
83
84protected:
85 bool hasFPImpl(const MachineFunction &MF) const override;
86
87private:
88 void emitEntryFunctionFlatScratchInit(MachineFunction &MF,
89 MachineBasicBlock &MBB,
90 MachineBasicBlock::iterator I,
91 const DebugLoc &DL,
92 Register ScratchWaveOffsetReg) const;
93
94 Register getEntryFunctionReservedScratchRsrcReg(MachineFunction &MF) const;
95
96 void emitEntryFunctionScratchRsrcRegSetup(
97 MachineFunction &MF, MachineBasicBlock &MBB,
98 MachineBasicBlock::iterator I, const DebugLoc &DL,
99 Register PreloadedPrivateBufferReg, Register ScratchRsrcReg,
100 Register ScratchWaveOffsetReg) const;
101
102public:
103 bool requiresStackPointerReference(const MachineFunction &MF) const;
104
105 // Returns true if the function may need to reserve space on the stack for the
106 // CWSR trap handler.
107 bool mayReserveScratchForCWSR(const MachineFunction &MF) const;
108};
109
110} // end namespace llvm
111
112#endif // LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
113