1//===-- AVRTargetMachine.cpp - Define TargetMachine for AVR ---------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines the AVR specific subclass of TargetMachine.
10//
11//===----------------------------------------------------------------------===//
12
13#include "AVRTargetMachine.h"
14
15#include "llvm/CodeGen/Passes.h"
16#include "llvm/CodeGen/TargetPassConfig.h"
17#include "llvm/MC/TargetRegistry.h"
18#include "llvm/Support/Compiler.h"
19
20#include "AVR.h"
21#include "AVRMachineFunctionInfo.h"
22#include "AVRTargetObjectFile.h"
23#include "AVRTargetTransformInfo.h"
24#include "MCTargetDesc/AVRMCTargetDesc.h"
25#include "TargetInfo/AVRTargetInfo.h"
26
27#include <optional>
28
29namespace llvm {
30
31/// Processes a CPU name.
32static StringRef getCPU(StringRef CPU) {
33 if (CPU.empty() || CPU == "generic") {
34 return "avr2";
35 }
36
37 return CPU;
38}
39
40static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM) {
41 return RM.value_or(u: Reloc::Static);
42}
43
44AVRTargetMachine::AVRTargetMachine(const Target &T, const Triple &TT,
45 StringRef CPU, StringRef FS,
46 const TargetOptions &Options,
47 std::optional<Reloc::Model> RM,
48 std::optional<CodeModel::Model> CM,
49 CodeGenOptLevel OL, bool JIT)
50 : CodeGenTargetMachineImpl(T, TT, getCPU(CPU), FS, Options,
51 getEffectiveRelocModel(RM),
52 getEffectiveCodeModel(CM, Default: CodeModel::Small), OL),
53 SubTarget(TT, std::string(getCPU(CPU)), std::string(FS), *this) {
54 this->TLOF = std::make_unique<AVRTargetObjectFile>();
55 initAsmInfo();
56}
57
58namespace {
59/// AVR Code Generator Pass Configuration Options.
60class AVRPassConfig : public TargetPassConfig {
61public:
62 AVRPassConfig(AVRTargetMachine &TM, PassManagerBase &PM)
63 : TargetPassConfig(TM, PM) {
64 EnableLoopTermFold = true;
65 }
66
67 AVRTargetMachine &getAVRTargetMachine() const {
68 return getTM<AVRTargetMachine>();
69 }
70
71 void addIRPasses() override;
72 bool addInstSelector() override;
73 void addPreSched2() override;
74 void addPreEmitPass() override;
75};
76} // namespace
77
78TargetPassConfig *AVRTargetMachine::createPassConfig(PassManagerBase &PM) {
79 return new AVRPassConfig(*this, PM);
80}
81
82void AVRPassConfig::addIRPasses() {
83 // Expand instructions like
84 // %result = shl i32 %n, %amount
85 // to a loop so that library calls are avoided.
86 addPass(P: createAVRShiftExpandPass());
87 addPass(P: createAtomicExpandLegacyPass());
88
89 TargetPassConfig::addIRPasses();
90}
91
92extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRTarget() {
93 // Register the target.
94 RegisterTargetMachine<AVRTargetMachine> X(getTheAVRTarget());
95
96 auto &PR = *PassRegistry::getPassRegistry();
97 initializeAVRAsmPrinterPass(PR);
98 initializeAVRExpandPseudoPass(PR);
99 initializeAVRShiftExpandPass(PR);
100 initializeAVRDAGToDAGISelLegacyPass(PR);
101}
102
103const AVRSubtarget *AVRTargetMachine::getSubtargetImpl() const {
104 return &SubTarget;
105}
106
107const AVRSubtarget *AVRTargetMachine::getSubtargetImpl(const Function &) const {
108 return &SubTarget;
109}
110
111TargetTransformInfo
112AVRTargetMachine::getTargetTransformInfo(const Function &F) const {
113 return TargetTransformInfo(std::make_unique<AVRTTIImpl>(args: this, args: F));
114}
115
116MachineFunctionInfo *AVRTargetMachine::createMachineFunctionInfo(
117 BumpPtrAllocator &Allocator, const Function &F,
118 const TargetSubtargetInfo *STI) const {
119 return AVRMachineFunctionInfo::create<AVRMachineFunctionInfo>(Allocator, F,
120 STI);
121}
122
123//===----------------------------------------------------------------------===//
124// Pass Pipeline Configuration
125//===----------------------------------------------------------------------===//
126
127bool AVRPassConfig::addInstSelector() {
128 // Install an instruction selector.
129 addPass(P: createAVRISelDag(TM&: getAVRTargetMachine(), OptLevel: getOptLevel()));
130 // Create the frame analyzer pass used by the PEI pass.
131 addPass(P: createAVRFrameAnalyzerPass());
132
133 return false;
134}
135
136void AVRPassConfig::addPreSched2() { addPass(P: createAVRExpandPseudoPass()); }
137
138void AVRPassConfig::addPreEmitPass() {
139 // Must run branch selection immediately preceding the asm printer.
140 addPass(PassID: &BranchRelaxationPassID);
141}
142
143} // end of namespace llvm
144