1//===-- LanaiTargetMachine.cpp - Define TargetMachine for Lanai ---------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Implements the info about Lanai target spec.
10//
11//===----------------------------------------------------------------------===//
12
13#include "LanaiTargetMachine.h"
14
15#include "Lanai.h"
16#include "LanaiMachineFunctionInfo.h"
17#include "LanaiTargetObjectFile.h"
18#include "LanaiTargetTransformInfo.h"
19#include "TargetInfo/LanaiTargetInfo.h"
20#include "llvm/Analysis/TargetTransformInfo.h"
21#include "llvm/CodeGen/Passes.h"
22#include "llvm/CodeGen/TargetPassConfig.h"
23#include "llvm/MC/TargetRegistry.h"
24#include "llvm/Support/Compiler.h"
25#include "llvm/Target/TargetOptions.h"
26#include <optional>
27
28using namespace llvm;
29
30extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiTarget() {
31 // Register the target.
32 RegisterTargetMachine<LanaiTargetMachine> registered_target(
33 getTheLanaiTarget());
34 PassRegistry &PR = *PassRegistry::getPassRegistry();
35 initializeLanaiAsmPrinterPass(PR);
36 initializeLanaiDAGToDAGISelLegacyPass(PR);
37 initializeLanaiMemAluCombinerPass(PR);
38}
39
40static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM) {
41 return RM.value_or(u: Reloc::PIC_);
42}
43
44LanaiTargetMachine::LanaiTargetMachine(
45 const Target &T, const Triple &TT, StringRef Cpu, StringRef FeatureString,
46 const TargetOptions &Options, std::optional<Reloc::Model> RM,
47 std::optional<CodeModel::Model> CodeModel, CodeGenOptLevel OptLevel,
48 bool JIT)
49 : CodeGenTargetMachineImpl(
50 T, TT.computeDataLayout(), TT, Cpu, FeatureString, Options,
51 getEffectiveRelocModel(RM),
52 getEffectiveCodeModel(CM: CodeModel, Default: CodeModel::Medium), OptLevel),
53 Subtarget(TT, Cpu, FeatureString, *this, Options, getCodeModel(),
54 OptLevel),
55 TLOF(new LanaiTargetObjectFile()) {
56 initAsmInfo();
57}
58
59TargetTransformInfo
60LanaiTargetMachine::getTargetTransformInfo(const Function &F) const {
61 return TargetTransformInfo(std::make_unique<LanaiTTIImpl>(args: this, args: F));
62}
63
64MachineFunctionInfo *LanaiTargetMachine::createMachineFunctionInfo(
65 BumpPtrAllocator &Allocator, const Function &F,
66 const TargetSubtargetInfo *STI) const {
67 return LanaiMachineFunctionInfo::create<LanaiMachineFunctionInfo>(Allocator,
68 F, STI);
69}
70
71namespace {
72// Lanai Code Generator Pass Configuration Options.
73class LanaiPassConfig : public TargetPassConfig {
74public:
75 LanaiPassConfig(LanaiTargetMachine &TM, PassManagerBase *PassManager)
76 : TargetPassConfig(TM, *PassManager) {}
77
78 LanaiTargetMachine &getLanaiTargetMachine() const {
79 return getTM<LanaiTargetMachine>();
80 }
81
82 void addIRPasses() override;
83 bool addInstSelector() override;
84 void addPreSched2() override;
85 void addPreEmitPass() override;
86};
87} // namespace
88
89TargetPassConfig *
90LanaiTargetMachine::createPassConfig(PassManagerBase &PassManager) {
91 return new LanaiPassConfig(*this, &PassManager);
92}
93
94void LanaiPassConfig::addIRPasses() {
95 addPass(P: createAtomicExpandLegacyPass());
96
97 TargetPassConfig::addIRPasses();
98}
99
100// Install an instruction selector pass.
101bool LanaiPassConfig::addInstSelector() {
102 addPass(P: createLanaiISelDag(TM&: getLanaiTargetMachine()));
103 return false;
104}
105
106// Implemented by targets that want to run passes immediately before
107// machine code is emitted.
108void LanaiPassConfig::addPreEmitPass() {
109 addPass(P: createLanaiDelaySlotFillerPass(TM: getLanaiTargetMachine()));
110}
111
112// Run passes after prolog-epilog insertion and before the second instruction
113// scheduling pass.
114void LanaiPassConfig::addPreSched2() {
115 addPass(P: createLanaiMemAluCombinerPass());
116}
117