1//===-- LanaiTargetMachine.cpp - Define TargetMachine for Lanai ---------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Implements the info about Lanai target spec.
10//
11//===----------------------------------------------------------------------===//
12
13#include "LanaiTargetMachine.h"
14
15#include "Lanai.h"
16#include "LanaiMachineFunctionInfo.h"
17#include "LanaiTargetObjectFile.h"
18#include "LanaiTargetTransformInfo.h"
19#include "TargetInfo/LanaiTargetInfo.h"
20#include "llvm/Analysis/TargetTransformInfo.h"
21#include "llvm/CodeGen/Passes.h"
22#include "llvm/CodeGen/TargetPassConfig.h"
23#include "llvm/MC/TargetRegistry.h"
24#include "llvm/Support/Compiler.h"
25#include "llvm/Target/TargetOptions.h"
26#include <optional>
27
28using namespace llvm;
29
30extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiTarget() {
31 // Register the target.
32 RegisterTargetMachine<LanaiTargetMachine> registered_target(
33 getTheLanaiTarget());
34 PassRegistry &PR = *PassRegistry::getPassRegistry();
35 initializeLanaiAsmPrinterPass(PR);
36 initializeLanaiDAGToDAGISelLegacyPass(PR);
37 initializeLanaiMemAluCombinerLegacyPass(PR);
38}
39
40static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM) {
41 return RM.value_or(u: Reloc::PIC_);
42}
43
44LanaiTargetMachine::LanaiTargetMachine(
45 const Target &T, const Triple &TT, StringRef Cpu, StringRef FeatureString,
46 const TargetOptions &Options, std::optional<Reloc::Model> RM,
47 std::optional<CodeModel::Model> CodeModel, CodeGenOptLevel OptLevel,
48 bool JIT)
49 : CodeGenTargetMachineImpl(
50 T, TT, Cpu, FeatureString, Options, getEffectiveRelocModel(RM),
51 getEffectiveCodeModel(CM: CodeModel, Default: CodeModel::Medium), OptLevel),
52 Subtarget(TT, Cpu, FeatureString, *this, Options, getCodeModel(),
53 OptLevel),
54 TLOF(new LanaiTargetObjectFile()) {
55 initAsmInfo();
56}
57
58TargetTransformInfo
59LanaiTargetMachine::getTargetTransformInfo(const Function &F) const {
60 return TargetTransformInfo(std::make_unique<LanaiTTIImpl>(args: this, args: F));
61}
62
63MachineFunctionInfo *LanaiTargetMachine::createMachineFunctionInfo(
64 BumpPtrAllocator &Allocator, const Function &F,
65 const TargetSubtargetInfo *STI) const {
66 return LanaiMachineFunctionInfo::create<LanaiMachineFunctionInfo>(Allocator,
67 F, STI);
68}
69
70namespace {
71// Lanai Code Generator Pass Configuration Options.
72class LanaiPassConfig : public TargetPassConfig {
73public:
74 LanaiPassConfig(LanaiTargetMachine &TM, PassManagerBase *PassManager)
75 : TargetPassConfig(TM, *PassManager) {}
76
77 LanaiTargetMachine &getLanaiTargetMachine() const {
78 return getTM<LanaiTargetMachine>();
79 }
80
81 void addIRPasses() override;
82 bool addInstSelector() override;
83 void addPreSched2() override;
84 void addPreEmitPass() override;
85};
86} // namespace
87
88TargetPassConfig *
89LanaiTargetMachine::createPassConfig(PassManagerBase &PassManager) {
90 return new LanaiPassConfig(*this, &PassManager);
91}
92
93void LanaiPassConfig::addIRPasses() {
94 addPass(P: createAtomicExpandLegacyPass());
95
96 TargetPassConfig::addIRPasses();
97}
98
99// Install an instruction selector pass.
100bool LanaiPassConfig::addInstSelector() {
101 addPass(P: createLanaiISelDagLegacyPass(TM&: getLanaiTargetMachine()));
102 return false;
103}
104
105// Implemented by targets that want to run passes immediately before
106// machine code is emitted.
107void LanaiPassConfig::addPreEmitPass() {
108 addPass(P: createLanaiDelaySlotFillerLegacyPass(TM: getLanaiTargetMachine()));
109}
110
111// Run passes after prolog-epilog insertion and before the second instruction
112// scheduling pass.
113void LanaiPassConfig::addPreSched2() {
114 addPass(P: createLanaiMemAluCombinerLegacyPass());
115}
116